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Commit | Line | Data |
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c7a34993 MM |
1 | /* |
2 | * The PCI Utilities -- Show Extended Capabilities | |
3 | * | |
8f39f69e | 4 | * Copyright (c) 1997--2010 Martin Mares <mj@ucw.cz> |
c7a34993 MM |
5 | * |
6 | * Can be freely distributed and used under the terms of the GNU GPL. | |
7 | */ | |
8 | ||
9 | #include <stdio.h> | |
10 | #include <string.h> | |
11 | ||
12 | #include "lspci.h" | |
13 | ||
14 | static void | |
15 | cap_dsn(struct device *d, int where) | |
16 | { | |
17 | u32 t1, t2; | |
18 | if (!config_fetch(d, where + 4, 8)) | |
19 | return; | |
20 | t1 = get_conf_long(d, where + 4); | |
21 | t2 = get_conf_long(d, where + 8); | |
22 | printf("Device Serial Number %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x\n", | |
6f9f8fd7 MW |
23 | t2 >> 24, (t2 >> 16) & 0xff, (t2 >> 8) & 0xff, t2 & 0xff, |
24 | t1 >> 24, (t1 >> 16) & 0xff, (t1 >> 8) & 0xff, t1 & 0xff); | |
c7a34993 MM |
25 | } |
26 | ||
27 | static void | |
28 | cap_aer(struct device *d, int where) | |
29 | { | |
30 | u32 l; | |
31 | ||
32 | printf("Advanced Error Reporting\n"); | |
9a2e4b35 YZ |
33 | if (verbose < 2) |
34 | return; | |
35 | ||
c7a34993 MM |
36 | if (!config_fetch(d, where + PCI_ERR_UNCOR_STATUS, 24)) |
37 | return; | |
38 | ||
39 | l = get_conf_long(d, where + PCI_ERR_UNCOR_STATUS); | |
40 | printf("\t\tUESta:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c " | |
41 | "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n", | |
42 | FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP), | |
43 | FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT), | |
44 | FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP), | |
45 | FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL)); | |
46 | l = get_conf_long(d, where + PCI_ERR_UNCOR_MASK); | |
47 | printf("\t\tUEMsk:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c " | |
48 | "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n", | |
49 | FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP), | |
50 | FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT), | |
51 | FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP), | |
52 | FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL)); | |
53 | l = get_conf_long(d, where + PCI_ERR_UNCOR_SEVER); | |
54 | printf("\t\tUESvrt:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c " | |
55 | "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n", | |
56 | FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP), | |
57 | FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT), | |
58 | FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP), | |
59 | FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL)); | |
60 | l = get_conf_long(d, where + PCI_ERR_COR_STATUS); | |
61 | printf("\t\tCESta:\tRxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c\n", | |
62 | FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP), | |
63 | FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE)); | |
64 | l = get_conf_long(d, where + PCI_ERR_COR_MASK); | |
65 | printf("\t\tCEMsk:\tRxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c\n", | |
66 | FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP), | |
67 | FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE)); | |
68 | l = get_conf_long(d, where + PCI_ERR_CAP); | |
69 | printf("\t\tAERCap:\tFirst Error Pointer: %02x, GenCap%c CGenEn%c ChkCap%c ChkEn%c\n", | |
70 | PCI_ERR_CAP_FEP(l), FLAG(l, PCI_ERR_CAP_ECRC_GENC), FLAG(l, PCI_ERR_CAP_ECRC_GENE), | |
71 | FLAG(l, PCI_ERR_CAP_ECRC_CHKC), FLAG(l, PCI_ERR_CAP_ECRC_CHKE)); | |
72 | ||
73 | } | |
74 | ||
75 | static void | |
76 | cap_acs(struct device *d, int where) | |
77 | { | |
78 | u16 w; | |
79 | ||
80 | printf("Access Control Services\n"); | |
9a2e4b35 YZ |
81 | if (verbose < 2) |
82 | return; | |
83 | ||
c7a34993 MM |
84 | if (!config_fetch(d, where + PCI_ACS_CAP, 4)) |
85 | return; | |
86 | ||
87 | w = get_conf_word(d, where + PCI_ACS_CAP); | |
88 | printf("\t\tACSCap:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c " | |
89 | "DirectTrans%c\n", | |
90 | FLAG(w, PCI_ACS_CAP_VALID), FLAG(w, PCI_ACS_CAP_BLOCK), FLAG(w, PCI_ACS_CAP_REQ_RED), | |
91 | FLAG(w, PCI_ACS_CAP_CMPLT_RED), FLAG(w, PCI_ACS_CAP_FORWARD), FLAG(w, PCI_ACS_CAP_EGRESS), | |
92 | FLAG(w, PCI_ACS_CAP_TRANS)); | |
93 | w = get_conf_word(d, where + PCI_ACS_CTRL); | |
94 | printf("\t\tACSCtl:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c " | |
95 | "DirectTrans%c\n", | |
96 | FLAG(w, PCI_ACS_CTRL_VALID), FLAG(w, PCI_ACS_CTRL_BLOCK), FLAG(w, PCI_ACS_CTRL_REQ_RED), | |
97 | FLAG(w, PCI_ACS_CTRL_CMPLT_RED), FLAG(w, PCI_ACS_CTRL_FORWARD), FLAG(w, PCI_ACS_CTRL_EGRESS), | |
98 | FLAG(w, PCI_ACS_CTRL_TRANS)); | |
99 | } | |
100 | ||
101 | static void | |
102 | cap_ari(struct device *d, int where) | |
103 | { | |
104 | u16 w; | |
105 | ||
106 | printf("Alternative Routing-ID Interpretation (ARI)\n"); | |
9a2e4b35 YZ |
107 | if (verbose < 2) |
108 | return; | |
109 | ||
c7a34993 MM |
110 | if (!config_fetch(d, where + PCI_ARI_CAP, 4)) |
111 | return; | |
112 | ||
113 | w = get_conf_word(d, where + PCI_ARI_CAP); | |
114 | printf("\t\tARICap:\tMFVC%c ACS%c, Next Function: %d\n", | |
115 | FLAG(w, PCI_ARI_CAP_MFVC), FLAG(w, PCI_ARI_CAP_ACS), | |
116 | PCI_ARI_CAP_NFN(w)); | |
117 | w = get_conf_word(d, where + PCI_ARI_CTRL); | |
118 | printf("\t\tARICtl:\tMFVC%c ACS%c, Function Group: %d\n", | |
119 | FLAG(w, PCI_ARI_CTRL_MFVC), FLAG(w, PCI_ARI_CTRL_ACS), | |
120 | PCI_ARI_CTRL_FG(w)); | |
121 | } | |
122 | ||
123 | static void | |
124 | cap_ats(struct device *d, int where) | |
125 | { | |
126 | u16 w; | |
127 | ||
128 | printf("Address Translation Service (ATS)\n"); | |
9a2e4b35 YZ |
129 | if (verbose < 2) |
130 | return; | |
131 | ||
c7a34993 MM |
132 | if (!config_fetch(d, where + PCI_ATS_CAP, 4)) |
133 | return; | |
134 | ||
135 | w = get_conf_word(d, where + PCI_ATS_CAP); | |
136 | printf("\t\tATSCap:\tInvalidate Queue Depth: %02x\n", PCI_ATS_CAP_IQD(w)); | |
137 | w = get_conf_word(d, where + PCI_ATS_CTRL); | |
138 | printf("\t\tATSCtl:\tEnable%c, Smallest Translation Unit: %02x\n", | |
139 | FLAG(w, PCI_ATS_CTRL_ENABLE), PCI_ATS_CTRL_STU(w)); | |
140 | } | |
141 | ||
142 | static void | |
143 | cap_sriov(struct device *d, int where) | |
144 | { | |
145 | u16 b; | |
146 | u16 w; | |
147 | u32 l; | |
67e78b32 | 148 | int i; |
c7a34993 MM |
149 | |
150 | printf("Single Root I/O Virtualization (SR-IOV)\n"); | |
9a2e4b35 YZ |
151 | if (verbose < 2) |
152 | return; | |
153 | ||
c7a34993 MM |
154 | if (!config_fetch(d, where + PCI_IOV_CAP, 0x3c)) |
155 | return; | |
156 | ||
157 | l = get_conf_long(d, where + PCI_IOV_CAP); | |
158 | printf("\t\tIOVCap:\tMigration%c, Interrupt Message Number: %03x\n", | |
159 | FLAG(l, PCI_IOV_CAP_VFM), PCI_IOV_CAP_IMN(l)); | |
160 | w = get_conf_word(d, where + PCI_IOV_CTRL); | |
161 | printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c\n", | |
162 | FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME), | |
163 | FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE), | |
164 | FLAG(w, PCI_IOV_CTRL_ARI)); | |
165 | w = get_conf_word(d, where + PCI_IOV_STATUS); | |
166 | printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS)); | |
167 | w = get_conf_word(d, where + PCI_IOV_INITIALVF); | |
168 | printf("\t\tInitial VFs: %d, ", w); | |
169 | w = get_conf_word(d, where + PCI_IOV_TOTALVF); | |
170 | printf("Total VFs: %d, ", w); | |
171 | w = get_conf_word(d, where + PCI_IOV_NUMVF); | |
172 | printf("Number of VFs: %d, ", w); | |
173 | b = get_conf_byte(d, where + PCI_IOV_FDL); | |
174 | printf("Function Dependency Link: %02x\n", b); | |
175 | w = get_conf_word(d, where + PCI_IOV_OFFSET); | |
176 | printf("\t\tVF offset: %d, ", w); | |
177 | w = get_conf_word(d, where + PCI_IOV_STRIDE); | |
178 | printf("stride: %d, ", w); | |
179 | w = get_conf_word(d, where + PCI_IOV_DID); | |
180 | printf("Device ID: %04x\n", w); | |
181 | l = get_conf_long(d, where + PCI_IOV_SUPPS); | |
182 | printf("\t\tSupported Page Size: %08x, ", l); | |
183 | l = get_conf_long(d, where + PCI_IOV_SYSPS); | |
184 | printf("System Page Size: %08x\n", l); | |
b9e11c65 MM |
185 | |
186 | for (i=0; i < PCI_IOV_NUM_BAR; i++) | |
187 | { | |
187bf2f5 | 188 | u32 addr; |
b9e11c65 MM |
189 | int type; |
190 | u32 h; | |
191 | l = get_conf_long(d, where + PCI_IOV_BAR_BASE + 4*i); | |
192 | if (l == 0xffffffff) | |
193 | l = 0; | |
194 | if (!l) | |
195 | continue; | |
196 | printf("\t\tRegion %d: Memory at ", i); | |
197 | addr = l & PCI_ADDR_MEM_MASK; | |
198 | type = l & PCI_BASE_ADDRESS_MEM_TYPE_MASK; | |
199 | if (type == PCI_BASE_ADDRESS_MEM_TYPE_64) | |
200 | { | |
201 | i++; | |
202 | h = get_conf_long(d, where + PCI_IOV_BAR_BASE + (i*4)); | |
187bf2f5 | 203 | printf("%08x", h); |
b9e11c65 | 204 | } |
187bf2f5 MM |
205 | printf("%08x (%s-bit, %sprefetchable)\n", |
206 | addr, | |
b9e11c65 MM |
207 | (type == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32" : "64", |
208 | (l & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-"); | |
67e78b32 | 209 | } |
b9e11c65 | 210 | |
edca3520 | 211 | l = get_conf_long(d, where + PCI_IOV_MSAO); |
c7a34993 MM |
212 | printf("\t\tVF Migration: offset: %08x, BIR: %x\n", PCI_IOV_MSA_OFFSET(l), |
213 | PCI_IOV_MSA_BIR(l)); | |
214 | } | |
215 | ||
33088c24 MM |
216 | static void |
217 | cap_vc(struct device *d, int where) | |
218 | { | |
219 | u32 cr1, cr2; | |
220 | u16 ctrl, status; | |
221 | int evc_cnt; | |
222 | int arb_table_pos; | |
223 | int i, j; | |
3d8b5258 | 224 | static const char ref_clocks[][6] = { "100ns" }; |
3edae14a MM |
225 | static const char arb_selects[8][7] = { "Fixed", "WRR32", "WRR64", "WRR128", "??4", "??5", "??6", "??7" }; |
226 | static const char vc_arb_selects[8][8] = { "Fixed", "WRR32", "WRR64", "WRR128", "TWRR128", "WRR256", "??6", "??7" }; | |
3d8b5258 | 227 | char buf[8]; |
33088c24 MM |
228 | |
229 | printf("Virtual Channel\n"); | |
230 | if (verbose < 2) | |
231 | return; | |
232 | ||
233 | if (!config_fetch(d, where + 4, 0x1c - 4)) | |
234 | return; | |
235 | ||
236 | cr1 = get_conf_long(d, where + PCI_VC_PORT_REG1); | |
237 | cr2 = get_conf_long(d, where + PCI_VC_PORT_REG2); | |
238 | ctrl = get_conf_word(d, where + PCI_VC_PORT_CTRL); | |
239 | status = get_conf_word(d, where + PCI_VC_PORT_STATUS); | |
240 | ||
3d8b5258 | 241 | evc_cnt = BITS(cr1, 0, 3); |
d676f20d | 242 | printf("\t\tCaps:\tLPEVC=%d RefClk=%s PATEntryBits=%d\n", |
3d8b5258 MM |
243 | BITS(cr1, 4, 3), |
244 | TABLE(ref_clocks, BITS(cr1, 8, 2), buf), | |
d676f20d | 245 | 1 << BITS(cr1, 10, 2)); |
33088c24 | 246 | |
d676f20d | 247 | printf("\t\tArb:"); |
33088c24 MM |
248 | for (i=0; i<8; i++) |
249 | if (arb_selects[i][0] != '?' || cr2 & (1 << i)) | |
d676f20d | 250 | printf("%c%s%c", (i ? ' ' : '\t'), arb_selects[i], FLAG(cr2, 1 << i)); |
3d8b5258 | 251 | arb_table_pos = BITS(cr2, 24, 8); |
33088c24 | 252 | |
d676f20d | 253 | printf("\n\t\tCtrl:\tArbSelect=%s\n", TABLE(arb_selects, BITS(ctrl, 1, 3), buf)); |
33088c24 MM |
254 | printf("\t\tStatus:\tInProgress%c\n", FLAG(status, 1)); |
255 | ||
256 | if (arb_table_pos) | |
d676f20d MM |
257 | { |
258 | arb_table_pos = where + 16*arb_table_pos; | |
259 | printf("\t\tPort Arbitration Table [%x] <?>\n", arb_table_pos); | |
260 | } | |
33088c24 MM |
261 | |
262 | for (i=0; i<=evc_cnt; i++) | |
263 | { | |
264 | int pos = where + PCI_VC_RES_CAP + 12*i; | |
265 | u32 rcap, rctrl; | |
266 | u16 rstatus; | |
267 | int pat_pos; | |
268 | ||
5a9a932c | 269 | printf("\t\tVC%d:\t", i); |
33088c24 MM |
270 | if (!config_fetch(d, pos, 12)) |
271 | { | |
5a9a932c | 272 | printf("<unreadable>\n"); |
33088c24 MM |
273 | continue; |
274 | } | |
275 | rcap = get_conf_long(d, pos); | |
276 | rctrl = get_conf_long(d, pos+4); | |
277 | rstatus = get_conf_word(d, pos+8); | |
278 | ||
3d8b5258 | 279 | pat_pos = BITS(rcap, 24, 8); |
5a9a932c | 280 | printf("Caps:\tPATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c\n", |
33088c24 | 281 | pat_pos, |
3d8b5258 | 282 | BITS(rcap, 16, 6) + 1, |
33088c24 MM |
283 | FLAG(rcap, 1 << 15)); |
284 | ||
285 | printf("\t\t\tArb:"); | |
286 | for (j=0; j<8; j++) | |
287 | if (vc_arb_selects[j][0] != '?' || rcap & (1 << j)) | |
288 | printf("%c%s%c", (j ? ' ' : '\t'), vc_arb_selects[j], FLAG(rcap, 1 << j)); | |
289 | ||
290 | printf("\n\t\t\tCtrl:\tEnable%c ID=%d ArbSelect=%s TC/VC=%02x\n", | |
291 | FLAG(rctrl, 1 << 31), | |
3d8b5258 MM |
292 | BITS(rctrl, 24, 3), |
293 | TABLE(vc_arb_selects, BITS(rctrl, 17, 3), buf), | |
294 | BITS(rctrl, 0, 8)); | |
33088c24 MM |
295 | |
296 | printf("\t\t\tStatus:\tNegoPending%c InProgress%c\n", | |
297 | FLAG(rstatus, 2), | |
298 | FLAG(rstatus, 1)); | |
299 | ||
300 | if (pat_pos) | |
301 | printf("\t\t\tPort Arbitration Table <?>\n"); | |
302 | } | |
303 | } | |
304 | ||
5a9a932c MM |
305 | static void |
306 | cap_rclink(struct device *d, int where) | |
307 | { | |
308 | u32 esd; | |
309 | int num_links; | |
310 | int i; | |
311 | static const char elt_types[][9] = { "Config", "Egress", "Internal" }; | |
312 | char buf[8]; | |
313 | ||
314 | printf("Root Complex Link\n"); | |
315 | if (verbose < 2) | |
316 | return; | |
317 | ||
318 | if (!config_fetch(d, where + 4, PCI_RCLINK_LINK1 - 4)) | |
319 | return; | |
320 | ||
321 | esd = get_conf_long(d, where + PCI_RCLINK_ESD); | |
322 | num_links = BITS(esd, 8, 8); | |
323 | printf("\t\tDesc:\tPortNumber=%02x ComponentID=%02x EltType=%s\n", | |
324 | BITS(esd, 24, 8), | |
325 | BITS(esd, 16, 8), | |
326 | TABLE(elt_types, BITS(esd, 0, 8), buf)); | |
327 | ||
328 | for (i=0; i<num_links; i++) | |
329 | { | |
330 | int pos = where + PCI_RCLINK_LINK1 + i*PCI_RCLINK_LINK_SIZE; | |
331 | u32 desc; | |
332 | u32 addr_lo, addr_hi; | |
333 | ||
334 | printf("\t\tLink%d:\t", i); | |
335 | if (!config_fetch(d, pos, PCI_RCLINK_LINK_SIZE)) | |
336 | { | |
337 | printf("<unreadable>\n"); | |
338 | return; | |
339 | } | |
340 | desc = get_conf_long(d, pos + PCI_RCLINK_LINK_DESC); | |
341 | addr_lo = get_conf_long(d, pos + PCI_RCLINK_LINK_ADDR); | |
342 | addr_hi = get_conf_long(d, pos + PCI_RCLINK_LINK_ADDR + 4); | |
343 | ||
344 | printf("Desc:\tTargetPort=%02x TargetComponent=%02x AssocRCRB%c LinkType=%s LinkValid%c\n", | |
345 | BITS(desc, 24, 8), | |
346 | BITS(desc, 16, 8), | |
347 | FLAG(desc, 4), | |
348 | ((desc & 2) ? "Config" : "MemMapped"), | |
349 | FLAG(desc, 1)); | |
350 | ||
351 | if (desc & 2) | |
352 | { | |
353 | int n = addr_lo & 7; | |
354 | if (!n) | |
355 | n = 8; | |
356 | printf("\t\t\tAddr:\t%02x:%02x.%d CfgSpace=%08x%08x\n", | |
357 | BITS(addr_lo, 20, n), | |
358 | BITS(addr_lo, 15, 5), | |
359 | BITS(addr_lo, 12, 3), | |
360 | addr_hi, addr_lo); | |
361 | } | |
362 | else | |
363 | printf("\t\t\tAddr:\t%08x%08x\n", addr_hi, addr_lo); | |
364 | } | |
365 | } | |
366 | ||
78ca9582 MM |
367 | static void |
368 | cap_evendor(struct device *d, int where) | |
369 | { | |
370 | u32 hdr; | |
371 | ||
372 | printf("Vendor Specific Information: "); | |
373 | if (!config_fetch(d, where + PCI_EVNDR_HEADER, 4)) | |
374 | { | |
375 | printf("<unreadable>\n"); | |
376 | return; | |
377 | } | |
378 | ||
379 | hdr = get_conf_long(d, where + PCI_EVNDR_HEADER); | |
380 | printf("ID=%04x Rev=%d Len=%03x <?>\n", | |
381 | BITS(hdr, 0, 16), | |
382 | BITS(hdr, 16, 4), | |
383 | BITS(hdr, 20, 12)); | |
384 | } | |
385 | ||
c7a34993 MM |
386 | void |
387 | show_ext_caps(struct device *d) | |
388 | { | |
389 | int where = 0x100; | |
390 | char been_there[0x1000]; | |
391 | memset(been_there, 0, 0x1000); | |
392 | do | |
393 | { | |
394 | u32 header; | |
33088c24 | 395 | int id, version; |
c7a34993 MM |
396 | |
397 | if (!config_fetch(d, where, 4)) | |
398 | break; | |
399 | header = get_conf_long(d, where); | |
400 | if (!header) | |
401 | break; | |
402 | id = header & 0xffff; | |
33088c24 MM |
403 | version = (header >> 16) & 0xf; |
404 | printf("\tCapabilities: [%03x", where); | |
405 | if (verbose > 1) | |
406 | printf(" v%d", version); | |
407 | printf("] "); | |
c7a34993 MM |
408 | if (been_there[where]++) |
409 | { | |
410 | printf("<chain looped>\n"); | |
411 | break; | |
412 | } | |
413 | switch (id) | |
414 | { | |
415 | case PCI_EXT_CAP_ID_AER: | |
416 | cap_aer(d, where); | |
417 | break; | |
418 | case PCI_EXT_CAP_ID_VC: | |
33088c24 MM |
419 | case PCI_EXT_CAP_ID_VC2: |
420 | cap_vc(d, where); | |
c7a34993 MM |
421 | break; |
422 | case PCI_EXT_CAP_ID_DSN: | |
423 | cap_dsn(d, where); | |
424 | break; | |
425 | case PCI_EXT_CAP_ID_PB: | |
426 | printf("Power Budgeting <?>\n"); | |
427 | break; | |
428 | case PCI_EXT_CAP_ID_RCLINK: | |
5a9a932c | 429 | cap_rclink(d, where); |
c7a34993 MM |
430 | break; |
431 | case PCI_EXT_CAP_ID_RCILINK: | |
432 | printf("Root Complex Internal Link <?>\n"); | |
433 | break; | |
434 | case PCI_EXT_CAP_ID_RCECOLL: | |
435 | printf("Root Complex Event Collector <?>\n"); | |
436 | break; | |
437 | case PCI_EXT_CAP_ID_MFVC: | |
438 | printf("Multi-Function Virtual Channel <?>\n"); | |
439 | break; | |
440 | case PCI_EXT_CAP_ID_RBCB: | |
441 | printf("Root Bridge Control Block <?>\n"); | |
442 | break; | |
443 | case PCI_EXT_CAP_ID_VNDR: | |
78ca9582 | 444 | cap_evendor(d, where); |
c7a34993 MM |
445 | break; |
446 | case PCI_EXT_CAP_ID_ACS: | |
447 | cap_acs(d, where); | |
448 | break; | |
449 | case PCI_EXT_CAP_ID_ARI: | |
450 | cap_ari(d, where); | |
451 | break; | |
452 | case PCI_EXT_CAP_ID_ATS: | |
453 | cap_ats(d, where); | |
454 | break; | |
455 | case PCI_EXT_CAP_ID_SRIOV: | |
456 | cap_sriov(d, where); | |
457 | break; | |
458 | default: | |
459 | printf("#%02x\n", id); | |
460 | break; | |
461 | } | |
d61c4772 | 462 | where = (header >> 20) & ~3; |
c7a34993 MM |
463 | } while (where); |
464 | } |