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Verbose display of CardBus bridge headers (type 2) added. Requires <linux/pci.h>
[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
96e4f295 2 * $Id: lspci.c,v 1.13 1998/07/15 20:37:12 mj Exp $
98e39e09
MM		 3 *
4 * Linux PCI Utilities -- List All PCI Devices
5 *
18928b91 6 * Copyright (c) 1997, 1998 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
98e39e09
MM		 7 *
8 * Can be freely distributed and used under the terms of the GNU GPL.
9 */
10
11#include <stdio.h>
12#include <string.h>
13#include <stdlib.h>
14#include <fcntl.h>
15#include <unistd.h>
98e39e09
MM		 16
17#include "pciutils.h"
18
19/* Options */
20
21static int verbose; /* Show detailed information */
22static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23static int show_hex; /* Show contents of config space as hexadecimal numbers */
e4842ff3 24static struct pci_filter filter; /* Device filter */
6d0dc0fd 25static int show_tree; /* Show bus tree */
0a33d0ec 26static int machine_readable; /* Generate machine-readable output */
18928b91 27static char *pci_dir = PROC_BUS_PCI;
98e39e09 28
e4842ff3 29static char options[] = "nvbxs:d:ti:p:m";
98e39e09
MM		 30
31static char help_msg[] = "\
32Usage: lspci [<switches>]\n\
33\n\
e4842ff3
MM		 34-v\t\tBe verbose\n\
35-n\t\tShow numeric ID's\n\
36-b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
37-x\t\tShow hex-dump of config space (-xx shows full 256 bytes)\n\
38-s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39-d [<vendor>]:[<device>]\tShow only selected devices\n\
40-t\t\tShow bus tree\n\
41-m\t\tProduce machine-readable output\n\
18928b91
MM		 42-i <file>\tUse specified ID database instead of " ETC_PCI_IDS "\n\
43-p <dir>\tUse specified bus directory instead of " PROC_BUS_PCI "\n\
98e39e09
MM		 44";
45
f17b962b
MM		 46/* Format strings used for IRQ numbers */
47
2f48f637 48#ifdef ARCH_SPARC64
f17b962b
MM		 49#define IRQ_FORMAT "%08x"
50#else
51#define IRQ_FORMAT "%d"
52#endif
53
98e39e09
MM		 54/* Our view of the PCI bus */
55
56struct device {
57 struct device *next;
58 byte bus, devfn;
59 word vendid, devid;
60 unsigned int kernel_irq;
b2c9b373 61 unsigned long kernel_base_addr[6], kernel_rom_base_addr;
98e39e09
MM		 62 byte config[256];
63};
64
65static struct device *first_dev, **last_dev = &first_dev;
66
67/* Miscellaneous routines */
68
69void *
70xmalloc(unsigned int howmuch)
71{
72 void *p = malloc(howmuch);
73 if (!p)
74 {
75 fprintf(stderr, "lspci: Unable to allocate %d bytes of memory\n", howmuch);
76 exit(1);
77 }
78 return p;
79}
80
98e39e09
MM		 81/* Interface for /proc/bus/pci */
82
83static void
84scan_dev_list(void)
85{
86 FILE *f;
87 byte line[256];
18928b91 88 byte name[256];
98e39e09 89
18928b91
MM		 90 sprintf(name, "%s/devices", pci_dir);
91 if (! (f = fopen(name, "r")))
98e39e09 92 {
18928b91 93 perror(name);
98e39e09
MM		 94 exit(1);
95 }
96 while (fgets(line, sizeof(line), f))
97 {
98 struct device *d = xmalloc(sizeof(struct device));
99 unsigned int dfn, vend;
100
b2c9b373
MM		 101 bzero(d, sizeof(*d));
102 sscanf(line, "%x %x %x %lx %lx %lx %lx %lx %lx %lx",
98e39e09
MM		 103 &dfn,
104 &vend,
105 &d->kernel_irq,
106 &d->kernel_base_addr[0],
107 &d->kernel_base_addr[1],
108 &d->kernel_base_addr[2],
109 &d->kernel_base_addr[3],
110 &d->kernel_base_addr[4],
b2c9b373
MM		 111 &d->kernel_base_addr[5],
112 &d->kernel_rom_base_addr);
98e39e09
MM		 113 d->bus = dfn >> 8U;
114 d->devfn = dfn & 0xff;
115 d->vendid = vend >> 16U;
116 d->devid = vend & 0xffff;
e4842ff3 117 if (filter_match(&filter, d->bus, d->devfn, d->vendid, d->devid))
98e39e09
MM		 118 {
119 *last_dev = d;
120 last_dev = &d->next;
121 d->next = NULL;
122 }
123 }
124 fclose(f);
125}
126
127static inline void
128make_proc_pci_name(struct device *d, char *p)
129{
18928b91
MM		 130 sprintf(p, "%s/%02x/%02x.%x",
131 pci_dir, d->bus, PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
98e39e09
MM		 132}
133
134static void
135scan_config(void)
136{
137 struct device *d;
138 char name[64];
2f48f637 139 int fd, res;
98e39e09
MM		 140 int how_much = (show_hex > 1) ? 256 : 64;
141
142 for(d=first_dev; d; d=d->next)
143 {
144 make_proc_pci_name(d, name);
145 if ((fd = open(name, O_RDONLY)) < 0)
146 {
147 fprintf(stderr, "lspci: Unable to open %s: %m\n", name);
148 exit(1);
149 }
2f48f637
MM		 150 res = read(fd, d->config, how_much);
151 if (res < 0)
98e39e09
MM		 152 {
153 fprintf(stderr, "lspci: Error reading %s: %m\n", name);
154 exit(1);
155 }
2f48f637
MM		 156 if (res != how_much)
157 {
158 fprintf(stderr, "lspci: Only %d bytes of config space available to you\n", res);
159 exit(1);
160 }
98e39e09
MM		 161 close(fd);
162 }
163}
164
165static void
166scan_proc(void)
167{
168 scan_dev_list();
169 scan_config();
170}
171
172/* Config space accesses */
173
174static inline byte
175get_conf_byte(struct device *d, unsigned int pos)
176{
177 return d->config[pos];
178}
179
180static word
181get_conf_word(struct device *d, unsigned int pos)
182{
183 return d->config[pos] | (d->config[pos+1] << 8);
184}
185
186static u32
187get_conf_long(struct device *d, unsigned int pos)
188{
189 return d->config[pos] |
190 (d->config[pos+1] << 8) |
191 (d->config[pos+2] << 16) |
192 (d->config[pos+3] << 24);
193}
194
195/* Sorting */
196
197static int
198compare_them(const void *A, const void *B)
199{
200 const struct device *a = *(const struct device **)A;
201 const struct device *b = *(const struct device **)B;
202
203 if (a->bus < b->bus)
204 return -1;
205 if (a->bus > b->bus)
206 return 1;
207 if (a->devfn < b->devfn)
208 return -1;
209 if (a->devfn > b->devfn)
210 return 1;
211 return 0;
212}
213
214static void
215sort_them(void)
216{
217 struct device **index, **h;
218 int cnt;
219 struct device *d;
220
221 cnt = 0;
222 for(d=first_dev; d; d=d->next)
223 cnt++;
224 h = index = alloca(sizeof(struct device *) * cnt);
225 for(d=first_dev; d; d=d->next)
226 *h++ = d;
227 qsort(index, cnt, sizeof(struct device *), compare_them);
228 last_dev = &first_dev;
229 h = index;
230 while (cnt--)
231 {
232 *last_dev = *h;
233 last_dev = &(*h)->next;
234 h++;
235 }
236 *last_dev = NULL;
237}
238
6d0dc0fd 239/* Normal output */
98e39e09
MM		 240
241static void
242show_terse(struct device *d)
243{
244 int c;
245
246 printf("%02x:%02x.%x %s: %s",
247 d->bus,
248 PCI_SLOT(d->devfn),
249 PCI_FUNC(d->devfn),
250 lookup_class(get_conf_word(d, PCI_CLASS_DEVICE)),
251 lookup_device_full(d->vendid, d->devid));
252 if (c = get_conf_byte(d, PCI_REVISION_ID))
253 printf(" (rev %02x)", c);
254 if (verbose && (c = get_conf_byte(d, PCI_CLASS_PROG)))
255 printf(" (prog-if %02x)", c);
256 putchar('\n');
257}
258
259static void
260show_bases(struct device *d, int cnt)
261{
262 word cmd = get_conf_word(d, PCI_COMMAND);
263 int i;
264
96e4f295 265 for(i=0; i<cnt; i++)
98e39e09
MM		 266 {
267 unsigned long pos;
268 unsigned int flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
269 if (buscentric_view)
270 pos = flg;
271 else
272 pos = d->kernel_base_addr[i];
273 if (!pos || pos == 0xffffffff)
274 continue;
98e39e09 275 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
f17b962b
MM		 276 {
277 if (cmd & PCI_COMMAND_IO)
a3690506
MM		 278 {
279 if (verbose > 1)
280 printf("\tRegion %d: ", i);
281 else
282 putchar('\t');
283 printf("I/O ports at %04lx\n", pos & PCI_BASE_ADDRESS_IO_MASK);
284 }
f17b962b
MM		 285 }
286 else if (cmd & PCI_COMMAND_MEMORY)
98e39e09
MM		 287 {
288 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
a3690506
MM		 289 if (verbose > 1)
290 printf("\tRegion %d: ", i);
291 else
292 putchar('\t');
98e39e09
MM		 293 printf("Memory at ");
294 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
295 {
296 if (i < cnt - 1)
297 {
298 i++;
299 if (!buscentric_view)
300 printf("%08x", get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i));
301 }
302 else
303 printf("????????");
304 }
f17b962b 305 printf("%08lx (%s, %sprefetchable)\n",
98e39e09
MM		 306 pos & PCI_BASE_ADDRESS_MEM_MASK,
307 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
308 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
309 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M 32-bit" : "???",
f17b962b 310 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
98e39e09
MM		 311 }
312 }
313}
314
315static void
316show_htype0(struct device *d)
317{
b2c9b373 318 unsigned long rom = buscentric_view ? get_conf_long(d, PCI_ROM_ADDRESS) : d->kernel_rom_base_addr;
98e39e09
MM		 319
320 show_bases(d, 6);
321
322 if (rom & 1)
b2c9b373
MM		 323 printf("\tExpansion ROM at %08lx%s\n", rom & PCI_ROM_ADDRESS_MASK,
324 (rom & PCI_ROM_ADDRESS_ENABLE) ? "" : " [disabled]");
98e39e09
MM		 325}
326
327static void
328show_htype1(struct device *d)
329{
330 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
331 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
332 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
333 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
334 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
335 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
336 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
337 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
338 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
b2c9b373 339 unsigned long rom = buscentric_view ? get_conf_long(d, PCI_ROM_ADDRESS) : d->kernel_rom_base_addr;
98e39e09
MM		 340 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
341
342 show_bases(d, 2);
343 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
344 get_conf_byte(d, PCI_PRIMARY_BUS),
345 get_conf_byte(d, PCI_SECONDARY_BUS),
346 get_conf_byte(d, PCI_SUBORDINATE_BUS),
347 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
348
349 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
350 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
351 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
352 else
353 {
354 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
355 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
356 if (io_type == PCI_IO_RANGE_TYPE_32)
357 {
358 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
359 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
360 }
361 if (io_base)
362 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
363 }
364
365 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
366 mem_type)
367 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
368 else if (mem_base)
369 {
370 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
371 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
372 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
373 }
374
375 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
376 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
377 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
378 else if (pref_base)
379 {
380 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
381 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
382 if (pref_type == PCI_PREF_RANGE_TYPE_32)
383 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit);
384 else
385 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
386 get_conf_long(d, PCI_PREF_BASE_UPPER32),
387 pref_base,
388 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
389 pref_limit);
390 }
391
392 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
393 printf("\tSecondary status: SERR\n");
394
395 if (rom & 1)
b2c9b373
MM		 396 printf("\tExpansion ROM at %08lx%s\n", rom & PCI_ROM_ADDRESS_MASK,
397 (rom & PCI_ROM_ADDRESS_ENABLE) ? "" : " [disabled]");
98e39e09
MM		 398
399 if (verbose > 1)
400 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
401 (brc & PCI_BRIDGE_CTL_PARITY) ? '+' : '-',
402 (brc & PCI_BRIDGE_CTL_SERR) ? '+' : '-',
403 (brc & PCI_BRIDGE_CTL_NO_ISA) ? '+' : '-',
404 (brc & PCI_BRIDGE_CTL_VGA) ? '+' : '-',
405 (brc & PCI_BRIDGE_CTL_MASTER_ABORT) ? '+' : '-',
406 (brc & PCI_BRIDGE_CTL_BUS_RESET) ? '+' : '-',
407 (brc & PCI_BRIDGE_CTL_FAST_BACK) ? '+' : '-');
408}
409
2f48f637
MM		 410static void
411show_htype2(struct device *d)
412{
96e4f295
MM		 413 int i;
414 word cmd = get_conf_word(d, PCI_COMMAND);
415 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
416 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
417
418 show_bases(d, 1);
419 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
420 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
421 get_conf_byte(d, PCI_CB_CARD_BUS),
422 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
423 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
424 for(i=0; i<2; i++)
425 {
426 int p = 8*i;
427 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
428 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
429 if (limit > base)
430 printf("Memory window %d: %08x-%08x%s%s\n", i, base, limit,
431 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
432 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
433 }
434 for(i=0; i<2; i++)
435 {
436 int p = 8*i;
437 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
438 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
439 if (!(base & PCI_IO_RANGE_TYPE_32))
440 {
441 base &= 0xffff;
442 limit &= 0xffff;
443 }
444 base &= PCI_CB_IO_RANGE_MASK;
445 if (!base)
446 continue;
447 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
448 printf("I/O window %d: %08x-%08x%s\n", i, base, limit,
449 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
450 }
451
452 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
453 printf("\tSecondary status: SERR\n");
454 if (verbose > 1)
455 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
456 (brc & PCI_CB_BRIDGE_CTL_PARITY) ? '+' : '-',
457 (brc & PCI_CB_BRIDGE_CTL_SERR) ? '+' : '-',
458 (brc & PCI_CB_BRIDGE_CTL_ISA) ? '+' : '-',
459 (brc & PCI_CB_BRIDGE_CTL_VGA) ? '+' : '-',
460 (brc & PCI_CB_BRIDGE_CTL_MASTER_ABORT) ? '+' : '-',
461 (brc & PCI_CB_BRIDGE_CTL_CB_RESET) ? '+' : '-',
462 (brc & PCI_CB_BRIDGE_CTL_16BIT_INT) ? '+' : '-',
463 (brc & PCI_CB_BRIDGE_CTL_POST_WRITES) ? '+' : '-');
464 if (exca)
465 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM		 466}
467
98e39e09
MM		 468static void
469show_verbose(struct device *d)
470{
471 word status = get_conf_word(d, PCI_STATUS);
472 word cmd = get_conf_word(d, PCI_COMMAND);
473 word class = get_conf_word(d, PCI_CLASS_DEVICE);
474 byte bist = get_conf_byte(d, PCI_BIST);
475 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
476 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
477 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
478 byte max_lat, min_gnt;
479 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
480 byte int_line = get_conf_byte(d, PCI_INTERRUPT_LINE);
2f48f637 481 unsigned int irq;
98e39e09
MM		 482 word subsys_v, subsys_d;
483
484 show_terse(d);
485
98e39e09
MM		 486 switch (htype)
487 {
2f48f637
MM		 488 case PCI_HEADER_TYPE_NORMAL:
489 if (class == PCI_CLASS_BRIDGE_PCI)
490 {
491 badhdr:
492 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
493 return;
494 }
98e39e09
MM		 495 max_lat = get_conf_byte(d, PCI_MAX_LAT);
496 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
497 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
498 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
499 break;
2f48f637
MM		 500 case PCI_HEADER_TYPE_BRIDGE:
501 if (class != PCI_CLASS_BRIDGE_PCI)
502 goto badhdr;
503 irq = int_line = int_pin = min_gnt = max_lat = 0;
504 subsys_v = subsys_d = 0;
505 break;
506 case PCI_HEADER_TYPE_CARDBUS:
507 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
508 goto badhdr;
96e4f295
MM		 509 min_gnt = max_lat = 0;
510 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
511 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
98e39e09
MM		 512 break;
513 default:
514 printf("\t!!! Unknown header type %02x\n", htype);
515 return;
516 }
517
518 if (buscentric_view)
519 irq = int_line;
520 else
521 irq = d->kernel_irq;
522
523 if (verbose > 1)
524 {
525 if (subsys_v)
526 printf("\tSubsystem ID: %04x:%04x\n", subsys_v, subsys_d);
527 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
528 (cmd & PCI_COMMAND_IO) ? '+' : '-',
529 (cmd & PCI_COMMAND_MEMORY) ? '+' : '-',
530 (cmd & PCI_COMMAND_MASTER) ? '+' : '-',
531 (cmd & PCI_COMMAND_SPECIAL) ? '+' : '-',
532 (cmd & PCI_COMMAND_INVALIDATE) ? '+' : '-',
533 (cmd & PCI_COMMAND_VGA_PALETTE) ? '+' : '-',
534 (cmd & PCI_COMMAND_PARITY) ? '+' : '-',
535 (cmd & PCI_COMMAND_WAIT) ? '+' : '-',
536 (cmd & PCI_COMMAND_SERR) ? '+' : '-',
537 (cmd & PCI_COMMAND_FAST_BACK) ? '+' : '-');
538 printf("\tStatus: 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
539 (status & PCI_STATUS_66MHZ) ? '+' : '-',
540 (status & PCI_STATUS_UDF) ? '+' : '-',
541 (status & PCI_STATUS_FAST_BACK) ? '+' : '-',
542 (status & PCI_STATUS_PARITY) ? '+' : '-',
543 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
544 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
545 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
546 (status & PCI_STATUS_SIG_TARGET_ABORT) ? '+' : '-',
547 (status & PCI_STATUS_REC_TARGET_ABORT) ? '+' : '-',
548 (status & PCI_STATUS_REC_MASTER_ABORT) ? '+' : '-',
549 (status & PCI_STATUS_SIG_SYSTEM_ERROR) ? '+' : '-',
550 (status & PCI_STATUS_DETECTED_PARITY) ? '+' : '-');
551 if (cmd & PCI_COMMAND_MASTER)
552 {
553 printf("\tLatency: ");
554 if (min_gnt)
555 printf("%d min, ", min_gnt);
556 if (max_lat)
557 printf("%d max, ", max_lat);
558 printf("%d set", latency);
559 if (cache_line)
560 printf(", cache line size %02x", cache_line);
561 putchar('\n');
562 }
563 if (int_pin)
f17b962b 564 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n", 'A' + int_pin - 1, irq);
98e39e09
MM		 565 }
566 else
567 {
568 printf("\tFlags: ");
569 if (cmd & PCI_COMMAND_MASTER)
570 printf("bus master, ");
571 if (cmd & PCI_COMMAND_VGA_PALETTE)
572 printf("VGA palette snoop, ");
573 if (cmd & PCI_COMMAND_WAIT)
574 printf("stepping, ");
575 if (cmd & PCI_COMMAND_FAST_BACK)
576 printf("fast Back2Back, ");
577 if (status & PCI_STATUS_66MHZ)
578 printf("66Mhz, ");
579 if (status & PCI_STATUS_UDF)
580 printf("user-definable features, ");
581 printf("%s devsel",
582 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
583 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
584 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
585 if (cmd & PCI_COMMAND_MASTER)
586 printf(", latency %d", latency);
587 if (int_pin)
588 if (d->kernel_irq)
f17b962b 589 printf(", IRQ " IRQ_FORMAT, irq);
98e39e09
MM		 590 else
591 printf(", IRQ ?");
592 putchar('\n');
593 }
594
595 if (bist & PCI_BIST_CAPABLE)
596 {
597 if (bist & PCI_BIST_START)
598 printf("\tBIST is running\n");
599 else
600 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
601 }
602
603 switch (htype)
604 {
2f48f637 605 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM		 606 show_htype0(d);
607 break;
2f48f637 608 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM		 609 show_htype1(d);
610 break;
2f48f637
MM		 611 case PCI_HEADER_TYPE_CARDBUS:
612 show_htype2(d);
613 break;
98e39e09
MM		 614 }
615}
616
617static void
618show_hex_dump(struct device *d)
619{
620 int i;
621 int limit = (show_hex > 1) ? 256 : 64;
622
623 for(i=0; i<limit; i++)
624 {
625 if (! (i & 15))
626 printf("%02x:", i);
627 printf(" %02x", get_conf_byte(d, i));
628 if ((i & 15) == 15)
629 putchar('\n');
630 }
631}
632
0a33d0ec
MM		 633static void
634show_machine(struct device *d)
635{
636 int c;
637
638 if (verbose)
639 {
640 printf("Device:\t%02x:%02x.%x\n", d->bus, PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
641 printf("Class:\t%s\n", lookup_class(get_conf_word(d, PCI_CLASS_DEVICE)));
642 printf("Vendor:\t%s\n", lookup_vendor(d->vendid));
643 printf("Device:\t%s\n", lookup_device(d->vendid, d->devid));
644 if (c = get_conf_byte(d, PCI_REVISION_ID))
645 printf("Rev:\t%02x\n", c);
646 if (c = get_conf_byte(d, PCI_CLASS_PROG))
647 printf("ProgIf:\t%02x\n", c);
648 }
649 else
650 {
651 printf("%02x:%02x.%x ", d->bus, PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
652 printf("\"%s\" \"%s\" \"%s\"",
653 lookup_class(get_conf_word(d, PCI_CLASS_DEVICE)),
654 lookup_vendor(d->vendid),
655 lookup_device(d->vendid, d->devid));
656 if (c = get_conf_byte(d, PCI_REVISION_ID))
657 printf(" -r%02x", c);
658 if (c = get_conf_byte(d, PCI_CLASS_PROG))
659 printf(" -p%02x", c);
660 putchar('\n');
661 }
662}
663
98e39e09
MM		 664static void
665show(void)
666{
667 struct device *d;
668
669 for(d=first_dev; d; d=d->next)
670 {
0a33d0ec
MM		 671 if (machine_readable)
672 show_machine(d);
673 else if (verbose)
98e39e09
MM		 674 show_verbose(d);
675 else
676 show_terse(d);
677 if (show_hex)
678 show_hex_dump(d);
679 if (verbose || show_hex)
680 putchar('\n');
681 }
682}
683
6d0dc0fd
MM		 684/* Tree output */
685
686struct bridge {
687 struct bridge *chain; /* Single-linked list of bridges */
688 struct bridge *next, *child; /* Tree of bridges */
689 struct bus *first_bus; /* List of busses connected to this bridge */
690 unsigned int primary, secondary, subordinate; /* Bus numbers */
691 struct device *br_dev;
692};
693
694struct bus {
695 unsigned int number;
696 struct bus *sibling;
697 struct device *first_dev, **last_dev;
698};
699
700static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
701
702static struct bus *
703find_bus(struct bridge *b, unsigned int n)
704{
705 struct bus *bus;
706
707 for(bus=b->first_bus; bus; bus=bus->sibling)
708 if (bus->number == n)
709 break;
710 return bus;
711}
712
713static struct bus *
714new_bus(struct bridge *b, unsigned int n)
715{
716 struct bus *bus = xmalloc(sizeof(struct bus));
717
718 bus = xmalloc(sizeof(struct bus));
719 bus->number = n;
720 bus->sibling = b->first_bus;
721 bus->first_dev = NULL;
722 bus->last_dev = &bus->first_dev;
723 b->first_bus = bus;
724 return bus;
725}
726
727static void
728insert_dev(struct device *d, struct bridge *b)
729{
730 struct bus *bus;
731
732 if (! (bus = find_bus(b, d->bus)))
733 {
734 struct bridge *c;
735 for(c=b->child; c; c=c->next)
736 if (c->secondary <= d->bus && d->bus <= c->subordinate)
737 return insert_dev(d, c);
738 bus = new_bus(b, d->bus);
739 }
740 /* Simple insertion at the end _does_ guarantee the correct order as the
741 * original device list was sorted by (bus, devfn) lexicographically
742 * and all devices on the new list have the same bus number.
743 */
744 *bus->last_dev = d;
745 bus->last_dev = &d->next;
746 d->next = NULL;
747}
748
749static void
750grow_tree(void)
751{
752 struct device *d, *d2;
008407bd 753 struct bridge **last_br, *b;
6d0dc0fd
MM		 754
755 /* Build list of bridges */
756
008407bd 757 last_br = &host_bridge.chain;
6d0dc0fd
MM		 758 for(d=first_dev; d; d=d->next)
759 {
760 word class = get_conf_word(d, PCI_CLASS_DEVICE);
96e4f295
MM		 761 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
762 if (class == PCI_CLASS_BRIDGE_PCI &&
763 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
6d0dc0fd
MM		 764 {
765 b = xmalloc(sizeof(struct bridge));
96e4f295
MM		 766 if (ht == PCI_HEADER_TYPE_BRIDGE)
767 {
768 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
769 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
770 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
771 }
772 else
773 {
774 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
775 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
776 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
777 }
008407bd
MM		 778 *last_br = b;
779 last_br = &b->chain;
6d0dc0fd
MM		 780 b->next = b->child = NULL;
781 b->first_bus = NULL;
782 b->br_dev = d;
783 }
784 }
008407bd 785 *last_br = NULL;
6d0dc0fd
MM		 786
787 /* Create a bridge tree */
788
008407bd 789 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 790 {
791 struct bridge *c, *best;
792 best = NULL;
008407bd 793 for(c=&host_bridge; c; c=c->chain)
6d0dc0fd
MM		 794 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
795 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
796 best = c;
797 if (best)
798 {
799 b->next = best->child;
800 best->child = b;
801 }
802 }
803
804 /* Insert secondary bus for each bridge */
805
008407bd 806 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 807 if (!find_bus(b, b->secondary))
808 new_bus(b, b->secondary);
809
810 /* Create bus structs and link devices */
811
812 for(d=first_dev; d;)
813 {
814 d2 = d->next;
815 insert_dev(d, &host_bridge);
816 d = d2;
817 }
818}
819
820static void
821print_it(byte *line, byte *p)
822{
823 *p++ = '\n';
824 *p = 0;
825 fputs(line, stdout);
826 for(p=line; *p; p++)
008407bd 827 if (*p == '+' || *p == '|')
6d0dc0fd
MM		 828 *p = '|';
829 else
830 *p = ' ';
831}
832
833static void show_tree_bridge(struct bridge *, byte *, byte *);
834
835static void
836show_tree_dev(struct device *d, byte *line, byte *p)
837{
838 struct bridge *b;
839
840 p += sprintf(p, "%02x.%x", PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
841 for(b=&host_bridge; b; b=b->chain)
842 if (b->br_dev == d)
843 {
008407bd
MM		 844 if (b->secondary == b->subordinate)
845 p += sprintf(p, "-[%02x]-", b->secondary);
846 else
847 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
6d0dc0fd
MM		 848 show_tree_bridge(b, line, p);
849 return;
850 }
18928b91
MM		 851 if (verbose)
852 p += sprintf(p, " %s", lookup_device_full(d->vendid, d->devid));
6d0dc0fd
MM		 853 print_it(line, p);
854}
855
856static void
857show_tree_bus(struct bus *b, byte *line, byte *p)
858{
859 if (!b->first_dev)
860 print_it(line, p);
861 else if (!b->first_dev->next)
862 {
863 *p++ = '-';
864 *p++ = '-';
865 show_tree_dev(b->first_dev, line, p);
866 }
867 else
868 {
869 struct device *d = b->first_dev;
870 while (d->next)
871 {
872 p[0] = '+';
873 p[1] = '-';
874 show_tree_dev(d, line, p+2);
875 d = d->next;
876 }
877 p[0] = '\\';
878 p[1] = '-';
879 show_tree_dev(d, line, p+2);
880 }
881}
882
883static void
884show_tree_bridge(struct bridge *b, byte *line, byte *p)
885{
886 *p++ = '-';
887 if (!b->first_bus->sibling)
888 {
889 if (b == &host_bridge)
890 p += sprintf(p, "[%02x]-", b->first_bus->number);
891 show_tree_bus(b->first_bus, line, p);
892 }
893 else
894 {
895 struct bus *u = b->first_bus;
896 byte *k;
897
898 while (u->sibling)
899 {
900 k = p + sprintf(p, "+-[%02x]-", u->number);
901 show_tree_bus(u, line, k);
902 u = u->sibling;
903 }
904 k = p + sprintf(p, "\\-[%02x]-", u->number);
905 show_tree_bus(u, line, k);
906 }
907}
908
909static void
910show_forest(void)
911{
912 char line[256];
913
914 grow_tree();
915 show_tree_bridge(&host_bridge, line, line);
916}
917
98e39e09
MM		 918/* Main */
919
920int
921main(int argc, char **argv)
922{
923 int i;
e4842ff3 924 char *msg;
98e39e09 925
496d4021
MM		 926 if (argc == 2 && !strcmp(argv[1], "--version"))
927 {
928 puts("lspci version " PCIUTILS_VERSION);
929 return 0;
930 }
e4842ff3 931 filter_init(&filter);
98e39e09
MM		 932 while ((i = getopt(argc, argv, options)) != -1)
933 switch (i)
934 {
935 case 'n':
936 show_numeric_ids = 1;
937 break;
938 case 'v':
939 verbose++;
940 break;
941 case 'b':
942 buscentric_view = 1;
943 break;
e4842ff3
MM		 944 case 's':
945 if (msg = filter_parse_slot(&filter, optarg))
946 {
947 fprintf(stderr, "lspci: -f: %s\n", msg);
948 return 1;
949 }
98e39e09 950 break;
e4842ff3
MM		 951 case 'd':
952 if (msg = filter_parse_id(&filter, optarg))
953 {
954 fprintf(stderr, "lspci: -d: %s\n", msg);
955 return 1;
956 }
98e39e09
MM		 957 break;
958 case 'x':
959 show_hex++;
960 break;
6d0dc0fd
MM		 961 case 't':
962 show_tree++;
963 break;
18928b91
MM		 964 case 'i':
965 pci_ids = optarg;
966 break;
967 case 'p':
968 pci_dir = optarg;
969 break;
0a33d0ec
MM		 970 case 'm':
971 machine_readable++;
972 break;
98e39e09
MM		 973 default:
974 bad:
975 fprintf(stderr, help_msg);
976 return 1;
977 }
978 if (optind < argc)
979 goto bad;
980
981 scan_proc();
982 sort_them();
6d0dc0fd
MM		 983 if (show_tree)
984 show_forest();
985 else
986 show();
98e39e09
MM		 987
988 return 0;
989}
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