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d24596d5 1.\" Copyright (c) International Business Machines Corp., 2006
f9f7c042 2.\"
e4a74ca8 3.\" SPDX-License-Identifier: GPL-2.0-or-later
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4.\"
5.\" HISTORY:
6.\" 2005-09-28, created by Arnd Bergmann <arndb@de.ibm.com>
7.\" 2006-06-16, revised by Eduardo M. Fleury <efleury@br.ibm.com>
8.\" 2007-07-10, some polishing by mtk
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9.\" 2007-09-28, updates for newer kernels, added example
10.\" by Jeremy Kerr <jk@ozlabs.org>
f9f7c042 11.\"
1d767b55 12.TH SPU_RUN 2 2021-03-22 Linux "Linux Programmer's Manual"
f9f7c042 13.SH NAME
763f0e47 14spu_run \- execute an SPU context
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15.SH LIBRARY
16Standard C library
8fc3b2cf 17.RI ( libc ", " \-lc )
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18.SH SYNOPSIS
19.nf
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20.BR "#include <sys/spu.h>" " /* Definition of " SPU_* " constants */"
21.BR "#include <sys/syscall.h>" " /* Definition of " SYS_* " constants */"
22.B #include <unistd.h>
dbfe9c70 23.PP
beb7a3c1 24.BI "int spu_run(int " fd ", uint32_t *" npc ", uint32_t *" event );
f9f7c042 25.fi
dbfe9c70 26.PP
45c99e3e 27.IR Note :
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28glibc provides no wrapper for
29.BR spu_run (),
30necessitating the use of
31.BR syscall (2).
f9f7c042 32.SH DESCRIPTION
e0bf9127 33The
f9f7c042 34.BR spu_run ()
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35system call is used on PowerPC machines that implement the
36Cell Broadband Engine Architecture in order to access Synergistic
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37Processor Units (SPUs).
38The
39.I fd
e0bf9127 40argument is a file descriptor returned by
f9f7c042 41.BR spu_create (2)
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42that refers to a specific SPU context.
43When the context gets scheduled to a physical SPU,
44it starts execution at the instruction pointer passed in
f9f7c042 45.IR npc .
efeece04 46.PP
e0bf9127 47Execution of SPU code happens synchronously, meaning that
f9f7c042 48.BR spu_run ()
d24596d5 49blocks while the SPU is still running.
f9f7c042 50If there is a need
e0bf9127 51to execute SPU code in parallel with other code on either the
f9f7c042 52main CPU or other SPUs, a new thread of execution must be created
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53first (e.g., using
54.BR pthread_create (3)).
efeece04 55.PP
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56When
57.BR spu_run ()
d24596d5 58returns, the current value of the SPU program counter is written to
f9f7c042 59.IR npc ,
d24596d5 60so successive calls to
f9f7c042 61.BR spu_run ()
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62can use the same
63.I npc
64pointer.
efeece04 65.PP
d24596d5 66The
f9f7c042 67.I event
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68argument provides a buffer for an extended status code.
69If the SPU
70context was created with the
71.B SPU_CREATE_EVENTS_ENABLED
72flag, then this buffer is populated by the Linux kernel before
f9f7c042 73.BR spu_run ()
d24596d5 74returns.
efeece04 75.PP
d24596d5 76The status code may be one (or more) of the following constants:
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77.TP
78.B SPE_EVENT_DMA_ALIGNMENT
d24596d5 79A DMA alignment error occurred.
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80.TP
81.B SPE_EVENT_INVALID_DMA
d24596d5 82An invalid MFC DMA command was attempted.
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83.\" SPE_EVENT_SPE_DATA_SEGMENT is defined, but does not seem to be generated
84.\" at any point (in Linux 5.9 sources).
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85.TP
86.B SPE_EVENT_SPE_DATA_STORAGE
d24596d5 87A DMA storage error occurred.
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88.TP
89.B SPE_EVENT_SPE_ERROR
d24596d5 90An illegal instruction was executed.
f9f7c042 91.PP
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92NULL
93is a valid value for the
f9f7c042 94.I event
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95argument.
96In this case, the events will not be reported to the calling process.
f9f7c042 97.SH RETURN VALUE
d24596d5 98On success,
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99.BR spu_run ()
100returns the value of the
101.I spu_status
102register.
7a6227d3 103On failure, it returns \-1 and sets
f9f7c042 104.I errno
7a6227d3 105is set to indicate the error.
efeece04 106.PP
e0bf9127 107The
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108.I spu_status
109register value is a bit mask of status codes and
d24596d5 110optionally a 14-bit code returned from the
1ae6b2c7 111.B stop-and-signal
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112instruction on the SPU.
113The bit masks for the status codes
114are:
115.TP
116.B 0x02
d24596d5 117SPU was stopped by a
1ae6b2c7 118.B stop-and-signal
d24596d5 119instruction.
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120.TP
121.B 0x04
d24596d5 122SPU was stopped by a
1ae6b2c7 123.B halt
d24596d5 124instruction.
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125.TP
126.B 0x08
127SPU is waiting for a channel.
128.TP
129.B 0x10
130SPU is in single-step mode.
131.TP
132.B 0x20
133SPU has tried to execute an invalid instruction.
134.TP
135.B 0x40
136SPU has tried to access an invalid channel.
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137.TP
138.B 0x3fff0000
139The bits masked with this value contain the code returned from a
1ae6b2c7 140.B stop-and-signal
d24596d5 141instruction.
33a0ccb2 142These bits are valid only if the 0x02 bit is set.
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143.PP
144If
145.BR spu_run ()
146has not returned an error, one or more bits among the lower eight
147ones are always set.
148.SH ERRORS
149.TP
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150.B EBADF
151.I fd
152is not a valid file descriptor.
153.TP
154.B EFAULT
155.I npc
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156is not a valid pointer, or
157.I event
158is non-NULL and an invalid pointer.
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159.TP
160.B EINTR
161A signal occurred while
162.BR spu_run ()
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163was in progress; see
164.BR signal (7).
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165The
166.I npc
167value has been updated to the new program counter value if
168necessary.
169.TP
170.B EINVAL
171.I fd
d24596d5 172is not a valid file descriptor returned from
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173.BR spu_create (2).
174.TP
175.B ENOMEM
176There was not enough memory available to handle a page fault
177resulting from a Memory Flow Controller (MFC) direct memory access.
178.TP
179.B ENOSYS
180The functionality is not provided by the current system, because
181either the hardware does not provide SPUs or the spufs module is not
182loaded.
183.SH VERSIONS
184The
2777b1ca 185.BR spu_run ()
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186system call was added to Linux in kernel 2.6.16.
187.SH CONFORMING TO
33a0ccb2 188This call is Linux-specific and implemented only by the PowerPC
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189architecture.
190Programs using this system call are not portable.
191.SH NOTES
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192.BR spu_run ()
193is meant to be used from libraries that implement a more abstract
194interface to SPUs, not to be used from regular applications.
e0bf9127 195See
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196.UR http://www.bsc.es\:/projects\:/deepcomputing\:/linuxoncell/
197.UE
f9f7c042 198for the recommended libraries.
a14af333 199.SH EXAMPLES
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200The following is an example of running a simple, one-instruction SPU
201program with the
202.BR spu_run ()
203system call.
efeece04 204.PP
408731d4 205.EX
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206#include <stdlib.h>
207#include <stdint.h>
208#include <unistd.h>
209#include <stdio.h>
210#include <sys/types.h>
211#include <fcntl.h>
212
d1a71985 213#define handle_error(msg) \e
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214 do { perror(msg); exit(EXIT_FAILURE); } while (0)
215
216int main(void)
217{
218 int context, fd, spu_status;
219 uint32_t instruction, npc;
220
221 context = spu_create("/spu/example\-context", 0, 0755);
c3074d70 222 if (context == \-1)
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223 handle_error("spu_create");
224
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225 /*
226 * Write a \(aqstop 0x1234\(aq instruction to the SPU\(aqs
227 * local store memory.
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228 */
229 instruction = 0x00001234;
230
231 fd = open("/spu/example\-context/mem", O_RDWR);
c3074d70 232 if (fd == \-1)
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233 handle_error("open");
234 write(fd, &instruction, sizeof(instruction));
235
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236 /*
237 * set npc to the starting instruction address of the
d24596d5 238 * SPU program. Since we wrote the instruction at the
d5d83905 239 * start of the mem file, the entry point will be 0x0.
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240 */
241 npc = 0;
242
243 spu_status = spu_run(context, &npc, NULL);
c3074d70 244 if (spu_status == \-1)
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245 handle_error("open");
246
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247 /*
248 * We should see a status code of 0x1234002:
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249 * 0x00000002 (spu was stopped due to stop\-and\-signal)
250 * | 0x12340000 (the stop\-and\-signal code)
251 */
dc97703b 252 printf("SPU Status: %#08x\en", spu_status);
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253
254 exit(EXIT_SUCCESS);
255}
408731d4 256.EE
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257.\" .SH AUTHORS
258.\" Arnd Bergmann <arndb@de.ibm.com>, Jeremy Kerr <jk@ozlabs.org>
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259.SH SEE ALSO
260.BR close (2),
261.BR spu_create (2),
d24596d5 262.BR capabilities (7),
f9f7c042 263.BR spufs (7)