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daad8dcd | 1 | .\" Copyright (c) 2009 Intel Corporation, Author Andi Kleen |
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2 | .\" Some sentences copied from comments in arch/x86/kernel/msr.c |
3 | .\" | |
93015253 | 4 | .\" %%%LICENSE_START(VERBATIM) |
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5 | .\" Permission is granted to make and distribute verbatim copies of this |
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9 | .\" Permission is granted to copy and distribute modified versions of this | |
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14 | .\" Since the Linux kernel and libraries are constantly changing, this | |
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23 | .\" the source, must acknowledge the copyright and authors of this work. | |
4b72fb64 | 24 | .\" %%%LICENSE_END |
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25 | .\" |
26 | .TH MSR 4 2009-03-31 "Linux" "Linux Programmer's Manual" | |
27 | .SH NAME | |
28 | msr \- x86 CPU MSR access device | |
29 | .SH DESCRIPTION | |
30 | .I /dev/cpu/CPUNUM/msr | |
31 | provides an interface to read and write the model-specific | |
32 | registers (MSRs) of an x86 CPU. | |
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33 | .I CPUNUM |
34 | is the number of the CPU to access as listed in | |
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35 | .IR /proc/cpuinfo . |
36 | ||
37 | The register access is done by opening the file and seeking | |
38 | to the MSR number as offset in the file, and then | |
39 | reading or writing in chunks of 8 bytes. | |
40 | An I/O transfer of more than 8 bytes means multiple reads or writes | |
41 | of the same register. | |
42 | ||
33a0ccb2 | 43 | This file is protected so that it can be read and written only by the user |
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44 | .IR root , |
45 | or members of the group | |
46 | .IR root . | |
47 | .SH NOTES | |
7c63ca6c | 48 | The |
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49 | .I msr |
50 | driver is not auto-loaded. | |
51 | On modular kernels you might need to use the following command | |
52 | to load it explicitly before use: | |
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53 | .PP |
54 | .in +4n | |
55 | .EX | |
56 | $ \fImodprobe msr\fP | |
57 | .EE | |
58 | .in | |
59 | .PP | |
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60 | .SH SEE ALSO |
61 | Intel Corporation Intel 64 and IA-32 Architectures | |
173fe7e7 | 62 | Software Developer's Manual Volume 3B Appendix B, |
027ac74c | 63 | for an overview of the Intel CPU MSRs. |