]> git.ipfire.org Git - people/ms/u-boot.git/blame - post/tests.c
Merge branch 'master' of http://www.denx.de/git/u-boot
[people/ms/u-boot.git] / post / tests.c
CommitLineData
324f6cfd
WD
1/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
228f29ac
WD
22 *
23 * Be sure to mark tests to be run before relocation as such with the
24 * CFG_POST_PREREL flag so that logging is done correctly if the
25 * logbuffer support is enabled.
324f6cfd
WD
26 */
27
28#include <common.h>
29
30#ifdef CONFIG_POST
31
32#include <post.h>
33
34extern int cache_post_test (int flags);
35extern int watchdog_post_test (int flags);
36extern int i2c_post_test (int flags);
37extern int rtc_post_test (int flags);
38extern int memory_post_test (int flags);
39extern int cpu_post_test (int flags);
40extern int uart_post_test (int flags);
41extern int ether_post_test (int flags);
42extern int spi_post_test (int flags);
43extern int usb_post_test (int flags);
44extern int spr_post_test (int flags);
4532cb69 45extern int sysmon_post_test (int flags);
5a8c51cd 46extern int dsp_post_test (int flags);
79fa88f3 47extern int codec_post_test (int flags);
4532cb69
WD
48
49extern int sysmon_init_f (void);
50
51extern void sysmon_reloc (void);
52
324f6cfd
WD
53
54struct post_test post_list[] =
55{
56#if CONFIG_POST & CFG_POST_CACHE
57 {
8bde7f77
WD
58 "Cache test",
59 "cache",
60 "This test verifies the CPU cache operation.",
61 POST_RAM | POST_ALWAYS,
62 &cache_post_test,
63 NULL,
64 NULL,
228f29ac 65 CFG_POST_CACHE
324f6cfd
WD
66 },
67#endif
68#if CONFIG_POST & CFG_POST_WATCHDOG
69 {
8bde7f77
WD
70 "Watchdog timer test",
71 "watchdog",
72 "This test checks the watchdog timer.",
8564acf9 73 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
8bde7f77
WD
74 &watchdog_post_test,
75 NULL,
76 NULL,
228f29ac 77 CFG_POST_WATCHDOG
324f6cfd
WD
78 },
79#endif
80#if CONFIG_POST & CFG_POST_I2C
81 {
8bde7f77
WD
82 "I2C test",
83 "i2c",
84 "This test verifies the I2C operation.",
85 POST_RAM | POST_ALWAYS,
86 &i2c_post_test,
87 NULL,
88 NULL,
228f29ac 89 CFG_POST_I2C
324f6cfd
WD
90 },
91#endif
92#if CONFIG_POST & CFG_POST_RTC
93 {
8bde7f77
WD
94 "RTC test",
95 "rtc",
96 "This test verifies the RTC operation.",
8564acf9 97 POST_RAM | POST_SLOWTEST | POST_MANUAL,
8bde7f77
WD
98 &rtc_post_test,
99 NULL,
100 NULL,
228f29ac 101 CFG_POST_RTC
324f6cfd
WD
102 },
103#endif
104#if CONFIG_POST & CFG_POST_MEMORY
105 {
8bde7f77
WD
106 "Memory test",
107 "memory",
108 "This test checks RAM.",
8564acf9 109 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
8bde7f77
WD
110 &memory_post_test,
111 NULL,
112 NULL,
228f29ac 113 CFG_POST_MEMORY
324f6cfd
WD
114 },
115#endif
116#if CONFIG_POST & CFG_POST_CPU
117 {
8bde7f77
WD
118 "CPU test",
119 "cpu",
120 "This test verifies the arithmetic logic unit of"
121 " CPU.",
122 POST_RAM | POST_ALWAYS,
123 &cpu_post_test,
124 NULL,
125 NULL,
228f29ac 126 CFG_POST_CPU
324f6cfd
WD
127 },
128#endif
129#if CONFIG_POST & CFG_POST_UART
130 {
8bde7f77
WD
131 "UART test",
132 "uart",
133 "This test verifies the UART operation.",
8564acf9 134 POST_RAM | POST_SLOWTEST | POST_MANUAL,
8bde7f77
WD
135 &uart_post_test,
136 NULL,
137 NULL,
228f29ac 138 CFG_POST_UART
324f6cfd
WD
139 },
140#endif
141#if CONFIG_POST & CFG_POST_ETHER
142 {
8bde7f77
WD
143 "ETHERNET test",
144 "ethernet",
145 "This test verifies the ETHERNET operation.",
146 POST_RAM | POST_ALWAYS | POST_MANUAL,
147 &ether_post_test,
148 NULL,
149 NULL,
228f29ac 150 CFG_POST_ETHER
324f6cfd
WD
151 },
152#endif
153#if CONFIG_POST & CFG_POST_SPI
154 {
8bde7f77
WD
155 "SPI test",
156 "spi",
157 "This test verifies the SPI operation.",
158 POST_RAM | POST_ALWAYS | POST_MANUAL,
159 &spi_post_test,
160 NULL,
161 NULL,
228f29ac 162 CFG_POST_SPI
324f6cfd
WD
163 },
164#endif
165#if CONFIG_POST & CFG_POST_USB
166 {
8bde7f77
WD
167 "USB test",
168 "usb",
169 "This test verifies the USB operation.",
170 POST_RAM | POST_ALWAYS | POST_MANUAL,
171 &usb_post_test,
172 NULL,
173 NULL,
228f29ac 174 CFG_POST_USB
324f6cfd
WD
175 },
176#endif
177#if CONFIG_POST & CFG_POST_SPR
178 {
8bde7f77
WD
179 "SPR test",
180 "spr",
181 "This test checks SPR contents.",
182 POST_ROM | POST_ALWAYS | POST_PREREL,
183 &spr_post_test,
184 NULL,
185 NULL,
228f29ac 186 CFG_POST_SPR
324f6cfd
WD
187 },
188#endif
4532cb69
WD
189#if CONFIG_POST & CFG_POST_SYSMON
190 {
8bde7f77
WD
191 "SYSMON test",
192 "sysmon",
193 "This test monitors system hardware.",
194 POST_RAM | POST_ALWAYS,
195 &sysmon_post_test,
196 &sysmon_init_f,
197 &sysmon_reloc,
4532cb69
WD
198 CFG_POST_SYSMON
199 },
200#endif
5a8c51cd
WD
201#if CONFIG_POST & CFG_POST_DSP
202 {
203 "DSP test",
204 "dsp",
205 "This test checks any connected DSP(s).",
206 POST_RAM | POST_MANUAL,
207 &dsp_post_test,
208 NULL,
209 NULL,
210 CFG_POST_DSP
211 },
212#endif
79fa88f3
WD
213#if CONFIG_POST & CFG_POST_DSP
214 {
215 "CODEC test",
216 "codec",
217 "This test checks any connected codec(s).",
218 POST_RAM | POST_MANUAL,
219 &codec_post_test,
220 NULL,
221 NULL,
222 CFG_POST_CODEC
223 },
224#endif
324f6cfd
WD
225};
226
227unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
228
229#endif /* CONFIG_POST */