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2b778ceb | 1 | /* Copyright (C) 1997-2021 Free Software Foundation, Inc. |
21bc60d2 UD |
2 | This file is part of the GNU C Library. |
3 | ||
4 | The GNU C Library is free software; you can redistribute it and/or | |
3214b89b AJ |
5 | modify it under the terms of the GNU Lesser General Public |
6 | License as published by the Free Software Foundation; either | |
7 | version 2.1 of the License, or (at your option) any later version. | |
21bc60d2 UD |
8 | |
9 | The GNU C Library is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
3214b89b | 12 | Lesser General Public License for more details. |
21bc60d2 | 13 | |
3214b89b | 14 | You should have received a copy of the GNU Lesser General Public |
ab84e3ff | 15 | License along with the GNU C Library. If not, see |
5a82c748 | 16 | <https://www.gnu.org/licenses/>. */ |
21bc60d2 UD |
17 | |
18 | #ifndef _FENV_H | |
90571408 | 19 | # error "Never use <bits/fenv.h> directly; include <fenv.h> instead." |
21bc60d2 UD |
20 | #endif |
21 | ||
22 | ||
ccc9035a JM |
23 | #if defined __HAVE_68881__ || defined __HAVE_FPU__ || defined __mcffpu__ |
24 | ||
21bc60d2 UD |
25 | /* Define bits representing the exception. We use the bit positions of |
26 | the appropriate bits in the FPSR Accrued Exception Byte. */ | |
27 | enum | |
28 | { | |
fbeafede | 29 | FE_INEXACT = |
ccc9035a | 30 | # define FE_INEXACT (1 << 3) |
fbeafede JM |
31 | FE_INEXACT, |
32 | FE_DIVBYZERO = | |
ccc9035a | 33 | # define FE_DIVBYZERO (1 << 4) |
fbeafede JM |
34 | FE_DIVBYZERO, |
35 | FE_UNDERFLOW = | |
ccc9035a | 36 | # define FE_UNDERFLOW (1 << 5) |
fbeafede JM |
37 | FE_UNDERFLOW, |
38 | FE_OVERFLOW = | |
ccc9035a | 39 | # define FE_OVERFLOW (1 << 6) |
fbeafede JM |
40 | FE_OVERFLOW, |
41 | FE_INVALID = | |
ccc9035a | 42 | # define FE_INVALID (1 << 7) |
fbeafede | 43 | FE_INVALID |
21bc60d2 UD |
44 | }; |
45 | ||
ccc9035a | 46 | # define FE_ALL_EXCEPT \ |
21bc60d2 UD |
47 | (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID) |
48 | ||
49 | /* The m68k FPU supports all of the four defined rounding modes. We use | |
50 | the bit positions in the FPCR Mode Control Byte as the values for the | |
51 | appropriate macros. */ | |
52 | enum | |
53 | { | |
fbeafede | 54 | FE_TONEAREST = |
ccc9035a | 55 | # define FE_TONEAREST 0 |
fbeafede JM |
56 | FE_TONEAREST, |
57 | FE_TOWARDZERO = | |
ccc9035a | 58 | # define FE_TOWARDZERO (1 << 4) |
fbeafede JM |
59 | FE_TOWARDZERO, |
60 | FE_DOWNWARD = | |
ccc9035a | 61 | # define FE_DOWNWARD (2 << 4) |
fbeafede JM |
62 | FE_DOWNWARD, |
63 | FE_UPWARD = | |
ccc9035a | 64 | # define FE_UPWARD (3 << 4) |
fbeafede | 65 | FE_UPWARD |
21bc60d2 UD |
66 | }; |
67 | ||
ccc9035a JM |
68 | #else |
69 | ||
70 | /* In the soft-float case, only rounding to nearest is supported, with | |
71 | no exceptions. */ | |
72 | ||
73 | # define FE_ALL_EXCEPT 0 | |
74 | ||
75 | enum | |
76 | { | |
77 | __FE_UNDEFINED = -1, | |
78 | ||
79 | FE_TONEAREST = | |
80 | # define FE_TONEAREST 0 | |
81 | FE_TONEAREST | |
82 | }; | |
83 | ||
84 | #endif | |
85 | ||
21bc60d2 UD |
86 | |
87 | /* Type representing exception flags. */ | |
88 | typedef unsigned int fexcept_t; | |
89 | ||
90 | ||
ccc9035a JM |
91 | #if defined __HAVE_68881__ || defined __HAVE_FPU__ || defined __mcffpu__ |
92 | ||
21bc60d2 UD |
93 | /* Type representing floating-point environment. This structure |
94 | corresponds to the layout of the block written by `fmovem'. */ | |
95 | typedef struct | |
96 | { | |
303e5382 AS |
97 | unsigned int __control_register; |
98 | unsigned int __status_register; | |
99 | unsigned int __instruction_address; | |
21bc60d2 UD |
100 | } |
101 | fenv_t; | |
102 | ||
ccc9035a JM |
103 | #else |
104 | ||
105 | /* Keep ABI compatibility with the type used in the generic | |
106 | bits/fenv.h, formerly used for no-FPU ColdFire. */ | |
107 | typedef struct | |
108 | { | |
109 | fexcept_t __excepts; | |
110 | } | |
111 | fenv_t; | |
112 | ||
113 | #endif | |
114 | ||
21bc60d2 | 115 | /* If the default argument is used we use this value. */ |
ae9df5c8 | 116 | #define FE_DFL_ENV ((const fenv_t *) -1) |
21bc60d2 | 117 | |
ccc9035a JM |
118 | #if defined __USE_GNU && (defined __HAVE_68881__ \ |
119 | || defined __HAVE_FPU__ \ | |
120 | || defined __mcffpu__) | |
21bc60d2 | 121 | /* Floating-point environment where none of the exceptions are masked. */ |
ae9df5c8 | 122 | # define FE_NOMASK_ENV ((const fenv_t *) -2) |
21bc60d2 | 123 | #endif |
ec94343f | 124 | |
0175c9e9 | 125 | #if __GLIBC_USE (IEC_60559_BFP_EXT_C2X) |
ec94343f JM |
126 | /* Type representing floating-point control modes. */ |
127 | typedef unsigned int femode_t; | |
128 | ||
129 | /* Default floating-point control modes. */ | |
130 | # define FE_DFL_MODE ((const femode_t *) -1L) | |
131 | #endif |