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bcb5cee0 UD |
1 | /* MIPS __mpn_mul_1 -- Multiply a limb vector with a single limb and |
2 | store the product in a second limb vector. | |
3 | ||
6d7e8eda | 4 | Copyright (C) 1995-2023 Free Software Foundation, Inc. |
bcb5cee0 UD |
5 | |
6 | This file is part of the GNU MP Library. | |
7 | ||
8 | The GNU MP Library is free software; you can redistribute it and/or modify | |
f01ec467 AJ |
9 | it under the terms of the GNU Lesser General Public License as published by |
10 | the Free Software Foundation; either version 2.1 of the License, or (at your | |
bcb5cee0 UD |
11 | option) any later version. |
12 | ||
13 | The GNU MP Library is distributed in the hope that it will be useful, but | |
14 | WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
f01ec467 | 15 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public |
bcb5cee0 UD |
16 | License for more details. |
17 | ||
f01ec467 | 18 | You should have received a copy of the GNU Lesser General Public License |
ab84e3ff | 19 | along with the GNU MP Library. If not, see |
5a82c748 | 20 | <https://www.gnu.org/licenses/>. */ |
bcb5cee0 UD |
21 | |
22 | #include <sysdep.h> | |
23 | ||
24 | /* INPUT PARAMETERS | |
25 | res_ptr $4 | |
26 | s1_ptr $5 | |
27 | size $6 | |
28 | s2_limb $7 | |
29 | */ | |
b5e0b658 | 30 | #ifdef __PIC__ |
bcb5cee0 UD |
31 | .option pic2 |
32 | #endif | |
33 | ENTRY (__mpn_mul_1) | |
34 | .set noreorder | |
b5e0b658 | 35 | #ifdef __PIC__ |
bcb5cee0 UD |
36 | .cpload t9 |
37 | #endif | |
38 | .set nomacro | |
39 | ||
40 | /* warm up phase 0 */ | |
41 | lw $8,0($5) | |
42 | ||
43 | /* warm up phase 1 */ | |
44 | addiu $5,$5,4 | |
8b2800c0 | 45 | #if __mips_isa_rev < 6 |
bcb5cee0 | 46 | multu $8,$7 |
8b2800c0 SE |
47 | #else |
48 | mulu $11,$8,$7 | |
49 | muhu $12,$8,$7 | |
50 | #endif | |
bcb5cee0 UD |
51 | |
52 | addiu $6,$6,-1 | |
3e9a9758 | 53 | beq $6,$0,L(LC0) |
bcb5cee0 UD |
54 | move $2,$0 /* zero cy2 */ |
55 | ||
56 | addiu $6,$6,-1 | |
3e9a9758 | 57 | beq $6,$0,L(LC1) |
bcb5cee0 UD |
58 | lw $8,0($5) /* load new s1 limb as early as possible */ |
59 | ||
8b2800c0 SE |
60 | |
61 | #if __mips_isa_rev < 6 | |
3e9a9758 | 62 | L(Loop): mflo $10 |
bcb5cee0 | 63 | mfhi $9 |
8b2800c0 SE |
64 | #else |
65 | L(Loop): move $10,$11 | |
66 | move $9,$12 | |
67 | #endif | |
bcb5cee0 UD |
68 | addiu $5,$5,4 |
69 | addu $10,$10,$2 /* add old carry limb to low product limb */ | |
8b2800c0 | 70 | #if __mips_isa_rev < 6 |
bcb5cee0 | 71 | multu $8,$7 |
8b2800c0 SE |
72 | #else |
73 | mulu $11,$8,$7 | |
74 | muhu $12,$8,$7 | |
75 | #endif | |
bcb5cee0 UD |
76 | lw $8,0($5) /* load new s1 limb as early as possible */ |
77 | addiu $6,$6,-1 /* decrement loop counter */ | |
78 | sltu $2,$10,$2 /* carry from previous addition -> $2 */ | |
79 | sw $10,0($4) | |
80 | addiu $4,$4,4 | |
3e9a9758 | 81 | bne $6,$0,L(Loop) /* should be "bnel" */ |
bcb5cee0 UD |
82 | addu $2,$9,$2 /* add high product limb and carry from addition */ |
83 | ||
84 | /* cool down phase 1 */ | |
8b2800c0 | 85 | #if __mips_isa_rev < 6 |
3e9a9758 | 86 | L(LC1): mflo $10 |
bcb5cee0 | 87 | mfhi $9 |
8b2800c0 SE |
88 | #else |
89 | L(LC1): move $10,$11 | |
90 | move $9,$12 | |
91 | #endif | |
bcb5cee0 UD |
92 | addu $10,$10,$2 |
93 | sltu $2,$10,$2 | |
8b2800c0 | 94 | #if __mips_isa_rev < 6 |
bcb5cee0 | 95 | multu $8,$7 |
8b2800c0 SE |
96 | #else |
97 | mulu $11,$8,$7 | |
98 | muhu $12,$8,$7 | |
99 | #endif | |
bcb5cee0 UD |
100 | sw $10,0($4) |
101 | addiu $4,$4,4 | |
60f3ce27 | 102 | addu $2,$9,$2 /* add high product limb and carry from addition */ |
bcb5cee0 UD |
103 | |
104 | /* cool down phase 0 */ | |
8b2800c0 | 105 | #if __mips_isa_rev < 6 |
3e9a9758 | 106 | L(LC0): mflo $10 |
bcb5cee0 | 107 | mfhi $9 |
8b2800c0 SE |
108 | #else |
109 | L(LC0): move $10,$11 | |
110 | move $9,$12 | |
111 | #endif | |
bcb5cee0 UD |
112 | addu $10,$10,$2 |
113 | sltu $2,$10,$2 | |
114 | sw $10,0($4) | |
115 | j $31 | |
116 | addu $2,$9,$2 /* add high product limb and carry from addition */ | |
2cf8794a | 117 | END (__mpn_mul_1) |