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1 | /* FPU control word definitions. PowerPC version. |
2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | This file is part of the GNU C Library. | |
4 | ||
5 | The GNU C Library is free software; you can redistribute it and/or | |
6 | modify it under the terms of the GNU Library General Public License as | |
7 | published by the Free Software Foundation; either version 2 of the | |
8 | License, or (at your option) any later version. | |
9 | ||
10 | The GNU C Library is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | Library General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU Library General Public | |
16 | License along with the GNU C Library; see the file COPYING.LIB. If not, | |
17 | write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, | |
18 | Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | #ifndef _FPU_CONTROL_H | |
21 | #define _FPU_CONTROL_H | |
22 | ||
23 | /* rounding control */ | |
24 | #define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */ | |
25 | #define _FPU_RC_DOWN 0x03 | |
26 | #define _FPU_RC_UP 0x02 | |
27 | #define _FPU_RC_ZERO 0x01 | |
28 | ||
29 | #define _FPU_MASK_NI 0x04 /* non-ieee mode */ | |
30 | ||
31 | /* masking of interrupts */ | |
32 | #define _FPU_MASK_ZM 0x10 /* zero divide */ | |
33 | #define _FPU_MASK_OM 0x40 /* overflow */ | |
34 | #define _FPU_MASK_UM 0x20 /* underflow */ | |
35 | #define _FPU_MASK_XM 0x08 /* inexact */ | |
36 | #define _FPU_MASK_IM 0x80 /* invalid operation */ | |
4cca6b86 | 37 | |
1f205a47 | 38 | #define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */ |
4cca6b86 | 39 | |
1f205a47 | 40 | /* The fdlibm code requires no interrupts for exceptions. */ |
4cca6b86 UD |
41 | #define _FPU_DEFAULT 0x00000000 /* Default value. */ |
42 | ||
43 | /* IEEE: same as above, but (some) exceptions; | |
44 | we leave the 'inexact' exception off. | |
45 | */ | |
1f205a47 | 46 | #define _FPU_IEEE 0x000000f0 |
4cca6b86 UD |
47 | |
48 | /* Type of the control word. */ | |
49 | typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__))); | |
50 | ||
51 | /* Macros for accessing the hardware control word. */ | |
52 | #define _FPU_GETCW(cw) ( { \ | |
53 | fpu_control_t tmp[2] __attribute__ ((__aligned__(8))); \ | |
54 | __asm__ ("mffs 0; stfd 0,%0" : "=m" (*tmp) : : "fr0"); \ | |
55 | tmp[1]; } ) | |
56 | #define _FPU_SETCW(cw) { \ | |
57 | fpu_control_t tmp[2] __attribute__ ((__aligned__(8))); \ | |
1f205a47 | 58 | tmp[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \ |
4cca6b86 UD |
59 | tmp[1] = cw; \ |
60 | __asm__ ("lfd 0,%0; mtfsf 255,0" : : "m" (*tmp) : "fr0"); \ | |
61 | } | |
62 | ||
63 | /* Default control word set at startup. */ | |
64 | extern fpu_control_t __fpu_control; | |
65 | ||
66 | __BEGIN_DECLS | |
67 | ||
68 | /* Called at startup. It can be used to manipulate fpu control register. */ | |
69 | extern void __setfpucw __P ((fpu_control_t)); | |
70 | ||
71 | __END_DECLS | |
72 | ||
73 | #endif /* _FPU_CONTROL_H */ |