[thirdparty/glibc.git] / sysdeps / powerpc / powerpc32 / fpu / __longjmp-common.S

/* longjmp for PowerPC.
   Copyright (C) 1995-99, 2000, 2003, 2004 Free Software Foundation, Inc.
   This file is part of the GNU C Library.

   The GNU C Library is free software; you can redistribute it and/or
   modify it under the terms of the GNU Lesser General Public
   License as published by the Free Software Foundation; either
   version 2.1 of the License, or (at your option) any later version.

   The GNU C Library is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
   Lesser General Public License for more details.

   You should have received a copy of the GNU Lesser General Public
   License along with the GNU C Library; if not, write to the Free
   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
   02111-1307 USA.  */

#include <sysdep.h>
#define _ASM
#define _SETJMP_H
#ifdef __NO_VMX__
# include <novmxsetjmp.h>
#else
# include <bits/setjmp.h>
#endif
#include <bp-sym.h>
#include <bp-asm.h>

ENTRY (BP_SYM (__longjmp))
	CHECK_BOUNDS_BOTH_WIDE_LIT (r3, r8, r9, JB_SIZE)
#ifndef __NO_VMX__
# ifdef PIC
	mflr    r6
	bl      _GLOBAL_OFFSET_TABLE_@local-4
	mflr    r5
#  ifdef SHARED
	lwz     r5,_rtld_global@got(r5)
	mtlr    r6
	lwz     r5,RTLD_GLOBAL_DL_HWCAP_OFFSET(r5)
#  else
	lwz     r5,_rtld_global@got(r5)
	mtlr    r6
	lwz     r5,0(r5)
#  endif
# else
	lis	r5,_dl_hwcap@ha
	lwz     r5,_dl_hwcap@l(r5)
# endif
	andis.	r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
	beq	no_vmx
	la	r5,((JB_VRS)*4)(3)
	andi.	r6,r5,0xf
	lwz	r0,((JB_VRSAVE)*4)(3)
	mtspr	VRSAVE,r0
	beq+	aligned_restore_vmx
	addi    r6,r5,16
	lvsl	v0,0,r5
	lvx	v1,0,r5
	addi    r5,r5,32
	lvx	v21,0,r6
	vperm   v20,v1,v21,v0
# define load_misaligned_vmx_lo_loaded(loadvr,lovr,shiftvr,loadgpr,addgpr) \
	addi    addgpr,addgpr,32; \
	lvx	lovr,0,loadgpr; \
	vperm   loadvr,loadvr,lovr,shiftvr;
	load_misaligned_vmx_lo_loaded(v21,v22,v0,r5,r6)
	load_misaligned_vmx_lo_loaded(v22,v23,v0,r6,r5)
	load_misaligned_vmx_lo_loaded(v23,v24,v0,r5,r6)
	load_misaligned_vmx_lo_loaded(v24,v25,v0,r6,r5)
	load_misaligned_vmx_lo_loaded(v25,v26,v0,r5,r6)
	load_misaligned_vmx_lo_loaded(v26,v27,v0,r6,r5)
	load_misaligned_vmx_lo_loaded(v27,v28,v0,r5,r6)
	load_misaligned_vmx_lo_loaded(v28,v29,v0,r6,r5)
	load_misaligned_vmx_lo_loaded(v29,v30,v0,r5,r6)
	load_misaligned_vmx_lo_loaded(v30,v31,v0,r6,r5)
	lvx	v1,0,r5
	vperm   v31,v31,v1,v0
	b       no_vmx
aligned_restore_vmx:
	addi	r6,r5,16
	lvx	v20,0,r5
	addi	r5,r5,32
	lvx	v21,0,r6
	addi	r6,r6,32
	lvx	v22,0,r5
	addi	r5,r5,32
	lvx	v23,0,r6
	addi	r6,r6,32
	lvx	v24,0,r5
	addi	r5,r5,32
	lvx	v25,0,r6
	addi	r6,r6,32
	lvx	v26,0,r5
	addi	r5,r5,32
	lvx	v27,0,r6
	addi	r6,r6,32
	lvx	v28,0,r5
	addi	r5,r5,32
	lvx	v29,0,r6
	addi	r6,r6,32
	lvx	v30,0,r5
	lvx	v31,0,r6
no_vmx:
#endif
	lwz r1,(JB_GPR1*4)(r3)
	lwz r0,(JB_LR*4)(r3)
	lwz r14,((JB_GPRS+0)*4)(r3)
	lfd fp14,((JB_FPRS+0*2)*4)(r3)
	lwz r15,((JB_GPRS+1)*4)(r3)
	lfd fp15,((JB_FPRS+1*2)*4)(r3)
	lwz r16,((JB_GPRS+2)*4)(r3)
	lfd fp16,((JB_FPRS+2*2)*4)(r3)
	lwz r17,((JB_GPRS+3)*4)(r3)
	lfd fp17,((JB_FPRS+3*2)*4)(r3)
	lwz r18,((JB_GPRS+4)*4)(r3)
	lfd fp18,((JB_FPRS+4*2)*4)(r3)
	lwz r19,((JB_GPRS+5)*4)(r3)
	lfd fp19,((JB_FPRS+5*2)*4)(r3)
	lwz r20,((JB_GPRS+6)*4)(r3)
	lfd fp20,((JB_FPRS+6*2)*4)(r3)
	mtlr r0
	lwz r21,((JB_GPRS+7)*4)(r3)
	lfd fp21,((JB_FPRS+7*2)*4)(r3)
	lwz r22,((JB_GPRS+8)*4)(r3)
	lfd fp22,((JB_FPRS+8*2)*4)(r3)
	lwz r0,(JB_CR*4)(r3)
	lwz r23,((JB_GPRS+9)*4)(r3)
	lfd fp23,((JB_FPRS+9*2)*4)(r3)
	lwz r24,((JB_GPRS+10)*4)(r3)
	lfd fp24,((JB_FPRS+10*2)*4)(r3)
	lwz r25,((JB_GPRS+11)*4)(r3)
	lfd fp25,((JB_FPRS+11*2)*4)(r3)
	mtcrf 0xFF,r0
	lwz r26,((JB_GPRS+12)*4)(r3)
	lfd fp26,((JB_FPRS+12*2)*4)(r3)
	lwz r27,((JB_GPRS+13)*4)(r3)
	lfd fp27,((JB_FPRS+13*2)*4)(r3)
	lwz r28,((JB_GPRS+14)*4)(r3)
	lfd fp28,((JB_FPRS+14*2)*4)(r3)
	lwz r29,((JB_GPRS+15)*4)(r3)
	lfd fp29,((JB_FPRS+15*2)*4)(r3)
	lwz r30,((JB_GPRS+16)*4)(r3)
	lfd fp30,((JB_FPRS+16*2)*4)(r3)
	lwz r31,((JB_GPRS+17)*4)(r3)
	lfd fp31,((JB_FPRS+17*2)*4)(r3)
	mr r3,r4
	blr
END (BP_SYM (__longjmp))
Commit	Line	Data
5c76ff27 UD	1	/* longjmp for PowerPC.
	2	Copyright (C) 1995-99, 2000, 2003, 2004 Free Software Foundation, Inc.
	3	This file is part of the GNU C Library.
	4
	5	The GNU C Library is free software; you can redistribute it and/or
	6	modify it under the terms of the GNU Lesser General Public
	7	License as published by the Free Software Foundation; either
	8	version 2.1 of the License, or (at your option) any later version.
	9
	10	The GNU C Library is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	Lesser General Public License for more details.
	14
	15	You should have received a copy of the GNU Lesser General Public
	16	License along with the GNU C Library; if not, write to the Free
	17	Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	18	02111-1307 USA. */
	19
	20	#include <sysdep.h>
	21	#define _ASM
	22	#define _SETJMP_H
	23	#ifdef __NO_VMX__
	24	# include <novmxsetjmp.h>
	25	#else
	26	# include <bits/setjmp.h>
	27	#endif
	28	#include <bp-sym.h>
	29	#include <bp-asm.h>
	30
	31	ENTRY (BP_SYM (__longjmp))
	32	CHECK_BOUNDS_BOTH_WIDE_LIT (r3, r8, r9, JB_SIZE)
	33	#ifndef __NO_VMX__
	34	# ifdef PIC
	35	mflr r6
	36	bl _GLOBAL_OFFSET_TABLE_@local-4
	37	mflr r5
	38	# ifdef SHARED
	39	lwz r5,_rtld_global@got(r5)
	40	mtlr r6
	41	lwz r5,RTLD_GLOBAL_DL_HWCAP_OFFSET(r5)
	42	# else
	43	lwz r5,_rtld_global@got(r5)
	44	mtlr r6
	45	lwz r5,0(r5)
	46	# endif
	47	# else
	48	lis r5,_dl_hwcap@ha
	49	lwz r5,_dl_hwcap@l(r5)
	50	# endif
	51	andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
	52	beq no_vmx
	53	la r5,((JB_VRS)*4)(3)
	54	andi. r6,r5,0xf
	55	lwz r0,((JB_VRSAVE)*4)(3)
	56	mtspr VRSAVE,r0
	57	beq+ aligned_restore_vmx
	58	addi r6,r5,16
	59	lvsl v0,0,r5
	60	lvx v1,0,r5
	61	addi r5,r5,32
	62	lvx v21,0,r6
	63	vperm v20,v1,v21,v0
	64	# define load_misaligned_vmx_lo_loaded(loadvr,lovr,shiftvr,loadgpr,addgpr) \
65	addi addgpr,addgpr,32; \
66	lvx lovr,0,loadgpr; \
67	vperm loadvr,loadvr,lovr,shiftvr;
68	load_misaligned_vmx_lo_loaded(v21,v22,v0,r5,r6)
69	load_misaligned_vmx_lo_loaded(v22,v23,v0,r6,r5)
70	load_misaligned_vmx_lo_loaded(v23,v24,v0,r5,r6)
71	load_misaligned_vmx_lo_loaded(v24,v25,v0,r6,r5)
72	load_misaligned_vmx_lo_loaded(v25,v26,v0,r5,r6)
73	load_misaligned_vmx_lo_loaded(v26,v27,v0,r6,r5)
74	load_misaligned_vmx_lo_loaded(v27,v28,v0,r5,r6)
75	load_misaligned_vmx_lo_loaded(v28,v29,v0,r6,r5)
76	load_misaligned_vmx_lo_loaded(v29,v30,v0,r5,r6)
77	load_misaligned_vmx_lo_loaded(v30,v31,v0,r6,r5)
78	lvx v1,0,r5
79	vperm v31,v31,v1,v0
80	b no_vmx
81	aligned_restore_vmx:
82	addi r6,r5,16
83	lvx v20,0,r5
84	addi r5,r5,32
85	lvx v21,0,r6
86	addi r6,r6,32
87	lvx v22,0,r5
88	addi r5,r5,32
89	lvx v23,0,r6
90	addi r6,r6,32
91	lvx v24,0,r5
92	addi r5,r5,32
93	lvx v25,0,r6
94	addi r6,r6,32
95	lvx v26,0,r5
96	addi r5,r5,32
97	lvx v27,0,r6
98	addi r6,r6,32
99	lvx v28,0,r5
100	addi r5,r5,32
101	lvx v29,0,r6
102	addi r6,r6,32
103	lvx v30,0,r5
104	lvx v31,0,r6
105	no_vmx:
106	#endif
107	lwz r1,(JB_GPR1*4)(r3)
108	lwz r0,(JB_LR*4)(r3)
109	lwz r14,((JB_GPRS+0)*4)(r3)
110	lfd fp14,((JB_FPRS+02)4)(r3)
111	lwz r15,((JB_GPRS+1)*4)(r3)
112	lfd fp15,((JB_FPRS+12)4)(r3)
113	lwz r16,((JB_GPRS+2)*4)(r3)
114	lfd fp16,((JB_FPRS+22)4)(r3)
115	lwz r17,((JB_GPRS+3)*4)(r3)
116	lfd fp17,((JB_FPRS+32)4)(r3)
117	lwz r18,((JB_GPRS+4)*4)(r3)
118	lfd fp18,((JB_FPRS+42)4)(r3)
119	lwz r19,((JB_GPRS+5)*4)(r3)
120	lfd fp19,((JB_FPRS+52)4)(r3)
121	lwz r20,((JB_GPRS+6)*4)(r3)
122	lfd fp20,((JB_FPRS+62)4)(r3)
123	mtlr r0
124	lwz r21,((JB_GPRS+7)*4)(r3)
125	lfd fp21,((JB_FPRS+72)4)(r3)
126	lwz r22,((JB_GPRS+8)*4)(r3)
127	lfd fp22,((JB_FPRS+82)4)(r3)
128	lwz r0,(JB_CR*4)(r3)
129	lwz r23,((JB_GPRS+9)*4)(r3)
130	lfd fp23,((JB_FPRS+92)4)(r3)
131	lwz r24,((JB_GPRS+10)*4)(r3)
132	lfd fp24,((JB_FPRS+102)4)(r3)
133	lwz r25,((JB_GPRS+11)*4)(r3)
134	lfd fp25,((JB_FPRS+112)4)(r3)
135	mtcrf 0xFF,r0
136	lwz r26,((JB_GPRS+12)*4)(r3)
137	lfd fp26,((JB_FPRS+122)4)(r3)
138	lwz r27,((JB_GPRS+13)*4)(r3)
139	lfd fp27,((JB_FPRS+132)4)(r3)
140	lwz r28,((JB_GPRS+14)*4)(r3)
141	lfd fp28,((JB_FPRS+142)4)(r3)
142	lwz r29,((JB_GPRS+15)*4)(r3)
143	lfd fp29,((JB_FPRS+152)4)(r3)
144	lwz r30,((JB_GPRS+16)*4)(r3)
145	lfd fp30,((JB_FPRS+162)4)(r3)
146	lwz r31,((JB_GPRS+17)*4)(r3)
147	lfd fp31,((JB_FPRS+172)4)(r3)
148	mr r3,r4
149	blr
150	END (BP_SYM (__longjmp))