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ed1ac6a2 | 1 | /* Dump registers. |
0ecb606c | 2 | Copyright (C) 1998, 2006 Free Software Foundation, Inc. |
ed1ac6a2 | 3 | This file is part of the GNU C Library. |
ed1ac6a2 UD |
4 | |
5 | The GNU C Library is free software; you can redistribute it and/or | |
41bdb6e2 AJ |
6 | modify it under the terms of the GNU Lesser General Public |
7 | License as published by the Free Software Foundation; either | |
8 | version 2.1 of the License, or (at your option) any later version. | |
ed1ac6a2 UD |
9 | |
10 | The GNU C Library is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
41bdb6e2 | 13 | Lesser General Public License for more details. |
ed1ac6a2 | 14 | |
41bdb6e2 AJ |
15 | You should have received a copy of the GNU Lesser General Public |
16 | License along with the GNU C Library; if not, write to the Free | |
17 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA | |
18 | 02111-1307 USA. */ | |
ed1ac6a2 UD |
19 | |
20 | #include <sys/uio.h> | |
21 | #include <stdio-common/_itoa.h> | |
22 | ||
6075607b | 23 | /* This prints out the information in the following form: */ |
d8cceb4f | 24 | static const char dumpform[] = "\ |
c891b2df UD |
25 | Register dump:\n\ |
26 | fp0-3: 0000030%0000031% 0000032%0000033% 0000034%0000035% 0000036%0000037%\n\ | |
27 | fp4-7: 0000038%0000039% 000003a%000003b% 000003c%000003d% 000003e%000003f%\n\ | |
28 | fp8-11: 0000040%0000041% 0000042%0000043% 0000044%0000045% 0000046%0000047%\n\ | |
29 | fp12-15: 0000048%0000049% 000004a%000004b% 000004c%000004d% 000004e%000004f%\n\ | |
30 | fp16-19: 0000050%0000051% 0000052%0000053% 0000054%0000055% 0000056%0000057%\n\ | |
31 | fp20-23: 0000058%0000059% 000005a%000005b% 000005c%000005d% 000005e%000005f%\n\ | |
32 | fp24-27: 0000060%0000061% 0000062%0000063% 0000064%0000065% 0000066%0000067%\n\ | |
33 | fp28-31: 0000068%0000069% 000006a%000006b% 000006c%000006d% 000006e%000006f%\n\ | |
34 | r0 =0000000% sp =0000001% r2 =0000002% r3 =0000003% trap=0000028%\n\ | |
35 | r4 =0000004% r5 =0000005% r6 =0000006% r7 =0000007% sr0=0000020% sr1=0000021%\n\ | |
36 | r8 =0000008% r9 =0000009% r10=000000a% r11=000000b% dar=0000029% dsi=000002a%\n\ | |
37 | r12=000000c% r13=000000d% r14=000000e% r15=000000f% r3*=0000022%\n\ | |
38 | r16=0000010% r17=0000011% r18=0000012% r19=0000013%\n\ | |
39 | r20=0000014% r21=0000015% r22=0000016% r23=0000017% lr=0000024% xer=0000025%\n\ | |
40 | r24=0000018% r25=0000019% r26=000001a% r27=000001b% mq=0000027% ctr=0000023%\n\ | |
41 | r28=000001c% r29=000001d% r30=000001e% r31=000001f% fscr=0000071% ccr=0000026%\n\ | |
d8cceb4f UD |
42 | "; |
43 | ||
6075607b UD |
44 | /* Most of the fields are self-explanatory. 'sr0' is the next |
45 | instruction to execute, from SRR0, which may have some relationship | |
46 | with the instruction that caused the exception. 'r3*' is the value | |
47 | that will be returned in register 3 when the current system call | |
48 | returns. 'sr1' is SRR1, bits 16-31 of which are copied from the MSR: | |
49 | ||
50 | 16 - External interrupt enable | |
51 | 17 - Privilege level (1=user, 0=supervisor) | |
52 | 18 - FP available | |
53 | 19 - Machine check enable (if clear, processor locks up on machine check) | |
54 | 20 - FP exception mode bit 0 (FP exceptions recoverable) | |
55 | 21 - Single-step trace enable | |
56 | 22 - Branch trace enable | |
57 | 23 - FP exception mode bit 1 | |
58 | 25 - exception prefix (if set, exceptions are taken from 0xFFFnnnnn, | |
59 | otherwise from 0x000nnnnn). | |
60 | 26 - Instruction address translation enabled. | |
61 | 27 - Data address translation enabled. | |
62 | 30 - Exception is recoverable (otherwise, don't try to return). | |
63 | 31 - Little-endian mode enable. | |
64 | ||
65 | 'Trap' is the address of the exception: | |
66 | ||
67 | 00200 - Machine check exception (memory parity error, for instance) | |
68 | 00300 - Data access exception (memory not mapped, see dsisr for why) | |
69 | 00400 - Instruction access exception (memory not mapped) | |
70 | 00500 - External interrupt | |
71 | 00600 - Alignment exception (see dsisr for more information) | |
72 | 00700 - Program exception (illegal/trap instruction, FP exception) | |
73 | 00800 - FP unavailable (should not be seen by user code) | |
74 | 00900 - Decrementer exception (for instance, SIGALRM) | |
75 | 00A00 - I/O controller interface exception | |
76 | 00C00 - System call exception (for instance, kill(3)). | |
77 | 00E00 - FP assist exception (optional FP instructions, etc.) | |
78 | ||
d8cceb4f UD |
79 | 'dar' is the memory location, for traps 00300, 00400, 00600, 00A00. |
80 | 'dsisr' has the following bits under trap 00300: | |
6075607b UD |
81 | 0 - direct-store error exception |
82 | 1 - no page table entry for page | |
83 | 4 - memory access not permitted | |
84 | 5 - trying to access I/O controller space or using lwarx/stwcx on | |
85 | non-write-cached memory | |
86 | 6 - access was store | |
87 | 9 - data access breakpoint hit | |
88 | 10 - segment table search failed to find translation (64-bit ppcs only) | |
89 | 11 - I/O controller instruction not permitted | |
90 | For trap 00400, the same bits are set in SRR1 instead. | |
91 | For trap 00600, bits 12-31 of the DSISR set to allow emulation of | |
92 | the instruction without actually having to read it from memory. | |
93 | */ | |
ed1ac6a2 | 94 | |
d8cceb4f UD |
95 | #define xtoi(x) (x >= 'a' ? x + 10 - 'a' : x - '0') |
96 | ||
ed1ac6a2 | 97 | static void |
d8cceb4f | 98 | register_dump (int fd, struct sigcontext *ctx) |
ed1ac6a2 | 99 | { |
6075607b | 100 | char buffer[sizeof(dumpform)]; |
d8cceb4f UD |
101 | char *bufferpos; |
102 | unsigned regno; | |
103 | unsigned *regs = (unsigned *)(ctx->regs); | |
6075607b UD |
104 | |
105 | memcpy(buffer, dumpform, sizeof(dumpform)); | |
106 | ||
ed1ac6a2 | 107 | /* Generate the output. */ |
d8cceb4f | 108 | while ((bufferpos = memchr (buffer, '%', sizeof(dumpform)))) |
ed1ac6a2 | 109 | { |
d8cceb4f UD |
110 | regno = xtoi (bufferpos[-1]) | xtoi (bufferpos[-2]) << 4; |
111 | memset (bufferpos-2, '0', 3); | |
112 | _itoa_word (regs[regno], bufferpos+1, 16, 0); | |
ed1ac6a2 UD |
113 | } |
114 | ||
115 | /* Write the output. */ | |
0ecb606c | 116 | write (fd, buffer, sizeof(buffer) - 1); |
ed1ac6a2 UD |
117 | } |
118 | ||
119 | ||
120 | #define REGISTER_DUMP \ | |
ed1ac6a2 | 121 | register_dump (fd, ctx) |