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0ecb606c | 1 | /* Copyright (C) 1999, 2001, 2002, 2006 Free Software Foundation, Inc. |
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2 | This file is part of the GNU C Library. |
3 | ||
4 | The GNU C Library is free software; you can redistribute it and/or | |
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5 | modify it under the terms of the GNU Lesser General Public |
6 | License as published by the Free Software Foundation; either | |
7 | version 2.1 of the License, or (at your option) any later version. | |
be9cd93a UD |
8 | |
9 | The GNU C Library is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
41bdb6e2 | 12 | Lesser General Public License for more details. |
be9cd93a | 13 | |
41bdb6e2 AJ |
14 | You should have received a copy of the GNU Lesser General Public |
15 | License along with the GNU C Library; if not, write to the Free | |
16 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA | |
17 | 02111-1307 USA. */ | |
be9cd93a | 18 | |
ffdd5e50 UD |
19 | /* |
20 | * Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP). | |
21 | * This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup. | |
22 | * The following must match the kernels linux/asm/cputable.h. | |
23 | */ | |
24 | #define PPC_FEATURE_32 0x80000000 /* 32-bit mode. */ | |
25 | #define PPC_FEATURE_64 0x40000000 /* 64-bit mode. */ | |
26 | #define PPC_FEATURE_601_INSTR 0x20000000 /* 601 chip, Old POWER ISA. */ | |
27 | #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 /* SIMD/Vector Unit. */ | |
28 | #define PPC_FEATURE_HAS_FPU 0x08000000 /* Floating Point Unit. */ | |
29 | #define PPC_FEATURE_HAS_MMU 0x04000000 /* Memory Management Unit. */ | |
30 | #define PPC_FEATURE_HAS_4xxMAC 0x02000000 /* 4xx Multiply Accumulator. */ | |
31 | #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 /* Unified I/D cache. */ | |
0ecb606c JJ |
32 | #define PPC_FEATURE_HAS_SPE 0x00800000 /* Signal Processing ext. */ |
33 | #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 /* SPE Float. */ | |
34 | #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 /* SPE Double. */ | |
35 | #define PPC_FEATURE_NO_TB 0x00100000 /* 601/403gx have no timebase */ | |
36 | #define PPC_FEATURE_POWER4 0x00080000 /* POWER4 ISA 2.00 */ | |
37 | #define PPC_FEATURE_POWER5 0x00040000 /* POWER5 ISA 2.02 */ | |
38 | #define PPC_FEATURE_POWER5_PLUS 0x00020000 /* POWER5+ ISA 2.03 */ | |
39 | #define PPC_FEATURE_CELL_BE 0x00010000 /* CELL Broadband Engine */ | |
40 | #define PPC_FEATURE_BOOKE 0x00008000 | |
41 | #define PPC_FEATURE_SMT 0x00004000 /* Simultaneous Multi-Threading */ | |
42 | #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 | |
43 | #define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */ | |
44 | #define PPC_FEATURE_PA6T 0x00000800 /* PA Semi 6T Core */ | |
45 | #define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal FP Unit */ | |
46 | #define PPC_FEATURE_POWER6_EXT 0x00000200 /* P6 + mffgpr/mftgpr */ | |
47 | #define PPC_FEATURE_970 (PPC_FEATURE_POWER4 + PPC_FEATURE_HAS_ALTIVEC) | |
ffdd5e50 | 48 | |
be9cd93a UD |
49 | #ifdef __ASSEMBLER__ |
50 | ||
51 | /* Symbolic names for the registers. The only portable way to write asm | |
52 | code is to use number but this produces really unreadable code. | |
53 | Therefore these symbolic names. */ | |
54 | ||
55 | /* Integer registers. */ | |
56 | #define r0 0 | |
57 | #define r1 1 | |
58 | #define r2 2 | |
59 | #define r3 3 | |
60 | #define r4 4 | |
61 | #define r5 5 | |
62 | #define r6 6 | |
63 | #define r7 7 | |
64 | #define r8 8 | |
65 | #define r9 9 | |
66 | #define r10 10 | |
67 | #define r11 11 | |
68 | #define r12 12 | |
69 | #define r13 13 | |
70 | #define r14 14 | |
71 | #define r15 15 | |
72 | #define r16 16 | |
73 | #define r17 17 | |
74 | #define r18 18 | |
75 | #define r19 19 | |
76 | #define r20 20 | |
77 | #define r21 21 | |
78 | #define r22 22 | |
79 | #define r23 23 | |
80 | #define r24 24 | |
81 | #define r25 25 | |
82 | #define r26 26 | |
83 | #define r27 27 | |
84 | #define r28 28 | |
85 | #define r29 29 | |
86 | #define r30 30 | |
87 | #define r31 31 | |
88 | ||
89 | /* Floating-point registers. */ | |
90 | #define fp0 0 | |
91 | #define fp1 1 | |
92 | #define fp2 2 | |
93 | #define fp3 3 | |
94 | #define fp4 4 | |
95 | #define fp5 5 | |
96 | #define fp6 6 | |
97 | #define fp7 7 | |
98 | #define fp8 8 | |
99 | #define fp9 9 | |
100 | #define fp10 10 | |
101 | #define fp11 11 | |
102 | #define fp12 12 | |
103 | #define fp13 13 | |
104 | #define fp14 14 | |
105 | #define fp15 15 | |
106 | #define fp16 16 | |
107 | #define fp17 17 | |
108 | #define fp18 18 | |
109 | #define fp19 19 | |
110 | #define fp20 20 | |
111 | #define fp21 21 | |
112 | #define fp22 22 | |
113 | #define fp23 23 | |
114 | #define fp24 24 | |
115 | #define fp25 25 | |
116 | #define fp26 26 | |
117 | #define fp27 27 | |
118 | #define fp28 28 | |
119 | #define fp29 29 | |
120 | #define fp30 30 | |
121 | #define fp31 31 | |
122 | ||
123 | /* Condition code registers. */ | |
124 | #define cr0 0 | |
125 | #define cr1 1 | |
126 | #define cr2 2 | |
127 | #define cr3 3 | |
128 | #define cr4 4 | |
129 | #define cr5 5 | |
130 | #define cr6 6 | |
131 | #define cr7 7 | |
132 | ||
5ef6ae4b UD |
133 | /* Vector registers. */ |
134 | #define v0 0 | |
135 | #define v1 1 | |
136 | #define v2 2 | |
137 | #define v3 3 | |
138 | #define v4 4 | |
139 | #define v5 5 | |
140 | #define v6 6 | |
141 | #define v7 7 | |
142 | #define v8 8 | |
143 | #define v9 9 | |
144 | #define v10 10 | |
145 | #define v11 11 | |
146 | #define v12 12 | |
147 | #define v13 13 | |
148 | #define v14 14 | |
149 | #define v15 15 | |
150 | #define v16 16 | |
151 | #define v17 17 | |
152 | #define v18 18 | |
153 | #define v19 19 | |
154 | #define v20 20 | |
155 | #define v21 21 | |
156 | #define v22 22 | |
157 | #define v23 23 | |
158 | #define v24 24 | |
159 | #define v25 25 | |
160 | #define v26 26 | |
161 | #define v27 27 | |
162 | #define v28 28 | |
163 | #define v29 29 | |
164 | #define v30 30 | |
165 | #define v31 31 | |
166 | ||
167 | #define VRSAVE 256 | |
168 | ||
7ac887d4 RM |
169 | |
170 | #ifdef __ELF__ | |
171 | ||
172 | /* This seems to always be the case on PPC. */ | |
173 | #define ALIGNARG(log2) log2 | |
174 | /* For ELF we need the `.type' directive to make shared libs work right. */ | |
175 | #define ASM_TYPE_DIRECTIVE(name,typearg) .type name,typearg; | |
176 | #define ASM_SIZE_DIRECTIVE(name) .size name,.-name | |
177 | ||
7ac887d4 | 178 | #endif /* __ELF__ */ |
7ac887d4 | 179 | #endif /* __ASSEMBLER__ */ |
ffdd5e50 | 180 |