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b168057a 1/* Copyright (C) 1997-2015 Free Software Foundation, Inc.
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2 This file is part of the GNU C Library.
3
4 The GNU C Library is free software; you can redistribute it and/or
5 modify it under the terms of the GNU Lesser General Public
6 License as published by the Free Software Foundation; either
7 version 2.1 of the License, or (at your option) any later version.
8
9 The GNU C Library is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 Lesser General Public License for more details.
13
14 You should have received a copy of the GNU Lesser General Public
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15 License along with the GNU C Library; if not, see
16 <http://www.gnu.org/licenses/>. */
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17
18#ifndef _FENV_H
19# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
20#endif
21
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22/* Define bits representing the exception. We use the bit positions
23 of the appropriate bits in the FPU control word. */
24enum
25 {
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26 FE_INVALID =
27#define FE_INVALID 0x01
28 FE_INVALID,
c9cf6dde 29 __FE_DENORM = 0x02,
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30 FE_DIVBYZERO =
31#define FE_DIVBYZERO 0x04
32 FE_DIVBYZERO,
33 FE_OVERFLOW =
34#define FE_OVERFLOW 0x08
35 FE_OVERFLOW,
36 FE_UNDERFLOW =
37#define FE_UNDERFLOW 0x10
38 FE_UNDERFLOW,
39 FE_INEXACT =
40#define FE_INEXACT 0x20
41 FE_INEXACT
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42 };
43
44#define FE_ALL_EXCEPT \
45 (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
46
47/* The ix87 FPU supports all of the four defined rounding modes. We
48 use again the bit positions in the FPU control word as the values
49 for the appropriate macros. */
50enum
51 {
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52 FE_TONEAREST =
53#define FE_TONEAREST 0
54 FE_TONEAREST,
55 FE_DOWNWARD =
56#define FE_DOWNWARD 0x400
57 FE_DOWNWARD,
58 FE_UPWARD =
59#define FE_UPWARD 0x800
60 FE_UPWARD,
61 FE_TOWARDZERO =
62#define FE_TOWARDZERO 0xc00
63 FE_TOWARDZERO
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64 };
65
66
67/* Type representing exception flags. */
68typedef unsigned short int fexcept_t;
69
70
71/* Type representing floating-point environment. This structure
72 corresponds to the layout of the block written by the `fstenv'
73 instruction and has additional fields for the contents of the MXCSR
74 register as written by the `stmxcsr' instruction. */
75typedef struct
76 {
77 unsigned short int __control_word;
d1d9eaf4 78 unsigned short int __glibc_reserved1;
c9cf6dde 79 unsigned short int __status_word;
d1d9eaf4 80 unsigned short int __glibc_reserved2;
c9cf6dde 81 unsigned short int __tags;
d1d9eaf4 82 unsigned short int __glibc_reserved3;
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83 unsigned int __eip;
84 unsigned short int __cs_selector;
85 unsigned int __opcode:11;
d1d9eaf4 86 unsigned int __glibc_reserved4:5;
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87 unsigned int __data_offset;
88 unsigned short int __data_selector;
d1d9eaf4 89 unsigned short int __glibc_reserved5;
490df6c4 90#ifdef __x86_64__
c9cf6dde 91 unsigned int __mxcsr;
ad146de7 92#endif
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93 }
94fenv_t;
95
96/* If the default argument is used we use this value. */
a784e502 97#define FE_DFL_ENV ((const fenv_t *) -1)
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98
99#ifdef __USE_GNU
100/* Floating-point environment where none of the exception is masked. */
a784e502 101# define FE_NOMASK_ENV ((const fenv_t *) -2)
c9cf6dde 102#endif
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103
104
d2daaa1e 105#ifdef __USE_EXTERN_INLINES
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106__BEGIN_DECLS
107
0ac5ae23 108/* Optimized versions. */
21eaf3a5 109extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept);
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110__extern_always_inline void
111__NTH (__feraiseexcept_invalid_divbyzero (int __excepts))
0ac5ae23 112{
0747f818 113 if ((FE_INVALID & __excepts) != 0)
0ac5ae23 114 {
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115 /* One example of an invalid operation is 0.0 / 0.0. */
116 float __f = 0.0;
0ac5ae23 117
a728a38f 118# ifdef __SSE_MATH__
0747f818 119 __asm__ __volatile__ ("divss %0, %0 " : : "x" (__f));
a728a38f 120# else
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121 __asm__ __volatile__ ("fdiv %%st, %%st(0); fwait"
122 : "=t" (__f) : "0" (__f));
a728a38f 123# endif
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124 (void) &__f;
125 }
126 if ((FE_DIVBYZERO & __excepts) != 0)
127 {
128 float __f = 1.0;
129 float __g = 0.0;
0ac5ae23 130
a728a38f 131# ifdef __SSE_MATH__
0747f818 132 __asm__ __volatile__ ("divss %1, %0" : : "x" (__f), "x" (__g));
a728a38f 133# else
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134 __asm__ __volatile__ ("fdivp %%st, %%st(1); fwait"
135 : "=t" (__f) : "0" (__f), "u" (__g) : "st(1)");
a728a38f 136# endif
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137 (void) &__f;
138 }
139}
140__extern_inline int
141__NTH (feraiseexcept (int __excepts))
142{
143 if (__builtin_constant_p (__excepts)
144 && (__excepts & ~(FE_INVALID | FE_DIVBYZERO)) == 0)
145 {
146 __feraiseexcept_invalid_divbyzero (__excepts);
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147 return 0;
148 }
149
150 return __feraiseexcept_renamed (__excepts);
151}
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152
153__END_DECLS
0ac5ae23 154#endif