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568035b7 | 1 | /* Copyright (C) 1997-2013 Free Software Foundation, Inc. |
c9cf6dde AJ |
2 | This file is part of the GNU C Library. |
3 | ||
4 | The GNU C Library is free software; you can redistribute it and/or | |
5 | modify it under the terms of the GNU Lesser General Public | |
6 | License as published by the Free Software Foundation; either | |
7 | version 2.1 of the License, or (at your option) any later version. | |
8 | ||
9 | The GNU C Library is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
12 | Lesser General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU Lesser General Public | |
59ba27a6 PE |
15 | License along with the GNU C Library; if not, see |
16 | <http://www.gnu.org/licenses/>. */ | |
c9cf6dde AJ |
17 | |
18 | #ifndef _FENV_H | |
19 | # error "Never use <bits/fenv.h> directly; include <fenv.h> instead." | |
20 | #endif | |
21 | ||
c9cf6dde AJ |
22 | /* Define bits representing the exception. We use the bit positions |
23 | of the appropriate bits in the FPU control word. */ | |
24 | enum | |
25 | { | |
fbeafede JM |
26 | FE_INVALID = |
27 | #define FE_INVALID 0x01 | |
28 | FE_INVALID, | |
c9cf6dde | 29 | __FE_DENORM = 0x02, |
fbeafede JM |
30 | FE_DIVBYZERO = |
31 | #define FE_DIVBYZERO 0x04 | |
32 | FE_DIVBYZERO, | |
33 | FE_OVERFLOW = | |
34 | #define FE_OVERFLOW 0x08 | |
35 | FE_OVERFLOW, | |
36 | FE_UNDERFLOW = | |
37 | #define FE_UNDERFLOW 0x10 | |
38 | FE_UNDERFLOW, | |
39 | FE_INEXACT = | |
40 | #define FE_INEXACT 0x20 | |
41 | FE_INEXACT | |
c9cf6dde AJ |
42 | }; |
43 | ||
44 | #define FE_ALL_EXCEPT \ | |
45 | (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID) | |
46 | ||
47 | /* The ix87 FPU supports all of the four defined rounding modes. We | |
48 | use again the bit positions in the FPU control word as the values | |
49 | for the appropriate macros. */ | |
50 | enum | |
51 | { | |
fbeafede JM |
52 | FE_TONEAREST = |
53 | #define FE_TONEAREST 0 | |
54 | FE_TONEAREST, | |
55 | FE_DOWNWARD = | |
56 | #define FE_DOWNWARD 0x400 | |
57 | FE_DOWNWARD, | |
58 | FE_UPWARD = | |
59 | #define FE_UPWARD 0x800 | |
60 | FE_UPWARD, | |
61 | FE_TOWARDZERO = | |
62 | #define FE_TOWARDZERO 0xc00 | |
63 | FE_TOWARDZERO | |
c9cf6dde AJ |
64 | }; |
65 | ||
66 | ||
67 | /* Type representing exception flags. */ | |
68 | typedef unsigned short int fexcept_t; | |
69 | ||
70 | ||
71 | /* Type representing floating-point environment. This structure | |
72 | corresponds to the layout of the block written by the `fstenv' | |
73 | instruction and has additional fields for the contents of the MXCSR | |
74 | register as written by the `stmxcsr' instruction. */ | |
75 | typedef struct | |
76 | { | |
77 | unsigned short int __control_word; | |
d1d9eaf4 | 78 | unsigned short int __glibc_reserved1; |
c9cf6dde | 79 | unsigned short int __status_word; |
d1d9eaf4 | 80 | unsigned short int __glibc_reserved2; |
c9cf6dde | 81 | unsigned short int __tags; |
d1d9eaf4 | 82 | unsigned short int __glibc_reserved3; |
c9cf6dde AJ |
83 | unsigned int __eip; |
84 | unsigned short int __cs_selector; | |
85 | unsigned int __opcode:11; | |
d1d9eaf4 | 86 | unsigned int __glibc_reserved4:5; |
c9cf6dde AJ |
87 | unsigned int __data_offset; |
88 | unsigned short int __data_selector; | |
d1d9eaf4 | 89 | unsigned short int __glibc_reserved5; |
490df6c4 | 90 | #ifdef __x86_64__ |
c9cf6dde | 91 | unsigned int __mxcsr; |
ad146de7 | 92 | #endif |
c9cf6dde AJ |
93 | } |
94 | fenv_t; | |
95 | ||
96 | /* If the default argument is used we use this value. */ | |
a784e502 | 97 | #define FE_DFL_ENV ((const fenv_t *) -1) |
c9cf6dde AJ |
98 | |
99 | #ifdef __USE_GNU | |
100 | /* Floating-point environment where none of the exception is masked. */ | |
a784e502 | 101 | # define FE_NOMASK_ENV ((const fenv_t *) -2) |
c9cf6dde | 102 | #endif |
0ac5ae23 UD |
103 | |
104 | ||
d2daaa1e | 105 | #ifdef __USE_EXTERN_INLINES |
caa6c9d8 AS |
106 | __BEGIN_DECLS |
107 | ||
0ac5ae23 | 108 | /* Optimized versions. */ |
21eaf3a5 | 109 | extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept); |
83c7615c AS |
110 | __extern_inline int |
111 | __NTH (feraiseexcept (int __excepts)) | |
0ac5ae23 UD |
112 | { |
113 | if (__builtin_constant_p (__excepts) | |
114 | && (__excepts & ~(FE_INVALID | FE_DIVBYZERO)) == 0) | |
115 | { | |
116 | if ((FE_INVALID & __excepts) != 0) | |
117 | { | |
c0c3f78a | 118 | /* One example of an invalid operation is 0.0 / 0.0. */ |
0ac5ae23 UD |
119 | float __f = 0.0; |
120 | ||
a728a38f | 121 | # ifdef __SSE_MATH__ |
0ac5ae23 | 122 | __asm__ __volatile__ ("divss %0, %0 " : : "x" (__f)); |
a728a38f L |
123 | # else |
124 | __asm__ __volatile__ ("fdiv %%st, %%st(0); fwait" | |
125 | : "=t" (__f) : "0" (__f)); | |
126 | # endif | |
0ac5ae23 UD |
127 | (void) &__f; |
128 | } | |
129 | if ((FE_DIVBYZERO & __excepts) != 0) | |
130 | { | |
caa6c9d8 AS |
131 | float __f = 1.0; |
132 | float __g = 0.0; | |
0ac5ae23 | 133 | |
a728a38f | 134 | # ifdef __SSE_MATH__ |
caa6c9d8 | 135 | __asm__ __volatile__ ("divss %1, %0" : : "x" (__f), "x" (__g)); |
a728a38f L |
136 | # else |
137 | __asm__ __volatile__ ("fdivp %%st, %%st(1); fwait" | |
138 | : "=t" (__f) : "0" (__f), "u" (__g) : "st(1)"); | |
139 | # endif | |
caa6c9d8 | 140 | (void) &__f; |
0ac5ae23 UD |
141 | } |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
146 | return __feraiseexcept_renamed (__excepts); | |
147 | } | |
caa6c9d8 AS |
148 | |
149 | __END_DECLS | |
0ac5ae23 | 150 | #endif |