2 * Copyright 2011 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
13 #include <fsl_ddr_sdram.h>
14 #include <fsl_ddr_dimm_params.h>
15 #include <asm/fsl_law.h>
17 struct board_specific_parameters
{
19 u32 datarate_mhz_high
;
28 * This table contains all valid speeds we want to override with board
29 * specific parameters. datarate_mhz_high values need to be in ascending order
30 * for each n_ranks group.
32 * ranges for parameters:
37 static const struct board_specific_parameters dimm0
[] = {
40 * num| hi| clk| wrlvl | cpo |wrdata|2T
41 * ranks| mhz|adjst| start | delay|
43 {2, 750, 3, 5, 0xff, 2, 0},
44 {2, 1250, 4, 6, 0xff, 2, 0},
45 {2, 1350, 5, 7, 0xff, 2, 0},
46 {2, 1666, 5, 8, 0xff, 2, 0},
50 void fsl_ddr_board_options(memctl_options_t
*popts
,
52 unsigned int ctrl_num
)
54 const struct board_specific_parameters
*pbsp
, *pbsp_highest
= NULL
;
58 printf("Wrong parameter for controller number %d", ctrl_num
);
67 * Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr
68 * freqency and n_banks specified in board_specific_parameters table.
70 ddr_freq
= get_ddr_freq(0) / 1000000;
71 while (pbsp
->datarate_mhz_high
) {
72 if (pbsp
->n_ranks
== pdimm
->n_ranks
) {
73 if (ddr_freq
<= pbsp
->datarate_mhz_high
) {
74 popts
->cpo_override
= pbsp
->cpo
;
75 popts
->write_data_delay
=
76 pbsp
->write_data_delay
;
77 popts
->clk_adjust
= pbsp
->clk_adjust
;
78 popts
->wrlvl_start
= pbsp
->wrlvl_start
;
79 popts
->twot_en
= pbsp
->force_2t
;
88 printf("Error: board specific timing not found "
89 "for data rate %lu MT/s!\n"
90 "Trying to use the highest speed (%u) parameters\n",
91 ddr_freq
, pbsp_highest
->datarate_mhz_high
);
92 popts
->cpo_override
= pbsp_highest
->cpo
;
93 popts
->write_data_delay
= pbsp_highest
->write_data_delay
;
94 popts
->clk_adjust
= pbsp_highest
->clk_adjust
;
95 popts
->wrlvl_start
= pbsp_highest
->wrlvl_start
;
96 popts
->twot_en
= pbsp_highest
->force_2t
;
98 panic("DIMM is not supported by this board");
103 * Factors to consider for half-strength driver enable:
104 * - number of DIMMs installed
106 popts
->half_strength_driver_enable
= 0;
107 /* Write leveling override */
108 popts
->wrlvl_override
= 1;
109 popts
->wrlvl_sample
= 0xf;
111 /* Rtt and Rtt_WR override */
112 popts
->rtt_override
= 0;
114 /* Enable ZQ calibration */
117 /* DHC_EN =1, ODT = 60 Ohm */
118 popts
->ddr_cdr1
= DDR_CDR1_DHC_EN
;
121 phys_size_t
initdram(int board_type
)
123 phys_size_t dram_size
= 0;
125 puts("Initializing....");
129 dram_size
= fsl_ddr_sdram();
131 puts("no SPD and fixed parameters\n");
135 dram_size
= setup_ddr_tlbs(dram_size
/ 0x100000);
136 dram_size
*= 0x100000;