crypto/arm_arch.h

   1 /*
   2  * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved.
   3  *
   4  * Licensed under the Apache License 2.0 (the "License").  You may not use
   5  * this file except in compliance with the License.  You can obtain a copy
   6  * in the file LICENSE in the source distribution or at
   7  * https://www.openssl.org/source/license.html
   8  */
   9
  10 #ifndef OSSL_CRYPTO_ARM_ARCH_H
  11 # define OSSL_CRYPTO_ARM_ARCH_H
  12
  13 # if !defined(__ARM_ARCH__)
  14 #  if defined(__CC_ARM)
  15 #   define __ARM_ARCH__ __TARGET_ARCH_ARM
  16 #   if defined(__BIG_ENDIAN)
  17 #    define __ARMEB__
  18 #   else
  19 #    define __ARMEL__
  20 #   endif
  21 #  elif defined(__GNUC__)
  22 #   if   defined(__aarch64__)
  23 #    define __ARM_ARCH__ 8
  24   /*
  25    * Why doesn't gcc define __ARM_ARCH__? Instead it defines
  26    * bunch of below macros. See all_architectures[] table in
  27    * gcc/config/arm/arm.c. On a side note it defines
  28    * __ARMEL__/__ARMEB__ for little-/big-endian.
  29    */
  30 #   elif defined(__ARM_ARCH)
  31 #    define __ARM_ARCH__ __ARM_ARCH
  32 #   elif defined(__ARM_ARCH_8A__)
  33 #    define __ARM_ARCH__ 8
  34 #   elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)     || \
  35         defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__)     || \
  36         defined(__ARM_ARCH_7EM__)
  37 #    define __ARM_ARCH__ 7
  38 #   elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__)     || \
  39         defined(__ARM_ARCH_6K__)|| defined(__ARM_ARCH_6M__)     || \
  40         defined(__ARM_ARCH_6Z__)|| defined(__ARM_ARCH_6ZK__)    || \
  41         defined(__ARM_ARCH_6T2__)
  42 #    define __ARM_ARCH__ 6
  43 #   elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__)     || \
  44         defined(__ARM_ARCH_5E__)|| defined(__ARM_ARCH_5TE__)    || \
  45         defined(__ARM_ARCH_5TEJ__)
  46 #    define __ARM_ARCH__ 5
  47 #   elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
  48 #    define __ARM_ARCH__ 4
  49 #   else
  50 #    error "unsupported ARM architecture"
  51 #   endif
  52 #  endif
  53 # endif
  54
  55 # if !defined(__ARM_MAX_ARCH__)
  56 #  define __ARM_MAX_ARCH__ __ARM_ARCH__
  57 # endif
  58
  59 # if __ARM_MAX_ARCH__<__ARM_ARCH__
  60 #  error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__"
  61 # elif __ARM_MAX_ARCH__!=__ARM_ARCH__
  62 #  if __ARM_ARCH__<7 && __ARM_MAX_ARCH__>=7 && defined(__ARMEB__)
  63 #   error "can't build universal big-endian binary"
  64 #  endif
  65 # endif
  66
  67 # ifndef __ASSEMBLER__
  68 extern unsigned int OPENSSL_armcap_P;
  69 extern unsigned int OPENSSL_arm_midr;
  70 extern unsigned int OPENSSL_armv8_rsa_neonized;
  71 # endif
  72
  73 # define ARMV7_NEON      (1<<0)
  74 # define ARMV7_TICK      (1<<1)
  75 # define ARMV8_AES       (1<<2)
  76 # define ARMV8_SHA1      (1<<3)
  77 # define ARMV8_SHA256    (1<<4)
  78 # define ARMV8_PMULL     (1<<5)
  79 # define ARMV8_SHA512    (1<<6)
  80 # define ARMV8_CPUID     (1<<7)
  81 # define ARMV8_RNG       (1<<8)
  82 # define ARMV8_SM3       (1<<9)
  83 # define ARMV8_SM4       (1<<10)
  84 # define ARMV8_SHA3      (1<<11)
  85 # define ARMV8_UNROLL8_EOR3      (1<<12)
  86 # define ARMV8_SVE       (1<<13)
  87 # define ARMV8_SVE2      (1<<14)
  88
  89 /*
  90  * MIDR_EL1 system register
  91  *
  92  * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0
  93  * |            |             |         |         |          |        |
  94  * |RES0        | Implementer | Variant | Arch    | PartNum  |Revision|
  95  * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________|
  96  *
  97  */
  98
  99 # define ARM_CPU_IMP_ARM           0x41
 100
 101 # define ARM_CPU_PART_CORTEX_A72   0xD08
 102 # define ARM_CPU_PART_N1           0xD0C
 103 # define ARM_CPU_PART_V1           0xD40
 104
 105 # define MIDR_PARTNUM_SHIFT       4
 106 # define MIDR_PARTNUM_MASK        (0xfff << MIDR_PARTNUM_SHIFT)
 107 # define MIDR_PARTNUM(midr)       \
 108            (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
 109
 110 # define MIDR_IMPLEMENTER_SHIFT   24
 111 # define MIDR_IMPLEMENTER_MASK    (0xff << MIDR_IMPLEMENTER_SHIFT)
 112 # define MIDR_IMPLEMENTER(midr)   \
 113            (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT)
 114
 115 # define MIDR_ARCHITECTURE_SHIFT  16
 116 # define MIDR_ARCHITECTURE_MASK   (0xf << MIDR_ARCHITECTURE_SHIFT)
 117 # define MIDR_ARCHITECTURE(midr)  \
 118            (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
 119
 120 # define MIDR_CPU_MODEL_MASK \
 121            (MIDR_IMPLEMENTER_MASK | \
 122             MIDR_PARTNUM_MASK     | \
 123             MIDR_ARCHITECTURE_MASK)
 124
 125 # define MIDR_CPU_MODEL(imp, partnum) \
 126            (((imp)     << MIDR_IMPLEMENTER_SHIFT)  | \
 127             (0xf       << MIDR_ARCHITECTURE_SHIFT) | \
 128             ((partnum) << MIDR_PARTNUM_SHIFT))
 129
 130 # define MIDR_IS_CPU_MODEL(midr, imp, partnum) \
 131            (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum))
 132
 133 #if defined(__ASSEMBLER__)
 134
 135    /*
 136     * Support macros for
 137     *   - Armv8.3-A Pointer Authentication and
 138     *   - Armv8.5-A Branch Target Identification
 139     * features which require emitting a .note.gnu.property section with the
 140     * appropriate architecture-dependent feature bits set.
 141     * Read more: "ELF for the Arm® 64-bit Architecture"
 142     */
 143
 144 #  if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1
 145 #   define GNU_PROPERTY_AARCH64_BTI (1 << 0)   /* Has Branch Target Identification */
 146 #   define AARCH64_VALID_CALL_TARGET hint #34  /* BTI 'c' */
 147 #  else
 148 #   define GNU_PROPERTY_AARCH64_BTI 0  /* No Branch Target Identification */
 149 #   define AARCH64_VALID_CALL_TARGET
 150 #  endif
 151
 152 #  if defined(__ARM_FEATURE_PAC_DEFAULT) && \
 153        (__ARM_FEATURE_PAC_DEFAULT & 1) == 1  /* Signed with A-key */
 154 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
 155      (1 << 1)                                       /* Has Pointer Authentication */
 156 #   define AARCH64_SIGN_LINK_REGISTER hint #25      /* PACIASP */
 157 #   define AARCH64_VALIDATE_LINK_REGISTER hint #29  /* AUTIASP */
 158 #  elif defined(__ARM_FEATURE_PAC_DEFAULT) && \
 159        (__ARM_FEATURE_PAC_DEFAULT & 2) == 2  /* Signed with B-key */
 160 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
 161      (1 << 1)                                       /* Has Pointer Authentication */
 162 #   define AARCH64_SIGN_LINK_REGISTER hint #27      /* PACIBSP */
 163 #   define AARCH64_VALIDATE_LINK_REGISTER hint #31  /* AUTIBSP */
 164 #  else
 165 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH 0  /* No Pointer Authentication */
 166 #   if GNU_PROPERTY_AARCH64_BTI != 0
 167 #    define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET
 168 #   else
 169 #    define AARCH64_SIGN_LINK_REGISTER
 170 #   endif
 171 #   define AARCH64_VALIDATE_LINK_REGISTER
 172 #  endif
 173
 174 #  if GNU_PROPERTY_AARCH64_POINTER_AUTH != 0 || GNU_PROPERTY_AARCH64_BTI != 0
 175     .pushsection .note.gnu.property, "a";
 176     .balign 8;
 177     .long 4;
 178     .long 0x10;
 179     .long 0x5;
 180     .asciz "GNU";
 181     .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
 182     .long 4;
 183     .long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI);
 184     .long 0;
 185     .popsection;
 186 #  endif
 187
 188 # endif  /* defined __ASSEMBLER__ */
 189
 190 # define IS_CPU_SUPPORT_UNROLL8_EOR3() \
 191            (OPENSSL_armcap_P & ARMV8_UNROLL8_EOR3)
 192
 193 #endif