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git.ipfire.org Git - thirdparty/openssl.git/blob - crypto/armcap.c
10 unsigned int OPENSSL_armcap_P
= 0;
12 #if __ARM_MAX_ARCH__<7
13 void OPENSSL_cpuid_setup(void)
17 unsigned long OPENSSL_rdtsc(void)
22 static sigset_t all_masked
;
24 static sigjmp_buf ill_jmp
;
25 static void ill_handler(int sig
)
27 siglongjmp(ill_jmp
, sig
);
31 * Following subroutines could have been inlined, but it's not all
32 * ARM compilers support inline assembler...
34 void _armv7_neon_probe(void);
35 void _armv8_aes_probe(void);
36 void _armv8_sha1_probe(void);
37 void _armv8_sha256_probe(void);
38 void _armv8_pmull_probe(void);
39 unsigned long _armv7_tick(void);
41 unsigned long OPENSSL_rdtsc(void)
43 if (OPENSSL_armcap_P
& ARMV7_TICK
)
50 * Use a weak reference to getauxval() so we can use it if it is available but
51 * don't break the build if it is not.
53 # if defined(__GNUC__) && __GNUC__>=2
54 void OPENSSL_cpuid_setup(void) __attribute__ ((constructor
));
55 extern unsigned long getauxval(unsigned long type
) __attribute__ ((weak
));
57 static unsigned long (*getauxval
) (unsigned long) = NULL
;
61 * ARM puts the the feature bits for Crypto Extensions in AT_HWCAP2, whereas
62 * AArch64 used AT_HWCAP.
64 # if defined(__arm__) || defined (__arm)
67 # define HWCAP_NEON (1 << 12)
71 # define HWCAP_CE_AES (1 << 0)
72 # define HWCAP_CE_PMULL (1 << 1)
73 # define HWCAP_CE_SHA1 (1 << 2)
74 # define HWCAP_CE_SHA256 (1 << 3)
75 # elif defined(__aarch64__)
78 # define HWCAP_NEON (1 << 1)
80 # define HWCAP_CE HWCAP
81 # define HWCAP_CE_AES (1 << 3)
82 # define HWCAP_CE_PMULL (1 << 4)
83 # define HWCAP_CE_SHA1 (1 << 5)
84 # define HWCAP_CE_SHA256 (1 << 6)
87 void OPENSSL_cpuid_setup(void)
90 struct sigaction ill_oact
, ill_act
;
92 static int trigger
= 0;
98 if ((e
= getenv("OPENSSL_armcap"))) {
99 OPENSSL_armcap_P
= (unsigned int)strtoul(e
, NULL
, 0);
103 sigfillset(&all_masked
);
104 sigdelset(&all_masked
, SIGILL
);
105 sigdelset(&all_masked
, SIGTRAP
);
106 sigdelset(&all_masked
, SIGFPE
);
107 sigdelset(&all_masked
, SIGBUS
);
108 sigdelset(&all_masked
, SIGSEGV
);
110 OPENSSL_armcap_P
= 0;
112 memset(&ill_act
, 0, sizeof(ill_act
));
113 ill_act
.sa_handler
= ill_handler
;
114 ill_act
.sa_mask
= all_masked
;
116 sigprocmask(SIG_SETMASK
, &ill_act
.sa_mask
, &oset
);
117 sigaction(SIGILL
, &ill_act
, &ill_oact
);
119 if (getauxval
!= NULL
) {
120 if (getauxval(HWCAP
) & HWCAP_NEON
) {
121 unsigned long hwcap
= getauxval(HWCAP_CE
);
123 OPENSSL_armcap_P
|= ARMV7_NEON
;
125 if (hwcap
& HWCAP_CE_AES
)
126 OPENSSL_armcap_P
|= ARMV8_AES
;
128 if (hwcap
& HWCAP_CE_PMULL
)
129 OPENSSL_armcap_P
|= ARMV8_PMULL
;
131 if (hwcap
& HWCAP_CE_SHA1
)
132 OPENSSL_armcap_P
|= ARMV8_SHA1
;
134 if (hwcap
& HWCAP_CE_SHA256
)
135 OPENSSL_armcap_P
|= ARMV8_SHA256
;
137 } else if (sigsetjmp(ill_jmp
, 1) == 0) {
139 OPENSSL_armcap_P
|= ARMV7_NEON
;
140 if (sigsetjmp(ill_jmp
, 1) == 0) {
141 _armv8_pmull_probe();
142 OPENSSL_armcap_P
|= ARMV8_PMULL
| ARMV8_AES
;
143 } else if (sigsetjmp(ill_jmp
, 1) == 0) {
145 OPENSSL_armcap_P
|= ARMV8_AES
;
147 if (sigsetjmp(ill_jmp
, 1) == 0) {
149 OPENSSL_armcap_P
|= ARMV8_SHA1
;
151 if (sigsetjmp(ill_jmp
, 1) == 0) {
152 _armv8_sha256_probe();
153 OPENSSL_armcap_P
|= ARMV8_SHA256
;
156 if (sigsetjmp(ill_jmp
, 1) == 0) {
158 OPENSSL_armcap_P
|= ARMV7_TICK
;
161 sigaction(SIGILL
, &ill_oact
, NULL
);
162 sigprocmask(SIG_SETMASK
, &oset
, NULL
);