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Optimize RSA on armv8
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1 /*
2 * Copyright 2011-2021 The OpenSSL Project Authors. All Rights Reserved.
3 *
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
8 */
9
10 #include <stdio.h>
11 #include <stdlib.h>
12 #include <string.h>
13 #include <setjmp.h>
14 #include <signal.h>
15 #include <openssl/crypto.h>
16 #include "internal/cryptlib.h"
17
18 #include "arm_arch.h"
19
20 unsigned int OPENSSL_armcap_P = 0;
21 unsigned int OPENSSL_arm_midr = 0;
22 unsigned int OPENSSL_armv8_rsa_neonized = 0;
23
24 #if __ARM_MAX_ARCH__<7
25 void OPENSSL_cpuid_setup(void)
26 {
27 }
28
29 uint32_t OPENSSL_rdtsc(void)
30 {
31 return 0;
32 }
33 #else
34 static sigset_t all_masked;
35
36 static sigjmp_buf ill_jmp;
37 static void ill_handler(int sig)
38 {
39 siglongjmp(ill_jmp, sig);
40 }
41
42 /*
43 * Following subroutines could have been inlined, but it's not all
44 * ARM compilers support inline assembler...
45 */
46 void _armv7_neon_probe(void);
47 void _armv8_aes_probe(void);
48 void _armv8_sha1_probe(void);
49 void _armv8_sha256_probe(void);
50 void _armv8_pmull_probe(void);
51 # ifdef __aarch64__
52 void _armv8_sha512_probe(void);
53 unsigned int _armv8_cpuid_probe(void);
54 # endif
55 uint32_t _armv7_tick(void);
56
57 uint32_t OPENSSL_rdtsc(void)
58 {
59 if (OPENSSL_armcap_P & ARMV7_TICK)
60 return _armv7_tick();
61 else
62 return 0;
63 }
64
65 # if defined(__GNUC__) && __GNUC__>=2
66 void OPENSSL_cpuid_setup(void) __attribute__ ((constructor));
67 # endif
68
69 # if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
70 # if __GLIBC_PREREQ(2, 16)
71 # include <sys/auxv.h>
72 # define OSSL_IMPLEMENT_GETAUXVAL
73 # endif
74 # endif
75 # if defined(__FreeBSD__)
76 # include <sys/param.h>
77 # if __FreeBSD_version >= 1200000
78 # include <sys/auxv.h>
79 # define OSSL_IMPLEMENT_GETAUXVAL
80
81 static unsigned long getauxval(unsigned long key)
82 {
83 unsigned long val = 0ul;
84
85 if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
86 return 0ul;
87
88 return val;
89 }
90 # endif
91 # endif
92
93 /*
94 * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
95 * AArch64 used AT_HWCAP.
96 */
97 # if defined(__arm__) || defined (__arm)
98 # define HWCAP 16
99 /* AT_HWCAP */
100 # define HWCAP_NEON (1 << 12)
101
102 # define HWCAP_CE 26
103 /* AT_HWCAP2 */
104 # define HWCAP_CE_AES (1 << 0)
105 # define HWCAP_CE_PMULL (1 << 1)
106 # define HWCAP_CE_SHA1 (1 << 2)
107 # define HWCAP_CE_SHA256 (1 << 3)
108 # elif defined(__aarch64__)
109 # define HWCAP 16
110 /* AT_HWCAP */
111 # define HWCAP_NEON (1 << 1)
112
113 # define HWCAP_CE HWCAP
114 # define HWCAP_CE_AES (1 << 3)
115 # define HWCAP_CE_PMULL (1 << 4)
116 # define HWCAP_CE_SHA1 (1 << 5)
117 # define HWCAP_CE_SHA256 (1 << 6)
118 # define HWCAP_CPUID (1 << 11)
119 # define HWCAP_CE_SHA512 (1 << 21)
120 # endif
121
122 void OPENSSL_cpuid_setup(void)
123 {
124 const char *e;
125 struct sigaction ill_oact, ill_act;
126 sigset_t oset;
127 static int trigger = 0;
128
129 if (trigger)
130 return;
131 trigger = 1;
132
133 if ((e = getenv("OPENSSL_armcap"))) {
134 OPENSSL_armcap_P = (unsigned int)strtoul(e, NULL, 0);
135 return;
136 }
137
138 # if defined(__APPLE__) && !defined(__aarch64__)
139 /*
140 * Capability probing by catching SIGILL appears to be problematic
141 * on iOS. But since Apple universe is "monocultural", it's actually
142 * possible to simply set pre-defined processor capability mask.
143 */
144 if (1) {
145 OPENSSL_armcap_P = ARMV7_NEON;
146 return;
147 }
148 /*
149 * One could do same even for __aarch64__ iOS builds. It's not done
150 * exclusively for reasons of keeping code unified across platforms.
151 * Unified code works because it never triggers SIGILL on Apple
152 * devices...
153 */
154 # endif
155
156 OPENSSL_armcap_P = 0;
157
158 # ifdef OSSL_IMPLEMENT_GETAUXVAL
159 if (getauxval(HWCAP) & HWCAP_NEON) {
160 unsigned long hwcap = getauxval(HWCAP_CE);
161
162 OPENSSL_armcap_P |= ARMV7_NEON;
163
164 if (hwcap & HWCAP_CE_AES)
165 OPENSSL_armcap_P |= ARMV8_AES;
166
167 if (hwcap & HWCAP_CE_PMULL)
168 OPENSSL_armcap_P |= ARMV8_PMULL;
169
170 if (hwcap & HWCAP_CE_SHA1)
171 OPENSSL_armcap_P |= ARMV8_SHA1;
172
173 if (hwcap & HWCAP_CE_SHA256)
174 OPENSSL_armcap_P |= ARMV8_SHA256;
175
176 # ifdef __aarch64__
177 if (hwcap & HWCAP_CE_SHA512)
178 OPENSSL_armcap_P |= ARMV8_SHA512;
179
180 if (hwcap & HWCAP_CPUID)
181 OPENSSL_armcap_P |= ARMV8_CPUID;
182 # endif
183 }
184 # endif
185
186 sigfillset(&all_masked);
187 sigdelset(&all_masked, SIGILL);
188 sigdelset(&all_masked, SIGTRAP);
189 sigdelset(&all_masked, SIGFPE);
190 sigdelset(&all_masked, SIGBUS);
191 sigdelset(&all_masked, SIGSEGV);
192
193 memset(&ill_act, 0, sizeof(ill_act));
194 ill_act.sa_handler = ill_handler;
195 ill_act.sa_mask = all_masked;
196
197 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
198 sigaction(SIGILL, &ill_act, &ill_oact);
199
200 /* If we used getauxval, we already have all the values */
201 # ifndef OSSL_IMPLEMENT_GETAUXVAL
202 if (sigsetjmp(ill_jmp, 1) == 0) {
203 _armv7_neon_probe();
204 OPENSSL_armcap_P |= ARMV7_NEON;
205 if (sigsetjmp(ill_jmp, 1) == 0) {
206 _armv8_pmull_probe();
207 OPENSSL_armcap_P |= ARMV8_PMULL | ARMV8_AES;
208 } else if (sigsetjmp(ill_jmp, 1) == 0) {
209 _armv8_aes_probe();
210 OPENSSL_armcap_P |= ARMV8_AES;
211 }
212 if (sigsetjmp(ill_jmp, 1) == 0) {
213 _armv8_sha1_probe();
214 OPENSSL_armcap_P |= ARMV8_SHA1;
215 }
216 if (sigsetjmp(ill_jmp, 1) == 0) {
217 _armv8_sha256_probe();
218 OPENSSL_armcap_P |= ARMV8_SHA256;
219 }
220 # if defined(__aarch64__) && !defined(__APPLE__)
221 if (sigsetjmp(ill_jmp, 1) == 0) {
222 _armv8_sha512_probe();
223 OPENSSL_armcap_P |= ARMV8_SHA512;
224 }
225 # endif
226 }
227 # endif
228
229 /* Things that getauxval didn't tell us */
230 if (sigsetjmp(ill_jmp, 1) == 0) {
231 _armv7_tick();
232 OPENSSL_armcap_P |= ARMV7_TICK;
233 }
234
235 sigaction(SIGILL, &ill_oact, NULL);
236 sigprocmask(SIG_SETMASK, &oset, NULL);
237
238 # ifdef __aarch64__
239 if (OPENSSL_armcap_P & ARMV8_CPUID)
240 OPENSSL_arm_midr = _armv8_cpuid_probe();
241
242 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) ||
243 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N1)) &&
244 (OPENSSL_armcap_P & ARMV7_NEON)) {
245 OPENSSL_armv8_rsa_neonized = 1;
246 }
247 # endif
248 }
249 #endif