2 * Copyright 2011-2021 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
15 #include <openssl/crypto.h>
17 #include <sys/sysctl.h>
19 #include "internal/cryptlib.h"
24 unsigned int OPENSSL_armcap_P
= 0;
25 unsigned int OPENSSL_arm_midr
= 0;
26 unsigned int OPENSSL_armv8_rsa_neonized
= 0;
28 #if __ARM_MAX_ARCH__<7
29 void OPENSSL_cpuid_setup(void)
33 uint32_t OPENSSL_rdtsc(void)
38 static sigset_t all_masked
;
40 static sigjmp_buf ill_jmp
;
41 static void ill_handler(int sig
)
43 siglongjmp(ill_jmp
, sig
);
47 * Following subroutines could have been inlined, but it's not all
48 * ARM compilers support inline assembler...
50 void _armv7_neon_probe(void);
51 void _armv8_aes_probe(void);
52 void _armv8_sha1_probe(void);
53 void _armv8_sha256_probe(void);
54 void _armv8_pmull_probe(void);
56 void _armv8_sm3_probe(void);
57 void _armv8_sm4_probe(void);
58 void _armv8_sha512_probe(void);
59 unsigned int _armv8_cpuid_probe(void);
60 void _armv8_rng_probe(void);
62 size_t OPENSSL_rndr_asm(unsigned char *buf
, size_t len
);
63 size_t OPENSSL_rndrrs_asm(unsigned char *buf
, size_t len
);
65 size_t OPENSSL_rndr_bytes(unsigned char *buf
, size_t len
);
66 size_t OPENSSL_rndrrs_bytes(unsigned char *buf
, size_t len
);
68 static size_t OPENSSL_rndr_wrapper(size_t (*func
)(unsigned char *, size_t), unsigned char *buf
, size_t len
)
70 size_t buffer_size
= 0;
73 for (i
= 0; i
< 8; i
++) {
74 buffer_size
= func(buf
, len
);
75 if (buffer_size
== len
)
77 usleep(5000); /* 5000 microseconds (5 milliseconds) */
82 size_t OPENSSL_rndr_bytes(unsigned char *buf
, size_t len
)
84 return OPENSSL_rndr_wrapper(OPENSSL_rndr_asm
, buf
, len
);
87 size_t OPENSSL_rndrrs_bytes(unsigned char *buf
, size_t len
)
89 return OPENSSL_rndr_wrapper(OPENSSL_rndrrs_asm
, buf
, len
);
92 uint32_t _armv7_tick(void);
94 uint32_t OPENSSL_rdtsc(void)
96 if (OPENSSL_armcap_P
& ARMV7_TICK
)
102 # if defined(__GNUC__) && __GNUC__>=2
103 void OPENSSL_cpuid_setup(void) __attribute__ ((constructor
));
106 # if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
107 # if __GLIBC_PREREQ(2, 16)
108 # include <sys/auxv.h>
109 # define OSSL_IMPLEMENT_GETAUXVAL
111 # elif defined(__ANDROID_API__)
112 /* see https://developer.android.google.cn/ndk/guides/cpu-features */
113 # if __ANDROID_API__ >= 18
114 # include <sys/auxv.h>
115 # define OSSL_IMPLEMENT_GETAUXVAL
118 # if defined(__FreeBSD__)
119 # include <sys/param.h>
120 # if __FreeBSD_version >= 1200000
121 # include <sys/auxv.h>
122 # define OSSL_IMPLEMENT_GETAUXVAL
124 static unsigned long getauxval(unsigned long key
)
126 unsigned long val
= 0ul;
128 if (elf_aux_info((int)key
, &val
, sizeof(val
)) != 0)
137 * Android: according to https://developer.android.com/ndk/guides/cpu-features,
138 * getauxval is supported starting with API level 18
140 # if defined(__ANDROID__) && defined(__ANDROID_API__) && __ANDROID_API__ >= 18
141 # include <sys/auxv.h>
142 # define OSSL_IMPLEMENT_GETAUXVAL
146 * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
147 * AArch64 used AT_HWCAP.
153 # define AT_HWCAP2 26
155 # if defined(__arm__) || defined (__arm)
156 # define HWCAP AT_HWCAP
157 # define HWCAP_NEON (1 << 12)
159 # define HWCAP_CE AT_HWCAP2
160 # define HWCAP_CE_AES (1 << 0)
161 # define HWCAP_CE_PMULL (1 << 1)
162 # define HWCAP_CE_SHA1 (1 << 2)
163 # define HWCAP_CE_SHA256 (1 << 3)
164 # elif defined(__aarch64__)
165 # define HWCAP AT_HWCAP
166 # define HWCAP_NEON (1 << 1)
168 # define HWCAP_CE HWCAP
169 # define HWCAP_CE_AES (1 << 3)
170 # define HWCAP_CE_PMULL (1 << 4)
171 # define HWCAP_CE_SHA1 (1 << 5)
172 # define HWCAP_CE_SHA256 (1 << 6)
173 # define HWCAP_CPUID (1 << 11)
174 # define HWCAP_SHA3 (1 << 17)
175 # define HWCAP_CE_SM3 (1 << 18)
176 # define HWCAP_CE_SM4 (1 << 19)
177 # define HWCAP_CE_SHA512 (1 << 21)
180 # define HWCAP2_RNG (1 << 16)
183 void OPENSSL_cpuid_setup(void)
186 struct sigaction ill_oact
, ill_act
;
188 static int trigger
= 0;
194 OPENSSL_armcap_P
= 0;
196 if ((e
= getenv("OPENSSL_armcap"))) {
197 OPENSSL_armcap_P
= (unsigned int)strtoul(e
, NULL
, 0);
201 # if defined(__APPLE__)
202 # if !defined(__aarch64__)
204 * Capability probing by catching SIGILL appears to be problematic
205 * on iOS. But since Apple universe is "monocultural", it's actually
206 * possible to simply set pre-defined processor capability mask.
209 OPENSSL_armcap_P
= ARMV7_NEON
;
213 * One could do same even for __aarch64__ iOS builds. It's not done
214 * exclusively for reasons of keeping code unified across platforms.
215 * Unified code works because it never triggers SIGILL on Apple
220 unsigned int feature
;
221 size_t len
= sizeof(feature
);
224 if (sysctlbyname("hw.optional.armv8_2_sha512", &feature
, &len
, NULL
, 0) == 0 && feature
== 1)
225 OPENSSL_armcap_P
|= ARMV8_SHA512
;
227 if (sysctlbyname("hw.optional.armv8_2_sha3", &feature
, &len
, NULL
, 0) == 0 && feature
== 1) {
228 OPENSSL_armcap_P
|= ARMV8_SHA3
;
230 if ((sysctlbyname("machdep.cpu.brand_string", uarch
, &len
, NULL
, 0) == 0) &&
231 (strncmp(uarch
, "Apple M1", 8) == 0))
232 OPENSSL_armcap_P
|= ARMV8_UNROLL8_EOR3
;
238 # ifdef OSSL_IMPLEMENT_GETAUXVAL
239 if (getauxval(HWCAP
) & HWCAP_NEON
) {
240 unsigned long hwcap
= getauxval(HWCAP_CE
);
242 OPENSSL_armcap_P
|= ARMV7_NEON
;
244 if (hwcap
& HWCAP_CE_AES
)
245 OPENSSL_armcap_P
|= ARMV8_AES
;
247 if (hwcap
& HWCAP_CE_PMULL
)
248 OPENSSL_armcap_P
|= ARMV8_PMULL
;
250 if (hwcap
& HWCAP_CE_SHA1
)
251 OPENSSL_armcap_P
|= ARMV8_SHA1
;
253 if (hwcap
& HWCAP_CE_SHA256
)
254 OPENSSL_armcap_P
|= ARMV8_SHA256
;
257 if (hwcap
& HWCAP_CE_SM4
)
258 OPENSSL_armcap_P
|= ARMV8_SM4
;
260 if (hwcap
& HWCAP_CE_SHA512
)
261 OPENSSL_armcap_P
|= ARMV8_SHA512
;
263 if (hwcap
& HWCAP_CPUID
)
264 OPENSSL_armcap_P
|= ARMV8_CPUID
;
266 if (hwcap
& HWCAP_CE_SM3
)
267 OPENSSL_armcap_P
|= ARMV8_SM3
;
268 if (hwcap
& HWCAP_SHA3
)
269 OPENSSL_armcap_P
|= ARMV8_SHA3
;
273 if (getauxval(HWCAP2
) & HWCAP2_RNG
)
274 OPENSSL_armcap_P
|= ARMV8_RNG
;
278 sigfillset(&all_masked
);
279 sigdelset(&all_masked
, SIGILL
);
280 sigdelset(&all_masked
, SIGTRAP
);
281 sigdelset(&all_masked
, SIGFPE
);
282 sigdelset(&all_masked
, SIGBUS
);
283 sigdelset(&all_masked
, SIGSEGV
);
285 memset(&ill_act
, 0, sizeof(ill_act
));
286 ill_act
.sa_handler
= ill_handler
;
287 ill_act
.sa_mask
= all_masked
;
289 sigprocmask(SIG_SETMASK
, &ill_act
.sa_mask
, &oset
);
290 sigaction(SIGILL
, &ill_act
, &ill_oact
);
292 /* If we used getauxval, we already have all the values */
293 # ifndef OSSL_IMPLEMENT_GETAUXVAL
294 if (sigsetjmp(ill_jmp
, 1) == 0) {
296 OPENSSL_armcap_P
|= ARMV7_NEON
;
297 if (sigsetjmp(ill_jmp
, 1) == 0) {
298 _armv8_pmull_probe();
299 OPENSSL_armcap_P
|= ARMV8_PMULL
| ARMV8_AES
;
300 } else if (sigsetjmp(ill_jmp
, 1) == 0) {
302 OPENSSL_armcap_P
|= ARMV8_AES
;
304 if (sigsetjmp(ill_jmp
, 1) == 0) {
306 OPENSSL_armcap_P
|= ARMV8_SHA1
;
308 if (sigsetjmp(ill_jmp
, 1) == 0) {
309 _armv8_sha256_probe();
310 OPENSSL_armcap_P
|= ARMV8_SHA256
;
312 # if defined(__aarch64__) && !defined(__APPLE__)
313 if (sigsetjmp(ill_jmp
, 1) == 0) {
315 OPENSSL_armcap_P
|= ARMV8_SM4
;
318 if (sigsetjmp(ill_jmp
, 1) == 0) {
319 _armv8_sha512_probe();
320 OPENSSL_armcap_P
|= ARMV8_SHA512
;
323 if (sigsetjmp(ill_jmp
, 1) == 0) {
325 OPENSSL_armcap_P
|= ARMV8_SM3
;
326 if (sigsetjmp(ill_jmp
, 1) == 0) {
328 OPENSSL_armcap_P
|= ARMV8_SHA3
;
333 if (sigsetjmp(ill_jmp
, 1) == 0) {
335 OPENSSL_armcap_P
|= ARMV8_RNG
;
340 /* Things that getauxval didn't tell us */
341 if (sigsetjmp(ill_jmp
, 1) == 0) {
343 OPENSSL_armcap_P
|= ARMV7_TICK
;
346 sigaction(SIGILL
, &ill_oact
, NULL
);
347 sigprocmask(SIG_SETMASK
, &oset
, NULL
);
350 if (OPENSSL_armcap_P
& ARMV8_CPUID
)
351 OPENSSL_arm_midr
= _armv8_cpuid_probe();
353 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr
, ARM_CPU_IMP_ARM
, ARM_CPU_PART_CORTEX_A72
) ||
354 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr
, ARM_CPU_IMP_ARM
, ARM_CPU_PART_N1
)) &&
355 (OPENSSL_armcap_P
& ARMV7_NEON
)) {
356 OPENSSL_armv8_rsa_neonized
= 1;
358 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr
, ARM_CPU_IMP_ARM
, ARM_CPU_PART_V1
)) &&
359 (OPENSSL_armcap_P
& ARMV8_SHA3
))
360 OPENSSL_armcap_P
|= ARMV8_UNROLL8_EOR3
;