2 * Copyright 2011-2021 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
15 #include <openssl/crypto.h>
17 #include <sys/sysctl.h>
19 #include "internal/cryptlib.h"
23 unsigned int OPENSSL_armcap_P
= 0;
24 unsigned int OPENSSL_arm_midr
= 0;
25 unsigned int OPENSSL_armv8_rsa_neonized
= 0;
27 #if __ARM_MAX_ARCH__<7
28 void OPENSSL_cpuid_setup(void)
32 uint32_t OPENSSL_rdtsc(void)
37 static sigset_t all_masked
;
39 static sigjmp_buf ill_jmp
;
40 static void ill_handler(int sig
)
42 siglongjmp(ill_jmp
, sig
);
46 * Following subroutines could have been inlined, but it's not all
47 * ARM compilers support inline assembler...
49 void _armv7_neon_probe(void);
50 void _armv8_aes_probe(void);
51 void _armv8_sha1_probe(void);
52 void _armv8_sha256_probe(void);
53 void _armv8_pmull_probe(void);
55 void _armv8_sha512_probe(void);
56 unsigned int _armv8_cpuid_probe(void);
58 uint32_t _armv7_tick(void);
60 uint32_t OPENSSL_rdtsc(void)
62 if (OPENSSL_armcap_P
& ARMV7_TICK
)
68 # if defined(__GNUC__) && __GNUC__>=2
69 void OPENSSL_cpuid_setup(void) __attribute__ ((constructor
));
72 # if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
73 # if __GLIBC_PREREQ(2, 16)
74 # include <sys/auxv.h>
75 # define OSSL_IMPLEMENT_GETAUXVAL
78 # if defined(__FreeBSD__)
79 # include <sys/param.h>
80 # if __FreeBSD_version >= 1200000
81 # include <sys/auxv.h>
82 # define OSSL_IMPLEMENT_GETAUXVAL
84 static unsigned long getauxval(unsigned long key
)
86 unsigned long val
= 0ul;
88 if (elf_aux_info((int)key
, &val
, sizeof(val
)) != 0)
97 * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
98 * AArch64 used AT_HWCAP.
100 # if defined(__arm__) || defined (__arm)
103 # define HWCAP_NEON (1 << 12)
107 # define HWCAP_CE_AES (1 << 0)
108 # define HWCAP_CE_PMULL (1 << 1)
109 # define HWCAP_CE_SHA1 (1 << 2)
110 # define HWCAP_CE_SHA256 (1 << 3)
111 # elif defined(__aarch64__)
114 # define HWCAP_NEON (1 << 1)
116 # define HWCAP_CE HWCAP
117 # define HWCAP_CE_AES (1 << 3)
118 # define HWCAP_CE_PMULL (1 << 4)
119 # define HWCAP_CE_SHA1 (1 << 5)
120 # define HWCAP_CE_SHA256 (1 << 6)
121 # define HWCAP_CPUID (1 << 11)
122 # define HWCAP_CE_SHA512 (1 << 21)
125 void OPENSSL_cpuid_setup(void)
128 struct sigaction ill_oact
, ill_act
;
130 static int trigger
= 0;
136 if ((e
= getenv("OPENSSL_armcap"))) {
137 OPENSSL_armcap_P
= (unsigned int)strtoul(e
, NULL
, 0);
141 # if defined(__APPLE__)
142 # if !defined(__aarch64__)
144 * Capability probing by catching SIGILL appears to be problematic
145 * on iOS. But since Apple universe is "monocultural", it's actually
146 * possible to simply set pre-defined processor capability mask.
149 OPENSSL_armcap_P
= ARMV7_NEON
;
153 * One could do same even for __aarch64__ iOS builds. It's not done
154 * exclusively for reasons of keeping code unified across platforms.
155 * Unified code works because it never triggers SIGILL on Apple
161 size_t len
= sizeof(sha512
);
163 if (sysctlbyname("hw.optional.armv8_2_sha512", &sha512
, &len
, NULL
, 0) == 0 && sha512
== 1)
164 OPENSSL_armcap_P
|= ARMV8_SHA512
;
169 OPENSSL_armcap_P
= 0;
171 # ifdef OSSL_IMPLEMENT_GETAUXVAL
172 if (getauxval(HWCAP
) & HWCAP_NEON
) {
173 unsigned long hwcap
= getauxval(HWCAP_CE
);
175 OPENSSL_armcap_P
|= ARMV7_NEON
;
177 if (hwcap
& HWCAP_CE_AES
)
178 OPENSSL_armcap_P
|= ARMV8_AES
;
180 if (hwcap
& HWCAP_CE_PMULL
)
181 OPENSSL_armcap_P
|= ARMV8_PMULL
;
183 if (hwcap
& HWCAP_CE_SHA1
)
184 OPENSSL_armcap_P
|= ARMV8_SHA1
;
186 if (hwcap
& HWCAP_CE_SHA256
)
187 OPENSSL_armcap_P
|= ARMV8_SHA256
;
190 if (hwcap
& HWCAP_CE_SHA512
)
191 OPENSSL_armcap_P
|= ARMV8_SHA512
;
193 if (hwcap
& HWCAP_CPUID
)
194 OPENSSL_armcap_P
|= ARMV8_CPUID
;
199 sigfillset(&all_masked
);
200 sigdelset(&all_masked
, SIGILL
);
201 sigdelset(&all_masked
, SIGTRAP
);
202 sigdelset(&all_masked
, SIGFPE
);
203 sigdelset(&all_masked
, SIGBUS
);
204 sigdelset(&all_masked
, SIGSEGV
);
206 memset(&ill_act
, 0, sizeof(ill_act
));
207 ill_act
.sa_handler
= ill_handler
;
208 ill_act
.sa_mask
= all_masked
;
210 sigprocmask(SIG_SETMASK
, &ill_act
.sa_mask
, &oset
);
211 sigaction(SIGILL
, &ill_act
, &ill_oact
);
213 /* If we used getauxval, we already have all the values */
214 # ifndef OSSL_IMPLEMENT_GETAUXVAL
215 if (sigsetjmp(ill_jmp
, 1) == 0) {
217 OPENSSL_armcap_P
|= ARMV7_NEON
;
218 if (sigsetjmp(ill_jmp
, 1) == 0) {
219 _armv8_pmull_probe();
220 OPENSSL_armcap_P
|= ARMV8_PMULL
| ARMV8_AES
;
221 } else if (sigsetjmp(ill_jmp
, 1) == 0) {
223 OPENSSL_armcap_P
|= ARMV8_AES
;
225 if (sigsetjmp(ill_jmp
, 1) == 0) {
227 OPENSSL_armcap_P
|= ARMV8_SHA1
;
229 if (sigsetjmp(ill_jmp
, 1) == 0) {
230 _armv8_sha256_probe();
231 OPENSSL_armcap_P
|= ARMV8_SHA256
;
233 # if defined(__aarch64__) && !defined(__APPLE__)
234 if (sigsetjmp(ill_jmp
, 1) == 0) {
235 _armv8_sha512_probe();
236 OPENSSL_armcap_P
|= ARMV8_SHA512
;
242 /* Things that getauxval didn't tell us */
243 if (sigsetjmp(ill_jmp
, 1) == 0) {
245 OPENSSL_armcap_P
|= ARMV7_TICK
;
248 sigaction(SIGILL
, &ill_oact
, NULL
);
249 sigprocmask(SIG_SETMASK
, &oset
, NULL
);
252 if (OPENSSL_armcap_P
& ARMV8_CPUID
)
253 OPENSSL_arm_midr
= _armv8_cpuid_probe();
255 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr
, ARM_CPU_IMP_ARM
, ARM_CPU_PART_CORTEX_A72
) ||
256 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr
, ARM_CPU_IMP_ARM
, ARM_CPU_PART_N1
)) &&
257 (OPENSSL_armcap_P
& ARMV7_NEON
)) {
258 OPENSSL_armv8_rsa_neonized
= 1;