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git.ipfire.org Git - thirdparty/openssl.git/blob - crypto/ppccap.c
2 * Copyright 2009-2016 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the OpenSSL license (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
16 #if defined(__linux) || defined(_AIX)
17 # include <sys/utsname.h>
19 #if defined(_AIX53) /* defined even on post-5.3 */
20 # include <sys/systemcfg.h>
21 # if !defined(__power_set)
22 # define __power_set(a) (_system_configuration.implementation & (a))
25 #if defined(__APPLE__) && defined(__MACH__)
26 # include <sys/types.h>
27 # include <sys/sysctl.h>
29 #include <openssl/crypto.h>
30 #include <openssl/bn.h>
34 unsigned int OPENSSL_ppccap_P
= 0;
36 static sigset_t all_masked
;
38 #ifdef OPENSSL_BN_ASM_MONT
39 int bn_mul_mont(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
40 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
)
42 int bn_mul_mont_int(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
43 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
);
44 int bn_mul4x_mont_int(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
45 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
);
51 return bn_mul4x_mont_int(rp
, ap
, bp
, np
, n0
, num
);
54 * There used to be [optional] call to bn_mul_mont_fpu64 here,
55 * but above subroutine is faster on contemporary processors.
56 * Formulation means that there might be old processors where
57 * FPU code path would be faster, POWER6 perhaps, but there was
58 * no opportunity to figure it out...
61 return bn_mul_mont_int(rp
, ap
, bp
, np
, n0
, num
);
65 void sha256_block_p8(void *ctx
, const void *inp
, size_t len
);
66 void sha256_block_ppc(void *ctx
, const void *inp
, size_t len
);
67 void sha256_block_data_order(void *ctx
, const void *inp
, size_t len
)
69 OPENSSL_ppccap_P
& PPC_CRYPTO207
? sha256_block_p8(ctx
, inp
, len
) :
70 sha256_block_ppc(ctx
, inp
, len
);
73 void sha512_block_p8(void *ctx
, const void *inp
, size_t len
);
74 void sha512_block_ppc(void *ctx
, const void *inp
, size_t len
);
75 void sha512_block_data_order(void *ctx
, const void *inp
, size_t len
)
77 OPENSSL_ppccap_P
& PPC_CRYPTO207
? sha512_block_p8(ctx
, inp
, len
) :
78 sha512_block_ppc(ctx
, inp
, len
);
81 #ifndef OPENSSL_NO_CHACHA
82 void ChaCha20_ctr32_int(unsigned char *out
, const unsigned char *inp
,
83 size_t len
, const unsigned int key
[8],
84 const unsigned int counter
[4]);
85 void ChaCha20_ctr32_vmx(unsigned char *out
, const unsigned char *inp
,
86 size_t len
, const unsigned int key
[8],
87 const unsigned int counter
[4]);
88 void ChaCha20_ctr32(unsigned char *out
, const unsigned char *inp
,
89 size_t len
, const unsigned int key
[8],
90 const unsigned int counter
[4])
92 OPENSSL_ppccap_P
& PPC_ALTIVEC
93 ? ChaCha20_ctr32_vmx(out
, inp
, len
, key
, counter
)
94 : ChaCha20_ctr32_int(out
, inp
, len
, key
, counter
);
98 #ifndef OPENSSL_NO_POLY1305
99 void poly1305_init_int(void *ctx
, const unsigned char key
[16]);
100 void poly1305_blocks(void *ctx
, const unsigned char *inp
, size_t len
,
101 unsigned int padbit
);
102 void poly1305_emit(void *ctx
, unsigned char mac
[16],
103 const unsigned int nonce
[4]);
104 void poly1305_init_fpu(void *ctx
, const unsigned char key
[16]);
105 void poly1305_blocks_fpu(void *ctx
, const unsigned char *inp
, size_t len
,
106 unsigned int padbit
);
107 void poly1305_emit_fpu(void *ctx
, unsigned char mac
[16],
108 const unsigned int nonce
[4]);
109 int poly1305_init(void *ctx
, const unsigned char key
[16], void *func
[2])
111 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P
& PPC_FPU
)) {
112 poly1305_init_fpu(ctx
, key
);
113 func
[0] = poly1305_blocks_fpu
;
114 func
[1] = poly1305_emit_fpu
;
116 poly1305_init_int(ctx
, key
);
117 func
[0] = poly1305_blocks
;
118 func
[1] = poly1305_emit
;
124 #ifdef ECP_NISTZ256_ASM
125 void ecp_nistz256_mul_mont(unsigned long res
[4], const unsigned long a
[4],
126 const unsigned long b
[4]);
128 void ecp_nistz256_to_mont(unsigned long res
[4], const unsigned long in
[4]);
129 void ecp_nistz256_to_mont(unsigned long res
[4], const unsigned long in
[4])
131 static const unsigned long RR
[] = { 0x0000000000000003U
,
134 0x00000004fffffffdU
};
136 ecp_nistz256_mul_mont(res
, in
, RR
);
139 void ecp_nistz256_from_mont(unsigned long res
[4], const unsigned long in
[4]);
140 void ecp_nistz256_from_mont(unsigned long res
[4], const unsigned long in
[4])
142 static const unsigned long one
[] = { 1, 0, 0, 0 };
144 ecp_nistz256_mul_mont(res
, in
, one
);
148 static sigjmp_buf ill_jmp
;
149 static void ill_handler(int sig
)
151 siglongjmp(ill_jmp
, sig
);
154 void OPENSSL_fpu_probe(void);
155 void OPENSSL_ppc64_probe(void);
156 void OPENSSL_altivec_probe(void);
157 void OPENSSL_crypto207_probe(void);
158 void OPENSSL_madd300_probe(void);
161 * Use a weak reference to getauxval() so we can use it if it is available
162 * but don't break the build if it is not. Note that this is *link-time*
163 * feature detection, not *run-time*. In other words if we link with
164 * symbol present, it's expected to be present even at run-time.
166 #if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
167 extern unsigned long getauxval(unsigned long type
) __attribute__ ((weak
));
169 static unsigned long (*getauxval
) (unsigned long) = NULL
;
172 /* I wish <sys/auxv.h> was universally available */
173 #define HWCAP 16 /* AT_HWCAP */
174 #define HWCAP_PPC64 (1U << 30)
175 #define HWCAP_ALTIVEC (1U << 28)
176 #define HWCAP_FPU (1U << 27)
177 #define HWCAP_POWER6_EXT (1U << 9)
178 #define HWCAP_VSX (1U << 7)
180 #define HWCAP2 26 /* AT_HWCAP2 */
181 #define HWCAP_VEC_CRYPTO (1U << 25)
182 #define HWCAP_ARCH_3_00 (1U << 23)
184 # if defined(__GNUC__) && __GNUC__>=2
185 __attribute__ ((constructor
))
187 void OPENSSL_cpuid_setup(void)
190 struct sigaction ill_oact
, ill_act
;
192 static int trigger
= 0;
198 if ((e
= getenv("OPENSSL_ppccap"))) {
199 OPENSSL_ppccap_P
= strtoul(e
, NULL
, 0);
203 OPENSSL_ppccap_P
= 0;
206 OPENSSL_ppccap_P
|= PPC_FPU
;
208 if (sizeof(size_t) == 4) {
210 # if defined(_SC_AIX_KERNEL_BITMODE)
211 if (sysconf(_SC_AIX_KERNEL_BITMODE
) != 64)
214 if (uname(&uts
) != 0 || atoi(uts
.version
) < 6)
218 # if defined(__power_set)
220 * Value used in __power_set is a single-bit 1<<n one denoting
221 * specific processor class. Incidentally 0xffffffff<<n can be
222 * used to denote specific processor and its successors.
224 if (sizeof(size_t) == 4) {
225 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
226 if (__power_set(0xffffffffU
<<13)) /* POWER5 and later */
227 OPENSSL_ppccap_P
|= PPC_FPU64
;
229 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
230 if (__power_set(0x1U
<<14)) /* POWER6 */
231 OPENSSL_ppccap_P
|= PPC_FPU64
;
234 if (__power_set(0xffffffffU
<<14)) /* POWER6 and later */
235 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
237 if (__power_set(0xffffffffU
<<16)) /* POWER8 and later */
238 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
240 if (__power_set(0xffffffffU
<<17)) /* POWER9 and later */
241 OPENSSL_ppccap_P
|= PPC_MADD300
;
247 #if defined(__APPLE__) && defined(__MACH__)
248 OPENSSL_ppccap_P
|= PPC_FPU
;
252 size_t len
= sizeof(val
);
254 if (sysctlbyname("hw.optional.64bitops", &val
, &len
, NULL
, 0) == 0) {
256 OPENSSL_ppccap_P
|= PPC_FPU64
;
260 if (sysctlbyname("hw.optional.altivec", &val
, &len
, NULL
, 0) == 0) {
262 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
269 if (getauxval
!= NULL
) {
270 unsigned long hwcap
= getauxval(HWCAP
);
272 if (hwcap
& HWCAP_FPU
) {
273 OPENSSL_ppccap_P
|= PPC_FPU
;
275 if (sizeof(size_t) == 4) {
276 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
277 if (hwcap
& HWCAP_PPC64
)
278 OPENSSL_ppccap_P
|= PPC_FPU64
;
280 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
281 if (hwcap
& HWCAP_POWER6_EXT
)
282 OPENSSL_ppccap_P
|= PPC_FPU64
;
286 if (hwcap
& HWCAP_ALTIVEC
) {
287 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
289 if ((hwcap
& HWCAP_VSX
) && (getauxval(HWCAP2
) & HWCAP_VEC_CRYPTO
))
290 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
293 if (hwcap
& HWCAP_ARCH_3_00
) {
294 OPENSSL_ppccap_P
|= PPC_MADD300
;
300 sigfillset(&all_masked
);
301 sigdelset(&all_masked
, SIGILL
);
302 sigdelset(&all_masked
, SIGTRAP
);
304 sigdelset(&all_masked
, SIGEMT
);
306 sigdelset(&all_masked
, SIGFPE
);
307 sigdelset(&all_masked
, SIGBUS
);
308 sigdelset(&all_masked
, SIGSEGV
);
310 memset(&ill_act
, 0, sizeof(ill_act
));
311 ill_act
.sa_handler
= ill_handler
;
312 ill_act
.sa_mask
= all_masked
;
314 sigprocmask(SIG_SETMASK
, &ill_act
.sa_mask
, &oset
);
315 sigaction(SIGILL
, &ill_act
, &ill_oact
);
317 if (sigsetjmp(ill_jmp
,1) == 0) {
319 OPENSSL_ppccap_P
|= PPC_FPU
;
321 if (sizeof(size_t) == 4) {
324 if (uname(&uts
) == 0 && strcmp(uts
.machine
, "ppc64") == 0)
326 if (sigsetjmp(ill_jmp
, 1) == 0) {
327 OPENSSL_ppc64_probe();
328 OPENSSL_ppccap_P
|= PPC_FPU64
;
332 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
337 if (sigsetjmp(ill_jmp
, 1) == 0) {
338 OPENSSL_altivec_probe();
339 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
340 if (sigsetjmp(ill_jmp
, 1) == 0) {
341 OPENSSL_crypto207_probe();
342 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
346 if (sigsetjmp(ill_jmp
, 1) == 0) {
347 OPENSSL_madd300_probe();
348 OPENSSL_ppccap_P
|= PPC_MADD300
;
351 sigaction(SIGILL
, &ill_oact
, NULL
);
352 sigprocmask(SIG_SETMASK
, &oset
, NULL
);