crypto/rc4/asm/rc4-x86_64.pl

   1 #!/usr/bin/env perl
   2 #
   3 # ====================================================================
   4 # Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
   5 # project. Rights for redistribution and usage in source and binary
   6 # forms are granted according to the OpenSSL license.
   7 # ====================================================================
   8 #
   9 # 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
  10 # "hand-coded assembler"] doesn't stand for the whole improvement
  11 # coefficient. It turned out that eliminating RC4_CHAR from config
  12 # line results in ~40% improvement (yes, even for C implementation).
  13 # Presumably it has everything to do with AMD cache architecture and
  14 # RAW or whatever penalties. Once again! The module *requires* config
  15 # line *without* RC4_CHAR! As for coding "secret," I bet on partial
  16 # register arithmetics. For example instead of 'inc %r8; and $255,%r8'
  17 # I simply 'inc %r8b'. Even though optimization manual discourages
  18 # to operate on partial registers, it turned out to be the best bet.
  19 # At least for AMD... How IA32E would perform remains to be seen...
  20
  21 # As was shown by Marc Bevand reordering of couple of load operations
  22 # results in even higher performance gain of 3.3x:-) At least on
  23 # Opteron... For reference, 1x in this case is RC4_CHAR C-code
  24 # compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
  25 # Latter means that if you want to *estimate* what to expect from
  26 # *your* Opteron, then multiply 54 by 3.3 and clock frequency in GHz.
  27
  28 # Intel P4 EM64T core was found to run the AMD64 code really slow...
  29 # The only way to achieve comparable performance on P4 was to keep
  30 # RC4_CHAR. Kind of ironic, huh? As it's apparently impossible to
  31 # compose blended code, which would perform even within 30% marginal
  32 # on either AMD and Intel platforms, I implement both cases. See
  33 # rc4_skey.c for further details...
  34
  35 # P4 EM64T core appears to be "allergic" to 64-bit inc/dec. Replacing
  36 # those with add/sub results in 50% performance improvement of folded
  37 # loop...
  38
  39 # As was shown by Zou Nanhai loop unrolling can improve Intel EM64T
  40 # performance by >30% [unlike P4 32-bit case that is]. But this is
  41 # provided that loads are reordered even more aggressively! Both code
  42 # pathes, AMD64 and EM64T, reorder loads in essentially same manner
  43 # as my IA-64 implementation. On Opteron this resulted in modest 5%
  44 # improvement [I had to test it], while final Intel P4 performance
  45 # achieves respectful 432MBps on 2.8GHz processor now. For reference.
  46 # If executed on Xeon, current RC4_CHAR code-path is 2.7x faster than
  47 # RC4_INT code-path. While if executed on Opteron, it's is only 25%
  48 # slower than the latter...
  49
  50 $output=shift;
  51 open STDOUT,"| $^X ../perlasm/x86_64-xlate.pl $output";
  52
  53 $dat="%rdi";        # arg1
  54 $len="%rsi";        # arg2
  55 $inp="%rdx";        # arg3
  56 $out="%rcx";        # arg4
  57
  58 @XX=("%r8","%r10");
  59 @TX=("%r9","%r11");
  60 $YY="%r12";
  61 $TY="%r13";
  62
  63 $code=<<___;
  64 .text
  65
  66 .globl  RC4
  67 .type   RC4,\@function,4
  68 .align  16
  69 RC4:    or      $len,$len
  70         jne     .Lentry
  71         ret
  72 .Lentry:
  73         push    %r12
  74         push    %r13
  75
  76         add     \$8,$dat
  77         movl    -8($dat),$XX[0]#d
  78         movl    -4($dat),$YY#d
  79         cmpl    \$-1,256($dat)
  80         je      .LRC4_CHAR
  81         inc     $XX[0]#b
  82         movl    ($dat,$XX[0],4),$TX[0]#d
  83         test    \$-8,$len
  84         jz      .Lloop1
  85         jmp     .Lloop8
  86 .align  16
  87 .Lloop8:
  88 ___
  89 for ($i=0;$i<8;$i++) {
  90 $code.=<<___;
  91         add     $TX[0]#b,$YY#b
  92         mov     $XX[0],$XX[1]
  93         movl    ($dat,$YY,4),$TY#d
  94         ror     \$8,%rax                        # ror is redundant when $i=0
  95         inc     $XX[1]#b
  96         movl    ($dat,$XX[1],4),$TX[1]#d
  97         cmp     $XX[1],$YY
  98         movl    $TX[0]#d,($dat,$YY,4)
  99         cmove   $TX[0],$TX[1]
 100         movl    $TY#d,($dat,$XX[0],4)
 101         add     $TX[0]#b,$TY#b
 102         movb    ($dat,$TY,4),%al
 103 ___
 104 push(@TX,shift(@TX)); push(@XX,shift(@XX));     # "rotate" registers
 105 }
 106 $code.=<<___;
 107         ror     \$8,%rax
 108         sub     \$8,$len
 109
 110         xor     ($inp),%rax
 111         add     \$8,$inp
 112         mov     %rax,($out)
 113         add     \$8,$out
 114
 115         test    \$-8,$len
 116         jnz     .Lloop8
 117         cmp     \$0,$len
 118         jne     .Lloop1
 119 ___
 120 $code.=<<___;
 121 .Lexit:
 122         sub     \$1,$XX[0]#b
 123         movl    $XX[0]#d,-8($dat)
 124         movl    $YY#d,-4($dat)
 125
 126         pop     %r13
 127         pop     %r12
 128         ret
 129 .align  16
 130 .Lloop1:
 131         add     $TX[0]#b,$YY#b
 132         movl    ($dat,$YY,4),$TY#d
 133         movl    $TX[0]#d,($dat,$YY,4)
 134         movl    $TY#d,($dat,$XX[0],4)
 135         add     $TY#b,$TX[0]#b
 136         inc     $XX[0]#b
 137         movl    ($dat,$TX[0],4),$TY#d
 138         movl    ($dat,$XX[0],4),$TX[0]#d
 139         xorb    ($inp),$TY#b
 140         inc     $inp
 141         movb    $TY#b,($out)
 142         inc     $out
 143         dec     $len
 144         jnz     .Lloop1
 145         jmp     .Lexit
 146
 147 .align  16
 148 .LRC4_CHAR:
 149         add     \$1,$XX[0]#b
 150         movzb   ($dat,$XX[0]),$TX[0]#d
 151         test    \$-8,$len
 152         jz      .Lcloop1
 153         push    %rbx
 154         jmp     .Lcloop8
 155 .align  16
 156 .Lcloop8:
 157         mov     ($inp),%eax
 158         mov     4($inp),%ebx
 159 ___
 160 # unroll 2x4-wise, because 64-bit rotates kill Intel P4...
 161 for ($i=0;$i<4;$i++) {
 162 $code.=<<___;
 163         add     $TX[0]#b,$YY#b
 164         lea     1($XX[0]),$XX[1]
 165         movzb   ($dat,$YY),$TY#d
 166         movzb   $XX[1]#b,$XX[1]#d
 167         movzb   ($dat,$XX[1]),$TX[1]#d
 168         movb    $TX[0]#b,($dat,$YY)
 169         cmp     $XX[1],$YY
 170         movb    $TY#b,($dat,$XX[0])
 171         jne     .Lcmov$i                        # Intel cmov is sloooow...
 172         mov     $TX[0],$TX[1]
 173 .Lcmov$i:
 174         add     $TX[0]#b,$TY#b
 175         xor     ($dat,$TY),%al
 176         ror     \$8,%eax
 177 ___
 178 push(@TX,shift(@TX)); push(@XX,shift(@XX));     # "rotate" registers
 179 }
 180 for ($i=4;$i<8;$i++) {
 181 $code.=<<___;
 182         add     $TX[0]#b,$YY#b
 183         lea     1($XX[0]),$XX[1]
 184         movzb   ($dat,$YY),$TY#d
 185         movzb   $XX[1]#b,$XX[1]
 186         movzb   ($dat,$XX[1]),$TX[1]#d
 187         movb    $TX[0]#b,($dat,$YY)
 188         cmp     $XX[1],$YY
 189         movb    $TY#b,($dat,$XX[0])
 190         jne     .Lcmov$i                        # Intel cmov is sloooow...
 191         mov     $TX[0],$TX[1]
 192 .Lcmov$i:
 193         add     $TX[0]#b,$TY#b
 194         xor     ($dat,$TY),%bl
 195         ror     \$8,%ebx
 196 ___
 197 push(@TX,shift(@TX)); push(@XX,shift(@XX));     # "rotate" registers
 198 }
 199 $code.=<<___;
 200         lea     -8($len),$len
 201         mov     %eax,($out)
 202         lea     8($inp),$inp
 203         mov     %ebx,4($out)
 204         lea     8($out),$out
 205
 206         test    \$-8,$len
 207         jnz     .Lcloop8
 208         pop     %rbx
 209         cmp     \$0,$len
 210         jne     .Lcloop1
 211         jmp     .Lexit
 212 ___
 213 $code.=<<___;
 214 .align  16
 215 .Lcloop1:
 216         add     $TX[0]#b,$YY#b
 217         movzb   ($dat,$YY),$TY#d
 218         movb    $TX[0]#b,($dat,$YY)
 219         movb    $TY#b,($dat,$XX[0])
 220         add     $TX[0]#b,$TY#b
 221         add     \$1,$XX[0]#b
 222         movzb   ($dat,$TY),$TY#d
 223         movzb   ($dat,$XX[0]),$TX[0]#d
 224         xorb    ($inp),$TY#b
 225         lea     1($inp),$inp
 226         movb    $TY#b,($out)
 227         lea     1($out),$out
 228         sub     \$1,$len
 229         jnz     .Lcloop1
 230         jmp     .Lexit
 231 .size   RC4,.-RC4
 232 ___
 233
 234 $code =~ s/#([bwd])/$1/gm;
 235
 236 print $code;
 237
 238 close STDOUT;