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Allocate the three shared DRBGs on the secure heap
[thirdparty/openssl.git] / crypto / x86_64cpuid.pl
1 #! /usr/bin/env perl
2 # Copyright 2005-2016 The OpenSSL Project Authors. All Rights Reserved.
3 #
4 # Licensed under the OpenSSL license (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
8
9
10 $flavour = shift;
11 $output = shift;
12 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
13
14 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
15
16 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
17 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
18 ( $xlate="${dir}perlasm/x86_64-xlate.pl" and -f $xlate) or
19 die "can't locate x86_64-xlate.pl";
20
21 open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
22 *STDOUT=*OUT;
23
24 ($arg1,$arg2,$arg3,$arg4)=$win64?("%rcx","%rdx","%r8", "%r9") : # Win64 order
25 ("%rdi","%rsi","%rdx","%rcx"); # Unix order
26
27 print<<___;
28 .extern OPENSSL_cpuid_setup
29 .hidden OPENSSL_cpuid_setup
30 .section .init
31 call OPENSSL_cpuid_setup
32
33 .hidden OPENSSL_ia32cap_P
34 .comm OPENSSL_ia32cap_P,16,4
35
36 .text
37
38 .globl OPENSSL_atomic_add
39 .type OPENSSL_atomic_add,\@abi-omnipotent
40 .align 16
41 OPENSSL_atomic_add:
42 movl ($arg1),%eax
43 .Lspin: leaq ($arg2,%rax),%r8
44 .byte 0xf0 # lock
45 cmpxchgl %r8d,($arg1)
46 jne .Lspin
47 movl %r8d,%eax
48 .byte 0x48,0x98 # cltq/cdqe
49 ret
50 .size OPENSSL_atomic_add,.-OPENSSL_atomic_add
51
52 .globl OPENSSL_rdtsc
53 .type OPENSSL_rdtsc,\@abi-omnipotent
54 .align 16
55 OPENSSL_rdtsc:
56 rdtsc
57 shl \$32,%rdx
58 or %rdx,%rax
59 ret
60 .size OPENSSL_rdtsc,.-OPENSSL_rdtsc
61
62 .globl OPENSSL_ia32_cpuid
63 .type OPENSSL_ia32_cpuid,\@function,1
64 .align 16
65 OPENSSL_ia32_cpuid:
66 .cfi_startproc
67 mov %rbx,%r8 # save %rbx
68 .cfi_register %rbx,%r8
69
70 xor %eax,%eax
71 mov %rax,8(%rdi) # clear extended feature flags
72 cpuid
73 mov %eax,%r11d # max value for standard query level
74
75 xor %eax,%eax
76 cmp \$0x756e6547,%ebx # "Genu"
77 setne %al
78 mov %eax,%r9d
79 cmp \$0x49656e69,%edx # "ineI"
80 setne %al
81 or %eax,%r9d
82 cmp \$0x6c65746e,%ecx # "ntel"
83 setne %al
84 or %eax,%r9d # 0 indicates Intel CPU
85 jz .Lintel
86
87 cmp \$0x68747541,%ebx # "Auth"
88 setne %al
89 mov %eax,%r10d
90 cmp \$0x69746E65,%edx # "enti"
91 setne %al
92 or %eax,%r10d
93 cmp \$0x444D4163,%ecx # "cAMD"
94 setne %al
95 or %eax,%r10d # 0 indicates AMD CPU
96 jnz .Lintel
97
98 # AMD specific
99 mov \$0x80000000,%eax
100 cpuid
101 cmp \$0x80000001,%eax
102 jb .Lintel
103 mov %eax,%r10d
104 mov \$0x80000001,%eax
105 cpuid
106 or %ecx,%r9d
107 and \$0x00000801,%r9d # isolate AMD XOP bit, 1<<11
108
109 cmp \$0x80000008,%r10d
110 jb .Lintel
111
112 mov \$0x80000008,%eax
113 cpuid
114 movzb %cl,%r10 # number of cores - 1
115 inc %r10 # number of cores
116
117 mov \$1,%eax
118 cpuid
119 bt \$28,%edx # test hyper-threading bit
120 jnc .Lgeneric
121 shr \$16,%ebx # number of logical processors
122 cmp %r10b,%bl
123 ja .Lgeneric
124 and \$0xefffffff,%edx # ~(1<<28)
125 jmp .Lgeneric
126
127 .Lintel:
128 cmp \$4,%r11d
129 mov \$-1,%r10d
130 jb .Lnocacheinfo
131
132 mov \$4,%eax
133 mov \$0,%ecx # query L1D
134 cpuid
135 mov %eax,%r10d
136 shr \$14,%r10d
137 and \$0xfff,%r10d # number of cores -1 per L1D
138
139 .Lnocacheinfo:
140 mov \$1,%eax
141 cpuid
142 movd %eax,%xmm0 # put aside processor id
143 and \$0xbfefffff,%edx # force reserved bits to 0
144 cmp \$0,%r9d
145 jne .Lnotintel
146 or \$0x40000000,%edx # set reserved bit#30 on Intel CPUs
147 and \$15,%ah
148 cmp \$15,%ah # examine Family ID
149 jne .LnotP4
150 or \$0x00100000,%edx # set reserved bit#20 to engage RC4_CHAR
151 .LnotP4:
152 cmp \$6,%ah
153 jne .Lnotintel
154 and \$0x0fff0ff0,%eax
155 cmp \$0x00050670,%eax # Knights Landing
156 je .Lknights
157 cmp \$0x00080650,%eax # Knights Mill (according to sde)
158 jne .Lnotintel
159 .Lknights:
160 and \$0xfbffffff,%ecx # clear XSAVE flag to mimic Silvermont
161
162 .Lnotintel:
163 bt \$28,%edx # test hyper-threading bit
164 jnc .Lgeneric
165 and \$0xefffffff,%edx # ~(1<<28)
166 cmp \$0,%r10d
167 je .Lgeneric
168
169 or \$0x10000000,%edx # 1<<28
170 shr \$16,%ebx
171 cmp \$1,%bl # see if cache is shared
172 ja .Lgeneric
173 and \$0xefffffff,%edx # ~(1<<28)
174 .Lgeneric:
175 and \$0x00000800,%r9d # isolate AMD XOP flag
176 and \$0xfffff7ff,%ecx
177 or %ecx,%r9d # merge AMD XOP flag
178
179 mov %edx,%r10d # %r9d:%r10d is copy of %ecx:%edx
180
181 cmp \$7,%r11d
182 jb .Lno_extended_info
183 mov \$7,%eax
184 xor %ecx,%ecx
185 cpuid
186 bt \$26,%r9d # check XSAVE bit, cleared on Knights
187 jc .Lnotknights
188 and \$0xfff7ffff,%ebx # clear ADCX/ADOX flag
189 .Lnotknights:
190 movd %xmm0,%eax # restore processor id
191 and \$0x0fff0ff0,%eax
192 cmp \$0x00050650,%eax # Skylake-X
193 jne .Lnotskylakex
194 and \$0xfffeffff,%ebx # ~(1<<16)
195 # suppress AVX512F flag on Skylake-X
196 .Lnotskylakex:
197 mov %ebx,8(%rdi) # save extended feature flags
198 mov %ecx,12(%rdi)
199 .Lno_extended_info:
200
201 bt \$27,%r9d # check OSXSAVE bit
202 jnc .Lclear_avx
203 xor %ecx,%ecx # XCR0
204 .byte 0x0f,0x01,0xd0 # xgetbv
205 and \$0xe6,%eax # isolate XMM, YMM and ZMM state support
206 cmp \$0xe6,%eax
207 je .Ldone
208 andl \$0x3fdeffff,8(%rdi) # ~(1<<31|1<<30|1<<21|1<<16)
209 # clear AVX512F+BW+VL+FIMA, all of
210 # them are EVEX-encoded, which requires
211 # ZMM state support even if one uses
212 # only XMM and YMM :-(
213 and \$6,%eax # isolate XMM and YMM state support
214 cmp \$6,%eax
215 je .Ldone
216 .Lclear_avx:
217 mov \$0xefffe7ff,%eax # ~(1<<28|1<<12|1<<11)
218 and %eax,%r9d # clear AVX, FMA and AMD XOP bits
219 mov \$0x3fdeffdf,%eax # ~(1<<31|1<<30|1<<21|1<<16|1<<5)
220 and %eax,8(%rdi) # clear AVX2 and AVX512* bits
221 .Ldone:
222 shl \$32,%r9
223 mov %r10d,%eax
224 mov %r8,%rbx # restore %rbx
225 .cfi_restore %rbx
226 or %r9,%rax
227 ret
228 .cfi_endproc
229 .size OPENSSL_ia32_cpuid,.-OPENSSL_ia32_cpuid
230
231 .globl OPENSSL_cleanse
232 .type OPENSSL_cleanse,\@abi-omnipotent
233 .align 16
234 OPENSSL_cleanse:
235 xor %rax,%rax
236 cmp \$15,$arg2
237 jae .Lot
238 cmp \$0,$arg2
239 je .Lret
240 .Little:
241 mov %al,($arg1)
242 sub \$1,$arg2
243 lea 1($arg1),$arg1
244 jnz .Little
245 .Lret:
246 ret
247 .align 16
248 .Lot:
249 test \$7,$arg1
250 jz .Laligned
251 mov %al,($arg1)
252 lea -1($arg2),$arg2
253 lea 1($arg1),$arg1
254 jmp .Lot
255 .Laligned:
256 mov %rax,($arg1)
257 lea -8($arg2),$arg2
258 test \$-8,$arg2
259 lea 8($arg1),$arg1
260 jnz .Laligned
261 cmp \$0,$arg2
262 jne .Little
263 ret
264 .size OPENSSL_cleanse,.-OPENSSL_cleanse
265
266 .globl CRYPTO_memcmp
267 .type CRYPTO_memcmp,\@abi-omnipotent
268 .align 16
269 CRYPTO_memcmp:
270 xor %rax,%rax
271 xor %r10,%r10
272 cmp \$0,$arg3
273 je .Lno_data
274 .Loop_cmp:
275 mov ($arg1),%r10b
276 lea 1($arg1),$arg1
277 xor ($arg2),%r10b
278 lea 1($arg2),$arg2
279 or %r10b,%al
280 dec $arg3
281 jnz .Loop_cmp
282 neg %rax
283 shr \$63,%rax
284 .Lno_data:
285 ret
286 .size CRYPTO_memcmp,.-CRYPTO_memcmp
287 ___
288
289 print<<___ if (!$win64);
290 .globl OPENSSL_wipe_cpu
291 .type OPENSSL_wipe_cpu,\@abi-omnipotent
292 .align 16
293 OPENSSL_wipe_cpu:
294 pxor %xmm0,%xmm0
295 pxor %xmm1,%xmm1
296 pxor %xmm2,%xmm2
297 pxor %xmm3,%xmm3
298 pxor %xmm4,%xmm4
299 pxor %xmm5,%xmm5
300 pxor %xmm6,%xmm6
301 pxor %xmm7,%xmm7
302 pxor %xmm8,%xmm8
303 pxor %xmm9,%xmm9
304 pxor %xmm10,%xmm10
305 pxor %xmm11,%xmm11
306 pxor %xmm12,%xmm12
307 pxor %xmm13,%xmm13
308 pxor %xmm14,%xmm14
309 pxor %xmm15,%xmm15
310 xorq %rcx,%rcx
311 xorq %rdx,%rdx
312 xorq %rsi,%rsi
313 xorq %rdi,%rdi
314 xorq %r8,%r8
315 xorq %r9,%r9
316 xorq %r10,%r10
317 xorq %r11,%r11
318 leaq 8(%rsp),%rax
319 ret
320 .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
321 ___
322 print<<___ if ($win64);
323 .globl OPENSSL_wipe_cpu
324 .type OPENSSL_wipe_cpu,\@abi-omnipotent
325 .align 16
326 OPENSSL_wipe_cpu:
327 pxor %xmm0,%xmm0
328 pxor %xmm1,%xmm1
329 pxor %xmm2,%xmm2
330 pxor %xmm3,%xmm3
331 pxor %xmm4,%xmm4
332 pxor %xmm5,%xmm5
333 xorq %rcx,%rcx
334 xorq %rdx,%rdx
335 xorq %r8,%r8
336 xorq %r9,%r9
337 xorq %r10,%r10
338 xorq %r11,%r11
339 leaq 8(%rsp),%rax
340 ret
341 .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
342 ___
343 {
344 my $out="%r10";
345 my $cnt="%rcx";
346 my $max="%r11";
347 my $lasttick="%r8d";
348 my $lastdiff="%r9d";
349 my $redzone=win64?8:-8;
350
351 print<<___;
352 .globl OPENSSL_instrument_bus
353 .type OPENSSL_instrument_bus,\@abi-omnipotent
354 .align 16
355 OPENSSL_instrument_bus:
356 mov $arg1,$out # tribute to Win64
357 mov $arg2,$cnt
358 mov $arg2,$max
359
360 rdtsc # collect 1st tick
361 mov %eax,$lasttick # lasttick = tick
362 mov \$0,$lastdiff # lastdiff = 0
363 clflush ($out)
364 .byte 0xf0 # lock
365 add $lastdiff,($out)
366 jmp .Loop
367 .align 16
368 .Loop: rdtsc
369 mov %eax,%edx
370 sub $lasttick,%eax
371 mov %edx,$lasttick
372 mov %eax,$lastdiff
373 clflush ($out)
374 .byte 0xf0 # lock
375 add %eax,($out)
376 lea 4($out),$out
377 sub \$1,$cnt
378 jnz .Loop
379
380 mov $max,%rax
381 ret
382 .size OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
383
384 .globl OPENSSL_instrument_bus2
385 .type OPENSSL_instrument_bus2,\@abi-omnipotent
386 .align 16
387 OPENSSL_instrument_bus2:
388 mov $arg1,$out # tribute to Win64
389 mov $arg2,$cnt
390 mov $arg3,$max
391 mov $cnt,$redzone(%rsp)
392
393 rdtsc # collect 1st tick
394 mov %eax,$lasttick # lasttick = tick
395 mov \$0,$lastdiff # lastdiff = 0
396
397 clflush ($out)
398 .byte 0xf0 # lock
399 add $lastdiff,($out)
400
401 rdtsc # collect 1st diff
402 mov %eax,%edx
403 sub $lasttick,%eax # diff
404 mov %edx,$lasttick # lasttick = tick
405 mov %eax,$lastdiff # lastdiff = diff
406 .Loop2:
407 clflush ($out)
408 .byte 0xf0 # lock
409 add %eax,($out) # accumulate diff
410
411 sub \$1,$max
412 jz .Ldone2
413
414 rdtsc
415 mov %eax,%edx
416 sub $lasttick,%eax # diff
417 mov %edx,$lasttick # lasttick = tick
418 cmp $lastdiff,%eax
419 mov %eax,$lastdiff # lastdiff = diff
420 mov \$0,%edx
421 setne %dl
422 sub %rdx,$cnt # conditional --$cnt
423 lea ($out,%rdx,4),$out # conditional ++$out
424 jnz .Loop2
425
426 .Ldone2:
427 mov $redzone(%rsp),%rax
428 sub $cnt,%rax
429 ret
430 .size OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
431 ___
432 }
433
434 sub gen_random {
435 my $rdop = shift;
436 print<<___;
437 .globl OPENSSL_ia32_${rdop}
438 .type OPENSSL_ia32_${rdop},\@abi-omnipotent
439 .align 16
440 OPENSSL_ia32_${rdop}:
441 mov \$8,%ecx
442 .Loop_${rdop}:
443 ${rdop} %rax
444 jc .Lbreak_${rdop}
445 loop .Loop_${rdop}
446 .Lbreak_${rdop}:
447 cmp \$0,%rax
448 cmove %rcx,%rax
449 ret
450 .size OPENSSL_ia32_${rdop},.-OPENSSL_ia32_${rdop}
451
452 .globl OPENSSL_ia32_${rdop}_bytes
453 .type OPENSSL_ia32_${rdop}_bytes,\@abi-omnipotent
454 .align 16
455 OPENSSL_ia32_${rdop}_bytes:
456 xor %rax, %rax # return value
457 cmp \$0,$arg2
458 je .Ldone_${rdop}_bytes
459
460 mov \$8,%r11
461 .Loop_${rdop}_bytes:
462 ${rdop} %r10
463 jc .Lbreak_${rdop}_bytes
464 dec %r11
465 jnz .Loop_${rdop}_bytes
466 jmp .Ldone_${rdop}_bytes
467
468 .align 16
469 .Lbreak_${rdop}_bytes:
470 cmp \$8,$arg2
471 jb .Ltail_${rdop}_bytes
472 mov %r10,($arg1)
473 lea 8($arg1),$arg1
474 add \$8,%rax
475 sub \$8,$arg2
476 jz .Ldone_${rdop}_bytes
477 mov \$8,%r11
478 jmp .Loop_${rdop}_bytes
479
480 .align 16
481 .Ltail_${rdop}_bytes:
482 mov %r10b,($arg1)
483 lea 1($arg1),$arg1
484 inc %rax
485 shr \$8,%r8
486 dec $arg2
487 jnz .Ltail_${rdop}_bytes
488
489 .Ldone_${rdop}_bytes:
490 ret
491 .size OPENSSL_ia32_${rdop}_bytes,.-OPENSSL_ia32_${rdop}_bytes
492 ___
493 }
494 gen_random("rdrand");
495 gen_random("rdseed");
496
497 close STDOUT; # flush