2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
38 #define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
42 #define EDID_EST_TIMINGS 16
43 #define EDID_STD_TIMINGS 8
44 #define EDID_DETAILED_TIMINGS 4
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
53 /* First detailed mode wrong, use largest 60Hz mode */
54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55 /* Reported 135MHz pixel clock is too high, needs adjustment */
56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57 /* Prefer the largest mode at 75 Hz */
58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59 /* Detail timing is in cm not mm */
60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61 /* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65 /* Monitor forgot to set the first detailed is preferred bit. */
66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67 /* use +hsync +vsync for detailed mode */
68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 /* Force reduced-blanking timings for detailed modes */
70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
72 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
74 struct detailed_mode_closure
{
75 struct drm_connector
*connector
;
87 static struct edid_quirk
{
91 } edid_quirk_list
[] = {
93 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60
},
95 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60
},
97 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
99 /* Belinea 10 15 55 */
100 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60
},
101 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60
},
103 /* Envision Peripherals, Inc. EN-7100e */
104 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH
},
105 /* Envision EN2028 */
106 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60
},
108 /* Funai Electronics PM36B */
109 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75
|
110 EDID_QUIRK_DETAILED_IN_CM
},
112 /* LG Philips LCD LP154W01-A5 */
113 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
114 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
116 /* Philips 107p5 CRT */
117 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
120 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
122 /* Samsung SyncMaster 205BW. Note: irony */
123 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP
},
124 /* Samsung SyncMaster 22[5-6]BW */
125 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60
},
126 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60
},
128 /* ViewSonic VA2026w */
129 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING
},
131 /* Medion MD 30217 PG */
132 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75
},
134 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
135 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC
},
139 * Autogenerated from the DMT spec.
140 * This table is copied from xfree86/modes/xf86EdidModes.c.
142 static const struct drm_display_mode drm_dmt_modes
[] = {
144 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
145 736, 832, 0, 350, 382, 385, 445, 0,
146 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
148 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
149 736, 832, 0, 400, 401, 404, 445, 0,
150 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
152 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 756,
153 828, 936, 0, 400, 401, 404, 446, 0,
154 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
156 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
157 752, 800, 0, 480, 489, 492, 525, 0,
158 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
160 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
161 704, 832, 0, 480, 489, 492, 520, 0,
162 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
164 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
165 720, 840, 0, 480, 481, 484, 500, 0,
166 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
168 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 36000, 640, 696,
169 752, 832, 0, 480, 481, 484, 509, 0,
170 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
172 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
173 896, 1024, 0, 600, 601, 603, 625, 0,
174 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
176 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
177 968, 1056, 0, 600, 601, 605, 628, 0,
178 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
180 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
181 976, 1040, 0, 600, 637, 643, 666, 0,
182 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
184 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
185 896, 1056, 0, 600, 601, 604, 625, 0,
186 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
188 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 56250, 800, 832,
189 896, 1048, 0, 600, 601, 604, 631, 0,
190 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
191 /* 800x600@120Hz RB */
192 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 73250, 800, 848,
193 880, 960, 0, 600, 603, 607, 636, 0,
194 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
196 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER
, 33750, 848, 864,
197 976, 1088, 0, 480, 486, 494, 517, 0,
198 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
199 /* 1024x768@43Hz, interlace */
200 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER
, 44900, 1024, 1032,
201 1208, 1264, 0, 768, 768, 772, 817, 0,
202 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
203 DRM_MODE_FLAG_INTERLACE
) },
205 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
206 1184, 1344, 0, 768, 771, 777, 806, 0,
207 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
209 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
210 1184, 1328, 0, 768, 771, 777, 806, 0,
211 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
213 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78750, 1024, 1040,
214 1136, 1312, 0, 768, 769, 772, 800, 0,
215 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
217 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 94500, 1024, 1072,
218 1168, 1376, 0, 768, 769, 772, 808, 0,
219 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
220 /* 1024x768@120Hz RB */
221 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 115500, 1024, 1072,
222 1104, 1184, 0, 768, 771, 775, 813, 0,
223 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
225 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
226 1344, 1600, 0, 864, 865, 868, 900, 0,
227 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
228 /* 1280x768@60Hz RB */
229 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 68250, 1280, 1328,
230 1360, 1440, 0, 768, 771, 778, 790, 0,
231 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
233 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 79500, 1280, 1344,
234 1472, 1664, 0, 768, 771, 778, 798, 0,
235 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
237 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 102250, 1280, 1360,
238 1488, 1696, 0, 768, 771, 778, 805, 0,
239 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
241 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 117500, 1280, 1360,
242 1496, 1712, 0, 768, 771, 778, 809, 0,
243 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
244 /* 1280x768@120Hz RB */
245 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 140250, 1280, 1328,
246 1360, 1440, 0, 768, 771, 778, 813, 0,
247 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
248 /* 1280x800@60Hz RB */
249 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 71000, 1280, 1328,
250 1360, 1440, 0, 800, 803, 809, 823, 0,
251 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
253 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 83500, 1280, 1352,
254 1480, 1680, 0, 800, 803, 809, 831, 0,
255 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
257 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 106500, 1280, 1360,
258 1488, 1696, 0, 800, 803, 809, 838, 0,
259 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
261 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 122500, 1280, 1360,
262 1496, 1712, 0, 800, 803, 809, 843, 0,
263 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
264 /* 1280x800@120Hz RB */
265 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 146250, 1280, 1328,
266 1360, 1440, 0, 800, 803, 809, 847, 0,
267 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
269 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1376,
270 1488, 1800, 0, 960, 961, 964, 1000, 0,
271 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
273 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1344,
274 1504, 1728, 0, 960, 961, 964, 1011, 0,
275 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
276 /* 1280x960@120Hz RB */
277 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 175500, 1280, 1328,
278 1360, 1440, 0, 960, 963, 967, 1017, 0,
279 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
281 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1328,
282 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
283 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
285 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
286 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
287 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
289 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 157500, 1280, 1344,
290 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
291 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
292 /* 1280x1024@120Hz RB */
293 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 187250, 1280, 1328,
294 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
295 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
297 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 85500, 1360, 1424,
298 1536, 1792, 0, 768, 771, 777, 795, 0,
299 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
300 /* 1360x768@120Hz RB */
301 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 148250, 1360, 1408,
302 1440, 1520, 0, 768, 771, 776, 813, 0,
303 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
304 /* 1400x1050@60Hz RB */
305 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 101000, 1400, 1448,
306 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
307 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
309 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 121750, 1400, 1488,
310 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
311 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
313 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 156000, 1400, 1504,
314 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
315 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
317 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 179500, 1400, 1504,
318 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
319 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
320 /* 1400x1050@120Hz RB */
321 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 208000, 1400, 1448,
322 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
323 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
324 /* 1440x900@60Hz RB */
325 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 88750, 1440, 1488,
326 1520, 1600, 0, 900, 903, 909, 926, 0,
327 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
329 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 106500, 1440, 1520,
330 1672, 1904, 0, 900, 903, 909, 934, 0,
331 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
333 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 136750, 1440, 1536,
334 1688, 1936, 0, 900, 903, 909, 942, 0,
335 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
337 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 157000, 1440, 1544,
338 1696, 1952, 0, 900, 903, 909, 948, 0,
339 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
340 /* 1440x900@120Hz RB */
341 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 182750, 1440, 1488,
342 1520, 1600, 0, 900, 903, 909, 953, 0,
343 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
345 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 162000, 1600, 1664,
346 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
347 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
349 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 175500, 1600, 1664,
350 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
351 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
353 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 189000, 1600, 1664,
354 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
355 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
357 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 202500, 1600, 1664,
358 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
359 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
361 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 229500, 1600, 1664,
362 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
363 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
364 /* 1600x1200@120Hz RB */
365 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 268250, 1600, 1648,
366 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
367 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
368 /* 1680x1050@60Hz RB */
369 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 119000, 1680, 1728,
370 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
371 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
373 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 146250, 1680, 1784,
374 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
375 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
377 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 187000, 1680, 1800,
378 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
379 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
381 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 214750, 1680, 1808,
382 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
383 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
384 /* 1680x1050@120Hz RB */
385 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 245500, 1680, 1728,
386 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
387 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
389 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 204750, 1792, 1920,
390 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
391 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
393 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 261000, 1792, 1888,
394 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
395 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
396 /* 1792x1344@120Hz RB */
397 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 333250, 1792, 1840,
398 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
399 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
401 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 218250, 1856, 1952,
402 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
403 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
405 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 288000, 1856, 1984,
406 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
407 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
408 /* 1856x1392@120Hz RB */
409 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 356500, 1856, 1904,
410 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
411 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
412 /* 1920x1200@60Hz RB */
413 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 154000, 1920, 1968,
414 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
415 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
417 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 193250, 1920, 2056,
418 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
419 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
421 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 245250, 1920, 2056,
422 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
423 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
425 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 281250, 1920, 2064,
426 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
427 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
428 /* 1920x1200@120Hz RB */
429 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 317000, 1920, 1968,
430 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
431 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
433 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 234000, 1920, 2048,
434 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
435 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
437 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2064,
438 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
439 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
440 /* 1920x1440@120Hz RB */
441 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 380500, 1920, 1968,
442 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
443 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
444 /* 2560x1600@60Hz RB */
445 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 268500, 2560, 2608,
446 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
447 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 348500, 2560, 2752,
450 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
451 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 443250, 2560, 2768,
454 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
455 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
457 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 505250, 2560, 2768,
458 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
459 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
460 /* 2560x1600@120Hz RB */
461 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 552750, 2560, 2608,
462 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
463 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
467 * These more or less come from the DMT spec. The 720x400 modes are
468 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
469 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
470 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
473 * The DMT modes have been fact-checked; the rest are mild guesses.
475 static const struct drm_display_mode edid_est_modes
[] = {
476 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
477 968, 1056, 0, 600, 601, 605, 628, 0,
478 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@60Hz */
479 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
480 896, 1024, 0, 600, 601, 603, 625, 0,
481 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@56Hz */
482 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
483 720, 840, 0, 480, 481, 484, 500, 0,
484 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@75Hz */
485 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
486 704, 832, 0, 480, 489, 491, 520, 0,
487 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@72Hz */
488 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 30240, 640, 704,
489 768, 864, 0, 480, 483, 486, 525, 0,
490 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@67Hz */
491 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25200, 640, 656,
492 752, 800, 0, 480, 490, 492, 525, 0,
493 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@60Hz */
494 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 738,
495 846, 900, 0, 400, 421, 423, 449, 0,
496 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 720x400@88Hz */
497 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 28320, 720, 738,
498 846, 900, 0, 400, 412, 414, 449, 0,
499 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 720x400@70Hz */
500 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
501 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
502 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1280x1024@75Hz */
503 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78800, 1024, 1040,
504 1136, 1312, 0, 768, 769, 772, 800, 0,
505 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1024x768@75Hz */
506 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
507 1184, 1328, 0, 768, 771, 777, 806, 0,
508 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@70Hz */
509 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
510 1184, 1344, 0, 768, 771, 777, 806, 0,
511 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@60Hz */
512 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER
,44900, 1024, 1032,
513 1208, 1264, 0, 768, 768, 776, 817, 0,
514 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
| DRM_MODE_FLAG_INTERLACE
) }, /* 1024x768@43Hz */
515 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 57284, 832, 864,
516 928, 1152, 0, 624, 625, 628, 667, 0,
517 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 832x624@75Hz */
518 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
519 896, 1056, 0, 600, 601, 604, 625, 0,
520 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@75Hz */
521 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
522 976, 1040, 0, 600, 637, 643, 666, 0,
523 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@72Hz */
524 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
525 1344, 1600, 0, 864, 865, 868, 900, 0,
526 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1152x864@75Hz */
536 static const struct minimode est3_modes
[] = {
544 { 1024, 768, 85, 0 },
545 { 1152, 864, 75, 0 },
547 { 1280, 768, 60, 1 },
548 { 1280, 768, 60, 0 },
549 { 1280, 768, 75, 0 },
550 { 1280, 768, 85, 0 },
551 { 1280, 960, 60, 0 },
552 { 1280, 960, 85, 0 },
553 { 1280, 1024, 60, 0 },
554 { 1280, 1024, 85, 0 },
556 { 1360, 768, 60, 0 },
557 { 1440, 900, 60, 1 },
558 { 1440, 900, 60, 0 },
559 { 1440, 900, 75, 0 },
560 { 1440, 900, 85, 0 },
561 { 1400, 1050, 60, 1 },
562 { 1400, 1050, 60, 0 },
563 { 1400, 1050, 75, 0 },
565 { 1400, 1050, 85, 0 },
566 { 1680, 1050, 60, 1 },
567 { 1680, 1050, 60, 0 },
568 { 1680, 1050, 75, 0 },
569 { 1680, 1050, 85, 0 },
570 { 1600, 1200, 60, 0 },
571 { 1600, 1200, 65, 0 },
572 { 1600, 1200, 70, 0 },
574 { 1600, 1200, 75, 0 },
575 { 1600, 1200, 85, 0 },
576 { 1792, 1344, 60, 0 },
577 { 1792, 1344, 75, 0 },
578 { 1856, 1392, 60, 0 },
579 { 1856, 1392, 75, 0 },
580 { 1920, 1200, 60, 1 },
581 { 1920, 1200, 60, 0 },
583 { 1920, 1200, 75, 0 },
584 { 1920, 1200, 85, 0 },
585 { 1920, 1440, 60, 0 },
586 { 1920, 1440, 75, 0 },
589 static const struct minimode extra_modes
[] = {
590 { 1024, 576, 60, 0 },
591 { 1366, 768, 60, 0 },
592 { 1600, 900, 60, 0 },
593 { 1680, 945, 60, 0 },
594 { 1920, 1080, 60, 0 },
595 { 2048, 1152, 60, 0 },
596 { 2048, 1536, 60, 0 },
600 * Probably taken from CEA-861 spec.
601 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
603 static const struct drm_display_mode edid_cea_modes
[] = {
604 /* 1 - 640x480@60Hz */
605 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
606 752, 800, 0, 480, 490, 492, 525, 0,
607 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
608 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
609 /* 2 - 720x480@60Hz */
610 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 27000, 720, 736,
611 798, 858, 0, 480, 489, 495, 525, 0,
612 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
613 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
614 /* 3 - 720x480@60Hz */
615 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 27000, 720, 736,
616 798, 858, 0, 480, 489, 495, 525, 0,
617 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
618 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
619 /* 4 - 1280x720@60Hz */
620 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1390,
621 1430, 1650, 0, 720, 725, 730, 750, 0,
622 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
623 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
624 /* 5 - 1920x1080i@60Hz */
625 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2008,
626 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
627 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
628 DRM_MODE_FLAG_INTERLACE
),
629 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
630 /* 6 - 1440x480i@60Hz */
631 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1478,
632 1602, 1716, 0, 480, 488, 494, 525, 0,
633 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
634 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
635 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
636 /* 7 - 1440x480i@60Hz */
637 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1478,
638 1602, 1716, 0, 480, 488, 494, 525, 0,
639 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
640 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
641 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
642 /* 8 - 1440x240@60Hz */
643 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1478,
644 1602, 1716, 0, 240, 244, 247, 262, 0,
645 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
646 DRM_MODE_FLAG_DBLCLK
),
647 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
648 /* 9 - 1440x240@60Hz */
649 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1478,
650 1602, 1716, 0, 240, 244, 247, 262, 0,
651 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
652 DRM_MODE_FLAG_DBLCLK
),
653 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
654 /* 10 - 2880x480i@60Hz */
655 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
656 3204, 3432, 0, 480, 488, 494, 525, 0,
657 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
658 DRM_MODE_FLAG_INTERLACE
),
659 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
660 /* 11 - 2880x480i@60Hz */
661 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
662 3204, 3432, 0, 480, 488, 494, 525, 0,
663 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
664 DRM_MODE_FLAG_INTERLACE
),
665 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
666 /* 12 - 2880x240@60Hz */
667 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
668 3204, 3432, 0, 240, 244, 247, 262, 0,
669 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
670 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
671 /* 13 - 2880x240@60Hz */
672 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
673 3204, 3432, 0, 240, 244, 247, 262, 0,
674 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
675 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
676 /* 14 - 1440x480@60Hz */
677 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1472,
678 1596, 1716, 0, 480, 489, 495, 525, 0,
679 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
680 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
681 /* 15 - 1440x480@60Hz */
682 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1472,
683 1596, 1716, 0, 480, 489, 495, 525, 0,
684 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
685 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
686 /* 16 - 1920x1080@60Hz */
687 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
688 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
689 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
690 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
691 /* 17 - 720x576@50Hz */
692 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
693 796, 864, 0, 576, 581, 586, 625, 0,
694 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
695 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
696 /* 18 - 720x576@50Hz */
697 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
698 796, 864, 0, 576, 581, 586, 625, 0,
699 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
700 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
701 /* 19 - 1280x720@50Hz */
702 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1720,
703 1760, 1980, 0, 720, 725, 730, 750, 0,
704 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
705 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
706 /* 20 - 1920x1080i@50Hz */
707 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2448,
708 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
709 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
710 DRM_MODE_FLAG_INTERLACE
),
711 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
712 /* 21 - 1440x576i@50Hz */
713 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1464,
714 1590, 1728, 0, 576, 580, 586, 625, 0,
715 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
716 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
717 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
718 /* 22 - 1440x576i@50Hz */
719 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1464,
720 1590, 1728, 0, 576, 580, 586, 625, 0,
721 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
722 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
723 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
724 /* 23 - 1440x288@50Hz */
725 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1464,
726 1590, 1728, 0, 288, 290, 293, 312, 0,
727 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
728 DRM_MODE_FLAG_DBLCLK
),
729 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
730 /* 24 - 1440x288@50Hz */
731 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER
, 27000, 1440, 1464,
732 1590, 1728, 0, 288, 290, 293, 312, 0,
733 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
734 DRM_MODE_FLAG_DBLCLK
),
735 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
736 /* 25 - 2880x576i@50Hz */
737 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
738 3180, 3456, 0, 576, 580, 586, 625, 0,
739 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
740 DRM_MODE_FLAG_INTERLACE
),
741 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
742 /* 26 - 2880x576i@50Hz */
743 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
744 3180, 3456, 0, 576, 580, 586, 625, 0,
745 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
746 DRM_MODE_FLAG_INTERLACE
),
747 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
748 /* 27 - 2880x288@50Hz */
749 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
750 3180, 3456, 0, 288, 290, 293, 312, 0,
751 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
752 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
753 /* 28 - 2880x288@50Hz */
754 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
755 3180, 3456, 0, 288, 290, 293, 312, 0,
756 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
757 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
758 /* 29 - 1440x576@50Hz */
759 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
760 1592, 1728, 0, 576, 581, 586, 625, 0,
761 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
762 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
763 /* 30 - 1440x576@50Hz */
764 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
765 1592, 1728, 0, 576, 581, 586, 625, 0,
766 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
767 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
768 /* 31 - 1920x1080@50Hz */
769 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2448,
770 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
771 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
772 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
773 /* 32 - 1920x1080@24Hz */
774 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2558,
775 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
776 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
777 .vrefresh
= 24, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
778 /* 33 - 1920x1080@25Hz */
779 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2448,
780 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
781 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
782 .vrefresh
= 25, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
783 /* 34 - 1920x1080@30Hz */
784 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2008,
785 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
786 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
787 .vrefresh
= 30, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
788 /* 35 - 2880x480@60Hz */
789 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2944,
790 3192, 3432, 0, 480, 489, 495, 525, 0,
791 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
792 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
793 /* 36 - 2880x480@60Hz */
794 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2944,
795 3192, 3432, 0, 480, 489, 495, 525, 0,
796 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
797 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
798 /* 37 - 2880x576@50Hz */
799 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2928,
800 3184, 3456, 0, 576, 581, 586, 625, 0,
801 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
802 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
803 /* 38 - 2880x576@50Hz */
804 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2928,
805 3184, 3456, 0, 576, 581, 586, 625, 0,
806 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
807 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
808 /* 39 - 1920x1080i@50Hz */
809 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 72000, 1920, 1952,
810 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
811 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
|
812 DRM_MODE_FLAG_INTERLACE
),
813 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
814 /* 40 - 1920x1080i@100Hz */
815 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2448,
816 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
817 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
818 DRM_MODE_FLAG_INTERLACE
),
819 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
820 /* 41 - 1280x720@100Hz */
821 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1720,
822 1760, 1980, 0, 720, 725, 730, 750, 0,
823 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
824 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
825 /* 42 - 720x576@100Hz */
826 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
827 796, 864, 0, 576, 581, 586, 625, 0,
828 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
829 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
830 /* 43 - 720x576@100Hz */
831 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
832 796, 864, 0, 576, 581, 586, 625, 0,
833 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
834 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
835 /* 44 - 1440x576i@100Hz */
836 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
837 1590, 1728, 0, 576, 580, 586, 625, 0,
838 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
839 DRM_MODE_FLAG_DBLCLK
),
840 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
841 /* 45 - 1440x576i@100Hz */
842 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
843 1590, 1728, 0, 576, 580, 586, 625, 0,
844 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
845 DRM_MODE_FLAG_DBLCLK
),
846 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
847 /* 46 - 1920x1080i@120Hz */
848 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
849 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
850 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
851 DRM_MODE_FLAG_INTERLACE
),
852 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
853 /* 47 - 1280x720@120Hz */
854 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1390,
855 1430, 1650, 0, 720, 725, 730, 750, 0,
856 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
857 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
858 /* 48 - 720x480@120Hz */
859 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 54000, 720, 736,
860 798, 858, 0, 480, 489, 495, 525, 0,
861 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
862 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
863 /* 49 - 720x480@120Hz */
864 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 54000, 720, 736,
865 798, 858, 0, 480, 489, 495, 525, 0,
866 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
867 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
868 /* 50 - 1440x480i@120Hz */
869 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1478,
870 1602, 1716, 0, 480, 488, 494, 525, 0,
871 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
872 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
873 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
874 /* 51 - 1440x480i@120Hz */
875 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1478,
876 1602, 1716, 0, 480, 488, 494, 525, 0,
877 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
878 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
879 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
880 /* 52 - 720x576@200Hz */
881 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 108000, 720, 732,
882 796, 864, 0, 576, 581, 586, 625, 0,
883 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
884 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
885 /* 53 - 720x576@200Hz */
886 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 108000, 720, 732,
887 796, 864, 0, 576, 581, 586, 625, 0,
888 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
889 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
890 /* 54 - 1440x576i@200Hz */
891 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER
, 108000, 1440, 1464,
892 1590, 1728, 0, 576, 580, 586, 625, 0,
893 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
894 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
895 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
896 /* 55 - 1440x576i@200Hz */
897 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER
, 108000, 1440, 1464,
898 1590, 1728, 0, 576, 580, 586, 625, 0,
899 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
900 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
901 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
902 /* 56 - 720x480@240Hz */
903 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 108000, 720, 736,
904 798, 858, 0, 480, 489, 495, 525, 0,
905 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
906 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
907 /* 57 - 720x480@240Hz */
908 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 108000, 720, 736,
909 798, 858, 0, 480, 489, 495, 525, 0,
910 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
911 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
912 /* 58 - 1440x480i@240 */
913 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER
, 108000, 1440, 1478,
914 1602, 1716, 0, 480, 488, 494, 525, 0,
915 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
916 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
917 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
918 /* 59 - 1440x480i@240 */
919 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER
, 108000, 1440, 1478,
920 1602, 1716, 0, 480, 488, 494, 525, 0,
921 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
922 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
923 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
924 /* 60 - 1280x720@24Hz */
925 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 59400, 1280, 3040,
926 3080, 3300, 0, 720, 725, 730, 750, 0,
927 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
928 .vrefresh
= 24, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
929 /* 61 - 1280x720@25Hz */
930 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 3700,
931 3740, 3960, 0, 720, 725, 730, 750, 0,
932 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
933 .vrefresh
= 25, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
934 /* 62 - 1280x720@30Hz */
935 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 3040,
936 3080, 3300, 0, 720, 725, 730, 750, 0,
937 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
938 .vrefresh
= 30, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
939 /* 63 - 1920x1080@120Hz */
940 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2008,
941 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
942 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
943 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
944 /* 64 - 1920x1080@100Hz */
945 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2448,
946 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
947 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
948 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
954 static const struct drm_display_mode edid_4k_modes
[] = {
955 /* 1 - 3840x2160@30Hz */
956 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
957 3840, 4016, 4104, 4400, 0,
958 2160, 2168, 2178, 2250, 0,
959 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
961 /* 2 - 3840x2160@25Hz */
962 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
963 3840, 4896, 4984, 5280, 0,
964 2160, 2168, 2178, 2250, 0,
965 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
967 /* 3 - 3840x2160@24Hz */
968 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
969 3840, 5116, 5204, 5500, 0,
970 2160, 2168, 2178, 2250, 0,
971 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
973 /* 4 - 4096x2160@24Hz (SMPTE) */
974 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER
, 297000,
975 4096, 5116, 5204, 5500, 0,
976 2160, 2168, 2178, 2250, 0,
977 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
981 /*** DDC fetch and block validation ***/
983 static const u8 edid_header
[] = {
984 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
988 * drm_edid_header_is_valid - sanity check the header of the base EDID block
989 * @raw_edid: pointer to raw base EDID block
991 * Sanity check the header of the base EDID block.
993 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
995 int drm_edid_header_is_valid(const u8
*raw_edid
)
999 for (i
= 0; i
< sizeof(edid_header
); i
++)
1000 if (raw_edid
[i
] == edid_header
[i
])
1005 EXPORT_SYMBOL(drm_edid_header_is_valid
);
1007 static int edid_fixup __read_mostly
= 6;
1008 module_param_named(edid_fixup
, edid_fixup
, int, 0400);
1009 MODULE_PARM_DESC(edid_fixup
,
1010 "Minimum number of valid EDID header bytes (0-8, default 6)");
1013 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1014 * @raw_edid: pointer to raw EDID block
1015 * @block: type of block to validate (0 for base, extension otherwise)
1016 * @print_bad_edid: if true, dump bad EDID blocks to the console
1018 * Validate a base or extension EDID block and optionally dump bad blocks to
1021 * Return: True if the block is valid, false otherwise.
1023 bool drm_edid_block_valid(u8
*raw_edid
, int block
, bool print_bad_edid
)
1027 struct edid
*edid
= (struct edid
*)raw_edid
;
1029 if (WARN_ON(!raw_edid
))
1032 if (edid_fixup
> 8 || edid_fixup
< 0)
1036 int score
= drm_edid_header_is_valid(raw_edid
);
1038 else if (score
>= edid_fixup
) {
1039 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1040 memcpy(raw_edid
, edid_header
, sizeof(edid_header
));
1046 for (i
= 0; i
< EDID_LENGTH
; i
++)
1047 csum
+= raw_edid
[i
];
1049 if (print_bad_edid
) {
1050 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum
);
1053 /* allow CEA to slide through, switches mangle this */
1054 if (raw_edid
[0] != 0x02)
1058 /* per-block-type checks */
1059 switch (raw_edid
[0]) {
1061 if (edid
->version
!= 1) {
1062 DRM_ERROR("EDID has major version %d, instead of 1\n", edid
->version
);
1066 if (edid
->revision
> 4)
1067 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1077 if (print_bad_edid
) {
1078 printk(KERN_ERR
"Raw EDID:\n");
1079 print_hex_dump(KERN_ERR
, " \t", DUMP_PREFIX_NONE
, 16, 1,
1080 raw_edid
, EDID_LENGTH
, false);
1084 EXPORT_SYMBOL(drm_edid_block_valid
);
1087 * drm_edid_is_valid - sanity check EDID data
1090 * Sanity-check an entire EDID record (including extensions)
1092 * Return: True if the EDID data is valid, false otherwise.
1094 bool drm_edid_is_valid(struct edid
*edid
)
1097 u8
*raw
= (u8
*)edid
;
1102 for (i
= 0; i
<= edid
->extensions
; i
++)
1103 if (!drm_edid_block_valid(raw
+ i
* EDID_LENGTH
, i
, true))
1108 EXPORT_SYMBOL(drm_edid_is_valid
);
1110 #define DDC_SEGMENT_ADDR 0x30
1112 * drm_do_probe_ddc_edid() - get EDID information via I2C
1113 * @adapter: I2C device adaptor
1114 * @buf: EDID data buffer to be filled
1115 * @block: 128 byte EDID block to start fetching from
1116 * @len: EDID data buffer length to fetch
1118 * Try to fetch EDID information by calling I2C driver functions.
1120 * Return: 0 on success or -1 on failure.
1123 drm_do_probe_ddc_edid(struct i2c_adapter
*adapter
, unsigned char *buf
,
1126 unsigned char start
= block
* EDID_LENGTH
;
1127 unsigned char segment
= block
>> 1;
1128 unsigned char xfers
= segment
? 3 : 2;
1129 int ret
, retries
= 5;
1132 * The core I2C driver will automatically retry the transfer if the
1133 * adapter reports EAGAIN. However, we find that bit-banging transfers
1134 * are susceptible to errors under a heavily loaded machine and
1135 * generate spurious NAKs and timeouts. Retrying the transfer
1136 * of the individual block a few times seems to overcome this.
1139 struct i2c_msg msgs
[] = {
1141 .addr
= DDC_SEGMENT_ADDR
,
1159 * Avoid sending the segment addr to not upset non-compliant
1162 ret
= i2c_transfer(adapter
, &msgs
[3 - xfers
], xfers
);
1164 if (ret
== -ENXIO
) {
1165 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1169 } while (ret
!= xfers
&& --retries
);
1171 return ret
== xfers
? 0 : -1;
1174 static bool drm_edid_is_zero(u8
*in_edid
, int length
)
1176 if (memchr_inv(in_edid
, 0, length
))
1183 drm_do_get_edid(struct drm_connector
*connector
, struct i2c_adapter
*adapter
)
1185 int i
, j
= 0, valid_extensions
= 0;
1187 bool print_bad_edid
= !connector
->bad_edid_counter
|| (drm_debug
& DRM_UT_KMS
);
1189 if ((block
= kmalloc(EDID_LENGTH
, GFP_KERNEL
)) == NULL
)
1192 /* base block fetch */
1193 for (i
= 0; i
< 4; i
++) {
1194 if (drm_do_probe_ddc_edid(adapter
, block
, 0, EDID_LENGTH
))
1196 if (drm_edid_block_valid(block
, 0, print_bad_edid
))
1198 if (i
== 0 && drm_edid_is_zero(block
, EDID_LENGTH
)) {
1199 connector
->null_edid_counter
++;
1206 /* if there's no extensions, we're done */
1207 if (block
[0x7e] == 0)
1210 new = krealloc(block
, (block
[0x7e] + 1) * EDID_LENGTH
, GFP_KERNEL
);
1215 for (j
= 1; j
<= block
[0x7e]; j
++) {
1216 for (i
= 0; i
< 4; i
++) {
1217 if (drm_do_probe_ddc_edid(adapter
,
1218 block
+ (valid_extensions
+ 1) * EDID_LENGTH
,
1221 if (drm_edid_block_valid(block
+ (valid_extensions
+ 1) * EDID_LENGTH
, j
, print_bad_edid
)) {
1227 if (i
== 4 && print_bad_edid
) {
1228 dev_warn(connector
->dev
->dev
,
1229 "%s: Ignoring invalid EDID block %d.\n",
1230 drm_get_connector_name(connector
), j
);
1232 connector
->bad_edid_counter
++;
1236 if (valid_extensions
!= block
[0x7e]) {
1237 block
[EDID_LENGTH
-1] += block
[0x7e] - valid_extensions
;
1238 block
[0x7e] = valid_extensions
;
1239 new = krealloc(block
, (valid_extensions
+ 1) * EDID_LENGTH
, GFP_KERNEL
);
1248 if (print_bad_edid
) {
1249 dev_warn(connector
->dev
->dev
, "%s: EDID block %d invalid.\n",
1250 drm_get_connector_name(connector
), j
);
1252 connector
->bad_edid_counter
++;
1260 * drm_probe_ddc() - probe DDC presence
1261 * @adapter: I2C adapter to probe
1263 * Return: True on success, false on failure.
1266 drm_probe_ddc(struct i2c_adapter
*adapter
)
1270 return (drm_do_probe_ddc_edid(adapter
, &out
, 0, 1) == 0);
1272 EXPORT_SYMBOL(drm_probe_ddc
);
1275 * drm_get_edid - get EDID data, if available
1276 * @connector: connector we're probing
1277 * @adapter: I2C adapter to use for DDC
1279 * Poke the given I2C channel to grab EDID data if possible. If found,
1280 * attach it to the connector.
1282 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1284 struct edid
*drm_get_edid(struct drm_connector
*connector
,
1285 struct i2c_adapter
*adapter
)
1287 struct edid
*edid
= NULL
;
1289 if (drm_probe_ddc(adapter
))
1290 edid
= (struct edid
*)drm_do_get_edid(connector
, adapter
);
1294 EXPORT_SYMBOL(drm_get_edid
);
1297 * drm_edid_duplicate - duplicate an EDID and the extensions
1298 * @edid: EDID to duplicate
1300 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1302 struct edid
*drm_edid_duplicate(const struct edid
*edid
)
1304 return kmemdup(edid
, (edid
->extensions
+ 1) * EDID_LENGTH
, GFP_KERNEL
);
1306 EXPORT_SYMBOL(drm_edid_duplicate
);
1308 /*** EDID parsing ***/
1311 * edid_vendor - match a string against EDID's obfuscated vendor field
1312 * @edid: EDID to match
1313 * @vendor: vendor string
1315 * Returns true if @vendor is in @edid, false otherwise
1317 static bool edid_vendor(struct edid
*edid
, char *vendor
)
1319 char edid_vendor
[3];
1321 edid_vendor
[0] = ((edid
->mfg_id
[0] & 0x7c) >> 2) + '@';
1322 edid_vendor
[1] = (((edid
->mfg_id
[0] & 0x3) << 3) |
1323 ((edid
->mfg_id
[1] & 0xe0) >> 5)) + '@';
1324 edid_vendor
[2] = (edid
->mfg_id
[1] & 0x1f) + '@';
1326 return !strncmp(edid_vendor
, vendor
, 3);
1330 * edid_get_quirks - return quirk flags for a given EDID
1331 * @edid: EDID to process
1333 * This tells subsequent routines what fixes they need to apply.
1335 static u32
edid_get_quirks(struct edid
*edid
)
1337 struct edid_quirk
*quirk
;
1340 for (i
= 0; i
< ARRAY_SIZE(edid_quirk_list
); i
++) {
1341 quirk
= &edid_quirk_list
[i
];
1343 if (edid_vendor(edid
, quirk
->vendor
) &&
1344 (EDID_PRODUCT_ID(edid
) == quirk
->product_id
))
1345 return quirk
->quirks
;
1351 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1352 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1355 * edid_fixup_preferred - set preferred modes based on quirk list
1356 * @connector: has mode list to fix up
1357 * @quirks: quirks list
1359 * Walk the mode list for @connector, clearing the preferred status
1360 * on existing modes and setting it anew for the right mode ala @quirks.
1362 static void edid_fixup_preferred(struct drm_connector
*connector
,
1365 struct drm_display_mode
*t
, *cur_mode
, *preferred_mode
;
1366 int target_refresh
= 0;
1367 int cur_vrefresh
, preferred_vrefresh
;
1369 if (list_empty(&connector
->probed_modes
))
1372 if (quirks
& EDID_QUIRK_PREFER_LARGE_60
)
1373 target_refresh
= 60;
1374 if (quirks
& EDID_QUIRK_PREFER_LARGE_75
)
1375 target_refresh
= 75;
1377 preferred_mode
= list_first_entry(&connector
->probed_modes
,
1378 struct drm_display_mode
, head
);
1380 list_for_each_entry_safe(cur_mode
, t
, &connector
->probed_modes
, head
) {
1381 cur_mode
->type
&= ~DRM_MODE_TYPE_PREFERRED
;
1383 if (cur_mode
== preferred_mode
)
1386 /* Largest mode is preferred */
1387 if (MODE_SIZE(cur_mode
) > MODE_SIZE(preferred_mode
))
1388 preferred_mode
= cur_mode
;
1390 cur_vrefresh
= cur_mode
->vrefresh
?
1391 cur_mode
->vrefresh
: drm_mode_vrefresh(cur_mode
);
1392 preferred_vrefresh
= preferred_mode
->vrefresh
?
1393 preferred_mode
->vrefresh
: drm_mode_vrefresh(preferred_mode
);
1394 /* At a given size, try to get closest to target refresh */
1395 if ((MODE_SIZE(cur_mode
) == MODE_SIZE(preferred_mode
)) &&
1396 MODE_REFRESH_DIFF(cur_vrefresh
, target_refresh
) <
1397 MODE_REFRESH_DIFF(preferred_vrefresh
, target_refresh
)) {
1398 preferred_mode
= cur_mode
;
1402 preferred_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1406 mode_is_rb(const struct drm_display_mode
*mode
)
1408 return (mode
->htotal
- mode
->hdisplay
== 160) &&
1409 (mode
->hsync_end
- mode
->hdisplay
== 80) &&
1410 (mode
->hsync_end
- mode
->hsync_start
== 32) &&
1411 (mode
->vsync_start
- mode
->vdisplay
== 3);
1415 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1416 * @dev: Device to duplicate against
1417 * @hsize: Mode width
1418 * @vsize: Mode height
1419 * @fresh: Mode refresh rate
1420 * @rb: Mode reduced-blanking-ness
1422 * Walk the DMT mode list looking for a match for the given parameters.
1424 * Return: A newly allocated copy of the mode, or NULL if not found.
1426 struct drm_display_mode
*drm_mode_find_dmt(struct drm_device
*dev
,
1427 int hsize
, int vsize
, int fresh
,
1432 for (i
= 0; i
< ARRAY_SIZE(drm_dmt_modes
); i
++) {
1433 const struct drm_display_mode
*ptr
= &drm_dmt_modes
[i
];
1434 if (hsize
!= ptr
->hdisplay
)
1436 if (vsize
!= ptr
->vdisplay
)
1438 if (fresh
!= drm_mode_vrefresh(ptr
))
1440 if (rb
!= mode_is_rb(ptr
))
1443 return drm_mode_duplicate(dev
, ptr
);
1448 EXPORT_SYMBOL(drm_mode_find_dmt
);
1450 typedef void detailed_cb(struct detailed_timing
*timing
, void *closure
);
1453 cea_for_each_detailed_block(u8
*ext
, detailed_cb
*cb
, void *closure
)
1457 u8
*det_base
= ext
+ d
;
1460 for (i
= 0; i
< n
; i
++)
1461 cb((struct detailed_timing
*)(det_base
+ 18 * i
), closure
);
1465 vtb_for_each_detailed_block(u8
*ext
, detailed_cb
*cb
, void *closure
)
1467 unsigned int i
, n
= min((int)ext
[0x02], 6);
1468 u8
*det_base
= ext
+ 5;
1471 return; /* unknown version */
1473 for (i
= 0; i
< n
; i
++)
1474 cb((struct detailed_timing
*)(det_base
+ 18 * i
), closure
);
1478 drm_for_each_detailed_block(u8
*raw_edid
, detailed_cb
*cb
, void *closure
)
1481 struct edid
*edid
= (struct edid
*)raw_edid
;
1486 for (i
= 0; i
< EDID_DETAILED_TIMINGS
; i
++)
1487 cb(&(edid
->detailed_timings
[i
]), closure
);
1489 for (i
= 1; i
<= raw_edid
[0x7e]; i
++) {
1490 u8
*ext
= raw_edid
+ (i
* EDID_LENGTH
);
1493 cea_for_each_detailed_block(ext
, cb
, closure
);
1496 vtb_for_each_detailed_block(ext
, cb
, closure
);
1505 is_rb(struct detailed_timing
*t
, void *data
)
1508 if (r
[3] == EDID_DETAIL_MONITOR_RANGE
)
1510 *(bool *)data
= true;
1513 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1515 drm_monitor_supports_rb(struct edid
*edid
)
1517 if (edid
->revision
>= 4) {
1519 drm_for_each_detailed_block((u8
*)edid
, is_rb
, &ret
);
1523 return ((edid
->input
& DRM_EDID_INPUT_DIGITAL
) != 0);
1527 find_gtf2(struct detailed_timing
*t
, void *data
)
1530 if (r
[3] == EDID_DETAIL_MONITOR_RANGE
&& r
[10] == 0x02)
1534 /* Secondary GTF curve kicks in above some break frequency */
1536 drm_gtf2_hbreak(struct edid
*edid
)
1539 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1540 return r
? (r
[12] * 2) : 0;
1544 drm_gtf2_2c(struct edid
*edid
)
1547 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1548 return r
? r
[13] : 0;
1552 drm_gtf2_m(struct edid
*edid
)
1555 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1556 return r
? (r
[15] << 8) + r
[14] : 0;
1560 drm_gtf2_k(struct edid
*edid
)
1563 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1564 return r
? r
[16] : 0;
1568 drm_gtf2_2j(struct edid
*edid
)
1571 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1572 return r
? r
[17] : 0;
1576 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1577 * @edid: EDID block to scan
1579 static int standard_timing_level(struct edid
*edid
)
1581 if (edid
->revision
>= 2) {
1582 if (edid
->revision
>= 4 && (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
))
1584 if (drm_gtf2_hbreak(edid
))
1592 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1593 * monitors fill with ascii space (0x20) instead.
1596 bad_std_timing(u8 a
, u8 b
)
1598 return (a
== 0x00 && b
== 0x00) ||
1599 (a
== 0x01 && b
== 0x01) ||
1600 (a
== 0x20 && b
== 0x20);
1604 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1605 * @connector: connector of for the EDID block
1606 * @edid: EDID block to scan
1607 * @t: standard timing params
1609 * Take the standard timing params (in this case width, aspect, and refresh)
1610 * and convert them into a real mode using CVT/GTF/DMT.
1612 static struct drm_display_mode
*
1613 drm_mode_std(struct drm_connector
*connector
, struct edid
*edid
,
1614 struct std_timing
*t
)
1616 struct drm_device
*dev
= connector
->dev
;
1617 struct drm_display_mode
*m
, *mode
= NULL
;
1620 unsigned aspect_ratio
= (t
->vfreq_aspect
& EDID_TIMING_ASPECT_MASK
)
1621 >> EDID_TIMING_ASPECT_SHIFT
;
1622 unsigned vfreq
= (t
->vfreq_aspect
& EDID_TIMING_VFREQ_MASK
)
1623 >> EDID_TIMING_VFREQ_SHIFT
;
1624 int timing_level
= standard_timing_level(edid
);
1626 if (bad_std_timing(t
->hsize
, t
->vfreq_aspect
))
1629 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1630 hsize
= t
->hsize
* 8 + 248;
1631 /* vrefresh_rate = vfreq + 60 */
1632 vrefresh_rate
= vfreq
+ 60;
1633 /* the vdisplay is calculated based on the aspect ratio */
1634 if (aspect_ratio
== 0) {
1635 if (edid
->revision
< 3)
1638 vsize
= (hsize
* 10) / 16;
1639 } else if (aspect_ratio
== 1)
1640 vsize
= (hsize
* 3) / 4;
1641 else if (aspect_ratio
== 2)
1642 vsize
= (hsize
* 4) / 5;
1644 vsize
= (hsize
* 9) / 16;
1646 /* HDTV hack, part 1 */
1647 if (vrefresh_rate
== 60 &&
1648 ((hsize
== 1360 && vsize
== 765) ||
1649 (hsize
== 1368 && vsize
== 769))) {
1655 * If this connector already has a mode for this size and refresh
1656 * rate (because it came from detailed or CVT info), use that
1657 * instead. This way we don't have to guess at interlace or
1660 list_for_each_entry(m
, &connector
->probed_modes
, head
)
1661 if (m
->hdisplay
== hsize
&& m
->vdisplay
== vsize
&&
1662 drm_mode_vrefresh(m
) == vrefresh_rate
)
1665 /* HDTV hack, part 2 */
1666 if (hsize
== 1366 && vsize
== 768 && vrefresh_rate
== 60) {
1667 mode
= drm_cvt_mode(dev
, 1366, 768, vrefresh_rate
, 0, 0,
1669 mode
->hdisplay
= 1366;
1670 mode
->hsync_start
= mode
->hsync_start
- 1;
1671 mode
->hsync_end
= mode
->hsync_end
- 1;
1675 /* check whether it can be found in default mode table */
1676 if (drm_monitor_supports_rb(edid
)) {
1677 mode
= drm_mode_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
,
1682 mode
= drm_mode_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
, false);
1686 /* okay, generate it */
1687 switch (timing_level
) {
1691 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
1695 * This is potentially wrong if there's ever a monitor with
1696 * more than one ranges section, each claiming a different
1697 * secondary GTF curve. Please don't do that.
1699 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
1702 if (drm_mode_hsync(mode
) > drm_gtf2_hbreak(edid
)) {
1703 drm_mode_destroy(dev
, mode
);
1704 mode
= drm_gtf_mode_complex(dev
, hsize
, vsize
,
1705 vrefresh_rate
, 0, 0,
1713 mode
= drm_cvt_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0,
1721 * EDID is delightfully ambiguous about how interlaced modes are to be
1722 * encoded. Our internal representation is of frame height, but some
1723 * HDTV detailed timings are encoded as field height.
1725 * The format list here is from CEA, in frame size. Technically we
1726 * should be checking refresh rate too. Whatever.
1729 drm_mode_do_interlace_quirk(struct drm_display_mode
*mode
,
1730 struct detailed_pixel_timing
*pt
)
1733 static const struct {
1735 } cea_interlaced
[] = {
1745 if (!(pt
->misc
& DRM_EDID_PT_INTERLACED
))
1748 for (i
= 0; i
< ARRAY_SIZE(cea_interlaced
); i
++) {
1749 if ((mode
->hdisplay
== cea_interlaced
[i
].w
) &&
1750 (mode
->vdisplay
== cea_interlaced
[i
].h
/ 2)) {
1751 mode
->vdisplay
*= 2;
1752 mode
->vsync_start
*= 2;
1753 mode
->vsync_end
*= 2;
1759 mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
1763 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1764 * @dev: DRM device (needed to create new mode)
1766 * @timing: EDID detailed timing info
1767 * @quirks: quirks to apply
1769 * An EDID detailed timing block contains enough info for us to create and
1770 * return a new struct drm_display_mode.
1772 static struct drm_display_mode
*drm_mode_detailed(struct drm_device
*dev
,
1774 struct detailed_timing
*timing
,
1777 struct drm_display_mode
*mode
;
1778 struct detailed_pixel_timing
*pt
= &timing
->data
.pixel_data
;
1779 unsigned hactive
= (pt
->hactive_hblank_hi
& 0xf0) << 4 | pt
->hactive_lo
;
1780 unsigned vactive
= (pt
->vactive_vblank_hi
& 0xf0) << 4 | pt
->vactive_lo
;
1781 unsigned hblank
= (pt
->hactive_hblank_hi
& 0xf) << 8 | pt
->hblank_lo
;
1782 unsigned vblank
= (pt
->vactive_vblank_hi
& 0xf) << 8 | pt
->vblank_lo
;
1783 unsigned hsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc0) << 2 | pt
->hsync_offset_lo
;
1784 unsigned hsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x30) << 4 | pt
->hsync_pulse_width_lo
;
1785 unsigned vsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc) << 2 | pt
->vsync_offset_pulse_width_lo
>> 4;
1786 unsigned vsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x3) << 4 | (pt
->vsync_offset_pulse_width_lo
& 0xf);
1788 /* ignore tiny modes */
1789 if (hactive
< 64 || vactive
< 64)
1792 if (pt
->misc
& DRM_EDID_PT_STEREO
) {
1793 DRM_DEBUG_KMS("stereo mode not supported\n");
1796 if (!(pt
->misc
& DRM_EDID_PT_SEPARATE_SYNC
)) {
1797 DRM_DEBUG_KMS("composite sync not supported\n");
1800 /* it is incorrect if hsync/vsync width is zero */
1801 if (!hsync_pulse_width
|| !vsync_pulse_width
) {
1802 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1803 "Wrong Hsync/Vsync pulse width\n");
1807 if (quirks
& EDID_QUIRK_FORCE_REDUCED_BLANKING
) {
1808 mode
= drm_cvt_mode(dev
, hactive
, vactive
, 60, true, false, false);
1815 mode
= drm_mode_create(dev
);
1819 if (quirks
& EDID_QUIRK_135_CLOCK_TOO_HIGH
)
1820 timing
->pixel_clock
= cpu_to_le16(1088);
1822 mode
->clock
= le16_to_cpu(timing
->pixel_clock
) * 10;
1824 mode
->hdisplay
= hactive
;
1825 mode
->hsync_start
= mode
->hdisplay
+ hsync_offset
;
1826 mode
->hsync_end
= mode
->hsync_start
+ hsync_pulse_width
;
1827 mode
->htotal
= mode
->hdisplay
+ hblank
;
1829 mode
->vdisplay
= vactive
;
1830 mode
->vsync_start
= mode
->vdisplay
+ vsync_offset
;
1831 mode
->vsync_end
= mode
->vsync_start
+ vsync_pulse_width
;
1832 mode
->vtotal
= mode
->vdisplay
+ vblank
;
1834 /* Some EDIDs have bogus h/vtotal values */
1835 if (mode
->hsync_end
> mode
->htotal
)
1836 mode
->htotal
= mode
->hsync_end
+ 1;
1837 if (mode
->vsync_end
> mode
->vtotal
)
1838 mode
->vtotal
= mode
->vsync_end
+ 1;
1840 drm_mode_do_interlace_quirk(mode
, pt
);
1842 if (quirks
& EDID_QUIRK_DETAILED_SYNC_PP
) {
1843 pt
->misc
|= DRM_EDID_PT_HSYNC_POSITIVE
| DRM_EDID_PT_VSYNC_POSITIVE
;
1846 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_HSYNC_POSITIVE
) ?
1847 DRM_MODE_FLAG_PHSYNC
: DRM_MODE_FLAG_NHSYNC
;
1848 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_VSYNC_POSITIVE
) ?
1849 DRM_MODE_FLAG_PVSYNC
: DRM_MODE_FLAG_NVSYNC
;
1852 mode
->width_mm
= pt
->width_mm_lo
| (pt
->width_height_mm_hi
& 0xf0) << 4;
1853 mode
->height_mm
= pt
->height_mm_lo
| (pt
->width_height_mm_hi
& 0xf) << 8;
1855 if (quirks
& EDID_QUIRK_DETAILED_IN_CM
) {
1856 mode
->width_mm
*= 10;
1857 mode
->height_mm
*= 10;
1860 if (quirks
& EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
) {
1861 mode
->width_mm
= edid
->width_cm
* 10;
1862 mode
->height_mm
= edid
->height_cm
* 10;
1865 mode
->type
= DRM_MODE_TYPE_DRIVER
;
1866 mode
->vrefresh
= drm_mode_vrefresh(mode
);
1867 drm_mode_set_name(mode
);
1873 mode_in_hsync_range(const struct drm_display_mode
*mode
,
1874 struct edid
*edid
, u8
*t
)
1876 int hsync
, hmin
, hmax
;
1879 if (edid
->revision
>= 4)
1880 hmin
+= ((t
[4] & 0x04) ? 255 : 0);
1882 if (edid
->revision
>= 4)
1883 hmax
+= ((t
[4] & 0x08) ? 255 : 0);
1884 hsync
= drm_mode_hsync(mode
);
1886 return (hsync
<= hmax
&& hsync
>= hmin
);
1890 mode_in_vsync_range(const struct drm_display_mode
*mode
,
1891 struct edid
*edid
, u8
*t
)
1893 int vsync
, vmin
, vmax
;
1896 if (edid
->revision
>= 4)
1897 vmin
+= ((t
[4] & 0x01) ? 255 : 0);
1899 if (edid
->revision
>= 4)
1900 vmax
+= ((t
[4] & 0x02) ? 255 : 0);
1901 vsync
= drm_mode_vrefresh(mode
);
1903 return (vsync
<= vmax
&& vsync
>= vmin
);
1907 range_pixel_clock(struct edid
*edid
, u8
*t
)
1910 if (t
[9] == 0 || t
[9] == 255)
1913 /* 1.4 with CVT support gives us real precision, yay */
1914 if (edid
->revision
>= 4 && t
[10] == 0x04)
1915 return (t
[9] * 10000) - ((t
[12] >> 2) * 250);
1917 /* 1.3 is pathetic, so fuzz up a bit */
1918 return t
[9] * 10000 + 5001;
1922 mode_in_range(const struct drm_display_mode
*mode
, struct edid
*edid
,
1923 struct detailed_timing
*timing
)
1926 u8
*t
= (u8
*)timing
;
1928 if (!mode_in_hsync_range(mode
, edid
, t
))
1931 if (!mode_in_vsync_range(mode
, edid
, t
))
1934 if ((max_clock
= range_pixel_clock(edid
, t
)))
1935 if (mode
->clock
> max_clock
)
1938 /* 1.4 max horizontal check */
1939 if (edid
->revision
>= 4 && t
[10] == 0x04)
1940 if (t
[13] && mode
->hdisplay
> 8 * (t
[13] + (256 * (t
[12]&0x3))))
1943 if (mode_is_rb(mode
) && !drm_monitor_supports_rb(edid
))
1949 static bool valid_inferred_mode(const struct drm_connector
*connector
,
1950 const struct drm_display_mode
*mode
)
1952 struct drm_display_mode
*m
;
1955 list_for_each_entry(m
, &connector
->probed_modes
, head
) {
1956 if (mode
->hdisplay
== m
->hdisplay
&&
1957 mode
->vdisplay
== m
->vdisplay
&&
1958 drm_mode_vrefresh(mode
) == drm_mode_vrefresh(m
))
1959 return false; /* duplicated */
1960 if (mode
->hdisplay
<= m
->hdisplay
&&
1961 mode
->vdisplay
<= m
->vdisplay
)
1968 drm_dmt_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
1969 struct detailed_timing
*timing
)
1972 struct drm_display_mode
*newmode
;
1973 struct drm_device
*dev
= connector
->dev
;
1975 for (i
= 0; i
< ARRAY_SIZE(drm_dmt_modes
); i
++) {
1976 if (mode_in_range(drm_dmt_modes
+ i
, edid
, timing
) &&
1977 valid_inferred_mode(connector
, drm_dmt_modes
+ i
)) {
1978 newmode
= drm_mode_duplicate(dev
, &drm_dmt_modes
[i
]);
1980 drm_mode_probed_add(connector
, newmode
);
1989 /* fix up 1366x768 mode from 1368x768;
1990 * GFT/CVT can't express 1366 width which isn't dividable by 8
1992 static void fixup_mode_1366x768(struct drm_display_mode
*mode
)
1994 if (mode
->hdisplay
== 1368 && mode
->vdisplay
== 768) {
1995 mode
->hdisplay
= 1366;
1996 mode
->hsync_start
--;
1998 drm_mode_set_name(mode
);
2003 drm_gtf_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2004 struct detailed_timing
*timing
)
2007 struct drm_display_mode
*newmode
;
2008 struct drm_device
*dev
= connector
->dev
;
2010 for (i
= 0; i
< ARRAY_SIZE(extra_modes
); i
++) {
2011 const struct minimode
*m
= &extra_modes
[i
];
2012 newmode
= drm_gtf_mode(dev
, m
->w
, m
->h
, m
->r
, 0, 0);
2016 fixup_mode_1366x768(newmode
);
2017 if (!mode_in_range(newmode
, edid
, timing
) ||
2018 !valid_inferred_mode(connector
, newmode
)) {
2019 drm_mode_destroy(dev
, newmode
);
2023 drm_mode_probed_add(connector
, newmode
);
2031 drm_cvt_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2032 struct detailed_timing
*timing
)
2035 struct drm_display_mode
*newmode
;
2036 struct drm_device
*dev
= connector
->dev
;
2037 bool rb
= drm_monitor_supports_rb(edid
);
2039 for (i
= 0; i
< ARRAY_SIZE(extra_modes
); i
++) {
2040 const struct minimode
*m
= &extra_modes
[i
];
2041 newmode
= drm_cvt_mode(dev
, m
->w
, m
->h
, m
->r
, rb
, 0, 0);
2045 fixup_mode_1366x768(newmode
);
2046 if (!mode_in_range(newmode
, edid
, timing
) ||
2047 !valid_inferred_mode(connector
, newmode
)) {
2048 drm_mode_destroy(dev
, newmode
);
2052 drm_mode_probed_add(connector
, newmode
);
2060 do_inferred_modes(struct detailed_timing
*timing
, void *c
)
2062 struct detailed_mode_closure
*closure
= c
;
2063 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2064 struct detailed_data_monitor_range
*range
= &data
->data
.range
;
2066 if (data
->type
!= EDID_DETAIL_MONITOR_RANGE
)
2069 closure
->modes
+= drm_dmt_modes_for_range(closure
->connector
,
2073 if (!version_greater(closure
->edid
, 1, 1))
2074 return; /* GTF not defined yet */
2076 switch (range
->flags
) {
2077 case 0x02: /* secondary gtf, XXX could do more */
2078 case 0x00: /* default gtf */
2079 closure
->modes
+= drm_gtf_modes_for_range(closure
->connector
,
2083 case 0x04: /* cvt, only in 1.4+ */
2084 if (!version_greater(closure
->edid
, 1, 3))
2087 closure
->modes
+= drm_cvt_modes_for_range(closure
->connector
,
2091 case 0x01: /* just the ranges, no formula */
2098 add_inferred_modes(struct drm_connector
*connector
, struct edid
*edid
)
2100 struct detailed_mode_closure closure
= {
2101 connector
, edid
, 0, 0, 0
2104 if (version_greater(edid
, 1, 0))
2105 drm_for_each_detailed_block((u8
*)edid
, do_inferred_modes
,
2108 return closure
.modes
;
2112 drm_est3_modes(struct drm_connector
*connector
, struct detailed_timing
*timing
)
2114 int i
, j
, m
, modes
= 0;
2115 struct drm_display_mode
*mode
;
2116 u8
*est
= ((u8
*)timing
) + 5;
2118 for (i
= 0; i
< 6; i
++) {
2119 for (j
= 7; j
>= 0; j
--) {
2120 m
= (i
* 8) + (7 - j
);
2121 if (m
>= ARRAY_SIZE(est3_modes
))
2123 if (est
[i
] & (1 << j
)) {
2124 mode
= drm_mode_find_dmt(connector
->dev
,
2130 drm_mode_probed_add(connector
, mode
);
2141 do_established_modes(struct detailed_timing
*timing
, void *c
)
2143 struct detailed_mode_closure
*closure
= c
;
2144 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2146 if (data
->type
== EDID_DETAIL_EST_TIMINGS
)
2147 closure
->modes
+= drm_est3_modes(closure
->connector
, timing
);
2151 * add_established_modes - get est. modes from EDID and add them
2152 * @connector: connector to add mode(s) to
2153 * @edid: EDID block to scan
2155 * Each EDID block contains a bitmap of the supported "established modes" list
2156 * (defined above). Tease them out and add them to the global modes list.
2159 add_established_modes(struct drm_connector
*connector
, struct edid
*edid
)
2161 struct drm_device
*dev
= connector
->dev
;
2162 unsigned long est_bits
= edid
->established_timings
.t1
|
2163 (edid
->established_timings
.t2
<< 8) |
2164 ((edid
->established_timings
.mfg_rsvd
& 0x80) << 9);
2166 struct detailed_mode_closure closure
= {
2167 connector
, edid
, 0, 0, 0
2170 for (i
= 0; i
<= EDID_EST_TIMINGS
; i
++) {
2171 if (est_bits
& (1<<i
)) {
2172 struct drm_display_mode
*newmode
;
2173 newmode
= drm_mode_duplicate(dev
, &edid_est_modes
[i
]);
2175 drm_mode_probed_add(connector
, newmode
);
2181 if (version_greater(edid
, 1, 0))
2182 drm_for_each_detailed_block((u8
*)edid
,
2183 do_established_modes
, &closure
);
2185 return modes
+ closure
.modes
;
2189 do_standard_modes(struct detailed_timing
*timing
, void *c
)
2191 struct detailed_mode_closure
*closure
= c
;
2192 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2193 struct drm_connector
*connector
= closure
->connector
;
2194 struct edid
*edid
= closure
->edid
;
2196 if (data
->type
== EDID_DETAIL_STD_MODES
) {
2198 for (i
= 0; i
< 6; i
++) {
2199 struct std_timing
*std
;
2200 struct drm_display_mode
*newmode
;
2202 std
= &data
->data
.timings
[i
];
2203 newmode
= drm_mode_std(connector
, edid
, std
);
2205 drm_mode_probed_add(connector
, newmode
);
2213 * add_standard_modes - get std. modes from EDID and add them
2214 * @connector: connector to add mode(s) to
2215 * @edid: EDID block to scan
2217 * Standard modes can be calculated using the appropriate standard (DMT,
2218 * GTF or CVT. Grab them from @edid and add them to the list.
2221 add_standard_modes(struct drm_connector
*connector
, struct edid
*edid
)
2224 struct detailed_mode_closure closure
= {
2225 connector
, edid
, 0, 0, 0
2228 for (i
= 0; i
< EDID_STD_TIMINGS
; i
++) {
2229 struct drm_display_mode
*newmode
;
2231 newmode
= drm_mode_std(connector
, edid
,
2232 &edid
->standard_timings
[i
]);
2234 drm_mode_probed_add(connector
, newmode
);
2239 if (version_greater(edid
, 1, 0))
2240 drm_for_each_detailed_block((u8
*)edid
, do_standard_modes
,
2243 /* XXX should also look for standard codes in VTB blocks */
2245 return modes
+ closure
.modes
;
2248 static int drm_cvt_modes(struct drm_connector
*connector
,
2249 struct detailed_timing
*timing
)
2251 int i
, j
, modes
= 0;
2252 struct drm_display_mode
*newmode
;
2253 struct drm_device
*dev
= connector
->dev
;
2254 struct cvt_timing
*cvt
;
2255 const int rates
[] = { 60, 85, 75, 60, 50 };
2256 const u8 empty
[3] = { 0, 0, 0 };
2258 for (i
= 0; i
< 4; i
++) {
2259 int uninitialized_var(width
), height
;
2260 cvt
= &(timing
->data
.other_data
.data
.cvt
[i
]);
2262 if (!memcmp(cvt
->code
, empty
, 3))
2265 height
= (cvt
->code
[0] + ((cvt
->code
[1] & 0xf0) << 4) + 1) * 2;
2266 switch (cvt
->code
[1] & 0x0c) {
2268 width
= height
* 4 / 3;
2271 width
= height
* 16 / 9;
2274 width
= height
* 16 / 10;
2277 width
= height
* 15 / 9;
2281 for (j
= 1; j
< 5; j
++) {
2282 if (cvt
->code
[2] & (1 << j
)) {
2283 newmode
= drm_cvt_mode(dev
, width
, height
,
2287 drm_mode_probed_add(connector
, newmode
);
2298 do_cvt_mode(struct detailed_timing
*timing
, void *c
)
2300 struct detailed_mode_closure
*closure
= c
;
2301 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2303 if (data
->type
== EDID_DETAIL_CVT_3BYTE
)
2304 closure
->modes
+= drm_cvt_modes(closure
->connector
, timing
);
2308 add_cvt_modes(struct drm_connector
*connector
, struct edid
*edid
)
2310 struct detailed_mode_closure closure
= {
2311 connector
, edid
, 0, 0, 0
2314 if (version_greater(edid
, 1, 2))
2315 drm_for_each_detailed_block((u8
*)edid
, do_cvt_mode
, &closure
);
2317 /* XXX should also look for CVT codes in VTB blocks */
2319 return closure
.modes
;
2323 do_detailed_mode(struct detailed_timing
*timing
, void *c
)
2325 struct detailed_mode_closure
*closure
= c
;
2326 struct drm_display_mode
*newmode
;
2328 if (timing
->pixel_clock
) {
2329 newmode
= drm_mode_detailed(closure
->connector
->dev
,
2330 closure
->edid
, timing
,
2335 if (closure
->preferred
)
2336 newmode
->type
|= DRM_MODE_TYPE_PREFERRED
;
2338 drm_mode_probed_add(closure
->connector
, newmode
);
2340 closure
->preferred
= 0;
2345 * add_detailed_modes - Add modes from detailed timings
2346 * @connector: attached connector
2347 * @edid: EDID block to scan
2348 * @quirks: quirks to apply
2351 add_detailed_modes(struct drm_connector
*connector
, struct edid
*edid
,
2354 struct detailed_mode_closure closure
= {
2362 if (closure
.preferred
&& !version_greater(edid
, 1, 3))
2364 (edid
->features
& DRM_EDID_FEATURE_PREFERRED_TIMING
);
2366 drm_for_each_detailed_block((u8
*)edid
, do_detailed_mode
, &closure
);
2368 return closure
.modes
;
2371 #define AUDIO_BLOCK 0x01
2372 #define VIDEO_BLOCK 0x02
2373 #define VENDOR_BLOCK 0x03
2374 #define SPEAKER_BLOCK 0x04
2375 #define VIDEO_CAPABILITY_BLOCK 0x07
2376 #define EDID_BASIC_AUDIO (1 << 6)
2377 #define EDID_CEA_YCRCB444 (1 << 5)
2378 #define EDID_CEA_YCRCB422 (1 << 4)
2379 #define EDID_CEA_VCDB_QS (1 << 6)
2382 * Search EDID for CEA extension block.
2384 static u8
*drm_find_cea_extension(struct edid
*edid
)
2386 u8
*edid_ext
= NULL
;
2389 /* No EDID or EDID extensions */
2390 if (edid
== NULL
|| edid
->extensions
== 0)
2393 /* Find CEA extension */
2394 for (i
= 0; i
< edid
->extensions
; i
++) {
2395 edid_ext
= (u8
*)edid
+ EDID_LENGTH
* (i
+ 1);
2396 if (edid_ext
[0] == CEA_EXT
)
2400 if (i
== edid
->extensions
)
2407 * Calculate the alternate clock for the CEA mode
2408 * (60Hz vs. 59.94Hz etc.)
2411 cea_mode_alternate_clock(const struct drm_display_mode
*cea_mode
)
2413 unsigned int clock
= cea_mode
->clock
;
2415 if (cea_mode
->vrefresh
% 6 != 0)
2419 * edid_cea_modes contains the 59.94Hz
2420 * variant for 240 and 480 line modes,
2421 * and the 60Hz variant otherwise.
2423 if (cea_mode
->vdisplay
== 240 || cea_mode
->vdisplay
== 480)
2424 clock
= clock
* 1001 / 1000;
2426 clock
= DIV_ROUND_UP(clock
* 1000, 1001);
2432 * drm_match_cea_mode - look for a CEA mode matching given mode
2433 * @to_match: display mode
2435 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2438 u8
drm_match_cea_mode(const struct drm_display_mode
*to_match
)
2442 if (!to_match
->clock
)
2445 for (mode
= 0; mode
< ARRAY_SIZE(edid_cea_modes
); mode
++) {
2446 const struct drm_display_mode
*cea_mode
= &edid_cea_modes
[mode
];
2447 unsigned int clock1
, clock2
;
2449 /* Check both 60Hz and 59.94Hz */
2450 clock1
= cea_mode
->clock
;
2451 clock2
= cea_mode_alternate_clock(cea_mode
);
2453 if ((KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock1
) ||
2454 KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock2
)) &&
2455 drm_mode_equal_no_clocks_no_stereo(to_match
, cea_mode
))
2460 EXPORT_SYMBOL(drm_match_cea_mode
);
2463 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2464 * the input VIC from the CEA mode list
2465 * @video_code: ID given to each of the CEA modes
2467 * Returns picture aspect ratio
2469 enum hdmi_picture_aspect
drm_get_cea_aspect_ratio(const u8 video_code
)
2471 /* return picture aspect ratio for video_code - 1 to access the
2472 * right array element
2474 return edid_cea_modes
[video_code
-1].picture_aspect_ratio
;
2476 EXPORT_SYMBOL(drm_get_cea_aspect_ratio
);
2479 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2482 * It's almost like cea_mode_alternate_clock(), we just need to add an
2483 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2487 hdmi_mode_alternate_clock(const struct drm_display_mode
*hdmi_mode
)
2489 if (hdmi_mode
->vdisplay
== 4096 && hdmi_mode
->hdisplay
== 2160)
2490 return hdmi_mode
->clock
;
2492 return cea_mode_alternate_clock(hdmi_mode
);
2496 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2497 * @to_match: display mode
2499 * An HDMI mode is one defined in the HDMI vendor specific block.
2501 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2503 static u8
drm_match_hdmi_mode(const struct drm_display_mode
*to_match
)
2507 if (!to_match
->clock
)
2510 for (mode
= 0; mode
< ARRAY_SIZE(edid_4k_modes
); mode
++) {
2511 const struct drm_display_mode
*hdmi_mode
= &edid_4k_modes
[mode
];
2512 unsigned int clock1
, clock2
;
2514 /* Make sure to also match alternate clocks */
2515 clock1
= hdmi_mode
->clock
;
2516 clock2
= hdmi_mode_alternate_clock(hdmi_mode
);
2518 if ((KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock1
) ||
2519 KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock2
)) &&
2520 drm_mode_equal_no_clocks_no_stereo(to_match
, hdmi_mode
))
2527 add_alternate_cea_modes(struct drm_connector
*connector
, struct edid
*edid
)
2529 struct drm_device
*dev
= connector
->dev
;
2530 struct drm_display_mode
*mode
, *tmp
;
2534 /* Don't add CEA modes if the CEA extension block is missing */
2535 if (!drm_find_cea_extension(edid
))
2539 * Go through all probed modes and create a new mode
2540 * with the alternate clock for certain CEA modes.
2542 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
2543 const struct drm_display_mode
*cea_mode
= NULL
;
2544 struct drm_display_mode
*newmode
;
2545 u8 mode_idx
= drm_match_cea_mode(mode
) - 1;
2546 unsigned int clock1
, clock2
;
2548 if (mode_idx
< ARRAY_SIZE(edid_cea_modes
)) {
2549 cea_mode
= &edid_cea_modes
[mode_idx
];
2550 clock2
= cea_mode_alternate_clock(cea_mode
);
2552 mode_idx
= drm_match_hdmi_mode(mode
) - 1;
2553 if (mode_idx
< ARRAY_SIZE(edid_4k_modes
)) {
2554 cea_mode
= &edid_4k_modes
[mode_idx
];
2555 clock2
= hdmi_mode_alternate_clock(cea_mode
);
2562 clock1
= cea_mode
->clock
;
2564 if (clock1
== clock2
)
2567 if (mode
->clock
!= clock1
&& mode
->clock
!= clock2
)
2570 newmode
= drm_mode_duplicate(dev
, cea_mode
);
2574 /* Carry over the stereo flags */
2575 newmode
->flags
|= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
2578 * The current mode could be either variant. Make
2579 * sure to pick the "other" clock for the new mode.
2581 if (mode
->clock
!= clock1
)
2582 newmode
->clock
= clock1
;
2584 newmode
->clock
= clock2
;
2586 list_add_tail(&newmode
->head
, &list
);
2589 list_for_each_entry_safe(mode
, tmp
, &list
, head
) {
2590 list_del(&mode
->head
);
2591 drm_mode_probed_add(connector
, mode
);
2598 static struct drm_display_mode
*
2599 drm_display_mode_from_vic_index(struct drm_connector
*connector
,
2600 const u8
*video_db
, u8 video_len
,
2603 struct drm_device
*dev
= connector
->dev
;
2604 struct drm_display_mode
*newmode
;
2607 if (video_db
== NULL
|| video_index
>= video_len
)
2610 /* CEA modes are numbered 1..127 */
2611 cea_mode
= (video_db
[video_index
] & 127) - 1;
2612 if (cea_mode
>= ARRAY_SIZE(edid_cea_modes
))
2615 newmode
= drm_mode_duplicate(dev
, &edid_cea_modes
[cea_mode
]);
2619 newmode
->vrefresh
= 0;
2625 do_cea_modes(struct drm_connector
*connector
, const u8
*db
, u8 len
)
2629 for (i
= 0; i
< len
; i
++) {
2630 struct drm_display_mode
*mode
;
2631 mode
= drm_display_mode_from_vic_index(connector
, db
, len
, i
);
2633 drm_mode_probed_add(connector
, mode
);
2641 struct stereo_mandatory_mode
{
2642 int width
, height
, vrefresh
;
2646 static const struct stereo_mandatory_mode stereo_mandatory_modes
[] = {
2647 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2648 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING
},
2650 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
},
2652 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
},
2653 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2654 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING
},
2655 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2656 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING
}
2660 stereo_match_mandatory(const struct drm_display_mode
*mode
,
2661 const struct stereo_mandatory_mode
*stereo_mode
)
2663 unsigned int interlaced
= mode
->flags
& DRM_MODE_FLAG_INTERLACE
;
2665 return mode
->hdisplay
== stereo_mode
->width
&&
2666 mode
->vdisplay
== stereo_mode
->height
&&
2667 interlaced
== (stereo_mode
->flags
& DRM_MODE_FLAG_INTERLACE
) &&
2668 drm_mode_vrefresh(mode
) == stereo_mode
->vrefresh
;
2671 static int add_hdmi_mandatory_stereo_modes(struct drm_connector
*connector
)
2673 struct drm_device
*dev
= connector
->dev
;
2674 const struct drm_display_mode
*mode
;
2675 struct list_head stereo_modes
;
2678 INIT_LIST_HEAD(&stereo_modes
);
2680 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
2681 for (i
= 0; i
< ARRAY_SIZE(stereo_mandatory_modes
); i
++) {
2682 const struct stereo_mandatory_mode
*mandatory
;
2683 struct drm_display_mode
*new_mode
;
2685 if (!stereo_match_mandatory(mode
,
2686 &stereo_mandatory_modes
[i
]))
2689 mandatory
= &stereo_mandatory_modes
[i
];
2690 new_mode
= drm_mode_duplicate(dev
, mode
);
2694 new_mode
->flags
|= mandatory
->flags
;
2695 list_add_tail(&new_mode
->head
, &stereo_modes
);
2700 list_splice_tail(&stereo_modes
, &connector
->probed_modes
);
2705 static int add_hdmi_mode(struct drm_connector
*connector
, u8 vic
)
2707 struct drm_device
*dev
= connector
->dev
;
2708 struct drm_display_mode
*newmode
;
2710 vic
--; /* VICs start at 1 */
2711 if (vic
>= ARRAY_SIZE(edid_4k_modes
)) {
2712 DRM_ERROR("Unknown HDMI VIC: %d\n", vic
);
2716 newmode
= drm_mode_duplicate(dev
, &edid_4k_modes
[vic
]);
2720 drm_mode_probed_add(connector
, newmode
);
2725 static int add_3d_struct_modes(struct drm_connector
*connector
, u16 structure
,
2726 const u8
*video_db
, u8 video_len
, u8 video_index
)
2728 struct drm_display_mode
*newmode
;
2731 if (structure
& (1 << 0)) {
2732 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
2736 newmode
->flags
|= DRM_MODE_FLAG_3D_FRAME_PACKING
;
2737 drm_mode_probed_add(connector
, newmode
);
2741 if (structure
& (1 << 6)) {
2742 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
2746 newmode
->flags
|= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
;
2747 drm_mode_probed_add(connector
, newmode
);
2751 if (structure
& (1 << 8)) {
2752 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
2756 newmode
->flags
|= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
;
2757 drm_mode_probed_add(connector
, newmode
);
2766 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2767 * @connector: connector corresponding to the HDMI sink
2768 * @db: start of the CEA vendor specific block
2769 * @len: length of the CEA block payload, ie. one can access up to db[len]
2771 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2772 * also adds the stereo 3d modes when applicable.
2775 do_hdmi_vsdb_modes(struct drm_connector
*connector
, const u8
*db
, u8 len
,
2776 const u8
*video_db
, u8 video_len
)
2778 int modes
= 0, offset
= 0, i
, multi_present
= 0, multi_len
;
2779 u8 vic_len
, hdmi_3d_len
= 0;
2786 /* no HDMI_Video_Present */
2787 if (!(db
[8] & (1 << 5)))
2790 /* Latency_Fields_Present */
2791 if (db
[8] & (1 << 7))
2794 /* I_Latency_Fields_Present */
2795 if (db
[8] & (1 << 6))
2798 /* the declared length is not long enough for the 2 first bytes
2799 * of additional video format capabilities */
2800 if (len
< (8 + offset
+ 2))
2805 if (db
[8 + offset
] & (1 << 7)) {
2806 modes
+= add_hdmi_mandatory_stereo_modes(connector
);
2808 /* 3D_Multi_present */
2809 multi_present
= (db
[8 + offset
] & 0x60) >> 5;
2813 vic_len
= db
[8 + offset
] >> 5;
2814 hdmi_3d_len
= db
[8 + offset
] & 0x1f;
2816 for (i
= 0; i
< vic_len
&& len
>= (9 + offset
+ i
); i
++) {
2819 vic
= db
[9 + offset
+ i
];
2820 modes
+= add_hdmi_mode(connector
, vic
);
2822 offset
+= 1 + vic_len
;
2824 if (multi_present
== 1)
2826 else if (multi_present
== 2)
2831 if (len
< (8 + offset
+ hdmi_3d_len
- 1))
2834 if (hdmi_3d_len
< multi_len
)
2837 if (multi_present
== 1 || multi_present
== 2) {
2838 /* 3D_Structure_ALL */
2839 structure_all
= (db
[8 + offset
] << 8) | db
[9 + offset
];
2841 /* check if 3D_MASK is present */
2842 if (multi_present
== 2)
2843 mask
= (db
[10 + offset
] << 8) | db
[11 + offset
];
2847 for (i
= 0; i
< 16; i
++) {
2848 if (mask
& (1 << i
))
2849 modes
+= add_3d_struct_modes(connector
,
2856 offset
+= multi_len
;
2858 for (i
= 0; i
< (hdmi_3d_len
- multi_len
); i
++) {
2860 struct drm_display_mode
*newmode
= NULL
;
2861 unsigned int newflag
= 0;
2862 bool detail_present
;
2864 detail_present
= ((db
[8 + offset
+ i
] & 0x0f) > 7);
2866 if (detail_present
&& (i
+ 1 == hdmi_3d_len
- multi_len
))
2869 /* 2D_VIC_order_X */
2870 vic_index
= db
[8 + offset
+ i
] >> 4;
2872 /* 3D_Structure_X */
2873 switch (db
[8 + offset
+ i
] & 0x0f) {
2875 newflag
= DRM_MODE_FLAG_3D_FRAME_PACKING
;
2878 newflag
= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
;
2882 if ((db
[9 + offset
+ i
] >> 4) == 1)
2883 newflag
= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
;
2888 newmode
= drm_display_mode_from_vic_index(connector
,
2894 newmode
->flags
|= newflag
;
2895 drm_mode_probed_add(connector
, newmode
);
2909 cea_db_payload_len(const u8
*db
)
2911 return db
[0] & 0x1f;
2915 cea_db_tag(const u8
*db
)
2921 cea_revision(const u8
*cea
)
2927 cea_db_offsets(const u8
*cea
, int *start
, int *end
)
2929 /* Data block offset in CEA extension block */
2934 if (*end
< 4 || *end
> 127)
2939 static bool cea_db_is_hdmi_vsdb(const u8
*db
)
2943 if (cea_db_tag(db
) != VENDOR_BLOCK
)
2946 if (cea_db_payload_len(db
) < 5)
2949 hdmi_id
= db
[1] | (db
[2] << 8) | (db
[3] << 16);
2951 return hdmi_id
== HDMI_IEEE_OUI
;
2954 #define for_each_cea_db(cea, i, start, end) \
2955 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2958 add_cea_modes(struct drm_connector
*connector
, struct edid
*edid
)
2960 const u8
*cea
= drm_find_cea_extension(edid
);
2961 const u8
*db
, *hdmi
= NULL
, *video
= NULL
;
2962 u8 dbl
, hdmi_len
, video_len
= 0;
2965 if (cea
&& cea_revision(cea
) >= 3) {
2968 if (cea_db_offsets(cea
, &start
, &end
))
2971 for_each_cea_db(cea
, i
, start
, end
) {
2973 dbl
= cea_db_payload_len(db
);
2975 if (cea_db_tag(db
) == VIDEO_BLOCK
) {
2978 modes
+= do_cea_modes(connector
, video
, dbl
);
2980 else if (cea_db_is_hdmi_vsdb(db
)) {
2988 * We parse the HDMI VSDB after having added the cea modes as we will
2989 * be patching their flags when the sink supports stereo 3D.
2992 modes
+= do_hdmi_vsdb_modes(connector
, hdmi
, hdmi_len
, video
,
2999 parse_hdmi_vsdb(struct drm_connector
*connector
, const u8
*db
)
3001 u8 len
= cea_db_payload_len(db
);
3004 connector
->eld
[5] |= (db
[6] >> 7) << 1; /* Supports_AI */
3005 connector
->dvi_dual
= db
[6] & 1;
3008 connector
->max_tmds_clock
= db
[7] * 5;
3010 connector
->latency_present
[0] = db
[8] >> 7;
3011 connector
->latency_present
[1] = (db
[8] >> 6) & 1;
3014 connector
->video_latency
[0] = db
[9];
3016 connector
->audio_latency
[0] = db
[10];
3018 connector
->video_latency
[1] = db
[11];
3020 connector
->audio_latency
[1] = db
[12];
3022 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3023 "max TMDS clock %d, "
3024 "latency present %d %d, "
3025 "video latency %d %d, "
3026 "audio latency %d %d\n",
3027 connector
->dvi_dual
,
3028 connector
->max_tmds_clock
,
3029 (int) connector
->latency_present
[0],
3030 (int) connector
->latency_present
[1],
3031 connector
->video_latency
[0],
3032 connector
->video_latency
[1],
3033 connector
->audio_latency
[0],
3034 connector
->audio_latency
[1]);
3038 monitor_name(struct detailed_timing
*t
, void *data
)
3040 if (t
->data
.other_data
.type
== EDID_DETAIL_MONITOR_NAME
)
3041 *(u8
**)data
= t
->data
.other_data
.data
.str
.str
;
3045 * drm_edid_to_eld - build ELD from EDID
3046 * @connector: connector corresponding to the HDMI/DP sink
3047 * @edid: EDID to parse
3049 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3050 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3053 void drm_edid_to_eld(struct drm_connector
*connector
, struct edid
*edid
)
3055 uint8_t *eld
= connector
->eld
;
3063 memset(eld
, 0, sizeof(connector
->eld
));
3065 cea
= drm_find_cea_extension(edid
);
3067 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3072 drm_for_each_detailed_block((u8
*)edid
, monitor_name
, &name
);
3073 for (mnl
= 0; name
&& mnl
< 13; mnl
++) {
3074 if (name
[mnl
] == 0x0a)
3076 eld
[20 + mnl
] = name
[mnl
];
3078 eld
[4] = (cea
[1] << 5) | mnl
;
3079 DRM_DEBUG_KMS("ELD monitor %s\n", eld
+ 20);
3081 eld
[0] = 2 << 3; /* ELD version: 2 */
3083 eld
[16] = edid
->mfg_id
[0];
3084 eld
[17] = edid
->mfg_id
[1];
3085 eld
[18] = edid
->prod_code
[0];
3086 eld
[19] = edid
->prod_code
[1];
3088 if (cea_revision(cea
) >= 3) {
3091 if (cea_db_offsets(cea
, &start
, &end
)) {
3096 for_each_cea_db(cea
, i
, start
, end
) {
3098 dbl
= cea_db_payload_len(db
);
3100 switch (cea_db_tag(db
)) {
3102 /* Audio Data Block, contains SADs */
3103 sad_count
= dbl
/ 3;
3105 memcpy(eld
+ 20 + mnl
, &db
[1], dbl
);
3108 /* Speaker Allocation Data Block */
3113 /* HDMI Vendor-Specific Data Block */
3114 if (cea_db_is_hdmi_vsdb(db
))
3115 parse_hdmi_vsdb(connector
, db
);
3122 eld
[5] |= sad_count
<< 4;
3123 eld
[2] = (20 + mnl
+ sad_count
* 3 + 3) / 4;
3125 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld
[2], sad_count
);
3127 EXPORT_SYMBOL(drm_edid_to_eld
);
3130 * drm_edid_to_sad - extracts SADs from EDID
3131 * @edid: EDID to parse
3132 * @sads: pointer that will be set to the extracted SADs
3134 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3136 * Note: The returned pointer needs to be freed using kfree().
3138 * Return: The number of found SADs or negative number on error.
3140 int drm_edid_to_sad(struct edid
*edid
, struct cea_sad
**sads
)
3143 int i
, start
, end
, dbl
;
3146 cea
= drm_find_cea_extension(edid
);
3148 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3152 if (cea_revision(cea
) < 3) {
3153 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3157 if (cea_db_offsets(cea
, &start
, &end
)) {
3158 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3162 for_each_cea_db(cea
, i
, start
, end
) {
3165 if (cea_db_tag(db
) == AUDIO_BLOCK
) {
3167 dbl
= cea_db_payload_len(db
);
3169 count
= dbl
/ 3; /* SAD is 3B */
3170 *sads
= kcalloc(count
, sizeof(**sads
), GFP_KERNEL
);
3173 for (j
= 0; j
< count
; j
++) {
3174 u8
*sad
= &db
[1 + j
* 3];
3176 (*sads
)[j
].format
= (sad
[0] & 0x78) >> 3;
3177 (*sads
)[j
].channels
= sad
[0] & 0x7;
3178 (*sads
)[j
].freq
= sad
[1] & 0x7F;
3179 (*sads
)[j
].byte2
= sad
[2];
3187 EXPORT_SYMBOL(drm_edid_to_sad
);
3190 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3191 * @edid: EDID to parse
3192 * @sadb: pointer to the speaker block
3194 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3196 * Note: The returned pointer needs to be freed using kfree().
3198 * Return: The number of found Speaker Allocation Blocks or negative number on
3201 int drm_edid_to_speaker_allocation(struct edid
*edid
, u8
**sadb
)
3204 int i
, start
, end
, dbl
;
3207 cea
= drm_find_cea_extension(edid
);
3209 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3213 if (cea_revision(cea
) < 3) {
3214 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3218 if (cea_db_offsets(cea
, &start
, &end
)) {
3219 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3223 for_each_cea_db(cea
, i
, start
, end
) {
3224 const u8
*db
= &cea
[i
];
3226 if (cea_db_tag(db
) == SPEAKER_BLOCK
) {
3227 dbl
= cea_db_payload_len(db
);
3229 /* Speaker Allocation Data Block */
3231 *sadb
= kmemdup(&db
[1], dbl
, GFP_KERNEL
);
3242 EXPORT_SYMBOL(drm_edid_to_speaker_allocation
);
3245 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3246 * @connector: connector associated with the HDMI/DP sink
3247 * @mode: the display mode
3249 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3250 * the sink doesn't support audio or video.
3252 int drm_av_sync_delay(struct drm_connector
*connector
,
3253 struct drm_display_mode
*mode
)
3255 int i
= !!(mode
->flags
& DRM_MODE_FLAG_INTERLACE
);
3258 if (!connector
->latency_present
[0])
3260 if (!connector
->latency_present
[1])
3263 a
= connector
->audio_latency
[i
];
3264 v
= connector
->video_latency
[i
];
3267 * HDMI/DP sink doesn't support audio or video?
3269 if (a
== 255 || v
== 255)
3273 * Convert raw EDID values to millisecond.
3274 * Treat unknown latency as 0ms.
3277 a
= min(2 * (a
- 1), 500);
3279 v
= min(2 * (v
- 1), 500);
3281 return max(v
- a
, 0);
3283 EXPORT_SYMBOL(drm_av_sync_delay
);
3286 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3287 * @encoder: the encoder just changed display mode
3288 * @mode: the adjusted display mode
3290 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3291 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3293 * Return: The connector associated with the first HDMI/DP sink that has ELD
3296 struct drm_connector
*drm_select_eld(struct drm_encoder
*encoder
,
3297 struct drm_display_mode
*mode
)
3299 struct drm_connector
*connector
;
3300 struct drm_device
*dev
= encoder
->dev
;
3302 list_for_each_entry(connector
, &dev
->mode_config
.connector_list
, head
)
3303 if (connector
->encoder
== encoder
&& connector
->eld
[0])
3308 EXPORT_SYMBOL(drm_select_eld
);
3311 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3312 * @edid: monitor EDID information
3314 * Parse the CEA extension according to CEA-861-B.
3316 * Return: True if the monitor is HDMI, false if not or unknown.
3318 bool drm_detect_hdmi_monitor(struct edid
*edid
)
3322 int start_offset
, end_offset
;
3324 edid_ext
= drm_find_cea_extension(edid
);
3328 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3332 * Because HDMI identifier is in Vendor Specific Block,
3333 * search it from all data blocks of CEA extension.
3335 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3336 if (cea_db_is_hdmi_vsdb(&edid_ext
[i
]))
3342 EXPORT_SYMBOL(drm_detect_hdmi_monitor
);
3345 * drm_detect_monitor_audio - check monitor audio capability
3346 * @edid: EDID block to scan
3348 * Monitor should have CEA extension block.
3349 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3350 * audio' only. If there is any audio extension block and supported
3351 * audio format, assume at least 'basic audio' support, even if 'basic
3352 * audio' is not defined in EDID.
3354 * Return: True if the monitor supports audio, false otherwise.
3356 bool drm_detect_monitor_audio(struct edid
*edid
)
3360 bool has_audio
= false;
3361 int start_offset
, end_offset
;
3363 edid_ext
= drm_find_cea_extension(edid
);
3367 has_audio
= ((edid_ext
[3] & EDID_BASIC_AUDIO
) != 0);
3370 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3374 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3377 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3378 if (cea_db_tag(&edid_ext
[i
]) == AUDIO_BLOCK
) {
3380 for (j
= 1; j
< cea_db_payload_len(&edid_ext
[i
]) + 1; j
+= 3)
3381 DRM_DEBUG_KMS("CEA audio format %d\n",
3382 (edid_ext
[i
+ j
] >> 3) & 0xf);
3389 EXPORT_SYMBOL(drm_detect_monitor_audio
);
3392 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3393 * @edid: EDID block to scan
3395 * Check whether the monitor reports the RGB quantization range selection
3396 * as supported. The AVI infoframe can then be used to inform the monitor
3397 * which quantization range (full or limited) is used.
3399 * Return: True if the RGB quantization range is selectable, false otherwise.
3401 bool drm_rgb_quant_range_selectable(struct edid
*edid
)
3406 edid_ext
= drm_find_cea_extension(edid
);
3410 if (cea_db_offsets(edid_ext
, &start
, &end
))
3413 for_each_cea_db(edid_ext
, i
, start
, end
) {
3414 if (cea_db_tag(&edid_ext
[i
]) == VIDEO_CAPABILITY_BLOCK
&&
3415 cea_db_payload_len(&edid_ext
[i
]) == 2) {
3416 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext
[i
+ 2]);
3417 return edid_ext
[i
+ 2] & EDID_CEA_VCDB_QS
;
3423 EXPORT_SYMBOL(drm_rgb_quant_range_selectable
);
3426 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3427 * hdmi deep color modes and update drm_display_info if so.
3429 * @edid: monitor EDID information
3430 * @info: Updated with maximum supported deep color bpc and color format
3431 * if deep color supported.
3433 * Parse the CEA extension according to CEA-861-B.
3434 * Return true if HDMI deep color supported, false if not or unknown.
3436 static bool drm_assign_hdmi_deep_color_info(struct edid
*edid
,
3437 struct drm_display_info
*info
,
3438 struct drm_connector
*connector
)
3440 u8
*edid_ext
, *hdmi
;
3442 int start_offset
, end_offset
;
3443 unsigned int dc_bpc
= 0;
3445 edid_ext
= drm_find_cea_extension(edid
);
3449 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3453 * Because HDMI identifier is in Vendor Specific Block,
3454 * search it from all data blocks of CEA extension.
3456 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3457 if (cea_db_is_hdmi_vsdb(&edid_ext
[i
])) {
3458 /* HDMI supports at least 8 bpc */
3461 hdmi
= &edid_ext
[i
];
3462 if (cea_db_payload_len(hdmi
) < 6)
3465 if (hdmi
[6] & DRM_EDID_HDMI_DC_30
) {
3467 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3468 drm_get_connector_name(connector
));
3471 if (hdmi
[6] & DRM_EDID_HDMI_DC_36
) {
3473 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3474 drm_get_connector_name(connector
));
3477 if (hdmi
[6] & DRM_EDID_HDMI_DC_48
) {
3479 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3480 drm_get_connector_name(connector
));
3484 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3485 drm_get_connector_name(connector
), dc_bpc
);
3489 * Deep color support mandates RGB444 support for all video
3490 * modes and forbids YCRCB422 support for all video modes per
3493 info
->color_formats
= DRM_COLOR_FORMAT_RGB444
;
3495 /* YCRCB444 is optional according to spec. */
3496 if (hdmi
[6] & DRM_EDID_HDMI_DC_Y444
) {
3497 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3498 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3499 drm_get_connector_name(connector
));
3503 * Spec says that if any deep color mode is supported at all,
3504 * then deep color 36 bit must be supported.
3506 if (!(hdmi
[6] & DRM_EDID_HDMI_DC_36
)) {
3507 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3508 drm_get_connector_name(connector
));
3514 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3515 drm_get_connector_name(connector
));
3524 * drm_add_display_info - pull display info out if present
3526 * @info: display info (attached to connector)
3527 * @connector: connector whose edid is used to build display info
3529 * Grab any available display info and stuff it into the drm_display_info
3530 * structure that's part of the connector. Useful for tracking bpp and
3533 static void drm_add_display_info(struct edid
*edid
,
3534 struct drm_display_info
*info
,
3535 struct drm_connector
*connector
)
3539 info
->width_mm
= edid
->width_cm
* 10;
3540 info
->height_mm
= edid
->height_cm
* 10;
3542 /* driver figures it out in this case */
3544 info
->color_formats
= 0;
3546 if (edid
->revision
< 3)
3549 if (!(edid
->input
& DRM_EDID_INPUT_DIGITAL
))
3552 /* Get data from CEA blocks if present */
3553 edid_ext
= drm_find_cea_extension(edid
);
3555 info
->cea_rev
= edid_ext
[1];
3557 /* The existence of a CEA block should imply RGB support */
3558 info
->color_formats
= DRM_COLOR_FORMAT_RGB444
;
3559 if (edid_ext
[3] & EDID_CEA_YCRCB444
)
3560 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3561 if (edid_ext
[3] & EDID_CEA_YCRCB422
)
3562 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB422
;
3565 /* HDMI deep color modes supported? Assign to info, if so */
3566 drm_assign_hdmi_deep_color_info(edid
, info
, connector
);
3568 /* Only defined for 1.4 with digital displays */
3569 if (edid
->revision
< 4)
3572 switch (edid
->input
& DRM_EDID_DIGITAL_DEPTH_MASK
) {
3573 case DRM_EDID_DIGITAL_DEPTH_6
:
3576 case DRM_EDID_DIGITAL_DEPTH_8
:
3579 case DRM_EDID_DIGITAL_DEPTH_10
:
3582 case DRM_EDID_DIGITAL_DEPTH_12
:
3585 case DRM_EDID_DIGITAL_DEPTH_14
:
3588 case DRM_EDID_DIGITAL_DEPTH_16
:
3591 case DRM_EDID_DIGITAL_DEPTH_UNDEF
:
3597 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3598 drm_get_connector_name(connector
), info
->bpc
);
3600 info
->color_formats
|= DRM_COLOR_FORMAT_RGB444
;
3601 if (edid
->features
& DRM_EDID_FEATURE_RGB_YCRCB444
)
3602 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3603 if (edid
->features
& DRM_EDID_FEATURE_RGB_YCRCB422
)
3604 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB422
;
3608 * drm_add_edid_modes - add modes from EDID data, if available
3609 * @connector: connector we're probing
3612 * Add the specified modes to the connector's mode list.
3614 * Return: The number of modes added or 0 if we couldn't find any.
3616 int drm_add_edid_modes(struct drm_connector
*connector
, struct edid
*edid
)
3624 if (!drm_edid_is_valid(edid
)) {
3625 dev_warn(connector
->dev
->dev
, "%s: EDID invalid.\n",
3626 drm_get_connector_name(connector
));
3630 quirks
= edid_get_quirks(edid
);
3633 * EDID spec says modes should be preferred in this order:
3634 * - preferred detailed mode
3635 * - other detailed modes from base block
3636 * - detailed modes from extension blocks
3637 * - CVT 3-byte code modes
3638 * - standard timing codes
3639 * - established timing codes
3640 * - modes inferred from GTF or CVT range information
3642 * We get this pretty much right.
3644 * XXX order for additional mode types in extension blocks?
3646 num_modes
+= add_detailed_modes(connector
, edid
, quirks
);
3647 num_modes
+= add_cvt_modes(connector
, edid
);
3648 num_modes
+= add_standard_modes(connector
, edid
);
3649 num_modes
+= add_established_modes(connector
, edid
);
3650 if (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
)
3651 num_modes
+= add_inferred_modes(connector
, edid
);
3652 num_modes
+= add_cea_modes(connector
, edid
);
3653 num_modes
+= add_alternate_cea_modes(connector
, edid
);
3655 if (quirks
& (EDID_QUIRK_PREFER_LARGE_60
| EDID_QUIRK_PREFER_LARGE_75
))
3656 edid_fixup_preferred(connector
, quirks
);
3658 drm_add_display_info(edid
, &connector
->display_info
, connector
);
3660 if (quirks
& EDID_QUIRK_FORCE_8BPC
)
3661 connector
->display_info
.bpc
= 8;
3665 EXPORT_SYMBOL(drm_add_edid_modes
);
3668 * drm_add_modes_noedid - add modes for the connectors without EDID
3669 * @connector: connector we're probing
3670 * @hdisplay: the horizontal display limit
3671 * @vdisplay: the vertical display limit
3673 * Add the specified modes to the connector's mode list. Only when the
3674 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3676 * Return: The number of modes added or 0 if we couldn't find any.
3678 int drm_add_modes_noedid(struct drm_connector
*connector
,
3679 int hdisplay
, int vdisplay
)
3681 int i
, count
, num_modes
= 0;
3682 struct drm_display_mode
*mode
;
3683 struct drm_device
*dev
= connector
->dev
;
3685 count
= sizeof(drm_dmt_modes
) / sizeof(struct drm_display_mode
);
3691 for (i
= 0; i
< count
; i
++) {
3692 const struct drm_display_mode
*ptr
= &drm_dmt_modes
[i
];
3693 if (hdisplay
&& vdisplay
) {
3695 * Only when two are valid, they will be used to check
3696 * whether the mode should be added to the mode list of
3699 if (ptr
->hdisplay
> hdisplay
||
3700 ptr
->vdisplay
> vdisplay
)
3703 if (drm_mode_vrefresh(ptr
) > 61)
3705 mode
= drm_mode_duplicate(dev
, ptr
);
3707 drm_mode_probed_add(connector
, mode
);
3713 EXPORT_SYMBOL(drm_add_modes_noedid
);
3716 * drm_set_preferred_mode - Sets the preferred mode of a connector
3717 * @connector: connector whose mode list should be processed
3718 * @hpref: horizontal resolution of preferred mode
3719 * @vpref: vertical resolution of preferred mode
3721 * Marks a mode as preferred if it matches the resolution specified by @hpref
3724 void drm_set_preferred_mode(struct drm_connector
*connector
,
3725 int hpref
, int vpref
)
3727 struct drm_display_mode
*mode
;
3729 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
3730 if (mode
->hdisplay
== hpref
&&
3731 mode
->vdisplay
== vpref
)
3732 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
3735 EXPORT_SYMBOL(drm_set_preferred_mode
);
3738 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3739 * data from a DRM display mode
3740 * @frame: HDMI AVI infoframe
3741 * @mode: DRM display mode
3743 * Return: 0 on success or a negative error code on failure.
3746 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe
*frame
,
3747 const struct drm_display_mode
*mode
)
3751 if (!frame
|| !mode
)
3754 err
= hdmi_avi_infoframe_init(frame
);
3758 if (mode
->flags
& DRM_MODE_FLAG_DBLCLK
)
3759 frame
->pixel_repeat
= 1;
3761 frame
->video_code
= drm_match_cea_mode(mode
);
3763 frame
->picture_aspect
= HDMI_PICTURE_ASPECT_NONE
;
3765 /* Populate picture aspect ratio from CEA mode list */
3766 if (frame
->video_code
> 0)
3767 frame
->picture_aspect
= drm_get_cea_aspect_ratio(
3770 frame
->active_aspect
= HDMI_ACTIVE_ASPECT_PICTURE
;
3771 frame
->scan_mode
= HDMI_SCAN_MODE_UNDERSCAN
;
3775 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode
);
3777 static enum hdmi_3d_structure
3778 s3d_structure_from_display_mode(const struct drm_display_mode
*mode
)
3780 u32 layout
= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
3783 case DRM_MODE_FLAG_3D_FRAME_PACKING
:
3784 return HDMI_3D_STRUCTURE_FRAME_PACKING
;
3785 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE
:
3786 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE
;
3787 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE
:
3788 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE
;
3789 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL
:
3790 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL
;
3791 case DRM_MODE_FLAG_3D_L_DEPTH
:
3792 return HDMI_3D_STRUCTURE_L_DEPTH
;
3793 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH
:
3794 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH
;
3795 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
:
3796 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM
;
3797 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
:
3798 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF
;
3800 return HDMI_3D_STRUCTURE_INVALID
;
3805 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3806 * data from a DRM display mode
3807 * @frame: HDMI vendor infoframe
3808 * @mode: DRM display mode
3810 * Note that there's is a need to send HDMI vendor infoframes only when using a
3811 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3812 * function will return -EINVAL, error that can be safely ignored.
3814 * Return: 0 on success or a negative error code on failure.
3817 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe
*frame
,
3818 const struct drm_display_mode
*mode
)
3824 if (!frame
|| !mode
)
3827 vic
= drm_match_hdmi_mode(mode
);
3828 s3d_flags
= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
3830 if (!vic
&& !s3d_flags
)
3833 if (vic
&& s3d_flags
)
3836 err
= hdmi_vendor_infoframe_init(frame
);
3843 frame
->s3d_struct
= s3d_structure_from_display_mode(mode
);
3847 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode
);