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1 /*-
2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
5 *
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
11 * the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23 #include <common.h>
24 #include <asm/byteorder.h>
25 #include <usb.h>
26 #include <asm/io.h>
27 #include <malloc.h>
28
29 #include "ehci.h"
30
31 int rootdev;
32 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
33 volatile struct ehci_hcor *hcor;
34
35 static uint16_t portreset;
36 static struct QH qh_list __attribute__((aligned(32)));
37
38 static struct descriptor {
39 struct usb_hub_descriptor hub;
40 struct usb_device_descriptor device;
41 struct usb_linux_config_descriptor config;
42 struct usb_linux_interface_descriptor interface;
43 struct usb_endpoint_descriptor endpoint;
44 } __attribute__ ((packed)) descriptor = {
45 {
46 0x8, /* bDescLength */
47 0x29, /* bDescriptorType: hub descriptor */
48 2, /* bNrPorts -- runtime modified */
49 0, /* wHubCharacteristics */
50 0xff, /* bPwrOn2PwrGood */
51 0, /* bHubCntrCurrent */
52 {}, /* Device removable */
53 {} /* at most 7 ports! XXX */
54 },
55 {
56 0x12, /* bLength */
57 1, /* bDescriptorType: UDESC_DEVICE */
58 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
59 9, /* bDeviceClass: UDCLASS_HUB */
60 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
61 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
62 64, /* bMaxPacketSize: 64 bytes */
63 0x0000, /* idVendor */
64 0x0000, /* idProduct */
65 cpu_to_le16(0x0100), /* bcdDevice */
66 1, /* iManufacturer */
67 2, /* iProduct */
68 0, /* iSerialNumber */
69 1 /* bNumConfigurations: 1 */
70 },
71 {
72 0x9,
73 2, /* bDescriptorType: UDESC_CONFIG */
74 cpu_to_le16(0x19),
75 1, /* bNumInterface */
76 1, /* bConfigurationValue */
77 0, /* iConfiguration */
78 0x40, /* bmAttributes: UC_SELF_POWER */
79 0 /* bMaxPower */
80 },
81 {
82 0x9, /* bLength */
83 4, /* bDescriptorType: UDESC_INTERFACE */
84 0, /* bInterfaceNumber */
85 0, /* bAlternateSetting */
86 1, /* bNumEndpoints */
87 9, /* bInterfaceClass: UICLASS_HUB */
88 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
89 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
90 0 /* iInterface */
91 },
92 {
93 0x7, /* bLength */
94 5, /* bDescriptorType: UDESC_ENDPOINT */
95 0x81, /* bEndpointAddress:
96 * UE_DIR_IN | EHCI_INTR_ENDPT
97 */
98 3, /* bmAttributes: UE_INTERRUPT */
99 8, /* wMaxPacketSize */
100 255 /* bInterval */
101 },
102 };
103
104 #if defined(CONFIG_EHCI_IS_TDI)
105 #define ehci_is_TDI() (1)
106 #else
107 #define ehci_is_TDI() (0)
108 #endif
109
110 #if defined(CONFIG_EHCI_DCACHE)
111 /*
112 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
113 * structures and data buffers. This is needed on platforms using this
114 * EHCI support with dcache enabled.
115 */
116 static void flush_invalidate(u32 addr, int size, int flush)
117 {
118 if (flush)
119 flush_dcache_range(addr, addr + size);
120 else
121 invalidate_dcache_range(addr, addr + size);
122 }
123
124 static void cache_qtd(struct qTD *qtd, int flush)
125 {
126 u32 *ptr = (u32 *)qtd->qt_buffer[0];
127 int len = (qtd->qt_token & 0x7fff0000) >> 16;
128
129 flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
130 if (ptr && len)
131 flush_invalidate((u32)ptr, len, flush);
132 }
133
134
135 static inline struct QH *qh_addr(struct QH *qh)
136 {
137 return (struct QH *)((u32)qh & 0xffffffe0);
138 }
139
140 static void cache_qh(struct QH *qh, int flush)
141 {
142 struct qTD *qtd;
143 struct qTD *next;
144 static struct qTD *first_qtd;
145
146 /*
147 * Walk the QH list and flush/invalidate all entries
148 */
149 while (1) {
150 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
151 if ((u32)qh & QH_LINK_TYPE_QH)
152 break;
153 qh = qh_addr(qh);
154 qh = (struct QH *)qh->qh_link;
155 }
156 qh = qh_addr(qh);
157
158 /*
159 * Save first qTD pointer, needed for invalidating pass on this QH
160 */
161 if (flush)
162 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
163 0xffffffe0);
164 else
165 qtd = first_qtd;
166
167 /*
168 * Walk the qTD list and flush/invalidate all entries
169 */
170 while (1) {
171 if (qtd == NULL)
172 break;
173 cache_qtd(qtd, flush);
174 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
175 if (next == qtd)
176 break;
177 qtd = next;
178 }
179 }
180
181 static inline void ehci_flush_dcache(struct QH *qh)
182 {
183 cache_qh(qh, 1);
184 }
185
186 static inline void ehci_invalidate_dcache(struct QH *qh)
187 {
188 cache_qh(qh, 0);
189 }
190 #else /* CONFIG_EHCI_DCACHE */
191 /*
192 *
193 */
194 static inline void ehci_flush_dcache(struct QH *qh)
195 {
196 }
197
198 static inline void ehci_invalidate_dcache(struct QH *qh)
199 {
200 }
201 #endif /* CONFIG_EHCI_DCACHE */
202
203 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
204 {
205 uint32_t result;
206 do {
207 result = ehci_readl(ptr);
208 if (result == ~(uint32_t)0)
209 return -1;
210 result &= mask;
211 if (result == done)
212 return 0;
213 udelay(1);
214 usec--;
215 } while (usec > 0);
216 return -1;
217 }
218
219 static void ehci_free(void *p, size_t sz)
220 {
221
222 }
223
224 static int ehci_reset(void)
225 {
226 uint32_t cmd;
227 uint32_t tmp;
228 uint32_t *reg_ptr;
229 int ret = 0;
230
231 cmd = ehci_readl(&hcor->or_usbcmd);
232 cmd |= CMD_RESET;
233 ehci_writel(&hcor->or_usbcmd, cmd);
234 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
235 if (ret < 0) {
236 printf("EHCI fail to reset\n");
237 goto out;
238 }
239
240 if (ehci_is_TDI()) {
241 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
242 tmp = ehci_readl(reg_ptr);
243 tmp |= USBMODE_CM_HC;
244 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
245 tmp |= USBMODE_BE;
246 #endif
247 ehci_writel(reg_ptr, tmp);
248 }
249 out:
250 return ret;
251 }
252
253 static void *ehci_alloc(size_t sz, size_t align)
254 {
255 static struct QH qh __attribute__((aligned(32)));
256 static struct qTD td[3] __attribute__((aligned (32)));
257 static int ntds;
258 void *p;
259
260 switch (sz) {
261 case sizeof(struct QH):
262 p = &qh;
263 ntds = 0;
264 break;
265 case sizeof(struct qTD):
266 if (ntds == 3) {
267 debug("out of TDs\n");
268 return NULL;
269 }
270 p = &td[ntds];
271 ntds++;
272 break;
273 default:
274 debug("unknown allocation size\n");
275 return NULL;
276 }
277
278 memset(p, 0, sz);
279 return p;
280 }
281
282 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
283 {
284 uint32_t addr, delta, next;
285 int idx;
286
287 addr = (uint32_t) buf;
288 idx = 0;
289 while (idx < 5) {
290 td->qt_buffer[idx] = cpu_to_hc32(addr);
291 next = (addr + 4096) & ~4095;
292 delta = next - addr;
293 if (delta >= sz)
294 break;
295 sz -= delta;
296 addr = next;
297 idx++;
298 }
299
300 if (idx == 5) {
301 debug("out of buffer pointers (%u bytes left)\n", sz);
302 return -1;
303 }
304
305 return 0;
306 }
307
308 static int
309 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
310 int length, struct devrequest *req)
311 {
312 struct QH *qh;
313 struct qTD *td;
314 volatile struct qTD *vtd;
315 unsigned long ts;
316 uint32_t *tdp;
317 uint32_t endpt, token, usbsts;
318 uint32_t c, toggle;
319 uint32_t cmd;
320 int ret = 0;
321
322 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
323 buffer, length, req);
324 if (req != NULL)
325 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
326 req->request, req->request,
327 req->requesttype, req->requesttype,
328 le16_to_cpu(req->value), le16_to_cpu(req->value),
329 le16_to_cpu(req->index));
330
331 qh = ehci_alloc(sizeof(struct QH), 32);
332 if (qh == NULL) {
333 debug("unable to allocate QH\n");
334 return -1;
335 }
336 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
337 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
338 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
339 endpt = (8 << 28) |
340 (c << 27) |
341 (usb_maxpacket(dev, pipe) << 16) |
342 (0 << 15) |
343 (1 << 14) |
344 (usb_pipespeed(pipe) << 12) |
345 (usb_pipeendpoint(pipe) << 8) |
346 (0 << 7) | (usb_pipedevice(pipe) << 0);
347 qh->qh_endpt1 = cpu_to_hc32(endpt);
348 endpt = (1 << 30) |
349 (dev->portnr << 23) |
350 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
351 qh->qh_endpt2 = cpu_to_hc32(endpt);
352 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
353
354 td = NULL;
355 tdp = &qh->qh_overlay.qt_next;
356
357 toggle =
358 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
359
360 if (req != NULL) {
361 td = ehci_alloc(sizeof(struct qTD), 32);
362 if (td == NULL) {
363 debug("unable to allocate SETUP td\n");
364 goto fail;
365 }
366 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
367 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
368 token = (0 << 31) |
369 (sizeof(*req) << 16) |
370 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
371 td->qt_token = cpu_to_hc32(token);
372 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
373 debug("unable construct SETUP td\n");
374 ehci_free(td, sizeof(*td));
375 goto fail;
376 }
377 *tdp = cpu_to_hc32((uint32_t) td);
378 tdp = &td->qt_next;
379 toggle = 1;
380 }
381
382 if (length > 0 || req == NULL) {
383 td = ehci_alloc(sizeof(struct qTD), 32);
384 if (td == NULL) {
385 debug("unable to allocate DATA td\n");
386 goto fail;
387 }
388 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
389 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
390 token = (toggle << 31) |
391 (length << 16) |
392 ((req == NULL ? 1 : 0) << 15) |
393 (0 << 12) |
394 (3 << 10) |
395 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
396 td->qt_token = cpu_to_hc32(token);
397 if (ehci_td_buffer(td, buffer, length) != 0) {
398 debug("unable construct DATA td\n");
399 ehci_free(td, sizeof(*td));
400 goto fail;
401 }
402 *tdp = cpu_to_hc32((uint32_t) td);
403 tdp = &td->qt_next;
404 }
405
406 if (req != NULL) {
407 td = ehci_alloc(sizeof(struct qTD), 32);
408 if (td == NULL) {
409 debug("unable to allocate ACK td\n");
410 goto fail;
411 }
412 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
413 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
414 token = (toggle << 31) |
415 (0 << 16) |
416 (1 << 15) |
417 (0 << 12) |
418 (3 << 10) |
419 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
420 td->qt_token = cpu_to_hc32(token);
421 *tdp = cpu_to_hc32((uint32_t) td);
422 tdp = &td->qt_next;
423 }
424
425 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
426
427 /* Flush dcache */
428 ehci_flush_dcache(&qh_list);
429
430 usbsts = ehci_readl(&hcor->or_usbsts);
431 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
432
433 /* Enable async. schedule. */
434 cmd = ehci_readl(&hcor->or_usbcmd);
435 cmd |= CMD_ASE;
436 ehci_writel(&hcor->or_usbcmd, cmd);
437
438 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
439 100 * 1000);
440 if (ret < 0) {
441 printf("EHCI fail timeout STD_ASS set\n");
442 goto fail;
443 }
444
445 /* Wait for TDs to be processed. */
446 ts = get_timer(0);
447 vtd = td;
448 do {
449 /* Invalidate dcache */
450 ehci_invalidate_dcache(&qh_list);
451 token = hc32_to_cpu(vtd->qt_token);
452 if (!(token & 0x80))
453 break;
454 } while (get_timer(ts) < CONFIG_SYS_HZ);
455
456 /* Disable async schedule. */
457 cmd = ehci_readl(&hcor->or_usbcmd);
458 cmd &= ~CMD_ASE;
459 ehci_writel(&hcor->or_usbcmd, cmd);
460
461 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
462 100 * 1000);
463 if (ret < 0) {
464 printf("EHCI fail timeout STD_ASS reset\n");
465 goto fail;
466 }
467
468 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
469
470 token = hc32_to_cpu(qh->qh_overlay.qt_token);
471 if (!(token & 0x80)) {
472 debug("TOKEN=%#x\n", token);
473 switch (token & 0xfc) {
474 case 0:
475 toggle = token >> 31;
476 usb_settoggle(dev, usb_pipeendpoint(pipe),
477 usb_pipeout(pipe), toggle);
478 dev->status = 0;
479 break;
480 case 0x40:
481 dev->status = USB_ST_STALLED;
482 break;
483 case 0xa0:
484 case 0x20:
485 dev->status = USB_ST_BUF_ERR;
486 break;
487 case 0x50:
488 case 0x10:
489 dev->status = USB_ST_BABBLE_DET;
490 break;
491 default:
492 dev->status = USB_ST_CRC_ERR;
493 break;
494 }
495 dev->act_len = length - ((token >> 16) & 0x7fff);
496 } else {
497 dev->act_len = 0;
498 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
499 dev->devnum, ehci_readl(&hcor->or_usbsts),
500 ehci_readl(&hcor->or_portsc[0]),
501 ehci_readl(&hcor->or_portsc[1]));
502 }
503
504 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
505
506 fail:
507 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
508 while (td != (void *)QT_NEXT_TERMINATE) {
509 qh->qh_overlay.qt_next = td->qt_next;
510 ehci_free(td, sizeof(*td));
511 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
512 }
513 ehci_free(qh, sizeof(*qh));
514 return -1;
515 }
516
517 static inline int min3(int a, int b, int c)
518 {
519
520 if (b < a)
521 a = b;
522 if (c < a)
523 a = c;
524 return a;
525 }
526
527 int
528 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
529 int length, struct devrequest *req)
530 {
531 uint8_t tmpbuf[4];
532 u16 typeReq;
533 void *srcptr = NULL;
534 int len, srclen;
535 uint32_t reg;
536 uint32_t *status_reg;
537
538 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
539 printf("The request port(%d) is not configured\n",
540 le16_to_cpu(req->index) - 1);
541 return -1;
542 }
543 status_reg = (uint32_t *)&hcor->or_portsc[
544 le16_to_cpu(req->index) - 1];
545 srclen = 0;
546
547 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
548 req->request, req->request,
549 req->requesttype, req->requesttype,
550 le16_to_cpu(req->value), le16_to_cpu(req->index));
551
552 typeReq = req->request | req->requesttype << 8;
553
554 switch (typeReq) {
555 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
556 switch (le16_to_cpu(req->value) >> 8) {
557 case USB_DT_DEVICE:
558 debug("USB_DT_DEVICE request\n");
559 srcptr = &descriptor.device;
560 srclen = 0x12;
561 break;
562 case USB_DT_CONFIG:
563 debug("USB_DT_CONFIG config\n");
564 srcptr = &descriptor.config;
565 srclen = 0x19;
566 break;
567 case USB_DT_STRING:
568 debug("USB_DT_STRING config\n");
569 switch (le16_to_cpu(req->value) & 0xff) {
570 case 0: /* Language */
571 srcptr = "\4\3\1\0";
572 srclen = 4;
573 break;
574 case 1: /* Vendor */
575 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
576 srclen = 14;
577 break;
578 case 2: /* Product */
579 srcptr = "\52\3E\0H\0C\0I\0 "
580 "\0H\0o\0s\0t\0 "
581 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
582 srclen = 42;
583 break;
584 default:
585 debug("unknown value DT_STRING %x\n",
586 le16_to_cpu(req->value));
587 goto unknown;
588 }
589 break;
590 default:
591 debug("unknown value %x\n", le16_to_cpu(req->value));
592 goto unknown;
593 }
594 break;
595 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
596 switch (le16_to_cpu(req->value) >> 8) {
597 case USB_DT_HUB:
598 debug("USB_DT_HUB config\n");
599 srcptr = &descriptor.hub;
600 srclen = 0x8;
601 break;
602 default:
603 debug("unknown value %x\n", le16_to_cpu(req->value));
604 goto unknown;
605 }
606 break;
607 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
608 debug("USB_REQ_SET_ADDRESS\n");
609 rootdev = le16_to_cpu(req->value);
610 break;
611 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
612 debug("USB_REQ_SET_CONFIGURATION\n");
613 /* Nothing to do */
614 break;
615 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
616 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
617 tmpbuf[1] = 0;
618 srcptr = tmpbuf;
619 srclen = 2;
620 break;
621 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
622 memset(tmpbuf, 0, 4);
623 reg = ehci_readl(status_reg);
624 if (reg & EHCI_PS_CS)
625 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
626 if (reg & EHCI_PS_PE)
627 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
628 if (reg & EHCI_PS_SUSP)
629 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
630 if (reg & EHCI_PS_OCA)
631 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
632 if (reg & EHCI_PS_PR)
633 tmpbuf[0] |= USB_PORT_STAT_RESET;
634 if (reg & EHCI_PS_PP)
635 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
636
637 if (ehci_is_TDI()) {
638 switch ((reg >> 26) & 3) {
639 case 0:
640 break;
641 case 1:
642 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
643 break;
644 case 2:
645 default:
646 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
647 break;
648 }
649 } else {
650 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
651 }
652
653 if (reg & EHCI_PS_CSC)
654 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
655 if (reg & EHCI_PS_PEC)
656 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
657 if (reg & EHCI_PS_OCC)
658 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
659 if (portreset & (1 << le16_to_cpu(req->index)))
660 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
661
662 srcptr = tmpbuf;
663 srclen = 4;
664 break;
665 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
666 reg = ehci_readl(status_reg);
667 reg &= ~EHCI_PS_CLEAR;
668 switch (le16_to_cpu(req->value)) {
669 case USB_PORT_FEAT_ENABLE:
670 reg |= EHCI_PS_PE;
671 ehci_writel(status_reg, reg);
672 break;
673 case USB_PORT_FEAT_POWER:
674 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
675 reg |= EHCI_PS_PP;
676 ehci_writel(status_reg, reg);
677 }
678 break;
679 case USB_PORT_FEAT_RESET:
680 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
681 !ehci_is_TDI() &&
682 EHCI_PS_IS_LOWSPEED(reg)) {
683 /* Low speed device, give up ownership. */
684 debug("port %d low speed --> companion\n",
685 req->index - 1);
686 reg |= EHCI_PS_PO;
687 ehci_writel(status_reg, reg);
688 break;
689 } else {
690 int ret;
691
692 reg |= EHCI_PS_PR;
693 reg &= ~EHCI_PS_PE;
694 ehci_writel(status_reg, reg);
695 /*
696 * caller must wait, then call GetPortStatus
697 * usb 2.0 specification say 50 ms resets on
698 * root
699 */
700 wait_ms(50);
701 /* terminate the reset */
702 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
703 /*
704 * A host controller must terminate the reset
705 * and stabilize the state of the port within
706 * 2 milliseconds
707 */
708 ret = handshake(status_reg, EHCI_PS_PR, 0,
709 2 * 1000);
710 if (!ret)
711 portreset |=
712 1 << le16_to_cpu(req->index);
713 else
714 printf("port(%d) reset error\n",
715 le16_to_cpu(req->index) - 1);
716 }
717 break;
718 default:
719 debug("unknown feature %x\n", le16_to_cpu(req->value));
720 goto unknown;
721 }
722 /* unblock posted writes */
723 (void) ehci_readl(&hcor->or_usbcmd);
724 break;
725 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
726 reg = ehci_readl(status_reg);
727 switch (le16_to_cpu(req->value)) {
728 case USB_PORT_FEAT_ENABLE:
729 reg &= ~EHCI_PS_PE;
730 break;
731 case USB_PORT_FEAT_C_ENABLE:
732 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
733 break;
734 case USB_PORT_FEAT_POWER:
735 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
736 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
737 case USB_PORT_FEAT_C_CONNECTION:
738 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
739 break;
740 case USB_PORT_FEAT_OVER_CURRENT:
741 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
742 break;
743 case USB_PORT_FEAT_C_RESET:
744 portreset &= ~(1 << le16_to_cpu(req->index));
745 break;
746 default:
747 debug("unknown feature %x\n", le16_to_cpu(req->value));
748 goto unknown;
749 }
750 ehci_writel(status_reg, reg);
751 /* unblock posted write */
752 (void) ehci_readl(&hcor->or_usbcmd);
753 break;
754 default:
755 debug("Unknown request\n");
756 goto unknown;
757 }
758
759 wait_ms(1);
760 len = min3(srclen, le16_to_cpu(req->length), length);
761 if (srcptr != NULL && len > 0)
762 memcpy(buffer, srcptr, len);
763 else
764 debug("Len is 0\n");
765
766 dev->act_len = len;
767 dev->status = 0;
768 return 0;
769
770 unknown:
771 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
772 req->requesttype, req->request, le16_to_cpu(req->value),
773 le16_to_cpu(req->index), le16_to_cpu(req->length));
774
775 dev->act_len = 0;
776 dev->status = USB_ST_STALLED;
777 return -1;
778 }
779
780 int usb_lowlevel_stop(void)
781 {
782 return ehci_hcd_stop();
783 }
784
785 int usb_lowlevel_init(void)
786 {
787 uint32_t reg;
788 uint32_t cmd;
789
790 if (ehci_hcd_init() != 0)
791 return -1;
792
793 /* EHCI spec section 4.1 */
794 if (ehci_reset() != 0)
795 return -1;
796
797 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
798 if (ehci_hcd_init() != 0)
799 return -1;
800 #endif
801
802 /* Set head of reclaim list */
803 memset(&qh_list, 0, sizeof(qh_list));
804 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
805 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
806 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
807 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
808 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
809 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
810
811 /* Set async. queue head pointer. */
812 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
813
814 reg = ehci_readl(&hccr->cr_hcsparams);
815 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
816 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
817 /* Port Indicators */
818 if (HCS_INDICATOR(reg))
819 descriptor.hub.wHubCharacteristics |= 0x80;
820 /* Port Power Control */
821 if (HCS_PPC(reg))
822 descriptor.hub.wHubCharacteristics |= 0x01;
823
824 /* Start the host controller. */
825 cmd = ehci_readl(&hcor->or_usbcmd);
826 /*
827 * Philips, Intel, and maybe others need CMD_RUN before the
828 * root hub will detect new devices (why?); NEC doesn't
829 */
830 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
831 cmd |= CMD_RUN;
832 ehci_writel(&hcor->or_usbcmd, cmd);
833
834 /* take control over the ports */
835 cmd = ehci_readl(&hcor->or_configflag);
836 cmd |= FLAG_CF;
837 ehci_writel(&hcor->or_configflag, cmd);
838 /* unblock posted write */
839 cmd = ehci_readl(&hcor->or_usbcmd);
840 wait_ms(5);
841 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
842 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
843
844 rootdev = 0;
845
846 return 0;
847 }
848
849 int
850 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
851 int length)
852 {
853
854 if (usb_pipetype(pipe) != PIPE_BULK) {
855 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
856 return -1;
857 }
858 return ehci_submit_async(dev, pipe, buffer, length, NULL);
859 }
860
861 int
862 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
863 int length, struct devrequest *setup)
864 {
865
866 if (usb_pipetype(pipe) != PIPE_CONTROL) {
867 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
868 return -1;
869 }
870
871 if (usb_pipedevice(pipe) == rootdev) {
872 if (rootdev == 0)
873 dev->speed = USB_SPEED_HIGH;
874 return ehci_submit_root(dev, pipe, buffer, length, setup);
875 }
876 return ehci_submit_async(dev, pipe, buffer, length, setup);
877 }
878
879 int
880 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
881 int length, int interval)
882 {
883
884 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
885 dev, pipe, buffer, length, interval);
886 return -1;
887 }