2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
32 struct ehci_hccr
*hccr
; /* R/O registers, not need for volatile */
33 volatile struct ehci_hcor
*hcor
;
35 static uint16_t portreset
;
36 static struct QH qh_list
__attribute__((aligned(32)));
38 static struct descriptor
{
39 struct usb_hub_descriptor hub
;
40 struct usb_device_descriptor device
;
41 struct usb_linux_config_descriptor config
;
42 struct usb_linux_interface_descriptor interface
;
43 struct usb_endpoint_descriptor endpoint
;
44 } __attribute__ ((packed
)) descriptor
= {
46 0x8, /* bDescLength */
47 0x29, /* bDescriptorType: hub descriptor */
48 2, /* bNrPorts -- runtime modified */
49 0, /* wHubCharacteristics */
50 0xff, /* bPwrOn2PwrGood */
51 0, /* bHubCntrCurrent */
52 {}, /* Device removable */
53 {} /* at most 7 ports! XXX */
57 1, /* bDescriptorType: UDESC_DEVICE */
58 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
59 9, /* bDeviceClass: UDCLASS_HUB */
60 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
61 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
62 64, /* bMaxPacketSize: 64 bytes */
63 0x0000, /* idVendor */
64 0x0000, /* idProduct */
65 cpu_to_le16(0x0100), /* bcdDevice */
66 1, /* iManufacturer */
68 0, /* iSerialNumber */
69 1 /* bNumConfigurations: 1 */
73 2, /* bDescriptorType: UDESC_CONFIG */
75 1, /* bNumInterface */
76 1, /* bConfigurationValue */
77 0, /* iConfiguration */
78 0x40, /* bmAttributes: UC_SELF_POWER */
83 4, /* bDescriptorType: UDESC_INTERFACE */
84 0, /* bInterfaceNumber */
85 0, /* bAlternateSetting */
86 1, /* bNumEndpoints */
87 9, /* bInterfaceClass: UICLASS_HUB */
88 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
89 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
94 5, /* bDescriptorType: UDESC_ENDPOINT */
95 0x81, /* bEndpointAddress:
96 * UE_DIR_IN | EHCI_INTR_ENDPT
98 3, /* bmAttributes: UE_INTERRUPT */
99 8, /* wMaxPacketSize */
104 #if defined(CONFIG_EHCI_IS_TDI)
105 #define ehci_is_TDI() (1)
107 #define ehci_is_TDI() (0)
110 #if defined(CONFIG_EHCI_DCACHE)
112 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
113 * structures and data buffers. This is needed on platforms using this
114 * EHCI support with dcache enabled.
116 static void flush_invalidate(u32 addr
, int size
, int flush
)
119 flush_dcache_range(addr
, addr
+ size
);
121 invalidate_dcache_range(addr
, addr
+ size
);
124 static void cache_qtd(struct qTD
*qtd
, int flush
)
126 u32
*ptr
= (u32
*)qtd
->qt_buffer
[0];
127 int len
= (qtd
->qt_token
& 0x7fff0000) >> 16;
129 flush_invalidate((u32
)qtd
, sizeof(struct qTD
), flush
);
131 flush_invalidate((u32
)ptr
, len
, flush
);
135 static inline struct QH
*qh_addr(struct QH
*qh
)
137 return (struct QH
*)((u32
)qh
& 0xffffffe0);
140 static void cache_qh(struct QH
*qh
, int flush
)
144 static struct qTD
*first_qtd
;
147 * Walk the QH list and flush/invalidate all entries
150 flush_invalidate((u32
)qh_addr(qh
), sizeof(struct QH
), flush
);
151 if ((u32
)qh
& QH_LINK_TYPE_QH
)
154 qh
= (struct QH
*)qh
->qh_link
;
159 * Save first qTD pointer, needed for invalidating pass on this QH
162 first_qtd
= qtd
= (struct qTD
*)(*(u32
*)&qh
->qh_overlay
&
168 * Walk the qTD list and flush/invalidate all entries
173 cache_qtd(qtd
, flush
);
174 next
= (struct qTD
*)((u32
)qtd
->qt_next
& 0xffffffe0);
181 static inline void ehci_flush_dcache(struct QH
*qh
)
186 static inline void ehci_invalidate_dcache(struct QH
*qh
)
190 #else /* CONFIG_EHCI_DCACHE */
194 static inline void ehci_flush_dcache(struct QH
*qh
)
198 static inline void ehci_invalidate_dcache(struct QH
*qh
)
201 #endif /* CONFIG_EHCI_DCACHE */
203 static int handshake(uint32_t *ptr
, uint32_t mask
, uint32_t done
, int usec
)
207 result
= ehci_readl(ptr
);
208 if (result
== ~(uint32_t)0)
219 static void ehci_free(void *p
, size_t sz
)
224 static int ehci_reset(void)
231 cmd
= ehci_readl(&hcor
->or_usbcmd
);
233 ehci_writel(&hcor
->or_usbcmd
, cmd
);
234 ret
= handshake((uint32_t *)&hcor
->or_usbcmd
, CMD_RESET
, 0, 250 * 1000);
236 printf("EHCI fail to reset\n");
241 reg_ptr
= (uint32_t *)((u8
*)hcor
+ USBMODE
);
242 tmp
= ehci_readl(reg_ptr
);
243 tmp
|= USBMODE_CM_HC
;
244 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
247 ehci_writel(reg_ptr
, tmp
);
253 static void *ehci_alloc(size_t sz
, size_t align
)
255 static struct QH qh
__attribute__((aligned(32)));
256 static struct qTD td
[3] __attribute__((aligned (32)));
261 case sizeof(struct QH
):
265 case sizeof(struct qTD
):
267 debug("out of TDs\n");
274 debug("unknown allocation size\n");
282 static int ehci_td_buffer(struct qTD
*td
, void *buf
, size_t sz
)
284 uint32_t addr
, delta
, next
;
287 addr
= (uint32_t) buf
;
290 td
->qt_buffer
[idx
] = cpu_to_hc32(addr
);
291 next
= (addr
+ 4096) & ~4095;
301 debug("out of buffer pointers (%u bytes left)\n", sz
);
309 ehci_submit_async(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
310 int length
, struct devrequest
*req
)
314 volatile struct qTD
*vtd
;
317 uint32_t endpt
, token
, usbsts
;
322 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev
, pipe
,
323 buffer
, length
, req
);
325 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
326 req
->request
, req
->request
,
327 req
->requesttype
, req
->requesttype
,
328 le16_to_cpu(req
->value
), le16_to_cpu(req
->value
),
329 le16_to_cpu(req
->index
));
331 qh
= ehci_alloc(sizeof(struct QH
), 32);
333 debug("unable to allocate QH\n");
336 qh
->qh_link
= cpu_to_hc32((uint32_t)&qh_list
| QH_LINK_TYPE_QH
);
337 c
= (usb_pipespeed(pipe
) != USB_SPEED_HIGH
&&
338 usb_pipeendpoint(pipe
) == 0) ? 1 : 0;
341 (usb_maxpacket(dev
, pipe
) << 16) |
344 (usb_pipespeed(pipe
) << 12) |
345 (usb_pipeendpoint(pipe
) << 8) |
346 (0 << 7) | (usb_pipedevice(pipe
) << 0);
347 qh
->qh_endpt1
= cpu_to_hc32(endpt
);
349 (dev
->portnr
<< 23) |
350 (dev
->parent
->devnum
<< 16) | (0 << 8) | (0 << 0);
351 qh
->qh_endpt2
= cpu_to_hc32(endpt
);
352 qh
->qh_overlay
.qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
355 tdp
= &qh
->qh_overlay
.qt_next
;
358 usb_gettoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
));
361 td
= ehci_alloc(sizeof(struct qTD
), 32);
363 debug("unable to allocate SETUP td\n");
366 td
->qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
367 td
->qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
369 (sizeof(*req
) << 16) |
370 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
371 td
->qt_token
= cpu_to_hc32(token
);
372 if (ehci_td_buffer(td
, req
, sizeof(*req
)) != 0) {
373 debug("unable construct SETUP td\n");
374 ehci_free(td
, sizeof(*td
));
377 *tdp
= cpu_to_hc32((uint32_t) td
);
382 if (length
> 0 || req
== NULL
) {
383 td
= ehci_alloc(sizeof(struct qTD
), 32);
385 debug("unable to allocate DATA td\n");
388 td
->qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
389 td
->qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
390 token
= (toggle
<< 31) |
392 ((req
== NULL
? 1 : 0) << 15) |
395 ((usb_pipein(pipe
) ? 1 : 0) << 8) | (0x80 << 0);
396 td
->qt_token
= cpu_to_hc32(token
);
397 if (ehci_td_buffer(td
, buffer
, length
) != 0) {
398 debug("unable construct DATA td\n");
399 ehci_free(td
, sizeof(*td
));
402 *tdp
= cpu_to_hc32((uint32_t) td
);
407 td
= ehci_alloc(sizeof(struct qTD
), 32);
409 debug("unable to allocate ACK td\n");
412 td
->qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
413 td
->qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
414 token
= (toggle
<< 31) |
419 ((usb_pipein(pipe
) ? 0 : 1) << 8) | (0x80 << 0);
420 td
->qt_token
= cpu_to_hc32(token
);
421 *tdp
= cpu_to_hc32((uint32_t) td
);
425 qh_list
.qh_link
= cpu_to_hc32((uint32_t) qh
| QH_LINK_TYPE_QH
);
428 ehci_flush_dcache(&qh_list
);
430 usbsts
= ehci_readl(&hcor
->or_usbsts
);
431 ehci_writel(&hcor
->or_usbsts
, (usbsts
& 0x3f));
433 /* Enable async. schedule. */
434 cmd
= ehci_readl(&hcor
->or_usbcmd
);
436 ehci_writel(&hcor
->or_usbcmd
, cmd
);
438 ret
= handshake((uint32_t *)&hcor
->or_usbsts
, STD_ASS
, STD_ASS
,
441 printf("EHCI fail timeout STD_ASS set\n");
445 /* Wait for TDs to be processed. */
449 /* Invalidate dcache */
450 ehci_invalidate_dcache(&qh_list
);
451 token
= hc32_to_cpu(vtd
->qt_token
);
454 } while (get_timer(ts
) < CONFIG_SYS_HZ
);
456 /* Disable async schedule. */
457 cmd
= ehci_readl(&hcor
->or_usbcmd
);
459 ehci_writel(&hcor
->or_usbcmd
, cmd
);
461 ret
= handshake((uint32_t *)&hcor
->or_usbsts
, STD_ASS
, 0,
464 printf("EHCI fail timeout STD_ASS reset\n");
468 qh_list
.qh_link
= cpu_to_hc32((uint32_t)&qh_list
| QH_LINK_TYPE_QH
);
470 token
= hc32_to_cpu(qh
->qh_overlay
.qt_token
);
471 if (!(token
& 0x80)) {
472 debug("TOKEN=%#x\n", token
);
473 switch (token
& 0xfc) {
475 toggle
= token
>> 31;
476 usb_settoggle(dev
, usb_pipeendpoint(pipe
),
477 usb_pipeout(pipe
), toggle
);
481 dev
->status
= USB_ST_STALLED
;
485 dev
->status
= USB_ST_BUF_ERR
;
489 dev
->status
= USB_ST_BABBLE_DET
;
492 dev
->status
= USB_ST_CRC_ERR
;
495 dev
->act_len
= length
- ((token
>> 16) & 0x7fff);
498 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
499 dev
->devnum
, ehci_readl(&hcor
->or_usbsts
),
500 ehci_readl(&hcor
->or_portsc
[0]),
501 ehci_readl(&hcor
->or_portsc
[1]));
504 return (dev
->status
!= USB_ST_NOT_PROC
) ? 0 : -1;
507 td
= (void *)hc32_to_cpu(qh
->qh_overlay
.qt_next
);
508 while (td
!= (void *)QT_NEXT_TERMINATE
) {
509 qh
->qh_overlay
.qt_next
= td
->qt_next
;
510 ehci_free(td
, sizeof(*td
));
511 td
= (void *)hc32_to_cpu(qh
->qh_overlay
.qt_next
);
513 ehci_free(qh
, sizeof(*qh
));
517 static inline int min3(int a
, int b
, int c
)
528 ehci_submit_root(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
529 int length
, struct devrequest
*req
)
536 uint32_t *status_reg
;
538 if (le16_to_cpu(req
->index
) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
) {
539 printf("The request port(%d) is not configured\n",
540 le16_to_cpu(req
->index
) - 1);
543 status_reg
= (uint32_t *)&hcor
->or_portsc
[
544 le16_to_cpu(req
->index
) - 1];
547 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
548 req
->request
, req
->request
,
549 req
->requesttype
, req
->requesttype
,
550 le16_to_cpu(req
->value
), le16_to_cpu(req
->index
));
552 typeReq
= req
->request
| req
->requesttype
<< 8;
555 case DeviceRequest
| USB_REQ_GET_DESCRIPTOR
:
556 switch (le16_to_cpu(req
->value
) >> 8) {
558 debug("USB_DT_DEVICE request\n");
559 srcptr
= &descriptor
.device
;
563 debug("USB_DT_CONFIG config\n");
564 srcptr
= &descriptor
.config
;
568 debug("USB_DT_STRING config\n");
569 switch (le16_to_cpu(req
->value
) & 0xff) {
570 case 0: /* Language */
575 srcptr
= "\16\3u\0-\0b\0o\0o\0t\0";
578 case 2: /* Product */
579 srcptr
= "\52\3E\0H\0C\0I\0 "
581 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
585 debug("unknown value DT_STRING %x\n",
586 le16_to_cpu(req
->value
));
591 debug("unknown value %x\n", le16_to_cpu(req
->value
));
595 case USB_REQ_GET_DESCRIPTOR
| ((USB_DIR_IN
| USB_RT_HUB
) << 8):
596 switch (le16_to_cpu(req
->value
) >> 8) {
598 debug("USB_DT_HUB config\n");
599 srcptr
= &descriptor
.hub
;
603 debug("unknown value %x\n", le16_to_cpu(req
->value
));
607 case USB_REQ_SET_ADDRESS
| (USB_RECIP_DEVICE
<< 8):
608 debug("USB_REQ_SET_ADDRESS\n");
609 rootdev
= le16_to_cpu(req
->value
);
611 case DeviceOutRequest
| USB_REQ_SET_CONFIGURATION
:
612 debug("USB_REQ_SET_CONFIGURATION\n");
615 case USB_REQ_GET_STATUS
| ((USB_DIR_IN
| USB_RT_HUB
) << 8):
616 tmpbuf
[0] = 1; /* USB_STATUS_SELFPOWERED */
621 case USB_REQ_GET_STATUS
| ((USB_RT_PORT
| USB_DIR_IN
) << 8):
622 memset(tmpbuf
, 0, 4);
623 reg
= ehci_readl(status_reg
);
624 if (reg
& EHCI_PS_CS
)
625 tmpbuf
[0] |= USB_PORT_STAT_CONNECTION
;
626 if (reg
& EHCI_PS_PE
)
627 tmpbuf
[0] |= USB_PORT_STAT_ENABLE
;
628 if (reg
& EHCI_PS_SUSP
)
629 tmpbuf
[0] |= USB_PORT_STAT_SUSPEND
;
630 if (reg
& EHCI_PS_OCA
)
631 tmpbuf
[0] |= USB_PORT_STAT_OVERCURRENT
;
632 if (reg
& EHCI_PS_PR
)
633 tmpbuf
[0] |= USB_PORT_STAT_RESET
;
634 if (reg
& EHCI_PS_PP
)
635 tmpbuf
[1] |= USB_PORT_STAT_POWER
>> 8;
638 switch ((reg
>> 26) & 3) {
642 tmpbuf
[1] |= USB_PORT_STAT_LOW_SPEED
>> 8;
646 tmpbuf
[1] |= USB_PORT_STAT_HIGH_SPEED
>> 8;
650 tmpbuf
[1] |= USB_PORT_STAT_HIGH_SPEED
>> 8;
653 if (reg
& EHCI_PS_CSC
)
654 tmpbuf
[2] |= USB_PORT_STAT_C_CONNECTION
;
655 if (reg
& EHCI_PS_PEC
)
656 tmpbuf
[2] |= USB_PORT_STAT_C_ENABLE
;
657 if (reg
& EHCI_PS_OCC
)
658 tmpbuf
[2] |= USB_PORT_STAT_C_OVERCURRENT
;
659 if (portreset
& (1 << le16_to_cpu(req
->index
)))
660 tmpbuf
[2] |= USB_PORT_STAT_C_RESET
;
665 case USB_REQ_SET_FEATURE
| ((USB_DIR_OUT
| USB_RT_PORT
) << 8):
666 reg
= ehci_readl(status_reg
);
667 reg
&= ~EHCI_PS_CLEAR
;
668 switch (le16_to_cpu(req
->value
)) {
669 case USB_PORT_FEAT_ENABLE
:
671 ehci_writel(status_reg
, reg
);
673 case USB_PORT_FEAT_POWER
:
674 if (HCS_PPC(ehci_readl(&hccr
->cr_hcsparams
))) {
676 ehci_writel(status_reg
, reg
);
679 case USB_PORT_FEAT_RESET
:
680 if ((reg
& (EHCI_PS_PE
| EHCI_PS_CS
)) == EHCI_PS_CS
&&
682 EHCI_PS_IS_LOWSPEED(reg
)) {
683 /* Low speed device, give up ownership. */
684 debug("port %d low speed --> companion\n",
687 ehci_writel(status_reg
, reg
);
694 ehci_writel(status_reg
, reg
);
696 * caller must wait, then call GetPortStatus
697 * usb 2.0 specification say 50 ms resets on
701 /* terminate the reset */
702 ehci_writel(status_reg
, reg
& ~EHCI_PS_PR
);
704 * A host controller must terminate the reset
705 * and stabilize the state of the port within
708 ret
= handshake(status_reg
, EHCI_PS_PR
, 0,
712 1 << le16_to_cpu(req
->index
);
714 printf("port(%d) reset error\n",
715 le16_to_cpu(req
->index
) - 1);
719 debug("unknown feature %x\n", le16_to_cpu(req
->value
));
722 /* unblock posted writes */
723 (void) ehci_readl(&hcor
->or_usbcmd
);
725 case USB_REQ_CLEAR_FEATURE
| ((USB_DIR_OUT
| USB_RT_PORT
) << 8):
726 reg
= ehci_readl(status_reg
);
727 switch (le16_to_cpu(req
->value
)) {
728 case USB_PORT_FEAT_ENABLE
:
731 case USB_PORT_FEAT_C_ENABLE
:
732 reg
= (reg
& ~EHCI_PS_CLEAR
) | EHCI_PS_PE
;
734 case USB_PORT_FEAT_POWER
:
735 if (HCS_PPC(ehci_readl(&hccr
->cr_hcsparams
)))
736 reg
= reg
& ~(EHCI_PS_CLEAR
| EHCI_PS_PP
);
737 case USB_PORT_FEAT_C_CONNECTION
:
738 reg
= (reg
& ~EHCI_PS_CLEAR
) | EHCI_PS_CSC
;
740 case USB_PORT_FEAT_OVER_CURRENT
:
741 reg
= (reg
& ~EHCI_PS_CLEAR
) | EHCI_PS_OCC
;
743 case USB_PORT_FEAT_C_RESET
:
744 portreset
&= ~(1 << le16_to_cpu(req
->index
));
747 debug("unknown feature %x\n", le16_to_cpu(req
->value
));
750 ehci_writel(status_reg
, reg
);
751 /* unblock posted write */
752 (void) ehci_readl(&hcor
->or_usbcmd
);
755 debug("Unknown request\n");
760 len
= min3(srclen
, le16_to_cpu(req
->length
), length
);
761 if (srcptr
!= NULL
&& len
> 0)
762 memcpy(buffer
, srcptr
, len
);
771 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
772 req
->requesttype
, req
->request
, le16_to_cpu(req
->value
),
773 le16_to_cpu(req
->index
), le16_to_cpu(req
->length
));
776 dev
->status
= USB_ST_STALLED
;
780 int usb_lowlevel_stop(void)
782 return ehci_hcd_stop();
785 int usb_lowlevel_init(void)
790 if (ehci_hcd_init() != 0)
793 /* EHCI spec section 4.1 */
794 if (ehci_reset() != 0)
797 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
798 if (ehci_hcd_init() != 0)
802 /* Set head of reclaim list */
803 memset(&qh_list
, 0, sizeof(qh_list
));
804 qh_list
.qh_link
= cpu_to_hc32((uint32_t)&qh_list
| QH_LINK_TYPE_QH
);
805 qh_list
.qh_endpt1
= cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH
<< 12));
806 qh_list
.qh_curtd
= cpu_to_hc32(QT_NEXT_TERMINATE
);
807 qh_list
.qh_overlay
.qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
808 qh_list
.qh_overlay
.qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
809 qh_list
.qh_overlay
.qt_token
= cpu_to_hc32(0x40);
811 /* Set async. queue head pointer. */
812 ehci_writel(&hcor
->or_asynclistaddr
, (uint32_t)&qh_list
);
814 reg
= ehci_readl(&hccr
->cr_hcsparams
);
815 descriptor
.hub
.bNbrPorts
= HCS_N_PORTS(reg
);
816 printf("Register %x NbrPorts %d\n", reg
, descriptor
.hub
.bNbrPorts
);
817 /* Port Indicators */
818 if (HCS_INDICATOR(reg
))
819 descriptor
.hub
.wHubCharacteristics
|= 0x80;
820 /* Port Power Control */
822 descriptor
.hub
.wHubCharacteristics
|= 0x01;
824 /* Start the host controller. */
825 cmd
= ehci_readl(&hcor
->or_usbcmd
);
827 * Philips, Intel, and maybe others need CMD_RUN before the
828 * root hub will detect new devices (why?); NEC doesn't
830 cmd
&= ~(CMD_LRESET
|CMD_IAAD
|CMD_PSE
|CMD_ASE
|CMD_RESET
);
832 ehci_writel(&hcor
->or_usbcmd
, cmd
);
834 /* take control over the ports */
835 cmd
= ehci_readl(&hcor
->or_configflag
);
837 ehci_writel(&hcor
->or_configflag
, cmd
);
838 /* unblock posted write */
839 cmd
= ehci_readl(&hcor
->or_usbcmd
);
841 reg
= HC_VERSION(ehci_readl(&hccr
->cr_capbase
));
842 printf("USB EHCI %x.%02x\n", reg
>> 8, reg
& 0xff);
850 submit_bulk_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
854 if (usb_pipetype(pipe
) != PIPE_BULK
) {
855 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe
));
858 return ehci_submit_async(dev
, pipe
, buffer
, length
, NULL
);
862 submit_control_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
863 int length
, struct devrequest
*setup
)
866 if (usb_pipetype(pipe
) != PIPE_CONTROL
) {
867 debug("non-control pipe (type=%lu)", usb_pipetype(pipe
));
871 if (usb_pipedevice(pipe
) == rootdev
) {
873 dev
->speed
= USB_SPEED_HIGH
;
874 return ehci_submit_root(dev
, pipe
, buffer
, length
, setup
);
876 return ehci_submit_async(dev
, pipe
, buffer
, length
, setup
);
880 submit_int_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
881 int length
, int interval
)
884 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
885 dev
, pipe
, buffer
, length
, interval
);