2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
32 struct ehci_hccr
*hccr
; /* R/O registers, not need for volatile */
33 volatile struct ehci_hcor
*hcor
;
35 static uint16_t portreset
;
36 static struct QH qh_list
__attribute__((aligned(32)));
38 static struct descriptor
{
39 struct usb_hub_descriptor hub
;
40 struct usb_device_descriptor device
;
41 struct usb_linux_config_descriptor config
;
42 struct usb_linux_interface_descriptor interface
;
43 struct usb_endpoint_descriptor endpoint
;
44 } __attribute__ ((packed
)) descriptor
= {
46 0x8, /* bDescLength */
47 0x29, /* bDescriptorType: hub descriptor */
48 2, /* bNrPorts -- runtime modified */
49 0, /* wHubCharacteristics */
50 0xff, /* bPwrOn2PwrGood */
51 0, /* bHubCntrCurrent */
52 {}, /* Device removable */
53 {} /* at most 7 ports! XXX */
57 1, /* bDescriptorType: UDESC_DEVICE */
58 0x0002, /* bcdUSB: v2.0 */
59 9, /* bDeviceClass: UDCLASS_HUB */
60 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
61 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
62 64, /* bMaxPacketSize: 64 bytes */
63 0x0000, /* idVendor */
64 0x0000, /* idProduct */
65 0x0001, /* bcdDevice */
66 1, /* iManufacturer */
68 0, /* iSerialNumber */
69 1 /* bNumConfigurations: 1 */
73 2, /* bDescriptorType: UDESC_CONFIG */
75 1, /* bNumInterface */
76 1, /* bConfigurationValue */
77 0, /* iConfiguration */
78 0x40, /* bmAttributes: UC_SELF_POWER */
83 4, /* bDescriptorType: UDESC_INTERFACE */
84 0, /* bInterfaceNumber */
85 0, /* bAlternateSetting */
86 1, /* bNumEndpoints */
87 9, /* bInterfaceClass: UICLASS_HUB */
88 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
89 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
94 5, /* bDescriptorType: UDESC_ENDPOINT */
95 0x81, /* bEndpointAddress:
96 * UE_DIR_IN | EHCI_INTR_ENDPT
98 3, /* bmAttributes: UE_INTERRUPT */
99 8, 0, /* wMaxPacketSize */
104 #if defined(CONFIG_EHCI_IS_TDI)
105 #define ehci_is_TDI() (1)
107 #define ehci_is_TDI() (0)
110 #if defined(CONFIG_EHCI_DCACHE)
112 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
113 * structures and data buffers. This is needed on platforms using this
114 * EHCI support with dcache enabled.
116 static void flush_invalidate(u32 addr
, int size
, int flush
)
119 flush_dcache_range(addr
, addr
+ size
);
121 invalidate_dcache_range(addr
, addr
+ size
);
124 static void cache_qtd(struct qTD
*qtd
, int flush
)
126 u32
*ptr
= (u32
*)qtd
->qt_buffer
[0];
127 int len
= (qtd
->qt_token
& 0x7fff0000) >> 16;
129 flush_invalidate((u32
)qtd
, sizeof(struct qTD
), flush
);
131 flush_invalidate((u32
)ptr
, len
, flush
);
135 static inline struct QH
*qh_addr(struct QH
*qh
)
137 return (struct QH
*)((u32
)qh
& 0xffffffe0);
140 static void cache_qh(struct QH
*qh
, int flush
)
144 static struct qTD
*first_qtd
;
147 * Walk the QH list and flush/invalidate all entries
150 flush_invalidate((u32
)qh_addr(qh
), sizeof(struct QH
), flush
);
151 if ((u32
)qh
& QH_LINK_TYPE_QH
)
154 qh
= (struct QH
*)qh
->qh_link
;
159 * Save first qTD pointer, needed for invalidating pass on this QH
162 first_qtd
= qtd
= (struct qTD
*)(*(u32
*)&qh
->qh_overlay
&
168 * Walk the qTD list and flush/invalidate all entries
173 cache_qtd(qtd
, flush
);
174 next
= (struct qTD
*)((u32
)qtd
->qt_next
& 0xffffffe0);
181 static inline void ehci_flush_dcache(struct QH
*qh
)
186 static inline void ehci_invalidate_dcache(struct QH
*qh
)
190 #else /* CONFIG_EHCI_DCACHE */
194 static inline void ehci_flush_dcache(struct QH
*qh
)
198 static inline void ehci_invalidate_dcache(struct QH
*qh
)
201 #endif /* CONFIG_EHCI_DCACHE */
203 static int handshake(uint32_t *ptr
, uint32_t mask
, uint32_t done
, int usec
)
207 result
= ehci_readl(ptr
);
208 if (result
== ~(uint32_t)0)
219 static void ehci_free(void *p
, size_t sz
)
224 static int ehci_reset(void)
231 cmd
= ehci_readl(&hcor
->or_usbcmd
);
233 ehci_writel(&hcor
->or_usbcmd
, cmd
);
234 ret
= handshake((uint32_t *)&hcor
->or_usbcmd
, CMD_RESET
, 0, 250 * 1000);
236 printf("EHCI fail to reset\n");
241 reg_ptr
= (uint32_t *)((u8
*)hcor
+ USBMODE
);
242 tmp
= ehci_readl(reg_ptr
);
243 tmp
|= USBMODE_CM_HC
;
244 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
247 ehci_writel(reg_ptr
, tmp
);
253 static void *ehci_alloc(size_t sz
, size_t align
)
255 static struct QH qh
__attribute__((aligned(32)));
256 static struct qTD td
[3] __attribute__((aligned (32)));
261 case sizeof(struct QH
):
265 case sizeof(struct qTD
):
267 debug("out of TDs\n");
274 debug("unknown allocation size\n");
282 static int ehci_td_buffer(struct qTD
*td
, void *buf
, size_t sz
)
284 uint32_t addr
, delta
, next
;
287 addr
= (uint32_t) buf
;
290 td
->qt_buffer
[idx
] = cpu_to_hc32(addr
);
291 next
= (addr
+ 4096) & ~4095;
301 debug("out of buffer pointers (%u bytes left)\n", sz
);
309 ehci_submit_async(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
310 int length
, struct devrequest
*req
)
314 volatile struct qTD
*vtd
;
317 uint32_t endpt
, token
, usbsts
;
322 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev
, pipe
,
323 buffer
, length
, req
);
325 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
326 req
->request
, req
->request
,
327 req
->requesttype
, req
->requesttype
,
328 le16_to_cpu(req
->value
), le16_to_cpu(req
->value
),
329 le16_to_cpu(req
->index
));
331 qh
= ehci_alloc(sizeof(struct QH
), 32);
333 debug("unable to allocate QH\n");
336 qh
->qh_link
= cpu_to_hc32((uint32_t)&qh_list
| QH_LINK_TYPE_QH
);
337 c
= (usb_pipespeed(pipe
) != USB_SPEED_HIGH
&&
338 usb_pipeendpoint(pipe
) == 0) ? 1 : 0;
341 (usb_maxpacket(dev
, pipe
) << 16) |
344 (usb_pipespeed(pipe
) << 12) |
345 (usb_pipeendpoint(pipe
) << 8) |
346 (0 << 7) | (usb_pipedevice(pipe
) << 0);
347 qh
->qh_endpt1
= cpu_to_hc32(endpt
);
349 (dev
->portnr
<< 23) |
350 (dev
->parent
->devnum
<< 16) | (0 << 8) | (0 << 0);
351 qh
->qh_endpt2
= cpu_to_hc32(endpt
);
352 qh
->qh_overlay
.qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
353 qh
->qh_overlay
.qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
356 tdp
= &qh
->qh_overlay
.qt_next
;
359 usb_gettoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
));
362 td
= ehci_alloc(sizeof(struct qTD
), 32);
364 debug("unable to allocate SETUP td\n");
367 td
->qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
368 td
->qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
370 (sizeof(*req
) << 16) |
371 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
372 td
->qt_token
= cpu_to_hc32(token
);
373 if (ehci_td_buffer(td
, req
, sizeof(*req
)) != 0) {
374 debug("unable construct SETUP td\n");
375 ehci_free(td
, sizeof(*td
));
378 *tdp
= cpu_to_hc32((uint32_t) td
);
383 if (length
> 0 || req
== NULL
) {
384 td
= ehci_alloc(sizeof(struct qTD
), 32);
386 debug("unable to allocate DATA td\n");
389 td
->qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
390 td
->qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
391 token
= (toggle
<< 31) |
393 ((req
== NULL
? 1 : 0) << 15) |
396 ((usb_pipein(pipe
) ? 1 : 0) << 8) | (0x80 << 0);
397 td
->qt_token
= cpu_to_hc32(token
);
398 if (ehci_td_buffer(td
, buffer
, length
) != 0) {
399 debug("unable construct DATA td\n");
400 ehci_free(td
, sizeof(*td
));
403 *tdp
= cpu_to_hc32((uint32_t) td
);
408 td
= ehci_alloc(sizeof(struct qTD
), 32);
410 debug("unable to allocate ACK td\n");
413 td
->qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
414 td
->qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
415 token
= (toggle
<< 31) |
420 ((usb_pipein(pipe
) ? 0 : 1) << 8) | (0x80 << 0);
421 td
->qt_token
= cpu_to_hc32(token
);
422 *tdp
= cpu_to_hc32((uint32_t) td
);
426 qh_list
.qh_link
= cpu_to_hc32((uint32_t) qh
| QH_LINK_TYPE_QH
);
429 ehci_flush_dcache(&qh_list
);
431 usbsts
= ehci_readl(&hcor
->or_usbsts
);
432 ehci_writel(&hcor
->or_usbsts
, (usbsts
& 0x3f));
434 /* Enable async. schedule. */
435 cmd
= ehci_readl(&hcor
->or_usbcmd
);
437 ehci_writel(&hcor
->or_usbcmd
, cmd
);
439 ret
= handshake((uint32_t *)&hcor
->or_usbsts
, STD_ASS
, STD_ASS
,
442 printf("EHCI fail timeout STD_ASS set\n");
446 /* Wait for TDs to be processed. */
450 /* Invalidate dcache */
451 ehci_invalidate_dcache(&qh_list
);
452 token
= hc32_to_cpu(vtd
->qt_token
);
455 } while (get_timer(ts
) < CONFIG_SYS_HZ
);
457 /* Disable async schedule. */
458 cmd
= ehci_readl(&hcor
->or_usbcmd
);
460 ehci_writel(&hcor
->or_usbcmd
, cmd
);
462 ret
= handshake((uint32_t *)&hcor
->or_usbsts
, STD_ASS
, 0,
465 printf("EHCI fail timeout STD_ASS reset\n");
469 qh_list
.qh_link
= cpu_to_hc32((uint32_t)&qh_list
| QH_LINK_TYPE_QH
);
471 token
= hc32_to_cpu(qh
->qh_overlay
.qt_token
);
472 if (!(token
& 0x80)) {
473 debug("TOKEN=%#x\n", token
);
474 switch (token
& 0xfc) {
476 toggle
= token
>> 31;
477 usb_settoggle(dev
, usb_pipeendpoint(pipe
),
478 usb_pipeout(pipe
), toggle
);
482 dev
->status
= USB_ST_STALLED
;
486 dev
->status
= USB_ST_BUF_ERR
;
490 dev
->status
= USB_ST_BABBLE_DET
;
493 dev
->status
= USB_ST_CRC_ERR
;
496 dev
->act_len
= length
- ((token
>> 16) & 0x7fff);
499 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
500 dev
->devnum
, ehci_readl(&hcor
->or_usbsts
),
501 ehci_readl(&hcor
->or_portsc
[0]),
502 ehci_readl(&hcor
->or_portsc
[1]));
505 return (dev
->status
!= USB_ST_NOT_PROC
) ? 0 : -1;
508 td
= (void *)hc32_to_cpu(qh
->qh_overlay
.qt_next
);
509 while (td
!= (void *)QT_NEXT_TERMINATE
) {
510 qh
->qh_overlay
.qt_next
= td
->qt_next
;
511 ehci_free(td
, sizeof(*td
));
512 td
= (void *)hc32_to_cpu(qh
->qh_overlay
.qt_next
);
514 ehci_free(qh
, sizeof(*qh
));
518 static inline int min3(int a
, int b
, int c
)
529 ehci_submit_root(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
530 int length
, struct devrequest
*req
)
537 uint32_t *status_reg
;
539 if (le16_to_cpu(req
->index
) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
) {
540 printf("The request port(%d) is not configured\n",
541 le16_to_cpu(req
->index
) - 1);
544 status_reg
= (uint32_t *)&hcor
->or_portsc
[
545 le16_to_cpu(req
->index
) - 1];
548 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
549 req
->request
, req
->request
,
550 req
->requesttype
, req
->requesttype
,
551 le16_to_cpu(req
->value
), le16_to_cpu(req
->index
));
553 typeReq
= req
->request
| req
->requesttype
<< 8;
556 case DeviceRequest
| USB_REQ_GET_DESCRIPTOR
:
557 switch (le16_to_cpu(req
->value
) >> 8) {
559 debug("USB_DT_DEVICE request\n");
560 srcptr
= &descriptor
.device
;
564 debug("USB_DT_CONFIG config\n");
565 srcptr
= &descriptor
.config
;
569 debug("USB_DT_STRING config\n");
570 switch (le16_to_cpu(req
->value
) & 0xff) {
571 case 0: /* Language */
576 srcptr
= "\16\3u\0-\0b\0o\0o\0t\0";
579 case 2: /* Product */
580 srcptr
= "\52\3E\0H\0C\0I\0 "
582 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
586 debug("unknown value DT_STRING %x\n",
587 le16_to_cpu(req
->value
));
592 debug("unknown value %x\n", le16_to_cpu(req
->value
));
596 case USB_REQ_GET_DESCRIPTOR
| ((USB_DIR_IN
| USB_RT_HUB
) << 8):
597 switch (le16_to_cpu(req
->value
) >> 8) {
599 debug("USB_DT_HUB config\n");
600 srcptr
= &descriptor
.hub
;
604 debug("unknown value %x\n", le16_to_cpu(req
->value
));
608 case USB_REQ_SET_ADDRESS
| (USB_RECIP_DEVICE
<< 8):
609 debug("USB_REQ_SET_ADDRESS\n");
610 rootdev
= le16_to_cpu(req
->value
);
612 case DeviceOutRequest
| USB_REQ_SET_CONFIGURATION
:
613 debug("USB_REQ_SET_CONFIGURATION\n");
616 case USB_REQ_GET_STATUS
| ((USB_DIR_IN
| USB_RT_HUB
) << 8):
617 tmpbuf
[0] = 1; /* USB_STATUS_SELFPOWERED */
622 case USB_REQ_GET_STATUS
| ((USB_RT_PORT
| USB_DIR_IN
) << 8):
623 memset(tmpbuf
, 0, 4);
624 reg
= ehci_readl(status_reg
);
625 if (reg
& EHCI_PS_CS
)
626 tmpbuf
[0] |= USB_PORT_STAT_CONNECTION
;
627 if (reg
& EHCI_PS_PE
)
628 tmpbuf
[0] |= USB_PORT_STAT_ENABLE
;
629 if (reg
& EHCI_PS_SUSP
)
630 tmpbuf
[0] |= USB_PORT_STAT_SUSPEND
;
631 if (reg
& EHCI_PS_OCA
)
632 tmpbuf
[0] |= USB_PORT_STAT_OVERCURRENT
;
633 if (reg
& EHCI_PS_PR
&&
634 (portreset
& (1 << le16_to_cpu(req
->index
)))) {
636 /* force reset to complete */
637 reg
= reg
& ~(EHCI_PS_PR
| EHCI_PS_CLEAR
);
638 ehci_writel(status_reg
, reg
);
639 ret
= handshake(status_reg
, EHCI_PS_PR
, 0, 2 * 1000);
641 tmpbuf
[0] |= USB_PORT_STAT_RESET
;
643 printf("port(%d) reset error\n",
644 le16_to_cpu(req
->index
) - 1);
646 if (reg
& EHCI_PS_PP
)
647 tmpbuf
[1] |= USB_PORT_STAT_POWER
>> 8;
650 switch ((reg
>> 26) & 3) {
654 tmpbuf
[1] |= USB_PORT_STAT_LOW_SPEED
>> 8;
658 tmpbuf
[1] |= USB_PORT_STAT_HIGH_SPEED
>> 8;
662 tmpbuf
[1] |= USB_PORT_STAT_HIGH_SPEED
>> 8;
665 if (reg
& EHCI_PS_CSC
)
666 tmpbuf
[2] |= USB_PORT_STAT_C_CONNECTION
;
667 if (reg
& EHCI_PS_PEC
)
668 tmpbuf
[2] |= USB_PORT_STAT_C_ENABLE
;
669 if (reg
& EHCI_PS_OCC
)
670 tmpbuf
[2] |= USB_PORT_STAT_C_OVERCURRENT
;
671 if (portreset
& (1 << le16_to_cpu(req
->index
)))
672 tmpbuf
[2] |= USB_PORT_STAT_C_RESET
;
677 case USB_REQ_SET_FEATURE
| ((USB_DIR_OUT
| USB_RT_PORT
) << 8):
678 reg
= ehci_readl(status_reg
);
679 reg
&= ~EHCI_PS_CLEAR
;
680 switch (le16_to_cpu(req
->value
)) {
681 case USB_PORT_FEAT_ENABLE
:
683 ehci_writel(status_reg
, reg
);
685 case USB_PORT_FEAT_POWER
:
686 if (HCS_PPC(ehci_readl(&hccr
->cr_hcsparams
))) {
688 ehci_writel(status_reg
, reg
);
691 case USB_PORT_FEAT_RESET
:
692 if ((reg
& (EHCI_PS_PE
| EHCI_PS_CS
)) == EHCI_PS_CS
&&
694 EHCI_PS_IS_LOWSPEED(reg
)) {
695 /* Low speed device, give up ownership. */
696 debug("port %d low speed --> companion\n",
699 ehci_writel(status_reg
, reg
);
704 ehci_writel(status_reg
, reg
);
706 * caller must wait, then call GetPortStatus
707 * usb 2.0 specification say 50 ms resets on
711 portreset
|= 1 << le16_to_cpu(req
->index
);
715 debug("unknown feature %x\n", le16_to_cpu(req
->value
));
718 /* unblock posted writes */
719 (void) ehci_readl(&hcor
->or_usbcmd
);
721 case USB_REQ_CLEAR_FEATURE
| ((USB_DIR_OUT
| USB_RT_PORT
) << 8):
722 reg
= ehci_readl(status_reg
);
723 switch (le16_to_cpu(req
->value
)) {
724 case USB_PORT_FEAT_ENABLE
:
727 case USB_PORT_FEAT_C_ENABLE
:
728 reg
= (reg
& ~EHCI_PS_CLEAR
) | EHCI_PS_PE
;
730 case USB_PORT_FEAT_POWER
:
731 if (HCS_PPC(ehci_readl(&hccr
->cr_hcsparams
)))
732 reg
= reg
& ~(EHCI_PS_CLEAR
| EHCI_PS_PP
);
733 case USB_PORT_FEAT_C_CONNECTION
:
734 reg
= (reg
& ~EHCI_PS_CLEAR
) | EHCI_PS_CSC
;
736 case USB_PORT_FEAT_OVER_CURRENT
:
737 reg
= (reg
& ~EHCI_PS_CLEAR
) | EHCI_PS_OCC
;
739 case USB_PORT_FEAT_C_RESET
:
740 portreset
&= ~(1 << le16_to_cpu(req
->index
));
743 debug("unknown feature %x\n", le16_to_cpu(req
->value
));
746 ehci_writel(status_reg
, reg
);
747 /* unblock posted write */
748 (void) ehci_readl(&hcor
->or_usbcmd
);
751 debug("Unknown request\n");
756 len
= min3(srclen
, le16_to_cpu(req
->length
), length
);
757 if (srcptr
!= NULL
&& len
> 0)
758 memcpy(buffer
, srcptr
, len
);
767 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
768 req
->requesttype
, req
->request
, le16_to_cpu(req
->value
),
769 le16_to_cpu(req
->index
), le16_to_cpu(req
->length
));
772 dev
->status
= USB_ST_STALLED
;
776 int usb_lowlevel_stop(void)
778 return ehci_hcd_stop();
781 int usb_lowlevel_init(void)
786 if (ehci_hcd_init() != 0)
789 /* EHCI spec section 4.1 */
790 if (ehci_reset() != 0)
793 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
794 if (ehci_hcd_init() != 0)
798 /* Set head of reclaim list */
799 memset(&qh_list
, 0, sizeof(qh_list
));
800 qh_list
.qh_link
= cpu_to_hc32((uint32_t)&qh_list
| QH_LINK_TYPE_QH
);
801 qh_list
.qh_endpt1
= cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH
<< 12));
802 qh_list
.qh_curtd
= cpu_to_hc32(QT_NEXT_TERMINATE
);
803 qh_list
.qh_overlay
.qt_next
= cpu_to_hc32(QT_NEXT_TERMINATE
);
804 qh_list
.qh_overlay
.qt_altnext
= cpu_to_hc32(QT_NEXT_TERMINATE
);
805 qh_list
.qh_overlay
.qt_token
= cpu_to_hc32(0x40);
807 /* Set async. queue head pointer. */
808 ehci_writel(&hcor
->or_asynclistaddr
, (uint32_t)&qh_list
);
810 reg
= ehci_readl(&hccr
->cr_hcsparams
);
811 descriptor
.hub
.bNbrPorts
= HCS_N_PORTS(reg
);
812 printf("Register %x NbrPorts %d\n", reg
, descriptor
.hub
.bNbrPorts
);
813 /* Port Indicators */
814 if (HCS_INDICATOR(reg
))
815 descriptor
.hub
.wHubCharacteristics
|= 0x80;
816 /* Port Power Control */
818 descriptor
.hub
.wHubCharacteristics
|= 0x01;
820 /* Start the host controller. */
821 cmd
= ehci_readl(&hcor
->or_usbcmd
);
823 * Philips, Intel, and maybe others need CMD_RUN before the
824 * root hub will detect new devices (why?); NEC doesn't
826 cmd
&= ~(CMD_LRESET
|CMD_IAAD
|CMD_PSE
|CMD_ASE
|CMD_RESET
);
828 ehci_writel(&hcor
->or_usbcmd
, cmd
);
830 /* take control over the ports */
831 cmd
= ehci_readl(&hcor
->or_configflag
);
833 ehci_writel(&hcor
->or_configflag
, cmd
);
834 /* unblock posted write */
835 cmd
= ehci_readl(&hcor
->or_usbcmd
);
837 reg
= HC_VERSION(ehci_readl(&hccr
->cr_capbase
));
838 printf("USB EHCI %x.%02x\n", reg
>> 8, reg
& 0xff);
846 submit_bulk_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
850 if (usb_pipetype(pipe
) != PIPE_BULK
) {
851 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe
));
854 return ehci_submit_async(dev
, pipe
, buffer
, length
, NULL
);
858 submit_control_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
859 int length
, struct devrequest
*setup
)
862 if (usb_pipetype(pipe
) != PIPE_CONTROL
) {
863 debug("non-control pipe (type=%lu)", usb_pipetype(pipe
));
867 if (usb_pipedevice(pipe
) == rootdev
) {
869 dev
->speed
= USB_SPEED_HIGH
;
870 return ehci_submit_root(dev
, pipe
, buffer
, length
, setup
);
872 return ehci_submit_async(dev
, pipe
, buffer
, length
, setup
);
876 submit_int_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
877 int length
, int interval
)
880 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
881 dev
, pipe
, buffer
, length
, interval
);