1 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
3 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
5 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
6 only -fdeps-format= is specified.
7 * json.h: Add a TODO item to refactor out to share with
10 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
11 Jason Merrill <jason@redhat.com>
13 * gcc.cc (join_spec_func): Add a spec function to join all
16 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
18 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
19 src_op_0 var to avoid rtl check error.
21 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
23 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
25 (operator_not_equal::fold_range): Handle VREL_EQ.
26 (operator_lt::fold_range): Remove special casing for VREL_EQ.
27 (operator_gt::fold_range): Same.
28 (foperator_unordered_equal::fold_range): Same.
30 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
32 * doc/extend.texi: Document attributes hot, cold on C++ types.
34 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
36 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
37 modulo instruction is disabled.
38 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
39 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
40 (define_expand umod<mode>3): New.
41 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
42 instruction is disabled.
43 (umodti3, modti3): Check if the modulo instruction is disabled.
45 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
47 * doc/gm2.texi (fdebug-builtins): Correct description.
49 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
51 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
52 * config/iq2000/iq2000.md (rotrsi3): Use it.
54 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
56 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
57 (operator_lt::op2_range): Same.
58 (operator_le::op1_range): Same.
59 (operator_le::op2_range): Same.
60 (operator_gt::op1_range): Same.
61 (operator_gt::op2_range): Same.
62 (operator_ge::op1_range): Same.
63 (operator_ge::op2_range): Same.
64 (foperator_unordered_lt::op1_range): Same.
65 (foperator_unordered_lt::op2_range): Same.
66 (foperator_unordered_le::op1_range): Same.
67 (foperator_unordered_le::op2_range): Same.
68 (foperator_unordered_gt::op1_range): Same.
69 (foperator_unordered_gt::op2_range): Same.
70 (foperator_unordered_ge::op1_range): Same.
71 (foperator_unordered_ge::op2_range): Same.
73 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
75 * value-range.h (frange::update_nan): New.
77 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
79 * range-op-float.cc (operator_not_equal::op2_range): New.
80 * range-op-mixed.h: Add operator_not_equal::op2_range.
82 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
84 PR tree-optimization/110080
85 PR tree-optimization/110249
86 * tree-vrp.cc (remove_unreachable::final_p): New.
87 (remove_unreachable::maybe_register): Rename from
88 maybe_register_block and call early or final routine.
89 (fully_replaceable): New.
90 (remove_unreachable::handle_early): New.
91 (remove_unreachable::remove_and_update_globals): Remove
93 (rvrp_folder::rvrp_folder): Add final flag to constructor.
94 (rvrp_folder::post_fold_bb): Remove unreachable registration.
95 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
96 (execute_ranger_vrp): Adjust some call parameters.
98 2023-09-19 Richard Biener <rguenther@suse.de>
101 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
103 * tree-pretty-print.cc (op_symbol): Likewise.
104 (op_symbol_code): Print TDF_GIMPLE variant if requested.
105 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
107 (dump_gimple_cond): Likewise.
109 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
110 Pan Li <pan2.li@intel.com>
112 * tree-streamer.h (bp_unpack_machine_mode): If
113 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
115 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
117 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
119 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
121 * config/riscv/autovec.md: Extend VLS modes.
122 * config/riscv/vector.md: Ditto.
124 2023-09-19 Richard Biener <rguenther@suse.de>
126 PR tree-optimization/111465
127 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
128 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
130 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
132 * config/riscv/autovec.md: Extend VLS floating-point modes.
133 * config/riscv/vector.md: Ditto.
135 2023-09-19 Jakub Jelinek <jakub@redhat.com>
137 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
138 nor check type_has_mode_precision_p for width larger than [TD]Imode
140 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
141 to type. Use boolean_true_node instead of
142 constant_boolean_node (true, boolean_type_node). Formatting fixes.
144 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
146 * config/riscv/autovec.md: Add VLS modes.
147 * config/riscv/vector.md: Ditto.
149 2023-09-19 Jakub Jelinek <jakub@redhat.com>
151 * tree.cc (build_bitint_type): Assert precision is not 0, or
153 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
154 of unsigned _BitInt(1).
156 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
158 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
159 Removed old combine patterns.
160 (*single_<optab>mult_plus<mode>): Ditto.
161 (*double_<optab>mult_plus<mode>): Ditto.
162 (*sign_zero_extend_fma): Ditto.
163 (*zero_sign_extend_fma): Ditto.
164 (*double_widen_fma<mode>): Ditto.
165 (*single_widen_fma<mode>): Ditto.
166 (*double_widen_fnma<mode>): Ditto.
167 (*single_widen_fnma<mode>): Ditto.
168 (*double_widen_fms<mode>): Ditto.
169 (*single_widen_fms<mode>): Ditto.
170 (*double_widen_fnms<mode>): Ditto.
171 (*single_widen_fnms<mode>): Ditto.
172 (*reduc_plus_scal_<mode>): Adjust name.
173 (*widen_reduc_plus_scal_<mode>): Adjust name.
174 (*dual_widen_fma<mode>): New combine pattern.
175 (*dual_widen_fmasu<mode>): Ditto.
176 (*dual_widen_fmaus<mode>): Ditto.
177 (*dual_fma<mode>): Ditto.
178 (*single_fma<mode>): Ditto.
179 (*dual_fnma<mode>): Ditto.
180 (*single_fnma<mode>): Ditto.
181 (*dual_fms<mode>): Ditto.
182 (*single_fms<mode>): Ditto.
183 (*dual_fnms<mode>): Ditto.
184 (*single_fnms<mode>): Ditto.
185 * config/riscv/autovec.md (fma<mode>4):
186 Reafctor fma pattern.
187 (*fma<VI:mode><P:mode>): Removed.
188 (fnma<mode>4): Reafctor.
189 (*fnma<VI:mode><P:mode>): Removed.
190 (*fma<VF:mode><P:mode>): Removed.
191 (*fnma<VF:mode><P:mode>): Removed.
192 (fms<mode>4): Reafctor.
193 (*fms<VF:mode><P:mode>): Removed.
194 (fnms<mode>4): Reafctor.
195 (*fnms<VF:mode><P:mode>): Removed.
196 * config/riscv/riscv-protos.h (prepare_ternary_operands):
198 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
199 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
200 (*pred_mul_plus<mode>): Removed.
201 (*pred_mul_plus<mode>_scalar): Removed.
202 (*pred_mul_plus<mode>_extended_scalar): Removed.
203 (*pred_minus_mul<mode>_undef): New pattern.
204 (*pred_minus_mul<mode>): Removed.
205 (*pred_minus_mul<mode>_scalar): Removed.
206 (*pred_minus_mul<mode>_extended_scalar): Removed.
207 (*pred_mul_<optab><mode>_undef): New pattern.
208 (*pred_mul_<optab><mode>): Removed.
209 (*pred_mul_<optab><mode>_scalar): Removed.
210 (*pred_mul_neg_<optab><mode>_undef): New pattern.
211 (*pred_mul_neg_<optab><mode>): Removed.
212 (*pred_mul_neg_<optab><mode>_scalar): Removed.
214 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
216 * config/riscv/riscv-vector-builtins.cc
217 (builtin_decl, expand_builtin): Replace SVE with RVV.
219 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
221 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
222 riscv-cmo.def and riscv-scalar-crypto.def.
224 2023-09-18 Pan Li <pan2.li@intel.com>
226 * config/riscv/autovec.md: Extend to vls mode.
228 2023-09-18 Pan Li <pan2.li@intel.com>
230 * config/riscv/autovec.md: Bugfix.
231 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
233 2023-09-18 Andrew Pinski <apinski@marvell.com>
235 PR tree-optimization/111442
236 * match.pd (zero_one_valued_p): Have the bit_and match not be
239 2023-09-18 Andrew Pinski <apinski@marvell.com>
241 PR tree-optimization/111435
242 * match.pd (zero_one_valued_p): Don't do recursion
245 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
247 * config/darwin-protos.h (enum darwin_external_toolchain): New.
248 * config/darwin.cc (DSYMUTIL_VERSION): New.
249 (darwin_override_options): Choose the default debug DWARF version
250 depending on the configured dsymutil version.
252 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
254 * configure: Regenerate.
255 * configure.ac: Handle explict disable of stdlib option, set
258 2023-09-18 Andrew Pinski <apinski@marvell.com>
260 PR tree-optimization/111431
261 * match.pd (`(a == CST) & a`): New pattern.
263 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
265 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
266 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
268 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
271 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
272 Add support for immediates using shifted ORR/BIC.
273 (aarch64_split_dimode_const_store): Apply if we save one instruction.
274 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
277 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
279 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
280 (neoverse-v1): Place before zeus.
281 (neoverse-v2): Place before demeter.
282 * config/aarch64/aarch64-tune.md: Regenerate.
284 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
286 * config/riscv/autovec.md: Add VLS modes.
287 * config/riscv/vector-iterators.md: Ditto.
288 * config/riscv/vector.md: Ditto.
290 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
292 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
293 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
295 2023-09-18 Richard Biener <rguenther@suse.de>
297 PR tree-optimization/111294
298 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
300 (back_threader::find_paths_to_names): Adjust.
301 (back_threader::maybe_thread_block): Likewise.
302 (back_threader_profitability::possibly_profitable_path_p): Remove
303 code applying extra costs to copies PHIs.
305 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
307 * config/riscv/autovec.md: Extend VLS modes.
308 * config/riscv/vector.md: Ditto.
310 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
312 * config/riscv/vector.md (mov<mode>): New pattern.
313 (*mov<mode>_mem_to_mem): Ditto.
315 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
316 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
317 (*mov<mode>_vls): Ditto.
318 (movmisalign<mode>): Ditto.
319 (@vec_duplicate<mode>): Ditto.
320 * config/riscv/autovec-vls.md: Removed.
322 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
325 * config/riscv/autovec.md: Add VLS modes.
327 2023-09-18 Jason Merrill <jason@redhat.com>
329 * doc/gty.texi: Add discussion of cache vs. deletable.
331 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
333 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
334 (copysign<mode>3): Ditto.
335 (xorsign<mode>3): Ditto.
336 (<optab><mode>2): Ditto.
337 * config/riscv/autovec.md: Extend VLS modes.
339 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
342 * match.pd ((t * 2) / 2): Update pattern.
344 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
346 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
348 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
351 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
352 (vec_extract<mode><vel>): Ditto.
353 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
354 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
355 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
357 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
359 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
360 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
361 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
362 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
364 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
365 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
366 (*riscv_<sha256_op>_si): New raw instruction for RV32.
367 (*riscv_<sm3_op>_si): Ditto.
368 (*riscv_<sm4_op>_si): Ditto.
369 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
370 (riscv_<sm3_op>_di_extended): Ditto.
371 (riscv_<sm4_op>_di_extended): Ditto.
372 (riscv_<sha256_op>_si): New common instruction expansion.
373 (riscv_<sm3_op>_si): Ditto.
374 (riscv_<sm4_op>_si): Ditto.
375 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
376 "crypto_zksh" and "crypto_zksed". Remove availability
377 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
378 * config/riscv/riscv-ftypes.def: Remove unused function type.
379 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
380 intrinsics to operate on uint32_t.
382 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
384 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
385 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
386 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
387 Removed as no longer used.
388 (RISCV_ATYPE_UDI): New for uint64_t.
389 * config/riscv/riscv-cmo.def: Make types unsigned for not working
390 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
391 argument/return types.
392 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
393 number and shift amount types unsigned.
394 * config/riscv/riscv-scalar-crypto.def: Ditto.
396 2023-09-16 Pan Li <pan2.li@intel.com>
398 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
400 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
402 * config/riscv/predicates.md: Restrict predicate
405 2023-09-15 Andrew Pinski <apinski@marvell.com>
407 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
408 Also match `a & zero_one_valued_p` too.
410 2023-09-15 Andrew Pinski <apinski@marvell.com>
412 PR tree-optimization/111414
413 * match.pd (`(1 >> X) != 0`): Check to see if
414 the integer_onep was an integral type (not a vector type).
416 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
418 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
419 run phi analysis, and do it before loop analysis.
421 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
423 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
426 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
428 PR tree-optimization/111407
429 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
430 when one of the operands is subject to abnormal coalescing.
432 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
434 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
435 (enum insn_type): Ditto.
436 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
437 (emit_vlmax_insn): Adjust.
438 (emit_nonvlmax_insn): Adjust.
439 (emit_vlmax_insn_lra): Adjust.
441 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
443 * config/riscv/autovec-opt.md: Adjust.
444 * config/riscv/autovec.md: Ditto.
445 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
446 (expand_reduction): Adjust expand_reduction prototype.
447 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
448 (expand_reduction): Refactor expand_reduction.
450 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
453 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
454 the lower memory access to a mem-pair operand.
456 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
458 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
459 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
460 before the driver canonicalization routines.
461 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
462 to loongarch-driver.h
463 * config/loongarch/t-linux: Move multilib-related definitions to
465 * config/loongarch/t-multilib: New file. Inject library build
466 options obtained from --with-multilib-list.
467 * config/loongarch/t-loongarch: Same.
469 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
472 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
474 (*fold_left_widen_plus_<mode>): Ditto.
475 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
476 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
477 Change from define_expand to define_insn_and_split.
478 (fold_left_plus_<mode>): Ditto.
479 (mask_len_fold_left_plus_<mode>): Ditto.
480 * config/riscv/riscv-v.cc (expand_reduction):
481 Support widen reduction.
482 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
483 Add new iterators and attrs.
485 2023-09-14 David Malcolm <dmalcolm@redhat.com>
487 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
488 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
489 (sarif_thread_flow::sarif_thread_flow): New.
490 (sarif_builder::make_code_flow_object): Reimplement, creating
491 per-thread threadFlow objects, populating them with the relevant
493 (sarif_builder::make_thread_flow_object): Delete, moving the
494 code into sarif_builder::make_code_flow_object.
495 (sarif_builder::make_thread_flow_location_object): Add
496 "path_event_idx" param. Use it to set "executionOrder"
498 * diagnostic-path.h (diagnostic_event::get_thread_id): New
500 (class diagnostic_thread): New.
501 (diagnostic_path::num_threads): New pure-virtual vfunc.
502 (diagnostic_path::get_thread): New pure-virtual vfunc.
503 (diagnostic_path::multithreaded_p): New decl.
504 (simple_diagnostic_event::simple_diagnostic_event): Add optional
506 (simple_diagnostic_event::get_thread_id): New accessor.
507 (simple_diagnostic_event::m_thread_id): New.
508 (class simple_diagnostic_thread): New.
509 (simple_diagnostic_path::simple_diagnostic_path): Move definition
511 (simple_diagnostic_path::num_threads): New.
512 (simple_diagnostic_path::get_thread): New.
513 (simple_diagnostic_path::add_thread): New.
514 (simple_diagnostic_path::add_thread_event): New.
515 (simple_diagnostic_path::m_threads): New.
516 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
517 param for overriding the context's printer.
518 (diagnostic_show_locus): Likwise.
519 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
520 Move here from diagnostic-path.h. Add main thread.
521 (simple_diagnostic_path::num_threads): New.
522 (simple_diagnostic_path::get_thread): New.
523 (simple_diagnostic_path::add_thread): New.
524 (simple_diagnostic_path::add_thread_event): New.
525 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
526 param and use it to initialize m_thread_id. Reformat.
527 * diagnostic.h: Add pretty_printer param for overriding the
529 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
530 (can_consolidate_events): Compare thread ids.
531 (class per_thread_summary): New.
532 (event_range::event_range): Add per_thread_summary arg.
533 (event_range::print): Add "pp" param and use it rather than dc's
535 (event_range::m_thread_id): New field.
536 (event_range::m_per_thread_summary): New field.
537 (path_summary::multithreaded_p): New.
538 (path_summary::get_events_for_thread_id): New.
539 (path_summary::m_per_thread_summary): New field.
540 (path_summary::m_thread_id_to_events): New field.
541 (path_summary::get_or_create_events_for_thread_id): New.
542 (path_summary::path_summary): Create per_thread_summary instances
543 as needed and associate the event_range instances with them.
544 (base_indent): Move here from print_path_summary_as_text.
545 (per_frame_indent): Likewise.
546 (class thread_event_printer): New, adapted from parts of
547 print_path_summary_as_text.
548 (print_path_summary_as_text): Make static. Reimplement to
549 moving most of existing code to class thread_event_printer,
550 capturing state as per-thread as appropriate.
551 (default_tree_diagnostic_path_printer): Add missing 'break' on
554 2023-09-14 David Malcolm <dmalcolm@redhat.com>
556 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
557 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
558 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
559 clearing the deletable gcc_root_tab_t.
560 (ggc_common_finalize): New.
561 * ggc.h (ggc_common_finalize): New decl.
562 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
565 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
567 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
568 unsigned comparisons.
569 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
570 generation of salt/saltu instructions.
571 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
572 * config/xtensa/xtensa.md (salt, saltu): New instruction
575 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
577 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
580 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
582 * config/riscv/autovec.md: Change rtx code to unspec.
583 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
584 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
585 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
587 (class widen_freducop): Removed.
588 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
589 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
590 (@pred_<reduc_op><mode>): New name.
591 (@pred_widen_reduc_plus<v_su><mode>): Change name.
592 (@pred_reduc_plus<order><mode>): Change name.
593 (@pred_widen_reduc_plus<order><mode>): Change name.
595 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
597 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
598 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
599 * config/riscv/vector-iterators.md: New iterators and attrs.
600 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
602 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
603 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
604 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
605 (@pred_reduc_<reduc><mode>): Added.
606 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
607 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
608 (@pred_widen_reduc_plus<v_su><mode>): Added.
609 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
610 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
611 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
612 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
613 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
614 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
615 (@pred_reduc_plus<order><mode>): Added.
616 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
617 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
618 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
619 (@pred_widen_reduc_plus<order><mode>): Added.
621 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
623 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
624 Move WHILELO handling to...
625 (aarch64_vector_costs::finish_cost): ...here. Check whether the
626 vectorizer has decided to use a predicated loop.
628 2023-09-14 Andrew Pinski <apinski@marvell.com>
630 PR tree-optimization/106164
631 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
632 Expand to support constants that are off by one.
634 2023-09-14 Andrew Pinski <apinski@marvell.com>
636 * genmatch.cc (parser::parse_result): For an else clause
637 of an if statement inside a switch, error out explictly.
639 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
641 * config/riscv/autovec-opt.md: Add VLS mask modes.
642 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
643 (vcond_mask_<mode><vm>): Add VLS mask modes.
644 * config/riscv/vector.md: Ditto.
646 2023-09-14 Richard Biener <rguenther@suse.de>
648 PR tree-optimization/111294
649 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
650 operands that eventually become dead and use simple_dce_from_worklist
651 to remove their definitions if they did so.
653 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
655 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
656 Accept all nonimmediate_operands, but keep the existing constraints.
657 If the instruction is split before RA, load invalid addresses into
658 a temporary register.
659 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
661 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
664 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
665 (vector_insn_info::global_merge): Ditto.
666 (vector_insn_info::get_avl_or_vl_reg): Ditto.
668 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
670 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
672 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
674 * config/loongarch/loongarch-def.c: Modify the default value of
677 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
679 * config/xtensa/xtensa.cc (xtensa_expand_scc):
680 Revert the changes from the last patch, as the work in the RTL
681 expansion pass is too far to determine the physical registers.
682 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
683 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
685 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
688 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
690 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
692 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
693 (@vec_extract<mode><vel>): Ditto.
694 * config/riscv/vector.md: Ditto
696 2023-09-13 Andrew Pinski <apinski@marvell.com>
698 * match.pd (`X <= MAX(X, Y)`):
699 Move before `MIN (X, C1) < C2` pattern.
701 2023-09-13 Andrew Pinski <apinski@marvell.com>
703 PR tree-optimization/111364
704 * match.pd (`MIN (X, Y) == X`): Extend
705 to min/lt, min/ge, max/gt, max/le.
707 2023-09-13 Andrew Pinski <apinski@marvell.com>
709 PR tree-optimization/111345
710 * match.pd (`Y > (X % Y)`): Merge
712 (`(X % Y) < Y`): Pattern by adding `:c`
715 2023-09-13 Richard Biener <rguenther@suse.de>
717 PR tree-optimization/111387
718 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
719 EDGE_DFS_BACK when doing BB vectorization.
720 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
721 to compute RPO and mark backedges.
723 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
725 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
727 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
728 (<mulh_table><mode>3_highpart): Merged pattern.
729 (umul<mode>3_highpart): Mrege smul and umul.
730 * config/riscv/vector-iterators.md (umul): New iterators.
731 (UNSPEC_VMULHU): New iterators.
733 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
735 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
737 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
739 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
741 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
742 (*cond_copysign<mode>): New combine pattern.
743 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
745 2023-09-13 Richard Biener <rguenther@suse.de>
747 PR tree-optimization/111397
748 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
749 argument to specify whether the PHI destination doesn't flow in
750 from an abnormal PHI.
751 (propagate_value): Adjust.
752 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
754 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
756 (process_bb): Likewise.
758 2023-09-13 Pan Li <pan2.li@intel.com>
761 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
763 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
765 PR tree-optimization/111303
766 * match.pd ((X - N * M) / N): Add undefined_p checking.
767 ((X + N * M) / N): Likewise.
768 ((X + C) div_rshift N): Likewise.
770 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
773 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
775 2023-09-12 Martin Jambor <mjambor@suse.cz>
777 * dbgcnt.def (form_fma): New.
778 * tree-ssa-math-opts.cc: Include dbgcnt.h.
779 (convert_mult_to_fma): Bail out if the debug counter say so.
781 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
783 * config/riscv/autovec-opt.md: Update type
784 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
786 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
788 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
790 (aarch64_layout_frame): Use it to decide whether locals should
791 go above or below the saved registers.
792 (aarch64_expand_prologue): Update stack layout comment.
793 Emit a stack tie after the final adjustment.
795 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
797 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
798 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
799 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
801 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
803 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
804 (aarch64_frame::hard_fp_save_and_probe): New fields.
805 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
806 Rather than asserting that a leaf function saves LR, instead assert
807 that a leaf function saves something.
808 (aarch64_get_separate_components): Prevent the chosen probe
809 registers from being individually shrink-wrapped.
810 (aarch64_allocate_and_probe_stack_space): Remove workaround for
811 probe registers that aren't at the bottom of the previous allocation.
813 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
815 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
816 Always probe the residual allocation at offset 1024, asserting
817 that that is in range.
819 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
821 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
822 the LR save slot is in the first 16 bytes of the register save area.
823 Only form STP/LDP push/pop candidates if both registers are valid.
824 (aarch64_allocate_and_probe_stack_space): Remove workaround for
825 when LR was not in the first 16 bytes.
827 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
829 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
830 Don't probe final allocations that are exactly 1KiB in size (after
831 unprobed space above the final allocation has been deducted).
833 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
835 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
836 calculation of initial_adjust for frames in which all saves
839 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
841 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
842 the allocation of the top of the frame.
844 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
846 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
848 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
849 from the bottom of the frame, rather than the bottom of the saved
850 register area. Measure reg_offset from the bottom of the frame
851 rather than the bottom of the saved register area.
852 (aarch64_save_callee_saves): Update accordingly.
853 (aarch64_restore_callee_saves): Likewise.
854 (aarch64_get_separate_components): Likewise.
855 (aarch64_process_components): Likewise.
857 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
859 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
861 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
863 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
865 (aarch64_frame::bytes_above_hard_fp): ...this.
866 * config/aarch64/aarch64.cc (aarch64_layout_frame)
867 (aarch64_expand_prologue): Update accordingly.
868 (aarch64_initial_elimination_offset): Likewise.
870 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
872 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
873 (aarch64_frame::bytes_above_locals): ...this.
874 * config/aarch64/aarch64.cc (aarch64_layout_frame)
875 (aarch64_initial_elimination_offset): Update accordingly.
877 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
879 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
880 calculation of chain_offset into the emit_frame_chain block.
882 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
884 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
885 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
886 callee_offset handling.
887 (aarch64_save_callee_saves): Replace the start_offset parameter
888 with a bytes_below_sp parameter.
889 (aarch64_restore_callee_saves): Likewise.
890 (aarch64_expand_prologue): Update accordingly.
891 (aarch64_expand_epilogue): Likewise.
893 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
895 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
897 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
898 (aarch64_expand_epilogue): Use it instead of
899 below_hard_fp_saved_regs_size.
901 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
903 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
905 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
906 and use it instead of crtl->outgoing_args_size.
907 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
908 of outgoing_args_size.
909 (aarch64_process_components): Likewise.
911 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
913 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
914 allocate the frame in one go if there are no saved registers.
916 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
918 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
919 chain_offset rather than callee_offset.
921 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
923 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
924 a local shorthand for cfun->machine->frame.
925 (aarch64_restore_callee_saves, aarch64_get_separate_components):
926 (aarch64_process_components): Likewise.
927 (aarch64_allocate_and_probe_stack_space): Likewise.
928 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
929 (aarch64_layout_frame): Use existing shorthand for one more case.
931 2023-09-12 Andrew Pinski <apinski@marvell.com>
933 PR tree-optimization/107881
934 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
935 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
937 2023-09-12 Pan Li <pan2.li@intel.com>
939 * config/riscv/riscv-vector-costs.h (struct range): Removed.
941 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
943 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
944 (compute_nregs_for_mode): Ditto.
945 (live_range_conflict_p): Ditto.
946 (max_number_of_live_regs): Ditto.
947 (compute_lmul): Ditto.
948 (costs::prefer_new_lmul_p): Ditto.
949 (costs::better_main_loop_than_p): Ditto.
950 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
951 (struct var_live_range): Ditto.
952 (struct autovec_info): Ditto.
953 * config/riscv/t-riscv: Update makefile for COST model.
955 2023-09-12 Jakub Jelinek <jakub@redhat.com>
957 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
960 2023-09-12 Jakub Jelinek <jakub@redhat.com>
963 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
965 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
966 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
967 optimization if type's precision is too large for
968 vn_walk_cb_data::bufsize.
970 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
972 * doc/gm2.texi (Compiler options): Document new option
975 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
977 * doc/sourcebuild.texi (stack_size): Update.
979 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
981 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
982 (<optab>_not<mode>3): Likewise.
983 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
985 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
987 (GEN_EMIT_HELPER2): Likewise.
988 (emit_strcmp_scalar_compare_byte): New function.
989 (emit_strcmp_scalar_compare_subword): Likewise.
990 (emit_strcmp_scalar_compare_word): Likewise.
991 (emit_strcmp_scalar_load_and_compare): Likewise.
992 (emit_strcmp_scalar_call_to_libc): Likewise.
993 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
994 (emit_strcmp_scalar_result_calculation): Likewise.
995 (riscv_expand_strcmp_scalar): Likewise.
996 (riscv_expand_strcmp): Likewise.
997 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
999 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
1000 (cmpstrnsi): Invoke expansion function for str(n)cmp.
1001 (cmpstrsi): Likewise.
1002 * config/riscv/riscv.opt: Add new parameter
1003 '-mstring-compare-inline-limit'.
1004 * doc/invoke.texi: Document new parameter
1005 '-mstring-compare-inline-limit'.
1007 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
1009 * config.gcc: Add new object riscv-string.o.
1011 * config/riscv/riscv-protos.h (riscv_expand_strlen):
1013 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
1014 * config/riscv/riscv.opt: New flag 'minline-strlen'.
1015 * config/riscv/t-riscv: Add new object riscv-string.o.
1016 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
1017 (th_rev<mode>2): Likewise.
1018 (th_tstnbz<mode>2): New INSN.
1019 * doc/invoke.texi: Document '-minline-strlen'.
1020 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
1021 (emit_unlikely_jump_insn): Likewise.
1022 * rtl.h (emit_likely_jump_insn): New prototype.
1023 (emit_unlikely_jump_insn): Likewise.
1024 * config/riscv/riscv-string.cc: New file.
1026 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1028 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
1029 (TARGET_SUPPORTS_ALIASES): Define.
1031 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1033 * doc/sourcebuild.texi (check-function-bodies): Update.
1035 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
1037 * gimplify.cc (gimplify_bind_expr): Check for
1038 insertion after variable cleanup. Convert 'omp allocate'
1039 var-decl attribute to GOMP_alloc/GOMP_free calls.
1041 2023-09-12 xuli <xuli1@eswincomputing.com>
1043 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
1044 parameter e and replace NULL_RTX with gcc_unreachable.
1046 2023-09-12 xuli <xuli1@eswincomputing.com>
1048 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
1050 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1051 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
1052 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
1054 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
1055 * config/riscv/riscv-vector-builtins.cc: Add args type.
1057 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
1059 * config/riscv/riscv.cc
1060 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
1061 riscv_avoid_shrink_wrapping_separate.
1062 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
1064 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
1066 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
1068 * shrink-wrap.cc (try_shrink_wrapping_separate):call
1069 use_shrink_wrapping_separate.
1070 (use_shrink_wrapping_separate): wrap the condition
1071 check in use_shrink_wrapping_separate.
1072 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
1074 2023-09-11 Andrew Pinski <apinski@marvell.com>
1076 PR tree-optimization/111348
1077 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
1078 the cmp part of the pattern.
1080 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
1083 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
1084 Call output_addr_const for CASE_CONST_SCALAR_INT.
1086 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1088 * config/riscv/thead.md: Update types
1090 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1092 * config/riscv/riscv.md: Update types
1094 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1096 * config/riscv/riscv.md: Add "zicond" type
1097 * config/riscv/zicond.md: Update types
1099 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1101 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
1102 * config/riscv/zc.md: Update types
1104 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1106 * config/riscv/autovec-opt.md: Update types
1107 * config/riscv/autovec.md: likewise
1109 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1111 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
1113 (s390_vec_unsigned_flt): Ditto.
1114 (s390_vec_revb_flt): Ditto.
1115 (s390_vec_reve_flt): Ditto.
1116 (s390_vclfnhs): Fix operand flags.
1117 (s390_vclfnls): Ditto.
1118 (s390_vcrnfs): Ditto.
1122 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1124 * config/s390/s390-builtins.def (O_U64): New.
1129 (O_M12): Change bit position.
1140 (OB_DEF_VAR): Add operand constraints.
1142 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
1145 2023-09-11 Andrew Pinski <apinski@marvell.com>
1147 PR tree-optimization/111349
1148 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
1149 the cmp part of the pattern.
1151 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1154 * config/riscv/riscv.opt: Set default as scalable vectorization.
1156 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1158 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
1159 (get_all_successors): Ditto.
1160 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
1161 (get_all_successors): Ditto.
1163 2023-09-11 Jakub Jelinek <jakub@redhat.com>
1165 PR middle-end/111329
1166 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
1167 function. For printing values which don't fit into digit_buffer
1168 use out-of-line function.
1169 * wide-int-print.h (pp_wide_int_large): Declare.
1170 * wide-int-print.cc: Include pretty-print.h.
1171 (pp_wide_int_large): Define.
1173 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1175 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
1176 Use dominance analysis.
1177 (pass_vsetvl::init): Ditto.
1178 (pass_vsetvl::done): Ditto.
1180 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1183 * config/riscv/autovec.md: Add VLS modes.
1184 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
1185 (cmp_lmul_gt_one): Ditto.
1186 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
1187 (cmp_lmul_gt_one): Ditto.
1188 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
1189 (riscv_vectorize_vec_perm_const): Ditto.
1190 * config/riscv/vector-iterators.md: Ditto.
1191 * config/riscv/vector.md: Ditto.
1193 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1195 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
1196 * config/riscv/vector-iterators.md: New iterator
1198 2023-09-11 Andrew Pinski <apinski@marvell.com>
1200 PR tree-optimization/111346
1201 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
1204 2023-09-11 liuhongt <hongtao.liu@intel.com>
1208 * config/i386/sse.md (int_comm): New int_attr.
1209 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
1210 Remove % for Complex conjugate operations since they're not
1212 (fma_<complexpairopname>_<mode>_pair): Ditto.
1213 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
1214 (cmul<conj_op><mode>3): Ditto.
1216 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1218 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
1219 fixed-vlmax/vls vector permutation.
1221 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1223 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
1225 2023-09-10 Andrew Pinski <apinski@marvell.com>
1227 PR tree-optimization/111331
1228 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
1229 Fix the LE/GE comparison to the correct value.
1230 * tree-ssa-phiopt.cc (minmax_replacement):
1231 Fix the LE/GE comparison for the
1232 `(a CMP CST1) ? max<a,CST2> : a` optimization.
1234 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
1236 * config/darwin.cc (darwin_function_section): Place unlikely
1237 executed global init code into the standard cold section.
1239 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1242 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
1243 (pass_vsetvl::pre_vsetvl): Ditto.
1244 (pass_vsetvl::init): Ditto.
1245 (pass_vsetvl::lazy_vsetvl): Ditto.
1247 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
1249 * config/loongarch/loongarch.md (mulsidi3_64bit):
1250 Field unsigned extension support.
1251 (<u>muldi3_highpart): Modify template name.
1252 (<u>mulsi3_highpart): Likewise.
1253 (<u>mulsidi3_64bit): Field unsigned extension support.
1254 (<su>muldi3_highpart): Modify muldi3_highpart to
1256 (<su>mulsi3_highpart): Modify mulsi3_highpart to
1259 2023-09-09 Xi Ruoyao <xry111@xry111.site>
1261 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
1262 Check precondition (delta must be a power of 2) and use
1263 popcount_hwi instead of a homebrew loop.
1265 2023-09-09 Xi Ruoyao <xry111@xry111.site>
1267 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
1268 Define to the maximum amount of bytes able to be loaded or
1269 stored with one machine instruction.
1270 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
1271 New static function.
1272 (loongarch_block_move_straight): Call
1273 loongarch_mode_for_move_size for machine_mode to be moved.
1274 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
1275 instead of UNITS_PER_WORD.
1277 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1279 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
1281 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
1283 * fold-const.cc (can_min_p): New function.
1284 (poly_int_binop): Try fold MIN_EXPR.
1286 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
1288 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
1289 case VREL_EQ nor call frelop_early_resolve.
1291 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
1293 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
1295 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
1296 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
1298 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
1300 * config/riscv/thead.md: Use more appropriate mode attributes
1303 2023-09-08 Guo Jie <guojie@loongson.cn>
1305 * common/config/loongarch/loongarch-common.cc:
1306 (default_options loongarch_option_optimization_table):
1307 Default to -fsched-pressure.
1309 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
1311 * config.gcc: remove non-POSIX syntax "<<<".
1313 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
1315 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
1316 Rename postfix to _bitmanip.
1317 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
1318 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
1320 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1322 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
1324 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1326 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
1328 2023-09-07 liuhongt <hongtao.liu@intel.com>
1330 * config/i386/sse.md
1331 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
1332 (VHFBF_AVX512VL): New mode iterator.
1333 (VI2HFBF_AVX512VL): New mode iterator.
1335 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
1337 * value-range.h (contains_zero_p): Return false for undefined ranges.
1338 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
1339 contains_zero_p change above.
1340 (operator_ge::op1_op2_relation): Same.
1341 (operator_equal::op1_op2_relation): Same.
1342 (operator_not_equal::op1_op2_relation): Same.
1343 (operator_lt::op1_op2_relation): Same.
1344 (operator_le::op1_op2_relation): Same.
1345 (operator_ge::op1_op2_relation): Same.
1346 * range-op.cc (operator_equal::op1_op2_relation): Same.
1347 (operator_not_equal::op1_op2_relation): Same.
1348 (operator_lt::op1_op2_relation): Same.
1349 (operator_le::op1_op2_relation): Same.
1350 (operator_cast::op1_range): Same.
1351 (set_nonzero_range_from_mask): Same.
1352 (operator_bitwise_xor::op1_range): Same.
1353 (operator_addr_expr::fold_range): Same.
1354 (operator_addr_expr::op1_range): Same.
1356 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
1358 PR tree-optimization/110875
1359 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
1360 cache-prefilling routine when the ssa-name has no global value.
1362 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
1365 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
1366 (process_alt_operands): Set up the flag. Clear flag for chosen
1367 alternative with special memory constraints.
1368 (process_alt_operands): Set up used insn alternative depending on the flag.
1370 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1372 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
1373 * config/riscv/riscv.md: Ditto.
1374 * config/riscv/vector-iterators.md: Ditto.
1375 * config/riscv/vector.md: Ditto.
1377 2023-09-07 David Malcolm <dmalcolm@redhat.com>
1379 * diagnostic-core.h (error_meta): New decl.
1380 * diagnostic.cc (error_meta): New.
1382 2023-09-07 Jakub Jelinek <jakub@redhat.com>
1385 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
1386 inside gcc_assert, as later code relies on it filling info variable.
1387 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
1388 clear_padding_type): Likewise.
1389 * varasm.cc (output_constant): Likewise.
1390 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
1391 * stor-layout.cc (finish_bitfield_representative, layout_type):
1393 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
1395 2023-09-07 Xi Ruoyao <xry111@xry111.site>
1398 * config/loongarch/loongarch-protos.h
1399 (loongarch_pre_reload_split): Declare new function.
1400 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
1401 * config/loongarch/loongarch.cc
1402 (loongarch_pre_reload_split): Implement.
1403 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
1404 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
1406 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
1407 New define_insn_and_split.
1408 (bstrins_<mode>_for_ior_mask): Likewise.
1409 (define_peephole2): Further optimize code sequence produced by
1410 bstrins_<mode>_for_ior_mask if possible.
1412 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
1414 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
1415 rather than gen_rtx_PLUS.
1417 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1420 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
1421 (pass_vsetvl::df_post_optimization): Remove incorrect function.
1423 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
1425 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
1426 Parse 'XVentanaCondOps' extension.
1427 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
1428 (TARGET_XVENTANACONDOPS): Ditto.
1429 (TARGET_ZICOND_LIKE): New to represent targets with conditional
1430 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
1431 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
1432 with TARGET_ZICOND_LIKE.
1433 (riscv_expand_conditional_move): Ditto.
1434 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
1436 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
1437 * config/riscv/zicond.md: Modify description.
1438 (eqz_ventana): New to match corresponding czero instructions.
1439 (nez_ventana): Ditto.
1440 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
1441 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
1442 (*czero.<eqz>.<GPR><X>): Ditto.
1443 (*czero.eqz.<GPR><X>.opt1): Ditto.
1444 (*czero.nez.<GPR><X>.opt2): Ditto.
1446 2023-09-06 Ian Lance Taylor <iant@golang.org>
1449 * godump.cc (go_format_type): Handle BITINT_TYPE.
1451 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1454 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
1457 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1460 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
1461 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
1462 rather than make_edge, initialize bb->count.
1464 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1467 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
1468 Document general rules for _BitInt support library functions
1469 and document __mulbitint3 and __divmodbitint4.
1470 (Conversion functions): Document __fix{s,d,x,t}fbitint,
1471 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
1472 __bid_floatbitint{s,d,t}d.
1474 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1477 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
1480 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1483 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
1484 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
1485 check if all padding bits up to mode precision are zeros or sign
1486 bit copies and if not, jump to DO_ERROR.
1487 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
1488 Adjust expand_ubsan_result_store callers.
1489 * ubsan.cc: Include target.h and langhooks.h.
1490 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
1491 size converted to pointer sized integer, pass BITINT_TYPE values
1492 which fit into TImode (if supported) or DImode as those integer types
1493 or otherwise for now punt (pass 0).
1494 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
1495 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
1496 TImode/DImode precision rather than TK_Unknown used otherwise for
1497 large/huge BITINT_TYPEs.
1498 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
1499 they don't have mode precision.
1500 * ubsan.h (enum ubsan_print_style): New enumerator.
1502 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1505 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
1506 (ix86_bitint_type_info): New function.
1507 (TARGET_C_BITINT_TYPE_INFO): Redefine.
1509 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1512 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
1513 * passes.def: Add pass_lower_bitint after pass_lower_complex and
1514 pass_lower_bitint_O0 after pass_lower_complex_O0.
1515 * tree-pass.h (PROP_gimple_lbitint): Define.
1516 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
1517 * gimple-lower-bitint.h: New file.
1518 * tree-ssa-live.h (struct _var_map): Add bitint member.
1519 (init_var_map): Adjust declaration.
1520 (region_contains_p): Handle map->bitint like map->outofssa_p.
1521 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
1522 map->bitint and set map->outofssa_p to false if it is non-NULL.
1523 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
1524 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
1526 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
1527 not in that bitmap, and allow res without default def.
1528 (compute_optimized_partition_bases): In map->bitint mode try hard to
1529 coalesce any SSA_NAMEs with the same size.
1530 (coalesce_bitint): New function.
1531 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
1532 used_in_copies and call coalesce_bitint.
1533 * gimple-lower-bitint.cc: New file.
1535 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1538 * tree.def (BITINT_TYPE): New type.
1539 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
1540 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
1542 (BITINT_TYPE_P): Define.
1543 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
1544 they have BITINT_TYPE type.
1545 (tree_check6, tree_not_check6): New inline functions.
1546 (any_integral_type_check): Include BITINT_TYPE.
1547 (build_bitint_type): Declare.
1548 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
1549 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
1550 type_hash_canon): Handle BITINT_TYPE.
1551 (bitint_type_cache): New variable.
1552 (build_bitint_type): New function.
1553 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
1555 (tree_cc_finalize): Free bitint_type_cache.
1556 * builtins.cc (type_to_class): Handle BITINT_TYPE.
1557 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
1558 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
1560 * convert.cc (convert_to_pointer_1, convert_to_real_1,
1561 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
1562 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
1563 GET_MODE_PRECISION (TYPE_MODE (type)).
1564 * doc/generic.texi (BITINT_TYPE): Document.
1565 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
1566 * doc/tm.texi: Regenerated.
1567 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
1568 gen_type_die_with_usage): Handle BITINT_TYPE.
1569 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
1570 handle those which fit into shwi.
1571 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
1572 to bitfield precision reads from BITINT_TYPE vars, parameters or
1573 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
1575 * fold-const.cc (fold_convert_loc, make_range_step): Handle
1577 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
1578 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
1579 (native_encode_int, native_interpret_int, native_interpret_expr):
1581 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
1582 to some other integral type or vice versa conversions non-useless.
1583 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
1584 (clear_padding_unit): Mention in comment that _BitInt types don't need
1586 (clear_padding_bitint_needs_padding_p): New function.
1587 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
1588 (clear_padding_type): Likewise.
1589 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
1590 precision operands force pos_neg? to 1.
1591 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
1592 expand_BITINTTOFLOAT): New functions.
1593 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
1594 BITINTTOFLOAT): New internal functions.
1595 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
1596 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
1597 * match.pd (non-equality compare simplifications from fold_binary):
1598 Punt if TYPE_MODE (arg1_type) is BLKmode.
1599 * pretty-print.h (pp_wide_int): Handle printing of large precision
1600 wide_ints which would buffer overflow digit_buffer.
1601 * stor-layout.cc (finish_bitfield_representative): For bit-fields
1602 with BITINT_TYPE, prefer representatives with precisions in
1603 multiple of limb precision.
1604 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
1605 element type and assert it is BITINT_TYPE.
1606 * target.def (bitint_type_info): New C target hook.
1607 * target.h (struct bitint_info): New type.
1608 * targhooks.cc (default_bitint_type_info): New function.
1609 * targhooks.h (default_bitint_type_info): Declare.
1610 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
1611 Handle printing large wide_ints which would buffer overflow
1613 * tree-ssa-sccvn.cc: Include target.h.
1614 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
1616 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
1617 64-bit BITINT_TYPE subtract low bound from expression and cast to
1618 64-bit integer type both the controlling expression and case labels.
1619 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
1620 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
1621 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
1623 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
1624 unsigned_type_for rather than build_nonstandard_integer_type.
1626 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1629 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
1630 tieable for RVV modes.
1632 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1635 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
1637 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1639 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
1641 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
1643 * config/xtensa/xtensa.cc (xtensa_expand_scc):
1644 Add code for particular constants (only 0 and INT_MIN for now)
1645 for EQ/NE boolean evaluation in SImode.
1646 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
1647 implementation has been integrated into the above.
1649 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
1652 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
1654 (*pred_widen_mulsu<mode>): Delete.
1655 (*pred_single_widen_mul<mode>): Delete.
1656 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
1657 Add new combine patterns.
1658 (*single_widen_sub<any_extend:su><mode>): Ditto.
1659 (*single_widen_add<any_extend:su><mode>): Ditto.
1660 (*single_widen_mult<any_extend:su><mode>): Ditto.
1661 (*dual_widen_mulsu<mode>): Ditto.
1662 (*dual_widen_mulus<mode>): Ditto.
1663 (*dual_widen_<optab><mode>): Ditto.
1664 (*single_widen_add<mode>): Ditto.
1665 (*single_widen_sub<mode>): Ditto.
1666 (*single_widen_mult<mode>): Ditto.
1667 * config/riscv/autovec.md (<optab><mode>3):
1668 Change define_expand to define_insn_and_split.
1669 (<optab><mode>2): Ditto.
1670 (abs<mode>2): Ditto.
1671 (smul<mode>3_highpart): Ditto.
1672 (umul<mode>3_highpart): Ditto.
1674 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
1676 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
1677 (riscv_asm_output_alias): Ditto.
1678 (riscv_asm_output_external): Ditto.
1679 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
1680 Output .variant_cc directive for vector function.
1681 (riscv_declare_function_name): Ditto.
1682 (riscv_asm_output_alias): Ditto.
1683 (riscv_asm_output_external): Ditto.
1684 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
1685 Implement ASM_DECLARE_FUNCTION_NAME.
1686 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
1687 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
1689 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
1691 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
1692 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
1693 (riscv_frame_info::reset): Reset new fileds.
1694 (riscv_call_tls_get_addr): Pass riscv_cc.
1695 (riscv_function_arg): Return riscv_cc for call patterm.
1696 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
1697 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
1698 (riscv_save_reg_p): Add vector callee-saved check.
1699 (riscv_stack_align): Add vector save area comment.
1700 (riscv_compute_frame_info): Ditto.
1701 (riscv_restore_reg): Update for type change.
1702 (riscv_for_each_saved_v_reg): New function save vector registers.
1703 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
1704 (riscv_expand_prologue): Ditto.
1705 (riscv_expand_epilogue): Ditto.
1706 (riscv_output_mi_thunk): Pass riscv_cc.
1707 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
1708 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
1709 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
1711 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
1713 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
1714 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
1715 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
1716 (riscv_init_cumulative_args): Setup variant_cc field.
1717 (riscv_vector_type_p): New function for checking vector type.
1718 (riscv_hard_regno_nregs): Hoist declare.
1719 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
1720 (riscv_get_arg_info): Support vector cc.
1721 (riscv_function_arg_advance): Update cum.
1722 (riscv_pass_by_reference): Handle vector args.
1723 (riscv_v_abi): New function return vector abi.
1724 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
1725 (riscv_arguments_is_vector_type_p): New function for check vector returns.
1726 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
1727 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
1728 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
1729 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
1730 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
1731 (V_ARG_FIRST): Ditto.
1732 (V_ARG_LAST): Ditto.
1733 (enum riscv_cc): Define all RISCV_CC variants.
1734 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
1736 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
1738 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
1739 Add sqrt + vcond_mask combine pattern.
1740 * config/riscv/autovec.md (<optab><mode>2):
1741 Change define_expand to define_insn_and_split.
1743 2023-09-06 Jason Merrill <jason@redhat.com>
1745 * common.opt: Update -fabi-version=19.
1747 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
1749 * config/riscv/zicond.md: Add closing parent to a comment.
1751 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
1753 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
1754 large constant cons/alt into a register.
1756 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
1758 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
1759 require one zero bit in the upper 32 bits for LI+RORI synthesis.
1761 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
1763 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
1765 2023-09-05 Andrew Pinski <apinski@marvell.com>
1767 PR tree-optimization/98710
1768 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
1769 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
1771 2023-09-05 Andrew Pinski <apinski@marvell.com>
1773 PR tree-optimization/103536
1774 * match.pd (`(x | y) & (x & z)`,
1775 `(x & y) | (x | z)`): New patterns.
1777 2023-09-05 Andrew Pinski <apinski@marvell.com>
1779 PR tree-optimization/107137
1780 * match.pd (`(nop_convert)-(convert)a`): New pattern.
1782 2023-09-05 Andrew Pinski <apinski@marvell.com>
1784 PR tree-optimization/96694
1785 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
1787 2023-09-05 Andrew Pinski <apinski@marvell.com>
1789 PR tree-optimization/105832
1790 * match.pd (`(1 >> X) != 0`): New pattern
1792 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
1794 * config/riscv/riscv.md: Update/Add types
1796 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
1798 * config/riscv/pic.md: Update types
1800 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
1802 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
1803 synthesis with rotate-right for XTheadBb.
1805 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
1807 * config/riscv/zicond.md: Fix op2 pattern.
1809 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
1811 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
1813 2023-09-05 Xi Ruoyao <xry111@xry111.site>
1815 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
1816 Define to 0 if not defined yet.
1818 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
1820 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
1821 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
1823 2023-09-05 Pan Li <pan2.li@intel.com>
1825 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
1826 * config/riscv/vector.md: Extend iterator for VLS.
1828 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
1830 * config.gcc: Export the header file lasxintrin.h.
1831 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
1832 Add Loongson ASX builtin functions support.
1834 (LASX_BUILTIN): Ditto.
1835 (LASX_NO_TARGET_BUILTIN): Ditto.
1836 (LASX_BUILTIN_TEST_BRANCH): Ditto.
1837 (CODE_FOR_lasx_xvsadd_b): Ditto.
1838 (CODE_FOR_lasx_xvsadd_h): Ditto.
1839 (CODE_FOR_lasx_xvsadd_w): Ditto.
1840 (CODE_FOR_lasx_xvsadd_d): Ditto.
1841 (CODE_FOR_lasx_xvsadd_bu): Ditto.
1842 (CODE_FOR_lasx_xvsadd_hu): Ditto.
1843 (CODE_FOR_lasx_xvsadd_wu): Ditto.
1844 (CODE_FOR_lasx_xvsadd_du): Ditto.
1845 (CODE_FOR_lasx_xvadd_b): Ditto.
1846 (CODE_FOR_lasx_xvadd_h): Ditto.
1847 (CODE_FOR_lasx_xvadd_w): Ditto.
1848 (CODE_FOR_lasx_xvadd_d): Ditto.
1849 (CODE_FOR_lasx_xvaddi_bu): Ditto.
1850 (CODE_FOR_lasx_xvaddi_hu): Ditto.
1851 (CODE_FOR_lasx_xvaddi_wu): Ditto.
1852 (CODE_FOR_lasx_xvaddi_du): Ditto.
1853 (CODE_FOR_lasx_xvand_v): Ditto.
1854 (CODE_FOR_lasx_xvandi_b): Ditto.
1855 (CODE_FOR_lasx_xvbitsel_v): Ditto.
1856 (CODE_FOR_lasx_xvseqi_b): Ditto.
1857 (CODE_FOR_lasx_xvseqi_h): Ditto.
1858 (CODE_FOR_lasx_xvseqi_w): Ditto.
1859 (CODE_FOR_lasx_xvseqi_d): Ditto.
1860 (CODE_FOR_lasx_xvslti_b): Ditto.
1861 (CODE_FOR_lasx_xvslti_h): Ditto.
1862 (CODE_FOR_lasx_xvslti_w): Ditto.
1863 (CODE_FOR_lasx_xvslti_d): Ditto.
1864 (CODE_FOR_lasx_xvslti_bu): Ditto.
1865 (CODE_FOR_lasx_xvslti_hu): Ditto.
1866 (CODE_FOR_lasx_xvslti_wu): Ditto.
1867 (CODE_FOR_lasx_xvslti_du): Ditto.
1868 (CODE_FOR_lasx_xvslei_b): Ditto.
1869 (CODE_FOR_lasx_xvslei_h): Ditto.
1870 (CODE_FOR_lasx_xvslei_w): Ditto.
1871 (CODE_FOR_lasx_xvslei_d): Ditto.
1872 (CODE_FOR_lasx_xvslei_bu): Ditto.
1873 (CODE_FOR_lasx_xvslei_hu): Ditto.
1874 (CODE_FOR_lasx_xvslei_wu): Ditto.
1875 (CODE_FOR_lasx_xvslei_du): Ditto.
1876 (CODE_FOR_lasx_xvdiv_b): Ditto.
1877 (CODE_FOR_lasx_xvdiv_h): Ditto.
1878 (CODE_FOR_lasx_xvdiv_w): Ditto.
1879 (CODE_FOR_lasx_xvdiv_d): Ditto.
1880 (CODE_FOR_lasx_xvdiv_bu): Ditto.
1881 (CODE_FOR_lasx_xvdiv_hu): Ditto.
1882 (CODE_FOR_lasx_xvdiv_wu): Ditto.
1883 (CODE_FOR_lasx_xvdiv_du): Ditto.
1884 (CODE_FOR_lasx_xvfadd_s): Ditto.
1885 (CODE_FOR_lasx_xvfadd_d): Ditto.
1886 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
1887 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
1888 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
1889 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
1890 (CODE_FOR_lasx_xvffint_s_w): Ditto.
1891 (CODE_FOR_lasx_xvffint_d_l): Ditto.
1892 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
1893 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
1894 (CODE_FOR_lasx_xvfsub_s): Ditto.
1895 (CODE_FOR_lasx_xvfsub_d): Ditto.
1896 (CODE_FOR_lasx_xvfmul_s): Ditto.
1897 (CODE_FOR_lasx_xvfmul_d): Ditto.
1898 (CODE_FOR_lasx_xvfdiv_s): Ditto.
1899 (CODE_FOR_lasx_xvfdiv_d): Ditto.
1900 (CODE_FOR_lasx_xvfmax_s): Ditto.
1901 (CODE_FOR_lasx_xvfmax_d): Ditto.
1902 (CODE_FOR_lasx_xvfmin_s): Ditto.
1903 (CODE_FOR_lasx_xvfmin_d): Ditto.
1904 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
1905 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
1906 (CODE_FOR_lasx_xvflogb_s): Ditto.
1907 (CODE_FOR_lasx_xvflogb_d): Ditto.
1908 (CODE_FOR_lasx_xvmax_b): Ditto.
1909 (CODE_FOR_lasx_xvmax_h): Ditto.
1910 (CODE_FOR_lasx_xvmax_w): Ditto.
1911 (CODE_FOR_lasx_xvmax_d): Ditto.
1912 (CODE_FOR_lasx_xvmaxi_b): Ditto.
1913 (CODE_FOR_lasx_xvmaxi_h): Ditto.
1914 (CODE_FOR_lasx_xvmaxi_w): Ditto.
1915 (CODE_FOR_lasx_xvmaxi_d): Ditto.
1916 (CODE_FOR_lasx_xvmax_bu): Ditto.
1917 (CODE_FOR_lasx_xvmax_hu): Ditto.
1918 (CODE_FOR_lasx_xvmax_wu): Ditto.
1919 (CODE_FOR_lasx_xvmax_du): Ditto.
1920 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
1921 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
1922 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
1923 (CODE_FOR_lasx_xvmaxi_du): Ditto.
1924 (CODE_FOR_lasx_xvmin_b): Ditto.
1925 (CODE_FOR_lasx_xvmin_h): Ditto.
1926 (CODE_FOR_lasx_xvmin_w): Ditto.
1927 (CODE_FOR_lasx_xvmin_d): Ditto.
1928 (CODE_FOR_lasx_xvmini_b): Ditto.
1929 (CODE_FOR_lasx_xvmini_h): Ditto.
1930 (CODE_FOR_lasx_xvmini_w): Ditto.
1931 (CODE_FOR_lasx_xvmini_d): Ditto.
1932 (CODE_FOR_lasx_xvmin_bu): Ditto.
1933 (CODE_FOR_lasx_xvmin_hu): Ditto.
1934 (CODE_FOR_lasx_xvmin_wu): Ditto.
1935 (CODE_FOR_lasx_xvmin_du): Ditto.
1936 (CODE_FOR_lasx_xvmini_bu): Ditto.
1937 (CODE_FOR_lasx_xvmini_hu): Ditto.
1938 (CODE_FOR_lasx_xvmini_wu): Ditto.
1939 (CODE_FOR_lasx_xvmini_du): Ditto.
1940 (CODE_FOR_lasx_xvmod_b): Ditto.
1941 (CODE_FOR_lasx_xvmod_h): Ditto.
1942 (CODE_FOR_lasx_xvmod_w): Ditto.
1943 (CODE_FOR_lasx_xvmod_d): Ditto.
1944 (CODE_FOR_lasx_xvmod_bu): Ditto.
1945 (CODE_FOR_lasx_xvmod_hu): Ditto.
1946 (CODE_FOR_lasx_xvmod_wu): Ditto.
1947 (CODE_FOR_lasx_xvmod_du): Ditto.
1948 (CODE_FOR_lasx_xvmul_b): Ditto.
1949 (CODE_FOR_lasx_xvmul_h): Ditto.
1950 (CODE_FOR_lasx_xvmul_w): Ditto.
1951 (CODE_FOR_lasx_xvmul_d): Ditto.
1952 (CODE_FOR_lasx_xvclz_b): Ditto.
1953 (CODE_FOR_lasx_xvclz_h): Ditto.
1954 (CODE_FOR_lasx_xvclz_w): Ditto.
1955 (CODE_FOR_lasx_xvclz_d): Ditto.
1956 (CODE_FOR_lasx_xvnor_v): Ditto.
1957 (CODE_FOR_lasx_xvor_v): Ditto.
1958 (CODE_FOR_lasx_xvori_b): Ditto.
1959 (CODE_FOR_lasx_xvnori_b): Ditto.
1960 (CODE_FOR_lasx_xvpcnt_b): Ditto.
1961 (CODE_FOR_lasx_xvpcnt_h): Ditto.
1962 (CODE_FOR_lasx_xvpcnt_w): Ditto.
1963 (CODE_FOR_lasx_xvpcnt_d): Ditto.
1964 (CODE_FOR_lasx_xvxor_v): Ditto.
1965 (CODE_FOR_lasx_xvxori_b): Ditto.
1966 (CODE_FOR_lasx_xvsll_b): Ditto.
1967 (CODE_FOR_lasx_xvsll_h): Ditto.
1968 (CODE_FOR_lasx_xvsll_w): Ditto.
1969 (CODE_FOR_lasx_xvsll_d): Ditto.
1970 (CODE_FOR_lasx_xvslli_b): Ditto.
1971 (CODE_FOR_lasx_xvslli_h): Ditto.
1972 (CODE_FOR_lasx_xvslli_w): Ditto.
1973 (CODE_FOR_lasx_xvslli_d): Ditto.
1974 (CODE_FOR_lasx_xvsra_b): Ditto.
1975 (CODE_FOR_lasx_xvsra_h): Ditto.
1976 (CODE_FOR_lasx_xvsra_w): Ditto.
1977 (CODE_FOR_lasx_xvsra_d): Ditto.
1978 (CODE_FOR_lasx_xvsrai_b): Ditto.
1979 (CODE_FOR_lasx_xvsrai_h): Ditto.
1980 (CODE_FOR_lasx_xvsrai_w): Ditto.
1981 (CODE_FOR_lasx_xvsrai_d): Ditto.
1982 (CODE_FOR_lasx_xvsrl_b): Ditto.
1983 (CODE_FOR_lasx_xvsrl_h): Ditto.
1984 (CODE_FOR_lasx_xvsrl_w): Ditto.
1985 (CODE_FOR_lasx_xvsrl_d): Ditto.
1986 (CODE_FOR_lasx_xvsrli_b): Ditto.
1987 (CODE_FOR_lasx_xvsrli_h): Ditto.
1988 (CODE_FOR_lasx_xvsrli_w): Ditto.
1989 (CODE_FOR_lasx_xvsrli_d): Ditto.
1990 (CODE_FOR_lasx_xvsub_b): Ditto.
1991 (CODE_FOR_lasx_xvsub_h): Ditto.
1992 (CODE_FOR_lasx_xvsub_w): Ditto.
1993 (CODE_FOR_lasx_xvsub_d): Ditto.
1994 (CODE_FOR_lasx_xvsubi_bu): Ditto.
1995 (CODE_FOR_lasx_xvsubi_hu): Ditto.
1996 (CODE_FOR_lasx_xvsubi_wu): Ditto.
1997 (CODE_FOR_lasx_xvsubi_du): Ditto.
1998 (CODE_FOR_lasx_xvpackod_d): Ditto.
1999 (CODE_FOR_lasx_xvpackev_d): Ditto.
2000 (CODE_FOR_lasx_xvpickod_d): Ditto.
2001 (CODE_FOR_lasx_xvpickev_d): Ditto.
2002 (CODE_FOR_lasx_xvrepli_b): Ditto.
2003 (CODE_FOR_lasx_xvrepli_h): Ditto.
2004 (CODE_FOR_lasx_xvrepli_w): Ditto.
2005 (CODE_FOR_lasx_xvrepli_d): Ditto.
2006 (CODE_FOR_lasx_xvandn_v): Ditto.
2007 (CODE_FOR_lasx_xvorn_v): Ditto.
2008 (CODE_FOR_lasx_xvneg_b): Ditto.
2009 (CODE_FOR_lasx_xvneg_h): Ditto.
2010 (CODE_FOR_lasx_xvneg_w): Ditto.
2011 (CODE_FOR_lasx_xvneg_d): Ditto.
2012 (CODE_FOR_lasx_xvbsrl_v): Ditto.
2013 (CODE_FOR_lasx_xvbsll_v): Ditto.
2014 (CODE_FOR_lasx_xvfmadd_s): Ditto.
2015 (CODE_FOR_lasx_xvfmadd_d): Ditto.
2016 (CODE_FOR_lasx_xvfmsub_s): Ditto.
2017 (CODE_FOR_lasx_xvfmsub_d): Ditto.
2018 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
2019 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
2020 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
2021 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
2022 (CODE_FOR_lasx_xvpermi_q): Ditto.
2023 (CODE_FOR_lasx_xvpermi_d): Ditto.
2024 (CODE_FOR_lasx_xbnz_v): Ditto.
2025 (CODE_FOR_lasx_xbz_v): Ditto.
2026 (CODE_FOR_lasx_xvssub_b): Ditto.
2027 (CODE_FOR_lasx_xvssub_h): Ditto.
2028 (CODE_FOR_lasx_xvssub_w): Ditto.
2029 (CODE_FOR_lasx_xvssub_d): Ditto.
2030 (CODE_FOR_lasx_xvssub_bu): Ditto.
2031 (CODE_FOR_lasx_xvssub_hu): Ditto.
2032 (CODE_FOR_lasx_xvssub_wu): Ditto.
2033 (CODE_FOR_lasx_xvssub_du): Ditto.
2034 (CODE_FOR_lasx_xvabsd_b): Ditto.
2035 (CODE_FOR_lasx_xvabsd_h): Ditto.
2036 (CODE_FOR_lasx_xvabsd_w): Ditto.
2037 (CODE_FOR_lasx_xvabsd_d): Ditto.
2038 (CODE_FOR_lasx_xvabsd_bu): Ditto.
2039 (CODE_FOR_lasx_xvabsd_hu): Ditto.
2040 (CODE_FOR_lasx_xvabsd_wu): Ditto.
2041 (CODE_FOR_lasx_xvabsd_du): Ditto.
2042 (CODE_FOR_lasx_xvavg_b): Ditto.
2043 (CODE_FOR_lasx_xvavg_h): Ditto.
2044 (CODE_FOR_lasx_xvavg_w): Ditto.
2045 (CODE_FOR_lasx_xvavg_d): Ditto.
2046 (CODE_FOR_lasx_xvavg_bu): Ditto.
2047 (CODE_FOR_lasx_xvavg_hu): Ditto.
2048 (CODE_FOR_lasx_xvavg_wu): Ditto.
2049 (CODE_FOR_lasx_xvavg_du): Ditto.
2050 (CODE_FOR_lasx_xvavgr_b): Ditto.
2051 (CODE_FOR_lasx_xvavgr_h): Ditto.
2052 (CODE_FOR_lasx_xvavgr_w): Ditto.
2053 (CODE_FOR_lasx_xvavgr_d): Ditto.
2054 (CODE_FOR_lasx_xvavgr_bu): Ditto.
2055 (CODE_FOR_lasx_xvavgr_hu): Ditto.
2056 (CODE_FOR_lasx_xvavgr_wu): Ditto.
2057 (CODE_FOR_lasx_xvavgr_du): Ditto.
2058 (CODE_FOR_lasx_xvmuh_b): Ditto.
2059 (CODE_FOR_lasx_xvmuh_h): Ditto.
2060 (CODE_FOR_lasx_xvmuh_w): Ditto.
2061 (CODE_FOR_lasx_xvmuh_d): Ditto.
2062 (CODE_FOR_lasx_xvmuh_bu): Ditto.
2063 (CODE_FOR_lasx_xvmuh_hu): Ditto.
2064 (CODE_FOR_lasx_xvmuh_wu): Ditto.
2065 (CODE_FOR_lasx_xvmuh_du): Ditto.
2066 (CODE_FOR_lasx_xvssran_b_h): Ditto.
2067 (CODE_FOR_lasx_xvssran_h_w): Ditto.
2068 (CODE_FOR_lasx_xvssran_w_d): Ditto.
2069 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
2070 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
2071 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
2072 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
2073 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
2074 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
2075 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
2076 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
2077 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
2078 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
2079 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
2080 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
2081 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
2082 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
2083 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
2084 (CODE_FOR_lasx_xvftint_w_s): Ditto.
2085 (CODE_FOR_lasx_xvftint_l_d): Ditto.
2086 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
2087 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
2088 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
2089 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
2090 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
2091 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
2092 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
2093 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
2094 (CODE_FOR_lasx_xvsat_b): Ditto.
2095 (CODE_FOR_lasx_xvsat_h): Ditto.
2096 (CODE_FOR_lasx_xvsat_w): Ditto.
2097 (CODE_FOR_lasx_xvsat_d): Ditto.
2098 (CODE_FOR_lasx_xvsat_bu): Ditto.
2099 (CODE_FOR_lasx_xvsat_hu): Ditto.
2100 (CODE_FOR_lasx_xvsat_wu): Ditto.
2101 (CODE_FOR_lasx_xvsat_du): Ditto.
2102 (loongarch_builtin_vectorized_function): Ditto.
2103 (loongarch_expand_builtin_insn): Ditto.
2104 (loongarch_expand_builtin): Ditto.
2105 * config/loongarch/loongarch-ftypes.def (1): Ditto.
2109 * config/loongarch/lasxintrin.h: New file.
2111 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2113 * config/loongarch/loongarch-modes.def
2114 (VECTOR_MODES): Add Loongson ASX instruction support.
2115 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
2116 (loongarch_split_256bit_move_p): Ditto.
2117 (loongarch_expand_vector_group_init): Ditto.
2118 (loongarch_expand_vec_perm_1): Ditto.
2119 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
2120 (loongarch_valid_offset_p): Ditto.
2121 (loongarch_address_insns): Ditto.
2122 (loongarch_const_insns): Ditto.
2123 (loongarch_legitimize_move): Ditto.
2124 (loongarch_builtin_vectorization_cost): Ditto.
2125 (loongarch_split_move_p): Ditto.
2126 (loongarch_split_move): Ditto.
2127 (loongarch_output_move_index_float): Ditto.
2128 (loongarch_split_256bit_move_p): Ditto.
2129 (loongarch_split_256bit_move): Ditto.
2130 (loongarch_output_move): Ditto.
2131 (loongarch_print_operand_reloc): Ditto.
2132 (loongarch_print_operand): Ditto.
2133 (loongarch_hard_regno_mode_ok_uncached): Ditto.
2134 (loongarch_hard_regno_nregs): Ditto.
2135 (loongarch_class_max_nregs): Ditto.
2136 (loongarch_can_change_mode_class): Ditto.
2137 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
2138 (loongarch_vector_mode_supported_p): Ditto.
2139 (loongarch_preferred_simd_mode): Ditto.
2140 (loongarch_autovectorize_vector_modes): Ditto.
2141 (loongarch_lsx_output_division): Ditto.
2142 (loongarch_expand_lsx_shuffle): Ditto.
2143 (loongarch_expand_vec_perm): Ditto.
2144 (loongarch_expand_vec_perm_interleave): Ditto.
2145 (loongarch_try_expand_lsx_vshuf_const): Ditto.
2146 (loongarch_expand_vec_perm_even_odd_1): Ditto.
2147 (loongarch_expand_vec_perm_even_odd): Ditto.
2148 (loongarch_expand_vec_perm_1): Ditto.
2149 (loongarch_expand_vec_perm_const_2): Ditto.
2150 (loongarch_is_quad_duplicate): Ditto.
2151 (loongarch_is_double_duplicate): Ditto.
2152 (loongarch_is_odd_extraction): Ditto.
2153 (loongarch_is_even_extraction): Ditto.
2154 (loongarch_is_extraction_permutation): Ditto.
2155 (loongarch_is_center_extraction): Ditto.
2156 (loongarch_is_reversing_permutation): Ditto.
2157 (loongarch_is_di_misalign_extract): Ditto.
2158 (loongarch_is_si_misalign_extract): Ditto.
2159 (loongarch_is_lasx_lowpart_interleave): Ditto.
2160 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
2161 (COMPARE_SELECTOR): Ditto.
2162 (loongarch_is_lasx_lowpart_extract): Ditto.
2163 (loongarch_is_lasx_highpart_interleave): Ditto.
2164 (loongarch_is_lasx_highpart_interleave_2): Ditto.
2165 (loongarch_is_elem_duplicate): Ditto.
2166 (loongarch_is_op_reverse_perm): Ditto.
2167 (loongarch_is_single_op_perm): Ditto.
2168 (loongarch_is_divisible_perm): Ditto.
2169 (loongarch_is_triple_stride_extract): Ditto.
2170 (loongarch_vectorize_vec_perm_const): Ditto.
2171 (loongarch_cpu_sched_reassociation_width): Ditto.
2172 (loongarch_expand_vector_extract): Ditto.
2173 (emit_reduc_half): Ditto.
2174 (loongarch_expand_vec_unpack): Ditto.
2175 (loongarch_expand_vector_group_init): Ditto.
2176 (loongarch_expand_vector_init): Ditto.
2177 (loongarch_expand_lsx_cmp): Ditto.
2178 (loongarch_builtin_support_vector_misalignment): Ditto.
2179 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
2180 (BITS_PER_LASX_REG): Ditto.
2181 (STRUCTURE_SIZE_BOUNDARY): Ditto.
2182 (LASX_REG_FIRST): Ditto.
2183 (LASX_REG_LAST): Ditto.
2184 (LASX_REG_NUM): Ditto.
2185 (LASX_REG_P): Ditto.
2186 (LASX_REG_RTX_P): Ditto.
2187 (LASX_SUPPORTED_MODE_P): Ditto.
2188 * config/loongarch/loongarch.md: Ditto.
2189 * config/loongarch/lasx.md: New file.
2191 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2193 * config.gcc: Export the header file lsxintrin.h.
2194 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
2195 (enum loongarch_builtin_type): Ditto.
2197 (LARCH_BUILTIN): Ditto.
2198 (LSX_BUILTIN): Ditto.
2199 (LSX_BUILTIN_TEST_BRANCH): Ditto.
2200 (LSX_NO_TARGET_BUILTIN): Ditto.
2201 (CODE_FOR_lsx_vsadd_b): Ditto.
2202 (CODE_FOR_lsx_vsadd_h): Ditto.
2203 (CODE_FOR_lsx_vsadd_w): Ditto.
2204 (CODE_FOR_lsx_vsadd_d): Ditto.
2205 (CODE_FOR_lsx_vsadd_bu): Ditto.
2206 (CODE_FOR_lsx_vsadd_hu): Ditto.
2207 (CODE_FOR_lsx_vsadd_wu): Ditto.
2208 (CODE_FOR_lsx_vsadd_du): Ditto.
2209 (CODE_FOR_lsx_vadd_b): Ditto.
2210 (CODE_FOR_lsx_vadd_h): Ditto.
2211 (CODE_FOR_lsx_vadd_w): Ditto.
2212 (CODE_FOR_lsx_vadd_d): Ditto.
2213 (CODE_FOR_lsx_vaddi_bu): Ditto.
2214 (CODE_FOR_lsx_vaddi_hu): Ditto.
2215 (CODE_FOR_lsx_vaddi_wu): Ditto.
2216 (CODE_FOR_lsx_vaddi_du): Ditto.
2217 (CODE_FOR_lsx_vand_v): Ditto.
2218 (CODE_FOR_lsx_vandi_b): Ditto.
2219 (CODE_FOR_lsx_bnz_v): Ditto.
2220 (CODE_FOR_lsx_bz_v): Ditto.
2221 (CODE_FOR_lsx_vbitsel_v): Ditto.
2222 (CODE_FOR_lsx_vseqi_b): Ditto.
2223 (CODE_FOR_lsx_vseqi_h): Ditto.
2224 (CODE_FOR_lsx_vseqi_w): Ditto.
2225 (CODE_FOR_lsx_vseqi_d): Ditto.
2226 (CODE_FOR_lsx_vslti_b): Ditto.
2227 (CODE_FOR_lsx_vslti_h): Ditto.
2228 (CODE_FOR_lsx_vslti_w): Ditto.
2229 (CODE_FOR_lsx_vslti_d): Ditto.
2230 (CODE_FOR_lsx_vslti_bu): Ditto.
2231 (CODE_FOR_lsx_vslti_hu): Ditto.
2232 (CODE_FOR_lsx_vslti_wu): Ditto.
2233 (CODE_FOR_lsx_vslti_du): Ditto.
2234 (CODE_FOR_lsx_vslei_b): Ditto.
2235 (CODE_FOR_lsx_vslei_h): Ditto.
2236 (CODE_FOR_lsx_vslei_w): Ditto.
2237 (CODE_FOR_lsx_vslei_d): Ditto.
2238 (CODE_FOR_lsx_vslei_bu): Ditto.
2239 (CODE_FOR_lsx_vslei_hu): Ditto.
2240 (CODE_FOR_lsx_vslei_wu): Ditto.
2241 (CODE_FOR_lsx_vslei_du): Ditto.
2242 (CODE_FOR_lsx_vdiv_b): Ditto.
2243 (CODE_FOR_lsx_vdiv_h): Ditto.
2244 (CODE_FOR_lsx_vdiv_w): Ditto.
2245 (CODE_FOR_lsx_vdiv_d): Ditto.
2246 (CODE_FOR_lsx_vdiv_bu): Ditto.
2247 (CODE_FOR_lsx_vdiv_hu): Ditto.
2248 (CODE_FOR_lsx_vdiv_wu): Ditto.
2249 (CODE_FOR_lsx_vdiv_du): Ditto.
2250 (CODE_FOR_lsx_vfadd_s): Ditto.
2251 (CODE_FOR_lsx_vfadd_d): Ditto.
2252 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
2253 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
2254 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
2255 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
2256 (CODE_FOR_lsx_vffint_s_w): Ditto.
2257 (CODE_FOR_lsx_vffint_d_l): Ditto.
2258 (CODE_FOR_lsx_vffint_s_wu): Ditto.
2259 (CODE_FOR_lsx_vffint_d_lu): Ditto.
2260 (CODE_FOR_lsx_vfsub_s): Ditto.
2261 (CODE_FOR_lsx_vfsub_d): Ditto.
2262 (CODE_FOR_lsx_vfmul_s): Ditto.
2263 (CODE_FOR_lsx_vfmul_d): Ditto.
2264 (CODE_FOR_lsx_vfdiv_s): Ditto.
2265 (CODE_FOR_lsx_vfdiv_d): Ditto.
2266 (CODE_FOR_lsx_vfmax_s): Ditto.
2267 (CODE_FOR_lsx_vfmax_d): Ditto.
2268 (CODE_FOR_lsx_vfmin_s): Ditto.
2269 (CODE_FOR_lsx_vfmin_d): Ditto.
2270 (CODE_FOR_lsx_vfsqrt_s): Ditto.
2271 (CODE_FOR_lsx_vfsqrt_d): Ditto.
2272 (CODE_FOR_lsx_vflogb_s): Ditto.
2273 (CODE_FOR_lsx_vflogb_d): Ditto.
2274 (CODE_FOR_lsx_vmax_b): Ditto.
2275 (CODE_FOR_lsx_vmax_h): Ditto.
2276 (CODE_FOR_lsx_vmax_w): Ditto.
2277 (CODE_FOR_lsx_vmax_d): Ditto.
2278 (CODE_FOR_lsx_vmaxi_b): Ditto.
2279 (CODE_FOR_lsx_vmaxi_h): Ditto.
2280 (CODE_FOR_lsx_vmaxi_w): Ditto.
2281 (CODE_FOR_lsx_vmaxi_d): Ditto.
2282 (CODE_FOR_lsx_vmax_bu): Ditto.
2283 (CODE_FOR_lsx_vmax_hu): Ditto.
2284 (CODE_FOR_lsx_vmax_wu): Ditto.
2285 (CODE_FOR_lsx_vmax_du): Ditto.
2286 (CODE_FOR_lsx_vmaxi_bu): Ditto.
2287 (CODE_FOR_lsx_vmaxi_hu): Ditto.
2288 (CODE_FOR_lsx_vmaxi_wu): Ditto.
2289 (CODE_FOR_lsx_vmaxi_du): Ditto.
2290 (CODE_FOR_lsx_vmin_b): Ditto.
2291 (CODE_FOR_lsx_vmin_h): Ditto.
2292 (CODE_FOR_lsx_vmin_w): Ditto.
2293 (CODE_FOR_lsx_vmin_d): Ditto.
2294 (CODE_FOR_lsx_vmini_b): Ditto.
2295 (CODE_FOR_lsx_vmini_h): Ditto.
2296 (CODE_FOR_lsx_vmini_w): Ditto.
2297 (CODE_FOR_lsx_vmini_d): Ditto.
2298 (CODE_FOR_lsx_vmin_bu): Ditto.
2299 (CODE_FOR_lsx_vmin_hu): Ditto.
2300 (CODE_FOR_lsx_vmin_wu): Ditto.
2301 (CODE_FOR_lsx_vmin_du): Ditto.
2302 (CODE_FOR_lsx_vmini_bu): Ditto.
2303 (CODE_FOR_lsx_vmini_hu): Ditto.
2304 (CODE_FOR_lsx_vmini_wu): Ditto.
2305 (CODE_FOR_lsx_vmini_du): Ditto.
2306 (CODE_FOR_lsx_vmod_b): Ditto.
2307 (CODE_FOR_lsx_vmod_h): Ditto.
2308 (CODE_FOR_lsx_vmod_w): Ditto.
2309 (CODE_FOR_lsx_vmod_d): Ditto.
2310 (CODE_FOR_lsx_vmod_bu): Ditto.
2311 (CODE_FOR_lsx_vmod_hu): Ditto.
2312 (CODE_FOR_lsx_vmod_wu): Ditto.
2313 (CODE_FOR_lsx_vmod_du): Ditto.
2314 (CODE_FOR_lsx_vmul_b): Ditto.
2315 (CODE_FOR_lsx_vmul_h): Ditto.
2316 (CODE_FOR_lsx_vmul_w): Ditto.
2317 (CODE_FOR_lsx_vmul_d): Ditto.
2318 (CODE_FOR_lsx_vclz_b): Ditto.
2319 (CODE_FOR_lsx_vclz_h): Ditto.
2320 (CODE_FOR_lsx_vclz_w): Ditto.
2321 (CODE_FOR_lsx_vclz_d): Ditto.
2322 (CODE_FOR_lsx_vnor_v): Ditto.
2323 (CODE_FOR_lsx_vor_v): Ditto.
2324 (CODE_FOR_lsx_vori_b): Ditto.
2325 (CODE_FOR_lsx_vnori_b): Ditto.
2326 (CODE_FOR_lsx_vpcnt_b): Ditto.
2327 (CODE_FOR_lsx_vpcnt_h): Ditto.
2328 (CODE_FOR_lsx_vpcnt_w): Ditto.
2329 (CODE_FOR_lsx_vpcnt_d): Ditto.
2330 (CODE_FOR_lsx_vxor_v): Ditto.
2331 (CODE_FOR_lsx_vxori_b): Ditto.
2332 (CODE_FOR_lsx_vsll_b): Ditto.
2333 (CODE_FOR_lsx_vsll_h): Ditto.
2334 (CODE_FOR_lsx_vsll_w): Ditto.
2335 (CODE_FOR_lsx_vsll_d): Ditto.
2336 (CODE_FOR_lsx_vslli_b): Ditto.
2337 (CODE_FOR_lsx_vslli_h): Ditto.
2338 (CODE_FOR_lsx_vslli_w): Ditto.
2339 (CODE_FOR_lsx_vslli_d): Ditto.
2340 (CODE_FOR_lsx_vsra_b): Ditto.
2341 (CODE_FOR_lsx_vsra_h): Ditto.
2342 (CODE_FOR_lsx_vsra_w): Ditto.
2343 (CODE_FOR_lsx_vsra_d): Ditto.
2344 (CODE_FOR_lsx_vsrai_b): Ditto.
2345 (CODE_FOR_lsx_vsrai_h): Ditto.
2346 (CODE_FOR_lsx_vsrai_w): Ditto.
2347 (CODE_FOR_lsx_vsrai_d): Ditto.
2348 (CODE_FOR_lsx_vsrl_b): Ditto.
2349 (CODE_FOR_lsx_vsrl_h): Ditto.
2350 (CODE_FOR_lsx_vsrl_w): Ditto.
2351 (CODE_FOR_lsx_vsrl_d): Ditto.
2352 (CODE_FOR_lsx_vsrli_b): Ditto.
2353 (CODE_FOR_lsx_vsrli_h): Ditto.
2354 (CODE_FOR_lsx_vsrli_w): Ditto.
2355 (CODE_FOR_lsx_vsrli_d): Ditto.
2356 (CODE_FOR_lsx_vsub_b): Ditto.
2357 (CODE_FOR_lsx_vsub_h): Ditto.
2358 (CODE_FOR_lsx_vsub_w): Ditto.
2359 (CODE_FOR_lsx_vsub_d): Ditto.
2360 (CODE_FOR_lsx_vsubi_bu): Ditto.
2361 (CODE_FOR_lsx_vsubi_hu): Ditto.
2362 (CODE_FOR_lsx_vsubi_wu): Ditto.
2363 (CODE_FOR_lsx_vsubi_du): Ditto.
2364 (CODE_FOR_lsx_vpackod_d): Ditto.
2365 (CODE_FOR_lsx_vpackev_d): Ditto.
2366 (CODE_FOR_lsx_vpickod_d): Ditto.
2367 (CODE_FOR_lsx_vpickev_d): Ditto.
2368 (CODE_FOR_lsx_vrepli_b): Ditto.
2369 (CODE_FOR_lsx_vrepli_h): Ditto.
2370 (CODE_FOR_lsx_vrepli_w): Ditto.
2371 (CODE_FOR_lsx_vrepli_d): Ditto.
2372 (CODE_FOR_lsx_vsat_b): Ditto.
2373 (CODE_FOR_lsx_vsat_h): Ditto.
2374 (CODE_FOR_lsx_vsat_w): Ditto.
2375 (CODE_FOR_lsx_vsat_d): Ditto.
2376 (CODE_FOR_lsx_vsat_bu): Ditto.
2377 (CODE_FOR_lsx_vsat_hu): Ditto.
2378 (CODE_FOR_lsx_vsat_wu): Ditto.
2379 (CODE_FOR_lsx_vsat_du): Ditto.
2380 (CODE_FOR_lsx_vavg_b): Ditto.
2381 (CODE_FOR_lsx_vavg_h): Ditto.
2382 (CODE_FOR_lsx_vavg_w): Ditto.
2383 (CODE_FOR_lsx_vavg_d): Ditto.
2384 (CODE_FOR_lsx_vavg_bu): Ditto.
2385 (CODE_FOR_lsx_vavg_hu): Ditto.
2386 (CODE_FOR_lsx_vavg_wu): Ditto.
2387 (CODE_FOR_lsx_vavg_du): Ditto.
2388 (CODE_FOR_lsx_vavgr_b): Ditto.
2389 (CODE_FOR_lsx_vavgr_h): Ditto.
2390 (CODE_FOR_lsx_vavgr_w): Ditto.
2391 (CODE_FOR_lsx_vavgr_d): Ditto.
2392 (CODE_FOR_lsx_vavgr_bu): Ditto.
2393 (CODE_FOR_lsx_vavgr_hu): Ditto.
2394 (CODE_FOR_lsx_vavgr_wu): Ditto.
2395 (CODE_FOR_lsx_vavgr_du): Ditto.
2396 (CODE_FOR_lsx_vssub_b): Ditto.
2397 (CODE_FOR_lsx_vssub_h): Ditto.
2398 (CODE_FOR_lsx_vssub_w): Ditto.
2399 (CODE_FOR_lsx_vssub_d): Ditto.
2400 (CODE_FOR_lsx_vssub_bu): Ditto.
2401 (CODE_FOR_lsx_vssub_hu): Ditto.
2402 (CODE_FOR_lsx_vssub_wu): Ditto.
2403 (CODE_FOR_lsx_vssub_du): Ditto.
2404 (CODE_FOR_lsx_vabsd_b): Ditto.
2405 (CODE_FOR_lsx_vabsd_h): Ditto.
2406 (CODE_FOR_lsx_vabsd_w): Ditto.
2407 (CODE_FOR_lsx_vabsd_d): Ditto.
2408 (CODE_FOR_lsx_vabsd_bu): Ditto.
2409 (CODE_FOR_lsx_vabsd_hu): Ditto.
2410 (CODE_FOR_lsx_vabsd_wu): Ditto.
2411 (CODE_FOR_lsx_vabsd_du): Ditto.
2412 (CODE_FOR_lsx_vftint_w_s): Ditto.
2413 (CODE_FOR_lsx_vftint_l_d): Ditto.
2414 (CODE_FOR_lsx_vftint_wu_s): Ditto.
2415 (CODE_FOR_lsx_vftint_lu_d): Ditto.
2416 (CODE_FOR_lsx_vandn_v): Ditto.
2417 (CODE_FOR_lsx_vorn_v): Ditto.
2418 (CODE_FOR_lsx_vneg_b): Ditto.
2419 (CODE_FOR_lsx_vneg_h): Ditto.
2420 (CODE_FOR_lsx_vneg_w): Ditto.
2421 (CODE_FOR_lsx_vneg_d): Ditto.
2422 (CODE_FOR_lsx_vshuf4i_d): Ditto.
2423 (CODE_FOR_lsx_vbsrl_v): Ditto.
2424 (CODE_FOR_lsx_vbsll_v): Ditto.
2425 (CODE_FOR_lsx_vfmadd_s): Ditto.
2426 (CODE_FOR_lsx_vfmadd_d): Ditto.
2427 (CODE_FOR_lsx_vfmsub_s): Ditto.
2428 (CODE_FOR_lsx_vfmsub_d): Ditto.
2429 (CODE_FOR_lsx_vfnmadd_s): Ditto.
2430 (CODE_FOR_lsx_vfnmadd_d): Ditto.
2431 (CODE_FOR_lsx_vfnmsub_s): Ditto.
2432 (CODE_FOR_lsx_vfnmsub_d): Ditto.
2433 (CODE_FOR_lsx_vmuh_b): Ditto.
2434 (CODE_FOR_lsx_vmuh_h): Ditto.
2435 (CODE_FOR_lsx_vmuh_w): Ditto.
2436 (CODE_FOR_lsx_vmuh_d): Ditto.
2437 (CODE_FOR_lsx_vmuh_bu): Ditto.
2438 (CODE_FOR_lsx_vmuh_hu): Ditto.
2439 (CODE_FOR_lsx_vmuh_wu): Ditto.
2440 (CODE_FOR_lsx_vmuh_du): Ditto.
2441 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
2442 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
2443 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
2444 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
2445 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
2446 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
2447 (CODE_FOR_lsx_vssran_b_h): Ditto.
2448 (CODE_FOR_lsx_vssran_h_w): Ditto.
2449 (CODE_FOR_lsx_vssran_w_d): Ditto.
2450 (CODE_FOR_lsx_vssran_bu_h): Ditto.
2451 (CODE_FOR_lsx_vssran_hu_w): Ditto.
2452 (CODE_FOR_lsx_vssran_wu_d): Ditto.
2453 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
2454 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
2455 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
2456 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
2457 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
2458 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
2459 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
2460 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
2461 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
2462 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
2463 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
2464 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
2465 (loongarch_builtin_vector_type): Ditto.
2466 (loongarch_build_cvpointer_type): Ditto.
2467 (LARCH_ATYPE_CVPOINTER): Ditto.
2468 (LARCH_ATYPE_BOOLEAN): Ditto.
2469 (LARCH_ATYPE_V2SF): Ditto.
2470 (LARCH_ATYPE_V2HI): Ditto.
2471 (LARCH_ATYPE_V2SI): Ditto.
2472 (LARCH_ATYPE_V4QI): Ditto.
2473 (LARCH_ATYPE_V4HI): Ditto.
2474 (LARCH_ATYPE_V8QI): Ditto.
2475 (LARCH_ATYPE_V2DI): Ditto.
2476 (LARCH_ATYPE_V4SI): Ditto.
2477 (LARCH_ATYPE_V8HI): Ditto.
2478 (LARCH_ATYPE_V16QI): Ditto.
2479 (LARCH_ATYPE_V2DF): Ditto.
2480 (LARCH_ATYPE_V4SF): Ditto.
2481 (LARCH_ATYPE_V4DI): Ditto.
2482 (LARCH_ATYPE_V8SI): Ditto.
2483 (LARCH_ATYPE_V16HI): Ditto.
2484 (LARCH_ATYPE_V32QI): Ditto.
2485 (LARCH_ATYPE_V4DF): Ditto.
2486 (LARCH_ATYPE_V8SF): Ditto.
2487 (LARCH_ATYPE_UV2DI): Ditto.
2488 (LARCH_ATYPE_UV4SI): Ditto.
2489 (LARCH_ATYPE_UV8HI): Ditto.
2490 (LARCH_ATYPE_UV16QI): Ditto.
2491 (LARCH_ATYPE_UV4DI): Ditto.
2492 (LARCH_ATYPE_UV8SI): Ditto.
2493 (LARCH_ATYPE_UV16HI): Ditto.
2494 (LARCH_ATYPE_UV32QI): Ditto.
2495 (LARCH_ATYPE_UV2SI): Ditto.
2496 (LARCH_ATYPE_UV4HI): Ditto.
2497 (LARCH_ATYPE_UV8QI): Ditto.
2498 (loongarch_builtin_vectorized_function): Ditto.
2499 (LARCH_GET_BUILTIN): Ditto.
2500 (loongarch_expand_builtin_insn): Ditto.
2501 (loongarch_expand_builtin_lsx_test_branch): Ditto.
2502 (loongarch_expand_builtin): Ditto.
2503 * config/loongarch/loongarch-ftypes.def (1): Ditto.
2507 * config/loongarch/lsxintrin.h: New file.
2509 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2511 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
2531 * config/loongarch/genopts/loongarch.opt.in: Ditto.
2532 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
2533 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
2534 (VECTOR_MODE): Ditto.
2536 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
2537 (loongarch_split_move_insn): Ditto.
2538 (loongarch_split_128bit_move): Ditto.
2539 (loongarch_split_128bit_move_p): Ditto.
2540 (loongarch_split_lsx_copy_d): Ditto.
2541 (loongarch_split_lsx_insert_d): Ditto.
2542 (loongarch_split_lsx_fill_d): Ditto.
2543 (loongarch_expand_vec_cmp): Ditto.
2544 (loongarch_const_vector_same_val_p): Ditto.
2545 (loongarch_const_vector_same_bytes_p): Ditto.
2546 (loongarch_const_vector_same_int_p): Ditto.
2547 (loongarch_const_vector_shuffle_set_p): Ditto.
2548 (loongarch_const_vector_bitimm_set_p): Ditto.
2549 (loongarch_const_vector_bitimm_clr_p): Ditto.
2550 (loongarch_lsx_vec_parallel_const_half): Ditto.
2551 (loongarch_gen_const_int_vector): Ditto.
2552 (loongarch_lsx_output_division): Ditto.
2553 (loongarch_expand_vector_init): Ditto.
2554 (loongarch_expand_vec_unpack): Ditto.
2555 (loongarch_expand_vec_perm): Ditto.
2556 (loongarch_expand_vector_extract): Ditto.
2557 (loongarch_expand_vector_reduc): Ditto.
2558 (loongarch_ldst_scaled_shift): Ditto.
2559 (loongarch_expand_vec_cond_expr): Ditto.
2560 (loongarch_expand_vec_cond_mask_expr): Ditto.
2561 (loongarch_builtin_vectorized_function): Ditto.
2562 (loongarch_gen_const_int_vector_shuffle): Ditto.
2563 (loongarch_build_signbit_mask): Ditto.
2564 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
2565 (loongarch_setup_incoming_varargs): Ditto.
2566 (loongarch_emit_move): Ditto.
2567 (loongarch_const_vector_bitimm_set_p): Ditto.
2568 (loongarch_const_vector_bitimm_clr_p): Ditto.
2569 (loongarch_const_vector_same_val_p): Ditto.
2570 (loongarch_const_vector_same_bytes_p): Ditto.
2571 (loongarch_const_vector_same_int_p): Ditto.
2572 (loongarch_const_vector_shuffle_set_p): Ditto.
2573 (loongarch_symbol_insns): Ditto.
2574 (loongarch_cannot_force_const_mem): Ditto.
2575 (loongarch_valid_offset_p): Ditto.
2576 (loongarch_valid_index_p): Ditto.
2577 (loongarch_classify_address): Ditto.
2578 (loongarch_address_insns): Ditto.
2579 (loongarch_ldst_scaled_shift): Ditto.
2580 (loongarch_const_insns): Ditto.
2581 (loongarch_split_move_insn_p): Ditto.
2582 (loongarch_subword_at_byte): Ditto.
2583 (loongarch_legitimize_move): Ditto.
2584 (loongarch_builtin_vectorization_cost): Ditto.
2585 (loongarch_split_move_p): Ditto.
2586 (loongarch_split_move): Ditto.
2587 (loongarch_split_move_insn): Ditto.
2588 (loongarch_output_move_index_float): Ditto.
2589 (loongarch_split_128bit_move_p): Ditto.
2590 (loongarch_split_128bit_move): Ditto.
2591 (loongarch_split_lsx_copy_d): Ditto.
2592 (loongarch_split_lsx_insert_d): Ditto.
2593 (loongarch_split_lsx_fill_d): Ditto.
2594 (loongarch_output_move): Ditto.
2595 (loongarch_extend_comparands): Ditto.
2596 (loongarch_print_operand_reloc): Ditto.
2597 (loongarch_print_operand): Ditto.
2598 (loongarch_hard_regno_mode_ok_uncached): Ditto.
2599 (loongarch_hard_regno_call_part_clobbered): Ditto.
2600 (loongarch_hard_regno_nregs): Ditto.
2601 (loongarch_class_max_nregs): Ditto.
2602 (loongarch_can_change_mode_class): Ditto.
2603 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
2604 (loongarch_secondary_reload): Ditto.
2605 (loongarch_vector_mode_supported_p): Ditto.
2606 (loongarch_preferred_simd_mode): Ditto.
2607 (loongarch_autovectorize_vector_modes): Ditto.
2608 (loongarch_lsx_output_division): Ditto.
2609 (loongarch_option_override_internal): Ditto.
2610 (loongarch_hard_regno_caller_save_mode): Ditto.
2611 (MAX_VECT_LEN): Ditto.
2612 (loongarch_spill_class): Ditto.
2613 (struct expand_vec_perm_d): Ditto.
2614 (loongarch_promote_function_mode): Ditto.
2615 (loongarch_expand_vselect): Ditto.
2616 (loongarch_starting_frame_offset): Ditto.
2617 (loongarch_expand_vselect_vconcat): Ditto.
2618 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
2619 (TARGET_OPTION_OVERRIDE): Ditto.
2620 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
2621 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
2622 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
2623 (loongarch_expand_lsx_shuffle): Ditto.
2624 (TARGET_SCHED_INIT): Ditto.
2625 (TARGET_SCHED_REORDER): Ditto.
2626 (TARGET_SCHED_REORDER2): Ditto.
2627 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
2628 (TARGET_SCHED_ADJUST_COST): Ditto.
2629 (TARGET_SCHED_ISSUE_RATE): Ditto.
2630 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
2631 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
2632 (TARGET_VALID_POINTER_MODE): Ditto.
2633 (TARGET_REGISTER_MOVE_COST): Ditto.
2634 (TARGET_MEMORY_MOVE_COST): Ditto.
2635 (TARGET_RTX_COSTS): Ditto.
2636 (TARGET_ADDRESS_COST): Ditto.
2637 (TARGET_IN_SMALL_DATA_P): Ditto.
2638 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
2639 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
2640 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
2641 (loongarch_expand_vec_perm): Ditto.
2642 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
2643 (TARGET_RETURN_IN_MEMORY): Ditto.
2644 (TARGET_FUNCTION_VALUE): Ditto.
2645 (TARGET_LIBCALL_VALUE): Ditto.
2646 (loongarch_try_expand_lsx_vshuf_const): Ditto.
2647 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
2648 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
2649 (TARGET_PRINT_OPERAND): Ditto.
2650 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
2651 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
2652 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
2653 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
2654 (TARGET_MUST_PASS_IN_STACK): Ditto.
2655 (TARGET_PASS_BY_REFERENCE): Ditto.
2656 (TARGET_ARG_PARTIAL_BYTES): Ditto.
2657 (TARGET_FUNCTION_ARG): Ditto.
2658 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
2659 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
2660 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
2661 (TARGET_INIT_BUILTINS): Ditto.
2662 (loongarch_expand_vec_perm_const_1): Ditto.
2663 (loongarch_expand_vec_perm_const_2): Ditto.
2664 (loongarch_vectorize_vec_perm_const): Ditto.
2665 (loongarch_cpu_sched_reassociation_width): Ditto.
2666 (loongarch_sched_reassociation_width): Ditto.
2667 (loongarch_expand_vector_extract): Ditto.
2668 (emit_reduc_half): Ditto.
2669 (loongarch_expand_vector_reduc): Ditto.
2670 (loongarch_expand_vec_unpack): Ditto.
2671 (loongarch_lsx_vec_parallel_const_half): Ditto.
2672 (loongarch_constant_elt_p): Ditto.
2673 (loongarch_gen_const_int_vector_shuffle): Ditto.
2674 (loongarch_expand_vector_init): Ditto.
2675 (loongarch_expand_lsx_cmp): Ditto.
2676 (loongarch_expand_vec_cond_expr): Ditto.
2677 (loongarch_expand_vec_cond_mask_expr): Ditto.
2678 (loongarch_expand_vec_cmp): Ditto.
2679 (loongarch_case_values_threshold): Ditto.
2680 (loongarch_build_const_vector): Ditto.
2681 (loongarch_build_signbit_mask): Ditto.
2682 (loongarch_builtin_support_vector_misalignment): Ditto.
2683 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
2684 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
2685 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
2686 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
2687 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
2688 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
2689 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
2690 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
2691 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
2692 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
2693 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
2694 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
2695 (UNITS_PER_LSX_REG): Ditto.
2696 (BITS_PER_LSX_REG): Ditto.
2697 (BIGGEST_ALIGNMENT): Ditto.
2698 (LSX_REG_FIRST): Ditto.
2699 (LSX_REG_LAST): Ditto.
2700 (LSX_REG_NUM): Ditto.
2702 (LSX_REG_RTX_P): Ditto.
2703 (IMM13_OPERAND): Ditto.
2704 (LSX_SUPPORTED_MODE_P): Ditto.
2705 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
2706 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
2707 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
2714 * config/loongarch/loongarch.opt: Ditto.
2715 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
2716 (const_uimm3_operand): Ditto.
2717 (const_8_to_11_operand): Ditto.
2718 (const_12_to_15_operand): Ditto.
2719 (const_uimm4_operand): Ditto.
2720 (const_uimm6_operand): Ditto.
2721 (const_uimm7_operand): Ditto.
2722 (const_uimm8_operand): Ditto.
2723 (const_imm5_operand): Ditto.
2724 (const_imm10_operand): Ditto.
2725 (const_imm13_operand): Ditto.
2726 (reg_imm10_operand): Ditto.
2727 (aq8b_operand): Ditto.
2728 (aq8h_operand): Ditto.
2729 (aq8w_operand): Ditto.
2730 (aq8d_operand): Ditto.
2731 (aq10b_operand): Ditto.
2732 (aq10h_operand): Ditto.
2733 (aq10w_operand): Ditto.
2734 (aq10d_operand): Ditto.
2735 (aq12b_operand): Ditto.
2736 (aq12h_operand): Ditto.
2737 (aq12w_operand): Ditto.
2738 (aq12d_operand): Ditto.
2739 (const_m1_operand): Ditto.
2740 (reg_or_m1_operand): Ditto.
2741 (const_exp_2_operand): Ditto.
2742 (const_exp_4_operand): Ditto.
2743 (const_exp_8_operand): Ditto.
2744 (const_exp_16_operand): Ditto.
2745 (const_exp_32_operand): Ditto.
2746 (const_0_or_1_operand): Ditto.
2747 (const_0_to_3_operand): Ditto.
2748 (const_0_to_7_operand): Ditto.
2749 (const_2_or_3_operand): Ditto.
2750 (const_4_to_7_operand): Ditto.
2751 (const_8_to_15_operand): Ditto.
2752 (const_16_to_31_operand): Ditto.
2753 (qi_mask_operand): Ditto.
2754 (hi_mask_operand): Ditto.
2755 (si_mask_operand): Ditto.
2757 (db4_operand): Ditto.
2758 (db7_operand): Ditto.
2759 (db8_operand): Ditto.
2760 (ib3_operand): Ditto.
2761 (sb4_operand): Ditto.
2762 (sb5_operand): Ditto.
2763 (sb8_operand): Ditto.
2764 (sd8_operand): Ditto.
2765 (ub4_operand): Ditto.
2766 (ub8_operand): Ditto.
2767 (uh4_operand): Ditto.
2768 (uw4_operand): Ditto.
2769 (uw5_operand): Ditto.
2770 (uw6_operand): Ditto.
2771 (uw8_operand): Ditto.
2772 (addiur2_operand): Ditto.
2773 (addiusp_operand): Ditto.
2774 (andi16_operand): Ditto.
2775 (movep_src_register): Ditto.
2776 (movep_src_operand): Ditto.
2777 (fcc_reload_operand): Ditto.
2778 (muldiv_target_operand): Ditto.
2779 (const_vector_same_val_operand): Ditto.
2780 (const_vector_same_simm5_operand): Ditto.
2781 (const_vector_same_uimm5_operand): Ditto.
2782 (const_vector_same_ximm5_operand): Ditto.
2783 (const_vector_same_uimm6_operand): Ditto.
2784 (par_const_vector_shf_set_operand): Ditto.
2785 (reg_or_vector_same_val_operand): Ditto.
2786 (reg_or_vector_same_simm5_operand): Ditto.
2787 (reg_or_vector_same_uimm5_operand): Ditto.
2788 (reg_or_vector_same_ximm5_operand): Ditto.
2789 (reg_or_vector_same_uimm6_operand): Ditto.
2790 * doc/md.texi: Ditto.
2791 * config/loongarch/lsx.md: New file.
2793 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2795 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
2796 (get_all_predecessors): New function.
2797 (get_all_successors): Ditto.
2798 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
2799 (get_all_successors): Ditto.
2800 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
2801 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
2803 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
2805 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
2806 (split_addsi): Likewise.
2807 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
2808 'N', 'x', and 'J' code letters.
2809 (arc_output_addsi): Make it static.
2810 (split_addsi): Remove it.
2811 * config/arc/arc.h (UNSIGNED_INT*): New defines.
2812 (SINNED_INT*): Likewise.
2813 * config/arc/arc.md (type): Add add, sub, bxor types.
2814 (tst_movb): Change code letter from 's' to 'x'.
2815 (andsi3_i): Likewise.
2816 (addsi3_mixed): Refurbish the pattern.
2817 (call_i): Change code letter from 'S' to 'J'.
2818 * config/arc/arc700.md: Add newly introduced types.
2819 * config/arc/arcHS.md: Likewsie.
2820 * config/arc/arcHS4x.md: Likewise.
2821 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
2822 (CM4): Update description.
2823 (CP4, C6u, C6n, CIs, C4p): New constraint.
2825 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
2827 * common/config/arc/arc-common.cc (arc_option_optimization_table):
2828 Remove mbbit_peephole.
2829 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
2830 (store_direct): Likewise.
2831 (BBIT peephole2): Likewise.
2832 * config/arc/arc.opt (mbbit-peephole): Ignore option.
2833 * doc/invoke.texi (mbbit-peephole): Update document.
2835 2023-09-05 Jakub Jelinek <jakub@redhat.com>
2837 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
2840 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
2842 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
2843 options passed from driver to gnat1 as explicit for multilib.
2845 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
2847 * config.gcc: add loongarch*-elf target.
2848 * config/loongarch/elf.h: New file.
2849 Link against newlib by default.
2851 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
2853 * config.gcc: use -mstrict-align for building libraries
2854 if --with-strict-align-lib is given.
2855 * doc/install.texi: likewise.
2857 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
2859 * config/loongarch/loongarch-c.cc: Export macros
2860 "__loongarch_{arch,tune}" in the preprocessor.
2862 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
2864 * config.gcc: Make --with-abi= obsolete, decide the default ABI
2865 with target triplet. Allow specifying multilib library build
2866 options with --with-multilib-list and --with-multilib-default.
2867 * config/loongarch/t-linux: Likewise.
2868 * config/loongarch/genopts/loongarch-strings: Likewise.
2869 * config/loongarch/loongarch-str.h: Likewise.
2870 * doc/install.texi: Likewise.
2871 * config/loongarch/genopts/loongarch.opt.in: Introduce
2872 -m[no-]l[a]sx options. Only process -m*-float and
2873 -m[no-]l[a]sx in the GCC driver.
2874 * config/loongarch/loongarch.opt: Likewise.
2875 * config/loongarch/la464.md: Likewise.
2876 * config/loongarch/loongarch-c.cc: Likewise.
2877 * config/loongarch/loongarch-cpu.cc: Likewise.
2878 * config/loongarch/loongarch-cpu.h: Likewise.
2879 * config/loongarch/loongarch-def.c: Likewise.
2880 * config/loongarch/loongarch-def.h: Likewise.
2881 * config/loongarch/loongarch-driver.cc: Likewise.
2882 * config/loongarch/loongarch-driver.h: Likewise.
2883 * config/loongarch/loongarch-opts.cc: Likewise.
2884 * config/loongarch/loongarch-opts.h: Likewise.
2885 * config/loongarch/loongarch.cc: Likewise.
2886 * doc/invoke.texi: Likewise.
2888 2023-09-05 liuhongt <hongtao.liu@intel.com>
2890 * config/i386/sse.md: (V8BFH_128): Renamed to ..
2891 (VHFBF_128): .. this.
2892 (V16BFH_256): Renamed to ..
2893 (VHFBF_256): .. this.
2894 (avx512f_mov<mode>): Extend to V_128.
2895 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
2896 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
2897 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
2898 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
2899 * config/i386/i386-expand.cc (expand_vec_perm_blend):
2900 Canonicalize vec_merge.
2902 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2904 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
2905 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
2906 (autovectorize_vector_modes): Ditto.
2907 (vectorize_related_mode): Ditto.
2909 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
2911 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
2912 all 32b Darwin PowerPC cases.
2914 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
2916 * config/darwin-sections.def (static_init_section): Add the
2917 __TEXT,__StaticInit section.
2918 * config/darwin.cc (darwin_function_section): Use the static init
2919 section for global initializers, to match other platform toolchains.
2921 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
2923 * config/darwin-sections.def (darwin_exception_section): Move to
2925 * config/darwin.cc (darwin_emit_except_table_label): Align before
2926 the exception table label.
2927 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
2928 relative 4byte relocs.
2930 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
2932 * config/darwin.cc (dump_machopic_symref_flags): New.
2933 (debug_machopic_symref_flags): New.
2935 2023-09-04 Pan Li <pan2.li@intel.com>
2937 * config/riscv/riscv-vector-builtins-types.def
2938 (vfloat16mf4_t): Add FP16 intrinsic def.
2939 (vfloat16mf2_t): Ditto.
2940 (vfloat16m1_t): Ditto.
2941 (vfloat16m2_t): Ditto.
2942 (vfloat16m4_t): Ditto.
2943 (vfloat16m8_t): Ditto.
2945 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
2947 PR tree-optimization/108757
2948 * match.pd ((X - N * M) / N): New pattern.
2949 ((X + N * M) / N): New pattern.
2950 ((X + C) div_rshift N): New pattern.
2952 2023-09-04 Guo Jie <guojie@loongson.cn>
2954 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
2955 movsf_hardfloat and movdf_hardfloat.
2957 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
2959 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
2960 In unsigned QImode test, check for sign extended subreg and/or
2961 constant operands, and do a sign extension in that case.
2962 * config/loongarch/loongarch.md (TARGET_64BIT): Define
2963 template cbranchqi4.
2965 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
2967 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
2968 from memory into floating-point registers.
2970 2023-09-03 Pan Li <pan2.li@intel.com>
2972 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
2974 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
2976 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
2978 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
2979 pointer before overwriting it.
2981 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
2983 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
2984 Associate the __float128 type to float128_type_node so that it can
2985 be recognized by the compiler.
2986 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
2987 Add the flag "FLOAT128_TYPE" to gcc and associate a function
2988 with the suffix "q" to "f128".
2989 * doc/extend.texi:Added support for 128-bit floating-point functions on
2990 the LoongArch architecture.
2992 2023-09-01 Jakub Jelinek <jakub@redhat.com>
2995 * common.opt (fabi-version=): Document version 19.
2996 * doc/invoke.texi (-fabi-version=): Likewise.
2998 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3000 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
3001 New combine pattern.
3002 (*cond_<float_cvt><vconvert><mode>): Ditto.
3003 (*cond_<optab><vnconvert><mode>): Ditto.
3004 (*cond_<float_cvt><vnconvert><mode>): Ditto.
3005 (*cond_<optab><mode><vnconvert>): Ditto.
3006 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
3007 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
3008 (<float_cvt><vconvert><mode>2): Adjust.
3009 (<optab><vnconvert><mode>2): Adjust.
3010 (<float_cvt><vnconvert><mode>2): Adjust.
3011 (<optab><mode><vnconvert>2): Adjust.
3012 (<float_cvt><mode><vnconvert>2): Adjust.
3013 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
3015 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3017 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
3018 New combine pattern.
3019 (*cond_trunc<mode><v_double_trunc>): Ditto.
3020 * config/riscv/autovec.md: Adjust.
3021 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
3023 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3025 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
3026 New combine pattern.
3027 (*cond_<optab><v_quad_trunc><mode>): Ditto.
3028 (*cond_<optab><v_oct_trunc><mode>): Ditto.
3029 (*cond_trunc<mode><v_double_trunc>): Ditto.
3030 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
3031 (<optab><v_oct_trunc><mode>2): Ditto.
3033 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3035 * config/riscv/autovec.md: Adjust.
3036 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
3037 (expand_cond_len_binop): Ditto.
3038 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
3039 (expand_cond_len_op): Ditto.
3040 (expand_cond_len_unop): Ditto.
3041 (expand_cond_len_binop): Ditto.
3042 (expand_cond_len_ternop): Ditto.
3044 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3046 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
3047 VECT_COMPARE_COSTS by default.
3049 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
3051 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
3053 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3055 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
3057 * config/riscv/riscv.opt: Add dynamic compile option.
3059 2023-09-01 Pan Li <pan2.li@intel.com>
3061 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
3062 vls floating-point autovec.
3063 * config/riscv/vector-iterators.md: New iterator for
3064 floating-point V and VLS.
3065 * config/riscv/vector.md: Add VLS to floating-point binop.
3067 2023-09-01 Andrew Pinski <apinski@marvell.com>
3069 PR tree-optimization/19832
3070 * match.pd: Add pattern to optimize
3071 `(a != b) ? a OP b : c`.
3073 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
3074 Guo Jie <guojie@loongson.cn>
3077 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
3078 frame_pointer_needed to determine whether to use the $fp register.
3080 2023-08-31 Andrew Pinski <apinski@marvell.com>
3082 PR tree-optimization/110915
3083 * match.pd (min_value, max_value): Extend to vector constants.
3085 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
3087 * config.in: Regenerate.
3088 * config/darwin-c.cc: Change spelling to macOS.
3089 * config/darwin-driver.cc: Likewise.
3090 * config/darwin.h: Likewise.
3091 * configure.ac: Likewise.
3092 * doc/contrib.texi: Likewise.
3093 * doc/extend.texi: Likewise.
3094 * doc/invoke.texi: Likewise.
3095 * doc/plugins.texi: Likewise.
3096 * doc/tm.texi: Regenerate.
3097 * doc/tm.texi.in: Change spelling to macOS.
3098 * plugin.cc: Likewise.
3100 2023-08-31 Pan Li <pan2.li@intel.com>
3102 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
3103 * config/riscv/autovec.md: Ditto.
3105 2023-08-31 Pan Li <pan2.li@intel.com>
3107 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
3108 * config/riscv/autovec.md: Ditto.
3110 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
3112 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
3113 rather than a call. List each possible destination register
3114 in the call pattern.
3116 2023-08-31 Pan Li <pan2.li@intel.com>
3118 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
3119 * config/riscv/autovec.md: Ditto.
3121 2023-08-31 Pan Li <pan2.li@intel.com>
3122 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
3124 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
3125 * config/riscv/autovec.md: Ditto.
3126 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
3128 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
3130 * config/riscv/autovec.md (shifts): Use
3131 vector_scalar_shift_operand.
3132 * config/riscv/predicates.md (vector_scalar_shift_operand): New
3135 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3137 * config.gcc: Add vector cost model framework for RVV.
3138 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
3139 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
3140 * config/riscv/t-riscv: Ditto.
3141 * config/riscv/riscv-vector-costs.cc: New file.
3142 * config/riscv/riscv-vector-costs.h: New file.
3144 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
3147 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
3148 AltiVec address operands.
3149 (define_insn_and_split movxo): Likewise.
3150 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
3151 redundant mode size check.
3153 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3155 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
3156 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
3157 Change to default policy.
3158 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
3159 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
3160 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
3162 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3164 * config/riscv/autovec-opt.md: Adjust.
3165 * config/riscv/autovec-vls.md: Ditto.
3166 * config/riscv/autovec.md: Ditto.
3167 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
3168 (enum insn_flags): Add insn flags.
3169 (emit_vlmax_insn): Adjust.
3170 (emit_vlmax_fp_insn): Delete.
3171 (emit_vlmax_ternary_insn): Delete.
3172 (emit_vlmax_fp_ternary_insn): Delete.
3173 (emit_nonvlmax_insn): Adjust.
3174 (emit_vlmax_slide_insn): Delete.
3175 (emit_nonvlmax_slide_tu_insn): Delete.
3176 (emit_vlmax_merge_insn): Delete.
3177 (emit_vlmax_cmp_insn): Delete.
3178 (emit_vlmax_cmp_mu_insn): Delete.
3179 (emit_vlmax_masked_mu_insn): Delete.
3180 (emit_scalar_move_insn): Delete.
3181 (emit_nonvlmax_integer_move_insn): Delete.
3182 (emit_vlmax_insn_lra): Add.
3183 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
3184 (emit_vlmax_insn): Adjust.
3185 (emit_nonvlmax_insn): Adjust.
3186 (emit_vlmax_insn_lra): Add.
3187 (emit_vlmax_fp_insn): Delete.
3188 (emit_vlmax_ternary_insn): Delete.
3189 (emit_vlmax_fp_ternary_insn): Delete.
3190 (emit_vlmax_slide_insn): Delete.
3191 (emit_nonvlmax_slide_tu_insn): Delete.
3192 (emit_nonvlmax_slide_insn): Delete.
3193 (emit_vlmax_merge_insn): Delete.
3194 (emit_vlmax_cmp_insn): Delete.
3195 (emit_vlmax_cmp_mu_insn): Delete.
3196 (emit_vlmax_masked_insn): Delete.
3197 (emit_nonvlmax_masked_insn): Delete.
3198 (emit_vlmax_masked_store_insn): Delete.
3199 (emit_nonvlmax_masked_store_insn): Delete.
3200 (emit_vlmax_masked_mu_insn): Delete.
3201 (emit_vlmax_masked_fp_mu_insn): Delete.
3202 (emit_nonvlmax_tu_insn): Delete.
3203 (emit_nonvlmax_fp_tu_insn): Delete.
3204 (emit_nonvlmax_tumu_insn): Delete.
3205 (emit_nonvlmax_fp_tumu_insn): Delete.
3206 (emit_scalar_move_insn): Delete.
3207 (emit_cpop_insn): Delete.
3208 (emit_vlmax_integer_move_insn): Delete.
3209 (emit_nonvlmax_integer_move_insn): Delete.
3210 (emit_vlmax_gather_insn): Delete.
3211 (emit_vlmax_masked_gather_mu_insn): Delete.
3212 (emit_vlmax_compress_insn): Delete.
3213 (emit_nonvlmax_compress_insn): Delete.
3214 (emit_vlmax_reduction_insn): Delete.
3215 (emit_vlmax_fp_reduction_insn): Delete.
3216 (emit_nonvlmax_fp_reduction_insn): Delete.
3217 (expand_vec_series): Adjust.
3218 (expand_const_vector): Adjust.
3219 (legitimize_move): Adjust.
3220 (sew64_scalar_helper): Adjust.
3221 (expand_tuple_move): Adjust.
3222 (expand_vector_init_insert_elems): Adjust.
3223 (expand_vector_init_merge_repeating_sequence): Adjust.
3224 (expand_vec_cmp): Adjust.
3225 (expand_vec_cmp_float): Adjust.
3226 (expand_vec_perm): Adjust.
3227 (shuffle_merge_patterns): Adjust.
3228 (shuffle_compress_patterns): Adjust.
3229 (shuffle_decompress_patterns): Adjust.
3230 (expand_load_store): Adjust.
3231 (expand_cond_len_op): Adjust.
3232 (expand_cond_len_unop): Adjust.
3233 (expand_cond_len_binop): Adjust.
3234 (expand_gather_scatter): Adjust.
3235 (expand_cond_len_ternop): Adjust.
3236 (expand_reduction): Adjust.
3237 (expand_lanes_load_store): Adjust.
3238 (expand_fold_extract_last): Adjust.
3239 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
3240 * config/riscv/vector.md: Adjust.
3242 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
3245 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
3246 load/store with length only on 64-bit Power10.
3248 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
3250 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
3251 SWAP option is enabled.
3252 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
3254 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
3256 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
3257 Use common insn for signed and unsigned front-end definitions.
3258 * config/arm/arm_mve_builtins.def
3259 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
3260 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
3261 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
3264 (mve_rot): Likewise.
3266 (VxCADDQ_M): Likewise.
3267 * config/arm/unspecs.md (unspec): Likewise.
3268 * config/arm/mve.md: Fix minor typo.
3270 2023-08-31 liuhongt <hongtao.liu@intel.com>
3272 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
3273 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
3274 (VF_AVX512HFBF16): Renamed to VHFBF.
3275 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
3276 (VF_AVX512FP16): Removed.
3277 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
3278 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
3279 (rsqrt<mode>2): Ditto.
3280 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
3281 (vcond<mode><code>): Ditto.
3282 (vcond<sseintvecmodelower><mode>): Ditto.
3283 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
3284 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
3285 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
3286 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
3287 (cmla<conj_op><mode>4): Ditto.
3288 (fma_<mode>_fadd_fmul): Ditto.
3289 (fma_<mode>_fadd_fcmul): Ditto.
3290 (fma_<complexopname>_<mode>_fma_zero): Ditto.
3291 (fma_<mode>_fmaddc_bcst): Ditto.
3292 (fma_<mode>_fcmaddc_bcst): Ditto.
3293 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
3294 (cmul<conj_op><mode>3): Ditto.
3295 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
3297 (vec_unpacks_lo_<mode>): Ditto.
3298 (vec_unpacks_hi_<mode>): Ditto.
3299 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
3300 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
3301 (*vec_extract<mode>_0): Ditto.
3302 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
3304 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3307 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
3309 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
3311 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
3312 (operator_minus::overflow_free_p): New declare.
3313 (operator_mult::overflow_free_p): New declare.
3314 * range-op.cc (range_op_handler::overflow_free_p): New function.
3315 (range_operator::overflow_free_p): New default function.
3316 (operator_plus::overflow_free_p): New function.
3317 (operator_minus::overflow_free_p): New function.
3318 (operator_mult::overflow_free_p): New function.
3319 * range-op.h (range_op_handler::overflow_free_p): New declare.
3320 (range_operator::overflow_free_p): New declare.
3321 * value-range.cc (irange::nonnegative_p): New function.
3322 (irange::nonpositive_p): New function.
3323 * value-range.h (irange::nonnegative_p): New declare.
3324 (irange::nonpositive_p): New declare.
3326 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
3329 * config/pru/predicates.md (const_0_operand): New predicate.
3330 (pru_cstore_comparison_operator): Ditto.
3331 * config/pru/pru.md (cstore<mode>4): New pattern.
3334 2023-08-30 Richard Biener <rguenther@suse.de>
3336 PR tree-optimization/111228
3337 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
3338 New simplifications.
3340 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3342 * config/riscv/autovec.md (movmisalign<mode>): Delete.
3344 2023-08-30 Die Li <lidie@eswincomputing.com>
3345 Fei Gao <gaofei@eswincomputing.com>
3347 * config/riscv/peephole.md: New pattern.
3348 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
3349 (zcmp_mv_sreg_operand): New predicate.
3350 * config/riscv/riscv.md: New predicate.
3351 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
3352 (*mvsa01<X:mode>): New pattern.
3354 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
3356 * config/riscv/riscv.cc
3357 (riscv_zcmp_can_use_popretz): true if popretz can be used
3358 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
3359 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
3360 * config/riscv/riscv.md: define A0_REGNUM
3361 * config/riscv/zc.md
3362 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
3363 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
3364 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
3365 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
3366 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
3367 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
3368 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
3369 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
3370 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
3371 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
3372 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
3373 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
3375 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
3377 * config/riscv/iterators.md
3378 (slot0_offset): slot 0 offset in stack GPRs area in bytes
3379 (slot1_offset): slot 1 offset in stack GPRs area in bytes
3380 (slot2_offset): likewise
3381 (slot3_offset): likewise
3382 (slot4_offset): likewise
3383 (slot5_offset): likewise
3384 (slot6_offset): likewise
3385 (slot7_offset): likewise
3386 (slot8_offset): likewise
3387 (slot9_offset): likewise
3388 (slot10_offset): likewise
3389 (slot11_offset): likewise
3390 (slot12_offset): likewise
3391 * config/riscv/predicates.md
3392 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
3393 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
3394 (stack_push_up_to_s1_operand): likewise
3395 (stack_push_up_to_s2_operand): likewise
3396 (stack_push_up_to_s3_operand): likewise
3397 (stack_push_up_to_s4_operand): likewise
3398 (stack_push_up_to_s5_operand): likewise
3399 (stack_push_up_to_s6_operand): likewise
3400 (stack_push_up_to_s7_operand): likewise
3401 (stack_push_up_to_s8_operand): likewise
3402 (stack_push_up_to_s9_operand): likewise
3403 (stack_push_up_to_s11_operand): likewise
3404 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
3405 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
3406 (stack_pop_up_to_s1_operand): likewise
3407 (stack_pop_up_to_s2_operand): likewise
3408 (stack_pop_up_to_s3_operand): likewise
3409 (stack_pop_up_to_s4_operand): likewise
3410 (stack_pop_up_to_s5_operand): likewise
3411 (stack_pop_up_to_s6_operand): likewise
3412 (stack_pop_up_to_s7_operand): likewise
3413 (stack_pop_up_to_s8_operand): likewise
3414 (stack_pop_up_to_s9_operand): likewise
3415 (stack_pop_up_to_s11_operand): likewise
3416 * config/riscv/riscv-protos.h
3417 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
3418 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
3419 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
3420 (riscv_use_multi_push): true if multi push is used
3421 (riscv_multi_push_sregs_count): num of sregs in multi-push
3422 (riscv_multi_push_regs_count): num of regs in multi-push
3423 (riscv_16bytes_align): align to 16 bytes
3424 (riscv_stack_align): moved to a better place
3425 (riscv_save_libcall_count): no functional change
3426 (riscv_compute_frame_info): add zcmp frame info
3427 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
3428 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
3429 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
3430 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
3431 (riscv_expand_prologue): allocate stack by cm.push
3432 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
3433 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
3434 (zcmp_base_adj): calculate stack adjustment base size
3435 (zcmp_additional_adj): calculate stack adjustment additional size
3436 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
3437 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
3448 (S10_MASK): likewise
3449 (S11_MASK): likewise
3450 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
3451 (ZCMP_MAX_SPIMM): max spimm value
3452 (ZCMP_SP_INC_STEP): zcmp sp increment step
3453 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
3454 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
3455 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
3456 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
3457 * config/riscv/riscv.md: include zc.md
3458 * config/riscv/zc.md: New file. machine description for zcmp
3460 2023-08-30 Jakub Jelinek <jakub@redhat.com>
3462 PR tree-optimization/110914
3463 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
3464 adjust_last_stmt unless len is known constant.
3466 2023-08-30 Jakub Jelinek <jakub@redhat.com>
3468 PR tree-optimization/111015
3469 * gimple-ssa-store-merging.cc
3470 (imm_store_chain_info::output_merged_store): Use wi::mask and
3471 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
3472 build_int_cst to build BIT_AND_EXPR mask.
3474 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3476 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
3477 (call_may_clobber_ref_p_1): Ditto.
3478 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
3479 (get_alias_ptr_type_for_ptr_address): Ditto.
3481 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3483 * config/riscv/riscv-vsetvl.cc
3484 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
3486 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3488 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
3489 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
3492 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
3494 * config/riscv/zicond.md: New splitters to rewrite single bit
3495 sign extension as the condition to a czero in the desired form.
3497 2023-08-29 David Malcolm <dmalcolm@redhat.com>
3500 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
3502 2023-08-29 David Malcolm <dmalcolm@redhat.com>
3505 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
3507 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
3509 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
3510 zvfh can generate zfa extended instruction fli.h, just like zfh.
3512 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
3513 Vineet Gupta <vineetg@rivosinc.com>
3515 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
3516 __riscv_unaligned_avoid with value 1 or
3517 __riscv_unaligned_slow with value 1 or
3518 __riscv_unaligned_fast with value 1
3519 * config/riscv/riscv.cc (riscv_option_override): Define
3520 riscv_user_wants_strict_align. Set
3521 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
3522 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
3524 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
3526 * config/riscv/autovec-vls.md: Update types
3527 * config/riscv/riscv.md: Add vector placeholder type
3528 * config/riscv/vector.md: Update types
3530 2023-08-29 Carl Love <cel@us.ibm.com>
3532 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
3533 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
3534 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
3535 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
3536 New buit-in definitions.
3537 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
3538 overloaded definition.
3539 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
3541 2023-08-29 Pan Li <pan2.li@intel.com>
3542 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
3544 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
3545 (riscv_legitimize_const_move): Handle ref plus const poly.
3547 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
3549 * common/config/riscv/riscv-common.cc
3550 (riscv_implied_info): Add implications from unprivileged extensions.
3551 (riscv_ext_version_table): Add stub support for all unprivileged
3552 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
3554 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
3556 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
3557 Add stub support for all vendor extensions supported by Binutils.
3559 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
3561 * common/config/riscv/riscv-common.cc
3562 (riscv_implied_info): Add implications from privileged extensions.
3563 (riscv_ext_version_table): Add stub support for all privileged
3564 extensions supported by Binutils.
3566 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
3568 * config/riscv/autovec.md: Adjust
3569 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
3570 (get_vlmax_rtx): Exported.
3571 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
3572 (emit_vlmax_masked_gather_mu_insn): Adjust.
3573 (get_vlmax_rtx): New func.
3574 (expand_load_store): Adjust.
3575 (expand_cond_len_unop): Call expand_cond_len_op.
3576 (expand_cond_len_op): New subroutine.
3577 (expand_cond_len_binop): Call expand_cond_len_op.
3578 (expand_cond_len_ternop): Call expand_cond_len_op.
3579 (expand_lanes_load_store): Adjust.
3581 2023-08-29 Jakub Jelinek <jakub@redhat.com>
3584 PR middle-end/111209
3585 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
3586 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
3587 carry-out on higher limb. Don't match it though if it could be
3588 matched later on 4 argument addition/subtraction.
3590 2023-08-29 Andrew Pinski <apinski@marvell.com>
3592 PR tree-optimization/111147
3593 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
3594 instead of matching bit_not.
3596 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
3598 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
3601 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3603 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
3604 (pass_vsetvl::compute_local_properties): Fix bug.
3605 (pass_vsetvl::commit_vsetvls): Ditto.
3606 * config/riscv/riscv-vsetvl.h: New function.
3608 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
3611 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
3613 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
3614 force_reg mem target operand.
3615 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
3616 (*pred_mov<mode>): Remove imm -> reg pattern.
3617 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
3619 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
3621 * common/config/loongarch/loongarch-common.cc:
3622 Enable '-free' on O2 and above.
3623 * doc/invoke.texi: Modify the description information
3624 of the '-free' compilation option and add the LoongArch
3627 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
3629 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
3631 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
3633 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
3634 Implement the 'Zihintpause' extension, version 2.0.
3635 (riscv_ext_flag_table) Add 'Zihintpause' handling.
3636 * config/riscv/riscv-builtins.cc: Remove availability predicate
3637 "always" and add "hint_pause".
3638 (riscv_builtins) : Add "pause" extension.
3639 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
3640 * config/riscv/riscv.md (riscv_pause): Adjust output based on
3643 2023-08-28 Andrew Pinski <apinski@marvell.com>
3645 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
3646 instead of specifically checking for ~X.
3648 2023-08-28 Andrew Pinski <apinski@marvell.com>
3650 PR tree-optimization/111146
3651 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
3654 2023-08-28 Andrew Pinski <apinski@marvell.com>
3656 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
3657 when resimplify returns true.
3658 (match_simplify_replacement): Print only if accepted the match-and-simplify
3659 result rather than the full sequence.
3661 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3663 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
3665 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
3667 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3669 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
3671 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3673 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
3674 (vmulltq_poly): New.
3675 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
3676 (vmulltq_poly): New.
3677 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
3678 (vmulltq_poly): New.
3679 * config/arm/arm_mve.h (vmulltq_poly): Remove.
3680 (vmullbq_poly): Remove.
3681 (vmullbq_poly_m): Remove.
3682 (vmulltq_poly_m): Remove.
3683 (vmullbq_poly_x): Remove.
3684 (vmulltq_poly_x): Remove.
3685 (vmulltq_poly_p8): Remove.
3686 (vmullbq_poly_p8): Remove.
3687 (vmulltq_poly_p16): Remove.
3688 (vmullbq_poly_p16): Remove.
3689 (vmullbq_poly_m_p8): Remove.
3690 (vmullbq_poly_m_p16): Remove.
3691 (vmulltq_poly_m_p8): Remove.
3692 (vmulltq_poly_m_p16): Remove.
3693 (vmullbq_poly_x_p8): Remove.
3694 (vmullbq_poly_x_p16): Remove.
3695 (vmulltq_poly_x_p8): Remove.
3696 (vmulltq_poly_x_p16): Remove.
3697 (__arm_vmulltq_poly_p8): Remove.
3698 (__arm_vmullbq_poly_p8): Remove.
3699 (__arm_vmulltq_poly_p16): Remove.
3700 (__arm_vmullbq_poly_p16): Remove.
3701 (__arm_vmullbq_poly_m_p8): Remove.
3702 (__arm_vmullbq_poly_m_p16): Remove.
3703 (__arm_vmulltq_poly_m_p8): Remove.
3704 (__arm_vmulltq_poly_m_p16): Remove.
3705 (__arm_vmullbq_poly_x_p8): Remove.
3706 (__arm_vmullbq_poly_x_p16): Remove.
3707 (__arm_vmulltq_poly_x_p8): Remove.
3708 (__arm_vmulltq_poly_x_p16): Remove.
3709 (__arm_vmulltq_poly): Remove.
3710 (__arm_vmullbq_poly): Remove.
3711 (__arm_vmullbq_poly_m): Remove.
3712 (__arm_vmulltq_poly_m): Remove.
3713 (__arm_vmullbq_poly_x): Remove.
3714 (__arm_vmulltq_poly_x): Remove.
3716 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3718 * config/arm/arm-mve-builtins-functions.h (class
3719 unspec_mve_function_exact_insn_vmull_poly): New.
3721 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3723 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
3724 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
3726 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3728 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
3729 support for 'U' and 'p' format specifiers.
3731 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3733 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
3735 (TYPES_poly_8_16): New.
3737 * config/arm/arm-mve-builtins.def (p8): New type suffix.
3739 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
3741 (struct type_suffix_info): Add poly_p field.
3743 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3745 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
3747 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
3749 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
3751 * config/arm/arm_mve.h (vmulltq_int): Remove.
3752 (vmullbq_int): Remove.
3753 (vmullbq_int_m): Remove.
3754 (vmulltq_int_m): Remove.
3755 (vmullbq_int_x): Remove.
3756 (vmulltq_int_x): Remove.
3757 (vmulltq_int_u8): Remove.
3758 (vmullbq_int_u8): Remove.
3759 (vmulltq_int_s8): Remove.
3760 (vmullbq_int_s8): Remove.
3761 (vmulltq_int_u16): Remove.
3762 (vmullbq_int_u16): Remove.
3763 (vmulltq_int_s16): Remove.
3764 (vmullbq_int_s16): Remove.
3765 (vmulltq_int_u32): Remove.
3766 (vmullbq_int_u32): Remove.
3767 (vmulltq_int_s32): Remove.
3768 (vmullbq_int_s32): Remove.
3769 (vmullbq_int_m_s8): Remove.
3770 (vmullbq_int_m_s32): Remove.
3771 (vmullbq_int_m_s16): Remove.
3772 (vmullbq_int_m_u8): Remove.
3773 (vmullbq_int_m_u32): Remove.
3774 (vmullbq_int_m_u16): Remove.
3775 (vmulltq_int_m_s8): Remove.
3776 (vmulltq_int_m_s32): Remove.
3777 (vmulltq_int_m_s16): Remove.
3778 (vmulltq_int_m_u8): Remove.
3779 (vmulltq_int_m_u32): Remove.
3780 (vmulltq_int_m_u16): Remove.
3781 (vmullbq_int_x_s8): Remove.
3782 (vmullbq_int_x_s16): Remove.
3783 (vmullbq_int_x_s32): Remove.
3784 (vmullbq_int_x_u8): Remove.
3785 (vmullbq_int_x_u16): Remove.
3786 (vmullbq_int_x_u32): Remove.
3787 (vmulltq_int_x_s8): Remove.
3788 (vmulltq_int_x_s16): Remove.
3789 (vmulltq_int_x_s32): Remove.
3790 (vmulltq_int_x_u8): Remove.
3791 (vmulltq_int_x_u16): Remove.
3792 (vmulltq_int_x_u32): Remove.
3793 (__arm_vmulltq_int_u8): Remove.
3794 (__arm_vmullbq_int_u8): Remove.
3795 (__arm_vmulltq_int_s8): Remove.
3796 (__arm_vmullbq_int_s8): Remove.
3797 (__arm_vmulltq_int_u16): Remove.
3798 (__arm_vmullbq_int_u16): Remove.
3799 (__arm_vmulltq_int_s16): Remove.
3800 (__arm_vmullbq_int_s16): Remove.
3801 (__arm_vmulltq_int_u32): Remove.
3802 (__arm_vmullbq_int_u32): Remove.
3803 (__arm_vmulltq_int_s32): Remove.
3804 (__arm_vmullbq_int_s32): Remove.
3805 (__arm_vmullbq_int_m_s8): Remove.
3806 (__arm_vmullbq_int_m_s32): Remove.
3807 (__arm_vmullbq_int_m_s16): Remove.
3808 (__arm_vmullbq_int_m_u8): Remove.
3809 (__arm_vmullbq_int_m_u32): Remove.
3810 (__arm_vmullbq_int_m_u16): Remove.
3811 (__arm_vmulltq_int_m_s8): Remove.
3812 (__arm_vmulltq_int_m_s32): Remove.
3813 (__arm_vmulltq_int_m_s16): Remove.
3814 (__arm_vmulltq_int_m_u8): Remove.
3815 (__arm_vmulltq_int_m_u32): Remove.
3816 (__arm_vmulltq_int_m_u16): Remove.
3817 (__arm_vmullbq_int_x_s8): Remove.
3818 (__arm_vmullbq_int_x_s16): Remove.
3819 (__arm_vmullbq_int_x_s32): Remove.
3820 (__arm_vmullbq_int_x_u8): Remove.
3821 (__arm_vmullbq_int_x_u16): Remove.
3822 (__arm_vmullbq_int_x_u32): Remove.
3823 (__arm_vmulltq_int_x_s8): Remove.
3824 (__arm_vmulltq_int_x_s16): Remove.
3825 (__arm_vmulltq_int_x_s32): Remove.
3826 (__arm_vmulltq_int_x_u8): Remove.
3827 (__arm_vmulltq_int_x_u16): Remove.
3828 (__arm_vmulltq_int_x_u32): Remove.
3829 (__arm_vmulltq_int): Remove.
3830 (__arm_vmullbq_int): Remove.
3831 (__arm_vmullbq_int_m): Remove.
3832 (__arm_vmulltq_int_m): Remove.
3833 (__arm_vmullbq_int_x): Remove.
3834 (__arm_vmulltq_int_x): Remove.
3836 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3838 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
3839 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
3841 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3843 * config/arm/arm-mve-builtins-functions.h (class
3844 unspec_mve_function_exact_insn_vmull): New.
3846 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3848 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
3849 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
3851 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
3853 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
3854 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
3855 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
3856 (mve_vmulltq_int_<supf><mode>): Merge into ...
3857 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
3858 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
3859 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
3860 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
3861 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
3862 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
3863 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
3865 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3867 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
3870 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
3872 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
3873 (binary_acca_int64): Likewise.
3875 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
3877 * range-op-float.cc (fold_range): Handle relations.
3879 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
3881 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
3882 Optimize the function implementation.
3884 2023-08-28 liuhongt <hongtao.liu@intel.com>
3887 * config/i386/sse.md (V48_AVX2): Rename to ..
3888 (V48_128_256): .. this.
3889 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
3890 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
3891 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
3892 integral modes when TARGET_AVX2 is not available.
3893 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
3894 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
3896 (maskstore<mode><sseintvecmodelower>): Ditto.
3898 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3900 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
3902 (after_or_same_p): Ditto.
3903 (find_reg_killed_by): Delete.
3904 (has_vsetvl_killed_avl_p): Ditto.
3905 (anticipatable_occurrence_p): Refactor.
3906 (any_set_in_bb_p): Delete.
3907 (count_regno_occurrences): Ditto.
3908 (backward_propagate_worthwhile_p): Ditto.
3909 (demands_can_be_fused_p): Ditto.
3910 (earliest_pred_can_be_fused_p): New function.
3911 (vsetvl_dominated_by_p): Ditto.
3912 (vector_insn_info::parse_insn): Refactor.
3913 (vector_insn_info::merge): Refactor.
3914 (vector_insn_info::dump): Refactor.
3915 (vector_infos_manager::vector_infos_manager): Refactor.
3916 (vector_infos_manager::all_empty_predecessor_p): Delete.
3917 (vector_infos_manager::all_same_avl_p): Ditto.
3918 (vector_infos_manager::create_bitmap_vectors): Refactor.
3919 (vector_infos_manager::free_bitmap_vectors): Refactor.
3920 (vector_infos_manager::dump): Refactor.
3921 (pass_vsetvl::update_block_info): New function.
3922 (enum fusion_type): Ditto.
3923 (pass_vsetvl::get_backward_fusion_type): Delete.
3924 (pass_vsetvl::hard_empty_block_p): Ditto.
3925 (pass_vsetvl::backward_demand_fusion): Ditto.
3926 (pass_vsetvl::forward_demand_fusion): Ditto.
3927 (pass_vsetvl::demand_fusion): Ditto.
3928 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
3929 (pass_vsetvl::compute_local_properties): Ditto.
3930 (pass_vsetvl::earliest_fusion): New function.
3931 (pass_vsetvl::vsetvl_fusion): Ditto.
3932 (pass_vsetvl::commit_vsetvls): Refactor.
3933 (get_first_vsetvl_before_rvv_insns): Ditto.
3934 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
3935 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
3936 (pass_vsetvl::df_post_optimization): Refactor.
3937 (pass_vsetvl::lazy_vsetvl): Ditto.
3938 * config/riscv/riscv-vsetvl.h: Ditto.
3940 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3942 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
3943 * config/riscv/riscv-protos.h (enum insn_type): New enum.
3944 (expand_fold_extract_last): New function.
3945 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
3946 (emit_cpop_insn): Ditto.
3947 (emit_nonvlmax_compress_insn): Ditto.
3948 (expand_fold_extract_last): Ditto.
3949 * config/riscv/vector.md: Fix vcpop.m ratio demand.
3951 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
3953 * config/riscv/sync-rvwmo.md: updated types to "multi" or
3954 "atomic" based on number of assembly lines generated
3955 * config/riscv/sync-ztso.md: likewise
3956 * config/riscv/sync.md: likewise
3958 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
3960 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
3962 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
3963 instructions FLI.H/S/D can load.
3964 * config/riscv/iterators.md (ceil): New.
3965 * config/riscv/riscv-opts.h (MASK_ZFA): New.
3967 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
3968 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
3969 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
3971 (riscv_const_insns): Likewise.
3972 (riscv_legitimize_const_move): Likewise.
3973 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
3975 (riscv_split_doubleword_move): Likewise.
3976 (riscv_output_move): Output the mov instructions in zfa extension.
3977 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
3979 (riscv_secondary_memory_needed): Likewise.
3980 * config/riscv/riscv.md (fminm<mode>3): New.
3981 (fmaxm<mode>3): New.
3982 (movsidf2_low_rv32): New.
3983 (movsidf2_high_rv32): New.
3984 (movdfsisi3_rv32): New.
3985 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
3986 * config/riscv/riscv.opt: New.
3988 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
3991 * omp-general.cc (omp_runtime_api_procname): New.
3992 (omp_runtime_api_call): Moved here from omp-low.cc, and make
3994 * omp-general.h: Include omp-api.h.
3995 * omp-low.cc (omp_runtime_api_call): Delete this copy.
3997 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
3999 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
4000 * doc/gimple.texi (GIMPLE instruction set): Add
4001 GIMPLE_OMP_STRUCTURED_BLOCK.
4002 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
4003 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
4004 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
4005 GIMPLE_OMP_STRUCTURED_BLOCK.
4006 (pp_gimple_stmt_1): Likewise.
4007 * gimple-walk.cc (walk_gimple_stmt): Likewise.
4008 * gimple.cc (gimple_build_omp_structured_block): New.
4009 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
4010 * gimple.h (gimple_build_omp_structured_block): Declare.
4011 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
4012 (CASE_GIMPLE_OMP): Likewise.
4013 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
4014 (gimplify_expr): Likewise.
4015 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
4016 GIMPLE_OMP_STRUCTURED_BLOCK.
4017 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
4018 (lower_omp_1): Likewise.
4019 (diagnose_sb_1): Likewise.
4020 (diagnose_sb_2): Likewise.
4021 * tree-inline.cc (remap_gimple_stmt): Handle
4022 GIMPLE_OMP_STRUCTURED_BLOCK.
4023 (estimate_num_insns): Likewise.
4024 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
4025 (convert_local_reference_stmt): Likewise.
4026 (convert_gimple_call): Likewise.
4027 * tree-pretty-print.cc (dump_generic_node): Handle
4028 OMP_STRUCTURED_BLOCK.
4029 * tree.def (OMP_STRUCTURED_BLOCK): New.
4030 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
4032 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
4034 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
4035 cost. Add some comments about different constants handling.
4037 2023-08-25 Andrew Pinski <apinski@marvell.com>
4039 * match.pd (`a ? one_zero : one_zero`): Move
4040 below detection of minmax.
4042 2023-08-25 Andrew Pinski <apinski@marvell.com>
4044 * match.pd (`a | C -> C`): New pattern.
4046 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
4048 * caller-save.cc (new_saved_hard_reg):
4049 Rename TRUE/FALSE to true/false.
4050 (setup_save_areas): Ditto.
4051 * gcc.cc (set_collect_gcc_options): Ditto.
4052 (driver::build_multilib_strings): Ditto.
4053 (print_multilib_info): Ditto.
4054 * genautomata.cc (gen_cpu_unit): Ditto.
4055 (gen_query_cpu_unit): Ditto.
4056 (gen_bypass): Ditto.
4057 (gen_excl_set): Ditto.
4058 (gen_presence_absence_set): Ditto.
4059 (gen_presence_set): Ditto.
4060 (gen_final_presence_set): Ditto.
4061 (gen_absence_set): Ditto.
4062 (gen_final_absence_set): Ditto.
4063 (gen_automaton): Ditto.
4064 (gen_regexp_repeat): Ditto.
4065 (gen_regexp_allof): Ditto.
4066 (gen_regexp_oneof): Ditto.
4067 (gen_regexp_sequence): Ditto.
4068 (process_decls): Ditto.
4069 (reserv_sets_are_intersected): Ditto.
4070 (initiate_excl_sets): Ditto.
4071 (form_reserv_sets_list): Ditto.
4072 (check_presence_pattern_sets): Ditto.
4073 (check_absence_pattern_sets): Ditto.
4074 (check_regexp_units_distribution): Ditto.
4075 (check_unit_distributions_to_automata): Ditto.
4076 (create_ainsns): Ditto.
4077 (output_insn_code_cases): Ditto.
4078 (output_internal_dead_lock_func): Ditto.
4079 (form_important_insn_automata_lists): Ditto.
4080 * gengtype-state.cc (read_state_files_list): Ditto.
4081 * gengtype.cc (main): Ditto.
4082 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
4084 * gimple.cc (gimple_build_call_from_tree): Ditto.
4085 (preprocess_case_label_vec_for_gimple): Ditto.
4086 * gimplify.cc (gimplify_call_expr): Ditto.
4087 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
4089 2023-08-25 Richard Biener <rguenther@suse.de>
4091 PR tree-optimization/111137
4092 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
4093 Properly handle grouped stores from other SLP instances.
4095 2023-08-25 Richard Biener <rguenther@suse.de>
4097 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
4098 Split out from vect_slp_analyze_node_dependences, remove
4100 (vect_slp_analyze_load_dependences): Split out from
4101 vect_slp_analyze_node_dependences, adjust comments. Process
4102 queued stores before any disambiguation.
4103 (vect_slp_analyze_node_dependences): Remove.
4104 (vect_slp_analyze_instance_dependence): Adjust.
4106 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
4108 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
4110 (operator_not_equal::fold_range): Adjust for relations.
4111 (operator_lt::fold_range): Same.
4112 (operator_gt::fold_range): Same.
4113 (foperator_unordered_equal::fold_range): Same.
4114 (foperator_unordered_lt::fold_range): Same.
4115 (foperator_unordered_le::fold_range): Same.
4116 (foperator_unordered_gt::fold_range): Same.
4117 (foperator_unordered_ge::fold_range): Same.
4119 2023-08-25 Richard Biener <rguenther@suse.de>
4121 PR tree-optimization/111136
4122 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
4123 stores force STMT_VINFO_STRIDED_P and also duplicate that
4126 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4128 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
4131 2023-08-25 liuhongt <hongtao.liu@intel.com>
4133 * config/i386/sse.md (vec_set<mode>): Removed.
4134 (V_128H): Merge into ..
4136 (V_256H): Merge into ..
4138 (V_512): Add V32HF, V32BF.
4139 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
4141 (vcond<mode><sseintvecmodelower>): Removed
4142 (vcondu<mode><sseintvecmodelower>): Removed.
4143 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
4145 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
4148 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
4149 Adjust paramter order.
4151 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
4154 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
4156 2023-08-24 David Malcolm <dmalcolm@redhat.com>
4159 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
4160 list of functions known to the analyzer.
4162 2023-08-24 Richard Biener <rguenther@suse.de>
4164 PR tree-optimization/111123
4165 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
4166 remove indirect clobbers here ...
4167 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
4168 (remove_indirect_clobbers): New function.
4170 2023-08-24 Jan Hubicka <jh@suse.cz>
4172 * cfg.h (struct control_flow_graph): New field full_profile.
4173 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
4174 * cfg.cc (init_flow): Set full_profile to false.
4175 * graphite.cc (graphite_transform_loops): Set full_profile to false.
4176 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
4177 * predict.cc (pass_profile::execute): Set full_profile to true.
4178 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
4179 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
4180 if full_profile is set.
4181 * tree-inline.cc (initialize_cfun): Initialize full_profile.
4182 (expand_call_inline): Combine full_profile.
4184 2023-08-24 Richard Biener <rguenther@suse.de>
4186 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
4187 load_p to ldst_p, fix mistakes and rely on
4188 STMT_VINFO_DATA_REF.
4190 2023-08-24 Jan Hubicka <jh@suse.cz>
4192 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
4193 of newly build trap bb.
4195 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4197 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
4198 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
4199 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
4201 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
4203 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
4204 * config/riscv/riscv.cc (riscv_option_override): Set sched
4207 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
4209 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
4211 2023-08-24 Richard Biener <rguenther@suse.de>
4213 PR tree-optimization/111125
4214 * tree-vect-slp.cc (vect_slp_function): Split at novector
4215 loop entry, do not push blocks in novector loops.
4217 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
4219 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
4221 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4223 * genmatch.cc (decision_tree::gen): Support
4224 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
4225 * gimple-match-exports.cc (gimple_simplify): Ditto.
4226 (gimple_resimplify6): New function.
4227 (gimple_resimplify7): New function.
4228 (gimple_match_op::resimplify): Support
4229 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
4230 (convert_conditional_op): Ditto.
4231 (build_call_internal): Ditto.
4232 (try_conditional_simplification): Ditto.
4233 (gimple_extract): Ditto.
4234 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
4235 * internal-fn.cc (CASE): Ditto.
4237 2023-08-24 Richard Biener <rguenther@suse.de>
4239 PR tree-optimization/111115
4240 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
4241 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
4243 * tree-vect-slp.cc (arg3_arg2_map): New.
4244 (vect_get_operand_map): Handle IFN_MASK_STORE.
4245 (vect_slp_child_index_for_operand): New function.
4246 (vect_build_slp_tree_1): Handle statements with no LHS,
4248 (vect_remove_slp_scalar_calls): Likewise.
4249 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
4250 SLP child corresponding to the ifn value index.
4251 (vectorizable_store): Likewise for the mask index. Support
4253 (vectorizable_load): Lookup the SLP child corresponding to the
4256 2023-08-24 Richard Biener <rguenther@suse.de>
4258 PR tree-optimization/111125
4259 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
4260 for the remain_defs processing.
4262 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
4264 * config/aarch64/aarch64.cc: Include ssa.h.
4265 (aarch64_multiply_add_p): Require the second operand of an
4266 Advanced SIMD subtraction to be a multiplication. Assume that
4267 such an operation won't be fused if the second operand is used
4268 multiple times and if the first operand is also a multiplication.
4270 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4272 * tree-vect-loop.cc (vectorizable_reduction): Apply
4273 LEN_FOLD_EXTRACT_LAST.
4274 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
4276 2023-08-24 Richard Biener <rguenther@suse.de>
4278 PR tree-optimization/111128
4279 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
4280 Emit external shift operand inline if we promoted it with
4281 another pattern stmt.
4283 2023-08-24 Pan Li <pan2.li@intel.com>
4285 * config/riscv/autovec.md: Fix typo.
4287 2023-08-24 Pan Li <pan2.li@intel.com>
4289 * config/riscv/riscv-vector-builtins-bases.cc
4290 (class binop_frm): Removed.
4291 (class reverse_binop_frm): Ditto.
4292 (class widen_binop_frm): Ditto.
4293 (class vfmacc_frm): Ditto.
4294 (class vfnmacc_frm): Ditto.
4295 (class vfmsac_frm): Ditto.
4296 (class vfnmsac_frm): Ditto.
4297 (class vfmadd_frm): Ditto.
4298 (class vfnmadd_frm): Ditto.
4299 (class vfmsub_frm): Ditto.
4300 (class vfnmsub_frm): Ditto.
4301 (class vfwmacc_frm): Ditto.
4302 (class vfwnmacc_frm): Ditto.
4303 (class vfwmsac_frm): Ditto.
4304 (class vfwnmsac_frm): Ditto.
4305 (class unop_frm): Ditto.
4306 (class vfrec7_frm): Ditto.
4307 (class binop): Add frm_op_type template arg.
4308 (class unop): Ditto.
4309 (class widen_binop): Ditto.
4310 (class widen_binop_fp): Ditto.
4311 (class reverse_binop): Ditto.
4312 (class vfmacc): Ditto.
4313 (class vfnmsac): Ditto.
4314 (class vfmadd): Ditto.
4315 (class vfnmsub): Ditto.
4316 (class vfnmacc): Ditto.
4317 (class vfmsac): Ditto.
4318 (class vfnmadd): Ditto.
4319 (class vfmsub): Ditto.
4320 (class vfwmacc): Ditto.
4321 (class vfwnmacc): Ditto.
4322 (class vfwmsac): Ditto.
4323 (class vfwnmsac): Ditto.
4324 (class float_misc): Ditto.
4326 2023-08-24 Andrew Pinski <apinski@marvell.com>
4328 PR tree-optimization/111109
4329 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
4330 Add check to make sure cmp and icmp are inverse.
4332 2023-08-24 Andrew Pinski <apinski@marvell.com>
4334 PR tree-optimization/95929
4335 * match.pd (convert?(-a)): New pattern
4336 for 1bit integer types.
4338 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4341 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4343 * common/config/i386/cpuinfo.h (get_available_features):
4344 Add avx10_set and version and detect avx10.1.
4345 (cpu_indicator_init): Handle avx10.1-512.
4346 * common/config/i386/i386-common.cc
4347 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
4348 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
4349 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
4350 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
4351 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
4352 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
4354 * common/config/i386/i386-cpuinfo.h (enum processor_features):
4355 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
4356 FEATURE_AVX10_512BIT.
4357 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
4358 AVX10_512BIT, AVX10_1 and AVX10_1_512.
4359 * config/i386/constraints.md (Yk): Add AVX10_1.
4362 * config/i386/cpuid.h (bit_AVX10): New.
4363 (bit_AVX10_256): Ditto.
4364 (bit_AVX10_512): Ditto.
4365 * config/i386/i386-c.cc (ix86_target_macros_internal):
4366 Define AVX10_512BIT and AVX10_1.
4367 * config/i386/i386-isa.def
4368 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
4369 (AVX10_1): Add DEF_PTA(AVX10_1).
4370 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
4371 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
4373 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
4374 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
4375 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
4376 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
4377 (ix86_conditional_register_usage): Ditto.
4378 (ix86_hard_regno_mode_ok): Ditto.
4379 (ix86_rtx_costs): Ditto.
4380 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
4381 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
4383 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
4384 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
4385 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
4388 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4391 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4393 * common/config/i386/i386-common.cc
4394 (ix86_check_avx10): New function to check isa_flags and
4395 isa_flags_explicit to emit warning when AVX10 is enabled
4397 (ix86_check_avx512): New function to check isa_flags and
4398 isa_flags_explicit to emit warning when AVX512 is enabled
4400 (ix86_handle_option): Do not change the flags when warning
4402 * config/i386/driver-i386.cc (host_detect_local_cpu):
4403 Do not append -mno-avx10.1 for -march=native.
4405 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4408 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4410 * common/config/i386/i386-common.cc
4411 (ix86_check_avx10_vector_width): New function to check isa_flags
4412 to emit a warning when there is a conflict in AVX10 options for
4414 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
4415 * config/i386/driver-i386.cc (host_detect_local_cpu):
4416 Do not append -mno-avx10-max-512bit for -march=native.
4418 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4421 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4423 * config/i386/avx512vldqintrin.h: Remove target attribute.
4424 * config/i386/i386-builtin.def (BDESC):
4425 Add OPTION_MASK_ISA2_AVX10_1.
4426 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
4427 * config/i386/i386-expand.cc
4428 (ix86_check_builtin_isa_match): Ditto.
4429 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
4430 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
4431 and avx10_1_or_avx512vl.
4432 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
4433 (VF1_128_256VLDQ_AVX10_1): Ditto.
4434 (VI8_AVX512VLDQ_AVX10_1): Ditto.
4435 (<sse>_andnot<mode>3<mask_name>):
4436 Add TARGET_AVX10_1 and change isa attr from avx512dq to
4437 avx10_1_or_avx512dq.
4438 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
4439 avx512vl to avx10_1_or_avx512vl.
4440 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
4441 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
4442 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
4444 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
4446 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
4447 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
4448 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
4450 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
4451 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
4452 Remove target check.
4453 (avx512dq_mul<mode>3<mask_name>): Ditto.
4454 (*avx512dq_mul<mode>3<mask_name>): Ditto.
4455 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
4456 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
4457 Remove target check.
4458 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
4459 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
4460 Remove target check.
4461 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
4462 (mask_avx512vl_condition): Ditto.
4465 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4468 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4470 * config/i386/avx512vldqintrin.h: Remove target attribute.
4471 * config/i386/i386-builtin.def (BDESC):
4472 Add OPTION_MASK_ISA2_AVX10_1.
4473 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
4474 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
4475 (VI48_AVX512VLDQ_AVX10_1): Ditto.
4476 (VF2_AVX512VL): Remove.
4477 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
4479 (*<code><mode>3<mask_name>): Change isa attribute to
4480 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
4481 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
4482 to avx10_1_or_avx512vl.
4483 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
4484 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
4485 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
4487 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
4488 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
4489 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
4491 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
4492 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
4493 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
4494 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
4495 (float<floatunssuffix>v4div4sf2<mask_name>):
4497 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
4498 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
4499 (float<floatunssuffix>v2div2sf2): Ditto.
4500 (float<floatunssuffix>v2div2sf2_mask): Ditto.
4501 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
4502 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
4503 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
4504 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
4505 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
4506 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
4507 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
4508 Change when constraint is enabled.
4510 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4513 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4515 * config/i386/avx512vldqintrin.h: Remove target attribute.
4516 * config/i386/i386-builtin.def (BDESC):
4517 Add OPTION_MASK_ISA2_AVX10_1.
4518 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
4519 (VFH_AVX512VLDQ_AVX10_1): Ditto.
4520 (VF1_AVX512VLDQ_AVX10_1): Ditto.
4521 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
4522 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
4523 (vec_pack<floatprefix>_float_<mode>): Change iterator to
4524 VI8_AVX512VLDQ_AVX10_1. Remove target check.
4525 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
4526 VF1_AVX512VLDQ_AVX10_1. Remove target check.
4527 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
4528 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
4529 (avx512vl_vextractf128<mode>): Change iterator to
4530 VI48F_256_DQVL_AVX10_1. Remove target check.
4531 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
4532 (vec_extract_hi_<mode>): Ditto.
4533 (avx512vl_vinsert<mode>): Ditto.
4534 (vec_set_lo_<mode><mask_name>): Ditto.
4535 (vec_set_hi_<mode><mask_name>): Ditto.
4536 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
4537 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
4538 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
4539 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
4540 * config/i386/subst.md (mask_avx512dq_condition): Add
4542 (mask_scalar_merge): Ditto.
4544 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4547 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
4550 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
4553 2023-08-24 Richard Biener <rguenther@suse.de>
4556 * dwarf2out.cc (prune_unused_types_walk): Handle
4557 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
4558 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
4559 and DW_TAG_dynamic_type as to only output them when referenced.
4561 2023-08-24 liuhongt <hongtao.liu@intel.com>
4563 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
4566 2023-08-24 liuhongt <hongtao.liu@intel.com>
4568 * common/config/i386/i386-common.cc (processor_names): Add new
4569 member graniterapids-s and arrowlake-s.
4570 * config/i386/i386-options.cc (processor_alias_table): Update
4571 table with PROCESSOR_ARROWLAKE_S and
4572 PROCESSOR_GRANITERAPIDS_D.
4573 (m_GRANITERAPID_D): New macro.
4574 (m_ARROWLAKE_S): Ditto.
4575 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
4576 (processor_cost_table): Add icelake_cost for
4577 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
4578 PROCESSOR_ARROWLAKE_S.
4579 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
4581 * config/i386/i386.h (enum processor_type): Add new member
4582 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
4583 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
4584 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
4586 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
4588 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
4589 to help simplify code further.
4591 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
4593 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
4594 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
4595 Initialize using a range instead of value and edge.
4596 (phi_group::calculate_using_modifier): Use initializer value and
4597 process for relations after trying for iteration convergence.
4598 (phi_group::refine_using_relation): Use initializer range.
4599 (phi_group::dump): Rework the dump output.
4600 (phi_analyzer::process_phi): Allow multiple constant initilizers.
4601 Dump groups immediately as created.
4602 (phi_analyzer::dump): Tweak output.
4603 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
4604 (phi_group::initial_value): Delete.
4605 (phi_group::refine_using_relation): Adjust prototype.
4606 (phi_group::m_initial_value): Delete.
4607 (phi_group::m_initial_edge): Delete.
4608 (phi_group::m_vr): Use int_range_max.
4609 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
4611 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
4613 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
4614 no group was created.
4615 (phi_analyzer::process_phi): Do not create groups of one phi node.
4617 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
4619 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
4620 CODE, CMP_CODE and BIT_CODE arguments.
4621 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
4622 (aarch64_gen_ccmp_next): Likewise.
4623 * doc/tm.texi: Regenerated.
4625 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
4627 * coretypes.h (rtx_code): Add forward declaration.
4628 * rtl.h (rtx_code): Make compatible with forward declaration.
4630 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
4633 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
4634 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
4635 DWIH mode iterator. Disable (=&r,m,m) alternative for
4637 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
4638 alternative for 32-bit targets.
4640 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
4642 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
4643 appropriate type attribute.
4645 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
4647 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
4648 (*copysign<mode>_neg): Ditto.
4649 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
4650 (<optab><mode>2): Ditto.
4651 (cond_<optab><mode>): New.
4652 (cond_len_<optab><mode>): Ditto.
4653 * config/riscv/riscv-protos.h (enum insn_type): New.
4654 (expand_cond_len_unop): New helper func.
4655 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
4656 (expand_cond_len_unop): New helper func.
4658 2023-08-23 Jan Hubicka <jh@suse.cz>
4660 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
4661 (should_duplicate_loop_header_p): Fix return value for static exits.
4662 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
4664 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
4666 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
4667 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
4668 and update the final nest accordingly.
4670 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
4672 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
4673 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
4674 and update the final nest accordingly.
4676 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
4678 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
4679 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
4680 gvec_oprnds with auto_delete_vec.
4682 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4684 * config/riscv/riscv-vsetvl.cc
4685 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
4687 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4689 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
4691 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
4693 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4695 * config/riscv/vector.md: Add attribute.
4697 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4699 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
4700 (vector_infos_manager::all_same_ratio_p): Ditto.
4701 (vector_infos_manager::all_same_avl_p): Ditto.
4702 (pass_vsetvl::refine_vsetvls): Ditto.
4703 (pass_vsetvl::cleanup_vsetvls): Ditto.
4704 (pass_vsetvl::commit_vsetvls): Ditto.
4705 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
4706 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
4707 (pass_vsetvl::compute_probabilities): Ditto.
4709 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4711 * config/riscv/t-riscv: Add riscv-vsetvl.def
4713 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
4715 * config/riscv/riscv.opt: Add --param names
4716 riscv-autovec-preference and riscv-autovec-lmul
4718 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
4720 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
4722 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
4724 * tree-core.h (enum omp_clause_defaultmap_kind): Add
4725 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
4726 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
4727 * tree-pretty-print.cc (dump_omp_clause): Likewise.
4729 2023-08-22 Jakub Jelinek <jakub@redhat.com>
4732 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
4733 types aren't supported in C++.
4735 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4737 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
4738 * internal-fn.cc (fold_len_extract_direct): Ditto.
4739 (expand_fold_len_extract_optab_fn): Ditto.
4740 (direct_fold_len_extract_optab_supported_p): Ditto.
4741 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
4742 * optabs.def (OPTAB_D): Ditto.
4744 2023-08-22 Richard Biener <rguenther@suse.de>
4746 * tree-vect-stmts.cc (vectorizable_store): Do not bump
4747 DR_GROUP_STORE_COUNT here. Remove early out.
4748 (vect_transform_stmt): Only call vectorizable_store on
4749 the last element of an interleaving chain.
4751 2023-08-22 Richard Biener <rguenther@suse.de>
4753 PR tree-optimization/94864
4754 PR tree-optimization/94865
4755 PR tree-optimization/93080
4756 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
4757 for vector insertion from vector extraction.
4759 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4760 Kewen.Lin <linkw@linux.ibm.com>
4762 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
4763 (vectorizable_live_operation): Add live vectorization for length loop
4766 2023-08-22 David Malcolm <dmalcolm@redhat.com>
4769 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
4771 2023-08-22 Pan Li <pan2.li@intel.com>
4773 * config/riscv/riscv-vector-builtins-bases.cc
4774 (vfwredusum_frm_obj): New declaration.
4776 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4777 * config/riscv/riscv-vector-builtins-functions.def
4778 (vfwredusum_frm): New intrinsic function def.
4780 2023-08-21 David Faust <david.faust@oracle.com>
4782 * config/bpf/bpf.md (neg): Second operand must be a register.
4784 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
4786 * config/riscv/bitmanip.md: Added bitmanip type to insns
4787 that are missing types.
4789 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
4791 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
4794 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
4796 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
4797 Fix format specifier.
4799 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
4801 * value-range.cc (frange::union_nans): Return false if nothing
4803 (range_tests_floats): New test.
4805 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
4807 PR tree-optimization/111048
4808 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
4810 (fold_vec_perm_cst): Remove workaround and again call
4811 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
4812 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
4814 2023-08-21 Richard Biener <rguenther@suse.de>
4816 PR tree-optimization/111082
4817 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
4818 pun operations that can overflow.
4820 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4822 * lcm.cc (compute_antinout_edge): Export as global use.
4823 (compute_earliest): Ditto.
4824 (compute_rev_insert_delete): Ditto.
4825 * lcm.h (compute_antinout_edge): Ditto.
4826 (compute_earliest): Ditto.
4828 2023-08-21 Richard Biener <rguenther@suse.de>
4830 PR tree-optimization/111070
4831 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
4832 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
4834 2023-08-21 Andrew Pinski <apinski@marvell.com>
4836 PR tree-optimization/111002
4837 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
4839 2023-08-21 liuhongt <hongtao.liu@intel.com>
4841 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
4843 * common/config/i386/i386-common.cc (alias_table): Support
4844 -march=gracemont as an alias of -march=alderlake.
4846 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
4848 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
4849 instead of src in the call to ix86_expand_sse_cmp.
4850 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
4851 force operands[1] to a register.
4852 (<any_extend:insn>v4hiv4si2): Ditto.
4853 (<any_extend:insn>v2siv2di2): Ditto.
4855 2023-08-20 Andrew Pinski <apinski@marvell.com>
4857 PR tree-optimization/111006
4858 PR tree-optimization/110986
4859 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
4861 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
4864 * Makefile.in: improve error message when /usr/include is
4867 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
4869 PR middle-end/111017
4870 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
4871 to expand_omp_build_cond for 'factor != 0' condition, resulting
4872 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
4874 2023-08-19 Guo Jie <guojie@loongson.cn>
4875 Lulu Cheng <chenglulu@loongson.cn>
4877 * config/loongarch/t-loongarch: Add loongarch-driver.h into
4878 TM_H. Add loongarch-def.h and loongarch-tune.h into
4881 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
4884 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
4885 Also handle V2QImode.
4886 (ix86_expand_sse_extend): New function.
4887 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
4888 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
4889 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
4890 (<any_extend:insn>v2hiv2si2): Ditto.
4891 (<any_extend:insn>v2qiv2hi2): Ditto.
4892 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
4893 (<any_extend:insn>v4hiv4si2): Ditto.
4894 (<any_extend:insn>v2siv2di2): Ditto.
4896 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
4899 * value-range.cc (irange::union_bitmask): Return FALSE if updated
4900 bitmask is semantically equivalent to the original mask.
4901 (irange::intersect_bitmask): Same.
4902 (irange::get_bitmask): Add comment.
4904 2023-08-18 Richard Biener <rguenther@suse.de>
4906 PR tree-optimization/111019
4907 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
4908 also scrap base and offset in case the ref is indirect.
4910 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
4912 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
4914 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
4917 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
4919 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
4921 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
4923 (vectorizable_store): ... here.
4925 2023-08-18 Richard Biener <rguenther@suse.de>
4927 PR tree-optimization/111048
4928 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
4931 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
4934 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
4937 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
4939 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
4940 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
4941 and update the final nest accordingly.
4943 2023-08-18 Andrew Pinski <apinski@marvell.com>
4945 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
4946 cond_len_neg and cond_len_one_cmpl.
4948 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
4950 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
4951 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
4952 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
4953 (*local_pic_load_32d<ANYF:mode>): Ditto.
4954 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
4955 (*local_pic_store<ANYF:mode>): Ditto.
4956 (*local_pic_store<ANYLSF:mode>): Ditto.
4957 (*local_pic_store_32d<ANYF:mode>): Ditto.
4958 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
4960 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
4961 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4963 * config/riscv/predicates.md (vector_const_0_operand): New.
4964 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
4966 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
4968 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
4971 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
4973 PR tree-optimization/111009
4974 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
4976 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
4978 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
4979 slots_num initialization from here ...
4980 (lra_spill): ... to here before the 1st call of
4981 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
4984 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
4987 * doc/invoke.texi (Option Summary): Mention
4988 -Wcompare-distinct-pointer-types under `Warning Options'.
4989 (Warning Options): Document -Wcompare-distinct-pointer-types.
4991 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
4993 * recog.cc (memory_address_addr_space_p): Mark possibly unused
4996 2023-08-17 Richard Biener <rguenther@suse.de>
4998 PR tree-optimization/111039
4999 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
5000 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
5002 2023-08-17 Alex Coplan <alex.coplan@arm.com>
5004 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
5006 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
5009 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
5010 `naked' function attribute.
5011 (bpf_warn_func_return): New function.
5012 (TARGET_WARN_FUNC_RETURN): Define.
5013 (bpf_expand_prologue): Add preventive comment.
5014 (bpf_expand_epilogue): Likewise.
5015 * doc/extend.texi (BPF Function Attributes): Document the `naked'
5018 2023-08-17 Richard Biener <rguenther@suse.de>
5020 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
5021 !needs_fold_left_reduction_p to decide whether we can
5022 handle the reduction with association.
5023 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
5024 reductions perform all arithmetic in an unsigned type.
5026 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5028 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
5030 * configure: Regenerate.
5032 2023-08-17 Pan Li <pan2.li@intel.com>
5034 * config/riscv/riscv-vector-builtins-bases.cc
5035 (widen_freducop): Add frm_opt_type template arg.
5036 (vfwredosum_frm_obj): New declaration.
5038 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5039 * config/riscv/riscv-vector-builtins-functions.def
5040 (vfwredosum_frm): New intrinsic function def.
5042 2023-08-17 Pan Li <pan2.li@intel.com>
5044 * config/riscv/riscv-vector-builtins-bases.cc
5045 (vfredosum_frm_obj): New declaration.
5047 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5048 * config/riscv/riscv-vector-builtins-functions.def
5049 (vfredosum_frm): New intrinsic function def.
5051 2023-08-17 Pan Li <pan2.li@intel.com>
5053 * config/riscv/riscv-vector-builtins-bases.cc
5054 (class freducop): Add frm_op_type template arg.
5055 (vfredusum_frm_obj): New declaration.
5057 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5058 * config/riscv/riscv-vector-builtins-functions.def
5059 (vfredusum_frm): New intrinsic function def.
5060 * config/riscv/riscv-vector-builtins-shapes.cc
5061 (struct reduc_alu_frm_def): New class for frm shape.
5062 (SHAPE): New declaration.
5063 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
5065 2023-08-17 Pan Li <pan2.li@intel.com>
5067 * config/riscv/riscv-vector-builtins-bases.cc
5068 (class vfncvt_f): Add frm_op_type template arg.
5069 (vfncvt_f_frm_obj): New declaration.
5071 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5072 * config/riscv/riscv-vector-builtins-functions.def
5073 (vfncvt_f_frm): New intrinsic function def.
5075 2023-08-17 Pan Li <pan2.li@intel.com>
5077 * config/riscv/riscv-vector-builtins-bases.cc
5078 (vfncvt_xu_frm_obj): New declaration.
5080 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5081 * config/riscv/riscv-vector-builtins-functions.def
5082 (vfncvt_xu_frm): New intrinsic function def.
5084 2023-08-17 Pan Li <pan2.li@intel.com>
5086 * config/riscv/riscv-vector-builtins-bases.cc
5087 (class vfncvt_x): Add frm_op_type template arg.
5088 (BASE): New declaration.
5089 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5090 * config/riscv/riscv-vector-builtins-functions.def
5091 (vfncvt_x_frm): New intrinsic function def.
5092 * config/riscv/riscv-vector-builtins-shapes.cc
5093 (struct narrow_alu_frm_def): New shape function for frm.
5094 (SHAPE): New declaration.
5095 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
5097 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5099 * config/i386/avx512vldqintrin.h: Remove target attribute.
5100 * config/i386/i386-builtin.def (BDESC):
5101 Add OPTION_MASK_ISA2_AVX10_1.
5102 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
5103 (VFH_AVX512VLDQ_AVX10_1): Ditto.
5104 (VF1_AVX512VLDQ_AVX10_1): Ditto.
5105 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
5106 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5107 (vec_pack<floatprefix>_float_<mode>): Change iterator to
5108 VI8_AVX512VLDQ_AVX10_1. Remove target check.
5109 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
5110 VF1_AVX512VLDQ_AVX10_1. Remove target check.
5111 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5112 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
5113 (avx512vl_vextractf128<mode>): Change iterator to
5114 VI48F_256_DQVL_AVX10_1. Remove target check.
5115 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
5116 (vec_extract_hi_<mode>): Ditto.
5117 (avx512vl_vinsert<mode>): Ditto.
5118 (vec_set_lo_<mode><mask_name>): Ditto.
5119 (vec_set_hi_<mode><mask_name>): Ditto.
5120 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
5121 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
5122 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
5123 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5124 * config/i386/subst.md (mask_avx512dq_condition): Add
5126 (mask_scalar_merge): Ditto.
5128 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5130 * config/i386/avx512vldqintrin.h: Remove target attribute.
5131 * config/i386/i386-builtin.def (BDESC):
5132 Add OPTION_MASK_ISA2_AVX10_1.
5133 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
5134 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
5135 (VI48_AVX512VLDQ_AVX10_1): Ditto.
5136 (VF2_AVX512VL): Remove.
5137 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
5139 (*<code><mode>3<mask_name>): Change isa attribute to
5140 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
5141 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
5142 to avx10_1_or_avx512vl.
5143 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
5144 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5145 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
5147 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
5148 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5149 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
5151 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
5152 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5153 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
5154 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5155 (float<floatunssuffix>v4div4sf2<mask_name>):
5157 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5158 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5159 (float<floatunssuffix>v2div2sf2): Ditto.
5160 (float<floatunssuffix>v2div2sf2_mask): Ditto.
5161 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
5162 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
5163 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
5164 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
5165 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
5166 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
5167 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
5168 Change when constraint is enabled.
5170 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5173 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
5174 (second_sew_less_than_first_sew_p): Fix bug.
5175 (first_sew_less_than_second_sew_p): Ditto.
5177 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5179 * config/i386/avx512vldqintrin.h: Remove target attribute.
5180 * config/i386/i386-builtin.def (BDESC):
5181 Add OPTION_MASK_ISA2_AVX10_1.
5182 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
5183 * config/i386/i386-expand.cc
5184 (ix86_check_builtin_isa_match): Ditto.
5185 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
5186 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
5187 and avx10_1_or_avx512vl.
5188 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
5189 (VF1_128_256VLDQ_AVX10_1): Ditto.
5190 (VI8_AVX512VLDQ_AVX10_1): Ditto.
5191 (<sse>_andnot<mode>3<mask_name>):
5192 Add TARGET_AVX10_1 and change isa attr from avx512dq to
5193 avx10_1_or_avx512dq.
5194 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
5195 avx512vl to avx10_1_or_avx512vl.
5196 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
5197 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5198 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5200 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5202 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
5203 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5204 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
5206 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
5207 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
5208 Remove target check.
5209 (avx512dq_mul<mode>3<mask_name>): Ditto.
5210 (*avx512dq_mul<mode>3<mask_name>): Ditto.
5211 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5212 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
5213 Remove target check.
5214 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5215 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
5216 Remove target check.
5217 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
5218 (mask_avx512vl_condition): Ditto.
5221 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5223 * common/config/i386/i386-common.cc
5224 (ix86_check_avx10_vector_width): New function to check isa_flags
5225 to emit a warning when there is a conflict in AVX10 options for
5227 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
5228 * config/i386/driver-i386.cc (host_detect_local_cpu):
5229 Do not append -mno-avx10-max-512bit for -march=native.
5231 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5233 * common/config/i386/i386-common.cc
5234 (ix86_check_avx10): New function to check isa_flags and
5235 isa_flags_explicit to emit warning when AVX10 is enabled
5237 (ix86_check_avx512): New function to check isa_flags and
5238 isa_flags_explicit to emit warning when AVX512 is enabled
5240 (ix86_handle_option): Do not change the flags when warning
5242 * config/i386/driver-i386.cc (host_detect_local_cpu):
5243 Do not append -mno-avx10.1 for -march=native.
5245 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5247 * common/config/i386/cpuinfo.h (get_available_features):
5248 Add avx10_set and version and detect avx10.1.
5249 (cpu_indicator_init): Handle avx10.1-512.
5250 * common/config/i386/i386-common.cc
5251 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
5252 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
5253 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
5254 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
5255 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
5256 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
5258 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5259 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
5260 FEATURE_AVX10_512BIT.
5261 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5262 AVX10_512BIT, AVX10_1 and AVX10_1_512.
5263 * config/i386/constraints.md (Yk): Add AVX10_1.
5266 * config/i386/cpuid.h (bit_AVX10): New.
5267 (bit_AVX10_256): Ditto.
5268 (bit_AVX10_512): Ditto.
5269 * config/i386/i386-c.cc (ix86_target_macros_internal):
5270 Define AVX10_512BIT and AVX10_1.
5271 * config/i386/i386-isa.def
5272 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
5273 (AVX10_1): Add DEF_PTA(AVX10_1).
5274 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
5275 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
5277 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
5278 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
5279 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
5280 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
5281 (ix86_conditional_register_usage): Ditto.
5282 (ix86_hard_regno_mode_ok): Ditto.
5283 (ix86_rtx_costs): Ditto.
5284 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
5285 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
5287 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
5288 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
5289 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
5292 2023-08-17 Sergei Trofimovich <siarheit@google.com>
5294 * flag-types.h (vrp_mode): Remove unused.
5296 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
5298 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
5301 2023-08-17 Andrew Pinski <apinski@marvell.com>
5303 * internal-fn.def (COND_NOT): New internal function.
5304 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
5306 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
5307 into conditional not.
5308 * optabs.def (cond_one_cmpl): New optab.
5309 (cond_len_one_cmpl): Likewise.
5311 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
5313 PR rtl-optimization/110254
5314 * ira-color.cc (improve_allocation): Update array
5315 allocated_hard_reg_p.
5317 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
5319 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
5320 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
5321 (lra_update_fp2sp_elimination): Ditto.
5322 (update_reg_eliminate): Adjust spill_pseudos call.
5323 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
5324 in lra_update_fp2sp_elimination.
5326 2023-08-16 Richard Ball <richard.ball@arm.com>
5328 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
5329 * config/aarch64/aarch64-tune.md: Regenerate.
5330 * doc/invoke.texi: Document Cortex-A720 CPU.
5332 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
5334 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
5336 (<u>avg<v_double_trunc>3_ceil): Ditto.
5337 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
5340 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
5342 * internal-fn.cc (vec_extract_direct): Change type argument
5344 (expand_vec_extract_optab_fn): Call convert_optab_fn.
5345 (direct_vec_extract_optab_supported_p): Use
5346 convert_optab_supported_p.
5348 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
5349 Richard Sandiford <richard.sandiford@arm.com>
5351 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
5352 (valid_mask_for_fold_vec_perm_cst_p): New function.
5353 (fold_vec_perm_cst): Likewise.
5354 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
5355 (test_fold_vec_perm_cst): New namespace.
5356 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
5357 (test_fold_vec_perm_cst::validate_res): Likewise.
5358 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
5359 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
5360 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
5361 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
5362 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
5363 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
5364 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
5365 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
5366 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
5367 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
5368 (test_fold_vec_perm_cst::test): Likewise.
5369 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
5371 2023-08-16 Pan Li <pan2.li@intel.com>
5373 * config/riscv/riscv-vector-builtins-bases.cc
5374 (BASE): New declaration.
5375 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5376 * config/riscv/riscv-vector-builtins-functions.def
5377 (vfwcvt_xu_frm): New intrinsic function def.
5379 2023-08-16 Pan Li <pan2.li@intel.com>
5381 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
5383 2023-08-16 Pan Li <pan2.li@intel.com>
5385 * config/riscv/riscv-vector-builtins-bases.cc
5386 (BASE): New declaration.
5387 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5388 * config/riscv/riscv-vector-builtins-functions.def
5389 (vfwcvt_x_frm): New intrinsic function def.
5391 2023-08-16 Pan Li <pan2.li@intel.com>
5393 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
5394 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5395 * config/riscv/riscv-vector-builtins-functions.def
5396 (vfcvt_f_frm): New intrinsic function def.
5398 2023-08-16 Pan Li <pan2.li@intel.com>
5400 * config/riscv/riscv-vector-builtins-bases.cc
5401 (BASE): New declaration.
5402 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5403 * config/riscv/riscv-vector-builtins-functions.def
5404 (vfcvt_xu_frm): New intrinsic function def..
5406 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
5409 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
5410 extract when the element is 7 on BE while 8 on LE for byte or 3 on
5411 BE while 4 on LE for halfword.
5413 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
5416 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
5418 (vsx_extract_v4si): New expand for V4SI extraction.
5419 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
5420 word 1 from BE order.
5421 (*mfvsrwz): New insn pattern for mfvsrwz.
5422 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
5423 word 1 from BE order.
5424 (*vsx_extract_si): Remove.
5425 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
5428 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5430 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
5432 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
5433 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
5434 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
5435 (expand_lanes_load_store): New function.
5436 * config/riscv/vector-iterators.md: New iterator.
5438 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5440 * internal-fn.cc (internal_load_fn_p): Apply
5441 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
5442 (internal_store_fn_p): Ditto.
5443 (internal_fn_len_index): Ditto.
5444 (internal_fn_mask_index): Ditto.
5445 (internal_fn_stored_value_index): Ditto.
5446 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
5447 (vect_load_lanes_supported): Ditto.
5448 * tree-vect-loop.cc: Ditto.
5449 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
5450 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
5451 (get_group_load_store_type): Ditto.
5452 (vectorizable_store): Ditto.
5453 (vectorizable_load): Ditto.
5454 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
5455 (vect_load_lanes_supported): Ditto.
5457 2023-08-16 Pan Li <pan2.li@intel.com>
5459 * config/riscv/riscv-vector-builtins-bases.cc
5460 (enum frm_op_type): New type for frm.
5461 (BASE): New declaration.
5462 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5463 * config/riscv/riscv-vector-builtins-functions.def
5464 (vfcvt_x_frm): New intrinsic function def.
5466 2023-08-16 liuhongt <hongtao.liu@intel.com>
5468 * config/i386/i386-builtins.cc
5469 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
5470 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
5471 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
5472 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
5473 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
5474 for use_scatter_8parts
5475 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
5476 (TARGET_USE_GATHER_8PARTS): .. this.
5477 (TARGET_USE_SCATTER): Rename to ..
5478 (TARGET_USE_SCATTER_8PARTS): .. this.
5479 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
5480 (X86_TUNE_USE_GATHER_8PARTS): .. this.
5481 (X86_TUNE_USE_SCATTER): Rename to
5482 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
5483 * config/i386/i386.opt: Add new options mgather, mscatter.
5485 2023-08-16 liuhongt <hongtao.liu@intel.com>
5487 * config/i386/i386-options.cc (m_GDS): New macro.
5488 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
5490 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
5491 (X86_TUNE_USE_GATHER): Ditto.
5493 2023-08-16 liuhongt <hongtao.liu@intel.com>
5495 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
5496 vmovsd when moving DFmode between SSE_REGS.
5497 (movhi_internal): Generate vmovdqa instead of vmovsh when
5498 moving HImode between SSE_REGS.
5499 (mov<mode>_internal): Use vmovaps instead of vmovsh when
5500 moving HF/BFmode between SSE_REGS.
5502 2023-08-15 David Faust <david.faust@oracle.com>
5504 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
5506 2023-08-15 David Faust <david.faust@oracle.com>
5509 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
5510 for any mode 32-bits or smaller, not just SImode.
5512 2023-08-15 Martin Jambor <mjambor@suse.cz>
5516 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
5517 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
5518 (ipcp_transform_function): Do not deallocate transformation info.
5519 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
5521 (vn_reference_lookup_2): When hitting default-def vuse, query
5522 IPA-CP transformation info for any known constants.
5524 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
5525 Thomas Schwinge <thomas@codesourcery.com>
5527 * gimplify.cc (oacc_region_type_name): New function.
5528 (oacc_default_clause): If no 'default' clause appears on this
5529 compute construct, see if one appears on a lexically containing
5531 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
5532 ctx->oacc_default_clause_ctx to current context.
5534 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5537 * config/riscv/predicates.md: Fix predicate.
5539 2023-08-15 Richard Biener <rguenther@suse.de>
5541 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
5542 slp_inst_kind_ctor handling.
5543 (vect_analyze_slp): Simplify.
5544 (vect_build_slp_instance): Dump when we analyze a CTOR.
5545 (vect_slp_check_for_constructors): Rename to ...
5546 (vect_slp_check_for_roots): ... this. Register a
5547 slp_root for CONSTRUCTORs instead of shoving them to
5548 the set of grouped stores.
5549 (vect_slp_analyze_bb_1): Adjust.
5551 2023-08-15 Richard Biener <rguenther@suse.de>
5553 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
5555 (_slp_instance::remain_defs): ... this.
5556 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
5557 (SLP_INSTANCE_REMAIN_DEFS): ... this.
5558 (slp_root::remain): New.
5559 (slp_root::slp_root): Adjust.
5560 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
5561 (vect_build_slp_instance): Get extra remain parameter,
5562 adjust former handling of a cut off stmt.
5563 (vect_analyze_slp_instance): Adjust.
5564 (vect_analyze_slp): Likewise.
5565 (_bb_vec_info::~_bb_vec_info): Likewise.
5566 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
5567 (vect_slp_check_for_constructors): Handle non-internal
5568 defs as remain defs of a reduction.
5569 (vectorize_slp_instance_root_stmt): Adjust.
5571 2023-08-15 Richard Biener <rguenther@suse.de>
5573 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
5574 (canonicalize_loop_induction_variables): Use find_loop_location.
5576 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
5579 * config/cris/cris-protos.h: Revert recent change.
5580 * config/cris/cris.cc (cris_legitimate_address_p): Remove
5581 code_helper unused parameter.
5582 (cris_legitimate_address_p_hook): New wrapper function.
5583 (TARGET_LEGITIMATE_ADDRESS_P): Change to
5584 cris_legitimate_address_p_hook.
5586 2023-08-15 Richard Biener <rguenther@suse.de>
5588 PR tree-optimization/110963
5589 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
5590 a PHI node when the expression is available on all edges
5591 and we insert at most one copy from a constant.
5593 2023-08-15 Richard Biener <rguenther@suse.de>
5595 PR tree-optimization/110991
5596 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
5597 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
5598 that will end up constant.
5600 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
5603 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
5605 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
5607 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
5608 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
5609 and update the final nest accordingly.
5611 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
5613 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
5616 2023-08-15 Pan Li <pan2.li@intel.com>
5618 * mode-switching.cc (create_pre_exit): Add SET insn check.
5620 2023-08-15 Pan Li <pan2.li@intel.com>
5622 * config/riscv/riscv-vector-builtins-bases.cc
5623 (class vfrec7_frm): New class for frm.
5624 (vfrec7_frm_obj): New declaration.
5626 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5627 * config/riscv/riscv-vector-builtins-functions.def
5628 (vfrec7_frm): New intrinsic function definition.
5629 * config/riscv/vector-iterators.md
5630 (VFMISC): Remove VFREC7.
5632 (float_insn_type): Ditto.
5633 (VFMISC_FRM): New int iterator.
5634 (misc_frm_op): New op for frm.
5635 (float_frm_insn_type): New type for frm.
5636 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
5637 New pattern for misc frm.
5639 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
5641 * lra-constraints.cc (curr_insn_transform): Process output stack
5642 pointer reloads before emitting reload insns.
5644 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
5647 * doc/invoke.texi: Add documentation of
5648 fanalyzer-show-events-in-system-headers
5650 2023-08-14 Jan Hubicka <jh@suse.cz>
5652 PR gcov-profile/110988
5653 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
5655 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
5657 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
5658 Enable compressed builtins when ZC* extensions enabled.
5659 * config/riscv/riscv-shorten-memrefs.cc:
5660 Enable shorten_memrefs pass when ZC* extensions enabled.
5661 * config/riscv/riscv.cc (riscv_compressed_reg_p):
5662 Enable compressible registers when ZC* extensions enabled.
5663 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
5664 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
5665 (riscv_first_stack_step): Allow compression of the register saves
5666 without adding extra instructions.
5667 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
5668 to 16 bits when ZC* extensions enabled.
5670 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
5672 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
5673 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
5680 (TARGET_ZCA): New target.
5681 (TARGET_ZCB): Ditto.
5682 (TARGET_ZCE): Ditto.
5683 (TARGET_ZCF): Ditto.
5684 (TARGET_ZCD): Ditto.
5685 (TARGET_ZCMP): Ditto.
5686 (TARGET_ZCMT): Ditto.
5687 * config/riscv/riscv.opt: New target variable.
5689 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5692 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
5694 * genrecog.cc (print_nonbool_test): Fix type error of
5695 switch (SUBREG_BYTE (op))'.
5697 2023-08-14 Richard Biener <rguenther@suse.de>
5699 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
5701 2023-08-14 Pan Li <pan2.li@intel.com>
5703 * config/riscv/riscv-vector-builtins-bases.cc
5704 (class unop_frm): New class for frm.
5705 (vfsqrt_frm_obj): New declaration.
5707 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5708 * config/riscv/riscv-vector-builtins-functions.def
5709 (vfsqrt_frm): New intrinsic function definition.
5711 2023-08-14 Pan Li <pan2.li@intel.com>
5713 * config/riscv/riscv-vector-builtins-bases.cc
5714 (class vfwnmsac_frm): New class for frm.
5715 (vfwnmsac_frm_obj): New declaration.
5717 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5718 * config/riscv/riscv-vector-builtins-functions.def
5719 (vfwnmsac_frm): New intrinsic function definition.
5721 2023-08-14 Pan Li <pan2.li@intel.com>
5723 * config/riscv/riscv-vector-builtins-bases.cc
5724 (class vfwmsac_frm): New class for frm.
5725 (vfwmsac_frm_obj): New declaration.
5727 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5728 * config/riscv/riscv-vector-builtins-functions.def
5729 (vfwmsac_frm): New intrinsic function definition.
5731 2023-08-14 Pan Li <pan2.li@intel.com>
5733 * config/riscv/riscv-vector-builtins-bases.cc
5734 (class vfwnmacc_frm): New class for frm.
5735 (vfwnmacc_frm_obj): New declaration.
5737 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5738 * config/riscv/riscv-vector-builtins-functions.def
5739 (vfwnmacc_frm): New intrinsic function definition.
5741 2023-08-14 Cui, Lili <lili.cui@intel.com>
5743 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
5746 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
5748 * config/mmix/predicates.md (mmix_address_operand): Use
5749 lra_in_progress, not reload_in_progress.
5751 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
5753 * config/mmix/mmix.cc: Re-enable LRA.
5755 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
5757 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
5758 when lra_in_progress.
5760 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
5762 * config/mmix/mmix.cc: Disable LRA for MMIX.
5764 2023-08-14 Pan Li <pan2.li@intel.com>
5766 * config/riscv/riscv-vector-builtins-bases.cc
5767 (class vfwmacc_frm): New class for vfwmacc frm.
5768 (vfwmacc_frm_obj): New declaration.
5770 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5771 * config/riscv/riscv-vector-builtins-functions.def
5772 (vfwmacc_frm): Function definition for vfwmacc.
5773 * config/riscv/riscv-vector-builtins.cc
5774 (function_expander::use_widen_ternop_insn): Add frm support.
5776 2023-08-14 Pan Li <pan2.li@intel.com>
5778 * config/riscv/riscv-vector-builtins-bases.cc
5779 (class vfnmsub_frm): New class for vfnmsub frm.
5780 (vfnmsub_frm): New declaration.
5782 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5783 * config/riscv/riscv-vector-builtins-functions.def
5784 (vfnmsub_frm): New function declaration.
5786 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
5788 * lra-constraints.cc (curr_insn_transform): Set done_p up and
5789 check it on true after processing output stack pointer reload.
5791 2023-08-12 Jakub Jelinek <jakub@redhat.com>
5793 * Makefile.in (USER_H): Add stdckdint.h.
5794 * ginclude/stdckdint.h: New file.
5796 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5799 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
5801 2023-08-12 Patrick Palka <ppalka@redhat.com>
5803 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
5804 Delimit output with braces.
5806 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5809 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
5811 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5813 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
5814 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
5815 * config/riscv/vector.md: Ditto.
5817 2023-08-11 David Malcolm <dmalcolm@redhat.com>
5820 * doc/analyzer.texi (__analyzer_get_strlen): New.
5821 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
5823 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
5825 * config/rx/rx.md (subdi3): Fix test for borrow.
5827 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5829 PR middle-end/110989
5830 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
5831 (vectorizable_load): Ditto.
5833 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
5835 * config/bpf/bpf.md (allocate_stack): Define.
5836 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
5837 stack pointer register.
5838 (FIXED_REGISTERS): Adjust accordingly.
5839 (CALL_USED_REGISTERS): Likewise.
5840 (REG_CLASS_CONTENTS): Likewise.
5841 (REGISTER_NAMES): Likewise.
5842 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
5843 space for callee-saved registers.
5844 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
5845 (bpf_expand_epilogue): Do not restore callee-saved registers in
5848 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
5850 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
5851 about too many arguments if function is always inlined.
5853 2023-08-11 Patrick Palka <ppalka@redhat.com>
5855 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
5856 Don't call component_ref_field_offset if the RHS isn't a decl.
5858 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
5861 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
5863 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
5865 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
5866 (process_alt_operands): Set the flag.
5867 (curr_insn_transform): Modify stack pointer offsets if output
5868 stack pointer reload is generated.
5870 2023-08-11 Joseph Myers <joseph@codesourcery.com>
5872 * configure: Regenerate.
5874 2023-08-11 Richard Biener <rguenther@suse.de>
5876 PR tree-optimization/110979
5877 * tree-vect-loop.cc (vectorizable_reduction): For
5878 FOLD_LEFT_REDUCTION without target support make sure
5879 we don't need to honor signed zeros and sign dependent rounding.
5881 2023-08-11 Richard Biener <rguenther@suse.de>
5883 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
5884 subgraph entries. Dump the used vector size based on the
5885 SLP subgraph entry root vector type.
5887 2023-08-11 Pan Li <pan2.li@intel.com>
5889 * config/riscv/riscv-vector-builtins-bases.cc
5890 (class vfmsub_frm): New class for vfmsub frm.
5891 (vfmsub_frm): New declaration.
5893 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5894 * config/riscv/riscv-vector-builtins-functions.def
5895 (vfmsub_frm): New function declaration.
5897 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5899 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
5900 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
5901 (expand_partial_store_optab_fn): Ditto.
5902 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
5903 (MASK_LEN_STORE_LANES): Ditto.
5904 * optabs.def (OPTAB_CD): Ditto.
5906 2023-08-11 Pan Li <pan2.li@intel.com>
5908 * config/riscv/riscv-vector-builtins-bases.cc
5909 (class vfnmadd_frm): New class for vfnmadd frm.
5910 (vfnmadd_frm): New declaration.
5912 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5913 * config/riscv/riscv-vector-builtins-functions.def
5914 (vfnmadd_frm): New function declaration.
5916 2023-08-11 Drew Ross <drross@redhat.com>
5917 Jakub Jelinek <jakub@redhat.com>
5919 PR tree-optimization/109938
5920 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
5922 2023-08-11 Pan Li <pan2.li@intel.com>
5924 * config/riscv/riscv-vector-builtins-bases.cc
5925 (class vfmadd_frm): New class for vfmadd frm.
5926 (vfmadd_frm_obj): New declaration.
5928 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5929 * config/riscv/riscv-vector-builtins-functions.def
5930 (vfmadd_frm): New function definition.
5932 2023-08-11 Pan Li <pan2.li@intel.com>
5934 * config/riscv/riscv-vector-builtins-bases.cc
5935 (class vfnmsac_frm): New class for vfnmsac frm.
5936 (vfnmsac_frm_obj): New declaration.
5938 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5939 * config/riscv/riscv-vector-builtins-functions.def
5940 (vfnmsac_frm): New function definition.
5942 2023-08-11 Jakub Jelinek <jakub@redhat.com>
5944 * doc/extend.texi (Typeof): Document typeof_unqual
5945 and __typeof_unqual__.
5947 2023-08-11 Andrew Pinski <apinski@marvell.com>
5949 PR tree-optimization/110954
5950 * generic-match-head.cc (bitwise_inverted_equal_p): Add
5951 wascmp argument and set it accordingly.
5952 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
5953 wascmp argument to the macro.
5954 (gimple_bitwise_inverted_equal_p): Add
5955 wascmp argument and set it accordingly.
5956 * match.pd (`a & ~a`, `a ^| ~a`): Update call
5957 to bitwise_inverted_equal_p and handle wascmp case.
5958 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
5959 call to bitwise_inverted_equal_p and check to see
5960 if was !wascmp or if precision was 1.
5962 2023-08-11 Martin Uecker <uecker@tugraz.at>
5965 * doc/invoke.texi: Update.
5967 2023-08-11 Pan Li <pan2.li@intel.com>
5969 * config/riscv/riscv-vector-builtins-bases.cc
5970 (class vfmsac_frm): New class for vfmsac frm.
5971 (vfmsac_frm_obj): New declaration.
5973 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5974 * config/riscv/riscv-vector-builtins-functions.def
5975 (vfmsac_frm): New function definition
5977 2023-08-10 Jan Hubicka <jh@suse.cz>
5979 PR middle-end/110923
5980 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
5982 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
5984 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
5985 dependent on 'a' extension.
5986 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
5987 (TARGET_ZTSO): New target.
5988 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
5990 (riscv_memmodel_needs_amo_release): Add Ztso case.
5991 (riscv_print_operand): Add Ztso case for LR/SC annotations.
5992 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
5993 * config/riscv/riscv.opt: Add Ztso target variable.
5994 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
5996 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
5997 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
5998 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
5999 specific load/store/fence mappings.
6000 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
6001 specific load/store/fence mappings.
6003 2023-08-10 Jan Hubicka <jh@suse.cz>
6005 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
6008 2023-08-10 Jan Hubicka <jh@suse.cz>
6010 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
6012 2023-08-10 Jan Hubicka <jh@suse.cz>
6014 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
6015 handling of undefined values.
6017 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6020 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
6021 return virtual phis and return NULL if there is a virtual phi
6022 where the arguments from E0 and E1 edges aren't equal.
6024 2023-08-10 Richard Biener <rguenther@suse.de>
6026 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
6027 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
6029 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6032 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
6034 2023-08-10 Pan Li <pan2.li@intel.com>
6036 * config/riscv/riscv-vector-builtins-bases.cc
6037 (class vfnmacc_frm): New class for vfnmacc.
6038 (vfnmacc_frm_obj): New declaration.
6040 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6041 * config/riscv/riscv-vector-builtins-functions.def
6042 (vfnmacc_frm): New function definition.
6044 2023-08-10 Pan Li <pan2.li@intel.com>
6046 * config/riscv/riscv-vector-builtins-bases.cc
6047 (class vfmacc_frm): New class for vfmacc frm.
6048 (vfmacc_frm_obj): New declaration.
6050 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6051 * config/riscv/riscv-vector-builtins-functions.def
6052 (vfmacc_frm): New function definition.
6054 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6057 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
6059 2023-08-10 Richard Biener <rguenther@suse.de>
6061 * tree-vectorizer.h (vectorizable_live_operation): Remove
6062 gimple_stmt_iterator * argument.
6063 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
6064 Adjust plumbing around vect_get_loop_mask.
6065 (vect_analyze_loop_operations): Adjust.
6066 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
6067 (vect_bb_slp_mark_live_stmts): Likewise.
6068 (vect_schedule_slp_node): Likewise.
6069 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
6070 Remove gimple_stmt_iterator * argument.
6071 (vect_transform_stmt): Adjust.
6073 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6075 * config/riscv/vector-iterators.md: Add missing modes.
6077 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6080 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
6081 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
6083 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6086 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
6087 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
6090 2023-08-10 liuhongt <hongtao.liu@intel.com>
6093 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
6094 sanitize upper part of V4HFmode register with
6096 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
6098 (<insn>v2hf3): Ditto.
6100 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
6101 register with -fno-trapping-math.
6103 2023-08-10 Pan Li <pan2.li@intel.com>
6104 Kito Cheng <kito.cheng@sifive.com>
6106 * config/riscv/riscv-protos.h
6107 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
6108 (get_frm_mode): New declaration.
6109 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
6110 * config/riscv/riscv-vector-builtins.cc
6111 (function_expander::use_ternop_insn): Take care of frm reg.
6112 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
6113 (riscv_emit_frm_mode_set): Ditto.
6114 (riscv_emit_mode_set): Ditto.
6115 (riscv_frm_adjust_mode_after_call): Ditto.
6116 (riscv_frm_mode_needed): Ditto.
6117 (riscv_frm_mode_after): Ditto.
6118 (riscv_mode_entry): Ditto.
6119 (riscv_mode_exit): Ditto.
6120 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
6121 * config/riscv/vector.md
6122 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
6123 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
6125 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6127 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
6128 incorrect anticipate info.
6130 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
6132 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
6133 Remove 'Zve32d' from the version list.
6135 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
6137 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
6138 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
6139 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
6140 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
6142 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
6144 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
6145 (mem_shadd_or_shadd_rtx_p): New function.
6147 2023-08-09 Andrew Pinski <apinski@marvell.com>
6149 PR tree-optimization/110937
6150 PR tree-optimization/100798
6151 * match.pd (`a ? ~b : b`): Handle this
6154 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
6156 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
6158 2023-08-09 Richard Ball <richard.ball@arm.com>
6160 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
6161 * config/aarch64/aarch64-tune.md: Regenerate.
6162 * doc/invoke.texi: Document Cortex-A520 CPU.
6164 2023-08-09 Carl Love <cel@us.ibm.com>
6166 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
6167 Move definitions to Altivec stanza.
6168 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
6171 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6174 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
6175 stepped vector support.
6177 2023-08-09 liuhongt <hongtao.liu@intel.com>
6179 * common/config/i386/cpuinfo.h (get_available_features):
6180 Rename local variable subleaf_level to max_subleaf_level.
6182 2023-08-09 Richard Biener <rguenther@suse.de>
6184 PR rtl-optimization/110587
6185 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
6187 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6189 PR tree-optimization/110248
6190 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
6191 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
6192 legitimate when outer code is PLUS.
6194 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6196 PR tree-optimization/110248
6197 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
6198 type code_helper and pass it to targetm.addr_space.legitimate_address_p
6199 instead of ERROR_MARK.
6200 (offsettable_address_addr_space_p): Update one function pointer with
6201 one more argument of type code_helper as its assignees
6202 memory_address_addr_space_p and strict_memory_address_addr_space_p
6203 have been adjusted, and adjust some call sites with ERROR_MARK.
6204 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
6205 (memory_address_addr_space_p): Adjust with one more unnamed argument
6206 of type code_helper with default ERROR_MARK.
6207 (strict_memory_address_addr_space_p): Likewise.
6208 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
6209 argument of type code_helper.
6210 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
6211 type code_helper and pass it to memory_address_addr_space_p.
6212 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
6213 one more unnamed argument of type code_helper with default value
6215 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
6216 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
6217 pass it to all valid_mem_ref_p calls.
6219 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6221 PR tree-optimization/110248
6222 * coretypes.h (class code_helper): Add forward declaration.
6223 * doc/tm.texi: Regenerate.
6224 * lra-constraints.cc (valid_address_p): Call target hook
6225 targetm.addr_space.legitimate_address_p with an extra parameter
6226 ERROR_MARK as its prototype changes.
6227 * recog.cc (memory_address_addr_space_p): Likewise.
6228 * reload.cc (strict_memory_address_addr_space_p): Likewise.
6229 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
6230 Extend with one more argument of type code_helper, update the
6231 documentation accordingly.
6232 * targhooks.cc (default_legitimate_address_p): Adjust for the
6233 new code_helper argument.
6234 (default_addr_space_legitimate_address_p): Likewise.
6235 * targhooks.h (default_legitimate_address_p): Likewise.
6236 (default_addr_space_legitimate_address_p): Likewise.
6237 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
6238 with extra unnamed code_helper argument with default ERROR_MARK.
6239 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
6240 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
6241 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
6242 (tree.h): New include for tree_code ERROR_MARK.
6243 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
6244 unnamed code_helper argument with default ERROR_MARK.
6245 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
6246 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
6247 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
6248 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
6249 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
6250 (tree.h): New include for tree_code ERROR_MARK.
6251 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
6252 unnamed code_helper argument with default ERROR_MARK.
6253 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
6254 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
6256 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
6257 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
6258 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
6259 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
6260 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
6261 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
6262 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
6263 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
6264 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
6266 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
6267 (m32c_addr_space_legitimate_address_p): Likewise.
6268 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
6269 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
6270 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
6271 * config/microblaze/microblaze-protos.h (tree.h): New include for
6272 tree_code ERROR_MARK.
6273 (microblaze_legitimate_address_p): Adjust with extra unnamed
6274 code_helper argument with default ERROR_MARK.
6275 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
6277 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
6278 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
6279 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
6280 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
6281 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
6282 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
6283 argument with default ERROR_MARK and adjust the call to function
6284 msp430_legitimate_address_p.
6285 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
6286 unnamed code_helper argument with default ERROR_MARK.
6287 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
6288 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
6289 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
6290 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
6291 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
6292 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
6293 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
6294 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
6295 (tree.h): New include for tree_code ERROR_MARK.
6296 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
6297 extra unnamed code_helper argument with default ERROR_MARK.
6298 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
6299 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
6300 argument and adjust the call to function rs6000_legitimate_address_p.
6301 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
6302 unnamed code_helper argument with default ERROR_MARK.
6303 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
6304 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
6305 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
6306 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
6307 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
6308 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
6309 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
6310 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
6312 (tree.h): New include for tree_code ERROR_MARK.
6313 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
6314 Adjust with extra unnamed code_helper argument with default
6317 2023-08-09 liuhongt <hongtao.liu@intel.com>
6319 * common/config/i386/cpuinfo.h (get_available_features): Check
6320 EAX for valid subleaf before use CPUID.
6322 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
6324 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
6325 for the temporary when canonicalizing the condition.
6327 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
6329 * config/bpf/core-builtins.cc: Cleaned include headers.
6330 (struct cr_builtins): Added GTY.
6331 (cr_builtins_ref): Created.
6332 (builtins_data) Changed to GC root.
6333 (allocate_builtin_data): Changed.
6334 Included gt-core-builtins.h.
6335 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
6336 (bpf_core_extra_ref): Created.
6337 (bpf_comment_info): Changed to GC root.
6338 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
6340 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
6343 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
6344 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
6345 upper part of V2SFmode register with -fno-trapping-math.
6346 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
6348 (<smaxmin:code>v2sf3): Ditto.
6350 (*mmx_haddv2sf3_low): Ditto.
6351 (*mmx_hsubv2sf3_low): Ditto.
6352 (vec_addsubv2sf3): Ditto.
6353 (vec_cmpv2sfv2si): Ditto.
6354 (vcond<V2FI:mode>v2sf): Ditto.
6359 (fix_truncv2sfv2si2): Ditto.
6360 (fixuns_truncv2sfv2si2): Ditto.
6361 (floatv2siv2sf2): Ditto.
6362 (floatunsv2siv2sf2): Ditto.
6363 (nearbyintv2sf2): Ditto.
6365 (lrintv2sfv2si2): Ditto.
6367 (lceilv2sfv2si2): Ditto.
6368 (floorv2sf2): Ditto.
6369 (lfloorv2sfv2si2): Ditto.
6370 (btruncv2sf2): Ditto.
6371 (roundv2sf2): Ditto.
6372 (lroundv2sfv2si2): Ditto.
6373 * doc/invoke.texi (x86 Options): Document
6374 -mpartial-vector-fp-math option.
6376 2023-08-08 Andrew Pinski <apinski@marvell.com>
6378 PR tree-optimization/103281
6379 PR tree-optimization/28794
6380 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
6382 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
6383 (simplify_using_ranges::simplify_casted_cond): Rename to ...
6384 (simplify_using_ranges::simplify_casted_compare): This
6385 and change arguments to take op0 and op1.
6386 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
6387 (simplify_using_ranges::simplify): For tcc_comparison assignments call
6388 simplify_compare_assign_using_ranges_1.
6389 * vr-values.h (simplify_using_ranges): Add
6390 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
6391 Rename simplify_casted_cond and simplify_casted_compare and
6392 update argument types.
6394 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
6396 * genmatch.cc: Log line numbers indirectly.
6398 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
6400 * genmatch.cc: Make sinfo map ordered.
6401 * Makefile.in: Require the ordered map header for genmatch.o.
6403 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
6405 * ordered-hash-map.h: Add get_or_insert.
6406 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
6408 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6410 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
6411 (cond_len_<optab><mode>): Ditto.
6412 (cond_fma<mode>): Ditto.
6413 (cond_len_fma<mode>): Ditto.
6414 (cond_fnma<mode>): Ditto.
6415 (cond_len_fnma<mode>): Ditto.
6416 (cond_fms<mode>): Ditto.
6417 (cond_len_fms<mode>): Ditto.
6418 (cond_fnms<mode>): Ditto.
6419 (cond_len_fnms<mode>): Ditto.
6420 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
6422 (enum insn_type): Add new enum type.
6423 (prepare_ternary_operands): New function.
6424 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
6425 (emit_nonvlmax_tumu_insn): Ditto.
6426 (emit_nonvlmax_fp_tumu_insn): Ditto.
6427 (expand_cond_len_binop): Add condtional operations.
6428 (expand_cond_len_ternop): Ditto.
6429 (prepare_ternary_operands): New function.
6430 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
6431 riscv_get_v_regno_alignment as global scope.
6432 * config/riscv/vector.md: Fix ternary bugs.
6434 2023-08-08 Richard Biener <rguenther@suse.de>
6436 PR tree-optimization/49955
6437 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
6438 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
6439 * tree-vect-slp.cc (vect_free_slp_instance): Release
6440 SLP_INSTANCE_REMAIN_STMTS.
6441 (vect_build_slp_instance): Make the number of lanes of
6442 a BB reduction even.
6443 (vectorize_slp_instance_root_stmt): Handle unvectorized
6444 defs of a BB reduction.
6446 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6448 * internal-fn.cc (get_len_internal_fn): New function.
6449 (DEF_INTERNAL_COND_FN): Ditto.
6450 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
6451 * internal-fn.h (get_len_internal_fn): Ditto.
6452 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
6454 2023-08-08 Richard Biener <rguenther@suse.de>
6456 PR tree-optimization/110924
6457 * tree-ssa-live.h (virtual_operand_live): Update comment.
6458 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
6459 optimization, look at each predecessor.
6460 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
6462 2023-08-08 yulong <shiyulong@iscas.ac.cn>
6464 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
6466 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6468 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
6469 * config/riscv/vector.md: Ditto.
6471 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6473 * config/riscv/autovec.md: Add VLS shift.
6475 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6477 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
6478 * config/riscv/vector-iterators.md: Ditto.
6479 * config/riscv/vector.md: Ditto.
6481 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
6483 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
6485 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
6487 * configure: Regenerate.
6489 2023-08-07 John Ericson <git@JohnEricson.me>
6491 * configure: Regenerate.
6493 2023-08-07 Alan Modra <amodra@gmail.com>
6495 * configure: Regenerate.
6497 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
6499 * configure: Regenerate.
6501 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
6503 * configure: Regenerate.
6505 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
6507 * configure: Regenerate.
6509 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
6511 * configure: Regenerate.
6513 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
6515 * configure: Regenerate.
6517 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
6519 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
6520 VOIDmode operands to conditional before canonicalization.
6522 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
6524 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
6525 (find_oldest_value_reg): Inline stack_pointer_rtx check.
6526 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
6528 2023-08-07 Martin Jambor <mjambor@suse.cz>
6531 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
6532 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
6533 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
6534 (ptr_parm_has_nonarg_uses): Likewise.
6535 * ipa-param-manipulation.cc
6536 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
6537 (ipa_param_body_adjustments::mark_dead_statements): Move initial
6538 checks to get_ddef_if_exists_and_is_used.
6539 (ipa_param_body_adjustments::mark_clobbers_dead): New.
6540 (ipa_param_body_adjustments::common_initialization): Call
6541 mark_clobbers_dead when splitting.
6543 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
6545 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
6546 as an argument and pass it to riscv_emit_int_order_test.
6547 (riscv_expand_conditional_move): Handle cases where the condition
6548 is not EQ/NE or the second argument to the conditional is not
6550 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
6551 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
6553 2023-08-07 Andrew Pinski <apinski@marvell.com>
6555 PR tree-optimization/109959
6556 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
6559 2023-08-07 Richard Biener <rguenther@suse.de>
6561 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
6562 calculate post-dominators. Calculate RPO on the inverted
6563 graph and process blocks in that order.
6565 2023-08-07 liuhongt <hongtao.liu@intel.com>
6568 * config/i386/i386-protos.h
6569 (vpternlog_redundant_operand_mask): Adjust parameter type.
6570 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
6571 INTVAL instead of XINT, also adjust parameter type from rtx*
6572 to rtx since the function only needs operands[4] in vpternlog
6574 (substitute_vpternlog_operands): Pass operands[4] instead of
6575 operands to vpternlog_redundant_operand_mask.
6576 * config/i386/sse.md: Ditto.
6578 2023-08-07 Richard Biener <rguenther@suse.de>
6580 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
6581 around dumping code.
6583 2023-08-07 liuhongt <hongtao.liu@intel.com>
6586 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
6587 to define_expand and break into ..
6588 (<insn>v4hf3): .. this.
6589 (divv4hf3): .. this.
6590 (<insn>v2hf3): .. this.
6591 (divv2hf3): .. this.
6592 (movd_v2hf_to_sse): New define_expand.
6593 (movq_<mode>_to_sse): Extend to V4HFmode.
6594 (mmxdoublevecmode): Ditto.
6595 (V2FI_V4HF): New mode iterator.
6596 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
6597 by using mode iterator V4SF_V8HF, renamed to ..
6598 (*vec_concat<mode>): .. this.
6599 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
6600 iterator V4SF_V8HF, renamed to ..
6601 (*vec_concat<mode>_0): .. this.
6602 (*vec_concatv8hf_movss): New define_insn.
6603 (V4SF_V8HF): New mode iterator.
6605 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6607 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
6609 2023-08-07 Jan Beulich <jbeulich@suse.com>
6611 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
6612 (*mmx_pinsrb): Likewise.
6613 (*mmx_pextrb): Likewise.
6614 (*mmx_pextrb_zext): Likewise.
6615 (mmx_pshufbv8qi3): Likewise.
6616 (mmx_pshufbv4qi3): Likewise.
6617 (mmx_pswapdv2si2): Likewise.
6618 (*pinsrb): Likewise.
6619 (*pextrb): Likewise.
6620 (*pextrb_zext): Likewise.
6621 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
6622 (*sse2_eq<mode>3): Likewise.
6623 (*sse2_gt<mode>3): Likewise.
6624 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
6625 (*vec_extract<mode>): Likewise.
6626 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
6627 (*vec_extractv16qi_zext): Likewise.
6628 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
6629 (ssse3_pmaddubsw128): Likewise.
6630 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
6631 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
6632 (<ssse3_avx2>_psign<mode>3): Likewise.
6633 (<ssse3_avx2>_palignr<mode>): Likewise.
6634 (*abs<mode>2): Likewise.
6635 (sse4_2_pcmpestr): Likewise.
6636 (sse4_2_pcmpestri): Likewise.
6637 (sse4_2_pcmpestrm): Likewise.
6638 (sse4_2_pcmpestr_cconly): Likewise.
6639 (sse4_2_pcmpistr): Likewise.
6640 (sse4_2_pcmpistri): Likewise.
6641 (sse4_2_pcmpistrm): Likewise.
6642 (sse4_2_pcmpistr_cconly): Likewise.
6643 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
6644 (vgf2p8affineqb_<mode><mask_name>): Likewise.
6645 (vgf2p8mulb_<mode><mask_name>): Likewise.
6646 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
6648 (*<code>v16qi3 [umaxmin]): Likewise.
6650 2023-08-07 Jan Beulich <jbeulich@suse.com>
6652 * config/i386/i386.md (sse4_1_round<mode>2): Make
6653 "length_immediate" uniformly 1.
6654 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
6655 (mmx_pblendvb_<mode>): Likewise.
6657 2023-08-07 Jan Beulich <jbeulich@suse.com>
6659 * config/i386/sse.md
6660 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
6662 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
6665 2023-08-07 Jan Beulich <jbeulich@suse.com>
6667 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
6668 "prefix_extra", and "mode" attributes.
6669 (xop_phadd<u>bd): Likewise.
6670 (xop_phadd<u>bq): Likewise.
6671 (xop_phadd<u>wd): Likewise.
6672 (xop_phadd<u>wq): Likewise.
6673 (xop_phadd<u>dq): Likewise.
6674 (xop_phsubbw): Likewise.
6675 (xop_phsubwd): Likewise.
6676 (xop_phsubdq): Likewise.
6677 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
6678 (xop_rotr<mode>3): Likewise.
6679 (xop_frcz<mode>2): Likewise.
6680 (*xop_vmfrcz<mode>2): Likewise.
6681 (xop_vrotl<mode>3): Add "prefix" attribute. Change
6682 "prefix_extra" to 1.
6683 (xop_sha<mode>3): Likewise.
6684 (xop_shl<mode>3): Likewise.
6686 2023-08-07 Jan Beulich <jbeulich@suse.com>
6688 * config/i386/sse.md
6689 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
6691 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
6692 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
6693 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
6694 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
6695 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
6696 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
6697 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
6698 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
6699 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
6700 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
6701 (vec_extract_lo_v64qi): Likewise.
6702 (vec_extract_hi_v64qi): Likewise.
6703 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
6704 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
6705 (*avx512f_<code><mode>3<mask_name>): Likewise.
6706 (*vec_extractv4ti): Likewise.
6707 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
6708 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
6709 Add "length_immediate".
6711 2023-08-07 Jan Beulich <jbeulich@suse.com>
6713 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
6715 (@rdseed<mode>): Likewise.
6716 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
6717 Adjust "prefix_extra".
6718 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
6719 (*sse4_1_<code><mode>3<mask_name>): Likewise.
6720 (*avx2_eq<mode>3): Likewise.
6721 (avx2_gt<mode>3): Likewise.
6722 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
6723 (*vec_extract<mode>): Likewise.
6724 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
6726 2023-08-07 Jan Beulich <jbeulich@suse.com>
6728 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
6729 "prefix_rep". Drop "prefix_extra".
6730 (wr<fsgs>base<mode>): Likewise.
6731 (ptwrite<mode>): Likewise.
6733 2023-08-07 Jan Beulich <jbeulich@suse.com>
6735 * config/i386/i386.md (isa): Move up.
6736 (length_immediate): Handle "fma4".
6737 (prefix): Handle "ssemuladd".
6738 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
6739 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
6741 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
6742 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
6743 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
6745 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
6746 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
6747 (*fma_fnmadd_<mode>): Likewise.
6748 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
6750 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
6751 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
6752 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
6754 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
6755 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
6756 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
6758 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
6759 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
6760 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
6762 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
6763 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
6764 (*fmai_fmadd_<mode>): Likewise.
6765 (*fmai_fmsub_<mode>): Likewise.
6766 (*fmai_fnmadd_<mode><round_name>): Likewise.
6767 (*fmai_fnmsub_<mode><round_name>): Likewise.
6768 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
6769 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
6770 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
6771 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
6772 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
6773 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
6774 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
6775 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
6776 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
6777 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
6778 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
6779 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
6780 (*fma4i_vmfmadd_<mode>): Likewise.
6781 (*fma4i_vmfmsub_<mode>): Likewise.
6782 (*fma4i_vmfnmadd_<mode>): Likewise.
6783 (*fma4i_vmfnmsub_<mode>): Likewise.
6784 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
6785 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
6786 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
6788 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
6789 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
6790 (xop_p<macs>dql): Likewise.
6791 (xop_p<macs>dqh): Likewise.
6792 (xop_p<macs>wd): Likewise.
6793 (xop_p<madcs>wd): Likewise.
6794 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
6796 2023-08-07 Jan Beulich <jbeulich@suse.com>
6798 * config/i386/i386.md (length_immediate): Handle "sse4arg".
6800 (*xop_pcmov_<mode>): Add "mode" attribute.
6801 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
6802 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
6803 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
6804 (*xop_pcmov_<mode>): Add "mode" attribute.
6805 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
6807 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
6808 "prefix_extra", and "length_immediate" attributes.
6809 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
6810 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
6811 and "length_immediate" attributes. Switch "type" to "sse4arg".
6812 (xop_pcom_tf<mode>3): Likewise.
6813 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
6815 2023-08-07 Jan Beulich <jbeulich@suse.com>
6817 * config/i386/i386.md (prefix_extra): Correct comment. Fold
6818 cases yielding 2 into ones yielding 1.
6820 2023-08-07 Jan Hubicka <jh@suse.cz>
6822 PR tree-optimization/106293
6823 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
6824 * tree-vect-loop.cc (vect_transform_loop): Likewise.
6826 2023-08-07 Andrew Pinski <apinski@marvell.com>
6828 PR tree-optimization/96695
6829 * match.pd (min_value, max_value): Extend to
6832 2023-08-06 Jan Hubicka <jh@suse.cz>
6834 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
6835 __builtin_expect that CPU likely supports cpuid.
6837 2023-08-06 Jan Hubicka <jh@suse.cz>
6839 * tree-loop-distribution.cc (loop_distribution::execute): Disable
6840 distribution for loops with estimated iterations 0.
6842 2023-08-06 Jan Hubicka <jh@suse.cz>
6844 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
6846 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
6848 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
6849 more Zicond patterns. Fix whitespace typo.
6850 (riscv_rtx_costs): Remove accidental code duplication.
6851 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
6853 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
6856 * config/i386/i386-protos.h
6857 (vpternlog_redundant_operand_mask): Declare.
6858 (substitute_vpternlog_operands): Declare.
6859 * config/i386/i386.cc
6860 (vpternlog_redundant_operand_mask): New helper.
6861 (substitute_vpternlog_operands): New function. Use them...
6862 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
6864 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
6866 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
6867 value of -1 is equivalent to don't care.
6868 (extract_integral_bit_field): Indicate that we don't require
6869 the most significant word to be zero extended, if we're about
6871 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
6872 of -1 is equivalent to don't care. Don't clear the most
6873 significant bits with AND mask when UNSIGNEDP is -1.
6875 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
6877 * config/i386/sse.md (define_split): Convert highpart:DF extract
6878 from V2DFmode register into a sse2_storehpd instruction.
6879 (define_split): Likewise, convert lowpart:DF extract from V2DF
6880 register into a sse2_storelpd instruction.
6882 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
6884 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
6887 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
6889 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
6890 against early clobber hard regs.
6892 2023-08-04 Tamar Christina <tamar.christina@arm.com>
6894 * doc/extend.texi: Document it.
6896 2023-08-04 Tamar Christina <tamar.christina@arm.com>
6899 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
6900 vec_widen_<sur>shiftl_hi_<mode>): Remove.
6901 (aarch64_<sur>shll<mode>_internal): Renamed to...
6902 (aarch64_<su>shll<mode>): .. This.
6903 (aarch64_<sur>shll2<mode>_internal): Renamed to...
6904 (aarch64_<su>shll2<mode>): .. This.
6905 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
6907 * config/aarch64/constraints.md (D2, DL): New.
6908 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
6910 2023-08-04 Tamar Christina <tamar.christina@arm.com>
6912 * gensupport.cc (conlist): Support length 0 attribute.
6914 2023-08-04 Tamar Christina <tamar.christina@arm.com>
6916 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
6917 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
6919 2023-08-04 Tamar Christina <tamar.christina@arm.com>
6921 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
6923 (aarch64_adjust_stmt_cost): Use it.
6924 (aarch64_vector_costs::count_ops): Likewise.
6925 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
6926 aarch64_adjust_stmt_cost.
6928 2023-08-04 Richard Biener <rguenther@suse.de>
6930 PR tree-optimization/110838
6931 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
6932 Fix right-shift value sanitizing. Properly emit external
6933 def mangling in the preheader rather than in the pattern
6934 def sequence where it will fail vectorizing.
6936 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
6938 PR middle-end/110316
6940 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
6941 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
6942 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
6943 (timer::validate_phases): Use integral arithmetic to check
6945 (timer::print_row, timer::print): Convert from integral
6946 nanoseconds to floating point seconds before printing.
6947 (timer::all_zero): Change limit to nanosec count instead of
6948 fractional count of seconds.
6949 (make_json_for_timevar_time_def): Convert from integral
6950 nanoseconds to floating point seconds before recording.
6951 * timevar.h (struct timevar_time_def): Update all measurements
6952 to use uint64_t nanoseconds rather than seconds stored in a
6955 2023-08-04 Richard Biener <rguenther@suse.de>
6957 PR tree-optimization/110838
6958 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
6959 the arithmetic right-shift case to non-negative operands.
6961 2023-08-04 Pan Li <pan2.li@intel.com>
6964 2023-08-04 Pan Li <pan2.li@intel.com>
6966 * config/riscv/riscv-vector-builtins-bases.cc
6967 (class vfmacc_frm): New class for vfmacc frm.
6968 (vfmacc_frm_obj): New declaration.
6970 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6971 * config/riscv/riscv-vector-builtins-functions.def
6972 (vfmacc_frm): New function definition.
6973 * config/riscv/riscv-vector-builtins.cc
6974 (function_expander::use_ternop_insn): Add frm operand support.
6975 * config/riscv/vector.md: Add vfmuladd to frm_mode.
6977 2023-08-04 Pan Li <pan2.li@intel.com>
6980 2023-08-04 Pan Li <pan2.li@intel.com>
6982 * config/riscv/riscv-vector-builtins-bases.cc
6983 (class vfnmacc_frm): New class for vfnmacc.
6984 (vfnmacc_frm_obj): New declaration.
6986 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6987 * config/riscv/riscv-vector-builtins-functions.def
6988 (vfnmacc_frm): New function definition.
6990 2023-08-04 Pan Li <pan2.li@intel.com>
6993 2023-08-04 Pan Li <pan2.li@intel.com>
6995 * config/riscv/riscv-vector-builtins-bases.cc
6996 (class vfmsac_frm): New class for vfmsac frm.
6997 (vfmsac_frm_obj): New declaration.
6999 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7000 * config/riscv/riscv-vector-builtins-functions.def
7001 (vfmsac_frm): New function definition.
7003 2023-08-04 Pan Li <pan2.li@intel.com>
7006 2023-08-04 Pan Li <pan2.li@intel.com>
7008 * config/riscv/riscv-vector-builtins-bases.cc
7009 (class vfnmsac_frm): New class for vfnmsac frm.
7010 (vfnmsac_frm_obj): New declaration.
7012 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7013 * config/riscv/riscv-vector-builtins-functions.def
7014 (vfnmsac_frm): New function definition.
7016 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
7018 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
7019 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
7020 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
7021 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
7022 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
7023 (attiny102, attiny104): New devices.
7024 * doc/avr-mmcu.texi: Regenerate.
7026 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
7028 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
7029 and PM_OFFSET entries.
7031 2023-08-04 Andrew Pinski <apinski@marvell.com>
7033 PR tree-optimization/110874
7034 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
7035 (gimple_maybe_cmp): Likewise.
7036 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
7037 and gimple_maybe_cmp instead of being recursive.
7038 * match.pd (bit_not_with_nop): New match pattern.
7039 (maybe_cmp): Likewise.
7041 2023-08-04 Drew Ross <drross@redhat.com>
7043 PR middle-end/101955
7044 * match.pd ((signed x << c) >> c): New canonicalization.
7046 2023-08-04 Pan Li <pan2.li@intel.com>
7048 * config/riscv/riscv-vector-builtins-bases.cc
7049 (class vfnmsac_frm): New class for vfnmsac frm.
7050 (vfnmsac_frm_obj): New declaration.
7052 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7053 * config/riscv/riscv-vector-builtins-functions.def
7054 (vfnmsac_frm): New function definition.
7056 2023-08-04 Pan Li <pan2.li@intel.com>
7058 * config/riscv/riscv-vector-builtins-bases.cc
7059 (class vfmsac_frm): New class for vfmsac frm.
7060 (vfmsac_frm_obj): New declaration.
7062 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7063 * config/riscv/riscv-vector-builtins-functions.def
7064 (vfmsac_frm): New function definition.
7066 2023-08-04 Pan Li <pan2.li@intel.com>
7068 * config/riscv/riscv-vector-builtins-bases.cc
7069 (class vfnmacc_frm): New class for vfnmacc.
7070 (vfnmacc_frm_obj): New declaration.
7072 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7073 * config/riscv/riscv-vector-builtins-functions.def
7074 (vfnmacc_frm): New function definition.
7076 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
7079 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
7080 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
7082 2023-08-04 Pan Li <pan2.li@intel.com>
7084 * config/riscv/riscv-vector-builtins-bases.cc
7085 (class vfmacc_frm): New class for vfmacc frm.
7086 (vfmacc_frm_obj): New declaration.
7088 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7089 * config/riscv/riscv-vector-builtins-functions.def
7090 (vfmacc_frm): New function definition.
7091 * config/riscv/riscv-vector-builtins.cc
7092 (function_expander::use_ternop_insn): Add frm operand support.
7093 * config/riscv/vector.md: Add vfmuladd to frm_mode.
7095 2023-08-04 Pan Li <pan2.li@intel.com>
7097 * config/riscv/riscv-vector-builtins-bases.cc
7098 (vfwmul_frm_obj): New declaration.
7099 (vfwmul_frm): Ditto.
7100 * config/riscv/riscv-vector-builtins-bases.h:
7101 (vfwmul_frm): Ditto.
7102 * config/riscv/riscv-vector-builtins-functions.def
7103 (vfwmul_frm): New function definition.
7104 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
7106 2023-08-04 Pan Li <pan2.li@intel.com>
7108 * config/riscv/riscv-vector-builtins-bases.cc
7109 (binop_frm): New declaration.
7110 (reverse_binop_frm): Likewise.
7112 * config/riscv/riscv-vector-builtins-bases.h:
7113 (vfdiv_frm): New extern declaration.
7114 (vfrdiv_frm): Likewise.
7115 * config/riscv/riscv-vector-builtins-functions.def
7116 (vfdiv_frm): New function definition.
7117 (vfrdiv_frm): Likewise.
7118 * config/riscv/vector.md: Add vfdiv to frm_mode.
7120 2023-08-03 Jan Hubicka <jh@suse.cz>
7122 * tree-cfg.cc (print_loop_info): Print entry count.
7124 2023-08-03 Jan Hubicka <jh@suse.cz>
7126 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
7128 2023-08-03 Jan Hubicka <jh@suse.cz>
7131 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
7132 unadjusted_exit_count.
7134 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
7136 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
7139 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
7141 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
7142 various Zicond patterns.
7143 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
7144 sfb_alu_operand for both arms of the conditional move.
7145 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7147 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
7153 * config.gcc: Added core-builtins.cc and .o files.
7154 * config/bpf/bpf-passes.def: Removed file.
7155 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
7156 bpf_replace_core_move_operands): New prototypes.
7157 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
7158 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
7159 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
7160 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
7161 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
7163 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
7164 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
7165 (mov_reloc_core<mode>): Added.
7166 * config/bpf/core-builtins.cc (struct cr_builtin, enum
7167 cr_decision struct cr_local, struct cr_final, struct
7168 core_builtin_helpers, enum bpf_plugin_states): Added types.
7169 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
7171 (allocate_builtin_data, get_builtin-data, search_builtin_data,
7172 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
7173 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
7174 bpf_core_get_index, compute_field_expr,
7175 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
7176 process_field_expr, pack_enum_value, process_enum_value, pack_type,
7177 process_type, bpf_require_core_support, make_core_relo, read_kind,
7178 kind_access_index, kind_preserve_field_info, kind_enum_value,
7179 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
7180 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
7181 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
7182 bpf_expand_core_builtin, bpf_add_core_reloc,
7183 bpf_replace_core_move_operands): Added functions.
7184 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
7185 (bpf_init_core_builtins, bpf_expand_core_builtin,
7186 bpf_resolve_overloaded_core_builtin): Added functions.
7187 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
7188 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
7189 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
7190 * config/bpf/t-bpf: Added core-builtins.o.
7191 * doc/extend.texi: Added documentation for new BPF builtins.
7193 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7195 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
7196 ranges to the call to relation_fold_and_or.
7197 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
7198 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
7199 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
7200 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
7201 a varying op1 and op2 to call.
7202 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
7203 (operator_equal::op1_op2_relation): New float version.
7204 (operator_not_equal::op1_op2_relation): Ditto.
7205 (operator_lt::op1_op2_relation): Ditto.
7206 (operator_le::op1_op2_relation): Ditto.
7207 (operator_gt::op1_op2_relation): Ditto.
7208 (operator_ge::op1_op2_relation) Ditto.
7209 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
7211 (operator_not_equal::op1_op2_relation): Ditto.
7212 (operator_lt::op1_op2_relation): Ditto.
7213 (operator_le::op1_op2_relation): Ditto.
7214 (operator_gt::op1_op2_relation): Ditto.
7215 (operator_ge::op1_op2_relation): Ditto.
7216 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
7218 (range_operator::op1_op2_relation): Add extra params.
7219 (operator_equal::op1_op2_relation): Ditto.
7220 (operator_not_equal::op1_op2_relation): Ditto.
7221 (operator_lt::op1_op2_relation): Ditto.
7222 (operator_le::op1_op2_relation): Ditto.
7223 (operator_gt::op1_op2_relation): Ditto.
7224 (operator_ge::op1_op2_relation): Ditto.
7225 * range-op.h (range_operator): New prototypes.
7226 (range_op_handler): Ditto.
7228 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7230 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
7231 Use identity relation.
7232 (gori_compute::compute_operand2_range): Ditto.
7233 * value-relation.cc (get_identity_relation): New.
7234 * value-relation.h (get_identity_relation): New prototype.
7236 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7238 * value-range.h (Value_Range::set_varying): Set the type.
7239 (Value_Range::set_zero): Ditto.
7240 (Value_Range::set_nonzero): Ditto.
7242 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
7244 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
7247 2023-08-03 Pan Li <pan2.li@intel.com>
7249 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
7251 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
7253 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
7255 2023-08-03 Richard Biener <rguenther@suse.de>
7257 PR tree-optimization/110838
7258 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
7259 Adjust the shift operand of RSHIFT_EXPRs.
7261 2023-08-03 Richard Biener <rguenther@suse.de>
7263 PR tree-optimization/110702
7264 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
7265 we created a NULL pointer based access rewrite that to
7268 2023-08-03 Richard Biener <rguenther@suse.de>
7270 * tree-ssa-sink.cc: Include tree-ssa-live.h.
7271 (pass_sink_code::execute): Instantiate virtual_operand_live
7273 (sink_code_in_bb): Pass down virtual_operand_live.
7274 (statement_sink_location): Get virtual_operand_live and
7275 verify we are not sinking loads across stores by looking up
7276 the live virtual operand at the sink location.
7278 2023-08-03 Richard Biener <rguenther@suse.de>
7280 * tree-ssa-live.h (class virtual_operand_live): New.
7281 * tree-ssa-live.cc (virtual_operand_live::init): New.
7282 (virtual_operand_live::get_live_in): Likewise.
7283 (virtual_operand_live::get_live_out): Likewise.
7285 2023-08-03 Richard Biener <rguenther@suse.de>
7287 * passes.def: Exchange loop splitting and final value
7290 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7292 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
7293 New function which handles bswap patterns for vec_perm_const.
7294 (vectorize_vec_perm_const_1): Call new function.
7295 * config/s390/vector.md (*bswap<mode>): Fix operands in output
7297 (*vstbr<mode>): New insn.
7299 2023-08-03 Alexandre Oliva <oliva@adacore.com>
7301 * config/vxworks-smp.opt: New. Introduce -msmp.
7302 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
7303 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
7304 lib_smp when -msmp is present in the command line.
7305 * doc/invoke.texi: Document it.
7307 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
7309 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
7310 when enabling -mno-omit-leaf-frame-pointer
7311 (riscv_option_override): Override omit-frame-pointer.
7312 (riscv_frame_pointer_required): Save s0 for non-leaf function
7313 (TARGET_FRAME_POINTER_REQUIRED): Override defination
7314 * config/riscv/riscv.opt: Add option support.
7316 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
7319 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
7320 place operand in a register before gen_<insn>64ti2_doubleword.
7321 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
7322 operand in a register before gen_<insn>32di2_doubleword.
7323 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
7324 (<any_rotate>64ti2_doubleword): Likewise.
7326 2023-08-03 Pan Li <pan2.li@intel.com>
7328 * config/riscv/riscv-vector-builtins-bases.cc
7329 (vfmul_frm_obj): New declaration.
7331 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
7332 * config/riscv/riscv-vector-builtins-functions.def
7333 (vfmul_frm): New function definition.
7334 * config/riscv/vector.md: Add vfmul to frm_mode.
7336 2023-08-03 Andrew Pinski <apinski@marvell.com>
7338 * match.pd (`~X & X`): Check that the types match.
7339 (`~x | x`, `~x ^ x`): Likewise.
7341 2023-08-03 Pan Li <pan2.li@intel.com>
7343 * config/riscv/riscv-vector-builtins-bases.h: Remove
7344 redudant declaration.
7346 2023-08-03 Pan Li <pan2.li@intel.com>
7348 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
7350 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
7351 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
7352 Add vfwsub function definitions.
7354 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7356 PR rtl-optimization/110867
7357 * combine.cc (simplify_compare_const): Try the optimization only
7358 in case the constant fits into the comparison mode.
7360 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
7362 * config/riscv/zicond.md: Remove incorrect zicond patterns and
7363 renumber/rename them.
7364 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
7366 2023-08-02 Richard Biener <rguenther@suse.de>
7368 * tree-phinodes.h (add_phi_node_to_bb): Remove.
7369 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
7371 2023-08-02 Jan Beulich <jbeulich@suse.com>
7373 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
7374 two of the alternatives.
7376 2023-08-02 Richard Biener <rguenther@suse.de>
7378 PR tree-optimization/92335
7379 * tree-ssa-sink.cc (select_best_block): Before loop
7380 optimizations avoid sinking unconditional loads/stores
7381 in innermost loops to conditional executed places.
7383 2023-08-02 Andrew Pinski <apinski@marvell.com>
7385 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
7386 the comparison operands before comparing them.
7388 2023-08-02 Andrew Pinski <apinski@marvell.com>
7390 * match.pd (`~X & X`, `~X | X`): Move over to
7391 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
7392 handles that already.
7393 Remove range test simplifications to true/false as they
7394 are now handled by these patterns.
7396 2023-08-02 Andrew Pinski <apinski@marvell.com>
7398 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
7399 statement's lhs and rhs to check if trivial dead.
7400 Rename inserted_exprs to exprs_maybe_dce; also move it so
7401 bitmap is not allocated if not needed.
7403 2023-08-02 Pan Li <pan2.li@intel.com>
7405 * config/riscv/riscv-vector-builtins-bases.cc
7406 (class widen_binop_frm): New class for binop frm.
7407 (BASE): Add vfwadd_frm.
7408 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
7409 * config/riscv/riscv-vector-builtins-functions.def
7410 (vfwadd_frm): New function definition.
7411 * config/riscv/riscv-vector-builtins-shapes.cc
7412 (BASE_NAME_MAX_LEN): New macro.
7413 (struct alu_frm_def): Leverage new base class.
7414 (struct build_frm_base): New build base for frm.
7415 (struct widen_alu_frm_def): New struct for widen alu frm.
7416 (SHAPE): Add widen_alu_frm shape.
7417 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
7418 * config/riscv/vector.md (frm_mode): Add vfwalu type.
7420 2023-08-02 Jan Hubicka <jh@suse.cz>
7422 * cfgloop.h (loop_count_in): Declare.
7423 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
7424 (loop_count_in): Move here from ...
7425 * cfgloopmanip.cc (loop_count_in): ... here.
7426 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
7428 2023-08-02 Jan Hubicka <jh@suse.cz>
7430 * cfg.cc (scale_strictly_dominated_blocks): New function.
7431 * cfg.h (scale_strictly_dominated_blocks): Declare.
7432 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
7434 2023-08-02 Richard Biener <rguenther@suse.de>
7436 PR rtl-optimization/110587
7437 * lra-spills.cc (return_regno_p): Remove.
7438 (regno_in_use_p): Likewise.
7439 (lra_final_code_change): Do not remove noop moves
7440 between hard registers.
7442 2023-08-02 liuhongt <hongtao.liu@intel.com>
7445 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
7446 HFmode, use mode iterator VFH instead.
7447 (vec_fmsubadd<mode>4): Ditto.
7448 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
7449 Remove scalar mode from iterator, use VFH_AVX512VL instead.
7450 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
7453 2023-08-02 liuhongt <hongtao.liu@intel.com>
7455 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
7456 pre_reload define_insn_and_split.
7458 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
7460 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
7461 using Zicond to implement some conditional moves.
7463 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
7465 * config/riscv/zicond.md: Use the X iterator instead of ANYI
7466 on the comparison input operands.
7468 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
7470 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
7472 (case SET): For INSNs that just set a REG, take the cost from the
7474 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7476 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
7478 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
7479 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
7480 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
7481 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
7482 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
7483 (OPTION_MASK_ISA_ABM_SET):
7484 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
7486 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
7488 * config/s390/s390.cc (s390_encode_section_info): Assume external
7489 symbols without explicit alignment to be unaligned if
7490 -munaligned-symbols has been specified.
7491 * config/s390/s390.opt (-munaligned-symbols): New option.
7493 2023-08-01 Richard Ball <richard.ball@arm.com>
7495 * gimple-fold.cc (fold_ctor_reference):
7496 Add support for poly_int.
7498 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
7501 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
7502 LABEL_NUSES of new conditional branch instruction.
7504 2023-08-01 Jan Hubicka <jh@suse.cz>
7506 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
7507 constant prologue peeling.
7509 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
7511 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
7513 2023-08-01 Pan Li <pan2.li@intel.com>
7514 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7516 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
7517 (STATIC_FRM_P): Ditto.
7518 (struct mode_switching_info): New struct for mode switching.
7519 (struct machine_function): Add new field mode switching.
7520 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
7521 (riscv_frm_adjust_mode_after_call): New function for call mode.
7522 (riscv_frm_emit_after_call_in_bb_end): New function for emit
7523 insn when call as the end of bb.
7524 (riscv_frm_mode_needed): New function for frm mode needed.
7525 (frm_unknown_dynamic_p): Remove call check.
7526 (riscv_mode_needed): Extrac function for frm.
7527 (riscv_frm_mode_after): Add DYN_CALL after.
7528 (riscv_mode_entry): Remove backup rtl initialization.
7529 * config/riscv/vector.md (frm_mode): Add dyn_call.
7530 (fsrmsi_restore_exit): Rename to _volatile.
7531 (fsrmsi_restore_volatile): Likewise.
7533 2023-08-01 Pan Li <pan2.li@intel.com>
7535 * config/riscv/riscv-vector-builtins-bases.cc
7536 (class reverse_binop_frm): Add new template for reversed frm.
7537 (vfsub_frm_obj): New obj.
7538 (vfrsub_frm_obj): Likewise.
7539 * config/riscv/riscv-vector-builtins-bases.h:
7540 (vfsub_frm): New declaration.
7541 (vfrsub_frm): Likewise.
7542 * config/riscv/riscv-vector-builtins-functions.def
7543 (vfsub_frm): New function define.
7544 (vfrsub_frm): Likewise.
7546 2023-08-01 Andrew Pinski <apinski@marvell.com>
7548 PR tree-optimization/93044
7549 * match.pd (nested int casts): A truncation (to the same size or smaller)
7550 can always remove the inner cast.
7552 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
7555 * doc/invoke.texi (-Wmissing-variable-declarations): Document
7558 2023-07-31 Andrew Pinski <apinski@marvell.com>
7560 PR tree-optimization/106164
7561 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
7562 `a == b | a < b`, `a == b | a > b`): Handle these cases
7565 2023-07-31 Andrew Pinski <apinski@marvell.com>
7567 PR tree-optimization/106164
7568 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
7569 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
7571 2023-07-31 Andrew Pinski <apinski@marvell.com>
7573 PR tree-optimization/100864
7574 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
7575 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
7576 (gimple_bitwise_inverted_equal_p): New function.
7577 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
7578 instead of direct matching bit_not.
7580 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
7583 * gcc-ar.cc (main): Expand argv and use
7584 temporary response file to call ar if any
7585 expansions were made.
7587 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
7589 PR tree-optimization/110582
7590 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
7591 range vector for non-ssa names.
7593 2023-07-31 David Malcolm <dmalcolm@redhat.com>
7596 * diagnostic-client-data-hooks.h (class sarif_object): New forward
7598 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
7600 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
7601 (class sarif_invocation): Inherit from sarif_object rather than
7603 (class sarif_result): Likewise.
7604 (class sarif_ice_notification): Likewise.
7605 (sarif_object::get_or_create_properties): New.
7606 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
7607 to call the context's add_sarif_invocation_properties hook.
7608 (sarif_builder::flush_to_file): Pass m_context to
7609 sarif_invocation::prepare_to_flush.
7610 * diagnostic-format-sarif.h: New header.
7611 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
7612 writes to stderr. Document that if SARIF diagnostic output is
7613 requested then any timing information is written in JSON form as
7614 part of the SARIF output, rather than to stderr.
7615 * timevar.cc: Include "json.h".
7616 (timer::named_items::m_hash_map): Split out type into...
7617 (timer::named_items::hash_map_t): ...this new typedef.
7618 (timer::named_items::make_json): New function.
7619 (timevar_diff): New function.
7620 (make_json_for_timevar_time_def): New function.
7621 (timer::timevar_def::make_json): New function.
7622 (timer::make_json): New function.
7623 * timevar.h (class json::value): New forward decl.
7624 (timer::make_json): New decl.
7625 (timer::timevar_def::make_json): New decl.
7626 * tree-diagnostic-client-data-hooks.cc: Include
7627 "diagnostic-format-sarif.h" and "timevar.h".
7628 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
7631 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7633 * combine.cc (simplify_compare_const): Narrow comparison of
7634 memory and constant.
7635 (try_combine): Adapt new function signature.
7636 (simplify_comparison): Adapt new function signature.
7638 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
7640 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
7642 (expand_vector_init_insert_elems): Ditto.
7644 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
7647 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
7648 single_defuse_cycle while counting reduction_latency.
7650 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7652 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
7653 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
7674 (COND_LEN_ADD): Ditto.
7675 (COND_LEN_SUB): Ditto.
7676 (COND_LEN_MUL): Ditto.
7677 (COND_LEN_DIV): Ditto.
7678 (COND_LEN_MOD): Ditto.
7679 (COND_LEN_RDIV): Ditto.
7680 (COND_LEN_MIN): Ditto.
7681 (COND_LEN_MAX): Ditto.
7682 (COND_LEN_FMIN): Ditto.
7683 (COND_LEN_FMAX): Ditto.
7684 (COND_LEN_AND): Ditto.
7685 (COND_LEN_IOR): Ditto.
7686 (COND_LEN_XOR): Ditto.
7687 (COND_LEN_SHL): Ditto.
7688 (COND_LEN_SHR): Ditto.
7689 (COND_LEN_FMA): Ditto.
7690 (COND_LEN_FMS): Ditto.
7691 (COND_LEN_FNMA): Ditto.
7692 (COND_LEN_FNMS): Ditto.
7693 (COND_LEN_NEG): Ditto.
7694 (ADD): New macro define.
7715 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
7718 * config/i386/i386-features.cc (compute_convert_gain): Check
7719 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
7720 and V4SImode rotates in STV.
7721 (general_scalar_chain::convert_rotate): Likewise.
7723 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
7725 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
7726 * config/riscv/riscv-protos.h (get_mask_mode): Update return
7728 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
7730 (emit_vlmax_insn): Ditto.
7731 (emit_vlmax_fp_insn): Ditto.
7732 (emit_vlmax_ternary_insn): Ditto.
7733 (emit_vlmax_fp_ternary_insn): Ditto.
7734 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
7735 (emit_nonvlmax_insn): Ditto.
7736 (emit_vlmax_slide_insn): Ditto.
7737 (emit_nonvlmax_slide_tu_insn): Ditto.
7738 (emit_vlmax_merge_insn): Ditto.
7739 (emit_vlmax_masked_insn): Ditto.
7740 (emit_nonvlmax_masked_insn): Ditto.
7741 (emit_vlmax_masked_store_insn): Ditto.
7742 (emit_nonvlmax_masked_store_insn): Ditto.
7743 (emit_vlmax_masked_mu_insn): Ditto.
7744 (emit_nonvlmax_tu_insn): Ditto.
7745 (emit_nonvlmax_fp_tu_insn): Ditto.
7746 (emit_scalar_move_insn): Ditto.
7747 (emit_vlmax_compress_insn): Ditto.
7748 (emit_vlmax_reduction_insn): Ditto.
7749 (emit_vlmax_fp_reduction_insn): Ditto.
7750 (emit_nonvlmax_fp_reduction_insn): Ditto.
7751 (expand_vec_series): Ditto.
7752 (expand_vector_init_merge_repeating_sequence): Ditto.
7753 (expand_vec_perm): Ditto.
7754 (shuffle_merge_patterns): Ditto.
7755 (shuffle_compress_patterns): Ditto.
7756 (shuffle_decompress_patterns): Ditto.
7757 (expand_reduction): Ditto.
7758 (get_mask_mode): Update return type.
7759 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
7760 is valid, and use new get_mask_mode interface.
7762 2023-07-31 Pan Li <pan2.li@intel.com>
7764 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
7765 Move rm suffix before mask.
7767 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7769 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
7770 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
7773 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
7776 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
7777 (extzv<mode>): Likewise.
7778 (insv<mode>): Likewise.
7779 (*testqi_ext_3): Likewise.
7780 (*btr<mode>_2): Likewise.
7781 (define_split): Likewise.
7782 (*btsq_imm): Likewise.
7783 (*btrq_imm): Likewise.
7784 (*btcq_imm): Likewise.
7785 (define_peephole2 x3): Likewise.
7786 (*bt<mode>): Likewise
7787 (*bt<mode>_mask): New define_insn_and_split.
7788 (*jcc_bt<mode>): Use QImode for offsets.
7789 (*jcc_bt<mode>_1): Delete obsolete pattern.
7790 (*jcc_bt<mode>_mask): Use QImode offsets.
7791 (*jcc_bt<mode>_mask_1): Likewise.
7792 (define_split): Likewise.
7793 (*bt<mode>_setcqi): Likewise.
7794 (*bt<mode>_setncqi): Likewise.
7795 (*bt<mode>_setnc<mode>): Likewise.
7796 (*bt<mode>_setncqi_2): Likewise.
7797 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
7798 (bmi2_bzhi_<mode>3): Use QImode offsets.
7799 (*bmi2_bzhi_<mode>3): Likewise.
7800 (*bmi2_bzhi_<mode>3_1): Likewise.
7801 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
7802 (@tbm_bextri_<mode>): Likewise.
7804 2023-07-29 Jan Hubicka <jh@suse.cz>
7806 * profile-count.cc (profile_probability::sqrt): New member function.
7807 (profile_probability::pow): Likewise.
7808 * profile-count.h: (profile_probability::sqrt): Declare
7809 (profile_probability::pow): Likewise.
7810 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
7812 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
7814 * gimple-range-cache.cc (ssa_cache::merge_range): New.
7815 (ssa_lazy_cache::merge_range): New.
7816 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
7817 (class ssa_lazy_cache): Ditto.
7818 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
7820 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
7822 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
7823 Move from value-query.cc.
7824 (substitute_and_fold_engine::value_of_stmt): Ditto.
7825 (substitute_and_fold_engine::range_of_expr): New.
7826 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
7827 range_query. New prototypes.
7828 * value-query.cc (value_query::value_on_edge): Relocate.
7829 (value_query::value_of_stmt): Ditto.
7830 * value-query.h (class value_query): Remove.
7831 (class range_query): Remove base class. Adjust prototypes.
7833 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
7835 PR tree-optimization/110205
7836 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
7837 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
7839 * range-op.cc (operator_lshift): Add missing final overrides.
7840 (operator_rshift): Ditto.
7842 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
7844 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
7845 optimizations in BPF target.
7847 2023-07-28 Honza <jh@ryzen4.suse.cz>
7849 * cfgloopmanip.cc (loop_count_in): Break out from ...
7850 (loop_exit_for_scaling): Break out from ...
7851 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
7852 add more sanity check and debug info.
7853 (scale_loop_profile): ... here.
7854 (create_empty_loop_on_edge): Fix whitespac.
7855 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
7856 * loop-unroll.cc (unroll_loop_constant_iterations): Use
7857 update_loop_exit_probability_scale_dom_bbs.
7858 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
7859 (tree_transform_and_unroll_loop): Use
7860 update_loop_exit_probability_scale_dom_bbs.
7861 * tree-ssa-loop-split.cc (split_loop): Use
7862 update_loop_exit_probability_scale_dom_bbs.
7864 2023-07-28 Jan Hubicka <jh@suse.cz>
7867 * tree-ssa-loop-split.cc: Include value-query.h.
7868 (split_at_bb_p): Analyze cases where EQ/NE can be turned
7869 into LT/LE/GT/GE; return updated guard code.
7870 (split_loop): Use guard code.
7872 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
7873 Richard Biener <rguenther@suse.de>
7876 PR rtl-optimization/110587
7877 * expr.cc (emit_group_load_1): Simplify logic for calling
7878 force_reg on ORIG_SRC, to avoid making a copy if the source
7879 is already in a pseudo register.
7881 2023-07-28 Jan Hubicka <jh@suse.cz>
7883 PR middle-end/106923
7884 * tree-ssa-loop-split.cc (connect_loops): Change probability
7885 of the test preconditioning second loop to very_likely.
7886 (fix_loop_bb_probability): Handle correctly case where
7887 on of the arms of the conditional is empty.
7888 (split_loop): Fold the test guarding first condition to
7889 see if it is constant true; Set correct entry block
7890 probabilities of the split loops; determine correct loop
7893 2023-07-28 xuli <xuli1@eswincomputing.com>
7895 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
7896 vsadd[u] and vssub[u].
7897 * config/riscv/vector.md: Ditto.
7899 2023-07-28 Jan Hubicka <jh@suse.cz>
7901 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
7902 loops when IV test is not overflowing.
7904 2023-07-28 liuhongt <hongtao.liu@intel.com>
7907 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
7909 (avx512cd_maskw_vec_dup<mode>): Ditto.
7911 2023-07-27 David Faust <david.faust@oracle.com>
7915 * config/bpf/bpf.opt (msmov): New option.
7916 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
7917 * config/bpf/bpf.md (*extendsidi2): New.
7923 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
7924 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
7925 also enables -msmov.
7927 2023-07-27 David Faust <david.faust@oracle.com>
7929 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
7930 Add -mbswap and -msdiv eBPF options.
7931 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
7932 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
7935 2023-07-27 David Faust <david.faust@oracle.com>
7937 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
7938 in pseudo-C dialect output template.
7939 (sub<AM:mode>3): Likewise.
7941 2023-07-27 Jan Hubicka <jh@suse.cz>
7943 * tree-vect-loop.cc (optimize_mask_stores): Make store
7946 2023-07-27 Jan Hubicka <jh@suse.cz>
7948 * cfgloop.h (single_dom_exit): Declare.
7949 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
7950 * cfgrtl.cc (struct cfg_hooks): Fix comment.
7951 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
7952 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
7953 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
7955 (tree_transform_and_unroll_loop): ... here;
7957 2023-07-27 Jan Hubicka <jh@suse.cz>
7959 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
7960 tree-ssa-loop-manip.cc and avoid recursion.
7961 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
7962 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
7964 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
7965 (scale_dominated_blocks_in_loop): Declare.
7966 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
7967 (change_edge_frequency): Remove.
7968 * predict.h (change_edge_frequency): Remove.
7969 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
7971 (niter_for_unrolled_loop): Remove.
7972 (tree_transform_and_unroll_loop): Fix profile update.
7974 2023-07-27 Jan Hubicka <jh@suse.cz>
7976 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
7977 to guessed; fix count of new_bb.
7979 2023-07-27 Jan Hubicka <jh@suse.cz>
7981 * profile-count.h (profile_count::apply_probability): Fix
7982 handling of uninitialized probabilities, optimize scaling
7985 2023-07-27 Richard Biener <rguenther@suse.de>
7987 PR tree-optimization/91838
7988 * gimple-match-head.cc: Include attribs.h and asan.h.
7989 * generic-match-head.cc: Likewise.
7990 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
7992 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7994 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
7995 (ADJUST_ALIGNMENT): Ditto.
7996 (ADJUST_PRECISION): Ditto.
7998 (VECTOR_MODE_WITH_PREFIX): Ditto.
7999 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
8000 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
8001 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
8002 (legitimize_move): Enable basic VLS modes support.
8005 (get_vector_mode): Ditto.
8006 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
8007 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
8008 (VLS_ENTRY): New macro.
8009 (riscv_v_ext_mode_p): Add vls modes.
8010 (riscv_get_v_regno_alignment): New function.
8011 (riscv_print_operand): Add vls modes.
8012 (riscv_hard_regno_nregs): Ditto.
8013 (riscv_hard_regno_mode_ok): Ditto.
8014 (riscv_regmode_natural_size): Ditto.
8015 (riscv_vectorize_preferred_vector_alignment): Ditto.
8016 * config/riscv/riscv.md: Ditto.
8017 * config/riscv/vector-iterators.md: Ditto.
8018 * config/riscv/vector.md: Ditto.
8019 * config/riscv/autovec-vls.md: New file.
8021 2023-07-27 Pan Li <pan2.li@intel.com>
8023 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
8025 (vwrite_csr): Ditto.
8027 2023-07-27 demin.han <demin.han@starfivetech.com>
8029 * config/riscv/autovec.md: Delete which_alternative use in split
8031 2023-07-27 Richard Biener <rguenther@suse.de>
8033 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
8035 (pass_sink_code::execute): ... in the caller.
8037 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
8038 Richard Biener <rguenther@suse.de>
8040 PR tree-optimization/110776
8041 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
8044 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
8046 * config/riscv/riscv.md: Include zicond.md
8047 * config/riscv/zicond.md: New file.
8049 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
8051 * common/config/riscv/riscv-common.cc: New extension.
8052 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
8053 (TARGET_ZICOND): New target.
8055 2023-07-26 Carl Love <cel@us.ibm.com>
8057 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
8058 specifies the number of built-in arguments to check.
8059 (altivec_resolve_overloaded_builtin): Update calls to find_instance
8060 to pass the number of built-in arguments to be checked.
8062 2023-07-26 David Faust <david.faust@oracle.com>
8064 * config/bpf/bpf.opt (mv3-atomics): New option.
8065 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
8066 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
8067 (REG_CLASS_NAMES): Likewise.
8068 (REG_CLASS_CONTENTS): Likewise.
8069 (REGNO_REG_CLASS): Handle R0.
8070 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
8071 (UNSPEC_AAND): New unspec.
8072 (UNSPEC_AOR): Likewise.
8073 (UNSPEC_AXOR): Likewise.
8074 (UNSPEC_AFADD): Likewise.
8075 (UNSPEC_AFAND): Likewise.
8076 (UNSPEC_AFOR): Likewise.
8077 (UNSPEC_AFXOR): Likewise.
8078 (UNSPEC_AXCHG): Likewise.
8079 (UNSPEC_ACMPX): Likewise.
8080 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
8082 * config/bpf/atomic.md: ...Here. New file.
8083 * config/bpf/constraints.md (t): New constraint for R0.
8084 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
8086 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
8088 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
8091 2023-07-26 Carl Love <cel@us.ibm.com>
8093 * config/rs6000/rs6000-builtins.def: Rename
8094 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
8095 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
8096 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
8097 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
8098 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
8099 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
8100 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
8101 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
8102 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
8103 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
8104 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
8105 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
8106 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
8107 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
8108 * config/rs6000/rs6000-c.cc (find_instance): Add case
8109 RS6000_OVLD_VEC_REPLACE_UN.
8110 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
8111 Fix first argument type. Rename VREPLACE_UN_UV4SI as
8112 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
8113 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
8114 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
8115 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
8116 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
8117 REPLACE_ELT_V for vector modes.
8118 (REPLACE_ELT): New scalar mode iterator.
8119 (REPLACE_ELT_char): Add scalar attributes.
8120 (vreplace_un_<mode>): Change iterator and mode attribute.
8122 2023-07-26 David Malcolm <dmalcolm@redhat.com>
8125 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
8127 2023-07-26 Richard Biener <rguenther@suse.de>
8129 PR tree-optimization/106081
8130 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
8131 Assign layout -1 to splats.
8133 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8135 * range-op-mixed.h (class operator_cast): Add update_bitmask.
8136 * range-op.cc (operator_cast::update_bitmask): New.
8137 (operator_cast::fold_range): Call update_bitmask.
8139 2023-07-26 Li Xu <xuli1@eswincomputing.com>
8141 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
8142 scalar type to float16, eliminate warning.
8143 (vfloat16mf4x3_t): Ditto.
8144 (vfloat16mf4x4_t): Ditto.
8145 (vfloat16mf4x5_t): Ditto.
8146 (vfloat16mf4x6_t): Ditto.
8147 (vfloat16mf4x7_t): Ditto.
8148 (vfloat16mf4x8_t): Ditto.
8149 (vfloat16mf2x2_t): Ditto.
8150 (vfloat16mf2x3_t): Ditto.
8151 (vfloat16mf2x4_t): Ditto.
8152 (vfloat16mf2x5_t): Ditto.
8153 (vfloat16mf2x6_t): Ditto.
8154 (vfloat16mf2x7_t): Ditto.
8155 (vfloat16mf2x8_t): Ditto.
8156 (vfloat16m1x2_t): Ditto.
8157 (vfloat16m1x3_t): Ditto.
8158 (vfloat16m1x4_t): Ditto.
8159 (vfloat16m1x5_t): Ditto.
8160 (vfloat16m1x6_t): Ditto.
8161 (vfloat16m1x7_t): Ditto.
8162 (vfloat16m1x8_t): Ditto.
8163 (vfloat16m2x2_t): Ditto.
8164 (vfloat16m2x3_t): Ditto.
8165 (vfloat16m2x4_t): Ditto.
8166 (vfloat16m4x2_t): Ditto.
8167 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
8168 * config/riscv/vector.md: add tuple mode in attr sew.
8170 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
8173 * config/i386/i386.md (plusminusmult): New code iterator.
8174 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
8175 (movq_<mode>_to_sse): New expander.
8176 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
8177 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
8178 as a wrapper around V4SFmode operation.
8179 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
8180 nonimmediate_operand.
8181 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
8182 operand 2 predicates to nonimmediate_operand.
8183 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
8184 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
8185 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
8186 operand 2 predicates to nonimmediate_operand.
8187 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
8188 nonimmediate_operand.
8189 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
8190 operand 2 predicates to nonimmediate_operand.
8191 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
8192 (<smaxmin:code>v2sf3): Ditto.
8193 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
8194 predicates to nonimmediate_operand.
8195 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
8196 operand 1 and operand 2 predicates to nonimmediate_operand.
8197 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8198 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
8199 (*mmx_haddv2sf3_low): Ditto.
8200 (*mmx_hsubv2sf3_low): Ditto.
8201 (vec_addsubv2sf3): Ditto.
8202 (*mmx_maskcmpv2sf3_comm): Remove.
8203 (*mmx_maskcmpv2sf3): Remove.
8204 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
8205 (vcond<V2FI:mode>v2sf): Ditto.
8210 (fix_truncv2sfv2si2): Ditto.
8211 (fixuns_truncv2sfv2si2): Ditto.
8212 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
8213 Change operand 1 predicate to nonimmediate_operand.
8214 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
8215 (floatunsv2siv2sf2): Ditto.
8216 (mmx_floatv2siv2sf2): Remove SSE alternatives.
8217 Change operand 1 predicate to nonimmediate_operand.
8218 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
8220 (lrintv2sfv2si2): Ditto.
8222 (lceilv2sfv2si2): Ditto.
8223 (floorv2sf2): Ditto.
8224 (lfloorv2sfv2si2): Ditto.
8225 (btruncv2sf2): Ditto.
8226 (roundv2sf2): Ditto.
8227 (lroundv2sfv2si2): Ditto.
8228 (*mmx_roundv2sf2): Remove.
8230 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
8232 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
8234 2023-07-26 Richard Biener <rguenther@suse.de>
8236 PR tree-optimization/110799
8237 * tree-ssa-pre.cc (compute_avail): More thoroughly match
8238 up TBAA behavior of redundant loads.
8240 2023-07-26 Jakub Jelinek <jakub@redhat.com>
8242 PR tree-optimization/110755
8243 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
8244 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
8245 it is exact op1 + (-op1) or op1 - op1.
8247 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
8250 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
8251 operands output with "x".
8253 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8255 * range-op.cc (class operator_absu): Add update_bitmask.
8256 (operator_absu::update_bitmask): New.
8258 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8260 * range-op-mixed.h (class operator_abs): Add update_bitmask.
8261 * range-op.cc (operator_abs::update_bitmask): New.
8263 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8265 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
8266 * range-op.cc (operator_bitwise_not::update_bitmask): New.
8268 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8270 * range-op.cc (update_known_bitmask): Handle unary operators.
8272 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8274 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
8276 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
8278 * config/riscv/riscv.md: Likewise.
8280 2023-07-26 Jan Hubicka <jh@suse.cz>
8282 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
8283 if we divide by zero.
8285 2023-07-25 David Faust <david.faust@oracle.com>
8287 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
8288 enclosing parentheses for pseudo-C dialect.
8289 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
8290 operands of pseudo-C dialect output templates where needed.
8291 (zero_extendqidi2): Likewise.
8292 (zero_extendsidi2): Likewise.
8293 (*mov<MM:mode>): Likewise.
8295 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
8297 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
8298 (bit_value_mult_const): Same.
8299 (get_individual_bits): Same.
8301 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
8304 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
8305 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
8306 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
8307 (minmax_op): New int attribute.
8308 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
8309 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
8310 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
8312 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
8314 2023-07-24 David Faust <david.faust@oracle.com>
8316 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
8318 2023-07-24 Drew Ross <drross@redhat.com>
8319 Jakub Jelinek <jakub@redhat.com>
8321 PR middle-end/109986
8322 * generic-match-head.cc (bitwise_equal_p): New macro.
8323 * gimple-match-head.cc (bitwise_equal_p): New macro.
8324 (gimple_nop_convert): Declare.
8325 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
8326 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
8328 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
8330 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
8331 single quote rather than backquote in diagnostic.
8333 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
8336 * config/bpf/bpf.opt: New command-line option -msdiv.
8337 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
8338 * config/bpf/bpf.cc (bpf_option_override): Initialize
8340 * doc/invoke.texi (eBPF Options): Document -msdiv.
8342 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
8344 * config/riscv/riscv.cc (riscv_option_override): Spell out
8345 greater than and use cannot in diagnostic string.
8347 2023-07-24 Richard Biener <rguenther@suse.de>
8349 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
8350 (_slp_tree::vec_stmts): Remove.
8351 (SLP_TREE_VEC_STMTS): Remove.
8352 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
8353 (_slp_tree::_slp_tree): Adjust.
8354 (_slp_tree::~_slp_tree): Likewise.
8355 (vect_get_slp_vect_def): Simplify.
8356 (vect_get_slp_defs): Likewise.
8357 (vect_transform_slp_perm_load_1): Adjust.
8358 (vect_add_slp_permutation): Likewise.
8359 (vect_schedule_slp_node): Likewise.
8360 (vectorize_slp_instance_root_stmt): Likewise.
8361 (vect_schedule_scc): Likewise.
8362 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
8363 (vectorizable_call): Likewise.
8364 (vectorizable_call): Likewise.
8365 (vect_create_vectorized_demotion_stmts): Likewise.
8366 (vectorizable_conversion): Likewise.
8367 (vectorizable_assignment): Likewise.
8368 (vectorizable_shift): Likewise.
8369 (vectorizable_operation): Likewise.
8370 (vectorizable_load): Likewise.
8371 (vectorizable_condition): Likewise.
8372 (vectorizable_comparison): Likewise.
8373 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
8374 (vectorize_fold_left_reduction): Use push_vec_def.
8375 (vect_transform_reduction): Likewise.
8376 (vect_transform_cycle_phi): Likewise.
8377 (vectorizable_lc_phi): Likewise.
8378 (vectorizable_phi): Likewise.
8379 (vectorizable_recurr): Likewise.
8380 (vectorizable_induction): Likewise.
8381 (vectorizable_live_operation): Likewise.
8383 2023-07-24 Richard Biener <rguenther@suse.de>
8385 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
8387 2023-07-24 Richard Biener <rguenther@suse.de>
8389 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
8390 * config/i386/i386-expand.cc: Likewise.
8391 * config/i386/i386-features.cc: Likewise.
8392 * config/i386/i386-options.cc: Likewise.
8394 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
8396 * tree-vect-stmts.cc (vectorizable_conversion): Handle
8397 more demotion/promotion for modifier == NONE.
8399 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
8404 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
8405 (extzv<mode>): Likewise.
8406 (insv<mode>): Likewise.
8407 (*testqi_ext_3): Likewise.
8408 (*btr<mode>_2): Likewise.
8409 (define_split): Likewise.
8410 (*btsq_imm): Likewise.
8411 (*btrq_imm): Likewise.
8412 (*btcq_imm): Likewise.
8413 (define_peephole2 x3): Likewise.
8414 (*bt<mode>): Likewise
8415 (*bt<mode>_mask): New define_insn_and_split.
8416 (*jcc_bt<mode>): Use QImode for offsets.
8417 (*jcc_bt<mode>_1): Delete obsolete pattern.
8418 (*jcc_bt<mode>_mask): Use QImode offsets.
8419 (*jcc_bt<mode>_mask_1): Likewise.
8420 (define_split): Likewise.
8421 (*bt<mode>_setcqi): Likewise.
8422 (*bt<mode>_setncqi): Likewise.
8423 (*bt<mode>_setnc<mode>): Likewise.
8424 (*bt<mode>_setncqi_2): Likewise.
8425 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
8426 (bmi2_bzhi_<mode>3): Use QImode offsets.
8427 (*bmi2_bzhi_<mode>3): Likewise.
8428 (*bmi2_bzhi_<mode>3_1): Likewise.
8429 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
8430 (@tbm_bextri_<mode>): Likewise.
8432 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
8434 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
8435 * config/bpf/bpf.opt (mkernel): Remove option.
8436 * config/bpf/bpf.cc (bpf_target_macros): Do not define
8437 BPF_KERNEL_VERSION_CODE.
8439 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
8442 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
8443 (mbswap): New option.
8444 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
8445 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
8446 * config/bpf/bpf.md: Use bswap instructions if available for
8447 bswap* insn, and fix constraint.
8448 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
8450 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8452 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
8453 (mask_len_fold_left_plus_<mode>): Ditto.
8454 * config/riscv/riscv-protos.h (enum insn_type): New enum.
8455 (enum reduction_type): Ditto.
8456 (expand_reduction): Add in-order reduction.
8457 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
8458 (expand_reduction): Add in-order reduction.
8460 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8462 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
8463 (vectorize_fold_left_reduction): Ditto.
8464 (vectorizable_reduction): Ditto.
8465 (vect_transform_reduction): Ditto.
8467 2023-07-24 Richard Biener <rguenther@suse.de>
8469 PR tree-optimization/110777
8470 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
8471 Avoid propagating abnormals.
8473 2023-07-24 Richard Biener <rguenther@suse.de>
8475 PR tree-optimization/110766
8476 * tree-scalar-evolution.cc
8477 (analyze_and_compute_bitwise_induction_effect): Check the PHI
8478 is defined in the loop header.
8480 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
8482 PR tree-optimization/110740
8483 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
8484 loop with a single scalar iteration.
8486 2023-07-24 Pan Li <pan2.li@intel.com>
8488 * config/riscv/riscv-vector-builtins-shapes.cc
8489 (struct alu_frm_def): Take range check.
8491 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
8494 * config/riscv/predicates.md (const_0_operand): Add back
8497 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
8499 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
8500 64-bit insertions into TImode optimizations with -O0, unless
8501 the function has the "naked" attribute (for PR target/110533).
8503 2023-07-22 Andrew Pinski <apinski@marvell.com>
8506 * rtl.h (extended_count): Change last argument type
8509 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
8511 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
8512 (extzv<mode>): Likewise.
8513 (insv<mode>): Likewise.
8514 (*testqi_ext_3): Likewise.
8515 (*btr<mode>_2): Likewise.
8516 (define_split): Likewise.
8517 (*btsq_imm): Likewise.
8518 (*btrq_imm): Likewise.
8519 (*btcq_imm): Likewise.
8520 (define_peephole2 x3): Likewise.
8521 (*bt<mode>): Likewise
8522 (*bt<mode>_mask): New define_insn_and_split.
8523 (*jcc_bt<mode>): Use QImode for offsets.
8524 (*jcc_bt<mode>_1): Delete obsolete pattern.
8525 (*jcc_bt<mode>_mask): Use QImode offsets.
8526 (*jcc_bt<mode>_mask_1): Likewise.
8527 (define_split): Likewise.
8528 (*bt<mode>_setcqi): Likewise.
8529 (*bt<mode>_setncqi): Likewise.
8530 (*bt<mode>_setnc<mode>): Likewise.
8531 (*bt<mode>_setncqi_2): Likewise.
8532 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
8533 (bmi2_bzhi_<mode>3): Use QImode offsets.
8534 (*bmi2_bzhi_<mode>3): Likewise.
8535 (*bmi2_bzhi_<mode>3_1): Likewise.
8536 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
8537 (@tbm_bextri_<mode>): Likewise.
8539 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
8541 * config/bfin/bfin.md (ones): Fix length computation.
8543 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
8545 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
8546 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
8547 instead of FRAME_POINTER_REGNUM to spill pseudos.
8549 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
8550 Richard Biener <rguenther@suse.de>
8553 * gimplify.cc (gimplify_compound_lval): If the array's type
8554 is error_mark_node then return GS_ERROR.
8556 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
8559 * config/bpf/bpf.opt: Added option -masm=<dialect>.
8560 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
8561 * config/bpf/bpf.cc (bpf_print_register): New function.
8562 (bpf_print_register): Support pseudo-c syntax for registers.
8563 (bpf_print_operand_address): Likewise.
8564 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
8565 (ASSEMBLER_DIALECT): Define.
8566 * config/bpf/bpf.md: Added pseudo-c templates.
8567 * doc/invoke.texi (-masm=): New eBPF option item.
8569 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
8571 * config/bpf/bpf.md: fixed template for neg instruction.
8573 2023-07-21 Jan Hubicka <jh@suse.cz>
8576 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
8577 profiles by vectorization factor.
8578 (vect_transform_loop): Check for flat profiles.
8580 2023-07-21 Jan Hubicka <jh@suse.cz>
8582 * cfgloop.h (maybe_flat_loop_profile): Declare
8583 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
8584 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
8586 2023-07-21 Jan Hubicka <jh@suse.cz>
8588 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
8589 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
8590 * predict.cc (estimate_bb_frequencies): Likewise.
8591 * profile.cc (branch_prob): Likewise.
8592 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
8594 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
8596 * config.in: Regenerate.
8597 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
8598 (LINK_COMMAND_SPEC_A): Add demangle handling.
8599 * configure: Regenerate.
8600 * configure.ac: Detect linker support for '-demangle'.
8602 2023-07-21 Jan Hubicka <jh@suse.cz>
8604 * sreal.cc (sreal::to_nearest_int): New.
8605 (sreal_verify_basics): Verify also to_nearest_int.
8606 (verify_aritmetics): Likewise.
8607 (sreal_verify_conversions): New.
8608 (sreal_cc_tests): Call sreal_verify_conversions.
8609 * sreal.h: (sreal::to_nearest_int): Declare
8611 2023-07-21 Jan Hubicka <jh@suse.cz>
8613 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
8614 (should_duplicate_loop_header_p): Return info on profitability.
8615 (do_while_loop_p): Watch for constant conditionals.
8616 (update_profile_after_ch): Do not sanity check that all
8617 static exits are taken.
8618 (ch_base::copy_headers): Run on all loops.
8619 (pass_ch::process_loop_p): Improve heuristics by handling also
8620 do_while loop and duplicating shortest sequence containing all
8623 2023-07-21 Jan Hubicka <jh@suse.cz>
8625 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
8626 tests first; update finite_p flag.
8628 2023-07-21 Jan Hubicka <jh@suse.cz>
8630 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
8631 * cfgloop.h (print_loop_info): Declare.
8632 * tree-cfg.cc (print_loop_info): Break out from ...; add
8633 printing of missing fields and profile
8634 (print_loop): ... here.
8636 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8638 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
8640 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8642 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
8643 (vectorizable_operation): Ditto.
8645 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8647 * config/riscv/autovec.md: Align order of mask and len.
8648 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
8649 (expand_gather_scatter): Ditto.
8650 * doc/md.texi: Ditto.
8651 * internal-fn.cc (add_len_and_mask_args): Ditto.
8652 (add_mask_and_len_args): Ditto.
8653 (expand_partial_load_optab_fn): Ditto.
8654 (expand_partial_store_optab_fn): Ditto.
8655 (expand_scatter_store_optab_fn): Ditto.
8656 (expand_gather_load_optab_fn): Ditto.
8657 (internal_fn_len_index): Ditto.
8658 (internal_fn_mask_index): Ditto.
8659 (internal_len_load_store_bias): Ditto.
8660 * tree-vect-stmts.cc (vectorizable_store): Ditto.
8661 (vectorizable_load): Ditto.
8663 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8665 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
8666 (mask_len_load<mode><vm>): Ditto.
8667 (len_maskstore<mode><vm>): Ditto.
8668 (mask_len_store<mode><vm>): Ditto.
8669 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
8670 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
8671 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
8672 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
8673 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
8674 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
8675 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
8676 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
8677 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
8678 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
8679 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
8680 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
8681 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
8682 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
8683 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
8684 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
8685 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
8686 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
8687 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
8688 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
8689 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
8690 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
8691 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
8692 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
8693 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
8694 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
8695 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
8696 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
8697 * doc/md.texi: Ditto.
8698 * genopinit.cc (main): Ditto.
8699 (CMP_NAME): Ditto. Ditto.
8700 * gimple-fold.cc (arith_overflowed_p): Ditto.
8701 (gimple_fold_partial_load_store_mem_ref): Ditto.
8702 (gimple_fold_call): Ditto.
8703 * internal-fn.cc (len_maskload_direct): Ditto.
8704 (mask_len_load_direct): Ditto.
8705 (len_maskstore_direct): Ditto.
8706 (mask_len_store_direct): Ditto.
8707 (expand_call_mem_ref): Ditto.
8708 (expand_len_maskload_optab_fn): Ditto.
8709 (expand_mask_len_load_optab_fn): Ditto.
8710 (expand_len_maskstore_optab_fn): Ditto.
8711 (expand_mask_len_store_optab_fn): Ditto.
8712 (direct_len_maskload_optab_supported_p): Ditto.
8713 (direct_mask_len_load_optab_supported_p): Ditto.
8714 (direct_len_maskstore_optab_supported_p): Ditto.
8715 (direct_mask_len_store_optab_supported_p): Ditto.
8716 (internal_load_fn_p): Ditto.
8717 (internal_store_fn_p): Ditto.
8718 (internal_gather_scatter_fn_p): Ditto.
8719 (internal_fn_len_index): Ditto.
8720 (internal_fn_mask_index): Ditto.
8721 (internal_fn_stored_value_index): Ditto.
8722 (internal_len_load_store_bias): Ditto.
8723 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
8724 (MASK_LEN_GATHER_LOAD): Ditto.
8725 (LEN_MASK_LOAD): Ditto.
8726 (MASK_LEN_LOAD): Ditto.
8727 (LEN_MASK_SCATTER_STORE): Ditto.
8728 (MASK_LEN_SCATTER_STORE): Ditto.
8729 (LEN_MASK_STORE): Ditto.
8730 (MASK_LEN_STORE): Ditto.
8731 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
8732 (supports_vec_scatter_store_p): Ditto.
8733 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
8734 (target_supports_len_load_store_p): Ditto.
8735 * optabs.def (OPTAB_CD): Ditto.
8736 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
8737 (call_may_clobber_ref_p_1): Ditto.
8738 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
8739 (dse_optimize_stmt): Ditto.
8740 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
8741 (get_alias_ptr_type_for_ptr_address): Ditto.
8742 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
8743 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
8744 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
8745 (vect_get_strided_load_store_ops): Ditto.
8746 (vectorizable_store): Ditto.
8747 (vectorizable_load): Ditto.
8749 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
8751 * config/i386/i386.opt: Fix a typo.
8753 2023-07-21 Richard Biener <rguenther@suse.de>
8755 PR tree-optimization/88540
8756 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
8757 with NaNs but handle the simple case by if-converting to a
8760 2023-07-21 Andrew Pinski <apinski@marvell.com>
8762 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
8765 2023-07-21 Richard Biener <rguenther@suse.de>
8767 PR tree-optimization/110742
8768 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
8769 Do not materialize an edge permutation in an external node with
8771 (vect_slp_analyze_node_operations_1): Guard purely internal
8774 2023-07-21 Jan Hubicka <jh@suse.cz>
8776 * cfgloop.cc: Include sreal.h.
8777 (flow_loop_dump): Dump sreal iteration exsitmate.
8778 (get_estimated_loop_iterations): Update.
8779 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
8780 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
8781 (expected_loop_iterations_unbounded): Use new API.
8782 * cfgloopmanip.cc (scale_loop_profile): Use
8783 expected_loop_iterations_by_profile
8784 * predict.cc (pass_profile::execute): Likewise.
8785 * profile.cc (branch_prob): Likewise.
8786 * tree-ssa-loop-niter.cc: Include sreal.h.
8787 (estimate_numbers_of_iterations): Likewise
8789 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
8791 PR tree-optimization/110744
8792 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
8793 operand for ifn IFN_LEN_STORE.
8795 2023-07-21 liuhongt <hongtao.liu@intel.com>
8798 * common.opt: (fcf-protection=): Add EnumSet attribute to
8799 support combination of params.
8801 2023-07-21 David Malcolm <dmalcolm@redhat.com>
8803 PR middle-end/110612
8804 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
8806 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
8807 (table_geometry::table_y_to_canvas_y): Likewise.
8808 * text-art/table.h (table_geometry::m_table): Drop unused field.
8809 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
8812 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
8815 * config/i386/i386-features.cc
8816 (general_scalar_chain::compute_convert_gain): Calculate gain
8817 for extend higpart case.
8818 (general_scalar_chain::convert_op): Handle
8819 ASHIFTRT/ASHIFT combined RTX.
8820 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
8821 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
8822 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
8823 New define_insn_and_split pattern.
8824 (*extendv2di2_highpart_stv): Ditto.
8826 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
8828 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
8831 2023-07-20 Andrew Pinski <apinski@marvell.com>
8833 * combine.cc (dump_combine_stats): Remove.
8834 (dump_combine_total_stats): Remove.
8835 (total_attempts, total_merges, total_extras,
8836 total_successes): Remove.
8837 (combine_instructions): Don't increment total stats
8838 instead use statistics_counter_event.
8839 * dumpfile.cc (print_combine_total_stats): Remove.
8840 * dumpfile.h (print_combine_total_stats): Remove.
8841 (dump_combine_total_stats): Remove.
8842 * passes.cc (finish_optimization_passes):
8843 Don't call print_combine_total_stats.
8844 * rtl.h (dump_combine_total_stats): Remove.
8845 (dump_combine_stats): Remove.
8847 2023-07-20 Jan Hubicka <jh@suse.cz>
8849 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
8852 2023-07-20 Martin Jambor <mjambor@suse.cz>
8854 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
8855 (analyzer-text-art-ideal-canvas-width): Likewise.
8856 (analyzer-text-art-string-ellipsis-head-len): Likewise.
8857 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
8859 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8861 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
8862 Refine code structure.
8864 2023-07-20 Jan Hubicka <jh@suse.cz>
8866 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
8867 (get_range_query): ... this one; do
8868 (static_loop_exit): Add query parametr, turn ranger to reference.
8869 (loop_static_stmt_p): New function.
8870 (loop_static_op_p): New function.
8871 (loop_iv_derived_p): Remove.
8872 (loop_combined_static_and_iv_p): New function.
8873 (should_duplicate_loop_header_p): Discover combined onditionals;
8874 do not track iv derived; improve dumps.
8875 (pass_ch::execute): Fix whitespace.
8877 2023-07-20 Richard Biener <rguenther@suse.de>
8879 PR tree-optimization/110204
8880 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
8881 Look through copies generated by PRE.
8883 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
8885 * tree-vect-stmts.cc (get_group_load_store_type): Account for
8886 `gap` when checking if need to peel twice.
8888 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
8891 * doc/extend.texi: Document iseqsig builtin.
8892 * builtins.cc (fold_builtin_iseqsig): New function.
8893 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
8894 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
8895 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
8897 2023-07-20 Pan Li <pan2.li@intel.com>
8899 * config/riscv/vector.md: Fix incorrect match_operand.
8901 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
8903 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
8904 force_reg, to use SUBREG rather than create a new pseudo when
8905 inserting DFmode fields into TImode with insvti_{high,low}part.
8906 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
8907 define_insn_and_split...
8908 (*concatditi3_3): 64-bit implementation. Provide alternative
8909 that allows register allocation to use SSE registers that is
8910 split into vec_concatv2di after reload.
8911 (*concatsidi3_3): 32-bit implementation.
8913 2023-07-20 Richard Biener <rguenther@suse.de>
8916 * internal-fn.cc (expand_vec_cond_optab_fn): When the
8917 value operands are equal to the original comparison operands
8918 preserve that equality by re-using the comparison expansion.
8919 * optabs.cc (emit_conditional_move): When the value operands
8920 are equal to the comparison operands and would be forced to
8921 a register by prepare_cmp_insn do so earlier, preserving the
8924 2023-07-20 Pan Li <pan2.li@intel.com>
8926 * config/riscv/vector.md: Align pattern format.
8928 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
8930 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
8931 Granite Rapids{, D} from documentation.
8933 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8935 * config/riscv/autovec.md
8936 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
8937 Refactor RVV machine modes.
8938 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
8939 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
8940 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
8941 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
8942 (len_mask_gather_load<mode><mode>): Ditto.
8943 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
8944 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
8945 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
8946 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
8947 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
8948 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
8949 (len_mask_scatter_store<mode><mode>): Ditto.
8950 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
8951 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
8952 (ADJUST_NUNITS): Ditto.
8953 (ADJUST_ALIGNMENT): Ditto.
8954 (ADJUST_BYTESIZE): Ditto.
8955 (ADJUST_PRECISION): Ditto.
8957 (RVV_WHOLE_MODES): Ditto.
8958 (RVV_FRACT_MODE): Ditto.
8959 (RVV_NF8_MODES): Ditto.
8960 (RVV_NF4_MODES): Ditto.
8961 (VECTOR_MODES_WITH_PREFIX): Ditto.
8962 (VECTOR_MODE_WITH_PREFIX): Ditto.
8963 (RVV_TUPLE_MODES): Ditto.
8964 (RVV_NF2_MODES): Ditto.
8965 (RVV_TUPLE_PARTIAL_MODES): Ditto.
8966 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
8968 (TUPLE_ENTRY): Ditto.
8972 (preferred_simd_mode): Ditto.
8973 (autovectorize_vector_modes): Ditto.
8974 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
8975 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
8983 (vint8mf8_t): Ditto.
8984 (vuint8mf8_t): Ditto.
8985 (vint8mf4_t): Ditto.
8986 (vuint8mf4_t): Ditto.
8987 (vint8mf2_t): Ditto.
8988 (vuint8mf2_t): Ditto.
8990 (vuint8m1_t): Ditto.
8992 (vuint8m2_t): Ditto.
8994 (vuint8m4_t): Ditto.
8996 (vuint8m8_t): Ditto.
8997 (vint16mf4_t): Ditto.
8998 (vuint16mf4_t): Ditto.
8999 (vint16mf2_t): Ditto.
9000 (vuint16mf2_t): Ditto.
9001 (vint16m1_t): Ditto.
9002 (vuint16m1_t): Ditto.
9003 (vint16m2_t): Ditto.
9004 (vuint16m2_t): Ditto.
9005 (vint16m4_t): Ditto.
9006 (vuint16m4_t): Ditto.
9007 (vint16m8_t): Ditto.
9008 (vuint16m8_t): Ditto.
9009 (vint32mf2_t): Ditto.
9010 (vuint32mf2_t): Ditto.
9011 (vint32m1_t): Ditto.
9012 (vuint32m1_t): Ditto.
9013 (vint32m2_t): Ditto.
9014 (vuint32m2_t): Ditto.
9015 (vint32m4_t): Ditto.
9016 (vuint32m4_t): Ditto.
9017 (vint32m8_t): Ditto.
9018 (vuint32m8_t): Ditto.
9019 (vint64m1_t): Ditto.
9020 (vuint64m1_t): Ditto.
9021 (vint64m2_t): Ditto.
9022 (vuint64m2_t): Ditto.
9023 (vint64m4_t): Ditto.
9024 (vuint64m4_t): Ditto.
9025 (vint64m8_t): Ditto.
9026 (vuint64m8_t): Ditto.
9027 (vfloat16mf4_t): Ditto.
9028 (vfloat16mf2_t): Ditto.
9029 (vfloat16m1_t): Ditto.
9030 (vfloat16m2_t): Ditto.
9031 (vfloat16m4_t): Ditto.
9032 (vfloat16m8_t): Ditto.
9033 (vfloat32mf2_t): Ditto.
9034 (vfloat32m1_t): Ditto.
9035 (vfloat32m2_t): Ditto.
9036 (vfloat32m4_t): Ditto.
9037 (vfloat32m8_t): Ditto.
9038 (vfloat64m1_t): Ditto.
9039 (vfloat64m2_t): Ditto.
9040 (vfloat64m4_t): Ditto.
9041 (vfloat64m8_t): Ditto.
9042 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
9043 (TUPLE_ENTRY): Ditto.
9044 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
9045 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
9046 (riscv_v_adjust_nunits): Ditto.
9047 (riscv_v_adjust_bytesize): Ditto.
9048 (riscv_v_adjust_precision): Ditto.
9049 (riscv_convert_vector_bits): Ditto.
9050 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
9051 * config/riscv/riscv.md: Ditto.
9052 * config/riscv/vector-iterators.md: Ditto.
9053 * config/riscv/vector.md
9054 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9055 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
9056 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9057 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
9058 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9059 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
9060 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
9061 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
9062 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
9063 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
9064 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
9065 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
9066 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
9067 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
9068 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
9069 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
9070 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
9071 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
9072 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
9073 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
9074 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
9075 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
9076 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
9077 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
9078 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
9079 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
9080 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
9081 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
9082 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
9083 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
9084 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
9085 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
9086 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
9088 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
9090 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
9091 (lra_asm_insn_error): New prototype.
9092 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
9094 (lra_spill): Call lra_update_fp2sp_elimination.
9095 * lra-eliminations.cc: Remove trailing spaces.
9096 (elimination_fp2sp_occured_p): New static flag.
9097 (lra_eliminate_regs_1): Set the flag up.
9098 (update_reg_eliminate): Modify the assert for stack to frame
9099 pointer elimination.
9100 (lra_update_fp2sp_elimination): New function.
9101 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
9103 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
9105 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
9107 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
9108 dependencies from target pragmas.
9109 * config/aarch64/arm_fp16.h (target): Likewise.
9110 * config/aarch64/arm_neon.h (target): Likewise.
9112 2023-07-19 Andrew Pinski <apinski@marvell.com>
9114 PR tree-optimization/110252
9115 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
9116 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
9117 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
9118 (match_simplify_replacement): Temporarily
9119 remove the flow sensitive info on the two statements that might
9122 2023-07-19 Andrew Pinski <apinski@marvell.com>
9124 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
9125 with flow_sensitive_info_storage.
9126 (follow_outer_ssa_edges): Update how to save off the flow
9128 (maybe_fold_comparisons_from_match_pd): Update restoring
9129 of flow sensitive info.
9130 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
9131 (flow_sensitive_info_storage::restore): New method.
9132 (flow_sensitive_info_storage::save_and_clear): New method.
9133 (flow_sensitive_info_storage::clear_storage): New method.
9134 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
9136 2023-07-19 Andrew Pinski <apinski@marvell.com>
9138 PR tree-optimization/110726
9139 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
9140 Add checks to make sure the type was one bit precision
9143 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9145 * doc/md.texi: Add mask_len_fold_left_plus.
9146 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
9147 (expand_mask_len_fold_left_optab_fn): Ditto.
9148 (direct_mask_len_fold_left_optab_supported_p): Ditto.
9149 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
9150 * optabs.def (OPTAB_D): Ditto.
9152 2023-07-19 Jakub Jelinek <jakub@redhat.com>
9154 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
9156 2023-07-19 Jakub Jelinek <jakub@redhat.com>
9158 PR tree-optimization/110731
9159 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
9160 divisor as UNSIGNED regardless of sgn.
9162 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
9164 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
9165 (standard_extensions_p): Add check.
9166 (riscv_subset_list::add): Just return NULL if it failed before.
9167 (riscv_subset_list::parse_std_ext): Continue parse when find a error
9168 (riscv_subset_list::parse): Just return NULL if it failed before.
9169 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
9171 2023-07-19 Jan Beulich <jbeulich@suse.com>
9173 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
9175 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
9177 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
9178 gen_vec_interleave_low. Rename local variable.
9180 2023-07-19 Jan Beulich <jbeulich@suse.com>
9182 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
9183 alternative. Move AVX512VL part of condition to new "enabled"
9186 2023-07-19 liuhongt <hongtao.liu@intel.com>
9189 * config/i386/i386-builtins.cc
9190 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
9191 (ix86_register_bf16_builtin_type): Ditto.
9192 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
9193 isn't available, undef the macros which are used to check the
9194 backend support of the _Float16/__bf16 types when building
9195 libstdc++ and libgcc.
9196 * config/i386/i386.cc (construct_container): Issue errors for
9197 HFmode/BFmode when TARGET_SSE2 is not available.
9198 (function_value_32): Ditto.
9199 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
9200 (ix86_libgcc_floating_mode_supported_p): Ditto.
9201 (ix86_emit_support_tinfos): Adjust codes.
9202 (ix86_invalid_conversion): Return diagnostic message string
9203 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
9204 (ix86_invalid_unary_op): New function.
9205 (ix86_invalid_binary_op): Ditto.
9206 (TARGET_INVALID_UNARY_OP): Define.
9207 (TARGET_INVALID_BINARY_OP): Define.
9208 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
9209 related instrinsics header files.
9210 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
9212 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
9214 * dwarf2asm.cc: Change FALSE to false.
9215 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
9216 * dwarf2out.cc (matches_main_base): Change return type from
9217 int to bool. Change "last_match" variable to bool.
9218 (dump_struct_debug): Change return type from int to bool.
9219 Change "matches" and "result" function arguments to bool.
9220 (is_pseudo_reg): Change return type from int to bool.
9221 (is_tagged_type): Ditto.
9222 (same_loc_p): Ditto.
9223 (same_dw_val_p): Change return type from int to bool and adjust
9224 function body accordingly.
9225 (same_attr_p): Ditto.
9226 (same_die_p): Ditto.
9227 (is_type_die): Ditto.
9228 (is_declaration_die): Ditto.
9229 (should_move_die_to_comdat): Ditto.
9230 (is_base_type): Ditto.
9231 (is_based_loc): Ditto.
9232 (local_scope_p): Ditto.
9233 (class_scope_p): Ditto.
9234 (class_or_namespace_scope_p): Ditto.
9235 (is_tagged_type): Ditto.
9236 (is_rust): Use void argument.
9237 (is_nested_in_subprogram): Change return type from int to bool.
9238 (contains_subprogram_definition): Ditto.
9239 (gen_struct_or_union_type_die): Change "nested", "complete"
9240 and "ns_decl" variables to bool.
9241 (is_naming_typedef_decl): Change FALSE to false.
9243 2023-07-18 Jan Hubicka <jh@suse.cz>
9245 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
9246 for queries not in headers.
9247 (static_loop_exit): Add basic blck parameter; update use of
9249 (should_duplicate_loop_header_p): Add ranger and static_exits
9250 parameter. Do not account statements that will be optimized
9251 out after duplicaiton in overall size. Add ranger query to
9253 (update_profile_after_ch): Take static_exits has set instead of
9254 single eliminated_edge.
9255 (ch_base::copy_headers): Do all analysis in the first pass;
9256 remember invariant_exits and static_exits.
9258 2023-07-18 Jason Merrill <jason@redhat.com>
9260 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
9262 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
9264 * doc/gm2.texi (Semantic checking): Change example testwithptr
9267 2023-07-18 Richard Biener <rguenther@suse.de>
9269 PR middle-end/105715
9270 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
9271 (pass_gimple_isel::execute): ... this. Duplicate
9272 comparison defs of COND_EXPRs.
9274 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9276 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
9277 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
9278 (riscv_convert_vector_bits): Ditto.
9280 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9282 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
9283 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
9285 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
9287 * config/s390/vx-builtins.md: New vsel pattern.
9289 2023-07-18 liuhongt <hongtao.liu@intel.com>
9292 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
9293 Remove # from assemble output.
9295 2023-07-18 liuhongt <hongtao.liu@intel.com>
9298 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
9299 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
9300 3 define_peephole2 after the pattern.
9302 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9304 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
9306 2023-07-18 Pan Li <pan2.li@intel.com>
9307 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9309 * config/riscv/riscv.cc (struct machine_function): Add new field.
9310 (riscv_static_frm_mode_p): New function.
9311 (riscv_emit_frm_mode_set): New function for emit FRM.
9312 (riscv_emit_mode_set): Extract function for FRM.
9313 (riscv_mode_needed): Fix the TODO.
9314 (riscv_mode_entry): Initial dynamic frm RTL.
9315 (riscv_mode_exit): Return DYN_EXIT.
9316 * config/riscv/riscv.md: Add rdfrm.
9317 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
9318 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
9320 (fsrmsi_backup): New pattern for swap.
9321 (fsrmsi_restore): New pattern for restore.
9322 (fsrmsi_restore_exit): New pattern for restore exit.
9323 (frrmsi): New pattern for backup.
9325 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
9327 * doc/extend.texi: Add @cindex on __auto_type.
9329 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
9331 * combine-stack-adj.cc (stack_memref_p): Change return type from
9332 int to bool and adjust function body accordingly.
9333 (rest_of_handle_stack_adjustments): Change return type to void.
9335 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
9337 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
9338 (cant_combine_insn_p): Change return type from int to bool and adjust
9339 function body accordingly.
9340 (can_combine_p): Ditto.
9341 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
9342 function arguments from int to bool.
9343 (contains_muldiv): Change return type from int to bool and adjust
9344 function body accordingly.
9345 (try_combine): Ditto. Change "new_direct_jump" pointer function
9346 argument from int to bool. Change "substed_i2", "substed_i1",
9347 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
9348 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
9349 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
9350 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
9351 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
9352 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
9354 (subst): Change "in_dest", "in_cond" and "unique_copy" function
9355 arguments from int to bool.
9356 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
9357 arguments from int to bool.
9358 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
9359 function argument from int to bool.
9360 (force_int_to_mode): Change "just_select" function argument
9361 from int to bool. Change "next_select" variable to bool.
9362 (rtx_equal_for_field_assignment_p): Change return type from
9363 int to bool and adjust function body accordingly.
9364 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
9365 argument from int to bool.
9366 (get_last_value_validate): Change return type from int to bool
9367 and adjust function body accordingly.
9368 (reg_dead_at_p): Ditto.
9369 (reg_bitfield_target_p): Ditto.
9370 (combine_instructions): Ditto. Change "new_direct_jump"
9372 (can_combine_p): Change return type from int to bool
9373 and adjust function body accordingly.
9374 (likely_spilled_retval_p): Ditto.
9375 (can_change_dest_mode): Change "added_sets" function argument
9377 (find_split_point): Change "unsignedp" variable to bool.
9378 (simplify_if_then_else): Change "comparison_p" and "swapped"
9380 (simplify_set): Change "other_changed" variable to bool.
9381 (expand_compound_operation): Change "unsignedp" variable to bool.
9382 (force_to_mode): Change "just_select" function argument
9383 from int to bool. Change "next_select" variable to bool.
9384 (extended_count): Change "unsignedp" function argument to bool.
9385 (simplify_shift_const_1): Change "complement_p" variable to bool.
9386 (simplify_comparison): Change "changed" variable to bool.
9387 (rest_of_handle_combine): Change return type to void.
9389 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9392 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
9394 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
9396 * ira.cc (setup_reg_class_relations): Continue
9397 if regclass cl3 is hard_reg_set_empty_p.
9399 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9401 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
9403 2023-07-17 Martin Jambor <mjambor@suse.cz>
9405 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
9408 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9410 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
9412 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
9415 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
9416 recur add all implied extensions.
9417 (riscv_subset_list::check_implied_ext): Add new method.
9418 (riscv_subset_list::parse): Call checker check_implied_ext.
9419 * config/riscv/riscv-subset.h: Add new method.
9421 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9423 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
9424 (reduc_smax_scal_<mode>): Ditto.
9425 (reduc_umax_scal_<mode>): Ditto.
9426 (reduc_smin_scal_<mode>): Ditto.
9427 (reduc_umin_scal_<mode>): Ditto.
9428 (reduc_and_scal_<mode>): Ditto.
9429 (reduc_ior_scal_<mode>): Ditto.
9430 (reduc_xor_scal_<mode>): Ditto.
9431 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
9432 (expand_reduction): New function.
9433 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
9434 (emit_vlmax_fp_reduction_insn): Ditto.
9435 (get_m1_mode): Ditto.
9436 (expand_cond_len_binop): Fix name.
9437 (expand_reduction): New function
9438 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
9439 (validate_change_or_fail): New function.
9440 (change_insn): Fix VSETVL BUG.
9441 (change_vsetvl_insn): Ditto.
9442 (pass_vsetvl::backward_demand_fusion): Ditto.
9443 (pass_vsetvl::df_post_optimization): Ditto.
9445 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9447 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
9449 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
9451 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
9452 Remove parameter name from declaration of unused parameter.
9454 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
9456 PR tree-optimization/110652
9457 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
9460 2023-07-17 Richard Biener <rguenther@suse.de>
9462 PR tree-optimization/110669
9463 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
9464 Check we matched a header PHI.
9466 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9468 * tree-ssanames.cc (set_bitmask): New.
9469 * tree-ssanames.h (set_bitmask): New.
9471 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9473 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
9475 * value-range.h (irange_bitmask::union_): Normalize beforehand.
9476 (irange_bitmask::intersect): Same.
9478 2023-07-17 Andrew Pinski <apinski@marvell.com>
9480 PR tree-optimization/95923
9481 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
9483 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
9485 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
9486 to the std::sort comparison lambda function const.
9488 2023-07-17 Andrew Pinski <apinski@marvell.com>
9490 PR tree-optimization/110666
9491 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
9493 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
9495 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
9496 Arrow Lake and Arrow Lake S.
9497 * common/config/i386/i386-common.cc:
9498 (processor_name): Add arrowlake.
9499 (processor_alias_table): Add arrow lake, arrow lake s and lunar
9501 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
9502 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
9503 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
9504 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
9506 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
9508 * config/i386/i386-options.cc (m_ARROWLAKE): New.
9509 (processor_cost_table): Add arrowlake.
9510 * config/i386/i386.h (enum processor_type):
9511 Add PROCESSOR_ARROWLAKE.
9512 * config/i386/x86-tune.def: Add m_ARROWLAKE.
9513 * doc/extend.texi: Add arrowlake and arrowlake-s.
9514 * doc/invoke.texi: Ditto.
9516 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
9518 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
9519 have the same iterator. Also renaming all the occurence to
9521 (usdot_prod<mode>): New define_expand.
9522 (udot_prod<mode>): Ditto.
9524 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
9526 * common/config/i386/cpuinfo.h (get_available_features):
9528 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
9529 OPTION_MASK_ISA2_SM4_UNSET): New.
9530 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
9531 (ix86_handle_option): Handle -msm4.
9532 * common/config/i386/i386-cpuinfo.h (enum processor_features):
9534 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
9536 * config.gcc: Add sm4intrin.h.
9537 * config/i386/cpuid.h (bit_SM4): New.
9538 * config/i386/i386-builtin.def (BDESC): Add new builtins.
9539 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
9541 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
9542 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
9543 (ix86_valid_target_attribute_inner_p): Handle sm4.
9544 * config/i386/i386.opt: Add option -msm4.
9545 * config/i386/immintrin.h: Include sm4intrin.h
9546 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
9547 (vsm4rnds4_<mode>): Ditto.
9548 * doc/extend.texi: Document sm4.
9549 * doc/invoke.texi: Document -msm4.
9550 * doc/sourcebuild.texi: Document target sm4.
9551 * config/i386/sm4intrin.h: New file.
9553 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
9555 * common/config/i386/cpuinfo.h (get_available_features):
9557 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
9558 OPTION_MASK_ISA2_SHA512_UNSET): New.
9559 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
9560 (ix86_handle_option): Handle -msha512.
9561 * common/config/i386/i386-cpuinfo.h (enum processor_features):
9563 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
9565 * config.gcc: Add sha512intrin.h.
9566 * config/i386/cpuid.h (bit_SHA512): New.
9567 * config/i386/i386-builtin-types.def:
9568 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
9569 * config/i386/i386-builtin.def (BDESC): Add new builtins.
9570 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
9572 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
9573 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
9574 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
9575 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
9576 (ix86_valid_target_attribute_inner_p): Handle sha512.
9577 * config/i386/i386.opt: Add option -msha512.
9578 * config/i386/immintrin.h: Include sha512intrin.h.
9579 * config/i386/sse.md (vsha512msg1): New define insn.
9580 (vsha512msg2): Ditto.
9581 (vsha512rnds2): Ditto.
9582 * doc/extend.texi: Document sha512.
9583 * doc/invoke.texi: Document -msha512.
9584 * doc/sourcebuild.texi: Document target sha512.
9585 * config/i386/sha512intrin.h: New file.
9587 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
9589 * common/config/i386/cpuinfo.h (get_available_features):
9591 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
9592 OPTION_MASK_ISA2_SM3_UNSET): New.
9593 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
9594 (ix86_handle_option): Handle -msm3.
9595 * common/config/i386/i386-cpuinfo.h (enum processor_features):
9597 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
9599 * config.gcc: Add sm3intrin.h
9600 * config/i386/cpuid.h (bit_SM3): New.
9601 * config/i386/i386-builtin-types.def:
9602 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
9603 * config/i386/i386-builtin.def (BDESC): Add new builtins.
9604 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
9606 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
9607 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
9608 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
9609 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
9610 (ix86_valid_target_attribute_inner_p): Handle sm3.
9611 * config/i386/i386.opt: Add option -msm3.
9612 * config/i386/immintrin.h: Include sm3intrin.h.
9613 * config/i386/sse.md (vsm3msg1): New define insn.
9616 * doc/extend.texi: Document sm3.
9617 * doc/invoke.texi: Document -msm3.
9618 * doc/sourcebuild.texi: Document target sm3.
9619 * config/i386/sm3intrin.h: New file.
9621 2023-07-17 Kong Lingling <lingling.kong@intel.com>
9622 Haochen Jiang <haochen.jiang@intel.com>
9624 * common/config/i386/cpuinfo.h (get_available_features): Detect
9626 * common/config/i386/i386-common.cc
9627 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
9628 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
9629 (ix86_handle_option): Handle -mavxvnniint16.
9630 * common/config/i386/i386-cpuinfo.h (enum processor_features):
9631 Add FEATURE_AVXVNNIINT16.
9632 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
9634 * config.gcc: Add avxvnniint16.h.
9635 * config/i386/avxvnniint16intrin.h: New file.
9636 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
9637 * config/i386/i386-builtin.def: Add new builtins.
9638 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
9640 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
9641 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
9642 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
9643 * config/i386/i386.opt: Add option -mavxvnniint16.
9644 * config/i386/immintrin.h: Include avxvnniint16.h.
9645 * config/i386/sse.md
9646 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
9647 * doc/extend.texi: Document avxvnniint16.
9648 * doc/invoke.texi: Document -mavxvnniint16.
9649 * doc/sourcebuild.texi: Document target avxvnniint16.
9651 2023-07-16 Jan Hubicka <jh@suse.cz>
9653 PR middle-end/110649
9654 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
9655 (vect_transform_loop): Move scale_profile_for_vect_loop after
9656 upper bound updates.
9658 2023-07-16 Jan Hubicka <jh@suse.cz>
9660 PR tree-optimization/110649
9661 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
9662 probability of the if-then-else construct.
9664 2023-07-16 Jan Hubicka <jh@suse.cz>
9666 PR middle-end/110649
9667 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
9669 2023-07-15 Andrew Pinski <apinski@marvell.com>
9671 * doc/contrib.texi: Update my entry.
9673 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
9675 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
9677 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
9678 (tld_load): Likewise.
9679 (tgd_load_pic): Change to expander.
9680 (tld_load_pic, tld_offset_load, tp_load): Likewise.
9681 (tie_load_pic, tle_load): Likewise.
9682 (tgd_load_picsi, tgd_load_picdi): New.
9683 (tld_load_picsi, tld_load_picdi): New.
9684 (tld_offset_load<P:mode>): New.
9685 (tp_load<P:mode>): New.
9686 (tie_load_picsi, tie_load_picdi): New.
9687 (tle_load<P:mode>): New.
9689 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
9691 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
9692 (vcmlaq_rot180, vcmlaq_rot270): New.
9693 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
9694 (vcmlaq_rot180, vcmlaq_rot270): New.
9695 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
9696 (vcmlaq_rot180, vcmlaq_rot270): New.
9697 * config/arm/arm-mve-builtins.cc
9698 (function_instance::has_inactive_argument): Handle vcmlaq,
9699 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
9700 * config/arm/arm_mve.h (vcmlaq): Delete.
9701 (vcmlaq_rot180): Delete.
9702 (vcmlaq_rot270): Delete.
9703 (vcmlaq_rot90): Delete.
9705 (vcmlaq_rot180_m): Delete.
9706 (vcmlaq_rot270_m): Delete.
9707 (vcmlaq_rot90_m): Delete.
9708 (vcmlaq_f16): Delete.
9709 (vcmlaq_rot180_f16): Delete.
9710 (vcmlaq_rot270_f16): Delete.
9711 (vcmlaq_rot90_f16): Delete.
9712 (vcmlaq_f32): Delete.
9713 (vcmlaq_rot180_f32): Delete.
9714 (vcmlaq_rot270_f32): Delete.
9715 (vcmlaq_rot90_f32): Delete.
9716 (vcmlaq_m_f32): Delete.
9717 (vcmlaq_m_f16): Delete.
9718 (vcmlaq_rot180_m_f32): Delete.
9719 (vcmlaq_rot180_m_f16): Delete.
9720 (vcmlaq_rot270_m_f32): Delete.
9721 (vcmlaq_rot270_m_f16): Delete.
9722 (vcmlaq_rot90_m_f32): Delete.
9723 (vcmlaq_rot90_m_f16): Delete.
9724 (__arm_vcmlaq_f16): Delete.
9725 (__arm_vcmlaq_rot180_f16): Delete.
9726 (__arm_vcmlaq_rot270_f16): Delete.
9727 (__arm_vcmlaq_rot90_f16): Delete.
9728 (__arm_vcmlaq_f32): Delete.
9729 (__arm_vcmlaq_rot180_f32): Delete.
9730 (__arm_vcmlaq_rot270_f32): Delete.
9731 (__arm_vcmlaq_rot90_f32): Delete.
9732 (__arm_vcmlaq_m_f32): Delete.
9733 (__arm_vcmlaq_m_f16): Delete.
9734 (__arm_vcmlaq_rot180_m_f32): Delete.
9735 (__arm_vcmlaq_rot180_m_f16): Delete.
9736 (__arm_vcmlaq_rot270_m_f32): Delete.
9737 (__arm_vcmlaq_rot270_m_f16): Delete.
9738 (__arm_vcmlaq_rot90_m_f32): Delete.
9739 (__arm_vcmlaq_rot90_m_f16): Delete.
9740 (__arm_vcmlaq): Delete.
9741 (__arm_vcmlaq_rot180): Delete.
9742 (__arm_vcmlaq_rot270): Delete.
9743 (__arm_vcmlaq_rot90): Delete.
9744 (__arm_vcmlaq_m): Delete.
9745 (__arm_vcmlaq_rot180_m): Delete.
9746 (__arm_vcmlaq_rot270_m): Delete.
9747 (__arm_vcmlaq_rot90_m): Delete.
9749 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
9751 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
9752 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
9753 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
9754 (mve_insn): Add vcmla.
9755 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
9757 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
9759 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
9760 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
9761 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
9762 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
9764 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
9766 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
9768 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
9769 (vcmulq_rot180, vcmulq_rot270): New.
9770 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
9771 (vcmulq_rot180, vcmulq_rot270): New.
9772 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
9773 (vcmulq_rot180, vcmulq_rot270): New.
9774 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
9775 (vcmulq_rot270): Delete.
9776 (vcmulq_rot180): Delete.
9779 (vcmulq_rot180_m): Delete.
9780 (vcmulq_rot270_m): Delete.
9781 (vcmulq_rot90_m): Delete.
9783 (vcmulq_rot90_x): Delete.
9784 (vcmulq_rot180_x): Delete.
9785 (vcmulq_rot270_x): Delete.
9786 (vcmulq_rot90_f16): Delete.
9787 (vcmulq_rot270_f16): Delete.
9788 (vcmulq_rot180_f16): Delete.
9789 (vcmulq_f16): Delete.
9790 (vcmulq_rot90_f32): Delete.
9791 (vcmulq_rot270_f32): Delete.
9792 (vcmulq_rot180_f32): Delete.
9793 (vcmulq_f32): Delete.
9794 (vcmulq_m_f32): Delete.
9795 (vcmulq_m_f16): Delete.
9796 (vcmulq_rot180_m_f32): Delete.
9797 (vcmulq_rot180_m_f16): Delete.
9798 (vcmulq_rot270_m_f32): Delete.
9799 (vcmulq_rot270_m_f16): Delete.
9800 (vcmulq_rot90_m_f32): Delete.
9801 (vcmulq_rot90_m_f16): Delete.
9802 (vcmulq_x_f16): Delete.
9803 (vcmulq_x_f32): Delete.
9804 (vcmulq_rot90_x_f16): Delete.
9805 (vcmulq_rot90_x_f32): Delete.
9806 (vcmulq_rot180_x_f16): Delete.
9807 (vcmulq_rot180_x_f32): Delete.
9808 (vcmulq_rot270_x_f16): Delete.
9809 (vcmulq_rot270_x_f32): Delete.
9810 (__arm_vcmulq_rot90_f16): Delete.
9811 (__arm_vcmulq_rot270_f16): Delete.
9812 (__arm_vcmulq_rot180_f16): Delete.
9813 (__arm_vcmulq_f16): Delete.
9814 (__arm_vcmulq_rot90_f32): Delete.
9815 (__arm_vcmulq_rot270_f32): Delete.
9816 (__arm_vcmulq_rot180_f32): Delete.
9817 (__arm_vcmulq_f32): Delete.
9818 (__arm_vcmulq_m_f32): Delete.
9819 (__arm_vcmulq_m_f16): Delete.
9820 (__arm_vcmulq_rot180_m_f32): Delete.
9821 (__arm_vcmulq_rot180_m_f16): Delete.
9822 (__arm_vcmulq_rot270_m_f32): Delete.
9823 (__arm_vcmulq_rot270_m_f16): Delete.
9824 (__arm_vcmulq_rot90_m_f32): Delete.
9825 (__arm_vcmulq_rot90_m_f16): Delete.
9826 (__arm_vcmulq_x_f16): Delete.
9827 (__arm_vcmulq_x_f32): Delete.
9828 (__arm_vcmulq_rot90_x_f16): Delete.
9829 (__arm_vcmulq_rot90_x_f32): Delete.
9830 (__arm_vcmulq_rot180_x_f16): Delete.
9831 (__arm_vcmulq_rot180_x_f32): Delete.
9832 (__arm_vcmulq_rot270_x_f16): Delete.
9833 (__arm_vcmulq_rot270_x_f32): Delete.
9834 (__arm_vcmulq_rot90): Delete.
9835 (__arm_vcmulq_rot270): Delete.
9836 (__arm_vcmulq_rot180): Delete.
9837 (__arm_vcmulq): Delete.
9838 (__arm_vcmulq_m): Delete.
9839 (__arm_vcmulq_rot180_m): Delete.
9840 (__arm_vcmulq_rot270_m): Delete.
9841 (__arm_vcmulq_rot90_m): Delete.
9842 (__arm_vcmulq_x): Delete.
9843 (__arm_vcmulq_rot90_x): Delete.
9844 (__arm_vcmulq_rot180_x): Delete.
9845 (__arm_vcmulq_rot270_x): Delete.
9847 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
9849 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
9850 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
9851 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
9852 (MVE_VCADDQ_VCMULQ_M): New.
9853 (mve_insn): Add vcmul.
9854 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
9857 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
9859 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
9860 @mve_<mve_insn>q<mve_rot>_f<mode>.
9861 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
9862 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
9863 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
9865 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
9867 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
9868 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
9869 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
9870 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
9871 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
9872 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
9873 * config/arm/arm-mve-builtins-functions.h (class
9874 unspec_mve_function_exact_insn_rot): New.
9875 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
9876 (vcaddq_rot270): Delete.
9877 (vhcaddq_rot90): Delete.
9878 (vhcaddq_rot270): Delete.
9879 (vcaddq_rot270_m): Delete.
9880 (vcaddq_rot90_m): Delete.
9881 (vhcaddq_rot270_m): Delete.
9882 (vhcaddq_rot90_m): Delete.
9883 (vcaddq_rot90_x): Delete.
9884 (vcaddq_rot270_x): Delete.
9885 (vhcaddq_rot90_x): Delete.
9886 (vhcaddq_rot270_x): Delete.
9887 (vcaddq_rot90_u8): Delete.
9888 (vcaddq_rot270_u8): Delete.
9889 (vhcaddq_rot90_s8): Delete.
9890 (vhcaddq_rot270_s8): Delete.
9891 (vcaddq_rot90_s8): Delete.
9892 (vcaddq_rot270_s8): Delete.
9893 (vcaddq_rot90_u16): Delete.
9894 (vcaddq_rot270_u16): Delete.
9895 (vhcaddq_rot90_s16): Delete.
9896 (vhcaddq_rot270_s16): Delete.
9897 (vcaddq_rot90_s16): Delete.
9898 (vcaddq_rot270_s16): Delete.
9899 (vcaddq_rot90_u32): Delete.
9900 (vcaddq_rot270_u32): Delete.
9901 (vhcaddq_rot90_s32): Delete.
9902 (vhcaddq_rot270_s32): Delete.
9903 (vcaddq_rot90_s32): Delete.
9904 (vcaddq_rot270_s32): Delete.
9905 (vcaddq_rot90_f16): Delete.
9906 (vcaddq_rot270_f16): Delete.
9907 (vcaddq_rot90_f32): Delete.
9908 (vcaddq_rot270_f32): Delete.
9909 (vcaddq_rot270_m_s8): Delete.
9910 (vcaddq_rot270_m_s32): Delete.
9911 (vcaddq_rot270_m_s16): Delete.
9912 (vcaddq_rot270_m_u8): Delete.
9913 (vcaddq_rot270_m_u32): Delete.
9914 (vcaddq_rot270_m_u16): Delete.
9915 (vcaddq_rot90_m_s8): Delete.
9916 (vcaddq_rot90_m_s32): Delete.
9917 (vcaddq_rot90_m_s16): Delete.
9918 (vcaddq_rot90_m_u8): Delete.
9919 (vcaddq_rot90_m_u32): Delete.
9920 (vcaddq_rot90_m_u16): Delete.
9921 (vhcaddq_rot270_m_s8): Delete.
9922 (vhcaddq_rot270_m_s32): Delete.
9923 (vhcaddq_rot270_m_s16): Delete.
9924 (vhcaddq_rot90_m_s8): Delete.
9925 (vhcaddq_rot90_m_s32): Delete.
9926 (vhcaddq_rot90_m_s16): Delete.
9927 (vcaddq_rot270_m_f32): Delete.
9928 (vcaddq_rot270_m_f16): Delete.
9929 (vcaddq_rot90_m_f32): Delete.
9930 (vcaddq_rot90_m_f16): Delete.
9931 (vcaddq_rot90_x_s8): Delete.
9932 (vcaddq_rot90_x_s16): Delete.
9933 (vcaddq_rot90_x_s32): Delete.
9934 (vcaddq_rot90_x_u8): Delete.
9935 (vcaddq_rot90_x_u16): Delete.
9936 (vcaddq_rot90_x_u32): Delete.
9937 (vcaddq_rot270_x_s8): Delete.
9938 (vcaddq_rot270_x_s16): Delete.
9939 (vcaddq_rot270_x_s32): Delete.
9940 (vcaddq_rot270_x_u8): Delete.
9941 (vcaddq_rot270_x_u16): Delete.
9942 (vcaddq_rot270_x_u32): Delete.
9943 (vhcaddq_rot90_x_s8): Delete.
9944 (vhcaddq_rot90_x_s16): Delete.
9945 (vhcaddq_rot90_x_s32): Delete.
9946 (vhcaddq_rot270_x_s8): Delete.
9947 (vhcaddq_rot270_x_s16): Delete.
9948 (vhcaddq_rot270_x_s32): Delete.
9949 (vcaddq_rot90_x_f16): Delete.
9950 (vcaddq_rot90_x_f32): Delete.
9951 (vcaddq_rot270_x_f16): Delete.
9952 (vcaddq_rot270_x_f32): Delete.
9953 (__arm_vcaddq_rot90_u8): Delete.
9954 (__arm_vcaddq_rot270_u8): Delete.
9955 (__arm_vhcaddq_rot90_s8): Delete.
9956 (__arm_vhcaddq_rot270_s8): Delete.
9957 (__arm_vcaddq_rot90_s8): Delete.
9958 (__arm_vcaddq_rot270_s8): Delete.
9959 (__arm_vcaddq_rot90_u16): Delete.
9960 (__arm_vcaddq_rot270_u16): Delete.
9961 (__arm_vhcaddq_rot90_s16): Delete.
9962 (__arm_vhcaddq_rot270_s16): Delete.
9963 (__arm_vcaddq_rot90_s16): Delete.
9964 (__arm_vcaddq_rot270_s16): Delete.
9965 (__arm_vcaddq_rot90_u32): Delete.
9966 (__arm_vcaddq_rot270_u32): Delete.
9967 (__arm_vhcaddq_rot90_s32): Delete.
9968 (__arm_vhcaddq_rot270_s32): Delete.
9969 (__arm_vcaddq_rot90_s32): Delete.
9970 (__arm_vcaddq_rot270_s32): Delete.
9971 (__arm_vcaddq_rot270_m_s8): Delete.
9972 (__arm_vcaddq_rot270_m_s32): Delete.
9973 (__arm_vcaddq_rot270_m_s16): Delete.
9974 (__arm_vcaddq_rot270_m_u8): Delete.
9975 (__arm_vcaddq_rot270_m_u32): Delete.
9976 (__arm_vcaddq_rot270_m_u16): Delete.
9977 (__arm_vcaddq_rot90_m_s8): Delete.
9978 (__arm_vcaddq_rot90_m_s32): Delete.
9979 (__arm_vcaddq_rot90_m_s16): Delete.
9980 (__arm_vcaddq_rot90_m_u8): Delete.
9981 (__arm_vcaddq_rot90_m_u32): Delete.
9982 (__arm_vcaddq_rot90_m_u16): Delete.
9983 (__arm_vhcaddq_rot270_m_s8): Delete.
9984 (__arm_vhcaddq_rot270_m_s32): Delete.
9985 (__arm_vhcaddq_rot270_m_s16): Delete.
9986 (__arm_vhcaddq_rot90_m_s8): Delete.
9987 (__arm_vhcaddq_rot90_m_s32): Delete.
9988 (__arm_vhcaddq_rot90_m_s16): Delete.
9989 (__arm_vcaddq_rot90_x_s8): Delete.
9990 (__arm_vcaddq_rot90_x_s16): Delete.
9991 (__arm_vcaddq_rot90_x_s32): Delete.
9992 (__arm_vcaddq_rot90_x_u8): Delete.
9993 (__arm_vcaddq_rot90_x_u16): Delete.
9994 (__arm_vcaddq_rot90_x_u32): Delete.
9995 (__arm_vcaddq_rot270_x_s8): Delete.
9996 (__arm_vcaddq_rot270_x_s16): Delete.
9997 (__arm_vcaddq_rot270_x_s32): Delete.
9998 (__arm_vcaddq_rot270_x_u8): Delete.
9999 (__arm_vcaddq_rot270_x_u16): Delete.
10000 (__arm_vcaddq_rot270_x_u32): Delete.
10001 (__arm_vhcaddq_rot90_x_s8): Delete.
10002 (__arm_vhcaddq_rot90_x_s16): Delete.
10003 (__arm_vhcaddq_rot90_x_s32): Delete.
10004 (__arm_vhcaddq_rot270_x_s8): Delete.
10005 (__arm_vhcaddq_rot270_x_s16): Delete.
10006 (__arm_vhcaddq_rot270_x_s32): Delete.
10007 (__arm_vcaddq_rot90_f16): Delete.
10008 (__arm_vcaddq_rot270_f16): Delete.
10009 (__arm_vcaddq_rot90_f32): Delete.
10010 (__arm_vcaddq_rot270_f32): Delete.
10011 (__arm_vcaddq_rot270_m_f32): Delete.
10012 (__arm_vcaddq_rot270_m_f16): Delete.
10013 (__arm_vcaddq_rot90_m_f32): Delete.
10014 (__arm_vcaddq_rot90_m_f16): Delete.
10015 (__arm_vcaddq_rot90_x_f16): Delete.
10016 (__arm_vcaddq_rot90_x_f32): Delete.
10017 (__arm_vcaddq_rot270_x_f16): Delete.
10018 (__arm_vcaddq_rot270_x_f32): Delete.
10019 (__arm_vcaddq_rot90): Delete.
10020 (__arm_vcaddq_rot270): Delete.
10021 (__arm_vhcaddq_rot90): Delete.
10022 (__arm_vhcaddq_rot270): Delete.
10023 (__arm_vcaddq_rot270_m): Delete.
10024 (__arm_vcaddq_rot90_m): Delete.
10025 (__arm_vhcaddq_rot270_m): Delete.
10026 (__arm_vhcaddq_rot90_m): Delete.
10027 (__arm_vcaddq_rot90_x): Delete.
10028 (__arm_vcaddq_rot270_x): Delete.
10029 (__arm_vhcaddq_rot90_x): Delete.
10030 (__arm_vhcaddq_rot270_x): Delete.
10032 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10034 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
10035 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
10036 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
10037 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
10038 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
10039 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
10041 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
10042 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
10043 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
10044 VHCADDQ_ROT270_M_S.
10045 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
10046 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
10047 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
10048 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
10049 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
10050 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
10052 (VCADDQ_ROT270_M): Delete.
10053 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
10054 (VCADDQ_ROT90_M): Delete.
10055 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
10056 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
10058 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
10059 (mve_vcaddq<mve_rot><mode>): Rename into ...
10060 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
10061 (mve_vcaddq_rot270_m_<supf><mode>)
10062 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
10063 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
10064 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
10065 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
10067 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
10069 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
10072 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
10073 preparation statement over braces for a single statement.
10074 (*bt<mode>_setncqi): Likewise.
10075 (*bt<mode>_setncqi_2): New define_insn_and_split.
10077 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
10079 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
10080 case inserting of 64-bit values into a TImode register, to handle
10081 both DImode and DFmode using either *insvti_lowpart_1
10082 or *isnvti_highpart_1.
10084 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
10087 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
10088 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
10089 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
10090 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
10091 when the original source contains a paradoxical subreg.
10093 2023-07-14 Jan Hubicka <jh@suse.cz>
10095 * passes.cc (execute_function_todo): Remove
10096 TODO_rebuild_frequencies
10097 * passes.def: Add rebuild_frequencies pass.
10098 * predict.cc (estimate_bb_frequencies): Drop
10100 (tree_estimate_probability): Update call of
10101 estimate_bb_frequencies.
10102 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
10103 first and do not rebuild if not necessary.
10104 (class pass_rebuild_frequencies): New.
10105 (make_pass_rebuild_frequencies): New.
10106 * profile-count.h: Add profile_count::very_large_p.
10107 * tree-inline.cc (optimize_inline_calls): Do not return
10108 TODO_rebuild_frequencies
10109 * tree-pass.h (TODO_rebuild_frequencies): Remove.
10110 (make_pass_rebuild_frequencies): Declare.
10112 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10114 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
10115 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10116 (expand_cond_len_ternop): New function.
10117 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
10118 (expand_cond_len_ternop): Ditto.
10120 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
10123 * config/bpf/bpf.md: Enable instruction scheduling.
10125 2023-07-14 Tamar Christina <tamar.christina@arm.com>
10127 PR tree-optimization/109154
10128 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
10129 (struct bb_predicate): Add no_predicate_stmts.
10130 (set_bb_predicate): Increase predicate count.
10131 (set_bb_predicate_gimplified_stmts): Conditionally initialize
10132 no_predicate_stmts.
10133 (get_bb_num_predicate_stmts): New.
10134 (init_bb_predicate): Initialzie no_predicate_stmts.
10135 (release_bb_predicate): Cleanup no_predicate_stmts.
10136 (insert_gimplified_predicates): Preserve no_predicate_stmts.
10138 2023-07-14 Tamar Christina <tamar.christina@arm.com>
10140 PR tree-optimization/109154
10141 * tree-if-conv.cc (gen_simplified_condition,
10142 gen_phi_nest_statement): New.
10143 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
10145 2023-07-14 Richard Biener <rguenther@suse.de>
10147 * gimple.h (gimple_phi_arg): New const overload.
10148 (gimple_phi_arg_def): Make gimple arg const.
10149 (gimple_phi_arg_def_from_edge): New inline function.
10150 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
10152 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
10153 new inline function.
10154 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
10156 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
10158 * common/config/riscv/riscv-common.cc:
10159 (riscv_implied_info): Add zihintntl item.
10160 (riscv_ext_version_table): Ditto.
10161 (riscv_ext_flag_table): Ditto.
10162 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
10163 (TARGET_ZIHINTNTL): Ditto.
10165 2023-07-14 Die Li <lidie@eswincomputing.com>
10167 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
10169 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
10172 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
10173 used by the address of the following memory operand.
10175 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
10178 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
10179 deallocate alloca-only frame.
10181 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
10184 * config/darwin.h (DARWIN_PLATFORM_ID): New.
10185 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
10186 and SDK data to the static linker.
10188 2023-07-13 Carl Love <cel@us.ibm.com>
10190 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
10191 built-in definition return type.
10192 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
10193 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
10194 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
10195 argument to return FPSCR fields.
10196 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
10197 the return value. Add description for
10198 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
10200 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
10203 * config/alpha/alpha.cc (alpha_emit_set_long_const):
10204 Always use DImode when constructing long const.
10206 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
10208 * haifa-sched.cc: Change TRUE/FALSE to true/false.
10210 * lra-assigns.cc: Ditto.
10211 * lra-constraints.cc: Ditto.
10212 * sel-sched.cc: Ditto.
10214 2023-07-13 Andrew Pinski <apinski@marvell.com>
10216 PR tree-optimization/110293
10217 PR tree-optimization/110539
10218 * match.pd: Expand the `x != (typeof x)(x == 0)`
10219 pattern to handle where the inner and outer comparsions
10220 are either `!=` or `==` and handle other constants
10223 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
10225 PR middle-end/109520
10226 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
10227 (lra_asm_insn_error): New prototype.
10228 * lra.cc: Include rtl_error.h.
10229 (lra_set_insn_recog_data): Initialize asm_reloads_num.
10230 (lra_asm_insn_error): New func whose code is taken from ...
10231 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
10232 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
10234 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10236 * genmatch.cc (commutative_op): Add COND_LEN_*
10237 * internal-fn.cc (first_commutative_argument): Ditto.
10239 (get_unconditional_internal_fn): Ditto.
10240 (can_interpret_as_conditional_op_p): Ditto.
10241 (internal_fn_len_index): Ditto.
10242 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
10243 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
10244 (convert_mult_to_fma): Ditto.
10245 (math_opts_dom_walker::after_dom_children): Ditto.
10247 2023-07-13 Pan Li <pan2.li@intel.com>
10249 * config/riscv/riscv.cc (vxrm_rtx): New static var.
10251 (global_state_unknown_p): Removed.
10252 (riscv_entity_mode_after): Removed.
10253 (asm_insn_p): New function.
10254 (vxrm_unknown_p): New function for fixed-point.
10255 (riscv_vxrm_mode_after): Ditto.
10256 (frm_unknown_dynamic_p): New function for floating-point.
10257 (riscv_frm_mode_after): Ditto.
10258 (riscv_mode_after): Leverage new functions.
10260 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10262 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
10263 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
10264 calling vect_model_load_cost.
10266 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10268 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
10269 handle memory_access_type VMAT_CONTIGUOUS, remove some
10270 VMAT_CONTIGUOUS_PERMUTE related handlings.
10271 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
10272 without calling vect_model_load_cost.
10274 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10276 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
10277 VMAT_CONTIGUOUS_REVERSE any more.
10278 (vectorizable_load): Adjust the costing handling on
10279 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
10281 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10283 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
10284 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
10285 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
10286 assert it will never get VMAT_LOAD_STORE_LANES.
10288 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10290 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
10291 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
10292 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
10293 remove VMAT_GATHER_SCATTER related handlings and the related parameter
10296 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10298 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
10299 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
10300 vect_model_load_cost.
10301 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
10302 VMAT_STRIDED_SLP any more, and remove their related handlings.
10304 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10306 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
10307 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
10308 hoisting decision and without calling vect_model_load_cost.
10309 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
10310 and remove VMAT_INVARIANT related handlings.
10312 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10314 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
10315 on costing with one extra argument cost_vec.
10316 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
10317 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
10318 gs_info.decl set any more.
10320 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10322 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
10323 to vect_model_load_cost down to some different transform paths
10324 according to the handlings of different vect_memory_access_types.
10326 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10328 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
10330 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10332 * config/riscv/autovec.md
10333 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
10334 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
10335 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
10336 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
10337 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10338 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10339 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10340 (len_mask_gather_load<mode><mode>): Ditto.
10341 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
10342 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
10343 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
10344 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
10345 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10346 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10347 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10348 (len_mask_scatter_store<mode><mode>): Ditto.
10349 * config/riscv/predicates.md (const_1_operand): New predicate.
10350 (vector_gs_scale_operand_16): Ditto.
10351 (vector_gs_scale_operand_32): Ditto.
10352 (vector_gs_scale_operand_64): Ditto.
10353 (vector_gs_extension_operand): Ditto.
10354 (vector_gs_scale_operand_16_rv32): Ditto.
10355 (vector_gs_scale_operand_32_rv32): Ditto.
10356 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
10357 (expand_gather_scatter): New function.
10358 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
10359 (emit_vlmax_masked_store_insn): New function.
10360 (emit_nonvlmax_masked_store_insn): Ditto.
10361 (modulo_sel_indices): Ditto.
10362 (expand_vec_perm): Fix SLP for gather/scatter.
10363 (prepare_gather_scatter): New function.
10364 (expand_gather_scatter): Ditto.
10365 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
10366 (subreg:SI (DI CONST_POLY_INT)).
10367 * config/riscv/vector-iterators.md: Add gather/scatter.
10368 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
10369 (@vec_duplicate<mode>): Ditto.
10370 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
10372 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10374 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10376 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
10377 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10378 (expand_cond_len_binop): New function.
10379 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
10380 (emit_nonvlmax_fp_tu_insn): Ditto.
10381 (need_fp_rounding_p): Ditto.
10382 (expand_cond_len_binop): Ditto.
10383 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
10384 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
10386 2023-07-12 Jan Hubicka <jh@suse.cz>
10388 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
10389 (gimple_duplicate_seme_region): ... this; break out profile updating
10391 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
10392 (ch_base::copy_headers): Update.
10393 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
10394 (gimple_duplicate_seme_region): ... this.
10396 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
10398 PR tree-optimization/107043
10399 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
10401 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
10403 PR tree-optimization/107053
10404 * gimple-range-op.cc (cfn_popcount): Use known set bits.
10406 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
10408 * ira.cc (equiv_init_varies_p): Change return type from int to bool
10409 and adjust function body accordingly.
10410 (equiv_init_movable_p): Ditto.
10411 (memref_used_between_p): Ditto.
10412 * lra-constraints.cc (valid_address_p): Ditto.
10414 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
10416 * range-op.cc (irange_to_masked_value): Remove.
10417 (update_known_bitmask): Update irange value/mask pair instead of
10418 only updating nonzero bits.
10420 2023-07-12 Jan Hubicka <jh@suse.cz>
10422 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
10423 parameter and rewrite profile updating code to handle edges elimination.
10424 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
10425 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
10426 (loop_iv_derived_p): New function.
10427 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
10428 of PHIs and propagation of IV derived variables.
10429 (ch_base::copy_headers): Pass around the invariant edges hash set.
10431 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
10433 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
10434 (last_active_insn): Change "skip_use_p" function argument to bool.
10435 (noce_operand_ok): Change return type from int to bool.
10436 (find_cond_trap): Ditto.
10437 (block_jumps_and_fallthru_p): Change "fallthru_p" and
10438 "jump_p" variables to bool.
10439 (noce_find_if_block): Change return type from int to bool.
10440 (cond_exec_find_if_block): Ditto.
10441 (find_if_case_1): Ditto.
10442 (find_if_case_2): Ditto.
10443 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
10444 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
10445 (cond_exec_process_insns): Change return type from int to bool.
10446 Change "mod_ok" function arg to bool.
10447 (cond_exec_process_if_block): Change return type from int to bool.
10448 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
10450 (noce_emit_store_flag): Change return type from int to bool.
10451 Change "reversep" function arg to bool. Change "cond_complex"
10453 (noce_try_move): Change return type from int to bool.
10454 (noce_try_ifelse_collapse): Ditto.
10455 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
10456 (noce_try_addcc): Change return type from int to bool. Change
10457 "subtract" variable to bool.
10458 (noce_try_store_flag_constants): Change return type from int to bool.
10459 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
10460 (noce_try_cmove): Change return type from int to bool.
10461 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
10462 (noce_try_minmax): Change return type from int to bool. Change
10463 "unsignedp" variable to bool.
10464 (noce_try_abs): Change return type from int to bool. Change
10465 "negate" variable to bool.
10466 (noce_try_sign_mask): Change return type from int to bool.
10467 (noce_try_move): Ditto.
10468 (noce_try_store_flag_constants): Ditto.
10469 (noce_try_cmove): Ditto.
10470 (noce_try_cmove_arith): Ditto.
10471 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
10472 (noce_try_bitop): Change return type from int to bool.
10473 (noce_operand_ok): Ditto.
10474 (noce_convert_multiple_sets): Ditto.
10475 (noce_convert_multiple_sets_1): Ditto.
10476 (noce_process_if_block): Ditto.
10477 (check_cond_move_block): Ditto.
10478 (cond_move_process_if_block): Ditto. Change "success_p"
10480 (rest_of_handle_if_conversion): Change return type to void.
10482 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10484 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
10486 (get_conditional_len_internal_fn): New function.
10487 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
10488 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
10491 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
10494 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
10496 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
10499 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
10500 define_insn_and_split derived from *add<dwi>3_doubleword_concat
10501 and *add<dwi>3_doubleword_zext.
10503 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
10506 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
10507 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
10508 (peephole2): Simplify rega = 0; rega op= rega cases.
10510 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
10512 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
10513 testing a TImode SUBREG of a 128-bit vector register against
10514 zero, use a PTEST instruction instead of first moving it to
10515 a pair of scalar registers.
10517 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
10519 * genopinit.cc (main): Adjust maximal number of optabs and
10521 * gensupport.cc (find_optab): Shift optab by 20 and mode by
10523 * optabs-query.h (optab_handler): Ditto.
10524 (convert_optab_handler): Ditto.
10526 2023-07-12 Richard Biener <rguenther@suse.de>
10528 PR tree-optimization/110630
10529 * tree-vect-slp.cc (vect_add_slp_permutation): New
10530 offset parameter, honor that for the extract code generation.
10531 (vectorizable_slp_permutation_1): Handle offsetted identities.
10533 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10535 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
10536 (umul<mode>3_highpart): Ditto.
10538 2023-07-12 Jan Beulich <jbeulich@suse.com>
10540 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
10541 alternative. Adjust original last alternative's "prefix"
10542 attribute to maybe_evex.
10544 2023-07-12 Jan Beulich <jbeulich@suse.com>
10546 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
10547 vbroadcastss for AVX2. New AVX512F alternative.
10548 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
10549 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
10551 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10553 * config/riscv/peephole.md: Remove XThead* peephole passes.
10554 * config/riscv/thead.md: Include thead-peephole.md.
10555 * config/riscv/thead-peephole.md: New file.
10557 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10559 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
10561 (riscv_index_reg_class): Likewise.
10562 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
10563 (riscv_index_reg_class): New function.
10564 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
10565 riscv_index_reg_class().
10566 (REGNO_OK_FOR_INDEX_P): Call new function
10567 riscv_regno_ok_for_index_p().
10569 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10571 * config/riscv/riscv-protos.h (enum riscv_address_type):
10572 New location of type definition.
10573 (struct riscv_address_info): Likewise.
10574 * config/riscv/riscv.cc (enum riscv_address_type):
10575 Old location of type definition.
10576 (struct riscv_address_info): Likewise.
10578 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10580 * config/riscv/riscv.h (Xmode): New macro.
10582 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10584 * config/riscv/riscv.cc (riscv_print_operand_address): Use
10585 output_addr_const rather than riscv_print_operand.
10587 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10589 * config/riscv/thead.md: Adjust constraints of th_addsl.
10591 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10593 * config/riscv/thead.cc (th_mempair_operands_p):
10594 Fix documentation of th_mempair_order_operands().
10596 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10598 * config/riscv/thead.cc (th_mempair_save_regs):
10599 Emit REG_FRAME_RELATED_EXPR notes in prologue.
10601 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
10603 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
10604 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
10605 New XThead extension INSN.
10606 (*zero_extendsidi2_th_extu): New XThead extension INSN.
10607 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
10609 2023-07-12 liuhongt <hongtao.liu@intel.com>
10613 * config/i386/predicates.md
10614 (int_float_vector_all_ones_operand): New predicate.
10615 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
10617 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
10619 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
10621 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
10622 define_insn_and_split to avoid false dependence.
10623 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
10624 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
10625 of operands 1 to '0' to avoid false dependence.
10626 (*andnot<mode>3): Ditto.
10627 (iornot<mode>3): Ditto.
10628 (*<nlogic><mode>3): Ditto.
10630 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
10632 * common/config/i386/cpuinfo.h
10633 (get_intel_cpu): Handle Granite Rapids D.
10634 * common/config/i386/i386-common.cc:
10635 (processor_alias_table): Add graniterapids-d.
10636 * common/config/i386/i386-cpuinfo.h
10637 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
10638 * config.gcc: Add -march=graniterapids-d.
10639 * config/i386/driver-i386.cc (host_detect_local_cpu):
10640 Handle graniterapids-d.
10641 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
10642 * doc/extend.texi: Add graniterapids-d.
10643 * doc/invoke.texi: Ditto.
10645 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
10647 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
10648 Add OPTION_MASK_ISA_AVX512VL.
10649 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
10652 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10654 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
10655 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
10656 (shuffle_compress_patterns): Ditto.
10657 (expand_vec_perm_const_1): Ditto.
10659 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
10661 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
10662 * cfghooks.h (struct cfg_hooks): Change return type of
10663 verify_flow_info from integer to bool.
10664 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
10665 (can_delete_label_p): Ditto.
10666 (rtl_verify_flow_info): Change return type from int to bool
10667 and adjust function body accordingly. Change "err" variable to bool.
10668 (rtl_verify_flow_info_1): Ditto.
10669 (free_bb_for_insn): Change return type to void.
10670 (rtl_merge_blocks): Change "b_empty" variable to bool.
10671 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
10672 (verify_hot_cold_block_grouping): Change return type from int to bool.
10673 Change "err" variable to bool.
10674 (rtl_verify_edges): Ditto.
10675 (rtl_verify_bb_insns): Ditto.
10676 (rtl_verify_bb_pointers): Ditto.
10677 (rtl_verify_bb_insn_chain): Ditto.
10678 (rtl_verify_fallthru): Ditto.
10679 (rtl_verify_bb_layout): Ditto.
10680 (purge_all_dead_edges): Change "purged" variable to bool.
10681 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
10682 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
10683 (load_killed_in_block_p): Change return type from int to bool
10684 and adjust function body accordingly.
10685 (oprs_unchanged_p): Return true/false.
10686 (rest_of_handle_gcse2): Change return type to void.
10687 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
10688 int to bool. Change "err" variable to bool.
10690 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
10692 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
10694 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10696 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
10697 * internal-fn.cc (cond_len_unary_direct): Ditto.
10698 (cond_len_binary_direct): Ditto.
10699 (cond_len_ternary_direct): Ditto.
10700 (expand_cond_len_unary_optab_fn): Ditto.
10701 (expand_cond_len_binary_optab_fn): Ditto.
10702 (expand_cond_len_ternary_optab_fn): Ditto.
10703 (direct_cond_len_unary_optab_supported_p): Ditto.
10704 (direct_cond_len_binary_optab_supported_p): Ditto.
10705 (direct_cond_len_ternary_optab_supported_p): Ditto.
10706 * internal-fn.def (COND_LEN_ADD): Ditto.
10707 (COND_LEN_SUB): Ditto.
10708 (COND_LEN_MUL): Ditto.
10709 (COND_LEN_DIV): Ditto.
10710 (COND_LEN_MOD): Ditto.
10711 (COND_LEN_RDIV): Ditto.
10712 (COND_LEN_MIN): Ditto.
10713 (COND_LEN_MAX): Ditto.
10714 (COND_LEN_FMIN): Ditto.
10715 (COND_LEN_FMAX): Ditto.
10716 (COND_LEN_AND): Ditto.
10717 (COND_LEN_IOR): Ditto.
10718 (COND_LEN_XOR): Ditto.
10719 (COND_LEN_SHL): Ditto.
10720 (COND_LEN_SHR): Ditto.
10721 (COND_LEN_FMA): Ditto.
10722 (COND_LEN_FMS): Ditto.
10723 (COND_LEN_FNMA): Ditto.
10724 (COND_LEN_FNMS): Ditto.
10725 (COND_LEN_NEG): Ditto.
10726 * optabs.def (OPTAB_D): Ditto.
10728 2023-07-11 Richard Biener <rguenther@suse.de>
10730 PR tree-optimization/110614
10731 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
10732 SLP splats are not suitable for re-align ops.
10734 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
10736 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
10738 (vsx_quad_dform_memory_operand): Likewise.
10740 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
10742 * reorg.cc (stop_search_p): Change return type from int to bool
10743 and adjust function body accordingly.
10744 (resource_conflicts_p): Ditto.
10745 (insn_references_resource_p): Change return type from int to bool.
10746 (insn_sets_resource_p): Ditto.
10747 (redirect_with_delay_slots_safe_p): Ditto.
10748 (condition_dominates_p): Change return type from int to bool
10749 and adjust function body accordingly.
10750 (redirect_with_delay_list_safe_p): Ditto.
10751 (check_annul_list_true_false): Ditto. Change "annul_true_p"
10752 function argument to bool.
10753 (steal_delay_list_from_target): Change "pannul_p" function
10754 argument to bool pointer. Change "must_annul" and "used_annul"
10755 variables from int to bool.
10756 (steal_delay_list_from_fallthrough): Ditto.
10757 (own_thread_p): Change return type from int to bool and adjust
10758 function body accordingly. Change "allow_fallthrough" function
10760 (reorg_redirect_jump): Change return type from int to bool.
10761 (fill_simple_delay_slots): Change "non_jumps_p" function
10762 argument from int to bool. Change "maybe_never" varible to bool.
10763 (fill_slots_from_thread): Change "likely", "thread_if_true" and
10764 "own_thread" function arguments to bool. Change "lose" and
10765 "must_annul" variables to bool.
10766 (delete_from_delay_slot): Change "had_barrier" variable to bool.
10767 (try_merge_delay_insns): Change "annul_p" variable to bool.
10768 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
10770 (rest_of_handle_delay_slots): Change return type from int to void
10771 and adjust function body accordingly.
10773 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
10775 * doc/extend.texi (RISC-V Operand Modifiers): New.
10777 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10779 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
10780 (insert_insn_end_basic_block): Ditto.
10781 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
10782 * gcse.cc (insert_insn_end_basic_block): Export as global function.
10783 * gcse.h (insert_insn_end_basic_block): Ditto.
10785 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
10788 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
10789 (arm_builtin_decl): Hahndle MVE builtins.
10790 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
10791 (add_unique_function): Fix handling of
10792 __ARM_MVE_PRESERVE_USER_NAMESPACE.
10793 (add_overloaded_function): Likewise.
10794 * config/arm/arm-protos.h (builtin_decl): New declaration.
10796 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
10798 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
10800 2023-07-10 Xi Ruoyao <xry111@xry111.site>
10802 PR tree-optimization/110557
10803 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
10804 Ensure the output sign-extended if necessary.
10806 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
10808 * config/i386/i386.md (peephole2): Transform xchg insn with a
10809 REG_UNUSED note to a (simple) move.
10810 (*insvti_lowpart_1): New define_insn_and_split.
10811 (*insvdi_lowpart_1): Likewise.
10813 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
10815 * config/i386/i386-features.cc (compute_convert_gain): Tweak
10816 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
10817 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
10818 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
10820 2023-07-10 liuhongt <hongtao.liu@intel.com>
10823 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
10824 splitter to detect fp max pattern.
10825 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
10827 2023-07-09 Jan Hubicka <jh@suse.cz>
10829 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
10830 (dump_edge_info): Likewise.
10831 (dump_bb_info): Likewise.
10832 * profile-count.cc (profile_count::dump): Add comma between quality and
10835 2023-07-08 Jan Hubicka <jh@suse.cz>
10837 PR tree-optimization/110600
10838 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
10840 2023-07-08 Jan Hubicka <jh@suse.cz>
10842 PR middle-end/110590
10843 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
10844 inner loops and be more careful about inconsistent profiles.
10845 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
10846 exit is followed by other exit.
10848 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
10850 * cprop.cc (reg_available_p): Change return type from int to bool.
10851 (reg_not_set_p): Ditto.
10852 (try_replace_reg): Ditto. Change "success" variable to bool.
10853 (cprop_jump): Change return type from int to void
10854 and adjust function body accordingly.
10855 (constprop_register): Ditto.
10856 (cprop_insn): Ditto. Change "changed" variable to bool.
10857 (local_cprop_pass): Change return type from int to void
10858 and adjust function body accordingly.
10859 (bypass_block): Ditto. Change "change", "may_be_loop_header"
10860 and "removed_p" variables to bool.
10861 (bypass_conditional_jumps): Change return type from int to void
10862 and adjust function body accordingly. Change "changed"
10864 (one_cprop_pass): Ditto.
10866 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
10868 * gcse.cc (expr_equiv_p): Change return type from int to bool.
10869 (oprs_unchanged_p): Change return type from int to void
10870 and adjust function body accordingly.
10871 (oprs_anticipatable_p): Ditto.
10872 (oprs_available_p): Ditto.
10873 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
10874 arguments to bool. Change "found" variable to bool.
10875 (load_killed_in_block_p): Change return type from int to void and
10876 adjust function body accordingly. Change "avail_p" argument to bool.
10877 (pre_expr_reaches_here_p): Change return type from int to void
10878 and adjust function body accordingly.
10879 (pre_delete): Ditto. Change "changed" variable to bool.
10880 (pre_gcse): Change return type from int to void
10881 and adjust function body accordingly. Change "did_insert" and
10882 "changed" variables to bool.
10883 (one_pre_gcse_pass): Change return type from int to void
10884 and adjust function body accordingly. Change "changed" variable
10886 (should_hoist_expr_to_dom): Change return type from int to void
10887 and adjust function body accordingly. Change
10888 "visited_allocated_locally" variable to bool.
10889 (hoist_code): Change return type from int to void and adjust
10890 function body accordingly. Change "changed" variable to bool.
10891 (one_code_hoisting_pass): Ditto.
10892 (pre_edge_insert): Change return type from int to void and adjust
10893 function body accordingly. Change "did_insert" variable to bool.
10894 (pre_expr_reaches_here_p_work): Change return type from int to void
10895 and adjust function body accordingly.
10896 (simple_mem): Ditto.
10897 (want_to_gcse_p): Change return type from int to void
10898 and adjust function body accordingly.
10899 (can_assign_to_reg_without_clobbers_p): Update function body
10900 for bool return type.
10901 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
10902 (pre_insert_copies): Change "added_copy" variable to bool.
10904 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
10908 * doc/invoke.texi (Warning Options): Fix typos.
10910 2023-07-07 Jan Hubicka <jh@suse.cz>
10912 * profile-count.cc (profile_count::dump): Add FUN
10913 parameter; print relative frequency.
10914 (profile_count::debug): Update.
10915 * profile-count.h (profile_count::dump): Update
10918 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
10922 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
10923 TImode destinations from paradoxical SUBREGs (setting the lowpart)
10924 into explicit zero extensions. Use *insvti_highpart_1 instruction
10925 to set the highpart of a TImode destination.
10927 2023-07-07 Jan Hubicka <jh@suse.cz>
10929 * predict.cc (force_edge_cold): Use
10930 set_edge_probability_and_rescale_others; improve dumps.
10932 2023-07-07 Jan Hubicka <jh@suse.cz>
10934 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
10936 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
10939 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
10941 * config/s390/s390.cc (vec_init): Fix default case
10943 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
10945 * lra-assigns.cc (assign_by_spills): Add reload insns involving
10946 reload pseudos with non-refined class to be processed on the next
10948 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
10949 (in_class_p): Use it.
10950 (print_curr_insn_alt): New func.
10951 (process_alt_operands): Use it. Improve debug info.
10952 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
10953 pseudo class if it is not refined yet.
10955 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
10957 * value-range.cc (irange::get_bitmask_from_range): Return all the
10958 known bits for a singleton.
10959 (irange::set_range_from_bitmask): Set a range of a singleton when
10960 all bits are known.
10962 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
10964 * value-range.cc (irange::intersect): Leave normalization to
10967 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
10969 * data-streamer-in.cc (streamer_read_value_range): Adjust for
10971 * data-streamer-out.cc (streamer_write_vrange): Same.
10972 * range-op.cc (operator_cast::fold_range): Same.
10973 * value-range-pretty-print.cc
10974 (vrange_printer::print_irange_bitmasks): Same.
10975 * value-range-storage.cc (irange_storage::write_lengths_address):
10977 (irange_storage::set_irange): Same.
10978 (irange_storage::get_irange): Same.
10979 (irange_storage::size): Same.
10980 (irange_storage::dump): Same.
10981 * value-range-storage.h: Same.
10982 * value-range.cc (debug): New.
10983 (irange_bitmask::dump): New.
10984 (add_vrange): Adjust for value/mask.
10985 (irange::operator=): Same.
10986 (irange::set): Same.
10987 (irange::verify_range): Same.
10988 (irange::operator==): Same.
10989 (irange::contains_p): Same.
10990 (irange::irange_single_pair_union): Same.
10991 (irange::union_): Same.
10992 (irange::intersect): Same.
10993 (irange::invert): Same.
10994 (irange::get_nonzero_bits_from_range): Rename to...
10995 (irange::get_bitmask_from_range): ...this.
10996 (irange::set_range_from_nonzero_bits): Rename to...
10997 (irange::set_range_from_bitmask): ...this.
10998 (irange::set_nonzero_bits): Rename to...
10999 (irange::update_bitmask): ...this.
11000 (irange::get_nonzero_bits): Rename to...
11001 (irange::get_bitmask): ...this.
11002 (irange::intersect_nonzero_bits): Rename to...
11003 (irange::intersect_bitmask): ...this.
11004 (irange::union_nonzero_bits): Rename to...
11005 (irange::union_bitmask): ...this.
11006 (irange_bitmask::verify_mask): New.
11007 * value-range.h (class irange_bitmask): New.
11008 (irange_bitmask::set_unknown): New.
11009 (irange_bitmask::unknown_p): New.
11010 (irange_bitmask::irange_bitmask): New.
11011 (irange_bitmask::get_precision): New.
11012 (irange_bitmask::get_nonzero_bits): New.
11013 (irange_bitmask::set_nonzero_bits): New.
11014 (irange_bitmask::operator==): New.
11015 (irange_bitmask::union_): New.
11016 (irange_bitmask::intersect): New.
11017 (class irange): Friend vrange_printer.
11018 (irange::varying_compatible_p): Adjust for bitmask.
11019 (irange::set_varying): Same.
11020 (irange::set_nonzero): Same.
11022 2023-07-07 Jan Beulich <jbeulich@suse.com>
11024 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
11026 2023-07-07 Jan Beulich <jbeulich@suse.com>
11028 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
11029 alternative. Switch new last alternative's "isa" attribute to
11031 (vec_extract_hi_v32qi): Likewise.
11033 2023-07-07 Pan Li <pan2.li@intel.com>
11034 Robin Dapp <rdapp@ventanamicro.com>
11036 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
11038 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
11039 (riscv_mode_exit): Likewise for exit mode.
11040 (riscv_mode_needed): Likewise for needed mode.
11041 (riscv_mode_after): Likewise for after mode.
11043 2023-07-07 Pan Li <pan2.li@intel.com>
11045 * config/riscv/vector.md: Fix typo.
11047 2023-07-06 Jan Hubicka <jh@suse.cz>
11049 PR middle-end/25623
11050 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
11051 of iterations determined.
11052 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
11054 2023-07-06 Jan Hubicka <jh@suse.cz>
11056 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
11057 probability update to be safe on loops with subloops.
11058 Make bound parameter to be iteration bound.
11059 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
11060 of scale_loop_profile.
11061 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
11063 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
11065 PR tree-optimization/110449
11066 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
11067 vec_loop for the unrolled loop.
11069 2023-07-06 Jan Hubicka <jh@suse.cz>
11071 * cfg.cc (set_edge_probability_and_rescale_others): New function.
11072 (update_bb_profile_for_threading): Use it; simplify the rest.
11073 * cfg.h (set_edge_probability_and_rescale_others): Declare.
11074 * profile-count.h (profile_probability::apply_scale): New.
11076 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
11078 * doc/extend.texi (ARC Built-in Functions): Update documentation
11079 with missing builtins.
11081 2023-07-06 Richard Biener <rguenther@suse.de>
11083 PR tree-optimization/110556
11084 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
11085 assign code and all operands of non-stores.
11087 2023-07-06 Richard Biener <rguenther@suse.de>
11089 PR tree-optimization/110563
11090 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
11091 Remove second argument.
11092 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
11093 Remove for_epilogue_p argument. Merge assert ...
11094 (vect_analyze_loop_2): ... with check done before determining
11095 partial vectors by moving it after.
11096 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
11098 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11100 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
11101 few things re 'reorder' option and strings.
11102 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
11104 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11106 * gengtype-parse.cc: Clean up obsolete parametrized structs
11108 * gengtype.cc: Likewise.
11109 * gengtype.h: Likewise.
11111 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11113 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
11116 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11118 * gengtype-parse.cc (token_names): Add '"user"'.
11119 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
11120 'FIRST_TOKEN_WITH_VALUE'.
11122 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11124 * doc/gty.texi (GTY Options) <string_length>: Enhance.
11126 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11128 * gengtype.cc (write_root, write_roots): Explicitly reject
11129 'string_length' option.
11130 * doc/gty.texi (GTY Options) <string_length>: Document.
11132 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11134 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
11135 (ggc_pch_write_object): Remove 'bool is_string' argument.
11136 * ggc-common.cc: Adjust.
11137 * ggc-page.cc: Likewise.
11139 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
11141 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
11143 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
11145 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
11146 and add description for inling of function with arch and tune
11149 2023-07-06 Richard Biener <rguenther@suse.de>
11151 PR tree-optimization/110515
11152 * tree-ssa-pre.cc (compute_avail): Make code dealing
11153 with hoisting loads with different alias-sets more
11156 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11158 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
11160 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
11162 * config/i386/i386.cc (ix86_can_inline_p): If callee has
11163 default arch=x86-64 and tune=generic, do not block the
11164 inlining to its caller. Also allow callee with different
11165 arch= to be inlined if it has always_inline attribute and
11166 it's ISA is subset of caller's.
11168 2023-07-06 liuhongt <hongtao.liu@intel.com>
11170 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
11171 DF/SFmode AND/IOR/XOR/ANDN operations.
11173 2023-07-06 Andrew Pinski <apinski@marvell.com>
11175 PR middle-end/110554
11176 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
11177 just build using boolean_type_node instead of the cond_type.
11178 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
11179 that will feed into the COND_EXPR.
11181 2023-07-06 liuhongt <hongtao.liu@intel.com>
11184 * config/i386/i386.md (movdf_internal): Disparage slightly for
11185 2 alternatives (r,v) and (v,r) by adding constraint modifier
11188 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
11191 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
11192 initialization of new_addr.
11194 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
11196 PR tree-optimization/110474
11197 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
11198 unroll factor while selecting the epilog vect loop VF.
11200 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11202 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
11205 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11207 * gimple-range-gori.cc (compute_operand_range): After calling
11208 compute_operand2_range, recursively call self if needed.
11209 (compute_operand2_range): Turn into a leaf function.
11210 (gori_compute::compute_operand1_and_operand2_range): Finish
11211 operand2 calculation.
11212 * gimple-range-gori.h (compute_operand2_range): Remove name param.
11214 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11216 * gimple-range-gori.cc (compute_operand_range): After calling
11217 compute_operand1_range, recursively call self if needed.
11218 (compute_operand1_range): Turn into a leaf function.
11219 (gori_compute::compute_operand1_and_operand2_range): Finish
11220 operand1 calculation.
11221 * gimple-range-gori.h (compute_operand1_range): Remove name param.
11223 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11225 * gimple-range-gori.cc (compute_operand_range): Check for
11226 operand interdependence when both op1 and op2 are computed.
11227 (compute_operand1_and_operand2_range): No checks required now.
11229 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11231 * gimple-range-gori.cc (compute_operand_range): Check for
11232 a relation between op1 and op2 and use that instead.
11233 (compute_operand1_range): Don't look for a relation override.
11234 (compute_operand2_range): Ditto.
11236 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
11238 * doc/contrib.texi (Contributors): Update my entry.
11240 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
11242 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
11245 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
11247 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
11248 scehdule_more_p and contributes_to_priority indirect frunction
11249 type from int to bool.
11250 (no_real_insns_p): Change return type from int to bool.
11251 (contributes_to_priority): Ditto.
11252 * haifa-sched.cc (no_real_insns_p): Change return type from
11253 int to bool and adjust function body accordingly.
11254 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
11255 variable type from int to bool.
11256 (ps_insn_advance_column): Change return type from int to bool.
11257 (ps_has_conflicts): Ditto. Change "has_conflicts"
11258 variable type from int to bool.
11259 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
11260 (conditions_mutex_p): Ditto.
11261 * sched-ebb.cc (schedule_more_p): Ditto.
11262 (ebb_contributes_to_priority): Change return type from
11263 int to bool and adjust function body accordingly.
11264 * sched-rgn.cc (is_cfg_nonregular): Ditto.
11265 (check_live_1): Ditto.
11267 (find_conditional_protection): Ditto.
11268 (is_conditionally_protected): Ditto.
11269 (is_prisky): Ditto.
11270 (is_exception_free): Ditto.
11271 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
11272 variables from int to bool.
11273 (extend_rgns): Change "rescan" variable from int to bool.
11274 (check_live): Change return type from
11275 int to bool and adjust function body accordingly.
11276 (can_schedule_ready_p): Ditto.
11277 (schedule_more_p): Ditto.
11278 (contributes_to_priority): Ditto.
11280 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11282 * doc/md.texi: Document that vec_set and vec_extract must not
11284 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
11285 (gimple_expand_vec_set_extract_expr): ...to this.
11286 (gimple_expand_vec_exprs): Call renamed function.
11287 * internal-fn.cc (vec_extract_direct): Add.
11288 (expand_vec_extract_optab_fn): New function to expand
11290 (direct_vec_extract_optab_supported_p): Add.
11291 * internal-fn.def (VEC_EXTRACT): Add.
11292 * optabs.cc (can_vec_extract_var_idx_p): New function.
11293 * optabs.h (can_vec_extract_var_idx_p): Declare.
11295 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11297 * config/riscv/autovec.md: Add gen_lowpart.
11299 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11301 * config/riscv/autovec.md: Allow register index operand.
11303 2023-07-05 Pan Li <pan2.li@intel.com>
11305 * config/riscv/riscv-vector-builtins.cc
11306 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
11308 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11310 * config/riscv/autovec.md: Use float_truncate.
11312 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11314 * internal-fn.cc (internal_fn_len_index): Apply
11315 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
11316 (internal_fn_mask_index): Ditto.
11317 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
11318 (supports_vec_scatter_store_p): Ditto.
11319 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
11320 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
11321 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
11322 (vect_get_strided_load_store_ops): Ditto.
11323 (vectorizable_store): Ditto.
11324 (vectorizable_load): Ditto.
11326 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11327 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11329 * simplify-rtx.cc (native_encode_rtx): Ditto.
11330 (native_decode_vector_rtx): Ditto.
11331 (simplify_const_vector_byte_offset): Ditto.
11332 (simplify_const_vector_subreg): Ditto.
11333 * tree.cc (build_truth_vector_type_for_mode): Ditto.
11334 * varasm.cc (output_constant_pool_2): Ditto.
11336 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
11338 * config/mips/mips.cc (mips_expand_block_move): don't expand for
11339 r6 with -mno-unaligned-access option if one or both of src and
11340 dest are unaligned. restruct: return directly if length is not const.
11341 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
11343 2023-07-05 Jan Beulich <jbeulich@suse.com>
11346 * config/i386/sse.md: New splitters to simplify
11347 not;vec_duplicate as a singular vpternlog.
11348 (one_cmpl<mode>2): Allow broadcast for operand 1.
11349 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
11351 2023-07-05 Jan Beulich <jbeulich@suse.com>
11354 * config/i386/sse.md: New splitters to simplify
11355 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
11357 2023-07-05 Jan Beulich <jbeulich@suse.com>
11360 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
11361 form of splitter for PR target/100711.
11363 2023-07-05 Richard Biener <rguenther@suse.de>
11365 PR middle-end/110541
11366 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
11369 2023-07-05 Jan Beulich <jbeulich@suse.com>
11372 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
11373 for memory form operand 1.
11375 2023-07-05 Jan Beulich <jbeulich@suse.com>
11378 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
11379 bitwise vector operations.
11380 * config/i386/sse.md (*iornot<mode>3): New insn.
11381 (*xnor<mode>3): Likewise.
11382 (*<nlogic><mode>3): Likewise.
11383 (andor): New code iterator.
11384 (nlogic): New code attribute.
11385 (ternlog_nlogic): Likewise.
11387 2023-07-05 Richard Biener <rguenther@suse.de>
11389 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
11391 2023-07-05 yulong <shiyulong@iscas.ac.cn>
11393 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
11395 2023-07-05 yulong <shiyulong@iscas.ac.cn>
11397 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
11398 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
11399 (ADJUST_ALIGNMENT): Ditto.
11400 (RVV_TUPLE_PARTIAL_MODES): Ditto.
11401 (ADJUST_NUNITS): Ditto.
11402 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
11404 (vfloat16mf4x3_t): Ditto.
11405 (vfloat16mf4x4_t): Ditto.
11406 (vfloat16mf4x5_t): Ditto.
11407 (vfloat16mf4x6_t): Ditto.
11408 (vfloat16mf4x7_t): Ditto.
11409 (vfloat16mf4x8_t): Ditto.
11410 (vfloat16mf2x2_t): Ditto.
11411 (vfloat16mf2x3_t): Ditto.
11412 (vfloat16mf2x4_t): Ditto.
11413 (vfloat16mf2x5_t): Ditto.
11414 (vfloat16mf2x6_t): Ditto.
11415 (vfloat16mf2x7_t): Ditto.
11416 (vfloat16mf2x8_t): Ditto.
11417 (vfloat16m1x2_t): Ditto.
11418 (vfloat16m1x3_t): Ditto.
11419 (vfloat16m1x4_t): Ditto.
11420 (vfloat16m1x5_t): Ditto.
11421 (vfloat16m1x6_t): Ditto.
11422 (vfloat16m1x7_t): Ditto.
11423 (vfloat16m1x8_t): Ditto.
11424 (vfloat16m2x2_t): Ditto.
11425 (vfloat16m2x3_t): Ditto.
11426 (vfloat16m2x4_t): Ditto.
11427 (vfloat16m4x2_t): Ditto.
11428 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
11429 (vfloat16mf4x3_t): Ditto.
11430 (vfloat16mf4x4_t): Ditto.
11431 (vfloat16mf4x5_t): Ditto.
11432 (vfloat16mf4x6_t): Ditto.
11433 (vfloat16mf4x7_t): Ditto.
11434 (vfloat16mf4x8_t): Ditto.
11435 (vfloat16mf2x2_t): Ditto.
11436 (vfloat16mf2x3_t): Ditto.
11437 (vfloat16mf2x4_t): Ditto.
11438 (vfloat16mf2x5_t): Ditto.
11439 (vfloat16mf2x6_t): Ditto.
11440 (vfloat16mf2x7_t): Ditto.
11441 (vfloat16mf2x8_t): Ditto.
11442 (vfloat16m1x2_t): Ditto.
11443 (vfloat16m1x3_t): Ditto.
11444 (vfloat16m1x4_t): Ditto.
11445 (vfloat16m1x5_t): Ditto.
11446 (vfloat16m1x6_t): Ditto.
11447 (vfloat16m1x7_t): Ditto.
11448 (vfloat16m1x8_t): Ditto.
11449 (vfloat16m2x2_t): Ditto.
11450 (vfloat16m2x3_t): Ditto.
11451 (vfloat16m2x4_t): Ditto.
11452 (vfloat16m4x2_t): Ditto.
11453 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
11454 * config/riscv/riscv.md: New.
11455 * config/riscv/vector-iterators.md: New.
11457 2023-07-04 Andrew Pinski <apinski@marvell.com>
11459 PR tree-optimization/110487
11460 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
11461 build a nonstandard integer and use that.
11463 2023-07-04 Andrew Pinski <apinski@marvell.com>
11465 * match.pd (a?-1:0): Cast type an integer type
11466 rather the type before the negative.
11467 (a?0:-1): Likewise.
11469 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11471 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
11472 Change to use HARD_REG_BIT and its macros.
11473 * config/xtensa/xtensa.md
11474 (peephole2: regmove elimination during DFmode input reload):
11477 2023-07-04 Richard Biener <rguenther@suse.de>
11479 PR tree-optimization/110491
11480 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
11481 whether the PHI args are possibly undefined before folding
11484 2023-07-04 Pan Li <pan2.li@intel.com>
11485 Thomas Schwinge <thomas@codesourcery.com>
11487 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
11488 bits for machine mode table.
11489 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
11490 HOST machine mode bits.
11491 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
11492 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
11494 * tree-streamer.h (streamer_mode_table): Ditto.
11495 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
11496 as the packing limit.
11497 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
11499 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
11501 * lto-streamer.h (class lto_input_block): Capture
11502 'lto_file_decl_data *file_data' instead of just
11503 'unsigned char *mode_table'.
11504 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
11505 * ipa-fnsummary.cc (inline_read_section): Likewise.
11506 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
11507 * ipa-modref.cc (read_section): Likewise.
11508 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
11510 * ipa-sra.cc (isra_read_summary_section): Likewise.
11511 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
11512 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
11513 * lto-streamer-in.cc (lto_read_body_or_constructor)
11514 (lto_input_toplevel_asms): Likewise.
11515 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
11517 2023-07-04 Richard Biener <rguenther@suse.de>
11519 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
11520 (empty_bb_or_one_feeding_into_p): Check for them.
11521 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
11522 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
11524 2023-07-04 Richard Biener <rguenther@suse.de>
11526 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
11527 check guarding scalar_niter underflow.
11529 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
11531 PR tree-optimization/110531
11532 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
11533 slp_done_for_suggested_uf to false.
11535 2023-07-04 Richard Biener <rguenther@suse.de>
11537 PR tree-optimization/110228
11538 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
11539 Mark SSA may-undefs.
11540 (bb_no_side_effects_p): Check stmt uses for undefs.
11542 2023-07-04 Richard Biener <rguenther@suse.de>
11544 PR tree-optimization/110436
11545 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
11546 force live but not relevant pattern stmts relevant.
11548 2023-07-04 Lili Cui <lili.cui@intel.com>
11550 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
11551 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
11553 2023-07-04 Richard Biener <rguenther@suse.de>
11555 PR middle-end/110495
11556 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
11557 since we do not set TREE_OVERFLOW on those since the
11558 introduction of VL vectors.
11559 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
11560 at TREE_OVERFLOW to determine validity of association.
11562 2023-07-04 Richard Biener <rguenther@suse.de>
11564 PR tree-optimization/110310
11565 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
11566 Move costing part ...
11567 (vect_analyze_loop_costing): ... here. Integrate better
11568 estimate for epilogues from ...
11569 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
11570 with actual epilogue status.
11571 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
11572 avoid cancelling epilogue vectorization.
11573 (vect_update_epilogue_niters): Remove. No longer update
11574 epilogue LOOP_VINFO_NITERS.
11576 2023-07-04 Pan Li <pan2.li@intel.com>
11579 2023-07-03 Pan Li <pan2.li@intel.com>
11581 * config/riscv/vector.md: Fix typo.
11583 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11585 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
11586 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
11587 (expand_gather_load_optab_fn): Ditto.
11588 (internal_load_fn_p): Ditto.
11589 (internal_store_fn_p): Ditto.
11590 (internal_gather_scatter_fn_p): Ditto.
11591 (internal_fn_len_index): Ditto.
11592 (internal_fn_mask_index): Ditto.
11593 (internal_fn_stored_value_index): Ditto.
11594 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
11595 (LEN_MASK_SCATTER_STORE): Ditto.
11596 * optabs.def (OPTAB_CD): Ditto.
11598 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11600 * config/riscv/riscv-vsetvl.cc
11601 (vector_insn_info::parse_insn): Add early break.
11603 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
11605 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
11606 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
11608 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
11610 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
11612 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
11614 * common/config/riscv/riscv-common.cc: Add support for zvbb,
11615 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
11616 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
11617 * config/riscv/arch-canonicalize: Add canonicalization info for
11618 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
11619 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
11620 (MASK_ZVBC): Likewise.
11621 (TARGET_ZVBB): Likewise.
11622 (TARGET_ZVBC): Likewise.
11623 (MASK_ZVKG): Likewise.
11624 (MASK_ZVKNED): Likewise.
11625 (MASK_ZVKNHA): Likewise.
11626 (MASK_ZVKNHB): Likewise.
11627 (MASK_ZVKSED): Likewise.
11628 (MASK_ZVKSH): Likewise.
11629 (MASK_ZVKN): Likewise.
11630 (MASK_ZVKNC): Likewise.
11631 (MASK_ZVKNG): Likewise.
11632 (MASK_ZVKS): Likewise.
11633 (MASK_ZVKSC): Likewise.
11634 (MASK_ZVKSG): Likewise.
11635 (MASK_ZVKT): Likewise.
11636 (TARGET_ZVKG): Likewise.
11637 (TARGET_ZVKNED): Likewise.
11638 (TARGET_ZVKNHA): Likewise.
11639 (TARGET_ZVKNHB): Likewise.
11640 (TARGET_ZVKSED): Likewise.
11641 (TARGET_ZVKSH): Likewise.
11642 (TARGET_ZVKN): Likewise.
11643 (TARGET_ZVKNC): Likewise.
11644 (TARGET_ZVKNG): Likewise.
11645 (TARGET_ZVKS): Likewise.
11646 (TARGET_ZVKSC): Likewise.
11647 (TARGET_ZVKSG): Likewise.
11648 (TARGET_ZVKT): Likewise.
11649 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
11651 2023-07-03 Andrew Pinski <apinski@marvell.com>
11653 PR middle-end/110510
11654 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
11656 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
11658 * config/darwin.h: Avoid duplicate multiply_defined specs on
11659 earlier Darwin versions with shared libgcc.
11661 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
11663 * tree.h (tree_int_cst_equal): Change return type from int to bool.
11664 (operand_equal_for_phi_arg_p): Ditto.
11665 (tree_map_base_marked_p): Ditto.
11666 * tree.cc (contains_placeholder_p): Update function body
11667 for bool return type.
11668 (type_cache_hasher::equal): Ditto.
11669 (tree_map_base_hash): Change return type
11670 from int to void and adjust function body accordingly.
11671 (tree_int_cst_equal): Ditto.
11672 (operand_equal_for_phi_arg_p): Ditto.
11673 (get_narrower): Change "first" variable to bool.
11674 (cl_option_hasher::equal): Update function body for bool return type.
11675 * ggc.h (ggc_set_mark): Change return type from int to bool.
11676 (ggc_marked_p): Ditto.
11677 * ggc-page.cc (gt_ggc_mx): Change return type
11678 from int to void and adjust function body accordingly.
11679 (ggc_set_mark): Ditto.
11681 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11683 * config/riscv/autovec.md: Change order of
11684 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
11685 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
11686 * doc/md.texi: Ditto.
11687 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
11688 * internal-fn.cc (len_maskload_direct): Ditto.
11689 (len_maskstore_direct): Ditto.
11690 (add_len_and_mask_args): New function.
11691 (expand_partial_load_optab_fn): Change order of
11692 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
11693 (expand_partial_store_optab_fn): Ditto.
11694 (internal_fn_len_index): New function.
11695 (internal_fn_mask_index): Change order of
11696 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
11697 (internal_fn_stored_value_index): Ditto.
11698 (internal_len_load_store_bias): Ditto.
11699 * internal-fn.h (internal_fn_len_index): New function.
11700 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
11701 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
11702 * tree-vect-stmts.cc (vectorizable_store): Ditto.
11703 (vectorizable_load): Ditto.
11705 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
11708 * doc/gm2.texi (Semantic checking): Include examples using
11709 -Wuninit-variable-checking.
11711 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11713 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
11714 (*single_widen_fnma<mode>): Ditto.
11715 (*double_widen_fms<mode>): Ditto.
11716 (*single_widen_fms<mode>): Ditto.
11717 (*double_widen_fnms<mode>): Ditto.
11718 (*single_widen_fnms<mode>): Ditto.
11720 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11722 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
11723 into "*" in pattern name which simplifies build files.
11724 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
11725 (*pred_single_widen_mul<mode>): New pattern.
11727 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
11729 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
11730 the index to be 0 or 1.
11732 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
11735 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11737 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
11738 (*single_widen_fnma<mode>): Ditto.
11739 (*double_widen_fms<mode>): Ditto.
11740 (*single_widen_fms<mode>): Ditto.
11741 (*double_widen_fnms<mode>): Ditto.
11742 (*single_widen_fnms<mode>): Ditto.
11744 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11746 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
11747 (*single_widen_fnma<mode>): Ditto.
11748 (*double_widen_fms<mode>): Ditto.
11749 (*single_widen_fms<mode>): Ditto.
11750 (*double_widen_fnms<mode>): Ditto.
11751 (*single_widen_fnms<mode>): Ditto.
11753 2023-07-03 Pan Li <pan2.li@intel.com>
11755 * config/riscv/vector.md: Fix typo.
11757 2023-07-03 Richard Biener <rguenther@suse.de>
11759 PR tree-optimization/110506
11760 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
11761 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
11763 2023-07-03 Richard Biener <rguenther@suse.de>
11765 PR tree-optimization/110506
11766 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
11767 type before relying on TYPE_PRECISION to produce a nonzero mask.
11769 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11771 * config/mips/mips.md(*and<mode>3_mips16): Generates
11772 ZEB/ZEH instructions.
11774 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11776 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
11777 address register to M16_REGS for MIPS16.
11778 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
11779 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
11780 (AVAIL_NON_MIPS16 (cache..)): Update to
11781 AVAIL_MIPS16E2_OR_NON_MIPS16.
11782 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
11783 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
11785 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11787 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
11788 for ISA_HAS_MIPS16E2.
11789 (ISA_HAS_SYNC): Same as above.
11790 (ISA_HAS_LL_SC): Same as above.
11792 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11794 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
11795 Add logics for generating instruction.
11796 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
11797 * config/mips/mips.md(mov_<load>l): Generates instructions.
11798 (mov_<load>r): Same as above.
11799 (mov_<store>l): Adjusted for the conditions above.
11800 (mov_<store>r): Same as above.
11801 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
11802 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
11804 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11806 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
11807 (mips_const_insns): Same as above.
11808 (mips_output_move): Same as above.
11809 (mips_output_function_prologue): Same as above.
11810 * config/mips/mips.md: Same as above
11812 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11814 * config/mips/constraints.md(Yz): New constraints for mips16e2.
11815 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
11816 (mips_bit_clear_info): Same as above.
11817 * config/mips/mips.cc(mips_bit_clear_info): New function for
11818 generating instructions.
11819 (mips_bit_clear_p): Same as above.
11820 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
11821 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
11822 (*and<mode>3): Generates INS instruction.
11823 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
11824 (ior<mode>3): Add logics for ORI instruction.
11825 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
11826 (*ior<mode>3_mips16): Add logics for XORI instruction.
11827 (*xor<mode>3_mips16): Generates XORI instrucion.
11828 (*extzv<mode>): Add logics for EXT instruction.
11829 (*insv<mode>): Add logics for INS instruction.
11830 * config/mips/predicates.md(bit_clear_operand): New predicate for
11831 generating bitwise instructions.
11832 (and_reg_operand): Add logics for generating bitwise instructions.
11834 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11836 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
11837 that uses global pointer register.
11838 (mips16_unextended_reference_p): Same as above.
11839 (mips_pic_base_register): Same as above.
11840 (mips_init_relocs): Same as above.
11841 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
11842 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
11843 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
11844 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
11846 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11848 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
11849 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
11850 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
11851 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
11852 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
11853 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
11855 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
11857 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
11859 * config/mips/mips.h(__mips_mips16e2): Defined a new
11861 (ISA_HAS_MIPS16E2): Defined a new macro.
11862 (ASM_SPEC): Pass mmips16e2 to the assembler.
11863 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
11864 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
11865 * doc/invoke.texi: Add -m(no-)mips16e2 option..
11867 2023-07-02 Jakub Jelinek <jakub@redhat.com>
11869 PR tree-optimization/110508
11870 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
11871 REALPART_EXPR opf nlhs if re2 is non-NULL.
11873 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11875 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
11877 * config/xtensa/xtensa.md (*xtensa_clamps):
11878 Add TARGET_MINMAX to the condition.
11880 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11882 * config/xtensa/xtensa.md (*eqne_INT_MIN):
11883 Add missing ":SI" to the match_operator.
11885 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
11888 * config/darwin.opt: Add fconstant-cfstrings alias to
11889 mconstant-cfstrings.
11890 * doc/invoke.texi: Amend invocation descriptions to reflect
11891 that the fconstant-cfstrings is a target-option alias and to
11892 add the missing mconstant-cfstrings option description to the
11895 2023-07-01 Jan Hubicka <jh@suse.cz>
11897 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
11898 parmaeter; update profile.
11899 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
11900 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
11901 (static_loop_exit): ... this; return the edge to be elliminated.
11902 (ch_base::copy_headers): Handle profile updating for eliminated exits.
11904 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
11906 * config/i386/i386-features.cc (compute_convert_gain): Provide
11907 gains/costs for ROTATE and ROTATERT (by an integer constant).
11908 (general_scalar_chain::convert_rotate): New helper function to
11909 convert a DImode or SImode rotation by an integer constant into
11911 (general_scalar_chain::convert_insn): Call the new convert_rotate
11912 for ROTATE and ROTATERT.
11913 (general_scalar_to_vector_candidate_p): Consider ROTATE and
11914 ROTATERT to be candidates if the second operand is an integer
11915 constant, valid for a rotation (or shift) in the given mode.
11916 * config/i386/i386-features.h (general_scalar_chain): Add new
11917 helper method convert_rotate.
11919 2023-07-01 Jan Hubicka <jh@suse.cz>
11921 PR tree-optimization/103680
11922 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
11923 make message clearer.
11925 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
11927 PR tree-optimization/101832
11928 * tree-object-size.cc (addr_object_size): Handle structure/union type
11929 when it has flexible size.
11931 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
11933 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
11934 (fold_nonarray_ctor_reference): Likewise. Specifically deal
11935 with integral bit-fields.
11936 (fold_ctor_reference): Make sure that the constructor uses the
11937 native storage order.
11939 2023-06-30 Jan Hubicka <jh@suse.cz>
11941 PR middle-end/109849
11942 * predict.cc (estimate_bb_frequencies): Turn to static function.
11943 (expr_expected_value_1): Fix handling of binary expressions with
11945 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
11946 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
11948 * predict.h (estimate_bb_frequencies): No longer declare it.
11950 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
11952 * fold-const.h (multiple_of_p): Change return type from int to bool.
11953 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
11954 neg_conp_p and neg_var_p variables to bool.
11955 (const_binop): Change sat_p variable to bool.
11956 (merge_ranges): Change no_overlap variable to bool.
11957 (extract_muldiv_1): Change same_p variable to bool.
11958 (tree_swap_operands_p): Update function body for bool return type.
11959 (fold_truth_andor): Change commutative variable to bool.
11960 (multiple_of_p): Change return type
11961 from int to void and adjust function body accordingly.
11962 * optabs.h (expand_twoval_unop): Change return type from int to bool.
11963 (expand_twoval_binop): Ditto.
11964 (can_compare_p): Ditto.
11965 (have_add2_insn): Ditto.
11966 (have_addptr3_insn): Ditto.
11967 (have_sub2_insn): Ditto.
11968 (have_insn_for): Ditto.
11969 * optabs.cc (add_equal_note): Ditto.
11970 (widen_operand): Change no_extend argument from int to bool.
11971 (expand_binop): Ditto.
11972 (expand_twoval_unop): Change return type
11973 from int to void and adjust function body accordingly.
11974 (expand_twoval_binop): Ditto.
11975 (can_compare_p): Ditto.
11976 (have_add2_insn): Ditto.
11977 (have_addptr3_insn): Ditto.
11978 (have_sub2_insn): Ditto.
11979 (have_insn_for): Ditto.
11981 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
11983 * config/aarch64/aarch64-simd.md
11984 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
11985 Expansions for abd vec widen optabs.
11986 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
11987 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
11988 that give the appropriate extend RTL for the max RTL.
11990 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
11992 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
11993 * optabs.def (vec_widen_sabd_optab,
11994 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
11995 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
11996 vec_widen_uabd_optab,
11997 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
11998 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
12000 * doc/md.texi: Document them.
12001 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
12002 to build a VEC_WIDEN_ABD call if the input precision is smaller
12003 than the precision of the output.
12004 (vect_recog_widen_abd_pattern): Should an ABD expression be
12005 found preceeding an extension, replace the two with a
12008 2023-06-30 Pan Li <pan2.li@intel.com>
12010 * config/riscv/vector.md: Refactor the common condition.
12012 2023-06-30 Richard Biener <rguenther@suse.de>
12014 PR tree-optimization/110496
12015 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
12016 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
12018 2023-06-30 Richard Biener <rguenther@suse.de>
12020 PR middle-end/110489
12021 * statistics.cc (curr_statistics_hash): Add argument
12022 indicating whether we should allocate the hash.
12023 (statistics_fini_pass): If the hash isn't allocated
12024 only print the summary header.
12026 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
12027 Thomas Schwinge <thomas@codesourcery.com>
12029 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
12031 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
12034 * config/mips/mips.cc (mips_function_arg_alignment): Returns
12035 the alignment of function argument. In case of typedef type,
12036 it returns the aligment of the aliased type.
12037 (mips_function_arg_boundary): Relocated calculation of the
12038 aligment of function arguments.
12040 2023-06-29 Jan Hubicka <jh@suse.cz>
12042 PR tree-optimization/109849
12043 * ipa-fnsummary.cc (decompose_param_expr): Skip
12044 functions returning its parameter.
12045 (set_cond_stmt_execution_predicate): Return early
12046 if predicate was constructed.
12048 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
12051 * doc/extend.texi: Document GCC extension on a structure containing
12052 a flexible array member to be a member of another structure.
12054 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
12056 * print-tree.cc (print_node): Print new bit type_include_flexarray.
12057 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
12058 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
12059 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
12060 in bit no_named_args_stdarg_p properly for its corresponding type.
12061 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
12062 out bit no_named_args_stdarg_p properly for its corresponding type.
12063 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
12065 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
12067 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
12068 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
12069 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
12071 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
12073 * value-range.cc (frange::set): Do not call verify_range.
12074 (frange::normalize_kind): Verify range.
12075 (frange::union_nans): Do not call verify_range.
12076 (frange::union_): Same.
12077 (frange::intersect): Same.
12078 (irange::irange_single_pair_union): Call normalize_kind if
12080 (irange::union_): Same.
12081 (irange::intersect): Same.
12082 (irange::set_range_from_nonzero_bits): Verify range.
12083 (irange::set_nonzero_bits): Call normalize_kind if necessary.
12084 (irange::get_nonzero_bits): Tweak comment.
12085 (irange::intersect_nonzero_bits): Call normalize_kind if
12087 (irange::union_nonzero_bits): Same.
12088 * value-range.h (irange::normalize_kind): Verify range.
12090 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
12092 * cselib.h (rtx_equal_for_cselib_1):
12093 Change return type from int to bool.
12094 (references_value_p): Ditto.
12095 (rtx_equal_for_cselib_p): Ditto.
12096 * expr.h (can_store_by_pieces): Ditto.
12097 (try_casesi): Ditto.
12098 (try_tablejump): Ditto.
12099 (safe_from_p): Ditto.
12100 * sbitmap.h (bitmap_equal_p): Ditto.
12101 * cselib.cc (references_value_p): Change return type
12102 from int to void and adjust function body accordingly.
12103 (rtx_equal_for_cselib_1): Ditto.
12104 * expr.cc (is_aligning_offset): Ditto.
12105 (can_store_by_pieces): Ditto.
12106 (mostly_zeros_p): Ditto.
12107 (all_zeros_p): Ditto.
12108 (safe_from_p): Ditto.
12109 (is_aligning_offset): Ditto.
12110 (try_casesi): Ditto.
12111 (try_tablejump): Ditto.
12112 (store_constructor): Change "need_to_clear" and
12113 "const_bounds_p" variables to bool.
12114 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
12116 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
12118 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
12121 2023-06-29 Richard Biener <rguenther@suse.de>
12123 PR tree-optimization/110460
12124 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
12125 Only allow integral, pointer and scalar float type scalar_type.
12127 2023-06-29 Lili Cui <lili.cui@intel.com>
12129 PR tree-optimization/110148
12130 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
12131 ops in this function.
12133 2023-06-29 Richard Biener <rguenther@suse.de>
12135 PR middle-end/110452
12136 * expr.cc (store_constructor): Handle uniform boolean
12137 vectors with integer mode specially.
12139 2023-06-29 Richard Biener <rguenther@suse.de>
12141 PR middle-end/110461
12142 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
12145 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
12147 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
12148 (array_slice): Relax va_gc constructor to handle all vectors
12149 with a vl_embed layout.
12151 2023-06-29 Pan Li <pan2.li@intel.com>
12153 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
12154 (riscv_mode_needed): Likewise.
12155 (riscv_entity_mode_after): Likewise.
12156 (riscv_mode_after): Likewise.
12157 (riscv_mode_entry): Likewise.
12158 (riscv_mode_exit): Likewise.
12159 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
12161 * config/riscv/riscv.md: Add FRM register.
12162 * config/riscv/vector-iterators.md: Add FRM type.
12163 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
12164 (fsrm): Define new insn for fsrm instruction.
12166 2023-06-29 Pan Li <pan2.li@intel.com>
12168 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
12169 Add macro for static frm min and max.
12170 * config/riscv/riscv-vector-builtins-bases.cc
12171 (class binop_frm): New class for floating-point with frm.
12172 (BASE): Add vfadd for frm.
12173 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
12174 * config/riscv/riscv-vector-builtins-functions.def
12175 (vfadd_frm): Likewise.
12176 * config/riscv/riscv-vector-builtins-shapes.cc
12177 (struct alu_frm_def): New struct for alu with frm.
12178 (SHAPE): Add alu with frm.
12179 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
12180 * config/riscv/riscv-vector-builtins.cc
12181 (function_checker::report_out_of_range_and_not): New function
12182 for report out of range and not val.
12183 (function_checker::require_immediate_range_or): New function
12184 for checking in range or one val.
12185 * config/riscv/riscv-vector-builtins.h: Add function decl.
12187 2023-06-29 Cui, Lili <lili.cui@intel.com>
12189 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
12190 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
12192 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
12195 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
12196 to insn before validating it.
12198 2023-06-28 Jan Hubicka <jh@suse.cz>
12200 PR middle-end/110334
12201 * ipa-fnsummary.h (ipa_fn_summary): Add
12202 safe_to_inline_to_always_inline.
12203 * ipa-inline.cc (can_early_inline_edge_p): ICE
12204 if SSA is not built; do cycle checking for
12205 always_inline functions.
12206 (inline_always_inline_functions): Be recrusive;
12207 watch for cycles; do not updat overall summary.
12208 (early_inliner): Do not give up on always_inlines.
12209 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
12212 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
12214 * output.h (leaf_function_p): Change return type from int to bool.
12215 (final_forward_branch_p): Ditto.
12216 (only_leaf_regs_used): Ditto.
12217 (maybe_assemble_visibility): Ditto.
12218 * varasm.h (supports_one_only): Ditto.
12219 * rtl.h (compute_alignments): Change return type from int to void.
12220 * final.cc (app_on): Change return type from int to bool.
12221 (compute_alignments): Change return type from int to void
12222 and adjust function body accordingly.
12223 (shorten_branches): Change "something_changed" variable
12224 type from int to bool.
12225 (leaf_function_p): Change return type from int to bool
12226 and adjust function body accordingly.
12227 (final_forward_branch_p): Ditto.
12228 (only_leaf_regs_used): Ditto.
12229 * varasm.cc (contains_pointers_p): Change return type from
12230 int to bool and adjust function body accordingly.
12231 (compare_constant): Ditto.
12232 (maybe_assemble_visibility): Ditto.
12233 (supports_one_only): Ditto.
12235 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
12238 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
12239 (maybe_copy_reg_attrs): New function.
12240 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
12241 (copyprop_hardreg_forward_1): Ditto.
12243 2023-06-28 Richard Biener <rguenther@suse.de>
12245 PR tree-optimization/110434
12246 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
12247 VAR we replace with <retval>.
12249 2023-06-28 Richard Biener <rguenther@suse.de>
12251 PR tree-optimization/110451
12252 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
12253 tcc_comparison are expensive.
12255 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
12257 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
12258 for TImode comparisons on 32-bit architectures.
12259 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
12260 SWIM1248x to exclude/avoid TImode being conditional on -m64.
12261 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
12262 and/or with TARGET_SSE4_1.
12263 * config/i386/predicates.md (ix86_timode_comparison_operator):
12264 New predicate that depends upon TARGET_64BIT.
12265 (ix86_timode_comparison_operand): Likewise.
12267 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
12270 * config/i386/i386-features.cc (compute_convert_gain): Provide
12271 more accurate gains for conversion of scalar comparisons to
12274 2023-06-28 Richard Biener <rguenther@suse.de>
12276 PR tree-optimization/110443
12277 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
12280 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
12282 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
12283 (peephole2 for move_and_compare): New.
12284 (mode_iterator WORD): New. Set the mode to SI/DImode by
12286 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
12287 (split pattern for compare_and_move): Likewise.
12289 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12291 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
12292 (*single_widen_fma<mode>): Ditto.
12294 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
12297 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
12299 (altivec_vupkhs<VU_char>_direct): ...this.
12300 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
12301 predicate to test if a constant can be loaded with vspltisw and
12303 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
12304 a vector constant can be synthesized with a vspltisw and a vupkhsw.
12305 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
12307 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
12308 function to return true if OP mode is V2DI and can be synthesized
12309 with vupkhsw and vspltisw.
12310 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
12311 constants with vspltisw and vupkhsw.
12313 2023-06-28 Jan Hubicka <jh@suse.cz>
12315 PR tree-optimization/110377
12316 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
12318 (ipa_analyze_node): Enable ranger.
12320 2023-06-28 Richard Biener <rguenther@suse.de>
12322 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
12323 (TYPE_PRECISION_RAW): Provide raw access to the precision
12325 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
12326 (gimple_canonical_types_compatible_p): Likewise.
12327 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
12328 Stream TYPE_PRECISION_RAW.
12329 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
12331 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
12333 2023-06-28 Alexandre Oliva <oliva@adacore.com>
12335 * doc/extend.texi (zero-call-used-regs): Document leafy and
12337 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
12338 LEAFY and variants.
12339 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
12340 functions in leafy mode.
12341 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
12343 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12345 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
12346 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
12348 (@pred_single_widen_add<mode>): New pattern.
12349 (@pred_single_widen_sub<mode>): New pattern.
12351 2023-06-28 liuhongt <hongtao.liu@intel.com>
12353 * config/i386/i386.cc (ix86_invalid_conversion): New function.
12354 (TARGET_INVALID_CONVERSION): Define as
12355 ix86_invalid_conversion.
12357 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12359 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
12361 (<float_cvt><vnconvert><mode>2): Ditto.
12362 (<optab><mode><vnconvert>2): Ditto.
12363 (<float_cvt><mode><vnconvert>2): Ditto.
12364 * config/riscv/vector-iterators.md: Add vnconvert.
12366 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12368 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
12370 (extend<v_quad_trunc><mode>2): Ditto.
12371 (trunc<mode><v_double_trunc>2): Ditto.
12372 (trunc<mode><v_quad_trunc>2): Ditto.
12373 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
12374 V_QUAD_TRUNC and v_quad_trunc.
12376 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12378 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
12381 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12383 * config/riscv/autovec.md (copysign<mode>3): Add expander.
12384 (xorsign<mode>3): Ditto.
12385 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
12387 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
12391 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
12392 (@pred_ncopysign<mode>_scalar): Ditto.
12394 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12396 * config/riscv/autovec.md: VF_AUTO -> VF.
12397 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
12398 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
12400 * config/riscv/vector.md: Use new iterators.
12402 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12404 * match.pd: Use element_mode and check if target supports
12405 operation with new type.
12407 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
12409 * config/aarch64/aarch64-sve-builtins-base.cc
12410 (svdupq_impl::fold_nonconst_dupq): New method.
12411 (svdupq_impl::fold): Call fold_nonconst_dupq.
12413 2023-06-27 Andrew Pinski <apinski@marvell.com>
12415 PR middle-end/110420
12416 PR middle-end/103979
12417 PR middle-end/98619
12418 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
12420 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
12422 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
12423 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
12425 (set_switch_stmt_execution_predicate): Same.
12426 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
12428 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
12430 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
12431 ipa_vr instead of value_range.
12434 (ipa_get_value_range): Same.
12435 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
12439 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
12441 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
12442 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
12443 (ipa_set_jfunc_vr): Take a range.
12444 (ipa_compute_jump_functions_for_edge): Pass range to
12446 (ipa_write_jump_function): Call streamer write helper.
12447 (ipa_read_jump_function): Call streamer read helper.
12448 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
12450 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
12452 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
12453 as a probable initializer rather than a probable complete statement.
12455 2023-06-27 Richard Biener <rguenther@suse.de>
12457 PR tree-optimization/96208
12458 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
12459 a non-grouped load if it is the same for all lanes.
12460 (vect_build_slp_tree_2): Handle not grouped loads.
12461 (vect_optimize_slp_pass::remove_redundant_permutations):
12463 (vect_transform_slp_perm_load_1): Likewise.
12464 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
12465 (get_group_load_store_type): Likewise. Handle
12466 invariant accesses.
12467 (vectorizable_load): Likewise.
12469 2023-06-27 liuhongt <hongtao.liu@intel.com>
12471 PR rtl-optimization/110237
12472 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
12474 (maskstore<mode><avx512fmaskmodelower): Ditto.
12475 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
12476 from original <avx512>_store<mode>_mask.
12478 2023-06-27 liuhongt <hongtao.liu@intel.com>
12480 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
12481 Move flag_expensive_optimizations && !optimize_size to ..
12482 * config/i386/i386-options.cc (ix86_option_override_internal):
12483 .. this, it makes -mvzeroupper independent of optimization
12484 level, but still keeps the behavior of architecture
12485 tuning(emit_vzeroupper) unchanged.
12487 2023-06-27 liuhongt <hongtao.liu@intel.com>
12490 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
12491 vzeroupper for vzeroupper call_insn.
12493 2023-06-27 Andrew Pinski <apinski@marvell.com>
12495 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
12498 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12500 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
12503 2023-06-26 Andrew Pinski <apinski@marvell.com>
12505 * doc/extend.texi (access attribute): Add
12507 (interrupt/interrupt_handler attribute):
12510 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12512 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
12513 Use <DWI> instead of <V2XWIDE>.
12514 (aarch64_sqrshrun_n<mode>): Likewise.
12516 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12518 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
12520 (aarch64_rnd_imm_p): ... This.
12521 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
12523 (aarch64_int_rnd_operand): ... This.
12524 (aarch64_simd_rshrn_imm_vec): Delete.
12525 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
12526 Adjust for the above.
12527 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
12528 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
12529 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
12530 (aarch64_sqrshrun_n<mode>_insn): Likewise.
12531 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
12532 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
12533 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
12534 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
12535 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
12537 (aarch64_rnd_imm_p): ... This.
12539 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
12541 * config/s390/s390.cc (s390_encode_section_info): Set
12542 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
12545 2023-06-26 Jan Hubicka <jh@suse.cz>
12547 PR tree-optimization/109849
12548 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
12549 count of newly constructed forwarder block.
12551 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
12553 * doc/optinfo.texi: Fix "steam" -> "stream".
12555 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12557 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
12559 (dse_optimize_stmt): Add LEN_MASK_STORE.
12561 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12563 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
12564 fold of LOAD/STORE with length.
12566 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
12568 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
12569 Check for interdependence between operands 1 and 2.
12571 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
12573 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
12574 into account when costing non-widening/truncating conversions.
12576 2023-06-26 Richard Biener <rguenther@suse.de>
12578 PR tree-optimization/110381
12579 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
12580 Materialize permutes before fold-left reductions.
12582 2023-06-26 Pan Li <pan2.li@intel.com>
12584 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
12586 2023-06-26 Richard Biener <rguenther@suse.de>
12588 * varasm.cc (initializer_constant_valid_p_1): Also
12589 constrain the type of value to be scalar integral
12590 before dispatching to narrowing_initializer_constant_valid_p.
12592 2023-06-26 Richard Biener <rguenther@suse.de>
12594 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
12595 Use element_precision.
12597 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12599 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
12601 (vcondu<V:mode><VI:mode>): Ditto.
12602 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
12603 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
12605 2023-06-26 Richard Biener <rguenther@suse.de>
12607 PR tree-optimization/110392
12608 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
12609 Do early exits on true/false predicate only after normalization.
12611 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12613 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
12616 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
12618 * config/i386/i386.md (peephole2): Simplify zeroing a register
12619 followed by an IOR, XOR or PLUS operation on it, into a move.
12620 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
12621 eliminate (and hide from reload) unnecessary word to doubleword
12622 extensions that are followed by left shifts by sufficiently large,
12623 but valid, bit counts.
12625 2023-06-26 liuhongt <hongtao.liu@intel.com>
12627 PR tree-optimization/110371
12628 PR tree-optimization/110018
12629 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
12630 save intermediate type operand instead of "subtle" vec_dest
12633 2023-06-26 liuhongt <hongtao.liu@intel.com>
12635 PR tree-optimization/110371
12636 PR tree-optimization/110018
12637 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
12638 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
12640 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
12642 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
12643 Override tune_string with arch_string if tune_string is not
12644 explicitly specified.
12646 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12648 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
12650 * config/riscv/riscv-vsetvl.h: New function.
12652 2023-06-25 Li Xu <xuli1@eswincomputing.com>
12654 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
12657 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12659 * config/riscv/autovec.md (len_load_<mode>): Remove.
12660 (len_maskload<mode><vm>): Remove.
12661 (len_store_<mode>): New pattern.
12662 (len_maskstore<mode><vm>): New pattern.
12663 * config/riscv/predicates.md (autovec_length_operand): New predicate.
12664 * config/riscv/riscv-protos.h (enum insn_type): New enum.
12665 (expand_load_store): New function.
12666 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
12667 (emit_nonvlmax_masked_insn): Ditto.
12668 (expand_load_store): Ditto.
12669 * config/riscv/riscv-vector-builtins.cc
12670 (function_expander::use_contiguous_store_insn): Add avl_type operand
12672 * config/riscv/vector.md: Ditto.
12674 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12676 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
12679 2023-06-25 Pan Li <pan2.li@intel.com>
12681 * config/riscv/vector.md: Revert.
12683 2023-06-25 Pan Li <pan2.li@intel.com>
12685 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
12686 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
12687 (ADJUST_ALIGNMENT): Ditto.
12688 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12689 (ADJUST_NUNITS): Ditto.
12690 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
12691 (vfloat16mf4x3_t): Ditto.
12692 (vfloat16mf4x4_t): Ditto.
12693 (vfloat16mf4x5_t): Ditto.
12694 (vfloat16mf4x6_t): Ditto.
12695 (vfloat16mf4x7_t): Ditto.
12696 (vfloat16mf4x8_t): Ditto.
12697 (vfloat16mf2x2_t): Ditto.
12698 (vfloat16mf2x3_t): Ditto.
12699 (vfloat16mf2x4_t): Ditto.
12700 (vfloat16mf2x5_t): Ditto.
12701 (vfloat16mf2x6_t): Ditto.
12702 (vfloat16mf2x7_t): Ditto.
12703 (vfloat16mf2x8_t): Ditto.
12704 (vfloat16m1x2_t): Ditto.
12705 (vfloat16m1x3_t): Ditto.
12706 (vfloat16m1x4_t): Ditto.
12707 (vfloat16m1x5_t): Ditto.
12708 (vfloat16m1x6_t): Ditto.
12709 (vfloat16m1x7_t): Ditto.
12710 (vfloat16m1x8_t): Ditto.
12711 (vfloat16m2x2_t): Ditto.
12712 (vfloat16m2x3_t): Diito.
12713 (vfloat16m2x4_t): Diito.
12714 (vfloat16m4x2_t): Diito.
12715 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
12716 (vfloat16mf4x3_t): Ditto.
12717 (vfloat16mf4x4_t): Ditto.
12718 (vfloat16mf4x5_t): Ditto.
12719 (vfloat16mf4x6_t): Ditto.
12720 (vfloat16mf4x7_t): Ditto.
12721 (vfloat16mf4x8_t): Ditto.
12722 (vfloat16mf2x2_t): Ditto.
12723 (vfloat16mf2x3_t): Ditto.
12724 (vfloat16mf2x4_t): Ditto.
12725 (vfloat16mf2x5_t): Ditto.
12726 (vfloat16mf2x6_t): Ditto.
12727 (vfloat16mf2x7_t): Ditto.
12728 (vfloat16mf2x8_t): Ditto.
12729 (vfloat16m1x2_t): Ditto.
12730 (vfloat16m1x3_t): Ditto.
12731 (vfloat16m1x4_t): Ditto.
12732 (vfloat16m1x5_t): Ditto.
12733 (vfloat16m1x6_t): Ditto.
12734 (vfloat16m1x7_t): Ditto.
12735 (vfloat16m1x8_t): Ditto.
12736 (vfloat16m2x2_t): Ditto.
12737 (vfloat16m2x3_t): Ditto.
12738 (vfloat16m2x4_t): Ditto.
12739 (vfloat16m4x2_t): Ditto.
12740 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
12741 * config/riscv/riscv.md: Ditto.
12742 * config/riscv/vector-iterators.md: Ditto.
12744 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12746 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
12747 (gimple_fold_partial_load_store_mem_ref): Ditto.
12748 (gimple_fold_partial_store): Ditto.
12749 (gimple_fold_call): Ditto.
12751 2023-06-25 liuhongt <hongtao.liu@intel.com>
12754 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
12755 Refine pattern with UNSPEC_MASKLOAD.
12756 (maskload<mode><avx512fmaskmodelower>): Ditto.
12757 (*<avx512>_load<mode>_mask): Extend mode iterator to
12759 (*<avx512>_load<mode>): Ditto.
12761 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12763 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
12765 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12767 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
12768 LEN_MASK_{LOAD,STORE}
12770 2023-06-25 yulong <shiyulong@iscas.ac.cn>
12772 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
12774 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
12776 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
12778 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12780 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
12781 (*fma<VI:mode><P:mode>): Ditto.
12782 (*fnma<mode>): Ditto.
12783 (*fnma<VI:mode><P:mode>): Ditto.
12785 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12787 * config/riscv/autovec.md (fma<mode>4): New pattern.
12788 (*fma<mode>): Ditto.
12789 (fnma<mode>4): Ditto.
12790 (*fnma<mode>): Ditto.
12791 (fms<mode>4): Ditto.
12792 (*fms<mode>): Ditto.
12793 (fnms<mode>4): Ditto.
12794 (*fnms<mode>): Ditto.
12795 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
12797 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
12798 * config/riscv/vector.md: Fix attribute bug.
12800 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12802 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
12803 Apply LEN_MASK_{LOAD,STORE}.
12805 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12807 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
12808 Add LEN_MASK_{LOAD,STORE}.
12810 2023-06-24 David Malcolm <dmalcolm@redhat.com>
12812 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
12813 * diagnostic.cc: Likewise.
12814 * text-art/box-drawing.cc: Likewise.
12815 * text-art/canvas.cc: Likewise.
12816 * text-art/ruler.cc: Likewise.
12817 * text-art/selftests.cc: Likewise.
12818 * text-art/selftests.h (text_art::canvas): New forward decl.
12819 * text-art/style.cc: Add #define INCLUDE_VECTOR.
12820 * text-art/styled-string.cc: Likewise.
12821 * text-art/table.cc: Likewise.
12822 * text-art/table.h: Remove #include <vector>.
12823 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
12824 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
12825 Remove #include of <vector> and <string>.
12826 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
12827 * text-art/widget.h: Remove #include <vector>.
12829 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12831 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
12832 (internal_load_fn_p): Add LEN_MASK_LOAD.
12833 (internal_store_fn_p): Add LEN_MASK_STORE.
12834 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
12835 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
12836 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
12837 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
12838 (get_len_load_store_mode): Ditto.
12839 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
12840 (get_len_load_store_mode): Ditto.
12841 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
12842 (get_all_ones_mask): New function.
12843 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
12844 (vectorizable_load): Ditto.
12846 2023-06-23 Marek Polacek <polacek@redhat.com>
12848 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
12849 -std=gnu++26. Document that for C++23, its value is 202302L.
12850 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
12851 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
12852 (gen_compile_unit_die): Likewise.
12854 2023-06-23 Jan Hubicka <jh@suse.cz>
12856 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
12858 (pass_phiprop::execute): Do not compute it here; return
12859 update_ssa_only_virtuals if something changed.
12860 (pass_data_phiprop): Remove TODO_update_ssa from todos.
12862 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
12863 Aaron Sawdey <acsawdey@linux.ibm.com>
12866 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
12867 allowed prefixed lwa to be generated.
12868 * config/rs6000/fusion.md: Regenerate.
12869 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
12870 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
12871 plus compare immediate fused insns.
12872 (maybe_prefixed): Likewise.
12874 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
12876 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
12877 of ASHIFT to const0_rtx with sufficiently large shift count.
12878 Optimize highpart SUBREGs of ASHIFT as the shift operand when
12879 the shift count is the correct offset. Optimize SUBREGs of
12880 multi-word logic operations if the SUBREGs of both operands
12883 2023-06-23 Richard Biener <rguenther@suse.de>
12885 * varasm.cc (initializer_constant_valid_p_1): Only
12886 allow conversions between scalar floating point types.
12888 2023-06-23 Richard Biener <rguenther@suse.de>
12890 * tree-vect-stmts.cc (vectorizable_assignment):
12891 Properly handle non-integral operands when analyzing
12894 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
12896 PR tree-optimization/110280
12897 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
12898 using build_vector_from_val with the element of input operand, and
12899 mask's type if operand and mask's types don't match.
12901 2023-06-23 Richard Biener <rguenther@suse.de>
12903 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
12904 the truth_value_p case with !VECTOR_TYPE_P.
12906 2023-06-23 Richard Biener <rguenther@suse.de>
12908 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
12909 Exit early when the type isn't scalar integral.
12911 2023-06-23 Richard Biener <rguenther@suse.de>
12913 * match.pd ((outertype)((innertype0)a+(innertype1)b)
12914 -> ((newtype)a+(newtype)b)): Use element_precision
12917 2023-06-23 Richard Biener <rguenther@suse.de>
12919 * fold-const.cc (fold_binary_loc): Use element_precision
12920 when trying (double)float1 CMP (double)float2 to
12921 float1 CMP float2 simplification.
12922 * match.pd: Likewise.
12924 2023-06-23 Richard Biener <rguenther@suse.de>
12926 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
12927 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
12929 2023-06-23 Richard Biener <rguenther@suse.de>
12931 * tree-vect-stmts.cc (vector_vector_composition_type):
12932 Handle composition of a vector from a number of elements that
12933 happens to match its number of lanes.
12935 2023-06-22 Marek Polacek <polacek@redhat.com>
12937 * configure.ac (--enable-host-bind-now): New check. Add
12938 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
12939 * configure: Regenerate.
12940 * doc/install.texi: Document --enable-host-bind-now.
12942 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
12944 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
12946 2023-06-22 Richard Biener <rguenther@suse.de>
12948 PR tree-optimization/110332
12949 * tree-ssa-phiprop.cc (propagate_with_phi): Always
12950 check aliasing with edge inserted loads.
12952 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
12953 Uros Bizjak <ubizjak@gmail.com>
12955 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
12956 expansion of ptestc with equal operands as producing const1_rtx.
12957 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
12958 estimates of UNSPEC_PTEST, where the ptest performs the PAND
12959 or PAND of its operands.
12960 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
12961 of reg_equal_p operands into an x86_stc instruction.
12962 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
12963 (define_split): Similar to above for strict_low_part destinations.
12964 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
12966 2023-06-22 David Malcolm <dmalcolm@redhat.com>
12969 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
12970 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
12972 (fanalyzer-debug-text-art): New.
12974 2023-06-22 David Malcolm <dmalcolm@redhat.com>
12976 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
12977 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
12978 text-art/style.o, text-art/styled-string.o, text-art/table.o,
12979 text-art/theme.o, and text-art/widget.o.
12980 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
12981 (COLOR_FG_BRIGHT_RED): New.
12982 (COLOR_FG_BRIGHT_GREEN): New.
12983 (COLOR_FG_BRIGHT_YELLOW): New.
12984 (COLOR_FG_BRIGHT_BLUE): New.
12985 (COLOR_FG_BRIGHT_MAGENTA): New.
12986 (COLOR_FG_BRIGHT_CYAN): New.
12987 (COLOR_FG_BRIGHT_WHITE): New.
12988 (COLOR_BG_BRIGHT_BLACK): New.
12989 (COLOR_BG_BRIGHT_RED): New.
12990 (COLOR_BG_BRIGHT_GREEN): New.
12991 (COLOR_BG_BRIGHT_YELLOW): New.
12992 (COLOR_BG_BRIGHT_BLUE): New.
12993 (COLOR_BG_BRIGHT_MAGENTA): New.
12994 (COLOR_BG_BRIGHT_CYAN): New.
12995 (COLOR_BG_BRIGHT_WHITE): New.
12996 * common.opt (fdiagnostics-text-art-charset=): New option.
12997 (diagnostic-text-art.h): New SourceInclude.
12998 (diagnostic_text_art_charset) New Enum and EnumValues.
12999 * configure: Regenerate.
13000 * configure.ac (gccdepdir): Add text-art to loop.
13001 * diagnostic-diagram.h: New file.
13002 * diagnostic-format-json.cc (json_emit_diagram): New.
13003 (diagnostic_output_format_init_json): Wire it up to
13004 context->m_diagrams.m_emission_cb.
13005 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
13006 "text-art/canvas.h".
13007 (sarif_result::on_nested_diagnostic): Move code to...
13008 (sarif_result::add_related_location): ...this new function.
13009 (sarif_result::on_diagram): New.
13010 (sarif_builder::emit_diagram): New.
13011 (sarif_builder::make_message_object_for_diagram): New.
13012 (sarif_emit_diagram): New.
13013 (diagnostic_output_format_init_sarif): Set
13014 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
13015 * diagnostic-text-art.h: New file.
13016 * diagnostic.cc: Include "diagnostic-text-art.h",
13017 "diagnostic-diagram.h", and "text-art/theme.h".
13018 (diagnostic_initialize): Initialize context->m_diagrams and
13019 call diagnostics_text_art_charset_init.
13020 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
13021 (diagnostic_emit_diagram): New.
13022 (diagnostics_text_art_charset_init): New.
13023 * diagnostic.h (text_art::theme): New forward decl.
13024 (class diagnostic_diagram): Likewise.
13025 (diagnostic_context::m_diagrams): New field.
13026 (diagnostic_emit_diagram): New decl.
13027 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
13028 -fdiagnostics-text-art-charset=.
13029 (-fdiagnostics-plain-output): Add
13030 -fdiagnostics-text-art-charset=none.
13031 * gcc.cc: Include "diagnostic-text-art.h".
13032 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
13033 * opts-common.cc (decode_cmdline_options_to_array): Add
13034 "-fdiagnostics-text-art-charset=none" to expanded_args for
13035 -fdiagnostics-plain-output.
13036 * opts.cc: Include "diagnostic-text-art.h".
13037 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
13038 * pretty-print.cc (pp_unicode_character): New.
13039 * pretty-print.h (pp_unicode_character): New decl.
13040 * selftest-run-tests.cc: Include "text-art/selftests.h".
13041 (selftest::run_tests): Call text_art_tests.
13042 * text-art/box-drawing-chars.inc: New file, generated by
13043 contrib/unicode/gen-box-drawing-chars.py.
13044 * text-art/box-drawing.cc: New file.
13045 * text-art/box-drawing.h: New file.
13046 * text-art/canvas.cc: New file.
13047 * text-art/canvas.h: New file.
13048 * text-art/ruler.cc: New file.
13049 * text-art/ruler.h: New file.
13050 * text-art/selftests.cc: New file.
13051 * text-art/selftests.h: New file.
13052 * text-art/style.cc: New file.
13053 * text-art/styled-string.cc: New file.
13054 * text-art/table.cc: New file.
13055 * text-art/table.h: New file.
13056 * text-art/theme.cc: New file.
13057 * text-art/theme.h: New file.
13058 * text-art/types.h: New file.
13059 * text-art/widget.cc: New file.
13060 * text-art/widget.h: New file.
13062 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
13064 * function.h (emit_initial_value_sets):
13065 Change return type from int to void.
13066 (aggregate_value_p): Change return type from int to bool.
13067 (prologue_contains): Ditto.
13068 (epilogue_contains): Ditto.
13069 (prologue_epilogue_contains): Ditto.
13070 * function.cc (temp_slot): Make "in_use" variable bool.
13071 (make_slot_available): Update for changed "in_use" variable.
13072 (assign_stack_temp_for_type): Ditto.
13073 (emit_initial_value_sets): Change return type from int to void
13074 and update function body accordingly.
13075 (instantiate_virtual_regs): Ditto.
13076 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
13077 (safe_insn_predicate): Change return type from int to bool.
13078 (aggregate_value_p): Change return type from int to bool
13079 and update function body accordingly.
13080 (prologue_contains): Change return type from int to bool.
13081 (prologue_epilogue_contains): Ditto.
13083 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
13085 * common.opt (fp_contract_mode) [on]: Remove fallback.
13086 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
13087 * doc/invoke.texi (-ffp-contract): Update.
13088 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
13090 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13092 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13093 Add alternatives to prefer to avoid same input and output Z register.
13094 (mask_gather_load<mode><v_int_container>): Likewise.
13095 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13096 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13097 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13098 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13100 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13102 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13103 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13104 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13105 <SVE_2BHSI:mode>_sxtw): Likewise.
13106 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13107 <SVE_2BHSI:mode>_uxtw): Likewise.
13108 (@aarch64_ldff1_gather<mode>): Likewise.
13109 (@aarch64_ldff1_gather<mode>): Likewise.
13110 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13111 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13112 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13113 <VNx4_NARROW:mode>): Likewise.
13114 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13115 <VNx2_NARROW:mode>): Likewise.
13116 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13117 <VNx2_NARROW:mode>_sxtw): Likewise.
13118 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13119 <VNx2_NARROW:mode>_uxtw): Likewise.
13120 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13121 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13122 <SVE_PARTIAL_I:mode>): Likewise.
13124 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13126 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13127 Convert to compact alternatives syntax.
13128 (mask_gather_load<mode><v_int_container>): Likewise.
13129 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13130 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13131 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13132 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13134 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13136 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13137 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13138 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13139 <SVE_2BHSI:mode>_sxtw): Likewise.
13140 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13141 <SVE_2BHSI:mode>_uxtw): Likewise.
13142 (@aarch64_ldff1_gather<mode>): Likewise.
13143 (@aarch64_ldff1_gather<mode>): Likewise.
13144 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13145 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13146 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13147 <VNx4_NARROW:mode>): Likewise.
13148 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13149 <VNx2_NARROW:mode>): Likewise.
13150 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13151 <VNx2_NARROW:mode>_sxtw): Likewise.
13152 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13153 <VNx2_NARROW:mode>_uxtw): Likewise.
13154 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13155 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13156 <SVE_PARTIAL_I:mode>): Likewise.
13158 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13161 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13163 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13164 Convert to compact alternatives syntax.
13165 (mask_gather_load<mode><v_int_container>): Likewise.
13166 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13167 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13168 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13169 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13171 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13173 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13174 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13175 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13176 <SVE_2BHSI:mode>_sxtw): Likewise.
13177 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13178 <SVE_2BHSI:mode>_uxtw): Likewise.
13179 (@aarch64_ldff1_gather<mode>): Likewise.
13180 (@aarch64_ldff1_gather<mode>): Likewise.
13181 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13182 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13183 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13184 <VNx4_NARROW:mode>): Likewise.
13185 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13186 <VNx2_NARROW:mode>): Likewise.
13187 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13188 <VNx2_NARROW:mode>_sxtw): Likewise.
13189 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13190 <VNx2_NARROW:mode>_uxtw): Likewise.
13191 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13192 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13193 <SVE_PARTIAL_I:mode>): Likewise.
13195 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13197 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
13198 (get_len_load_store_mode): Ditto.
13199 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
13200 (get_len_load_store_mode): Ditto.
13201 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
13202 (get_len_load_store_mode): Ditto.
13203 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
13204 (get_len_load_store_mode): Ditto.
13205 * tree-if-conv.cc: include optabs-tree instead of optabs-query
13207 2023-06-21 Richard Biener <rguenther@suse.de>
13209 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
13210 split_constant_offset for the POINTER_PLUS_EXPR case.
13212 2023-06-21 Richard Biener <rguenther@suse.de>
13214 * tree-ssa-loop-ivopts.cc (record_group_use): Use
13215 split_constant_offset.
13217 2023-06-21 Richard Biener <rguenther@suse.de>
13219 * tree-loop-distribution.cc (classify_builtin_st): Use
13220 split_constant_offset.
13221 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
13222 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
13224 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13226 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13227 Convert to compact alternatives syntax.
13228 (mask_gather_load<mode><v_int_container>): Likewise.
13229 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13230 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13231 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13232 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13234 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13236 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13237 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13238 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13239 <SVE_2BHSI:mode>_sxtw): Likewise.
13240 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13241 <SVE_2BHSI:mode>_uxtw): Likewise.
13242 (@aarch64_ldff1_gather<mode>): Likewise.
13243 (@aarch64_ldff1_gather<mode>): Likewise.
13244 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13245 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13246 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13247 <VNx4_NARROW:mode>): Likewise.
13248 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13249 <VNx2_NARROW:mode>): Likewise.
13250 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13251 <VNx2_NARROW:mode>_sxtw): Likewise.
13252 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13253 <VNx2_NARROW:mode>_uxtw): Likewise.
13254 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13255 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13256 <SVE_PARTIAL_I:mode>): Likewise.
13258 2023-06-21 Tamar Christina <tamar.christina@arm.com>
13261 * doc/md.texi: Replace backslashchar.
13263 2023-06-21 Richard Biener <rguenther@suse.de>
13265 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
13266 Overload. For masked main loops make sure the vectorization
13267 factor isn't more than double the number of iterations.
13269 2023-06-21 Jan Beulich <jbeulich@suse.com>
13271 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
13272 value duplication by ix86_build_signbit_mask() when AVX512F and
13274 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
13275 2-alternative form. Adjust "mode" attribute. Add "enabled"
13277 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
13278 && !TARGET_PREFER_AVX256.
13279 (*<avx512>_vpternlog<mode>_2): Likewise.
13280 (*<avx512>_vpternlog<mode>_3): Likewise.
13282 2023-06-21 liuhongt <hongtao.liu@intel.com>
13285 * tree-vect-stmts.cc (vectorizable_conversion): Use
13286 intermiediate integer type for float_expr/fix_trunc_expr when
13287 direct optab is not existed.
13289 2023-06-20 Tamar Christina <tamar.christina@arm.com>
13291 PR bootstrap/110324
13292 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
13294 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
13296 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
13297 register operand to the stack pointer. Require the second register
13298 operand to have the number specified in a separate const_int operand.
13299 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
13300 (aarch64_allocate_and_probe_stack_space): Use it.
13301 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
13302 (aarch64_expand_epilogue): Likewise.
13304 2023-06-20 Jakub Jelinek <jakub@redhat.com>
13306 PR middle-end/79173
13307 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
13308 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
13311 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
13313 * calls.h (setjmp_call_p): Change return type from int to bool.
13314 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
13315 (store_one_arg): Change return type from int to bool
13316 and adjust function body accordingly. Change "sibcall_failure"
13318 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
13319 argument to bool. Change "partial_seen" variable to bool.
13320 (load_register_parameters): Change *sibcall_failure
13321 pointer argument to bool.
13322 (check_sibcall_argument_overlap_1): Change return type from int to bool
13323 and adjust function body accordingly.
13324 (check_sibcall_argument_overlap): Ditto. Change
13325 "mark_stored_args_map" argument to bool.
13326 (emit_call_1): Change "already_popped" variable to bool.
13327 (setjmp_call_p): Change return type from int to bool
13328 and adjust function body accordingly.
13329 (initialize_argument_information): Change *must_preallocate
13330 pointer argument to bool.
13331 (expand_call): Change "pcc_struct_value", "must_preallocate"
13332 and "sibcall_failure" variables to bool.
13333 (emit_library_call_value_1): Change "pcc_struct_value"
13336 2023-06-20 Martin Jambor <mjambor@suse.cz>
13339 * ipa-sra.cc (struct caller_issues): New field there_is_one.
13340 (check_for_caller_issues): Set it.
13341 (check_all_callers_for_issues): Check it.
13343 2023-06-20 Martin Jambor <mjambor@suse.cz>
13345 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
13346 (struct ipcp_transformation): Rearrange members according to
13347 C++ class coding convention, add m_uid_to_idx,
13348 get_param_index and maybe_create_parm_idx_map.
13349 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
13350 (compare_uids): Likewise.
13351 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
13352 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
13353 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
13354 (ipcp_update_vr): Likewise.
13355 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
13356 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
13358 2023-06-20 Carl Love <cel@us.ibm.com>
13360 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
13361 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
13362 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
13363 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
13364 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
13365 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
13366 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
13367 * config/rs6000/rs6000-builtins.def
13368 (__builtin_vsx_scalar_extract_exp_to_vec,
13369 __builtin_vsx_scalar_extract_sig_to_vec,
13370 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
13371 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
13372 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
13373 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
13374 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
13375 overloaded instance. Update comments.
13376 * config/rs6000/rs6000-overload.def
13377 (__builtin_vec_scalar_insert_exp): Add new overload definition with
13379 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
13380 overloaded definitions.
13381 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
13382 (DI_to_TI): New mode attribute.
13383 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
13384 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
13385 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
13386 * doc/extend.texi (scalar_extract_exp_to_vec,
13387 scalar_extract_sig_to_vec): Add documentation for new builtins.
13388 (scalar_insert_exp): Add new overloaded builtin definition.
13390 2023-06-20 Li Xu <xuli1@eswincomputing.com>
13392 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
13393 size of vector mask mode to one rvv register.
13395 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13397 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
13399 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
13401 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
13404 2023-06-20 Richard Biener <rguenther@suse.de>
13406 * tree-ssa-dse.cc (dse_classify_store): When we found
13407 no defs and the basic-block with the original definition
13408 ends in __builtin_unreachable[_trap] the store is dead.
13410 2023-06-20 Richard Biener <rguenther@suse.de>
13412 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
13413 keep the virtual SSA form up-to-date.
13415 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13417 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
13418 New define_insn_and_split.
13420 2023-06-20 Tamar Christina <tamar.christina@arm.com>
13422 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
13424 2023-06-20 Jan Beulich <jbeulich@suse.com>
13426 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
13427 constraint. Add new AVX512F alternative.
13429 2023-06-20 Richard Biener <rguenther@suse.de>
13432 * dwarf2out.cc (process_scope_var): Continue processing
13433 the decl after setting a parent in case the existing DIE
13436 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
13438 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
13439 (riscv_arg_has_vector): Simplify.
13440 (riscv_pass_in_vector_p): Adjust warning message.
13442 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
13444 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
13445 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
13446 * config/riscv/riscv.md (riscv_frcsr): New patterns.
13447 (riscv_fscsr): Likewise.
13449 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
13451 PR rtl-optimization/110305
13452 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
13453 Handle HONOR_SNANS for x + 0.0.
13455 2023-06-19 Jan Hubicka <jh@suse.cz>
13457 PR tree-optimization/109811
13458 PR tree-optimization/109849
13459 * passes.def: Add phiprop to early optimization passes.
13460 * tree-ssa-phiprop.cc: Allow clonning.
13462 2023-06-19 Tamar Christina <tamar.christina@arm.com>
13464 * config/aarch64/aarch64.md (arches): Add nosimd.
13465 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
13468 2023-06-19 Tamar Christina <tamar.christina@arm.com>
13469 Omar Tahir <Omar.Tahir2@arm.com>
13471 * gensupport.cc (class conlist, add_constraints, add_attributes,
13472 skip_spaces, expect_char, preprocess_compact_syntax,
13473 parse_section_layout, parse_section, convert_syntax): New.
13474 (process_rtx): Check for conversion.
13475 * genoutput.cc (process_template): Check for unresolved iterators.
13476 (class data): Add compact_syntax_p.
13477 (gen_insn): Use it.
13478 * gensupport.h (compact_syntax): New.
13479 (hash-set.h): Include.
13480 * doc/md.texi: Document it.
13482 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
13484 * recog.h (check_asm_operands): Change return type from int to bool.
13485 (insn_invalid_p): Ditto.
13486 (verify_changes): Ditto.
13487 (apply_change_group): Ditto.
13488 (constrain_operands): Ditto.
13489 (constrain_operands_cached): Ditto.
13490 (validate_replace_rtx_subexp): Ditto.
13491 (validate_replace_rtx): Ditto.
13492 (validate_replace_rtx_part): Ditto.
13493 (validate_replace_rtx_part_nosimplify): Ditto.
13494 (added_clobbers_hard_reg_p): Ditto.
13495 (peep2_regno_dead_p): Ditto.
13496 (peep2_reg_dead_p): Ditto.
13497 (store_data_bypass_p): Ditto.
13498 (if_test_bypass_p): Ditto.
13499 * rtl.h (split_all_insns_noflow): Change
13500 return type from unsigned int to void.
13501 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
13502 of generated added_clobbers_hard_reg_p from int to bool and adjust
13503 function body accordingly. Change "used" variable type from
13505 * recog.cc (check_asm_operands): Change return type
13506 from int to bool and adjust function body accordingly.
13507 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
13508 (verify_changes): Change return type from int to bool.
13509 (apply_change_group): Change return type from int to bool
13510 and adjust function body accordingly.
13511 (validate_replace_rtx_subexp): Change return type from int to bool.
13512 (validate_replace_rtx): Ditto.
13513 (validate_replace_rtx_part): Ditto.
13514 (validate_replace_rtx_part_nosimplify): Ditto.
13515 (constrain_operands_cached): Ditto.
13516 (constrain_operands): Ditto. Change "lose" and "win"
13517 variables type from int to bool.
13518 (split_all_insns_noflow): Change return type from unsigned int
13519 to void and adjust function body accordingly.
13520 (peep2_regno_dead_p): Change return type from int to bool.
13521 (peep2_reg_dead_p): Ditto.
13522 (peep2_find_free_register): Change "success"
13523 variable type from int to bool
13524 (store_data_bypass_p_1): Change return type from int to bool.
13525 (store_data_bypass_p): Ditto.
13527 2023-06-19 Li Xu <xuli1@eswincomputing.com>
13529 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
13532 2023-06-19 Pan Li <pan2.li@intel.com>
13535 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
13537 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
13538 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
13539 VF_ZVE63 and VF_ZVE32.
13540 * config/riscv/vector.md
13541 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
13542 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
13543 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
13544 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
13545 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
13546 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
13547 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
13548 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
13549 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
13550 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
13552 2023-06-19 Pan Li <pan2.li@intel.com>
13555 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
13557 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
13558 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
13559 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
13560 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
13561 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
13562 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
13563 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
13564 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
13565 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
13566 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
13567 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
13568 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
13569 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
13570 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
13572 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
13574 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
13575 (gcn_init_libfuncs): Add div and mod functions for all modes.
13576 Add placeholders for divmod functions.
13577 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
13579 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
13581 * tree-vect-generic.cc: Include optabs-libfuncs.h.
13582 (get_compute_type): Check optab_libfunc.
13583 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
13584 (vectorizable_operation): Check optab_libfunc.
13586 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
13588 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
13589 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
13590 (V_MOV, V_MOV_ALT): Likewise.
13591 (scalar_mode, SCALAR_MODE): Add TImode.
13592 (vnsi, VnSI, vndi, VnDI): Likewise.
13593 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
13594 (mov<mode>, mov<mode>_unspec): Use V_MOV.
13595 (*mov<mode>_4reg): New insn.
13596 (mov<mode>_exec): New 4reg variant.
13597 (mov<mode>_sgprbase): Likewise.
13598 (reload_in<mode>, reload_out<mode>): Use V_MOV.
13599 (vec_set<mode>): Likewise.
13600 (vec_duplicate<mode><exec>): New 4reg variant.
13601 (vec_extract<mode><scalar_mode>): Likewise.
13602 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
13603 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
13604 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
13605 (fold_extract_last_<mode>): Use V_MOV.
13606 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
13607 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
13608 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
13609 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
13610 gather<mode>_insn_2offsets<exec>): Use V_MOV.
13611 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
13612 scatter<mode>_insn_1offset<exec_scatter>,
13613 scatter<mode>_insn_1offset_ds<exec_scatter>,
13614 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
13615 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
13616 mask_scatter_store<mode><vnsi>): Likewise.
13617 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
13618 (gcn_hard_regno_mode_ok): Likewise.
13619 (GEN_VNM): Add TImode support.
13620 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
13621 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
13622 V8TImode, and V2TImode.
13623 (print_operand): Add 'J' and 'K' print codes.
13625 2023-06-19 Richard Biener <rguenther@suse.de>
13627 PR tree-optimization/110298
13628 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
13629 Clear number of iterations info before cleaning up the CFG.
13631 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13633 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
13634 Simplify vec_concat of lowpart subreg and high part vec_select.
13636 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
13638 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
13640 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
13642 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
13643 Handle null niters_skip.
13645 2023-06-19 Richard Biener <rguenther@suse.de>
13647 * config/aarch64/aarch64.cc
13648 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
13649 to LOOP_VINFO_MASKS.
13651 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
13654 * common/config/avr/avr-common.cc: Remove setting
13655 of OPT_fdelete_null_pointer_checks.
13656 * config/avr/avr.cc (avr_option_override): Clear
13657 flag_delete_null_pointer_checks if zero_address_valid.
13658 (avr_addr_space_zero_address_valid): New function.
13659 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
13662 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13663 Robin Dapp <rdapp.gcc@gmail.com>
13665 * doc/md.texi: Add len_mask{load,store}.
13666 * genopinit.cc (main): Ditto.
13668 * internal-fn.cc (len_maskload_direct): Ditto.
13669 (len_maskstore_direct): Ditto.
13670 (expand_call_mem_ref): Ditto.
13671 (expand_partial_load_optab_fn): Ditto.
13672 (expand_len_maskload_optab_fn): Ditto.
13673 (expand_partial_store_optab_fn): Ditto.
13674 (expand_len_maskstore_optab_fn): Ditto.
13675 (direct_len_maskload_optab_supported_p): Ditto.
13676 (direct_len_maskstore_optab_supported_p): Ditto.
13677 * internal-fn.def (LEN_MASK_LOAD): Ditto.
13678 (LEN_MASK_STORE): Ditto.
13679 * optabs.def (OPTAB_CD): Ditto.
13681 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
13683 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
13685 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
13687 * config/riscv/autovec.md (<optab><mode>3): Implement binop
13689 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
13690 (enum vxrm_field_enum): Rename this...
13691 (enum fixed_point_rounding_mode): ...to this.
13692 (enum frm_field_enum): Rename this...
13693 (enum floating_point_rounding_mode): ...to this.
13694 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
13695 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
13697 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
13698 (riscv_excess_precision): Do not convert to float for ZVFH.
13699 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
13701 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
13703 * config/riscv/vector-iterators.md: Add VI_QH iterator.
13704 * config/riscv/autovec-opt.md
13705 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
13706 that includes sign extension.
13707 (@pred_extract_first_sextsi<mode>): Dito for SImode.
13709 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
13711 * config/riscv/autovec.md (vec_set<mode>): Implement.
13712 (vec_extract<mode><vel>): Implement.
13713 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
13714 (emit_vlmax_slide_insn): Declare.
13715 (emit_nonvlmax_slide_tu_insn): Declare.
13716 (emit_scalar_move_insn): Export.
13717 (emit_nonvlmax_integer_move_insn): Export.
13718 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
13719 (emit_nonvlmax_slide_tu_insn): New function.
13720 (emit_vlmax_masked_mu_insn): No change.
13721 (emit_vlmax_integer_move_insn): Export.
13723 2023-06-19 Richard Biener <rguenther@suse.de>
13725 * tree-vectorizer.h (enum vect_partial_vector_style): New.
13726 (_loop_vec_info::partial_vector_style): Likewise.
13727 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
13728 (rgroup_controls::compare_type): Add.
13729 (vec_loop_masks): Change from a typedef to auto_vec<>
13731 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
13732 Adjust. Convert niters_skip to compare_type.
13733 (vect_set_loop_condition_partial_vectors_avx512): New function
13734 implementing the AVX512 partial vector codegen.
13735 (vect_set_loop_condition): Dispatch to the correct
13736 vect_set_loop_condition_partial_vectors_* function based on
13737 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
13738 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
13739 in the original niter type.
13740 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
13741 partial_vector_style.
13742 (can_produce_all_loop_masks_p): Adjust.
13743 (vect_verify_full_masking): Produce the rgroup_controls vector
13744 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
13745 (vect_verify_full_masking_avx512): New function implementing
13746 verification of AVX512 style masking.
13747 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
13748 (vect_analyze_loop_2): Also try AVX512 style masking.
13750 (vect_estimate_min_profitable_iters): Implement AVX512 style
13751 mask producing cost.
13752 (vect_record_loop_mask): Do not build the rgroup_controls
13753 vector here but record masks in a hash-set.
13754 (vect_get_loop_mask): Implement AVX512 style mask query,
13755 complementing the existing while_ult style.
13757 2023-06-19 Richard Biener <rguenther@suse.de>
13759 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
13761 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
13762 (vectorize_fold_left_reduction): Adjust.
13763 (vect_transform_reduction): Likewise.
13764 (vectorizable_live_operation): Likewise.
13765 * tree-vect-stmts.cc (vectorizable_call): Likewise.
13766 (vectorizable_operation): Likewise.
13767 (vectorizable_store): Likewise.
13768 (vectorizable_load): Likewise.
13769 (vectorizable_condition): Likewise.
13771 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
13774 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
13775 Add Optimization option property.
13777 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13779 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
13780 Add new pattern for the abovementioned case.
13782 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13784 * config/xtensa/xtensa.cc
13785 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
13787 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
13789 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
13791 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
13793 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
13795 2023-06-19 liuhongt <hongtao.liu@intel.com>
13798 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
13800 (sse2_packsswb<mask_name>): .. this, ..
13801 (avx2_packsswb<mask_name>): .. this and ..
13802 (avx512bw_packsswb<mask_name>): .. this.
13803 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
13804 (sse2_packssdw<mask_name>): .. this, ..
13805 (avx2_packssdw<mask_name>): .. this and ..
13806 (avx512bw_packssdw<mask_name>): .. this.
13808 2023-06-19 liuhongt <hongtao.liu@intel.com>
13811 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
13812 UNSPEC_US_TRUNCATE instead of original us_truncate for
13814 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
13816 (mmx_packsswb): .. this and ..
13817 (mmx_packuswb): .. this.
13818 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
13820 (s_trunsuffix): Removed code iterator.
13821 (any_s_truncate): Ditto.
13822 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
13823 UNSPEC_US_TRUNCATE instead of original us_truncate.
13824 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
13825 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
13827 2023-06-18 Pan Li <pan2.li@intel.com>
13829 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
13831 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
13833 * rtl.h (*rtx_equal_p_callback_function):
13834 Change return type from int to bool.
13835 (rtx_equal_p): Ditto.
13836 (*hash_rtx_callback_function): Ditto.
13837 * rtl.cc (rtx_equal_p): Change return type from int to bool
13838 and adjust function body accordingly.
13839 * early-remat.cc (scratch_equal): Ditto.
13840 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
13841 (hash_with_unspec_callback): Ditto.
13843 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
13845 * config/arc/arc.md (movqi_insn): Allow certain constants to
13846 be stored into memory in the pattern's condition.
13847 (movsf_insn): Similarly.
13849 2023-06-18 Honza <jh@ryzen3.suse.cz>
13851 PR tree-optimization/109849
13852 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
13853 ES; handle ipa_predicate::not_sra_candidate.
13854 (evaluate_properties_for_edge): Pass es to
13855 evaluate_conditions_for_known_args.
13856 (ipa_fn_summary_t::duplicate): Handle sra candidates.
13857 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
13858 (load_or_store_of_ptr_parameter): New function.
13859 (points_to_possible_sra_candidate_p): New function.
13860 (analyze_function_body): Initialize points_to_possible_sra_candidate;
13861 determine sra predicates.
13862 (estimate_ipcp_clone_size_and_time): Update call of
13863 evaluate_conditions_for_known_args.
13864 (remap_edge_params): Update points_to_possible_sra_candidate.
13865 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
13866 (write_ipa_call_summary): Likewise.
13867 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
13868 (dump_condition): Dump it.
13869 * ipa-predicate.h (struct inline_param_summary): Add
13870 points_to_possible_sra_candidate.
13872 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
13874 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
13875 function for setting the carry flag.
13876 (ix86_expand_builtin) <handlecarry>: Use it here.
13877 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
13878 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
13879 (usubc<mode>5): Likewise.
13881 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
13883 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
13884 for the immediate constant shift count.
13885 (*concat<mode><dwi>3_2): Likewise.
13886 (*concat<mode><dwi>3_3): Likewise.
13887 (*concat<mode><dwi>3_4): Likewise.
13888 (*concat<mode><dwi>3_5): Likewise.
13889 (*concat<mode><dwi>3_6): Likewise.
13891 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
13893 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
13894 (hash_rtx): Remove.
13895 * early-remat.cc (remat_candidate_hasher::equal): Update
13896 to call rtx_equal_p with rtx_equal_p_callback_function argument.
13897 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
13898 (rtx_equal_p): Remove.
13899 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
13900 argument with NULL default value.
13901 (rtx_equal_p_cb): Remove function declaration.
13902 (hash_rtx_cb): Ditto.
13903 (hash_rtx): Add hash_rtx_callback_function argument
13904 with NULL default value.
13905 * sel-sched-ir.cc (free_nop_pool): Update function comment.
13906 (skip_unspecs_callback): Ditto.
13907 (vinsn_init): Update to call hash_rtx with
13908 hash_rtx_callback_function argument.
13909 (vinsn_equal_p): Ditto.
13911 2023-06-18 yulong <shiyulong@iscas.ac.cn>
13913 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
13914 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
13915 (ADJUST_ALIGNMENT): Ditto.
13916 (RVV_TUPLE_PARTIAL_MODES): Ditto.
13917 (ADJUST_NUNITS): Ditto.
13918 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
13920 (vfloat16mf4x3_t): Ditto.
13921 (vfloat16mf4x4_t): Ditto.
13922 (vfloat16mf4x5_t): Ditto.
13923 (vfloat16mf4x6_t): Ditto.
13924 (vfloat16mf4x7_t): Ditto.
13925 (vfloat16mf4x8_t): Ditto.
13926 (vfloat16mf2x2_t): Ditto.
13927 (vfloat16mf2x3_t): Ditto.
13928 (vfloat16mf2x4_t): Ditto.
13929 (vfloat16mf2x5_t): Ditto.
13930 (vfloat16mf2x6_t): Ditto.
13931 (vfloat16mf2x7_t): Ditto.
13932 (vfloat16mf2x8_t): Ditto.
13933 (vfloat16m1x2_t): Ditto.
13934 (vfloat16m1x3_t): Ditto.
13935 (vfloat16m1x4_t): Ditto.
13936 (vfloat16m1x5_t): Ditto.
13937 (vfloat16m1x6_t): Ditto.
13938 (vfloat16m1x7_t): Ditto.
13939 (vfloat16m1x8_t): Ditto.
13940 (vfloat16m2x2_t): Ditto.
13941 (vfloat16m2x3_t): Ditto.
13942 (vfloat16m2x4_t): Ditto.
13943 (vfloat16m4x2_t): Ditto.
13944 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
13945 (vfloat16mf4x3_t): Ditto.
13946 (vfloat16mf4x4_t): Ditto.
13947 (vfloat16mf4x5_t): Ditto.
13948 (vfloat16mf4x6_t): Ditto.
13949 (vfloat16mf4x7_t): Ditto.
13950 (vfloat16mf4x8_t): Ditto.
13951 (vfloat16mf2x2_t): Ditto.
13952 (vfloat16mf2x3_t): Ditto.
13953 (vfloat16mf2x4_t): Ditto.
13954 (vfloat16mf2x5_t): Ditto.
13955 (vfloat16mf2x6_t): Ditto.
13956 (vfloat16mf2x7_t): Ditto.
13957 (vfloat16mf2x8_t): Ditto.
13958 (vfloat16m1x2_t): Ditto.
13959 (vfloat16m1x3_t): Ditto.
13960 (vfloat16m1x4_t): Ditto.
13961 (vfloat16m1x5_t): Ditto.
13962 (vfloat16m1x6_t): Ditto.
13963 (vfloat16m1x7_t): Ditto.
13964 (vfloat16m1x8_t): Ditto.
13965 (vfloat16m2x2_t): Ditto.
13966 (vfloat16m2x3_t): Ditto.
13967 (vfloat16m2x4_t): Ditto.
13968 (vfloat16m4x2_t): Ditto.
13969 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
13970 * config/riscv/riscv.md: New.
13971 * config/riscv/vector-iterators.md: New.
13973 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
13975 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
13976 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
13977 Generalize special case for converting TImode to V1TImode to handle
13978 all 128-bit vector conversions.
13980 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
13982 * gcc-ar.cc (main): Refactor to slightly reduce code
13983 duplication. Avoid unnecessary elements in nargv.
13985 2023-06-16 Pan Li <pan2.li@intel.com>
13988 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
13989 integer reduction expand.
13990 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
13991 and the LMUL1 attr respectively.
13992 * config/riscv/vector.md
13993 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
13994 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
13995 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
13996 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
13997 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
13998 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
13999 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
14001 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14004 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
14006 2023-06-16 Jakub Jelinek <jakub@redhat.com>
14008 PR middle-end/79173
14009 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
14010 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
14011 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
14013 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
14014 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
14015 * builtins.cc (fold_builtin_addc_subc): New function.
14016 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
14017 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
14019 2023-06-16 Jakub Jelinek <jakub@redhat.com>
14021 PR tree-optimization/110271
14022 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
14023 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
14024 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
14026 2023-06-16 Martin Jambor <mjambor@suse.cz>
14028 * configure: Regenerate.
14030 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
14031 Uros Bizjak <ubizjak@gmail.com>
14034 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
14035 define_insn_and_split combine *add<dwi>3_doubleword with
14036 a *concat<mode><dwi>3 for more efficient lowering after reload.
14038 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
14040 * ira-lives.cc: Include except.h.
14041 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
14042 when the pseudo does not live at the exception landing pad.
14044 2023-06-16 Alex Coplan <alex.coplan@arm.com>
14046 * doc/invoke.texi: Document -Welaborated-enum-base.
14048 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14050 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
14051 (ushrn2_n): ... This.
14052 (sqshrn2_n): Rename builtins to...
14053 (ssqshrn2_n): ... This.
14054 (uqshrn2_n): Rename builtins to...
14055 (uqushrn2_n): ... This.
14056 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
14057 (vqshrn_high_n_s32): Likewise.
14058 (vqshrn_high_n_s64): Likewise.
14059 (vqshrn_high_n_u16): Likewise.
14060 (vqshrn_high_n_u32): Likewise.
14061 (vqshrn_high_n_u64): Likewise.
14062 (vshrn_high_n_s16): Likewise.
14063 (vshrn_high_n_s32): Likewise.
14064 (vshrn_high_n_s64): Likewise.
14065 (vshrn_high_n_u16): Likewise.
14066 (vshrn_high_n_u32): Likewise.
14067 (vshrn_high_n_u64): Likewise.
14068 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
14070 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
14071 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
14072 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
14073 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
14074 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
14075 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
14076 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
14077 Update expander for the above.
14079 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14081 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
14082 (shrn2_n): ... This.
14083 (rshrn2): Rename builtins to...
14084 (rshrn2_n): ... This.
14085 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
14086 (vrshrn_high_n_s32): Likewise.
14087 (vrshrn_high_n_s64): Likewise.
14088 (vrshrn_high_n_u16): Likewise.
14089 (vrshrn_high_n_u32): Likewise.
14090 (vrshrn_high_n_u64): Likewise.
14091 (vshrn_high_n_s16): Likewise.
14092 (vshrn_high_n_s32): Likewise.
14093 (vshrn_high_n_s64): Likewise.
14094 (vshrn_high_n_u16): Likewise.
14095 (vshrn_high_n_u32): Likewise.
14096 (vshrn_high_n_u64): Likewise.
14097 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
14099 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
14100 (aarch64_shrn2<mode>_insn_le): Likewise.
14101 (aarch64_shrn2<mode>_insn_be): Likewise.
14102 (aarch64_shrn2<mode>): Likewise.
14103 (aarch64_rshrn2<mode>_insn_le): Likewise.
14104 (aarch64_rshrn2<mode>_insn_be): Likewise.
14105 (aarch64_rshrn2<mode>): Likewise.
14106 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
14107 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
14108 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
14109 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
14110 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
14111 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
14112 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
14113 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
14114 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
14115 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
14116 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
14117 (aarch64_sqshrun2_n<mode>): New define_expand.
14118 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
14119 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
14120 (aarch64_sqrshrun2_n<mode>): New define_expand.
14121 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
14122 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
14123 Delete unspec values.
14124 (VQSHRN_N): Delete int iterator.
14126 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14128 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
14129 * config/aarch64/aarch64-simd.md
14130 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
14131 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
14132 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
14133 * config/aarch64/iterators.md (shrn_s): New code attribute.
14135 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14137 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
14139 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
14140 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
14141 (aarch64_sqrshrun_n<mode>_insn): Likewise.
14142 (aarch64_sqshrun_n<mode>_insn): Likewise.
14143 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
14144 (aarch64_sqshrun_n<mode>): Likewise.
14145 (aarch64_sqrshrun_n<mode>): Likewise.
14146 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
14148 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14150 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
14151 (shrn_n): ... This.
14152 (rshrn): Rename builtins to...
14153 (rshrn_n): ... This.
14154 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
14155 (vshrn_n_s32): Likewise.
14156 (vshrn_n_s64): Likewise.
14157 (vshrn_n_u16): Likewise.
14158 (vshrn_n_u32): Likewise.
14159 (vshrn_n_u64): Likewise.
14160 (vrshrn_n_s16): Likewise.
14161 (vrshrn_n_s32): Likewise.
14162 (vrshrn_n_s64): Likewise.
14163 (vrshrn_n_u16): Likewise.
14164 (vrshrn_n_u32): Likewise.
14165 (vrshrn_n_u64): Likewise.
14166 * config/aarch64/aarch64-simd.md
14167 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
14168 (aarch64_shrn<mode>): Likewise.
14169 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
14170 (aarch64_rshrn<mode>): Likewise.
14171 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
14172 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
14173 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
14174 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
14175 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
14176 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
14177 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
14178 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
14179 (aarch64_sqshrun_n<mode>): Likewise.
14180 (aarch64_sqrshrun_n<mode>): Likewise.
14181 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
14182 (TRUNCEXTEND): New code attribute.
14183 (TRUNC_SHIFT): Likewise.
14184 (shrn_op): Likewise.
14185 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
14188 2023-06-16 Pan Li <pan2.li@intel.com>
14190 * config/riscv/riscv-vsetvl.cc
14191 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
14193 2023-06-16 Richard Biener <rguenther@suse.de>
14195 PR tree-optimization/110278
14196 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
14197 (x != (typeof x)(x == 0) -> true): Likewise.
14199 2023-06-16 Pali Rohár <pali@kernel.org>
14201 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
14202 (REAL_LIBGCC_SPEC): New define.
14203 * config/i386/mingw.opt: Add mcrtdll=
14204 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
14205 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
14206 (STARTFILE_SPEC): Adjust for -mcrtdll=.
14207 * doc/invoke.texi: Add mcrtdll= documentation.
14209 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
14211 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
14212 (mips_handle_code_readable_attr):New static function.
14213 (mips_get_code_readable_attr):New static enum function.
14214 (mips_set_current_function):Set the code_readable mode.
14215 (mips_option_override):Same as above.
14216 * doc/extend.texi:Document code_readable.
14218 2023-06-16 Richard Biener <rguenther@suse.de>
14220 PR tree-optimization/110269
14221 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
14222 with tree_expr_nonzero_p ...
14223 * match.pd (cmp (convert? addr@0) integer_zerop): With this
14226 2023-06-15 Marek Polacek <polacek@redhat.com>
14228 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
14229 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
14230 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
14231 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
14232 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
14234 * configure: Regenerate.
14235 * doc/install.texi: Document --enable-host-pie.
14237 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
14239 * regcprop.cc (maybe_mode_change): Enable stack pointer
14242 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
14244 PR tree-optimization/110266
14245 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
14247 (adjust_realpart_expr): Ditto.
14249 2023-06-15 Jan Beulich <jbeulich@suse.com>
14251 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
14254 2023-06-15 Jan Beulich <jbeulich@suse.com>
14256 * config/i386/constraints.md: Mention k and r for B.
14258 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
14259 Andrew Pinski <apinski@marvell.com>
14262 * config/loongarch/loongarch.md: Modify the register constraints for template
14263 "jumptable" and "indirect_jump" from "r" to "e".
14265 2023-06-15 Xi Ruoyao <xry111@xry111.site>
14267 * config/loongarch/loongarch-tune.h (loongarch_align): New
14269 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
14271 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
14273 * config/loongarch/loongarch.cc
14274 (loongarch_option_override_internal): Set the value of
14275 -falign-functions= if -falign-functions is enabled but no value
14276 is given. Likewise for -falign-labels=.
14278 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14280 PR middle-end/79173
14281 * internal-fn.def (UADDC, USUBC): New internal functions.
14282 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
14283 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
14284 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
14285 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
14286 match_uaddc_usubc): New functions.
14287 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
14288 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
14289 other optimizations have been successful for those.
14290 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
14291 * fold-const-call.cc (fold_const_call): Likewise.
14292 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
14293 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
14294 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
14296 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
14297 define_expand patterns.
14298 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
14299 into NOTE_INSN_DELETED note rather than nop instruction.
14300 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
14303 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14305 PR middle-end/79173
14306 * config/i386/i386.md (subborrow<mode>): Add alternative with
14307 memory destination and add for it define_peephole2
14308 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
14309 destination in these patterns.
14311 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14313 PR middle-end/79173
14314 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
14315 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
14316 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
14317 using memory destination in these patterns.
14319 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14321 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
14322 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
14323 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
14324 * fold-const-call.cc (fold_const_call): ... here.
14326 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
14328 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
14329 Rename to <su>abd<mode>3.
14330 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
14333 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
14335 * doc/md.texi (sabd, uabd): Document them.
14336 * internal-fn.def (ABD): Use new optab.
14337 * optabs.def (sabd_optab, uabd_optab): New optabs,
14338 * tree-vect-patterns.cc (vect_recog_absolute_difference):
14339 Recognize the following idiom abs (a - b).
14340 (vect_recog_sad_pattern): Refactor to use
14341 vect_recog_absolute_difference.
14342 (vect_recog_abd_pattern): Use patterns found by
14343 vect_recog_absolute_difference to build a new ABD
14346 2023-06-15 chenxiaolong <chenxl04200420@163.com>
14348 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
14349 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
14351 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14353 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
14354 (expand_vec_perm_const_1): Add merge optmization.
14356 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
14359 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
14360 (riscv_pass_by_reference): Return true for vector mode
14362 2023-06-15 Pan Li <pan2.li@intel.com>
14364 * config/riscv/autovec-opt.md: Align the predictor sytle.
14365 * config/riscv/autovec.md: Ditto.
14367 2023-06-15 Pan Li <pan2.li@intel.com>
14369 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
14370 Take elen instead of scalar BITS_PER_WORD.
14371 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
14372 instead of scaler BITS_PER_WORD.
14374 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
14376 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
14378 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14380 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
14381 Fix signed comparison warning in loop from npats to enelts.
14383 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
14385 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
14386 to offloading compilation.
14387 * config/gcn/mkoffload.cc (main): Adjust.
14388 * config/nvptx/mkoffload.cc (main): Likewise.
14389 * doc/invoke.texi (foffload-options): Update example.
14391 2023-06-14 liuhongt <hongtao.liu@intel.com>
14394 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
14395 for alternative 2 since there's no evex version for vpcmpeqd
14398 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
14400 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
14402 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
14404 * config/sh/divtab.cc: Remove.
14406 2023-06-13 Jakub Jelinek <jakub@redhat.com>
14408 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
14409 superfluous spaces around \t for vpcmpeqd.
14411 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
14413 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
14414 clearing vectors with only a single element. Set CLEARED if the
14415 vector was initialized to zero.
14417 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
14419 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
14422 (TUPLE_ENTRY): Undef.
14424 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14426 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
14427 (shuffle_generic_patterns): Ditto.
14428 (expand_vec_perm_const_1): Ditto.
14430 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14432 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
14433 (shuffle_decompress_patterns): Ditto.
14435 2023-06-13 Richard Biener <rguenther@suse.de>
14437 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
14439 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
14440 Kito Cheng <kito.cheng@sifive.com>
14442 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
14443 warning flag if func is not builtin
14444 * config/riscv/riscv.cc
14445 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
14446 (riscv_arg_has_vector): Determine whether the arg is vector type.
14447 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
14448 (riscv_init_cumulative_args): The same as header.
14449 (riscv_get_arg_info): Add the checking.
14450 (riscv_function_value): Check the func return and set warning flag
14451 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
14452 determine whether warning psabi or not.
14454 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14456 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
14457 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
14458 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
14459 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
14461 (arm_output_load_tpidr): Define.
14462 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
14463 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
14465 (reload_tp_hard): Likewise.
14466 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
14468 * doc/invoke.texi (Arm Options, mtp): Document new values.
14470 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14473 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
14474 AARCH64_TPIDRRO_EL0 value.
14475 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
14476 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
14477 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
14478 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
14480 2023-06-13 Alexandre Oliva <oliva@adacore.com>
14482 * range-op-float.cc (frange_nextafter): Drop inline.
14483 (frelop_early_resolve): Add static.
14484 (frange_float): Likewise.
14486 2023-06-13 Richard Biener <rguenther@suse.de>
14488 PR middle-end/110232
14489 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
14490 to check whether the buffer covers the whole vector.
14492 2023-06-13 Richard Biener <rguenther@suse.de>
14494 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
14495 .MASK_LOAD and friends set the size of the access to unknown.
14497 2023-06-13 Tejas Belagod <tbelagod@arm.com>
14500 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
14501 calls that have a constant input predicate vector.
14502 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
14503 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
14504 (svlast_impl::vect_all_same): Check if all vector elements are equal.
14506 2023-06-13 Andi Kleen <ak@linux.intel.com>
14508 * config/i386/gcc-auto-profile: Regenerate.
14510 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14512 * config/riscv/vector-iterators.md: Fix requirement.
14514 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14516 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
14517 (shuffle_decompress_patterns): New function.
14518 (expand_vec_perm_const_1): Add decompress optimization.
14520 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
14522 PR rtl-optimization/101188
14523 * postreload.cc (reload_cse_move2add_invalidate): New function,
14525 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
14527 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
14529 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
14530 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
14531 and if maxv == 1, use constant element for duplicating into register.
14533 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
14535 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
14536 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
14537 (gimplify_adjust_omp_clauses): Change
14538 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
14539 GOMP_MAP_FORCE_PRESENT.
14540 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
14541 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
14542 to/from clauses with present modifier.
14544 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14546 PR tree-optimization/110205
14547 * range-op-float.cc (range_operator::fold_range): Add default FII
14549 * range-op-mixed.h (class operator_gt): Add missing final overrides.
14550 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
14551 (operator_lshift ::update_bitmask): Add final override.
14552 (operator_rshift ::update_bitmask): Add final override.
14553 * range-op.h (range_operator::fold_range): Add FII prototype.
14555 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14557 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
14558 Use range_op_handler directly.
14559 * range-op.cc (range_op_handler::range_op_handler): Unsigned
14560 param instead of tree-code.
14561 (ptr_op_widen_plus_signed): Delete.
14562 (ptr_op_widen_plus_unsigned): Delete.
14563 (ptr_op_widen_mult_signed): Delete.
14564 (ptr_op_widen_mult_unsigned): Delete.
14565 (range_op_table::initialize_integral_ops): Add new opcodes.
14566 * range-op.h (range_op_handler): Use unsigned.
14567 (OP_WIDEN_MULT_SIGNED): New.
14568 (OP_WIDEN_MULT_UNSIGNED): New.
14569 (OP_WIDEN_PLUS_SIGNED): New.
14570 (OP_WIDEN_PLUS_UNSIGNED): New.
14571 (RANGE_OP_TABLE_SIZE): New.
14572 (range_op_table::operator []): Use unsigned.
14573 (range_op_table::set): Use unsigned.
14574 (m_range_tree): Make unsigned.
14575 (ptr_op_widen_mult_signed): Remove.
14576 (ptr_op_widen_mult_unsigned): Remove.
14577 (ptr_op_widen_plus_signed): Remove.
14578 (ptr_op_widen_plus_unsigned): Remove.
14580 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14582 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
14583 manually as there is no access to the default operator.
14584 (cfn_copysign::fold_range): Don't check for validity.
14585 (cfn_ubsan::fold_range): Ditto.
14586 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
14587 * range-op.cc (default_operator): New.
14588 (range_op_handler::range_op_handler): Use default_operator
14590 (range_op_handler::operator bool): Move from header, compare
14591 against default operator.
14592 (range_op_handler::range_op): New.
14593 * range-op.h (range_op_handler::operator bool): Move.
14595 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14597 * range-op.cc (unified_table): Delete.
14598 (range_op_table operator_table): Instantiate.
14599 (range_op_table::range_op_table): Rename from unified_table.
14600 (range_op_handler::range_op_handler): Use range_op_table.
14601 * range-op.h (range_op_table::operator []): Inline.
14602 (range_op_table::set): Inline.
14604 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14606 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
14608 * gimple-range-op.cc (get_code): Rename from get_code_and_type
14610 (gimple_range_op_handler::supported_p): No need for type.
14611 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
14612 (cfn_copysign::fold_range): Ditto.
14613 (cfn_ubsan::fold_range): Ditto.
14614 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
14615 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
14616 * range-op-float.cc (operator_plus::op1_range): Ditto.
14617 (operator_mult::op1_range): Ditto.
14618 (range_op_float_tests): Ditto.
14619 * range-op.cc (get_op_handler): Remove.
14620 (range_op_handler::set_op_handler): Remove.
14621 (operator_plus::op1_range): No need for type.
14622 (operator_minus::op1_range): Ditto.
14623 (operator_mult::op1_range): Ditto.
14624 (operator_exact_divide::op1_range): Ditto.
14625 (operator_cast::op1_range): Ditto.
14626 (perator_bitwise_not::fold_range): Ditto.
14627 (operator_negate::fold_range): Ditto.
14628 * range-op.h (range_op_handler::range_op_handler): Remove type param.
14629 (range_cast): No need for type.
14630 (range_op_table::operator[]): Check for enum_code >= 0.
14631 * tree-data-ref.cc (compute_distributive_range): No need for type.
14632 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
14633 * value-query.cc (range_query::get_tree_range): Ditto.
14634 * value-relation.cc (relation_oracle::validate_relation): Ditto.
14635 * vr-values.cc (range_of_var_in_loop): Ditto.
14636 (simplify_using_ranges::fold_cond_with_ops): Ditto.
14638 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14640 * range-op-mixed.h (operator_max): Remove final.
14641 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
14642 (pointer_table::pointer_table): Remove.
14643 (class hybrid_max_operator): New.
14644 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
14645 * range-op.cc (pointer_tree_table): Remove.
14646 (unified_table::unified_table): Comment out MAX_EXPR.
14647 (get_op_handler): Remove check of pointer table.
14648 * range-op.h (class pointer_table): Remove.
14650 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14652 * range-op-mixed.h (operator_min): Remove final.
14653 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
14654 (class hybrid_min_operator): New.
14655 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
14656 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
14658 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14660 * range-op-mixed.h (operator_bitwise_or): Remove final.
14661 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
14662 (class hybrid_or_operator): New.
14663 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
14664 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
14666 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14668 * range-op-mixed.h (operator_bitwise_and): Remove final.
14669 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
14670 (class hybrid_and_operator): New.
14671 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
14672 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
14674 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14676 * Makefile.in (OBJS): Add range-op-ptr.o.
14677 * range-op-mixed.h (update_known_bitmask): Move prototype here.
14678 (minus_op1_op2_relation_effect): Move prototype here.
14679 (wi_includes_zero_p): Move function to here.
14680 (wi_zero_p): Ditto.
14681 * range-op.cc (update_known_bitmask): Remove static.
14682 (wi_includes_zero_p): Move to header.
14683 (wi_zero_p): Move to header.
14684 (minus_op1_op2_relation_effect): Remove static.
14685 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
14686 (pointer_plus_operator): Ditto.
14687 (pointer_min_max_operator): Ditto.
14688 (pointer_and_operator): Ditto.
14689 (pointer_or_operator): Ditto.
14690 (pointer_table): Ditto.
14691 (range_op_table::initialize_pointer_ops): Ditto.
14692 * range-op-ptr.cc: New.
14694 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14696 * range-op-mixed.h (class operator_max): Move from...
14697 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
14698 (get_op_handler): Remove the integral table.
14699 (class operator_max): Move from here.
14700 (integral_table::integral_table): Delete.
14701 * range-op.h (class integral_table): Delete.
14703 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14705 * range-op-mixed.h (class operator_min): Move from...
14706 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
14707 (class operator_min): Move from here.
14708 (integral_table::integral_table): Remove MIN_EXPR.
14710 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14712 * range-op-mixed.h (class operator_bitwise_or): Move from...
14713 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
14714 (class operator_bitwise_or): Move from here.
14715 (integral_table::integral_table): Remove BIT_IOR_EXPR.
14717 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14719 * range-op-mixed.h (class operator_bitwise_and): Move from...
14720 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
14721 (get_op_handler): Check for a pointer table entry first.
14722 (class operator_bitwise_and): Move from here.
14723 (integral_table::integral_table): Remove BIT_AND_EXPR.
14725 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14727 * range-op-mixed.h (class operator_bitwise_xor): Move from...
14728 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
14729 (class operator_bitwise_xor): Move from here.
14730 (integral_table::integral_table): Remove BIT_XOR_EXPR.
14731 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
14733 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14735 * range-op-mixed.h (class operator_bitwise_not): Move from...
14736 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
14737 (class operator_bitwise_not): Move from here.
14738 (integral_table::integral_table): Remove BIT_NOT_EXPR.
14739 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
14741 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
14743 * range-op-mixed.h (class operator_addr_expr): Move from...
14744 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
14745 (class operator_addr_expr): Move from here.
14746 (integral_table::integral_table): Remove ADDR_EXPR.
14747 (pointer_table::pointer_table): Remove ADDR_EXPR.
14749 2023-06-12 Pan Li <pan2.li@intel.com>
14751 * config/riscv/riscv-vector-builtins-types.def
14752 (vfloat16m1_t): Add type to lmul1 ops.
14753 (vfloat16m2_t): Likewise.
14754 (vfloat16m4_t): Likewise.
14756 2023-06-12 Richard Biener <rguenther@suse.de>
14758 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
14759 .MASK_STORE and friend set the size of the access to
14762 2023-06-12 Tamar Christina <tamar.christina@arm.com>
14764 * config.in: Regenerate.
14765 * configure: Regenerate.
14766 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
14768 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14770 * config/riscv/autovec-opt.md
14771 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
14772 (*<any_shiftrt:optab>trunc<mode>): Ditto.
14773 * config/riscv/autovec.md (<optab><mode>3): Change to
14774 define_insn_and_split.
14775 (v<optab><mode>3): Ditto.
14776 (trunc<mode><v_double_trunc>2): Ditto.
14778 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14780 * simplify-rtx.cc (simplify_const_unary_operation):
14781 Handle US_TRUNCATE, SS_TRUNCATE.
14783 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
14786 * doc/gm2.texi (Standard procedures): Fix Next link.
14788 2023-06-12 Tamar Christina <tamar.christina@arm.com>
14790 * config.in: Regenerate.
14792 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
14794 PR middle-end/110142
14795 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
14796 subtype to vect_widened_op_tree and remove subtype parameter, also
14797 remove superfluous overloaded function definition.
14798 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
14799 to call to vect_recog_widen_op_pattern.
14800 (vect_recog_widen_minus_pattern): Likewise.
14802 2023-06-12 liuhongt <hongtao.liu@intel.com>
14804 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
14805 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
14806 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
14807 (vec_unpacks_lo_<mode>): Ditto.
14808 (vec_unpacks_hi_<mode>): Ditto.
14809 (sse_movlhps_<mode>): New define_insn.
14810 (ssse3_palignr<mode>_perm): Extend to V_128H.
14811 (V_128H): New mode iterator.
14812 (ssepackPHmode): New mode attribute.
14813 (vunpck_extract_mode): Ditto.
14814 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
14815 (vpckfloat_temp_mode): Ditto.
14816 (vpckfloat_op_mode): Ditto.
14817 (vunpckfixt_mode): Extend to VxHF.
14818 (vunpckfixt_model): Ditto.
14819 (vunpckfixt_extract_mode): Ditto.
14821 2023-06-12 Richard Biener <rguenther@suse.de>
14823 PR middle-end/110200
14824 * genmatch.cc (expr::gen_transform): Put braces around
14825 the if arm for the (convert ...) short-cut.
14827 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
14830 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
14831 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
14833 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
14836 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
14837 floating constant itself for real_to_target call.
14839 2023-06-12 Pan Li <pan2.li@intel.com>
14841 * config/riscv/riscv-vector-builtins-types.def
14842 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
14843 (vfloat16mf2_t): Ditto.
14844 (vfloat16m1_t): Ditto.
14845 (vfloat16m2_t): Ditto.
14846 (vfloat16m4_t): Ditto.
14848 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
14850 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
14851 Do not require a stack frame when debugging is enabled for AIX.
14853 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
14855 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
14856 Remove attribute values.
14857 (insv_notbit): New post-reload insn.
14858 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
14859 (*insv.not-bit.0_split, *insv.not-bit.7_split)
14860 (*insv.xor-extract_split): Split to insv_notbit.
14861 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
14862 (*insv.xor-extract): Remove post-reload insns.
14863 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
14864 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
14865 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
14866 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
14868 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
14871 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
14872 (MSB, SIZE): New mode attributes.
14873 (any_shift): New code iterator.
14874 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
14875 (*lshr<mode>3_const_split): Add constraint alternative for
14876 the case of shift-offset = MSB. Ditch "length" attribute.
14877 (extzv<mode): New. replaces extzv. Adjust following patterns.
14878 Use avr_out_extr, avr_out_extr_not to print asm.
14879 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
14880 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
14881 * config/avr/constraints.md (C15, C23, C31, Yil): New
14882 * config/avr/predicates.md (reg_or_low_io_operand)
14883 (const7_operand, reg_or_low_io_operand)
14884 (const15_operand, const_0_to_15_operand)
14885 (const23_operand, const_0_to_23_operand)
14886 (const31_operand, const_0_to_31_operand): New.
14887 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
14888 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
14889 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
14890 MSB case to new insn constraint "r" for operands[1].
14891 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
14892 Handle these cases.
14893 (avr_rtx_costs_1): Adjust cost for a new pattern.
14895 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14897 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
14898 (vector_insn_info::parse_insn): Add rtx_insn parse.
14899 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
14900 (get_first_vsetvl): New function.
14901 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
14902 (pass_vsetvl::cleanup_insns): Remove it.
14903 (pass_vsetvl::ssa_post_optimization): New function.
14904 (has_no_uses): Ditto.
14905 (pass_vsetvl::propagate_avl): Remove it.
14906 (pass_vsetvl::df_post_optimization): New function.
14907 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
14908 * config/riscv/riscv-vsetvl.h: Adapt declaration.
14910 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
14912 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
14913 (ipcp_vr_lattice::print): Call dump method.
14914 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
14916 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
14917 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
14919 (initialize_node_lattices): Pass type when appropriate.
14920 (ipa_vr_operation_and_type_effects): Make type agnostic.
14921 (ipa_value_range_from_jfunc): Same.
14922 (propagate_vr_across_jump_function): Same.
14923 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
14924 (evaluate_properties_for_edge): Same.
14925 * ipa-prop.cc (ipa_vr::get_vrange): Same.
14926 (ipcp_update_vr): Same.
14927 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
14928 (ipa_range_set_and_normalize): Same.
14930 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
14934 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
14935 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
14936 (avr_pass_data_ifelse): New pass_data for it.
14937 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
14938 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
14939 (avr_out_cmp_ext): New functions.
14940 (compare_condtition): Make sure REG_CC dies in the branch insn.
14941 (avr_rtx_costs_1): Add computation of cbranch costs.
14942 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
14943 [ADJUST_LEN_CMP_SEXT]Handle them.
14944 (TARGET_CANONICALIZE_COMPARISON): New define.
14945 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
14946 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
14947 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
14948 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
14949 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
14950 (avr_out_cmp_zext): New Protos
14951 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
14952 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
14953 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
14954 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
14955 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
14956 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
14957 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
14958 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
14959 (adjust_len) [add_set_ZN, cmp_zext]: New.
14960 (QIPSI): New mode iterator.
14961 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
14962 (gelt): New code iterator.
14963 (gelt_eqne): New code attribute.
14964 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
14965 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
14966 (*cmpqi_sign_extend): Remove insns.
14967 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
14968 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
14969 * config/avr/predicates.md (scratch_or_d_register_operand): New.
14970 * config/avr/constraints.md (Yxx): New constraint.
14972 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14974 * config/riscv/autovec.md (select_vl<mode>): New pattern.
14975 * config/riscv/riscv-protos.h (expand_select_vl): New function.
14976 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
14978 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14980 * range-op-float.cc (foperator_mult_div_base): Delete.
14981 (foperator_mult_div_base::find_range): Make static local function.
14982 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
14983 (operator_mult::op1_range): Rename from foperator_mult.
14984 (operator_mult::op2_range): Ditto.
14985 (operator_mult::rv_fold): Ditto.
14986 (float_table::float_table): Remove MULT_EXPR.
14987 (class foperator_div): Inherit from range_operator.
14988 (float_table::float_table): Delete.
14989 * range-op-mixed.h (class operator_mult): Combined from integer
14991 * range-op.cc (float_tree_table): Delete.
14992 (op_mult): New object.
14993 (unified_table::unified_table): Add MULT_EXPR.
14994 (get_op_handler): Do not check float table any longer.
14995 (class cross_product_operator): Move to range-op-mixed.h.
14996 (class operator_mult): Move to range-op-mixed.h.
14997 (integral_table::integral_table): Remove MULT_EXPR.
14998 (pointer_table::pointer_table): Remove MULT_EXPR.
14999 * range-op.h (float_table): Remove.
15001 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15003 * range-op-float.cc (foperator_negate): Remove. Move prototypes
15004 to range-op-mixed.h
15005 (operator_negate::fold_range): Rename from foperator_negate.
15006 (operator_negate::op1_range): Ditto.
15007 (float_table::float_table): Remove NEGATE_EXPR.
15008 * range-op-mixed.h (class operator_negate): Combined from integer
15010 * range-op.cc (op_negate): New object.
15011 (unified_table::unified_table): Add NEGATE_EXPR.
15012 (class operator_negate): Move to range-op-mixed.h.
15013 (integral_table::integral_table): Remove NEGATE_EXPR.
15014 (pointer_table::pointer_table): Remove NEGATE_EXPR.
15016 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15018 * range-op-float.cc (foperator_minus): Remove. Move prototypes
15019 to range-op-mixed.h
15020 (operator_minus::fold_range): Rename from foperator_minus.
15021 (operator_minus::op1_range): Ditto.
15022 (operator_minus::op2_range): Ditto.
15023 (operator_minus::rv_fold): Ditto.
15024 (float_table::float_table): Remove MINUS_EXPR.
15025 * range-op-mixed.h (class operator_minus): Combined from integer
15027 * range-op.cc (op_minus): New object.
15028 (unified_table::unified_table): Add MINUS_EXPR.
15029 (class operator_minus): Move to range-op-mixed.h.
15030 (integral_table::integral_table): Remove MINUS_EXPR.
15031 (pointer_table::pointer_table): Remove MINUS_EXPR.
15033 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15035 * range-op-float.cc (foperator_abs): Remove. Move prototypes
15036 to range-op-mixed.h
15037 (operator_abs::fold_range): Rename from foperator_abs.
15038 (operator_abs::op1_range): Ditto.
15039 (float_table::float_table): Remove ABS_EXPR.
15040 * range-op-mixed.h (class operator_abs): Combined from integer
15042 * range-op.cc (op_abs): New object.
15043 (unified_table::unified_table): Add ABS_EXPR.
15044 (class operator_abs): Move to range-op-mixed.h.
15045 (integral_table::integral_table): Remove ABS_EXPR.
15046 (pointer_table::pointer_table): Remove ABS_EXPR.
15048 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15050 * range-op-float.cc (foperator_plus): Remove. Move prototypes
15051 to range-op-mixed.h
15052 (operator_plus::fold_range): Rename from foperator_plus.
15053 (operator_plus::op1_range): Ditto.
15054 (operator_plus::op2_range): Ditto.
15055 (operator_plus::rv_fold): Ditto.
15056 (float_table::float_table): Remove PLUS_EXPR.
15057 * range-op-mixed.h (class operator_plus): Combined from integer
15059 * range-op.cc (op_plus): New object.
15060 (unified_table::unified_table): Add PLUS_EXPR.
15061 (class operator_plus): Move to range-op-mixed.h.
15062 (integral_table::integral_table): Remove PLUS_EXPR.
15063 (pointer_table::pointer_table): Remove PLUS_EXPR.
15065 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15067 * range-op-mixed.h (class operator_cast): Combined from integer
15069 * range-op.cc (op_cast): New object.
15070 (unified_table::unified_table): Add op_cast
15071 (class operator_cast): Move to range-op-mixed.h.
15072 (integral_table::integral_table): Remove op_cast
15073 (pointer_table::pointer_table): Remove op_cast.
15075 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15077 * range-op-float.cc (operator_cst::fold_range): New.
15078 * range-op-mixed.h (class operator_cst): Move from integer file.
15079 * range-op.cc (op_cst): New object.
15080 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
15081 (class operator_cst): Move to range-op-mixed.h.
15082 (integral_table::integral_table): Remove op_cst.
15083 (pointer_table::pointer_table): Remove op_cst.
15085 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15087 * range-op-float.cc (foperator_identity): Remove. Move prototypes
15088 to range-op-mixed.h
15089 (operator_identity::fold_range): Rename from foperator_identity.
15090 (operator_identity::op1_range): Ditto.
15091 (float_table::float_table): Remove fop_identity.
15092 * range-op-mixed.h (class operator_identity): Combined from integer
15094 * range-op.cc (op_identity): New object.
15095 (unified_table::unified_table): Add op_identity.
15096 (class operator_identity): Move to range-op-mixed.h.
15097 (integral_table::integral_table): Remove identity.
15098 (pointer_table::pointer_table): Remove identity.
15100 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15102 * range-op-float.cc (foperator_ge): Remove. Move prototypes
15103 to range-op-mixed.h
15104 (operator_ge::fold_range): Rename from foperator_ge.
15105 (operator_ge::op1_range): Ditto.
15106 (float_table::float_table): Remove GE_EXPR.
15107 * range-op-mixed.h (class operator_ge): Combined from integer
15109 * range-op.cc (op_ge): New object.
15110 (unified_table::unified_table): Add GE_EXPR.
15111 (class operator_ge): Move to range-op-mixed.h.
15112 (ge_op1_op2_relation): Fold into
15113 operator_ge::op1_op2_relation.
15114 (integral_table::integral_table): Remove GE_EXPR.
15115 (pointer_table::pointer_table): Remove GE_EXPR.
15116 * range-op.h (ge_op1_op2_relation): Delete.
15118 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15120 * range-op-float.cc (foperator_gt): Remove. Move prototypes
15121 to range-op-mixed.h
15122 (operator_gt::fold_range): Rename from foperator_gt.
15123 (operator_gt::op1_range): Ditto.
15124 (float_table::float_table): Remove GT_EXPR.
15125 * range-op-mixed.h (class operator_gt): Combined from integer
15127 * range-op.cc (op_gt): New object.
15128 (unified_table::unified_table): Add GT_EXPR.
15129 (class operator_gt): Move to range-op-mixed.h.
15130 (gt_op1_op2_relation): Fold into
15131 operator_gt::op1_op2_relation.
15132 (integral_table::integral_table): Remove GT_EXPR.
15133 (pointer_table::pointer_table): Remove GT_EXPR.
15134 * range-op.h (gt_op1_op2_relation): Delete.
15136 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15138 * range-op-float.cc (foperator_le): Remove. Move prototypes
15139 to range-op-mixed.h
15140 (operator_le::fold_range): Rename from foperator_le.
15141 (operator_le::op1_range): Ditto.
15142 (float_table::float_table): Remove LE_EXPR.
15143 * range-op-mixed.h (class operator_le): Combined from integer
15145 * range-op.cc (op_le): New object.
15146 (unified_table::unified_table): Add LE_EXPR.
15147 (class operator_le): Move to range-op-mixed.h.
15148 (le_op1_op2_relation): Fold into
15149 operator_le::op1_op2_relation.
15150 (integral_table::integral_table): Remove LE_EXPR.
15151 (pointer_table::pointer_table): Remove LE_EXPR.
15152 * range-op.h (le_op1_op2_relation): Delete.
15154 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15156 * range-op-float.cc (foperator_lt): Remove. Move prototypes
15157 to range-op-mixed.h
15158 (operator_lt::fold_range): Rename from foperator_lt.
15159 (operator_lt::op1_range): Ditto.
15160 (float_table::float_table): Remove LT_EXPR.
15161 * range-op-mixed.h (class operator_lt): Combined from integer
15163 * range-op.cc (op_lt): New object.
15164 (unified_table::unified_table): Add LT_EXPR.
15165 (class operator_lt): Move to range-op-mixed.h.
15166 (lt_op1_op2_relation): Fold into
15167 operator_lt::op1_op2_relation.
15168 (integral_table::integral_table): Remove LT_EXPR.
15169 (pointer_table::pointer_table): Remove LT_EXPR.
15170 * range-op.h (lt_op1_op2_relation): Delete.
15172 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15174 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
15175 to range-op-mixed.h
15176 (operator_equal::fold_range): Rename from foperator_not_equal.
15177 (operator_equal::op1_range): Ditto.
15178 (float_table::float_table): Remove NE_EXPR.
15179 * range-op-mixed.h (class operator_not_equal): Combined from integer
15181 * range-op.cc (op_equal): New object.
15182 (unified_table::unified_table): Add NE_EXPR.
15183 (class operator_not_equal): Move to range-op-mixed.h.
15184 (not_equal_op1_op2_relation): Fold into
15185 operator_not_equal::op1_op2_relation.
15186 (integral_table::integral_table): Remove NE_EXPR.
15187 (pointer_table::pointer_table): Remove NE_EXPR.
15188 * range-op.h (not_equal_op1_op2_relation): Delete.
15190 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15192 * range-op-float.cc (foperator_equal): Remove. Move prototypes
15193 to range-op-mixed.h
15194 (operator_equal::fold_range): Rename from foperator_equal.
15195 (operator_equal::op1_range): Ditto.
15196 (float_table::float_table): Remove EQ_EXPR.
15197 * range-op-mixed.h (class operator_equal): Combined from integer
15199 * range-op.cc (op_equal): New object.
15200 (unified_table::unified_table): Add EQ_EXPR.
15201 (class operator_equal): Move to range-op-mixed.h.
15202 (equal_op1_op2_relation): Fold into
15203 operator_equal::op1_op2_relation.
15204 (integral_table::integral_table): Remove EQ_EXPR.
15205 (pointer_table::pointer_table): Remove EQ_EXPR.
15206 * range-op.h (equal_op1_op2_relation): Delete.
15208 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15210 * range-op-float.cc (class float_table): Move to header.
15211 (float_table::float_table): Move float only operators to...
15212 (range_op_table::initialize_float_ops): Here.
15213 * range-op-mixed.h: New.
15214 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
15216 (float_tree_table): Moved from range-op-float.cc.
15217 (unified_tree_table): New.
15218 (unified_table::unified_table): New. Call initialize routines.
15219 (get_op_handler): Check unified table first.
15220 (range_op_handler::range_op_handler): Handle no type constructor.
15221 (integral_table::integral_table): Move integral only operators to...
15222 (range_op_table::initialize_integral_ops): Here.
15223 (pointer_table::pointer_table): Move pointer only operators to...
15224 (range_op_table::initialize_pointer_ops): Here.
15225 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
15226 (get_bool_state): Ditto.
15227 (empty_range_varying): Ditto.
15228 (relop_early_resolve): Ditto.
15229 (class range_op_table): Add new init methods for range types.
15230 (class integral_table): Move declaration to here.
15231 (class pointer_table): Move declaration to here.
15232 (class float_table): Move declaration to here.
15234 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15235 Richard Sandiford <richard.sandiford@arm.com>
15236 Richard Biener <rguenther@suse.de>
15238 * doc/md.texi: Add SELECT_VL support.
15239 * internal-fn.def (SELECT_VL): Ditto.
15240 * optabs.def (OPTAB_D): Ditto.
15241 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
15242 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
15243 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
15244 (vectorizable_store): Ditto.
15245 (vectorizable_load): Ditto.
15246 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
15248 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
15251 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
15254 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
15256 * range-op.cc (range_cast): Move to...
15257 * range-op.h (range_cast): Here and add generic a version.
15259 2023-06-09 Marek Polacek <polacek@redhat.com>
15263 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
15264 warn about designated initializers in C only.
15266 2023-06-09 Andrew Pinski <apinski@marvell.com>
15268 PR tree-optimization/97711
15269 PR tree-optimization/110155
15270 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
15271 ((zero_one != 0) ? z <op> y : y): Likewise.
15273 2023-06-09 Andrew Pinski <apinski@marvell.com>
15275 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
15276 multiply rather than negation/bit_and.
15278 2023-06-09 Andrew Pinski <apinski@marvell.com>
15280 * match.pd (`X & -Y -> X * Y`): Allow for truncation
15281 and the same type for unsigned types.
15283 2023-06-09 Andrew Pinski <apinski@marvell.com>
15285 PR tree-optimization/110165
15286 PR tree-optimization/110166
15287 * match.pd (zero_one_valued_p): Don't accept
15288 signed 1-bit integers.
15290 2023-06-09 Richard Biener <rguenther@suse.de>
15292 * match.pd (two conversions in a row): Use element_precision
15293 to DTRT for VECTOR_TYPE.
15295 2023-06-09 Pan Li <pan2.li@intel.com>
15297 * config/riscv/riscv.md (enabled): Move to another place, and
15298 add fp_vector_disabled to the cond.
15299 (fp_vector_disabled): New attr defined for disabling fp.
15300 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
15302 2023-06-09 Pan Li <pan2.li@intel.com>
15304 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
15307 2023-06-09 liuhongt <hongtao.liu@intel.com>
15310 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
15311 view_convert_expr mask to signed type when folding pblendvb
15314 2023-06-09 liuhongt <hongtao.liu@intel.com>
15317 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
15318 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
15319 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
15321 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
15322 real codename for __builtin_ia32_pabs{b,w,d}.
15324 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15326 * gimple-range-op.cc
15327 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
15328 (gimple_range_op_handler::maybe_builtin_call): Adjust.
15329 * gimple-range-op.h (operand1, operand2): Use m_operator.
15330 * range-op.cc (integral_table, pointer_table): Relocate.
15331 (get_op_handler): Rename from get_handler and handle all types.
15332 (range_op_handler::range_op_handler): Relocate.
15333 (range_op_handler::set_op_handler): Relocate and adjust.
15334 (range_op_handler::range_op_handler): Relocate.
15335 (dispatch_trio): New.
15336 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
15337 (range_op_handler::dispatch_kind): New.
15338 (range_op_handler::fold_range): Relocate and Use new dispatch value.
15339 (range_op_handler::op1_range): Ditto.
15340 (range_op_handler::op2_range): Ditto.
15341 (range_op_handler::lhs_op1_relation): Ditto.
15342 (range_op_handler::lhs_op2_relation): Ditto.
15343 (range_op_handler::op1_op2_relation): Ditto.
15344 (range_op_handler::set_op_handler): Use m_operator member.
15345 * range-op.h (range_op_handler::operator bool): Use m_operator.
15346 (range_op_handler::dispatch_kind): New.
15347 (range_op_handler::m_valid): Delete.
15348 (range_op_handler::m_int): Delete
15349 (range_op_handler::m_float): Delete
15350 (range_op_handler::m_operator): New.
15351 (range_op_table::operator[]): Relocate from .cc file.
15352 (range_op_table::set): Ditto.
15353 * value-range.h (class vrange): Make range_op_handler a friend.
15355 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15357 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
15358 (cfn_pass_through_arg1): Adjust using statemenmt.
15359 (cfn_signbit): Change base class, adjust using statement.
15360 (cfn_copysign): Ditto.
15362 (cfn_sincos): Ditto.
15363 * range-op-float.cc (fold_range): Change class to range_operator.
15367 (lhs_op1_relation): Ditto.
15368 (lhs_op2_relation): Ditto.
15369 (op1_op2_relation): Ditto.
15370 (foperator_*): Ditto.
15371 (class float_table): New. Inherit from range_op_table.
15372 (floating_tree_table) Change to range_op_table pointer.
15373 (class floating_op_table): Delete.
15374 * range-op.cc (operator_equal): Adjust using statement.
15375 (operator_not_equal): Ditto.
15376 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
15377 (operator_minus, operator_cast): Ditto.
15378 (operator_bitwise_and, pointer_plus_operator): Ditto.
15379 (get_float_handle): Change return type.
15380 * range-op.h (range_operator_float): Delete. Relocate all methods
15381 into class range_operator.
15382 (range_op_handler::m_float): Change type to range_operator.
15383 (floating_op_table): Delete.
15384 (floating_tree_table): Change type.
15386 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15388 * range-op.cc (range_operator::fold_range): Call virtual routine.
15389 (range_operator::update_bitmask): New.
15390 (operator_equal::update_bitmask): New.
15391 (operator_not_equal::update_bitmask): New.
15392 (operator_lt::update_bitmask): New.
15393 (operator_le::update_bitmask): New.
15394 (operator_gt::update_bitmask): New.
15395 (operator_ge::update_bitmask): New.
15396 (operator_ge::update_bitmask): New.
15397 (operator_plus::update_bitmask): New.
15398 (operator_minus::update_bitmask): New.
15399 (operator_pointer_diff::update_bitmask): New.
15400 (operator_min::update_bitmask): New.
15401 (operator_max::update_bitmask): New.
15402 (operator_mult::update_bitmask): New.
15403 (operator_div:operator_div):New.
15404 (operator_div::update_bitmask): New.
15405 (operator_div::m_code): New member.
15406 (operator_exact_divide::operator_exact_divide): New constructor.
15407 (operator_lshift::update_bitmask): New.
15408 (operator_rshift::update_bitmask): New.
15409 (operator_bitwise_and::update_bitmask): New.
15410 (operator_bitwise_or::update_bitmask): New.
15411 (operator_bitwise_xor::update_bitmask): New.
15412 (operator_trunc_mod::update_bitmask): New.
15413 (op_ident, op_unknown, op_ptr_min_max): New.
15414 (op_nop, op_convert): Delete.
15415 (op_ssa, op_paren, op_obj_type): Delete.
15416 (op_realpart, op_imagpart): Delete.
15417 (op_ptr_min, op_ptr_max): Delete.
15418 (pointer_plus_operator:update_bitmask): New.
15419 (range_op_table::set): Do not use m_code.
15420 (integral_table::integral_table): Adjust to single instances.
15421 * range-op.h (range_operator::range_operator): Delete.
15422 (range_operator::m_code): Delete.
15423 (range_operator::update_bitmask): New.
15425 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15427 * range-op-float.cc (range_operator_float::fold_range): Return
15428 NAN of the result type.
15430 2023-06-08 Jakub Jelinek <jakub@redhat.com>
15432 * optabs.cc (expand_ffs): Add forward declaration.
15433 (expand_doubleword_clz): Rename to ...
15434 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
15435 handle also doubleword CTZ and FFS in addition to CLZ.
15436 (expand_unop): Adjust caller. Also call it for doubleword
15437 ctz_optab and ffs_optab.
15439 2023-06-08 Jakub Jelinek <jakub@redhat.com>
15442 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
15443 n_words == 2 recurse with mmx_ok as first argument rather than false.
15445 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
15447 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
15448 avoid sign extension/undefined behaviour when setting each bit.
15450 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
15451 Uros Bizjak <ubizjak@gmail.com>
15453 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
15454 Use new x86_stc instruction when the carry flag must be set.
15455 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
15456 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
15457 * config/i386/i386.h (TARGET_SLOW_STC): New define.
15458 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
15459 (x86_stc): New define_insn.
15460 (define_peephole2): Convert x86_stc into alternate implementation
15461 on pentium4 without -Os when a QImode register is available.
15462 (*x86_cmc): New define_insn.
15463 (define_peephole2): Convert *x86_cmc into alternate implementation
15464 on pentium4 without -Os when a QImode register is available.
15465 (*setccc): New define_insn_and_split for a no-op CCCmode move.
15466 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
15467 recognize (and eliminate) the carry flag being copied to itself.
15468 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
15469 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
15471 2023-06-07 Andrew Pinski <apinski@marvell.com>
15473 * match.pd: Fix comment for the
15474 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
15476 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
15477 Jeff Law <jlaw@ventanamicro.com>
15479 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
15480 (rotrsi3_sext): Expose generator.
15481 (rotlsi3 pattern): Hide generator.
15482 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
15484 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
15485 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
15486 (mulsi3, <optab>si3): Likewise.
15487 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
15488 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
15489 (<u>mulsidi3): Likewise.
15490 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
15491 (mulsi3_extended, <optab>si3_extended): Likewise.
15492 (splitter for shadd feeding divison): Update RTL pattern to account
15493 for changes in how 32 bit ops are expanded for TARGET_64BIT.
15494 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
15496 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
15499 * config/riscv/riscv.cc (riscv_print_operand): Calculate
15500 memmodel only when it is valid.
15502 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
15504 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
15505 for constant element of a vector.
15507 2023-06-07 Jakub Jelinek <jakub@redhat.com>
15509 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
15510 instead compare tree_nonzero_bits <= 1U rather than just == 1.
15512 2023-06-07 Alex Coplan <alex.coplan@arm.com>
15515 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
15517 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
15518 names for builtins.
15519 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
15520 setup if in_lto_p, just like we do for SVE.
15521 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
15522 (__arm_st64b): Delete.
15523 (__arm_st64bv): Delete.
15524 (__arm_st64bv0): Delete.
15526 2023-06-07 Alex Coplan <alex.coplan@arm.com>
15529 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
15530 Use input operand for the destination address.
15531 * config/aarch64/aarch64.md (st64b): Fix constraint on address
15534 2023-06-07 Alex Coplan <alex.coplan@arm.com>
15537 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
15538 Replace eight consecutive spaces with tabs.
15539 (aarch64_init_ls64_builtins): Likewise.
15540 (aarch64_expand_builtin_ls64): Likewise.
15541 * config/aarch64/aarch64.md (ld64b): Likewise.
15544 (st64bv0): Likewise.
15546 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
15548 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
15549 offset table pseudo to a general reg subset.
15551 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15553 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
15555 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
15557 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
15558 (aarch64_sqxtun2<mode>_le): Likewise.
15559 (aarch64_sqxtun2<mode>_be): Likewise.
15560 (aarch64_sqxtun2<mode>): Adjust for the above.
15561 (aarch64_sqmovun<mode>): New define_expand.
15562 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
15563 (half_mask): New mode attribute.
15564 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
15567 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15569 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
15571 (aarch64_addp<mode>_insn): ... This...
15572 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
15573 (aarch64_addp<mode>): New define_expand.
15575 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15577 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
15578 * config/riscv/riscv-v.cc
15579 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
15581 (rvv_builder::single_step_npatterns_p): New function.
15582 (rvv_builder::npatterns_all_equal_p): Ditto.
15583 (const_vec_all_in_range_p): Support POLY handling.
15584 (gen_const_vector_dup): Ditto.
15585 (emit_vlmax_gather_insn): Add vrgatherei16.
15586 (emit_vlmax_masked_gather_mu_insn): Ditto.
15587 (expand_const_vector): Add VLA SLP const vector support.
15588 (expand_vec_perm): Support POLY.
15589 (struct expand_vec_perm_d): New struct.
15590 (shuffle_generic_patterns): New function.
15591 (expand_vec_perm_const_1): Ditto.
15592 (expand_vec_perm_const): Ditto.
15593 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
15594 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
15596 2023-06-07 Andrew Pinski <apinski@marvell.com>
15598 PR middle-end/110117
15599 * expr.cc (expand_single_bit_test): Handle
15600 const_int from expand_expr.
15602 2023-06-07 Andrew Pinski <apinski@marvell.com>
15604 * expr.cc (do_store_flag): Rearrange the
15605 TER code so that it overrides the nonzero bits
15606 info if we had `a & POW2`.
15608 2023-06-07 Andrew Pinski <apinski@marvell.com>
15610 PR tree-optimization/110134
15611 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
15613 (-A CMP CST -> B CMP (-CST)): Likewise.
15615 2023-06-07 Andrew Pinski <apinski@marvell.com>
15617 PR tree-optimization/89263
15618 PR tree-optimization/99069
15619 PR tree-optimization/20083
15620 PR tree-optimization/94898
15621 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
15622 one of the operands are constant.
15624 2023-06-07 Andrew Pinski <apinski@marvell.com>
15626 * match.pd (zero_one_valued_p): Match 0 integer constant
15629 2023-06-07 Pan Li <pan2.li@intel.com>
15631 * config/riscv/riscv-vector-builtins-types.def
15632 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
15633 (vfloat32m1_t): Ditto.
15634 (vfloat32m2_t): Ditto.
15635 (vfloat32m4_t): Ditto.
15636 (vfloat32m8_t): Ditto.
15637 (vint16mf4_t): Ditto.
15638 (vint16mf2_t): Ditto.
15639 (vint16m1_t): Ditto.
15640 (vint16m2_t): Ditto.
15641 (vint16m4_t): Ditto.
15642 (vint16m8_t): Ditto.
15643 (vuint16mf4_t): Ditto.
15644 (vuint16mf2_t): Ditto.
15645 (vuint16m1_t): Ditto.
15646 (vuint16m2_t): Ditto.
15647 (vuint16m4_t): Ditto.
15648 (vuint16m8_t): Ditto.
15649 (vint32mf2_t): Ditto.
15650 (vint32m1_t): Ditto.
15651 (vint32m2_t): Ditto.
15652 (vint32m4_t): Ditto.
15653 (vint32m8_t): Ditto.
15654 (vuint32mf2_t): Ditto.
15655 (vuint32m1_t): Ditto.
15656 (vuint32m2_t): Ditto.
15657 (vuint32m4_t): Ditto.
15658 (vuint32m8_t): Ditto.
15660 2023-06-07 Jason Merrill <jason@redhat.com>
15663 * doc/invoke.texi: Document it.
15665 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
15667 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
15668 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
15669 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
15670 NOT (BITREVERSE x) as BITREVERSE (NOT x).
15671 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
15672 Optimize PARITY (BITREVERSE x) as PARITY x.
15673 Optimize BITREVERSE (BITREVERSE x) as x.
15674 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
15675 BITREVERSE of a constant integer at compile-time.
15676 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
15677 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
15678 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
15679 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
15680 Optimize COPYSIGN (x, ABS y) as ABS x.
15681 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
15682 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
15683 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
15684 arguments at compile-time.
15686 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
15688 * rtl.h (function_invariant_p): Change return type from int to bool.
15689 * reload1.cc (function_invariant_p): Change return type from
15690 int to bool and adjust function body accordingly.
15692 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15694 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
15695 (*single_<optab>mult_plus<mode>): Ditto.
15696 (*double_<optab>mult_plus<mode>): Ditto.
15697 (*sign_zero_extend_fma): Ditto.
15698 (*zero_sign_extend_fma): Ditto.
15699 * config/riscv/riscv-protos.h (enum insn_type): New enum.
15701 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
15702 Tobias Burnus <tobias@codesourcery.com>
15704 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
15705 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
15707 (omp_get_attachment): Handle map clauses with 'present' modifier.
15708 (omp_group_base): Likewise.
15709 (gimplify_scan_omp_clauses): Reorder present maps to come first.
15710 Set GOVD flags for present defaultmaps.
15711 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
15712 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
15714 (lower_omp_target): Handle map clauses with 'present' modifier.
15715 Handle 'to' and 'from' clauses with 'present'.
15716 * tree-core.h (enum omp_clause_defaultmap_kind): Add
15717 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
15718 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
15719 'from' clauses with 'present' modifier. Handle present defaultmap.
15720 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
15722 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
15724 * config/rs6000/genfusion.pl: Delete some dead code.
15726 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
15728 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
15730 (gen_ld_cmpi_p10): ... this.
15732 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
15735 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
15736 duplicate expression.
15738 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15740 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
15741 Handle unsigned reduc_plus_scal_ builtins.
15742 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
15743 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
15744 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
15745 __builtin_aarch64_reduc_plus_scal_v2di.
15746 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
15748 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15750 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
15751 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
15752 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
15754 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15756 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
15757 (aarch64_shrn<mode>_insn_be): Delete.
15758 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
15759 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
15760 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
15761 (aarch64_rshrn<mode>_insn_le): Delete.
15762 (aarch64_rshrn<mode>_insn_be): Delete.
15763 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
15764 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
15766 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15768 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
15770 (aarch64_pars_overlap_p): Likewise.
15771 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
15772 Express in terms of UNSPEC_ADDV.
15773 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
15774 (*aarch64_<su>addlv<mode>_reduction): Define.
15775 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
15776 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
15777 (aarch64_pars_overlap_p): Likewise.
15778 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
15779 (VQUADW): New mode attribute.
15780 (VWIDE2X_S): Likewise.
15782 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
15783 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
15785 2023-06-06 Richard Biener <rguenther@suse.de>
15787 PR middle-end/110055
15788 * gimplify.cc (gimplify_target_expr): Do not emit
15789 CLOBBERs for variables which have static storage duration
15790 after gimplifying their initializers.
15792 2023-06-06 Richard Biener <rguenther@suse.de>
15794 PR tree-optimization/109143
15795 * tree-ssa-structalias.cc (solution_set_expand): Avoid
15796 one bitmap iteration and optimize bit range setting.
15798 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
15800 PR bootstrap/110120
15801 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
15802 XVECEXP, not XEXP, to access first item of a PARALLEL.
15804 2023-06-06 Pan Li <pan2.li@intel.com>
15806 * config/riscv/riscv-vector-builtins-types.def
15807 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
15808 (vfloat16mf2_t): Likewise.
15809 (vfloat16m1_t): Likewise.
15810 (vfloat16m2_t): Likewise.
15811 (vfloat16m4_t): Likewise.
15812 (vfloat16m8_t): Likewise.
15813 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
15814 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
15816 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
15818 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
15819 for cfi reg/mem machmode
15820 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
15822 2023-06-06 Li Xu <xuli1@eswincomputing.com>
15824 * config/riscv/vector-iterators.md:
15825 Fix 'REQUIREMENT' for machine_mode 'MODE'.
15826 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
15827 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
15828 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
15830 2023-06-06 Pan Li <pan2.li@intel.com>
15832 * config/riscv/vector-iterators.md: Fix typo in mode attr.
15834 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
15835 Joel Hutton <joel.hutton@arm.com>
15837 * doc/generic.texi: Remove old tree codes.
15838 * expr.cc (expand_expr_real_2): Remove old tree code cases.
15839 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
15840 * optabs-tree.cc (optab_for_tree_code): Likewise.
15841 (supportable_half_widening_operation): Likewise.
15842 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
15843 * tree-inline.cc (estimate_operator_cost): Likewise.
15844 (op_symbol_code): Likewise.
15845 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
15846 (vect_analyze_data_ref_accesses): Likewise.
15847 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
15848 * cfgexpand.cc (expand_debug_expr): Likewise.
15849 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
15850 (supportable_widening_operation): Likewise.
15851 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
15853 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
15854 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
15855 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
15856 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
15857 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
15858 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
15859 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
15860 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
15862 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
15863 Joel Hutton <joel.hutton@arm.com>
15864 Tamar Christina <tamar.christina@arm.com>
15866 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
15868 (vec_widen_<su>add_lo_<mode>): ... to this.
15869 (vec_widen_<su>addl_hi_<mode>): Rename this ...
15870 (vec_widen_<su>add_hi_<mode>): ... to this.
15871 (vec_widen_<su>subl_lo_<mode>): Rename this ...
15872 (vec_widen_<su>sub_lo_<mode>): ... to this.
15873 (vec_widen_<su>subl_hi_<mode>): Rename this ...
15874 (vec_widen_<su>sub_hi_<mode>): ...to this.
15875 * doc/generic.texi: Document new IFN codes.
15876 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
15877 (commutative_binary_fn_p): Add widen_plus fn's.
15878 (widening_fn_p): New function.
15879 (narrowing_fn_p): New function.
15880 (direct_internal_fn_optab): Change visibility.
15881 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
15882 internal_fn that expands into multiple internal_fns for widening.
15883 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
15884 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
15885 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
15886 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
15887 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
15888 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
15889 (lookup_hilo_internal_fn): Likewise.
15890 (widening_fn_p): Likewise.
15891 (Narrowing_fn_p): Likewise.
15892 * optabs.cc (commutative_optab_p): Add widening plus optabs.
15893 * optabs.def (OPTAB_D): Define widen add, sub optabs.
15894 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
15895 patterns with a hi/lo or even/odd split.
15896 (vect_recog_sad_pattern): Refactor to use new IFN codes.
15897 (vect_recog_widen_plus_pattern): Likewise.
15898 (vect_recog_widen_minus_pattern): Likewise.
15899 (vect_recog_average_pattern): Likewise.
15900 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
15902 (supportable_widening_operation): Likewise.
15903 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
15905 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
15906 Joel Hutton <joel.hutton@arm.com>
15908 * tree-vect-patterns.cc: Add include for gimple-iterator.
15909 (vect_recog_widen_op_pattern): Refactor to use code_helper.
15910 (vect_gimple_build): New function.
15911 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
15913 (vectorizable_call): Likewise.
15914 (vect_gen_widened_results_half): Likewise.
15915 (vect_create_vectorized_demotion_stmts): Likewise.
15916 (vect_create_vectorized_promotion_stmts): Likewise.
15917 (vect_create_half_widening_stmts): Likewise.
15918 (vectorizable_conversion): Likewise.
15919 (supportable_widening_operation): Likewise.
15920 (supportable_narrowing_operation): Likewise.
15921 * tree-vectorizer.h (supportable_widening_operation): Change
15922 prototype to use code_helper.
15923 (supportable_narrowing_operation): Likewise.
15924 (vect_gimple_build): New function prototype.
15925 * tree.h (code_helper::safe_as_tree_code): New function.
15926 (code_helper::safe_as_fn_code): New function.
15928 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
15930 * wide-int.cc (wi::bitreverse_large): New function implementing
15931 bit reversal of an integer.
15932 * wide-int.h (wi::bitreverse): New (template) function prototype.
15933 (bitreverse_large): Prototype helper function/implementation.
15934 (wi::bitreverse): New template wrapper around bitreverse_large.
15936 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
15938 * rtl.h (print_rtl_single): Change return type from int to void.
15939 (print_rtl_single_with_indent): Ditto.
15940 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
15941 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
15942 (rtx_writer::print_rtx_operand_code_0): Ditto.
15943 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
15944 (rtx_writer::print_rtx_operand_code_i): Ditto.
15945 (rtx_writer::print_rtx_operand_code_u): Ditto.
15946 (rtx_writer::print_rtx_operand): Ditto.
15947 (rtx_writer::print_rtx): Ditto.
15948 (rtx_writer::finish_directive): Ditto.
15949 (print_rtl_single): Change return type from int to void
15950 and adjust function body accordingly.
15951 (rtx_writer::print_rtl_single_with_indent): Ditto.
15953 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
15955 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
15956 (reg_class_subset_p): Ditto.
15957 * reginfo.cc (reg_classes_intersect_p): Ditto.
15958 (reg_class_subset_p): Ditto.
15960 2023-06-05 Pan Li <pan2.li@intel.com>
15962 * config/riscv/riscv-vector-builtins-types.def
15963 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
15964 (vfloat32m1_t): Ditto.
15965 (vfloat32m2_t): Ditto.
15966 (vfloat32m4_t): Ditto.
15967 (vfloat32m8_t): Ditto.
15968 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
15969 (vint16mf2_t): Ditto.
15970 (vint16m1_t): Ditto.
15971 (vint16m2_t): Ditto.
15972 (vint16m4_t): Ditto.
15973 (vint16m8_t): Ditto.
15974 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
15975 (vuint16mf2_t): Ditto.
15976 (vuint16m1_t): Ditto.
15977 (vuint16m2_t): Ditto.
15978 (vuint16m4_t): Ditto.
15979 (vuint16m8_t): Ditto.
15980 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
15981 (vint32m1_t): Ditto.
15982 (vint32m2_t): Ditto.
15983 (vint32m4_t): Ditto.
15984 (vint32m8_t): Ditto.
15985 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
15986 (vuint32m1_t): Ditto.
15987 (vuint32m2_t): Ditto.
15988 (vuint32m4_t): Ditto.
15989 (vuint32m8_t): Ditto.
15990 * config/riscv/vector-iterators.md: Add FP=16 support for V,
15991 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
15993 2023-06-05 Andrew Pinski <apinski@marvell.com>
15995 PR bootstrap/110085
15996 * Makefile.in (clean): Remove the removing of
15997 MULTILIB_DIR/MULTILIB_OPTIONS directories.
15999 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
16001 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
16003 * config/mips/mips.cc (speculation_barrier_libfunc): New static
16005 (mips_init_libfuncs): Initialize it.
16006 (mips_emit_speculation_barrier): New function.
16007 * config/mips/mips.md (speculation_barrier): Call
16008 mips_emit_speculation_barrier.
16010 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16012 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
16013 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
16014 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
16015 (rvv_builder::get_merged_repeating_sequence): Ditto.
16016 (rvv_builder::get_merge_scalar_mask): Ditto.
16017 (emit_scalar_move_insn): Ditto.
16018 (emit_vlmax_integer_move_insn): Ditto.
16019 (emit_nonvlmax_integer_move_insn): Ditto.
16020 (emit_vlmax_gather_insn): Ditto.
16021 (emit_vlmax_masked_gather_mu_insn): Ditto.
16022 (get_repeating_sequence_dup_machine_mode): Ditto.
16024 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16026 * config/riscv/autovec.md: Split arguments.
16027 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
16028 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
16030 2023-06-04 Andrew Pinski <apinski@marvell.com>
16032 * expr.cc (do_store_flag): Improve for single bit testing
16033 not against zero but against that single bit.
16035 2023-06-04 Andrew Pinski <apinski@marvell.com>
16037 * expr.cc (do_store_flag): Extend the one bit checking case
16038 to handle the case where we don't have an and but rather still
16039 one bit is known to be non-zero.
16041 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
16043 * config/h8300/constraints.md (Zz): Make this a normal
16045 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
16046 * config/h8300/logical.md (H8/SX bit patterns): Remove.
16048 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16050 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
16051 New insn_and_split patterns.
16053 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16056 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
16057 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
16058 (@vlmul_extx4<mode>): Ditto.
16059 (@vlmul_extx8<mode>): Ditto.
16060 (@vlmul_extx16<mode>): Ditto.
16061 (@vlmul_extx32<mode>): Ditto.
16062 (@vlmul_extx64<mode>): Ditto.
16063 (*vlmul_extx2<mode>): Ditto.
16064 (*vlmul_extx4<mode>): Ditto.
16065 (*vlmul_extx8<mode>): Ditto.
16066 (*vlmul_extx16<mode>): Ditto.
16067 (*vlmul_extx32<mode>): Ditto.
16068 (*vlmul_extx64<mode>): Ditto.
16070 2023-06-04 Pan Li <pan2.li@intel.com>
16072 * config/riscv/riscv-vector-builtins-types.def
16073 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
16074 (vfloat32m1_t): Likewise.
16075 (vfloat32m2_t): Likewise.
16076 (vfloat32m4_t): Likewise.
16077 (vfloat32m8_t): Likewise.
16078 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
16079 * config/riscv/vector-iterators.md: Add single to half machine
16082 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16084 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
16085 (*n<optab><mode>): Ditto.
16086 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
16087 (*n<optab><mode>): Ditto.
16088 * config/riscv/vector.md: Ditto.
16090 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
16093 * config/i386/i386-features.cc (scalar_chain::convert_compare):
16094 Update or delete REG_EQUAL notes, converting CONST_INT and
16095 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
16097 2023-06-04 Jason Merrill <jason@redhat.com>
16100 * tree-eh.cc (lower_resx): Pass the exception pointer to the
16102 * except.h: Tweak comment.
16104 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
16106 * postreload.cc (move2add_use_add2_insn): Handle
16107 trivial single_sets. Rename variable PAT to SET.
16108 (move2add_use_add3_insn, reload_cse_move2add): Similar.
16110 2023-06-04 Pan Li <pan2.li@intel.com>
16112 * config/riscv/riscv-vector-builtins-types.def
16113 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
16114 (vfloat16mf2_t): Likewise.
16115 (vfloat16m1_t): Likewise.
16116 (vfloat16m2_t): Likewise.
16117 (vfloat16m4_t): Likewise.
16118 (vfloat16m8_t): Likewise.
16119 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
16120 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
16121 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
16122 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
16125 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
16127 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
16130 2023-06-03 Die Li <lidie@eswincomputing.com>
16132 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
16134 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16136 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
16138 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16140 * config/riscv/vector.md: Add vector-opt.md.
16141 * config/riscv/autovec-opt.md: New file.
16143 2023-06-03 liuhongt <hongtao.liu@intel.com>
16145 PR tree-optimization/110067
16146 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
16147 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
16149 2023-06-03 liuhongt <hongtao.liu@intel.com>
16152 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
16153 (truncv2si<mode>2): Ditto.
16155 2023-06-02 Andrew Pinski <apinski@marvell.com>
16157 PR rtl-optimization/102733
16158 * dse.cc (store_info): Add addrspace field.
16159 (record_store): Record the address space
16160 and check to make sure they are the same.
16162 2023-06-02 Andrew Pinski <apinski@marvell.com>
16164 PR rtl-optimization/110042
16165 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
16166 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
16168 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
16171 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
16172 Make sure that we do not have a cap on field alignment before altering
16173 the struct layout based on the type alignment of the first entry.
16175 2023-06-02 David Faust <david.faust@oracle.com>
16178 * btfout.cc (btf_absolute_func_id): New function.
16179 (btf_asm_func_type): Call it here. Change index parameter from
16180 size_t to ctf_id_t. Use PRIu64 formatter.
16182 2023-06-02 Alex Coplan <alex.coplan@arm.com>
16184 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
16185 (btf_asm_datasec_type): Likewise.
16187 2023-06-02 Carl Love <cel@us.ibm.com>
16189 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
16190 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
16192 2023-06-02 Jason Merrill <jason@redhat.com>
16196 * tree.h (DECL_MERGEABLE): New.
16197 * tree-core.h (struct tree_decl_common): Mention it.
16198 * gimplify.cc (gimplify_init_constructor): Check it.
16199 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
16200 * varasm.cc (categorize_decl_for_section): Likewise.
16202 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
16204 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
16205 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
16206 (stack_regs_mentioned_p): Change return type from int to bool
16207 and adjust function body accordingly.
16208 (stack_regs_mentioned): Ditto.
16209 (check_asm_stack_operands): Ditto. Change "malformed_asm"
16211 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
16212 (swap_rtx_condition_1): Change return type from int to bool
16213 and adjust function body accordingly. Change "r" variable to bool.
16214 (swap_rtx_condition): Change return type from int to bool
16215 and adjust function body accordingly.
16216 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
16217 (subst_stack_regs): Ditto.
16218 (convert_regs_entry): Change return type from int to bool and adjust
16219 function body accordingly. Change "inserted" variable to bool.
16220 (convert_regs_1): Recode handling of control_flow_insn_deleted.
16221 (convert_regs_2): Recode handling of cfg_altered.
16222 (convert_regs): Ditto. Change "inserted" variable to bool.
16224 2023-06-02 Jason Merrill <jason@redhat.com>
16227 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
16228 (initializer_constant_valid_p_1): Compare float precision.
16230 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
16232 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
16235 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16237 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
16238 (vect_set_loop_condition_partial_vectors): Ditto.
16240 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
16243 * config/avr/avr.md: Add an RTL peephole to optimize operations on
16244 non-LD_REGS after a move from LD_REGS.
16245 (piaop): New code iterator.
16247 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
16250 * doc/install.texi: Document (optional) Perl usage for parallel
16251 testing of libgomp.
16253 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
16256 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
16259 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16260 KuanLin Chen <best124612@gmail.com>
16262 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
16263 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
16265 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16267 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
16269 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16271 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
16273 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16275 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
16277 (DEF_RVV_FRM_ENUM): Ditto.
16279 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16281 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
16282 intrinsic API expander
16283 * config/riscv/vector.md
16284 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
16285 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
16286 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
16288 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16290 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
16291 * config/riscv/predicates.md (vector_perm_operand): New predicate.
16292 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16293 (expand_vec_perm): New function.
16294 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
16295 (gen_const_vector_dup): Ditto.
16296 (emit_vlmax_gather_insn): Ditto.
16297 (emit_vlmax_masked_gather_mu_insn): Ditto.
16298 (expand_vec_perm): Ditto.
16300 2023-06-01 Jason Merrill <jason@redhat.com>
16302 * doc/invoke.texi (-Wpedantic): Improve clarity.
16304 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
16306 * rtl.h (exp_equiv_p): Change return type from int to bool.
16307 * cse.cc (mention_regs): Change return type from int to bool
16308 and adjust function body accordingly.
16309 (exp_equiv_p): Ditto.
16310 (insert_regs): Ditto. Change "modified" function argument to bool
16311 and update usage accordingly.
16312 (record_jump_cond): Remove always zero "reversed_nonequality"
16313 function argument and update usage accordingly.
16314 (fold_rtx): Change "changed" variable to bool.
16315 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
16316 (is_dead_reg): Change return type from int to bool.
16318 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16320 * config/xtensa/xtensa.md (adddi3, subdi3):
16321 New RTL generation patterns implemented according to the instruc-
16322 tion idioms described in the Xtensa ISA reference manual (p. 600).
16324 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
16325 Uros Bizjak <ubizjak@gmail.com>
16328 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
16329 CODE_for_sse4_1_ptestzv2di.
16330 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
16331 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
16332 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
16333 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
16334 when expanding UNSPEC_PTEST to compare against zero.
16335 * config/i386/i386-features.cc (scalar_chain::convert_compare):
16336 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
16337 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
16338 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
16339 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
16340 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
16341 check for suitable matching modes for the UNSPEC_PTEST pattern.
16342 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
16343 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
16344 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
16345 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
16346 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
16347 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
16348 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
16350 (*ptest<mode>_and): Specify CCZ to only perform this optimization
16351 when only the Z flag is required.
16353 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
16356 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
16358 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16360 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
16361 Add =r,m and =r,m alternatives.
16362 (load_pair<DREG:mode><DREG2:mode>): Likewise.
16363 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
16365 2023-06-01 Pan Li <pan2.li@intel.com>
16367 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
16369 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
16370 (main): Disable FP16 tuple.
16371 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
16372 (TARGET_VECTOR_ELEN_FP_16): Ditto.
16373 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
16375 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
16376 (vfloat16mf2_t): Ditto.
16377 (vfloat16m1_t): Ditto.
16378 (vfloat16m2_t): Ditto.
16379 (vfloat16m4_t): Ditto.
16380 (vfloat16m8_t): Ditto.
16381 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
16383 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
16384 machine mode based on TARGET_VECTOR_ELEN_FP_16.
16386 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16388 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
16389 (DEF_RVV_FRM_ENUM): New macro.
16390 (handle_pragma_vector): Add FRM enum
16391 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
16398 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
16399 Richard Sandiford <richard.sandiford@arm.com>
16401 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
16402 Update call to wi::bswap.
16403 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
16404 Update call to wi::bswap.
16405 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
16406 Update calls to wi::bswap.
16407 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
16408 (wi::bswap_large): New function, with revised API.
16409 * wide-int.h (wi::bswap): New (template) function prototype.
16410 (wide_int_storage::bswap): Remove method.
16411 (sext_large, zext_large): Consistent indentation/line wrapping.
16412 (bswap_large): Prototype helper function containing implementation.
16413 (wi::bswap): New template wrapper around bswap_large.
16415 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16418 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
16419 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
16420 (usdot_prod<vsi2qi>): Rename to...
16421 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
16422 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
16423 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
16424 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
16425 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
16426 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
16427 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
16430 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16433 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
16434 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
16435 (aarch64_sq<r>dmulh_n<mode>): Rename to...
16436 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
16437 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
16438 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
16439 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
16440 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
16441 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
16442 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
16443 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
16444 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
16445 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
16446 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
16448 2023-05-31 David Faust <david.faust@oracle.com>
16450 * btfout.cc (btf_kind_names): New.
16451 (btf_kind_name): New.
16452 (btf_absolute_var_id): New utility function.
16453 (btf_relative_var_id): Likewise.
16454 (btf_relative_func_id): Likewise.
16455 (btf_absolute_datasec_id): Likewise.
16456 (btf_asm_type_ref): New.
16457 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
16458 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
16459 (btf_asm_varent): Likewise.
16460 (btf_asm_func_arg): Likewise.
16461 (btf_asm_datasec_entry): Likewise.
16462 (btf_asm_datasec_type): Likewise.
16463 (btf_asm_func_type): Likewise. Add index parameter.
16464 (btf_asm_enum_const): Likewise.
16465 (btf_asm_sou_member): Likewise.
16466 (output_btf_vars): Update btf_asm_* call accordingly.
16467 (output_asm_btf_sou_fields): Likewise.
16468 (output_asm_btf_enum_list): Likewise.
16469 (output_asm_btf_func_args_list): Likewise.
16470 (output_asm_btf_vlen_bytes): Likewise.
16471 (output_btf_func_types): Add ctf_container_ref parameter.
16472 Pass it to btf_asm_func_type.
16473 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
16474 (btf_output): Update output_btf_func_types call similarly.
16476 2023-05-31 David Faust <david.faust@oracle.com>
16478 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
16479 and BTF_KIND_FWD which do not use the size/type field at all.
16481 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
16483 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
16484 (active_insn_p): Ditto.
16485 (in_sequence_p): Ditto.
16486 (unshare_all_rtl): Change return type from int to void.
16487 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
16488 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
16489 and adjust function body accordingly.
16490 (mem_expr_equal_p): Ditto.
16491 (unshare_all_rtl): Change return type from int to void
16492 and adjust function body accordingly.
16493 (verify_rtx_sharing): Remove unneeded return.
16494 (active_insn_p): Change return type from int to bool
16495 and adjust function body accordingly.
16496 (in_sequence_p): Ditto.
16498 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
16500 * rtl.h (true_dependence): Change return type from int to bool.
16501 (canon_true_dependence): Ditto.
16502 (read_dependence): Ditto.
16503 (anti_dependence): Ditto.
16504 (canon_anti_dependence): Ditto.
16505 (output_dependence): Ditto.
16506 (canon_output_dependence): Ditto.
16507 (may_alias_p): Ditto.
16508 * alias.h (alias_sets_conflict_p): Ditto.
16509 (alias_sets_must_conflict_p): Ditto.
16510 (objects_must_conflict_p): Ditto.
16511 (nonoverlapping_memrefs_p): Ditto.
16512 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
16513 (record_set): Ditto.
16514 (base_alias_check): Ditto.
16515 (find_base_value): Ditto.
16516 (mems_in_disjoint_alias_sets_p): Ditto.
16517 (get_alias_set_entry): Ditto.
16518 (decl_for_component_ref): Ditto.
16519 (write_dependence_p): Ditto.
16520 (memory_modified_1): Ditto.
16521 (mems_in_disjoint_alias_set_p): Change return type from int to bool
16522 and adjust function body accordingly.
16523 (alias_sets_conflict_p): Ditto.
16524 (alias_sets_must_conflict_p): Ditto.
16525 (objects_must_conflict_p): Ditto.
16526 (rtx_equal_for_memref_p): Ditto.
16527 (base_alias_check): Ditto.
16528 (read_dependence): Ditto.
16529 (nonoverlapping_memrefs_p): Ditto.
16530 (true_dependence_1): Ditto.
16531 (true_dependence): Ditto.
16532 (canon_true_dependence): Ditto.
16533 (write_dependence_p): Ditto.
16534 (anti_dependence): Ditto.
16535 (canon_anti_dependence): Ditto.
16536 (output_dependence): Ditto.
16537 (canon_output_dependence): Ditto.
16538 (may_alias_p): Ditto.
16539 (init_alias_analysis): Change "changed" variable to bool.
16541 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16543 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
16544 expand into define_insn_and_split.
16546 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16548 * config/riscv/vector.md: Remove FRM.
16550 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16552 * config/riscv/vector.md: Remove FRM.
16554 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16556 * config/riscv/vector.md: Remove FRM.
16558 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
16561 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
16564 2023-05-31 Richard Biener <rguenther@suse.de>
16567 PR tree-optimization/109143
16568 * tree-ssa-structalias.cc (struct topo_info): Remove.
16569 (init_topo_info): Likewise.
16570 (free_topo_info): Likewise.
16571 (compute_topo_order): Simplify API, put the component
16572 with ESCAPED last so it's processed first.
16573 (topo_visit): Adjust.
16574 (solve_graph): Likewise.
16576 2023-05-31 Richard Biener <rguenther@suse.de>
16578 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
16580 (add_graph_edge): Count redundant edges we avoid to create.
16581 (dump_sa_stats): Dump them.
16582 (ipa_pta_execute): Do not dump generating constraints when
16583 we are not dumping them.
16585 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16587 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
16588 output template to avoid explicit switch on which_alternative.
16589 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
16590 (and<mode>3): Likewise.
16591 (ior<mode>3): Likewise.
16592 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
16594 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16596 * config/xtensa/predicates.md (xtensa_bit_join_operator):
16598 * config/xtensa/xtensa.md (ior_op): Remove.
16599 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
16600 insn_and_split pattern of the same name to express and capture
16601 the bit-combining operation with both sides swapped.
16602 In addition, replace use of code iterator with new operator
16604 (*shlrd_const, *shlrd_per_byte):
16605 Likewise regarding the code iterator.
16607 2023-05-31 Cui, Lili <lili.cui@intel.com>
16609 PR tree-optimization/110038
16610 * params.opt: Add a limit on tree-reassoc-width.
16611 * tree-ssa-reassoc.cc
16612 (rewrite_expr_tree_parallel): Add width limit.
16614 2023-05-31 Pan Li <pan2.li@intel.com>
16616 * common/config/riscv/riscv-common.cc:
16617 (riscv_implied_info): Add zvfh item.
16618 (riscv_ext_version_table): Ditto.
16619 (riscv_ext_flag_table): Ditto.
16620 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
16621 (TARGET_ZVFH): Ditto.
16623 2023-05-30 liuhongt <hongtao.liu@intel.com>
16625 PR tree-optimization/108804
16626 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
16627 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
16628 Add new parameter narrow_src_p.
16629 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
16630 vectorization by truncating to lower precision.
16631 * tree-vectorizer.h (vect_get_range_info): New declare.
16633 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
16635 * lra-int.h (lra_update_sp_offset): Add the prototype.
16636 * lra.cc (setup_sp_offset): Change the return type. Use
16637 lra_update_sp_offset.
16638 * lra-eliminations.cc (lra_update_sp_offset): New function.
16639 (lra_process_new_insns): Push the current insn to reprocess if the
16640 input reload changes sp offset.
16642 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
16645 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
16646 Fix misleading identation.
16648 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
16650 * rtl.h (comparison_dominates_p): Change return type from int to bool.
16651 (condjump_p): Ditto.
16652 (any_condjump_p): Ditto.
16653 (any_uncondjump_p): Ditto.
16654 (simplejump_p): Ditto.
16655 (returnjump_p): Ditto.
16656 (eh_returnjump_p): Ditto.
16657 (onlyjump_p): Ditto.
16658 (invert_jump_1): Ditto.
16659 (invert_jump): Ditto.
16660 (rtx_renumbered_equal_p): Ditto.
16661 (redirect_jump_1): Ditto.
16662 (redirect_jump): Ditto.
16663 (condjump_in_parallel_p): Ditto.
16664 * jump.cc (invert_exp_1): Adjust forward declaration.
16665 (comparison_dominates_p): Change return type from int to bool
16666 and adjust function body accordingly.
16667 (simplejump_p): Ditto.
16668 (condjump_p): Ditto.
16669 (condjump_in_parallel_p): Ditto.
16670 (any_uncondjump_p): Ditto.
16671 (any_condjump_p): Ditto.
16672 (returnjump_p): Ditto.
16673 (eh_returnjump_p): Ditto.
16674 (onlyjump_p): Ditto.
16675 (redirect_jump_1): Ditto.
16676 (redirect_jump): Ditto.
16677 (invert_exp_1): Ditto.
16678 (invert_jump_1): Ditto.
16679 (invert_jump): Ditto.
16680 (rtx_renumbered_equal_p): Ditto.
16682 2023-05-30 Andrew Pinski <apinski@marvell.com>
16684 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
16685 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
16686 Add ne as a possible cmp.
16687 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
16689 2023-05-30 Andrew Pinski <apinski@marvell.com>
16691 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
16694 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
16696 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
16697 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
16698 (and (extend X) C) as (zero_extend (and X C)), to also optimize
16699 modes wider than HOST_WIDE_INT.
16701 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
16704 * simplify-rtx.cc (simplify_const_relational_operation): Return
16705 early if we have a MODE_CC comparison that isn't a COMPARE against
16708 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
16710 * config/riscv/riscv.cc (riscv_const_insns): Allow
16711 const_vec_duplicates.
16713 2023-05-30 liuhongt <hongtao.liu@intel.com>
16715 PR middle-end/108938
16716 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
16717 function, cut from original find_bswap_or_nop function.
16718 (find_bswap_or_nop): Add a new parameter, detect bswap +
16719 rotate and save rotate result in the new parameter.
16720 (bswap_replace): Add a new parameter to indicate rotate and
16721 generate rotate stmt if needed.
16722 (maybe_optimize_vector_constructor): Adjust for new rotate
16723 parameter in the upper 2 functions.
16724 (pass_optimize_bswap::execute): Ditto.
16725 (imm_store_chain_info::output_merged_store): Ditto.
16727 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16729 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
16730 (aarch64_<su>adalp<mode>): New define_expand.
16731 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
16732 (aarch64_<su>addlp<mode>): Convert to define_expand.
16733 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
16734 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
16736 (USADDLP): Likewise.
16737 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
16739 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16741 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
16742 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
16743 srhadd, urhadd builtin codes for standard optab ones.
16744 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
16745 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
16747 (<u>avg<mode>3_ceil): Rename to...
16748 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
16750 (aarch64_<su>hsub<mode>): New define_expand.
16751 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
16752 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
16753 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
16755 2023-05-30 Andreas Schwab <schwab@suse.de>
16758 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
16759 match libsanitizer.
16761 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16763 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
16764 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
16766 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
16767 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
16768 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
16769 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
16770 (aarch64_<sra_op>sra_n<mode>): New define_expand.
16771 (aarch64_<sra_op>rsra_n<mode>): Likewise.
16772 (aarch64_<sur>sra_n<mode>): Rename to...
16773 (aarch64_<sur>sra_ndi): ... This.
16774 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
16775 any_target_p argument.
16776 (aarch64_extract_vec_duplicate_wide_int): Define.
16777 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
16778 (aarch64_const_vec_rnd_cst_p): Likewise.
16779 (aarch64_vector_mode_supported_any_target_p): Likewise.
16780 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
16781 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
16782 (VSRA): Adjust for the above.
16784 (V2XWIDE): New mode_attr.
16785 (vec_or_offset): Likewise.
16786 (SHIFTEXTEND): Likewise.
16787 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
16789 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
16790 clarify that it applies to current target options.
16791 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
16792 * doc/tm.texi.in: Regenerate.
16793 * stor-layout.cc (mode_for_vector): Check
16794 vector_mode_supported_any_target_p when iterating through vector modes.
16795 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
16796 clarify that it applies to current target options.
16797 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
16799 2023-05-30 Lili Cui <lili.cui@intel.com>
16801 PR tree-optimization/98350
16802 * tree-ssa-reassoc.cc
16803 (rewrite_expr_tree_parallel): Rewrite this function.
16804 (rank_ops_for_fma): New.
16805 (reassociate_bb): Handle new function.
16807 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
16809 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
16810 (rtx_unstable_p): Ditto.
16811 (reg_mentioned_p): Ditto.
16812 (reg_referenced_p): Ditto.
16813 (reg_used_between_p): Ditto.
16814 (reg_set_between_p): Ditto.
16815 (modified_between_p): Ditto.
16816 (no_labels_between_p): Ditto.
16817 (modified_in_p): Ditto.
16818 (reg_set_p): Ditto.
16819 (multiple_sets): Ditto.
16820 (set_noop_p): Ditto.
16821 (noop_move_p): Ditto.
16822 (reg_overlap_mentioned_p): Ditto.
16823 (dead_or_set_p): Ditto.
16824 (dead_or_set_regno_p): Ditto.
16825 (find_reg_fusage): Ditto.
16826 (find_regno_fusage): Ditto.
16827 (side_effects_p): Ditto.
16828 (volatile_refs_p): Ditto.
16829 (volatile_insn_p): Ditto.
16830 (may_trap_p_1): Ditto.
16831 (may_trap_p): Ditto.
16832 (may_trap_or_fault_p): Ditto.
16833 (computed_jump_p): Ditto.
16834 (auto_inc_p): Ditto.
16835 (loc_mentioned_in_p): Ditto.
16836 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
16837 (rtx_unstable_p): Change return type from int to bool
16838 and adjust function body accordingly.
16839 (rtx_addr_can_trap_p): Ditto.
16840 (reg_mentioned_p): Ditto.
16841 (no_labels_between_p): Ditto.
16842 (reg_used_between_p): Ditto.
16843 (reg_referenced_p): Ditto.
16844 (reg_set_between_p): Ditto.
16845 (reg_set_p): Ditto.
16846 (modified_between_p): Ditto.
16847 (modified_in_p): Ditto.
16848 (multiple_sets): Ditto.
16849 (set_noop_p): Ditto.
16850 (noop_move_p): Ditto.
16851 (reg_overlap_mentioned_p): Ditto.
16852 (dead_or_set_p): Ditto.
16853 (dead_or_set_regno_p): Ditto.
16854 (find_reg_fusage): Ditto.
16855 (find_regno_fusage): Ditto.
16856 (remove_node_from_insn_list): Ditto.
16857 (volatile_insn_p): Ditto.
16858 (volatile_refs_p): Ditto.
16859 (side_effects_p): Ditto.
16860 (may_trap_p_1): Ditto.
16861 (may_trap_p): Ditto.
16862 (may_trap_or_fault_p): Ditto.
16863 (computed_jump_p): Ditto.
16864 (auto_inc_p): Ditto.
16865 (loc_mentioned_in_p): Ditto.
16866 * combine.cc (can_combine_p): Update indirect function.
16868 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16870 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
16871 * config/riscv/iterators.md: New attribute.
16872 * config/riscv/vector-iterators.md: New attribute.
16874 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
16876 * config/riscv/riscv.md: Fix signed and unsigned comparison
16879 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16881 * config/riscv/autovec.md (fnma<mode>4): New pattern.
16882 (*fnma<mode>): Ditto.
16884 2023-05-29 Die Li <lidie@eswincomputing.com>
16886 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
16888 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
16889 process for TARGET_XTHEADCONDMOV
16891 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
16894 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
16895 TARGET_AVX512BW to generate truncv16hiv16qi2.
16897 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16899 * config/riscv/riscv.md (and<mode>3): New expander.
16900 (*and<mode>3) New pattern.
16901 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
16904 2023-05-29 Pan Li <pan2.li@intel.com>
16906 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
16907 comments and rename local variables.
16908 (emit_nonvlmax_insn): Diito.
16909 (emit_vlmax_merge_insn): Ditto.
16910 (emit_vlmax_cmp_insn): Ditto.
16911 (emit_vlmax_cmp_mu_insn): Ditto.
16912 (emit_scalar_move_insn): Ditto.
16914 2023-05-29 Pan Li <pan2.li@intel.com>
16916 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
16918 (emit_nonvlmax_insn): Ditto.
16919 (emit_vlmax_merge_insn): Ditto.
16920 (emit_vlmax_cmp_insn): Ditto.
16921 (emit_vlmax_cmp_mu_insn): Ditto.
16922 (expand_vec_series): Ditto.
16924 2023-05-29 Pan Li <pan2.li@intel.com>
16926 * config/riscv/riscv-protos.h (enum insn_type): New type.
16927 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
16928 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
16930 (rvv_builder::get_merged_repeating_sequence): Ditto.
16931 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
16932 to evaluate the optimization cost.
16933 (rvv_builder::get_merge_scalar_mask): New function to get the merge
16935 (emit_scalar_move_insn): New function to emit vmv.s.x.
16936 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
16937 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
16939 (get_repeating_sequence_dup_machine_mode): New function to get the dup
16941 (expand_vector_init_merge_repeating_sequence): New function to perform
16943 (expand_vec_init): Add this vector init optimization.
16944 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
16946 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
16948 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
16949 put onto the increment when it is inserted after the position.
16951 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
16953 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
16956 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16958 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
16960 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16962 * config/riscv/autovec.md (fma<mode>4): New pattern.
16963 (*fma<mode>): Ditto.
16964 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16965 (emit_vlmax_ternary_insn): New function.
16966 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
16968 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16970 * config/riscv/vector.md: Fix vimuladd instruction bug.
16972 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16974 * config/riscv/riscv.cc (global_state_unknown_p): New function.
16975 (riscv_mode_after): Fix incorrect VXM.
16977 2023-05-29 Pan Li <pan2.li@intel.com>
16979 * common/config/riscv/riscv-common.cc:
16980 (riscv_implied_info): Add zvfhmin item.
16981 (riscv_ext_version_table): Ditto.
16982 (riscv_ext_flag_table): Ditto.
16983 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
16984 (TARGET_ZFHMIN): Align indent.
16985 (TARGET_ZFH): Ditto.
16986 (TARGET_ZVFHMIN): New macro.
16988 2023-05-27 liuhongt <hongtao.liu@intel.com>
16991 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
16992 to VI_AVX2 to cover more modes.
16994 2023-05-27 liuhongt <hongtao.liu@intel.com>
16996 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
16997 Remove ATOM and ICELAKE(and later) core processors.
16999 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
17001 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
17003 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
17005 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
17008 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
17009 Juzhe Zhong <juzhe.zhong@rivai.ai>
17011 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
17013 (<optab><v_quad_trunc><mode>2): Dito.
17014 (<optab><v_oct_trunc><mode>2): Dito.
17015 (trunc<mode><v_double_trunc>2): Dito.
17016 (trunc<mode><v_quad_trunc>2): Dito.
17017 (trunc<mode><v_oct_trunc>2): Dito.
17018 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
17019 (autovectorize_vector_modes): Define.
17020 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
17022 (autovectorize_vector_modes): Implement hook.
17023 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
17024 Implement target hook.
17025 (riscv_vectorize_related_mode): Implement target hook.
17026 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
17027 (TARGET_VECTORIZE_RELATED_MODE): Define.
17028 * config/riscv/vector-iterators.md: Add lowercase versions of
17029 mode_attr iterators.
17031 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
17032 Tobias Burnus <tobias@codesourcery.com>
17034 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
17035 (ASM_SPEC): Use XNACKOPT.
17036 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
17037 (enum hsaco_attr_type): ... this, and generalize the names.
17038 (TARGET_XNACK): New macro.
17039 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
17041 (output_file_start): Update xnack handling.
17042 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
17043 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
17044 (sram_ecc_type): Rename to ...
17045 (hsaco_attr_type: ... this.)
17046 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
17047 (TEST_XNACK): Delete.
17048 (TEST_XNACK_ANY): New macro.
17049 (TEST_XNACK_ON): New macro.
17050 (main): Support the new -mxnack=on/off/any syntax.
17051 * doc/invoke.texi (-mxnack): Update for new syntax.
17053 2023-05-26 Andrew Pinski <apinski@marvell.com>
17055 * genmatch.cc (emit_debug_printf): New function.
17056 (dt_simplify::gen_1): Emit printf into the code
17057 before the `return true` or returning the folded result
17058 instead of emitting it always.
17060 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17062 * config/xtensa/xtensa-protos.h
17063 (xtensa_expand_block_set_unrolled_loop,
17064 xtensa_expand_block_set_small_loop): Remove.
17065 (xtensa_expand_block_set): New prototype.
17066 * config/xtensa/xtensa.cc
17067 (xtensa_expand_block_set_libcall): New subfunction.
17068 (xtensa_expand_block_set_unrolled_loop,
17069 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
17070 (xtensa_expand_block_set): New function that calls the above
17072 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
17073 xtensa_expand_block_set().
17075 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17077 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
17079 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
17081 * config/xtensa/constraints.md (O):
17082 Change to use the above function.
17083 * config/xtensa/xtensa.md (*subsi3_from_const):
17084 New insn_and_split pattern.
17086 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17088 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
17089 Retract excessive line folding, and correct the value of
17090 the "length" insn attribute related to TARGET_DENSITY.
17091 (*extzvsi-1bit_addsubx): Ditto.
17093 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
17095 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
17096 Do not disable call to ix86_expand_vecop_qihi2.
17098 2023-05-26 liuhongt <hongtao.liu@intel.com>
17102 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
17103 calculation when !hard_regno_mode_ok for GENERAL_REGS and
17104 mode, otherwise still use GENERAL_REGS.
17106 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17108 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
17109 explict VL and drop VL in ops.
17111 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
17113 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
17114 in different BB blocks.
17116 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
17118 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17119 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
17120 instructions when available. Emulate truncation via
17121 ix86_expand_vec_perm_const_1 when native truncate insn
17123 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
17124 when available. Trivially rename some variables.
17125 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
17126 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
17127 calculation of V*QImode emulations to account for generation of
17128 2x-wider mode instructions.
17129 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
17130 emulations to account for generation of 2x-wider mode instructions.
17132 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
17135 * config/avr/avr.cc (avr_can_inline_p): New static function.
17136 (TARGET_CAN_INLINE_P): Define to that function.
17138 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
17141 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
17142 Handle any bit position and use mode QISI.
17143 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
17144 of 2 insns for bit-transfer of respective style.
17146 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
17148 * config/arm/iterators.md (MVE_6): Remove.
17149 * config/arm/mve.md: Replace MVE_6 with MVE_5.
17151 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17152 Richard Sandiford <richard.sandiford@arm.com>
17154 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
17156 (vect_set_loop_controls_directly): Add decrement IV support.
17157 (vect_set_loop_condition_partial_vectors): Ditto.
17158 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
17160 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
17163 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17166 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
17167 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
17168 Fix canonicalization of PLUS operands.
17169 (aarch64_fcmla<rot><mode>): Rename to...
17170 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
17171 Fix canonicalization of PLUS operands.
17172 (aarch64_fcmla_lane<rot><mode>): Rename to...
17173 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
17174 Fix canonicalization of PLUS operands.
17175 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
17176 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
17177 Fix canonicalization of PLUS operands.
17178 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
17180 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
17182 * config/arm/arm.md (rbitsi2): Rename to...
17183 (arm_rbit): ... This.
17184 (ctzsi2): Adjust for the above.
17185 (arm_rev16si2): Convert to define_expand.
17186 (arm_rev16si2_alt1): New pattern.
17187 (arm_rev16si2_alt): Rename to...
17188 (*arm_rev16si2_alt2): ... This.
17189 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
17190 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
17191 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
17192 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
17194 2023-05-25 Alex Coplan <alex.coplan@arm.com>
17197 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
17199 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
17200 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
17201 DFmode as an rvalue.
17203 2023-05-25 Richard Biener <rguenther@suse.de>
17206 * tree-vect-stmts.cc (vectorizable_condition): For
17207 embedded comparisons also handle the case when the target
17208 only provides vec_cmp and vcond_mask.
17210 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
17212 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
17215 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17217 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
17218 (seq_cost_ignoring_scalar_moves): Likewise.
17219 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
17221 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17223 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
17224 (vcage_f32): Likewise.
17225 (vcages_f32): Likewise.
17226 (vcageq_f32): Likewise.
17227 (vcaged_f64): Likewise.
17228 (vcageq_f64): Likewise.
17229 (vcagts_f32): Likewise.
17230 (vcagt_f32): Likewise.
17231 (vcagt_f64): Likewise.
17232 (vcagtq_f32): Likewise.
17233 (vcagtd_f64): Likewise.
17234 (vcagtq_f64): Likewise.
17235 (vcale_f32): Likewise.
17236 (vcale_f64): Likewise.
17237 (vcaled_f64): Likewise.
17238 (vcales_f32): Likewise.
17239 (vcaleq_f32): Likewise.
17240 (vcaleq_f64): Likewise.
17241 (vcalt_f32): Likewise.
17242 (vcalt_f64): Likewise.
17243 (vcaltd_f64): Likewise.
17244 (vcaltq_f32): Likewise.
17245 (vcaltq_f64): Likewise.
17246 (vcalts_f32): Likewise.
17248 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
17252 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
17253 int to const int or const int to const unsigned int.
17254 (_mm512_mask_srli_epi16): Ditto.
17255 (_mm512_slli_epi16): Ditto.
17256 (_mm512_mask_slli_epi16): Ditto.
17257 (_mm512_maskz_slli_epi16): Ditto.
17258 (_mm512_srai_epi16): Ditto.
17259 (_mm512_mask_srai_epi16): Ditto.
17260 (_mm512_maskz_srai_epi16): Ditto.
17261 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
17262 (_mm512_mask_slli_epi64): Ditto.
17263 (_mm512_maskz_slli_epi64): Ditto.
17264 (_mm512_srli_epi64): Ditto.
17265 (_mm512_mask_srli_epi64): Ditto.
17266 (_mm512_maskz_srli_epi64): Ditto.
17267 (_mm512_srai_epi64): Ditto.
17268 (_mm512_mask_srai_epi64): Ditto.
17269 (_mm512_maskz_srai_epi64): Ditto.
17270 (_mm512_slli_epi32): Ditto.
17271 (_mm512_mask_slli_epi32): Ditto.
17272 (_mm512_maskz_slli_epi32): Ditto.
17273 (_mm512_srli_epi32): Ditto.
17274 (_mm512_mask_srli_epi32): Ditto.
17275 (_mm512_maskz_srli_epi32): Ditto.
17276 (_mm512_srai_epi32): Ditto.
17277 (_mm512_mask_srai_epi32): Ditto.
17278 (_mm512_maskz_srai_epi32): Ditto.
17279 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
17280 (_mm256_maskz_srai_epi16): Ditto.
17281 (_mm_mask_srai_epi16): Ditto.
17282 (_mm_maskz_srai_epi16): Ditto.
17283 (_mm256_mask_slli_epi16): Ditto.
17284 (_mm256_maskz_slli_epi16): Ditto.
17285 (_mm_mask_slli_epi16): Ditto.
17286 (_mm_maskz_slli_epi16): Ditto.
17287 (_mm_maskz_srli_epi16): Ditto.
17288 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
17289 (_mm256_maskz_srli_epi32): Ditto.
17290 (_mm_mask_srli_epi32): Ditto.
17291 (_mm_maskz_srli_epi32): Ditto.
17292 (_mm256_mask_srli_epi64): Ditto.
17293 (_mm256_maskz_srli_epi64): Ditto.
17294 (_mm_mask_srli_epi64): Ditto.
17295 (_mm_maskz_srli_epi64): Ditto.
17296 (_mm256_mask_srai_epi32): Ditto.
17297 (_mm256_maskz_srai_epi32): Ditto.
17298 (_mm_mask_srai_epi32): Ditto.
17299 (_mm_maskz_srai_epi32): Ditto.
17300 (_mm256_srai_epi64): Ditto.
17301 (_mm256_mask_srai_epi64): Ditto.
17302 (_mm256_maskz_srai_epi64): Ditto.
17303 (_mm_srai_epi64): Ditto.
17304 (_mm_mask_srai_epi64): Ditto.
17305 (_mm_maskz_srai_epi64): Ditto.
17306 (_mm_mask_slli_epi32): Ditto.
17307 (_mm_maskz_slli_epi32): Ditto.
17308 (_mm_mask_slli_epi64): Ditto.
17309 (_mm_maskz_slli_epi64): Ditto.
17310 (_mm256_mask_slli_epi32): Ditto.
17311 (_mm256_maskz_slli_epi32): Ditto.
17312 (_mm256_mask_slli_epi64): Ditto.
17313 (_mm256_maskz_slli_epi64): Ditto.
17315 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17317 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
17320 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17322 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
17323 * data-streamer-out.cc (streamer_write_vrange): Same.
17324 * value-range.h (class vrange): Make streamer_write_vrange a friend.
17326 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17328 * value-query.cc (range_query::get_tree_range): Set NAN directly
17330 * value-range.cc (frange::set): Assert that bounds are not NAN.
17332 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17334 * value-range.cc (add_vrange): Handle known NANs.
17336 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17338 * value-range.h (frange::set_nan): New.
17340 2023-05-25 Alexandre Oliva <oliva@adacore.com>
17343 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
17344 requires stricter alignment than MEM's.
17346 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17348 PR tree-optimization/107822
17349 PR tree-optimization/107986
17350 * Makefile.in (OBJS): Add gimple-range-phi.o.
17351 * gimple-range-cache.h (ranger_cache::m_estimate): New
17352 phi_analyzer pointer member.
17353 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
17354 phi_analyzer if no loop info is available.
17355 * gimple-range-phi.cc: New file.
17356 * gimple-range-phi.h: New file.
17357 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
17359 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17361 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
17363 (fold_range): Add range_query parameter.
17364 (fur_relation::fur_relation): New.
17365 (fur_relation::trio): New.
17366 (fur_relation::register_relation): New.
17367 (fold_relations): New.
17368 * gimple-range-fold.h (fold_range): Adjust prototypes.
17369 (fold_relations): New.
17371 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17373 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
17374 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
17375 (ranger_cache::const_query): New.
17376 * gimple-range.cc (gimple_ranger::const_query): New.
17377 * gimple-range.h (gimple_ranger::const_query): New prototype.
17379 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17381 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
17382 (ssa_cache::dump_range_query): Delete.
17383 (ssa_lazy_cache::dump_range_query): Delete.
17384 (ssa_lazy_cache::get_range): Move from header file.
17385 (ssa_lazy_cache::clear_range): ditto.
17386 (ssa_lazy_cache::clear): Ditto.
17387 * gimple-range-cache.h (class ssa_cache): Virtualize.
17388 (class ssa_lazy_cache): Inherit and virtualize.
17390 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
17392 * value-range.h (vrange::kind): Remove.
17394 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
17396 PR middle-end/109840
17397 * match.pd <popcount optimizations>: Preserve zero-extension when
17398 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
17399 popcount((T)x), so the popcount's argument keeps the same type.
17400 <parity optimizations>: Likewise preserve extensions when
17401 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
17402 parity((T)x), so that the parity's argument type is the same.
17404 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
17406 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
17407 (ipcp_store_vr_results): Same.
17408 * ipa-prop.cc (ipa_vr::ipa_vr): New.
17409 (ipa_vr::get_vrange): New.
17410 (ipa_vr::set_unknown): New.
17411 (ipa_vr::streamer_read): New.
17412 (ipa_vr::streamer_write): New.
17413 (write_ipcp_transformation_info): Use new ipa_vr API.
17414 (read_ipcp_transformation_info): Same.
17415 (ipa_vr::nonzero_p): Delete.
17416 (ipcp_update_vr): Use new ipa_vr API.
17417 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
17418 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
17420 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
17422 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
17423 silence overflow warnings later on.
17425 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
17427 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17428 Remove handling of V8QImode.
17429 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
17430 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
17431 (v<insn>v4qi3): Ditto.
17432 * config/i386/sse.md (v<insn>v8qi3): Remove.
17434 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17437 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
17438 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
17439 (aarch64_simd_ashr<mode>): Rename to...
17440 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
17441 (aarch64_simd_imm_shl<mode>): Rename to...
17442 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
17443 (aarch64_simd_reg_sshl<mode>): Rename to...
17444 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
17445 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
17446 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
17447 (aarch64_simd_reg_shl<mode>_signed): Rename to...
17448 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
17449 (vec_shr_<mode>): Rename to...
17450 (vec_shr_<mode><vczle><vczbe>): ... This.
17451 (aarch64_<sur>shl<mode>): Rename to...
17452 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
17453 (aarch64_<sur>q<r>shl<mode>): Rename to...
17454 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
17456 2023-05-24 Richard Biener <rguenther@suse.de>
17459 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
17460 Perform final vector composition using
17461 ix86_expand_vector_init_general instead of setting
17462 the highpart and lowpart which causes spilling.
17464 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17466 PR tree-optimization/109695
17467 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
17469 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
17470 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
17471 flag to set_global_range.
17472 (gimple_ranger::prefill_stmt_dependencies): Ditto.
17474 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17476 PR tree-optimization/109695
17477 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
17479 (temporal_cache::current_p): Check always_current method.
17480 (temporal_cache::set_always_current): Add param and set value
17482 (temporal_cache::always_current_p): New.
17483 (ranger_cache::get_global_range): Adjust.
17484 (ranger_cache::set_global_range): set always current first.
17486 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17488 PR tree-optimization/109695
17489 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
17490 fold_range with global query to choose an initial value.
17492 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17494 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
17497 2023-05-24 Richard Biener <rguenther@suse.de>
17499 PR tree-optimization/109849
17500 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
17501 expressions but take the first sets.
17503 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
17506 * doc/gm2.texi (High procedure function): New node.
17507 (Using): New menu entry for High procedure function.
17509 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
17511 PR rtl-optimization/109940
17512 * early-remat.cc (postorder_index): Rename to...
17513 (rpo_index): ...this.
17514 (compare_candidates): Sort by decreasing rpo_index rather than
17515 increasing postorder_index.
17516 (early_remat::sort_candidates): Calculate the forward RPO from
17518 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
17519 rather than DF_BACKWARD in reverse.
17521 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17524 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
17525 qualifier_none for the return operand.
17527 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17529 * config/riscv/autovec.md (<optab><mode>3): New pattern.
17530 (one_cmpl<mode>2): Ditto.
17531 (*<optab>not<mode>): Ditto.
17532 (*n<optab><mode>): Ditto.
17533 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
17536 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
17538 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
17539 calculation on n_perms by considering nvectors_per_build.
17541 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17542 Richard Sandiford <richard.sandiford@arm.com>
17544 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
17545 (vec_cmp<mode><vm>): New pattern.
17546 (vec_cmpu<mode><vm>): New pattern.
17547 (vcond<V:mode><VI:mode>): New pattern.
17548 (vcondu<V:mode><VI:mode>): New pattern.
17549 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
17550 (emit_vlmax_merge_insn): New function.
17551 (emit_vlmax_cmp_insn): Ditto.
17552 (emit_vlmax_cmp_mu_insn): Ditto.
17553 (expand_vec_cmp): Ditto.
17554 (expand_vec_cmp_float): Ditto.
17555 (expand_vcond): Ditto.
17556 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
17557 (emit_vlmax_cmp_insn): Ditto.
17558 (emit_vlmax_cmp_mu_insn): Ditto.
17559 (get_cmp_insn_code): Ditto.
17560 (expand_vec_cmp): Ditto.
17561 (expand_vec_cmp_float): Ditto.
17562 (expand_vcond): Ditto.
17564 2023-05-24 Pan Li <pan2.li@intel.com>
17566 * config/riscv/genrvv-type-indexer.cc (main): Add
17567 unsigned_eew*_lmul1_interpret for indexer.
17568 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
17569 Register vuint*m1_t interpret function.
17570 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
17571 New macro for vuint8m1_t.
17572 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
17573 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
17574 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
17575 (vbool1_t): Add to unsigned_eew*_interpret_ops.
17576 (vbool2_t): Likewise.
17577 (vbool4_t): Likewise.
17578 (vbool8_t): Likewise.
17579 (vbool16_t): Likewise.
17580 (vbool32_t): Likewise.
17581 (vbool64_t): Likewise.
17582 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
17583 New macro for vuint*m1_t.
17584 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
17585 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
17586 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
17587 (required_extensions_p): Add vuint*m1_t interpret case.
17588 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
17589 Add vuint*m1_t interpret to base type.
17590 (unsigned_eew16_lmul1_interpret): Likewise.
17591 (unsigned_eew32_lmul1_interpret): Likewise.
17592 (unsigned_eew64_lmul1_interpret): Likewise.
17594 2023-05-24 Pan Li <pan2.li@intel.com>
17596 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
17597 for the eew size list.
17598 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
17599 (main): Add signed_eew*_lmul1_interpret for indexer.
17600 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
17601 Register vint*m1_t interpret function.
17602 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
17603 New macro for vint8m1_t.
17604 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
17605 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
17606 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
17607 (vbool1_t): Add to signed_eew*_interpret_ops.
17608 (vbool2_t): Likewise.
17609 (vbool4_t): Likewise.
17610 (vbool8_t): Likewise.
17611 (vbool16_t): Likewise.
17612 (vbool32_t): Likewise.
17613 (vbool64_t): Likewise.
17614 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
17615 New macro for vint*m1_t.
17616 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
17617 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
17618 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
17619 (required_extensions_p): Add vint8m1_t interpret case.
17620 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
17621 Add vint*m1_t interpret to base type.
17622 (signed_eew16_lmul1_interpret): Likewise.
17623 (signed_eew32_lmul1_interpret): Likewise.
17624 (signed_eew64_lmul1_interpret): Likewise.
17626 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17628 * config/riscv/autovec.md: Adjust for new interface.
17629 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
17630 (emit_nonvlmax_insn): Add AVL operand.
17631 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
17632 (emit_nonvlmax_insn): Add AVL operand.
17633 (sew64_scalar_helper): Adjust for new interface.
17634 (expand_tuple_move): Ditto.
17635 * config/riscv/vector.md: Ditto.
17637 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17639 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
17640 (expand_const_vector): Ditto.
17641 (legitimize_move): Ditto.
17642 (sew64_scalar_helper): Ditto.
17643 (expand_tuple_move): Ditto.
17644 (expand_vector_init_insert_elems): Ditto.
17645 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
17647 2023-05-24 liuhongt <hongtao.liu@intel.com>
17650 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
17651 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
17652 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
17653 (ix86_masked_all_ones): Handle 64-bit mask.
17654 * config/i386/i386-builtin.def: Replace icode of related
17655 non-mask simd abs builtins with CODE_FOR_nothing.
17657 2023-05-23 Martin Uecker <uecker@tugraz.at>
17660 * function.cc (gimplify_parm_type): Remove function.
17661 (gimplify_parameters): Call gimplify_type_sizes.
17663 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17665 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
17666 and change to also accept '*subx' pattern.
17669 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17671 * config/xtensa/predicates.md (addsub_operator): New.
17672 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
17673 *extzvsi-1bit_addsubx): New insn_and_split patterns.
17674 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
17675 Add a special case about ifcvt 'noce_try_cmove()' to handle
17676 constant loads that do not fit into signed 12 bits in the
17677 patterns added above.
17679 2023-05-23 Richard Biener <rguenther@suse.de>
17681 PR tree-optimization/109747
17682 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
17683 the SLP node only once to the cost hook.
17685 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
17687 * config/avr/avr.cc (avr_insn_cost): New static function.
17688 (TARGET_INSN_COST): Define to that function.
17690 2023-05-23 Richard Biener <rguenther@suse.de>
17693 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
17694 For vector construction or splats apply GPR->XMM move
17695 costing. QImode memory can be handled directly only
17696 with SSE4.1 pinsrb.
17698 2023-05-23 Richard Biener <rguenther@suse.de>
17700 PR tree-optimization/108752
17701 * tree-vect-stmts.cc (vectorizable_operation): For bit
17702 operations with generic word_mode vectors do not cost
17703 an extra stmt. For plus, minus and negate also cost the
17704 constant materialization.
17706 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
17708 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
17709 Call ix86_expand_vec_shift_qihi_constant for shifts
17710 with constant count operand.
17711 * config/i386/i386.cc (ix86_shift_rotate_cost):
17712 Handle V4QImode and V8QImode.
17713 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
17714 (<insn>v4qi3): Ditto.
17716 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17718 * config/riscv/vector.md: Add mode.
17720 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
17722 PR tree-optimization/109934
17723 * value-range.cc (irange::invert): Remove buggy special case.
17725 2023-05-23 Richard Biener <rguenther@suse.de>
17727 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
17730 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
17733 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
17734 subregs between any scalars that are 64 bits or smaller.
17735 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
17736 (bits_etype): New int attribute.
17737 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
17738 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
17739 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
17741 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
17743 * doc/md.texi: Document that <FOO> can be used to refer to the
17744 numerical value of an int iterator FOO. Tweak other parts of
17745 the int iterator documentation.
17746 * read-rtl.cc (iterator_group::has_self_attr): New field.
17747 (map_attr_string): When has_self_attr is true, make <FOO>
17748 expand to the current value of iterator FOO.
17749 (initialize_iterators): Set has_self_attr for int iterators.
17751 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17753 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
17754 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
17755 (RVV_UNOP_NUM): New macro.
17756 (RVV_BINOP_NUM): Ditto.
17757 (legitimize_move): Refactor the framework of RVV auto-vectorization.
17758 (emit_vlmax_op): Ditto.
17759 (emit_vlmax_reg_op): Ditto.
17760 (emit_len_op): Ditto.
17761 (emit_len_binop): Ditto.
17762 (emit_vlmax_tany_many): Ditto.
17763 (emit_nonvlmax_tany_many): Ditto.
17764 (sew64_scalar_helper): Ditto.
17765 (expand_tuple_move): Ditto.
17766 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
17767 (emit_pred_binop): Ditto.
17768 (emit_vlmax_op): Ditto.
17769 (emit_vlmax_tany_many): New function.
17770 (emit_len_op): Remove.
17771 (emit_nonvlmax_tany_many): New function.
17772 (emit_vlmax_reg_op): Remove.
17773 (emit_len_binop): Ditto.
17774 (emit_index_op): Ditto.
17775 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
17776 (expand_const_vector): Ditto.
17777 (legitimize_move): Ditto.
17778 (sew64_scalar_helper): Ditto.
17779 (expand_tuple_move): Ditto.
17780 (expand_vector_init_insert_elems): Ditto.
17781 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
17782 * config/riscv/vector.md: Ditto.
17784 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17787 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
17788 and constraint for operand 0.
17789 (add_vec_concat_subst_be): Likewise.
17791 2023-05-23 Richard Biener <rguenther@suse.de>
17793 PR tree-optimization/109849
17794 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
17795 and use that to determine what to hoist.
17797 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
17799 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
17800 specific treatment for bit-fields only if they have an integral type
17801 and filter out non-integral bit-fields that do not start and end on
17804 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
17806 PR tree-optimization/109920
17807 * value-range.h (RESIZABLE>::~int_range): Use delete[].
17809 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
17811 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
17812 calcuation of integer vector mode costs to reflect generated
17813 instruction sequences of different integer vector modes and
17814 different target ABIs. Remove "speed" function argument.
17815 (ix86_rtx_costs): Update call for removed function argument.
17816 (ix86_vector_costs::add_stmt_cost): Ditto.
17818 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
17820 * value-range.h (class Value_Range): Implement set_zero,
17821 set_nonzero, and nonzero_p.
17823 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
17825 * config/i386/i386.cc (ix86_multiplication_cost): Add
17826 the cost of a memory read to the cost of V?QImode sequences.
17828 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17830 * config/riscv/riscv-v.cc: Add "m_" prefix.
17832 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17834 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
17835 multiple-rgroup of length.
17836 * tree-vect-stmts.cc (vectorizable_store): Ditto.
17837 (vectorizable_load): Ditto.
17838 * tree-vectorizer.h (vect_get_loop_len): Ditto.
17840 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17842 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
17845 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
17847 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
17848 handling for the case index == count.
17850 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
17853 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
17854 Don't fold to XOR / AND / XOR if just one bit is copied to the
17857 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
17859 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
17860 builtin for bit reversal using brev instruction.
17861 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
17862 NVPTX_BUILTIN_BREVLL.
17863 (nvptx_init_builtins): Define "brev" and "brevll".
17864 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
17865 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
17866 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
17867 section, document __builtin_nvptx_brev{,ll}.
17869 2023-05-21 Jakub Jelinek <jakub@redhat.com>
17871 PR tree-optimization/109505
17872 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
17873 Combine successive equal operations with constants,
17874 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
17875 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
17878 2023-05-21 Andrew Pinski <apinski@marvell.com>
17880 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
17882 2023-05-21 Pan Li <pan2.li@intel.com>
17884 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
17885 rest bool size, aka 2, 4, 8, 16, 32, 64.
17886 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
17887 Register vbool[2|4|8|16|32|64] interpret function.
17888 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
17889 New macro for vbool2_t.
17890 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
17891 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
17892 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
17893 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
17894 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
17895 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
17896 (vint16m1_t): Likewise.
17897 (vint32m1_t): Likewise.
17898 (vint64m1_t): Likewise.
17899 (vuint8m1_t): Likewise.
17900 (vuint16m1_t): Likewise.
17901 (vuint32m1_t): Likewise.
17902 (vuint64m1_t): Likewise.
17903 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
17904 New macro for vbool2_t.
17905 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
17906 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
17907 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
17908 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
17909 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
17910 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
17911 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
17912 vbool2_t interprect to base type.
17913 (bool4_interpret): Likewise.
17914 (bool8_interpret): Likewise.
17915 (bool16_interpret): Likewise.
17916 (bool32_interpret): Likewise.
17917 (bool64_interpret): Likewise.
17919 2023-05-21 Andrew Pinski <apinski@marvell.com>
17921 PR middle-end/109919
17922 * expr.cc (expand_single_bit_test): Don't use the
17923 target for expand_expr.
17925 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
17927 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
17930 2023-05-20 Pan Li <pan2.li@intel.com>
17932 * mode-switching.cc (entity_map): Initialize the array to zero.
17935 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
17938 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
17939 Remove superfluous "parallel" in insn pattern.
17940 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
17941 printing error text to assembly.
17943 2023-05-20 Andrew Pinski <apinski@marvell.com>
17945 * expr.cc (fold_single_bit_test): Rename to ...
17946 (expand_single_bit_test): This and expand directly.
17947 (do_store_flag): Update for the rename function.
17949 2023-05-20 Andrew Pinski <apinski@marvell.com>
17951 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
17952 instead of shift/and.
17954 2023-05-20 Andrew Pinski <apinski@marvell.com>
17956 * expr.cc (fold_single_bit_test): Add an assert
17957 and simplify based on code being NE_EXPR or EQ_EXPR.
17959 2023-05-20 Andrew Pinski <apinski@marvell.com>
17961 * expr.cc (fold_single_bit_test): Take inner and bitnum
17962 instead of arg0 and arg1. Update the code.
17963 (do_store_flag): Don't create a tree when calling
17964 fold_single_bit_test instead just call it with the bitnum
17965 and the inner tree.
17967 2023-05-20 Andrew Pinski <apinski@marvell.com>
17969 * expr.cc (fold_single_bit_test): Use get_def_for_expr
17970 instead of checking the inner's code.
17972 2023-05-20 Andrew Pinski <apinski@marvell.com>
17974 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
17975 (fold_single_bit_test): This and simplify.
17977 2023-05-20 Andrew Pinski <apinski@marvell.com>
17979 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
17981 (fold_single_bit_test): Likewise.
17982 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
17983 (fold_single_bit_test): Likewise and make static.
17984 * fold-const.h (fold_single_bit_test): Remove declaration.
17986 2023-05-20 Die Li <lidie@eswincomputing.com>
17988 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
17991 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
17993 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
17995 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
17998 * config/riscv/bitmanip.md
17999 (<bitmanip_optab>disi2): Match with any_extend.
18000 (<bitmanip_optab>disi2_sext): New pattern to match
18001 with sign extend using an ANDI instruction.
18003 2023-05-19 Nathan Sidwell <nathan@acm.org>
18006 * opts.h (handle_deferred_dump_options): Declare.
18007 * opts-global.cc (handle_common_deferred_options): Do not handle
18009 (handle_deferred_dump_options): New.
18010 * toplev.cc (toplev::main): Call it after plugin init.
18012 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
18014 * config/riscv/constraints.md (DsS, DsD): Restore agreement
18015 with shiftm1 mode attribute.
18017 2023-05-19 Andrew Pinski <apinski@marvell.com>
18020 * gcc.cc (default_compilers["@c-header"]): Add %w
18021 after the --output-pch.
18023 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
18025 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
18026 to hival, ASHIFT the corresponding regs.
18028 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
18030 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
18032 2023-05-19 Jakub Jelinek <jakub@redhat.com>
18034 PR tree-optimization/105776
18035 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
18036 non-NULL, allow division statement to have a cast as single imm use
18037 rather than comparison/condition.
18038 (match_arith_overflow): In that case remove the cast stmt in addition
18039 to the division statement.
18041 2023-05-19 Jakub Jelinek <jakub@redhat.com>
18043 PR tree-optimization/101856
18044 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
18045 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
18046 support it but umul_highpart_optab does.
18048 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
18050 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
18051 of tree_to_shwi on array indices. Minor tweaks.
18053 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18055 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
18056 * attribs.cc (diag_attr_exclusions): Ditto.
18057 (decl_attributes): Ditto.
18058 (build_type_attribute_qual_variant): Ditto.
18059 * builtins.cc (fold_builtin_carg): Ditto.
18060 (fold_builtin_next_arg): Ditto.
18061 (do_mpc_arg2): Ditto.
18062 * cfgexpand.cc (expand_return): Ditto.
18063 * cgraph.h (decl_in_symtab_p): Ditto.
18064 (symtab_node::get_create): Ditto.
18065 * dwarf2out.cc (base_type_die): Ditto.
18066 (implicit_ptr_descriptor): Ditto.
18067 (gen_array_type_die): Ditto.
18068 (gen_type_die_with_usage): Ditto.
18069 (optimize_location_into_implicit_ptr): Ditto.
18070 * expr.cc (do_store_flag): Ditto.
18071 * fold-const.cc (negate_expr_p): Ditto.
18072 (fold_negate_expr_1): Ditto.
18073 (fold_convert_const): Ditto.
18074 (fold_convert_loc): Ditto.
18075 (constant_boolean_node): Ditto.
18076 (fold_binary_op_with_conditional_arg): Ditto.
18077 (build_fold_addr_expr_with_type_loc): Ditto.
18078 (fold_comparison): Ditto.
18079 (fold_checksum_tree): Ditto.
18080 (tree_unary_nonnegative_warnv_p): Ditto.
18081 (integer_valued_real_unary_p): Ditto.
18082 (fold_read_from_constant_string): Ditto.
18083 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
18084 * gimple-expr.cc (useless_type_conversion_p): Ditto.
18085 (is_gimple_reg): Ditto.
18086 (is_gimple_asm_val): Ditto.
18087 (mark_addressable): Ditto.
18088 * gimple-expr.h (is_gimple_variable): Ditto.
18089 (virtual_operand_p): Ditto.
18090 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
18091 * gimplify.cc (gimplify_bind_expr): Ditto.
18092 (gimplify_return_expr): Ditto.
18093 (gimple_add_padding_init_for_auto_var): Ditto.
18094 (gimplify_addr_expr): Ditto.
18095 (omp_add_variable): Ditto.
18096 (omp_notice_variable): Ditto.
18097 (omp_get_base_pointer): Ditto.
18098 (omp_strip_components_and_deref): Ditto.
18099 (omp_strip_indirections): Ditto.
18100 (omp_accumulate_sibling_list): Ditto.
18101 (omp_build_struct_sibling_lists): Ditto.
18102 (gimplify_adjust_omp_clauses_1): Ditto.
18103 (gimplify_adjust_omp_clauses): Ditto.
18104 (gimplify_omp_for): Ditto.
18105 (goa_lhs_expr_p): Ditto.
18106 (gimplify_one_sizepos): Ditto.
18107 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
18108 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
18109 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
18110 (propagate_controlled_uses): Ditto.
18111 * ipa-sra.cc (type_prevails_p): Ditto.
18112 (scan_expr_access): Ditto.
18113 * optabs-tree.cc (optab_for_tree_code): Ditto.
18114 * toplev.cc (wrapup_global_declaration_1): Ditto.
18115 * trans-mem.cc (transaction_invariant_address_p): Ditto.
18116 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
18117 (verify_gimple_comparison): Ditto.
18118 (verify_gimple_assign_binary): Ditto.
18119 (verify_gimple_assign_single): Ditto.
18120 * tree-complex.cc (get_component_ssa_name): Ditto.
18121 * tree-emutls.cc (lower_emutls_2): Ditto.
18122 * tree-inline.cc (copy_tree_body_r): Ditto.
18123 (estimate_move_cost): Ditto.
18124 (copy_decl_for_dup_finish): Ditto.
18125 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
18126 (note_nonlocal_vla_type): Ditto.
18127 (convert_local_omp_clauses): Ditto.
18128 (remap_vla_decls): Ditto.
18129 (fixup_vla_decls): Ditto.
18130 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
18131 * tree-pretty-print.cc (print_declaration): Ditto.
18132 (print_call_name): Ditto.
18133 * tree-sra.cc (compare_access_positions): Ditto.
18134 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
18135 * tree-ssa-ccp.cc (get_default_value): Ditto.
18136 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
18137 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
18138 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
18139 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
18140 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
18141 * tree-ssa-sink.cc (statement_sink_location): Ditto.
18142 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
18143 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
18144 * tree-ssa-uninit.cc (warn_uninit): Ditto.
18145 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
18146 (non_rewritable_mem_ref_base): Ditto.
18147 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
18148 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
18149 * tree-vect-generic.cc (do_binop): Ditto.
18151 * tree-vect-stmts.cc (vect_init_vector): Ditto.
18152 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
18153 * tree.cc (sign_mask_for): Ditto.
18154 (verify_type_variant): Ditto.
18155 (gimple_canonical_types_compatible_p): Ditto.
18156 (verify_type): Ditto.
18157 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
18158 * var-tracking.cc (prepare_call_arguments): Ditto.
18159 (vt_add_function_parameters): Ditto.
18160 * varasm.cc (decode_addr_const): Ditto.
18162 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18164 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
18165 (lower_reduction_clauses): Ditto.
18166 (lower_send_clauses): Ditto.
18167 (lower_omp_task_reductions): Ditto.
18168 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
18169 (worker_single_copy): Ditto.
18170 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
18171 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
18173 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18175 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
18177 (lto_read_body_or_constructor): Ditto.
18178 * lto-streamer-out.cc (tree_is_indexable): Ditto.
18179 (lto_output_var_decl_ref): Ditto.
18180 (DFS::DFS_write_tree_body): Ditto.
18181 (wrap_refs): Ditto.
18182 (write_symbol_extension_info): Ditto.
18184 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18186 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
18187 defines from tree.h.
18188 (aarch64_mangle_type): Ditto.
18189 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
18190 (alpha_gimplify_va_arg_1): Ditto.
18191 * config/arc/arc.cc (arc_encode_section_info): Ditto.
18192 (arc_is_aux_reg_p): Ditto.
18193 (arc_is_uncached_mem_p): Ditto.
18194 (arc_handle_aux_attribute): Ditto.
18195 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
18196 (arm_handle_cmse_nonsecure_call): Ditto.
18197 (arm_set_default_type_attributes): Ditto.
18198 (arm_is_segment_info_known): Ditto.
18199 (arm_mangle_type): Ditto.
18200 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
18201 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
18202 (avr_decl_absdata_p): Ditto.
18203 (avr_insert_attributes): Ditto.
18204 (avr_section_type_flags): Ditto.
18205 (avr_encode_section_info): Ditto.
18206 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
18207 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
18208 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
18209 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
18210 (csky_mangle_type): Ditto.
18211 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
18212 * config/darwin.cc (is_objc_metadata): Ditto.
18213 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
18214 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
18215 * config/frv/frv.cc (frv_emit_movsi): Ditto.
18216 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
18217 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
18218 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
18219 * config/i386/i386-expand.cc: Ditto.
18220 * config/i386/i386.cc (type_natural_mode): Ditto.
18221 (ix86_function_arg): Ditto.
18222 (ix86_data_alignment): Ditto.
18223 (ix86_local_alignment): Ditto.
18224 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
18225 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
18226 (i386_pe_type_dllexport_p): Ditto.
18227 (i386_pe_adjust_class_at_definition): Ditto.
18228 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
18229 (i386_pe_binds_local_p): Ditto.
18230 (i386_pe_section_type_flags): Ditto.
18231 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
18232 (ia64_gimplify_va_arg): Ditto.
18233 (ia64_in_small_data_p): Ditto.
18234 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
18235 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
18236 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
18237 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
18238 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
18239 (mcore_encode_section_info): Ditto.
18240 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
18241 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
18242 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
18243 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
18244 (pass_in_memory): Ditto.
18245 (nvptx_generate_vector_shuffle): Ditto.
18246 (nvptx_lockless_update): Ditto.
18247 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
18248 (pa_function_value): Ditto.
18249 (pa_function_arg): Ditto.
18250 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
18251 (TEXT_SPACE_P): Ditto.
18252 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
18253 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
18254 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
18255 (riscv_mangle_type): Ditto.
18256 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
18257 (rl78_addsi3_internal): Ditto.
18258 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
18259 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
18260 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
18261 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
18262 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
18263 (rs6000_function_arg_advance_1): Ditto.
18264 (rs6000_function_arg): Ditto.
18265 (rs6000_pass_by_reference): Ditto.
18266 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
18267 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
18268 (rs6000_set_default_type_attributes): Ditto.
18269 (rs6000_elf_in_small_data_p): Ditto.
18270 (IN_NAMED_SECTION): Ditto.
18271 (rs6000_xcoff_encode_section_info): Ditto.
18272 (rs6000_function_value): Ditto.
18273 (invalid_arg_for_unprototyped_fn): Ditto.
18274 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
18275 (s390_vec_n_elem): Ditto.
18276 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
18277 (s390_function_arg_integer): Ditto.
18278 (s390_return_in_memory): Ditto.
18279 (s390_encode_section_info): Ditto.
18280 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
18281 (sh_function_value): Ditto.
18282 * config/sol2.cc (solaris_insert_attributes): Ditto.
18283 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
18284 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
18285 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
18286 (xstormy16_handle_below100_attribute): Ditto.
18287 * config/v850/v850.cc (v850_encode_section_info): Ditto.
18288 (v850_insert_attributes): Ditto.
18289 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
18290 (visium_return_in_memory): Ditto.
18291 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
18293 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
18295 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
18296 (ix86_expand_vecop_qihi): Add op2vec bool variable.
18297 Do not set REG_EQUAL note.
18298 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
18300 * config/i386/i386.cc (ix86_multiplication_cost): Handle
18301 V4QImode and V8QImode.
18302 * config/i386/mmx.md (mulv8qi3): New expander.
18304 * config/i386/sse.md (mulv8qi3): Remove.
18306 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
18308 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
18310 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
18312 PR bootstrap/105831
18313 * config.gcc: Use = operator instead of ==.
18315 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
18317 PR bootstrap/105831
18318 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
18319 * configure.ac: Likewise.
18320 * configure: Regenerate.
18322 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18324 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
18325 (__ARM_mve_coerce1): Remove.
18326 (__ARM_mve_coerce2): Remove.
18327 (__ARM_mve_coerce3): Remove.
18328 (__ARM_mve_coerce_i_scalar): New.
18329 (__ARM_mve_coerce_s8_ptr): New.
18330 (__ARM_mve_coerce_u8_ptr): New.
18331 (__ARM_mve_coerce_s16_ptr): New.
18332 (__ARM_mve_coerce_u16_ptr): New.
18333 (__ARM_mve_coerce_s32_ptr): New.
18334 (__ARM_mve_coerce_u32_ptr): New.
18335 (__ARM_mve_coerce_s64_ptr): New.
18336 (__ARM_mve_coerce_u64_ptr): New.
18337 (__ARM_mve_coerce_f_scalar): New.
18338 (__ARM_mve_coerce_f16_ptr): New.
18339 (__ARM_mve_coerce_f32_ptr): New.
18340 (__arm_vst4q): Change _coerce_ overloads.
18341 (__arm_vbicq): Change _coerce_ overloads.
18342 (__arm_vld1q): Change _coerce_ overloads.
18343 (__arm_vld1q_z): Change _coerce_ overloads.
18344 (__arm_vld2q): Change _coerce_ overloads.
18345 (__arm_vld4q): Change _coerce_ overloads.
18346 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
18347 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
18348 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
18349 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
18350 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
18351 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
18352 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
18353 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
18354 (__arm_vst1q_p): Change _coerce_ overloads.
18355 (__arm_vst2q): Change _coerce_ overloads.
18356 (__arm_vst1q): Change _coerce_ overloads.
18357 (__arm_vstrhq): Change _coerce_ overloads.
18358 (__arm_vstrhq_p): Change _coerce_ overloads.
18359 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
18360 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
18361 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
18362 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
18363 (__arm_vstrwq_p): Change _coerce_ overloads.
18364 (__arm_vstrwq): Change _coerce_ overloads.
18365 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
18366 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
18367 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
18368 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
18369 (__arm_vsetq_lane): Change _coerce_ overloads.
18370 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
18371 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
18372 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
18373 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
18374 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
18375 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
18376 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
18377 (__arm_vidupq_x_u8): Change _coerce_ overloads.
18378 (__arm_vddupq_x_u8): Change _coerce_ overloads.
18379 (__arm_vidupq_x_u16): Change _coerce_ overloads.
18380 (__arm_vddupq_x_u16): Change _coerce_ overloads.
18381 (__arm_vidupq_x_u32): Change _coerce_ overloads.
18382 (__arm_vddupq_x_u32): Change _coerce_ overloads.
18383 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
18384 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
18385 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
18386 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
18387 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
18388 (__arm_vidupq_u16): Change _coerce_ overloads.
18389 (__arm_vidupq_u32): Change _coerce_ overloads.
18390 (__arm_vidupq_u8): Change _coerce_ overloads.
18391 (__arm_vddupq_u16): Change _coerce_ overloads.
18392 (__arm_vddupq_u32): Change _coerce_ overloads.
18393 (__arm_vddupq_u8): Change _coerce_ overloads.
18394 (__arm_viwdupq_m): Change _coerce_ overloads.
18395 (__arm_viwdupq_u16): Change _coerce_ overloads.
18396 (__arm_viwdupq_u32): Change _coerce_ overloads.
18397 (__arm_viwdupq_u8): Change _coerce_ overloads.
18398 (__arm_vdwdupq_m): Change _coerce_ overloads.
18399 (__arm_vdwdupq_u16): Change _coerce_ overloads.
18400 (__arm_vdwdupq_u32): Change _coerce_ overloads.
18401 (__arm_vdwdupq_u8): Change _coerce_ overloads.
18402 (__arm_vstrbq): Change _coerce_ overloads.
18403 (__arm_vstrbq_p): Change _coerce_ overloads.
18404 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
18405 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
18406 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
18407 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
18408 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
18410 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18412 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
18415 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18417 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
18418 (__arm_vadcq_u32): Likewise.
18419 (__arm_vadcq_m_s32): Likewise.
18420 (__arm_vadcq_m_u32): Likewise.
18421 (__arm_vsbcq_s32): Likewise.
18422 (__arm_vsbcq_u32): Likewise.
18423 (__arm_vsbcq_m_s32): Likewise.
18424 (__arm_vsbcq_m_u32): Likewise.
18425 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
18427 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
18429 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
18430 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
18431 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
18432 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
18433 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
18434 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
18435 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
18436 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
18437 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
18438 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
18439 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
18440 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
18441 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
18442 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
18443 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
18444 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
18445 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
18446 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
18447 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
18448 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
18449 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
18450 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
18451 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
18452 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
18453 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
18454 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
18455 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
18456 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
18457 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
18458 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
18459 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
18460 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
18461 (mve_vorrq_m_f<mode>)
18462 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
18463 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
18464 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
18465 capitalization in the emitted asm.
18467 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
18469 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
18471 (Ri): Move constraint definition from predicates.md.
18472 (Rl): Define new constraint.
18473 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
18474 missing constraint.
18475 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
18476 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
18477 op 2. Fix asm output spacing.
18478 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
18479 * config/arm/predicates.md (Ri) Move constraint to constraints.md
18480 (mve_vldrd_immediate): Move it from
18482 (mve_vstrw_immediate): New predicate.
18484 2023-05-18 Pan Li <pan2.li@intel.com>
18485 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18486 Kito Cheng <kito.cheng@sifive.com>
18487 Richard Biener <rguenther@suse.de>
18488 Richard Sandiford <richard.sandiford@arm.com>
18490 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
18491 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
18492 (struct table_elt): Extend machine_mode to 16 bits.
18493 (struct set): Ditto.
18494 * genmodes.cc (emit_mode_wider): Extend type from char to short.
18495 (emit_mode_complex): Ditto.
18496 (emit_mode_inner): Ditto.
18497 (emit_class_narrowest_mode): Ditto.
18498 * genopinit.cc (main): Extend the machine_mode limit.
18499 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
18500 re-ordered the struct fields for padding.
18501 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
18502 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
18503 (get_mode_alignment): Extend type from char to short.
18504 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
18505 removed the ATTRIBUTE_PACKED.
18506 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
18507 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
18508 m_kind to 2 bits and remove m_spare.
18509 * rtl.h (RTX_CODE_BITSIZE): New macro.
18510 (struct rtx_def): Swap both the bit size and location between the
18511 rtx_code and the machine_mode.
18512 (subreg_shape::unique_id): Extend the machine_mode limit.
18513 * rtlanal.h: Extend machine_mode to 16 bits.
18514 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
18515 bits and re-ordered the struct fields for padding.
18516 (struct tree_decl_common): Extend machine_mode to 16 bits.
18518 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
18520 * genrecog.cc (print_nonbool_test): Fix type error of
18521 switch (SUBREG_BYTE (op))'.
18523 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
18525 * common/config/riscv/riscv-common.cc: Remove
18526 trailing spaces on lines.
18527 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
18528 * config/riscv/riscv.h (enum reg_class): Likewise.
18529 * config/riscv/riscv.md: Likewise.
18531 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
18533 * config/pa/pa.md (clear_cache): New.
18535 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
18537 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
18538 parenthesis. Fix misnamed index entry.
18539 <concept>: Fix misnamed index entry.
18541 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
18543 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
18545 (*<optab>si3_mask, *<optab>di3_mask): Here.
18546 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
18547 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
18549 (*<bitmanip_optab>si3_sext_mask): Likewise.
18550 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
18551 and const_di_mask_operand.
18552 (bitmanip_rotate): New iterator.
18553 (bitmanip_optab): Add rotates.
18554 * config/riscv/predicates.md (const_si_mask_operand): Renamed
18555 from const31_operand. Generalize to handle more mask constants.
18556 (const_di_mask_operand): Similarly.
18558 2023-05-17 Jakub Jelinek <jakub@redhat.com>
18561 * config/i386/i386-builtin-types.def (FLOAT128): Use
18562 float128t_type_node rather than float128_type_node.
18564 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
18566 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
18567 FP_CONTRACT_FAST (no functional change).
18569 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
18571 * config/i386/i386.cc (ix86_multiplication_cost): Correct
18572 calcuation of integer vector mode costs to reflect generated
18573 instruction sequences of different integer vector modes and
18574 different target ABIs.
18576 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18578 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
18579 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
18580 (riscv_mode_needed): Ditto.
18581 (riscv_mode_after): Ditto.
18582 (riscv_mode_entry): Ditto.
18583 (riscv_mode_exit): Ditto.
18584 (riscv_mode_priority): Ditto.
18585 (TARGET_MODE_EMIT): New target hook.
18586 (TARGET_MODE_NEEDED): Ditto.
18587 (TARGET_MODE_AFTER): Ditto.
18588 (TARGET_MODE_ENTRY): Ditto.
18589 (TARGET_MODE_EXIT): Ditto.
18590 (TARGET_MODE_PRIORITY): Ditto.
18591 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
18592 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
18593 * config/riscv/riscv.md: Add csrwvxrm.
18594 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
18595 (vxrmsi): New pattern.
18597 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18599 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
18600 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
18601 (struct narrow_alu_def): Ditto.
18602 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
18603 (function_expander::use_exact_insn): Ditto.
18604 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
18605 (function_base::has_rounding_mode_operand_p): New function.
18607 2023-05-17 Andrew Pinski <apinski@marvell.com>
18609 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
18610 against 0 instead of calling integer_zerop.
18612 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18614 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
18615 (DEF_RVV_VXRM_ENUM): New macro.
18616 (handle_pragma_vector): Add vxrm enum register.
18617 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
18623 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
18625 * value-range.h (Value_Range::operator=): New.
18627 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
18629 * value-range.cc (vrange::operator=): Add a stub to copy
18630 unsupported ranges.
18631 * value-range.h (is_a <unsupported_range>): New.
18632 (Value_Range::operator=): Support copying unsupported ranges.
18634 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
18636 * data-streamer-in.cc (streamer_read_real_value): New.
18637 (streamer_read_value_range): New.
18638 * data-streamer-out.cc (streamer_write_real_value): New.
18639 (streamer_write_vrange): New.
18640 * data-streamer.h (streamer_write_vrange): New.
18641 (streamer_read_value_range): New.
18643 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
18646 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
18647 is ignored for a fixed underlying type.
18648 (C++ Dialect Options): Likewise for -fstrict-enums.
18650 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
18652 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
18655 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18657 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
18659 (s390_atomic_align_for_mode): New.
18661 2023-05-17 Jakub Jelinek <jakub@redhat.com>
18663 * wide-int.cc (wi::from_array): Add missing closing paren in function
18666 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
18668 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
18669 suggested unroll factor once the previous analysis fails.
18671 2023-05-17 Pan Li <pan2.li@intel.com>
18673 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
18675 (main): Add bool1 to the type indexer.
18676 * config/riscv/riscv-vector-builtins-functions.def
18677 (vreinterpret): Register vbool1 interpret function.
18678 * config/riscv/riscv-vector-builtins-types.def
18679 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
18680 (vint8m1_t): Add the type to bool1_interpret_ops.
18681 (vint16m1_t): Ditto.
18682 (vint32m1_t): Ditto.
18683 (vint64m1_t): Ditto.
18684 (vuint8m1_t): Ditto.
18685 (vuint16m1_t): Ditto.
18686 (vuint32m1_t): Ditto.
18687 (vuint64m1_t): Ditto.
18688 * config/riscv/riscv-vector-builtins.cc
18689 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
18690 (required_extensions_p): Add bool1 interpret case.
18691 * config/riscv/riscv-vector-builtins.def
18692 (bool1_interpret): Add bool1 interpret to base type.
18693 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
18694 with VB dest for vreinterpret.
18696 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
18699 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
18700 constants through "lis; xoris".
18702 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
18704 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
18705 default rs6000 target pass for O2 and above.
18706 * doc/invoke.texi: Document -free
18708 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
18710 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
18711 Fix wrong select_kind...
18713 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18715 * config/s390/s390-protos.h (s390_expand_setmem): Change
18716 function signature.
18717 * config/s390/s390.cc (s390_expand_setmem): For memset's less
18718 than or equal to 256 byte do not perform a libc call.
18719 * config/s390/s390.md: Change expander into a version which
18722 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18724 * config/s390/s390-protos.h (s390_expand_movmem): New.
18725 * config/s390/s390.cc (s390_expand_movmem): New.
18726 * config/s390/s390.md (movmem<mode>): New.
18730 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18732 * config/s390/s390-protos.h (s390_expand_cpymem): Change
18733 function signature.
18734 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
18735 than or equal to 256 byte do not perform a libc call.
18736 (s390_expand_insv): Adapt new function signature of
18737 s390_expand_cpymem.
18738 * config/s390/s390.md: Change expander into a version which
18741 2023-05-16 Andrew Pinski <apinski@marvell.com>
18743 PR tree-optimization/109424
18744 * match.pd: Add patterns for min/max of zero_one_valued
18747 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18749 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
18750 * config/riscv/riscv-vector-builtins.cc
18751 (function_expander::use_ternop_insn): Add default rounding mode.
18752 (function_expander::use_widen_ternop_insn): Ditto.
18753 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
18754 (riscv_hard_regno_mode_ok): Ditto.
18755 (riscv_conditional_register_usage): Ditto.
18756 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
18757 (FRM_REG_P): Ditto.
18758 (RISCV_DWARF_FRM): Ditto.
18759 * config/riscv/riscv.md: Ditto.
18760 * config/riscv/vector-iterators.md: split no frm and has frm operations.
18761 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
18762 (@pred_<optab><mode>): Ditto.
18764 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
18766 PR tree-optimization/109695
18767 * value-range.cc (irange::operator=): Resize range.
18768 (irange::union_): Same.
18769 (irange::intersect): Same.
18770 (irange::invert): Same.
18771 (int_range_max): Default to 3 sub-ranges and resize as needed.
18772 * value-range.h (irange::maybe_resize): New.
18774 (int_range::int_range): Adjust for resizing.
18775 (int_range::operator=): Same.
18777 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
18779 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
18781 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
18782 when range changed.
18784 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18786 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
18787 * config/riscv/riscv-vector-builtins.cc
18788 (function_expander::use_exact_insn): Add default rounding mode operand.
18789 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
18790 (riscv_hard_regno_mode_ok): Ditto.
18791 (riscv_conditional_register_usage): Ditto.
18792 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
18793 (VXRM_REG_P): Ditto.
18794 (RISCV_DWARF_VXRM): Ditto.
18795 * config/riscv/riscv.md: Ditto.
18796 * config/riscv/vector.md: Ditto
18798 2023-05-15 Pan Li <pan2.li@intel.com>
18800 * optabs.cc (maybe_gen_insn): Add case to generate instruction
18801 that has 11 operands.
18803 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18805 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
18806 logic for vector modes.
18808 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18811 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
18812 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
18813 (aarch64_cmtst<mode>): Rename to...
18814 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
18815 (*aarch64_cmtst_same_<mode>): Rename to...
18816 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
18817 (*aarch64_cmtstdi): Rename to...
18818 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
18819 (aarch64_fac<optab><mode>): Rename to...
18820 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
18822 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18825 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
18826 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
18828 2023-05-15 Pan Li <pan2.li@intel.com>
18829 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18830 kito-cheng <kito.cheng@sifive.com>
18832 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
18833 deciding the mode is constant or not.
18834 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
18836 2023-05-15 Richard Biener <rguenther@suse.de>
18838 PR tree-optimization/109848
18839 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
18840 TARGET_MEM_REF address preparation before the store, not
18843 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18845 * config/riscv/riscv.cc
18846 (riscv_vectorize_preferred_vector_alignment): New function.
18847 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
18849 2023-05-14 Andrew Pinski <apinski@marvell.com>
18851 PR tree-optimization/109829
18852 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
18854 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
18857 * config/i386/i386.cc: Revert the 2023-05-11 change.
18858 (ix86_widen_mult_cost): Return high value instead of
18859 ICEing for unsupported modes.
18861 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
18863 * config/i386/i386.cc (x86_function_profiler): Take
18864 ix86_direct_extern_access into account when generating calls
18867 2023-05-14 Pan Li <pan2.li@intel.com>
18869 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
18870 Refactor the or pattern to switch cases.
18872 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18874 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
18875 aarch64_expand_vector_init to this, and remove interleaving case.
18876 Recursively call aarch64_expand_vector_init_fallback, instead of
18877 aarch64_expand_vector_init.
18878 (aarch64_unzip_vector_init): New function.
18879 (aarch64_expand_vector_init): Likewise.
18881 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
18883 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
18884 Pull out function call from the gcc_assert.
18886 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
18888 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
18889 (policy_to_str): New.
18890 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
18892 2023-05-13 Andrew Pinski <apinski@marvell.com>
18894 PR tree-optimization/109834
18895 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
18896 (popcount(rotate(x,y))->popcount(x)): Likewise.
18898 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
18900 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
18901 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
18902 gen_extend_insn to generate zero/sign extension instructions.
18904 (ix86_expand_vecop_qihi): Initialize interleave functions
18905 for MULT code only. Fix comments.
18907 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
18910 * config/i386/mmx.md (mulv2si3): Remove expander.
18911 (mulv2si3): Rename insn pattern from *mulv2si.
18913 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
18915 PR libstdc++/109816
18916 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
18917 '!lto_stream_offload_p'.
18919 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
18920 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18923 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
18924 (local_avl_compatible_p): New.
18925 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
18926 for LCM, rewrite as a backward algorithm.
18927 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
18928 interface, handle a BB at once.
18930 2023-05-12 Richard Biener <rguenther@suse.de>
18932 PR tree-optimization/64731
18933 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
18934 handle TARGET_MEM_REF destinations of stores from vector
18937 2023-05-12 Richard Biener <rguenther@suse.de>
18939 PR tree-optimization/109791
18940 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
18942 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
18945 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18947 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
18948 * config/arm/arm-mve-builtins-base.def (vsriq): New.
18949 * config/arm/arm-mve-builtins-base.h (vsriq): New.
18950 * config/arm/arm-mve-builtins.cc
18951 (function_instance::has_inactive_argument): Handle vsriq.
18952 * config/arm/arm_mve.h (vsriq): Remove.
18954 (vsriq_n_u8): Remove.
18955 (vsriq_n_s8): Remove.
18956 (vsriq_n_u16): Remove.
18957 (vsriq_n_s16): Remove.
18958 (vsriq_n_u32): Remove.
18959 (vsriq_n_s32): Remove.
18960 (vsriq_m_n_s8): Remove.
18961 (vsriq_m_n_u8): Remove.
18962 (vsriq_m_n_s16): Remove.
18963 (vsriq_m_n_u16): Remove.
18964 (vsriq_m_n_s32): Remove.
18965 (vsriq_m_n_u32): Remove.
18966 (__arm_vsriq_n_u8): Remove.
18967 (__arm_vsriq_n_s8): Remove.
18968 (__arm_vsriq_n_u16): Remove.
18969 (__arm_vsriq_n_s16): Remove.
18970 (__arm_vsriq_n_u32): Remove.
18971 (__arm_vsriq_n_s32): Remove.
18972 (__arm_vsriq_m_n_s8): Remove.
18973 (__arm_vsriq_m_n_u8): Remove.
18974 (__arm_vsriq_m_n_s16): Remove.
18975 (__arm_vsriq_m_n_u16): Remove.
18976 (__arm_vsriq_m_n_s32): Remove.
18977 (__arm_vsriq_m_n_u32): Remove.
18978 (__arm_vsriq): Remove.
18979 (__arm_vsriq_m): Remove.
18981 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18983 * config/arm/iterators.md (mve_insn): Add vsri.
18984 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
18985 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
18986 (mve_vsriq_m_n_<supf><mode>): Rename into ...
18987 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18989 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18991 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
18992 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
18994 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18996 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
18997 * config/arm/arm-mve-builtins-base.def (vsliq): New.
18998 * config/arm/arm-mve-builtins-base.h (vsliq): New.
18999 * config/arm/arm-mve-builtins.cc
19000 (function_instance::has_inactive_argument): Handle vsliq.
19001 * config/arm/arm_mve.h (vsliq): Remove.
19003 (vsliq_n_u8): Remove.
19004 (vsliq_n_s8): Remove.
19005 (vsliq_n_u16): Remove.
19006 (vsliq_n_s16): Remove.
19007 (vsliq_n_u32): Remove.
19008 (vsliq_n_s32): Remove.
19009 (vsliq_m_n_s8): Remove.
19010 (vsliq_m_n_s32): Remove.
19011 (vsliq_m_n_s16): Remove.
19012 (vsliq_m_n_u8): Remove.
19013 (vsliq_m_n_u32): Remove.
19014 (vsliq_m_n_u16): Remove.
19015 (__arm_vsliq_n_u8): Remove.
19016 (__arm_vsliq_n_s8): Remove.
19017 (__arm_vsliq_n_u16): Remove.
19018 (__arm_vsliq_n_s16): Remove.
19019 (__arm_vsliq_n_u32): Remove.
19020 (__arm_vsliq_n_s32): Remove.
19021 (__arm_vsliq_m_n_s8): Remove.
19022 (__arm_vsliq_m_n_s32): Remove.
19023 (__arm_vsliq_m_n_s16): Remove.
19024 (__arm_vsliq_m_n_u8): Remove.
19025 (__arm_vsliq_m_n_u32): Remove.
19026 (__arm_vsliq_m_n_u16): Remove.
19027 (__arm_vsliq): Remove.
19028 (__arm_vsliq_m): Remove.
19030 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19032 * config/arm/iterators.md (mve_insn>): Add vsli.
19033 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
19034 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19035 (mve_vsliq_m_n_<supf><mode>): Rename into ...
19036 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19038 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19040 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
19041 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
19043 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19045 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
19046 * config/arm/arm-mve-builtins-base.def (vpselq): New.
19047 * config/arm/arm-mve-builtins-base.h (vpselq): New.
19048 * config/arm/arm_mve.h (vpselq): Remove.
19049 (vpselq_u8): Remove.
19050 (vpselq_s8): Remove.
19051 (vpselq_u16): Remove.
19052 (vpselq_s16): Remove.
19053 (vpselq_u32): Remove.
19054 (vpselq_s32): Remove.
19055 (vpselq_u64): Remove.
19056 (vpselq_s64): Remove.
19057 (vpselq_f16): Remove.
19058 (vpselq_f32): Remove.
19059 (__arm_vpselq_u8): Remove.
19060 (__arm_vpselq_s8): Remove.
19061 (__arm_vpselq_u16): Remove.
19062 (__arm_vpselq_s16): Remove.
19063 (__arm_vpselq_u32): Remove.
19064 (__arm_vpselq_s32): Remove.
19065 (__arm_vpselq_u64): Remove.
19066 (__arm_vpselq_s64): Remove.
19067 (__arm_vpselq_f16): Remove.
19068 (__arm_vpselq_f32): Remove.
19069 (__arm_vpselq): Remove.
19071 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19073 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
19074 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
19076 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19078 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
19080 * config/arm/iterators.md (MVE_VPSELQ_F): New.
19081 (mve_insn): Add vpsel.
19082 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
19083 (@mve_<mve_insn>q_<supf><mode>): ... this.
19084 (@mve_vpselq_f<mode>): Rename into ...
19085 (@mve_<mve_insn>q_f<mode>): ... this.
19087 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19089 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
19090 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
19091 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
19092 * config/arm/arm-mve-builtins.cc
19093 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
19095 * config/arm/arm_mve.h (vfmaq): Remove.
19099 (vfmasq_m): Remove.
19101 (vfmaq_f16): Remove.
19102 (vfmaq_n_f16): Remove.
19103 (vfmasq_n_f16): Remove.
19104 (vfmsq_f16): Remove.
19105 (vfmaq_f32): Remove.
19106 (vfmaq_n_f32): Remove.
19107 (vfmasq_n_f32): Remove.
19108 (vfmsq_f32): Remove.
19109 (vfmaq_m_f32): Remove.
19110 (vfmaq_m_f16): Remove.
19111 (vfmaq_m_n_f32): Remove.
19112 (vfmaq_m_n_f16): Remove.
19113 (vfmasq_m_n_f32): Remove.
19114 (vfmasq_m_n_f16): Remove.
19115 (vfmsq_m_f32): Remove.
19116 (vfmsq_m_f16): Remove.
19117 (__arm_vfmaq_f16): Remove.
19118 (__arm_vfmaq_n_f16): Remove.
19119 (__arm_vfmasq_n_f16): Remove.
19120 (__arm_vfmsq_f16): Remove.
19121 (__arm_vfmaq_f32): Remove.
19122 (__arm_vfmaq_n_f32): Remove.
19123 (__arm_vfmasq_n_f32): Remove.
19124 (__arm_vfmsq_f32): Remove.
19125 (__arm_vfmaq_m_f32): Remove.
19126 (__arm_vfmaq_m_f16): Remove.
19127 (__arm_vfmaq_m_n_f32): Remove.
19128 (__arm_vfmaq_m_n_f16): Remove.
19129 (__arm_vfmasq_m_n_f32): Remove.
19130 (__arm_vfmasq_m_n_f16): Remove.
19131 (__arm_vfmsq_m_f32): Remove.
19132 (__arm_vfmsq_m_f16): Remove.
19133 (__arm_vfmaq): Remove.
19134 (__arm_vfmasq): Remove.
19135 (__arm_vfmsq): Remove.
19136 (__arm_vfmaq_m): Remove.
19137 (__arm_vfmasq_m): Remove.
19138 (__arm_vfmsq_m): Remove.
19140 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19142 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
19144 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
19145 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
19146 (mve_insn): Add vfma, vfmas, vfms.
19147 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
19149 (@mve_<mve_insn>q_f<mode>): ... this.
19150 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
19151 (@mve_<mve_insn>q_n_f<mode>): ... this.
19152 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
19153 @mve_<mve_insn>q_m_f<mode>.
19154 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
19155 @mve_<mve_insn>q_m_n_f<mode>.
19157 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19159 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
19160 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
19162 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19164 * config/arm/arm-mve-builtins-base.cc
19165 (FUNCTION_WITH_RTX_M_N_NO_F): New.
19167 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
19168 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
19169 * config/arm/arm_mve.h (vmvnq): Remove.
19172 (vmvnq_s8): Remove.
19173 (vmvnq_s16): Remove.
19174 (vmvnq_s32): Remove.
19175 (vmvnq_n_s16): Remove.
19176 (vmvnq_n_s32): Remove.
19177 (vmvnq_u8): Remove.
19178 (vmvnq_u16): Remove.
19179 (vmvnq_u32): Remove.
19180 (vmvnq_n_u16): Remove.
19181 (vmvnq_n_u32): Remove.
19182 (vmvnq_m_u8): Remove.
19183 (vmvnq_m_s8): Remove.
19184 (vmvnq_m_u16): Remove.
19185 (vmvnq_m_s16): Remove.
19186 (vmvnq_m_u32): Remove.
19187 (vmvnq_m_s32): Remove.
19188 (vmvnq_m_n_s16): Remove.
19189 (vmvnq_m_n_u16): Remove.
19190 (vmvnq_m_n_s32): Remove.
19191 (vmvnq_m_n_u32): Remove.
19192 (vmvnq_x_s8): Remove.
19193 (vmvnq_x_s16): Remove.
19194 (vmvnq_x_s32): Remove.
19195 (vmvnq_x_u8): Remove.
19196 (vmvnq_x_u16): Remove.
19197 (vmvnq_x_u32): Remove.
19198 (vmvnq_x_n_s16): Remove.
19199 (vmvnq_x_n_s32): Remove.
19200 (vmvnq_x_n_u16): Remove.
19201 (vmvnq_x_n_u32): Remove.
19202 (__arm_vmvnq_s8): Remove.
19203 (__arm_vmvnq_s16): Remove.
19204 (__arm_vmvnq_s32): Remove.
19205 (__arm_vmvnq_n_s16): Remove.
19206 (__arm_vmvnq_n_s32): Remove.
19207 (__arm_vmvnq_u8): Remove.
19208 (__arm_vmvnq_u16): Remove.
19209 (__arm_vmvnq_u32): Remove.
19210 (__arm_vmvnq_n_u16): Remove.
19211 (__arm_vmvnq_n_u32): Remove.
19212 (__arm_vmvnq_m_u8): Remove.
19213 (__arm_vmvnq_m_s8): Remove.
19214 (__arm_vmvnq_m_u16): Remove.
19215 (__arm_vmvnq_m_s16): Remove.
19216 (__arm_vmvnq_m_u32): Remove.
19217 (__arm_vmvnq_m_s32): Remove.
19218 (__arm_vmvnq_m_n_s16): Remove.
19219 (__arm_vmvnq_m_n_u16): Remove.
19220 (__arm_vmvnq_m_n_s32): Remove.
19221 (__arm_vmvnq_m_n_u32): Remove.
19222 (__arm_vmvnq_x_s8): Remove.
19223 (__arm_vmvnq_x_s16): Remove.
19224 (__arm_vmvnq_x_s32): Remove.
19225 (__arm_vmvnq_x_u8): Remove.
19226 (__arm_vmvnq_x_u16): Remove.
19227 (__arm_vmvnq_x_u32): Remove.
19228 (__arm_vmvnq_x_n_s16): Remove.
19229 (__arm_vmvnq_x_n_s32): Remove.
19230 (__arm_vmvnq_x_n_u16): Remove.
19231 (__arm_vmvnq_x_n_u32): Remove.
19232 (__arm_vmvnq): Remove.
19233 (__arm_vmvnq_m): Remove.
19234 (__arm_vmvnq_x): Remove.
19236 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19238 * config/arm/iterators.md (mve_insn): Add vmvn.
19239 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
19240 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19241 (mve_vmvnq_m_<supf><mode>): Rename into ...
19242 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19243 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
19244 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19246 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19248 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
19249 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
19251 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19253 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
19254 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
19255 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
19256 * config/arm/arm_mve.h (vbrsrq): Remove.
19257 (vbrsrq_m): Remove.
19258 (vbrsrq_x): Remove.
19259 (vbrsrq_n_f16): Remove.
19260 (vbrsrq_n_f32): Remove.
19261 (vbrsrq_n_u8): Remove.
19262 (vbrsrq_n_s8): Remove.
19263 (vbrsrq_n_u16): Remove.
19264 (vbrsrq_n_s16): Remove.
19265 (vbrsrq_n_u32): Remove.
19266 (vbrsrq_n_s32): Remove.
19267 (vbrsrq_m_n_s8): Remove.
19268 (vbrsrq_m_n_s32): Remove.
19269 (vbrsrq_m_n_s16): Remove.
19270 (vbrsrq_m_n_u8): Remove.
19271 (vbrsrq_m_n_u32): Remove.
19272 (vbrsrq_m_n_u16): Remove.
19273 (vbrsrq_m_n_f32): Remove.
19274 (vbrsrq_m_n_f16): Remove.
19275 (vbrsrq_x_n_s8): Remove.
19276 (vbrsrq_x_n_s16): Remove.
19277 (vbrsrq_x_n_s32): Remove.
19278 (vbrsrq_x_n_u8): Remove.
19279 (vbrsrq_x_n_u16): Remove.
19280 (vbrsrq_x_n_u32): Remove.
19281 (vbrsrq_x_n_f16): Remove.
19282 (vbrsrq_x_n_f32): Remove.
19283 (__arm_vbrsrq_n_u8): Remove.
19284 (__arm_vbrsrq_n_s8): Remove.
19285 (__arm_vbrsrq_n_u16): Remove.
19286 (__arm_vbrsrq_n_s16): Remove.
19287 (__arm_vbrsrq_n_u32): Remove.
19288 (__arm_vbrsrq_n_s32): Remove.
19289 (__arm_vbrsrq_m_n_s8): Remove.
19290 (__arm_vbrsrq_m_n_s32): Remove.
19291 (__arm_vbrsrq_m_n_s16): Remove.
19292 (__arm_vbrsrq_m_n_u8): Remove.
19293 (__arm_vbrsrq_m_n_u32): Remove.
19294 (__arm_vbrsrq_m_n_u16): Remove.
19295 (__arm_vbrsrq_x_n_s8): Remove.
19296 (__arm_vbrsrq_x_n_s16): Remove.
19297 (__arm_vbrsrq_x_n_s32): Remove.
19298 (__arm_vbrsrq_x_n_u8): Remove.
19299 (__arm_vbrsrq_x_n_u16): Remove.
19300 (__arm_vbrsrq_x_n_u32): Remove.
19301 (__arm_vbrsrq_n_f16): Remove.
19302 (__arm_vbrsrq_n_f32): Remove.
19303 (__arm_vbrsrq_m_n_f32): Remove.
19304 (__arm_vbrsrq_m_n_f16): Remove.
19305 (__arm_vbrsrq_x_n_f16): Remove.
19306 (__arm_vbrsrq_x_n_f32): Remove.
19307 (__arm_vbrsrq): Remove.
19308 (__arm_vbrsrq_m): Remove.
19309 (__arm_vbrsrq_x): Remove.
19311 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19313 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
19314 (mve_insn): Add vbrsr.
19315 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
19316 (@mve_<mve_insn>q_n_f<mode>): ... this.
19317 (mve_vbrsrq_n_<supf><mode>): Rename into ...
19318 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19319 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
19320 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19321 (mve_vbrsrq_m_n_f<mode>): Rename into ...
19322 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
19324 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19326 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
19327 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
19329 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19331 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
19332 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
19333 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
19334 * config/arm/arm_mve.h (vqshluq): Remove.
19335 (vqshluq_m): Remove.
19336 (vqshluq_n_s8): Remove.
19337 (vqshluq_n_s16): Remove.
19338 (vqshluq_n_s32): Remove.
19339 (vqshluq_m_n_s8): Remove.
19340 (vqshluq_m_n_s16): Remove.
19341 (vqshluq_m_n_s32): Remove.
19342 (__arm_vqshluq_n_s8): Remove.
19343 (__arm_vqshluq_n_s16): Remove.
19344 (__arm_vqshluq_n_s32): Remove.
19345 (__arm_vqshluq_m_n_s8): Remove.
19346 (__arm_vqshluq_m_n_s16): Remove.
19347 (__arm_vqshluq_m_n_s32): Remove.
19348 (__arm_vqshluq): Remove.
19349 (__arm_vqshluq_m): Remove.
19351 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19353 * config/arm/iterators.md (mve_insn): Add vqshlu.
19354 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
19355 (VQSHLUQ_M_N, VQSHLUQ_N): New.
19356 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
19357 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19358 (mve_vqshluq_m_n_s<mode>): Change name into ...
19359 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19361 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19363 * config/arm/arm-mve-builtins-shapes.cc
19364 (binary_lshift_unsigned): New.
19365 * config/arm/arm-mve-builtins-shapes.h
19366 (binary_lshift_unsigned): New.
19368 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19370 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
19371 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
19372 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
19373 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
19374 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
19375 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
19376 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
19377 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
19378 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
19379 (vrmlaldavhaxq): Remove.
19380 (vrmlsldavhaq): Remove.
19381 (vrmlsldavhaxq): Remove.
19382 (vrmlaldavhaq_p): Remove.
19383 (vrmlaldavhaxq_p): Remove.
19384 (vrmlsldavhaq_p): Remove.
19385 (vrmlsldavhaxq_p): Remove.
19386 (vrmlaldavhaq_s32): Remove.
19387 (vrmlaldavhaq_u32): Remove.
19388 (vrmlaldavhaxq_s32): Remove.
19389 (vrmlsldavhaq_s32): Remove.
19390 (vrmlsldavhaxq_s32): Remove.
19391 (vrmlaldavhaq_p_s32): Remove.
19392 (vrmlaldavhaq_p_u32): Remove.
19393 (vrmlaldavhaxq_p_s32): Remove.
19394 (vrmlsldavhaq_p_s32): Remove.
19395 (vrmlsldavhaxq_p_s32): Remove.
19396 (__arm_vrmlaldavhaq_s32): Remove.
19397 (__arm_vrmlaldavhaq_u32): Remove.
19398 (__arm_vrmlaldavhaxq_s32): Remove.
19399 (__arm_vrmlsldavhaq_s32): Remove.
19400 (__arm_vrmlsldavhaxq_s32): Remove.
19401 (__arm_vrmlaldavhaq_p_s32): Remove.
19402 (__arm_vrmlaldavhaq_p_u32): Remove.
19403 (__arm_vrmlaldavhaxq_p_s32): Remove.
19404 (__arm_vrmlsldavhaq_p_s32): Remove.
19405 (__arm_vrmlsldavhaxq_p_s32): Remove.
19406 (__arm_vrmlaldavhaq): Remove.
19407 (__arm_vrmlaldavhaxq): Remove.
19408 (__arm_vrmlsldavhaq): Remove.
19409 (__arm_vrmlsldavhaxq): Remove.
19410 (__arm_vrmlaldavhaq_p): Remove.
19411 (__arm_vrmlaldavhaxq_p): Remove.
19412 (__arm_vrmlsldavhaq_p): Remove.
19413 (__arm_vrmlsldavhaxq_p): Remove.
19415 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19417 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
19418 (MVE_VRMLxLDAVHAxQ_P): New.
19419 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
19421 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
19422 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
19424 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
19425 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
19426 (mve_vrmlsldavhaq_sv4si): Merge into ...
19427 (@mve_<mve_insn>q_<supf>v4si): ... this.
19428 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
19429 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
19430 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
19431 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
19433 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19435 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
19436 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
19438 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
19439 * config/arm/arm_mve.h (vqdmulltq): Remove.
19440 (vqdmullbq): Remove.
19441 (vqdmullbq_m): Remove.
19442 (vqdmulltq_m): Remove.
19443 (vqdmulltq_s16): Remove.
19444 (vqdmulltq_n_s16): Remove.
19445 (vqdmullbq_s16): Remove.
19446 (vqdmullbq_n_s16): Remove.
19447 (vqdmulltq_s32): Remove.
19448 (vqdmulltq_n_s32): Remove.
19449 (vqdmullbq_s32): Remove.
19450 (vqdmullbq_n_s32): Remove.
19451 (vqdmullbq_m_n_s32): Remove.
19452 (vqdmullbq_m_n_s16): Remove.
19453 (vqdmullbq_m_s32): Remove.
19454 (vqdmullbq_m_s16): Remove.
19455 (vqdmulltq_m_n_s32): Remove.
19456 (vqdmulltq_m_n_s16): Remove.
19457 (vqdmulltq_m_s32): Remove.
19458 (vqdmulltq_m_s16): Remove.
19459 (__arm_vqdmulltq_s16): Remove.
19460 (__arm_vqdmulltq_n_s16): Remove.
19461 (__arm_vqdmullbq_s16): Remove.
19462 (__arm_vqdmullbq_n_s16): Remove.
19463 (__arm_vqdmulltq_s32): Remove.
19464 (__arm_vqdmulltq_n_s32): Remove.
19465 (__arm_vqdmullbq_s32): Remove.
19466 (__arm_vqdmullbq_n_s32): Remove.
19467 (__arm_vqdmullbq_m_n_s32): Remove.
19468 (__arm_vqdmullbq_m_n_s16): Remove.
19469 (__arm_vqdmullbq_m_s32): Remove.
19470 (__arm_vqdmullbq_m_s16): Remove.
19471 (__arm_vqdmulltq_m_n_s32): Remove.
19472 (__arm_vqdmulltq_m_n_s16): Remove.
19473 (__arm_vqdmulltq_m_s32): Remove.
19474 (__arm_vqdmulltq_m_s16): Remove.
19475 (__arm_vqdmulltq): Remove.
19476 (__arm_vqdmullbq): Remove.
19477 (__arm_vqdmullbq_m): Remove.
19478 (__arm_vqdmulltq_m): Remove.
19480 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19482 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
19483 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
19484 (mve_insn): Add vqdmullb, vqdmullt.
19485 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
19486 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
19488 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
19489 (mve_vqdmulltq_n_s<mode>): Merge into ...
19490 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19491 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
19492 (@mve_<mve_insn>q_<supf><mode>): ... this.
19493 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
19495 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19496 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
19497 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19499 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19501 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
19502 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
19504 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
19506 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
19507 Drop unused parameter.
19508 (riscv_select_multilib): Ditto.
19509 (riscv_compute_multilib): Update call site of
19510 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
19512 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
19514 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
19515 * config/riscv/riscv-protos.h (expand_vec_init): New function.
19516 * config/riscv/riscv-v.cc (class rvv_builder): New class.
19517 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
19518 (rvv_builder::get_merged_repeating_sequence): Ditto.
19519 (expand_vector_init_insert_elems): Ditto.
19520 (expand_vec_init): Ditto.
19521 * config/riscv/vector-iterators.md: New attribute.
19523 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
19525 * config/rs6000/rs6000-builtins.def
19526 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
19528 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
19529 xsiexpdpf to xsiexpdpf_di.
19530 * config/rs6000/vsx.md (xsiexpdp): Rename to...
19531 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
19532 replace TARGET_64BIT with TARGET_POWERPC64.
19533 (xsiexpdpf): Rename to...
19534 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
19535 replace TARGET_64BIT with TARGET_POWERPC64.
19537 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
19539 * config/rs6000/rs6000-builtins.def
19540 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
19542 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
19545 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
19547 * config/rs6000/rs6000-builtins.def
19548 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
19549 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
19551 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
19552 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
19553 TARGET_64BIT check.
19554 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
19555 requirement when it has a 64-bit argument.
19557 2023-05-12 Pan Li <pan2.li@intel.com>
19558 Richard Sandiford <richard.sandiford@arm.com>
19559 Richard Biener <rguenther@suse.de>
19560 Jakub Jelinek <jakub@redhat.com>
19562 * mux-utils.h: Add overload operator == and != for pointer_mux.
19563 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
19564 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
19565 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
19566 (dv_as_decl): Ditto.
19567 (dv_as_opaque): Removed due to unnecessary.
19568 (struct variable_hasher): Take decl_or_value as compare_type.
19569 (variable_hasher::equal): Diito.
19570 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
19571 (dv_from_value): Ditto.
19572 (attrs_list_member): Ditto.
19573 (vars_copy): Ditto.
19574 (var_reg_decl_set): Ditto.
19575 (var_reg_delete_and_set): Ditto.
19576 (find_loc_in_1pdv): Ditto.
19577 (canonicalize_values_star): Ditto.
19578 (variable_post_merge_new_vals): Ditto.
19579 (dump_onepart_variable_differences): Ditto.
19580 (variable_different_p): Ditto.
19581 (set_slot_part): Ditto.
19582 (clobber_slot_part): Ditto.
19583 (clobber_variable_part): Ditto.
19585 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
19587 * match.pd: simplify vector shift + bit_and + multiply.
19589 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19591 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
19592 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
19593 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
19594 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
19595 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
19596 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
19597 * config/arm/arm-mve-builtins.cc
19598 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
19599 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
19600 * config/arm/arm_mve.h (vqrdmlashq): Remove.
19601 (vqrdmlahq): Remove.
19602 (vqdmlashq): Remove.
19603 (vqdmlahq): Remove.
19607 (vmlasq_m): Remove.
19608 (vqdmlashq_m): Remove.
19609 (vqdmlahq_m): Remove.
19610 (vqrdmlahq_m): Remove.
19611 (vqrdmlashq_m): Remove.
19612 (vmlasq_n_u8): Remove.
19613 (vmlaq_n_u8): Remove.
19614 (vqrdmlashq_n_s8): Remove.
19615 (vqrdmlahq_n_s8): Remove.
19616 (vqdmlahq_n_s8): Remove.
19617 (vqdmlashq_n_s8): Remove.
19618 (vmlasq_n_s8): Remove.
19619 (vmlaq_n_s8): Remove.
19620 (vmlasq_n_u16): Remove.
19621 (vmlaq_n_u16): Remove.
19622 (vqrdmlashq_n_s16): Remove.
19623 (vqrdmlahq_n_s16): Remove.
19624 (vqdmlashq_n_s16): Remove.
19625 (vqdmlahq_n_s16): Remove.
19626 (vmlasq_n_s16): Remove.
19627 (vmlaq_n_s16): Remove.
19628 (vmlasq_n_u32): Remove.
19629 (vmlaq_n_u32): Remove.
19630 (vqrdmlashq_n_s32): Remove.
19631 (vqrdmlahq_n_s32): Remove.
19632 (vqdmlashq_n_s32): Remove.
19633 (vqdmlahq_n_s32): Remove.
19634 (vmlasq_n_s32): Remove.
19635 (vmlaq_n_s32): Remove.
19636 (vmlaq_m_n_s8): Remove.
19637 (vmlaq_m_n_s32): Remove.
19638 (vmlaq_m_n_s16): Remove.
19639 (vmlaq_m_n_u8): Remove.
19640 (vmlaq_m_n_u32): Remove.
19641 (vmlaq_m_n_u16): Remove.
19642 (vmlasq_m_n_s8): Remove.
19643 (vmlasq_m_n_s32): Remove.
19644 (vmlasq_m_n_s16): Remove.
19645 (vmlasq_m_n_u8): Remove.
19646 (vmlasq_m_n_u32): Remove.
19647 (vmlasq_m_n_u16): Remove.
19648 (vqdmlashq_m_n_s8): Remove.
19649 (vqdmlashq_m_n_s32): Remove.
19650 (vqdmlashq_m_n_s16): Remove.
19651 (vqdmlahq_m_n_s8): Remove.
19652 (vqdmlahq_m_n_s32): Remove.
19653 (vqdmlahq_m_n_s16): Remove.
19654 (vqrdmlahq_m_n_s8): Remove.
19655 (vqrdmlahq_m_n_s32): Remove.
19656 (vqrdmlahq_m_n_s16): Remove.
19657 (vqrdmlashq_m_n_s8): Remove.
19658 (vqrdmlashq_m_n_s32): Remove.
19659 (vqrdmlashq_m_n_s16): Remove.
19660 (__arm_vmlasq_n_u8): Remove.
19661 (__arm_vmlaq_n_u8): Remove.
19662 (__arm_vqrdmlashq_n_s8): Remove.
19663 (__arm_vqdmlashq_n_s8): Remove.
19664 (__arm_vqrdmlahq_n_s8): Remove.
19665 (__arm_vqdmlahq_n_s8): Remove.
19666 (__arm_vmlasq_n_s8): Remove.
19667 (__arm_vmlaq_n_s8): Remove.
19668 (__arm_vmlasq_n_u16): Remove.
19669 (__arm_vmlaq_n_u16): Remove.
19670 (__arm_vqrdmlashq_n_s16): Remove.
19671 (__arm_vqdmlashq_n_s16): Remove.
19672 (__arm_vqrdmlahq_n_s16): Remove.
19673 (__arm_vqdmlahq_n_s16): Remove.
19674 (__arm_vmlasq_n_s16): Remove.
19675 (__arm_vmlaq_n_s16): Remove.
19676 (__arm_vmlasq_n_u32): Remove.
19677 (__arm_vmlaq_n_u32): Remove.
19678 (__arm_vqrdmlashq_n_s32): Remove.
19679 (__arm_vqdmlashq_n_s32): Remove.
19680 (__arm_vqrdmlahq_n_s32): Remove.
19681 (__arm_vqdmlahq_n_s32): Remove.
19682 (__arm_vmlasq_n_s32): Remove.
19683 (__arm_vmlaq_n_s32): Remove.
19684 (__arm_vmlaq_m_n_s8): Remove.
19685 (__arm_vmlaq_m_n_s32): Remove.
19686 (__arm_vmlaq_m_n_s16): Remove.
19687 (__arm_vmlaq_m_n_u8): Remove.
19688 (__arm_vmlaq_m_n_u32): Remove.
19689 (__arm_vmlaq_m_n_u16): Remove.
19690 (__arm_vmlasq_m_n_s8): Remove.
19691 (__arm_vmlasq_m_n_s32): Remove.
19692 (__arm_vmlasq_m_n_s16): Remove.
19693 (__arm_vmlasq_m_n_u8): Remove.
19694 (__arm_vmlasq_m_n_u32): Remove.
19695 (__arm_vmlasq_m_n_u16): Remove.
19696 (__arm_vqdmlahq_m_n_s8): Remove.
19697 (__arm_vqdmlahq_m_n_s32): Remove.
19698 (__arm_vqdmlahq_m_n_s16): Remove.
19699 (__arm_vqrdmlahq_m_n_s8): Remove.
19700 (__arm_vqrdmlahq_m_n_s32): Remove.
19701 (__arm_vqrdmlahq_m_n_s16): Remove.
19702 (__arm_vqrdmlashq_m_n_s8): Remove.
19703 (__arm_vqrdmlashq_m_n_s32): Remove.
19704 (__arm_vqrdmlashq_m_n_s16): Remove.
19705 (__arm_vqdmlashq_m_n_s8): Remove.
19706 (__arm_vqdmlashq_m_n_s16): Remove.
19707 (__arm_vqdmlashq_m_n_s32): Remove.
19708 (__arm_vmlasq): Remove.
19709 (__arm_vmlaq): Remove.
19710 (__arm_vqrdmlashq): Remove.
19711 (__arm_vqdmlashq): Remove.
19712 (__arm_vqrdmlahq): Remove.
19713 (__arm_vqdmlahq): Remove.
19714 (__arm_vmlaq_m): Remove.
19715 (__arm_vmlasq_m): Remove.
19716 (__arm_vqdmlahq_m): Remove.
19717 (__arm_vqrdmlahq_m): Remove.
19718 (__arm_vqrdmlashq_m): Remove.
19719 (__arm_vqdmlashq_m): Remove.
19721 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19723 * config/arm/iterators.md (MVE_VMLxQ_N): New.
19724 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
19726 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
19728 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
19729 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
19730 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
19731 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
19732 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19734 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19736 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
19737 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
19739 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19741 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
19742 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
19743 (vqrdmlsdhxq): New.
19744 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
19745 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
19746 (vqrdmlsdhxq): New.
19747 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
19748 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
19749 (vqrdmlsdhxq): New.
19750 * config/arm/arm-mve-builtins.cc
19751 (function_instance::has_inactive_argument): Handle vqrdmladhq,
19752 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
19753 vqdmlsdhq, vqdmlsdhxq.
19754 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
19755 (vqrdmlsdhq): Remove.
19756 (vqrdmladhxq): Remove.
19757 (vqrdmladhq): Remove.
19758 (vqdmlsdhxq): Remove.
19759 (vqdmlsdhq): Remove.
19760 (vqdmladhxq): Remove.
19761 (vqdmladhq): Remove.
19762 (vqdmladhq_m): Remove.
19763 (vqdmladhxq_m): Remove.
19764 (vqdmlsdhq_m): Remove.
19765 (vqdmlsdhxq_m): Remove.
19766 (vqrdmladhq_m): Remove.
19767 (vqrdmladhxq_m): Remove.
19768 (vqrdmlsdhq_m): Remove.
19769 (vqrdmlsdhxq_m): Remove.
19770 (vqrdmlsdhxq_s8): Remove.
19771 (vqrdmlsdhq_s8): Remove.
19772 (vqrdmladhxq_s8): Remove.
19773 (vqrdmladhq_s8): Remove.
19774 (vqdmlsdhxq_s8): Remove.
19775 (vqdmlsdhq_s8): Remove.
19776 (vqdmladhxq_s8): Remove.
19777 (vqdmladhq_s8): Remove.
19778 (vqrdmlsdhxq_s16): Remove.
19779 (vqrdmlsdhq_s16): Remove.
19780 (vqrdmladhxq_s16): Remove.
19781 (vqrdmladhq_s16): Remove.
19782 (vqdmlsdhxq_s16): Remove.
19783 (vqdmlsdhq_s16): Remove.
19784 (vqdmladhxq_s16): Remove.
19785 (vqdmladhq_s16): Remove.
19786 (vqrdmlsdhxq_s32): Remove.
19787 (vqrdmlsdhq_s32): Remove.
19788 (vqrdmladhxq_s32): Remove.
19789 (vqrdmladhq_s32): Remove.
19790 (vqdmlsdhxq_s32): Remove.
19791 (vqdmlsdhq_s32): Remove.
19792 (vqdmladhxq_s32): Remove.
19793 (vqdmladhq_s32): Remove.
19794 (vqdmladhq_m_s8): Remove.
19795 (vqdmladhq_m_s32): Remove.
19796 (vqdmladhq_m_s16): Remove.
19797 (vqdmladhxq_m_s8): Remove.
19798 (vqdmladhxq_m_s32): Remove.
19799 (vqdmladhxq_m_s16): Remove.
19800 (vqdmlsdhq_m_s8): Remove.
19801 (vqdmlsdhq_m_s32): Remove.
19802 (vqdmlsdhq_m_s16): Remove.
19803 (vqdmlsdhxq_m_s8): Remove.
19804 (vqdmlsdhxq_m_s32): Remove.
19805 (vqdmlsdhxq_m_s16): Remove.
19806 (vqrdmladhq_m_s8): Remove.
19807 (vqrdmladhq_m_s32): Remove.
19808 (vqrdmladhq_m_s16): Remove.
19809 (vqrdmladhxq_m_s8): Remove.
19810 (vqrdmladhxq_m_s32): Remove.
19811 (vqrdmladhxq_m_s16): Remove.
19812 (vqrdmlsdhq_m_s8): Remove.
19813 (vqrdmlsdhq_m_s32): Remove.
19814 (vqrdmlsdhq_m_s16): Remove.
19815 (vqrdmlsdhxq_m_s8): Remove.
19816 (vqrdmlsdhxq_m_s32): Remove.
19817 (vqrdmlsdhxq_m_s16): Remove.
19818 (__arm_vqrdmlsdhxq_s8): Remove.
19819 (__arm_vqrdmlsdhq_s8): Remove.
19820 (__arm_vqrdmladhxq_s8): Remove.
19821 (__arm_vqrdmladhq_s8): Remove.
19822 (__arm_vqdmlsdhxq_s8): Remove.
19823 (__arm_vqdmlsdhq_s8): Remove.
19824 (__arm_vqdmladhxq_s8): Remove.
19825 (__arm_vqdmladhq_s8): Remove.
19826 (__arm_vqrdmlsdhxq_s16): Remove.
19827 (__arm_vqrdmlsdhq_s16): Remove.
19828 (__arm_vqrdmladhxq_s16): Remove.
19829 (__arm_vqrdmladhq_s16): Remove.
19830 (__arm_vqdmlsdhxq_s16): Remove.
19831 (__arm_vqdmlsdhq_s16): Remove.
19832 (__arm_vqdmladhxq_s16): Remove.
19833 (__arm_vqdmladhq_s16): Remove.
19834 (__arm_vqrdmlsdhxq_s32): Remove.
19835 (__arm_vqrdmlsdhq_s32): Remove.
19836 (__arm_vqrdmladhxq_s32): Remove.
19837 (__arm_vqrdmladhq_s32): Remove.
19838 (__arm_vqdmlsdhxq_s32): Remove.
19839 (__arm_vqdmlsdhq_s32): Remove.
19840 (__arm_vqdmladhxq_s32): Remove.
19841 (__arm_vqdmladhq_s32): Remove.
19842 (__arm_vqdmladhq_m_s8): Remove.
19843 (__arm_vqdmladhq_m_s32): Remove.
19844 (__arm_vqdmladhq_m_s16): Remove.
19845 (__arm_vqdmladhxq_m_s8): Remove.
19846 (__arm_vqdmladhxq_m_s32): Remove.
19847 (__arm_vqdmladhxq_m_s16): Remove.
19848 (__arm_vqdmlsdhq_m_s8): Remove.
19849 (__arm_vqdmlsdhq_m_s32): Remove.
19850 (__arm_vqdmlsdhq_m_s16): Remove.
19851 (__arm_vqdmlsdhxq_m_s8): Remove.
19852 (__arm_vqdmlsdhxq_m_s32): Remove.
19853 (__arm_vqdmlsdhxq_m_s16): Remove.
19854 (__arm_vqrdmladhq_m_s8): Remove.
19855 (__arm_vqrdmladhq_m_s32): Remove.
19856 (__arm_vqrdmladhq_m_s16): Remove.
19857 (__arm_vqrdmladhxq_m_s8): Remove.
19858 (__arm_vqrdmladhxq_m_s32): Remove.
19859 (__arm_vqrdmladhxq_m_s16): Remove.
19860 (__arm_vqrdmlsdhq_m_s8): Remove.
19861 (__arm_vqrdmlsdhq_m_s32): Remove.
19862 (__arm_vqrdmlsdhq_m_s16): Remove.
19863 (__arm_vqrdmlsdhxq_m_s8): Remove.
19864 (__arm_vqrdmlsdhxq_m_s32): Remove.
19865 (__arm_vqrdmlsdhxq_m_s16): Remove.
19866 (__arm_vqrdmlsdhxq): Remove.
19867 (__arm_vqrdmlsdhq): Remove.
19868 (__arm_vqrdmladhxq): Remove.
19869 (__arm_vqrdmladhq): Remove.
19870 (__arm_vqdmlsdhxq): Remove.
19871 (__arm_vqdmlsdhq): Remove.
19872 (__arm_vqdmladhxq): Remove.
19873 (__arm_vqdmladhq): Remove.
19874 (__arm_vqdmladhq_m): Remove.
19875 (__arm_vqdmladhxq_m): Remove.
19876 (__arm_vqdmlsdhq_m): Remove.
19877 (__arm_vqdmlsdhxq_m): Remove.
19878 (__arm_vqrdmladhq_m): Remove.
19879 (__arm_vqrdmladhxq_m): Remove.
19880 (__arm_vqrdmlsdhq_m): Remove.
19881 (__arm_vqrdmlsdhxq_m): Remove.
19883 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19885 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
19886 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
19887 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
19888 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
19889 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
19890 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
19891 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
19892 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
19893 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
19894 (mve_vqdmladhq_s<mode>): Merge into ...
19895 (@mve_<mve_insn>q_<supf><mode>): ... this.
19897 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19899 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
19900 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
19902 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19904 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
19905 (vmlsldavaq, vmlsldavaxq): New.
19906 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
19907 (vmlsldavaq, vmlsldavaxq): New.
19908 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
19909 (vmlsldavaq, vmlsldavaxq): New.
19910 * config/arm/arm_mve.h (vmlaldavaq): Remove.
19911 (vmlaldavaxq): Remove.
19912 (vmlsldavaq): Remove.
19913 (vmlsldavaxq): Remove.
19914 (vmlaldavaq_p): Remove.
19915 (vmlaldavaxq_p): Remove.
19916 (vmlsldavaq_p): Remove.
19917 (vmlsldavaxq_p): Remove.
19918 (vmlaldavaq_s16): Remove.
19919 (vmlaldavaxq_s16): Remove.
19920 (vmlsldavaq_s16): Remove.
19921 (vmlsldavaxq_s16): Remove.
19922 (vmlaldavaq_u16): Remove.
19923 (vmlaldavaq_s32): Remove.
19924 (vmlaldavaxq_s32): Remove.
19925 (vmlsldavaq_s32): Remove.
19926 (vmlsldavaxq_s32): Remove.
19927 (vmlaldavaq_u32): Remove.
19928 (vmlaldavaq_p_s32): Remove.
19929 (vmlaldavaq_p_s16): Remove.
19930 (vmlaldavaq_p_u32): Remove.
19931 (vmlaldavaq_p_u16): Remove.
19932 (vmlaldavaxq_p_s32): Remove.
19933 (vmlaldavaxq_p_s16): Remove.
19934 (vmlsldavaq_p_s32): Remove.
19935 (vmlsldavaq_p_s16): Remove.
19936 (vmlsldavaxq_p_s32): Remove.
19937 (vmlsldavaxq_p_s16): Remove.
19938 (__arm_vmlaldavaq_s16): Remove.
19939 (__arm_vmlaldavaxq_s16): Remove.
19940 (__arm_vmlsldavaq_s16): Remove.
19941 (__arm_vmlsldavaxq_s16): Remove.
19942 (__arm_vmlaldavaq_u16): Remove.
19943 (__arm_vmlaldavaq_s32): Remove.
19944 (__arm_vmlaldavaxq_s32): Remove.
19945 (__arm_vmlsldavaq_s32): Remove.
19946 (__arm_vmlsldavaxq_s32): Remove.
19947 (__arm_vmlaldavaq_u32): Remove.
19948 (__arm_vmlaldavaq_p_s32): Remove.
19949 (__arm_vmlaldavaq_p_s16): Remove.
19950 (__arm_vmlaldavaq_p_u32): Remove.
19951 (__arm_vmlaldavaq_p_u16): Remove.
19952 (__arm_vmlaldavaxq_p_s32): Remove.
19953 (__arm_vmlaldavaxq_p_s16): Remove.
19954 (__arm_vmlsldavaq_p_s32): Remove.
19955 (__arm_vmlsldavaq_p_s16): Remove.
19956 (__arm_vmlsldavaxq_p_s32): Remove.
19957 (__arm_vmlsldavaxq_p_s16): Remove.
19958 (__arm_vmlaldavaq): Remove.
19959 (__arm_vmlaldavaxq): Remove.
19960 (__arm_vmlsldavaq): Remove.
19961 (__arm_vmlsldavaxq): Remove.
19962 (__arm_vmlaldavaq_p): Remove.
19963 (__arm_vmlaldavaxq_p): Remove.
19964 (__arm_vmlsldavaq_p): Remove.
19965 (__arm_vmlsldavaxq_p): Remove.
19967 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19969 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
19971 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
19972 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
19973 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
19974 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
19975 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
19976 (mve_vmlaldavaxq_s<mode>): Merge into ...
19977 (@mve_<mve_insn>q_<supf><mode>): ... this.
19978 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
19979 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
19981 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
19983 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19985 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
19986 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
19988 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19990 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
19991 (vrmlsldavhq, vrmlsldavhxq): New.
19992 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
19993 (vrmlsldavhq, vrmlsldavhxq): New.
19994 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
19995 (vrmlsldavhq, vrmlsldavhxq): New.
19996 * config/arm/arm-mve-builtins-functions.h
19997 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
19998 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
19999 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
20000 (vrmlsldavhxq): Remove.
20001 (vrmlsldavhq): Remove.
20002 (vrmlaldavhxq): Remove.
20003 (vrmlaldavhq_p): Remove.
20004 (vrmlaldavhxq_p): Remove.
20005 (vrmlsldavhq_p): Remove.
20006 (vrmlsldavhxq_p): Remove.
20007 (vrmlaldavhq_u32): Remove.
20008 (vrmlsldavhxq_s32): Remove.
20009 (vrmlsldavhq_s32): Remove.
20010 (vrmlaldavhxq_s32): Remove.
20011 (vrmlaldavhq_s32): Remove.
20012 (vrmlaldavhq_p_s32): Remove.
20013 (vrmlaldavhxq_p_s32): Remove.
20014 (vrmlsldavhq_p_s32): Remove.
20015 (vrmlsldavhxq_p_s32): Remove.
20016 (vrmlaldavhq_p_u32): Remove.
20017 (__arm_vrmlaldavhq_u32): Remove.
20018 (__arm_vrmlsldavhxq_s32): Remove.
20019 (__arm_vrmlsldavhq_s32): Remove.
20020 (__arm_vrmlaldavhxq_s32): Remove.
20021 (__arm_vrmlaldavhq_s32): Remove.
20022 (__arm_vrmlaldavhq_p_s32): Remove.
20023 (__arm_vrmlaldavhxq_p_s32): Remove.
20024 (__arm_vrmlsldavhq_p_s32): Remove.
20025 (__arm_vrmlsldavhxq_p_s32): Remove.
20026 (__arm_vrmlaldavhq_p_u32): Remove.
20027 (__arm_vrmlaldavhq): Remove.
20028 (__arm_vrmlsldavhxq): Remove.
20029 (__arm_vrmlsldavhq): Remove.
20030 (__arm_vrmlaldavhxq): Remove.
20031 (__arm_vrmlaldavhq_p): Remove.
20032 (__arm_vrmlaldavhxq_p): Remove.
20033 (__arm_vrmlsldavhq_p): Remove.
20034 (__arm_vrmlsldavhxq_p): Remove.
20036 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20038 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
20040 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
20041 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
20042 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
20043 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
20044 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
20045 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
20046 (@mve_<mve_insn>q_<supf>v4si): ... this.
20047 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
20048 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
20050 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20052 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20054 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
20055 (vmlsldavq, vmlsldavxq): New.
20056 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
20057 (vmlsldavq, vmlsldavxq): New.
20058 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
20059 (vmlsldavq, vmlsldavxq): New.
20060 * config/arm/arm_mve.h (vmlaldavq): Remove.
20061 (vmlsldavxq): Remove.
20062 (vmlsldavq): Remove.
20063 (vmlaldavxq): Remove.
20064 (vmlaldavq_p): Remove.
20065 (vmlaldavxq_p): Remove.
20066 (vmlsldavq_p): Remove.
20067 (vmlsldavxq_p): Remove.
20068 (vmlaldavq_u16): Remove.
20069 (vmlsldavxq_s16): Remove.
20070 (vmlsldavq_s16): Remove.
20071 (vmlaldavxq_s16): Remove.
20072 (vmlaldavq_s16): Remove.
20073 (vmlaldavq_u32): Remove.
20074 (vmlsldavxq_s32): Remove.
20075 (vmlsldavq_s32): Remove.
20076 (vmlaldavxq_s32): Remove.
20077 (vmlaldavq_s32): Remove.
20078 (vmlaldavq_p_s16): Remove.
20079 (vmlaldavxq_p_s16): Remove.
20080 (vmlsldavq_p_s16): Remove.
20081 (vmlsldavxq_p_s16): Remove.
20082 (vmlaldavq_p_u16): Remove.
20083 (vmlaldavq_p_s32): Remove.
20084 (vmlaldavxq_p_s32): Remove.
20085 (vmlsldavq_p_s32): Remove.
20086 (vmlsldavxq_p_s32): Remove.
20087 (vmlaldavq_p_u32): Remove.
20088 (__arm_vmlaldavq_u16): Remove.
20089 (__arm_vmlsldavxq_s16): Remove.
20090 (__arm_vmlsldavq_s16): Remove.
20091 (__arm_vmlaldavxq_s16): Remove.
20092 (__arm_vmlaldavq_s16): Remove.
20093 (__arm_vmlaldavq_u32): Remove.
20094 (__arm_vmlsldavxq_s32): Remove.
20095 (__arm_vmlsldavq_s32): Remove.
20096 (__arm_vmlaldavxq_s32): Remove.
20097 (__arm_vmlaldavq_s32): Remove.
20098 (__arm_vmlaldavq_p_s16): Remove.
20099 (__arm_vmlaldavxq_p_s16): Remove.
20100 (__arm_vmlsldavq_p_s16): Remove.
20101 (__arm_vmlsldavxq_p_s16): Remove.
20102 (__arm_vmlaldavq_p_u16): Remove.
20103 (__arm_vmlaldavq_p_s32): Remove.
20104 (__arm_vmlaldavxq_p_s32): Remove.
20105 (__arm_vmlsldavq_p_s32): Remove.
20106 (__arm_vmlsldavxq_p_s32): Remove.
20107 (__arm_vmlaldavq_p_u32): Remove.
20108 (__arm_vmlaldavq): Remove.
20109 (__arm_vmlsldavxq): Remove.
20110 (__arm_vmlsldavq): Remove.
20111 (__arm_vmlaldavxq): Remove.
20112 (__arm_vmlaldavq_p): Remove.
20113 (__arm_vmlaldavxq_p): Remove.
20114 (__arm_vmlsldavq_p): Remove.
20115 (__arm_vmlsldavxq_p): Remove.
20117 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20119 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
20120 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
20121 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
20122 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
20123 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
20124 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
20125 (mve_vmlsldavxq_s<mode>): Merge into ...
20126 (@mve_<mve_insn>q_<supf><mode>): ... this.
20127 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
20128 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
20130 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20132 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20134 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
20135 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
20137 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20139 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
20140 * config/arm/arm-mve-builtins-base.def (vabavq): New.
20141 * config/arm/arm-mve-builtins-base.h (vabavq): New.
20142 * config/arm/arm_mve.h (vabavq): Remove.
20143 (vabavq_p): Remove.
20144 (vabavq_s8): Remove.
20145 (vabavq_s16): Remove.
20146 (vabavq_s32): Remove.
20147 (vabavq_u8): Remove.
20148 (vabavq_u16): Remove.
20149 (vabavq_u32): Remove.
20150 (vabavq_p_s8): Remove.
20151 (vabavq_p_u8): Remove.
20152 (vabavq_p_s16): Remove.
20153 (vabavq_p_u16): Remove.
20154 (vabavq_p_s32): Remove.
20155 (vabavq_p_u32): Remove.
20156 (__arm_vabavq_s8): Remove.
20157 (__arm_vabavq_s16): Remove.
20158 (__arm_vabavq_s32): Remove.
20159 (__arm_vabavq_u8): Remove.
20160 (__arm_vabavq_u16): Remove.
20161 (__arm_vabavq_u32): Remove.
20162 (__arm_vabavq_p_s8): Remove.
20163 (__arm_vabavq_p_u8): Remove.
20164 (__arm_vabavq_p_s16): Remove.
20165 (__arm_vabavq_p_u16): Remove.
20166 (__arm_vabavq_p_s32): Remove.
20167 (__arm_vabavq_p_u32): Remove.
20168 (__arm_vabavq): Remove.
20169 (__arm_vabavq_p): Remove.
20171 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20173 * config/arm/iterators.md (mve_insn): Add vabav.
20174 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
20175 (@mve_<mve_insn>q_<supf><mode>): ... this,.
20176 (mve_vabavq_p_<supf><mode>): Rename into ...
20177 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
20179 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20181 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
20182 (vmlsdavaq, vmlsdavaxq): New.
20183 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
20184 (vmlsdavaq, vmlsdavaxq): New.
20185 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
20186 (vmlsdavaq, vmlsdavaxq): New.
20187 * config/arm/arm_mve.h (vmladavaq): Remove.
20188 (vmlsdavaxq): Remove.
20189 (vmlsdavaq): Remove.
20190 (vmladavaxq): Remove.
20191 (vmladavaq_p): Remove.
20192 (vmladavaxq_p): Remove.
20193 (vmlsdavaq_p): Remove.
20194 (vmlsdavaxq_p): Remove.
20195 (vmladavaq_u8): Remove.
20196 (vmlsdavaxq_s8): Remove.
20197 (vmlsdavaq_s8): Remove.
20198 (vmladavaxq_s8): Remove.
20199 (vmladavaq_s8): Remove.
20200 (vmladavaq_u16): Remove.
20201 (vmlsdavaxq_s16): Remove.
20202 (vmlsdavaq_s16): Remove.
20203 (vmladavaxq_s16): Remove.
20204 (vmladavaq_s16): Remove.
20205 (vmladavaq_u32): Remove.
20206 (vmlsdavaxq_s32): Remove.
20207 (vmlsdavaq_s32): Remove.
20208 (vmladavaxq_s32): Remove.
20209 (vmladavaq_s32): Remove.
20210 (vmladavaq_p_s8): Remove.
20211 (vmladavaq_p_s32): Remove.
20212 (vmladavaq_p_s16): Remove.
20213 (vmladavaq_p_u8): Remove.
20214 (vmladavaq_p_u32): Remove.
20215 (vmladavaq_p_u16): Remove.
20216 (vmladavaxq_p_s8): Remove.
20217 (vmladavaxq_p_s32): Remove.
20218 (vmladavaxq_p_s16): Remove.
20219 (vmlsdavaq_p_s8): Remove.
20220 (vmlsdavaq_p_s32): Remove.
20221 (vmlsdavaq_p_s16): Remove.
20222 (vmlsdavaxq_p_s8): Remove.
20223 (vmlsdavaxq_p_s32): Remove.
20224 (vmlsdavaxq_p_s16): Remove.
20225 (__arm_vmladavaq_u8): Remove.
20226 (__arm_vmlsdavaxq_s8): Remove.
20227 (__arm_vmlsdavaq_s8): Remove.
20228 (__arm_vmladavaxq_s8): Remove.
20229 (__arm_vmladavaq_s8): Remove.
20230 (__arm_vmladavaq_u16): Remove.
20231 (__arm_vmlsdavaxq_s16): Remove.
20232 (__arm_vmlsdavaq_s16): Remove.
20233 (__arm_vmladavaxq_s16): Remove.
20234 (__arm_vmladavaq_s16): Remove.
20235 (__arm_vmladavaq_u32): Remove.
20236 (__arm_vmlsdavaxq_s32): Remove.
20237 (__arm_vmlsdavaq_s32): Remove.
20238 (__arm_vmladavaxq_s32): Remove.
20239 (__arm_vmladavaq_s32): Remove.
20240 (__arm_vmladavaq_p_s8): Remove.
20241 (__arm_vmladavaq_p_s32): Remove.
20242 (__arm_vmladavaq_p_s16): Remove.
20243 (__arm_vmladavaq_p_u8): Remove.
20244 (__arm_vmladavaq_p_u32): Remove.
20245 (__arm_vmladavaq_p_u16): Remove.
20246 (__arm_vmladavaxq_p_s8): Remove.
20247 (__arm_vmladavaxq_p_s32): Remove.
20248 (__arm_vmladavaxq_p_s16): Remove.
20249 (__arm_vmlsdavaq_p_s8): Remove.
20250 (__arm_vmlsdavaq_p_s32): Remove.
20251 (__arm_vmlsdavaq_p_s16): Remove.
20252 (__arm_vmlsdavaxq_p_s8): Remove.
20253 (__arm_vmlsdavaxq_p_s32): Remove.
20254 (__arm_vmlsdavaxq_p_s16): Remove.
20255 (__arm_vmladavaq): Remove.
20256 (__arm_vmlsdavaxq): Remove.
20257 (__arm_vmlsdavaq): Remove.
20258 (__arm_vmladavaxq): Remove.
20259 (__arm_vmladavaq_p): Remove.
20260 (__arm_vmladavaxq_p): Remove.
20261 (__arm_vmlsdavaq_p): Remove.
20262 (__arm_vmlsdavaxq_p): Remove.
20264 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20266 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
20267 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
20269 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20271 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
20272 (vmlsdavq, vmlsdavxq): New.
20273 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
20274 (vmlsdavq, vmlsdavxq): New.
20275 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
20276 (vmlsdavq, vmlsdavxq): New.
20277 * config/arm/arm_mve.h (vmladavq): Remove.
20278 (vmlsdavxq): Remove.
20279 (vmlsdavq): Remove.
20280 (vmladavxq): Remove.
20281 (vmladavq_p): Remove.
20282 (vmlsdavxq_p): Remove.
20283 (vmlsdavq_p): Remove.
20284 (vmladavxq_p): Remove.
20285 (vmladavq_u8): Remove.
20286 (vmlsdavxq_s8): Remove.
20287 (vmlsdavq_s8): Remove.
20288 (vmladavxq_s8): Remove.
20289 (vmladavq_s8): Remove.
20290 (vmladavq_u16): Remove.
20291 (vmlsdavxq_s16): Remove.
20292 (vmlsdavq_s16): Remove.
20293 (vmladavxq_s16): Remove.
20294 (vmladavq_s16): Remove.
20295 (vmladavq_u32): Remove.
20296 (vmlsdavxq_s32): Remove.
20297 (vmlsdavq_s32): Remove.
20298 (vmladavxq_s32): Remove.
20299 (vmladavq_s32): Remove.
20300 (vmladavq_p_u8): Remove.
20301 (vmlsdavxq_p_s8): Remove.
20302 (vmlsdavq_p_s8): Remove.
20303 (vmladavxq_p_s8): Remove.
20304 (vmladavq_p_s8): Remove.
20305 (vmladavq_p_u16): Remove.
20306 (vmlsdavxq_p_s16): Remove.
20307 (vmlsdavq_p_s16): Remove.
20308 (vmladavxq_p_s16): Remove.
20309 (vmladavq_p_s16): Remove.
20310 (vmladavq_p_u32): Remove.
20311 (vmlsdavxq_p_s32): Remove.
20312 (vmlsdavq_p_s32): Remove.
20313 (vmladavxq_p_s32): Remove.
20314 (vmladavq_p_s32): Remove.
20315 (__arm_vmladavq_u8): Remove.
20316 (__arm_vmlsdavxq_s8): Remove.
20317 (__arm_vmlsdavq_s8): Remove.
20318 (__arm_vmladavxq_s8): Remove.
20319 (__arm_vmladavq_s8): Remove.
20320 (__arm_vmladavq_u16): Remove.
20321 (__arm_vmlsdavxq_s16): Remove.
20322 (__arm_vmlsdavq_s16): Remove.
20323 (__arm_vmladavxq_s16): Remove.
20324 (__arm_vmladavq_s16): Remove.
20325 (__arm_vmladavq_u32): Remove.
20326 (__arm_vmlsdavxq_s32): Remove.
20327 (__arm_vmlsdavq_s32): Remove.
20328 (__arm_vmladavxq_s32): Remove.
20329 (__arm_vmladavq_s32): Remove.
20330 (__arm_vmladavq_p_u8): Remove.
20331 (__arm_vmlsdavxq_p_s8): Remove.
20332 (__arm_vmlsdavq_p_s8): Remove.
20333 (__arm_vmladavxq_p_s8): Remove.
20334 (__arm_vmladavq_p_s8): Remove.
20335 (__arm_vmladavq_p_u16): Remove.
20336 (__arm_vmlsdavxq_p_s16): Remove.
20337 (__arm_vmlsdavq_p_s16): Remove.
20338 (__arm_vmladavxq_p_s16): Remove.
20339 (__arm_vmladavq_p_s16): Remove.
20340 (__arm_vmladavq_p_u32): Remove.
20341 (__arm_vmlsdavxq_p_s32): Remove.
20342 (__arm_vmlsdavq_p_s32): Remove.
20343 (__arm_vmladavxq_p_s32): Remove.
20344 (__arm_vmladavq_p_s32): Remove.
20345 (__arm_vmladavq): Remove.
20346 (__arm_vmlsdavxq): Remove.
20347 (__arm_vmlsdavq): Remove.
20348 (__arm_vmladavxq): Remove.
20349 (__arm_vmladavq_p): Remove.
20350 (__arm_vmlsdavxq_p): Remove.
20351 (__arm_vmlsdavq_p): Remove.
20352 (__arm_vmladavxq_p): Remove.
20354 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20356 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
20357 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
20358 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
20359 vmlsdavax, vmlsdav, vmlsdavx.
20360 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
20361 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
20362 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
20364 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
20365 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
20366 (mve_vmlsdavxq_s<mode>): Merge into ...
20367 (@mve_<mve_insn>q_<supf><mode>): ... this.
20368 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
20369 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
20371 (@mve_<mve_insn>q_<supf><mode>): ... this.
20372 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
20373 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
20374 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20375 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
20376 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
20378 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20380 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20382 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
20383 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
20385 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20387 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
20388 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
20389 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
20390 * config/arm/arm_mve.h (vaddlvaq): Remove.
20391 (vaddlvaq_p): Remove.
20392 (vaddlvaq_u32): Remove.
20393 (vaddlvaq_s32): Remove.
20394 (vaddlvaq_p_s32): Remove.
20395 (vaddlvaq_p_u32): Remove.
20396 (__arm_vaddlvaq_u32): Remove.
20397 (__arm_vaddlvaq_s32): Remove.
20398 (__arm_vaddlvaq_p_s32): Remove.
20399 (__arm_vaddlvaq_p_u32): Remove.
20400 (__arm_vaddlvaq): Remove.
20401 (__arm_vaddlvaq_p): Remove.
20403 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20405 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
20406 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
20408 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20410 * config/arm/iterators.md (mve_insn): Add vaddlva.
20411 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
20412 (@mve_<mve_insn>q_<supf>v4si): ... this.
20413 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
20414 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20416 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
20419 * config/i386/i386.cc (ix86_widen_mult_cost):
20420 Handle V4HImode and V2SImode.
20422 2023-05-11 Andrew Pinski <apinski@marvell.com>
20424 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
20425 defined by a phi node with more than one uses, allow for the
20426 only uses are in that same defining statement.
20428 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20430 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
20433 2023-05-11 Pan Li <pan2.li@intel.com>
20435 * config/riscv/vector.md: Add comments for simplifying to vmset.
20437 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20439 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
20441 (v<optab><mode>3): Add vector shift pattern.
20442 * config/riscv/vector-iterators.md: New iterator.
20444 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20446 * config/riscv/autovec.md: Use renamed functions.
20447 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
20448 (emit_vlmax_reg_op): To this.
20449 (emit_nonvlmax_op): Rename.
20450 (emit_len_op): To this.
20451 (emit_nonvlmax_binop): Rename.
20452 (emit_len_binop): To this.
20453 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
20454 (emit_pred_binop): Remove vlmax_p.
20455 (emit_vlmax_op): Rename.
20456 (emit_vlmax_reg_op): To this.
20457 (emit_nonvlmax_op): Rename.
20458 (emit_len_op): To this.
20459 (emit_nonvlmax_binop): Rename.
20460 (emit_len_binop): To this.
20461 (sew64_scalar_helper): Use renamed functions.
20462 (expand_tuple_move): Use renamed functions.
20463 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
20465 * config/riscv/vector.md: Use renamed functions.
20467 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20468 Michael Collison <collison@rivosinc.com>
20470 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
20471 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
20472 * config/riscv/riscv-v.cc (emit_pred_op): New function.
20473 (set_expander_dest_and_mask): New function.
20474 (emit_pred_binop): New function.
20475 (emit_nonvlmax_binop): New function.
20477 2023-05-11 Pan Li <pan2.li@intel.com>
20479 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
20480 * gimple-loop-interchange.cc
20481 (tree_loop_interchange::map_inductions_to_loop): Ditto.
20482 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
20483 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
20484 * tree-ssa-loop-manip.cc (create_iv): Ditto.
20485 (tree_transform_and_unroll_loop): Ditto.
20486 (canonicalize_loop_ivs): Ditto.
20487 * tree-ssa-loop-manip.h (create_iv): Ditto.
20488 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
20489 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
20491 (vect_set_loop_condition_normal): Ditto.
20492 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
20493 * tree-vect-stmts.cc (vectorizable_store): Ditto.
20494 (vectorizable_load): Ditto.
20496 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20498 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
20499 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
20500 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
20501 * config/arm/arm_mve.h (vmovlbq): Remove.
20503 (vmovlbq_m): Remove.
20504 (vmovltq_m): Remove.
20505 (vmovlbq_x): Remove.
20506 (vmovltq_x): Remove.
20507 (vmovlbq_s8): Remove.
20508 (vmovlbq_s16): Remove.
20509 (vmovltq_s8): Remove.
20510 (vmovltq_s16): Remove.
20511 (vmovltq_u8): Remove.
20512 (vmovltq_u16): Remove.
20513 (vmovlbq_u8): Remove.
20514 (vmovlbq_u16): Remove.
20515 (vmovlbq_m_s8): Remove.
20516 (vmovltq_m_s8): Remove.
20517 (vmovlbq_m_u8): Remove.
20518 (vmovltq_m_u8): Remove.
20519 (vmovlbq_m_s16): Remove.
20520 (vmovltq_m_s16): Remove.
20521 (vmovlbq_m_u16): Remove.
20522 (vmovltq_m_u16): Remove.
20523 (vmovlbq_x_s8): Remove.
20524 (vmovlbq_x_s16): Remove.
20525 (vmovlbq_x_u8): Remove.
20526 (vmovlbq_x_u16): Remove.
20527 (vmovltq_x_s8): Remove.
20528 (vmovltq_x_s16): Remove.
20529 (vmovltq_x_u8): Remove.
20530 (vmovltq_x_u16): Remove.
20531 (__arm_vmovlbq_s8): Remove.
20532 (__arm_vmovlbq_s16): Remove.
20533 (__arm_vmovltq_s8): Remove.
20534 (__arm_vmovltq_s16): Remove.
20535 (__arm_vmovltq_u8): Remove.
20536 (__arm_vmovltq_u16): Remove.
20537 (__arm_vmovlbq_u8): Remove.
20538 (__arm_vmovlbq_u16): Remove.
20539 (__arm_vmovlbq_m_s8): Remove.
20540 (__arm_vmovltq_m_s8): Remove.
20541 (__arm_vmovlbq_m_u8): Remove.
20542 (__arm_vmovltq_m_u8): Remove.
20543 (__arm_vmovlbq_m_s16): Remove.
20544 (__arm_vmovltq_m_s16): Remove.
20545 (__arm_vmovlbq_m_u16): Remove.
20546 (__arm_vmovltq_m_u16): Remove.
20547 (__arm_vmovlbq_x_s8): Remove.
20548 (__arm_vmovlbq_x_s16): Remove.
20549 (__arm_vmovlbq_x_u8): Remove.
20550 (__arm_vmovlbq_x_u16): Remove.
20551 (__arm_vmovltq_x_s8): Remove.
20552 (__arm_vmovltq_x_s16): Remove.
20553 (__arm_vmovltq_x_u8): Remove.
20554 (__arm_vmovltq_x_u16): Remove.
20555 (__arm_vmovlbq): Remove.
20556 (__arm_vmovltq): Remove.
20557 (__arm_vmovlbq_m): Remove.
20558 (__arm_vmovltq_m): Remove.
20559 (__arm_vmovlbq_x): Remove.
20560 (__arm_vmovltq_x): Remove.
20562 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20564 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
20565 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
20567 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20569 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
20570 (VMOVLBQ, VMOVLTQ): Merge into ...
20571 (VMOVLxQ): ... this.
20572 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
20573 (VMOVLxQ_M): ... this.
20574 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
20575 (mve_vmovlbq_<supf><mode>): Merge into ...
20576 (@mve_<mve_insn>q_<supf><mode>): ... this.
20577 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
20579 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20581 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20583 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
20584 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
20585 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
20586 * config/arm/arm-mve-builtins-functions.h
20587 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
20588 * config/arm/arm_mve.h (vaddlvq): Remove.
20589 (vaddlvq_p): Remove.
20590 (vaddlvq_s32): Remove.
20591 (vaddlvq_u32): Remove.
20592 (vaddlvq_p_s32): Remove.
20593 (vaddlvq_p_u32): Remove.
20594 (__arm_vaddlvq_s32): Remove.
20595 (__arm_vaddlvq_u32): Remove.
20596 (__arm_vaddlvq_p_s32): Remove.
20597 (__arm_vaddlvq_p_u32): Remove.
20598 (__arm_vaddlvq): Remove.
20599 (__arm_vaddlvq_p): Remove.
20601 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20603 * config/arm/iterators.md (mve_insn): Add vaddlv.
20604 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
20605 (@mve_<mve_insn>q_<supf>v4si): ... this.
20606 (mve_vaddlvq_p_<supf>v4si): Rename into ...
20607 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20609 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20611 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
20612 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
20614 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20616 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
20617 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
20618 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
20619 * config/arm/arm_mve.h (vaddvaq): Remove.
20620 (vaddvaq_p): Remove.
20621 (vaddvaq_u8): Remove.
20622 (vaddvaq_s8): Remove.
20623 (vaddvaq_u16): Remove.
20624 (vaddvaq_s16): Remove.
20625 (vaddvaq_u32): Remove.
20626 (vaddvaq_s32): Remove.
20627 (vaddvaq_p_u8): Remove.
20628 (vaddvaq_p_s8): Remove.
20629 (vaddvaq_p_u16): Remove.
20630 (vaddvaq_p_s16): Remove.
20631 (vaddvaq_p_u32): Remove.
20632 (vaddvaq_p_s32): Remove.
20633 (__arm_vaddvaq_u8): Remove.
20634 (__arm_vaddvaq_s8): Remove.
20635 (__arm_vaddvaq_u16): Remove.
20636 (__arm_vaddvaq_s16): Remove.
20637 (__arm_vaddvaq_u32): Remove.
20638 (__arm_vaddvaq_s32): Remove.
20639 (__arm_vaddvaq_p_u8): Remove.
20640 (__arm_vaddvaq_p_s8): Remove.
20641 (__arm_vaddvaq_p_u16): Remove.
20642 (__arm_vaddvaq_p_s16): Remove.
20643 (__arm_vaddvaq_p_u32): Remove.
20644 (__arm_vaddvaq_p_s32): Remove.
20645 (__arm_vaddvaq): Remove.
20646 (__arm_vaddvaq_p): Remove.
20648 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20650 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
20651 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
20653 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20655 * config/arm/iterators.md (mve_insn): Add vaddva.
20656 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
20657 (@mve_<mve_insn>q_<supf><mode>): ... this.
20658 (mve_vaddvaq_p_<supf><mode>): Rename into ...
20659 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20661 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20663 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
20664 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
20665 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
20666 * config/arm/arm_mve.h (vaddvq): Remove.
20667 (vaddvq_p): Remove.
20668 (vaddvq_s8): Remove.
20669 (vaddvq_s16): Remove.
20670 (vaddvq_s32): Remove.
20671 (vaddvq_u8): Remove.
20672 (vaddvq_u16): Remove.
20673 (vaddvq_u32): Remove.
20674 (vaddvq_p_u8): Remove.
20675 (vaddvq_p_s8): Remove.
20676 (vaddvq_p_u16): Remove.
20677 (vaddvq_p_s16): Remove.
20678 (vaddvq_p_u32): Remove.
20679 (vaddvq_p_s32): Remove.
20680 (__arm_vaddvq_s8): Remove.
20681 (__arm_vaddvq_s16): Remove.
20682 (__arm_vaddvq_s32): Remove.
20683 (__arm_vaddvq_u8): Remove.
20684 (__arm_vaddvq_u16): Remove.
20685 (__arm_vaddvq_u32): Remove.
20686 (__arm_vaddvq_p_u8): Remove.
20687 (__arm_vaddvq_p_s8): Remove.
20688 (__arm_vaddvq_p_u16): Remove.
20689 (__arm_vaddvq_p_s16): Remove.
20690 (__arm_vaddvq_p_u32): Remove.
20691 (__arm_vaddvq_p_s32): Remove.
20692 (__arm_vaddvq): Remove.
20693 (__arm_vaddvq_p): Remove.
20695 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20697 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
20698 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
20700 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20702 * config/arm/iterators.md (mve_insn): Add vaddv.
20703 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
20704 (@mve_<mve_insn>q_<supf><mode>): ... this.
20705 (mve_vaddvq_p_<supf><mode>): Rename into ...
20706 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20707 * config/arm/vec-common.md: Use gen_mve_q instead of
20710 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20712 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
20714 * config/arm/arm-mve-builtins-base.def (vdupq): New.
20715 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
20716 * config/arm/arm_mve.h (vdupq_n): Remove.
20718 (vdupq_n_f16): Remove.
20719 (vdupq_n_f32): Remove.
20720 (vdupq_n_s8): Remove.
20721 (vdupq_n_s16): Remove.
20722 (vdupq_n_s32): Remove.
20723 (vdupq_n_u8): Remove.
20724 (vdupq_n_u16): Remove.
20725 (vdupq_n_u32): Remove.
20726 (vdupq_m_n_u8): Remove.
20727 (vdupq_m_n_s8): Remove.
20728 (vdupq_m_n_u16): Remove.
20729 (vdupq_m_n_s16): Remove.
20730 (vdupq_m_n_u32): Remove.
20731 (vdupq_m_n_s32): Remove.
20732 (vdupq_m_n_f16): Remove.
20733 (vdupq_m_n_f32): Remove.
20734 (vdupq_x_n_s8): Remove.
20735 (vdupq_x_n_s16): Remove.
20736 (vdupq_x_n_s32): Remove.
20737 (vdupq_x_n_u8): Remove.
20738 (vdupq_x_n_u16): Remove.
20739 (vdupq_x_n_u32): Remove.
20740 (vdupq_x_n_f16): Remove.
20741 (vdupq_x_n_f32): Remove.
20742 (__arm_vdupq_n_s8): Remove.
20743 (__arm_vdupq_n_s16): Remove.
20744 (__arm_vdupq_n_s32): Remove.
20745 (__arm_vdupq_n_u8): Remove.
20746 (__arm_vdupq_n_u16): Remove.
20747 (__arm_vdupq_n_u32): Remove.
20748 (__arm_vdupq_m_n_u8): Remove.
20749 (__arm_vdupq_m_n_s8): Remove.
20750 (__arm_vdupq_m_n_u16): Remove.
20751 (__arm_vdupq_m_n_s16): Remove.
20752 (__arm_vdupq_m_n_u32): Remove.
20753 (__arm_vdupq_m_n_s32): Remove.
20754 (__arm_vdupq_x_n_s8): Remove.
20755 (__arm_vdupq_x_n_s16): Remove.
20756 (__arm_vdupq_x_n_s32): Remove.
20757 (__arm_vdupq_x_n_u8): Remove.
20758 (__arm_vdupq_x_n_u16): Remove.
20759 (__arm_vdupq_x_n_u32): Remove.
20760 (__arm_vdupq_n_f16): Remove.
20761 (__arm_vdupq_n_f32): Remove.
20762 (__arm_vdupq_m_n_f16): Remove.
20763 (__arm_vdupq_m_n_f32): Remove.
20764 (__arm_vdupq_x_n_f16): Remove.
20765 (__arm_vdupq_x_n_f32): Remove.
20766 (__arm_vdupq_n): Remove.
20767 (__arm_vdupq_m): Remove.
20769 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20771 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
20772 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
20774 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20776 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
20777 (MVE_FP_N_VDUPQ_ONLY): New.
20778 (mve_insn): Add vdupq.
20779 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
20780 (@mve_<mve_insn>q_n_f<mode>): ... this.
20781 (mve_vdupq_n_<supf><mode>): Rename into ...
20782 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20783 (mve_vdupq_m_n_<supf><mode>): Rename into ...
20784 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20785 (mve_vdupq_m_n_f<mode>): Rename into ...
20786 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
20788 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20790 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
20792 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
20794 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
20796 * config/arm/arm_mve.h (vrev16q): Remove.
20799 (vrev64q_m): Remove.
20800 (vrev16q_m): Remove.
20801 (vrev32q_m): Remove.
20802 (vrev16q_x): Remove.
20803 (vrev32q_x): Remove.
20804 (vrev64q_x): Remove.
20805 (vrev64q_f16): Remove.
20806 (vrev64q_f32): Remove.
20807 (vrev32q_f16): Remove.
20808 (vrev16q_s8): Remove.
20809 (vrev32q_s8): Remove.
20810 (vrev32q_s16): Remove.
20811 (vrev64q_s8): Remove.
20812 (vrev64q_s16): Remove.
20813 (vrev64q_s32): Remove.
20814 (vrev64q_u8): Remove.
20815 (vrev64q_u16): Remove.
20816 (vrev64q_u32): Remove.
20817 (vrev32q_u8): Remove.
20818 (vrev32q_u16): Remove.
20819 (vrev16q_u8): Remove.
20820 (vrev64q_m_u8): Remove.
20821 (vrev64q_m_s8): Remove.
20822 (vrev64q_m_u16): Remove.
20823 (vrev64q_m_s16): Remove.
20824 (vrev64q_m_u32): Remove.
20825 (vrev64q_m_s32): Remove.
20826 (vrev16q_m_s8): Remove.
20827 (vrev32q_m_f16): Remove.
20828 (vrev16q_m_u8): Remove.
20829 (vrev32q_m_s8): Remove.
20830 (vrev64q_m_f16): Remove.
20831 (vrev32q_m_u8): Remove.
20832 (vrev32q_m_s16): Remove.
20833 (vrev64q_m_f32): Remove.
20834 (vrev32q_m_u16): Remove.
20835 (vrev16q_x_s8): Remove.
20836 (vrev16q_x_u8): Remove.
20837 (vrev32q_x_s8): Remove.
20838 (vrev32q_x_s16): Remove.
20839 (vrev32q_x_u8): Remove.
20840 (vrev32q_x_u16): Remove.
20841 (vrev64q_x_s8): Remove.
20842 (vrev64q_x_s16): Remove.
20843 (vrev64q_x_s32): Remove.
20844 (vrev64q_x_u8): Remove.
20845 (vrev64q_x_u16): Remove.
20846 (vrev64q_x_u32): Remove.
20847 (vrev32q_x_f16): Remove.
20848 (vrev64q_x_f16): Remove.
20849 (vrev64q_x_f32): Remove.
20850 (__arm_vrev16q_s8): Remove.
20851 (__arm_vrev32q_s8): Remove.
20852 (__arm_vrev32q_s16): Remove.
20853 (__arm_vrev64q_s8): Remove.
20854 (__arm_vrev64q_s16): Remove.
20855 (__arm_vrev64q_s32): Remove.
20856 (__arm_vrev64q_u8): Remove.
20857 (__arm_vrev64q_u16): Remove.
20858 (__arm_vrev64q_u32): Remove.
20859 (__arm_vrev32q_u8): Remove.
20860 (__arm_vrev32q_u16): Remove.
20861 (__arm_vrev16q_u8): Remove.
20862 (__arm_vrev64q_m_u8): Remove.
20863 (__arm_vrev64q_m_s8): Remove.
20864 (__arm_vrev64q_m_u16): Remove.
20865 (__arm_vrev64q_m_s16): Remove.
20866 (__arm_vrev64q_m_u32): Remove.
20867 (__arm_vrev64q_m_s32): Remove.
20868 (__arm_vrev16q_m_s8): Remove.
20869 (__arm_vrev16q_m_u8): Remove.
20870 (__arm_vrev32q_m_s8): Remove.
20871 (__arm_vrev32q_m_u8): Remove.
20872 (__arm_vrev32q_m_s16): Remove.
20873 (__arm_vrev32q_m_u16): Remove.
20874 (__arm_vrev16q_x_s8): Remove.
20875 (__arm_vrev16q_x_u8): Remove.
20876 (__arm_vrev32q_x_s8): Remove.
20877 (__arm_vrev32q_x_s16): Remove.
20878 (__arm_vrev32q_x_u8): Remove.
20879 (__arm_vrev32q_x_u16): Remove.
20880 (__arm_vrev64q_x_s8): Remove.
20881 (__arm_vrev64q_x_s16): Remove.
20882 (__arm_vrev64q_x_s32): Remove.
20883 (__arm_vrev64q_x_u8): Remove.
20884 (__arm_vrev64q_x_u16): Remove.
20885 (__arm_vrev64q_x_u32): Remove.
20886 (__arm_vrev64q_f16): Remove.
20887 (__arm_vrev64q_f32): Remove.
20888 (__arm_vrev32q_f16): Remove.
20889 (__arm_vrev32q_m_f16): Remove.
20890 (__arm_vrev64q_m_f16): Remove.
20891 (__arm_vrev64q_m_f32): Remove.
20892 (__arm_vrev32q_x_f16): Remove.
20893 (__arm_vrev64q_x_f16): Remove.
20894 (__arm_vrev64q_x_f32): Remove.
20895 (__arm_vrev16q): Remove.
20896 (__arm_vrev32q): Remove.
20897 (__arm_vrev64q): Remove.
20898 (__arm_vrev64q_m): Remove.
20899 (__arm_vrev16q_m): Remove.
20900 (__arm_vrev32q_m): Remove.
20901 (__arm_vrev16q_x): Remove.
20902 (__arm_vrev32q_x): Remove.
20903 (__arm_vrev64q_x): Remove.
20905 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20907 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
20908 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
20909 (MVE_FP_M_VREV32Q_ONLY): New iterators.
20910 (mve_insn): Add vrev16q, vrev32q, vrev64q.
20911 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
20912 (@mve_<mve_insn>q_f<mode>): ... this
20913 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
20914 (mve_vrev64q_<supf><mode>): Rename into ...
20915 (@mve_<mve_insn>q_<supf><mode>): ... this.
20916 (mve_vrev32q_<supf><mode>): Rename into
20917 @mve_<mve_insn>q_<supf><mode>.
20918 (mve_vrev16q_<supf>v16qi): Rename into
20919 @mve_<mve_insn>q_<supf><mode>.
20920 (mve_vrev64q_m_<supf><mode>): Rename into
20921 @mve_<mve_insn>q_m_<supf><mode>.
20922 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
20923 (mve_vrev32q_m_<supf><mode>): Rename into
20924 @mve_<mve_insn>q_m_<supf><mode>.
20925 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
20926 (mve_vrev16q_m_<supf>v16qi): Rename into
20927 @mve_<mve_insn>q_m_<supf><mode>.
20929 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20931 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
20932 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
20933 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
20934 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
20935 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
20936 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
20937 * config/arm/arm-mve-builtins-functions.h (class
20938 unspec_based_mve_function_exact_insn_vcmp): New.
20939 * config/arm/arm-mve-builtins.cc
20940 (function_instance::has_inactive_argument): Handle vcmp.
20941 * config/arm/arm_mve.h (vcmpneq): Remove.
20949 (vcmpneq_m): Remove.
20950 (vcmphiq_m): Remove.
20951 (vcmpeqq_m): Remove.
20952 (vcmpcsq_m): Remove.
20953 (vcmpcsq_m_n): Remove.
20954 (vcmpltq_m): Remove.
20955 (vcmpleq_m): Remove.
20956 (vcmpgtq_m): Remove.
20957 (vcmpgeq_m): Remove.
20958 (vcmpneq_s8): Remove.
20959 (vcmpneq_s16): Remove.
20960 (vcmpneq_s32): Remove.
20961 (vcmpneq_u8): Remove.
20962 (vcmpneq_u16): Remove.
20963 (vcmpneq_u32): Remove.
20964 (vcmpneq_n_u8): Remove.
20965 (vcmphiq_u8): Remove.
20966 (vcmphiq_n_u8): Remove.
20967 (vcmpeqq_u8): Remove.
20968 (vcmpeqq_n_u8): Remove.
20969 (vcmpcsq_u8): Remove.
20970 (vcmpcsq_n_u8): Remove.
20971 (vcmpneq_n_s8): Remove.
20972 (vcmpltq_s8): Remove.
20973 (vcmpltq_n_s8): Remove.
20974 (vcmpleq_s8): Remove.
20975 (vcmpleq_n_s8): Remove.
20976 (vcmpgtq_s8): Remove.
20977 (vcmpgtq_n_s8): Remove.
20978 (vcmpgeq_s8): Remove.
20979 (vcmpgeq_n_s8): Remove.
20980 (vcmpeqq_s8): Remove.
20981 (vcmpeqq_n_s8): Remove.
20982 (vcmpneq_n_u16): Remove.
20983 (vcmphiq_u16): Remove.
20984 (vcmphiq_n_u16): Remove.
20985 (vcmpeqq_u16): Remove.
20986 (vcmpeqq_n_u16): Remove.
20987 (vcmpcsq_u16): Remove.
20988 (vcmpcsq_n_u16): Remove.
20989 (vcmpneq_n_s16): Remove.
20990 (vcmpltq_s16): Remove.
20991 (vcmpltq_n_s16): Remove.
20992 (vcmpleq_s16): Remove.
20993 (vcmpleq_n_s16): Remove.
20994 (vcmpgtq_s16): Remove.
20995 (vcmpgtq_n_s16): Remove.
20996 (vcmpgeq_s16): Remove.
20997 (vcmpgeq_n_s16): Remove.
20998 (vcmpeqq_s16): Remove.
20999 (vcmpeqq_n_s16): Remove.
21000 (vcmpneq_n_u32): Remove.
21001 (vcmphiq_u32): Remove.
21002 (vcmphiq_n_u32): Remove.
21003 (vcmpeqq_u32): Remove.
21004 (vcmpeqq_n_u32): Remove.
21005 (vcmpcsq_u32): Remove.
21006 (vcmpcsq_n_u32): Remove.
21007 (vcmpneq_n_s32): Remove.
21008 (vcmpltq_s32): Remove.
21009 (vcmpltq_n_s32): Remove.
21010 (vcmpleq_s32): Remove.
21011 (vcmpleq_n_s32): Remove.
21012 (vcmpgtq_s32): Remove.
21013 (vcmpgtq_n_s32): Remove.
21014 (vcmpgeq_s32): Remove.
21015 (vcmpgeq_n_s32): Remove.
21016 (vcmpeqq_s32): Remove.
21017 (vcmpeqq_n_s32): Remove.
21018 (vcmpneq_n_f16): Remove.
21019 (vcmpneq_f16): Remove.
21020 (vcmpltq_n_f16): Remove.
21021 (vcmpltq_f16): Remove.
21022 (vcmpleq_n_f16): Remove.
21023 (vcmpleq_f16): Remove.
21024 (vcmpgtq_n_f16): Remove.
21025 (vcmpgtq_f16): Remove.
21026 (vcmpgeq_n_f16): Remove.
21027 (vcmpgeq_f16): Remove.
21028 (vcmpeqq_n_f16): Remove.
21029 (vcmpeqq_f16): Remove.
21030 (vcmpneq_n_f32): Remove.
21031 (vcmpneq_f32): Remove.
21032 (vcmpltq_n_f32): Remove.
21033 (vcmpltq_f32): Remove.
21034 (vcmpleq_n_f32): Remove.
21035 (vcmpleq_f32): Remove.
21036 (vcmpgtq_n_f32): Remove.
21037 (vcmpgtq_f32): Remove.
21038 (vcmpgeq_n_f32): Remove.
21039 (vcmpgeq_f32): Remove.
21040 (vcmpeqq_n_f32): Remove.
21041 (vcmpeqq_f32): Remove.
21042 (vcmpeqq_m_f16): Remove.
21043 (vcmpeqq_m_f32): Remove.
21044 (vcmpneq_m_u8): Remove.
21045 (vcmpneq_m_n_u8): Remove.
21046 (vcmphiq_m_u8): Remove.
21047 (vcmphiq_m_n_u8): Remove.
21048 (vcmpeqq_m_u8): Remove.
21049 (vcmpeqq_m_n_u8): Remove.
21050 (vcmpcsq_m_u8): Remove.
21051 (vcmpcsq_m_n_u8): Remove.
21052 (vcmpneq_m_s8): Remove.
21053 (vcmpneq_m_n_s8): Remove.
21054 (vcmpltq_m_s8): Remove.
21055 (vcmpltq_m_n_s8): Remove.
21056 (vcmpleq_m_s8): Remove.
21057 (vcmpleq_m_n_s8): Remove.
21058 (vcmpgtq_m_s8): Remove.
21059 (vcmpgtq_m_n_s8): Remove.
21060 (vcmpgeq_m_s8): Remove.
21061 (vcmpgeq_m_n_s8): Remove.
21062 (vcmpeqq_m_s8): Remove.
21063 (vcmpeqq_m_n_s8): Remove.
21064 (vcmpneq_m_u16): Remove.
21065 (vcmpneq_m_n_u16): Remove.
21066 (vcmphiq_m_u16): Remove.
21067 (vcmphiq_m_n_u16): Remove.
21068 (vcmpeqq_m_u16): Remove.
21069 (vcmpeqq_m_n_u16): Remove.
21070 (vcmpcsq_m_u16): Remove.
21071 (vcmpcsq_m_n_u16): Remove.
21072 (vcmpneq_m_s16): Remove.
21073 (vcmpneq_m_n_s16): Remove.
21074 (vcmpltq_m_s16): Remove.
21075 (vcmpltq_m_n_s16): Remove.
21076 (vcmpleq_m_s16): Remove.
21077 (vcmpleq_m_n_s16): Remove.
21078 (vcmpgtq_m_s16): Remove.
21079 (vcmpgtq_m_n_s16): Remove.
21080 (vcmpgeq_m_s16): Remove.
21081 (vcmpgeq_m_n_s16): Remove.
21082 (vcmpeqq_m_s16): Remove.
21083 (vcmpeqq_m_n_s16): Remove.
21084 (vcmpneq_m_u32): Remove.
21085 (vcmpneq_m_n_u32): Remove.
21086 (vcmphiq_m_u32): Remove.
21087 (vcmphiq_m_n_u32): Remove.
21088 (vcmpeqq_m_u32): Remove.
21089 (vcmpeqq_m_n_u32): Remove.
21090 (vcmpcsq_m_u32): Remove.
21091 (vcmpcsq_m_n_u32): Remove.
21092 (vcmpneq_m_s32): Remove.
21093 (vcmpneq_m_n_s32): Remove.
21094 (vcmpltq_m_s32): Remove.
21095 (vcmpltq_m_n_s32): Remove.
21096 (vcmpleq_m_s32): Remove.
21097 (vcmpleq_m_n_s32): Remove.
21098 (vcmpgtq_m_s32): Remove.
21099 (vcmpgtq_m_n_s32): Remove.
21100 (vcmpgeq_m_s32): Remove.
21101 (vcmpgeq_m_n_s32): Remove.
21102 (vcmpeqq_m_s32): Remove.
21103 (vcmpeqq_m_n_s32): Remove.
21104 (vcmpeqq_m_n_f16): Remove.
21105 (vcmpgeq_m_f16): Remove.
21106 (vcmpgeq_m_n_f16): Remove.
21107 (vcmpgtq_m_f16): Remove.
21108 (vcmpgtq_m_n_f16): Remove.
21109 (vcmpleq_m_f16): Remove.
21110 (vcmpleq_m_n_f16): Remove.
21111 (vcmpltq_m_f16): Remove.
21112 (vcmpltq_m_n_f16): Remove.
21113 (vcmpneq_m_f16): Remove.
21114 (vcmpneq_m_n_f16): Remove.
21115 (vcmpeqq_m_n_f32): Remove.
21116 (vcmpgeq_m_f32): Remove.
21117 (vcmpgeq_m_n_f32): Remove.
21118 (vcmpgtq_m_f32): Remove.
21119 (vcmpgtq_m_n_f32): Remove.
21120 (vcmpleq_m_f32): Remove.
21121 (vcmpleq_m_n_f32): Remove.
21122 (vcmpltq_m_f32): Remove.
21123 (vcmpltq_m_n_f32): Remove.
21124 (vcmpneq_m_f32): Remove.
21125 (vcmpneq_m_n_f32): Remove.
21126 (__arm_vcmpneq_s8): Remove.
21127 (__arm_vcmpneq_s16): Remove.
21128 (__arm_vcmpneq_s32): Remove.
21129 (__arm_vcmpneq_u8): Remove.
21130 (__arm_vcmpneq_u16): Remove.
21131 (__arm_vcmpneq_u32): Remove.
21132 (__arm_vcmpneq_n_u8): Remove.
21133 (__arm_vcmphiq_u8): Remove.
21134 (__arm_vcmphiq_n_u8): Remove.
21135 (__arm_vcmpeqq_u8): Remove.
21136 (__arm_vcmpeqq_n_u8): Remove.
21137 (__arm_vcmpcsq_u8): Remove.
21138 (__arm_vcmpcsq_n_u8): Remove.
21139 (__arm_vcmpneq_n_s8): Remove.
21140 (__arm_vcmpltq_s8): Remove.
21141 (__arm_vcmpltq_n_s8): Remove.
21142 (__arm_vcmpleq_s8): Remove.
21143 (__arm_vcmpleq_n_s8): Remove.
21144 (__arm_vcmpgtq_s8): Remove.
21145 (__arm_vcmpgtq_n_s8): Remove.
21146 (__arm_vcmpgeq_s8): Remove.
21147 (__arm_vcmpgeq_n_s8): Remove.
21148 (__arm_vcmpeqq_s8): Remove.
21149 (__arm_vcmpeqq_n_s8): Remove.
21150 (__arm_vcmpneq_n_u16): Remove.
21151 (__arm_vcmphiq_u16): Remove.
21152 (__arm_vcmphiq_n_u16): Remove.
21153 (__arm_vcmpeqq_u16): Remove.
21154 (__arm_vcmpeqq_n_u16): Remove.
21155 (__arm_vcmpcsq_u16): Remove.
21156 (__arm_vcmpcsq_n_u16): Remove.
21157 (__arm_vcmpneq_n_s16): Remove.
21158 (__arm_vcmpltq_s16): Remove.
21159 (__arm_vcmpltq_n_s16): Remove.
21160 (__arm_vcmpleq_s16): Remove.
21161 (__arm_vcmpleq_n_s16): Remove.
21162 (__arm_vcmpgtq_s16): Remove.
21163 (__arm_vcmpgtq_n_s16): Remove.
21164 (__arm_vcmpgeq_s16): Remove.
21165 (__arm_vcmpgeq_n_s16): Remove.
21166 (__arm_vcmpeqq_s16): Remove.
21167 (__arm_vcmpeqq_n_s16): Remove.
21168 (__arm_vcmpneq_n_u32): Remove.
21169 (__arm_vcmphiq_u32): Remove.
21170 (__arm_vcmphiq_n_u32): Remove.
21171 (__arm_vcmpeqq_u32): Remove.
21172 (__arm_vcmpeqq_n_u32): Remove.
21173 (__arm_vcmpcsq_u32): Remove.
21174 (__arm_vcmpcsq_n_u32): Remove.
21175 (__arm_vcmpneq_n_s32): Remove.
21176 (__arm_vcmpltq_s32): Remove.
21177 (__arm_vcmpltq_n_s32): Remove.
21178 (__arm_vcmpleq_s32): Remove.
21179 (__arm_vcmpleq_n_s32): Remove.
21180 (__arm_vcmpgtq_s32): Remove.
21181 (__arm_vcmpgtq_n_s32): Remove.
21182 (__arm_vcmpgeq_s32): Remove.
21183 (__arm_vcmpgeq_n_s32): Remove.
21184 (__arm_vcmpeqq_s32): Remove.
21185 (__arm_vcmpeqq_n_s32): Remove.
21186 (__arm_vcmpneq_m_u8): Remove.
21187 (__arm_vcmpneq_m_n_u8): Remove.
21188 (__arm_vcmphiq_m_u8): Remove.
21189 (__arm_vcmphiq_m_n_u8): Remove.
21190 (__arm_vcmpeqq_m_u8): Remove.
21191 (__arm_vcmpeqq_m_n_u8): Remove.
21192 (__arm_vcmpcsq_m_u8): Remove.
21193 (__arm_vcmpcsq_m_n_u8): Remove.
21194 (__arm_vcmpneq_m_s8): Remove.
21195 (__arm_vcmpneq_m_n_s8): Remove.
21196 (__arm_vcmpltq_m_s8): Remove.
21197 (__arm_vcmpltq_m_n_s8): Remove.
21198 (__arm_vcmpleq_m_s8): Remove.
21199 (__arm_vcmpleq_m_n_s8): Remove.
21200 (__arm_vcmpgtq_m_s8): Remove.
21201 (__arm_vcmpgtq_m_n_s8): Remove.
21202 (__arm_vcmpgeq_m_s8): Remove.
21203 (__arm_vcmpgeq_m_n_s8): Remove.
21204 (__arm_vcmpeqq_m_s8): Remove.
21205 (__arm_vcmpeqq_m_n_s8): Remove.
21206 (__arm_vcmpneq_m_u16): Remove.
21207 (__arm_vcmpneq_m_n_u16): Remove.
21208 (__arm_vcmphiq_m_u16): Remove.
21209 (__arm_vcmphiq_m_n_u16): Remove.
21210 (__arm_vcmpeqq_m_u16): Remove.
21211 (__arm_vcmpeqq_m_n_u16): Remove.
21212 (__arm_vcmpcsq_m_u16): Remove.
21213 (__arm_vcmpcsq_m_n_u16): Remove.
21214 (__arm_vcmpneq_m_s16): Remove.
21215 (__arm_vcmpneq_m_n_s16): Remove.
21216 (__arm_vcmpltq_m_s16): Remove.
21217 (__arm_vcmpltq_m_n_s16): Remove.
21218 (__arm_vcmpleq_m_s16): Remove.
21219 (__arm_vcmpleq_m_n_s16): Remove.
21220 (__arm_vcmpgtq_m_s16): Remove.
21221 (__arm_vcmpgtq_m_n_s16): Remove.
21222 (__arm_vcmpgeq_m_s16): Remove.
21223 (__arm_vcmpgeq_m_n_s16): Remove.
21224 (__arm_vcmpeqq_m_s16): Remove.
21225 (__arm_vcmpeqq_m_n_s16): Remove.
21226 (__arm_vcmpneq_m_u32): Remove.
21227 (__arm_vcmpneq_m_n_u32): Remove.
21228 (__arm_vcmphiq_m_u32): Remove.
21229 (__arm_vcmphiq_m_n_u32): Remove.
21230 (__arm_vcmpeqq_m_u32): Remove.
21231 (__arm_vcmpeqq_m_n_u32): Remove.
21232 (__arm_vcmpcsq_m_u32): Remove.
21233 (__arm_vcmpcsq_m_n_u32): Remove.
21234 (__arm_vcmpneq_m_s32): Remove.
21235 (__arm_vcmpneq_m_n_s32): Remove.
21236 (__arm_vcmpltq_m_s32): Remove.
21237 (__arm_vcmpltq_m_n_s32): Remove.
21238 (__arm_vcmpleq_m_s32): Remove.
21239 (__arm_vcmpleq_m_n_s32): Remove.
21240 (__arm_vcmpgtq_m_s32): Remove.
21241 (__arm_vcmpgtq_m_n_s32): Remove.
21242 (__arm_vcmpgeq_m_s32): Remove.
21243 (__arm_vcmpgeq_m_n_s32): Remove.
21244 (__arm_vcmpeqq_m_s32): Remove.
21245 (__arm_vcmpeqq_m_n_s32): Remove.
21246 (__arm_vcmpneq_n_f16): Remove.
21247 (__arm_vcmpneq_f16): Remove.
21248 (__arm_vcmpltq_n_f16): Remove.
21249 (__arm_vcmpltq_f16): Remove.
21250 (__arm_vcmpleq_n_f16): Remove.
21251 (__arm_vcmpleq_f16): Remove.
21252 (__arm_vcmpgtq_n_f16): Remove.
21253 (__arm_vcmpgtq_f16): Remove.
21254 (__arm_vcmpgeq_n_f16): Remove.
21255 (__arm_vcmpgeq_f16): Remove.
21256 (__arm_vcmpeqq_n_f16): Remove.
21257 (__arm_vcmpeqq_f16): Remove.
21258 (__arm_vcmpneq_n_f32): Remove.
21259 (__arm_vcmpneq_f32): Remove.
21260 (__arm_vcmpltq_n_f32): Remove.
21261 (__arm_vcmpltq_f32): Remove.
21262 (__arm_vcmpleq_n_f32): Remove.
21263 (__arm_vcmpleq_f32): Remove.
21264 (__arm_vcmpgtq_n_f32): Remove.
21265 (__arm_vcmpgtq_f32): Remove.
21266 (__arm_vcmpgeq_n_f32): Remove.
21267 (__arm_vcmpgeq_f32): Remove.
21268 (__arm_vcmpeqq_n_f32): Remove.
21269 (__arm_vcmpeqq_f32): Remove.
21270 (__arm_vcmpeqq_m_f16): Remove.
21271 (__arm_vcmpeqq_m_f32): Remove.
21272 (__arm_vcmpeqq_m_n_f16): Remove.
21273 (__arm_vcmpgeq_m_f16): Remove.
21274 (__arm_vcmpgeq_m_n_f16): Remove.
21275 (__arm_vcmpgtq_m_f16): Remove.
21276 (__arm_vcmpgtq_m_n_f16): Remove.
21277 (__arm_vcmpleq_m_f16): Remove.
21278 (__arm_vcmpleq_m_n_f16): Remove.
21279 (__arm_vcmpltq_m_f16): Remove.
21280 (__arm_vcmpltq_m_n_f16): Remove.
21281 (__arm_vcmpneq_m_f16): Remove.
21282 (__arm_vcmpneq_m_n_f16): Remove.
21283 (__arm_vcmpeqq_m_n_f32): Remove.
21284 (__arm_vcmpgeq_m_f32): Remove.
21285 (__arm_vcmpgeq_m_n_f32): Remove.
21286 (__arm_vcmpgtq_m_f32): Remove.
21287 (__arm_vcmpgtq_m_n_f32): Remove.
21288 (__arm_vcmpleq_m_f32): Remove.
21289 (__arm_vcmpleq_m_n_f32): Remove.
21290 (__arm_vcmpltq_m_f32): Remove.
21291 (__arm_vcmpltq_m_n_f32): Remove.
21292 (__arm_vcmpneq_m_f32): Remove.
21293 (__arm_vcmpneq_m_n_f32): Remove.
21294 (__arm_vcmpneq): Remove.
21295 (__arm_vcmphiq): Remove.
21296 (__arm_vcmpeqq): Remove.
21297 (__arm_vcmpcsq): Remove.
21298 (__arm_vcmpltq): Remove.
21299 (__arm_vcmpleq): Remove.
21300 (__arm_vcmpgtq): Remove.
21301 (__arm_vcmpgeq): Remove.
21302 (__arm_vcmpneq_m): Remove.
21303 (__arm_vcmphiq_m): Remove.
21304 (__arm_vcmpeqq_m): Remove.
21305 (__arm_vcmpcsq_m): Remove.
21306 (__arm_vcmpltq_m): Remove.
21307 (__arm_vcmpleq_m): Remove.
21308 (__arm_vcmpgtq_m): Remove.
21309 (__arm_vcmpgeq_m): Remove.
21311 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21313 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
21314 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
21316 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21318 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
21319 (MVE_CMP_M_N_F, mve_cmp_op1): New.
21322 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
21323 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
21324 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
21325 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
21326 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
21327 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
21328 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
21329 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
21330 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
21331 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
21333 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
21334 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
21335 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
21336 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
21337 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
21339 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
21340 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
21341 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
21342 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
21343 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
21345 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
21347 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
21348 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
21349 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
21352 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
21354 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
21355 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
21356 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
21357 Simplify parity(rotate(x,y)) as parity(x).
21359 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21361 * config/riscv/autovec.md (@vec_series<mode>): New pattern
21362 * config/riscv/riscv-protos.h (expand_vec_series): New function.
21363 * config/riscv/riscv-v.cc (emit_binop): Ditto.
21364 (emit_index_op): Ditto.
21365 (expand_vec_series): Ditto.
21366 (expand_const_vector): Add series vector handling.
21367 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
21369 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
21371 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
21372 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
21373 (*concat<mode><dwi>3_2): Likewise.
21374 (*concat<mode><dwi>3_3): Likewise.
21375 (*concat<mode><dwi>3_4): Likewise.
21376 (*concat<mode><dwi>3_5): Likewise.
21377 (*concat<mode><dwi>3_6): Likewise.
21378 (*concat<mode><dwi>3_7): Likewise.
21380 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
21383 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
21384 (<insn>v4qiv4hi2): New expander.
21385 (<insn>v2hiv2si2): Ditto.
21386 (<insn>v2qiv2si2): Ditto.
21387 (<insn>v2qiv2hi2): Ditto.
21389 2023-05-10 Jeff Law <jlaw@ventanamicro>
21391 * config/h8300/constraints.md (Q): Make this a special memory
21395 2023-05-10 Jakub Jelinek <jakub@redhat.com>
21398 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
21399 if t is void_list_node.
21401 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21403 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
21404 (aarch64_sqmovun<mode>_insn_be): Delete.
21405 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
21406 (aarch64_sqmovun<mode>): Delete expander.
21408 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21411 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
21413 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
21414 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
21415 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
21417 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21420 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
21422 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
21423 (aarch64_<sur>qadd<mode>): Rename to...
21424 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
21426 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21428 * config/aarch64/aarch64-simd.md
21429 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
21430 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
21431 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
21432 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
21434 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21437 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
21438 (aarch64_xtn<mode>_insn_be): Likewise.
21439 (trunc<mode><Vnarrowq>2): Rename to...
21440 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
21441 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
21442 (aarch64_<su>qmovn<mode>): Likewise.
21443 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
21444 (aarch64_<su>qmovn<mode>_insn_le): Delete.
21445 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
21447 2023-05-10 Li Xu <xuli1@eswincomputing.com>
21449 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
21450 intruction replace null avl with (const_int 0).
21452 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21454 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
21457 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21460 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
21461 (source_equal_p): Fix dead loop in vsetvl avl checking.
21463 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
21465 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
21466 of modeadjusted_dccr.
21468 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21470 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
21471 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
21472 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
21473 * config/arm/arm-mve-builtins.cc
21474 (function_instance::has_inactive_argument): Handle vmaxaq and
21476 * config/arm/arm_mve.h (vminaq): Remove.
21478 (vminaq_m): Remove.
21479 (vmaxaq_m): Remove.
21480 (vminaq_s8): Remove.
21481 (vmaxaq_s8): Remove.
21482 (vminaq_s16): Remove.
21483 (vmaxaq_s16): Remove.
21484 (vminaq_s32): Remove.
21485 (vmaxaq_s32): Remove.
21486 (vminaq_m_s8): Remove.
21487 (vmaxaq_m_s8): Remove.
21488 (vminaq_m_s16): Remove.
21489 (vmaxaq_m_s16): Remove.
21490 (vminaq_m_s32): Remove.
21491 (vmaxaq_m_s32): Remove.
21492 (__arm_vminaq_s8): Remove.
21493 (__arm_vmaxaq_s8): Remove.
21494 (__arm_vminaq_s16): Remove.
21495 (__arm_vmaxaq_s16): Remove.
21496 (__arm_vminaq_s32): Remove.
21497 (__arm_vmaxaq_s32): Remove.
21498 (__arm_vminaq_m_s8): Remove.
21499 (__arm_vmaxaq_m_s8): Remove.
21500 (__arm_vminaq_m_s16): Remove.
21501 (__arm_vmaxaq_m_s16): Remove.
21502 (__arm_vminaq_m_s32): Remove.
21503 (__arm_vmaxaq_m_s32): Remove.
21504 (__arm_vminaq): Remove.
21505 (__arm_vmaxaq): Remove.
21506 (__arm_vminaq_m): Remove.
21507 (__arm_vmaxaq_m): Remove.
21509 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21511 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
21513 (mve_insn): Add vmaxa, vmina.
21514 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
21515 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
21517 (@mve_<mve_insn>q_<supf><mode>): ... this.
21518 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
21519 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
21521 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21523 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
21524 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
21526 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21528 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
21529 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
21530 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
21531 * config/arm/arm-mve-builtins.cc
21532 (function_instance::has_inactive_argument): Handle vmaxnmaq and
21534 * config/arm/arm_mve.h (vminnmaq): Remove.
21535 (vmaxnmaq): Remove.
21536 (vmaxnmaq_m): Remove.
21537 (vminnmaq_m): Remove.
21538 (vminnmaq_f16): Remove.
21539 (vmaxnmaq_f16): Remove.
21540 (vminnmaq_f32): Remove.
21541 (vmaxnmaq_f32): Remove.
21542 (vmaxnmaq_m_f16): Remove.
21543 (vminnmaq_m_f16): Remove.
21544 (vmaxnmaq_m_f32): Remove.
21545 (vminnmaq_m_f32): Remove.
21546 (__arm_vminnmaq_f16): Remove.
21547 (__arm_vmaxnmaq_f16): Remove.
21548 (__arm_vminnmaq_f32): Remove.
21549 (__arm_vmaxnmaq_f32): Remove.
21550 (__arm_vmaxnmaq_m_f16): Remove.
21551 (__arm_vminnmaq_m_f16): Remove.
21552 (__arm_vmaxnmaq_m_f32): Remove.
21553 (__arm_vminnmaq_m_f32): Remove.
21554 (__arm_vminnmaq): Remove.
21555 (__arm_vmaxnmaq): Remove.
21556 (__arm_vmaxnmaq_m): Remove.
21557 (__arm_vminnmaq_m): Remove.
21559 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21561 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
21562 (MVE_VMAXNMA_VMINNMAQ_M): New.
21563 (mve_insn): Add vmaxnma, vminnma.
21564 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
21566 (@mve_<mve_insn>q_f<mode>): ... this.
21567 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
21568 (@mve_<mve_insn>q_m_f<mode>): ... this.
21570 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21572 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
21573 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
21574 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
21575 (vminnmavq, vminnmvq): New.
21576 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
21577 (vminnmavq, vminnmvq): New.
21578 * config/arm/arm_mve.h (vminnmvq): Remove.
21579 (vminnmavq): Remove.
21580 (vmaxnmvq): Remove.
21581 (vmaxnmavq): Remove.
21582 (vmaxnmavq_p): Remove.
21583 (vmaxnmvq_p): Remove.
21584 (vminnmavq_p): Remove.
21585 (vminnmvq_p): Remove.
21586 (vminnmvq_f16): Remove.
21587 (vminnmavq_f16): Remove.
21588 (vmaxnmvq_f16): Remove.
21589 (vmaxnmavq_f16): Remove.
21590 (vminnmvq_f32): Remove.
21591 (vminnmavq_f32): Remove.
21592 (vmaxnmvq_f32): Remove.
21593 (vmaxnmavq_f32): Remove.
21594 (vmaxnmavq_p_f16): Remove.
21595 (vmaxnmvq_p_f16): Remove.
21596 (vminnmavq_p_f16): Remove.
21597 (vminnmvq_p_f16): Remove.
21598 (vmaxnmavq_p_f32): Remove.
21599 (vmaxnmvq_p_f32): Remove.
21600 (vminnmavq_p_f32): Remove.
21601 (vminnmvq_p_f32): Remove.
21602 (__arm_vminnmvq_f16): Remove.
21603 (__arm_vminnmavq_f16): Remove.
21604 (__arm_vmaxnmvq_f16): Remove.
21605 (__arm_vmaxnmavq_f16): Remove.
21606 (__arm_vminnmvq_f32): Remove.
21607 (__arm_vminnmavq_f32): Remove.
21608 (__arm_vmaxnmvq_f32): Remove.
21609 (__arm_vmaxnmavq_f32): Remove.
21610 (__arm_vmaxnmavq_p_f16): Remove.
21611 (__arm_vmaxnmvq_p_f16): Remove.
21612 (__arm_vminnmavq_p_f16): Remove.
21613 (__arm_vminnmvq_p_f16): Remove.
21614 (__arm_vmaxnmavq_p_f32): Remove.
21615 (__arm_vmaxnmvq_p_f32): Remove.
21616 (__arm_vminnmavq_p_f32): Remove.
21617 (__arm_vminnmvq_p_f32): Remove.
21618 (__arm_vminnmvq): Remove.
21619 (__arm_vminnmavq): Remove.
21620 (__arm_vmaxnmvq): Remove.
21621 (__arm_vmaxnmavq): Remove.
21622 (__arm_vmaxnmavq_p): Remove.
21623 (__arm_vmaxnmvq_p): Remove.
21624 (__arm_vminnmavq_p): Remove.
21625 (__arm_vminnmvq_p): Remove.
21626 (__arm_vmaxnmavq_m): Remove.
21627 (__arm_vmaxnmvq_m): Remove.
21629 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21631 * config/arm/arm-mve-builtins-functions.h
21632 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
21634 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21636 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
21637 (MVE_VMAXNMxV_MINNMxVQ_P): New.
21638 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
21639 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
21640 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
21641 (@mve_<mve_insn>q_f<mode>): ... this.
21642 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
21643 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
21644 (@mve_<mve_insn>q_p_f<mode>): ... this.
21646 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21648 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
21649 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
21650 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
21651 * config/arm/arm_mve.h (vminnmq): Remove.
21653 (vmaxnmq_m): Remove.
21654 (vminnmq_m): Remove.
21655 (vminnmq_x): Remove.
21656 (vmaxnmq_x): Remove.
21657 (vminnmq_f16): Remove.
21658 (vmaxnmq_f16): Remove.
21659 (vminnmq_f32): Remove.
21660 (vmaxnmq_f32): Remove.
21661 (vmaxnmq_m_f32): Remove.
21662 (vmaxnmq_m_f16): Remove.
21663 (vminnmq_m_f32): Remove.
21664 (vminnmq_m_f16): Remove.
21665 (vminnmq_x_f16): Remove.
21666 (vminnmq_x_f32): Remove.
21667 (vmaxnmq_x_f16): Remove.
21668 (vmaxnmq_x_f32): Remove.
21669 (__arm_vminnmq_f16): Remove.
21670 (__arm_vmaxnmq_f16): Remove.
21671 (__arm_vminnmq_f32): Remove.
21672 (__arm_vmaxnmq_f32): Remove.
21673 (__arm_vmaxnmq_m_f32): Remove.
21674 (__arm_vmaxnmq_m_f16): Remove.
21675 (__arm_vminnmq_m_f32): Remove.
21676 (__arm_vminnmq_m_f16): Remove.
21677 (__arm_vminnmq_x_f16): Remove.
21678 (__arm_vminnmq_x_f32): Remove.
21679 (__arm_vmaxnmq_x_f16): Remove.
21680 (__arm_vmaxnmq_x_f32): Remove.
21681 (__arm_vminnmq): Remove.
21682 (__arm_vmaxnmq): Remove.
21683 (__arm_vmaxnmq_m): Remove.
21684 (__arm_vminnmq_m): Remove.
21685 (__arm_vminnmq_x): Remove.
21686 (__arm_vmaxnmq_x): Remove.
21688 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21690 * config/arm/iterators.md (MAX_MIN_F): New.
21691 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
21692 (mve_insn): Add vmaxnm, vminnm.
21693 (max_min_f_str): New.
21694 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
21696 (@mve_<max_min_f_str>q_f<mode>): ... this.
21697 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
21698 (@mve_<mve_insn>q_m_f<mode>): ... this.
21700 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21702 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
21703 (smax<mode>3): Likewise.
21705 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21707 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
21708 (FUNCTION_PRED_P_S): New.
21709 (vmaxavq, vminavq, vmaxvq, vminvq): New.
21710 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
21712 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
21714 * config/arm/arm_mve.h (vminvq): Remove.
21716 (vminvq_p): Remove.
21717 (vmaxvq_p): Remove.
21718 (vminvq_u8): Remove.
21719 (vmaxvq_u8): Remove.
21720 (vminvq_s8): Remove.
21721 (vmaxvq_s8): Remove.
21722 (vminvq_u16): Remove.
21723 (vmaxvq_u16): Remove.
21724 (vminvq_s16): Remove.
21725 (vmaxvq_s16): Remove.
21726 (vminvq_u32): Remove.
21727 (vmaxvq_u32): Remove.
21728 (vminvq_s32): Remove.
21729 (vmaxvq_s32): Remove.
21730 (vminvq_p_u8): Remove.
21731 (vmaxvq_p_u8): Remove.
21732 (vminvq_p_s8): Remove.
21733 (vmaxvq_p_s8): Remove.
21734 (vminvq_p_u16): Remove.
21735 (vmaxvq_p_u16): Remove.
21736 (vminvq_p_s16): Remove.
21737 (vmaxvq_p_s16): Remove.
21738 (vminvq_p_u32): Remove.
21739 (vmaxvq_p_u32): Remove.
21740 (vminvq_p_s32): Remove.
21741 (vmaxvq_p_s32): Remove.
21742 (__arm_vminvq_u8): Remove.
21743 (__arm_vmaxvq_u8): Remove.
21744 (__arm_vminvq_s8): Remove.
21745 (__arm_vmaxvq_s8): Remove.
21746 (__arm_vminvq_u16): Remove.
21747 (__arm_vmaxvq_u16): Remove.
21748 (__arm_vminvq_s16): Remove.
21749 (__arm_vmaxvq_s16): Remove.
21750 (__arm_vminvq_u32): Remove.
21751 (__arm_vmaxvq_u32): Remove.
21752 (__arm_vminvq_s32): Remove.
21753 (__arm_vmaxvq_s32): Remove.
21754 (__arm_vminvq_p_u8): Remove.
21755 (__arm_vmaxvq_p_u8): Remove.
21756 (__arm_vminvq_p_s8): Remove.
21757 (__arm_vmaxvq_p_s8): Remove.
21758 (__arm_vminvq_p_u16): Remove.
21759 (__arm_vmaxvq_p_u16): Remove.
21760 (__arm_vminvq_p_s16): Remove.
21761 (__arm_vmaxvq_p_s16): Remove.
21762 (__arm_vminvq_p_u32): Remove.
21763 (__arm_vmaxvq_p_u32): Remove.
21764 (__arm_vminvq_p_s32): Remove.
21765 (__arm_vmaxvq_p_s32): Remove.
21766 (__arm_vminvq): Remove.
21767 (__arm_vmaxvq): Remove.
21768 (__arm_vminvq_p): Remove.
21769 (__arm_vmaxvq_p): Remove.
21772 (vminavq_p): Remove.
21773 (vmaxavq_p): Remove.
21774 (vminavq_s8): Remove.
21775 (vmaxavq_s8): Remove.
21776 (vminavq_s16): Remove.
21777 (vmaxavq_s16): Remove.
21778 (vminavq_s32): Remove.
21779 (vmaxavq_s32): Remove.
21780 (vminavq_p_s8): Remove.
21781 (vmaxavq_p_s8): Remove.
21782 (vminavq_p_s16): Remove.
21783 (vmaxavq_p_s16): Remove.
21784 (vminavq_p_s32): Remove.
21785 (vmaxavq_p_s32): Remove.
21786 (__arm_vminavq_s8): Remove.
21787 (__arm_vmaxavq_s8): Remove.
21788 (__arm_vminavq_s16): Remove.
21789 (__arm_vmaxavq_s16): Remove.
21790 (__arm_vminavq_s32): Remove.
21791 (__arm_vmaxavq_s32): Remove.
21792 (__arm_vminavq_p_s8): Remove.
21793 (__arm_vmaxavq_p_s8): Remove.
21794 (__arm_vminavq_p_s16): Remove.
21795 (__arm_vmaxavq_p_s16): Remove.
21796 (__arm_vminavq_p_s32): Remove.
21797 (__arm_vmaxavq_p_s32): Remove.
21798 (__arm_vminavq): Remove.
21799 (__arm_vmaxavq): Remove.
21800 (__arm_vminavq_p): Remove.
21801 (__arm_vmaxavq_p): Remove.
21803 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21805 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
21806 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
21807 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
21808 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
21809 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
21810 (@mve_<mve_insn>q_<supf><mode>): ... this.
21811 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
21812 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
21813 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21815 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21817 * config/arm/arm-mve-builtins-functions.h (class
21818 unspec_mve_function_exact_insn_pred_p): New.
21820 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21822 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
21823 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
21825 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21827 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
21828 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
21830 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
21832 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
21834 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
21835 (ADJUST_REG_ALLOC_ORDER): Likewise.
21836 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
21838 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
21839 Upa rather than Upl for unpredicated movprfx alternatives.
21841 2023-05-09 Jeff Law <jlaw@ventanamicro>
21843 * config/h8300/testcompare.md: Add peephole2 which uses a memory
21844 load to set flags, thus eliminating a compare against zero.
21846 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21848 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
21849 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
21850 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
21851 * config/arm/arm_mve.h (vshlltq): Remove.
21853 (vshllbq_m): Remove.
21854 (vshlltq_m): Remove.
21855 (vshllbq_x): Remove.
21856 (vshlltq_x): Remove.
21857 (vshlltq_n_u8): Remove.
21858 (vshllbq_n_u8): Remove.
21859 (vshlltq_n_s8): Remove.
21860 (vshllbq_n_s8): Remove.
21861 (vshlltq_n_u16): Remove.
21862 (vshllbq_n_u16): Remove.
21863 (vshlltq_n_s16): Remove.
21864 (vshllbq_n_s16): Remove.
21865 (vshllbq_m_n_s8): Remove.
21866 (vshllbq_m_n_s16): Remove.
21867 (vshllbq_m_n_u8): Remove.
21868 (vshllbq_m_n_u16): Remove.
21869 (vshlltq_m_n_s8): Remove.
21870 (vshlltq_m_n_s16): Remove.
21871 (vshlltq_m_n_u8): Remove.
21872 (vshlltq_m_n_u16): Remove.
21873 (vshllbq_x_n_s8): Remove.
21874 (vshllbq_x_n_s16): Remove.
21875 (vshllbq_x_n_u8): Remove.
21876 (vshllbq_x_n_u16): Remove.
21877 (vshlltq_x_n_s8): Remove.
21878 (vshlltq_x_n_s16): Remove.
21879 (vshlltq_x_n_u8): Remove.
21880 (vshlltq_x_n_u16): Remove.
21881 (__arm_vshlltq_n_u8): Remove.
21882 (__arm_vshllbq_n_u8): Remove.
21883 (__arm_vshlltq_n_s8): Remove.
21884 (__arm_vshllbq_n_s8): Remove.
21885 (__arm_vshlltq_n_u16): Remove.
21886 (__arm_vshllbq_n_u16): Remove.
21887 (__arm_vshlltq_n_s16): Remove.
21888 (__arm_vshllbq_n_s16): Remove.
21889 (__arm_vshllbq_m_n_s8): Remove.
21890 (__arm_vshllbq_m_n_s16): Remove.
21891 (__arm_vshllbq_m_n_u8): Remove.
21892 (__arm_vshllbq_m_n_u16): Remove.
21893 (__arm_vshlltq_m_n_s8): Remove.
21894 (__arm_vshlltq_m_n_s16): Remove.
21895 (__arm_vshlltq_m_n_u8): Remove.
21896 (__arm_vshlltq_m_n_u16): Remove.
21897 (__arm_vshllbq_x_n_s8): Remove.
21898 (__arm_vshllbq_x_n_s16): Remove.
21899 (__arm_vshllbq_x_n_u8): Remove.
21900 (__arm_vshllbq_x_n_u16): Remove.
21901 (__arm_vshlltq_x_n_s8): Remove.
21902 (__arm_vshlltq_x_n_s16): Remove.
21903 (__arm_vshlltq_x_n_u8): Remove.
21904 (__arm_vshlltq_x_n_u16): Remove.
21905 (__arm_vshlltq): Remove.
21906 (__arm_vshllbq): Remove.
21907 (__arm_vshllbq_m): Remove.
21908 (__arm_vshlltq_m): Remove.
21909 (__arm_vshllbq_x): Remove.
21910 (__arm_vshlltq_x): Remove.
21912 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21914 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
21915 (VSHLLBQ_N, VSHLLTQ_N): Remove.
21917 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
21918 (VSHLLxQ_M_N): New.
21919 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
21920 (mve_vshlltq_n_<supf><mode>): Merge into ...
21921 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21922 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
21924 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21926 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21928 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
21929 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
21931 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21933 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
21934 (vqmovntq, vqmovunbq, vqmovuntq): New.
21935 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
21936 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
21937 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
21938 (vqmovntq, vqmovunbq, vqmovuntq): New.
21939 * config/arm/arm-mve-builtins.cc
21940 (function_instance::has_inactive_argument): Handle vmovnbq,
21941 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
21942 * config/arm/arm_mve.h (vqmovntq): Remove.
21943 (vqmovnbq): Remove.
21944 (vqmovnbq_m): Remove.
21945 (vqmovntq_m): Remove.
21946 (vqmovntq_u16): Remove.
21947 (vqmovnbq_u16): Remove.
21948 (vqmovntq_s16): Remove.
21949 (vqmovnbq_s16): Remove.
21950 (vqmovntq_u32): Remove.
21951 (vqmovnbq_u32): Remove.
21952 (vqmovntq_s32): Remove.
21953 (vqmovnbq_s32): Remove.
21954 (vqmovnbq_m_s16): Remove.
21955 (vqmovntq_m_s16): Remove.
21956 (vqmovnbq_m_u16): Remove.
21957 (vqmovntq_m_u16): Remove.
21958 (vqmovnbq_m_s32): Remove.
21959 (vqmovntq_m_s32): Remove.
21960 (vqmovnbq_m_u32): Remove.
21961 (vqmovntq_m_u32): Remove.
21962 (__arm_vqmovntq_u16): Remove.
21963 (__arm_vqmovnbq_u16): Remove.
21964 (__arm_vqmovntq_s16): Remove.
21965 (__arm_vqmovnbq_s16): Remove.
21966 (__arm_vqmovntq_u32): Remove.
21967 (__arm_vqmovnbq_u32): Remove.
21968 (__arm_vqmovntq_s32): Remove.
21969 (__arm_vqmovnbq_s32): Remove.
21970 (__arm_vqmovnbq_m_s16): Remove.
21971 (__arm_vqmovntq_m_s16): Remove.
21972 (__arm_vqmovnbq_m_u16): Remove.
21973 (__arm_vqmovntq_m_u16): Remove.
21974 (__arm_vqmovnbq_m_s32): Remove.
21975 (__arm_vqmovntq_m_s32): Remove.
21976 (__arm_vqmovnbq_m_u32): Remove.
21977 (__arm_vqmovntq_m_u32): Remove.
21978 (__arm_vqmovntq): Remove.
21979 (__arm_vqmovnbq): Remove.
21980 (__arm_vqmovnbq_m): Remove.
21981 (__arm_vqmovntq_m): Remove.
21984 (vmovnbq_m): Remove.
21985 (vmovntq_m): Remove.
21986 (vmovntq_u16): Remove.
21987 (vmovnbq_u16): Remove.
21988 (vmovntq_s16): Remove.
21989 (vmovnbq_s16): Remove.
21990 (vmovntq_u32): Remove.
21991 (vmovnbq_u32): Remove.
21992 (vmovntq_s32): Remove.
21993 (vmovnbq_s32): Remove.
21994 (vmovnbq_m_s16): Remove.
21995 (vmovntq_m_s16): Remove.
21996 (vmovnbq_m_u16): Remove.
21997 (vmovntq_m_u16): Remove.
21998 (vmovnbq_m_s32): Remove.
21999 (vmovntq_m_s32): Remove.
22000 (vmovnbq_m_u32): Remove.
22001 (vmovntq_m_u32): Remove.
22002 (__arm_vmovntq_u16): Remove.
22003 (__arm_vmovnbq_u16): Remove.
22004 (__arm_vmovntq_s16): Remove.
22005 (__arm_vmovnbq_s16): Remove.
22006 (__arm_vmovntq_u32): Remove.
22007 (__arm_vmovnbq_u32): Remove.
22008 (__arm_vmovntq_s32): Remove.
22009 (__arm_vmovnbq_s32): Remove.
22010 (__arm_vmovnbq_m_s16): Remove.
22011 (__arm_vmovntq_m_s16): Remove.
22012 (__arm_vmovnbq_m_u16): Remove.
22013 (__arm_vmovntq_m_u16): Remove.
22014 (__arm_vmovnbq_m_s32): Remove.
22015 (__arm_vmovntq_m_s32): Remove.
22016 (__arm_vmovnbq_m_u32): Remove.
22017 (__arm_vmovntq_m_u32): Remove.
22018 (__arm_vmovntq): Remove.
22019 (__arm_vmovnbq): Remove.
22020 (__arm_vmovnbq_m): Remove.
22021 (__arm_vmovntq_m): Remove.
22022 (vqmovuntq): Remove.
22023 (vqmovunbq): Remove.
22024 (vqmovunbq_m): Remove.
22025 (vqmovuntq_m): Remove.
22026 (vqmovuntq_s16): Remove.
22027 (vqmovunbq_s16): Remove.
22028 (vqmovuntq_s32): Remove.
22029 (vqmovunbq_s32): Remove.
22030 (vqmovunbq_m_s16): Remove.
22031 (vqmovuntq_m_s16): Remove.
22032 (vqmovunbq_m_s32): Remove.
22033 (vqmovuntq_m_s32): Remove.
22034 (__arm_vqmovuntq_s16): Remove.
22035 (__arm_vqmovunbq_s16): Remove.
22036 (__arm_vqmovuntq_s32): Remove.
22037 (__arm_vqmovunbq_s32): Remove.
22038 (__arm_vqmovunbq_m_s16): Remove.
22039 (__arm_vqmovuntq_m_s16): Remove.
22040 (__arm_vqmovunbq_m_s32): Remove.
22041 (__arm_vqmovuntq_m_s32): Remove.
22042 (__arm_vqmovuntq): Remove.
22043 (__arm_vqmovunbq): Remove.
22044 (__arm_vqmovunbq_m): Remove.
22045 (__arm_vqmovuntq_m): Remove.
22047 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22049 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
22050 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
22053 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
22055 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
22056 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
22057 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
22058 (mve_vqmovuntq_s<mode>): Merge into ...
22059 (@mve_<mve_insn>q_<supf><mode>): ... this.
22060 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
22061 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
22062 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
22063 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22065 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22067 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
22068 (binary_move_narrow_unsigned): New.
22069 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
22070 (binary_move_narrow_unsigned): New.
22072 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22074 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
22075 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
22076 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
22077 (vrndpq, vrndq, vrndxq): New.
22078 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
22079 (vrndpq, vrndq, vrndxq): New.
22080 * config/arm/arm_mve.h (vrndxq): Remove.
22086 (vrndaq_m): Remove.
22087 (vrndmq_m): Remove.
22088 (vrndnq_m): Remove.
22089 (vrndpq_m): Remove.
22091 (vrndxq_m): Remove.
22093 (vrndnq_x): Remove.
22094 (vrndmq_x): Remove.
22095 (vrndpq_x): Remove.
22096 (vrndaq_x): Remove.
22097 (vrndxq_x): Remove.
22098 (vrndxq_f16): Remove.
22099 (vrndxq_f32): Remove.
22100 (vrndq_f16): Remove.
22101 (vrndq_f32): Remove.
22102 (vrndpq_f16): Remove.
22103 (vrndpq_f32): Remove.
22104 (vrndnq_f16): Remove.
22105 (vrndnq_f32): Remove.
22106 (vrndmq_f16): Remove.
22107 (vrndmq_f32): Remove.
22108 (vrndaq_f16): Remove.
22109 (vrndaq_f32): Remove.
22110 (vrndaq_m_f16): Remove.
22111 (vrndmq_m_f16): Remove.
22112 (vrndnq_m_f16): Remove.
22113 (vrndpq_m_f16): Remove.
22114 (vrndq_m_f16): Remove.
22115 (vrndxq_m_f16): Remove.
22116 (vrndaq_m_f32): Remove.
22117 (vrndmq_m_f32): Remove.
22118 (vrndnq_m_f32): Remove.
22119 (vrndpq_m_f32): Remove.
22120 (vrndq_m_f32): Remove.
22121 (vrndxq_m_f32): Remove.
22122 (vrndq_x_f16): Remove.
22123 (vrndq_x_f32): Remove.
22124 (vrndnq_x_f16): Remove.
22125 (vrndnq_x_f32): Remove.
22126 (vrndmq_x_f16): Remove.
22127 (vrndmq_x_f32): Remove.
22128 (vrndpq_x_f16): Remove.
22129 (vrndpq_x_f32): Remove.
22130 (vrndaq_x_f16): Remove.
22131 (vrndaq_x_f32): Remove.
22132 (vrndxq_x_f16): Remove.
22133 (vrndxq_x_f32): Remove.
22134 (__arm_vrndxq_f16): Remove.
22135 (__arm_vrndxq_f32): Remove.
22136 (__arm_vrndq_f16): Remove.
22137 (__arm_vrndq_f32): Remove.
22138 (__arm_vrndpq_f16): Remove.
22139 (__arm_vrndpq_f32): Remove.
22140 (__arm_vrndnq_f16): Remove.
22141 (__arm_vrndnq_f32): Remove.
22142 (__arm_vrndmq_f16): Remove.
22143 (__arm_vrndmq_f32): Remove.
22144 (__arm_vrndaq_f16): Remove.
22145 (__arm_vrndaq_f32): Remove.
22146 (__arm_vrndaq_m_f16): Remove.
22147 (__arm_vrndmq_m_f16): Remove.
22148 (__arm_vrndnq_m_f16): Remove.
22149 (__arm_vrndpq_m_f16): Remove.
22150 (__arm_vrndq_m_f16): Remove.
22151 (__arm_vrndxq_m_f16): Remove.
22152 (__arm_vrndaq_m_f32): Remove.
22153 (__arm_vrndmq_m_f32): Remove.
22154 (__arm_vrndnq_m_f32): Remove.
22155 (__arm_vrndpq_m_f32): Remove.
22156 (__arm_vrndq_m_f32): Remove.
22157 (__arm_vrndxq_m_f32): Remove.
22158 (__arm_vrndq_x_f16): Remove.
22159 (__arm_vrndq_x_f32): Remove.
22160 (__arm_vrndnq_x_f16): Remove.
22161 (__arm_vrndnq_x_f32): Remove.
22162 (__arm_vrndmq_x_f16): Remove.
22163 (__arm_vrndmq_x_f32): Remove.
22164 (__arm_vrndpq_x_f16): Remove.
22165 (__arm_vrndpq_x_f32): Remove.
22166 (__arm_vrndaq_x_f16): Remove.
22167 (__arm_vrndaq_x_f32): Remove.
22168 (__arm_vrndxq_x_f16): Remove.
22169 (__arm_vrndxq_x_f32): Remove.
22170 (__arm_vrndxq): Remove.
22171 (__arm_vrndq): Remove.
22172 (__arm_vrndpq): Remove.
22173 (__arm_vrndnq): Remove.
22174 (__arm_vrndmq): Remove.
22175 (__arm_vrndaq): Remove.
22176 (__arm_vrndaq_m): Remove.
22177 (__arm_vrndmq_m): Remove.
22178 (__arm_vrndnq_m): Remove.
22179 (__arm_vrndpq_m): Remove.
22180 (__arm_vrndq_m): Remove.
22181 (__arm_vrndxq_m): Remove.
22182 (__arm_vrndq_x): Remove.
22183 (__arm_vrndnq_x): Remove.
22184 (__arm_vrndmq_x): Remove.
22185 (__arm_vrndpq_x): Remove.
22186 (__arm_vrndaq_x): Remove.
22187 (__arm_vrndxq_x): Remove.
22189 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22191 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
22192 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
22193 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
22194 (vclzq, vqabsq, vqnegq): New.
22195 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
22196 (vqabsq, vqnegq): New.
22197 * config/arm/arm_mve.h (vabsq): Remove.
22200 (vabsq_f16): Remove.
22201 (vabsq_f32): Remove.
22202 (vabsq_s8): Remove.
22203 (vabsq_s16): Remove.
22204 (vabsq_s32): Remove.
22205 (vabsq_m_s8): Remove.
22206 (vabsq_m_s16): Remove.
22207 (vabsq_m_s32): Remove.
22208 (vabsq_m_f16): Remove.
22209 (vabsq_m_f32): Remove.
22210 (vabsq_x_s8): Remove.
22211 (vabsq_x_s16): Remove.
22212 (vabsq_x_s32): Remove.
22213 (vabsq_x_f16): Remove.
22214 (vabsq_x_f32): Remove.
22215 (__arm_vabsq_s8): Remove.
22216 (__arm_vabsq_s16): Remove.
22217 (__arm_vabsq_s32): Remove.
22218 (__arm_vabsq_m_s8): Remove.
22219 (__arm_vabsq_m_s16): Remove.
22220 (__arm_vabsq_m_s32): Remove.
22221 (__arm_vabsq_x_s8): Remove.
22222 (__arm_vabsq_x_s16): Remove.
22223 (__arm_vabsq_x_s32): Remove.
22224 (__arm_vabsq_f16): Remove.
22225 (__arm_vabsq_f32): Remove.
22226 (__arm_vabsq_m_f16): Remove.
22227 (__arm_vabsq_m_f32): Remove.
22228 (__arm_vabsq_x_f16): Remove.
22229 (__arm_vabsq_x_f32): Remove.
22230 (__arm_vabsq): Remove.
22231 (__arm_vabsq_m): Remove.
22232 (__arm_vabsq_x): Remove.
22236 (vnegq_f16): Remove.
22237 (vnegq_f32): Remove.
22238 (vnegq_s8): Remove.
22239 (vnegq_s16): Remove.
22240 (vnegq_s32): Remove.
22241 (vnegq_m_s8): Remove.
22242 (vnegq_m_s16): Remove.
22243 (vnegq_m_s32): Remove.
22244 (vnegq_m_f16): Remove.
22245 (vnegq_m_f32): Remove.
22246 (vnegq_x_s8): Remove.
22247 (vnegq_x_s16): Remove.
22248 (vnegq_x_s32): Remove.
22249 (vnegq_x_f16): Remove.
22250 (vnegq_x_f32): Remove.
22251 (__arm_vnegq_s8): Remove.
22252 (__arm_vnegq_s16): Remove.
22253 (__arm_vnegq_s32): Remove.
22254 (__arm_vnegq_m_s8): Remove.
22255 (__arm_vnegq_m_s16): Remove.
22256 (__arm_vnegq_m_s32): Remove.
22257 (__arm_vnegq_x_s8): Remove.
22258 (__arm_vnegq_x_s16): Remove.
22259 (__arm_vnegq_x_s32): Remove.
22260 (__arm_vnegq_f16): Remove.
22261 (__arm_vnegq_f32): Remove.
22262 (__arm_vnegq_m_f16): Remove.
22263 (__arm_vnegq_m_f32): Remove.
22264 (__arm_vnegq_x_f16): Remove.
22265 (__arm_vnegq_x_f32): Remove.
22266 (__arm_vnegq): Remove.
22267 (__arm_vnegq_m): Remove.
22268 (__arm_vnegq_x): Remove.
22272 (vclsq_s8): Remove.
22273 (vclsq_s16): Remove.
22274 (vclsq_s32): Remove.
22275 (vclsq_m_s8): Remove.
22276 (vclsq_m_s16): Remove.
22277 (vclsq_m_s32): Remove.
22278 (vclsq_x_s8): Remove.
22279 (vclsq_x_s16): Remove.
22280 (vclsq_x_s32): Remove.
22281 (__arm_vclsq_s8): Remove.
22282 (__arm_vclsq_s16): Remove.
22283 (__arm_vclsq_s32): Remove.
22284 (__arm_vclsq_m_s8): Remove.
22285 (__arm_vclsq_m_s16): Remove.
22286 (__arm_vclsq_m_s32): Remove.
22287 (__arm_vclsq_x_s8): Remove.
22288 (__arm_vclsq_x_s16): Remove.
22289 (__arm_vclsq_x_s32): Remove.
22290 (__arm_vclsq): Remove.
22291 (__arm_vclsq_m): Remove.
22292 (__arm_vclsq_x): Remove.
22296 (vclzq_s8): Remove.
22297 (vclzq_s16): Remove.
22298 (vclzq_s32): Remove.
22299 (vclzq_u8): Remove.
22300 (vclzq_u16): Remove.
22301 (vclzq_u32): Remove.
22302 (vclzq_m_u8): Remove.
22303 (vclzq_m_s8): Remove.
22304 (vclzq_m_u16): Remove.
22305 (vclzq_m_s16): Remove.
22306 (vclzq_m_u32): Remove.
22307 (vclzq_m_s32): Remove.
22308 (vclzq_x_s8): Remove.
22309 (vclzq_x_s16): Remove.
22310 (vclzq_x_s32): Remove.
22311 (vclzq_x_u8): Remove.
22312 (vclzq_x_u16): Remove.
22313 (vclzq_x_u32): Remove.
22314 (__arm_vclzq_s8): Remove.
22315 (__arm_vclzq_s16): Remove.
22316 (__arm_vclzq_s32): Remove.
22317 (__arm_vclzq_u8): Remove.
22318 (__arm_vclzq_u16): Remove.
22319 (__arm_vclzq_u32): Remove.
22320 (__arm_vclzq_m_u8): Remove.
22321 (__arm_vclzq_m_s8): Remove.
22322 (__arm_vclzq_m_u16): Remove.
22323 (__arm_vclzq_m_s16): Remove.
22324 (__arm_vclzq_m_u32): Remove.
22325 (__arm_vclzq_m_s32): Remove.
22326 (__arm_vclzq_x_s8): Remove.
22327 (__arm_vclzq_x_s16): Remove.
22328 (__arm_vclzq_x_s32): Remove.
22329 (__arm_vclzq_x_u8): Remove.
22330 (__arm_vclzq_x_u16): Remove.
22331 (__arm_vclzq_x_u32): Remove.
22332 (__arm_vclzq): Remove.
22333 (__arm_vclzq_m): Remove.
22334 (__arm_vclzq_x): Remove.
22337 (vqnegq_m): Remove.
22338 (vqabsq_m): Remove.
22339 (vqabsq_s8): Remove.
22340 (vqabsq_s16): Remove.
22341 (vqabsq_s32): Remove.
22342 (vqnegq_s8): Remove.
22343 (vqnegq_s16): Remove.
22344 (vqnegq_s32): Remove.
22345 (vqnegq_m_s8): Remove.
22346 (vqabsq_m_s8): Remove.
22347 (vqnegq_m_s16): Remove.
22348 (vqabsq_m_s16): Remove.
22349 (vqnegq_m_s32): Remove.
22350 (vqabsq_m_s32): Remove.
22351 (__arm_vqabsq_s8): Remove.
22352 (__arm_vqabsq_s16): Remove.
22353 (__arm_vqabsq_s32): Remove.
22354 (__arm_vqnegq_s8): Remove.
22355 (__arm_vqnegq_s16): Remove.
22356 (__arm_vqnegq_s32): Remove.
22357 (__arm_vqnegq_m_s8): Remove.
22358 (__arm_vqabsq_m_s8): Remove.
22359 (__arm_vqnegq_m_s16): Remove.
22360 (__arm_vqabsq_m_s16): Remove.
22361 (__arm_vqnegq_m_s32): Remove.
22362 (__arm_vqabsq_m_s32): Remove.
22363 (__arm_vqabsq): Remove.
22364 (__arm_vqnegq): Remove.
22365 (__arm_vqnegq_m): Remove.
22366 (__arm_vqabsq_m): Remove.
22368 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22370 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
22371 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
22372 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
22373 vrndm, vrndn, vrndp, vrnd, vrndx.
22374 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
22375 VQABSQ_M_S, VQNEGQ_M_S.
22377 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
22378 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
22379 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
22380 (@mve_<mve_insn>q_f<mode>): ... this.
22381 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
22382 (mve_v<absneg_str>q_f<mode>): ... this.
22383 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
22384 (mve_v<absneg_str>q_s<mode>): ... this.
22385 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
22386 (@mve_<mve_insn>q_<supf><mode>): ... this.
22387 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
22388 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
22389 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
22390 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22391 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
22392 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
22393 (mve_vrndxq_m_f<mode>): Merge into ...
22394 (@mve_<mve_insn>q_m_f<mode>): ... this.
22396 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22398 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
22399 * config/arm/arm-mve-builtins-shapes.h (unary): New.
22401 2023-05-09 Jakub Jelinek <jakub@redhat.com>
22403 * mux-utils.h: Fix comment typo, avoides -> avoids.
22405 2023-05-09 Jakub Jelinek <jakub@redhat.com>
22407 PR tree-optimization/109778
22408 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
22409 wi::zext (x, width) rather than x if width != precision, rather
22410 than using wi::zext (right, width) after the shift.
22411 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
22412 of wi::lrotate or wi::rrotate.
22414 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
22416 * genmatch.cc (get_out_file): Make static and rename to ...
22417 (choose_output): ... this. Reimplement. Update all uses ...
22418 (decision_tree::gen): ... here and ...
22421 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
22423 * genmatch.cc (showUsage): Reimplement as ...
22424 (usage): ...this. Adjust all uses.
22425 (main): Print usage when no arguments. Add missing 'return 1'.
22427 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
22429 * genmatch.cc (header_file): Make static.
22430 (emit_func): Rename to...
22431 (fp_decl): ... this. Adjust all uses.
22432 (fp_decl_done): New function. Use it...
22433 (decision_tree::gen): ... here and...
22434 (write_predicate): ... here.
22437 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
22439 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
22442 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
22443 Uros Bizjak <ubizjak@gmail.com>
22445 * config/i386/i386.md (any_or_plus): Move definition earlier.
22446 (*insvti_highpart_1): New define_insn_and_split to overwrite
22447 (insv) the highpart of a TImode register/memory.
22449 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
22451 * auto-profile.cc (auto_profile): Check todo from early_inline
22452 to see if cleanup_tree_vfg needs to be called.
22453 (early_inline): Return todo from early_inliner.
22455 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
22457 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
22459 (pass_vsetvl::get_block_info): New.
22460 (pass_vsetvl::update_vector_info): New.
22461 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
22462 (pass_vsetvl::compute_local_backward_infos): Ditto.
22463 (pass_vsetvl::transfer_before): Ditto.
22464 (pass_vsetvl::transfer_after): Ditto.
22465 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
22466 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
22467 (pass_vsetvl::cleanup_insns): Ditto.
22468 (pass_vsetvl::compute_local_backward_infos): Use
22469 update_vector_info.
22471 2023-05-08 Jeff Law <jlaw@ventanamicro>
22473 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
22475 2023-05-08 Richard Biener <rguenther@suse.de>
22476 Michael Meissner <meissner@linux.ibm.com>
22478 PR middle-end/108623
22479 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
22480 Align bit fields > 1 bit to at least an 8-bit boundary.
22482 2023-05-08 Andrew Pinski <apinski@marvell.com>
22484 PR tree-optimization/109424
22485 PR tree-optimization/59424
22486 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
22487 (factor_out_conditional_operation): This and add support for all unary
22489 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
22490 to call factor_out_conditional_operation instead.
22492 2023-05-08 Andrew Pinski <apinski@marvell.com>
22494 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
22495 over factor_out_conditional_conversion.
22497 2023-05-08 Andrew Pinski <apinski@marvell.com>
22499 PR tree-optimization/49959
22500 PR tree-optimization/103771
22501 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
22502 Diamond shapped bb form for factor_out_conditional_conversion.
22504 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22506 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
22507 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
22508 (riscv_vector_get_mask_mode): Ditto.
22509 (get_mask_policy_no_pred): Ditto.
22510 (get_tail_policy_no_pred): Ditto.
22511 (get_mask_mode): New function.
22512 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
22513 (get_tail_policy_no_pred): Ditto.
22514 (riscv_vector_mask_mode_p): Ditto.
22515 (riscv_vector_get_mask_mode): Ditto.
22516 (get_mask_mode): New function.
22517 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
22519 (get_tail_policy_for_pred): Ditto.
22520 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
22521 (get_mask_policy_for_pred): Ditto
22522 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
22524 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
22526 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
22527 (riscv_select_multilib): New.
22528 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
22529 also handle select_by_abi.
22530 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
22531 to select_by_abi_arch_cmodel from 1.
22532 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
22533 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
22535 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
22537 * Makefile.in: (gimple-match-head.o-warn): Remove.
22538 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
22539 gimple-match-exports.cc.
22540 (gimple-match-auto.h): Only depend on s-gimple-match.
22541 (generic-match-auto.h): Likewise.
22543 2023-05-08 Andrew Pinski <apinski@marvell.com>
22545 PR tree-optimization/109691
22546 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
22548 If the removed statement can throw, have need_eh_cleanup
22549 include the bb of that statement.
22550 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
22551 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
22553 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
22554 Initialize dceworklist instead of stmts_to_remove.
22555 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
22556 Destore dceworklist instead of stmts_to_remove.
22557 (substitute_and_fold_dom_walker::before_dom_children):
22558 Set dceworklist instead of adding to stmts_to_remove.
22559 (substitute_and_fold_engine::substitute_and_fold):
22560 Call simple_dce_from_worklist instead of poping
22562 Don't update the stat on removal statements.
22564 2023-05-07 Andrew Pinski <apinski@marvell.com>
22567 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
22568 Change argument type to aarch64_feature_flags.
22569 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
22570 constructor argument type to aarch64_feature_flags.
22571 Change m_old_asm_isa_flags to be aarch64_feature_flags.
22573 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
22575 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
22576 more parallel code if can_create_pseudo_p.
22578 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
22581 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
22582 immediately before moving a multi-word register by parts.
22584 2023-05-06 Jeff Law <jlaw@ventanamicro>
22586 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
22588 2023-05-06 Michael Collison <collison@rivosinc.com>
22590 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
22591 Check that GET_MODE_NUNITS is a multiple of 2.
22593 2023-05-06 Michael Collison <collison@rivosinc.com>
22595 * config/riscv/riscv.cc
22596 (riscv_estimated_poly_value): Implement
22597 TARGET_ESTIMATED_POLY_VALUE.
22598 (riscv_preferred_simd_mode): Implement
22599 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
22600 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
22601 (riscv_empty_mask_is_expensive): Implement
22602 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
22603 (riscv_vectorize_create_costs): Implement
22604 TARGET_VECTORIZE_CREATE_COSTS.
22605 (riscv_support_vector_misalignment): Implement
22606 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
22607 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
22608 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
22609 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
22610 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
22612 2023-05-06 Jeff Law <jlaw@ventanamicro>
22614 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
22615 duplicate definition.
22617 2023-05-06 Michael Collison <collison@rivosinc.com>
22619 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
22620 (riscv_vector_preferred_simd_mode): Ditto.
22621 (get_mask_policy_no_pred): Ditto.
22622 (get_tail_policy_no_pred): Ditto.
22623 (riscv_vector_mask_mode_p): Ditto.
22624 (riscv_vector_get_mask_mode): Ditto.
22626 2023-05-06 Michael Collison <collison@rivosinc.com>
22628 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
22629 Remove static declaration to to make externally visible.
22630 (get_mask_policy_for_pred): Ditto.
22631 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
22632 New external declaration.
22633 (get_mask_policy_for_pred): Ditto.
22635 2023-05-06 Michael Collison <collison@rivosinc.com>
22637 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
22638 (riscv_vector_get_mask_mode): Ditto.
22639 (get_mask_policy_no_pred): Ditto.
22640 (get_tail_policy_no_pred): Ditto.
22642 2023-05-06 Xi Ruoyao <xry111@xry111.site>
22644 * config/loongarch/loongarch.h (struct machine_function): Add
22645 reg_is_wrapped_separately array for register wrapping
22647 * config/loongarch/loongarch.cc
22648 (loongarch_get_separate_components): New function.
22649 (loongarch_components_for_bb): Likewise.
22650 (loongarch_disqualify_components): Likewise.
22651 (loongarch_process_components): Likewise.
22652 (loongarch_emit_prologue_components): Likewise.
22653 (loongarch_emit_epilogue_components): Likewise.
22654 (loongarch_set_handled_components): Likewise.
22655 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
22656 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
22657 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
22658 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
22659 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
22660 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
22661 (loongarch_for_each_saved_reg): Skip registers that are wrapped
22664 2023-05-06 Xi Ruoyao <xry111@xry111.site>
22667 * Makefile.in (s-macro_list): Pass -nostdinc to
22670 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22672 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
22673 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
22674 (preferred_simd_mode): Ditto.
22675 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
22676 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
22677 (riscv_preferred_simd_mode): New function.
22678 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
22679 * config/riscv/vector.md: Add autovec.md.
22680 * config/riscv/autovec.md: New file.
22682 2023-05-06 Jakub Jelinek <jakub@redhat.com>
22684 * real.h (dconst_pi): Define.
22685 (dconst_e_ptr): Formatting fix.
22686 (dconst_pi_ptr): Declare.
22687 * real.cc (dconst_pi_ptr): New function.
22688 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
22689 boundaries range with range computed from sin/cos of the particular
22690 bounds if the argument range is shorter than 2*pi.
22691 (cfn_sincos::op1_range): Take bulps into account when determining
22692 which result ranges are always invalid or behave like known NAN.
22694 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
22696 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
22697 pass type to vrange_storage::equal_p.
22698 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
22699 (irange_storage::equal_p): Same.
22700 (frange_storage::equal_p): Same.
22701 * value-range-storage.h (class frange_storage): Same.
22703 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22706 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
22707 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
22709 2023-05-06 liuhongt <hongtao.liu@intel.com>
22711 * combine.cc (maybe_swap_commutative_operands): Canonicalize
22712 vec_merge when mask is constant.
22713 * doc/md.texi: Document vec_merge canonicalization.
22715 2023-05-06 Jakub Jelinek <jakub@redhat.com>
22717 * value-range.h (frange_arithmetic): Declare.
22718 * range-op-float.cc (frange_arithmetic): No longer static.
22719 * gimple-range-op.cc (frange_mpfr_arg1): New function.
22720 (cfn_sqrt::fold_range): Intersect the generic boundaries range
22721 with range computed from sqrt of the particular bounds.
22722 (cfn_sqrt::op1_range): Intersect the generic boundaries range
22723 with range computed from squared particular bounds.
22725 2023-05-06 Jakub Jelinek <jakub@redhat.com>
22727 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
22728 earlier with helper variables also renamed.
22729 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
22730 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
22731 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
22733 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
22735 * config/cris/cris.md (splitop): Add PLUS.
22736 * config/cris/cris.cc (cris_split_constant): Also handle
22737 PLUS when a split into two insns may be useful.
22739 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
22741 * config/cris/cris.md (movandsplit1): New define_peephole2.
22743 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
22745 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
22747 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
22749 * doc/md.texi (define_peephole2): Document order of scanning.
22751 2023-05-05 Pan Li <pan2.li@intel.com>
22752 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22754 * config/riscv/vector.md: Allow const as the operand of RVV
22755 indexed load/store.
22757 2023-05-05 Pan Li <pan2.li@intel.com>
22759 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
22760 consumed by simplify_rtx.
22762 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22764 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
22765 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
22766 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
22767 * config/arm/arm_mve.h (vshrq): Remove.
22769 (vrshrq_m): Remove.
22771 (vrshrq_x): Remove.
22773 (vshrq_n_s8): Remove.
22774 (vshrq_n_s16): Remove.
22775 (vshrq_n_s32): Remove.
22776 (vshrq_n_u8): Remove.
22777 (vshrq_n_u16): Remove.
22778 (vshrq_n_u32): Remove.
22779 (vrshrq_n_u8): Remove.
22780 (vrshrq_n_s8): Remove.
22781 (vrshrq_n_u16): Remove.
22782 (vrshrq_n_s16): Remove.
22783 (vrshrq_n_u32): Remove.
22784 (vrshrq_n_s32): Remove.
22785 (vrshrq_m_n_s8): Remove.
22786 (vrshrq_m_n_s32): Remove.
22787 (vrshrq_m_n_s16): Remove.
22788 (vrshrq_m_n_u8): Remove.
22789 (vrshrq_m_n_u32): Remove.
22790 (vrshrq_m_n_u16): Remove.
22791 (vshrq_m_n_s8): Remove.
22792 (vshrq_m_n_s32): Remove.
22793 (vshrq_m_n_s16): Remove.
22794 (vshrq_m_n_u8): Remove.
22795 (vshrq_m_n_u32): Remove.
22796 (vshrq_m_n_u16): Remove.
22797 (vrshrq_x_n_s8): Remove.
22798 (vrshrq_x_n_s16): Remove.
22799 (vrshrq_x_n_s32): Remove.
22800 (vrshrq_x_n_u8): Remove.
22801 (vrshrq_x_n_u16): Remove.
22802 (vrshrq_x_n_u32): Remove.
22803 (vshrq_x_n_s8): Remove.
22804 (vshrq_x_n_s16): Remove.
22805 (vshrq_x_n_s32): Remove.
22806 (vshrq_x_n_u8): Remove.
22807 (vshrq_x_n_u16): Remove.
22808 (vshrq_x_n_u32): Remove.
22809 (__arm_vshrq_n_s8): Remove.
22810 (__arm_vshrq_n_s16): Remove.
22811 (__arm_vshrq_n_s32): Remove.
22812 (__arm_vshrq_n_u8): Remove.
22813 (__arm_vshrq_n_u16): Remove.
22814 (__arm_vshrq_n_u32): Remove.
22815 (__arm_vrshrq_n_u8): Remove.
22816 (__arm_vrshrq_n_s8): Remove.
22817 (__arm_vrshrq_n_u16): Remove.
22818 (__arm_vrshrq_n_s16): Remove.
22819 (__arm_vrshrq_n_u32): Remove.
22820 (__arm_vrshrq_n_s32): Remove.
22821 (__arm_vrshrq_m_n_s8): Remove.
22822 (__arm_vrshrq_m_n_s32): Remove.
22823 (__arm_vrshrq_m_n_s16): Remove.
22824 (__arm_vrshrq_m_n_u8): Remove.
22825 (__arm_vrshrq_m_n_u32): Remove.
22826 (__arm_vrshrq_m_n_u16): Remove.
22827 (__arm_vshrq_m_n_s8): Remove.
22828 (__arm_vshrq_m_n_s32): Remove.
22829 (__arm_vshrq_m_n_s16): Remove.
22830 (__arm_vshrq_m_n_u8): Remove.
22831 (__arm_vshrq_m_n_u32): Remove.
22832 (__arm_vshrq_m_n_u16): Remove.
22833 (__arm_vrshrq_x_n_s8): Remove.
22834 (__arm_vrshrq_x_n_s16): Remove.
22835 (__arm_vrshrq_x_n_s32): Remove.
22836 (__arm_vrshrq_x_n_u8): Remove.
22837 (__arm_vrshrq_x_n_u16): Remove.
22838 (__arm_vrshrq_x_n_u32): Remove.
22839 (__arm_vshrq_x_n_s8): Remove.
22840 (__arm_vshrq_x_n_s16): Remove.
22841 (__arm_vshrq_x_n_s32): Remove.
22842 (__arm_vshrq_x_n_u8): Remove.
22843 (__arm_vshrq_x_n_u16): Remove.
22844 (__arm_vshrq_x_n_u32): Remove.
22845 (__arm_vshrq): Remove.
22846 (__arm_vrshrq): Remove.
22847 (__arm_vrshrq_m): Remove.
22848 (__arm_vshrq_m): Remove.
22849 (__arm_vrshrq_x): Remove.
22850 (__arm_vshrq_x): Remove.
22852 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22854 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
22855 (mve_insn): Add vrshr, vshr.
22856 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
22857 (mve_vrshrq_n_<supf><mode>): Merge into ...
22858 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22859 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
22861 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22863 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22865 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
22866 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
22868 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22870 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
22871 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
22872 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
22873 (vqrshrunbq, vqrshruntq): New.
22874 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
22875 (vqrshrunbq, vqrshruntq): New.
22876 * config/arm/arm-mve-builtins.cc
22877 (function_instance::has_inactive_argument): Handle vqshrunbq,
22878 vqshruntq, vqrshrunbq, vqrshruntq.
22879 * config/arm/arm_mve.h (vqrshrunbq): Remove.
22880 (vqrshruntq): Remove.
22881 (vqrshrunbq_m): Remove.
22882 (vqrshruntq_m): Remove.
22883 (vqrshrunbq_n_s16): Remove.
22884 (vqrshrunbq_n_s32): Remove.
22885 (vqrshruntq_n_s16): Remove.
22886 (vqrshruntq_n_s32): Remove.
22887 (vqrshrunbq_m_n_s32): Remove.
22888 (vqrshrunbq_m_n_s16): Remove.
22889 (vqrshruntq_m_n_s32): Remove.
22890 (vqrshruntq_m_n_s16): Remove.
22891 (__arm_vqrshrunbq_n_s16): Remove.
22892 (__arm_vqrshrunbq_n_s32): Remove.
22893 (__arm_vqrshruntq_n_s16): Remove.
22894 (__arm_vqrshruntq_n_s32): Remove.
22895 (__arm_vqrshrunbq_m_n_s32): Remove.
22896 (__arm_vqrshrunbq_m_n_s16): Remove.
22897 (__arm_vqrshruntq_m_n_s32): Remove.
22898 (__arm_vqrshruntq_m_n_s16): Remove.
22899 (__arm_vqrshrunbq): Remove.
22900 (__arm_vqrshruntq): Remove.
22901 (__arm_vqrshrunbq_m): Remove.
22902 (__arm_vqrshruntq_m): Remove.
22903 (vqshrunbq): Remove.
22904 (vqshruntq): Remove.
22905 (vqshrunbq_m): Remove.
22906 (vqshruntq_m): Remove.
22907 (vqshrunbq_n_s16): Remove.
22908 (vqshruntq_n_s16): Remove.
22909 (vqshrunbq_n_s32): Remove.
22910 (vqshruntq_n_s32): Remove.
22911 (vqshrunbq_m_n_s32): Remove.
22912 (vqshrunbq_m_n_s16): Remove.
22913 (vqshruntq_m_n_s32): Remove.
22914 (vqshruntq_m_n_s16): Remove.
22915 (__arm_vqshrunbq_n_s16): Remove.
22916 (__arm_vqshruntq_n_s16): Remove.
22917 (__arm_vqshrunbq_n_s32): Remove.
22918 (__arm_vqshruntq_n_s32): Remove.
22919 (__arm_vqshrunbq_m_n_s32): Remove.
22920 (__arm_vqshrunbq_m_n_s16): Remove.
22921 (__arm_vqshruntq_m_n_s32): Remove.
22922 (__arm_vqshruntq_m_n_s16): Remove.
22923 (__arm_vqshrunbq): Remove.
22924 (__arm_vqshruntq): Remove.
22925 (__arm_vqshrunbq_m): Remove.
22926 (__arm_vqshruntq_m): Remove.
22928 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22930 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
22931 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
22932 (MVE_SHRN_M_N): Likewise.
22933 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
22934 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
22936 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
22937 (mve_vqrshruntq_n_s<mode>): Remove.
22938 (mve_vqshrunbq_n_s<mode>): Remove.
22939 (mve_vqshruntq_n_s<mode>): Remove.
22940 (mve_vqrshrunbq_m_n_s<mode>): Remove.
22941 (mve_vqrshruntq_m_n_s<mode>): Remove.
22942 (mve_vqshrunbq_m_n_s<mode>): Remove.
22943 (mve_vqshruntq_m_n_s<mode>): Remove.
22945 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22947 * config/arm/arm-mve-builtins-shapes.cc
22948 (binary_rshift_narrow_unsigned): New.
22949 * config/arm/arm-mve-builtins-shapes.h
22950 (binary_rshift_narrow_unsigned): New.
22952 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22954 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
22955 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
22956 (vqrshrnbq, vqrshrntq): New.
22957 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
22958 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
22960 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
22961 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
22962 * config/arm/arm-mve-builtins.cc
22963 (function_instance::has_inactive_argument): Handle vshrnbq,
22964 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
22966 * config/arm/arm_mve.h (vshrnbq): Remove.
22968 (vshrnbq_m): Remove.
22969 (vshrntq_m): Remove.
22970 (vshrnbq_n_s16): Remove.
22971 (vshrntq_n_s16): Remove.
22972 (vshrnbq_n_u16): Remove.
22973 (vshrntq_n_u16): Remove.
22974 (vshrnbq_n_s32): Remove.
22975 (vshrntq_n_s32): Remove.
22976 (vshrnbq_n_u32): Remove.
22977 (vshrntq_n_u32): Remove.
22978 (vshrnbq_m_n_s32): Remove.
22979 (vshrnbq_m_n_s16): Remove.
22980 (vshrnbq_m_n_u32): Remove.
22981 (vshrnbq_m_n_u16): Remove.
22982 (vshrntq_m_n_s32): Remove.
22983 (vshrntq_m_n_s16): Remove.
22984 (vshrntq_m_n_u32): Remove.
22985 (vshrntq_m_n_u16): Remove.
22986 (__arm_vshrnbq_n_s16): Remove.
22987 (__arm_vshrntq_n_s16): Remove.
22988 (__arm_vshrnbq_n_u16): Remove.
22989 (__arm_vshrntq_n_u16): Remove.
22990 (__arm_vshrnbq_n_s32): Remove.
22991 (__arm_vshrntq_n_s32): Remove.
22992 (__arm_vshrnbq_n_u32): Remove.
22993 (__arm_vshrntq_n_u32): Remove.
22994 (__arm_vshrnbq_m_n_s32): Remove.
22995 (__arm_vshrnbq_m_n_s16): Remove.
22996 (__arm_vshrnbq_m_n_u32): Remove.
22997 (__arm_vshrnbq_m_n_u16): Remove.
22998 (__arm_vshrntq_m_n_s32): Remove.
22999 (__arm_vshrntq_m_n_s16): Remove.
23000 (__arm_vshrntq_m_n_u32): Remove.
23001 (__arm_vshrntq_m_n_u16): Remove.
23002 (__arm_vshrnbq): Remove.
23003 (__arm_vshrntq): Remove.
23004 (__arm_vshrnbq_m): Remove.
23005 (__arm_vshrntq_m): Remove.
23006 (vrshrnbq): Remove.
23007 (vrshrntq): Remove.
23008 (vrshrnbq_m): Remove.
23009 (vrshrntq_m): Remove.
23010 (vrshrnbq_n_s16): Remove.
23011 (vrshrntq_n_s16): Remove.
23012 (vrshrnbq_n_u16): Remove.
23013 (vrshrntq_n_u16): Remove.
23014 (vrshrnbq_n_s32): Remove.
23015 (vrshrntq_n_s32): Remove.
23016 (vrshrnbq_n_u32): Remove.
23017 (vrshrntq_n_u32): Remove.
23018 (vrshrnbq_m_n_s32): Remove.
23019 (vrshrnbq_m_n_s16): Remove.
23020 (vrshrnbq_m_n_u32): Remove.
23021 (vrshrnbq_m_n_u16): Remove.
23022 (vrshrntq_m_n_s32): Remove.
23023 (vrshrntq_m_n_s16): Remove.
23024 (vrshrntq_m_n_u32): Remove.
23025 (vrshrntq_m_n_u16): Remove.
23026 (__arm_vrshrnbq_n_s16): Remove.
23027 (__arm_vrshrntq_n_s16): Remove.
23028 (__arm_vrshrnbq_n_u16): Remove.
23029 (__arm_vrshrntq_n_u16): Remove.
23030 (__arm_vrshrnbq_n_s32): Remove.
23031 (__arm_vrshrntq_n_s32): Remove.
23032 (__arm_vrshrnbq_n_u32): Remove.
23033 (__arm_vrshrntq_n_u32): Remove.
23034 (__arm_vrshrnbq_m_n_s32): Remove.
23035 (__arm_vrshrnbq_m_n_s16): Remove.
23036 (__arm_vrshrnbq_m_n_u32): Remove.
23037 (__arm_vrshrnbq_m_n_u16): Remove.
23038 (__arm_vrshrntq_m_n_s32): Remove.
23039 (__arm_vrshrntq_m_n_s16): Remove.
23040 (__arm_vrshrntq_m_n_u32): Remove.
23041 (__arm_vrshrntq_m_n_u16): Remove.
23042 (__arm_vrshrnbq): Remove.
23043 (__arm_vrshrntq): Remove.
23044 (__arm_vrshrnbq_m): Remove.
23045 (__arm_vrshrntq_m): Remove.
23046 (vqshrnbq): Remove.
23047 (vqshrntq): Remove.
23048 (vqshrnbq_m): Remove.
23049 (vqshrntq_m): Remove.
23050 (vqshrnbq_n_s16): Remove.
23051 (vqshrntq_n_s16): Remove.
23052 (vqshrnbq_n_u16): Remove.
23053 (vqshrntq_n_u16): Remove.
23054 (vqshrnbq_n_s32): Remove.
23055 (vqshrntq_n_s32): Remove.
23056 (vqshrnbq_n_u32): Remove.
23057 (vqshrntq_n_u32): Remove.
23058 (vqshrnbq_m_n_s32): Remove.
23059 (vqshrnbq_m_n_s16): Remove.
23060 (vqshrnbq_m_n_u32): Remove.
23061 (vqshrnbq_m_n_u16): Remove.
23062 (vqshrntq_m_n_s32): Remove.
23063 (vqshrntq_m_n_s16): Remove.
23064 (vqshrntq_m_n_u32): Remove.
23065 (vqshrntq_m_n_u16): Remove.
23066 (__arm_vqshrnbq_n_s16): Remove.
23067 (__arm_vqshrntq_n_s16): Remove.
23068 (__arm_vqshrnbq_n_u16): Remove.
23069 (__arm_vqshrntq_n_u16): Remove.
23070 (__arm_vqshrnbq_n_s32): Remove.
23071 (__arm_vqshrntq_n_s32): Remove.
23072 (__arm_vqshrnbq_n_u32): Remove.
23073 (__arm_vqshrntq_n_u32): Remove.
23074 (__arm_vqshrnbq_m_n_s32): Remove.
23075 (__arm_vqshrnbq_m_n_s16): Remove.
23076 (__arm_vqshrnbq_m_n_u32): Remove.
23077 (__arm_vqshrnbq_m_n_u16): Remove.
23078 (__arm_vqshrntq_m_n_s32): Remove.
23079 (__arm_vqshrntq_m_n_s16): Remove.
23080 (__arm_vqshrntq_m_n_u32): Remove.
23081 (__arm_vqshrntq_m_n_u16): Remove.
23082 (__arm_vqshrnbq): Remove.
23083 (__arm_vqshrntq): Remove.
23084 (__arm_vqshrnbq_m): Remove.
23085 (__arm_vqshrntq_m): Remove.
23086 (vqrshrnbq): Remove.
23087 (vqrshrntq): Remove.
23088 (vqrshrnbq_m): Remove.
23089 (vqrshrntq_m): Remove.
23090 (vqrshrnbq_n_s16): Remove.
23091 (vqrshrnbq_n_u16): Remove.
23092 (vqrshrnbq_n_s32): Remove.
23093 (vqrshrnbq_n_u32): Remove.
23094 (vqrshrntq_n_s16): Remove.
23095 (vqrshrntq_n_u16): Remove.
23096 (vqrshrntq_n_s32): Remove.
23097 (vqrshrntq_n_u32): Remove.
23098 (vqrshrnbq_m_n_s32): Remove.
23099 (vqrshrnbq_m_n_s16): Remove.
23100 (vqrshrnbq_m_n_u32): Remove.
23101 (vqrshrnbq_m_n_u16): Remove.
23102 (vqrshrntq_m_n_s32): Remove.
23103 (vqrshrntq_m_n_s16): Remove.
23104 (vqrshrntq_m_n_u32): Remove.
23105 (vqrshrntq_m_n_u16): Remove.
23106 (__arm_vqrshrnbq_n_s16): Remove.
23107 (__arm_vqrshrnbq_n_u16): Remove.
23108 (__arm_vqrshrnbq_n_s32): Remove.
23109 (__arm_vqrshrnbq_n_u32): Remove.
23110 (__arm_vqrshrntq_n_s16): Remove.
23111 (__arm_vqrshrntq_n_u16): Remove.
23112 (__arm_vqrshrntq_n_s32): Remove.
23113 (__arm_vqrshrntq_n_u32): Remove.
23114 (__arm_vqrshrnbq_m_n_s32): Remove.
23115 (__arm_vqrshrnbq_m_n_s16): Remove.
23116 (__arm_vqrshrnbq_m_n_u32): Remove.
23117 (__arm_vqrshrnbq_m_n_u16): Remove.
23118 (__arm_vqrshrntq_m_n_s32): Remove.
23119 (__arm_vqrshrntq_m_n_s16): Remove.
23120 (__arm_vqrshrntq_m_n_u32): Remove.
23121 (__arm_vqrshrntq_m_n_u16): Remove.
23122 (__arm_vqrshrnbq): Remove.
23123 (__arm_vqrshrntq): Remove.
23124 (__arm_vqrshrnbq_m): Remove.
23125 (__arm_vqrshrntq_m): Remove.
23127 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23129 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
23130 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
23131 vrshrnt, vshrnb, vshrnt.
23133 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
23134 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
23135 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
23136 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
23137 (mve_vshrntq_n_<supf><mode>): Merge into ...
23138 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23139 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
23140 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
23141 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
23142 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
23144 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23146 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23148 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
23150 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
23152 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23154 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
23155 (vmaxq, vminq): New.
23156 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
23157 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
23158 * config/arm/arm_mve.h (vminq): Remove.
23164 (vminq_u8): Remove.
23165 (vmaxq_u8): Remove.
23166 (vminq_s8): Remove.
23167 (vmaxq_s8): Remove.
23168 (vminq_u16): Remove.
23169 (vmaxq_u16): Remove.
23170 (vminq_s16): Remove.
23171 (vmaxq_s16): Remove.
23172 (vminq_u32): Remove.
23173 (vmaxq_u32): Remove.
23174 (vminq_s32): Remove.
23175 (vmaxq_s32): Remove.
23176 (vmaxq_m_s8): Remove.
23177 (vmaxq_m_s32): Remove.
23178 (vmaxq_m_s16): Remove.
23179 (vmaxq_m_u8): Remove.
23180 (vmaxq_m_u32): Remove.
23181 (vmaxq_m_u16): Remove.
23182 (vminq_m_s8): Remove.
23183 (vminq_m_s32): Remove.
23184 (vminq_m_s16): Remove.
23185 (vminq_m_u8): Remove.
23186 (vminq_m_u32): Remove.
23187 (vminq_m_u16): Remove.
23188 (vminq_x_s8): Remove.
23189 (vminq_x_s16): Remove.
23190 (vminq_x_s32): Remove.
23191 (vminq_x_u8): Remove.
23192 (vminq_x_u16): Remove.
23193 (vminq_x_u32): Remove.
23194 (vmaxq_x_s8): Remove.
23195 (vmaxq_x_s16): Remove.
23196 (vmaxq_x_s32): Remove.
23197 (vmaxq_x_u8): Remove.
23198 (vmaxq_x_u16): Remove.
23199 (vmaxq_x_u32): Remove.
23200 (__arm_vminq_u8): Remove.
23201 (__arm_vmaxq_u8): Remove.
23202 (__arm_vminq_s8): Remove.
23203 (__arm_vmaxq_s8): Remove.
23204 (__arm_vminq_u16): Remove.
23205 (__arm_vmaxq_u16): Remove.
23206 (__arm_vminq_s16): Remove.
23207 (__arm_vmaxq_s16): Remove.
23208 (__arm_vminq_u32): Remove.
23209 (__arm_vmaxq_u32): Remove.
23210 (__arm_vminq_s32): Remove.
23211 (__arm_vmaxq_s32): Remove.
23212 (__arm_vmaxq_m_s8): Remove.
23213 (__arm_vmaxq_m_s32): Remove.
23214 (__arm_vmaxq_m_s16): Remove.
23215 (__arm_vmaxq_m_u8): Remove.
23216 (__arm_vmaxq_m_u32): Remove.
23217 (__arm_vmaxq_m_u16): Remove.
23218 (__arm_vminq_m_s8): Remove.
23219 (__arm_vminq_m_s32): Remove.
23220 (__arm_vminq_m_s16): Remove.
23221 (__arm_vminq_m_u8): Remove.
23222 (__arm_vminq_m_u32): Remove.
23223 (__arm_vminq_m_u16): Remove.
23224 (__arm_vminq_x_s8): Remove.
23225 (__arm_vminq_x_s16): Remove.
23226 (__arm_vminq_x_s32): Remove.
23227 (__arm_vminq_x_u8): Remove.
23228 (__arm_vminq_x_u16): Remove.
23229 (__arm_vminq_x_u32): Remove.
23230 (__arm_vmaxq_x_s8): Remove.
23231 (__arm_vmaxq_x_s16): Remove.
23232 (__arm_vmaxq_x_s32): Remove.
23233 (__arm_vmaxq_x_u8): Remove.
23234 (__arm_vmaxq_x_u16): Remove.
23235 (__arm_vmaxq_x_u32): Remove.
23236 (__arm_vminq): Remove.
23237 (__arm_vmaxq): Remove.
23238 (__arm_vmaxq_m): Remove.
23239 (__arm_vminq_m): Remove.
23240 (__arm_vminq_x): Remove.
23241 (__arm_vmaxq_x): Remove.
23243 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23245 * config/arm/iterators.md (MAX_MIN_SU): New.
23246 (max_min_su_str): New.
23247 (max_min_supf): New.
23248 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
23249 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
23250 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
23252 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23254 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
23255 (vqshlq, vshlq): New.
23256 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
23257 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
23258 * config/arm/arm_mve.h (vshlq): Remove.
23261 (vshlq_m_r): Remove.
23263 (vshlq_m_n): Remove.
23265 (vshlq_x_n): Remove.
23266 (vshlq_s8): Remove.
23267 (vshlq_s16): Remove.
23268 (vshlq_s32): Remove.
23269 (vshlq_u8): Remove.
23270 (vshlq_u16): Remove.
23271 (vshlq_u32): Remove.
23272 (vshlq_r_u8): Remove.
23273 (vshlq_n_u8): Remove.
23274 (vshlq_r_s8): Remove.
23275 (vshlq_n_s8): Remove.
23276 (vshlq_r_u16): Remove.
23277 (vshlq_n_u16): Remove.
23278 (vshlq_r_s16): Remove.
23279 (vshlq_n_s16): Remove.
23280 (vshlq_r_u32): Remove.
23281 (vshlq_n_u32): Remove.
23282 (vshlq_r_s32): Remove.
23283 (vshlq_n_s32): Remove.
23284 (vshlq_m_r_u8): Remove.
23285 (vshlq_m_r_s8): Remove.
23286 (vshlq_m_r_u16): Remove.
23287 (vshlq_m_r_s16): Remove.
23288 (vshlq_m_r_u32): Remove.
23289 (vshlq_m_r_s32): Remove.
23290 (vshlq_m_u8): Remove.
23291 (vshlq_m_s8): Remove.
23292 (vshlq_m_u16): Remove.
23293 (vshlq_m_s16): Remove.
23294 (vshlq_m_u32): Remove.
23295 (vshlq_m_s32): Remove.
23296 (vshlq_m_n_s8): Remove.
23297 (vshlq_m_n_s32): Remove.
23298 (vshlq_m_n_s16): Remove.
23299 (vshlq_m_n_u8): Remove.
23300 (vshlq_m_n_u32): Remove.
23301 (vshlq_m_n_u16): Remove.
23302 (vshlq_x_s8): Remove.
23303 (vshlq_x_s16): Remove.
23304 (vshlq_x_s32): Remove.
23305 (vshlq_x_u8): Remove.
23306 (vshlq_x_u16): Remove.
23307 (vshlq_x_u32): Remove.
23308 (vshlq_x_n_s8): Remove.
23309 (vshlq_x_n_s16): Remove.
23310 (vshlq_x_n_s32): Remove.
23311 (vshlq_x_n_u8): Remove.
23312 (vshlq_x_n_u16): Remove.
23313 (vshlq_x_n_u32): Remove.
23314 (__arm_vshlq_s8): Remove.
23315 (__arm_vshlq_s16): Remove.
23316 (__arm_vshlq_s32): Remove.
23317 (__arm_vshlq_u8): Remove.
23318 (__arm_vshlq_u16): Remove.
23319 (__arm_vshlq_u32): Remove.
23320 (__arm_vshlq_r_u8): Remove.
23321 (__arm_vshlq_n_u8): Remove.
23322 (__arm_vshlq_r_s8): Remove.
23323 (__arm_vshlq_n_s8): Remove.
23324 (__arm_vshlq_r_u16): Remove.
23325 (__arm_vshlq_n_u16): Remove.
23326 (__arm_vshlq_r_s16): Remove.
23327 (__arm_vshlq_n_s16): Remove.
23328 (__arm_vshlq_r_u32): Remove.
23329 (__arm_vshlq_n_u32): Remove.
23330 (__arm_vshlq_r_s32): Remove.
23331 (__arm_vshlq_n_s32): Remove.
23332 (__arm_vshlq_m_r_u8): Remove.
23333 (__arm_vshlq_m_r_s8): Remove.
23334 (__arm_vshlq_m_r_u16): Remove.
23335 (__arm_vshlq_m_r_s16): Remove.
23336 (__arm_vshlq_m_r_u32): Remove.
23337 (__arm_vshlq_m_r_s32): Remove.
23338 (__arm_vshlq_m_u8): Remove.
23339 (__arm_vshlq_m_s8): Remove.
23340 (__arm_vshlq_m_u16): Remove.
23341 (__arm_vshlq_m_s16): Remove.
23342 (__arm_vshlq_m_u32): Remove.
23343 (__arm_vshlq_m_s32): Remove.
23344 (__arm_vshlq_m_n_s8): Remove.
23345 (__arm_vshlq_m_n_s32): Remove.
23346 (__arm_vshlq_m_n_s16): Remove.
23347 (__arm_vshlq_m_n_u8): Remove.
23348 (__arm_vshlq_m_n_u32): Remove.
23349 (__arm_vshlq_m_n_u16): Remove.
23350 (__arm_vshlq_x_s8): Remove.
23351 (__arm_vshlq_x_s16): Remove.
23352 (__arm_vshlq_x_s32): Remove.
23353 (__arm_vshlq_x_u8): Remove.
23354 (__arm_vshlq_x_u16): Remove.
23355 (__arm_vshlq_x_u32): Remove.
23356 (__arm_vshlq_x_n_s8): Remove.
23357 (__arm_vshlq_x_n_s16): Remove.
23358 (__arm_vshlq_x_n_s32): Remove.
23359 (__arm_vshlq_x_n_u8): Remove.
23360 (__arm_vshlq_x_n_u16): Remove.
23361 (__arm_vshlq_x_n_u32): Remove.
23362 (__arm_vshlq): Remove.
23363 (__arm_vshlq_r): Remove.
23364 (__arm_vshlq_n): Remove.
23365 (__arm_vshlq_m_r): Remove.
23366 (__arm_vshlq_m): Remove.
23367 (__arm_vshlq_m_n): Remove.
23368 (__arm_vshlq_x): Remove.
23369 (__arm_vshlq_x_n): Remove.
23371 (vqshlq_r): Remove.
23372 (vqshlq_n): Remove.
23373 (vqshlq_m_r): Remove.
23374 (vqshlq_m_n): Remove.
23375 (vqshlq_m): Remove.
23376 (vqshlq_u8): Remove.
23377 (vqshlq_r_u8): Remove.
23378 (vqshlq_n_u8): Remove.
23379 (vqshlq_s8): Remove.
23380 (vqshlq_r_s8): Remove.
23381 (vqshlq_n_s8): Remove.
23382 (vqshlq_u16): Remove.
23383 (vqshlq_r_u16): Remove.
23384 (vqshlq_n_u16): Remove.
23385 (vqshlq_s16): Remove.
23386 (vqshlq_r_s16): Remove.
23387 (vqshlq_n_s16): Remove.
23388 (vqshlq_u32): Remove.
23389 (vqshlq_r_u32): Remove.
23390 (vqshlq_n_u32): Remove.
23391 (vqshlq_s32): Remove.
23392 (vqshlq_r_s32): Remove.
23393 (vqshlq_n_s32): Remove.
23394 (vqshlq_m_r_u8): Remove.
23395 (vqshlq_m_r_s8): Remove.
23396 (vqshlq_m_r_u16): Remove.
23397 (vqshlq_m_r_s16): Remove.
23398 (vqshlq_m_r_u32): Remove.
23399 (vqshlq_m_r_s32): Remove.
23400 (vqshlq_m_n_s8): Remove.
23401 (vqshlq_m_n_s32): Remove.
23402 (vqshlq_m_n_s16): Remove.
23403 (vqshlq_m_n_u8): Remove.
23404 (vqshlq_m_n_u32): Remove.
23405 (vqshlq_m_n_u16): Remove.
23406 (vqshlq_m_s8): Remove.
23407 (vqshlq_m_s32): Remove.
23408 (vqshlq_m_s16): Remove.
23409 (vqshlq_m_u8): Remove.
23410 (vqshlq_m_u32): Remove.
23411 (vqshlq_m_u16): Remove.
23412 (__arm_vqshlq_u8): Remove.
23413 (__arm_vqshlq_r_u8): Remove.
23414 (__arm_vqshlq_n_u8): Remove.
23415 (__arm_vqshlq_s8): Remove.
23416 (__arm_vqshlq_r_s8): Remove.
23417 (__arm_vqshlq_n_s8): Remove.
23418 (__arm_vqshlq_u16): Remove.
23419 (__arm_vqshlq_r_u16): Remove.
23420 (__arm_vqshlq_n_u16): Remove.
23421 (__arm_vqshlq_s16): Remove.
23422 (__arm_vqshlq_r_s16): Remove.
23423 (__arm_vqshlq_n_s16): Remove.
23424 (__arm_vqshlq_u32): Remove.
23425 (__arm_vqshlq_r_u32): Remove.
23426 (__arm_vqshlq_n_u32): Remove.
23427 (__arm_vqshlq_s32): Remove.
23428 (__arm_vqshlq_r_s32): Remove.
23429 (__arm_vqshlq_n_s32): Remove.
23430 (__arm_vqshlq_m_r_u8): Remove.
23431 (__arm_vqshlq_m_r_s8): Remove.
23432 (__arm_vqshlq_m_r_u16): Remove.
23433 (__arm_vqshlq_m_r_s16): Remove.
23434 (__arm_vqshlq_m_r_u32): Remove.
23435 (__arm_vqshlq_m_r_s32): Remove.
23436 (__arm_vqshlq_m_n_s8): Remove.
23437 (__arm_vqshlq_m_n_s32): Remove.
23438 (__arm_vqshlq_m_n_s16): Remove.
23439 (__arm_vqshlq_m_n_u8): Remove.
23440 (__arm_vqshlq_m_n_u32): Remove.
23441 (__arm_vqshlq_m_n_u16): Remove.
23442 (__arm_vqshlq_m_s8): Remove.
23443 (__arm_vqshlq_m_s32): Remove.
23444 (__arm_vqshlq_m_s16): Remove.
23445 (__arm_vqshlq_m_u8): Remove.
23446 (__arm_vqshlq_m_u32): Remove.
23447 (__arm_vqshlq_m_u16): Remove.
23448 (__arm_vqshlq): Remove.
23449 (__arm_vqshlq_r): Remove.
23450 (__arm_vqshlq_n): Remove.
23451 (__arm_vqshlq_m_r): Remove.
23452 (__arm_vqshlq_m_n): Remove.
23453 (__arm_vqshlq_m): Remove.
23455 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23457 * config/arm/arm-mve-builtins-functions.h (class
23458 unspec_mve_function_exact_insn_vshl): New.
23460 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23462 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
23463 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
23465 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23467 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
23468 (finish_opt_n_resolution): Handle MODE_r.
23469 * config/arm/arm-mve-builtins.def (r): New mode.
23471 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23473 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
23474 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
23476 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23478 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
23480 * config/arm/arm-mve-builtins-base.def (vabdq): New.
23481 * config/arm/arm-mve-builtins-base.h (vabdq): New.
23482 * config/arm/arm_mve.h (vabdq): Remove.
23485 (vabdq_u8): Remove.
23486 (vabdq_s8): Remove.
23487 (vabdq_u16): Remove.
23488 (vabdq_s16): Remove.
23489 (vabdq_u32): Remove.
23490 (vabdq_s32): Remove.
23491 (vabdq_f16): Remove.
23492 (vabdq_f32): Remove.
23493 (vabdq_m_s8): Remove.
23494 (vabdq_m_s32): Remove.
23495 (vabdq_m_s16): Remove.
23496 (vabdq_m_u8): Remove.
23497 (vabdq_m_u32): Remove.
23498 (vabdq_m_u16): Remove.
23499 (vabdq_m_f32): Remove.
23500 (vabdq_m_f16): Remove.
23501 (vabdq_x_s8): Remove.
23502 (vabdq_x_s16): Remove.
23503 (vabdq_x_s32): Remove.
23504 (vabdq_x_u8): Remove.
23505 (vabdq_x_u16): Remove.
23506 (vabdq_x_u32): Remove.
23507 (vabdq_x_f16): Remove.
23508 (vabdq_x_f32): Remove.
23509 (__arm_vabdq_u8): Remove.
23510 (__arm_vabdq_s8): Remove.
23511 (__arm_vabdq_u16): Remove.
23512 (__arm_vabdq_s16): Remove.
23513 (__arm_vabdq_u32): Remove.
23514 (__arm_vabdq_s32): Remove.
23515 (__arm_vabdq_m_s8): Remove.
23516 (__arm_vabdq_m_s32): Remove.
23517 (__arm_vabdq_m_s16): Remove.
23518 (__arm_vabdq_m_u8): Remove.
23519 (__arm_vabdq_m_u32): Remove.
23520 (__arm_vabdq_m_u16): Remove.
23521 (__arm_vabdq_x_s8): Remove.
23522 (__arm_vabdq_x_s16): Remove.
23523 (__arm_vabdq_x_s32): Remove.
23524 (__arm_vabdq_x_u8): Remove.
23525 (__arm_vabdq_x_u16): Remove.
23526 (__arm_vabdq_x_u32): Remove.
23527 (__arm_vabdq_f16): Remove.
23528 (__arm_vabdq_f32): Remove.
23529 (__arm_vabdq_m_f32): Remove.
23530 (__arm_vabdq_m_f16): Remove.
23531 (__arm_vabdq_x_f16): Remove.
23532 (__arm_vabdq_x_f32): Remove.
23533 (__arm_vabdq): Remove.
23534 (__arm_vabdq_m): Remove.
23535 (__arm_vabdq_x): Remove.
23537 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23539 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
23540 (MVE_FP_VABDQ_ONLY): New.
23541 (mve_insn): Add vabd.
23542 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
23543 (@mve_<mve_insn>q_f<mode>): ... this.
23544 (mve_vabdq_m_f<mode>): Remove.
23546 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23548 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
23549 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
23550 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
23551 * config/arm/arm_mve.h (vqrdmulhq): Remove.
23552 (vqrdmulhq_m): Remove.
23553 (vqrdmulhq_s8): Remove.
23554 (vqrdmulhq_n_s8): Remove.
23555 (vqrdmulhq_s16): Remove.
23556 (vqrdmulhq_n_s16): Remove.
23557 (vqrdmulhq_s32): Remove.
23558 (vqrdmulhq_n_s32): Remove.
23559 (vqrdmulhq_m_n_s8): Remove.
23560 (vqrdmulhq_m_n_s32): Remove.
23561 (vqrdmulhq_m_n_s16): Remove.
23562 (vqrdmulhq_m_s8): Remove.
23563 (vqrdmulhq_m_s32): Remove.
23564 (vqrdmulhq_m_s16): Remove.
23565 (__arm_vqrdmulhq_s8): Remove.
23566 (__arm_vqrdmulhq_n_s8): Remove.
23567 (__arm_vqrdmulhq_s16): Remove.
23568 (__arm_vqrdmulhq_n_s16): Remove.
23569 (__arm_vqrdmulhq_s32): Remove.
23570 (__arm_vqrdmulhq_n_s32): Remove.
23571 (__arm_vqrdmulhq_m_n_s8): Remove.
23572 (__arm_vqrdmulhq_m_n_s32): Remove.
23573 (__arm_vqrdmulhq_m_n_s16): Remove.
23574 (__arm_vqrdmulhq_m_s8): Remove.
23575 (__arm_vqrdmulhq_m_s32): Remove.
23576 (__arm_vqrdmulhq_m_s16): Remove.
23577 (__arm_vqrdmulhq): Remove.
23578 (__arm_vqrdmulhq_m): Remove.
23580 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23582 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
23583 (MVE_SHIFT_N, MVE_SHIFT_R): New.
23584 (mve_insn): Add vqshl, vshl.
23585 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
23586 (mve_vshlq_n_<supf><mode>): Merge into ...
23587 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23588 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
23590 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
23591 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
23593 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
23594 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
23596 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23597 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
23599 (@mve_<mve_insn>q_<supf><mode>): ... this.
23601 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23603 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
23604 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
23605 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
23606 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
23608 * config/arm/arm_mve.h (vrshlq): Remove.
23609 (vrshlq_m_n): Remove.
23610 (vrshlq_m): Remove.
23611 (vrshlq_x): Remove.
23612 (vrshlq_u8): Remove.
23613 (vrshlq_n_u8): Remove.
23614 (vrshlq_s8): Remove.
23615 (vrshlq_n_s8): Remove.
23616 (vrshlq_u16): Remove.
23617 (vrshlq_n_u16): Remove.
23618 (vrshlq_s16): Remove.
23619 (vrshlq_n_s16): Remove.
23620 (vrshlq_u32): Remove.
23621 (vrshlq_n_u32): Remove.
23622 (vrshlq_s32): Remove.
23623 (vrshlq_n_s32): Remove.
23624 (vrshlq_m_n_u8): Remove.
23625 (vrshlq_m_n_s8): Remove.
23626 (vrshlq_m_n_u16): Remove.
23627 (vrshlq_m_n_s16): Remove.
23628 (vrshlq_m_n_u32): Remove.
23629 (vrshlq_m_n_s32): Remove.
23630 (vrshlq_m_s8): Remove.
23631 (vrshlq_m_s32): Remove.
23632 (vrshlq_m_s16): Remove.
23633 (vrshlq_m_u8): Remove.
23634 (vrshlq_m_u32): Remove.
23635 (vrshlq_m_u16): Remove.
23636 (vrshlq_x_s8): Remove.
23637 (vrshlq_x_s16): Remove.
23638 (vrshlq_x_s32): Remove.
23639 (vrshlq_x_u8): Remove.
23640 (vrshlq_x_u16): Remove.
23641 (vrshlq_x_u32): Remove.
23642 (__arm_vrshlq_u8): Remove.
23643 (__arm_vrshlq_n_u8): Remove.
23644 (__arm_vrshlq_s8): Remove.
23645 (__arm_vrshlq_n_s8): Remove.
23646 (__arm_vrshlq_u16): Remove.
23647 (__arm_vrshlq_n_u16): Remove.
23648 (__arm_vrshlq_s16): Remove.
23649 (__arm_vrshlq_n_s16): Remove.
23650 (__arm_vrshlq_u32): Remove.
23651 (__arm_vrshlq_n_u32): Remove.
23652 (__arm_vrshlq_s32): Remove.
23653 (__arm_vrshlq_n_s32): Remove.
23654 (__arm_vrshlq_m_n_u8): Remove.
23655 (__arm_vrshlq_m_n_s8): Remove.
23656 (__arm_vrshlq_m_n_u16): Remove.
23657 (__arm_vrshlq_m_n_s16): Remove.
23658 (__arm_vrshlq_m_n_u32): Remove.
23659 (__arm_vrshlq_m_n_s32): Remove.
23660 (__arm_vrshlq_m_s8): Remove.
23661 (__arm_vrshlq_m_s32): Remove.
23662 (__arm_vrshlq_m_s16): Remove.
23663 (__arm_vrshlq_m_u8): Remove.
23664 (__arm_vrshlq_m_u32): Remove.
23665 (__arm_vrshlq_m_u16): Remove.
23666 (__arm_vrshlq_x_s8): Remove.
23667 (__arm_vrshlq_x_s16): Remove.
23668 (__arm_vrshlq_x_s32): Remove.
23669 (__arm_vrshlq_x_u8): Remove.
23670 (__arm_vrshlq_x_u16): Remove.
23671 (__arm_vrshlq_x_u32): Remove.
23672 (__arm_vrshlq): Remove.
23673 (__arm_vrshlq_m_n): Remove.
23674 (__arm_vrshlq_m): Remove.
23675 (__arm_vrshlq_x): Remove.
23677 (vqrshlq_m_n): Remove.
23678 (vqrshlq_m): Remove.
23679 (vqrshlq_u8): Remove.
23680 (vqrshlq_n_u8): Remove.
23681 (vqrshlq_s8): Remove.
23682 (vqrshlq_n_s8): Remove.
23683 (vqrshlq_u16): Remove.
23684 (vqrshlq_n_u16): Remove.
23685 (vqrshlq_s16): Remove.
23686 (vqrshlq_n_s16): Remove.
23687 (vqrshlq_u32): Remove.
23688 (vqrshlq_n_u32): Remove.
23689 (vqrshlq_s32): Remove.
23690 (vqrshlq_n_s32): Remove.
23691 (vqrshlq_m_n_u8): Remove.
23692 (vqrshlq_m_n_s8): Remove.
23693 (vqrshlq_m_n_u16): Remove.
23694 (vqrshlq_m_n_s16): Remove.
23695 (vqrshlq_m_n_u32): Remove.
23696 (vqrshlq_m_n_s32): Remove.
23697 (vqrshlq_m_s8): Remove.
23698 (vqrshlq_m_s32): Remove.
23699 (vqrshlq_m_s16): Remove.
23700 (vqrshlq_m_u8): Remove.
23701 (vqrshlq_m_u32): Remove.
23702 (vqrshlq_m_u16): Remove.
23703 (__arm_vqrshlq_u8): Remove.
23704 (__arm_vqrshlq_n_u8): Remove.
23705 (__arm_vqrshlq_s8): Remove.
23706 (__arm_vqrshlq_n_s8): Remove.
23707 (__arm_vqrshlq_u16): Remove.
23708 (__arm_vqrshlq_n_u16): Remove.
23709 (__arm_vqrshlq_s16): Remove.
23710 (__arm_vqrshlq_n_s16): Remove.
23711 (__arm_vqrshlq_u32): Remove.
23712 (__arm_vqrshlq_n_u32): Remove.
23713 (__arm_vqrshlq_s32): Remove.
23714 (__arm_vqrshlq_n_s32): Remove.
23715 (__arm_vqrshlq_m_n_u8): Remove.
23716 (__arm_vqrshlq_m_n_s8): Remove.
23717 (__arm_vqrshlq_m_n_u16): Remove.
23718 (__arm_vqrshlq_m_n_s16): Remove.
23719 (__arm_vqrshlq_m_n_u32): Remove.
23720 (__arm_vqrshlq_m_n_s32): Remove.
23721 (__arm_vqrshlq_m_s8): Remove.
23722 (__arm_vqrshlq_m_s32): Remove.
23723 (__arm_vqrshlq_m_s16): Remove.
23724 (__arm_vqrshlq_m_u8): Remove.
23725 (__arm_vqrshlq_m_u32): Remove.
23726 (__arm_vqrshlq_m_u16): Remove.
23727 (__arm_vqrshlq): Remove.
23728 (__arm_vqrshlq_m_n): Remove.
23729 (__arm_vqrshlq_m): Remove.
23731 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23733 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
23734 (mve_insn): Add vqrshl, vrshl.
23735 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
23736 (mve_vrshlq_n_<supf><mode>): Merge into ...
23737 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23738 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
23740 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23742 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23744 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
23745 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
23747 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23750 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
23751 denegrate PHI optmization.
23753 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
23755 * config/i386/predicates.md (register_no_SP_operand):
23756 Rename from index_register_operand.
23757 (call_register_operand): Update for rename.
23758 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
23760 2023-05-05 Tamar Christina <tamar.christina@arm.com>
23763 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
23764 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
23765 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
23766 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
23767 (s-match): Split into s-generic-match and s-gimple-match.
23768 * configure.ac (with-matchpd-partitions,
23769 DEFAULT_MATCHPD_PARTITIONS): New.
23770 * configure: Regenerate.
23772 2023-05-05 Tamar Christina <tamar.christina@arm.com>
23775 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
23776 (decision_tree::gen): Accept list of files instead of single and update
23777 to write function definition to header and main file.
23778 (write_predicate): Likewise.
23779 (write_header): Emit pragmas and new includes.
23780 (main): Create file buffers and cleanup.
23781 (showUsage, write_header_includes): New.
23783 2023-05-05 Tamar Christina <tamar.christina@arm.com>
23786 * Makefile.in (OBJS): Add gimple-match-exports.o.
23787 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
23788 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
23789 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
23790 gimple_resimplify5, constant_for_folding, convert_conditional_op,
23791 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
23792 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
23793 do_valueize, try_conditional_simplification, gimple_extract,
23794 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
23795 commutative_ternary_op_p, first_commutative_argument,
23796 associative_binary_op_p, directly_supported_p,
23797 get_conditional_internal_fn): Moved to gimple-match-exports.cc
23798 * gimple-match-exports.cc: New file.
23800 2023-05-05 Tamar Christina <tamar.christina@arm.com>
23803 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
23805 (dt_simplify::gen_1): Use it.
23807 2023-05-05 Tamar Christina <tamar.christina@arm.com>
23810 * genmatch.cc (output_line_directive): Only emit commented directive
23813 2023-05-05 Tamar Christina <tamar.christina@arm.com>
23816 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
23818 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
23820 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
23821 unused in_mode/in_n variables.
23823 2023-05-05 Richard Biener <rguenther@suse.de>
23825 PR tree-optimization/109735
23826 * tree-vect-stmts.cc (vectorizable_operation): Perform
23827 conversion for POINTER_DIFF_EXPR unconditionally.
23829 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
23831 * config/i386/mmx.md (mulv2si3): New expander.
23832 (*mulv2si3): New insn pattern.
23834 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
23835 Thomas Schwinge <thomas@codesourcery.com>
23838 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
23839 alongside reverse-offload function table to prevent NULL values
23840 of the function addresses.
23842 2023-05-05 Jakub Jelinek <jakub@redhat.com>
23844 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
23846 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
23848 2023-05-05 Andrew Pinski <apinski@marvell.com>
23850 PR tree-optimization/109732
23851 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
23852 of the argtrue/argfalse.
23854 2023-05-05 Andrew Pinski <apinski@marvell.com>
23856 PR tree-optimization/109722
23857 * match.pd: Extend the `ABS<a> == 0` pattern
23858 to cover `ABSU<a> == 0` too.
23860 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
23863 * config/i386/predicates.md (index_reg_operand): New predicate.
23864 * config/i386/i386.md (ashift to lea spliter): Use
23865 general_reg_operand and index_reg_operand predicates.
23867 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23869 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
23870 Rename and reimplement with RTL codes to...
23871 (aarch64_<optab>hn2<mode>_insn_le): .. This.
23872 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
23873 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
23875 (aarch64_<optab>hn2<mode>_insn_be): ... This.
23876 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
23877 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
23878 (aarch64_<optab>hn2<mode>): ... This.
23879 (aarch64_r<optab>hn2<mode>): New expander.
23880 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
23881 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
23882 (ADDSUBHN): Delete.
23883 (sur): Remove handling of the above.
23884 (addsub): Likewise.
23886 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23888 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
23890 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
23891 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
23892 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
23893 (aarch64_<sur><addsub>hn<mode>): Delete.
23894 (aarch64_<optab>hn<mode>): New define_expand.
23895 (aarch64_r<optab>hn<mode>): Likewise.
23896 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
23899 2023-05-04 Andrew Pinski <apinski@marvell.com>
23901 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
23902 diamond form bb with forwarder only empty blocks better.
23904 2023-05-04 Andrew Pinski <apinski@marvell.com>
23906 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
23907 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
23908 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
23909 of an inline version of it.
23910 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
23911 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
23913 2023-05-04 Andrew Pinski <apinski@marvell.com>
23915 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
23916 the default argument value for dce_ssa_names to nullptr.
23917 Check to make sure dce_ssa_names is a non-nullptr before
23918 calling simple_dce_from_worklist.
23920 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
23922 * config/i386/predicates.md (index_register_operand): Reject
23923 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
23924 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
23925 (call_register_no_elim_operand): Rewrite as ...
23926 (call_register_operand): ... this.
23927 (call_insn_operand): Use call_register_operand predicate.
23929 2023-05-04 Richard Biener <rguenther@suse.de>
23931 PR tree-optimization/109721
23932 * tree-vect-stmts.cc (vectorizable_operation): Make sure
23933 to test word_mode for all !target_support_p operations.
23935 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23938 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
23939 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
23940 (aarch64_mla<mode>): Rename to...
23941 (aarch64_mla<mode><vczle><vczbe>): ... This.
23942 (*aarch64_mla_elt<mode>): Rename to...
23943 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
23944 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
23945 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
23946 (aarch64_mla_n<mode>): Rename to...
23947 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
23948 (aarch64_mls<mode>): Rename to...
23949 (aarch64_mls<mode><vczle><vczbe>): ... This.
23950 (*aarch64_mls_elt<mode>): Rename to...
23951 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
23952 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
23953 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
23954 (aarch64_mls_n<mode>): Rename to...
23955 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
23956 (fma<mode>4): Rename to...
23957 (fma<mode>4<vczle><vczbe>): ... This.
23958 (*aarch64_fma4_elt<mode>): Rename to...
23959 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
23960 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
23961 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
23962 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
23963 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
23964 (fnma<mode>4): Rename to...
23965 (fnma<mode>4<vczle><vczbe>): ... This.
23966 (*aarch64_fnma4_elt<mode>): Rename to...
23967 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
23968 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
23969 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
23970 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
23971 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
23972 (aarch64_simd_bsl<mode>_internal): Rename to...
23973 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
23974 (*aarch64_simd_bsl<mode>_alt): Rename to...
23975 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
23977 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23980 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
23981 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
23982 (fabd<mode>3): Rename to...
23983 (fabd<mode>3<vczle><vczbe>): ... This.
23984 (aarch64_<optab>p<mode>): Rename to...
23985 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
23986 (aarch64_faddp<mode>): Rename to...
23987 (aarch64_faddp<mode><vczle><vczbe>): ... This.
23989 2023-05-04 Martin Liska <mliska@suse.cz>
23991 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
23992 (print_version): Use it.
23993 (generate_results): Likewise.
23995 2023-05-04 Richard Biener <rguenther@suse.de>
23997 * tree-cfg.h (last_stmt): Rename to ...
23998 (last_nondebug_stmt): ... this.
23999 * tree-cfg.cc (last_stmt): Rename to ...
24000 (last_nondebug_stmt): ... this.
24001 (assign_discriminators): Adjust.
24002 (group_case_labels_stmt): Likewise.
24003 (gimple_can_duplicate_bb_p): Likewise.
24004 (execute_fixup_cfg): Likewise.
24005 * auto-profile.cc (afdo_propagate_circuit): Likewise.
24006 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
24007 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
24008 (determine_parallel_type): Likewise.
24009 (adjust_context_and_scope): Likewise.
24010 (expand_task_call): Likewise.
24011 (remove_exit_barrier): Likewise.
24012 (expand_omp_taskreg): Likewise.
24013 (expand_omp_for_init_counts): Likewise.
24014 (expand_omp_for_init_vars): Likewise.
24015 (expand_omp_for_static_chunk): Likewise.
24016 (expand_omp_simd): Likewise.
24017 (expand_oacc_for): Likewise.
24018 (expand_omp_for): Likewise.
24019 (expand_omp_sections): Likewise.
24020 (expand_omp_atomic_fetch_op): Likewise.
24021 (expand_omp_atomic_cas): Likewise.
24022 (expand_omp_atomic): Likewise.
24023 (expand_omp_target): Likewise.
24024 (expand_omp): Likewise.
24025 (omp_make_gimple_edges): Likewise.
24026 * trans-mem.cc (tm_region_init): Likewise.
24027 * tree-inline.cc (redirect_all_calls): Likewise.
24028 * tree-parloops.cc (gen_parallel_loop): Likewise.
24029 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
24030 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
24032 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
24033 (may_eliminate_iv): Likewise.
24034 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
24035 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
24037 (estimate_numbers_of_iterations): Likewise.
24038 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
24039 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
24040 (set_predicates_for_bb): Likewise.
24041 (init_loop_unswitch_info): Likewise.
24042 (hoist_guard): Likewise.
24043 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
24044 (minmax_replacement): Likewise.
24045 * tree-ssa-reassoc.cc (update_range_test): Likewise.
24046 (optimize_range_tests_to_bit_test): Likewise.
24047 (optimize_range_tests_var_bound): Likewise.
24048 (optimize_range_tests): Likewise.
24049 (no_side_effect_bb): Likewise.
24050 (suitable_cond_bb): Likewise.
24051 (maybe_optimize_range_tests): Likewise.
24052 (reassociate_bb): Likewise.
24053 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
24055 2023-05-04 Jakub Jelinek <jakub@redhat.com>
24058 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
24059 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
24060 for it only if it still has TImode. Don't decide whether to call
24061 fix_debug_reg_uses based on whether SRC is ever set or not.
24063 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24065 * config/cris/cris.cc (cris_split_constant): New function.
24066 * config/cris/cris.md (splitop): New iterator.
24067 (opsplit1): New define_peephole2.
24068 * config/cris/cris-protos.h (cris_split_constant): Declare.
24069 (cris_splittable_constant_p): New macro.
24071 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24073 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
24076 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24078 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
24079 lra_in_progress, not reload_in_progress.
24080 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
24081 * config/cris/constraints.md ("Q"): Ditto.
24083 2023-05-03 Andrew Pinski <apinski@marvell.com>
24085 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
24086 stats on removed number of statements and phis.
24088 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
24090 PR tree-optimization/109711
24091 * value-range.cc (irange::verify_range): Allow types of
24094 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
24097 * calls.cc (can_implement_as_sibling_call_p): Reject calls
24098 to __sanitizer_cov_trace_pc.
24100 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
24103 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
24104 a new ABI break parameter for GCC 14. Set it to the alignment
24105 of enums that have an underlying type. Take the true alignment
24106 of such enums from the TYPE_ALIGN of the underlying type's
24108 (aarch64_function_arg_boundary): Update accordingly.
24109 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
24110 Warn about ABI differences.
24112 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
24115 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
24116 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
24117 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
24118 (aarch64_gimplify_va_arg_expr): Likewise.
24120 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24122 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
24123 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
24124 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
24126 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
24127 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
24128 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
24129 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
24130 * config/arm/arm_mve.h (vhsubq): Remove.
24132 (vhaddq_m): Remove.
24133 (vhsubq_m): Remove.
24134 (vhaddq_x): Remove.
24135 (vhsubq_x): Remove.
24136 (vhsubq_u8): Remove.
24137 (vhsubq_n_u8): Remove.
24138 (vhaddq_u8): Remove.
24139 (vhaddq_n_u8): Remove.
24140 (vhsubq_s8): Remove.
24141 (vhsubq_n_s8): Remove.
24142 (vhaddq_s8): Remove.
24143 (vhaddq_n_s8): Remove.
24144 (vhsubq_u16): Remove.
24145 (vhsubq_n_u16): Remove.
24146 (vhaddq_u16): Remove.
24147 (vhaddq_n_u16): Remove.
24148 (vhsubq_s16): Remove.
24149 (vhsubq_n_s16): Remove.
24150 (vhaddq_s16): Remove.
24151 (vhaddq_n_s16): Remove.
24152 (vhsubq_u32): Remove.
24153 (vhsubq_n_u32): Remove.
24154 (vhaddq_u32): Remove.
24155 (vhaddq_n_u32): Remove.
24156 (vhsubq_s32): Remove.
24157 (vhsubq_n_s32): Remove.
24158 (vhaddq_s32): Remove.
24159 (vhaddq_n_s32): Remove.
24160 (vhaddq_m_n_s8): Remove.
24161 (vhaddq_m_n_s32): Remove.
24162 (vhaddq_m_n_s16): Remove.
24163 (vhaddq_m_n_u8): Remove.
24164 (vhaddq_m_n_u32): Remove.
24165 (vhaddq_m_n_u16): Remove.
24166 (vhaddq_m_s8): Remove.
24167 (vhaddq_m_s32): Remove.
24168 (vhaddq_m_s16): Remove.
24169 (vhaddq_m_u8): Remove.
24170 (vhaddq_m_u32): Remove.
24171 (vhaddq_m_u16): Remove.
24172 (vhsubq_m_n_s8): Remove.
24173 (vhsubq_m_n_s32): Remove.
24174 (vhsubq_m_n_s16): Remove.
24175 (vhsubq_m_n_u8): Remove.
24176 (vhsubq_m_n_u32): Remove.
24177 (vhsubq_m_n_u16): Remove.
24178 (vhsubq_m_s8): Remove.
24179 (vhsubq_m_s32): Remove.
24180 (vhsubq_m_s16): Remove.
24181 (vhsubq_m_u8): Remove.
24182 (vhsubq_m_u32): Remove.
24183 (vhsubq_m_u16): Remove.
24184 (vhaddq_x_n_s8): Remove.
24185 (vhaddq_x_n_s16): Remove.
24186 (vhaddq_x_n_s32): Remove.
24187 (vhaddq_x_n_u8): Remove.
24188 (vhaddq_x_n_u16): Remove.
24189 (vhaddq_x_n_u32): Remove.
24190 (vhaddq_x_s8): Remove.
24191 (vhaddq_x_s16): Remove.
24192 (vhaddq_x_s32): Remove.
24193 (vhaddq_x_u8): Remove.
24194 (vhaddq_x_u16): Remove.
24195 (vhaddq_x_u32): Remove.
24196 (vhsubq_x_n_s8): Remove.
24197 (vhsubq_x_n_s16): Remove.
24198 (vhsubq_x_n_s32): Remove.
24199 (vhsubq_x_n_u8): Remove.
24200 (vhsubq_x_n_u16): Remove.
24201 (vhsubq_x_n_u32): Remove.
24202 (vhsubq_x_s8): Remove.
24203 (vhsubq_x_s16): Remove.
24204 (vhsubq_x_s32): Remove.
24205 (vhsubq_x_u8): Remove.
24206 (vhsubq_x_u16): Remove.
24207 (vhsubq_x_u32): Remove.
24208 (__arm_vhsubq_u8): Remove.
24209 (__arm_vhsubq_n_u8): Remove.
24210 (__arm_vhaddq_u8): Remove.
24211 (__arm_vhaddq_n_u8): Remove.
24212 (__arm_vhsubq_s8): Remove.
24213 (__arm_vhsubq_n_s8): Remove.
24214 (__arm_vhaddq_s8): Remove.
24215 (__arm_vhaddq_n_s8): Remove.
24216 (__arm_vhsubq_u16): Remove.
24217 (__arm_vhsubq_n_u16): Remove.
24218 (__arm_vhaddq_u16): Remove.
24219 (__arm_vhaddq_n_u16): Remove.
24220 (__arm_vhsubq_s16): Remove.
24221 (__arm_vhsubq_n_s16): Remove.
24222 (__arm_vhaddq_s16): Remove.
24223 (__arm_vhaddq_n_s16): Remove.
24224 (__arm_vhsubq_u32): Remove.
24225 (__arm_vhsubq_n_u32): Remove.
24226 (__arm_vhaddq_u32): Remove.
24227 (__arm_vhaddq_n_u32): Remove.
24228 (__arm_vhsubq_s32): Remove.
24229 (__arm_vhsubq_n_s32): Remove.
24230 (__arm_vhaddq_s32): Remove.
24231 (__arm_vhaddq_n_s32): Remove.
24232 (__arm_vhaddq_m_n_s8): Remove.
24233 (__arm_vhaddq_m_n_s32): Remove.
24234 (__arm_vhaddq_m_n_s16): Remove.
24235 (__arm_vhaddq_m_n_u8): Remove.
24236 (__arm_vhaddq_m_n_u32): Remove.
24237 (__arm_vhaddq_m_n_u16): Remove.
24238 (__arm_vhaddq_m_s8): Remove.
24239 (__arm_vhaddq_m_s32): Remove.
24240 (__arm_vhaddq_m_s16): Remove.
24241 (__arm_vhaddq_m_u8): Remove.
24242 (__arm_vhaddq_m_u32): Remove.
24243 (__arm_vhaddq_m_u16): Remove.
24244 (__arm_vhsubq_m_n_s8): Remove.
24245 (__arm_vhsubq_m_n_s32): Remove.
24246 (__arm_vhsubq_m_n_s16): Remove.
24247 (__arm_vhsubq_m_n_u8): Remove.
24248 (__arm_vhsubq_m_n_u32): Remove.
24249 (__arm_vhsubq_m_n_u16): Remove.
24250 (__arm_vhsubq_m_s8): Remove.
24251 (__arm_vhsubq_m_s32): Remove.
24252 (__arm_vhsubq_m_s16): Remove.
24253 (__arm_vhsubq_m_u8): Remove.
24254 (__arm_vhsubq_m_u32): Remove.
24255 (__arm_vhsubq_m_u16): Remove.
24256 (__arm_vhaddq_x_n_s8): Remove.
24257 (__arm_vhaddq_x_n_s16): Remove.
24258 (__arm_vhaddq_x_n_s32): Remove.
24259 (__arm_vhaddq_x_n_u8): Remove.
24260 (__arm_vhaddq_x_n_u16): Remove.
24261 (__arm_vhaddq_x_n_u32): Remove.
24262 (__arm_vhaddq_x_s8): Remove.
24263 (__arm_vhaddq_x_s16): Remove.
24264 (__arm_vhaddq_x_s32): Remove.
24265 (__arm_vhaddq_x_u8): Remove.
24266 (__arm_vhaddq_x_u16): Remove.
24267 (__arm_vhaddq_x_u32): Remove.
24268 (__arm_vhsubq_x_n_s8): Remove.
24269 (__arm_vhsubq_x_n_s16): Remove.
24270 (__arm_vhsubq_x_n_s32): Remove.
24271 (__arm_vhsubq_x_n_u8): Remove.
24272 (__arm_vhsubq_x_n_u16): Remove.
24273 (__arm_vhsubq_x_n_u32): Remove.
24274 (__arm_vhsubq_x_s8): Remove.
24275 (__arm_vhsubq_x_s16): Remove.
24276 (__arm_vhsubq_x_s32): Remove.
24277 (__arm_vhsubq_x_u8): Remove.
24278 (__arm_vhsubq_x_u16): Remove.
24279 (__arm_vhsubq_x_u32): Remove.
24280 (__arm_vhsubq): Remove.
24281 (__arm_vhaddq): Remove.
24282 (__arm_vhaddq_m): Remove.
24283 (__arm_vhsubq_m): Remove.
24284 (__arm_vhaddq_x): Remove.
24285 (__arm_vhsubq_x): Remove.
24287 (vmulhq_m): Remove.
24288 (vmulhq_x): Remove.
24289 (vmulhq_u8): Remove.
24290 (vmulhq_s8): Remove.
24291 (vmulhq_u16): Remove.
24292 (vmulhq_s16): Remove.
24293 (vmulhq_u32): Remove.
24294 (vmulhq_s32): Remove.
24295 (vmulhq_m_s8): Remove.
24296 (vmulhq_m_s32): Remove.
24297 (vmulhq_m_s16): Remove.
24298 (vmulhq_m_u8): Remove.
24299 (vmulhq_m_u32): Remove.
24300 (vmulhq_m_u16): Remove.
24301 (vmulhq_x_s8): Remove.
24302 (vmulhq_x_s16): Remove.
24303 (vmulhq_x_s32): Remove.
24304 (vmulhq_x_u8): Remove.
24305 (vmulhq_x_u16): Remove.
24306 (vmulhq_x_u32): Remove.
24307 (__arm_vmulhq_u8): Remove.
24308 (__arm_vmulhq_s8): Remove.
24309 (__arm_vmulhq_u16): Remove.
24310 (__arm_vmulhq_s16): Remove.
24311 (__arm_vmulhq_u32): Remove.
24312 (__arm_vmulhq_s32): Remove.
24313 (__arm_vmulhq_m_s8): Remove.
24314 (__arm_vmulhq_m_s32): Remove.
24315 (__arm_vmulhq_m_s16): Remove.
24316 (__arm_vmulhq_m_u8): Remove.
24317 (__arm_vmulhq_m_u32): Remove.
24318 (__arm_vmulhq_m_u16): Remove.
24319 (__arm_vmulhq_x_s8): Remove.
24320 (__arm_vmulhq_x_s16): Remove.
24321 (__arm_vmulhq_x_s32): Remove.
24322 (__arm_vmulhq_x_u8): Remove.
24323 (__arm_vmulhq_x_u16): Remove.
24324 (__arm_vmulhq_x_u32): Remove.
24325 (__arm_vmulhq): Remove.
24326 (__arm_vmulhq_m): Remove.
24327 (__arm_vmulhq_x): Remove.
24330 (vqaddq_m): Remove.
24331 (vqsubq_m): Remove.
24332 (vqsubq_u8): Remove.
24333 (vqsubq_n_u8): Remove.
24334 (vqaddq_u8): Remove.
24335 (vqaddq_n_u8): Remove.
24336 (vqsubq_s8): Remove.
24337 (vqsubq_n_s8): Remove.
24338 (vqaddq_s8): Remove.
24339 (vqaddq_n_s8): Remove.
24340 (vqsubq_u16): Remove.
24341 (vqsubq_n_u16): Remove.
24342 (vqaddq_u16): Remove.
24343 (vqaddq_n_u16): Remove.
24344 (vqsubq_s16): Remove.
24345 (vqsubq_n_s16): Remove.
24346 (vqaddq_s16): Remove.
24347 (vqaddq_n_s16): Remove.
24348 (vqsubq_u32): Remove.
24349 (vqsubq_n_u32): Remove.
24350 (vqaddq_u32): Remove.
24351 (vqaddq_n_u32): Remove.
24352 (vqsubq_s32): Remove.
24353 (vqsubq_n_s32): Remove.
24354 (vqaddq_s32): Remove.
24355 (vqaddq_n_s32): Remove.
24356 (vqaddq_m_n_s8): Remove.
24357 (vqaddq_m_n_s32): Remove.
24358 (vqaddq_m_n_s16): Remove.
24359 (vqaddq_m_n_u8): Remove.
24360 (vqaddq_m_n_u32): Remove.
24361 (vqaddq_m_n_u16): Remove.
24362 (vqaddq_m_s8): Remove.
24363 (vqaddq_m_s32): Remove.
24364 (vqaddq_m_s16): Remove.
24365 (vqaddq_m_u8): Remove.
24366 (vqaddq_m_u32): Remove.
24367 (vqaddq_m_u16): Remove.
24368 (vqsubq_m_n_s8): Remove.
24369 (vqsubq_m_n_s32): Remove.
24370 (vqsubq_m_n_s16): Remove.
24371 (vqsubq_m_n_u8): Remove.
24372 (vqsubq_m_n_u32): Remove.
24373 (vqsubq_m_n_u16): Remove.
24374 (vqsubq_m_s8): Remove.
24375 (vqsubq_m_s32): Remove.
24376 (vqsubq_m_s16): Remove.
24377 (vqsubq_m_u8): Remove.
24378 (vqsubq_m_u32): Remove.
24379 (vqsubq_m_u16): Remove.
24380 (__arm_vqsubq_u8): Remove.
24381 (__arm_vqsubq_n_u8): Remove.
24382 (__arm_vqaddq_u8): Remove.
24383 (__arm_vqaddq_n_u8): Remove.
24384 (__arm_vqsubq_s8): Remove.
24385 (__arm_vqsubq_n_s8): Remove.
24386 (__arm_vqaddq_s8): Remove.
24387 (__arm_vqaddq_n_s8): Remove.
24388 (__arm_vqsubq_u16): Remove.
24389 (__arm_vqsubq_n_u16): Remove.
24390 (__arm_vqaddq_u16): Remove.
24391 (__arm_vqaddq_n_u16): Remove.
24392 (__arm_vqsubq_s16): Remove.
24393 (__arm_vqsubq_n_s16): Remove.
24394 (__arm_vqaddq_s16): Remove.
24395 (__arm_vqaddq_n_s16): Remove.
24396 (__arm_vqsubq_u32): Remove.
24397 (__arm_vqsubq_n_u32): Remove.
24398 (__arm_vqaddq_u32): Remove.
24399 (__arm_vqaddq_n_u32): Remove.
24400 (__arm_vqsubq_s32): Remove.
24401 (__arm_vqsubq_n_s32): Remove.
24402 (__arm_vqaddq_s32): Remove.
24403 (__arm_vqaddq_n_s32): Remove.
24404 (__arm_vqaddq_m_n_s8): Remove.
24405 (__arm_vqaddq_m_n_s32): Remove.
24406 (__arm_vqaddq_m_n_s16): Remove.
24407 (__arm_vqaddq_m_n_u8): Remove.
24408 (__arm_vqaddq_m_n_u32): Remove.
24409 (__arm_vqaddq_m_n_u16): Remove.
24410 (__arm_vqaddq_m_s8): Remove.
24411 (__arm_vqaddq_m_s32): Remove.
24412 (__arm_vqaddq_m_s16): Remove.
24413 (__arm_vqaddq_m_u8): Remove.
24414 (__arm_vqaddq_m_u32): Remove.
24415 (__arm_vqaddq_m_u16): Remove.
24416 (__arm_vqsubq_m_n_s8): Remove.
24417 (__arm_vqsubq_m_n_s32): Remove.
24418 (__arm_vqsubq_m_n_s16): Remove.
24419 (__arm_vqsubq_m_n_u8): Remove.
24420 (__arm_vqsubq_m_n_u32): Remove.
24421 (__arm_vqsubq_m_n_u16): Remove.
24422 (__arm_vqsubq_m_s8): Remove.
24423 (__arm_vqsubq_m_s32): Remove.
24424 (__arm_vqsubq_m_s16): Remove.
24425 (__arm_vqsubq_m_u8): Remove.
24426 (__arm_vqsubq_m_u32): Remove.
24427 (__arm_vqsubq_m_u16): Remove.
24428 (__arm_vqsubq): Remove.
24429 (__arm_vqaddq): Remove.
24430 (__arm_vqaddq_m): Remove.
24431 (__arm_vqsubq_m): Remove.
24432 (vqdmulhq): Remove.
24433 (vqdmulhq_m): Remove.
24434 (vqdmulhq_s8): Remove.
24435 (vqdmulhq_n_s8): Remove.
24436 (vqdmulhq_s16): Remove.
24437 (vqdmulhq_n_s16): Remove.
24438 (vqdmulhq_s32): Remove.
24439 (vqdmulhq_n_s32): Remove.
24440 (vqdmulhq_m_n_s8): Remove.
24441 (vqdmulhq_m_n_s32): Remove.
24442 (vqdmulhq_m_n_s16): Remove.
24443 (vqdmulhq_m_s8): Remove.
24444 (vqdmulhq_m_s32): Remove.
24445 (vqdmulhq_m_s16): Remove.
24446 (__arm_vqdmulhq_s8): Remove.
24447 (__arm_vqdmulhq_n_s8): Remove.
24448 (__arm_vqdmulhq_s16): Remove.
24449 (__arm_vqdmulhq_n_s16): Remove.
24450 (__arm_vqdmulhq_s32): Remove.
24451 (__arm_vqdmulhq_n_s32): Remove.
24452 (__arm_vqdmulhq_m_n_s8): Remove.
24453 (__arm_vqdmulhq_m_n_s32): Remove.
24454 (__arm_vqdmulhq_m_n_s16): Remove.
24455 (__arm_vqdmulhq_m_s8): Remove.
24456 (__arm_vqdmulhq_m_s32): Remove.
24457 (__arm_vqdmulhq_m_s16): Remove.
24458 (__arm_vqdmulhq): Remove.
24459 (__arm_vqdmulhq_m): Remove.
24461 (vrhaddq_m): Remove.
24462 (vrhaddq_x): Remove.
24463 (vrhaddq_u8): Remove.
24464 (vrhaddq_s8): Remove.
24465 (vrhaddq_u16): Remove.
24466 (vrhaddq_s16): Remove.
24467 (vrhaddq_u32): Remove.
24468 (vrhaddq_s32): Remove.
24469 (vrhaddq_m_s8): Remove.
24470 (vrhaddq_m_s32): Remove.
24471 (vrhaddq_m_s16): Remove.
24472 (vrhaddq_m_u8): Remove.
24473 (vrhaddq_m_u32): Remove.
24474 (vrhaddq_m_u16): Remove.
24475 (vrhaddq_x_s8): Remove.
24476 (vrhaddq_x_s16): Remove.
24477 (vrhaddq_x_s32): Remove.
24478 (vrhaddq_x_u8): Remove.
24479 (vrhaddq_x_u16): Remove.
24480 (vrhaddq_x_u32): Remove.
24481 (__arm_vrhaddq_u8): Remove.
24482 (__arm_vrhaddq_s8): Remove.
24483 (__arm_vrhaddq_u16): Remove.
24484 (__arm_vrhaddq_s16): Remove.
24485 (__arm_vrhaddq_u32): Remove.
24486 (__arm_vrhaddq_s32): Remove.
24487 (__arm_vrhaddq_m_s8): Remove.
24488 (__arm_vrhaddq_m_s32): Remove.
24489 (__arm_vrhaddq_m_s16): Remove.
24490 (__arm_vrhaddq_m_u8): Remove.
24491 (__arm_vrhaddq_m_u32): Remove.
24492 (__arm_vrhaddq_m_u16): Remove.
24493 (__arm_vrhaddq_x_s8): Remove.
24494 (__arm_vrhaddq_x_s16): Remove.
24495 (__arm_vrhaddq_x_s32): Remove.
24496 (__arm_vrhaddq_x_u8): Remove.
24497 (__arm_vrhaddq_x_u16): Remove.
24498 (__arm_vrhaddq_x_u32): Remove.
24499 (__arm_vrhaddq): Remove.
24500 (__arm_vrhaddq_m): Remove.
24501 (__arm_vrhaddq_x): Remove.
24503 (vrmulhq_m): Remove.
24504 (vrmulhq_x): Remove.
24505 (vrmulhq_u8): Remove.
24506 (vrmulhq_s8): Remove.
24507 (vrmulhq_u16): Remove.
24508 (vrmulhq_s16): Remove.
24509 (vrmulhq_u32): Remove.
24510 (vrmulhq_s32): Remove.
24511 (vrmulhq_m_s8): Remove.
24512 (vrmulhq_m_s32): Remove.
24513 (vrmulhq_m_s16): Remove.
24514 (vrmulhq_m_u8): Remove.
24515 (vrmulhq_m_u32): Remove.
24516 (vrmulhq_m_u16): Remove.
24517 (vrmulhq_x_s8): Remove.
24518 (vrmulhq_x_s16): Remove.
24519 (vrmulhq_x_s32): Remove.
24520 (vrmulhq_x_u8): Remove.
24521 (vrmulhq_x_u16): Remove.
24522 (vrmulhq_x_u32): Remove.
24523 (__arm_vrmulhq_u8): Remove.
24524 (__arm_vrmulhq_s8): Remove.
24525 (__arm_vrmulhq_u16): Remove.
24526 (__arm_vrmulhq_s16): Remove.
24527 (__arm_vrmulhq_u32): Remove.
24528 (__arm_vrmulhq_s32): Remove.
24529 (__arm_vrmulhq_m_s8): Remove.
24530 (__arm_vrmulhq_m_s32): Remove.
24531 (__arm_vrmulhq_m_s16): Remove.
24532 (__arm_vrmulhq_m_u8): Remove.
24533 (__arm_vrmulhq_m_u32): Remove.
24534 (__arm_vrmulhq_m_u16): Remove.
24535 (__arm_vrmulhq_x_s8): Remove.
24536 (__arm_vrmulhq_x_s16): Remove.
24537 (__arm_vrmulhq_x_s32): Remove.
24538 (__arm_vrmulhq_x_u8): Remove.
24539 (__arm_vrmulhq_x_u16): Remove.
24540 (__arm_vrmulhq_x_u32): Remove.
24541 (__arm_vrmulhq): Remove.
24542 (__arm_vrmulhq_m): Remove.
24543 (__arm_vrmulhq_x): Remove.
24545 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24547 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
24548 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
24549 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
24550 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
24551 * config/arm/mve.md (mve_vabdq_<supf><mode>)
24552 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
24553 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
24554 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
24555 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
24556 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
24557 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
24559 (@mve_<mve_insn>q_<supf><mode>): ... this.
24560 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
24561 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
24562 gen_mve_vhaddq / gen_mve_vrhaddq.
24564 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24566 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
24567 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
24568 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
24569 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
24570 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
24571 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
24572 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
24573 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
24574 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
24575 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
24576 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
24577 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
24578 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24580 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24582 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
24583 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
24585 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
24586 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
24587 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
24588 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
24589 (mve_vqsubq_n_<supf><mode>): Merge into ...
24590 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24592 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24594 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
24595 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
24596 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
24597 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
24598 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
24599 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
24600 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
24601 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
24602 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
24603 (mve_vshlq_m_<supf><mode>): Merged into
24604 @mve_<mve_insn>q_m_<supf><mode>.
24605 (mve_vabdq_m_<supf><mode>): Likewise.
24606 (mve_vhaddq_m_<supf><mode>): Likewise.
24607 (mve_vhsubq_m_<supf><mode>): Likewise.
24608 (mve_vmaxq_m_<supf><mode>): Likewise.
24609 (mve_vminq_m_<supf><mode>): Likewise.
24610 (mve_vmulhq_m_<supf><mode>): Likewise.
24611 (mve_vqaddq_m_<supf><mode>): Likewise.
24612 (mve_vqrshlq_m_<supf><mode>): Likewise.
24613 (mve_vqshlq_m_<supf><mode>): Likewise.
24614 (mve_vqsubq_m_<supf><mode>): Likewise.
24615 (mve_vrhaddq_m_<supf><mode>): Likewise.
24616 (mve_vrmulhq_m_<supf><mode>): Likewise.
24617 (mve_vrshlq_m_<supf><mode>): Likewise.
24618 (mve_vqdmladhq_m_s<mode>): Likewise.
24619 (mve_vqdmladhxq_m_s<mode>): Likewise.
24620 (mve_vqdmlsdhq_m_s<mode>): Likewise.
24621 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
24622 (mve_vqdmulhq_m_s<mode>): Likewise.
24623 (mve_vqrdmladhq_m_s<mode>): Likewise.
24624 (mve_vqrdmladhxq_m_s<mode>): Likewise.
24625 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
24626 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
24627 (mve_vqrdmulhq_m_s<mode>): Likewise.
24629 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24631 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
24632 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
24633 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
24634 * config/arm/arm_mve.h (vcreateq_f16): Remove.
24635 (vcreateq_f32): Remove.
24636 (vcreateq_u8): Remove.
24637 (vcreateq_u16): Remove.
24638 (vcreateq_u32): Remove.
24639 (vcreateq_u64): Remove.
24640 (vcreateq_s8): Remove.
24641 (vcreateq_s16): Remove.
24642 (vcreateq_s32): Remove.
24643 (vcreateq_s64): Remove.
24644 (__arm_vcreateq_u8): Remove.
24645 (__arm_vcreateq_u16): Remove.
24646 (__arm_vcreateq_u32): Remove.
24647 (__arm_vcreateq_u64): Remove.
24648 (__arm_vcreateq_s8): Remove.
24649 (__arm_vcreateq_s16): Remove.
24650 (__arm_vcreateq_s32): Remove.
24651 (__arm_vcreateq_s64): Remove.
24652 (__arm_vcreateq_f16): Remove.
24653 (__arm_vcreateq_f32): Remove.
24655 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24657 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
24658 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
24659 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
24660 (@mve_<mve_insn>q_f<mode>): ... this.
24661 (mve_vcreateq_<supf><mode>): Rename into ...
24662 (@mve_<mve_insn>q_<supf><mode>): ... this.
24664 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24666 * config/arm/arm-mve-builtins-shapes.cc (create): New.
24667 * config/arm/arm-mve-builtins-shapes.h: (create): New.
24669 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24671 * config/arm/arm-mve-builtins-functions.h (class
24672 unspec_mve_function_exact_insn): New.
24674 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24676 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
24678 * config/arm/arm-mve-builtins-base.def (vorrq): New.
24679 * config/arm/arm-mve-builtins-base.h (vorrq): New.
24680 * config/arm/arm-mve-builtins.cc
24681 (function_instance::has_inactive_argument): Handle vorrq.
24682 * config/arm/arm_mve.h (vorrq): Remove.
24683 (vorrq_m_n): Remove.
24686 (vorrq_u8): Remove.
24687 (vorrq_s8): Remove.
24688 (vorrq_u16): Remove.
24689 (vorrq_s16): Remove.
24690 (vorrq_u32): Remove.
24691 (vorrq_s32): Remove.
24692 (vorrq_n_u16): Remove.
24693 (vorrq_f16): Remove.
24694 (vorrq_n_s16): Remove.
24695 (vorrq_n_u32): Remove.
24696 (vorrq_f32): Remove.
24697 (vorrq_n_s32): Remove.
24698 (vorrq_m_n_s16): Remove.
24699 (vorrq_m_n_u16): Remove.
24700 (vorrq_m_n_s32): Remove.
24701 (vorrq_m_n_u32): Remove.
24702 (vorrq_m_s8): Remove.
24703 (vorrq_m_s32): Remove.
24704 (vorrq_m_s16): Remove.
24705 (vorrq_m_u8): Remove.
24706 (vorrq_m_u32): Remove.
24707 (vorrq_m_u16): Remove.
24708 (vorrq_m_f32): Remove.
24709 (vorrq_m_f16): Remove.
24710 (vorrq_x_s8): Remove.
24711 (vorrq_x_s16): Remove.
24712 (vorrq_x_s32): Remove.
24713 (vorrq_x_u8): Remove.
24714 (vorrq_x_u16): Remove.
24715 (vorrq_x_u32): Remove.
24716 (vorrq_x_f16): Remove.
24717 (vorrq_x_f32): Remove.
24718 (__arm_vorrq_u8): Remove.
24719 (__arm_vorrq_s8): Remove.
24720 (__arm_vorrq_u16): Remove.
24721 (__arm_vorrq_s16): Remove.
24722 (__arm_vorrq_u32): Remove.
24723 (__arm_vorrq_s32): Remove.
24724 (__arm_vorrq_n_u16): Remove.
24725 (__arm_vorrq_n_s16): Remove.
24726 (__arm_vorrq_n_u32): Remove.
24727 (__arm_vorrq_n_s32): Remove.
24728 (__arm_vorrq_m_n_s16): Remove.
24729 (__arm_vorrq_m_n_u16): Remove.
24730 (__arm_vorrq_m_n_s32): Remove.
24731 (__arm_vorrq_m_n_u32): Remove.
24732 (__arm_vorrq_m_s8): Remove.
24733 (__arm_vorrq_m_s32): Remove.
24734 (__arm_vorrq_m_s16): Remove.
24735 (__arm_vorrq_m_u8): Remove.
24736 (__arm_vorrq_m_u32): Remove.
24737 (__arm_vorrq_m_u16): Remove.
24738 (__arm_vorrq_x_s8): Remove.
24739 (__arm_vorrq_x_s16): Remove.
24740 (__arm_vorrq_x_s32): Remove.
24741 (__arm_vorrq_x_u8): Remove.
24742 (__arm_vorrq_x_u16): Remove.
24743 (__arm_vorrq_x_u32): Remove.
24744 (__arm_vorrq_f16): Remove.
24745 (__arm_vorrq_f32): Remove.
24746 (__arm_vorrq_m_f32): Remove.
24747 (__arm_vorrq_m_f16): Remove.
24748 (__arm_vorrq_x_f16): Remove.
24749 (__arm_vorrq_x_f32): Remove.
24750 (__arm_vorrq): Remove.
24751 (__arm_vorrq_m_n): Remove.
24752 (__arm_vorrq_m): Remove.
24753 (__arm_vorrq_x): Remove.
24755 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24757 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
24758 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
24759 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
24760 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
24762 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24764 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
24765 (vandq,veorq): New.
24766 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
24767 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
24768 * config/arm/arm_mve.h (vandq): Remove.
24771 (vandq_u8): Remove.
24772 (vandq_s8): Remove.
24773 (vandq_u16): Remove.
24774 (vandq_s16): Remove.
24775 (vandq_u32): Remove.
24776 (vandq_s32): Remove.
24777 (vandq_f16): Remove.
24778 (vandq_f32): Remove.
24779 (vandq_m_s8): Remove.
24780 (vandq_m_s32): Remove.
24781 (vandq_m_s16): Remove.
24782 (vandq_m_u8): Remove.
24783 (vandq_m_u32): Remove.
24784 (vandq_m_u16): Remove.
24785 (vandq_m_f32): Remove.
24786 (vandq_m_f16): Remove.
24787 (vandq_x_s8): Remove.
24788 (vandq_x_s16): Remove.
24789 (vandq_x_s32): Remove.
24790 (vandq_x_u8): Remove.
24791 (vandq_x_u16): Remove.
24792 (vandq_x_u32): Remove.
24793 (vandq_x_f16): Remove.
24794 (vandq_x_f32): Remove.
24795 (__arm_vandq_u8): Remove.
24796 (__arm_vandq_s8): Remove.
24797 (__arm_vandq_u16): Remove.
24798 (__arm_vandq_s16): Remove.
24799 (__arm_vandq_u32): Remove.
24800 (__arm_vandq_s32): Remove.
24801 (__arm_vandq_m_s8): Remove.
24802 (__arm_vandq_m_s32): Remove.
24803 (__arm_vandq_m_s16): Remove.
24804 (__arm_vandq_m_u8): Remove.
24805 (__arm_vandq_m_u32): Remove.
24806 (__arm_vandq_m_u16): Remove.
24807 (__arm_vandq_x_s8): Remove.
24808 (__arm_vandq_x_s16): Remove.
24809 (__arm_vandq_x_s32): Remove.
24810 (__arm_vandq_x_u8): Remove.
24811 (__arm_vandq_x_u16): Remove.
24812 (__arm_vandq_x_u32): Remove.
24813 (__arm_vandq_f16): Remove.
24814 (__arm_vandq_f32): Remove.
24815 (__arm_vandq_m_f32): Remove.
24816 (__arm_vandq_m_f16): Remove.
24817 (__arm_vandq_x_f16): Remove.
24818 (__arm_vandq_x_f32): Remove.
24819 (__arm_vandq): Remove.
24820 (__arm_vandq_m): Remove.
24821 (__arm_vandq_x): Remove.
24824 (veorq_u8): Remove.
24825 (veorq_s8): Remove.
24826 (veorq_u16): Remove.
24827 (veorq_s16): Remove.
24828 (veorq_u32): Remove.
24829 (veorq_s32): Remove.
24830 (veorq_f16): Remove.
24831 (veorq_f32): Remove.
24832 (veorq_m_s8): Remove.
24833 (veorq_m_s32): Remove.
24834 (veorq_m_s16): Remove.
24835 (veorq_m_u8): Remove.
24836 (veorq_m_u32): Remove.
24837 (veorq_m_u16): Remove.
24838 (veorq_m_f32): Remove.
24839 (veorq_m_f16): Remove.
24840 (veorq_x_s8): Remove.
24841 (veorq_x_s16): Remove.
24842 (veorq_x_s32): Remove.
24843 (veorq_x_u8): Remove.
24844 (veorq_x_u16): Remove.
24845 (veorq_x_u32): Remove.
24846 (veorq_x_f16): Remove.
24847 (veorq_x_f32): Remove.
24848 (__arm_veorq_u8): Remove.
24849 (__arm_veorq_s8): Remove.
24850 (__arm_veorq_u16): Remove.
24851 (__arm_veorq_s16): Remove.
24852 (__arm_veorq_u32): Remove.
24853 (__arm_veorq_s32): Remove.
24854 (__arm_veorq_m_s8): Remove.
24855 (__arm_veorq_m_s32): Remove.
24856 (__arm_veorq_m_s16): Remove.
24857 (__arm_veorq_m_u8): Remove.
24858 (__arm_veorq_m_u32): Remove.
24859 (__arm_veorq_m_u16): Remove.
24860 (__arm_veorq_x_s8): Remove.
24861 (__arm_veorq_x_s16): Remove.
24862 (__arm_veorq_x_s32): Remove.
24863 (__arm_veorq_x_u8): Remove.
24864 (__arm_veorq_x_u16): Remove.
24865 (__arm_veorq_x_u32): Remove.
24866 (__arm_veorq_f16): Remove.
24867 (__arm_veorq_f32): Remove.
24868 (__arm_veorq_m_f32): Remove.
24869 (__arm_veorq_m_f16): Remove.
24870 (__arm_veorq_x_f16): Remove.
24871 (__arm_veorq_x_f32): Remove.
24872 (__arm_veorq): Remove.
24873 (__arm_veorq_m): Remove.
24874 (__arm_veorq_x): Remove.
24876 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24878 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
24879 (MVE_FP_M_BINARY_LOGIC): New.
24880 (MVE_INT_M_N_BINARY_LOGIC): New.
24881 (MVE_INT_N_BINARY_LOGIC): New.
24882 (mve_insn): Add vand, veor, vorr, vbic.
24883 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
24884 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
24885 (mve_vbicq_m_<supf><mode>): Merge into ...
24886 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
24887 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
24888 (mve_vbicq_m_f<mode>): Merge into ...
24889 (@mve_<mve_insn>q_m_f<mode>): ... this.
24890 (mve_vorrq_n_<supf><mode>)
24891 (mve_vbicq_n_<supf><mode>): Merge into ...
24892 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24893 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
24895 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24897 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24899 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
24900 * config/arm/arm-mve-builtins-shapes.h (binary): New.
24902 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24904 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
24906 (vaddq, vmulq, vsubq): New.
24907 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
24908 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
24909 * config/arm/arm_mve.h (vaddq): Remove.
24912 (vaddq_n_u8): Remove.
24913 (vaddq_n_s8): Remove.
24914 (vaddq_n_u16): Remove.
24915 (vaddq_n_s16): Remove.
24916 (vaddq_n_u32): Remove.
24917 (vaddq_n_s32): Remove.
24918 (vaddq_n_f16): Remove.
24919 (vaddq_n_f32): Remove.
24920 (vaddq_m_n_s8): Remove.
24921 (vaddq_m_n_s32): Remove.
24922 (vaddq_m_n_s16): Remove.
24923 (vaddq_m_n_u8): Remove.
24924 (vaddq_m_n_u32): Remove.
24925 (vaddq_m_n_u16): Remove.
24926 (vaddq_m_s8): Remove.
24927 (vaddq_m_s32): Remove.
24928 (vaddq_m_s16): Remove.
24929 (vaddq_m_u8): Remove.
24930 (vaddq_m_u32): Remove.
24931 (vaddq_m_u16): Remove.
24932 (vaddq_m_f32): Remove.
24933 (vaddq_m_f16): Remove.
24934 (vaddq_m_n_f32): Remove.
24935 (vaddq_m_n_f16): Remove.
24936 (vaddq_s8): Remove.
24937 (vaddq_s16): Remove.
24938 (vaddq_s32): Remove.
24939 (vaddq_u8): Remove.
24940 (vaddq_u16): Remove.
24941 (vaddq_u32): Remove.
24942 (vaddq_f16): Remove.
24943 (vaddq_f32): Remove.
24944 (vaddq_x_s8): Remove.
24945 (vaddq_x_s16): Remove.
24946 (vaddq_x_s32): Remove.
24947 (vaddq_x_n_s8): Remove.
24948 (vaddq_x_n_s16): Remove.
24949 (vaddq_x_n_s32): Remove.
24950 (vaddq_x_u8): Remove.
24951 (vaddq_x_u16): Remove.
24952 (vaddq_x_u32): Remove.
24953 (vaddq_x_n_u8): Remove.
24954 (vaddq_x_n_u16): Remove.
24955 (vaddq_x_n_u32): Remove.
24956 (vaddq_x_f16): Remove.
24957 (vaddq_x_f32): Remove.
24958 (vaddq_x_n_f16): Remove.
24959 (vaddq_x_n_f32): Remove.
24960 (__arm_vaddq_n_u8): Remove.
24961 (__arm_vaddq_n_s8): Remove.
24962 (__arm_vaddq_n_u16): Remove.
24963 (__arm_vaddq_n_s16): Remove.
24964 (__arm_vaddq_n_u32): Remove.
24965 (__arm_vaddq_n_s32): Remove.
24966 (__arm_vaddq_m_n_s8): Remove.
24967 (__arm_vaddq_m_n_s32): Remove.
24968 (__arm_vaddq_m_n_s16): Remove.
24969 (__arm_vaddq_m_n_u8): Remove.
24970 (__arm_vaddq_m_n_u32): Remove.
24971 (__arm_vaddq_m_n_u16): Remove.
24972 (__arm_vaddq_m_s8): Remove.
24973 (__arm_vaddq_m_s32): Remove.
24974 (__arm_vaddq_m_s16): Remove.
24975 (__arm_vaddq_m_u8): Remove.
24976 (__arm_vaddq_m_u32): Remove.
24977 (__arm_vaddq_m_u16): Remove.
24978 (__arm_vaddq_s8): Remove.
24979 (__arm_vaddq_s16): Remove.
24980 (__arm_vaddq_s32): Remove.
24981 (__arm_vaddq_u8): Remove.
24982 (__arm_vaddq_u16): Remove.
24983 (__arm_vaddq_u32): Remove.
24984 (__arm_vaddq_x_s8): Remove.
24985 (__arm_vaddq_x_s16): Remove.
24986 (__arm_vaddq_x_s32): Remove.
24987 (__arm_vaddq_x_n_s8): Remove.
24988 (__arm_vaddq_x_n_s16): Remove.
24989 (__arm_vaddq_x_n_s32): Remove.
24990 (__arm_vaddq_x_u8): Remove.
24991 (__arm_vaddq_x_u16): Remove.
24992 (__arm_vaddq_x_u32): Remove.
24993 (__arm_vaddq_x_n_u8): Remove.
24994 (__arm_vaddq_x_n_u16): Remove.
24995 (__arm_vaddq_x_n_u32): Remove.
24996 (__arm_vaddq_n_f16): Remove.
24997 (__arm_vaddq_n_f32): Remove.
24998 (__arm_vaddq_m_f32): Remove.
24999 (__arm_vaddq_m_f16): Remove.
25000 (__arm_vaddq_m_n_f32): Remove.
25001 (__arm_vaddq_m_n_f16): Remove.
25002 (__arm_vaddq_f16): Remove.
25003 (__arm_vaddq_f32): Remove.
25004 (__arm_vaddq_x_f16): Remove.
25005 (__arm_vaddq_x_f32): Remove.
25006 (__arm_vaddq_x_n_f16): Remove.
25007 (__arm_vaddq_x_n_f32): Remove.
25008 (__arm_vaddq): Remove.
25009 (__arm_vaddq_m): Remove.
25010 (__arm_vaddq_x): Remove.
25014 (vmulq_u8): Remove.
25015 (vmulq_n_u8): Remove.
25016 (vmulq_s8): Remove.
25017 (vmulq_n_s8): Remove.
25018 (vmulq_u16): Remove.
25019 (vmulq_n_u16): Remove.
25020 (vmulq_s16): Remove.
25021 (vmulq_n_s16): Remove.
25022 (vmulq_u32): Remove.
25023 (vmulq_n_u32): Remove.
25024 (vmulq_s32): Remove.
25025 (vmulq_n_s32): Remove.
25026 (vmulq_n_f16): Remove.
25027 (vmulq_f16): Remove.
25028 (vmulq_n_f32): Remove.
25029 (vmulq_f32): Remove.
25030 (vmulq_m_n_s8): Remove.
25031 (vmulq_m_n_s32): Remove.
25032 (vmulq_m_n_s16): Remove.
25033 (vmulq_m_n_u8): Remove.
25034 (vmulq_m_n_u32): Remove.
25035 (vmulq_m_n_u16): Remove.
25036 (vmulq_m_s8): Remove.
25037 (vmulq_m_s32): Remove.
25038 (vmulq_m_s16): Remove.
25039 (vmulq_m_u8): Remove.
25040 (vmulq_m_u32): Remove.
25041 (vmulq_m_u16): Remove.
25042 (vmulq_m_f32): Remove.
25043 (vmulq_m_f16): Remove.
25044 (vmulq_m_n_f32): Remove.
25045 (vmulq_m_n_f16): Remove.
25046 (vmulq_x_s8): Remove.
25047 (vmulq_x_s16): Remove.
25048 (vmulq_x_s32): Remove.
25049 (vmulq_x_n_s8): Remove.
25050 (vmulq_x_n_s16): Remove.
25051 (vmulq_x_n_s32): Remove.
25052 (vmulq_x_u8): Remove.
25053 (vmulq_x_u16): Remove.
25054 (vmulq_x_u32): Remove.
25055 (vmulq_x_n_u8): Remove.
25056 (vmulq_x_n_u16): Remove.
25057 (vmulq_x_n_u32): Remove.
25058 (vmulq_x_f16): Remove.
25059 (vmulq_x_f32): Remove.
25060 (vmulq_x_n_f16): Remove.
25061 (vmulq_x_n_f32): Remove.
25062 (__arm_vmulq_u8): Remove.
25063 (__arm_vmulq_n_u8): Remove.
25064 (__arm_vmulq_s8): Remove.
25065 (__arm_vmulq_n_s8): Remove.
25066 (__arm_vmulq_u16): Remove.
25067 (__arm_vmulq_n_u16): Remove.
25068 (__arm_vmulq_s16): Remove.
25069 (__arm_vmulq_n_s16): Remove.
25070 (__arm_vmulq_u32): Remove.
25071 (__arm_vmulq_n_u32): Remove.
25072 (__arm_vmulq_s32): Remove.
25073 (__arm_vmulq_n_s32): Remove.
25074 (__arm_vmulq_m_n_s8): Remove.
25075 (__arm_vmulq_m_n_s32): Remove.
25076 (__arm_vmulq_m_n_s16): Remove.
25077 (__arm_vmulq_m_n_u8): Remove.
25078 (__arm_vmulq_m_n_u32): Remove.
25079 (__arm_vmulq_m_n_u16): Remove.
25080 (__arm_vmulq_m_s8): Remove.
25081 (__arm_vmulq_m_s32): Remove.
25082 (__arm_vmulq_m_s16): Remove.
25083 (__arm_vmulq_m_u8): Remove.
25084 (__arm_vmulq_m_u32): Remove.
25085 (__arm_vmulq_m_u16): Remove.
25086 (__arm_vmulq_x_s8): Remove.
25087 (__arm_vmulq_x_s16): Remove.
25088 (__arm_vmulq_x_s32): Remove.
25089 (__arm_vmulq_x_n_s8): Remove.
25090 (__arm_vmulq_x_n_s16): Remove.
25091 (__arm_vmulq_x_n_s32): Remove.
25092 (__arm_vmulq_x_u8): Remove.
25093 (__arm_vmulq_x_u16): Remove.
25094 (__arm_vmulq_x_u32): Remove.
25095 (__arm_vmulq_x_n_u8): Remove.
25096 (__arm_vmulq_x_n_u16): Remove.
25097 (__arm_vmulq_x_n_u32): Remove.
25098 (__arm_vmulq_n_f16): Remove.
25099 (__arm_vmulq_f16): Remove.
25100 (__arm_vmulq_n_f32): Remove.
25101 (__arm_vmulq_f32): Remove.
25102 (__arm_vmulq_m_f32): Remove.
25103 (__arm_vmulq_m_f16): Remove.
25104 (__arm_vmulq_m_n_f32): Remove.
25105 (__arm_vmulq_m_n_f16): Remove.
25106 (__arm_vmulq_x_f16): Remove.
25107 (__arm_vmulq_x_f32): Remove.
25108 (__arm_vmulq_x_n_f16): Remove.
25109 (__arm_vmulq_x_n_f32): Remove.
25110 (__arm_vmulq): Remove.
25111 (__arm_vmulq_m): Remove.
25112 (__arm_vmulq_x): Remove.
25116 (vsubq_n_f16): Remove.
25117 (vsubq_n_f32): Remove.
25118 (vsubq_u8): Remove.
25119 (vsubq_n_u8): Remove.
25120 (vsubq_s8): Remove.
25121 (vsubq_n_s8): Remove.
25122 (vsubq_u16): Remove.
25123 (vsubq_n_u16): Remove.
25124 (vsubq_s16): Remove.
25125 (vsubq_n_s16): Remove.
25126 (vsubq_u32): Remove.
25127 (vsubq_n_u32): Remove.
25128 (vsubq_s32): Remove.
25129 (vsubq_n_s32): Remove.
25130 (vsubq_f16): Remove.
25131 (vsubq_f32): Remove.
25132 (vsubq_m_s8): Remove.
25133 (vsubq_m_u8): Remove.
25134 (vsubq_m_s16): Remove.
25135 (vsubq_m_u16): Remove.
25136 (vsubq_m_s32): Remove.
25137 (vsubq_m_u32): Remove.
25138 (vsubq_m_n_s8): Remove.
25139 (vsubq_m_n_s32): Remove.
25140 (vsubq_m_n_s16): Remove.
25141 (vsubq_m_n_u8): Remove.
25142 (vsubq_m_n_u32): Remove.
25143 (vsubq_m_n_u16): Remove.
25144 (vsubq_m_f32): Remove.
25145 (vsubq_m_f16): Remove.
25146 (vsubq_m_n_f32): Remove.
25147 (vsubq_m_n_f16): Remove.
25148 (vsubq_x_s8): Remove.
25149 (vsubq_x_s16): Remove.
25150 (vsubq_x_s32): Remove.
25151 (vsubq_x_n_s8): Remove.
25152 (vsubq_x_n_s16): Remove.
25153 (vsubq_x_n_s32): Remove.
25154 (vsubq_x_u8): Remove.
25155 (vsubq_x_u16): Remove.
25156 (vsubq_x_u32): Remove.
25157 (vsubq_x_n_u8): Remove.
25158 (vsubq_x_n_u16): Remove.
25159 (vsubq_x_n_u32): Remove.
25160 (vsubq_x_f16): Remove.
25161 (vsubq_x_f32): Remove.
25162 (vsubq_x_n_f16): Remove.
25163 (vsubq_x_n_f32): Remove.
25164 (__arm_vsubq_u8): Remove.
25165 (__arm_vsubq_n_u8): Remove.
25166 (__arm_vsubq_s8): Remove.
25167 (__arm_vsubq_n_s8): Remove.
25168 (__arm_vsubq_u16): Remove.
25169 (__arm_vsubq_n_u16): Remove.
25170 (__arm_vsubq_s16): Remove.
25171 (__arm_vsubq_n_s16): Remove.
25172 (__arm_vsubq_u32): Remove.
25173 (__arm_vsubq_n_u32): Remove.
25174 (__arm_vsubq_s32): Remove.
25175 (__arm_vsubq_n_s32): Remove.
25176 (__arm_vsubq_m_s8): Remove.
25177 (__arm_vsubq_m_u8): Remove.
25178 (__arm_vsubq_m_s16): Remove.
25179 (__arm_vsubq_m_u16): Remove.
25180 (__arm_vsubq_m_s32): Remove.
25181 (__arm_vsubq_m_u32): Remove.
25182 (__arm_vsubq_m_n_s8): Remove.
25183 (__arm_vsubq_m_n_s32): Remove.
25184 (__arm_vsubq_m_n_s16): Remove.
25185 (__arm_vsubq_m_n_u8): Remove.
25186 (__arm_vsubq_m_n_u32): Remove.
25187 (__arm_vsubq_m_n_u16): Remove.
25188 (__arm_vsubq_x_s8): Remove.
25189 (__arm_vsubq_x_s16): Remove.
25190 (__arm_vsubq_x_s32): Remove.
25191 (__arm_vsubq_x_n_s8): Remove.
25192 (__arm_vsubq_x_n_s16): Remove.
25193 (__arm_vsubq_x_n_s32): Remove.
25194 (__arm_vsubq_x_u8): Remove.
25195 (__arm_vsubq_x_u16): Remove.
25196 (__arm_vsubq_x_u32): Remove.
25197 (__arm_vsubq_x_n_u8): Remove.
25198 (__arm_vsubq_x_n_u16): Remove.
25199 (__arm_vsubq_x_n_u32): Remove.
25200 (__arm_vsubq_n_f16): Remove.
25201 (__arm_vsubq_n_f32): Remove.
25202 (__arm_vsubq_f16): Remove.
25203 (__arm_vsubq_f32): Remove.
25204 (__arm_vsubq_m_f32): Remove.
25205 (__arm_vsubq_m_f16): Remove.
25206 (__arm_vsubq_m_n_f32): Remove.
25207 (__arm_vsubq_m_n_f16): Remove.
25208 (__arm_vsubq_x_f16): Remove.
25209 (__arm_vsubq_x_f32): Remove.
25210 (__arm_vsubq_x_n_f16): Remove.
25211 (__arm_vsubq_x_n_f32): Remove.
25212 (__arm_vsubq): Remove.
25213 (__arm_vsubq_m): Remove.
25214 (__arm_vsubq_x): Remove.
25215 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
25217 (vmulq_u, vmulq_s, vmulq_f): Remove.
25218 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
25219 (mve_vmulq_<supf><mode>): Remove.
25221 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25223 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
25224 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
25225 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
25227 * config/arm/mve.md
25228 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
25230 (@mve_<mve_insn>q_n_f<mode>): ... this.
25231 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
25232 (mve_vsubq_n_<supf><mode>): Factorize into ...
25233 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25234 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
25236 (mve_<mve_addsubmul>q<mode>): ... this.
25237 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
25239 (mve_<mve_addsubmul>q_f<mode>): ... this.
25240 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
25241 (mve_vsubq_m_<supf><mode>): Factorize into ...
25242 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
25243 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
25244 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
25245 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25246 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
25248 (@mve_<mve_insn>q_m_f<mode>): ... this.
25249 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
25250 (mve_vsubq_m_n_f<mode>): Factorize into ...
25251 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
25253 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25255 * config/arm/arm-mve-builtins-functions.h (class
25256 unspec_based_mve_function_base): New.
25257 (class unspec_based_mve_function_exact_insn): New.
25259 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25261 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
25262 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
25264 2023-05-03 Murray Steele <murray.steele@arm.com>
25265 Christophe Lyon <christophe.lyon@arm.com>
25267 * config/arm/arm-mve-builtins-base.cc (class
25268 vuninitializedq_impl): New.
25269 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
25270 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
25272 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
25273 * config/arm/arm-mve-builtins-shapes.h (inherent): New
25275 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
25276 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
25277 (__arm_vuninitializedq_u8): Remove.
25278 (__arm_vuninitializedq_u16): Remove.
25279 (__arm_vuninitializedq_u32): Remove.
25280 (__arm_vuninitializedq_u64): Remove.
25281 (__arm_vuninitializedq_s8): Remove.
25282 (__arm_vuninitializedq_s16): Remove.
25283 (__arm_vuninitializedq_s32): Remove.
25284 (__arm_vuninitializedq_s64): Remove.
25285 (__arm_vuninitializedq_f16): Remove.
25286 (__arm_vuninitializedq_f32): Remove.
25288 2023-05-03 Murray Steele <murray.steele@arm.com>
25289 Christophe Lyon <christophe.lyon@arm.com>
25291 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
25292 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
25293 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
25294 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
25295 (parse_type): Likewise.
25296 (parse_signature): Likewise.
25297 (build_one): Likewise.
25298 (build_all): Likewise.
25299 (overloaded_base): New struct.
25300 (unary_convert_def): Likewise.
25301 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
25302 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
25304 (TYPES_reinterpret_unsigned1): Likewise.
25305 (TYPES_reinterpret_integer): Likewise.
25306 (TYPES_reinterpret_integer1): Likewise.
25307 (TYPES_reinterpret_float1): Likewise.
25308 (TYPES_reinterpret_float): Likewise.
25309 (reinterpret_integer): New.
25310 (reinterpret_float): New.
25311 (handle_arm_mve_h): Register builtins.
25312 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
25313 (vreinterpretq_s32): Likewise.
25314 (vreinterpretq_s64): Likewise.
25315 (vreinterpretq_s8): Likewise.
25316 (vreinterpretq_u16): Likewise.
25317 (vreinterpretq_u32): Likewise.
25318 (vreinterpretq_u64): Likewise.
25319 (vreinterpretq_u8): Likewise.
25320 (vreinterpretq_f16): Likewise.
25321 (vreinterpretq_f32): Likewise.
25322 (vreinterpretq_s16_s32): Likewise.
25323 (vreinterpretq_s16_s64): Likewise.
25324 (vreinterpretq_s16_s8): Likewise.
25325 (vreinterpretq_s16_u16): Likewise.
25326 (vreinterpretq_s16_u32): Likewise.
25327 (vreinterpretq_s16_u64): Likewise.
25328 (vreinterpretq_s16_u8): Likewise.
25329 (vreinterpretq_s32_s16): Likewise.
25330 (vreinterpretq_s32_s64): Likewise.
25331 (vreinterpretq_s32_s8): Likewise.
25332 (vreinterpretq_s32_u16): Likewise.
25333 (vreinterpretq_s32_u32): Likewise.
25334 (vreinterpretq_s32_u64): Likewise.
25335 (vreinterpretq_s32_u8): Likewise.
25336 (vreinterpretq_s64_s16): Likewise.
25337 (vreinterpretq_s64_s32): Likewise.
25338 (vreinterpretq_s64_s8): Likewise.
25339 (vreinterpretq_s64_u16): Likewise.
25340 (vreinterpretq_s64_u32): Likewise.
25341 (vreinterpretq_s64_u64): Likewise.
25342 (vreinterpretq_s64_u8): Likewise.
25343 (vreinterpretq_s8_s16): Likewise.
25344 (vreinterpretq_s8_s32): Likewise.
25345 (vreinterpretq_s8_s64): Likewise.
25346 (vreinterpretq_s8_u16): Likewise.
25347 (vreinterpretq_s8_u32): Likewise.
25348 (vreinterpretq_s8_u64): Likewise.
25349 (vreinterpretq_s8_u8): Likewise.
25350 (vreinterpretq_u16_s16): Likewise.
25351 (vreinterpretq_u16_s32): Likewise.
25352 (vreinterpretq_u16_s64): Likewise.
25353 (vreinterpretq_u16_s8): Likewise.
25354 (vreinterpretq_u16_u32): Likewise.
25355 (vreinterpretq_u16_u64): Likewise.
25356 (vreinterpretq_u16_u8): Likewise.
25357 (vreinterpretq_u32_s16): Likewise.
25358 (vreinterpretq_u32_s32): Likewise.
25359 (vreinterpretq_u32_s64): Likewise.
25360 (vreinterpretq_u32_s8): Likewise.
25361 (vreinterpretq_u32_u16): Likewise.
25362 (vreinterpretq_u32_u64): Likewise.
25363 (vreinterpretq_u32_u8): Likewise.
25364 (vreinterpretq_u64_s16): Likewise.
25365 (vreinterpretq_u64_s32): Likewise.
25366 (vreinterpretq_u64_s64): Likewise.
25367 (vreinterpretq_u64_s8): Likewise.
25368 (vreinterpretq_u64_u16): Likewise.
25369 (vreinterpretq_u64_u32): Likewise.
25370 (vreinterpretq_u64_u8): Likewise.
25371 (vreinterpretq_u8_s16): Likewise.
25372 (vreinterpretq_u8_s32): Likewise.
25373 (vreinterpretq_u8_s64): Likewise.
25374 (vreinterpretq_u8_s8): Likewise.
25375 (vreinterpretq_u8_u16): Likewise.
25376 (vreinterpretq_u8_u32): Likewise.
25377 (vreinterpretq_u8_u64): Likewise.
25378 (vreinterpretq_s32_f16): Likewise.
25379 (vreinterpretq_s32_f32): Likewise.
25380 (vreinterpretq_u16_f16): Likewise.
25381 (vreinterpretq_u16_f32): Likewise.
25382 (vreinterpretq_u32_f16): Likewise.
25383 (vreinterpretq_u32_f32): Likewise.
25384 (vreinterpretq_u64_f16): Likewise.
25385 (vreinterpretq_u64_f32): Likewise.
25386 (vreinterpretq_u8_f16): Likewise.
25387 (vreinterpretq_u8_f32): Likewise.
25388 (vreinterpretq_f16_f32): Likewise.
25389 (vreinterpretq_f16_s16): Likewise.
25390 (vreinterpretq_f16_s32): Likewise.
25391 (vreinterpretq_f16_s64): Likewise.
25392 (vreinterpretq_f16_s8): Likewise.
25393 (vreinterpretq_f16_u16): Likewise.
25394 (vreinterpretq_f16_u32): Likewise.
25395 (vreinterpretq_f16_u64): Likewise.
25396 (vreinterpretq_f16_u8): Likewise.
25397 (vreinterpretq_f32_f16): Likewise.
25398 (vreinterpretq_f32_s16): Likewise.
25399 (vreinterpretq_f32_s32): Likewise.
25400 (vreinterpretq_f32_s64): Likewise.
25401 (vreinterpretq_f32_s8): Likewise.
25402 (vreinterpretq_f32_u16): Likewise.
25403 (vreinterpretq_f32_u32): Likewise.
25404 (vreinterpretq_f32_u64): Likewise.
25405 (vreinterpretq_f32_u8): Likewise.
25406 (vreinterpretq_s16_f16): Likewise.
25407 (vreinterpretq_s16_f32): Likewise.
25408 (vreinterpretq_s64_f16): Likewise.
25409 (vreinterpretq_s64_f32): Likewise.
25410 (vreinterpretq_s8_f16): Likewise.
25411 (vreinterpretq_s8_f32): Likewise.
25412 (__arm_vreinterpretq_f16): Likewise.
25413 (__arm_vreinterpretq_f32): Likewise.
25414 (__arm_vreinterpretq_s16): Likewise.
25415 (__arm_vreinterpretq_s32): Likewise.
25416 (__arm_vreinterpretq_s64): Likewise.
25417 (__arm_vreinterpretq_s8): Likewise.
25418 (__arm_vreinterpretq_u16): Likewise.
25419 (__arm_vreinterpretq_u32): Likewise.
25420 (__arm_vreinterpretq_u64): Likewise.
25421 (__arm_vreinterpretq_u8): Likewise.
25422 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
25423 (__arm_vreinterpretq_s16_s64): Likewise.
25424 (__arm_vreinterpretq_s16_s8): Likewise.
25425 (__arm_vreinterpretq_s16_u16): Likewise.
25426 (__arm_vreinterpretq_s16_u32): Likewise.
25427 (__arm_vreinterpretq_s16_u64): Likewise.
25428 (__arm_vreinterpretq_s16_u8): Likewise.
25429 (__arm_vreinterpretq_s32_s16): Likewise.
25430 (__arm_vreinterpretq_s32_s64): Likewise.
25431 (__arm_vreinterpretq_s32_s8): Likewise.
25432 (__arm_vreinterpretq_s32_u16): Likewise.
25433 (__arm_vreinterpretq_s32_u32): Likewise.
25434 (__arm_vreinterpretq_s32_u64): Likewise.
25435 (__arm_vreinterpretq_s32_u8): Likewise.
25436 (__arm_vreinterpretq_s64_s16): Likewise.
25437 (__arm_vreinterpretq_s64_s32): Likewise.
25438 (__arm_vreinterpretq_s64_s8): Likewise.
25439 (__arm_vreinterpretq_s64_u16): Likewise.
25440 (__arm_vreinterpretq_s64_u32): Likewise.
25441 (__arm_vreinterpretq_s64_u64): Likewise.
25442 (__arm_vreinterpretq_s64_u8): Likewise.
25443 (__arm_vreinterpretq_s8_s16): Likewise.
25444 (__arm_vreinterpretq_s8_s32): Likewise.
25445 (__arm_vreinterpretq_s8_s64): Likewise.
25446 (__arm_vreinterpretq_s8_u16): Likewise.
25447 (__arm_vreinterpretq_s8_u32): Likewise.
25448 (__arm_vreinterpretq_s8_u64): Likewise.
25449 (__arm_vreinterpretq_s8_u8): Likewise.
25450 (__arm_vreinterpretq_u16_s16): Likewise.
25451 (__arm_vreinterpretq_u16_s32): Likewise.
25452 (__arm_vreinterpretq_u16_s64): Likewise.
25453 (__arm_vreinterpretq_u16_s8): Likewise.
25454 (__arm_vreinterpretq_u16_u32): Likewise.
25455 (__arm_vreinterpretq_u16_u64): Likewise.
25456 (__arm_vreinterpretq_u16_u8): Likewise.
25457 (__arm_vreinterpretq_u32_s16): Likewise.
25458 (__arm_vreinterpretq_u32_s32): Likewise.
25459 (__arm_vreinterpretq_u32_s64): Likewise.
25460 (__arm_vreinterpretq_u32_s8): Likewise.
25461 (__arm_vreinterpretq_u32_u16): Likewise.
25462 (__arm_vreinterpretq_u32_u64): Likewise.
25463 (__arm_vreinterpretq_u32_u8): Likewise.
25464 (__arm_vreinterpretq_u64_s16): Likewise.
25465 (__arm_vreinterpretq_u64_s32): Likewise.
25466 (__arm_vreinterpretq_u64_s64): Likewise.
25467 (__arm_vreinterpretq_u64_s8): Likewise.
25468 (__arm_vreinterpretq_u64_u16): Likewise.
25469 (__arm_vreinterpretq_u64_u32): Likewise.
25470 (__arm_vreinterpretq_u64_u8): Likewise.
25471 (__arm_vreinterpretq_u8_s16): Likewise.
25472 (__arm_vreinterpretq_u8_s32): Likewise.
25473 (__arm_vreinterpretq_u8_s64): Likewise.
25474 (__arm_vreinterpretq_u8_s8): Likewise.
25475 (__arm_vreinterpretq_u8_u16): Likewise.
25476 (__arm_vreinterpretq_u8_u32): Likewise.
25477 (__arm_vreinterpretq_u8_u64): Likewise.
25478 (__arm_vreinterpretq_s32_f16): Likewise.
25479 (__arm_vreinterpretq_s32_f32): Likewise.
25480 (__arm_vreinterpretq_s16_f16): Likewise.
25481 (__arm_vreinterpretq_s16_f32): Likewise.
25482 (__arm_vreinterpretq_s64_f16): Likewise.
25483 (__arm_vreinterpretq_s64_f32): Likewise.
25484 (__arm_vreinterpretq_s8_f16): Likewise.
25485 (__arm_vreinterpretq_s8_f32): Likewise.
25486 (__arm_vreinterpretq_u16_f16): Likewise.
25487 (__arm_vreinterpretq_u16_f32): Likewise.
25488 (__arm_vreinterpretq_u32_f16): Likewise.
25489 (__arm_vreinterpretq_u32_f32): Likewise.
25490 (__arm_vreinterpretq_u64_f16): Likewise.
25491 (__arm_vreinterpretq_u64_f32): Likewise.
25492 (__arm_vreinterpretq_u8_f16): Likewise.
25493 (__arm_vreinterpretq_u8_f32): Likewise.
25494 (__arm_vreinterpretq_f16_f32): Likewise.
25495 (__arm_vreinterpretq_f16_s16): Likewise.
25496 (__arm_vreinterpretq_f16_s32): Likewise.
25497 (__arm_vreinterpretq_f16_s64): Likewise.
25498 (__arm_vreinterpretq_f16_s8): Likewise.
25499 (__arm_vreinterpretq_f16_u16): Likewise.
25500 (__arm_vreinterpretq_f16_u32): Likewise.
25501 (__arm_vreinterpretq_f16_u64): Likewise.
25502 (__arm_vreinterpretq_f16_u8): Likewise.
25503 (__arm_vreinterpretq_f32_f16): Likewise.
25504 (__arm_vreinterpretq_f32_s16): Likewise.
25505 (__arm_vreinterpretq_f32_s32): Likewise.
25506 (__arm_vreinterpretq_f32_s64): Likewise.
25507 (__arm_vreinterpretq_f32_s8): Likewise.
25508 (__arm_vreinterpretq_f32_u16): Likewise.
25509 (__arm_vreinterpretq_f32_u32): Likewise.
25510 (__arm_vreinterpretq_f32_u64): Likewise.
25511 (__arm_vreinterpretq_f32_u8): Likewise.
25512 (__arm_vreinterpretq_s16): Likewise.
25513 (__arm_vreinterpretq_s32): Likewise.
25514 (__arm_vreinterpretq_s64): Likewise.
25515 (__arm_vreinterpretq_s8): Likewise.
25516 (__arm_vreinterpretq_u16): Likewise.
25517 (__arm_vreinterpretq_u32): Likewise.
25518 (__arm_vreinterpretq_u64): Likewise.
25519 (__arm_vreinterpretq_u8): Likewise.
25520 (__arm_vreinterpretq_f16): Likewise.
25521 (__arm_vreinterpretq_f32): Likewise.
25522 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
25523 * config/arm/unspecs.md: (REINTERPRET): New unspec.
25525 2023-05-03 Murray Steele <murray.steele@arm.com>
25526 Christophe Lyon <christophe.lyon@arm.com>
25527 Christophe Lyon <christophe.lyon@arm.com
25529 * config.gcc: Add arm-mve-builtins-base.o and
25530 arm-mve-builtins-shapes.o to extra_objs.
25531 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
25533 (arm_expand_builtin): Likewise
25534 (arm_check_builtin_call): Likewise
25535 (arm_describe_resolver): Likewise.
25536 * config/arm/arm-builtins.h (enum resolver_ident): Add
25538 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
25539 (arm_resolve_overloaded_builtin): Handle MVE builtins.
25540 (arm_register_target_pragmas): Register arm_check_builtin_call.
25541 * config/arm/arm-mve-builtins.cc (class registered_function): New
25543 (struct registered_function_hasher): New struct.
25544 (pred_suffixes): New table.
25545 (mode_suffixes): New table.
25546 (type_suffix_info): New table.
25547 (TYPES_float16): New.
25548 (TYPES_all_float): New.
25549 (TYPES_integer_8): New.
25550 (TYPES_integer_8_16): New.
25551 (TYPES_integer_16_32): New.
25552 (TYPES_integer_32): New.
25553 (TYPES_signed_16_32): New.
25554 (TYPES_signed_32): New.
25555 (TYPES_all_signed): New.
25556 (TYPES_all_unsigned): New.
25557 (TYPES_all_integer): New.
25558 (TYPES_all_integer_with_64): New.
25559 (DEF_VECTOR_TYPE): New.
25560 (DEF_DOUBLE_TYPE): New.
25561 (DEF_MVE_TYPES_ARRAY): New.
25562 (all_integer): New.
25563 (all_integer_with_64): New.
25567 (all_unsigned): New.
25569 (integer_8_16): New.
25570 (integer_16_32): New.
25572 (signed_16_32): New.
25574 (register_vector_type): Use void_type_node for mve.fp-only types when
25575 mve.fp is not enabled.
25576 (register_builtin_tuple_types): Likewise.
25577 (handle_arm_mve_h): New function..
25578 (matches_type_p): Likewise..
25579 (report_out_of_range): Likewise.
25580 (report_not_enum): Likewise.
25581 (report_missing_float): Likewise.
25582 (report_non_ice): Likewise.
25583 (check_requires_float): Likewise.
25584 (function_instance::hash): Likewise
25585 (function_instance::call_properties): Likewise.
25586 (function_instance::reads_global_state_p): Likewise.
25587 (function_instance::modifies_global_state_p): Likewise.
25588 (function_instance::could_trap_p): Likewise.
25589 (function_instance::has_inactive_argument): Likewise.
25590 (registered_function_hasher::hash): Likewise.
25591 (registered_function_hasher::equal): Likewise.
25592 (function_builder::function_builder): Likewise.
25593 (function_builder::~function_builder): Likewise.
25594 (function_builder::append_name): Likewise.
25595 (function_builder::finish_name): Likewise.
25596 (function_builder::get_name): Likewise.
25597 (add_attribute): Likewise.
25598 (function_builder::get_attributes): Likewise.
25599 (function_builder::add_function): Likewise.
25600 (function_builder::add_unique_function): Likewise.
25601 (function_builder::add_overloaded_function): Likewise.
25602 (function_builder::add_overloaded_functions): Likewise.
25603 (function_builder::register_function_group): Likewise.
25604 (function_call_info::function_call_info): Likewise.
25605 (function_resolver::function_resolver): Likewise.
25606 (function_resolver::get_vector_type): Likewise.
25607 (function_resolver::get_scalar_type_name): Likewise.
25608 (function_resolver::get_argument_type): Likewise.
25609 (function_resolver::scalar_argument_p): Likewise.
25610 (function_resolver::report_no_such_form): Likewise.
25611 (function_resolver::lookup_form): Likewise.
25612 (function_resolver::resolve_to): Likewise.
25613 (function_resolver::infer_vector_or_tuple_type): Likewise.
25614 (function_resolver::infer_vector_type): Likewise.
25615 (function_resolver::require_vector_or_scalar_type): Likewise.
25616 (function_resolver::require_vector_type): Likewise.
25617 (function_resolver::require_matching_vector_type): Likewise.
25618 (function_resolver::require_derived_vector_type): Likewise.
25619 (function_resolver::require_derived_scalar_type): Likewise.
25620 (function_resolver::require_integer_immediate): Likewise.
25621 (function_resolver::require_scalar_type): Likewise.
25622 (function_resolver::check_num_arguments): Likewise.
25623 (function_resolver::check_gp_argument): Likewise.
25624 (function_resolver::finish_opt_n_resolution): Likewise.
25625 (function_resolver::resolve_unary): Likewise.
25626 (function_resolver::resolve_unary_n): Likewise.
25627 (function_resolver::resolve_uniform): Likewise.
25628 (function_resolver::resolve_uniform_opt_n): Likewise.
25629 (function_resolver::resolve): Likewise.
25630 (function_checker::function_checker): Likewise.
25631 (function_checker::argument_exists_p): Likewise.
25632 (function_checker::require_immediate): Likewise.
25633 (function_checker::require_immediate_enum): Likewise.
25634 (function_checker::require_immediate_range): Likewise.
25635 (function_checker::check): Likewise.
25636 (gimple_folder::gimple_folder): Likewise.
25637 (gimple_folder::fold): Likewise.
25638 (function_expander::function_expander): Likewise.
25639 (function_expander::direct_optab_handler): Likewise.
25640 (function_expander::get_fallback_value): Likewise.
25641 (function_expander::get_reg_target): Likewise.
25642 (function_expander::add_output_operand): Likewise.
25643 (function_expander::add_input_operand): Likewise.
25644 (function_expander::add_integer_operand): Likewise.
25645 (function_expander::generate_insn): Likewise.
25646 (function_expander::use_exact_insn): Likewise.
25647 (function_expander::use_unpred_insn): Likewise.
25648 (function_expander::use_pred_x_insn): Likewise.
25649 (function_expander::use_cond_insn): Likewise.
25650 (function_expander::map_to_rtx_codes): Likewise.
25651 (function_expander::expand): Likewise.
25652 (resolve_overloaded_builtin): Likewise.
25653 (check_builtin_call): Likewise.
25654 (gimple_fold_builtin): Likewise.
25655 (expand_builtin): Likewise.
25656 (gt_ggc_mx): Likewise.
25657 (gt_pch_nx): Likewise.
25658 (gt_pch_nx): Likewise.
25659 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
25670 (offset): New mode.
25671 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
25672 (CP_READ_FPCR): Likewise.
25673 (CP_RAISE_FP_EXCEPTIONS): Likewise.
25674 (CP_READ_MEMORY): Likewise.
25675 (CP_WRITE_MEMORY): Likewise.
25676 (enum units_index): New enum.
25677 (enum predication_index): New.
25678 (enum type_class_index): New.
25679 (enum mode_suffix_index): New enum.
25680 (enum type_suffix_index): New.
25681 (struct mode_suffix_info): New struct.
25682 (struct type_suffix_info): New.
25683 (struct function_group_info): Likewise.
25684 (class function_instance): Likewise.
25685 (class registered_function): Likewise.
25686 (class function_builder): Likewise.
25687 (class function_call_info): Likewise.
25688 (class function_resolver): Likewise.
25689 (class function_checker): Likewise.
25690 (class gimple_folder): Likewise.
25691 (class function_expander): Likewise.
25692 (get_mve_pred16_t): Likewise.
25693 (find_mode_suffix): New function.
25694 (class function_base): Likewise.
25695 (class function_shape): Likewise.
25696 (function_instance::operator==): New function.
25697 (function_instance::operator!=): Likewise.
25698 (function_instance::vectors_per_tuple): Likewise.
25699 (function_instance::mode_suffix): Likewise.
25700 (function_instance::type_suffix): Likewise.
25701 (function_instance::scalar_type): Likewise.
25702 (function_instance::vector_type): Likewise.
25703 (function_instance::tuple_type): Likewise.
25704 (function_instance::vector_mode): Likewise.
25705 (function_call_info::function_returns_void_p): Likewise.
25706 (function_base::call_properties): Likewise.
25707 * config/arm/arm-protos.h (enum arm_builtin_class): Add
25709 (handle_arm_mve_h): New.
25710 (resolve_overloaded_builtin): New.
25711 (check_builtin_call): New.
25712 (gimple_fold_builtin): New.
25713 (expand_builtin): New.
25714 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
25715 arm_gimple_fold_builtin.
25716 (arm_gimple_fold_builtin): New function.
25717 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
25718 * config/arm/predicates.md (arm_any_register_operand): New predicate.
25719 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
25720 (arm-mve-builtins-shapes.o): New target.
25721 (arm-mve-builtins-base.o): New target.
25722 * config/arm/arm-mve-builtins-base.cc: New file.
25723 * config/arm/arm-mve-builtins-base.def: New file.
25724 * config/arm/arm-mve-builtins-base.h: New file.
25725 * config/arm/arm-mve-builtins-functions.h: New file.
25726 * config/arm/arm-mve-builtins-shapes.cc: New file.
25727 * config/arm/arm-mve-builtins-shapes.h: New file.
25729 2023-05-03 Murray Steele <murray.steele@arm.com>
25730 Christophe Lyon <christophe.lyon@arm.com>
25731 Christophe Lyon <christophe.lyon@arm.com>
25733 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
25735 (arm_init_builtin): Use arm_general_add_builtin_function instead
25736 of arm_add_builtin_function.
25737 (arm_init_acle_builtins): Likewise.
25738 (arm_init_mve_builtins): Likewise.
25739 (arm_init_crypto_builtins): Likewise.
25740 (arm_init_builtins): Likewise.
25741 (arm_general_builtin_decl): New function.
25742 (arm_builtin_decl): Defer to numberspace-specialized functions.
25743 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
25744 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
25745 (arm_general_expand_builtin_1): ... specialize for general builtins.
25746 (arm_expand_acle_builtin): Use arm_general_expand_builtin
25747 instead of arm_expand_builtin.
25748 (arm_expand_mve_builtin): Likewise.
25749 (arm_expand_neon_builtin): Likewise.
25750 (arm_expand_vfp_builtin): Likewise.
25751 (arm_general_expand_builtin): New function.
25752 (arm_expand_builtin): Specialize for general builtins.
25753 (arm_general_check_builtin_call): New function.
25754 (arm_check_builtin_call): Specialize for general builtins.
25755 (arm_describe_resolver): Validate numberspace.
25756 (arm_cde_end_args): Likewise.
25757 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
25758 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
25760 2023-05-03 Martin Liska <mliska@suse.cz>
25763 * config/riscv/sync.md: Add gcc_unreachable to a switch.
25765 2023-05-03 Richard Biener <rguenther@suse.de>
25767 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
25768 (patch_loop_exit): Likewise.
25769 (connect_loops): Likewise.
25770 (split_loop): Likewise.
25771 (control_dep_semi_invariant_p): Likewise.
25772 (do_split_loop_on_cond): Likewise.
25773 (split_loop_on_cond): Likewise.
25774 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
25776 (simplify_loop_version): Likewise.
25777 (evaluate_bbs): Likewise.
25778 (find_loop_guard): Likewise.
25779 (clean_up_after_unswitching): Likewise.
25780 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
25782 (optimize_spaceship): Take a gcond * argument, avoid
25784 (math_opts_dom_walker::after_dom_children): Adjust call to
25785 optimize_spaceship.
25786 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
25787 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
25790 2023-05-03 Andreas Schwab <schwab@suse.de>
25792 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
25794 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25796 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
25798 (class vlseg): New class.
25799 (class vsseg): Ditto.
25800 (class vlsseg): Ditto.
25801 (class vssseg): Ditto.
25802 (class seg_indexed_load): Ditto.
25803 (class seg_indexed_store): Ditto.
25804 (class vlsegff): Ditto.
25806 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
25807 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
25817 * config/riscv/riscv-vector-builtins-shapes.cc (struct
25818 seg_loadstore_def): Ditto.
25819 (struct seg_indexed_loadstore_def): Ditto.
25820 (struct seg_fault_load_def): Ditto.
25822 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
25823 * config/riscv/riscv-vector-builtins.cc
25824 (function_builder::append_nf): New function.
25825 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
25826 Change ptr from double into float.
25827 (vfloat32m1x3_t): Ditto.
25828 (vfloat32m1x4_t): Ditto.
25829 (vfloat32m1x5_t): Ditto.
25830 (vfloat32m1x6_t): Ditto.
25831 (vfloat32m1x7_t): Ditto.
25832 (vfloat32m1x8_t): Ditto.
25833 (vfloat32m2x2_t): Ditto.
25834 (vfloat32m2x3_t): Ditto.
25835 (vfloat32m2x4_t): Ditto.
25836 (vfloat32m4x2_t): Ditto.
25837 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
25838 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
25840 * config/riscv/riscv.md: Add segment instructions.
25841 * config/riscv/vector-iterators.md: Support segment intrinsics.
25842 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
25844 (@pred_unit_strided_store<mode>): Ditto.
25845 (@pred_strided_load<mode>): Ditto.
25846 (@pred_strided_store<mode>): Ditto.
25847 (@pred_fault_load<mode>): Ditto.
25848 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
25849 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
25850 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
25851 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
25852 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
25853 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
25854 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
25855 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
25856 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
25857 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
25858 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
25859 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
25860 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
25861 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
25863 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25865 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
25866 tuple type support.
25868 (floattype): Ditto.
25870 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
25871 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
25873 (vget): Add tuple type vget.
25874 * config/riscv/riscv-vector-builtins-types.def
25875 (DEF_RVV_TUPLE_OPS): New macro.
25876 (vint8mf8x2_t): Ditto.
25877 (vuint8mf8x2_t): Ditto.
25878 (vint8mf8x3_t): Ditto.
25879 (vuint8mf8x3_t): Ditto.
25880 (vint8mf8x4_t): Ditto.
25881 (vuint8mf8x4_t): Ditto.
25882 (vint8mf8x5_t): Ditto.
25883 (vuint8mf8x5_t): Ditto.
25884 (vint8mf8x6_t): Ditto.
25885 (vuint8mf8x6_t): Ditto.
25886 (vint8mf8x7_t): Ditto.
25887 (vuint8mf8x7_t): Ditto.
25888 (vint8mf8x8_t): Ditto.
25889 (vuint8mf8x8_t): Ditto.
25890 (vint8mf4x2_t): Ditto.
25891 (vuint8mf4x2_t): Ditto.
25892 (vint8mf4x3_t): Ditto.
25893 (vuint8mf4x3_t): Ditto.
25894 (vint8mf4x4_t): Ditto.
25895 (vuint8mf4x4_t): Ditto.
25896 (vint8mf4x5_t): Ditto.
25897 (vuint8mf4x5_t): Ditto.
25898 (vint8mf4x6_t): Ditto.
25899 (vuint8mf4x6_t): Ditto.
25900 (vint8mf4x7_t): Ditto.
25901 (vuint8mf4x7_t): Ditto.
25902 (vint8mf4x8_t): Ditto.
25903 (vuint8mf4x8_t): Ditto.
25904 (vint8mf2x2_t): Ditto.
25905 (vuint8mf2x2_t): Ditto.
25906 (vint8mf2x3_t): Ditto.
25907 (vuint8mf2x3_t): Ditto.
25908 (vint8mf2x4_t): Ditto.
25909 (vuint8mf2x4_t): Ditto.
25910 (vint8mf2x5_t): Ditto.
25911 (vuint8mf2x5_t): Ditto.
25912 (vint8mf2x6_t): Ditto.
25913 (vuint8mf2x6_t): Ditto.
25914 (vint8mf2x7_t): Ditto.
25915 (vuint8mf2x7_t): Ditto.
25916 (vint8mf2x8_t): Ditto.
25917 (vuint8mf2x8_t): Ditto.
25918 (vint8m1x2_t): Ditto.
25919 (vuint8m1x2_t): Ditto.
25920 (vint8m1x3_t): Ditto.
25921 (vuint8m1x3_t): Ditto.
25922 (vint8m1x4_t): Ditto.
25923 (vuint8m1x4_t): Ditto.
25924 (vint8m1x5_t): Ditto.
25925 (vuint8m1x5_t): Ditto.
25926 (vint8m1x6_t): Ditto.
25927 (vuint8m1x6_t): Ditto.
25928 (vint8m1x7_t): Ditto.
25929 (vuint8m1x7_t): Ditto.
25930 (vint8m1x8_t): Ditto.
25931 (vuint8m1x8_t): Ditto.
25932 (vint8m2x2_t): Ditto.
25933 (vuint8m2x2_t): Ditto.
25934 (vint8m2x3_t): Ditto.
25935 (vuint8m2x3_t): Ditto.
25936 (vint8m2x4_t): Ditto.
25937 (vuint8m2x4_t): Ditto.
25938 (vint8m4x2_t): Ditto.
25939 (vuint8m4x2_t): Ditto.
25940 (vint16mf4x2_t): Ditto.
25941 (vuint16mf4x2_t): Ditto.
25942 (vint16mf4x3_t): Ditto.
25943 (vuint16mf4x3_t): Ditto.
25944 (vint16mf4x4_t): Ditto.
25945 (vuint16mf4x4_t): Ditto.
25946 (vint16mf4x5_t): Ditto.
25947 (vuint16mf4x5_t): Ditto.
25948 (vint16mf4x6_t): Ditto.
25949 (vuint16mf4x6_t): Ditto.
25950 (vint16mf4x7_t): Ditto.
25951 (vuint16mf4x7_t): Ditto.
25952 (vint16mf4x8_t): Ditto.
25953 (vuint16mf4x8_t): Ditto.
25954 (vint16mf2x2_t): Ditto.
25955 (vuint16mf2x2_t): Ditto.
25956 (vint16mf2x3_t): Ditto.
25957 (vuint16mf2x3_t): Ditto.
25958 (vint16mf2x4_t): Ditto.
25959 (vuint16mf2x4_t): Ditto.
25960 (vint16mf2x5_t): Ditto.
25961 (vuint16mf2x5_t): Ditto.
25962 (vint16mf2x6_t): Ditto.
25963 (vuint16mf2x6_t): Ditto.
25964 (vint16mf2x7_t): Ditto.
25965 (vuint16mf2x7_t): Ditto.
25966 (vint16mf2x8_t): Ditto.
25967 (vuint16mf2x8_t): Ditto.
25968 (vint16m1x2_t): Ditto.
25969 (vuint16m1x2_t): Ditto.
25970 (vint16m1x3_t): Ditto.
25971 (vuint16m1x3_t): Ditto.
25972 (vint16m1x4_t): Ditto.
25973 (vuint16m1x4_t): Ditto.
25974 (vint16m1x5_t): Ditto.
25975 (vuint16m1x5_t): Ditto.
25976 (vint16m1x6_t): Ditto.
25977 (vuint16m1x6_t): Ditto.
25978 (vint16m1x7_t): Ditto.
25979 (vuint16m1x7_t): Ditto.
25980 (vint16m1x8_t): Ditto.
25981 (vuint16m1x8_t): Ditto.
25982 (vint16m2x2_t): Ditto.
25983 (vuint16m2x2_t): Ditto.
25984 (vint16m2x3_t): Ditto.
25985 (vuint16m2x3_t): Ditto.
25986 (vint16m2x4_t): Ditto.
25987 (vuint16m2x4_t): Ditto.
25988 (vint16m4x2_t): Ditto.
25989 (vuint16m4x2_t): Ditto.
25990 (vint32mf2x2_t): Ditto.
25991 (vuint32mf2x2_t): Ditto.
25992 (vint32mf2x3_t): Ditto.
25993 (vuint32mf2x3_t): Ditto.
25994 (vint32mf2x4_t): Ditto.
25995 (vuint32mf2x4_t): Ditto.
25996 (vint32mf2x5_t): Ditto.
25997 (vuint32mf2x5_t): Ditto.
25998 (vint32mf2x6_t): Ditto.
25999 (vuint32mf2x6_t): Ditto.
26000 (vint32mf2x7_t): Ditto.
26001 (vuint32mf2x7_t): Ditto.
26002 (vint32mf2x8_t): Ditto.
26003 (vuint32mf2x8_t): Ditto.
26004 (vint32m1x2_t): Ditto.
26005 (vuint32m1x2_t): Ditto.
26006 (vint32m1x3_t): Ditto.
26007 (vuint32m1x3_t): Ditto.
26008 (vint32m1x4_t): Ditto.
26009 (vuint32m1x4_t): Ditto.
26010 (vint32m1x5_t): Ditto.
26011 (vuint32m1x5_t): Ditto.
26012 (vint32m1x6_t): Ditto.
26013 (vuint32m1x6_t): Ditto.
26014 (vint32m1x7_t): Ditto.
26015 (vuint32m1x7_t): Ditto.
26016 (vint32m1x8_t): Ditto.
26017 (vuint32m1x8_t): Ditto.
26018 (vint32m2x2_t): Ditto.
26019 (vuint32m2x2_t): Ditto.
26020 (vint32m2x3_t): Ditto.
26021 (vuint32m2x3_t): Ditto.
26022 (vint32m2x4_t): Ditto.
26023 (vuint32m2x4_t): Ditto.
26024 (vint32m4x2_t): Ditto.
26025 (vuint32m4x2_t): Ditto.
26026 (vint64m1x2_t): Ditto.
26027 (vuint64m1x2_t): Ditto.
26028 (vint64m1x3_t): Ditto.
26029 (vuint64m1x3_t): Ditto.
26030 (vint64m1x4_t): Ditto.
26031 (vuint64m1x4_t): Ditto.
26032 (vint64m1x5_t): Ditto.
26033 (vuint64m1x5_t): Ditto.
26034 (vint64m1x6_t): Ditto.
26035 (vuint64m1x6_t): Ditto.
26036 (vint64m1x7_t): Ditto.
26037 (vuint64m1x7_t): Ditto.
26038 (vint64m1x8_t): Ditto.
26039 (vuint64m1x8_t): Ditto.
26040 (vint64m2x2_t): Ditto.
26041 (vuint64m2x2_t): Ditto.
26042 (vint64m2x3_t): Ditto.
26043 (vuint64m2x3_t): Ditto.
26044 (vint64m2x4_t): Ditto.
26045 (vuint64m2x4_t): Ditto.
26046 (vint64m4x2_t): Ditto.
26047 (vuint64m4x2_t): Ditto.
26048 (vfloat32mf2x2_t): Ditto.
26049 (vfloat32mf2x3_t): Ditto.
26050 (vfloat32mf2x4_t): Ditto.
26051 (vfloat32mf2x5_t): Ditto.
26052 (vfloat32mf2x6_t): Ditto.
26053 (vfloat32mf2x7_t): Ditto.
26054 (vfloat32mf2x8_t): Ditto.
26055 (vfloat32m1x2_t): Ditto.
26056 (vfloat32m1x3_t): Ditto.
26057 (vfloat32m1x4_t): Ditto.
26058 (vfloat32m1x5_t): Ditto.
26059 (vfloat32m1x6_t): Ditto.
26060 (vfloat32m1x7_t): Ditto.
26061 (vfloat32m1x8_t): Ditto.
26062 (vfloat32m2x2_t): Ditto.
26063 (vfloat32m2x3_t): Ditto.
26064 (vfloat32m2x4_t): Ditto.
26065 (vfloat32m4x2_t): Ditto.
26066 (vfloat64m1x2_t): Ditto.
26067 (vfloat64m1x3_t): Ditto.
26068 (vfloat64m1x4_t): Ditto.
26069 (vfloat64m1x5_t): Ditto.
26070 (vfloat64m1x6_t): Ditto.
26071 (vfloat64m1x7_t): Ditto.
26072 (vfloat64m1x8_t): Ditto.
26073 (vfloat64m2x2_t): Ditto.
26074 (vfloat64m2x3_t): Ditto.
26075 (vfloat64m2x4_t): Ditto.
26076 (vfloat64m4x2_t): Ditto.
26077 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
26079 (DEF_RVV_TYPE_INDEX): Ditto.
26080 (rvv_arg_type_info::get_tuple_subpart_type): New function.
26081 (DEF_RVV_TUPLE_TYPE): New macro.
26082 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
26083 Adapt for tuple vget/vset support.
26084 (vint8mf4_t): Ditto.
26085 (vuint8mf4_t): Ditto.
26086 (vint8mf2_t): Ditto.
26087 (vuint8mf2_t): Ditto.
26088 (vint8m1_t): Ditto.
26089 (vuint8m1_t): Ditto.
26090 (vint8m2_t): Ditto.
26091 (vuint8m2_t): Ditto.
26092 (vint8m4_t): Ditto.
26093 (vuint8m4_t): Ditto.
26094 (vint8m8_t): Ditto.
26095 (vuint8m8_t): Ditto.
26096 (vint16mf4_t): Ditto.
26097 (vuint16mf4_t): Ditto.
26098 (vint16mf2_t): Ditto.
26099 (vuint16mf2_t): Ditto.
26100 (vint16m1_t): Ditto.
26101 (vuint16m1_t): Ditto.
26102 (vint16m2_t): Ditto.
26103 (vuint16m2_t): Ditto.
26104 (vint16m4_t): Ditto.
26105 (vuint16m4_t): Ditto.
26106 (vint16m8_t): Ditto.
26107 (vuint16m8_t): Ditto.
26108 (vint32mf2_t): Ditto.
26109 (vuint32mf2_t): Ditto.
26110 (vint32m1_t): Ditto.
26111 (vuint32m1_t): Ditto.
26112 (vint32m2_t): Ditto.
26113 (vuint32m2_t): Ditto.
26114 (vint32m4_t): Ditto.
26115 (vuint32m4_t): Ditto.
26116 (vint32m8_t): Ditto.
26117 (vuint32m8_t): Ditto.
26118 (vint64m1_t): Ditto.
26119 (vuint64m1_t): Ditto.
26120 (vint64m2_t): Ditto.
26121 (vuint64m2_t): Ditto.
26122 (vint64m4_t): Ditto.
26123 (vuint64m4_t): Ditto.
26124 (vint64m8_t): Ditto.
26125 (vuint64m8_t): Ditto.
26126 (vfloat32mf2_t): Ditto.
26127 (vfloat32m1_t): Ditto.
26128 (vfloat32m2_t): Ditto.
26129 (vfloat32m4_t): Ditto.
26130 (vfloat32m8_t): Ditto.
26131 (vfloat64m1_t): Ditto.
26132 (vfloat64m2_t): Ditto.
26133 (vfloat64m4_t): Ditto.
26134 (vfloat64m8_t): Ditto.
26135 (tuple_subpart): Add tuple subpart base type.
26136 * config/riscv/riscv-vector-builtins.h (struct
26137 rvv_arg_type_info): Ditto.
26138 (tuple_type_field): New function.
26140 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26142 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
26143 (RVV_TUPLE_PARTIAL_MODES): Ditto.
26144 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
26147 (get_subpart_mode): Ditto.
26148 (get_tuple_mode): Ditto.
26149 (expand_tuple_move): Ditto.
26150 * config/riscv/riscv-v.cc (ENTRY): New macro.
26151 (TUPLE_ENTRY): Ditto.
26152 (get_nf): New function.
26153 (get_subpart_mode): Ditto.
26154 (get_tuple_mode): Ditto.
26155 (expand_tuple_move): Ditto.
26156 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
26158 (register_tuple_type): New function
26159 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
26161 (vint8mf8x2_t): New macro.
26162 (vuint8mf8x2_t): Ditto.
26163 (vint8mf8x3_t): Ditto.
26164 (vuint8mf8x3_t): Ditto.
26165 (vint8mf8x4_t): Ditto.
26166 (vuint8mf8x4_t): Ditto.
26167 (vint8mf8x5_t): Ditto.
26168 (vuint8mf8x5_t): Ditto.
26169 (vint8mf8x6_t): Ditto.
26170 (vuint8mf8x6_t): Ditto.
26171 (vint8mf8x7_t): Ditto.
26172 (vuint8mf8x7_t): Ditto.
26173 (vint8mf8x8_t): Ditto.
26174 (vuint8mf8x8_t): Ditto.
26175 (vint8mf4x2_t): Ditto.
26176 (vuint8mf4x2_t): Ditto.
26177 (vint8mf4x3_t): Ditto.
26178 (vuint8mf4x3_t): Ditto.
26179 (vint8mf4x4_t): Ditto.
26180 (vuint8mf4x4_t): Ditto.
26181 (vint8mf4x5_t): Ditto.
26182 (vuint8mf4x5_t): Ditto.
26183 (vint8mf4x6_t): Ditto.
26184 (vuint8mf4x6_t): Ditto.
26185 (vint8mf4x7_t): Ditto.
26186 (vuint8mf4x7_t): Ditto.
26187 (vint8mf4x8_t): Ditto.
26188 (vuint8mf4x8_t): Ditto.
26189 (vint8mf2x2_t): Ditto.
26190 (vuint8mf2x2_t): Ditto.
26191 (vint8mf2x3_t): Ditto.
26192 (vuint8mf2x3_t): Ditto.
26193 (vint8mf2x4_t): Ditto.
26194 (vuint8mf2x4_t): Ditto.
26195 (vint8mf2x5_t): Ditto.
26196 (vuint8mf2x5_t): Ditto.
26197 (vint8mf2x6_t): Ditto.
26198 (vuint8mf2x6_t): Ditto.
26199 (vint8mf2x7_t): Ditto.
26200 (vuint8mf2x7_t): Ditto.
26201 (vint8mf2x8_t): Ditto.
26202 (vuint8mf2x8_t): Ditto.
26203 (vint8m1x2_t): Ditto.
26204 (vuint8m1x2_t): Ditto.
26205 (vint8m1x3_t): Ditto.
26206 (vuint8m1x3_t): Ditto.
26207 (vint8m1x4_t): Ditto.
26208 (vuint8m1x4_t): Ditto.
26209 (vint8m1x5_t): Ditto.
26210 (vuint8m1x5_t): Ditto.
26211 (vint8m1x6_t): Ditto.
26212 (vuint8m1x6_t): Ditto.
26213 (vint8m1x7_t): Ditto.
26214 (vuint8m1x7_t): Ditto.
26215 (vint8m1x8_t): Ditto.
26216 (vuint8m1x8_t): Ditto.
26217 (vint8m2x2_t): Ditto.
26218 (vuint8m2x2_t): Ditto.
26219 (vint8m2x3_t): Ditto.
26220 (vuint8m2x3_t): Ditto.
26221 (vint8m2x4_t): Ditto.
26222 (vuint8m2x4_t): Ditto.
26223 (vint8m4x2_t): Ditto.
26224 (vuint8m4x2_t): Ditto.
26225 (vint16mf4x2_t): Ditto.
26226 (vuint16mf4x2_t): Ditto.
26227 (vint16mf4x3_t): Ditto.
26228 (vuint16mf4x3_t): Ditto.
26229 (vint16mf4x4_t): Ditto.
26230 (vuint16mf4x4_t): Ditto.
26231 (vint16mf4x5_t): Ditto.
26232 (vuint16mf4x5_t): Ditto.
26233 (vint16mf4x6_t): Ditto.
26234 (vuint16mf4x6_t): Ditto.
26235 (vint16mf4x7_t): Ditto.
26236 (vuint16mf4x7_t): Ditto.
26237 (vint16mf4x8_t): Ditto.
26238 (vuint16mf4x8_t): Ditto.
26239 (vint16mf2x2_t): Ditto.
26240 (vuint16mf2x2_t): Ditto.
26241 (vint16mf2x3_t): Ditto.
26242 (vuint16mf2x3_t): Ditto.
26243 (vint16mf2x4_t): Ditto.
26244 (vuint16mf2x4_t): Ditto.
26245 (vint16mf2x5_t): Ditto.
26246 (vuint16mf2x5_t): Ditto.
26247 (vint16mf2x6_t): Ditto.
26248 (vuint16mf2x6_t): Ditto.
26249 (vint16mf2x7_t): Ditto.
26250 (vuint16mf2x7_t): Ditto.
26251 (vint16mf2x8_t): Ditto.
26252 (vuint16mf2x8_t): Ditto.
26253 (vint16m1x2_t): Ditto.
26254 (vuint16m1x2_t): Ditto.
26255 (vint16m1x3_t): Ditto.
26256 (vuint16m1x3_t): Ditto.
26257 (vint16m1x4_t): Ditto.
26258 (vuint16m1x4_t): Ditto.
26259 (vint16m1x5_t): Ditto.
26260 (vuint16m1x5_t): Ditto.
26261 (vint16m1x6_t): Ditto.
26262 (vuint16m1x6_t): Ditto.
26263 (vint16m1x7_t): Ditto.
26264 (vuint16m1x7_t): Ditto.
26265 (vint16m1x8_t): Ditto.
26266 (vuint16m1x8_t): Ditto.
26267 (vint16m2x2_t): Ditto.
26268 (vuint16m2x2_t): Ditto.
26269 (vint16m2x3_t): Ditto.
26270 (vuint16m2x3_t): Ditto.
26271 (vint16m2x4_t): Ditto.
26272 (vuint16m2x4_t): Ditto.
26273 (vint16m4x2_t): Ditto.
26274 (vuint16m4x2_t): Ditto.
26275 (vint32mf2x2_t): Ditto.
26276 (vuint32mf2x2_t): Ditto.
26277 (vint32mf2x3_t): Ditto.
26278 (vuint32mf2x3_t): Ditto.
26279 (vint32mf2x4_t): Ditto.
26280 (vuint32mf2x4_t): Ditto.
26281 (vint32mf2x5_t): Ditto.
26282 (vuint32mf2x5_t): Ditto.
26283 (vint32mf2x6_t): Ditto.
26284 (vuint32mf2x6_t): Ditto.
26285 (vint32mf2x7_t): Ditto.
26286 (vuint32mf2x7_t): Ditto.
26287 (vint32mf2x8_t): Ditto.
26288 (vuint32mf2x8_t): Ditto.
26289 (vint32m1x2_t): Ditto.
26290 (vuint32m1x2_t): Ditto.
26291 (vint32m1x3_t): Ditto.
26292 (vuint32m1x3_t): Ditto.
26293 (vint32m1x4_t): Ditto.
26294 (vuint32m1x4_t): Ditto.
26295 (vint32m1x5_t): Ditto.
26296 (vuint32m1x5_t): Ditto.
26297 (vint32m1x6_t): Ditto.
26298 (vuint32m1x6_t): Ditto.
26299 (vint32m1x7_t): Ditto.
26300 (vuint32m1x7_t): Ditto.
26301 (vint32m1x8_t): Ditto.
26302 (vuint32m1x8_t): Ditto.
26303 (vint32m2x2_t): Ditto.
26304 (vuint32m2x2_t): Ditto.
26305 (vint32m2x3_t): Ditto.
26306 (vuint32m2x3_t): Ditto.
26307 (vint32m2x4_t): Ditto.
26308 (vuint32m2x4_t): Ditto.
26309 (vint32m4x2_t): Ditto.
26310 (vuint32m4x2_t): Ditto.
26311 (vint64m1x2_t): Ditto.
26312 (vuint64m1x2_t): Ditto.
26313 (vint64m1x3_t): Ditto.
26314 (vuint64m1x3_t): Ditto.
26315 (vint64m1x4_t): Ditto.
26316 (vuint64m1x4_t): Ditto.
26317 (vint64m1x5_t): Ditto.
26318 (vuint64m1x5_t): Ditto.
26319 (vint64m1x6_t): Ditto.
26320 (vuint64m1x6_t): Ditto.
26321 (vint64m1x7_t): Ditto.
26322 (vuint64m1x7_t): Ditto.
26323 (vint64m1x8_t): Ditto.
26324 (vuint64m1x8_t): Ditto.
26325 (vint64m2x2_t): Ditto.
26326 (vuint64m2x2_t): Ditto.
26327 (vint64m2x3_t): Ditto.
26328 (vuint64m2x3_t): Ditto.
26329 (vint64m2x4_t): Ditto.
26330 (vuint64m2x4_t): Ditto.
26331 (vint64m4x2_t): Ditto.
26332 (vuint64m4x2_t): Ditto.
26333 (vfloat32mf2x2_t): Ditto.
26334 (vfloat32mf2x3_t): Ditto.
26335 (vfloat32mf2x4_t): Ditto.
26336 (vfloat32mf2x5_t): Ditto.
26337 (vfloat32mf2x6_t): Ditto.
26338 (vfloat32mf2x7_t): Ditto.
26339 (vfloat32mf2x8_t): Ditto.
26340 (vfloat32m1x2_t): Ditto.
26341 (vfloat32m1x3_t): Ditto.
26342 (vfloat32m1x4_t): Ditto.
26343 (vfloat32m1x5_t): Ditto.
26344 (vfloat32m1x6_t): Ditto.
26345 (vfloat32m1x7_t): Ditto.
26346 (vfloat32m1x8_t): Ditto.
26347 (vfloat32m2x2_t): Ditto.
26348 (vfloat32m2x3_t): Ditto.
26349 (vfloat32m2x4_t): Ditto.
26350 (vfloat32m4x2_t): Ditto.
26351 (vfloat64m1x2_t): Ditto.
26352 (vfloat64m1x3_t): Ditto.
26353 (vfloat64m1x4_t): Ditto.
26354 (vfloat64m1x5_t): Ditto.
26355 (vfloat64m1x6_t): Ditto.
26356 (vfloat64m1x7_t): Ditto.
26357 (vfloat64m1x8_t): Ditto.
26358 (vfloat64m2x2_t): Ditto.
26359 (vfloat64m2x3_t): Ditto.
26360 (vfloat64m2x4_t): Ditto.
26361 (vfloat64m4x2_t): Ditto.
26362 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
26364 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
26365 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
26367 (TUPLE_ENTRY): Ditto.
26368 (riscv_v_ext_mode_p): New function.
26369 (riscv_v_adjust_nunits): Add tuple mode adjustment.
26370 (riscv_classify_address): Ditto.
26371 (riscv_binary_cost): Ditto.
26372 (riscv_rtx_costs): Ditto.
26373 (riscv_secondary_memory_needed): Ditto.
26374 (riscv_hard_regno_nregs): Ditto.
26375 (riscv_hard_regno_mode_ok): Ditto.
26376 (riscv_vector_mode_supported_p): Ditto.
26377 (riscv_regmode_natural_size): Ditto.
26378 (riscv_array_mode): New function.
26379 (TARGET_ARRAY_MODE): New target hook.
26380 * config/riscv/riscv.md: Add tuple modes.
26381 * config/riscv/vector-iterators.md: Ditto.
26382 * config/riscv/vector.md (mov<mode>): Add tuple modes data
26384 (*mov<VT:mode>_<P:mode>): Ditto.
26386 2023-05-03 Richard Biener <rguenther@suse.de>
26388 * cse.cc (cse_insn): Track an equivalence to the destination
26389 separately and delay using src_related for it.
26391 2023-05-03 Richard Biener <rguenther@suse.de>
26393 * cse.cc (HASH): Turn into inline function and mix
26394 in another HASH_SHIFT bits.
26395 (SAFE_HASH): Likewise.
26397 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26400 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
26401 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
26403 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26406 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
26407 (add<mode>3<vczle><vczbe>): ... This.
26408 (sub<mode>3): Rename to...
26409 (sub<mode>3<vczle><vczbe>): ... This.
26410 (mul<mode>3): Rename to...
26411 (mul<mode>3<vczle><vczbe>): ... This.
26412 (*div<mode>3): Rename to...
26413 (*div<mode>3<vczle><vczbe>): ... This.
26414 (neg<mode>2): Rename to...
26415 (neg<mode>2<vczle><vczbe>): ... This.
26416 (abs<mode>2): Rename to...
26417 (abs<mode>2<vczle><vczbe>): ... This.
26418 (<frint_pattern><mode>2): Rename to...
26419 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
26420 (<fmaxmin><mode>3): Rename to...
26421 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
26422 (*sqrt<mode>2): Rename to...
26423 (*sqrt<mode>2<vczle><vczbe>): ... This.
26425 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
26427 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
26429 2023-05-03 Martin Liska <mliska@suse.cz>
26431 PR tree-optimization/109693
26432 * value-range-storage.cc (vrange_allocator::vrange_allocator):
26433 Remove unused field.
26434 * value-range-storage.h: Likewise.
26436 2023-05-02 Andrew Pinski <apinski@marvell.com>
26438 * tree-ssa-phiopt.cc (move_stmt): New function.
26439 (match_simplify_replacement): Use move_stmt instead
26440 of the inlined version.
26442 2023-05-02 Andrew Pinski <apinski@marvell.com>
26444 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
26447 2023-05-02 Andrew Pinski <apinski@marvell.com>
26449 PR tree-optimization/109702
26450 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
26451 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
26453 2023-05-02 Andrew Pinski <apinski@marvell.com>
26456 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
26457 insn_and_split pattern.
26459 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26461 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
26464 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26466 * config/riscv/sync.md (mem_thread_fence_1): Change fence
26467 depending on the given memory model.
26469 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26471 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
26472 riscv_union_memmodels function to sync.md.
26473 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
26474 get the union of two memmodels in sync.md.
26475 (riscv_print_operand): Add %I and %J flags that output the
26476 optimal LR/SC flag bits for a given memory model.
26477 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
26478 bits on SC op and replace with optimized %I, %J flags.
26480 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26482 * config/riscv/riscv.cc
26483 (riscv_memmodel_needs_amo_release): Change function name.
26484 (riscv_print_operand): Remove unneeded %F case.
26485 * config/riscv/sync.md: Remove unneeded fences.
26487 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26490 * config/riscv/sync.md (atomic_store<mode>): Use simple store
26491 instruction in combination with fence(s).
26493 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26495 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
26496 of %A to include release bits.
26498 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26500 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
26501 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
26504 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26506 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
26507 sequentially consistent LR.aqrl/SC.rl pairs.
26509 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26511 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
26512 sanitize memmodel input with memmodel_base.
26514 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
26515 Pan Li <pan2.li@intel.com>
26518 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
26520 2023-05-02 Romain Naour <romain.naour@gmail.com>
26522 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
26525 2023-05-02 Martin Liska <mliska@suse.cz>
26527 * doc/invoke.texi: Update documentation based on param.opt file.
26529 2023-05-02 Richard Biener <rguenther@suse.de>
26531 PR tree-optimization/109672
26532 * tree-vect-stmts.cc (vectorizable_operation): For plus,
26533 minus and negate always check the vector mode is word mode.
26535 2023-05-01 Andrew Pinski <apinski@marvell.com>
26537 * tree-ssa-phiopt.cc: Update comment about
26538 how the transformation are implemented.
26540 2023-05-01 Jeff Law <jlaw@ventanamicro>
26542 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
26544 2023-05-01 Jeff Law <jlaw@ventanamicro>
26546 * config/cris/cris.cc (TARGET_LRA_P): Remove.
26547 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
26548 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
26549 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
26550 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
26551 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
26553 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
26555 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
26556 * print-tree.cc (print_decl_identifier): Implement it.
26557 * toplev.cc (output_stack_usage_1): Use it.
26559 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26561 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
26564 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26566 * value-range.h (irange::set_nonzero): Inline.
26568 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26570 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
26572 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
26573 invalid_range, as it is an inverse range.
26574 * tree-vrp.cc (find_case_label_range): Avoid trees.
26575 * value-range.cc (irange::irange_set): Delete.
26576 (irange::irange_set_1bit_anti_range): Delete.
26577 (irange::irange_set_anti_range): Delete.
26578 (irange::set): Cleanup.
26579 * value-range.h (class irange): Remove irange_set,
26580 irange_set_anti_range, irange_set_1bit_anti_range.
26581 (irange::set_undefined): Remove set to m_type.
26583 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26585 * range-op.cc (update_known_bitmask): Adjust for irange containing
26586 wide_ints internally.
26587 * tree-ssanames.cc (set_nonzero_bits): Same.
26588 * tree-ssanames.h (set_nonzero_bits): Same.
26589 * value-range-storage.cc (irange_storage::set_irange): Same.
26590 (irange_storage::get_irange): Same.
26591 * value-range.cc (irange::operator=): Same.
26592 (irange::irange_set): Same.
26593 (irange::irange_set_1bit_anti_range): Same.
26594 (irange::irange_set_anti_range): Same.
26595 (irange::set): Same.
26596 (irange::verify_range): Same.
26597 (irange::contains_p): Same.
26598 (irange::irange_single_pair_union): Same.
26599 (irange::union_): Same.
26600 (irange::irange_contains_p): Same.
26601 (irange::intersect): Same.
26602 (irange::invert): Same.
26603 (irange::set_range_from_nonzero_bits): Same.
26604 (irange::set_nonzero_bits): Same.
26605 (mask_to_wi): Same.
26606 (irange::intersect_nonzero_bits): Same.
26607 (irange::union_nonzero_bits): Same.
26610 (tree_range): Same.
26611 (range_tests_strict_enum): Same.
26612 (range_tests_misc): Same.
26613 (range_tests_nonzero_bits): Same.
26614 * value-range.h (irange::type): Same.
26615 (irange::varying_compatible_p): Same.
26616 (irange::irange): Same.
26617 (int_range::int_range): Same.
26618 (irange::set_undefined): Same.
26619 (irange::set_varying): Same.
26620 (irange::lower_bound): Same.
26621 (irange::upper_bound): Same.
26623 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26625 * gimple-range-fold.cc (tree_lower_bound): Delete.
26626 (tree_upper_bound): Delete.
26627 (vrp_val_max): Delete.
26628 (vrp_val_min): Delete.
26629 (fold_using_range::range_of_ssa_name_with_loop_info): Call
26630 range_of_var_in_loop.
26631 * vr-values.cc (valid_value_p): Delete.
26632 (fix_overflow): Delete.
26633 (get_scev_info): New.
26634 (bounds_of_var_in_loop): Refactor into...
26635 (induction_variable_may_overflow_p): ...this,
26636 (range_from_loop_direction): ...and this,
26637 (range_of_var_in_loop): ...and this.
26638 * vr-values.h (bounds_of_var_in_loop): Delete.
26639 (range_of_var_in_loop): New.
26641 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26643 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
26645 (vrp_val_max): New.
26646 (vrp_val_min): New.
26647 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
26648 * range-op.cc (max_limit): Same.
26650 (plus_minus_ranges): Same.
26651 (operator_rshift::op1_range): Same.
26652 (operator_cast::inside_domain_p): Same.
26653 * value-range.cc (vrp_val_is_max): Delete.
26654 (vrp_val_is_min): Delete.
26655 (range_tests_misc): Use irange_val_*.
26656 * value-range.h (vrp_val_is_min): Delete.
26657 (vrp_val_is_max): Delete.
26658 (vrp_val_max): Delete.
26659 (irange_val_min): New.
26660 (vrp_val_min): Delete.
26661 (irange_val_max): New.
26662 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
26664 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26666 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
26667 * gimple-fold.cc (size_must_be_zero_p): Same.
26668 * gimple-loop-versioning.cc
26669 (loop_versioning::prune_loop_conditions): Same.
26670 * gimple-range-edge.cc (gcond_edge_range): Same.
26671 (gimple_outgoing_range::calc_switch_ranges): Same.
26672 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
26673 (adjust_realpart_expr): Same.
26674 (fold_using_range::range_of_address): Same.
26675 (fold_using_range::relation_fold_and_or): Same.
26676 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
26677 (range_is_either_true_or_false): Same.
26678 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
26679 (cfn_clz::fold_range): Same.
26680 (cfn_ctz::fold_range): Same.
26681 * gimple-range-tests.cc (class test_expr_eval): Same.
26682 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
26683 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
26684 (propagate_vr_across_jump_function): Same.
26685 (decide_whether_version_node): Same.
26686 * ipa-prop.cc (ipa_get_value_range): Same.
26687 * ipa-prop.h (ipa_range_set_and_normalize): Same.
26688 * range-op.cc (get_shift_range): Same.
26689 (value_range_from_overflowed_bounds): Same.
26690 (value_range_with_overflow): Same.
26691 (create_possibly_reversed_range): Same.
26692 (equal_op1_op2_relation): Same.
26693 (not_equal_op1_op2_relation): Same.
26694 (lt_op1_op2_relation): Same.
26695 (le_op1_op2_relation): Same.
26696 (gt_op1_op2_relation): Same.
26697 (ge_op1_op2_relation): Same.
26698 (operator_mult::op1_range): Same.
26699 (operator_exact_divide::op1_range): Same.
26700 (operator_lshift::op1_range): Same.
26701 (operator_rshift::op1_range): Same.
26702 (operator_cast::op1_range): Same.
26703 (operator_logical_and::fold_range): Same.
26704 (set_nonzero_range_from_mask): Same.
26705 (operator_bitwise_or::op1_range): Same.
26706 (operator_bitwise_xor::op1_range): Same.
26707 (operator_addr_expr::fold_range): Same.
26708 (pointer_plus_operator::wi_fold): Same.
26709 (pointer_or_operator::op1_range): Same.
26716 (range_op_cast_tests): Same.
26717 (range_op_lshift_tests): Same.
26718 (range_op_rshift_tests): Same.
26719 (range_op_bitwise_and_tests): Same.
26720 (range_relational_tests): Same.
26721 * range.cc (range_zero): Same.
26722 (range_nonzero): Same.
26723 * range.h (range_true): Same.
26724 (range_false): Same.
26725 (range_true_and_false): Same.
26726 * tree-data-ref.cc (split_constant_offset_1): Same.
26727 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
26728 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
26729 (find_unswitching_predicates_for_bb): Same.
26730 * tree-ssa-phiopt.cc (value_replacement): Same.
26731 * tree-ssa-threadbackward.cc
26732 (back_threader::find_taken_edge_cond): Same.
26733 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
26734 * tree-vrp.cc (find_case_label_range): Same.
26735 * value-query.cc (range_query::get_tree_range): Same.
26736 * value-range.cc (irange::set_nonnegative): Same.
26737 (frange::contains_p): Same.
26738 (frange::singleton_p): Same.
26739 (frange::internal_singleton_p): Same.
26740 (irange::irange_set): Same.
26741 (irange::irange_set_1bit_anti_range): Same.
26742 (irange::irange_set_anti_range): Same.
26743 (irange::set): Same.
26744 (irange::operator==): Same.
26745 (irange::singleton_p): Same.
26746 (irange::contains_p): Same.
26747 (irange::set_range_from_nonzero_bits): Same.
26748 (DEFINE_INT_RANGE_INSTANCE): Same.
26758 (range_uint128): New.
26759 (range_uchar): New.
26761 (build_range3): Convert to irange wide_int API.
26762 (range_tests_irange3): Same.
26763 (range_tests_int_range_max): Same.
26764 (range_tests_strict_enum): Same.
26765 (range_tests_misc): Same.
26766 (range_tests_nonzero_bits): Same.
26767 (range_tests_nan): Same.
26768 (range_tests_signed_zeros): Same.
26769 * value-range.h (Value_Range::Value_Range): Same.
26770 (irange::set): Same.
26771 (irange::nonzero_p): Same.
26772 (irange::contains_p): Same.
26773 (range_includes_zero_p): Same.
26774 (irange::set_nonzero): Same.
26775 (irange::set_zero): Same.
26776 (contains_zero_p): Same.
26777 (frange::contains_p): Same.
26779 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
26780 (bounds_of_var_in_loop): Same.
26781 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
26783 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26785 * value-range.cc (irange::irange_union): Rename to...
26786 (irange::union_): ...this.
26787 (irange::irange_intersect): Rename to...
26788 (irange::intersect): ...this.
26789 * value-range.h (irange::union_): Delete.
26790 (irange::intersect): Delete.
26792 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26794 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
26796 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26798 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
26800 (compare_ranges): Delete.
26801 (compare_range_with_value): Delete.
26802 (bounds_of_var_in_loop): Tidy up by using ranger API.
26803 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
26804 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
26805 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
26806 strict_overflow_p and only_ranges.
26807 (simplify_using_ranges::legacy_fold_cond): Adjust call to
26808 legacy_fold_cond_overflow.
26809 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
26811 (range_fits_type_p): Rename value_range to irange.
26812 * vr-values.h (range_fits_type_p): Adjust prototype.
26814 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26816 * value-range.cc (irange::irange_set_anti_range): Remove uses of
26817 tree_lower_bound and tree_upper_bound.
26818 (irange::verify_range): Same.
26819 (irange::operator==): Same.
26820 (irange::singleton_p): Same.
26821 * value-range.h (irange::tree_lower_bound): Delete.
26822 (irange::tree_upper_bound): Delete.
26823 (irange::lower_bound): Delete.
26824 (irange::upper_bound): Delete.
26825 (irange::zero_p): Remove uses of tree_lower_bound and
26828 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26830 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
26832 (determine_value_range): Same.
26833 (record_nonwrapping_iv): Same.
26834 (infer_loop_bounds_from_signedness): Same.
26835 (scev_var_range_cant_overflow): Same.
26836 * tree-vrp.cc (operand_less_p): Delete.
26837 * tree-vrp.h (operand_less_p): Delete.
26838 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
26839 (irange::value_inside_range): Delete.
26840 * value-range.h (vrange::kind): Delete.
26841 (irange::num_pairs): Remove check of m_kind.
26842 (irange::min): Delete.
26843 (irange::max): Delete.
26845 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
26847 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
26848 for vrange_storage.
26849 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
26850 (sbr_vector::grow): Same.
26851 (sbr_vector::set_bb_range): Same.
26852 (sbr_vector::get_bb_range): Same.
26853 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
26854 (sbr_sparse_bitmap::set_bb_range): Same.
26855 (sbr_sparse_bitmap::get_bb_range): Same.
26856 (block_range_cache::block_range_cache): Same.
26857 (ssa_global_cache::ssa_global_cache): Same.
26858 (ssa_global_cache::get_global_range): Same.
26859 (ssa_global_cache::set_global_range): Same.
26860 * gimple-range-cache.h: Same.
26861 * gimple-range-edge.cc
26862 (gimple_outgoing_range::gimple_outgoing_range): Same.
26863 (gimple_outgoing_range::switch_edge_range): Same.
26864 (gimple_outgoing_range::calc_switch_ranges): Same.
26865 * gimple-range-edge.h: Same.
26866 * gimple-range-infer.cc
26867 (infer_range_manager::infer_range_manager): Same.
26868 (infer_range_manager::get_nonzero): Same.
26869 (infer_range_manager::maybe_adjust_range): Same.
26870 (infer_range_manager::add_range): Same.
26871 * gimple-range-infer.h: Rename obstack_vrange_allocator to
26873 * tree-core.h (struct irange_storage_slot): Remove.
26874 (struct tree_ssa_name): Remove irange_info and frange_info. Make
26875 range_info a pointer to vrange_storage.
26876 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
26877 (range_info_alloc): Same.
26878 (range_info_free): Same.
26879 (range_info_get_range): Same.
26880 (range_info_set_range): Same.
26881 (get_nonzero_bits): Same.
26882 * value-query.cc (get_ssa_name_range_info): Same.
26883 * value-range-storage.cc (class vrange_internal_alloc): New.
26884 (class vrange_obstack_alloc): New.
26885 (class vrange_ggc_alloc): New.
26886 (vrange_allocator::vrange_allocator): New.
26887 (vrange_allocator::~vrange_allocator): New.
26888 (vrange_storage::alloc_slot): New.
26889 (vrange_allocator::alloc): New.
26890 (vrange_allocator::free): New.
26891 (vrange_allocator::clone): New.
26892 (vrange_allocator::clone_varying): New.
26893 (vrange_allocator::clone_undefined): New.
26894 (vrange_storage::alloc): New.
26895 (vrange_storage::set_vrange): Remove slot argument.
26896 (vrange_storage::get_vrange): Same.
26897 (vrange_storage::fits_p): Same.
26898 (vrange_storage::equal_p): New.
26899 (irange_storage::write_lengths_address): New.
26900 (irange_storage::lengths_address): New.
26901 (irange_storage_slot::alloc_slot): Remove.
26902 (irange_storage::alloc): New.
26903 (irange_storage_slot::irange_storage_slot): Remove.
26904 (irange_storage::irange_storage): New.
26905 (write_wide_int): New.
26906 (irange_storage_slot::set_irange): Remove.
26907 (irange_storage::set_irange): New.
26908 (read_wide_int): New.
26909 (irange_storage_slot::get_irange): Remove.
26910 (irange_storage::get_irange): New.
26911 (irange_storage_slot::size): Remove.
26912 (irange_storage::equal_p): New.
26913 (irange_storage_slot::num_wide_ints_needed): Remove.
26914 (irange_storage::size): New.
26915 (irange_storage_slot::fits_p): Remove.
26916 (irange_storage::fits_p): New.
26917 (irange_storage_slot::dump): Remove.
26918 (irange_storage::dump): New.
26919 (frange_storage_slot::alloc_slot): Remove.
26920 (frange_storage::alloc): New.
26921 (frange_storage_slot::set_frange): Remove.
26922 (frange_storage::set_frange): New.
26923 (frange_storage_slot::get_frange): Remove.
26924 (frange_storage::get_frange): New.
26925 (frange_storage_slot::fits_p): Remove.
26926 (frange_storage::equal_p): New.
26927 (frange_storage::fits_p): New.
26928 (ggc_vrange_allocator): New.
26929 (ggc_alloc_vrange_storage): New.
26930 * value-range-storage.h (class vrange_storage): Rewrite.
26931 (class irange_storage): Rewrite.
26932 (class frange_storage): Rewrite.
26933 (class obstack_vrange_allocator): Remove.
26934 (class ggc_vrange_allocator): Remove.
26935 (vrange_allocator::alloc_vrange): Remove.
26936 (vrange_allocator::alloc_irange): Remove.
26937 (vrange_allocator::alloc_frange): Remove.
26938 (ggc_alloc_vrange_storage): New.
26939 * value-range.h (class irange): Rename vrange_allocator to
26941 (class frange): Same.
26943 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
26945 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
26946 inc to avoid clobbering the carry flag.
26948 2023-04-30 Andrew Pinski <apinski@marvell.com>
26950 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
26951 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
26953 2023-04-30 Andrew Pinski <apinski@marvell.com>
26955 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
26956 Allow some builtin/internal function calls which
26957 are known not to trap/throw.
26958 (phiopt_worker::match_simplify_replacement):
26959 Use name instead of getting the lhs again.
26961 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
26963 * configure: Regenerate.
26964 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
26966 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
26968 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
26969 emit_insn_if_valid_for_reload.
26970 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
26971 to be recognized, also try emitting a parallel that clobbers
26972 TARGET_FLAGS_REGNUM, as applicable.
26974 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
26976 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
26978 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
26979 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
26981 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
26983 * config/stormy16/stormy16.md (any_lshift): New code iterator.
26984 (any_or_plus): Likewise.
26985 (any_rotate): Likewise.
26986 (*<any_lshift>_and_internal): New define_insn_and_split to
26987 recognize a logical shift followed by an AND, and split it
26988 again after reload.
26989 (*swpn): New define_insn matching xstormy16's swpn.
26990 (*swpn_zext): New define_insn recognizing swpn followed by
26991 zero_extendqihi2, i.e. with the high byte set to zero.
26992 (*swpn_sext): Likewise, for swpn followed by cbw.
26993 (*swpn_sext_2): Likewise, for an alternate RTL form.
26994 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
26995 sequence is split in the correct place to recognize the *swpn_zext
26996 followed by any_or_plus (ior, xor or plus) instruction.
26998 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
27001 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
27002 (lm32-*-uclinux*): Likewise.
27004 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
27006 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
27007 for riscv_use_save_libcall.
27008 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
27009 (riscv_compute_frame_info): restructure to decouple stack allocation
27010 for rv32e w/o save-restore.
27012 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
27014 * doc/install.texi: Fix documentation typo
27016 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
27018 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
27019 (u): Add div/udiv cases.
27020 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
27021 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
27023 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
27024 (thead_c906_tune_info): Likewise.
27025 (optimize_size_tune_info): Likewise.
27026 (riscv_use_divmod_expander): New function.
27027 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
27029 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
27031 * config/riscv/bitmanip.md: Added clmulr instruction.
27032 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
27033 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
27035 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
27036 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
27037 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
27038 functions to riscv-cmo.def.
27039 * config/riscv/generic.md: Add clmul to list of instructions
27040 using the generic_imul reservation.
27042 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
27044 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
27046 2023-04-28 Andrew Pinski <apinski@marvell.com>
27048 PR tree-optimization/100958
27049 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
27050 (pass_phiopt::execute): Don't call two_value_replacement.
27051 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
27052 handle what two_value_replacement did.
27054 2023-04-28 Andrew Pinski <apinski@marvell.com>
27056 * match.pd: Add patterns for
27057 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
27059 2023-04-28 Andrew Pinski <apinski@marvell.com>
27061 * match.pd: Factor out the deciding the min/max from
27062 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
27064 * fold-const.cc (minmax_from_comparison): this new function.
27065 * fold-const.h (minmax_from_comparison): New prototype.
27067 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
27069 PR rtl-optimization/109476
27070 * lower-subreg.cc: Include explow.h for force_reg.
27071 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
27072 If decomposing a suitable LSHIFTRT and we're not splitting
27073 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
27074 instead of setting a high part SUBREG to zero, which helps combine.
27075 (decompose_multiword_subregs): Update call to resolve_shift_zext.
27077 2023-04-28 Richard Biener <rguenther@suse.de>
27079 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
27081 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
27082 gather-scatter info and cost emulated scatters accordingly.
27083 (get_load_store_type): Support emulated scatters.
27084 (vectorizable_store): Likewise. Emulate them by extracting
27085 scalar offsets and data, doing scalar stores.
27087 2023-04-28 Richard Biener <rguenther@suse.de>
27089 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
27090 Tame down element extracts and scalar loads for gather/scatter
27091 similar to elementwise strided accesses.
27093 2023-04-28 Pan Li <pan2.li@intel.com>
27094 kito-cheng <kito.cheng@sifive.com>
27096 * config/riscv/vector.md: Add new define split to perform
27097 the simplification.
27099 2023-04-28 Richard Biener <rguenther@suse.de>
27102 * ipa-param-manipulation.cc
27103 (ipa_param_body_adjustments::modify_expression): Allow
27104 conversion of a register to a non-register type. Elide
27105 conversions inside BIT_FIELD_REFs.
27107 2023-04-28 Richard Biener <rguenther@suse.de>
27109 PR tree-optimization/109644
27110 * tree-cfg.cc (verify_types_in_gimple_reference): Check
27111 register constraints on the outermost VIEW_CONVERT_EXPR
27112 only. Do not allow register or invariant bases on
27113 multi-level or possibly variable index handled components.
27115 2023-04-28 Richard Biener <rguenther@suse.de>
27117 * gimplify.cc (gimplify_compound_lval): When there's a
27118 non-register type produced by one of the handled component
27119 operations make sure we get a non-register base.
27121 2023-04-28 Richard Biener <rguenther@suse.de>
27123 PR tree-optimization/108752
27124 * tree-vect-generic.cc (build_replicated_const): Rename
27125 to build_replicated_int_cst and move to tree.{h,cc}.
27126 (do_plus_minus): Adjust.
27127 (do_negate): Likewise.
27128 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
27129 arithmetic vector operations in lowered form.
27130 * tree.h (build_replicated_int_cst): Declare.
27131 * tree.cc (build_replicated_int_cst): Moved from
27132 tree-vect-generic.cc build_replicated_const.
27134 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27137 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
27138 (aarch64_rbit<mode><vczle><vczbe>): ... This.
27139 (neg<mode>2): Rename to...
27140 (neg<mode>2<vczle><vczbe>): ... This.
27141 (abs<mode>2): Rename to...
27142 (abs<mode>2<vczle><vczbe>): ... This.
27143 (aarch64_abs<mode>): Rename to...
27144 (aarch64_abs<mode><vczle><vczbe>): ... This.
27145 (one_cmpl<mode>2): Rename to...
27146 (one_cmpl<mode>2<vczle><vczbe>): ... This.
27147 (clrsb<mode>2): Rename to...
27148 (clrsb<mode>2<vczle><vczbe>): ... This.
27149 (clz<mode>2): Rename to...
27150 (clz<mode>2<vczle><vczbe>): ... This.
27151 (popcount<mode>2): Rename to...
27152 (popcount<mode>2<vczle><vczbe>): ... This.
27154 2023-04-28 Jakub Jelinek <jakub@redhat.com>
27156 * gimple-range-op.cc (class cfn_sqrt): New type.
27157 (op_cfn_sqrt): New variable.
27158 (gimple_range_op_handler::maybe_builtin_call): Handle
27159 CASE_CFN_SQRT{,_FN}.
27161 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
27162 Jakub Jelinek <jakub@redhat.com>
27164 * value-range.h (frange_nextafter): Declare.
27165 * gimple-range-op.cc (class cfn_sincos): New.
27166 (op_cfn_sin, op_cfn_cos): New variables.
27167 (gimple_range_op_handler::maybe_builtin_call): Handle
27168 CASE_CFN_{SIN,COS}{,_FN}.
27170 2023-04-28 Jakub Jelinek <jakub@redhat.com>
27172 * target.def (libm_function_max_error): New target hook.
27173 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
27174 * doc/tm.texi: Regenerated.
27175 * targhooks.h (default_libm_function_max_error,
27176 glibc_linux_libm_function_max_error): Declare.
27177 * targhooks.cc: Include case-cfn-macros.h.
27178 (default_libm_function_max_error,
27179 glibc_linux_libm_function_max_error): New functions.
27180 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27181 * config/linux-protos.h (linux_libm_function_max_error): Declare.
27182 * config/linux.cc: Include target.h and targhooks.h.
27183 (linux_libm_function_max_error): New function.
27184 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
27185 (arc_libm_function_max_error): New function.
27186 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27187 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
27188 (ix86_libm_function_max_error): New function.
27189 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27190 * config/rs6000/rs6000-protos.h
27191 (rs6000_linux_libm_function_max_error): Declare.
27192 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
27193 and case-cfn-macros.h.
27194 (rs6000_linux_libm_function_max_error): New function.
27195 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27196 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27197 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
27198 (or1k_libm_function_max_error): New function.
27199 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27201 2023-04-28 Alexandre Oliva <oliva@adacore.com>
27203 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
27204 Move detach value calls...
27205 (pass_harden_conditional_branches::execute): ... here.
27206 (pass_harden_compares::execute): Detach values before
27209 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
27211 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
27212 (cml<addsub_as><mode>4): Likewise.
27213 (vec_addsub<mode>3): Likewise.
27214 (cadd<rot><mode>3): Likewise.
27215 (vec_fmaddsub<mode>4): Likewise.
27216 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
27218 2023-04-27 Andrew Pinski <apinski@marvell.com>
27220 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
27221 up to 2 min/max expressions in the sequence/match code.
27223 2023-04-27 Andrew Pinski <apinski@marvell.com>
27225 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
27227 * tree-eh.cc (operation_could_trap_helper_p): Treate
27228 MIN_EXPR/MAX_EXPR similar as other comparisons.
27230 2023-04-27 Andrew Pinski <apinski@marvell.com>
27232 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
27234 (cond_if_else_store_replacement): Likewise.
27235 (get_non_trapping): Likewise.
27236 (store_elim_worker): Move into ...
27237 (pass_cselim::execute): This.
27239 2023-04-27 Andrew Pinski <apinski@marvell.com>
27241 * tree-ssa-phiopt.cc (two_value_replacement): Remove
27243 (match_simplify_replacement): Likewise.
27244 (factor_out_conditional_conversion): Likewise.
27245 (value_replacement): Likewise.
27246 (minmax_replacement): Likewise.
27247 (spaceship_replacement): Likewise.
27248 (cond_removal_in_builtin_zero_pattern): Likewise.
27249 (hoist_adjacent_loads): Likewise.
27250 (tree_ssa_phiopt_worker): Move into ...
27251 (pass_phiopt::execute): this.
27253 2023-04-27 Andrew Pinski <apinski@marvell.com>
27255 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
27256 do_store_elim argument and split that part out to ...
27257 (store_elim_worker): This new function.
27258 (pass_cselim::execute): Call store_elim_worker.
27259 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
27261 2023-04-27 Jan Hubicka <jh@suse.cz>
27263 * cfgloopmanip.h (unloop_loops): Export.
27264 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
27265 that no longer loop.
27266 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
27267 vectors of loops to unloop.
27268 (canonicalize_induction_variables): Free vectors here.
27269 (tree_unroll_loops_completely): Free vectors here.
27271 2023-04-27 Richard Biener <rguenther@suse.de>
27273 PR tree-optimization/109170
27274 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
27275 Handle __builtin_expect and similar via cfn_pass_through_arg1
27276 and inspecting the calls fnspec.
27277 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
27278 and BUILT_IN_EXPECT_WITH_PROBABILITY.
27280 2023-04-27 Alexandre Oliva <oliva@adacore.com>
27282 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
27284 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
27286 PR tree-optimization/109639
27287 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
27288 (propagate_vr_across_jump_function): Same.
27289 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
27290 * ipa-prop.h (ipa_range_set_and_normalize): New.
27291 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
27293 2023-04-27 Richard Biener <rguenther@suse.de>
27295 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
27296 create a CTOR operand in the result when simplifying GIMPLE.
27298 2023-04-27 Richard Biener <rguenther@suse.de>
27300 * gimplify.cc (gimplify_compound_lval): When the base
27301 gimplified to a register make sure to split up chains
27304 2023-04-27 Richard Biener <rguenther@suse.de>
27307 * ipa-param-manipulation.h
27308 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
27310 * ipa-param-manipulation.cc
27311 (ipa_param_body_adjustments::modify_expression): Likewise.
27312 When we need a conversion and the replacement is a register
27313 split the conversion out.
27314 (ipa_param_body_adjustments::modify_assignment): Pass
27315 extra_stmts to RHS modify_expression.
27317 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
27319 * doc/extend.texi (Zero Length): Describe example.
27321 2023-04-27 Richard Biener <rguenther@suse.de>
27323 PR tree-optimization/109594
27324 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
27325 what we rewrite to a register based on the above.
27327 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
27329 * config/riscv/riscv.cc: Fix whitespace.
27330 * config/riscv/sync.md: Fix whitespace.
27332 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27334 PR tree-optimization/108697
27335 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
27336 not clear the vector on an out of range query.
27337 (ssa_cache::dump): Use dump_range_query instead of get_range.
27338 (ssa_cache::dump_range_query): New.
27339 (ssa_lazy_cache::dump_range_query): New.
27340 (ssa_lazy_cache::set_range): New.
27341 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
27342 (class ssa_lazy_cache): New.
27343 (ssa_lazy_cache::ssa_lazy_cache): New.
27344 (ssa_lazy_cache::~ssa_lazy_cache): New.
27345 (ssa_lazy_cache::get_range): New.
27346 (ssa_lazy_cache::clear_range): New.
27347 (ssa_lazy_cache::clear): New.
27348 (ssa_lazy_cache::dump): New.
27349 * gimple-range-path.cc (path_range_query::path_range_query): Do
27350 not allocate a ssa_cache object nor has_cache bitmap.
27351 (path_range_query::~path_range_query): Do not free objects.
27352 (path_range_query::clear_cache): Remove.
27353 (path_range_query::get_cache): Adjust.
27354 (path_range_query::set_cache): Remove.
27355 (path_range_query::dump): Don't call through a pointer.
27356 (path_range_query::internal_range_of_expr): Set cache directly.
27357 (path_range_query::reset_path): Clear cache directly.
27358 (path_range_query::ssa_range_in_phi): Fold with globals only.
27359 (path_range_query::compute_ranges_in_phis): Simply set range.
27360 (path_range_query::compute_ranges_in_block): Call cache directly.
27361 * gimple-range-path.h (class path_range_query): Replace bitmap
27362 and cache pointer with lazy cache object.
27363 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
27365 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27367 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
27368 (ssa_cache::~ssa_cache): Rename.
27369 (ssa_cache::has_range): New.
27370 (ssa_cache::get_range): Rename.
27371 (ssa_cache::set_range): Rename.
27372 (ssa_cache::clear_range): Rename.
27373 (ssa_cache::clear): Rename.
27374 (ssa_cache::dump): Rename and use get_range.
27375 (ranger_cache::get_global_range): Use get_range and set_range.
27376 (ranger_cache::range_of_def): Use get_range.
27377 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
27378 (class ranger_cache): Use ssa_cache.
27379 * gimple-range-path.cc (path_range_query::path_range_query): Use
27381 (path_range_query::get_cache): Use get_range.
27382 (path_range_query::set_cache): Use set_range.
27383 * gimple-range-path.h (class path_range_query): Use ssa_cache.
27384 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
27385 (assume_query::range_of_expr): Use get_range.
27386 (assume_query::assume_query): Use set_range.
27387 (assume_query::calculate_op): Use get_range and set_range.
27388 * gimple-range.h (class assume_query): Use ssa_cache.
27390 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27392 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
27393 and local to optionally zero memory.
27394 (br_vector::grow): Only zero memory if flag is set.
27395 (class sbr_lazy_vector): New.
27396 (sbr_lazy_vector::sbr_lazy_vector): New.
27397 (sbr_lazy_vector::set_bb_range): New.
27398 (sbr_lazy_vector::get_bb_range): New.
27399 (sbr_lazy_vector::bb_range_p): New.
27400 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
27401 * gimple-range-gori.cc (gori_map::calculate_gori): Use
27402 param_vrp_switch_limit.
27403 (gori_compute::gori_compute): Use param_vrp_switch_limit.
27404 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
27405 (vrp_switch_limit): Rename from evrp_switch_limit.
27406 (vrp_vector_threshold): New.
27408 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27410 * value-relation.cc (dom_oracle::query_relation): Check early for lack
27412 * value-relation.h (equiv_oracle::has_equiv_p): New.
27414 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27416 PR tree-optimization/109417
27417 * gimple-range-gori.cc (range_def_chain::register_dependency):
27418 Save the ssa version number, not the pointer.
27419 (gori_compute::may_recompute_p): No need to check if a dependency
27420 is in the free list.
27421 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
27422 fields to be unsigned int instead of trees.
27423 (ange_def_chain::depend1): Adjust.
27424 (ange_def_chain::depend2): Adjust.
27425 * gimple-range.h: Include "ssa.h" to inline ssa_name().
27427 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
27429 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
27430 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
27431 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
27433 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
27436 * config/riscv/riscv-protos.h: Add helper function stubs.
27437 * config/riscv/riscv.cc: Add helper functions for subword masking.
27438 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
27439 -mno-inline-atomics.
27440 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
27441 fetch_and_nand, CAS, and exchange ops.
27442 * doc/invoke.texi: Add blurb regarding new command-line flags
27443 -minline-atomics and -mno-inline-atomics.
27445 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27447 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
27448 Reimplement using standard RTL codes instead of unspec.
27449 (aarch64_rshrn2<mode>_insn_be): Likewise.
27450 (aarch64_rshrn2<mode>): Adjust for the above.
27451 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
27453 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27455 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
27456 with standard RTL codes instead of an UNSPEC.
27457 (aarch64_rshrn<mode>_insn_be): Likewise.
27458 (aarch64_rshrn<mode>): Adjust for the above.
27459 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
27461 2023-04-26 Pan Li <pan2.li@intel.com>
27462 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27464 * config/riscv/riscv.cc (riscv_classify_address): Allow
27465 const0_rtx for the RVV load/store.
27467 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27469 * range-op.cc (range_op_cast_tests): Remove legacy support.
27470 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
27471 * value-range.cc (irange::operator=): Same.
27472 (get_legacy_range): Same.
27473 (irange::copy_legacy_to_multi_range): Delete.
27474 (irange::copy_to_legacy): Delete.
27475 (irange::irange_set_anti_range): Delete.
27476 (irange::set): Remove legacy support.
27477 (irange::verify_range): Same.
27478 (irange::legacy_lower_bound): Delete.
27479 (irange::legacy_upper_bound): Delete.
27480 (irange::legacy_equal_p): Delete.
27481 (irange::operator==): Remove legacy support.
27482 (irange::singleton_p): Same.
27483 (irange::value_inside_range): Same.
27484 (irange::contains_p): Same.
27485 (intersect_ranges): Delete.
27486 (irange::legacy_intersect): Delete.
27487 (union_ranges): Delete.
27488 (irange::legacy_union): Delete.
27489 (irange::legacy_verbose_union_): Delete.
27490 (irange::legacy_verbose_intersect): Delete.
27491 (irange::irange_union): Remove legacy support.
27492 (irange::irange_intersect): Same.
27493 (irange::intersect): Same.
27494 (irange::invert): Same.
27495 (ranges_from_anti_range): Delete.
27496 (gt_pch_nx): Adjust for legacy removal.
27498 (range_tests_legacy): Delete.
27499 (range_tests_misc): Adjust for legacy removal.
27500 (range_tests): Same.
27501 * value-range.h (class irange): Same.
27502 (irange::legacy_mode_p): Delete.
27503 (ranges_from_anti_range): Delete.
27504 (irange::nonzero_p): Adjust for legacy removal.
27505 (irange::lower_bound): Same.
27506 (irange::upper_bound): Same.
27507 (irange::union_): Same.
27508 (irange::intersect): Same.
27509 (irange::set_nonzero): Same.
27510 (irange::set_zero): Same.
27511 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
27513 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27515 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
27516 of range_has_numeric_bounds_p with irange API.
27517 (range_has_numeric_bounds_p): Delete.
27518 * value-range.h (range_has_numeric_bounds_p): Delete.
27520 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27522 * tree-data-ref.cc (compute_distributive_range): Replace uses of
27523 range_int_cst_p with irange API.
27524 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
27525 * tree-vrp.h (range_int_cst_p): Delete.
27526 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
27527 range_int_cst_p with irange API.
27528 (vr_set_zero_nonzero_bits): Same.
27529 (range_fits_type_p): Same.
27530 (simplify_using_ranges::simplify_casted_cond): Same.
27531 * tree-vrp.cc (range_int_cst_p): Remove.
27533 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27535 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
27537 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27539 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
27540 API uses to new API.
27541 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
27542 * internal-fn.cc (get_min_precision): Same.
27544 * tree-affine.cc (expr_to_aff_combination): Same.
27545 * tree-data-ref.cc (dr_step_indicator): Same.
27546 * tree-dfa.cc (get_ref_base_and_extent): Same.
27547 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
27548 * tree-ssa-phiopt.cc (two_value_replacement): Same.
27549 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
27550 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
27551 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
27552 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
27553 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
27554 * tree.cc (get_range_pos_neg): Same.
27556 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27558 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
27559 vrange::dump instead of ad-hoc dumper.
27560 * tree-ssa-strlen.cc (dump_strlen_info): Same.
27561 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
27564 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27566 * range-op.cc (operator_cast::op1_range): Use
27567 create_possibly_reversed_range.
27568 (operator_bitwise_and::simple_op1_range_solver): Same.
27569 * value-range.cc (swap_out_of_order_endpoints): Delete.
27570 (irange::set): Remove call to swap_out_of_order_endpoints.
27572 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27574 * builtins.cc (determine_block_size): Convert use of legacy API to
27576 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
27577 (array_bounds_checker::check_array_ref): Same.
27578 * gimple-ssa-warn-restrict.cc
27579 (builtin_memref::extend_offset_range): Same.
27580 * ipa-cp.cc (ipcp_store_vr_results): Same.
27581 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
27582 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
27583 (ipa_write_jump_function): Same.
27584 * pointer-query.cc (get_size_range): Same.
27585 * tree-data-ref.cc (split_constant_offset): Same.
27586 * tree-ssa-strlen.cc (get_range): Same.
27587 (maybe_diag_stxncpy_trunc): Same.
27588 (strlen_pass::get_len_or_size): Same.
27589 (strlen_pass::count_nonzero_bytes_addr): Same.
27590 * tree-vect-patterns.cc (vect_get_range_info): Same.
27591 * value-range.cc (irange::maybe_anti_range): Remove.
27592 (get_legacy_range): New.
27593 (irange::copy_to_legacy): Use get_legacy_range.
27594 (ranges_from_anti_range): Same.
27595 * value-range.h (class irange): Remove maybe_anti_range.
27596 (get_legacy_range): New.
27597 * vr-values.cc (check_for_binary_op_overflow): Convert use of
27598 legacy API to get_legacy_range.
27599 (compare_ranges): Same.
27600 (compare_range_with_value): Same.
27601 (bounds_of_var_in_loop): Same.
27602 (find_case_label_ranges): Same.
27603 (simplify_using_ranges::simplify_switch_using_ranges): Same.
27605 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27607 * value-range-pretty-print.cc (vrange_printer::visit): Remove
27609 * value-range.cc (irange::constant_p): Remove.
27610 (irange::get_nonzero_bits_from_range): Remove constant_p use.
27611 * value-range.h (class irange): Remove constant_p.
27612 (irange::num_pairs): Remove constant_p use.
27614 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27616 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
27618 (irange::set): Same.
27619 (irange::legacy_lower_bound): Same.
27620 (irange::legacy_upper_bound): Same.
27621 (irange::contains_p): Same.
27622 (range_tests_legacy): Same.
27623 (irange::normalize_addresses): Remove.
27624 (irange::normalize_symbolics): Remove.
27625 (irange::symbolic_p): Remove.
27626 * value-range.h (class irange): Remove symbolic_p,
27627 normalize_symbolics, and normalize_addresses.
27628 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
27629 Remove symbolics support.
27631 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27633 * value-range.cc (irange::may_contain_p): Remove.
27634 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
27635 usage with contains_p.
27636 * vr-values.cc (compare_range_with_value): Same.
27638 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27640 * tree-vrp.cc (supported_types_p): Remove.
27641 (defined_ranges_p): Remove.
27642 (range_fold_binary_expr): Remove.
27643 (range_fold_unary_expr): Remove.
27644 * tree-vrp.h (range_fold_unary_expr): Remove.
27645 (range_fold_binary_expr): Remove.
27647 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27649 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
27650 (ipa_value_range_from_jfunc): Same.
27651 (propagate_vr_across_jump_function): Same.
27652 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
27653 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
27654 * vr-values.cc (bounds_of_var_in_loop): Same.
27656 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27658 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
27659 Add irange argument.
27660 (check_out_of_bounds_and_warn): Remove check for vr.
27661 (array_bounds_checker::check_array_ref): Remove pointer qualifier
27662 for vr and adjust accordingly.
27663 * gimple-array-bounds.h (get_value_range): Add irange argument.
27664 * value-query.cc (class equiv_allocator): Delete.
27665 (range_query::get_value_range): Delete.
27666 (range_query::range_query): Remove allocator access.
27667 (range_query::~range_query): Same.
27668 * value-query.h (get_value_range): Delete.
27670 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
27671 call to get_value_range.
27672 (check_for_binary_op_overflow): Same.
27673 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
27674 (simplify_using_ranges::simplify_abs_using_ranges): Same.
27675 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
27676 (simplify_using_ranges::simplify_casted_cond): Same.
27677 (simplify_using_ranges::simplify_switch_using_ranges): Same.
27678 (simplify_using_ranges::two_valued_val_range_p): Same.
27680 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27683 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
27685 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
27686 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
27687 (simplify_using_ranges::legacy_fold_cond): ...this.
27688 (simplify_using_ranges::fold_cond): Rename
27689 vrp_evaluate_conditional_warnv_with_ops to
27690 legacy_fold_cond_overflow.
27691 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
27692 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
27693 legacy_fold_cond_overflow respectively.
27695 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27697 * vr-values.cc (get_vr_for_comparison): Remove.
27698 (compare_name_with_value): Same.
27699 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
27700 compare_name_with_value.
27701 * vr-values.h: Remove compare_name_with_value.
27702 Remove get_vr_for_comparison.
27704 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
27706 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
27707 (bswapsi2): New define_insn.
27708 (swaphi): New define_insn to exchange two registers (swpw).
27709 (define_peephole2): Recognize exchange of registers as swaphi.
27711 2023-04-26 Richard Biener <rguenther@suse.de>
27713 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
27715 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
27716 * predict.cc (apply_return_prediction): Likewise.
27717 * sese.cc (set_ifsese_condition): Likewise. Simplify.
27718 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
27719 (make_edges_bb): Likewise.
27720 (make_cond_expr_edges): Likewise.
27721 (end_recording_case_labels): Likewise.
27722 (make_gimple_asm_edges): Likewise.
27723 (cleanup_dead_labels): Likewise.
27724 (group_case_labels): Likewise.
27725 (gimple_can_merge_blocks_p): Likewise.
27726 (gimple_merge_blocks): Likewise.
27727 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
27728 (gimple_duplicate_sese_tail): Avoid last_stmt.
27729 (find_loop_dist_alias): Likewise.
27730 (gimple_block_ends_with_condjump_p): Likewise.
27731 (gimple_purge_dead_eh_edges): Likewise.
27732 (gimple_purge_dead_abnormal_call_edges): Likewise.
27733 (pass_warn_function_return::execute): Likewise.
27734 (execute_fixup_cfg): Likewise.
27735 * tree-eh.cc (redirect_eh_edge_1): Likewise.
27736 (pass_lower_resx::execute): Likewise.
27737 (pass_lower_eh_dispatch::execute): Likewise.
27738 (cleanup_empty_eh): Likewise.
27739 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
27740 (predicate_bbs): Likewise.
27741 (ifcvt_split_critical_edges): Likewise.
27742 * tree-loop-distribution.cc (create_edge_for_control_dependence):
27744 (loop_distribution::transform_reduction_loop): Likewise.
27745 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
27746 (try_transform_to_exit_first_loop_alt): Likewise.
27747 (transform_to_exit_first_loop): Likewise.
27748 (create_parallel_loop): Likewise.
27749 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
27750 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
27751 (eliminate_unnecessary_stmts): Likewise.
27753 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
27755 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
27756 (pass_tree_ifcombine::execute): Likewise.
27757 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
27758 (should_duplicate_loop_header_p): Likewise.
27759 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
27760 (tree_estimate_loop_size): Likewise.
27761 (try_unroll_loop_completely): Likewise.
27762 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
27763 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
27764 (canonicalize_loop_ivs): Likewise.
27765 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
27766 (bound_difference): Likewise.
27767 (number_of_iterations_popcount): Likewise.
27768 (number_of_iterations_cltz): Likewise.
27769 (number_of_iterations_cltz_complement): Likewise.
27770 (simplify_using_initial_conditions): Likewise.
27771 (number_of_iterations_exit_assumptions): Likewise.
27772 (loop_niter_by_eval): Likewise.
27773 (estimate_numbers_of_iterations): Likewise.
27775 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27777 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
27779 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
27782 * config/rs6000/rs6000-builtins.def
27783 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
27784 __builtin_vsx_scalar_cmp_exp_qp_lt,
27785 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
27788 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
27791 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
27792 easy_vector_constant with const_vector_each_byte_same, add
27793 handlings in preparation for !easy_vector_constant, and update
27794 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
27795 * config/rs6000/predicates.md (const_vector_each_byte_same): New
27798 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27800 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
27801 (*pred_ltge<mode>_merge_tie_mask): Ditto.
27802 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
27803 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
27804 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
27805 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
27806 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
27808 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27810 * config/riscv/vector.md: Fix redundant vmv1r.v.
27812 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27814 * config/riscv/vector.md: Fix RA constraint.
27816 2023-04-26 Pan Li <pan2.li@intel.com>
27819 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
27820 check for vn_reference equal.
27822 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27824 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
27825 auto-vectorization preference.
27826 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
27827 auto-vectorization.
27828 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
27830 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
27832 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
27833 and bclridisi_nottwobits patterns.
27834 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
27835 predicate to avoid splitting arith constants.
27836 (const_nottwobits_not_arith_operand): New predicate.
27838 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
27840 * recog.cc (peep2_attempt, peep2_update_life): Correct
27841 head-comment description of parameter match_len.
27843 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
27845 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
27846 riscv_split_symbol() drop in_splitter arg.
27847 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
27848 riscv_split_symbol() drop in_splitter arg.
27849 riscv_force_temporary() drop in_splitter arg.
27850 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
27851 riscv_split_symbol() drop in_splitter arg.
27853 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
27855 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
27856 superfluous debug temporaries for single GIMPLE assignments.
27858 2023-04-25 Richard Biener <rguenther@suse.de>
27860 PR tree-optimization/109609
27861 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
27863 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
27864 the size given by arg_max_access_size_given_by_arg_p as
27865 maximum, not exact, size.
27867 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27870 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
27871 (orn<mode>3<vczle><vczbe>): ... This.
27872 (bic<mode>3): Rename to...
27873 (bic<mode>3<vczle><vczbe>): ... This.
27874 (<su><maxmin><mode>3): Rename to...
27875 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
27877 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27879 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
27880 * config/aarch64/iterators.md (VQDIV): New mode iterator.
27881 (vnx2di): New mode attribute.
27883 2023-04-25 Richard Biener <rguenther@suse.de>
27885 PR rtl-optimization/109585
27886 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
27888 2023-04-25 Jakub Jelinek <jakub@redhat.com>
27891 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
27892 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
27893 is larger than signed int maximum.
27895 2023-04-25 Martin Liska <mliska@suse.cz>
27897 * doc/gcov.texi: Document the new "calls" field and document
27898 the API bump. Mention also "block_ids" for lines.
27899 * gcov.cc (output_intermediate_json_line): Output info about
27900 calls and extend branches as well.
27901 (generate_results): Bump version to 2.
27902 (output_line_details): Use block ID instead of a non-sensual
27905 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
27907 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
27908 length attribute for the first (memory operand) alternative.
27910 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
27912 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
27913 * config/aarch64/constraints.md: Make "Umn" relaxed memory
27915 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
27917 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
27919 * value-range.cc (frange::set): Adjust constructor.
27920 * value-range.h (nan_state::nan_state): Replace default
27921 constructor with one taking an argument.
27923 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
27925 * ipa-cp.cc (ipa_range_contains_p): New.
27926 (decide_whether_version_node): Use it.
27928 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
27930 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
27931 simplify two successive VEC_PERM_EXPRs with same VLA mask,
27932 where mask chooses elements in reverse order.
27934 2023-04-24 Andrew Pinski <apinski@marvell.com>
27936 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
27937 and support diamond shaped basic block form.
27938 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
27940 2023-04-24 Andrew Pinski <apinski@marvell.com>
27942 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
27943 Instead of calling last_and_only_stmt, look for the last statement
27946 2023-04-24 Andrew Pinski <apinski@marvell.com>
27948 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
27950 (match_simplify_replacement): Call
27951 empty_bb_or_one_feeding_into_p instead of doing it inline.
27953 2023-04-24 Andrew Pinski <apinski@marvell.com>
27955 PR tree-optimization/68894
27956 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
27957 continue for the do_hoist_loads diamond case.
27959 2023-04-24 Andrew Pinski <apinski@marvell.com>
27961 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
27962 code for better code readability.
27964 2023-04-24 Andrew Pinski <apinski@marvell.com>
27966 PR tree-optimization/109604
27967 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
27968 diamond form check from ...
27969 (minmax_replacement): Here.
27971 2023-04-24 Patrick Palka <ppalka@redhat.com>
27973 * tree.cc (strip_array_types): Don't define here.
27974 (is_typedef_decl): Don't define here.
27975 (typedef_variant_p): Don't define here.
27976 * tree.h (strip_array_types): Define here.
27977 (is_typedef_decl): Define here.
27978 (typedef_variant_p): Define here.
27980 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
27982 * doc/generic.texi (OpenMP): Add != to allowed
27983 conditions and state that vars can be unsigned.
27984 * tree.def (OMP_FOR): Likewise.
27986 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27988 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
27990 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
27992 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
27993 Remove explicit Solaris 11 references.
27995 (Options specification, --with-gnu-as): as and gas always differ
27997 Remove /usr/ccs/bin reference.
27998 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
27999 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
28000 (*-*-solaris2*): ... here.
28001 Update bundled GCC versions.
28002 Don't refer to pre-built binaries.
28003 Remove /bin/sh warning.
28004 Update assembler, linker recommendations.
28005 Document GNAT bootstrap compiler.
28006 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
28007 (sparc64-*-solaris2*): Move content...
28008 (sparcv9-*-solaris2*): ...here.
28009 Add GDC for 64-bit bootstrap compilers.
28011 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28014 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
28016 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
28019 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28021 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
28022 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
28023 (aarch64_<su>abal2<mode>): New define_expand.
28024 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
28025 (aarch64_rtx_costs): Handle ABD rtxes.
28026 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
28027 * config/aarch64/iterators.md (ABAL2): Delete.
28028 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
28030 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28032 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
28033 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
28034 (<sur>sadv16qi): Rename to...
28035 (<su>sadv16qi): ... This. Adjust for the above.
28036 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
28037 (<su>sad<vsi2qi>): ... This. Adjust for the above.
28038 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
28039 * config/aarch64/iterators.md (ABAL): Delete.
28040 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
28042 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28044 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
28045 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
28046 (aarch64_<su>abdl2<mode>): New define_expand.
28047 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
28048 * config/aarch64/iterators.md (ABDL2): Delete.
28049 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
28051 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28053 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
28054 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
28056 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
28057 * config/aarch64/iterators.md (ABDL): Delete.
28058 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
28060 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28062 * config/aarch64/aarch64-simd.md
28063 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
28065 2023-04-24 Richard Biener <rguenther@suse.de>
28067 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
28069 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
28071 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
28072 (set_switch_stmt_execution_predicate): Likewise.
28073 (phi_result_unknown_predicate): Likewise.
28074 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
28075 (ipa_analyze_indirect_call_uses): Likewise.
28076 * predict.cc (predict_iv_comparison): Likewise.
28077 (predict_extra_loop_exits): Likewise.
28078 (predict_loops): Likewise.
28079 (tree_predict_by_opcode): Likewise.
28080 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
28082 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
28083 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
28084 (replace_phi_edge_with_variable): Likewise.
28085 (two_value_replacement): Likewise.
28086 (value_replacement): Likewise.
28087 (minmax_replacement): Likewise.
28088 (spaceship_replacement): Likewise.
28089 (cond_removal_in_builtin_zero_pattern): Likewise.
28090 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
28091 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
28092 (vn_phi_lookup): Likewise.
28093 (vn_phi_insert): Likewise.
28094 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
28095 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
28097 (back_threader_profitability::possibly_profitable_path_p):
28099 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
28101 * tree-switch-conversion.cc (pass_convert_switch::execute):
28103 (pass_lower_switch<O0>::execute): Likewise.
28104 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
28105 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
28106 * tree-vect-slp.cc (vect_slp_function): Likewise.
28107 * tree-vect-stmts.cc (cfun_returns): Likewise.
28108 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
28109 (vect_loop_dist_alias_call): Likewise.
28111 2023-04-24 Richard Biener <rguenther@suse.de>
28113 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
28115 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28117 * config/riscv/riscv-vsetvl.cc
28118 (vector_infos_manager::all_avail_in_compatible_p): New function.
28119 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
28120 * config/riscv/riscv-vsetvl.h: New function.
28122 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28124 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
28125 comment for cleanup_insns.
28127 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28129 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
28130 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
28131 with the fault first load property.
28133 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28135 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
28136 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
28138 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28141 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
28142 (aarch64_addp<mode><vczle><vczbe>): ... This.
28144 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28146 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
28147 provide reasonable values for common arithmetic operations and
28148 immediate operands (in several machine modes).
28150 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28152 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
28153 format specifier to output high_part register name of SImode reg.
28154 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
28155 (zero_extendqihi2): Fix lengths, consistent formatting and add
28156 "and Rx,#255" alternative, for documentation purposes.
28157 (zero_extendhisi2): New define_insn.
28159 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28161 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
28162 SImode shifts by two by performing a single bit SImode shift twice.
28164 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
28166 PR tree-optimization/109593
28167 * value-range.cc (frange::operator==): Handle NANs.
28169 2023-04-23 liuhongt <hongtao.liu@intel.com>
28171 PR rtl-optimization/108707
28172 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
28173 GENERAL_REGS when preferred reg_class is not known.
28175 2023-04-22 Andrew Pinski <apinski@marvell.com>
28177 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
28178 Change the code around slightly to move diamond
28179 handling for do_store_elim/do_hoist_loads out of
28182 2023-04-22 Andrew Pinski <apinski@marvell.com>
28184 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
28185 Remove check on empty_block_p.
28187 2023-04-22 Jakub Jelinek <jakub@redhat.com>
28189 PR bootstrap/109589
28190 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
28191 * realmpfr.h (class auto_mpfr): Likewise.
28193 2023-04-22 Jakub Jelinek <jakub@redhat.com>
28195 PR tree-optimization/109583
28196 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
28197 if vec_mode is not VECTOR_MODE_P.
28199 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
28200 Ondrej Kubanek <kubanek0ondrej@gmail.com>
28202 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
28203 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
28204 loop profile and bounds after header duplication.
28205 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
28206 Break out from try_peel_loop; fix handling of 0 iterations.
28207 (try_peel_loop): Use adjust_loop_info_after_peeling.
28209 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
28211 PR tree-optimization/109546
28212 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
28213 not fold conditions with ADDR_EXPR early.
28215 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28217 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
28218 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
28220 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
28221 (*aarch64_<optab><mode>3_zero): Define.
28222 (*aarch64_<optab><mode>3_cssc): Likewise.
28223 * config/aarch64/iterators.md (maxminand): New code attribute.
28225 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28228 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
28229 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
28231 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
28232 (aarch64_override_options_internal): Handle the above.
28233 (aarch64_output_load_tp): New function.
28234 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
28235 aarch64_output_load_tp.
28236 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
28237 (mtp=): New option.
28238 * doc/invoke.texi (AArch64 Options): Document -mtp=.
28240 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28243 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
28244 (add_vec_concat_subst_be): Likewise.
28247 (add<mode>3): Rename to...
28248 (add<mode>3<vczle><vczbe>): ... This.
28249 (sub<mode>3): Rename to...
28250 (sub<mode>3<vczle><vczbe>): ... This.
28251 (mul<mode>3): Rename to...
28252 (mul<mode>3<vczle><vczbe>): ... This.
28253 (and<mode>3): Rename to...
28254 (and<mode>3<vczle><vczbe>): ... This.
28255 (ior<mode>3): Rename to...
28256 (ior<mode>3<vczle><vczbe>): ... This.
28257 (xor<mode>3): Rename to...
28258 (xor<mode>3<vczle><vczbe>): ... This.
28259 * config/aarch64/iterators.md (VDZ): Define.
28261 2023-04-21 Patrick Palka <ppalka@redhat.com>
28263 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
28266 2023-04-21 Jan Hubicka <jh@suse.cz>
28268 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
28271 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
28273 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
28274 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
28276 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28278 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
28279 force_reg instead of copy_to_mode_reg.
28280 (aarch64_expand_vector_init): Likewise.
28282 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
28284 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
28285 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
28286 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
28287 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
28288 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
28289 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
28290 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
28291 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
28292 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
28293 * config/i386/predicates.md (index_register_operand):
28294 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
28295 * config/i386/i386.cc (ix86_legitimate_address_p): Use
28296 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
28297 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
28299 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
28300 Ondrej Kubanek <kubanek0ondrej@gmail.com>
28302 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
28305 2023-04-21 Richard Biener <rguenther@suse.de>
28307 * is-a.h (safe_is_a): New.
28309 2023-04-21 Richard Biener <rguenther@suse.de>
28311 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
28312 (gphi_iterator::operator*): Likewise.
28314 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
28315 Michal Jires <michal@jires.eu>
28317 * ipa-inline.cc (class inline_badness): New class.
28318 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
28320 (update_edge_key): Update.
28321 (lookup_recursive_calls): Likewise.
28322 (recursive_inlining): Likewise.
28323 (add_new_edges_to_heap): Likewise.
28324 (inline_small_functions): Likewise.
28326 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
28328 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
28330 2023-04-21 Richard Biener <rguenther@suse.de>
28332 PR tree-optimization/109573
28333 * tree-vect-loop.cc (vectorizable_live_operation): Allow
28334 unhandled SSA copy as well. Demote assert to checking only.
28336 2023-04-21 Richard Biener <rguenther@suse.de>
28338 * df-core.cc (df_analyze): Compute RPO on the reverse graph
28339 for DF_BACKWARD problems.
28340 (loop_post_order_compute): Rename to ...
28341 (loop_rev_post_order_compute): ... this, compute a RPO.
28342 (loop_inverted_post_order_compute): Rename to ...
28343 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
28344 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
28345 problems, RPO on the inverted graph for DF_BACKWARD.
28347 2023-04-21 Richard Biener <rguenther@suse.de>
28349 * cfganal.h (inverted_rev_post_order_compute): Rename
28351 (inverted_post_order_compute): ... this. Add struct function
28352 argument, change allocation to a C array.
28353 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
28354 * lcm.cc (compute_antinout_edge): Adjust.
28355 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
28356 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
28357 * tree-ssa-pre.cc (compute_antic): Likewise.
28359 2023-04-21 Richard Biener <rguenther@suse.de>
28361 * df.h (df_d::postorder_inverted): Change back to int *,
28363 * df-core.cc (rest_of_handle_df_finish): Adjust.
28364 (df_analyze_1): Likewise.
28365 (df_analyze): For DF_FORWARD problems use RPO on the forward
28367 (loop_inverted_post_order_compute): Adjust API.
28368 (df_analyze_loop): Adjust.
28369 (df_get_n_blocks): Likewise.
28370 (df_get_postorder): Likewise.
28372 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28375 * config/riscv/riscv-vsetvl.cc
28376 (vector_infos_manager::all_empty_predecessor_p): New function.
28377 (pass_vsetvl::backward_demand_fusion): Ditto.
28378 * config/riscv/riscv-vsetvl.h: Ditto.
28380 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
28383 * config/riscv/generic.md: Change standard names to insn names.
28385 2023-04-21 Richard Biener <rguenther@suse.de>
28387 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
28388 (compute_laterin): Use RPO.
28389 (compute_available): Likewise.
28391 2023-04-21 Peng Fan <fanpeng@loongson.cn>
28393 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
28395 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28398 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
28399 (vector_insn_info::skip_avl_compatible_p): Ditto.
28400 (vector_insn_info::merge): Remove default value.
28401 (pass_vsetvl::compute_local_backward_infos): Ditto.
28402 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
28403 * config/riscv/riscv-vsetvl.h: Ditto.
28405 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
28407 * doc/extend.texi (Common Function Attributes): Remove duplicate
28410 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
28412 PR tree-optimization/109564
28413 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
28414 UNDEFINED range names when deciding if all PHI arguments are the same,
28416 2023-04-20 Jakub Jelinek <jakub@redhat.com>
28418 PR tree-optimization/109011
28419 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
28420 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
28421 .CTZ (X) = PREC - .POPCOUNT (X | -X).
28423 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
28425 * lra-constraints.cc (match_reload): Exclude some hard regs for
28426 multi-reg inout reload pseudos used in asm in different mode.
28428 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
28430 * config/arm/arm.cc (thumb1_legitimate_address_p):
28431 Use VIRTUAL_REGISTER_P predicate.
28432 (arm_eliminable_register): Ditto.
28433 * config/avr/avr.md (push<mode>_1): Ditto.
28434 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
28435 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
28436 * config/i386/predicates.md (register_no_elim_operand): Ditto.
28437 * config/iq2000/predicates.md (call_insn_operand): Ditto.
28438 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
28440 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
28443 * config/i386/predicates.md (extract_operator): New predicate.
28444 * config/i386/i386.md (any_extract): Remove code iterator.
28445 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
28446 (*cmpqi_ext<mode>_1): Ditto.
28447 (*cmpqi_ext<mode>_2): Ditto.
28448 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
28449 (*cmpqi_ext<mode>_3): Ditto.
28450 (*cmpqi_ext<mode>_4): Ditto.
28451 (*extzvqi_mem_rex64): Ditto.
28453 (*insvqi_2): Ditto.
28454 (*extendqi<SWI24:mode>_ext_1): Ditto.
28455 (*addqi_ext<mode>_0): Ditto.
28456 (*addqi_ext<mode>_1): Ditto.
28457 (*addqi_ext<mode>_2): Ditto.
28458 (*subqi_ext<mode>_0): Ditto.
28459 (*subqi_ext<mode>_2): Ditto.
28460 (*testqi_ext<mode>_1): Ditto.
28461 (*testqi_ext<mode>_2): Ditto.
28462 (*andqi_ext<mode>_0): Ditto.
28463 (*andqi_ext<mode>_1): Ditto.
28464 (*andqi_ext<mode>_1_cc): Ditto.
28465 (*andqi_ext<mode>_2): Ditto.
28466 (*<any_or:code>qi_ext<mode>_0): Ditto.
28467 (*<any_or:code>qi_ext<mode>_1): Ditto.
28468 (*<any_or:code>qi_ext<mode>_2): Ditto.
28469 (*xorqi_ext<mode>_1_cc): Ditto.
28470 (*negqi_ext<mode>_2): Ditto.
28471 (*ashlqi_ext<mode>_2): Ditto.
28472 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
28474 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
28477 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
28478 <bitmanip_insn> as the type to allow for fine grained control of
28479 scheduling these insns.
28480 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
28482 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
28483 pcnt, signed and unsigned min/max.
28485 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28486 kito-cheng <kito.cheng@sifive.com>
28488 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
28490 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28491 kito-cheng <kito.cheng@sifive.com>
28494 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
28495 (pass_vsetvl::cleanup_insns): Fix bug.
28497 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
28499 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
28500 (ldexp<mode>3): Delete.
28501 (ldexp<mode>3<exec>): Change "B" to "A".
28503 2023-04-20 Jakub Jelinek <jakub@redhat.com>
28504 Jonathan Wakely <jwakely@redhat.com>
28506 * tree.h (built_in_function_equal_p): New helper function.
28507 (fndecl_built_in_p): Turn into variadic template to support
28508 1 or more built_in_function arguments.
28509 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
28510 * gimplify.cc (goa_stabilize_expr): Likewise.
28511 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
28512 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
28513 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
28514 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
28515 cgraph_update_edges_for_call_stmt_node,
28516 cgraph_edge::verify_corresponds_to_fndecl,
28517 cgraph_node::verify_node): Likewise.
28518 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
28519 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
28520 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
28522 2023-04-20 Jakub Jelinek <jakub@redhat.com>
28524 PR tree-optimization/109011
28525 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
28526 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
28527 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
28528 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
28529 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
28531 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
28533 2023-04-20 Richard Biener <rguenther@suse.de>
28535 * df-core.cc (rest_of_handle_df_initialize): Remove
28536 computation of df->postorder, df->postorder_inverted and
28539 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
28541 * common/config/i386/i386-common.cc
28542 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
28543 (ix86_handle_option): Set AVX flag for VAES.
28544 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
28545 Add OPTION_MASK_ISA2_VAES_UNSET.
28546 (def_builtin): Share builtin between AES and VAES.
28547 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
28549 * config/i386/i386.md (aes): New isa attribute.
28550 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
28551 (aesenclast): Ditto.
28553 (aesdeclast): Ditto.
28554 * config/i386/vaesintrin.h: Remove redundant avx target push.
28555 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
28556 (_mm_aesdeclast_si128): Ditto.
28557 (_mm_aesenc_si128): Ditto.
28558 (_mm_aesenclast_si128): Ditto.
28560 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
28562 * config/i386/avx2intrin.h
28563 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
28564 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
28565 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
28566 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
28567 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
28568 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
28569 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
28570 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
28571 (_mm_reduce_add_epi16): New instrinsics.
28572 (_mm_reduce_mul_epi16): Ditto.
28573 (_mm_reduce_and_epi16): Ditto.
28574 (_mm_reduce_or_epi16): Ditto.
28575 (_mm_reduce_max_epi16): Ditto.
28576 (_mm_reduce_max_epu16): Ditto.
28577 (_mm_reduce_min_epi16): Ditto.
28578 (_mm_reduce_min_epu16): Ditto.
28579 (_mm256_reduce_add_epi16): Ditto.
28580 (_mm256_reduce_mul_epi16): Ditto.
28581 (_mm256_reduce_and_epi16): Ditto.
28582 (_mm256_reduce_or_epi16): Ditto.
28583 (_mm256_reduce_max_epi16): Ditto.
28584 (_mm256_reduce_max_epu16): Ditto.
28585 (_mm256_reduce_min_epi16): Ditto.
28586 (_mm256_reduce_min_epu16): Ditto.
28587 (_mm_reduce_add_epi8): Ditto.
28588 (_mm_reduce_mul_epi8): Ditto.
28589 (_mm_reduce_and_epi8): Ditto.
28590 (_mm_reduce_or_epi8): Ditto.
28591 (_mm_reduce_max_epi8): Ditto.
28592 (_mm_reduce_max_epu8): Ditto.
28593 (_mm_reduce_min_epi8): Ditto.
28594 (_mm_reduce_min_epu8): Ditto.
28595 (_mm256_reduce_add_epi8): Ditto.
28596 (_mm256_reduce_mul_epi8): Ditto.
28597 (_mm256_reduce_and_epi8): Ditto.
28598 (_mm256_reduce_or_epi8): Ditto.
28599 (_mm256_reduce_max_epi8): Ditto.
28600 (_mm256_reduce_max_epu8): Ditto.
28601 (_mm256_reduce_min_epi8): Ditto.
28602 (_mm256_reduce_min_epu8): Ditto.
28603 * config/i386/avx512vlbwintrin.h:
28604 (_mm_mask_reduce_add_epi16): Ditto.
28605 (_mm_mask_reduce_mul_epi16): Ditto.
28606 (_mm_mask_reduce_and_epi16): Ditto.
28607 (_mm_mask_reduce_or_epi16): Ditto.
28608 (_mm_mask_reduce_max_epi16): Ditto.
28609 (_mm_mask_reduce_max_epu16): Ditto.
28610 (_mm_mask_reduce_min_epi16): Ditto.
28611 (_mm_mask_reduce_min_epu16): Ditto.
28612 (_mm256_mask_reduce_add_epi16): Ditto.
28613 (_mm256_mask_reduce_mul_epi16): Ditto.
28614 (_mm256_mask_reduce_and_epi16): Ditto.
28615 (_mm256_mask_reduce_or_epi16): Ditto.
28616 (_mm256_mask_reduce_max_epi16): Ditto.
28617 (_mm256_mask_reduce_max_epu16): Ditto.
28618 (_mm256_mask_reduce_min_epi16): Ditto.
28619 (_mm256_mask_reduce_min_epu16): Ditto.
28620 (_mm_mask_reduce_add_epi8): Ditto.
28621 (_mm_mask_reduce_mul_epi8): Ditto.
28622 (_mm_mask_reduce_and_epi8): Ditto.
28623 (_mm_mask_reduce_or_epi8): Ditto.
28624 (_mm_mask_reduce_max_epi8): Ditto.
28625 (_mm_mask_reduce_max_epu8): Ditto.
28626 (_mm_mask_reduce_min_epi8): Ditto.
28627 (_mm_mask_reduce_min_epu8): Ditto.
28628 (_mm256_mask_reduce_add_epi8): Ditto.
28629 (_mm256_mask_reduce_mul_epi8): Ditto.
28630 (_mm256_mask_reduce_and_epi8): Ditto.
28631 (_mm256_mask_reduce_or_epi8): Ditto.
28632 (_mm256_mask_reduce_max_epi8): Ditto.
28633 (_mm256_mask_reduce_max_epu8): Ditto.
28634 (_mm256_mask_reduce_min_epi8): Ditto.
28635 (_mm256_mask_reduce_min_epu8): Ditto.
28637 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
28639 * common/config/i386/i386-common.cc
28640 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
28641 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
28642 (OPTION_MASK_ISA_AVX_UNSET):
28643 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
28644 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
28645 * config/i386/i386.md (vpclmulqdqvl): New.
28646 * config/i386/sse.md (pclmulqdq): Add evex encoding.
28647 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
28650 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
28652 * config/i386/avx512vlbwintrin.h
28653 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
28654 (_mm_mask_blend_epi8): Ditto.
28655 (_mm256_mask_blend_epi16): Ditto.
28656 (_mm256_mask_blend_epi8): Ditto.
28657 * config/i386/avx512vlintrin.h
28658 (_mm256_mask_blend_pd): Ditto.
28659 (_mm256_mask_blend_ps): Ditto.
28660 (_mm256_mask_blend_epi64): Ditto.
28661 (_mm256_mask_blend_epi32): Ditto.
28662 (_mm_mask_blend_pd): Ditto.
28663 (_mm_mask_blend_ps): Ditto.
28664 (_mm_mask_blend_epi64): Ditto.
28665 (_mm_mask_blend_epi32): Ditto.
28666 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
28667 (VF_AVX512HFBFVL): Move it before the first usage.
28668 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
28669 to VF_AVX512HFBFVL.
28671 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
28673 * common/config/i386/i386-common.cc
28674 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
28675 to OPTION_MASK_ISA_AVX512BW_SET.
28676 (OPTION_MASK_ISA_AVX512F_UNSET):
28677 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
28678 (OPTION_MASK_ISA_AVX512BW_UNSET):
28679 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
28680 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
28681 * config/i386/avx512vbmi2vlintrin.h: Ditto.
28682 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
28683 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
28684 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
28685 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
28687 (compressstore<mode>_mask): Ditto.
28688 (expand<mode>_mask): Ditto.
28689 (expand<mode>_maskz): Ditto.
28690 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
28691 VI12_VI48F_AVX512VL.
28693 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
28695 * common/config/i386/i386-common.cc
28696 (OPTION_MASK_ISA_AVX512BITALG_SET):
28697 Change OPTION_MASK_ISA_AVX512F_SET
28698 to OPTION_MASK_ISA_AVX512BW_SET.
28699 (OPTION_MASK_ISA_AVX512F_UNSET):
28700 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
28701 (OPTION_MASK_ISA_AVX512BW_UNSET):
28702 Add OPTION_MASK_ISA_AVX512BITALG_SET.
28703 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
28704 * config/i386/i386-builtin.def:
28705 Remove redundant OPTION_MASK_ISA_AVX512BW.
28706 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
28707 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
28708 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
28710 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
28712 * config/i386/i386-expand.cc
28713 (ix86_check_builtin_isa_match): Correct wrong comments.
28714 Add a new macro SHARE_BUILTIN and refactor the current if
28717 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
28719 * config/i386/cpuid.h: Open a new section for Extended Features
28720 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
28723 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
28725 * config/i386/sse.md: Modify insn vperm{i,f}
28728 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
28730 * config/xtensa/xtensa-opts.h: New header.
28731 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
28732 xtensa_strict_align.
28733 * config/xtensa/xtensa.cc (xtensa_option_override): When
28734 -m[no-]strict-align is not specified in the command line set
28735 xtensa_strict_align to 0 if the hardware supports both unaligned
28736 loads and stores or to 1 otherwise.
28737 * config/xtensa/xtensa.opt (mstrict-align): New option.
28738 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
28740 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
28742 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
28745 2023-04-19 Andrew Pinski <apinski@marvell.com>
28747 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
28749 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28751 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
28752 (VECTOR_BOOL_MODE): Ditto.
28753 (ADJUST_NUNITS): Ditto.
28754 (ADJUST_ALIGNMENT): Ditto.
28755 (ADJUST_BYTESIZE): Ditto.
28756 (ADJUST_PRECISION): Ditto.
28757 (RVV_MODES): Ditto.
28758 (VECTOR_MODE_WITH_PREFIX): Ditto.
28759 * config/riscv/riscv-v.cc (ENTRY): Ditto.
28760 (get_vlmul): Ditto.
28761 (get_ratio): Ditto.
28762 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
28763 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
28764 (vbool64_t): Ditto.
28765 (vbool32_t): Ditto.
28766 (vbool16_t): Ditto.
28771 (vint8mf8_t): Ditto.
28772 (vuint8mf8_t): Ditto.
28773 (vint8mf4_t): Ditto.
28774 (vuint8mf4_t): Ditto.
28775 (vint8mf2_t): Ditto.
28776 (vuint8mf2_t): Ditto.
28777 (vint8m1_t): Ditto.
28778 (vuint8m1_t): Ditto.
28779 (vint8m2_t): Ditto.
28780 (vuint8m2_t): Ditto.
28781 (vint8m4_t): Ditto.
28782 (vuint8m4_t): Ditto.
28783 (vint8m8_t): Ditto.
28784 (vuint8m8_t): Ditto.
28785 (vint16mf4_t): Ditto.
28786 (vuint16mf4_t): Ditto.
28787 (vint16mf2_t): Ditto.
28788 (vuint16mf2_t): Ditto.
28789 (vint16m1_t): Ditto.
28790 (vuint16m1_t): Ditto.
28791 (vint16m2_t): Ditto.
28792 (vuint16m2_t): Ditto.
28793 (vint16m4_t): Ditto.
28794 (vuint16m4_t): Ditto.
28795 (vint16m8_t): Ditto.
28796 (vuint16m8_t): Ditto.
28797 (vint32mf2_t): Ditto.
28798 (vuint32mf2_t): Ditto.
28799 (vint32m1_t): Ditto.
28800 (vuint32m1_t): Ditto.
28801 (vint32m2_t): Ditto.
28802 (vuint32m2_t): Ditto.
28803 (vint32m4_t): Ditto.
28804 (vuint32m4_t): Ditto.
28805 (vint32m8_t): Ditto.
28806 (vuint32m8_t): Ditto.
28807 (vint64m1_t): Ditto.
28808 (vuint64m1_t): Ditto.
28809 (vint64m2_t): Ditto.
28810 (vuint64m2_t): Ditto.
28811 (vint64m4_t): Ditto.
28812 (vuint64m4_t): Ditto.
28813 (vint64m8_t): Ditto.
28814 (vuint64m8_t): Ditto.
28815 (vfloat32mf2_t): Ditto.
28816 (vfloat32m1_t): Ditto.
28817 (vfloat32m2_t): Ditto.
28818 (vfloat32m4_t): Ditto.
28819 (vfloat32m8_t): Ditto.
28820 (vfloat64m1_t): Ditto.
28821 (vfloat64m2_t): Ditto.
28822 (vfloat64m4_t): Ditto.
28823 (vfloat64m8_t): Ditto.
28824 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
28825 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
28826 (riscv_convert_vector_bits): Ditto.
28827 * config/riscv/riscv.md:
28828 * config/riscv/vector-iterators.md:
28829 * config/riscv/vector.md
28830 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
28831 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
28832 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
28833 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
28834 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
28835 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
28836 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
28837 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
28838 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
28840 2023-04-19 Pan Li <pan2.li@intel.com>
28842 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
28843 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
28845 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
28849 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
28850 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
28851 for operand 0. Use any_extract code iterator.
28852 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
28853 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
28854 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
28855 (*cmpqi_ext<mode>_1): Use general_operand predicate
28856 for operand 1. Use any_extract code iterator.
28857 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
28858 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
28860 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28862 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
28863 (aarch64_uaddw2<mode>): Delete.
28864 (aarch64_ssubw2<mode>): Delete.
28865 (aarch64_usubw2<mode>): Delete.
28866 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
28868 2023-04-19 Richard Biener <rguenther@suse.de>
28870 * tree-ssa-structalias.cc (do_ds_constraint): Use
28871 solve_add_graph_edge.
28873 2023-04-19 Richard Biener <rguenther@suse.de>
28875 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
28877 (do_sd_constraint): ... here.
28879 2023-04-19 Richard Biener <rguenther@suse.de>
28881 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
28882 rejecting the merge when A contains only a non-local label.
28884 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
28886 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
28887 (VIRTUAL_REGISTER_NUM_P): Ditto.
28888 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
28889 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
28890 * function.cc (instantiate_decl_rtl): Ditto.
28891 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
28892 (nonzero_address_p): Ditto.
28893 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
28895 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
28897 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
28899 2023-04-19 Richard Biener <rguenther@suse.de>
28901 * system.h (auto_mpz::operator->()): New.
28902 * realmpfr.h (auto_mpfr::operator->()): New.
28903 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
28904 * real.cc (real_from_string): Likewise.
28905 (dconst_e_ptr): Likewise.
28906 (dconst_sqrt2_ptr): Likewise.
28907 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
28909 (bound_difference_of_offsetted_base): Likewise.
28910 (number_of_iterations_ne): Likewise.
28911 (number_of_iterations_lt_to_ne): Likewise.
28912 * ubsan.cc: Include realmpfr.h.
28913 (ubsan_instrument_float_cast): Use auto_mpfr.
28915 2023-04-19 Richard Biener <rguenther@suse.de>
28917 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
28918 edges, remove edges from escaped after special-casing them.
28920 2023-04-19 Richard Biener <rguenther@suse.de>
28922 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
28925 2023-04-19 Richard Biener <rguenther@suse.de>
28927 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
28928 to the LHS varinfo solution member.
28930 2023-04-19 Richard Biener <rguenther@suse.de>
28932 * tree-ssa-structalias.cc (topo_visit): Look at the real
28933 destination of edges.
28935 2023-04-19 Richard Biener <rguenther@suse.de>
28937 PR tree-optimization/44794
28938 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
28939 If an epilogue loop is required set its iteration upper bound.
28941 2023-04-19 Xi Ruoyao <xry111@xry111.site>
28944 * config/loongarch/loongarch-protos.h
28945 (loongarch_expand_block_move): Add a parameter as alignment RTX.
28946 * config/loongarch/loongarch.h:
28947 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
28948 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
28949 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
28950 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
28951 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
28952 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
28953 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
28954 Take the alignment from the parameter, but set it to
28955 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
28956 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
28957 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
28958 (loongarch_block_move_straight): When there are left-over bytes,
28959 half the mode size instead of falling back to byte mode at once.
28960 (loongarch_block_move_loop): Limit the length of loop body with
28961 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
28962 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
28963 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
28964 to loongarch_expand_block_move.
28966 2023-04-19 Xi Ruoyao <xry111@xry111.site>
28968 * config/loongarch/loongarch.cc
28969 (loongarch_setup_incoming_varargs): Don't save more GARs than
28970 cfun->va_list_gpr_size / UNITS_PER_WORD.
28972 2023-04-19 Richard Biener <rguenther@suse.de>
28974 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
28975 no epilogue condition.
28977 2023-04-19 Richard Biener <rguenther@suse.de>
28979 * gimple.h (gimple_assign_load): Outline...
28980 * gimple.cc (gimple_assign_load): ... here. Avoid
28981 get_base_address and instead just strip the outermost
28982 handled component, treating a remaining handled component
28985 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28987 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
28989 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
28991 2023-04-19 Jakub Jelinek <jakub@redhat.com>
28993 PR tree-optimization/109011
28994 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
28995 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
28996 CLZ, CTZ and FFS. Remove vargs variable, use
28997 gimple_build_call_internal rather than gimple_build_call_internal_vec.
28998 (vect_vect_recog_func_ptrs): Adjust popcount entry.
29000 2023-04-19 Jakub Jelinek <jakub@redhat.com>
29003 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
29004 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
29005 a new REG rather than the SUBREG.
29007 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29009 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
29012 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29015 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
29016 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
29018 2023-04-19 Richard Biener <rguenther@suse.de>
29020 PR rtl-optimization/109237
29021 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
29022 TREE_VISITED on INSN_VAR_LOCATION_DECL.
29023 (delete_trivially_dead_insns): Maintain TREE_VISITED on
29024 active debug bind INSN_VAR_LOCATION_DECL.
29026 2023-04-19 Richard Biener <rguenther@suse.de>
29028 PR rtl-optimization/109237
29029 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
29031 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
29033 * doc/install.texi (enable-decimal-float): Add AArch64.
29035 2023-04-19 liuhongt <hongtao.liu@intel.com>
29037 PR rtl-optimization/109351
29038 * ira.cc (setup_class_subset_and_memory_move_costs): Check
29039 hard_regno_mode_ok before setting lowest memory move cost for
29040 the mode with different reg classes.
29042 2023-04-18 Jason Merrill <jason@redhat.com>
29044 * doc/invoke.texi: Remove stray @gol.
29046 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29048 * ifcvt.cc (cond_move_process_if_block): Consider the result of
29049 targetm.noce_conversion_profitable_p() when replacing the original
29050 sequence with the converted one.
29052 2023-04-18 Mark Harmstone <mark@harmstone.com>
29054 * common.opt (gcodeview): Add new option.
29055 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
29056 * opts.cc (command_handle_option): Similarly.
29057 * doc/invoke.texi: Add documentation for -gcodeview.
29059 2023-04-18 Andrew Pinski <apinski@marvell.com>
29061 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
29062 (make_pass_phiopt): Make execute out of line.
29063 (tree_ssa_cs_elim): Move code into ...
29064 (pass_cselim::execute): here.
29066 2023-04-18 Sam James <sam@gentoo.org>
29068 * system.h: Drop unused INCLUDE_PTHREAD_H.
29070 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
29072 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
29075 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
29077 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
29078 (bswapdi2, bswapsi2): Similarly.
29080 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
29083 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
29084 Use CODE_FOR_sse4_1_insertps_v4sf.
29085 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
29086 (expand_vec_perm_1): Call expand_vec_per_insertps.
29087 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
29088 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
29089 (@sse4_1_insertps_<mode>): New insn pattern.
29090 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
29091 pattern from sse4_1_insertps using VI4F_128 mode iterator.
29093 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29095 * value-range.cc (gt_ggc_mx): New.
29097 * value-range.h (class vrange): Add GTY marker.
29098 (class frange): Same.
29099 (gt_ggc_mx): Remove.
29100 (gt_pch_nx): Remove.
29102 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
29104 * lra-constraints.cc (constraint_unique): New.
29105 (process_address_1): Apply constraint_unique test.
29106 * recog.cc (constrain_operands): Allow relaxed memory
29109 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
29111 * doc/extend.texi (Target Builtins): Add RISC-V Vector
29113 (RISC-V Vector Intrinsics): Document GCC implemented which
29114 version of RISC-V vector intrinsics and its reference.
29116 2023-04-18 Richard Biener <rguenther@suse.de>
29118 PR middle-end/108786
29119 * bitmap.h (bitmap_clear_first_set_bit): New.
29120 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
29121 bitmap_first_set_bit and add optional clearing of the bit.
29122 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
29123 (bitmap_clear_first_set_bit): Likewise.
29124 * df-core.cc (df_worklist_dataflow_doublequeue): Use
29125 bitmap_clear_first_set_bit.
29126 * graphite-scop-detection.cc (scop_detection::merge_sese):
29128 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
29129 (sanitize_asan_mark_poison): Likewise.
29130 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
29131 * tree-into-ssa.cc (rewrite_blocks): Likewise.
29132 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
29133 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
29135 2023-04-18 Richard Biener <rguenther@suse.de>
29137 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
29138 (dump_sa_points_to_info): ... this function.
29139 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
29140 and call dump_sa_stats guarded with TDF_STATS.
29141 (ipa_pta_execute): Likewise.
29142 (compute_may_aliases): Guard dump_alias_info with
29143 TDF_DETAILS|TDF_ALIAS.
29145 2023-04-18 Andrew Pinski <apinski@marvell.com>
29147 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
29148 the expression that is being tried when TDF_FOLDING
29150 (phiopt_worker::match_simplify_replacement): Dump
29151 the sequence which was created by gimple_simplify_phiopt
29152 when TDF_FOLDING is true.
29154 2023-04-18 Andrew Pinski <apinski@marvell.com>
29156 * tree-ssa-phiopt.cc (match_simplify_replacement):
29157 Simplify code that does the movement slightly.
29159 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29161 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
29163 (rev16<mode>2): Rename to...
29164 (aarch64_rev16<mode>2_alt1): ... This.
29165 (rev16<mode>2_alt): Rename to...
29166 (*aarch64_rev16<mode>2_alt2): ... This.
29168 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29170 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
29171 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
29173 * range-op-float.cc (zero_range): Use dconstm0.
29174 (zero_to_inf_range): Same.
29175 * real.h (dconstm0): New.
29176 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
29177 (frange::set_zero): Do not declare dconstm0.
29179 2023-04-18 Richard Biener <rguenther@suse.de>
29181 * system.h (class auto_mpz): New,
29182 * realmpfr.h (class auto_mpfr): Likewise.
29183 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
29184 (do_mpfr_arg2): Likewise.
29185 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
29187 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29189 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
29190 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
29192 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29194 * value-range.cc (frange::operator==): Adjust for NAN.
29195 (range_tests_nan): Remove some NAN tests.
29197 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29199 * inchash.cc (hash::add_real_value): New.
29200 * inchash.h (class hash): Add add_real_value.
29201 * value-range.cc (add_vrange): New.
29202 * value-range.h (inchash::add_vrange): New.
29204 2023-04-18 Richard Biener <rguenther@suse.de>
29206 PR tree-optimization/109539
29207 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
29208 Re-implement pointer relatedness for PHIs.
29210 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
29212 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
29213 (SV_FP): New iterator.
29214 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
29215 (recip<mode>2): Unify the two patterns using SV_FP.
29216 (div_scale<mode><exec_vcc>): New insn.
29217 (div_fmas<mode><exec>): New insn.
29218 (div_fixup<mode><exec>): New insn.
29219 (div<mode>3): Unify the two expanders and rewrite using hardfp.
29220 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
29221 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
29222 and UNSPEC_DIV_FIXUP.
29223 (vccwait): New attribute.
29225 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29227 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
29228 if the argument matches that.
29230 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29232 * config/aarch64/atomics.md
29233 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
29234 Use SD_HSDI for destination mode iterator.
29236 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
29238 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
29239 of z-extensions and s-extensions.
29240 (riscv_subset_list::parse): Likewise.
29242 2023-04-18 Jakub Jelinek <jakub@redhat.com>
29244 PR tree-optimization/109240
29245 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
29246 first vec_perm operand and minus as second using fneg/fadd and
29247 minus as first vec_perm operand and plus as second using fneg/fsub.
29249 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29251 * data-streamer.cc (bp_pack_real_value): New.
29252 (bp_unpack_real_value): New.
29253 * data-streamer.h (bp_pack_real_value): New.
29254 (bp_unpack_real_value): New.
29255 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
29256 bp_unpack_real_value.
29257 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
29258 bp_pack_real_value.
29260 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29262 * wide-int.h (WIDE_INT_MAX_HWIS): New.
29263 (class fixed_wide_int_storage): Use it.
29264 (trailing_wide_ints <N>::set_precision): Use it.
29265 (trailing_wide_ints <N>::extra_size): Use it.
29267 2023-04-18 Xi Ruoyao <xry111@xry111.site>
29269 * config/loongarch/loongarch-protos.h
29270 (loongarch_addu16i_imm12_operand_p): New function prototype.
29271 (loongarch_split_plus_constant): Likewise.
29272 * config/loongarch/loongarch.cc
29273 (loongarch_addu16i_imm12_operand_p): New function.
29274 (loongarch_split_plus_constant): Likewise.
29275 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
29276 (DUAL_IMM12_OPERAND): Likewise.
29277 (DUAL_ADDU16I_OPERAND): Likewise.
29278 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
29280 * config/loongarch/predicates.md (const_dual_imm12_operand): New
29282 (const_addu16i_operand): Likewise.
29283 (const_addu16i_imm12_di_operand): Likewise.
29284 (const_addu16i_imm12_si_operand): Likewise.
29285 (plus_di_operand): Likewise.
29286 (plus_si_operand): Likewise.
29287 (plus_si_extend_operand): Likewise.
29288 * config/loongarch/loongarch.md (add<mode>3): Convert to
29289 define_insn_and_split. Use plus_<mode>_operand predicate
29290 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
29291 and Le constraints.
29292 (*addsi3_extended): Convert to define_insn_and_split. Use
29293 plus_si_extend_operand instead of arith_operand. Add
29294 alternatives for La and Le alternatives.
29296 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29298 * value-range.h (Value_Range::Value_Range): New.
29299 (Value_Range::contains_p): New.
29301 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29303 * value-range.h (class vrange): Make m_discriminator const.
29304 (class irange): Make m_max_ranges const. Adjust constructors
29306 (class unsupported_range): Construct vrange appropriately.
29307 (class frange): Same.
29309 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
29311 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
29314 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
29316 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
29318 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
29320 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
29322 (riscv_expand_epilogue): Likewise.
29324 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
29326 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
29328 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
29330 2023-04-17 Andrew Pinski <apinski@marvell.com>
29332 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
29335 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
29337 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
29340 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
29342 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
29343 parameter remaining_size.
29344 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
29345 (riscv_expand_prologue): Likewise.
29346 (riscv_expand_epilogue): Likewise.
29348 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
29350 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
29351 roriw for constant counts.
29352 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
29353 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
29354 (simplify_context::simplify_binary_operation_1): Use it.
29355 * expmed.cc (expand_shift_1): Likewise.
29357 2023-04-17 Martin Jambor <mjambor@suse.cz>
29361 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
29362 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
29363 (ipa_zap_jf_refdesc): New function.
29364 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
29365 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
29366 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
29367 the new parameter of find_reference.
29368 (adjust_references_in_caller): Likewise. Make sure the constant jump
29369 function is not used to decrement a refdec counter again. Only
29370 decrement refdesc counters when the pass_through jump function allows
29371 it. Added a detailed dump when decrementing refdesc counters.
29372 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
29373 (ipa_set_jf_simple_pass_through): Initialize the new flag.
29374 (ipa_set_jf_unary_pass_through): Likewise.
29375 (ipa_set_jf_arith_pass_through): Likewise.
29376 (remove_described_reference): Provide a value for the new parameter of
29378 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
29379 the previous pass_through had a flag mandating that we do so.
29380 (propagate_controlled_uses): Likewise. Only decrement refdesc
29381 counters when the pass_through jump function allows it.
29382 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
29383 parameter of find_reference.
29384 (ipa_write_jump_function): Assert the new flag does not have to be
29386 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
29389 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
29390 Di Zhao <di.zhao@amperecomputing.com>
29392 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
29393 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
29394 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
29395 Check for the above tuning option when processing loads.
29397 2023-04-17 Richard Biener <rguenther@suse.de>
29399 PR tree-optimization/109524
29400 * tree-vrp.cc (remove_unreachable::m_list): Change to a
29401 vector of pairs of block indices.
29402 (remove_unreachable::maybe_register_block): Adjust.
29403 (remove_unreachable::remove_and_update_globals): Likewise.
29404 Deal with removed blocks.
29406 2023-04-16 Jeff Law <jlaw@ventanamicro>
29409 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
29410 TARGET_SFB_ALU, force the true arm into a register.
29412 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
29415 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
29416 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
29418 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
29419 (pa_function_arg_size): Change return type to int. Return zero
29420 for arguments larger than 1 GB. Update comments.
29422 2023-04-15 Jakub Jelinek <jakub@redhat.com>
29424 PR tree-optimization/109154
29425 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
29426 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
29428 2023-04-15 Jason Merrill <jason@redhat.com>
29431 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
29432 Overhaul lhs_ref.ref analysis.
29434 2023-04-14 Richard Biener <rguenther@suse.de>
29436 PR tree-optimization/109502
29437 * tree-vect-stmts.cc (vectorizable_assignment): Fix
29438 check for conversion between mask and non-mask types.
29440 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
29441 Jakub Jelinek <jakub@redhat.com>
29445 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
29446 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
29447 smaller than word_mode.
29448 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
29449 <case AND>: Likewise.
29451 2023-04-14 Jakub Jelinek <jakub@redhat.com>
29453 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
29456 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
29458 PR tree-optimization/108139
29459 PR tree-optimization/109462
29460 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
29461 equivalency check for PHI nodes.
29462 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
29463 does not dominate single-arg equivalency edges.
29465 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
29468 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
29469 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
29471 2023-04-13 Richard Biener <rguenther@suse.de>
29473 PR tree-optimization/109491
29474 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
29475 NULL operands test.
29477 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29480 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
29481 (vint16mf4_t): Ditto.
29482 (vint32mf2_t): Ditto.
29483 (vint64m1_t): Ditto.
29484 (vint64m2_t): Ditto.
29485 (vint64m4_t): Ditto.
29486 (vint64m8_t): Ditto.
29487 (vuint8mf8_t): Ditto.
29488 (vuint16mf4_t): Ditto.
29489 (vuint32mf2_t): Ditto.
29490 (vuint64m1_t): Ditto.
29491 (vuint64m2_t): Ditto.
29492 (vuint64m4_t): Ditto.
29493 (vuint64m8_t): Ditto.
29494 (vfloat32mf2_t): Ditto.
29495 (vbool64_t): Ditto.
29496 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
29497 (register_vector_type): Ditto.
29498 (check_required_extensions): Fix condition.
29499 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
29500 (RVV_REQUIRE_ELEN_64): New define.
29501 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
29502 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
29503 (TARGET_VECTOR_FP64): Ditto.
29504 (ENTRY): Fix predicate.
29505 * config/riscv/vector-iterators.md: Fix predicate.
29507 2023-04-12 Jakub Jelinek <jakub@redhat.com>
29509 PR tree-optimization/109410
29510 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
29511 block if first statement of the function is a call to returns_twice
29514 2023-04-12 Jakub Jelinek <jakub@redhat.com>
29517 * config/i386/i386.cc: Include rtl-error.h.
29518 (ix86_print_operand): For z modifier warning, use warning_for_asm
29519 if this_is_asm_operands. For Z modifier errors, use %c and code
29520 instead of hardcoded Z.
29522 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
29524 * config/i386/x-mingw32-utf8: Remove extrataneous $@
29526 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
29528 PR tree-optimization/109462
29529 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
29530 check for equivalences if NAME is a phi node.
29532 2023-04-12 Richard Biener <rguenther@suse.de>
29534 PR tree-optimization/109473
29535 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
29536 Convert scalar result to the computation type before performing
29537 the reduction adjustment.
29539 2023-04-12 Richard Biener <rguenther@suse.de>
29541 PR tree-optimization/109469
29542 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
29543 a returns-twice call.
29545 2023-04-12 Richard Biener <rguenther@suse.de>
29547 PR tree-optimization/109434
29548 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
29549 handle possibly throwing calls when processing the LHS
29550 and may-defs are not OK.
29552 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
29554 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
29555 predicate to avoid splitting arith constants.
29557 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
29558 Pan Li <pan2.li@intel.com>
29559 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29560 Kito Cheng <kito.cheng@sifive.com>
29563 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
29564 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
29565 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
29566 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
29567 (riscv_zero_call_used_regs): New.
29568 (TARGET_ZERO_CALL_USED_REGS): New.
29570 2023-04-11 Martin Liska <mliska@suse.cz>
29573 * opts.cc (finish_options): Drop also
29574 x_flag_var_tracking_assignments.
29576 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
29578 PR tree-optimization/108888
29579 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
29581 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
29584 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
29585 (vsx_sign_extend_v16qi_<mode>): ... this.
29586 (vsx_sign_extend_hi_<mode>): Rename to...
29587 (vsx_sign_extend_v8hi_<mode>): ... this.
29588 (vsx_sign_extend_si_v2di): Rename to...
29589 (vsx_sign_extend_v4si_v2di): ... this.
29590 (vsignextend_qi_<mode>): Remove.
29591 (vsignextend_hi_<mode>): Remove.
29592 (vsignextend_si_v2di): Remove.
29593 (vsignextend_v2di_v1ti): Remove.
29594 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
29595 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
29596 with gen_vsx_sign_extend_v16qi_v4si.
29597 * config/rs6000/rs6000.md (split for DI constant generation):
29598 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
29599 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
29600 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
29601 with gen_vsx_sign_extend_v16qi_si.
29602 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
29603 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
29604 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
29605 vsx_sign_extend_v16qi_v4si.
29606 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
29607 vsx_sign_extend_v8hi_v2di.
29608 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
29609 vsx_sign_extend_v8hi_v4si.
29610 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
29611 vsx_sign_extend_si_v2di.
29612 (__builtin_altivec_vsignext): Set bif-pattern to
29613 vsx_sign_extend_v2di_v1ti.
29614 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
29615 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
29616 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
29617 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
29619 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
29622 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
29623 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
29625 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
29627 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
29629 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
29631 * common/config/i386/cpuinfo.h (get_available_features):
29632 Detect AMX-COMPLEX.
29633 * common/config/i386/i386-common.cc
29634 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
29635 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
29636 (ix86_handle_option): Handle -mamx-complex.
29637 * common/config/i386/i386-cpuinfo.h (enum processor_features):
29638 Add FEATURE_AMX_COMPLEX.
29639 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
29641 * config.gcc: Add amxcomplexintrin.h.
29642 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
29643 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
29645 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
29646 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
29647 Handle amx-complex.
29648 * config/i386/i386.opt: Add option -mamx-complex.
29649 * config/i386/immintrin.h: Include amxcomplexintrin.h.
29650 * doc/extend.texi: Document amx-complex.
29651 * doc/invoke.texi: Document -mamx-complex.
29652 * doc/sourcebuild.texi: Document target amx-complex.
29653 * config/i386/amxcomplexintrin.h: New file.
29655 2023-04-08 Jakub Jelinek <jakub@redhat.com>
29657 PR tree-optimization/109392
29658 * tree-vect-generic.cc (tree_vec_extract): Handle failure
29659 of maybe_push_res_to_seq better.
29661 2023-04-08 Jakub Jelinek <jakub@redhat.com>
29663 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
29665 (SYSTEM_H): Depend on $(HASHTAB_H).
29666 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
29667 dependency on $(RTL_BASE_H), remove redundant dependency on
29670 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
29673 * config/arm/arm.cc (arm_effective_regno): New function.
29674 (mve_vector_mem_operand): Use it.
29676 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
29678 PR tree-optimization/109417
29679 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
29680 dependency is in SSA_NAME_FREE_LIST.
29682 2023-04-06 Andrew Pinski <apinski@marvell.com>
29684 PR tree-optimization/109427
29685 * params.opt (-param=vect-induction-float=):
29686 Fix option attribute typo for IntegerRange.
29688 2023-04-05 Jeff Law <jlaw@ventanamicro>
29691 * combine.cc (combine_instructions): Force re-recognition when
29692 after restoring the body of an insn to its original form.
29694 2023-04-05 Martin Jambor <mjambor@suse.cz>
29697 * ipa-sra.cc (zap_useless_ipcp_results): New function.
29698 (process_isra_node_results): Call it.
29700 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29702 * config/riscv/vector.md: Fix incorrect operand order.
29704 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29706 * config/riscv/riscv-vsetvl.cc
29707 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
29710 2023-04-05 Li Xu <xuli1@eswincomputing.com>
29712 * config/riscv/riscv-vector-builtins.def: Fix typo.
29713 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
29714 * config/riscv/vector-iterators.md: Ditto.
29716 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
29718 * doc/md.texi (Including Patterns): Fix page break.
29720 2023-04-04 Jakub Jelinek <jakub@redhat.com>
29722 PR tree-optimization/109386
29723 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
29724 foperator_le::op1_range, foperator_le::op2_range,
29725 foperator_gt::op1_range, foperator_gt::op2_range,
29726 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
29727 BRS_FALSE case even if the other op is maybe_isnan, not just
29729 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
29730 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
29731 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
29732 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
29733 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
29734 not just known_isnan.
29736 2023-04-04 Marek Polacek <polacek@redhat.com>
29738 PR sanitizer/109107
29739 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
29741 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
29743 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
29745 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
29746 (mve_vcreateq_f<mode>): Swap operands.
29748 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
29750 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
29752 2023-04-04 Jakub Jelinek <jakub@redhat.com>
29755 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
29756 Reword diagnostics about zfinx conflict with f, formatting fixes.
29758 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
29760 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
29762 2023-04-04 Richard Biener <rguenther@suse.de>
29764 PR tree-optimization/109304
29765 * tree-profile.cc (tree_profiling): Use symtab node
29766 availability to decide whether to skip adjusting calls.
29767 Do not adjust calls to internal functions.
29769 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
29772 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
29773 function for permutation control vector by considering big endianness.
29775 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
29778 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
29779 (rs6000_vprtyb<mode>2): ... this.
29780 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
29781 rs6000_vprtybv2di2.
29782 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
29783 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
29784 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
29785 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
29787 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
29788 Sandra Loosemore <sandra@codesourcery.com>
29790 * doc/md.texi (Insn Splitting): Tweak wording for readability.
29792 2023-04-03 Martin Jambor <mjambor@suse.cz>
29795 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
29796 offset + size will be representable in unsigned int.
29798 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
29800 * configure.ac (ZSTD_LIB): Move before zstd.h check.
29801 Unset gcc_cv_header_zstd_h without libzstd.
29802 * configure: Regenerate.
29804 2023-04-03 Martin Liska <mliska@suse.cz>
29806 * doc/invoke.texi: Document new param.
29808 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
29810 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
29811 new check_effective_target function.
29813 2023-04-03 Li Xu <xuli1@eswincomputing.com>
29815 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
29816 (vfloat32m8_t): Likewise
29818 2023-04-03 liuhongt <hongtao.liu@intel.com>
29820 * doc/md.texi: Document signbitm2.
29822 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29823 kito-cheng <kito.cheng@sifive.com>
29825 * config/riscv/vector.md: Fix RA constraint.
29827 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29829 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
29830 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
29831 * config/riscv/vector.md: Fix scalar move bug.
29833 2023-04-01 Jakub Jelinek <jakub@redhat.com>
29835 * range-op-float.cc (foperator_equal::fold_range): If at least
29836 one of the op ranges is not singleton and neither is NaN and all
29837 4 bounds are zero, return [1, 1].
29838 (foperator_not_equal::fold_range): In the same case return [0, 0].
29840 2023-04-01 Jakub Jelinek <jakub@redhat.com>
29842 * range-op-float.cc (foperator_equal::fold_range): Perform the
29843 non-singleton handling regardless of maybe_isnan (op1, op2).
29844 (foperator_not_equal::fold_range): Likewise.
29845 (foperator_lt::fold_range, foperator_le::fold_range,
29846 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
29847 real_* comparison check which results in range_false (type)
29848 even if maybe_isnan (op1, op2). Simplify.
29849 (foperator_ltgt): New class.
29850 (fop_ltgt): New variable.
29851 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
29854 2023-04-01 Jakub Jelinek <jakub@redhat.com>
29857 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
29858 returns VOIDmode, handle it like if the register isn't used for
29859 passing arguments at all.
29860 (apply_result_size): If targetm.calls.get_raw_result_mode returns
29861 VOIDmode, handle it like if the register isn't used for returning
29863 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
29864 means to return VOIDmode.
29865 * doc/tm.texi: Regenerated.
29866 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
29867 TARGET_SVE for P0_REGNUM.
29868 (aarch64_function_arg_regno_p): Also return true for p0-p3.
29869 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
29871 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
29873 * lra-constraints.cc: (combine_reload_insn): New function.
29875 2023-03-31 Jakub Jelinek <jakub@redhat.com>
29877 PR tree-optimization/91645
29878 * range-op-float.cc (foperator_unordered_lt::fold_range,
29879 foperator_unordered_le::fold_range,
29880 foperator_unordered_gt::fold_range,
29881 foperator_unordered_ge::fold_range,
29882 foperator_unordered_equal::fold_range): Call the ordered
29883 fold_range on ranges with cleared NaNs.
29884 * value-query.cc (range_query::get_tree_range): Handle also
29885 COMPARISON_CLASS_P trees.
29887 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
29888 Andrew Pinski <pinskia@gmail.com>
29891 * config/riscv/t-riscv: Add missing dependencies.
29893 2023-03-31 liuhongt <hongtao.liu@intel.com>
29895 * config/i386/i386.cc (inline_memory_move_cost): Return 100
29896 for MASK_REGS when MODE_SIZE > 8.
29898 2023-03-31 liuhongt <hongtao.liu@intel.com>
29901 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
29902 ufloat/ufix to floatuns/fixuns.
29903 * config/i386/i386-expand.cc
29904 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
29905 * config/i386/sse.md
29906 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
29908 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
29909 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
29911 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
29913 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
29915 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
29916 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
29917 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
29918 (ufloatv2siv2df2<mask_name>): Renamed to ..
29919 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
29920 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
29922 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
29924 (ufix_notruncv2dfv2si2): Renamed to ..
29925 (fixuns_notruncv2dfv2si2):.. this.
29926 (ufix_notruncv2dfv2si2_mask): Renamed to ..
29927 (fixuns_notruncv2dfv2si2_mask): .. this.
29928 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
29929 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
29930 (ufix_truncv2dfv2si2): Renamed to ..
29931 (*fixuns_truncv2dfv2si2): .. this.
29932 (ufix_truncv2dfv2si2_mask): Renamed to ..
29933 (fixuns_truncv2dfv2si2_mask): .. this.
29934 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
29935 (*fixuns_truncv2dfv2si2_mask_1): .. this.
29936 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
29937 (fixuns_truncv4dfv4si2<mask_name>): .. this.
29938 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
29940 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
29942 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
29943 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
29946 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
29948 PR tree-optimization/109154
29949 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
29950 * gimple-range-gori.h (may_recompute_p): Add depth param.
29951 * params.opt (ranger-recompute-depth): New param.
29953 2023-03-30 Jason Merrill <jason@redhat.com>
29957 * cgraph.h: Move reset() from cgraph_node to symtab_node.
29958 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
29959 remove_from_same_comdat_group.
29961 2023-03-30 Richard Biener <rguenther@suse.de>
29963 PR tree-optimization/107561
29964 * gimple-ssa-warn-access.cc (get_size_range): Add flags
29965 argument and pass it on.
29966 (check_access): When querying for the size range pass
29967 SR_ALLOW_ZERO when the known destination size is zero.
29969 2023-03-30 Richard Biener <rguenther@suse.de>
29971 PR tree-optimization/109342
29972 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
29973 overload for edge. When that edge is a backedge use
29974 dominated_by_p directly.
29976 2023-03-30 liuhongt <hongtao.liu@intel.com>
29978 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
29979 vpblendd instead of vpblendw for V4SI under avx2.
29981 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
29983 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
29984 for many quick operands, for register-sized modes.
29986 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
29988 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
29991 2023-03-29 Martin Liska <mliska@suse.cz>
29993 PR bootstrap/109310
29994 * configure.ac: Emit a warning for deprecated option
29995 --enable-link-mutex.
29996 * configure: Regenerate.
29998 2023-03-29 Richard Biener <rguenther@suse.de>
30000 PR tree-optimization/109331
30001 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
30002 discover a taken edge make sure to cleanup the CFG.
30004 2023-03-29 Richard Biener <rguenther@suse.de>
30006 PR tree-optimization/109327
30007 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
30008 already removed stmts when draining to_remove.
30010 2023-03-29 Richard Biener <rguenther@suse.de>
30013 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
30014 so we can re-create the DIE for the type if required.
30016 2023-03-29 Jakub Jelinek <jakub@redhat.com>
30017 Richard Biener <rguenther@suse.de>
30019 PR tree-optimization/109301
30020 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
30021 properties_provided from PROP_gimple_opt_math to 0.
30022 (pass_data_expand_powcabs): Change properties_provided from 0 to
30023 PROP_gimple_opt_math.
30025 2023-03-29 Richard Biener <rguenther@suse.de>
30027 PR tree-optimization/109154
30028 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
30029 inverted condition specially by inverting at the caller.
30030 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
30032 2023-03-28 David Malcolm <dmalcolm@redhat.com>
30035 * diagnostic-show-locus.cc (column_range::column_range): Factor
30036 out assertion conditional into...
30037 (column_range::valid_p): ...this new function.
30038 (line_corrections::add_hint): Don't attempt to consolidate hints
30039 if it would lead to invalid column_range instances.
30041 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
30044 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
30045 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
30048 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
30050 PR rtl-optimization/109187
30051 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
30052 subtraction in three-way comparison.
30054 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
30056 PR tree-optimization/109265
30057 PR tree-optimization/109274
30058 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
30059 not create a relation record is op1 and op2 are the same symbol.
30060 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
30061 handler for this stmt, but create a new record only if this statement
30062 generates a relation based on the ranges.
30063 (gori_compute::compute_operand2_range): Ditto.
30064 * value-relation.h (value_relation::set_relation): Always create the
30065 record that is requested.
30067 2023-03-28 Richard Biener <rguenther@suse.de>
30069 PR tree-optimization/107087
30070 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
30071 executable regions to avoid useless work and to better
30072 propagate degenerate PHIs.
30074 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
30076 * config/i386/x-mingw32-utf8: update comments.
30078 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
30081 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
30082 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
30084 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
30086 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
30087 after inlining. Record which decls are loaded from. Fix handling
30088 of vops for loads and stores.
30089 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
30090 (aarch64_accesses_vector_load_decl_p): Likewise.
30091 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
30093 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
30094 that loads from a decl, treat vector stores to those decls as
30096 (aarch64_vector_costs::finish_cost): ...and in that case,
30097 if the vector code does nothing more than a store, give the
30098 prologue a zero cost as well.
30100 2023-03-28 Richard Biener <rguenther@suse.de>
30103 PR tree-optimization/108129
30104 * genmatch.cc (lower_for): For (match ...) delay
30105 substituting into the match operator if possible.
30106 (dt_operand::gen_gimple_expr): For user_id look at the
30107 first substitute for determining how to access operands.
30108 (dt_operand::gen_generic_expr): Likewise.
30109 (dt_node::gen_kids): Properly sort user_ids according
30110 to their substitutes.
30111 (dt_node::gen_kids_1): Code-generate user_id matching.
30113 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30114 Jonathan Wakely <jwakely@redhat.com>
30116 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
30117 Use subcommand rather than sub-command in function comments.
30119 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30121 PR tree-optimization/109154
30122 * value-range.h (frange::flush_denormals_to_zero): Make it public
30123 rather than private.
30124 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
30126 * range-op-float.cc (range_operator_float::fold_range): Call
30127 flush_denormals_to_zero.
30129 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30131 PR middle-end/106190
30132 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
30133 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
30135 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30137 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
30138 as 4th argument to set to avoid clear_nan and union_ calls.
30140 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30143 * config/i386/i386.cc (assign_386_stack_local): For DImode
30144 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
30145 align 32 rather than 0 to assign_stack_local.
30147 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
30150 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
30151 on operand #3 to get the final condition code. Use std::swap.
30152 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
30153 (fucmp<gcond:code>8<P:mode>_vis): Move around.
30154 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
30155 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
30157 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
30159 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
30160 top-level sections.
30162 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
30164 * config.host: Pull in i386/x-mingw32-utf8 Makefile
30165 fragment and reference utf8rc-mingw32.o explicitly
30167 * config/i386/sym-mingw32.cc: prevent name mangling of
30169 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
30170 depend on manifest file explicitly.
30172 2023-03-28 Richard Biener <rguenther@suse.de>
30175 2023-03-27 Richard Biener <rguenther@suse.de>
30177 PR rtl-optimization/109237
30178 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30180 2023-03-28 Richard Biener <rguenther@suse.de>
30182 * common.opt (gdwarf): Remove Negative(gdwarf-).
30184 2023-03-28 Richard Biener <rguenther@suse.de>
30186 * common.opt (gdwarf): Add RejectNegative.
30187 (gdwarf-): Likewise.
30191 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30193 * config/cris/constraints.md ("T"): Correct to
30194 define_memory_constraint.
30196 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30198 * config/cris/cris.md (BW2): New mode-iterator.
30199 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
30202 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30204 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
30205 for possible eliminable compares.
30207 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30209 * config/cris/constraints.md ("R"): Remove unused constraint.
30211 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
30213 PR gcov-profile/109297
30214 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
30215 (merge_stream_usage): Likewise.
30216 (overlap_usage): Likewise.
30218 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
30221 * config/riscv/thead.md: Add missing mode specifiers.
30223 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
30224 Jiangning Liu <jiangning.liu@amperecomputing.com>
30225 Manolis Tsamis <manolis.tsamis@vrull.eu>
30227 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
30229 2023-03-27 Richard Biener <rguenther@suse.de>
30231 PR rtl-optimization/109237
30232 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30234 2023-03-27 Richard Biener <rguenther@suse.de>
30237 * lto-wrapper.cc (run_gcc): Parse alternate debug options
30238 as well, they always enable debug.
30240 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
30243 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
30245 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
30247 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
30250 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
30251 than zero when calling vec_sld.
30252 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
30253 zero when calling vec_sld.
30254 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
30255 than zero when calling vec_sld.
30257 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
30259 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
30260 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
30261 loops are represented and which fields are vectors. Add
30262 documentation for OMP_FOR_PRE_BODY field. Document internal
30263 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
30264 * tree.def (OMP_FOR): Make documentation consistent with the
30265 Texinfo manual, to fill some gaps and correct errors.
30267 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
30270 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
30271 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
30272 (handle_move_double): Call it before handle_movsi.
30273 * config/m68k/m68k-protos.h: Declare it.
30275 2023-03-26 Jakub Jelinek <jakub@redhat.com>
30277 PR tree-optimization/109230
30278 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
30280 2023-03-26 Jakub Jelinek <jakub@redhat.com>
30283 * predict.cc (compute_function_frequency): Don't call
30284 warn_function_cold if function already has cold attribute.
30286 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
30288 * doc/install.texi: Remove anachronistic note
30289 related to languages built and separate source tarballs.
30291 2023-03-25 David Malcolm <dmalcolm@redhat.com>
30294 * diagnostic-format-sarif.cc (read_until_eof): Delete.
30295 (maybe_read_file): Delete.
30296 (sarif_builder::maybe_make_artifact_content_object): Use
30297 get_source_file_content rather than maybe_read_file.
30298 Reject it if it's not valid UTF-8.
30299 * input.cc (file_cache_slot::get_full_file_content): New.
30300 (get_source_file_content): New.
30301 (selftest::check_cpp_valid_utf8_p): New.
30302 (selftest::test_cpp_valid_utf8_p): New.
30303 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
30304 * input.h (get_source_file_content): New prototype.
30306 2023-03-24 David Malcolm <dmalcolm@redhat.com>
30308 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
30310 (Special Functions for Debugging the Analyzer): Convert to a
30311 table, and rewrite in places.
30312 (Other Debugging Techniques): Add notes on how to compare two
30313 different exploded graphs.
30315 2023-03-24 David Malcolm <dmalcolm@redhat.com>
30318 * json.cc: Update comments to indicate that we now preserve
30319 insertion order of keys within objects.
30320 (object::print): Traverse keys in insertion order.
30321 (object::set): Preserve insertion order of keys.
30322 (selftest::test_writing_objects): Add an additional key to verify
30323 that we preserve insertion order.
30324 * json.h (object::m_keys): New field.
30326 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
30328 PR tree-optimization/109238
30329 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
30330 predecessors which this block dominates.
30332 2023-03-24 Richard Biener <rguenther@suse.de>
30334 PR tree-optimization/106912
30335 * tree-profile.cc (tree_profiling): Update stmts only when
30336 profiling or testing coverage. Make sure to update calls
30337 fntype, stripping 'const' there.
30339 2023-03-24 Jakub Jelinek <jakub@redhat.com>
30341 PR middle-end/109258
30342 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
30343 if target == const0_rtx.
30345 2023-03-24 Alexandre Oliva <oliva@adacore.com>
30347 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
30348 Document options and effective targets.
30350 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
30352 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
30355 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
30357 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
30358 non-earlyclobber alternative.
30360 2023-03-23 Andrew Pinski <apinski@marvell.com>
30363 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
30366 2023-03-23 Richard Biener <rguenther@suse.de>
30368 PR tree-optimization/107569
30369 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
30370 Do not push SSA names with zero uses as available leader.
30371 (process_bb): Likewise.
30373 2023-03-23 Richard Biener <rguenther@suse.de>
30375 PR tree-optimization/109262
30376 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
30377 combining a piecewise complex load avoid touching loads
30378 that throw internally. Use fun, not cfun throughout.
30380 2023-03-23 Jakub Jelinek <jakub@redhat.com>
30382 * value-range.cc (irange::irange_union, irange::intersect): Fix
30383 comment spelling bugs.
30384 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
30385 * gimple-range-trace.h: Likewise.
30386 * gimple-range-edge.cc: Likewise.
30387 (gimple_outgoing_range_stmt_p,
30388 gimple_outgoing_range::switch_edge_range,
30389 gimple_outgoing_range::edge_range_p): Likewise.
30390 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
30391 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
30392 assume_query::assume_query, assume_query::calculate_phi): Likewise.
30393 * gimple-range-edge.h: Likewise.
30394 * value-range.h (Value_Range::set, Value_Range::lower_bound,
30395 Value_Range::upper_bound, frange::set_undefined): Likewise.
30396 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
30397 gori_compute): Likewise.
30398 * gimple-range-fold.h (fold_using_range): Likewise.
30399 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
30401 * gimple-range-gori.cc (range_def_chain::in_chain_p,
30402 range_def_chain::dump, gori_map::calculate_gori,
30403 gori_compute::compute_operand_range_switch,
30404 gori_compute::logical_combine, gori_compute::refine_using_relation,
30405 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
30407 * gimple-range.h: Likewise.
30408 (enable_ranger): Likewise.
30409 * range-op.h (empty_range_varying): Likewise.
30410 * value-query.h (value_query): Likewise.
30411 * gimple-range-cache.cc (block_range_cache::set_bb_range,
30412 block_range_cache::dump, ssa_global_cache::clear_global_range,
30413 temporal_cache::temporal_value, temporal_cache::current_p,
30414 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
30415 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
30417 * gimple-range-fold.cc (fur_edge::get_phi_operand,
30418 fur_stmt::get_operand, gimple_range_adjustment,
30419 fold_using_range::range_of_phi,
30420 fold_using_range::relation_fold_and_or): Likewise.
30421 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
30422 * value-query.cc (range_query::value_of_expr,
30423 range_query::value_on_edge, range_query::query_relation): Likewise.
30424 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
30425 intersect_range_with_nonzero_bits): Likewise.
30426 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
30427 exit_range): Likewise.
30428 * value-relation.h: Likewise.
30429 (equiv_oracle, relation_trio::relation_trio, value_relation,
30430 value_relation::value_relation, pe_min): Likewise.
30431 * range-op-float.cc (range_operator_float::rv_fold,
30432 frange_arithmetic, foperator_unordered_equal::op1_range,
30433 foperator_div::rv_fold): Likewise.
30434 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
30435 * value-relation.cc (equiv_oracle::query_relation,
30436 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
30437 value_relation::apply_transitive, relation_chain_head::find_relation,
30438 dom_oracle::query_relation, dom_oracle::find_relation_block,
30439 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
30440 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
30441 create_possibly_reversed_range, adjust_op1_for_overflow,
30442 operator_mult::wi_fold, operator_exact_divide::op1_range,
30443 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
30444 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
30445 range_op_lshift_tests): Likewise.
30447 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
30449 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
30450 (move_callee_saved_registers): Detect the bug condition early.
30452 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
30454 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
30455 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
30457 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
30458 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
30459 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
30460 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
30461 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
30463 2023-03-23 Jakub Jelinek <jakub@redhat.com>
30465 PR tree-optimization/109176
30466 * tree-vect-generic.cc (expand_vector_condition): If a has
30467 vector boolean type and is a comparison, also check if both
30468 the comparison and VEC_COND_EXPR could be successfully expanded
30471 2023-03-23 Pan Li <pan2.li@intel.com>
30472 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30476 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
30477 for vector mask modes.
30478 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
30479 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
30481 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
30483 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
30485 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30488 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
30489 (emit_vlmax_op): Ditto.
30490 * config/riscv/riscv-v.cc (get_sew): New function.
30491 (emit_vlmax_vsetvl): Adapt function.
30492 (emit_pred_op): Ditto.
30493 (emit_vlmax_op): Ditto.
30494 (emit_nonvlmax_op): Ditto.
30495 (legitimize_move): Fix LRA ICE.
30496 (gen_no_side_effects_vsetvl_rtx): Adapt function.
30497 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
30498 (@mov<VB:mode><P:mode>_lra): Ditto.
30499 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
30500 (*mov<VB:mode><P:mode>_lra): Ditto.
30502 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30505 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
30506 __riscv_vlenb support.
30508 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30509 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
30510 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
30512 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30513 * config/riscv/riscv-vector-builtins.cc: Ditto.
30515 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30516 kito-cheng <kito.cheng@sifive.com>
30518 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
30519 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
30520 (pass_vsetvl::need_vsetvl): Fix bugs.
30521 (pass_vsetvl::backward_demand_fusion): Fix bugs.
30522 (pass_vsetvl::demand_fusion): Fix bugs.
30523 (eliminate_insn): Fix bugs.
30524 (insert_vsetvl): Ditto.
30525 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
30526 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
30527 * config/riscv/vector.md: Ditto.
30529 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30530 kito-cheng <kito.cheng@sifive.com>
30532 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
30533 * config/riscv/vector-iterators.md (nmsac): Ditto.
30539 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
30540 (@pred_mul_plus<mode>): Ditto.
30541 (*pred_madd<mode>): Ditto.
30542 (*pred_macc<mode>): Ditto.
30543 (*pred_mul_plus<mode>): Ditto.
30544 (@pred_mul_plus<mode>_scalar): Ditto.
30545 (*pred_madd<mode>_scalar): Ditto.
30546 (*pred_macc<mode>_scalar): Ditto.
30547 (*pred_mul_plus<mode>_scalar): Ditto.
30548 (*pred_madd<mode>_extended_scalar): Ditto.
30549 (*pred_macc<mode>_extended_scalar): Ditto.
30550 (*pred_mul_plus<mode>_extended_scalar): Ditto.
30551 (@pred_minus_mul<mode>): Ditto.
30552 (*pred_<madd_nmsub><mode>): Ditto.
30553 (*pred_nmsub<mode>): Ditto.
30554 (*pred_<macc_nmsac><mode>): Ditto.
30555 (*pred_nmsac<mode>): Ditto.
30556 (*pred_mul_<optab><mode>): Ditto.
30557 (*pred_minus_mul<mode>): Ditto.
30558 (@pred_mul_<optab><mode>_scalar): Ditto.
30559 (@pred_minus_mul<mode>_scalar): Ditto.
30560 (*pred_<madd_nmsub><mode>_scalar): Ditto.
30561 (*pred_nmsub<mode>_scalar): Ditto.
30562 (*pred_<macc_nmsac><mode>_scalar): Ditto.
30563 (*pred_nmsac<mode>_scalar): Ditto.
30564 (*pred_mul_<optab><mode>_scalar): Ditto.
30565 (*pred_minus_mul<mode>_scalar): Ditto.
30566 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
30567 (*pred_nmsub<mode>_extended_scalar): Ditto.
30568 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
30569 (*pred_nmsac<mode>_extended_scalar): Ditto.
30570 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
30571 (*pred_minus_mul<mode>_extended_scalar): Ditto.
30572 (*pred_<madd_msub><mode>): Ditto.
30573 (*pred_<macc_msac><mode>): Ditto.
30574 (*pred_<madd_msub><mode>_scalar): Ditto.
30575 (*pred_<macc_msac><mode>_scalar): Ditto.
30576 (@pred_neg_mul_<optab><mode>): Ditto.
30577 (@pred_mul_neg_<optab><mode>): Ditto.
30578 (*pred_<nmadd_msub><mode>): Ditto.
30579 (*pred_<nmsub_nmadd><mode>): Ditto.
30580 (*pred_<nmacc_msac><mode>): Ditto.
30581 (*pred_<nmsac_nmacc><mode>): Ditto.
30582 (*pred_neg_mul_<optab><mode>): Ditto.
30583 (*pred_mul_neg_<optab><mode>): Ditto.
30584 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
30585 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
30586 (*pred_<nmadd_msub><mode>_scalar): Ditto.
30587 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
30588 (*pred_<nmacc_msac><mode>_scalar): Ditto.
30589 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
30590 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
30591 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
30592 (@pred_widen_neg_mul_<optab><mode>): Ditto.
30593 (@pred_widen_mul_neg_<optab><mode>): Ditto.
30594 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
30595 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
30597 2023-03-23 liuhongt <hongtao.liu@intel.com>
30599 * builtins.cc (builtin_memset_read_str): Replace
30600 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
30601 (builtin_memset_gen_str): Ditto.
30602 * config/i386/i386-expand.cc
30603 (ix86_convert_const_wide_int_to_broadcast): Replace
30604 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
30605 (ix86_expand_vector_move): Ditto.
30606 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
30608 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
30609 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
30610 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
30611 * doc/tm.texi.in: Ditto.
30612 * target.def: Ditto.
30614 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
30616 * lra.cc (lra): Do not repeat inheritance and live range splitting
30617 when asm error is found.
30619 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
30621 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
30622 (gcn_expand_dpp_distribute_even_insn)
30623 (gcn_expand_dpp_distribute_odd_insn): Declare.
30624 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
30625 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
30626 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
30627 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
30628 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
30629 (fms<mode>4_negop2): New patterns.
30630 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
30631 (gcn_expand_dpp_distribute_even_insn)
30632 (gcn_expand_dpp_distribute_odd_insn): New functions.
30633 * config/gcn/gcn.md: Add entries to unspec enum.
30635 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
30637 PR tree-optimization/109008
30638 * value-range.cc (frange::set): Add nan_state argument.
30639 * value-range.h (class nan_state): New.
30640 (frange::get_nan_state): New.
30642 2023-03-22 Martin Liska <mliska@suse.cz>
30644 * configure: Regenerate.
30646 2023-03-21 Joseph Myers <joseph@codesourcery.com>
30648 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
30651 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
30653 PR tree-optimization/109192
30654 * gimple-range-gori.cc (gori_compute::compute_operand_range):
30655 Terminate gori calculations if a relation is not relevant.
30656 * value-relation.h (value_relation::set_relation): Allow
30657 equality between op1 and op2 if they are the same.
30659 2023-03-21 Richard Biener <rguenther@suse.de>
30661 PR tree-optimization/109219
30662 * tree-vect-loop.cc (vectorizable_reduction): Check
30663 slp_node, not STMT_SLP_TYPE.
30664 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
30665 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
30666 Remove assertion on STMT_SLP_TYPE.
30668 2023-03-21 Jakub Jelinek <jakub@redhat.com>
30670 PR tree-optimization/109215
30671 * tree.h (enum special_array_member): Adjust comments for int_0
30673 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
30674 has zero sized element type and the array has variable number of
30675 elements or constant one or more elements.
30676 (component_ref_size): Adjust comments, formatting fix.
30678 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
30680 * configure.ac: Add check for the Texinfo 6.8
30681 CONTENTS_OUTPUT_LOCATION customization variable and set it if
30683 * configure: Regenerate.
30684 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
30685 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
30686 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
30687 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
30689 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
30691 * doc/extend.texi: Associate use_hazard_barrier_return index
30692 entry with its attribute.
30693 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
30696 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
30698 * doc/implement-c.texi: Remove usage of @gol.
30699 * doc/invoke.texi: Ditto.
30700 * doc/sourcebuild.texi: Ditto.
30701 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
30702 texinfo.tex versions, the bug it was working around appears to
30705 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
30707 * doc/include/texinfo.tex: Update to 2023-01-17.19.
30709 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
30711 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
30712 @enddefbuiltin for defining built-in functions.
30713 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
30714 places where it should be used.
30716 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
30718 * doc/extend.texi (Formatted Output Function Checking): New
30719 subsection for grouping together printf et al.
30720 (Exception handling) Fix missing @ sign before copyright
30721 header, which lead to the copyright line leaking into
30722 '(gcc)Exception handling'.
30723 * doc/gcc.texi: Set document language to en_US.
30724 (@copying): Wrap front cover texts in quotations, move in manual
30727 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
30729 * doc/gcc.texi: Add the Indices appendix, to make texinfo
30730 generate nice indices overview page.
30732 2023-03-21 Richard Biener <rguenther@suse.de>
30734 PR tree-optimization/109170
30735 * gimple-range-op.cc (cfn_pass_through_arg1): New.
30736 (gimple_range_op_handler::maybe_builtin_call): Handle
30737 __builtin_expect via cfn_pass_through_arg1.
30739 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
30742 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
30743 (init_float128_ieee): Delete code to switch complex multiply and divide
30745 (complex_multiply_builtin_code): New helper function.
30746 (complex_divide_builtin_code): Likewise.
30747 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
30748 of complex 128-bit multiply and divide built-in functions.
30750 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
30753 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
30755 2023-03-19 Jonny Grant <jg@jguk.org>
30757 * doc/extend.texi (Common Function Attributes) <nonnull>:
30760 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
30762 PR rtl-optimization/109179
30763 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
30764 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
30766 2023-03-17 Jakub Jelinek <jakub@redhat.com>
30769 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
30771 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
30772 to allocate_struct_function instead of false.
30773 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
30774 nor DECL_RESULT here. Pass true as ABSTRACT_P to
30775 push_struct_function. Call targetm.target_option.relayout_function
30777 (tree_function_versioning): Formatting fix.
30779 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
30781 * lra-constraints.cc: Include hooks.h.
30782 (combine_reload_insn): New function.
30783 (lra_constraints): Call it.
30785 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30786 kito-cheng <kito.cheng@sifive.com>
30788 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
30789 as legitimate value.
30790 * config/riscv/riscv-vector-builtins.cc
30791 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
30792 (function_expander::use_widen_ternop_insn): Ditto.
30793 * config/riscv/vector.md (@vundefined<mode>): New pattern.
30794 (pred_mul_<optab><mode>_undef_merge): Remove.
30795 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
30796 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
30797 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
30798 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
30800 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30803 * config/riscv/riscv.md: Fix subreg bug.
30805 2023-03-17 Jakub Jelinek <jakub@redhat.com>
30807 PR middle-end/108685
30808 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
30809 use its loop_father rather than BODY_BB's loop_father.
30810 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
30811 If broken_loop with ordered > collapse and at least one of those
30812 extra loops aren't guaranteed to have at least one iteration, change
30813 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
30814 loop_father to l0_bb's loop_father rather than l1_bb's.
30816 2023-03-17 Jakub Jelinek <jakub@redhat.com>
30819 * gdbhooks.py (TreePrinter.to_string): Wrap
30820 gdb.parse_and_eval('tree_code_type') in a try block, parse
30821 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
30822 raises exception. Update comments for the recent tree_code_type
30825 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
30827 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
30828 issues. Add more line breaks to example so it doesn't overflow
30831 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
30833 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
30834 line breaks in examples.
30835 <malloc>: Fix bad line breaks in running text, also copy-edit
30837 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
30838 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
30840 (C++ Dialect Options) <-fcontracts>: Add line break in example.
30841 <-Wctad-maybe-unsupported>: Likewise.
30842 <-Winvalid-constexpr>: Likewise.
30843 (Warning Options) <-Wdangling-pointer>: Likewise.
30844 <-Winterference-size>: Likewise.
30845 <-Wvla-parameter>: Likewise.
30846 (Static Analyzer Options): Fix bad line breaks in running text,
30847 plus add some missing markup.
30848 (Optimize Options) <openacc-privatization>: Fix more bad line
30849 breaks in running text.
30851 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
30853 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
30854 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
30855 (expand_vec_perm_2perm_pblendv): Ditto.
30857 2023-03-16 Martin Liska <mliska@suse.cz>
30859 PR middle-end/106133
30860 * gcc.cc (driver_handle_option): Use x_main_input_basename
30861 if x_dump_base_name is null.
30862 * opts.cc (common_handle_option): Likewise.
30864 2023-03-16 Richard Biener <rguenther@suse.de>
30866 PR tree-optimization/109123
30867 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
30868 Do not emit -Wuse-after-free late.
30869 (pass_waccess::check_call): Always check call pointer uses.
30871 2023-03-16 Richard Biener <rguenther@suse.de>
30873 PR tree-optimization/109141
30874 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
30875 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
30877 (renumber_gimple_stmt_uids): ... here and
30878 (renumber_gimple_stmt_uids_in_blocks): ... here.
30879 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
30880 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
30882 (pass_waccess::check_pointer_uses): Process all PHIs.
30884 2023-03-15 David Malcolm <dmalcolm@redhat.com>
30887 * diagnostic-format-sarif.cc (class sarif_invocation): New.
30888 (class sarif_ice_notification): New.
30889 (sarif_builder::m_invocation_obj): New field.
30890 (sarif_invocation::add_notification_for_ice): New.
30891 (sarif_invocation::prepare_to_flush): New.
30892 (sarif_ice_notification::sarif_ice_notification): New.
30893 (sarif_builder::sarif_builder): Add m_invocation_obj.
30894 (sarif_builder::end_diagnostic): Special-case DK_ICE and
30896 (sarif_builder::flush_to_file): Call prepare_to_flush on
30897 m_invocation_obj. Pass the latter to make_top_level_object.
30898 (sarif_builder::make_result_object): Move creation of "locations"
30900 (sarif_builder::make_locations_arr): ...this new function.
30901 (sarif_builder::make_top_level_object): Add "invocation_obj" param
30902 and pass it to make_run_object.
30903 (sarif_builder::make_run_object): Add "invocation_obj" param and
30905 (sarif_ice_handler): New callback.
30906 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
30907 * diagnostic.cc (diagnostic_initialize): Initialize new field
30909 (diagnostic_action_after_output): If it is set, make one attempt
30910 to call ice_handler_cb.
30911 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
30913 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
30915 * config/i386/i386-expand.cc (expand_vec_perm_blend):
30916 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
30917 and fix V2HImode handling.
30918 (expand_vec_perm_1): Try to emit BLEND instruction
30919 before MOVSS/MOVSD.
30920 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
30922 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
30924 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
30926 2023-03-15 Richard Biener <rguenther@suse.de>
30928 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
30929 Do not diagnose clobbers.
30931 2023-03-15 Richard Biener <rguenther@suse.de>
30933 PR tree-optimization/109139
30934 * tree-ssa-live.cc (remove_unused_locals): Look at the
30935 base address for unused decls on the LHS of .DEFERRED_INIT.
30937 2023-03-15 Xi Ruoyao <xry111@xry111.site>
30940 * builtins.cc (inline_string_cmp): Force the character
30941 difference into "result" pseudo-register, instead of reassign
30942 the pseudo-register.
30944 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
30946 * config.gcc: Add thead.o to RISC-V extra_objs.
30947 * config/riscv/peephole.md: Add mempair peephole passes.
30948 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
30950 (th_mempair_operands_p): Likewise.
30951 (th_mempair_order_operands): Likewise.
30952 (th_mempair_prepare_save_restore_operands): Likewise.
30953 (th_mempair_save_restore_regs): Likewise.
30954 (th_mempair_output_move): Likewise.
30955 * config/riscv/riscv.cc (riscv_save_reg): Move code.
30956 (riscv_restore_reg): Move code.
30957 (riscv_for_each_saved_reg): Add code to emit mempair insns.
30958 * config/riscv/t-riscv: Add thead.cc.
30959 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
30961 (*th_mempair_store_<GPR:mode>2): Likewise.
30962 (*th_mempair_load_extendsidi2): Likewise.
30963 (*th_mempair_load_zero_extendsidi2): Likewise.
30964 * config/riscv/thead.cc: New file.
30966 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
30968 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
30969 New constraint "th_f_fmv".
30970 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
30972 * config/riscv/riscv.cc (riscv_split_doubleword_move):
30973 Add split code for XTheadFmv.
30974 (riscv_secondary_memory_needed): XTheadFmv does not need
30976 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
30977 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
30978 movdf_hardfloat_rv32.
30979 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
30980 (th_fmv_x_w): New INSN.
30981 (th_fmv_x_hw): New INSN.
30983 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
30985 * config/riscv/riscv.md (maddhisi4): New expand.
30986 (msubhisi4): New expand.
30987 * config/riscv/thead.md (*th_mula<mode>): New pattern.
30988 (*th_mulawsi): New pattern.
30989 (*th_mulawsi2): New pattern.
30990 (*th_maddhisi4): New pattern.
30991 (*th_sextw_maddhisi4): New pattern.
30992 (*th_muls<mode>): New pattern.
30993 (*th_mulswsi): New pattern.
30994 (*th_mulswsi2): New pattern.
30995 (*th_msubhisi4): New pattern.
30996 (*th_sextw_msubhisi4): New pattern.
30998 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31000 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
31001 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
31003 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
31005 (riscv_expand_conditional_move): New function.
31006 (riscv_expand_conditional_move_onesided): New function.
31007 * config/riscv/riscv.md: Add support for XTheadCondMov.
31008 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
31009 support for XTheadCondMov.
31010 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
31012 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31014 * config/riscv/bitmanip.md (clzdi2): New expand.
31015 (clzsi2): New expand.
31016 (ctz<mode>2): New expand.
31017 (popcount<mode>2): New expand.
31018 (<bitmanip_optab>si2): Rename INSN.
31019 (*<bitmanip_optab>si2): Hide INSN name.
31020 (<bitmanip_optab>di2): Rename INSN.
31021 (*<bitmanip_optab>di2): Hide INSN name.
31022 (rotrsi3): Remove INSN.
31023 (rotr<mode>3): Add expand.
31024 (*rotrsi3): New INSN.
31025 (rotrdi3): Rename INSN.
31026 (*rotrdi3): Hide INSN name.
31027 (rotrsi3_sext): Rename INSN.
31028 (*rotrsi3_sext): Hide INSN name.
31029 (bswap<mode>2): Remove INSN.
31030 (bswapdi2): Add expand.
31031 (bswapsi2): Add expand.
31032 (*bswap<mode>2): Hide INSN name.
31033 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
31035 * config/riscv/riscv.md (extv<mode>): New expand.
31036 (extzv<mode>): New expand.
31037 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
31038 (*th_ext<mode>): New INSN.
31039 (*th_extu<mode>): New INSN.
31040 (*th_clz<mode>2): New INSN.
31041 (*th_rev<mode>2): New INSN.
31043 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31045 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
31046 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
31048 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31050 * config/riscv/riscv.md: Include thead.md
31051 * config/riscv/thead.md: New file.
31053 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31055 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
31057 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31059 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
31060 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
31061 (MASK_XTHEADBB): New.
31062 (MASK_XTHEADBS): New.
31063 (MASK_XTHEADCMO): New.
31064 (MASK_XTHEADCONDMOV): New.
31065 (MASK_XTHEADFMEMIDX): New.
31066 (MASK_XTHEADFMV): New.
31067 (MASK_XTHEADINT): New.
31068 (MASK_XTHEADMAC): New.
31069 (MASK_XTHEADMEMIDX): New.
31070 (MASK_XTHEADMEMPAIR): New.
31071 (MASK_XTHEADSYNC): New.
31072 (TARGET_XTHEADBA): New.
31073 (TARGET_XTHEADBB): New.
31074 (TARGET_XTHEADBS): New.
31075 (TARGET_XTHEADCMO): New.
31076 (TARGET_XTHEADCONDMOV): New.
31077 (TARGET_XTHEADFMEMIDX): New.
31078 (TARGET_XTHEADFMV): New.
31079 (TARGET_XTHEADINT): New.
31080 (TARGET_XTHEADMAC): New.
31081 (TARGET_XTHEADMEMIDX): New.
31082 (TARGET_XTHEADMEMPAIR): new.
31083 (TARGET_XTHEADSYNC): New.
31084 * config/riscv/riscv.opt: Add riscv_xthead_subext.
31086 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
31089 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
31090 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
31091 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
31093 2023-03-14 Jakub Jelinek <jakub@redhat.com>
31096 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
31097 when lo is equal to dhi and hi is a MEM which uses dlo register.
31099 2023-03-14 Martin Jambor <mjambor@suse.cz>
31102 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
31103 global0 instead of zeroing when it does not have as many counts as
31106 2023-03-14 Martin Jambor <mjambor@suse.cz>
31109 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
31110 ipa count, remove assert, lenient_count_portion_handling, dump
31111 also orig_node_count.
31113 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
31115 * config/i386/i386-expand.cc (expand_vec_perm_movs):
31116 Handle V2SImode for TARGET_MMX_WITH_SSE.
31117 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
31118 using V2FI mode iterator to handle both V2SI and V2SF modes.
31120 2023-03-14 Sam James <sam@gentoo.org>
31122 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
31123 including <sstream> earlier.
31124 * system.h: Add INCLUDE_SSTREAM.
31126 2023-03-14 Richard Biener <rguenther@suse.de>
31128 * tree-ssa-live.cc (remove_unused_locals): Do not treat
31129 the .DEFERRED_INIT of a variable as use, instead remove
31130 that if it is the only use.
31132 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
31134 PR rtl-optimization/107762
31135 * expr.cc (emit_group_store): Revert latest change.
31137 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
31139 PR tree-optimization/109005
31140 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
31141 aggregate type check.
31143 2023-03-14 Jakub Jelinek <jakub@redhat.com>
31145 PR tree-optimization/109115
31146 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
31147 r.upper_bound () on r.undefined_p () range.
31149 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
31151 PR tree-optimization/106896
31152 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
31153 implementatoin with probability_in; avoid some asserts.
31155 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
31157 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
31159 2023-03-13 Sean Bright <sean@seanbright.com>
31161 * doc/invoke.texi (Warning Options): Remove errant 'See'
31164 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31166 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
31167 REG_OK_FOR_BASE_P): Remove.
31169 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31171 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
31172 (=vd,vd,vr,vr): Ditto.
31173 * config/riscv/vector.md: Ditto.
31175 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31177 * config/riscv/riscv-vector-builtins.cc
31178 (function_expander::use_compare_insn): Add operand predicate check.
31180 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31182 * config/riscv/vector.md: Fine tune RA constraints.
31184 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
31186 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
31187 hsaco assemble/link.
31189 2023-03-13 Richard Biener <rguenther@suse.de>
31191 PR tree-optimization/109046
31192 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
31193 piecewise complex loads.
31195 2023-03-12 Jakub Jelinek <jakub@redhat.com>
31197 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
31198 (aarch64_bf16_ptr_type_node): Adjust comment.
31199 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
31200 bfloat16_type_node rather than aarch64_bf16_type_node.
31201 (aarch64_libgcc_floating_mode_supported_p,
31202 aarch64_scalar_mode_supported_p): Also support BFmode.
31203 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
31204 (aarch64_invalid_binary_op): Remove BFmode related rejections.
31205 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
31206 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
31207 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
31208 aarch64_bf16_type_node.
31209 (aarch64_init_simd_builtin_types): Likewise.
31210 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
31211 which is created in tree.cc already.
31212 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
31214 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
31216 PR middle-end/109031
31217 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
31218 ensure that the type of x is as wide or wider than the type of a.
31220 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31223 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
31224 (*bitmask_shift_plus<mode>): New.
31225 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
31226 (@aarch64_bitmask_udiv<mode>3): Remove.
31227 * config/aarch64/aarch64.cc
31228 (aarch64_vectorize_can_special_div_by_constant,
31229 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
31230 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
31231 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
31233 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31236 * target.def (preferred_div_as_shifts_over_mult): New.
31237 * doc/tm.texi.in: Document it.
31238 * doc/tm.texi: Regenerate.
31239 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
31240 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
31241 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
31243 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31244 Richard Sandiford <richard.sandiford@arm.com>
31247 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
31250 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31251 Andrew MacLeod <amacleod@redhat.com>
31254 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
31255 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
31257 (gimple_range_op_handler::maybe_non_standard): New.
31258 * range-op.cc (class operator_widen_plus_signed,
31259 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
31260 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
31261 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
31262 operator_widen_mult_unsigned::wi_fold,
31263 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
31264 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
31265 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
31266 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
31268 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31271 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
31272 * doc/tm.texi.in: Likewise.
31273 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
31274 * expmed.cc (expand_divmod): Likewise.
31275 * expmed.h (expand_divmod): Likewise.
31276 * expr.cc (force_operand, expand_expr_divmod): Likewise.
31277 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
31278 * target.def (can_special_div_by_const): Remove.
31279 * target.h: Remove tree-core.h include
31280 * targhooks.cc (default_can_special_div_by_const): Remove.
31281 * targhooks.h (default_can_special_div_by_const): Remove.
31282 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
31283 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
31284 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
31286 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
31288 * doc/install.texi2html: Fix issue number typo in comment.
31290 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
31292 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
31295 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
31297 * doc/invoke.texi (Optimize Options): Add markup to
31298 description of asan-kernel-mem-intrinsic-prefix, and clarify
31301 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
31303 * doc/extend.texi (Named Address Spaces): Drop a redundant link
31306 2023-03-11 Jeff Law <jlaw@ventanamicro>
31309 * doc/extend.texi: Clarify Attribute Syntax a bit.
31311 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
31313 * doc/install.texi (Prerequisites): Suggest using newer versions
31315 (Final install): Clean up and modernize discussion of how to
31316 build or obtain the GCC manuals.
31317 * doc/install.texi2html: Update comment to point to the PR instead
31318 of "makeinfo 4.7 brokenness" (it's not specific to that version).
31320 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31323 * optabs.cc (expand_fix): For conversions from BFmode to integral,
31324 use shifts to convert it to SFmode first and then convert SFmode
31327 2023-03-10 Andrew Pinski <apinski@marvell.com>
31329 * config/aarch64/aarch64.md: Add a new define_split
31332 2023-03-10 Richard Biener <rguenther@suse.de>
31334 * tree-ssa-structalias.cc (solve_graph): Immediately
31335 iterate self-cycles.
31337 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31339 PR tree-optimization/109008
31340 * range-op-float.cc (float_widen_lhs_range): If not
31341 -frounding-math and not IBM double double format, extend lhs
31342 range just by 0.5ulp rather than 1ulp in each direction.
31344 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31347 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
31349 * config/i386/t-cygwin-w64: Remove.
31351 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31354 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
31355 C++14, don't declare as extern const arrays.
31356 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
31357 static constexpr member arrays for C++11 or C++14.
31358 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
31359 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
31360 (TREE_CODE_LENGTH): For C++11 or C++14 use
31361 tree_code_length_tmpl <0>::tree_code_length instead of
31363 * tree.cc (tree_code_type, tree_code_length): Remove.
31365 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31368 * common.opt (fcanon-prefix-map): New option.
31369 * opts.cc: Include file-prefix-map.h.
31370 (flag_canon_prefix_map): New variable.
31371 (common_handle_option): Handle OPT_fcanon_prefix_map.
31372 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
31373 * file-prefix-map.h (flag_canon_prefix_map): Declare.
31374 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
31376 (add_prefix_map): Initialize canonicalize member from
31377 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
31378 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
31379 use lrealpath result only for map->canonicalize map entries.
31380 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
31381 * opts-global.cc (handle_common_deferred_options): Clear
31382 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
31383 * doc/invoke.texi (-fcanon-prefix-map): Document.
31384 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
31385 see also for -fcanon-prefix-map.
31386 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
31388 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31391 * cgraphunit.cc (check_global_declaration): Don't warn for unused
31392 variables which have OPT_Wunused_variable warning suppressed.
31394 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31396 PR tree-optimization/109008
31397 * range-op-float.cc (float_widen_lhs_range): If lb is
31398 minimum representable finite number or ub is maximum
31399 representable finite number, instead of widening it to
31400 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
31401 Temporarily clear flag_finite_math_only when canonicalizing
31404 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31406 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
31407 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
31408 (gimple_fold_builtin): Ditto.
31409 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
31410 (class vleff): Ditto.
31412 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31413 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
31415 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
31416 (struct fault_load_def): Ditto.
31418 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31419 * config/riscv/riscv-vector-builtins.cc
31420 (rvv_arg_type_info::get_tree_type): Add size_ptr.
31421 (gimple_folder::gimple_folder): New class.
31422 (gimple_folder::fold): Ditto.
31423 (gimple_fold_builtin): New function.
31424 (get_read_vl_instance): Ditto.
31425 (get_read_vl_decl): Ditto.
31426 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
31427 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
31428 (get_read_vl_instance): New function.
31429 (get_read_vl_decl): Ditto.
31430 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
31431 (read_vl_insn_p): Ditto.
31432 (available_occurrence_p): Ditto.
31433 (backward_propagate_worthwhile_p): Ditto.
31434 (gen_vsetvl_pat): Adapt for vleff support.
31435 (get_forward_read_vl_insn): New function.
31436 (get_backward_fault_first_load_insn): Ditto.
31437 (source_equal_p): Adapt for vleff support.
31438 (first_ratio_invalid_for_second_sew_p): Remove.
31439 (first_ratio_invalid_for_second_lmul_p): Ditto.
31440 (first_lmul_less_than_second_lmul_p): Ditto.
31441 (first_ratio_less_than_second_ratio_p): Ditto.
31442 (support_relaxed_compatible_p): New function.
31443 (vector_insn_info::operator>): Remove.
31444 (vector_insn_info::operator>=): Refine.
31445 (vector_insn_info::parse_insn): Adapt for vleff support.
31446 (vector_insn_info::compatible_p): Ditto.
31447 (vector_insn_info::update_fault_first_load_avl): New function.
31448 (pass_vsetvl::transfer_after): Adapt for vleff support.
31449 (pass_vsetvl::demand_fusion): Ditto.
31450 (pass_vsetvl::cleanup_insns): Ditto.
31451 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
31452 redundant condtions.
31453 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
31454 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
31455 * config/riscv/riscv.md: Adapt for vleff support.
31456 * config/riscv/t-riscv: Ditto.
31457 * config/riscv/vector-iterators.md: New iterator.
31458 * config/riscv/vector.md (read_vlsi): New pattern.
31459 (read_vldi_zero_extend): Ditto.
31460 (@pred_fault_load<mode>): Ditto.
31462 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31464 * config/riscv/riscv-vector-builtins.cc
31465 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
31466 (function_expander::use_widen_ternop_insn): Ditto.
31467 * optabs.cc (maybe_gen_insn): Extend nops handling.
31469 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31471 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
31472 patterns according to RVV ISA.
31473 * config/riscv/vector-iterators.md: New iterators.
31474 * config/riscv/vector.md
31475 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
31476 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
31477 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
31478 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
31479 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
31480 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
31481 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
31482 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
31483 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
31484 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
31485 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
31486 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
31487 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
31488 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
31490 2023-03-10 Michael Collison <collison@rivosinc.com>
31492 * tree-vect-loop-manip.cc (vect_do_peeling): Use
31493 result of constant_lower_bound instead of vf for the lower
31494 bound of the epilog loop trip count.
31496 2023-03-09 Tamar Christina <tamar.christina@arm.com>
31498 * passes.cc (emergency_dump_function): Finish graph generation.
31500 2023-03-09 Tamar Christina <tamar.christina@arm.com>
31502 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
31503 and bottom bit only.
31505 2023-03-09 Andrew Pinski <apinski@marvell.com>
31507 PR tree-optimization/108980
31508 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
31509 Reorgnize the call to warning for not strict flexible arrays
31510 to be before the check of warned.
31512 2023-03-09 Jason Merrill <jason@redhat.com>
31514 * doc/extend.texi: Comment out __is_deducible docs.
31516 2023-03-09 Jason Merrill <jason@redhat.com>
31519 * doc/extend.texi (Type Traits):: Document __is_deducible.
31521 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
31524 * config.host: add object for x86_64-*-mingw*.
31525 * config/i386/sym-mingw32.cc: dummy file to attach
31527 * config/i386/utf8-mingw32.rc: windres resource file.
31528 * config/i386/winnt-utf8.manifest: XML manifest to
31530 * config/i386/x-mingw32: reference to x-mingw32-utf8.
31531 * config/i386/x-mingw32-utf8: Makefile fragment to
31532 embed UTF-8 manifest.
31534 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
31536 * lra-constraints.cc (process_alt_operands): Use operand modes for
31537 clobbered regs instead of the biggest access mode.
31539 2023-03-09 Richard Biener <rguenther@suse.de>
31541 PR middle-end/108995
31542 * fold-const.cc (extract_muldiv_1): Avoid folding
31543 (CST * b) / CST2 when sanitizing overflow and we rely on
31544 overflow being undefined.
31546 2023-03-09 Jakub Jelinek <jakub@redhat.com>
31547 Richard Biener <rguenther@suse.de>
31549 PR tree-optimization/109008
31550 * range-op-float.cc (float_widen_lhs_range): New function.
31551 (foperator_plus::op1_range, foperator_minus::op1_range,
31552 foperator_minus::op2_range, foperator_mult::op1_range,
31553 foperator_div::op1_range, foperator_div::op2_range): Use it.
31555 2023-03-07 Jonathan Grant <jg@jguk.org>
31558 * doc/invoke.texi (Instrumentation Options): Clarify
31559 LeakSanitizer behavior.
31561 2023-03-07 Benson Muite <benson_muite@emailplus.org>
31563 * doc/install.texi (Prerequisites): Add link to gmplib.org.
31565 2023-03-07 Pan Li <pan2.li@intel.com>
31566 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31570 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
31572 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
31573 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
31574 * genmodes.cc (adj_precision): New.
31575 (ADJUST_PRECISION): New.
31576 (emit_mode_adjustments): Handle ADJUST_PRECISION.
31578 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
31580 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
31582 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
31584 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
31585 {s|u}{max|min} in QI, HI and DI modes.
31586 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
31587 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
31588 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
31589 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
31592 2023-03-06 Richard Biener <rguenther@suse.de>
31594 PR tree-optimization/109025
31595 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
31596 the inner LC PHI use is the inner loop PHI latch definition
31597 before classifying an outer PHI as double reduction.
31599 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
31602 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
31604 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
31605 (X86_TUNE_USE_SCATTER): Likewise.
31607 2023-03-06 Xi Ruoyao <xry111@xry111.site>
31610 * config/loongarch/loongarch.h (FP_RETURN): Use
31611 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
31612 (UNITS_PER_FP_ARG): Likewise.
31614 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31616 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
31617 (pass_vsetvl::backward_demand_fusion): Ditto.
31619 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
31620 SiYu Wu <siyu@isrc.iscas.ac.cn>
31622 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
31624 (riscv_sm3p1_<mode>): New.
31625 (riscv_sm4ed_<mode>): New.
31626 (riscv_sm4ks_<mode>): New.
31627 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
31628 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
31629 ZKSH's built-in functions.
31631 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
31632 SiYu Wu <siyu@isrc.iscas.ac.cn>
31634 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
31635 (riscv_sha256sig1_<mode>): New.
31636 (riscv_sha256sum0_<mode>): New.
31637 (riscv_sha256sum1_<mode>): New.
31638 (riscv_sha512sig0h): New.
31639 (riscv_sha512sig0l): New.
31640 (riscv_sha512sig1h): New.
31641 (riscv_sha512sig1l): New.
31642 (riscv_sha512sum0r): New.
31643 (riscv_sha512sum1r): New.
31644 (riscv_sha512sig0): New.
31645 (riscv_sha512sig1): New.
31646 (riscv_sha512sum0): New.
31647 (riscv_sha512sum1): New.
31648 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
31649 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
31650 built-in functions.
31651 (DIRECT_BUILTIN): Add new.
31653 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
31654 SiYu Wu <siyu@isrc.iscas.ac.cn>
31656 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
31658 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
31659 (riscv_aes32dsmi): New.
31660 (riscv_aes64ds): New.
31661 (riscv_aes64dsm): New.
31662 (riscv_aes64im): New.
31663 (riscv_aes64ks1i): New.
31664 (riscv_aes64ks2): New.
31665 (riscv_aes32esi): New.
31666 (riscv_aes32esmi): New.
31667 (riscv_aes64es): New.
31668 (riscv_aes64esm): New.
31669 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
31670 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
31671 ZKNE's built-in functions.
31673 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
31674 SiYu Wu <siyu@isrc.iscas.ac.cn>
31676 * config/riscv/bitmanip.md: Add ZBKB's instructions.
31677 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
31678 * config/riscv/riscv.md: Add new type for crypto instructions.
31679 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
31681 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
31682 extension's built-in function file.
31684 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
31685 SiYu Wu <siyu@isrc.iscas.ac.cn>
31687 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
31688 (RISCV_FTYPE_NAME3): New.
31689 (RISCV_ATYPE_QI): New.
31690 (RISCV_ATYPE_HI): New.
31691 (RISCV_FTYPE_ATYPES2): New.
31692 (RISCV_FTYPE_ATYPES3): New.
31693 * config/riscv/riscv-ftypes.def (2): New.
31696 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
31698 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
31701 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31702 kito-cheng <kito.cheng@sifive.com>
31704 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
31705 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
31706 (riscv_register_pragmas): Add builtin function check call.
31707 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
31708 (check_builtin_call): New function.
31709 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
31710 (class vreinterpret): Ditto.
31711 (class vlmul_ext): Ditto.
31712 (class vlmul_trunc): Ditto.
31713 (class vset): Ditto.
31714 (class vget): Ditto.
31716 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31717 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
31733 (vundefined): Add new intrinsic.
31734 (vreinterpret): Ditto.
31735 (vlmul_ext): Ditto.
31736 (vlmul_trunc): Ditto.
31739 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
31740 (struct narrow_alu_def): Ditto.
31741 (struct reduc_alu_def): Ditto.
31742 (struct vundefined_def): Ditto.
31743 (struct misc_def): Ditto.
31744 (struct vset_def): Ditto.
31745 (struct vget_def): Ditto.
31747 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31748 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
31749 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
31750 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
31751 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
31752 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
31753 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
31754 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
31755 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
31756 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
31757 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
31758 (DEF_RVV_LMUL1_OPS): Ditto.
31759 (DEF_RVV_LMUL2_OPS): Ditto.
31760 (DEF_RVV_LMUL4_OPS): Ditto.
31761 (vint16mf4_t): Ditto.
31762 (vint16mf2_t): Ditto.
31763 (vint16m1_t): Ditto.
31764 (vint16m2_t): Ditto.
31765 (vint16m4_t): Ditto.
31766 (vint16m8_t): Ditto.
31767 (vint32mf2_t): Ditto.
31768 (vint32m1_t): Ditto.
31769 (vint32m2_t): Ditto.
31770 (vint32m4_t): Ditto.
31771 (vint32m8_t): Ditto.
31772 (vint64m1_t): Ditto.
31773 (vint64m2_t): Ditto.
31774 (vint64m4_t): Ditto.
31775 (vint64m8_t): Ditto.
31776 (vuint16mf4_t): Ditto.
31777 (vuint16mf2_t): Ditto.
31778 (vuint16m1_t): Ditto.
31779 (vuint16m2_t): Ditto.
31780 (vuint16m4_t): Ditto.
31781 (vuint16m8_t): Ditto.
31782 (vuint32mf2_t): Ditto.
31783 (vuint32m1_t): Ditto.
31784 (vuint32m2_t): Ditto.
31785 (vuint32m4_t): Ditto.
31786 (vuint32m8_t): Ditto.
31787 (vuint64m1_t): Ditto.
31788 (vuint64m2_t): Ditto.
31789 (vuint64m4_t): Ditto.
31790 (vuint64m8_t): Ditto.
31791 (vint8mf4_t): Ditto.
31792 (vint8mf2_t): Ditto.
31793 (vint8m1_t): Ditto.
31794 (vint8m2_t): Ditto.
31795 (vint8m4_t): Ditto.
31796 (vint8m8_t): Ditto.
31797 (vuint8mf4_t): Ditto.
31798 (vuint8mf2_t): Ditto.
31799 (vuint8m1_t): Ditto.
31800 (vuint8m2_t): Ditto.
31801 (vuint8m4_t): Ditto.
31802 (vuint8m8_t): Ditto.
31803 (vint8mf8_t): Ditto.
31804 (vuint8mf8_t): Ditto.
31805 (vfloat32mf2_t): Ditto.
31806 (vfloat32m1_t): Ditto.
31807 (vfloat32m2_t): Ditto.
31808 (vfloat32m4_t): Ditto.
31809 (vfloat64m1_t): Ditto.
31810 (vfloat64m2_t): Ditto.
31811 (vfloat64m4_t): Ditto.
31812 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
31813 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
31814 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
31815 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
31816 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
31817 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
31818 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
31819 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
31820 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
31821 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
31822 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
31823 (DEF_RVV_LMUL1_OPS): Ditto.
31824 (DEF_RVV_LMUL2_OPS): Ditto.
31825 (DEF_RVV_LMUL4_OPS): Ditto.
31826 (DEF_RVV_TYPE_INDEX): Ditto.
31827 (required_extensions_p): Adapt for new intrinsic support/
31828 (get_required_extensions): New function.
31829 (check_required_extensions): Ditto.
31830 (unsigned_base_type_p): Remove.
31831 (rvv_arg_type_info::get_scalar_ptr_type): New function.
31832 (get_mode_for_bitsize): Remove.
31833 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
31834 (rvv_arg_type_info::get_base_vector_type): Ditto.
31835 (rvv_arg_type_info::get_function_type_index): Ditto.
31836 (DEF_RVV_BASE_TYPE): New def.
31837 (function_builder::apply_predication): New class.
31838 (function_expander::mask_mode): Ditto.
31839 (function_checker::function_checker): Ditto.
31840 (function_checker::report_non_ice): Ditto.
31841 (function_checker::report_out_of_range): Ditto.
31842 (function_checker::require_immediate): Ditto.
31843 (function_checker::require_immediate_range): Ditto.
31844 (function_checker::check): Ditto.
31845 (check_builtin_call): Ditto.
31846 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
31847 (DEF_RVV_BASE_TYPE): Ditto.
31848 (DEF_RVV_TYPE_INDEX): Ditto.
31849 (vbool64_t): Ditto.
31850 (vbool32_t): Ditto.
31851 (vbool16_t): Ditto.
31856 (vuint8mf8_t): Ditto.
31857 (vuint8mf4_t): Ditto.
31858 (vuint8mf2_t): Ditto.
31859 (vuint8m1_t): Ditto.
31860 (vuint8m2_t): Ditto.
31861 (vint8m4_t): Ditto.
31862 (vuint8m4_t): Ditto.
31863 (vint8m8_t): Ditto.
31864 (vuint8m8_t): Ditto.
31865 (vint16mf4_t): Ditto.
31866 (vuint16mf2_t): Ditto.
31867 (vuint16m1_t): Ditto.
31868 (vuint16m2_t): Ditto.
31869 (vuint16m4_t): Ditto.
31870 (vuint16m8_t): Ditto.
31871 (vint32mf2_t): Ditto.
31872 (vuint32m1_t): Ditto.
31873 (vuint32m2_t): Ditto.
31874 (vuint32m4_t): Ditto.
31875 (vuint32m8_t): Ditto.
31876 (vuint64m1_t): Ditto.
31877 (vuint64m2_t): Ditto.
31878 (vuint64m4_t): Ditto.
31879 (vuint64m8_t): Ditto.
31880 (vfloat32mf2_t): Ditto.
31881 (vfloat32m1_t): Ditto.
31882 (vfloat32m2_t): Ditto.
31883 (vfloat32m4_t): Ditto.
31884 (vfloat32m8_t): Ditto.
31885 (vfloat64m1_t): Ditto.
31886 (vfloat64m4_t): Ditto.
31887 (vector): Move it def.
31890 (signed_vector): Ditto.
31891 (unsigned_vector): Ditto.
31892 (unsigned_scalar): Ditto.
31893 (vector_ptr): Ditto.
31894 (scalar_ptr): Ditto.
31895 (scalar_const_ptr): Ditto.
31899 (unsigned_long): Ditto.
31901 (eew8_index): Ditto.
31902 (eew16_index): Ditto.
31903 (eew32_index): Ditto.
31904 (eew64_index): Ditto.
31905 (shift_vector): Ditto.
31906 (double_trunc_vector): Ditto.
31907 (quad_trunc_vector): Ditto.
31908 (oct_trunc_vector): Ditto.
31909 (double_trunc_scalar): Ditto.
31910 (double_trunc_signed_vector): Ditto.
31911 (double_trunc_unsigned_vector): Ditto.
31912 (double_trunc_unsigned_scalar): Ditto.
31913 (double_trunc_float_vector): Ditto.
31914 (float_vector): Ditto.
31915 (lmul1_vector): Ditto.
31916 (widen_lmul1_vector): Ditto.
31917 (eew8_interpret): Ditto.
31918 (eew16_interpret): Ditto.
31919 (eew32_interpret): Ditto.
31920 (eew64_interpret): Ditto.
31921 (vlmul_ext_x2): Ditto.
31922 (vlmul_ext_x4): Ditto.
31923 (vlmul_ext_x8): Ditto.
31924 (vlmul_ext_x16): Ditto.
31925 (vlmul_ext_x32): Ditto.
31926 (vlmul_ext_x64): Ditto.
31927 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
31928 (struct function_type_info): New function.
31929 (struct rvv_arg_type_info): Ditto.
31930 (class function_checker): New class.
31931 (rvv_arg_type_info::get_scalar_type): New function.
31932 (rvv_arg_type_info::get_vector_type): Ditto.
31933 (function_expander::ret_mode): New function.
31934 (function_checker::arg_mode): Ditto.
31935 (function_checker::ret_mode): Ditto.
31936 * config/riscv/t-riscv: Add generator.
31937 * config/riscv/vector-iterators.md: New iterators.
31938 * config/riscv/vector.md (vundefined<mode>): New pattern.
31939 (@vundefined<mode>): Ditto.
31940 (@vreinterpret<mode>): Ditto.
31941 (@vlmul_extx2<mode>): Ditto.
31942 (@vlmul_extx4<mode>): Ditto.
31943 (@vlmul_extx8<mode>): Ditto.
31944 (@vlmul_extx16<mode>): Ditto.
31945 (@vlmul_extx32<mode>): Ditto.
31946 (@vlmul_extx64<mode>): Ditto.
31947 (*vlmul_extx2<mode>): Ditto.
31948 (*vlmul_extx4<mode>): Ditto.
31949 (*vlmul_extx8<mode>): Ditto.
31950 (*vlmul_extx16<mode>): Ditto.
31951 (*vlmul_extx32<mode>): Ditto.
31952 (*vlmul_extx64<mode>): Ditto.
31953 * config/riscv/genrvv-type-indexer.cc: New file.
31955 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31957 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
31958 (slide1_sew64_helper): New function.
31959 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
31960 (get_unknown_min_value): Ditto.
31961 (force_vector_length_operand): Ditto.
31962 (gen_no_side_effects_vsetvl_rtx): Ditto.
31963 (get_vl_x2_rtx): Ditto.
31964 (slide1_sew64_helper): Ditto.
31965 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
31966 (class vrgather): Ditto.
31967 (class vrgatherei16): Ditto.
31968 (class vcompress): Ditto.
31970 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31971 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
31972 (vslidedown): Ditto.
31973 (vslide1up): Ditto.
31974 (vslide1down): Ditto.
31975 (vfslide1up): Ditto.
31976 (vfslide1down): Ditto.
31978 (vrgatherei16): Ditto.
31979 (vcompress): Ditto.
31980 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
31981 (vint8mf8_t): Ditto.
31982 (vint8mf4_t): Ditto.
31983 (vint8mf2_t): Ditto.
31984 (vint8m1_t): Ditto.
31985 (vint8m2_t): Ditto.
31986 (vint8m4_t): Ditto.
31987 (vint16mf4_t): Ditto.
31988 (vint16mf2_t): Ditto.
31989 (vint16m1_t): Ditto.
31990 (vint16m2_t): Ditto.
31991 (vint16m4_t): Ditto.
31992 (vint16m8_t): Ditto.
31993 (vint32mf2_t): Ditto.
31994 (vint32m1_t): Ditto.
31995 (vint32m2_t): Ditto.
31996 (vint32m4_t): Ditto.
31997 (vint32m8_t): Ditto.
31998 (vint64m1_t): Ditto.
31999 (vint64m2_t): Ditto.
32000 (vint64m4_t): Ditto.
32001 (vint64m8_t): Ditto.
32002 (vuint8mf8_t): Ditto.
32003 (vuint8mf4_t): Ditto.
32004 (vuint8mf2_t): Ditto.
32005 (vuint8m1_t): Ditto.
32006 (vuint8m2_t): Ditto.
32007 (vuint8m4_t): Ditto.
32008 (vuint16mf4_t): Ditto.
32009 (vuint16mf2_t): Ditto.
32010 (vuint16m1_t): Ditto.
32011 (vuint16m2_t): Ditto.
32012 (vuint16m4_t): Ditto.
32013 (vuint16m8_t): Ditto.
32014 (vuint32mf2_t): Ditto.
32015 (vuint32m1_t): Ditto.
32016 (vuint32m2_t): Ditto.
32017 (vuint32m4_t): Ditto.
32018 (vuint32m8_t): Ditto.
32019 (vuint64m1_t): Ditto.
32020 (vuint64m2_t): Ditto.
32021 (vuint64m4_t): Ditto.
32022 (vuint64m8_t): Ditto.
32023 (vfloat32mf2_t): Ditto.
32024 (vfloat32m1_t): Ditto.
32025 (vfloat32m2_t): Ditto.
32026 (vfloat32m4_t): Ditto.
32027 (vfloat32m8_t): Ditto.
32028 (vfloat64m1_t): Ditto.
32029 (vfloat64m2_t): Ditto.
32030 (vfloat64m4_t): Ditto.
32031 (vfloat64m8_t): Ditto.
32032 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
32033 * config/riscv/riscv.md: Adjust RVV instruction types.
32034 * config/riscv/vector-iterators.md (down): New iterator.
32035 (=vd,vr): New attribute.
32036 (UNSPEC_VSLIDE1UP): New unspec.
32037 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
32038 (*pred_slide<ud><mode>): Ditto.
32039 (*pred_slide<ud><mode>_extended): Ditto.
32040 (@pred_gather<mode>): Ditto.
32041 (@pred_gather<mode>_scalar): Ditto.
32042 (@pred_gatherei16<mode>): Ditto.
32043 (@pred_compress<mode>): Ditto.
32045 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32047 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
32049 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32051 * config/riscv/constraints.md (Wb1): New constraint.
32052 * config/riscv/predicates.md
32053 (vector_least_significant_set_mask_operand): New predicate.
32054 (vector_broadcast_mask_operand): Ditto.
32055 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
32056 (gen_scalar_move_mask): New function.
32057 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
32058 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
32059 (class vmv_s): Ditto.
32061 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32062 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
32066 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
32068 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32069 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
32070 (function_expander::use_exact_insn): New function.
32071 (function_expander::use_contiguous_load_insn): New function.
32072 (function_expander::use_contiguous_store_insn): New function.
32073 (function_expander::use_ternop_insn): New function.
32074 (function_expander::use_widen_ternop_insn): New function.
32075 (function_expander::use_scalar_move_insn): New function.
32076 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
32077 * config/riscv/riscv-vector-builtins.h
32078 (function_expander::add_scalar_move_mask_operand): New class.
32079 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
32080 (scalar_move_insn_p): Ditto.
32081 (has_vsetvl_killed_avl_p): Ditto.
32082 (anticipatable_occurrence_p): Ditto.
32083 (insert_vsetvl): Ditto.
32084 (get_vl_vtype_info): Ditto.
32085 (calculate_sew): Ditto.
32086 (calculate_vlmul): Ditto.
32087 (incompatible_avl_p): Ditto.
32088 (different_sew_p): Ditto.
32089 (different_lmul_p): Ditto.
32090 (different_ratio_p): Ditto.
32091 (different_tail_policy_p): Ditto.
32092 (different_mask_policy_p): Ditto.
32093 (possible_zero_avl_p): Ditto.
32094 (first_ratio_invalid_for_second_sew_p): Ditto.
32095 (first_ratio_invalid_for_second_lmul_p): Ditto.
32096 (second_ratio_invalid_for_first_sew_p): Ditto.
32097 (second_ratio_invalid_for_first_lmul_p): Ditto.
32098 (second_sew_less_than_first_sew_p): Ditto.
32099 (first_sew_less_than_second_sew_p): Ditto.
32100 (compare_lmul): Ditto.
32101 (second_lmul_less_than_first_lmul_p): Ditto.
32102 (first_lmul_less_than_second_lmul_p): Ditto.
32103 (first_ratio_less_than_second_ratio_p): Ditto.
32104 (second_ratio_less_than_first_ratio_p): Ditto.
32105 (DEF_INCOMPATIBLE_COND): Ditto.
32106 (greatest_sew): Ditto.
32107 (first_sew): Ditto.
32108 (second_sew): Ditto.
32109 (first_vlmul): Ditto.
32110 (second_vlmul): Ditto.
32111 (first_ratio): Ditto.
32112 (second_ratio): Ditto.
32113 (vlmul_for_first_sew_second_ratio): Ditto.
32114 (ratio_for_second_sew_first_vlmul): Ditto.
32115 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
32116 (always_unavailable): Ditto.
32117 (avl_unavailable_p): Ditto.
32118 (sew_unavailable_p): Ditto.
32119 (lmul_unavailable_p): Ditto.
32120 (ge_sew_unavailable_p): Ditto.
32121 (ge_sew_lmul_unavailable_p): Ditto.
32122 (ge_sew_ratio_unavailable_p): Ditto.
32123 (DEF_UNAVAILABLE_COND): Ditto.
32124 (same_sew_lmul_demand_p): Ditto.
32125 (propagate_avl_across_demands_p): Ditto.
32126 (reg_available_p): Ditto.
32127 (avl_info::has_non_zero_avl): Ditto.
32128 (vl_vtype_info::has_non_zero_avl): Ditto.
32129 (vector_insn_info::operator>=): Refactor.
32130 (vector_insn_info::parse_insn): Adjust for scalar move.
32131 (vector_insn_info::demand_vl_vtype): Remove.
32132 (vector_insn_info::compatible_p): New function.
32133 (vector_insn_info::compatible_avl_p): Ditto.
32134 (vector_insn_info::compatible_vtype_p): Ditto.
32135 (vector_insn_info::available_p): Ditto.
32136 (vector_insn_info::merge): Ditto.
32137 (vector_insn_info::fuse_avl): Ditto.
32138 (vector_insn_info::fuse_sew_lmul): Ditto.
32139 (vector_insn_info::fuse_tail_policy): Ditto.
32140 (vector_insn_info::fuse_mask_policy): Ditto.
32141 (vector_insn_info::dump): Ditto.
32142 (vector_infos_manager::release): Ditto.
32143 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
32144 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
32145 (pass_vsetvl::hard_empty_block_p): Ditto.
32146 (pass_vsetvl::backward_demand_fusion): Ditto.
32147 (pass_vsetvl::forward_demand_fusion): Ditto.
32148 (pass_vsetvl::refine_vsetvls): Ditto.
32149 (pass_vsetvl::cleanup_vsetvls): Ditto.
32150 (pass_vsetvl::commit_vsetvls): Ditto.
32151 (pass_vsetvl::propagate_avl): Ditto.
32152 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
32153 (struct demands_pair): Ditto.
32154 (struct demands_cond): Ditto.
32155 (struct demands_fuse_rule): Ditto.
32156 * config/riscv/vector-iterators.md: New iterator.
32157 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
32158 (*pred_broadcast<mode>): Ditto.
32159 (*pred_broadcast<mode>_extended_scalar): Ditto.
32160 (@pred_extract_first<mode>): Ditto.
32161 (*pred_extract_first<mode>): Ditto.
32162 (@pred_extract_first_trunc<mode>): Ditto.
32163 * config/riscv/riscv-vsetvl.def: New file.
32165 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
32167 * config/riscv/bitmanip.md: allow 0 constant in max/min
32170 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
32172 * config/riscv/bitmanip.md: Fix wrong index in the check.
32174 2023-03-04 Jakub Jelinek <jakub@redhat.com>
32176 PR middle-end/109006
32177 * vec.cc (test_auto_alias): Adjust comment for removal of
32179 * read-rtl-function.cc (function_reader::parse_block): Likewise.
32180 * gdbhooks.py: Likewise.
32182 2023-03-04 Jakub Jelinek <jakub@redhat.com>
32184 PR testsuite/108973
32185 * selftest-diagnostic.cc
32186 (test_diagnostic_context::test_diagnostic_context): Set
32187 caret_max_width to 80.
32189 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32191 * gimple-ssa-warn-access.cc
32192 (pass_waccess::check_dangling_stores): Skip non-stores.
32194 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32196 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
32197 after vmsr and vmrs, and lower the case of P0.
32199 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
32201 PR middle-end/109006
32202 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
32204 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
32206 PR middle-end/109006
32207 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
32209 2023-03-03 Jakub Jelinek <jakub@redhat.com>
32212 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
32213 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
32214 suppressed on stmt. For [static %E] warning, print access_nelts
32215 rather than access_size. Fix up comment wording.
32217 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
32219 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
32220 arch14 instead of z16.
32222 2023-03-03 Anthony Green <green@moxielogic.com>
32224 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
32226 2023-03-03 Anthony Green <green@moxielogic.com>
32228 * config/moxie/constraints.md (A, B, W): Change
32229 define_constraint to define_memory_constraint.
32231 2023-03-03 Xi Ruoyao <xry111@xry111.site>
32233 * toplev.cc (process_options): Fix the spelling of
32234 "-fstack-clash-protection".
32236 2023-03-03 Richard Biener <rguenther@suse.de>
32238 PR tree-optimization/109002
32239 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
32240 PHI-translate ANTIC_IN.
32242 2023-03-03 Jakub Jelinek <jakub@redhat.com>
32244 PR tree-optimization/108988
32245 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
32246 size_type_node before passing it as argument to fwrite. Formatting
32249 2023-03-03 Richard Biener <rguenther@suse.de>
32252 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
32253 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
32254 * config/i386/i386-features.h (scalar_chain::max_visits): New.
32255 (scalar_chain::build): Add bitmap parameter, return boolean.
32256 (scalar_chain::add_insn): Likewise.
32257 (scalar_chain::analyze_register_chain): Likewise.
32258 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
32259 Initialize max_visits.
32260 (scalar_chain::analyze_register_chain): When we exhaust
32261 max_visits, abort. Also abort when running into any
32263 (scalar_chain::add_insn): Propagate abort.
32264 (scalar_chain::build): Likewise. When aborting amend
32265 the set of disallowed insn with the insns set.
32266 (convert_scalars_to_vector): Adjust. Do not convert aborted
32269 2023-03-03 Richard Biener <rguenther@suse.de>
32272 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
32273 generate a DIE for a function scope static.
32275 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32277 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
32279 2023-03-02 Jakub Jelinek <jakub@redhat.com>
32282 * target.h (emit_support_tinfos_callback): New typedef.
32283 * targhooks.h (default_emit_support_tinfos): Declare.
32284 * targhooks.cc (default_emit_support_tinfos): New function.
32285 * target.def (emit_support_tinfos): New target hook.
32286 * doc/tm.texi.in (emit_support_tinfos): Document it.
32287 * doc/tm.texi: Regenerated.
32288 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
32289 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
32291 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
32293 * ira-costs.cc: Include print-rtl.h.
32294 (record_reg_classes, scan_one_insn): Add code to print debug info.
32295 (record_operand_costs): Find and use smaller cost for hard reg
32298 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
32299 Paul-Antoine Arras <pa@codesourcery.com>
32301 * builtins.cc (mathfn_built_in_explicit): New.
32302 * config/gcn/gcn.cc: Include case-cfn-macros.h.
32303 (mathfn_built_in_explicit): Add prototype.
32304 (gcn_vectorize_builtin_vectorized_function): New.
32305 (gcn_libc_has_function): New.
32306 (TARGET_LIBC_HAS_FUNCTION): Define.
32307 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
32309 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
32311 PR tree-optimization/108979
32312 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
32313 operations on invariants.
32315 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
32317 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
32318 * config/s390/s390.cc (s390_option_override_internal): Make
32319 partial vector usage the default from z13 on.
32320 * config/s390/vector.md (len_load_v16qi): Add.
32321 (len_store_v16qi): Add.
32323 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
32325 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
32326 of constant 0 offset.
32328 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
32330 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
32332 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
32334 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
32336 * config.gcc: add -with-{no-}msa build option.
32337 * config/mips/mips.h: Likewise.
32338 * doc/install.texi: Likewise.
32340 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
32342 PR tree-optimization/108603
32343 * explow.cc (convert_memory_address_addr_space_1): Only wrap
32344 the result of a recursive call in a CONST if no instructions
32347 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
32349 PR tree-optimization/108430
32350 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
32351 of inverted condition.
32353 2023-03-02 Jakub Jelinek <jakub@redhat.com>
32356 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
32357 comparison copy the bytes from ptr to a temporary buffer and clearing
32358 padding bits in there.
32360 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
32362 PR middle-end/108545
32363 * gimplify.cc (struct tree_operand_hash_no_se): New.
32364 (omp_index_mapping_groups_1, omp_index_mapping_groups,
32365 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
32366 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
32367 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
32368 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
32369 of tree_operand_hash.
32371 2023-03-01 LIU Hao <lh_mouse@126.com>
32374 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
32375 Remove the size limit `pch_VA_max_size`
32377 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
32379 PR middle-end/108546
32380 * omp-low.cc (lower_omp_target): Remove optional handling
32381 on the receiver side, i.e. inside target (data), for
32384 2023-03-01 Jakub Jelinek <jakub@redhat.com>
32387 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
32388 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
32390 2023-03-01 Richard Biener <rguenther@suse.de>
32392 PR tree-optimization/108970
32393 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
32394 Check we can copy the BBs.
32395 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
32397 (vect_do_peeling): Streamline error handling.
32399 2023-03-01 Richard Biener <rguenther@suse.de>
32401 PR tree-optimization/108950
32402 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
32403 Check oprnd0 is defined in the loop.
32404 * tree-vect-loop.cc (vectorizable_reduction): Record all
32405 operands vector types, compute that of invariants and
32406 properly update their SLP nodes.
32408 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
32411 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
32412 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
32414 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
32416 PR middle-end/107411
32417 PR middle-end/107411
32418 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
32420 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
32421 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
32423 2023-02-28 Jakub Jelinek <jakub@redhat.com>
32425 PR sanitizer/108894
32426 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
32427 comparison rather than index > bound.
32428 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
32429 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
32430 * doc/invoke.texi (-fsanitize=bounds): Document that whether
32431 flexible array member-like arrays are instrumented or not depends
32432 on -fstrict-flex-arrays* options of strict_flex_array attributes.
32433 (-fsanitize=bounds-strict): Document that flexible array members
32434 are not instrumented.
32436 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
32440 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
32441 (fmod<mode>3): Ditto.
32442 (fpremxf4_i387): Ditto.
32443 (reminderxf3): Ditto.
32444 (reminder<mode>3): Ditto.
32445 (fprem1xf4_i387): Ditto.
32447 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
32449 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
32450 generating FFS with mismatched operand and result modes, by using
32451 an explicit SIGN_EXTEND/ZERO_EXTEND.
32452 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
32453 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
32455 2023-02-27 Patrick Palka <ppalka@redhat.com>
32457 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
32458 * lra-int.h (lra_change_class): Likewise.
32459 * recog.h (which_op_alt): Likewise.
32460 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
32463 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32465 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
32467 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
32469 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
32470 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
32472 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
32474 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
32475 (xtensa_get_config_v3): New functions.
32477 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32479 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
32481 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
32483 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
32484 the macro to 0x1000000000.
32486 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
32489 * doc/gm2.texi (-fm2-pathname): New option documented.
32490 (-fm2-pathnameI): New option documented.
32491 (-fm2-prefix=): New option documented.
32492 (-fruntime-modules=): Update default module list.
32494 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
32497 * config/xtensa/xtensa-protos.h
32498 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
32499 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
32500 to xtensa_expand_call.
32501 (xtensa_expand_call): Emit the call and add a clobber expression
32502 for the static chain to it in case of windowed ABI.
32503 * config/xtensa/xtensa.md (call, call_value, sibcall)
32504 (sibcall_value): Call xtensa_expand_call and complete expansion
32505 right after that call.
32507 2023-02-24 Richard Biener <rguenther@suse.de>
32509 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
32510 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
32511 changing alignment of vec<T, A, vl_embed> and simplifying
32513 (vec<T, A, vl_embed>::address): Compute as this + 1.
32514 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
32515 vector instead of the offset of the m_vecdata member.
32516 (auto_vec<T, N>::m_data): Turn storage into
32517 uninitialized unsigned char.
32518 (auto_vec<T, N>::auto_vec): Allow allocation of one
32519 stack member. Initialize m_vec in a special way to
32520 avoid later stringop overflow diagnostics.
32521 * vec.cc (test_auto_alias): New.
32522 (vec_cc_tests): Call it.
32524 2023-02-24 Richard Biener <rguenther@suse.de>
32526 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
32527 take a const reference to the object, use address to
32529 (vec<T, A, vl_embed>::contains): Use address to access data.
32530 (vec<T, A, vl_embed>::operator[]): Use address instead of
32531 m_vecdata to access data.
32532 (vec<T, A, vl_embed>::iterate): Likewise.
32533 (vec<T, A, vl_embed>::copy): Likewise.
32534 (vec<T, A, vl_embed>::quick_push): Likewise.
32535 (vec<T, A, vl_embed>::pop): Likewise.
32536 (vec<T, A, vl_embed>::quick_insert): Likewise.
32537 (vec<T, A, vl_embed>::ordered_remove): Likewise.
32538 (vec<T, A, vl_embed>::unordered_remove): Likewise.
32539 (vec<T, A, vl_embed>::block_remove): Likewise.
32540 (vec<T, A, vl_heap>::address): Likewise.
32542 2023-02-24 Martin Liska <mliska@suse.cz>
32544 PR sanitizer/108834
32545 * asan.cc (asan_add_global): Use proper TU name for normal
32546 global variables (and aux_base_name for the artificial one).
32548 2023-02-24 Jakub Jelinek <jakub@redhat.com>
32550 * config/i386/i386-builtin.def: Update description of BDESC
32551 and BDESC_FIRST in file comment to include mask2.
32553 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32555 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
32557 2023-02-24 Jakub Jelinek <jakub@redhat.com>
32559 PR middle-end/108854
32560 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
32561 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
32562 nodes and adjust their DECL_CONTEXT.
32564 2023-02-24 Jakub Jelinek <jakub@redhat.com>
32567 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
32568 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
32569 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
32570 __builtin_ia32_cvtne2ps2bf16_v8bf,
32571 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
32572 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
32573 __builtin_ia32_cvtneps2bf16_v8sf_mask,
32574 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
32575 __builtin_ia32_cvtneps2bf16_v4sf_mask,
32576 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
32577 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
32578 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
32579 __builtin_ia32_dpbf16ps_v4sf_mask,
32580 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
32581 OPTION_MASK_ISA_AVX512VL.
32583 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
32585 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
32586 Add non-compact 32-bit multilibs.
32588 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
32590 * config/mips/mips.md (*clo<mode>2): New pattern.
32592 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
32594 * config/mips/mips.h (machine_function): New variable
32595 use_hazard_barrier_return_p.
32596 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
32597 (mips_hb_return_internal): New insn pattern.
32598 * config/mips/mips.cc (mips_attribute_table): Add attribute
32599 use_hazard_barrier_return.
32600 (mips_use_hazard_barrier_return_p): New static function.
32601 (mips_function_attr_inlinable_p): Likewise.
32602 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
32603 Emit error for unsupported architecture choice.
32604 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
32605 Return false for use_hazard_barrier_return.
32606 (mips_expand_epilogue): Emit hazard barrier return.
32607 * doc/extend.texi: Document use_hazard_barrier_return.
32609 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
32611 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
32612 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
32613 for the gcc-internal headers.
32615 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
32617 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
32618 and $(POSTCOMPILE) instead of manual dependency listing.
32619 * config/xtensa/xtensa-dynconfig.c: Rename to ...
32620 * config/xtensa/xtensa-dynconfig.cc: ... this.
32622 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
32624 * doc/cfg.texi: Reorder index entries around @items.
32625 * doc/cpp.texi: Ditto.
32626 * doc/cppenv.texi: Ditto.
32627 * doc/cppopts.texi: Ditto.
32628 * doc/generic.texi: Ditto.
32629 * doc/install.texi: Ditto.
32630 * doc/extend.texi: Ditto.
32631 * doc/invoke.texi: Ditto.
32632 * doc/md.texi: Ditto.
32633 * doc/rtl.texi: Ditto.
32634 * doc/tm.texi.in: Ditto.
32635 * doc/trouble.texi: Ditto.
32636 * doc/tm.texi: Regenerate.
32638 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32640 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
32641 the occurrence of general-purpose register used only once and for
32642 transferring intermediate value.
32644 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32646 * config/xtensa/xtensa.cc (machine_function): Add new member
32647 'eliminated_callee_saved_bmp'.
32648 (xtensa_can_eliminate_callee_saved_reg_p): New function to
32649 determine whether the register can be eliminated or not.
32650 (xtensa_expand_prologue): Add invoking the above function and
32651 elimination the use of callee-saved register by using its stack
32652 slot through the stack pointer (or the frame pointer if needed)
32654 (xtensa_expand_prologue): Modify to not emit register restoration
32655 insn from its stack slot if the register is already eliminated.
32657 2023-02-23 Jakub Jelinek <jakub@redhat.com>
32659 PR translation/108890
32660 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
32661 around fatal_error format strings.
32663 2023-02-23 Richard Biener <rguenther@suse.de>
32665 * tree-ssa-structalias.cc (handle_lhs_call): Do not
32666 re-create rhsc, only truncate it.
32668 2023-02-23 Jakub Jelinek <jakub@redhat.com>
32670 PR middle-end/106258
32671 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
32672 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
32674 2023-02-23 Richard Biener <rguenther@suse.de>
32676 * tree-if-conv.cc (tree_if_conversion): Properly manage
32677 memory of refs and the contained data references.
32679 2023-02-23 Richard Biener <rguenther@suse.de>
32681 PR tree-optimization/108888
32682 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
32683 calls to predicate.
32684 (predicate_statements): Only predicate calls with PLF_2.
32686 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32688 * config/xtensa/xtensa.md
32689 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
32690 Add missing "SI:" to PLUS RTXes.
32692 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
32695 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
32696 Emit (use (reg:SI A0_REG)) at the end in the sibling call
32697 (i.e. the same place as (return) in the normal call).
32699 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
32702 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
32705 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
32707 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
32708 (sibcall_value, sibcall_value_internal): Add 'use' expression
32711 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
32713 * doc/cppdiropts.texi: Reorder @opindex commands to precede
32714 @items they relate to.
32715 * doc/cppopts.texi: Ditto.
32716 * doc/cppwarnopts.texi: Ditto.
32717 * doc/invoke.texi: Ditto.
32718 * doc/lto.texi: Ditto.
32720 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
32722 * internal-fn.cc (expand_MASK_CALL): New.
32723 * internal-fn.def (MASK_CALL): New.
32724 * internal-fn.h (expand_MASK_CALL): New prototype.
32725 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
32726 for mask arguments also.
32727 * tree-if-conv.cc: Include cgraph.h.
32728 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
32729 (predicate_statements): Convert functions to IFN_MASK_CALL.
32730 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
32731 IFN_MASK_CALL as a SIMD function call.
32732 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
32733 IFN_MASK_CALL as an inbranch SIMD function call.
32734 Generate the mask vector arguments.
32736 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32738 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
32739 (class widen_reducop): Ditto.
32740 (class freducop): Ditto.
32741 (class widen_freducop): Ditto.
32743 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32744 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
32753 (vwredsumu): Ditto.
32754 (vfredusum): Ditto.
32755 (vfredosum): Ditto.
32758 (vfwredosum): Ditto.
32759 (vfwredusum): Ditto.
32760 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
32762 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32763 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
32764 (DEF_RVV_WU_OPS): Ditto.
32765 (DEF_RVV_WF_OPS): Ditto.
32766 (vint8mf8_t): Ditto.
32767 (vint8mf4_t): Ditto.
32768 (vint8mf2_t): Ditto.
32769 (vint8m1_t): Ditto.
32770 (vint8m2_t): Ditto.
32771 (vint8m4_t): Ditto.
32772 (vint8m8_t): Ditto.
32773 (vint16mf4_t): Ditto.
32774 (vint16mf2_t): Ditto.
32775 (vint16m1_t): Ditto.
32776 (vint16m2_t): Ditto.
32777 (vint16m4_t): Ditto.
32778 (vint16m8_t): Ditto.
32779 (vint32mf2_t): Ditto.
32780 (vint32m1_t): Ditto.
32781 (vint32m2_t): Ditto.
32782 (vint32m4_t): Ditto.
32783 (vint32m8_t): Ditto.
32784 (vuint8mf8_t): Ditto.
32785 (vuint8mf4_t): Ditto.
32786 (vuint8mf2_t): Ditto.
32787 (vuint8m1_t): Ditto.
32788 (vuint8m2_t): Ditto.
32789 (vuint8m4_t): Ditto.
32790 (vuint8m8_t): Ditto.
32791 (vuint16mf4_t): Ditto.
32792 (vuint16mf2_t): Ditto.
32793 (vuint16m1_t): Ditto.
32794 (vuint16m2_t): Ditto.
32795 (vuint16m4_t): Ditto.
32796 (vuint16m8_t): Ditto.
32797 (vuint32mf2_t): Ditto.
32798 (vuint32m1_t): Ditto.
32799 (vuint32m2_t): Ditto.
32800 (vuint32m4_t): Ditto.
32801 (vuint32m8_t): Ditto.
32802 (vfloat32mf2_t): Ditto.
32803 (vfloat32m1_t): Ditto.
32804 (vfloat32m2_t): Ditto.
32805 (vfloat32m4_t): Ditto.
32806 (vfloat32m8_t): Ditto.
32807 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
32808 (DEF_RVV_WU_OPS): Ditto.
32809 (DEF_RVV_WF_OPS): Ditto.
32810 (required_extensions_p): Add reduction support.
32811 (rvv_arg_type_info::get_base_vector_type): Ditto.
32812 (rvv_arg_type_info::get_tree_type): Ditto.
32813 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
32814 * config/riscv/riscv.md: Ditto.
32815 * config/riscv/vector-iterators.md (minu): Ditto.
32816 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
32817 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
32818 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
32819 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
32820 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
32821 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
32822 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
32824 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32826 * config/riscv/iterators.md: New iterator.
32827 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
32828 (enum ternop_type): New enum.
32829 (class vmacc): New class.
32830 (class imac): Ditto.
32831 (class vnmsac): Ditto.
32832 (enum widen_ternop_type): New enum.
32833 (class vmadd): Ditto.
32834 (class vnmsub): Ditto.
32835 (class iwmac): Ditto.
32836 (class vwmacc): Ditto.
32837 (class vwmaccu): Ditto.
32838 (class vwmaccsu): Ditto.
32839 (class vwmaccus): Ditto.
32840 (class reverse_binop): Ditto.
32841 (class vfmacc): Ditto.
32842 (class vfnmsac): Ditto.
32843 (class vfmadd): Ditto.
32844 (class vfnmsub): Ditto.
32845 (class vfnmacc): Ditto.
32846 (class vfmsac): Ditto.
32847 (class vfnmadd): Ditto.
32848 (class vfmsub): Ditto.
32849 (class vfwmacc): Ditto.
32850 (class vfwnmacc): Ditto.
32851 (class vfwmsac): Ditto.
32852 (class vfwnmsac): Ditto.
32853 (class float_misc): Ditto.
32854 (class fcmp): Ditto.
32855 (class vfclass): Ditto.
32856 (class vfcvt_x): Ditto.
32857 (class vfcvt_rtz_x): Ditto.
32858 (class vfcvt_f): Ditto.
32859 (class vfwcvt_x): Ditto.
32860 (class vfwcvt_rtz_x): Ditto.
32861 (class vfwcvt_f): Ditto.
32862 (class vfncvt_x): Ditto.
32863 (class vfncvt_rtz_x): Ditto.
32864 (class vfncvt_f): Ditto.
32865 (class vfncvt_rod_f): Ditto.
32867 * config/riscv/riscv-vector-builtins-bases.h:
32868 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
32912 (vfcvt_rtz_x): Ditto.
32913 (vfcvt_rtz_xu): Ditto.
32916 (vfwcvt_xu): Ditto.
32917 (vfwcvt_rtz_x): Ditto.
32918 (vfwcvt_rtz_xu): Ditto.
32921 (vfncvt_xu): Ditto.
32922 (vfncvt_rtz_x): Ditto.
32923 (vfncvt_rtz_xu): Ditto.
32925 (vfncvt_rod_f): Ditto.
32926 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
32927 (struct move_def): Ditto.
32928 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
32929 (DEF_RVV_CONVERT_I_OPS): Ditto.
32930 (DEF_RVV_CONVERT_U_OPS): Ditto.
32931 (DEF_RVV_WCONVERT_I_OPS): Ditto.
32932 (DEF_RVV_WCONVERT_U_OPS): Ditto.
32933 (DEF_RVV_WCONVERT_F_OPS): Ditto.
32934 (vfloat64m1_t): Ditto.
32935 (vfloat64m2_t): Ditto.
32936 (vfloat64m4_t): Ditto.
32937 (vfloat64m8_t): Ditto.
32938 (vint32mf2_t): Ditto.
32939 (vint32m1_t): Ditto.
32940 (vint32m2_t): Ditto.
32941 (vint32m4_t): Ditto.
32942 (vint32m8_t): Ditto.
32943 (vint64m1_t): Ditto.
32944 (vint64m2_t): Ditto.
32945 (vint64m4_t): Ditto.
32946 (vint64m8_t): Ditto.
32947 (vuint32mf2_t): Ditto.
32948 (vuint32m1_t): Ditto.
32949 (vuint32m2_t): Ditto.
32950 (vuint32m4_t): Ditto.
32951 (vuint32m8_t): Ditto.
32952 (vuint64m1_t): Ditto.
32953 (vuint64m2_t): Ditto.
32954 (vuint64m4_t): Ditto.
32955 (vuint64m8_t): Ditto.
32956 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
32957 (DEF_RVV_CONVERT_U_OPS): Ditto.
32958 (DEF_RVV_WCONVERT_I_OPS): Ditto.
32959 (DEF_RVV_WCONVERT_U_OPS): Ditto.
32960 (DEF_RVV_WCONVERT_F_OPS): Ditto.
32961 (DEF_RVV_F_OPS): Ditto.
32962 (DEF_RVV_WEXTF_OPS): Ditto.
32963 (required_extensions_p): Adjust for floating-point support.
32964 (check_required_extensions): Ditto.
32965 (unsigned_base_type_p): Ditto.
32966 (get_mode_for_bitsize): Ditto.
32967 (rvv_arg_type_info::get_base_vector_type): Ditto.
32968 (rvv_arg_type_info::get_tree_type): Ditto.
32969 * config/riscv/riscv-vector-builtins.def (v_f): New define.
32972 (xu_v): New define.
32974 (xu_w): New define.
32975 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
32976 (function_expander::arg_mode): New function.
32977 * config/riscv/vector-iterators.md (sof): New iterator.
32983 (fixuns_trunc): Ditto.
32985 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
32986 (@pred_<optab><mode>): Ditto.
32987 (@pred_<optab><mode>_scalar): Ditto.
32988 (@pred_<optab><mode>_reverse_scalar): Ditto.
32989 (@pred_<copysign><mode>): Ditto.
32990 (@pred_<copysign><mode>_scalar): Ditto.
32991 (@pred_mul_<optab><mode>): Ditto.
32992 (pred_mul_<optab><mode>_undef_merge): Ditto.
32993 (*pred_<madd_nmsub><mode>): Ditto.
32994 (*pred_<macc_nmsac><mode>): Ditto.
32995 (*pred_mul_<optab><mode>): Ditto.
32996 (@pred_mul_<optab><mode>_scalar): Ditto.
32997 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
32998 (*pred_<madd_nmsub><mode>_scalar): Ditto.
32999 (*pred_<macc_nmsac><mode>_scalar): Ditto.
33000 (*pred_mul_<optab><mode>_scalar): Ditto.
33001 (@pred_neg_mul_<optab><mode>): Ditto.
33002 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
33003 (*pred_<nmadd_msub><mode>): Ditto.
33004 (*pred_<nmacc_msac><mode>): Ditto.
33005 (*pred_neg_mul_<optab><mode>): Ditto.
33006 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
33007 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
33008 (*pred_<nmadd_msub><mode>_scalar): Ditto.
33009 (*pred_<nmacc_msac><mode>_scalar): Ditto.
33010 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
33011 (@pred_<misc_op><mode>): Ditto.
33012 (@pred_class<mode>): Ditto.
33013 (@pred_dual_widen_<optab><mode>): Ditto.
33014 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
33015 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
33016 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
33017 (@pred_widen_mul_<optab><mode>): Ditto.
33018 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
33019 (@pred_widen_neg_mul_<optab><mode>): Ditto.
33020 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
33021 (@pred_cmp<mode>): Ditto.
33022 (*pred_cmp<mode>): Ditto.
33023 (*pred_cmp<mode>_narrow): Ditto.
33024 (@pred_cmp<mode>_scalar): Ditto.
33025 (*pred_cmp<mode>_scalar): Ditto.
33026 (*pred_cmp<mode>_scalar_narrow): Ditto.
33027 (@pred_eqne<mode>_scalar): Ditto.
33028 (*pred_eqne<mode>_scalar): Ditto.
33029 (*pred_eqne<mode>_scalar_narrow): Ditto.
33030 (@pred_merge<mode>_scalar): Ditto.
33031 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
33032 (@pred_<fix_cvt><mode>): Ditto.
33033 (@pred_<float_cvt><mode>): Ditto.
33034 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
33035 (@pred_widen_<fix_cvt><mode>): Ditto.
33036 (@pred_widen_<float_cvt><mode>): Ditto.
33037 (@pred_extend<mode>): Ditto.
33038 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
33039 (@pred_narrow_<fix_cvt><mode>): Ditto.
33040 (@pred_narrow_<float_cvt><mode>): Ditto.
33041 (@pred_trunc<mode>): Ditto.
33042 (@pred_rod_trunc<mode>): Ditto.
33044 2023-02-22 Jakub Jelinek <jakub@redhat.com>
33046 PR middle-end/106258
33047 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
33048 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
33049 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
33050 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
33052 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
33054 * common.opt (-Wcomplain-wrong-lang): New.
33055 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
33056 * opts-common.cc (prune_options): Handle it.
33057 * opts-global.cc (complain_wrong_lang): Use it.
33059 2023-02-21 David Malcolm <dmalcolm@redhat.com>
33062 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
33064 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
33067 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
33069 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
33070 (sibcall_value, sibcall_value_internal): Add 'use' expression
33073 2023-02-21 Richard Biener <rguenther@suse.de>
33075 PR tree-optimization/108691
33076 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
33077 assert about calls_setjmp not becoming true when it was false.
33079 2023-02-21 Richard Biener <rguenther@suse.de>
33081 PR tree-optimization/108793
33082 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
33083 Use convert operands to niter_type when computing num.
33085 2023-02-21 Richard Biener <rguenther@suse.de>
33088 2023-02-13 Richard Biener <rguenther@suse.de>
33090 PR tree-optimization/108691
33091 * tree-cfg.cc (notice_special_calls): When the CFG is built
33092 honor gimple_call_ctrl_altering_p.
33093 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
33094 temporarily if the call is not control-altering.
33095 * calls.cc (emit_call_1): Do not add REG_SETJMP if
33096 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
33098 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33100 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
33101 true if register A0 (return address register) when -Og is specified.
33103 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
33105 * config/i386/predicates.md
33106 (general_x64constmem_operand): New predicate.
33107 * config/i386/i386.md (*cmpqi_ext<mode>_1):
33108 Use nonimm_x64constmem_operand.
33109 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
33110 (*addqi_ext<mode>_1): Ditto.
33111 (*testqi_ext<mode>_1): Ditto.
33112 (*andqi_ext<mode>_1): Ditto.
33113 (*andqi_ext<mode>_1_cc): Ditto.
33114 (*<any_or:code>qi_ext<mode>_1): Ditto.
33115 (*xorqi_ext<mode>_1_cc): Ditto.
33117 2023-02-20 Jakub Jelinek <jakub2redhat.com>
33120 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
33121 gen_umadddi4_highpart{,_le}.
33123 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
33125 * config/riscv/riscv.md (prefetch): Use r instead of p for the
33127 (riscv_prefetchi_<mode>): Ditto.
33129 2023-02-20 Richard Biener <rguenther@suse.de>
33131 PR tree-optimization/108816
33132 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
33133 versioning condition split prerequesite, assert required
33136 2023-02-20 Richard Biener <rguenther@suse.de>
33138 PR tree-optimization/108825
33139 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
33140 loop-local verfication only verify there's no pending SSA
33143 2023-02-20 Richard Biener <rguenther@suse.de>
33145 PR tree-optimization/108819
33146 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
33147 we have an SSA name as iv_2 as expected.
33149 2023-02-18 Jakub Jelinek <jakub@redhat.com>
33151 PR tree-optimization/108819
33152 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
33154 2023-02-18 Jakub Jelinek <jakub@redhat.com>
33157 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
33158 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
33160 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
33161 with ix86_replace_reg_with_reg.
33163 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
33165 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
33167 2023-02-18 Xi Ruoyao <xry111@xry111.site>
33169 * config.gcc (triplet_abi): Set its value based on $with_abi,
33170 instead of $target.
33171 (la_canonical_triplet): Set it after $triplet_abi is set
33173 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
33174 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
33177 2023-02-18 Andrew Pinski <apinski@marvell.com>
33179 * match.pd: Remove #if GIMPLE around the
33182 2023-02-18 Andrew Pinski <apinski@marvell.com>
33184 * value-query.h (get_range_query): Return the global ranges
33185 for a nullptr func.
33187 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
33189 * doc/invoke.texi (@item -Wall): Fix typo in
33192 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
33195 * config/i386/predicates.md
33196 (nonimm_x64constmem_operand): New predicate.
33197 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
33198 (*subqi_ext<mode>_0): Ditto.
33199 (*andqi_ext<mode>_0): Ditto.
33200 (*<any_or:code>qi_ext<mode>_0): Ditto.
33202 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
33205 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
33206 int_outermode instead of GET_MODE (tem) to prevent
33207 VOIDmode from entering simplify_gen_subreg.
33209 2023-02-17 Richard Biener <rguenther@suse.de>
33211 PR tree-optimization/108821
33212 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
33213 move volatile accesses.
33215 2023-02-17 Richard Biener <rguenther@suse.de>
33217 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
33218 called on virtual operands.
33219 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
33220 ssa_undefined_value_p calls.
33221 (vn_phi_insert): Likewise.
33222 (set_ssa_val_to): Likewise.
33223 (visit_phi): Avoid extra work with equivalences for
33224 virtual operand PHIs.
33226 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33228 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
33230 (class mask_nlogic): Ditto.
33231 (class mask_notlogic): Ditto.
33232 (class vmmv): Ditto.
33233 (class vmclr): Ditto.
33234 (class vmset): Ditto.
33235 (class vmnot): Ditto.
33236 (class vcpop): Ditto.
33237 (class vfirst): Ditto.
33238 (class mask_misc): Ditto.
33239 (class viota): Ditto.
33240 (class vid): Ditto.
33242 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33243 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
33262 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
33263 (struct mask_alu_def): Ditto.
33265 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33266 * config/riscv/riscv-vector-builtins.cc: Ditto.
33267 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
33268 for dest it scalar RVV intrinsics.
33269 * config/riscv/vector-iterators.md (sof): New iterator.
33270 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
33271 (@pred_<optab>not<mode>): New pattern.
33272 (@pred_popcount<VB:mode><P:mode>): New pattern.
33273 (@pred_ffs<VB:mode><P:mode>): New pattern.
33274 (@pred_<misc_op><mode>): New pattern.
33275 (@pred_iota<mode>): New pattern.
33276 (@pred_series<mode>): New pattern.
33278 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33280 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
33284 * config/riscv/riscv-vector-builtins.cc: Ditto.
33286 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33287 kito-cheng <kito.cheng@sifive.com>
33289 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
33290 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
33291 (sew64_scalar_helper): New function.
33292 * config/riscv/vector.md: Normalization.
33294 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33296 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
33358 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33360 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
33361 (@pred_<optab><mode>_scalar): Ditto.
33362 (*pred_<optab><mode>_scalar): Ditto.
33363 (*pred_<optab><mode>_extended_scalar): Ditto.
33365 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33367 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
33368 (init_builtins): Ditto.
33369 (mangle_builtin_type): Ditto.
33370 (verify_type_context): Ditto.
33371 (handle_pragma_vector): Ditto.
33372 (builtin_decl): Ditto.
33373 (expand_builtin): Ditto.
33374 (const_vec_all_same_in_range_p): Ditto.
33375 (legitimize_move): Ditto.
33376 (emit_vlmax_op): Ditto.
33377 (emit_nonvlmax_op): Ditto.
33378 (get_vlmul): Ditto.
33379 (get_ratio): Ditto.
33382 (get_avl_type): Ditto.
33383 (calculate_ratio): Ditto.
33384 (enum vlmul_type): Ditto.
33386 (neg_simm5_p): Ditto.
33387 (has_vi_variant_p): Ditto.
33389 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33391 * config/riscv/riscv-protos.h (simm32_p): Remove.
33392 * config/riscv/riscv-v.cc (simm32_p): Ditto.
33393 * config/riscv/vector.md: Use immediate_operand
33394 instead of riscv_vector::simm32_p.
33396 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
33398 * doc/invoke.texi (Optimize Options): Reword the explanation
33399 getting minimal, maximal and default values of a parameter.
33401 2023-02-16 Patrick Palka <ppalka@redhat.com>
33403 * addresses.h: Mechanically drop 'static' from 'static inline'
33404 functions via s/^static inline/inline/g.
33405 * asan.h: Likewise.
33406 * attribs.h: Likewise.
33407 * basic-block.h: Likewise.
33408 * bitmap.h: Likewise.
33409 * cfghooks.h: Likewise.
33410 * cfgloop.h: Likewise.
33411 * cgraph.h: Likewise.
33412 * cselib.h: Likewise.
33413 * data-streamer.h: Likewise.
33414 * debug.h: Likewise.
33416 * diagnostic.h: Likewise.
33417 * dominance.h: Likewise.
33418 * dumpfile.h: Likewise.
33419 * emit-rtl.h: Likewise.
33420 * except.h: Likewise.
33421 * expmed.h: Likewise.
33422 * expr.h: Likewise.
33423 * fixed-value.h: Likewise.
33424 * gengtype.h: Likewise.
33425 * gimple-expr.h: Likewise.
33426 * gimple-iterator.h: Likewise.
33427 * gimple-predict.h: Likewise.
33428 * gimple-range-fold.h: Likewise.
33429 * gimple-ssa.h: Likewise.
33430 * gimple.h: Likewise.
33431 * graphite.h: Likewise.
33432 * hard-reg-set.h: Likewise.
33433 * hash-map.h: Likewise.
33434 * hash-set.h: Likewise.
33435 * hash-table.h: Likewise.
33436 * hwint.h: Likewise.
33437 * input.h: Likewise.
33438 * insn-addr.h: Likewise.
33439 * internal-fn.h: Likewise.
33440 * ipa-fnsummary.h: Likewise.
33441 * ipa-icf-gimple.h: Likewise.
33442 * ipa-inline.h: Likewise.
33443 * ipa-modref.h: Likewise.
33444 * ipa-prop.h: Likewise.
33445 * ira-int.h: Likewise.
33447 * lra-int.h: Likewise.
33449 * lto-streamer.h: Likewise.
33450 * memmodel.h: Likewise.
33451 * omp-general.h: Likewise.
33452 * optabs-query.h: Likewise.
33453 * optabs.h: Likewise.
33454 * plugin.h: Likewise.
33455 * pretty-print.h: Likewise.
33456 * range.h: Likewise.
33457 * read-md.h: Likewise.
33458 * recog.h: Likewise.
33459 * regs.h: Likewise.
33460 * rtl-iter.h: Likewise.
33462 * sbitmap.h: Likewise.
33463 * sched-int.h: Likewise.
33464 * sel-sched-ir.h: Likewise.
33465 * sese.h: Likewise.
33466 * sparseset.h: Likewise.
33467 * ssa-iterators.h: Likewise.
33468 * system.h: Likewise.
33469 * target-globals.h: Likewise.
33470 * target.h: Likewise.
33471 * timevar.h: Likewise.
33472 * tree-chrec.h: Likewise.
33473 * tree-data-ref.h: Likewise.
33474 * tree-iterator.h: Likewise.
33475 * tree-outof-ssa.h: Likewise.
33476 * tree-phinodes.h: Likewise.
33477 * tree-scalar-evolution.h: Likewise.
33478 * tree-sra.h: Likewise.
33479 * tree-ssa-alias.h: Likewise.
33480 * tree-ssa-live.h: Likewise.
33481 * tree-ssa-loop-manip.h: Likewise.
33482 * tree-ssa-loop.h: Likewise.
33483 * tree-ssa-operands.h: Likewise.
33484 * tree-ssa-propagate.h: Likewise.
33485 * tree-ssa-sccvn.h: Likewise.
33486 * tree-ssa.h: Likewise.
33487 * tree-ssanames.h: Likewise.
33488 * tree-streamer.h: Likewise.
33489 * tree-switch-conversion.h: Likewise.
33490 * tree-vectorizer.h: Likewise.
33491 * tree.h: Likewise.
33492 * wide-int.h: Likewise.
33494 2023-02-16 Jakub Jelinek <jakub@redhat.com>
33496 PR tree-optimization/108657
33497 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
33498 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
33499 is a call to internal or builtin function.
33501 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
33503 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
33504 using-declaration to unhide functions.
33506 2023-02-16 Jakub Jelinek <jakub@redhat.com>
33508 PR tree-optimization/108783
33509 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
33510 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
33511 t to curr->op. Otherwise, punt if either newop1 or newop2 are
33512 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
33514 2023-02-16 Richard Biener <rguenther@suse.de>
33516 PR tree-optimization/108791
33517 * tree-ssa-forwprop.cc (optimize_vector_load): Build
33518 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
33521 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
33524 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
33525 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
33526 (ix86_expand_prologue): Likewise.
33528 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
33530 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
33532 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
33534 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
33535 int248_register_operand predicate in zero_extract sub-RTX.
33536 (*cmpqi_ext<mode>_2): Ditto.
33537 (*cmpqi_ext<mode>_3): Ditto.
33538 (*cmpqi_ext<mode>_4): Ditto.
33539 (*extzvqi_mem_rex64): Ditto.
33541 (*insvqi_1_mem_rex64): Ditto.
33542 (@insv<mode>_1): Ditto.
33543 (*insvqi_1): Ditto.
33544 (*insvqi_2): Ditto.
33545 (*insvqi_3): Ditto.
33546 (*extendqi<SWI24:mode>_ext_1): Ditto.
33547 (*addqi_ext<mode>_1): Ditto.
33548 (*addqi_ext<mode>_2): Ditto.
33549 (*subqi_ext<mode>_2): Ditto.
33550 (*testqi_ext<mode>_1): Ditto.
33551 (*testqi_ext<mode>_2): Ditto.
33552 (*andqi_ext<mode>_1): Ditto.
33553 (*andqi_ext<mode>_1_cc): Ditto.
33554 (*andqi_ext<mode>_2): Ditto.
33555 (*<any_or:code>qi_ext<mode>_1): Ditto.
33556 (*<any_or:code>qi_ext<mode>_2): Ditto.
33557 (*xorqi_ext<mode>_1_cc): Ditto.
33558 (*negqi_ext<mode>_2): Ditto.
33559 (*ashlqi_ext<mode>_2): Ditto.
33560 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
33562 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
33564 * config/i386/predicates.md (int248_register_operand):
33565 Rename from extr_register_operand.
33566 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
33567 (*extzx<mode>): Ditto.
33568 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
33569 (*ashl<mode>3_mask): Ditto.
33570 (*<any_shiftrt:insn><mode>3_mask): Ditto.
33571 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
33572 (*<any_rotate:insn><mode>3_mask): Ditto.
33573 (*<btsc><mode>_mask): Ditto.
33574 (*btr<mode>_mask): Ditto.
33575 (*jcc_bt<mode>_mask_1): Ditto.
33577 2023-02-15 Richard Biener <rguenther@suse.de>
33579 PR middle-end/26854
33580 * df-core.cc (df_worklist_propagate_forward): Put later
33581 blocks on worklist and only earlier blocks on pending.
33582 (df_worklist_propagate_backward): Likewise.
33583 (df_worklist_dataflow_doublequeue): Change the iteration
33584 to process new blocks in the same iteration if that
33585 maintains the iteration order.
33587 2023-02-15 Marek Polacek <polacek@redhat.com>
33589 PR middle-end/106080
33590 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
33593 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33595 * config/riscv/predicates.md: Refine codes.
33596 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
33597 * config/riscv/riscv-v.cc: Refine codes.
33598 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
33600 (class imac): New class.
33601 (enum widen_ternop_type): New enum.
33602 (class iwmac): New class.
33604 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33605 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
33613 * config/riscv/riscv-vector-builtins.cc
33614 (function_builder::apply_predication): Adjust for multiply-add support.
33615 (function_expander::add_vundef_operand): Refine codes.
33616 (function_expander::use_ternop_insn): New function.
33617 (function_expander::use_widen_ternop_insn): Ditto.
33618 * config/riscv/riscv-vector-builtins.h: New function.
33619 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
33620 (pred_mul_<optab><mode>_undef_merge): Ditto.
33621 (*pred_<madd_nmsub><mode>): Ditto.
33622 (*pred_<macc_nmsac><mode>): Ditto.
33623 (*pred_mul_<optab><mode>): Ditto.
33624 (@pred_mul_<optab><mode>_scalar): Ditto.
33625 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
33626 (*pred_<madd_nmsub><mode>_scalar): Ditto.
33627 (*pred_<macc_nmsac><mode>_scalar): Ditto.
33628 (*pred_mul_<optab><mode>_scalar): Ditto.
33629 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
33630 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
33631 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
33632 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
33633 (@pred_widen_mul_plus<su><mode>): Ditto.
33634 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
33635 (@pred_widen_mul_plussu<mode>): Ditto.
33636 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
33637 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
33639 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33641 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
33642 (vector_all_trues_mask_operand): New predicate.
33643 (vector_undef_operand): New predicate.
33644 (ltge_operator): New predicate.
33645 (comparison_except_ltge_operator): New predicate.
33646 (comparison_except_eqge_operator): New predicate.
33647 (ge_operator): New predicate.
33648 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
33649 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
33651 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33652 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
33662 * config/riscv/riscv-vector-builtins-shapes.cc
33663 (struct return_mask_def): Adjust for compare support.
33664 * config/riscv/riscv-vector-builtins.cc
33665 (function_expander::use_compare_insn): New function.
33666 * config/riscv/riscv-vector-builtins.h
33667 (function_expander::add_integer_operand): Ditto.
33668 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
33669 * config/riscv/riscv.md: Add vector min/max attributes.
33670 * config/riscv/vector-iterators.md (xnor): New iterator.
33671 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
33672 (*pred_cmp<mode>): Ditto.
33673 (*pred_cmp<mode>_narrow): Ditto.
33674 (@pred_ltge<mode>): Ditto.
33675 (*pred_ltge<mode>): Ditto.
33676 (*pred_ltge<mode>_narrow): Ditto.
33677 (@pred_cmp<mode>_scalar): Ditto.
33678 (*pred_cmp<mode>_scalar): Ditto.
33679 (*pred_cmp<mode>_scalar_narrow): Ditto.
33680 (@pred_eqne<mode>_scalar): Ditto.
33681 (*pred_eqne<mode>_scalar): Ditto.
33682 (*pred_eqne<mode>_scalar_narrow): Ditto.
33683 (*pred_cmp<mode>_extended_scalar): Ditto.
33684 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
33685 (*pred_eqne<mode>_extended_scalar): Ditto.
33686 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
33687 (@pred_ge<mode>_scalar): Ditto.
33688 (@pred_<optab><mode>): Ditto.
33689 (@pred_n<optab><mode>): Ditto.
33690 (@pred_<optab>n<mode>): Ditto.
33691 (@pred_not<mode>): Ditto.
33693 2023-02-15 Martin Jambor <mjambor@suse.cz>
33696 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
33697 creation of non-scalar replacements even if IPA-CP knows their
33700 2023-02-15 Jakub Jelinek <jakub@redhat.com>
33704 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
33705 expander, change operand 3 to be TImode, emit maddlddi4 and
33706 umadddi4_highpart{,_le} with its low half and finally add the high
33707 half to the result.
33709 2023-02-15 Martin Liska <mliska@suse.cz>
33711 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
33713 2023-02-15 Richard Biener <rguenther@suse.de>
33715 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
33716 for with_poison and alias worklist to it.
33717 (sanitize_asan_mark_poison): Likewise.
33719 2023-02-15 Richard Biener <rguenther@suse.de>
33722 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
33723 Combine bitmap test and set.
33724 (scalar_chain::add_insn): Likewise.
33725 (scalar_chain::analyze_register_chain): Remove redundant
33726 attempt to add to queue and instead strengthen assert.
33727 Sink common attempts to mark the def dual-mode.
33728 (scalar_chain::add_to_queue): Remove redundant insn bitmap
33731 2023-02-15 Richard Biener <rguenther@suse.de>
33734 * config/i386/i386-features.cc (convert_scalars_to_vector):
33735 Switch candidates bitmaps to tree view before building the chains.
33737 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
33739 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
33740 "failure trying to reload" call.
33742 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
33744 * gdbinit.in (phrs): New command.
33745 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
33746 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
33748 2023-02-14 David Faust <david.faust@oracle.com>
33751 * config/bpf/constraints.md (q): New memory constraint.
33752 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
33753 (zero_extendqidi2): Likewise.
33754 (zero_extendsidi2): Likewise.
33755 (*mov<MM:mode>): Likewise.
33757 2023-02-14 Andrew Pinski <apinski@marvell.com>
33759 PR tree-optimization/108355
33760 PR tree-optimization/96921
33761 * match.pd: Add pattern for "1 - bool_val".
33763 2023-02-14 Richard Biener <rguenther@suse.de>
33765 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
33766 basic block index hashing on the availability of ->cclhs.
33767 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
33768 rely on ->cclhs availability.
33769 (vn_phi_lookup): Set ->cclhs only when we are eventually
33770 going to CSE the PHI.
33771 (vn_phi_insert): Likewise.
33773 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
33775 * gimplify.cc (gimplify_save_expr): Add missing guard.
33777 2023-02-14 Richard Biener <rguenther@suse.de>
33779 PR tree-optimization/108782
33780 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
33781 Make sure we're not vectorizing an inner loop.
33783 2023-02-14 Jakub Jelinek <jakub@redhat.com>
33785 PR sanitizer/108777
33786 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
33787 * asan.h (asan_memfn_rtl): Declare.
33788 * asan.cc (asan_memfn_rtls): New variable.
33789 (asan_memfn_rtl): New function.
33790 * builtins.cc (expand_builtin): If
33791 param_asan_kernel_mem_intrinsic_prefix and function is
33792 kernel-{,hw}address sanitized, emit calls to
33793 __{,hw}asan_{memcpy,memmove,memset} rather than
33794 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
33795 instead of flag_sanitize & SANITIZE_ADDRESS to check if
33796 asan_intercepted_p functions shouldn't be expanded inline.
33798 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
33800 PR tree-optimization/96373
33801 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
33802 operations on the loop mask. Reject partial vectors if this isn't
33805 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
33807 PR rtl-optimization/108681
33808 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
33809 code to handle bare uses and clobbers.
33811 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
33813 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
33814 caller_save_p flag when clearing defined_p flag.
33815 (setup_reg_equiv): Ditto.
33816 * lra-constraints.cc (lra_constraints): Ditto.
33818 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
33821 * config/i386/predicates.md (extr_register_operand):
33822 New special predicate.
33823 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
33824 as operand 1 predicate.
33825 (*exzv<mode>): Ditto.
33826 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
33828 2023-02-13 Richard Biener <rguenther@suse.de>
33830 PR tree-optimization/28614
33831 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
33832 walking all edges in most cases.
33833 (vn_nary_op_insert_pieces_predicated): Avoid repeated
33834 calls to can_track_predicate_on_edge unless checking is
33836 (process_bb): Instead call it once here for each edge
33837 we register possibly multiple predicates on.
33839 2023-02-13 Richard Biener <rguenther@suse.de>
33841 PR tree-optimization/108691
33842 * tree-cfg.cc (notice_special_calls): When the CFG is built
33843 honor gimple_call_ctrl_altering_p.
33844 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
33845 temporarily if the call is not control-altering.
33846 * calls.cc (emit_call_1): Do not add REG_SETJMP if
33847 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
33849 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
33852 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
33853 (struct s390_sched_state): Initialise to zero.
33854 (s390_sched_variable_issue): For better debuggability also emit
33856 (s390_sched_init): Unconditionally reset scheduler state.
33858 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
33860 * ifcvt.h (noce_if_info::cond_inverted): New field.
33861 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
33862 values when cond_inverted is true.
33863 (noce_find_if_block): Allow the condition to be inverted when
33864 handling conditional moves.
33866 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
33868 * config/s390/predicates.md (execute_operation): Use
33869 constrain_operands instead of extract_constrain_insn in order to
33870 determine wheter there exists a valid alternative.
33872 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
33874 * common/config/arc/arc-common.cc (arc_option_optimization_table):
33875 Remove millicode from list.
33877 2023-02-13 Martin Liska <mliska@suse.cz>
33879 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
33881 2023-02-13 Richard Biener <rguenther@suse.de>
33883 PR tree-optimization/106722
33884 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
33885 whether we marked a stmt.
33886 (mark_control_dependent_edges_necessary): When
33887 mark_last_stmt_necessary didn't mark any stmt make sure
33888 to mark its control dependent edges.
33889 (propagate_necessity): Likewise.
33891 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
33893 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
33894 (DWARF_FRAME_REGISTERS): New.
33895 (DWARF_REG_TO_UNWIND_COLUMN): New.
33897 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
33899 * doc/sourcebuild.texi: Remove (broken) direct reference to
33900 "The GNU configure and build system".
33902 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
33904 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
33905 gen_add3_insn to gen_rtx_SET.
33906 (riscv_adjust_libcall_cfi_epilogue): Likewise.
33908 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33910 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
33911 (class vnclip): Ditto.
33913 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33914 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
33923 * config/riscv/vector-iterators.md (su): Add instruction.
33926 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
33927 (@pred_<sat_op><mode>_scalar): Ditto.
33928 (*pred_<sat_op><mode>_scalar): Ditto.
33929 (*pred_<sat_op><mode>_extended_scalar): Ditto.
33930 (@pred_narrow_clip<v_su><mode>): Ditto.
33931 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
33933 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33935 * config/riscv/constraints.md (Wbr): Remove unused constraint.
33936 * config/riscv/predicates.md: Fix move operand predicate.
33937 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
33938 (class vncvt_x): Ditto.
33939 (class vmerge): Ditto.
33940 (class vmv_v): Ditto.
33942 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33943 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
33950 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
33951 (struct move_def): Ditto.
33953 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33954 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
33955 (DEF_RVV_WEXTU_OPS): Ditto
33956 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
33961 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
33962 * config/riscv/vector-iterators.md (nmsac):New iterator.
33963 (nmsub): New iterator.
33964 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
33965 (@pred_merge<mode>_scalar): New pattern.
33966 (*pred_merge<mode>_scalar): New pattern.
33967 (*pred_merge<mode>_extended_scalar): New pattern.
33968 (@pred_narrow_<optab><mode>): New pattern.
33969 (@pred_narrow_<optab><mode>_scalar): New pattern.
33970 (@pred_trunc<mode>): New pattern.
33972 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33974 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
33975 (class vmsbc): Ditto.
33976 (BASE): Define new class.
33977 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33978 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
33980 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
33983 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33984 * config/riscv/riscv-vector-builtins.cc
33985 (function_expander::use_exact_insn): Adjust for new support
33986 * config/riscv/riscv-vector-builtins.h
33987 (function_base::has_merge_operand_p): New function.
33988 * config/riscv/vector-iterators.md: New iterator.
33989 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
33990 (@pred_msbc<mode>): Ditto.
33991 (@pred_madc<mode>_scalar): Ditto.
33992 (@pred_msbc<mode>_scalar): Ditto.
33993 (*pred_madc<mode>_scalar): Ditto.
33994 (*pred_madc<mode>_extended_scalar): Ditto.
33995 (*pred_msbc<mode>_scalar): Ditto.
33996 (*pred_msbc<mode>_extended_scalar): Ditto.
33997 (@pred_madc<mode>_overflow): Ditto.
33998 (@pred_msbc<mode>_overflow): Ditto.
33999 (@pred_madc<mode>_overflow_scalar): Ditto.
34000 (@pred_msbc<mode>_overflow_scalar): Ditto.
34001 (*pred_madc<mode>_overflow_scalar): Ditto.
34002 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
34003 (*pred_msbc<mode>_overflow_scalar): Ditto.
34004 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
34006 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34008 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
34009 * config/riscv/riscv-v.cc (simm32_p): Ditto.
34010 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
34011 (class vsbc): Ditto.
34013 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34014 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
34016 * config/riscv/riscv-vector-builtins-shapes.cc
34017 (struct no_mask_policy_def): Ditto.
34019 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34020 * config/riscv/riscv-vector-builtins.cc
34021 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
34022 (rvv_arg_type_info::get_tree_type): Ditto.
34023 (function_expander::use_exact_insn): Ditto.
34024 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
34025 (function_base::use_mask_predication_p): New function.
34026 * config/riscv/vector-iterators.md: New iterator.
34027 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
34028 (@pred_sbc<mode>): Ditto.
34029 (@pred_adc<mode>_scalar): Ditto.
34030 (@pred_sbc<mode>_scalar): Ditto.
34031 (*pred_adc<mode>_scalar): Ditto.
34032 (*pred_adc<mode>_extended_scalar): Ditto.
34033 (*pred_sbc<mode>_scalar): Ditto.
34034 (*pred_sbc<mode>_extended_scalar): Ditto.
34036 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34038 * config/riscv/vector.md: use "zero" reg.
34040 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34042 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
34044 (class vwmulsu): Ditto.
34045 (class vwcvt): Ditto.
34046 (BASE): Add integer widening support.
34047 * config/riscv/riscv-vector-builtins-bases.h: Ditto
34048 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
34049 (vwsub): New class.
34050 (vwmul): New class.
34051 (vwmulu): New class.
34052 (vwmulsu): New class.
34053 (vwaddu): New class.
34054 (vwsubu): New class.
34055 (vwcvt_x): New class.
34056 (vwcvtu_x): New class.
34057 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
34059 (struct widen_alu_def): New class.
34060 (SHAPE): New class.
34061 * config/riscv/riscv-vector-builtins-shapes.h: New class.
34062 * config/riscv/riscv-vector-builtins.cc
34063 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
34064 (rvv_arg_type_info::get_tree_type): Ditto.
34065 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
34067 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
34069 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
34070 * config/riscv/riscv.h (X0_REGNUM): New constant.
34071 * config/riscv/vector-iterators.md: New iterators.
34072 * config/riscv/vector.md
34073 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
34075 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
34077 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
34078 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
34080 (@pred_widen_mulsu<mode>): Ditto.
34081 (@pred_widen_mulsu<mode>_scalar): Ditto.
34082 (@pred_<optab><mode>): Ditto.
34084 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34085 kito-cheng <kito.cheng@sifive.com>
34087 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
34088 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
34090 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34091 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
34095 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
34097 (DEF_RVV_FULL_V_U_OPS): Ditto.
34098 (vint8mf8_t): Ditto.
34099 (vint8mf4_t): Ditto.
34100 (vint8mf2_t): Ditto.
34101 (vint8m1_t): Ditto.
34102 (vint8m2_t): Ditto.
34103 (vint8m4_t): Ditto.
34104 (vint8m8_t): Ditto.
34105 (vint16mf4_t): Ditto.
34106 (vint16mf2_t): Ditto.
34107 (vint16m1_t): Ditto.
34108 (vint16m2_t): Ditto.
34109 (vint16m4_t): Ditto.
34110 (vint16m8_t): Ditto.
34111 (vint32mf2_t): Ditto.
34112 (vint32m1_t): Ditto.
34113 (vint32m2_t): Ditto.
34114 (vint32m4_t): Ditto.
34115 (vint32m8_t): Ditto.
34116 (vint64m1_t): Ditto.
34117 (vint64m2_t): Ditto.
34118 (vint64m4_t): Ditto.
34119 (vint64m8_t): Ditto.
34120 (vuint8mf8_t): Ditto.
34121 (vuint8mf4_t): Ditto.
34122 (vuint8mf2_t): Ditto.
34123 (vuint8m1_t): Ditto.
34124 (vuint8m2_t): Ditto.
34125 (vuint8m4_t): Ditto.
34126 (vuint8m8_t): Ditto.
34127 (vuint16mf4_t): Ditto.
34128 (vuint16mf2_t): Ditto.
34129 (vuint16m1_t): Ditto.
34130 (vuint16m2_t): Ditto.
34131 (vuint16m4_t): Ditto.
34132 (vuint16m8_t): Ditto.
34133 (vuint32mf2_t): Ditto.
34134 (vuint32m1_t): Ditto.
34135 (vuint32m2_t): Ditto.
34136 (vuint32m4_t): Ditto.
34137 (vuint32m8_t): Ditto.
34138 (vuint64m1_t): Ditto.
34139 (vuint64m2_t): Ditto.
34140 (vuint64m4_t): Ditto.
34141 (vuint64m8_t): Ditto.
34142 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
34143 (DEF_RVV_FULL_V_U_OPS): Ditto.
34144 (check_required_extensions): Add vmulh support.
34145 (rvv_arg_type_info::get_tree_type): Ditto.
34146 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
34147 (enum rvv_base_type): Ditto.
34148 * config/riscv/riscv.opt: Add 'V' extension flag.
34149 * config/riscv/vector-iterators.md (su): New iterator.
34150 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
34151 (@pred_mulh<v_su><mode>_scalar): Ditto.
34152 (*pred_mulh<v_su><mode>_scalar): Ditto.
34153 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
34155 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34157 * config/riscv/iterators.md: Add sign_extend/zero_extend.
34158 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
34160 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
34161 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
34164 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
34165 for vsext/vzext support.
34166 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
34168 (DEF_RVV_QEXTI_OPS): Ditto.
34169 (DEF_RVV_OEXTI_OPS): Ditto.
34170 (DEF_RVV_WEXTU_OPS): Ditto.
34171 (DEF_RVV_QEXTU_OPS): Ditto.
34172 (DEF_RVV_OEXTU_OPS): Ditto.
34173 (vint16mf4_t): Ditto.
34174 (vint16mf2_t): Ditto.
34175 (vint16m1_t): Ditto.
34176 (vint16m2_t): Ditto.
34177 (vint16m4_t): Ditto.
34178 (vint16m8_t): Ditto.
34179 (vint32mf2_t): Ditto.
34180 (vint32m1_t): Ditto.
34181 (vint32m2_t): Ditto.
34182 (vint32m4_t): Ditto.
34183 (vint32m8_t): Ditto.
34184 (vint64m1_t): Ditto.
34185 (vint64m2_t): Ditto.
34186 (vint64m4_t): Ditto.
34187 (vint64m8_t): Ditto.
34188 (vuint16mf4_t): Ditto.
34189 (vuint16mf2_t): Ditto.
34190 (vuint16m1_t): Ditto.
34191 (vuint16m2_t): Ditto.
34192 (vuint16m4_t): Ditto.
34193 (vuint16m8_t): Ditto.
34194 (vuint32mf2_t): Ditto.
34195 (vuint32m1_t): Ditto.
34196 (vuint32m2_t): Ditto.
34197 (vuint32m4_t): Ditto.
34198 (vuint32m8_t): Ditto.
34199 (vuint64m1_t): Ditto.
34200 (vuint64m2_t): Ditto.
34201 (vuint64m4_t): Ditto.
34202 (vuint64m8_t): Ditto.
34203 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
34204 (DEF_RVV_QEXTI_OPS): Ditto.
34205 (DEF_RVV_OEXTI_OPS): Ditto.
34206 (DEF_RVV_WEXTU_OPS): Ditto.
34207 (DEF_RVV_QEXTU_OPS): Ditto.
34208 (DEF_RVV_OEXTU_OPS): Ditto.
34209 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
34211 (rvv_arg_type_info::get_tree_type): Ditto.
34212 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
34213 * config/riscv/vector-iterators.md (z): New attribute.
34214 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
34215 (@pred_<optab><mode>_vf4): Ditto.
34216 (@pred_<optab><mode>_vf8): Ditto.
34218 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34220 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
34221 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
34222 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
34223 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34224 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
34228 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
34233 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
34234 (@pred_<optab><mode>_scalar): New pattern.
34235 (*pred_<optab><mode>_scalar): New pattern.
34236 (*pred_<optab><mode>_extended_scalar): New pattern.
34238 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34240 * config/riscv/iterators.md: Add neg and not.
34241 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
34243 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34244 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
34265 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
34266 (struct alu_def): Ditto.
34268 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34269 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
34270 * config/riscv/vector-iterators.md: New iterator.
34271 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
34273 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34275 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
34277 2023-02-11 Jakub Jelinek <jakub@redhat.com>
34280 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
34281 item->offset bit position is too large to be representable as
34282 unsigned int byte position.
34284 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
34286 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
34288 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
34290 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
34291 valid_combine only when ira_use_lra_p is true.
34293 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
34295 * params.opt (ira-simple-lra-insn-threshold): Add new param.
34296 * ira.cc (ira): Use the param to switch on simple LRA.
34298 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
34300 PR tree-optimization/108687
34301 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
34302 back to RFD_NONE mode for calculations.
34303 (ranger_cache::propagate_cache): Call the internal edge range API
34304 with RFD_READ_ONLY instead of changing the external routine.
34306 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
34308 PR tree-optimization/108520
34309 * gimple-range-infer.cc (check_assume_func): Invoke
34310 gimple_range_global directly instead using global_range_query.
34311 * value-query.cc (get_range_global): Add function context and
34312 avoid calling nonnull_arg_p if not cfun.
34313 (gimple_range_global): Add function context pointer.
34314 * value-query.h (imple_range_global): Add function context.
34316 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34318 * config/riscv/constraints.md (Wdm): Adjust constraint.
34319 (Wbr): New constraint.
34320 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
34321 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
34322 (emit_vlmax_op): New function.
34323 (emit_nonvlmax_op): Ditto.
34325 (neg_simm5_p): Ditto.
34326 (has_vi_variant_p): Ditto.
34327 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
34328 (emit_vlmax_op): New function.
34329 (emit_nonvlmax_op): Ditto.
34330 (expand_const_vector): Adjust function.
34331 (legitimize_move): Ditto.
34332 (simm32_p): New function.
34334 (neg_simm5_p): Ditto.
34335 (has_vi_variant_p): Ditto.
34336 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
34338 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34339 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
34342 (vminu): Remove signed cases.
34344 (vdiv): Remove unsigned cases.
34346 (vdivu): Remove signed cases.
34350 (vrsub): New class.
34355 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
34356 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
34357 * config/riscv/vector-iterators.md: New iterators.
34358 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
34360 (@pred_<optab><mode>_scalar): New pattern.
34361 (@pred_sub<mode>_reverse_scalar): Ditto.
34362 (*pred_<optab><mode>_scalar): Ditto.
34363 (*pred_<optab><mode>_extended_scalar): Ditto.
34364 (*pred_sub<mode>_reverse_scalar): Ditto.
34365 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
34367 2023-02-10 Richard Biener <rguenther@suse.de>
34369 PR tree-optimization/108724
34370 * tree-vect-stmts.cc (vectorizable_operation): Avoid
34371 using word_mode vectors when vector lowering will
34372 decompose them to elementwise operations.
34374 2023-02-10 Jakub Jelinek <jakub@redhat.com>
34377 2023-02-09 Martin Liska <mliska@suse.cz>
34380 * doc/extend.texi: Document that the function
34381 does not work correctly for old VIA processors.
34383 2023-02-10 Andrew Pinski <apinski@marvell.com>
34384 Andrew Macleod <amacleod@redhat.com>
34386 PR tree-optimization/108684
34387 * tree-ssa-dce.cc (simple_dce_from_worklist):
34388 Check all ssa names and not just non-vdef ones
34389 before accepting the inline-asm.
34390 Call unlink_stmt_vdef on the statement before
34393 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
34395 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
34396 * ira.cc (validate_equiv_mem): Check memref address variance.
34397 (no_equiv): Clear caller_save_p flag.
34398 (update_equiv_regs): Define caller save equivalence for
34400 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
34401 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
34402 call_save_p. Use caller save equivalence depending on the arg.
34403 (split_reg): Adjust the call.
34405 2023-02-09 Jakub Jelinek <jakub@redhat.com>
34408 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
34409 (cpu_indicator_init): Call get_available_features for all CPUs with
34410 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
34413 2023-02-09 Jakub Jelinek <jakub@redhat.com>
34415 PR tree-optimization/108688
34416 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
34417 of BIT_INSERT_EXPR extracting exactly all inserted bits even
34418 when without mode precision. Formatting fixes.
34420 2023-02-09 Andrew Pinski <apinski@marvell.com>
34422 PR tree-optimization/108688
34423 * match.pd (bit_field_ref [bit_insert]): Avoid generating
34424 BIT_FIELD_REFs of non-mode-precision integral operands.
34426 2023-02-09 Martin Liska <mliska@suse.cz>
34429 * doc/extend.texi: Document that the function
34430 does not work correctly for old VIA processors.
34432 2023-02-09 Andreas Schwab <schwab@suse.de>
34434 * lto-wrapper.cc (merge_and_complain): Handle
34435 -funwind-tables and -fasynchronous-unwind-tables.
34436 (append_compiler_options): Likewise.
34438 2023-02-09 Richard Biener <rguenther@suse.de>
34440 PR tree-optimization/26854
34441 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
34442 view around insert_updated_phi_nodes_for.
34443 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
34445 (walk_aliased_vdefs_1): Likewise.
34447 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
34449 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
34451 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34454 * config.gcc (tm_mlib_file): Define new variable.
34456 2023-02-08 Jakub Jelinek <jakub@redhat.com>
34458 PR tree-optimization/108692
34459 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
34460 widened_code which is different from code, don't call
34461 vect_look_through_possible_promotion but instead just check op is
34462 SSA_NAME with integral type for which vect_is_simple_use is true
34463 and call set_op on this_unprom.
34465 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
34467 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
34469 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
34471 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
34472 to 'aarch_ra_sign_key'.
34473 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
34475 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
34476 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
34477 * config/arm/arm.opt: Define.
34479 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
34481 PR tree-optimization/108316
34482 * tree-vect-stmts.cc (get_load_store_type): When using
34483 internal functions for gather/scatter, make sure that the type
34484 of the offset argument is consistent with the offset vector type.
34486 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
34489 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
34491 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
34492 * ira.cc (validate_equiv_mem): Check memref address variance.
34493 (update_equiv_regs): Define caller save equivalence for
34495 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
34496 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
34497 call_save_p. Use caller save equivalence depending on the arg.
34498 (split_reg): Adjust the call.
34500 2023-02-08 Jakub Jelinek <jakub@redhat.com>
34502 * tree.def (SAD_EXPR): Remove outdated comment about missing
34505 2023-02-07 Marek Polacek <polacek@redhat.com>
34507 * doc/invoke.texi: Update -fchar8_t documentation.
34509 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
34511 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
34512 * ira.cc (validate_equiv_mem): Check memref address variance.
34513 (update_equiv_regs): Define caller save equivalence for
34515 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
34516 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
34517 call_save_p. Use caller save equivalence depending on the arg.
34518 (split_reg): Adjust the call.
34520 2023-02-07 Richard Biener <rguenther@suse.de>
34522 PR tree-optimization/26854
34523 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
34524 instead of immediate uses.
34526 2023-02-07 Jakub Jelinek <jakub@redhat.com>
34528 PR tree-optimization/106923
34529 * ipa-split.cc (execute_split_functions): Don't split returns_twice
34532 2023-02-07 Jakub Jelinek <jakub@redhat.com>
34534 PR tree-optimization/106433
34535 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
34536 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
34538 2023-02-07 Jan Hubicka <jh@suse.cz>
34540 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
34543 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
34545 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
34546 (process_asm): Create a constructor for GCN_STACK_SIZE.
34547 (main): Parse the -mstack-size option.
34549 2023-02-06 Alex Coplan <alex.coplan@arm.com>
34552 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
34553 Use correct constraint for operand 3.
34555 2023-02-06 Martin Jambor <mjambor@suse.cz>
34557 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
34559 2023-02-06 Xi Ruoyao <xry111@xry111.site>
34561 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
34562 New define_int_iterator.
34563 (bytepick_d_ashift_amount): Likewise.
34564 (bytepick_imm): New define_int_attr.
34565 (bytepick_w_lshiftrt_amount): Likewise.
34566 (bytepick_d_lshiftrt_amount): Likewise.
34567 (bytepick_w_<bytepick_imm>): New define_insn template.
34568 (bytepick_w_<bytepick_imm>_extend): Likewise.
34569 (bytepick_d_<bytepick_imm>): Likewise.
34570 (bytepick_w): Remove unused define_insn.
34571 (bytepick_d): Likewise.
34572 (UNSPEC_BYTEPICK_W): Remove unused unspec.
34573 (UNSPEC_BYTEPICK_D): Likewise.
34574 * config/loongarch/predicates.md (const_0_to_3_operand):
34575 Remove unused define_predicate.
34576 (const_0_to_7_operand): Likewise.
34578 2023-02-06 Jakub Jelinek <jakub@redhat.com>
34580 PR tree-optimization/108655
34581 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
34582 or -fsanitize=unreachable -fsanitize-trap=unreachable return
34583 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
34585 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
34587 * doc/install.texi (Specific): Remove PW32.
34589 2023-02-03 Jakub Jelinek <jakub@redhat.com>
34591 PR tree-optimization/108647
34592 * range-op.cc (operator_equal::op1_range,
34593 operator_not_equal::op1_range): Don't test op2 bound
34594 equality if op2.undefined_p (), instead set_varying.
34595 (operator_lt::op1_range, operator_le::op1_range,
34596 operator_gt::op1_range, operator_ge::op1_range): Return false if
34597 op2.undefined_p ().
34598 (operator_lt::op2_range, operator_le::op2_range,
34599 operator_gt::op2_range, operator_ge::op2_range): Return false if
34600 op1.undefined_p ().
34602 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
34604 PR tree-optimization/108639
34605 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
34607 (irange::operator==): Same.
34609 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
34611 PR tree-optimization/108647
34612 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
34613 (foperator_lt::op2_range): Same.
34614 (foperator_le::op1_range): Same.
34615 (foperator_le::op2_range): Same.
34616 (foperator_gt::op1_range): Same.
34617 (foperator_gt::op2_range): Same.
34618 (foperator_ge::op1_range): Same.
34619 (foperator_ge::op2_range): Same.
34620 (foperator_unordered_lt::op1_range): Same.
34621 (foperator_unordered_lt::op2_range): Same.
34622 (foperator_unordered_le::op1_range): Same.
34623 (foperator_unordered_le::op2_range): Same.
34624 (foperator_unordered_gt::op1_range): Same.
34625 (foperator_unordered_gt::op2_range): Same.
34626 (foperator_unordered_ge::op1_range): Same.
34627 (foperator_unordered_ge::op2_range): Same.
34629 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
34631 PR tree-optimization/107570
34632 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
34634 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
34636 * doc/gm2.texi (Internals): Remove from menu.
34637 (Using): Comment out ifnohtml conditional.
34638 (Documentation): Use gcc url.
34639 (License): Node simplified.
34640 (Copying): New node. Include gpl_v3_without_node.
34641 (Contributing): Node simplified.
34642 (Internals): Commented out.
34643 (Libraries): Node simplified.
34646 (Functions): Ditto.
34648 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
34650 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
34652 (mve_vqshluq_m_n_s<mode>): Likewise.
34653 (mve_vshlq_m_<supf><mode>): Likewise.
34654 (mve_vsriq_m_n_<supf><mode>): Likewise.
34655 (mve_vsubq_m_<supf><mode>): Likewise.
34657 2023-02-03 Martin Jambor <mjambor@suse.cz>
34660 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
34661 when comparing to an IPA-CP value.
34662 (dump_list_of_param_indices): New function.
34663 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
34664 Dump removed candidates using dump_list_of_param_indices.
34665 * ipa-param-manipulation.cc
34666 (ipa_param_body_adjustments::modify_expression): Add assert checking
34667 sizes of a VIEW_CONVERT_EXPR will match.
34668 (ipa_param_body_adjustments::modify_assignment): Likewise.
34670 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
34672 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
34673 * config/riscv/riscv.cc: Ditto.
34675 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34677 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
34681 * config/riscv/vector.md: Ditto.
34683 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34685 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
34686 * config/riscv/riscv-vector-builtins-bases.cc: New class.
34687 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
34690 * config/riscv/riscv-vector-builtins.cc: Ditto.
34691 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
34693 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
34695 * toplev.cc (toplev::main): Only print the version information header
34696 from toplevel main().
34698 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
34700 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
34701 cond_{ashl|ashr|lshr}
34703 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
34705 PR rtl-optimization/108086
34706 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
34707 Adjust size-related commentary accordingly.
34709 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
34711 PR rtl-optimization/108508
34712 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
34713 the splay tree search gives the first clobber in the second group,
34714 make sure that the root of the first clobber group is updated
34715 correctly. Enter the new clobber group into the definition splay
34718 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
34720 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
34721 Fix finding best match score.
34723 2023-02-02 Jakub Jelinek <jakub@redhat.com>
34726 PR rtl-optimization/108463
34728 * cselib.cc (cselib_current_insn): Move declaration earlier.
34729 (cselib_hasher::equal): For debug only locs, temporarily override
34730 cselib_current_insn to their l->setting_insn for the
34731 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
34732 promote some debug locs.
34733 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
34734 when using cselib call cselib_lookup_from_insn on the address but
34735 don't substitute it.
34737 2023-02-02 Richard Biener <rguenther@suse.de>
34739 PR middle-end/108625
34740 * genmatch.cc (expr::gen_transform): Also disallow resimplification
34741 from pushing to lseq with force_leaf.
34742 (dt_simplify::gen_1): Likewise.
34744 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
34746 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
34747 (struct kernargs): Replace the common content with kernargs_abi.
34748 (struct heap): Delete.
34749 (main): Read GCN_STACK_SIZE envvar.
34750 Allocate space for the device stacks.
34751 Write the new kernargs fields.
34752 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
34753 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
34754 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
34755 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
34756 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
34757 Set up the stacks from the values in the kernargs, not private.
34758 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
34759 (gcn_hsa_declare_function_name): Turn off the private segment.
34760 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
34761 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
34762 * config/gcn/gcn.opt (mstack-size): Change the description.
34764 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
34767 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
34768 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
34769 addressing MVE predicate modes.
34770 (mve_bool_vec_to_const): Change to represent correct MVE predicate
34772 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
34774 (arm_vector_mode_supported_p): Likewise.
34775 (arm_mode_to_pred_mode): Add V2QI.
34776 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
34778 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
34779 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
34780 (v2qi_UP): New macro.
34781 (v4bi_UP): New macro.
34782 (v8bi_UP): New macro.
34783 (v16bi_UP): New macro.
34784 (arm_expand_builtin_args): Make it able to expand the new predicate
34786 * config/arm/arm-modes.def (V2QI): New mode.
34787 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
34788 Pred4x4_t): Remove unused predicate builtin types.
34789 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
34790 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
34791 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
34792 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
34793 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
34794 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
34795 of MODE_VECTOR_BOOL.
34796 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
34797 (MVE_VPRED): Likewise.
34798 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
34799 (MVE_vctp): New mode attribute.
34803 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
34804 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
34806 (mve_vpnothi): Rename this...
34807 (mve_vpnotv16bi): ... to this.
34808 (mve_vctp<mode1>q_mhi): Rename this...
34809 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
34810 (mve_vldrdq_gather_base_z_<supf>v2di,
34811 mve_vldrdq_gather_offset_z_<supf>v2di,
34812 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
34813 mve_vstrdq_scatter_base_p_<supf>v2di,
34814 mve_vstrdq_scatter_offset_p_<supf>v2di,
34815 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
34816 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
34817 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
34818 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
34819 mve_vldrdq_gather_base_wb_z_<supf>v2di,
34820 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
34821 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
34823 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
34825 (VCTP): ... with this.
34826 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
34827 (VCTP_M): ... with this.
34828 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
34829 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
34831 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
34834 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
34835 (arm_modes_tieable_p): Make MVE predicate modes tieable.
34836 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
34837 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
34838 simplify_subreg to simplify subregs where the outermode is not scalar.
34840 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
34843 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
34844 new qualifiers parameter and use unsigned short type for MVE predicate.
34845 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
34847 (arm_init_crypto_builtins): Likewise.
34849 2023-02-02 Jakub Jelinek <jakub@redhat.com>
34852 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
34853 * internal-fn.def (TRAP): Remove.
34854 * internal-fn.cc (expand_TRAP): Remove.
34855 * tree.cc (build_common_builtin_nodes): Define
34856 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
34857 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
34858 instead of BUILT_IN_TRAP.
34859 * gimple.cc (gimple_build_builtin_unreachable): Remove
34860 emitting internal function for BUILT_IN_TRAP.
34861 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
34862 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
34863 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
34864 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
34865 BUILT_IN_UNREACHABLE_TRAP.
34866 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
34867 * tree-cfg.cc (verify_gimple_call,
34868 pass_warn_function_return::execute): Likewise.
34869 * attribs.cc (decl_attributes): Don't report exclusions on
34870 BUILT_IN_UNREACHABLE_TRAP either.
34872 2023-02-02 liuhongt <hongtao.liu@intel.com>
34874 PR tree-optimization/108601
34875 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
34876 * tree-vect-loop.cc
34877 (vectorizable_nonlinear_induction): Remove
34878 vect_can_peel_nonlinear_iv_p.
34879 (vect_can_peel_nonlinear_iv_p): Don't peel
34880 nonlinear iv(mult or shift) for epilog when vf is not
34881 constant and moved the defination to ..
34882 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
34885 2023-02-02 Jakub Jelinek <jakub@redhat.com>
34887 PR middle-end/108435
34888 * tree-nested.cc (convert_nonlocal_omp_clauses)
34889 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
34890 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
34891 before calling declare_vars.
34892 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
34893 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
34894 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
34895 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
34897 2023-02-01 Tamar Christina <tamar.christina@arm.com>
34899 * common/config/aarch64/aarch64-common.cc
34900 (struct aarch64_option_extension): Add native_detect and document struct
34902 (all_extensions): Set new field native_detect.
34903 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
34906 2023-02-01 Martin Liska <mliska@suse.cz>
34908 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
34911 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
34913 PR tree-optimization/108356
34914 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
34915 do a search of the DOM tree for a range.
34917 2023-02-01 Martin Liska <mliska@suse.cz>
34920 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
34921 ony non-null values.
34922 * ipa.cc (walk_polymorphic_call_targets): Likewise.
34924 2023-02-01 Martin Liska <mliska@suse.cz>
34927 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
34930 2023-02-01 Jakub Jelinek <jakub@redhat.com>
34933 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
34934 subregs in DEBUG_INSNs.
34936 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
34938 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
34940 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
34942 * config/s390/s390.cc (s390_restore_gpr_p): New function.
34943 (s390_preserve_gpr_arg_in_range_p): New function.
34944 (s390_preserve_gpr_arg_p): New function.
34945 (s390_preserve_fpr_arg_p): New function.
34946 (s390_register_info_stdarg_fpr): Rename to ...
34947 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
34948 (s390_register_info_stdarg_gpr): Rename to ...
34949 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
34950 (s390_register_info): Use the renamed functions above.
34951 (s390_optimize_register_info): Likewise.
34952 (save_fpr): Generate CFI for -mpreserve-args.
34953 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
34954 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
34955 (s390_optimize_prologue): Likewise.
34956 * config/s390/s390.opt: New option -mpreserve-args
34958 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
34960 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
34961 (restore_gprs): Likewise.
34962 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
34963 frame pointer if a frame-pointer is used.
34964 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
34965 * config/s390/s390.md (stack_tie): Add a register operand and
34967 (@stack_tie<mode>): ... this.
34969 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
34971 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
34972 EMIT_CFI parameter.
34973 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
34974 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
34976 2023-02-01 Richard Biener <rguenther@suse.de>
34978 PR middle-end/108500
34979 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
34980 with tree traversal algorithm.
34982 2023-02-01 Jason Merrill <jason@redhat.com>
34984 * doc/invoke.texi: Document -Wno-changes-meaning.
34986 2023-02-01 David Malcolm <dmalcolm@redhat.com>
34988 * doc/invoke.texi (Static Analyzer Options): Add notes about
34989 limitations of -fanalyzer.
34991 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34993 * config/riscv/constraints.md (vj): New.
34995 * config/riscv/iterators.md: Add more opcode.
34996 * config/riscv/predicates.md (vector_arith_operand): New.
34997 (vector_neg_arith_operand): New.
34998 (vector_shift_operand): New.
34999 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
35000 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
35017 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
35034 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
35035 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
35036 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
35037 (DEF_RVV_U_OPS): New.
35038 (rvv_arg_type_info::get_base_vector_type): Handle
35039 RVV_BASE_shift_vector.
35040 (rvv_arg_type_info::get_tree_type): Ditto.
35041 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
35042 RVV_BASE_shift_vector.
35043 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
35044 * config/riscv/vector-iterators.md: Handle more opcode.
35045 * config/riscv/vector.md (@pred_<optab><mode>): New.
35047 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
35050 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
35053 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
35055 PR tree-optimization/108608
35056 * tree-vect-loop.cc (vect_transform_reduction): Handle single
35057 def-use cycles that involve function calls rather than tree codes.
35059 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35061 PR tree-optimization/108385
35062 * gimple-range-gori.cc (gori_compute::compute_operand_range):
35063 Allow VARYING computations to continue if there is a relation.
35064 * range-op.cc (pointer_plus_operator::op2_range): New.
35066 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35068 PR tree-optimization/108359
35069 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
35070 (range_operator::fold_range): If op1 is equivalent to op2 then
35071 invoke new fold_in_parts_equiv to operate on sub-components.
35072 * range-op.h (wi_fold_in_parts_equiv): New prototype.
35074 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35076 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
35077 not abort calculations if there is a valid relation available.
35078 (gori_compute::refine_using_relation): Pass correct relation trio.
35079 (gori_compute::compute_operand1_range): Create trio and use it.
35080 (gori_compute::compute_operand2_range): Ditto.
35081 * range-op.cc (operator_plus::op1_range): Use correct trio member.
35082 (operator_minus::op1_range): Use correct trio member.
35083 * value-relation.cc (value_relation::create_trio): New.
35084 * value-relation.h (value_relation::create_trio): New prototype.
35086 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35089 * config/i386/i386-expand.cc
35090 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
35091 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
35092 equal to bitsize of mode.
35094 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35096 PR rtl-optimization/108596
35097 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
35098 ends with asm goto and has a crossing fallthrough edge to the same bb
35099 that contains at least one of its labels by restoring EDGE_CROSSING
35100 flag even on possible edge from cur_bb to new_bb successor.
35102 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35105 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
35106 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
35107 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
35108 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
35109 uninitialized automatic variable __W.
35111 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
35113 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
35115 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35117 * config/riscv/riscv-protos.h (get_vector_mode): New function.
35118 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
35119 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
35120 (class loadstore): Adjust for indexed loads/stores support.
35122 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
35123 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
35139 * config/riscv/riscv-vector-builtins-shapes.cc
35140 (struct indexed_loadstore_def): New class.
35142 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35143 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
35144 for indexed loads/stores support.
35145 (check_required_extensions): Ditto.
35146 (rvv_arg_type_info::get_base_vector_type): New function.
35147 (rvv_arg_type_info::get_tree_type): Ditto.
35148 (function_builder::add_unique_function): Adjust for indexed loads/stores
35150 (function_expander::use_exact_insn): New function.
35151 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
35152 indexed loads/stores support.
35153 (struct rvv_arg_type_info): Ditto.
35154 (function_expander::index_mode): New function.
35155 (function_base::apply_tail_policy_p): Ditto.
35156 (function_base::apply_mask_policy_p): Ditto.
35157 * config/riscv/vector-iterators.md (unspec): New unspec.
35158 * config/riscv/vector.md (unspec): Ditto.
35159 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
35161 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
35162 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
35163 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
35164 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35165 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35166 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35167 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35168 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35169 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35170 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35171 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35172 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35173 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35175 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
35177 * config.gcc: Recognize x86_64-*-gnu* targets and include
35179 * config/i386/gnu64.h: Define configuration for new target
35180 including ld.so location.
35182 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
35184 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
35185 ampere1a to include SM4.
35187 2023-01-30 Andrew Pinski <apinski@marvell.com>
35189 PR tree-optimization/108582
35190 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
35191 for middlebb to have no phi nodes.
35193 2023-01-30 Richard Biener <rguenther@suse.de>
35195 PR tree-optimization/108574
35196 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
35197 sameval and def, ignore the equivalence if there's the
35198 danger of oscillating between two values.
35200 2023-01-30 Andreas Schwab <schwab@suse.de>
35202 * common/config/riscv/riscv-common.cc
35203 (riscv_option_optimization_table)
35204 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
35205 -fasynchronous-unwind-tables and -funwind-tables.
35206 * config.gcc (riscv*-*-linux*): Define
35207 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
35209 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
35211 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
35212 value of includedir.
35214 2023-01-30 Richard Biener <rguenther@suse.de>
35217 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
35220 2023-01-30 liuhongt <hongtao.liu@intel.com>
35222 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
35223 * doc/invoke.texi: Ditto.
35225 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
35227 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
35228 (stmt_may_terminate_function_p): If assuming return or EH
35229 volatile asm is safe.
35230 (find_always_executed_bbs): Fix handling of terminating BBS and
35231 infinite loops; add debug output.
35232 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
35234 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
35236 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
35237 off-by-one in checking the permissible shift-amount.
35239 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35241 * doc/extend.texi (Named Address Spaces): Update link to the
35244 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35246 * doc/standards.texi (Standards): Fix markup.
35248 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35250 * doc/standards.texi (Standards): Update link to Objective-C book.
35252 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35254 * doc/invoke.texi (Instrumentation Options): Update reference to
35257 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35259 * doc/standards.texi: Update Go1 link.
35261 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35263 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
35264 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
35267 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35268 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
35270 * config/riscv/riscv-vector-builtins.cc
35271 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
35272 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
35273 (@pred_strided_store<mode>): Ditto.
35275 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35277 * config/riscv/vector.md (tail_policy_op_idx): Remove.
35278 (mask_policy_op_idx): Remove.
35279 (avl_type_op_idx): Remove.
35281 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
35283 PR tree-optimization/96373
35284 * tree.h (sign_mask_for): Declare.
35285 * tree.cc (sign_mask_for): New function.
35286 (signed_or_unsigned_type_for): For vector types, try to use the
35287 related_int_vector_mode.
35288 * genmatch.cc (commutative_op): Handle conditional internal functions.
35289 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
35291 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
35293 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
35294 Use the likely minimum VF when bounding the denominators to
35295 the estimated number of iterations.
35297 2023-01-27 Richard Biener <rguenther@suse.de>
35300 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
35301 and -Ofast FP environment side-effects.
35303 2023-01-27 Richard Biener <rguenther@suse.de>
35306 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
35307 Don't add crtfastmath.o for -shared.
35309 2023-01-27 Richard Biener <rguenther@suse.de>
35312 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
35315 2023-01-27 Richard Biener <rguenther@suse.de>
35318 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
35319 crtfastmath.o for -shared.
35321 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
35323 PR tree-optimization/108306
35324 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
35325 varying for shifts that are always out of void range.
35326 (operator_rshift::fold_range): Return [0, 0] not
35327 varying for shifts that are always out of void range.
35329 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
35331 PR tree-optimization/108447
35332 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
35333 Do not attempt to fold HONOR_NAN types.
35335 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35337 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
35338 Remove _m suffix for "vop_m" C++ overloaded API name.
35340 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35342 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
35343 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35344 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
35346 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
35347 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
35348 (vbool64_t): Ditto.
35349 (vbool32_t): Ditto.
35350 (vbool16_t): Ditto.
35355 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
35356 (rvv_arg_type_info::get_tree_type): Ditto.
35357 (function_expander::use_contiguous_load_insn): Ditto.
35358 * config/riscv/vector.md (@pred_store<mode>): Ditto.
35360 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35362 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
35363 (vsetvl_discard_result_insn_p): New function.
35364 (reg_killed_by_bb_p): rename to find_reg_killed_by.
35365 (find_reg_killed_by): New name.
35366 (get_vl): allow it to be called by more functions.
35367 (has_vsetvl_killed_avl_p): Add condition.
35368 (get_avl): allow it to be called by more functions.
35369 (insn_should_be_added_p): New function.
35370 (get_all_nonphi_defs): Refine function.
35371 (get_all_sets): Ditto.
35372 (get_same_bb_set): New function.
35373 (any_insn_in_bb_p): Ditto.
35374 (any_set_in_bb_p): Ditto.
35375 (get_vl_vtype_info): Add VLMAX forward optimization.
35376 (source_equal_p): Fix issues.
35377 (extract_single_source): Refine.
35378 (avl_info::multiple_source_equal_p): New function.
35379 (avl_info::operator==): Adjust for final version.
35380 (vl_vtype_info::operator==): Ditto.
35381 (vl_vtype_info::same_avl_p): Ditto.
35382 (vector_insn_info::parse_insn): Ditto.
35383 (vector_insn_info::available_p): New function.
35384 (vector_insn_info::merge): Adjust for final version.
35385 (vector_insn_info::dump): Add hard_empty.
35386 (pass_vsetvl::hard_empty_block_p): New function.
35387 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
35388 (pass_vsetvl::forward_demand_fusion): Ditto.
35389 (pass_vsetvl::demand_fusion): Ditto.
35390 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
35391 (pass_vsetvl::compute_local_properties): Adjust for final version.
35392 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
35393 (pass_vsetvl::refine_vsetvls): Ditto.
35394 (pass_vsetvl::commit_vsetvls): Ditto.
35395 (pass_vsetvl::propagate_avl): New function.
35396 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
35397 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
35399 2023-01-27 Jakub Jelinek <jakub@redhat.com>
35402 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
35403 from size_t to int.
35405 2023-01-27 Jakub Jelinek <jakub@redhat.com>
35408 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
35409 redirection of calls to __builtin_trap in addition to redirection
35410 to __builtin_unreachable.
35412 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35414 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
35416 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35418 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
35419 (emit_vsetvl_insn): Ditto.
35421 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35423 * config/riscv/vector.md: Fix constraints.
35425 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35427 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
35429 2023-01-27 Patrick Palka <ppalka@redhat.com>
35430 Jakub Jelinek <jakub@redhat.com>
35432 * tree-core.h (tree_code_type, tree_code_length): For
35433 C++17 and later, add inline keyword, otherwise don't define
35434 the arrays, but declare extern arrays.
35435 * tree.cc (tree_code_type, tree_code_length): Define these
35436 arrays for C++14 and older.
35438 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35440 * config/riscv/riscv-vsetvl.h: Change it into public.
35442 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35444 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
35447 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35449 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
35451 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35453 * config/riscv/vector.md: Fix incorrect attributes.
35455 2023-01-27 Richard Biener <rguenther@suse.de>
35458 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
35459 Don't add crtfastmath.o for -shared.
35461 2023-01-27 Alexandre Oliva <oliva@gnu.org>
35463 * doc/options.texi (option, RejectNegative): Mention that
35464 -g-started options are also implicitly negatable.
35466 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
35468 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
35469 Use get_typenode_from_name to get fixed-width integer type
35471 * config/riscv/riscv-vector-builtins.def: Update define with
35472 fixed-width integer type nodes.
35474 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35476 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
35477 (real_insn_and_same_bb_p): New function.
35478 (same_bb_and_after_or_equal_p): Remove it.
35479 (before_p): New function.
35480 (reg_killed_by_bb_p): Ditto.
35481 (has_vsetvl_killed_avl_p): Ditto.
35482 (get_vl): Move location so that we can call it.
35483 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
35484 (available_occurrence_p): Ditto.
35485 (dominate_probability_p): Remove it.
35486 (can_backward_propagate_p): Remove it.
35487 (get_all_nonphi_defs): New function.
35488 (get_all_predecessors): Ditto.
35489 (any_insn_in_bb_p): Ditto.
35490 (insert_vsetvl): Adjust AVL REG.
35491 (source_equal_p): New function.
35492 (extract_single_source): Ditto.
35493 (avl_info::single_source_equal_p): Ditto.
35494 (avl_info::operator==): Adjust for AVL=REG.
35495 (vl_vtype_info::same_avl_p): Ditto.
35496 (vector_insn_info::set_demand_info): Remove it.
35497 (vector_insn_info::compatible_p): Adjust for AVL=REG.
35498 (vector_insn_info::compatible_avl_p): New function.
35499 (vector_insn_info::merge): Adjust AVL=REG.
35500 (vector_insn_info::dump): Ditto.
35501 (pass_vsetvl::merge_successors): Remove it.
35502 (enum fusion_type): New enum.
35503 (pass_vsetvl::get_backward_fusion_type): New function.
35504 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
35505 (pass_vsetvl::forward_demand_fusion): Ditto.
35506 (pass_vsetvl::demand_fusion): Ditto.
35507 (pass_vsetvl::prune_expressions): Ditto.
35508 (pass_vsetvl::compute_local_properties): Ditto.
35509 (pass_vsetvl::cleanup_vsetvls): Ditto.
35510 (pass_vsetvl::commit_vsetvls): Ditto.
35511 (pass_vsetvl::init): Ditto.
35512 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
35513 (enum merge_type): New enum.
35515 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35517 * config/riscv/riscv-vsetvl.cc
35518 (vector_infos_manager::vector_infos_manager): Add probability.
35519 (vector_infos_manager::dump): Ditto.
35520 (pass_vsetvl::compute_probabilities): Ditto.
35521 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
35523 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35525 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
35526 (vector_insn_info::merge): Ditto.
35527 (vector_insn_info::dump): Ditto.
35528 (pass_vsetvl::merge_successors): Ditto.
35529 (pass_vsetvl::backward_demand_fusion): Ditto.
35530 (pass_vsetvl::forward_demand_fusion): Ditto.
35531 (pass_vsetvl::commit_vsetvls): Ditto.
35532 * config/riscv/riscv-vsetvl.h: Ditto.
35534 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35536 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
35539 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35541 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
35543 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35545 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
35546 Add pre-check for redundant flow.
35548 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35550 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
35551 (vector_infos_manager::free_bitmap_vectors): Ditto.
35552 (pass_vsetvl::pre_vsetvl): Adjust codes.
35553 * config/riscv/riscv-vsetvl.h: New function declaration.
35555 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35557 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
35558 (vector_insn_info::set_demand_info): New function.
35559 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
35560 (pass_vsetvl::merge_successors): Ditto.
35561 (pass_vsetvl::compute_global_backward_infos): Ditto.
35562 (pass_vsetvl::backward_demand_fusion): Ditto.
35563 (pass_vsetvl::forward_demand_fusion): Ditto.
35564 (pass_vsetvl::demand_fusion): New function.
35565 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
35566 * config/riscv/riscv-vsetvl.h: New function declaration.
35568 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35570 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
35572 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35574 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
35575 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
35577 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35579 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
35580 (backward_propagate_worthwhile_p): Fix non-worthwhile.
35582 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35584 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
35586 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35588 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
35589 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
35590 (pass_vsetvl::commit_vsetvls): Ditto.
35591 * config/riscv/riscv-vsetvl.h: New function declaration.
35593 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35595 * config/riscv/vector.md:
35597 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35599 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
35600 pred_store for vse.
35601 * config/riscv/riscv-vector-builtins.cc
35602 (function_expander::add_mem_operand): Refine function.
35603 (function_expander::use_contiguous_load_insn): Adjust new
35605 (function_expander::use_contiguous_store_insn): Ditto.
35606 * config/riscv/riscv-vector-builtins.h: Refine function.
35607 * config/riscv/vector.md (@pred_store<mode>): New pattern.
35609 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35611 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
35613 2023-01-26 Marek Polacek <polacek@redhat.com>
35615 PR middle-end/108543
35616 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
35617 if it was previously set.
35619 2023-01-26 Jakub Jelinek <jakub@redhat.com>
35621 PR tree-optimization/108540
35622 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
35623 are singletons, use range_true even if op1 != op2
35624 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
35625 even if intersection of the ranges is empty and one has
35626 zero low bound and another zero high bound, use range_true_and_false
35627 rather than range_false.
35628 (foperator_not_equal::fold_range): If both op1 and op2
35629 are singletons, use range_false even if op1 != op2
35630 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
35631 even if intersection of the ranges is empty and one has
35632 zero low bound and another zero high bound, use range_true_and_false
35633 rather than range_true.
35635 2023-01-26 Jakub Jelinek <jakub@redhat.com>
35637 * value-relation.cc (kind_string): Add const.
35638 (rr_negate_table, rr_swap_table, rr_intersect_table,
35639 rr_union_table, rr_transitive_table): Add static const, change
35640 element type from relation_kind to unsigned char.
35641 (relation_negate, relation_swap, relation_intersect, relation_union,
35642 relation_transitive): Cast rr_*_table element to relation_kind.
35643 (relation_to_code): Add static const.
35644 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
35646 2023-01-26 Richard Biener <rguenther@suse.de>
35648 PR tree-optimization/108547
35649 * gimple-predicate-analysis.cc (value_sat_pred_p):
35652 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
35654 PR tree-optimization/108522
35655 * tree-object-size.cc (compute_object_offset): Make EXPR
35656 argument non-const. Call component_ref_field_offset.
35658 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35660 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
35661 FEATURE_STRING field.
35663 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
35665 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
35667 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
35671 * gcc.cc: Provide default specs for Modula-2 so that when the
35672 language is not built-in better diagnostics are emitted for
35673 attempts to use .mod or .m2i file extensions.
35675 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
35677 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
35679 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
35681 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
35683 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
35685 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
35688 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
35690 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
35692 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
35694 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
35696 2023-01-25 Richard Biener <rguenther@suse.de>
35698 PR tree-optimization/108523
35699 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
35700 backedge value for the result when using predication to
35703 2023-01-25 Richard Biener <rguenther@suse.de>
35705 * doc/lto.texi (Command line options): Reword and update reference
35706 to removed lto_read_all_file_options.
35708 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
35710 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
35713 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
35715 * doc/contrib.texi: Add Jose E. Marchesi.
35717 2023-01-25 Jakub Jelinek <jakub@redhat.com>
35719 PR tree-optimization/108498
35720 * gimple-ssa-store-merging.cc (class store_operand_info):
35721 End coment with full stop rather than comma.
35722 (split_group): Likewise.
35723 (merged_store_group::apply_stores): Clear string_concatenation if
35724 start or end aren't on a byte boundary.
35726 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
35727 Jakub Jelinek <jakub@redhat.com>
35729 PR tree-optimization/108522
35730 * tree-object-size.cc (compute_object_offset): Use
35731 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
35733 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35735 * config/xtensa/xtensa.md:
35736 Fix exit from loops detecting references before overwriting in the
35739 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
35741 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
35742 do elimination but only for hard register.
35743 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
35744 calls of get_hard_regno.
35746 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
35748 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
35751 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
35754 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
35755 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
35758 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
35760 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
35761 and only include 'csky/t-csky-linux' when enable multilib.
35762 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
35763 define it when disable multilib.
35765 2023-01-24 Richard Biener <rguenther@suse.de>
35767 PR tree-optimization/108500
35768 * dominance.h (calculate_dominance_info): Add parameter
35769 to indicate fast-query compute, defaulted to true.
35770 * dominance.cc (calculate_dominance_info): Honor
35771 fast-query compute parameter.
35772 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
35773 not compute the dominator fast-query DFS numbers.
35775 2023-01-24 Eric Biggers <ebiggers@google.com>
35778 * optc-save-gen.awk: Fix copy-and-paste error.
35780 2023-01-24 Jakub Jelinek <jakub@redhat.com>
35783 * cgraphbuild.cc: Include gimplify.h.
35784 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
35785 their corresponding DECL_VALUE_EXPR expressions after unsharing.
35787 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35790 * config.gcc (tm_file): Move the variable out of loop.
35792 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
35793 Yang Yujie <yangyujie@loongson.cn>
35796 * config/loongarch/loongarch.cc (loongarch_classify_address):
35797 Add precessint for CONST_INT.
35798 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
35799 (loongarch_print_operand): Increase the processing of '%c'.
35800 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
35801 And port the public operand modifiers information to this document.
35803 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35805 * doc/invoke.texi (-mbranch-protection): Update documentation.
35807 2023-01-23 Richard Biener <rguenther@suse.de>
35810 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
35812 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
35813 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
35814 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
35815 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
35817 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35819 * config/arm/aout.h (ra_auth_code): Add entry in enum.
35820 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
35821 to dwarf frame expression.
35822 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
35823 (arm_expand_prologue): Update frame related information and reg notes
35824 for pac/pacbit insn.
35825 (arm_regno_class): Check for pac pseudo reigster.
35826 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
35827 (arm_init_machine_status): Set pacspval_needed to zero.
35828 (arm_debugger_regno): Check for PAC register.
35829 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
35831 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
35832 (arm_unwind_emit): Update REG_CFA_REGISTER case._
35833 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
35834 (DWARF_PAC_REGNUM): Define.
35835 (IS_PAC_REGNUM): Likewise.
35836 (enum reg_class): Add PAC_REG entry.
35837 (machine_function): Add pacbti_needed state to structure.
35838 * config/arm/arm.md (RA_AUTH_CODE): Define.
35840 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35842 * config.gcc ($tm_file): Update variable.
35843 * config/arm/arm-mlib.h: Create new header file.
35844 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
35845 multilib arch directory.
35846 (MULTILIB_REUSE): Add multilib reuse rules.
35847 (MULTILIB_MATCHES): Add multilib match rules.
35849 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35851 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
35852 * config/arm/arm-tables.opt: Regenerate.
35853 * config/arm/arm-tune.md: Likewise.
35854 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
35855 * (-mfix-cmse-cve-2021-35465): Likewise.
35857 2023-01-23 Richard Biener <rguenther@suse.de>
35859 PR tree-optimization/108482
35860 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
35861 .LOOP_DIST_ALIAS calls.
35863 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35865 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
35866 * config/arm/arm-protos.h: Update.
35867 * config/arm/aarch-common-protos.h: Declare
35868 'aarch_bti_arch_check'.
35869 * config/arm/arm.cc (aarch_bti_enabled) Update.
35870 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
35871 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
35872 * config/arm/arm.md (bti_nop): New insn.
35873 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
35874 (aarch-bti-insert.o): New target.
35875 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
35876 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
35878 (gate): Make use of 'aarch_bti_arch_check'.
35879 * config/arm/arm-passes.def: New file.
35880 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
35882 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35884 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
35885 'aarch-bti-insert.o'.
35886 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
35888 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
35889 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
35890 (aarch64_output_mi_thunk)
35891 (aarch64_print_patchable_function_entry)
35892 (aarch64_file_end_indicate_exec_stack): Update renamed function
35893 calls to renamed functions.
35894 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
35895 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
35897 * config/aarch64/aarch64-bti-insert.cc: Delete.
35898 * config/arm/aarch-bti-insert.cc: New file including and
35899 generalizing code from aarch64-bti-insert.cc.
35900 * config/arm/aarch-common-protos.h: Update.
35902 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35904 * config/arm/arm.h (arm_arch8m_main): Declare it.
35905 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
35907 * config/arm/arm.cc (arm_arch8m_main): Define it.
35908 (arm_option_reconfigure_globals): Set arm_arch8m_main.
35909 (arm_compute_frame_layout, arm_expand_prologue)
35910 (thumb2_expand_return, arm_expand_epilogue)
35911 (arm_conditional_register_usage): Update for pac codegen.
35912 (arm_current_function_pac_enabled_p): New function.
35913 (aarch_bti_enabled) New function.
35914 (use_return_insn): Return zero when pac is enabled.
35915 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
35917 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
35918 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
35920 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35922 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
35923 mbranch-protection.
35925 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35926 Tejas Belagod <tbelagod@arm.com>
35928 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
35929 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
35931 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35932 Tejas Belagod <tbelagod@arm.com>
35933 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35935 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
35936 new pseudo register class _UVRSC_PAC.
35938 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35939 Tejas Belagod <tbelagod@arm.com>
35941 * config/arm/arm-c.cc (arm_cpu_builtins): Define
35942 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
35943 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
35945 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35946 Tejas Belagod <tbelagod@arm.com>
35948 * doc/sourcebuild.texi: Document arm_pacbti_hw.
35950 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35951 Tejas Belagod <tbelagod@arm.com>
35952 Richard Earnshaw <Richard.Earnshaw@arm.com>
35954 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
35955 -mbranch-protection option and initialize appropriate data structures.
35956 * config/arm/arm.opt (-mbranch-protection): New option.
35957 * doc/invoke.texi (Arm Options): Document it.
35959 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35960 Tejas Belagod <tbelagod@arm.com>
35962 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
35963 * config/arm/arm-cpus.in (pacbti): New feature.
35964 * doc/invoke.texi (Arm Options): Document it.
35966 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
35967 Tejas Belagod <tbelagod@arm.com>
35969 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
35970 (all_architectures): Fix comment.
35971 (aarch64_parse_extension): Rename return type, enum value names.
35972 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
35973 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
35974 Also rename corresponding enum values.
35975 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
35976 out aarch64_function_type and move it to common code as
35977 aarch_function_type in aarch-common.h.
35978 * config/aarch64/aarch64-protos.h: Include common types header,
35979 move out types aarch64_parse_opt_result and aarch64_key_type to
35981 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
35982 and functions out into aarch-common.h and aarch-common.cc. Fix up
35983 all the name changes resulting from the move.
35984 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
35986 * config/aarch64/aarch64.opt: Include aarch-common.h to import
35987 type move. Fix up name changes from factoring out common code and
35989 * config/arm/aarch-common-protos.h: Export factored out routines to both
35991 * config/arm/aarch-common.cc: Include newly factored out types.
35992 Move all mbranch-protection code and data structures from
35994 * config/arm/aarch-common.h: New header that declares types shared
35995 between aarch32 and aarch64 backends.
35996 * config/arm/arm-protos.h: Declare types and variables that are
35997 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
35998 aarch_ra_sign_scope and aarch_enable_bti.
35999 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
36000 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
36001 * config/arm/arm.cc: Add missing includes.
36003 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
36005 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
36007 2023-01-23 Richard Biener <rguenther@suse.de>
36009 PR tree-optimization/108449
36010 * cgraphunit.cc (check_global_declaration): Do not turn
36011 undefined statics into externs.
36013 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
36015 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
36016 and HI input modes.
36017 * config/pru/pru.md (clz): Fix generated code for QI and HI
36020 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
36022 * config/v850/v850.cc (v850_select_section): Put const volatile
36023 objects into read-only sections.
36025 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
36027 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
36028 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
36029 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
36031 2023-01-20 Jakub Jelinek <jakub@redhat.com>
36033 PR tree-optimization/108457
36034 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
36035 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
36036 argument instead of a temporary. Formatting fixes.
36038 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36040 PR tree-optimization/108447
36041 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
36042 (relation_tests): Add self-tests for relation_{intersect,union}
36044 * selftest.h (relation_tests): Declare.
36045 * function-tests.cc (test_ranges): Call it.
36047 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
36050 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
36051 invalid third argument to __builtin_ia32_prefetch.
36053 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36055 PR middle-end/108459
36056 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
36057 than fold_unary for NEGATE_EXPR.
36059 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
36062 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
36063 comment. Move assert about alignment a bit later.
36065 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36067 PR tree-optimization/108440
36068 * tree-ssa-forwprop.cc: Include gimple-range.h.
36069 (simplify_rotate): For the forms with T2 wider than T and shift counts of
36070 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
36071 to B. For the forms with T2 wider than T and shift counts of
36072 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
36073 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
36074 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
36075 pass specific ranger instead of get_global_range_query.
36076 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
36079 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36081 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
36082 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
36084 (aarch64_simd_vec_copy_lane<mode>): Likewise.
36085 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
36087 2023-01-19 Alexandre Oliva <oliva@adacore.com>
36090 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
36091 within debug insns.
36093 2023-01-18 Martin Jambor <mjambor@suse.cz>
36096 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
36097 lcone_of chain also do not need the body.
36099 2023-01-18 Richard Biener <rguenther@suse.de>
36102 2022-12-16 Richard Biener <rguenther@suse.de>
36104 PR middle-end/108086
36105 * tree-inline.cc (remap_ssa_name): Do not unshare the
36106 result from the decl_map.
36108 2023-01-18 Murray Steele <murray.steele@arm.com>
36111 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
36113 (__arm_vst1q_p_s8): Likewise.
36114 (__arm_vld1q_z_u8): Likewise.
36115 (__arm_vld1q_z_s8): Likewise.
36116 (__arm_vst1q_p_u16): Likewise.
36117 (__arm_vst1q_p_s16): Likewise.
36118 (__arm_vld1q_z_u16): Likewise.
36119 (__arm_vld1q_z_s16): Likewise.
36120 (__arm_vst1q_p_u32): Likewise.
36121 (__arm_vst1q_p_s32): Likewise.
36122 (__arm_vld1q_z_u32): Likewise.
36123 (__arm_vld1q_z_s32): Likewise.
36124 (__arm_vld1q_z_f16): Likewise.
36125 (__arm_vst1q_p_f16): Likewise.
36126 (__arm_vld1q_z_f32): Likewise.
36127 (__arm_vst1q_p_f32): Likewise.
36129 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36131 * config/xtensa/xtensa.md (xorsi3_internal):
36132 Rename from the original of "xorsi3".
36133 (xorsi3): New expansion pattern that emits addition rather than
36134 bitwise-XOR when the second source is a constant of -2147483648
36137 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
36138 Andrew Pinski <apinski@marvell.com>
36141 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
36142 vec_vsubcuqP with vec_vsubcuq.
36144 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
36147 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
36148 support for invalid uses of MMA opaque type in function arguments.
36150 2023-01-18 liuhongt <hongtao.liu@intel.com>
36153 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
36154 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
36155 -share or -mno-daz-ftz is specified.
36156 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
36157 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
36159 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
36161 * config/bpf/bpf.cc (bpf_option_override): Disable
36164 2023-01-17 Jakub Jelinek <jakub@redhat.com>
36166 PR tree-optimization/106523
36167 * tree-ssa-forwprop.cc (simplify_rotate): For the
36168 patterns with (-Y) & (B - 1) in one operand's shift
36169 count and Y in another, if T2 has wider precision than T,
36170 punt if Y could have a value in [B, B2 - 1] range.
36172 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
36175 * config/i386/i386.cc (x86_output_mi_thunk): Disable
36176 -mforce-indirect-call for PIC in 32-bit mode.
36178 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
36181 * ipa-modref.cc (modref_access_analysis::analyze): Use
36182 find_always_executed_bbs.
36183 * ipa-sra.cc (process_scan_results): Likewise.
36184 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
36185 (find_always_executed_bbs): New function.
36186 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
36187 (find_always_executed_bbs): Declare.
36189 2023-01-16 Jan Hubicka <jh@suse.cz>
36191 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
36192 by TARGET_USE_SCATTER.
36193 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
36194 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
36195 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
36196 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
36197 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
36198 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
36200 2023-01-16 Richard Biener <rguenther@suse.de>
36203 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
36205 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36209 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
36210 (__ARM_mve_coerce3): Likewise.
36212 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36214 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
36216 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36218 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
36219 (number_of_iterations_bitcount): Add call to the above.
36220 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
36221 c[lt]z idiom recognition.
36223 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36225 * doc/sourcebuild.texi: Add missing target attributes.
36227 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36229 PR tree-optimization/94793
36230 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
36232 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
36233 (number_of_iterations_cltz_complement): New.
36234 (number_of_iterations_bitcount): Add call to the above.
36236 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
36238 * doc/extend.texi (Common Function Attributes): Fix grammar.
36240 2023-01-16 Jakub Jelinek <jakub@redhat.com>
36243 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
36244 * config/riscv/riscv-vsetvl.cc: Likewise.
36246 2023-01-16 Jakub Jelinek <jakub@redhat.com>
36249 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
36250 disable -Winit-self using pragma GCC diagnostic ignored.
36251 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
36253 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
36254 _mm256_undefined_si256): Likewise.
36255 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
36256 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
36257 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
36258 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
36260 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
36263 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
36264 support for invalid uses in inline asm, factor out the checking and
36265 erroring to lambda function check_and_error_invalid_use.
36267 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
36269 PR tree-optimization/107608
36270 * range-op-float.cc (range_operator_float::fold_range): Avoid
36271 folding into INF when flag_trapping_math.
36272 * value-range.h (frange::known_isinf): Return false for possible NANs.
36274 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36276 * config.gcc (csky-*-*): Support --with-float=softfp.
36278 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36280 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
36281 Rename to xtensa_adjust_reg_alloc_order.
36282 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
36283 Ditto. And also remove code to reorder register numbers for
36284 leaf functions, rename the tables, and adjust the allocation
36285 order for the call0 ABI to use register A0 more.
36286 (xtensa_leaf_regs): Remove.
36287 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
36288 (order_regs_for_local_alloc): Rename as the above.
36289 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
36291 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36293 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
36294 Change to define_insn_and_split to fold ldr+dup to ld1rq.
36295 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
36297 2023-01-14 Alexandre Oliva <oliva@adacore.com>
36299 * hash-table.h (is_deleted): Precheck !is_empty.
36300 (mark_deleted): Postcheck !is_empty.
36301 (copy constructor): Test is_empty before is_deleted.
36303 2023-01-14 Alexandre Oliva <oliva@adacore.com>
36306 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
36309 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
36311 PR rtl-optimization/108274
36312 * function.cc (thread_prologue_and_epilogue_insns): Also update the
36313 DF information for calls in a few more cases.
36315 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
36317 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
36318 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
36320 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
36321 (MAX_SYNC_LIBFUNC_SIZE): Define.
36322 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
36324 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
36325 libcall when sync libcalls are disabled.
36326 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
36327 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
36328 are disabled on 32-bit target.
36329 * config/pa/pa.opt (matomic-libcalls): New option.
36330 * doc/invoke.texi (HPPA Options): Update.
36332 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
36334 PR rtl-optimization/108117
36335 PR rtl-optimization/108132
36336 * sched-deps.cc (deps_analyze_insn): Do not schedule across
36337 calls before reload.
36339 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36341 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
36342 options for -mlibarch.
36343 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
36344 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
36346 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
36348 * attribs.cc (strict_flex_array_level_of): Move this function to ...
36349 * attribs.h (strict_flex_array_level_of): Remove the declaration.
36350 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
36351 replace the referece to strict_flex_array_level_of with
36352 DECL_NOT_FLEXARRAY.
36353 * tree.cc (component_ref_size): Likewise.
36355 2023-01-13 Richard Biener <rguenther@suse.de>
36358 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
36359 crtfastmath.o for -shared.
36360 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
36362 2023-01-13 Richard Biener <rguenther@suse.de>
36365 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
36366 crtfastmath.o for -shared.
36367 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
36369 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
36372 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
36374 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
36376 (TARGET_DWARF_FRAME_REG_MODE): Define.
36378 2023-01-13 Richard Biener <rguenther@suse.de>
36381 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
36382 update EH info on the fly.
36384 2023-01-13 Richard Biener <rguenther@suse.de>
36386 PR tree-optimization/108387
36387 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
36388 value before inserting expression into the tables.
36390 2023-01-12 Andrew Pinski <apinski@marvell.com>
36391 Roger Sayle <roger@nextmovesoftware.com>
36393 PR tree-optimization/92342
36394 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
36395 Use tcc_comparison and :c for the multiply.
36396 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
36398 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
36399 Richard Sandiford <richard.sandiford@arm.com>
36402 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
36403 Check DECL_PACKED for bitfield.
36404 (aarch64_layout_arg): Warn when parameter passing ABI changes.
36405 (aarch64_function_arg_boundary): Do not warn here.
36406 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
36409 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
36410 Richard Sandiford <richard.sandiford@arm.com>
36412 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
36414 (aarch64_layout_arg): Factorize warning conditions.
36415 (aarch64_function_arg_boundary): Fix typo.
36416 * function.cc (currently_expanding_function_start): New variable.
36417 (expand_function_start): Handle
36418 currently_expanding_function_start.
36419 * function.h (currently_expanding_function_start): Declare.
36421 2023-01-12 Richard Biener <rguenther@suse.de>
36423 PR tree-optimization/99412
36424 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
36425 (swap_ops_for_binary_stmt): Remove reduction handling.
36426 (rewrite_expr_tree_parallel): Adjust.
36427 (reassociate_bb): Likewise.
36428 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
36430 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36432 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
36433 Rearrange the emitting codes.
36435 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36437 * config/xtensa/xtensa.md (*btrue):
36438 Correct value of the attribute "length" that depends on
36439 TARGET_DENSITY and operands, and add '?' character to the register
36440 constraint of the compared operand.
36442 2023-01-12 Alexandre Oliva <oliva@adacore.com>
36444 * hash-table.h (expand): Check elements and deleted counts.
36445 (verify): Likewise.
36447 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
36449 PR tree-optimization/71343
36450 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
36451 the value number of the expression X << C the same as the value
36452 number for the multiplication X * (1<<C).
36454 2023-01-11 David Faust <david.faust@oracle.com>
36457 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
36458 floating point modes.
36460 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
36462 PR tree-optimization/108199
36463 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
36464 for bit-field references.
36466 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
36468 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
36469 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
36470 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
36471 OPTION_MASK_P10_FUSION.
36473 2023-01-11 Richard Biener <rguenther@suse.de>
36475 PR tree-optimization/107767
36476 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
36477 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
36478 * tree-switch-conversion.cc (switch_conversion::collect):
36479 Count unique non-default targets accounting for later
36480 merging opportunities.
36482 2023-01-11 Martin Liska <mliska@suse.cz>
36484 PR middle-end/107976
36485 * params.opt: Limit JT params.
36486 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
36488 2023-01-11 Richard Biener <rguenther@suse.de>
36490 PR tree-optimization/108352
36491 * tree-ssa-threadbackward.cc
36492 (back_threader_profitability::profitable_path_p): Adjust
36493 heuristic that allows non-multi-way branch threads creating
36495 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
36496 (--param fsm-scale-path-stmts): Adjust.
36497 * params.opt (--param=fsm-scale-path-blocks=): Remove.
36498 (-param=fsm-scale-path-stmts=): Adjust description.
36500 2023-01-11 Richard Biener <rguenther@suse.de>
36502 PR tree-optimization/108353
36503 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
36505 (add_ssa_edge): Simplify.
36506 (add_control_edge): Likewise.
36507 (ssa_prop_init): Likewise.
36508 (ssa_prop_fini): Likewise.
36509 (ssa_propagation_engine::ssa_propagate): Likewise.
36511 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
36513 * config/s390/s390.md (*not<mode>): New pattern.
36515 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36517 * config/xtensa/xtensa.cc (xtensa_insn_cost):
36518 Let insn cost for size be obtained by applying COSTS_N_INSNS()
36519 to instruction length and then dividing by 3.
36521 2023-01-10 Richard Biener <rguenther@suse.de>
36523 PR tree-optimization/106293
36524 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
36525 process degenerate PHI defs.
36527 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
36529 PR rtl-optimization/106421
36530 * cprop.cc (bypass_block): Check that DEST is local to this
36531 function (non-NULL) before calling find_edge.
36533 2023-01-10 Martin Jambor <mjambor@suse.cz>
36536 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
36537 sort_replacements, lookup_first_base_replacement and
36538 m_sorted_replacements_p.
36539 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
36540 (ipa_param_body_adjustments::register_replacement): Set
36541 m_sorted_replacements_p to false.
36542 (compare_param_body_replacement): New function.
36543 (ipa_param_body_adjustments::sort_replacements): Likewise.
36544 (ipa_param_body_adjustments::common_initialization): Call
36546 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
36547 m_sorted_replacements_p.
36548 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
36550 (ipa_param_body_adjustments::lookup_first_base_replacement): New
36552 (ipa_param_body_adjustments::modify_call_stmt): Use
36553 lookup_first_base_replacement.
36554 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
36555 adjustments->sort_replacements.
36557 2023-01-10 Richard Biener <rguenther@suse.de>
36559 PR tree-optimization/108314
36560 * tree-vect-stmts.cc (vectorizable_condition): Do not
36561 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
36563 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36565 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
36567 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36569 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
36571 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36573 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
36574 defines for soft float abi.
36576 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36578 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
36579 (smart_bclri): Likewise.
36580 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
36581 (fast_bclri): Likewise.
36582 (fast_cmpnesi_i): Likewise.
36583 (*fast_cmpltsi_i): Likewise.
36584 (*fast_cmpgeusi_i): Likewise.
36586 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36588 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
36589 flag_fp_int_builtin_inexact || !flag_trapping_math.
36590 (<frm_pattern><mode>2): Likewise.
36592 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
36594 * config/s390/s390.cc (s390_register_info): Check call_used_regs
36595 instead of hard-coding the register numbers for call saved
36597 (s390_optimize_register_info): Likewise.
36599 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
36601 * doc/gm2.texi (Overview): Fix @node markers.
36602 (Using): Likewise. Remove subsections that were moved to Overview
36603 from the menu and move others around.
36605 2023-01-09 Richard Biener <rguenther@suse.de>
36607 PR middle-end/108209
36608 * genmatch.cc (commutative_op): Fix return value for
36609 user-id with non-commutative first replacement.
36611 2023-01-09 Jakub Jelinek <jakub@redhat.com>
36614 * calls.cc (expand_call): For calls with
36615 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
36618 2023-01-09 Richard Biener <rguenther@suse.de>
36620 PR middle-end/69482
36621 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
36622 qualified accesses also force objects to memory.
36624 2023-01-09 Martin Liska <mliska@suse.cz>
36627 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
36628 NULL (deleleted value) to a hash_set.
36630 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36632 * config/xtensa/xtensa.md (*splice_bits):
36633 New insn_and_split pattern.
36635 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36637 * config/xtensa/xtensa.cc
36638 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
36639 New helper functions.
36640 (xtensa_set_return_address, xtensa_output_mi_thunk):
36641 Change to use the helper function.
36642 (xtensa_emit_adjust_stack_ptr): Ditto.
36643 And also change to try reusing the content of scratch register
36644 A9 if the register is not modified in the function body.
36646 2023-01-07 LIU Hao <lh_mouse@126.com>
36648 PR middle-end/108300
36649 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
36650 before <windows.h>.
36651 * diagnostic-color.cc: Likewise.
36652 * plugin.cc: Likewise.
36653 * prefix.cc: Likewise.
36655 2023-01-06 Joseph Myers <joseph@codesourcery.com>
36657 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
36658 for handling real integer types.
36660 2023-01-06 Tamar Christina <tamar.christina@arm.com>
36663 2022-12-12 Tamar Christina <tamar.christina@arm.com>
36665 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
36666 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
36667 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
36668 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
36669 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
36670 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
36671 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
36672 (aarch64_simd_dupv2hf): New.
36673 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
36675 * config/aarch64/iterators.md (VHSDF_P): New.
36676 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
36677 Vel, q, vp): Add V2HF.
36678 * config/arm/types.md (neon_fp_reduc_add_h): New.
36680 2023-01-06 Martin Liska <mliska@suse.cz>
36682 PR middle-end/107966
36683 * doc/options.texi: Fix Var documentation in internal manual.
36685 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
36688 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
36690 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
36691 RTL expansion to allow condition (mask) to be shared/reused,
36692 by avoiding overwriting pseudos and adding REG_EQUAL notes.
36694 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
36696 * common.opt: Add -static-libgm2.
36697 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
36698 * doc/gm2.texi: Document static-libgm2.
36699 * gcc.cc (driver_handle_option): Allow static-libgm2.
36701 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
36703 * common/config/i386/i386-common.cc (processor_alias_table):
36704 Use CPU_ZNVER4 for znver4.
36705 * config/i386/i386.md: Add znver4.md.
36706 * config/i386/znver4.md: New.
36708 2023-01-04 Jakub Jelinek <jakub@redhat.com>
36710 PR tree-optimization/108253
36711 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
36714 2023-01-04 Jakub Jelinek <jakub@redhat.com>
36716 PR middle-end/108237
36717 * generic-match-head.cc: Include tree-pass.h.
36718 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
36719 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
36720 resp. PROP_gimple_lvec property set.
36722 2023-01-04 Jakub Jelinek <jakub@redhat.com>
36724 PR sanitizer/108256
36725 * convert.cc (do_narrow): Punt for MULT_EXPR if original
36726 type doesn't wrap around and -fsanitize=signed-integer-overflow
36728 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
36730 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
36732 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
36733 * common/config/i386/i386-common.cc: Add Emeraldrapids.
36735 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
36737 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
36740 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
36742 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
36743 default constructor to initialize it.
36744 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
36745 for last and iterate to handle recursive calls. Delete leftover
36746 candidates at the end.
36747 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
36749 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
36750 gc_candidate bit when a clone is used.
36752 2023-01-03 Florian Weimer <fweimer@redhat.com>
36755 2023-01-02 Florian Weimer <fweimer@redhat.com>
36757 * dwarf2cfi.cc (init_return_column_size): Remove.
36758 (init_one_dwarf_reg_size): Adjust.
36759 (generate_dwarf_reg_sizes): New function. Extracted
36760 from expand_builtin_init_dwarf_reg_sizes.
36761 (expand_builtin_init_dwarf_reg_sizes): Call
36762 generate_dwarf_reg_sizes.
36763 * target.def (init_dwarf_reg_sizes_extra): Adjust
36765 * config/msp430/msp430.cc
36766 (msp430_init_dwarf_reg_sizes_extra): Adjust.
36767 * config/rs6000/rs6000.cc
36768 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
36769 * doc/tm.texi: Update.
36771 2023-01-03 Florian Weimer <fweimer@redhat.com>
36774 2023-01-02 Florian Weimer <fweimer@redhat.com>
36776 * debug.h (dwarf_reg_sizes_constant): Declare.
36777 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
36779 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
36781 PR tree-optimization/105043
36782 * doc/extend.texi (Object Size Checking): Split out into two
36783 subsections and mention _FORTIFY_SOURCE.
36785 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
36787 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
36788 RTL expansion to allow condition (mask) to be shared/reused,
36789 by avoiding overwriting pseudos and adding REG_EQUAL notes.
36791 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
36794 * config/i386/i386-features.cc
36795 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
36796 the gain/cost of converting a MEM operand.
36798 2023-01-03 Jakub Jelinek <jakub@redhat.com>
36800 PR middle-end/108264
36801 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
36802 from source which doesn't have scalar integral mode first convert
36805 2023-01-03 Jakub Jelinek <jakub@redhat.com>
36807 PR rtl-optimization/108263
36808 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
36811 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
36814 * config/i386/lujiazui.md (lujiazui_div): New automaton.
36815 (lua_div): New unit.
36816 (lua_idiv_qi): Correct unit in the reservation.
36817 (lua_idiv_qi_load): Ditto.
36818 (lua_idiv_hi): Ditto.
36819 (lua_idiv_hi_load): Ditto.
36820 (lua_idiv_si): Ditto.
36821 (lua_idiv_si_load): Ditto.
36822 (lua_idiv_di): Ditto.
36823 (lua_idiv_di_load): Ditto.
36824 (lua_fdiv_SF): Ditto.
36825 (lua_fdiv_SF_load): Ditto.
36826 (lua_fdiv_DF): Ditto.
36827 (lua_fdiv_DF_load): Ditto.
36828 (lua_fdiv_XF): Ditto.
36829 (lua_fdiv_XF_load): Ditto.
36830 (lua_ssediv_SF): Ditto.
36831 (lua_ssediv_load_SF): Ditto.
36832 (lua_ssediv_V4SF): Ditto.
36833 (lua_ssediv_load_V4SF): Ditto.
36834 (lua_ssediv_V8SF): Ditto.
36835 (lua_ssediv_load_V8SF): Ditto.
36836 (lua_ssediv_SD): Ditto.
36837 (lua_ssediv_load_SD): Ditto.
36838 (lua_ssediv_V2DF): Ditto.
36839 (lua_ssediv_load_V2DF): Ditto.
36840 (lua_ssediv_V4DF): Ditto.
36841 (lua_ssediv_load_V4DF): Ditto.
36843 2023-01-02 Florian Weimer <fweimer@redhat.com>
36845 * debug.h (dwarf_reg_sizes_constant): Declare.
36846 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
36848 2023-01-02 Florian Weimer <fweimer@redhat.com>
36850 * dwarf2cfi.cc (init_return_column_size): Remove.
36851 (init_one_dwarf_reg_size): Adjust.
36852 (generate_dwarf_reg_sizes): New function. Extracted
36853 from expand_builtin_init_dwarf_reg_sizes.
36854 (expand_builtin_init_dwarf_reg_sizes): Call
36855 generate_dwarf_reg_sizes.
36856 * target.def (init_dwarf_reg_sizes_extra): Adjust
36858 * config/msp430/msp430.cc
36859 (msp430_init_dwarf_reg_sizes_extra): Adjust.
36860 * config/rs6000/rs6000.cc
36861 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
36862 * doc/tm.texi: Update.
36864 2023-01-02 Jakub Jelinek <jakub@redhat.com>
36866 * gcc.cc (process_command): Update copyright notice dates.
36867 * gcov-dump.cc (print_version): Ditto.
36868 * gcov.cc (print_version): Ditto.
36869 * gcov-tool.cc (print_version): Ditto.
36870 * gengtype.cc (create_file): Ditto.
36871 * doc/cpp.texi: Bump @copying's copyright year.
36872 * doc/cppinternals.texi: Ditto.
36873 * doc/gcc.texi: Ditto.
36874 * doc/gccint.texi: Ditto.
36875 * doc/gcov.texi: Ditto.
36876 * doc/install.texi: Ditto.
36877 * doc/invoke.texi: Ditto.
36879 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
36880 Uroš Bizjak <ubizjak@gmail.com>
36882 * config/i386/i386.md (extendditi2): New define_insn.
36883 (define_split): Use DWIH mode iterator to treat new extendditi2
36884 identically to existing extendsidi2_1.
36885 (define_peephole2): Likewise.
36886 (define_peephole2): Likewise.
36887 (define_Split): Likewise.
36890 Copyright (C) 2023 Free Software Foundation, Inc.
36892 Copying and distribution of this file, with or without modification,
36893 are permitted in any medium without royalty provided the copyright
36894 notice and this notice are preserved.