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1 2021-02-20 Ilya Leoshkevich <iii@linux.ibm.com>
2
3 PR target/99134
4 * config/s390/vector.md (trunctf<DFP_ALL:mode>2_vr): New
5 pattern.
6 (trunctf<DFP_ALL:mode>2): Likewise.
7 (trunctdtf2_vr): Likewise.
8 (trunctdtf2): Likewise.
9 (extend<DFP_ALL:mode>tf2_vr): Likewise.
10 (extend<DFP_ALL:mode>tf2): Likewise.
11 (extendtftd2_vr): Likewise.
12 (extendtftd2): Likewise.
13
14 2021-02-20 Ilya Leoshkevich <iii@linux.ibm.com>
15
16 * config/s390/vector.md (*fprx2_to_tf): Rename to fprx2_to_tf,
17 add memory alternative.
18 (tf_to_fprx2): New pattern.
19
20 2021-02-19 Martin Sebor <msebor@redhat.com>
21
22 PR c/97172
23 * attribs.c (init_attr_rdwr_indices): Guard vblist use.
24 (attr_access::free_lang_data): Remove a spurious test.
25
26 2021-02-19 Nathan Sidwell <nathan@acm.org>
27
28 * doc/invoke.texi (flang-info-module-read): Document.
29
30 2021-02-19 Martin Liska <mliska@suse.cz>
31
32 PR translation/99167
33 * params.opt: Fix typo.
34
35 2021-02-19 Richard Biener <rguenther@suse.de>
36
37 PR middle-end/99122
38 * tree-inline.c (inline_forbidden_p): Do not inline functions
39 with VLA arguments or return value.
40
41 2021-02-19 Jakub Jelinek <jakub@redhat.com>
42
43 PR target/98998
44 * config/arm/arm.md (*stack_protect_combined_set_insn,
45 *stack_protect_combined_test_insn): If force_const_mem result
46 is not valid general operand, force its address into the destination
47 register first.
48
49 2021-02-19 Jakub Jelinek <jakub@redhat.com>
50
51 PR ipa/99034
52 * tree-cfg.c (gimple_merge_blocks): If bb a starts with eh landing
53 pad or non-local label, put FORCED_LABELs from bb b after that label
54 rather than before it.
55
56 2021-02-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
57
58 PR target/98657
59 * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3): Use
60 expand_vector_broadcast' to emit the vec_duplicate operand.
61
62 2021-02-18 Vladimir N. Makarov <vmakarov@redhat.com>
63
64 PR rtl-optimization/96264
65 * lra-remat.c (reg_overlap_for_remat_p): Check also output insn
66 hard regs.
67
68 2021-02-18 H.J. Lu <hjl.tools@gmail.com>
69
70 PR target/99113
71 * varasm.c (get_section): Replace SUPPORTS_SHF_GNU_RETAIN with
72 looking up the retain attribute.
73 (resolve_unique_section): Likewise.
74 (get_variable_section): Likewise.
75 (switch_to_section): Likewise. Warn when a symbol without the
76 retain attribute and a symbol with the retain attribute are
77 placed in the section with the same name, instead of the used
78 attribute.
79 * doc/extend.texi: Document the "retain" attribute.
80
81 2021-02-18 Nathan Sidwell <nathan@acm.org>
82
83 PR c++/99023
84 * doc/invoke.texi (flang-info-include-translate): Document header
85 lookup behaviour.
86
87 2021-02-18 Richard Biener <rguenther@suse.de>
88
89 PR middle-end/99122
90 * ipa-fnsummary.c (analyze_function_body): Set
91 CIF_FUNCTION_NOT_INLINABLE for VLA parameter calls.
92 * tree-inline.c (insert_init_debug_bind): Pass NULL for
93 error_mark_node values.
94 (force_value_to_type): Do not build V_C_Es for WITH_SIZE_EXPR
95 values.
96 (setup_one_parameter): Delay force_value_to_type until when
97 it's needed.
98
99 2021-02-18 Hans-Peter Nilsson <hp@axis.com>
100
101 PR tree-optimization/99142
102 * match.pd (clz cmp 0): Gate replacement on single_use of clz result.
103
104 2021-02-18 Jakub Jelinek <jakub@redhat.com>
105
106 * wide-int-bitmask.h (wide_int_bitmask::wide_int_bitmask (),
107 wide_int_bitmask::wide_int_bitmask (uint64_t),
108 wide_int_bitmask::wide_int_bitmask (uint64_t, uint64_t),
109 wide_int_bitmask::operator ~ () const,
110 wide_int_bitmask::operator | (wide_int_bitmask) const,
111 wide_int_bitmask::operator & (wide_int_bitmask) const): Use constexpr
112 instead of inline.
113 * config/i386/i386.h (PTA_3DNOW, PTA_3DNOW_A, PTA_64BIT, PTA_ABM,
114 PTA_AES, PTA_AVX, PTA_BMI, PTA_CX16, PTA_F16C, PTA_FMA, PTA_FMA4,
115 PTA_FSGSBASE, PTA_LWP, PTA_LZCNT, PTA_MMX, PTA_MOVBE, PTA_NO_SAHF,
116 PTA_PCLMUL, PTA_POPCNT, PTA_PREFETCH_SSE, PTA_RDRND, PTA_SSE, PTA_SSE2,
117 PTA_SSE3, PTA_SSE4_1, PTA_SSE4_2, PTA_SSE4A, PTA_SSSE3, PTA_TBM,
118 PTA_XOP, PTA_AVX2, PTA_BMI2, PTA_RTM, PTA_HLE, PTA_PRFCHW, PTA_RDSEED,
119 PTA_ADX, PTA_FXSR, PTA_XSAVE, PTA_XSAVEOPT, PTA_AVX512F, PTA_AVX512ER,
120 PTA_AVX512PF, PTA_AVX512CD, PTA_NO_TUNE, PTA_SHA, PTA_PREFETCHWT1,
121 PTA_CLFLUSHOPT, PTA_XSAVEC, PTA_XSAVES, PTA_AVX512DQ, PTA_AVX512BW,
122 PTA_AVX512VL, PTA_AVX512IFMA, PTA_AVX512VBMI, PTA_CLWB, PTA_MWAITX,
123 PTA_CLZERO, PTA_NO_80387, PTA_PKU, PTA_AVX5124VNNIW, PTA_AVX5124FMAPS,
124 PTA_AVX512VPOPCNTDQ, PTA_SGX, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES,
125 PTA_AVX512VBMI2, PTA_VPCLMULQDQ, PTA_AVX512BITALG, PTA_RDPID,
126 PTA_PCONFIG, PTA_WBNOINVD, PTA_AVX512VP2INTERSECT, PTA_PTWRITE,
127 PTA_AVX512BF16, PTA_WAITPKG, PTA_MOVDIRI, PTA_MOVDIR64B, PTA_ENQCMD,
128 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK, PTA_AMX_TILE, PTA_AMX_INT8,
129 PTA_AMX_BF16, PTA_UINTR, PTA_HRESET, PTA_KL, PTA_WIDEKL, PTA_AVXVNNI,
130 PTA_X86_64_BASELINE, PTA_X86_64_V2, PTA_X86_64_V3, PTA_X86_64_V4,
131 PTA_CORE2, PTA_NEHALEM, PTA_WESTMERE, PTA_SANDYBRIDGE, PTA_IVYBRIDGE,
132 PTA_HASWELL, PTA_BROADWELL, PTA_SKYLAKE, PTA_SKYLAKE_AVX512,
133 PTA_CASCADELAKE, PTA_COOPERLAKE, PTA_CANNONLAKE, PTA_ICELAKE_CLIENT,
134 PTA_ICELAKE_SERVER, PTA_TIGERLAKE, PTA_SAPPHIRERAPIDS, PTA_ALDERLAKE,
135 PTA_KNL, PTA_BONNELL, PTA_SILVERMONT, PTA_GOLDMONT, PTA_GOLDMONT_PLUS,
136 PTA_TREMONT, PTA_KNM): Use constexpr instead of const.
137
138 2021-02-18 Jakub Jelinek <jakub@redhat.com>
139
140 PR middle-end/99109
141 * gimple-array-bounds.cc (build_zero_elt_array_type): Rename to ...
142 (build_printable_array_type): ... this. Add nelts argument. For
143 overaligned eltype, use TYPE_MAIN_VARIANT (eltype) instead. If
144 nelts, call build_array_type_nelts.
145 (array_bounds_checker::check_mem_ref): Use build_printable_array_type
146 instead of build_zero_elt_array_type and build_array_type_nelts.
147
148 2021-02-18 Jakub Jelinek <jakub@redhat.com>
149
150 PR target/99104
151 * config/i386/i386.c (distance_non_agu_define): Don't call
152 extract_insn_cached here.
153 (ix86_lea_outperforms): Save and restore recog_data around call
154 to distance_non_agu_define and distance_agu_use.
155 (ix86_ok_to_clobber_flags): Remove.
156 (ix86_avoid_lea_for_add): Don't call ix86_ok_to_clobber_flags.
157 (ix86_avoid_lea_for_addr): Likewise. Adjust function comment.
158 * config/i386/i386.md (*lea<mode>): Change from define_insn_and_split
159 into define_insn. Move the splitting to define_peephole2 and
160 check there using peep2_regno_dead_p if FLAGS_REG is dead.
161
162 2021-02-17 Julian Brown <julian@codesourcery.com>
163
164 * gimplify.c (gimplify_scan_omp_clauses): Handle ATTACH_DETACH
165 for non-decls.
166
167 2021-02-17 Xi Ruoyao <xry111@mengyan1223.wang>
168
169 PR target/98491
170 * config/mips/mips.c (mips_symbol_insns): Do not use
171 MSA_SUPPORTED_MODE_P if mode is MAX_MACHINE_MODE.
172
173 2021-02-16 Vladimir N. Makarov <vmakarov@redhat.com>
174
175 PR inline-asm/98096
176 * stmt.c (resolve_operand_name_1): Take inout operands into account
177 for access to labels by names.
178 * doc/extend.texi: Describe counting operands for accessing labels.
179
180 2021-02-16 Richard Biener <rguenther@suse.de>
181
182 PR tree-optimization/38474
183 * tree-ssa-structalias.c (variable_info::address_taken): New.
184 (new_var_info): Initialize address_taken.
185 (process_constraint): Set address_taken.
186 (solve_constraints): Use the new address_taken flag rather
187 than is_reg_var for sorting variables.
188 (dump_constraint): Dump the variable number if the name
189 is just NULL.
190
191 2021-02-16 Jakub Jelinek <jakub@redhat.com>
192
193 PR target/99100
194 * tree-vect-stmts.c (vectorizable_simd_clone_call): For num_calls != 1
195 multiply by 4096 and for inbranch by 8192.
196 * config/i386/i386.c (ix86_simd_clone_usable): For TARGET_AVX512F,
197 return 3, 2 or 1 for mangle letters 'b', 'c' or 'd'.
198
199 2021-02-15 Maya Rashish <coypu@sdf.org>
200
201 * config/aarch64/aarch64.c (aarch64_init_builtins):
202 Call SUBTARGET_INIT_BUILTINS.
203
204 2021-02-15 Peter Bergner <bergner@linux.ibm.com>
205
206 PR rtl-optimization/98872
207 * init-regs.c (initialize_uninitialized_regs): Skip initialization
208 if CONST0_RTX is NULL.
209
210 2021-02-15 Richard Sandiford <richard.sandiford@arm.com>
211
212 PR rtl-optimization/98863
213 * rtl-ssa/functions.h (function_info::bb_live_out_info): Delete.
214 (function_info::build_info): Turn into a declaration, moving the
215 definition to internals.h.
216 (function_info::bb_walker): Declare.
217 (function_info::create_reg_use): Likewise.
218 (function_info::calculate_potential_phi_regs): Take a build_info
219 parameter.
220 (function_info::place_phis, function_info::create_ebbs): Declare.
221 (function_info::calculate_ebb_live_in_for_debug): Likewise.
222 (function_info::populate_backedge_phis): Delete.
223 (function_info::start_block, function_info::end_block): Declare.
224 (function_info::populate_phi_inputs): Delete.
225 (function_info::m_potential_phi_regs): Move information to build_info.
226 * rtl-ssa/internals.h: New file.
227 (function_info::bb_phi_info): New class.
228 (function_info::build_info): Moved from functions.h.
229 Add a constructor and destructor.
230 (function_info::build_info::ebb_use): Delete.
231 (function_info::build_info::ebb_def): Likewise.
232 (function_info::build_info::bb_live_out): Likewise.
233 (function_info::build_info::tmp_ebb_live_in_for_debug): New variable.
234 (function_info::build_info::potential_phi_regs): Likewise.
235 (function_info::build_info::potential_phi_regs_for_debug): Likewise.
236 (function_info::build_info::ebb_def_regs): Likewise.
237 (function_info::build_info::bb_phis): Likewise.
238 (function_info::build_info::bb_mem_live_out): Likewise.
239 (function_info::build_info::bb_to_rpo): Likewise.
240 (function_info::build_info::def_stack): Likewise.
241 (function_info::build_info::old_def_stack_limit): Likewise.
242 * rtl-ssa/internals.inl (function_info::build_info::record_reg_def):
243 Remove the regno argument. Push the previous definition onto the
244 definition stack where necessary.
245 * rtl-ssa/accesses.cc: Include internals.h.
246 * rtl-ssa/changes.cc: Likewise.
247 * rtl-ssa/blocks.cc: Likewise.
248 (function_info::build_info::build_info): Define.
249 (function_info::build_info::~build_info): Likewise.
250 (function_info::bb_walker): New class.
251 (function_info::bb_walker::bb_walker): Define.
252 (function_info::add_live_out_use): Convert a logarithmic-complexity
253 test into a linear one. Allow the same definition to be passed
254 multiple times.
255 (function_info::calculate_potential_phi_regs): Moved from
256 functions.cc. Take a build_info parameter and store the
257 information there instead.
258 (function_info::place_phis): New function.
259 (function_info::add_entry_block_defs): Update call to record_reg_def.
260 (function_info::calculate_ebb_live_in_for_debug): New function.
261 (function_info::add_phi_nodes): Use bb_phis to decide which
262 registers need phi nodes and initialize ebb_def_regs accordingly.
263 Do not add degenerate phis here.
264 (function_info::add_artificial_accesses): Use create_reg_use.
265 Assert that all definitions are listed in the DF LR sets.
266 Update call to record_reg_def.
267 (function_info::record_block_live_out): Record live-out register
268 values in the phis of successor blocks. Use the live-out set
269 when processing the last block in an EBB, instead of always
270 using the live-in sets of successor blocks. AND the live sets
271 with the set of registers that have been defined in the EBB,
272 rather than with all potential phi registers. Cope correctly
273 with branches back to the start of the current EBB.
274 (function_info::start_block): New function.
275 (function_info::end_block): Likewise.
276 (function_info::populate_phi_inputs): Likewise.
277 (function_info::create_ebbs): Likewise.
278 (function_info::process_all_blocks): Rewrite into a multi-phase
279 process.
280 * rtl-ssa/functions.cc: Include internals.h.
281 (function_info::calculate_potential_phi_regs): Move to blocks.cc.
282 (function_info::init_function_data): Remove caller.
283 * rtl-ssa/insns.cc: Include internals.h
284 (function_info::create_reg_use): New function. Lazily any
285 degenerate phis needed by the linear RPO view.
286 (function_info::record_use): Use create_reg_use. When processing
287 debug uses, use potential_phi_regs and test it before checking
288 whether the register is live on entry to the current EBB. Lazily
289 calculate ebb_live_in_for_debug.
290 (function_info::record_call_clobbers): Update call to record_reg_def.
291 (function_info::record_def): Likewise.
292
293 2021-02-15 Martin Liska <mliska@suse.cz>
294
295 * toplev.c (init_asm_output): Free output of
296 gen_command_line_string function.
297 (process_options): Likewise.
298
299 2021-02-15 Martin Liska <mliska@suse.cz>
300
301 * params.opt: Add 2 missing Param keywords.
302
303 2021-02-15 Eric Botcazou <ebotcazou@adacore.com>
304
305 * df-core.c (df_worklist_dataflow_doublequeue): Use proper cast.
306
307 2021-02-15 Jakub Jelinek <jakub@redhat.com>
308
309 PR tree-optimization/99079
310 * match.pd (A % (pow2pcst << N) -> A & ((pow2pcst << N) - 1)): Remove
311 useless tree_nop_conversion_p (type, TREE_TYPE (@3)) check. Instead
312 require both type and TREE_TYPE (@1) to be integral types and either
313 type having smaller or equal precision, or TREE_TYPE (@1) being
314 unsigned type, or type being signed type. If TREE_TYPE (@1)
315 doesn't have wrapping overflow, perform the subtraction of one in
316 unsigned type.
317
318 2021-02-14 Jan Hubicka <hubicka@ucw.cz>
319 Richard Biener <rguether@suse.de>
320
321 PR ipa/97346
322 * ipa-reference.c (ipa_init): Only conditinally initialize
323 reference_vars_to_consider.
324 (propagate): Conditionally deninitialize reference_vars_to_consider.
325 (ipa_reference_write_optimization_summary): Sanity check that
326 reference_vars_to_consider is not allocated.
327
328 2021-02-13 Levy Hsu <admin@levyhsu.com>
329
330 PR target/97417
331 * config/riscv/riscv-shorten-memrefs.c (pass_shorten_memrefs): Add
332 extend parameter to get_si_mem_base_reg declaration.
333 (get_si_mem_base_reg): Add extend parameter. Set it.
334 (analyze): Pass extend arg to get_si_mem_base_reg.
335 (transform): Likewise. Use it when rewriting mems.
336 * config/riscv/riscv.c (riscv_legitimize_move): Check for subword
337 loads and emit sign/zero extending load followed by subreg move.
338
339 2021-02-13 Jim Wilson <jimw@sifive.com>
340
341 PR target/97417
342 * config/riscv/riscv.c (riscv_compressed_lw_address_p): Drop early
343 exit when !reload_completed. Only perform check for compressed reg
344 if reload_completed.
345 (riscv_rtx_costs): In MEM case, when optimizing for size and
346 shorten memrefs, if not compressible, then increase cost.
347
348 2021-02-13 Jakub Jelinek <jakub@redhat.com>
349
350 PR rtl-optimization/98439
351 * recog.c (pass_split_before_regstack::gate): Enable even when
352 pass_split_before_sched2 is enabled if -fselective-scheduling2 is
353 on.
354
355 2021-02-13 Jakub Jelinek <jakub@redhat.com>
356
357 PR target/96166
358 * config/i386/mmx.md (*mmx_pshufd_1): Add a combine splitter for
359 swap of V2SImode elements in memory into DImode memory rotate by 32.
360
361 2021-02-12 Martin Sebor <msebor@redhat.com>
362
363 * tree-pretty-print.c (print_generic_expr_to_str): Update comment.
364
365 2021-02-12 Richard Sandiford <richard.sandiford@arm.com>
366
367 * rtl-ssa/accesses.cc (function_info::make_use_available): Use
368 m_temp_obstack rather than m_obstack to allocate the temporary use.
369
370 2021-02-12 Richard Sandiford <richard.sandiford@arm.com>
371
372 * df-problems.c (df_lr_bb_local_compute): Treat partial definitions
373 as read-modify operations.
374
375 2021-02-12 Richard Biener <rguenther@suse.de>
376
377 PR middle-end/38474
378 * ipa-fnsummary.c (unmodified_parm_1): Only walk when
379 fbi->aa_walk_budget is bigger than zero. Update
380 fbi->aa_walk_budget.
381 (param_change_prob): Likewise.
382 * ipa-prop.c (detect_type_change_from_memory_writes):
383 Properly account walk_aliased_vdefs.
384 (parm_preserved_before_stmt_p): Canonicalize updates.
385 (parm_ref_data_preserved_p): Likewise.
386 (parm_ref_data_pass_through_p): Likewise.
387 (determine_known_aggregate_parts): Account own alias queries.
388
389 2021-02-12 Martin Liska <mliska@suse.cz>
390
391 * opts-common.c (decode_cmdline_option): Release werror_arg.
392 * opts.c (gen_producer_string): Release output of
393 gen_command_line_string.
394
395 2021-02-12 Richard Biener <rguenther@suse.de>
396
397 PR tree-optimization/38474
398 * params.opt (-param=max-store-chains-to-track=): New param.
399 (-param=max-stores-to-track=): Likewise.
400 * doc/invoke.texi (max-store-chains-to-track): Document.
401 (max-stores-to-track): Likewise.
402 * gimple-ssa-store-merging.c (pass_store_merging::m_n_chains):
403 New.
404 (pass_store_merging::m_n_stores): Likewise.
405 (pass_store_merging::terminate_and_process_chain): Update
406 m_n_stores and m_n_chains.
407 (pass_store_merging::process_store): Likewise. Terminate
408 oldest chains if the number of stores or chains get too large.
409 (imm_store_chain_info::terminate_and_process_chain): Dump
410 chain length.
411
412 2021-02-11 Eric Botcazou <ebotcazou@adacore.com>
413
414 * config/i386/winnt.c (i386_pe_seh_unwind_emit): When switching to
415 the cold section, emit a nop before the directive if the previous
416 active instruction can throw.
417
418 2021-02-11 Peter Bergner <bergner@linux.ibm.com>
419
420 PR target/99041
421 * config/rs6000/predicates.md (mma_assemble_input_operand): Restrict
422 memory addresses that are legal for quad word accesses.
423
424 2021-02-11 Andrea Corallo <andrea.corallo@arm.com>
425
426 PR target/98931
427 * config/arm/thumb2.md (*doloop_end_internal): Generate
428 alternative sequence to handle long range branches.
429
430 2021-02-11 Joel Hutton <joel.hutton@arm.com>
431
432 PR tree-optimization/98772
433 * optabs-tree.c (supportable_half_widening_operation): New function
434 to check for supportable V8QI->V8HI widening patterns.
435 * optabs-tree.h (supportable_half_widening_operation): New function.
436 * tree-vect-stmts.c (vect_create_half_widening_stmts): New function
437 to create promotion stmts for V8QI->V8HI widening patterns.
438 (vectorizable_conversion): Add case for V8QI->V8HI.
439
440 2021-02-11 Richard Biener <rguenther@suse.de>
441
442 * sparseset.h (SPARSESET_ELT_BITS): Remove.
443 (SPARSESET_ELT_TYPE): Use unsigned int.
444 * fwprop.c: Do not include sparseset.h.
445
446 2021-02-10 Jakub Jelinek <jakub@redhat.com>
447
448 PR c++/99035
449 * varasm.c (declare_weak): For -fsyntax-only, allow even
450 TREE_ASM_WRITTEN function decls.
451
452 2021-02-10 Jakub Jelinek <jakub@redhat.com>
453
454 PR target/99025
455 * config/i386/sse.md (fix<fixunssuffix>_truncv2sfv2di2,
456 <insn>v8qiv8hi2, <insn>v8qiv8si2, <insn>v4qiv4si2, <insn>v4hiv4si2,
457 <insn>v8qiv8di2, <insn>v4qiv4di2, <insn>v2qiv2di2, <insn>v4hiv4di2,
458 <insn>v2hiv2di2, <insn>v2siv2di2): Force operands[1] into REG before
459 calling simplify_gen_subreg on it.
460
461 2021-02-10 Martin Liska <mliska@suse.cz>
462
463 * config/nvptx/nvptx.c (nvptx_option_override): Use
464 flag_patchable_function_entry instead of the removed
465 function_entry_patch_area_size.
466
467 2021-02-10 Martin Liska <mliska@suse.cz>
468
469 PR tree-optimization/99002
470 PR tree-optimization/99026
471 * gimple-if-to-switch.cc (if_chain::is_beneficial): Fix memory
472 leak when adjacent cases are merged.
473 * tree-switch-conversion.c (switch_decision_tree::analyze_switch_statement): Use
474 release_clusters.
475 (make_pass_lower_switch): Remove trailing whitespace.
476 * tree-switch-conversion.h (release_clusters): New.
477
478 2021-02-10 Richard Biener <rguenther@suse.de>
479
480 PR rtl-optimization/99054
481 * cfgrtl.c (rtl-optimization/99054): Return an auto_vec.
482 (fixup_partitions): Adjust.
483 (rtl_verify_edges): Likewise.
484
485 2021-02-10 Jakub Jelinek <jakub@redhat.com>
486
487 PR middle-end/99007
488 * gimplify.c (gimplify_scan_omp_clauses): For MEM_REF on reductions,
489 temporarily disable gimplify_ctxp->into_ssa around gimplify_expr
490 calls.
491
492 2021-02-10 Richard Biener <rguenther@suse.de>
493
494 PR ipa/99029
495 * ipa-pure-const.c (propagate_malloc): Use an auto_vec<>
496 for callees.
497
498 2021-02-10 Richard Biener <rguenther@suse.de>
499
500 PR tree-optimization/99024
501 * tree-vect-loop.c (_loop_vec_info::~_loop_vec_info): Only
502 clear loop->aux if it is associated with the destroyed loop_vinfo.
503
504 2021-02-10 Martin Liska <mliska@suse.cz>
505
506 PR tree-optimization/99002
507 * gimple-if-to-switch.cc (find_conditions): Fix memory leak
508 in the function.
509
510 2021-02-10 Martin Liska <mliska@suse.cz>
511
512 PR ipa/99003
513 * ipa-icf.c (sem_item::add_reference): Fix memory leak when
514 a reference exists.
515
516 2021-02-10 Jakub Jelinek <jakub@redhat.com>
517
518 PR debug/98755
519 * dwarf2out.c (prune_unused_types_walk): Mark DW_TAG_variable DIEs
520 at class scope for DWARF5+.
521
522 2021-02-09 Eric Botcazou <ebotcazou@adacore.com>
523
524 PR rtl-optimization/96015
525 * reorg.c (skip_consecutive_labels): Minor comment tweaks.
526 (relax_delay_slots): When deleting a jump to the next active
527 instruction over a barrier, first delete the barrier if the
528 jump is the only way to reach the target label.
529
530 2021-02-09 Andre Vieira <andre.simoesdiasvieira@arm.com>
531
532 * config/aarch64/aarch64-cost-tables.h: Add entries for vect.mul.
533 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Use vect.mul for
534 vector multiplies and vect.alu for SSRA.
535 * config/arm/aarch-common-protos.h (struct vector_cost_table): Define
536 vect.mul cost field.
537 * config/arm/aarch-cost-tables.h: Add entries for vect.mul.
538 * config/arm/arm.c: Likewise.
539
540 2021-02-09 Richard Biener <rguenther@suse.de>
541
542 PR tree-optimization/98863
543 * tree-ssa-sccvn.h (vn_avail::next_undo): Add.
544 * tree-ssa-sccvn.c (last_pushed_avail): New global.
545 (rpo_elim::eliminate_push_avail): Chain pushed avails.
546 (unwind_state::avail_top): Add.
547 (do_unwind): Rewrite unwinding of avail entries.
548 (do_rpo_vn): Initialize last_pushed_avail and
549 avail_top of the undo state.
550
551 2021-02-09 Jakub Jelinek <jakub@redhat.com>
552
553 PR middle-end/99004
554 * calls.c (maybe_warn_rdwr_sizes): Change s0 and s1 type from
555 const char * to char * and free those pointers after use.
556
557 2021-02-09 Richard Biener <rguenther@suse.de>
558
559 PR tree-optimization/99017
560 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Allow
561 zero vector cost entries.
562
563 2021-02-08 Andre Vieira <andre.simoesdiasvieira@arm.com>
564
565 PR middle-end/98974
566 * tree-vect-stmts.c (vectorizable_condition): Remove shadow vec_num
567 parameter in vectorizable_condition.
568
569 2021-02-08 Richard Biener <rguenther@suse.de>
570
571 PR lto/96591
572 * tree.c (walk_tree_1): Walk VECTOR_CST elements.
573
574 2021-02-08 Martin Liska <mliska@suse.cz>
575
576 PR lto/98971
577 * cfgexpand.c (pass_expand::execute): Parse per-function option
578 flag_patchable_function_entry and use it.
579 * common.opt: Remove function_entry_patch_area_size and
580 function_entry_patch_area_start global variables.
581 * opts.c (parse_and_check_patch_area): New function.
582 (common_handle_option): Use it.
583 * opts.h (parse_and_check_patch_area): New function.
584 * toplev.c (process_options): Parse and use
585 function_entry_patch_area_size.
586
587 2021-02-08 Martin Sebor <msebor@redhat.com>
588
589 * doc/extend.texi (attribute malloc): Correct typos.
590
591 2021-02-05 Nathan Sidwell <nathan@acm.org>
592
593 PR driver/98943
594 * gcc.c (driver::maybe_run_linker): Check for input file
595 accessibility if not linking.
596
597 2021-02-05 Richard Biener <rguenther@suse.de>
598
599 PR tree-optimization/98855
600 * tree-vectorizer.h (add_stmt_cost): New overload.
601 * tree-vect-slp.c (li_cost_vec_cmp): New.
602 (vect_bb_slp_scalar_cost): Cost individual loop regions
603 separately. Account for the scalar instance root stmt.
604
605 2021-02-05 Tom de Vries <tdevries@suse.de>
606
607 PR debug/98656
608 * tree-switch-conversion.c (jump_table_cluster::emit): Add loc
609 argument.
610 (bit_test_cluster::emit): Reuse location_t for newly created
611 gswitch statement.
612 (switch_decision_tree::try_switch_expansion): Preserve
613 location_t.
614 * tree-switch-conversion.h: Change function signatures.
615
616 2021-02-05 Jakub Jelinek <jakub@redhat.com>
617
618 PR target/98957
619 * config/i386/i386-options.c (m_NONE, m_ALL): Define.
620 * config/i386/x86-tune.def (X86_TUNE_BRANCH_PREDICTION_HINTS,
621 X86_TUNE_PROMOTE_QI_REGS): Use m_NONE instead of 0U.
622 (X86_TUNE_QIMODE_MATH): Use m_ALL instead of ~0U.
623
624 2021-02-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
625
626 * config/aarch64/aarch64-simd-builtins.def (get_high): Define builtin.
627 * config/aarch64/aarch64-simd.md (aarch64_get_high<mode>): Define.
628 * config/aarch64/arm_neon.h (__GET_HIGH): Delete.
629 (vget_high_f16): Reimplement using new builtin.
630 (vget_high_f32): Likewise.
631 (vget_high_f64): Likewise.
632 (vget_high_p8): Likewise.
633 (vget_high_p16): Likewise.
634 (vget_high_p64): Likewise.
635 (vget_high_s8): Likewise.
636 (vget_high_s16): Likewise.
637 (vget_high_s32): Likewise.
638 (vget_high_s64): Likewise.
639 (vget_high_u8): Likewise.
640 (vget_high_u16): Likewise.
641 (vget_high_u32): Likewise.
642 (vget_high_u64): Likewise.
643
644 2021-02-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
645
646 * config/aarch64/aarch64-simd-builtins.def (get_low): Define builtin.
647 * config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Define.
648 * config/aarch64/arm_neon.h (__GET_LOW): Delete.
649 (vget_low_f16): Reimplement using new builtin.
650 (vget_low_f32): Likewise.
651 (vget_low_f64): Likewise.
652 (vget_low_p8): Likewise.
653 (vget_low_p16): Likewise.
654 (vget_low_p64): Likewise.
655 (vget_low_s8): Likewise.
656 (vget_low_s16): Likewise.
657 (vget_low_s32): Likewise.
658 (vget_low_s64): Likewise.
659 (vget_low_u8): Likewise.
660 (vget_low_u16): Likewise.
661 (vget_low_u32): Likewise.
662 (vget_low_u64): Likewise.
663
664 2021-02-05 Kito Cheng <kito.cheng@sifive.com>
665
666 * gcc.c (print_multilib_info): Check all required argument is provided
667 by default arg.
668
669 2021-02-05 liuhongt <hongtao.liu@intel.com>
670
671 PR target/98537
672 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Don't
673 generate integer mask comparison for 128/256-bits vector when
674 op_true/op_false is NULL_RTX or CONSTM1_RTX/CONST0_RTX. Also
675 delete redundant !maskcmp condition.
676 (ix86_expand_int_vec_cmp): Ditto but no redundant deletion
677 here.
678 (ix86_expand_sse_movcc): Delete definition of maskcmp, add the
679 condition directly to if (maskcmp), add extra check for
680 cmpmode, it should be MODE_INT.
681 (ix86_expand_fp_vec_cmp): Pass NULL to ix86_expand_sse_cmp's
682 parameters op_true/op_false.
683 (ix86_use_mask_cmp_p): New.
684
685 2021-02-05 liuhongt <hongtao.liu@intel.com>
686
687 PR target/98172
688 * config/i386/x86-tune.def (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL):
689 Remove m_GENERIC from ~list.
690 (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): Ditto.
691
692 2021-02-04 David Malcolm <dmalcolm@redhat.com>
693
694 PR c/97932
695 * diagnostic-show-locus.c (compatible_locations_p): Require
696 locations in the same macro map to be either both from the
697 macro definition, or both from the macro arguments.
698
699 2021-02-04 Jonathan Wright <jonathan.wright@arm.com>
700
701 * config/aarch64/aarch64-simd-builtins.def: Add
702 [su]mull_hi_lane[q] builtin generator macros.
703 * config/aarch64/aarch64-simd.md
704 (aarch64_<su>mull_hi_lane<mode>_insn): Define.
705 (aarch64_<su>mull_hi_lane<mode>): Define.
706 (aarch64_<su>mull_hi_laneq<mode>_insn): Define.
707 (aarch64_<su>mull_hi_laneq<mode>): Define.
708 * config/aarch64/arm_neon.h (vmull_high_lane_s16): Use RTL
709 builtin instead of inline asm.
710 (vmull_high_lane_s32): Likewise.
711 (vmull_high_lane_u16): Likewise.
712 (vmull_high_lane_u32): Likewise.
713 (vmull_high_laneq_s16): Likewise.
714 (vmull_high_laneq_s32): Likewise.
715 (vmull_high_laneq_u16): Likewise.
716 (vmull_high_laneq_u32): Liekwise.
717
718 2021-02-04 Jonathan Wright <jonathan.wright@arm.com>
719
720 * config/aarch64/aarch64-simd-builtins.def: Add [su]mull_hi_n
721 builtin generator macros.
722 * config/aarch64/aarch64-simd.md
723 (aarch64_<su>mull_hi_n<mode>_insn): Define.
724 (aarch64_<su>mull_hi_n<mode>): Define.
725 * config/aarch64/arm_neon.h (vmull_high_n_s16): Use RTL builtin
726 instead of inline asm.
727 (vmull_high_n_s32): Likewise.
728 (vmull_high_n_u16): Likewise.
729 (vmull_high_n_u32): Likewise.
730
731 2021-02-04 Richard Biener <rguenther@suse.de>
732
733 PR tree-optimization/98855
734 * tree-vect-loop.c (vectorizable_phi): Do not cost
735 single-argument PHIs.
736 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Likewise.
737 * tree-vect-stmts.c (vectorizable_bswap): Also perform
738 costing for SLP operation.
739
740 2021-02-04 Martin Liska <mliska@suse.cz>
741
742 * doc/extend.texi: Mention -mprefer-vector-width in target
743 attributes.
744
745 2021-02-03 Martin Sebor <msebor@redhat.com>
746
747 PR tree-optimization/98937
748 * tree-ssa-strlen.c (strlen_dom_walker::~strlen_dom_walker): Define.
749 Flush pointer_query cache.
750
751 2021-02-03 Aaron Sawdey <acsawdey@linux.ibm.com>
752
753 * config/rs6000/genfusion.pl (gen_2logical): Add missing
754 fixes based on patch review.
755 * config/rs6000/fusion.md: Regenerate file.
756
757 2021-02-03 Aaron Sawdey <acsawdey@linux.ibm.com>
758
759 * config/rs6000/t-rs6000: Comment out auto generation of
760 fusion.md for now.
761
762 2021-02-03 Andrew Stubbs <ams@codesourcery.com>
763
764 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX908.
765 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Add gfx908.
766 (output_file_start): Add gfx908.
767 * config/gcn/gcn.opt (gpu_type): Add gfx908.
768 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add march=gfx908.
769 (MULTILIB_DIRNAMES): Add gfx908.
770 * config/gcn/mkoffload.c (EF_AMDGPU_MACH_AMDGCN_GFX908): New define.
771 (main): Recognize gfx908.
772 * config/gcn/t-omp-device: Add gfx908.
773
774 2021-02-03 Jonathan Wright <jonathan.wright@arm.com>
775
776 * config/aarch64/aarch64-simd-builtins.def: Add
777 [su]mlsl_hi_lane[q] builtin macro generators.
778 * config/aarch64/aarch64-simd.md
779 (aarch64_<su>mlsl_hi_lane<mode>_insn): Define.
780 (aarch64_<su>mlsl_hi_lane<mode>): Define.
781 (aarch64_<su>mlsl_hi_laneq<mode>_insn): Define.
782 (aarch64_<su>mlsl_hi_laneq<mode>): Define.
783 * config/aarch64/arm_neon.h (vmlsl_high_lane_s16): Use RTL
784 builtin instead of inline asm.
785 (vmlsl_high_lane_s32): Likewise.
786 (vmlsl_high_lane_u16): Likewise.
787 (vmlsl_high_lane_u32): Likewise.
788 (vmlsl_high_laneq_s16): Likewise.
789 (vmlsl_high_laneq_s32): Likewise.
790 (vmlsl_high_laneq_u16): Likewise.
791 (vmlsl_high_laneq_u32): Likewise.
792 (vmlal_high_laneq_u32): Likewise.
793
794 2021-02-03 Jonathan Wright <jonathan.wright@arm.com>
795
796 * config/aarch64/aarch64-simd-builtins.def: Add
797 [su]mlal_hi_lane[q] builtin generator macros.
798 * config/aarch64/aarch64-simd.md
799 (aarch64_<su>mlal_hi_lane<mode>_insn): Define.
800 (aarch64_<su>mlal_hi_lane<mode>): Define.
801 (aarch64_<su>mlal_hi_laneq<mode>_insn): Define.
802 (aarch64_<su>mlal_hi_laneq<mode>): Define.
803 * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Use RTL
804 builtin instead of inline asm.
805 (vmlal_high_lane_s32): Likewise.
806 (vmlal_high_lane_u16): Likewise.
807 (vmlal_high_lane_u32): Likewise.
808 (vmlal_high_laneq_s16): Likewise.
809 (vmlal_high_laneq_s32): Likewise.
810 (vmlal_high_laneq_u16): Likewise.
811 (vmlal_high_laneq_u32): Likewise.
812
813 2021-02-03 Jonathan Wright <jonathan.wright@arm.com>
814
815 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_hi_n
816 builtin generator macros.
817 * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_hi_n<mode>_insn):
818 Define.
819 (aarch64_<su>mlsl_hi_n<mode>): Define.
820 * config/aarch64/arm_neon.h (vmlsl_high_n_s16): Use RTL builtin
821 instead of inline asm.
822 (vmlsl_high_n_s32): Likewise.
823 (vmlsl_high_n_u16): Likewise.
824 (vmlsl_high_n_u32): Likewise.
825
826 2021-02-03 Jonathan Wright <jonathan.wright@arm.com>
827
828 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_hi_n
829 builtin generator macros.
830 * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_hi_n<mode>_insn):
831 Define.
832 (aarch64_<su>mlal_hi_n<mode>): Define.
833 * config/aarch64/arm_neon.h (vmlal_high_n_s16): Use RTL builtin
834 instead of inline asm.
835 (vmlal_high_n_s32): Likewise.
836 (vmlal_high_n_u16): Likewise.
837 (vmlal_high_n_u32): Likewise.
838
839 2021-02-03 Jonathan Wright <jonathan.wright@arm.com>
840
841 * config/aarch64/aarch64-simd-builtins.def: Add RTL builtin
842 generator macros.
843 * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal_hi<mode>):
844 Rename to...
845 (aarch64_<su>mlal_hi<mode>_insn): This.
846 (aarch64_<su>mlal_hi<mode>): Define.
847 * config/aarch64/arm_neon.h (vmlal_high_s8): Use RTL builtin
848 instead of inline asm.
849 (vmlal_high_s16): Likewise.
850 (vmlal_high_s32): Likewise.
851 (vmlal_high_u8): Likewise.
852 (vmlal_high_u16): Likewise.
853 (vmlal_high_u32): Likewise.
854
855 2021-02-03 Ilya Leoshkevich <iii@linux.ibm.com>
856
857 * lra-spills.c (remove_pseudos): Call lra_update_insn_recog_data()
858 after calling alter_subreg() on a (mem).
859
860 2021-02-03 Martin Liska <mliska@suse.cz>
861
862 PR lto/98912
863 * lto-streamer-out.c (produce_lto_section): Fill up missing
864 padding.
865 * lto-streamer.h (struct lto_section): Add _padding field.
866
867 2021-02-03 Richard Biener <rguenther@suse.de>
868
869 * lto-streamer.c (lto_get_section_name): Free temporary
870 buffer.
871 * tree-loop-distribution.c
872 (loop_distribution::merge_dep_scc_partitions): Free edge data.
873
874 2021-02-03 Jakub Jelinek <jakub@redhat.com>
875
876 PR middle-end/97487
877 * ifcvt.c (noce_can_force_operand): New function.
878 (noce_emit_move_insn): Use it.
879 (noce_try_sign_mask): Likewise. Formatting fix.
880
881 2021-02-03 Jakub Jelinek <jakub@redhat.com>
882
883 PR middle-end/97971
884 * lra-constraints.c (process_alt_operands): For inline asm, don't call
885 fatal_insn, but instead return false.
886
887 2021-02-03 Jakub Jelinek <jakub@redhat.com>
888
889 PR tree-optimization/98287
890 * config/i386/mmx.md (<insn><mode>3): For shifts don't enable expander
891 for V1DImode.
892
893 2021-02-03 Tamar Christina <tamar.christina@arm.com>
894
895 PR tree-optimization/98928
896 * tree-vect-loop.c (vect_analyze_loop_2): Change
897 STMT_VINFO_SLP_VECT_ONLY to STMT_VINFO_SLP_VECT_ONLY_PATTERN.
898 * tree-vect-slp-patterns.c (complex_pattern::build): Likewise.
899 * tree-vectorizer.h (STMT_VINFO_SLP_VECT_ONLY_PATTERN): New.
900 (class _stmt_vec_info): Add slp_vect_pattern_only_p.
901
902 2021-02-02 Richard Biener <rguenther@suse.de>
903
904 * gimple-loop-interchange.cc (prepare_data_references):
905 Release vectors.
906 * gimple-loop-jam.c (tree_loop_unroll_and_jam): Likewise.
907 * tree-ssa-loop-im.c (hoist_memory_references): Likewise.
908 * tree-vect-stmts.c (vectorizable_condition): Do not
909 allocate vectors.
910 (vectorizable_comparison): Likewise.
911
912 2021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
913
914 * config/aarch64/aarch64-simd-builtins.def (ursqrte): Define builtin.
915 * config/aarch64/aarch64-simd.md (aarch64_ursqrte<mode>): New pattern.
916 * config/aarch64/arm_neon.h (vrsqrte_u32): Reimplement using builtin.
917 (vrsqrteq_u32): Likewise.
918
919 2021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
920
921 * config/aarch64/aarch64-simd-builtins.def (sqxtun2): Define builtin.
922 * config/aarch64/aarch64-simd.md (aarch64_sqxtun2<mode>_le): Define.
923 (aarch64_sqxtun2<mode>_be): Likewise.
924 (aarch64_sqxtun2<mode>): Likewise.
925 * config/aarch64/arm_neon.h (vqmovun_high_s16): Reimplement using builtin.
926 (vqmovun_high_s32): Likewise.
927 (vqmovun_high_s64): Likewise.
928 * config/aarch64/iterators.md (UNSPEC_SQXTUN2): Define.
929
930 2021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
931
932 * config/aarch64/aarch64-simd-builtins.def (bfdot_lane, bfdot_laneq): Use
933 AUTO_FP flags.
934 (bfmlalb_lane, bfmlalt_lane, bfmlalb_lane_q, bfmlalt_lane_q): Use FP flags.
935
936 2021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
937
938 * config/aarch64/aarch64-simd-builtins.def (fcmla_lane0, fcmla_lane90,
939 fcmla_lane180, fcmla_lane270, fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180,
940 fcmlaq_lane270, scvtf, ucvtf, fcvtzs, fcvtzu, scvtfsi, scvtfdi, ucvtfsi,
941 ucvtfdi, fcvtzshf, fcvtzuhf, fmlal_lane_low, fmlsl_lane_low,
942 fmlal_laneq_low, fmlsl_laneq_low, fmlalq_lane_low, fmlslq_lane_low,
943 fmlalq_laneq_low, fmlslq_laneq_low, fmlal_lane_high, fmlsl_lane_high,
944 fmlal_laneq_high, fmlsl_laneq_high, fmlalq_lane_high, fmlslq_lane_high,
945 fmlalq_laneq_high, fmlslq_laneq_high): Use FP flags.
946
947 2021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
948
949 * config/aarch64/aarch64-builtins.c (FLAG_LOAD): Define.
950 * config/aarch64/aarch64-simd-builtins.def (ld1x2, ld2, ld3, ld4, ld2r,
951 ld3r, ld4r, ld1, ld1x3, ld1x4): Use LOAD flags.
952
953 2021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
954
955 * config/aarch64/aarch64-simd-builtins.def (combine, zip1, zip2,
956 uzp1, uzp2, trn1, trn2, simd_bsl): Use AUTO_FP flags.
957
958 2021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
959
960 * config/aarch64/aarch64-simd-builtins.def (clrsb, clz, ctz, popcount,
961 vec_smult_lane_, vec_smlal_lane_, vec_smult_laneq_, vec_smlal_laneq_,
962 vec_umult_lane_, vec_umlal_lane_, vec_umult_laneq_, vec_umlal_laneq_,
963 ashl, sshl, ushl, srshl, urshl, sdot_lane, udot_lane, sdot_laneq,
964 udot_laneq, usdot_lane, usdot_laneq, sudot_lane, sudot_laneq, ashr,
965 ashr_simd, lshr, lshr_simd, srshr_n, urshr_n, ssra_n, usra_n, srsra_n,
966 ursra_n, sshll_n, ushll_n, sshll2_n, ushll2_n, ssri_n, usri_n, ssli_n,
967 ssli_n, usli_n, bswap, rbit, simd_bsl, eor3q, rax1q, xarq, bcaxq): Use
968 NONE builtin flags.
969
970 2021-02-02 Jakub Jelinek <jakub@redhat.com>
971
972 PR tree-optimization/98848
973 * tree-vect-patterns.c (vect_recog_over_widening_pattern): Punt if
974 STMT_VINFO_DEF_TYPE (last_stmt_info) is vect_reduction_def.
975
976 2021-02-02 Kito Cheng <kito.cheng@sifive.com>
977
978 PR target/98743
979 * expr.c: Check mode before calling store_expr.
980
981 2021-02-02 Christophe Lyon <christophe.lyon@linaro.org>
982
983 * config/arm/iterators.md (supf): Remove VORNQ_S and VORNQ_U.
984 (VORNQ): Remove.
985 * config/arm/mve.md (mve_vornq_s<mode>): New entry for vorn
986 instruction using expression ior.
987 (mve_vornq_u<mode>): New expander.
988 (mve_vornq_f<mode>): Use ior code instead of unspec.
989 * config/arm/unspecs.md (VORNQ_S, VORNQ_U, VORNQ_F): Remove.
990
991 2021-02-02 Alexandre Oliva <oliva@adacore.com>
992
993 * tree-nested.c (convert_nonlocal_reference_op): Move
994 current_function_decl restore after re-gimplification.
995 (convert_local_reference_op): Likewise.
996
997 2021-02-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
998
999 * config/aarch64/aarch64-simd-builtins.def (rshrn, rshrn2):
1000 Define builtins.
1001 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le):
1002 Define.
1003 (aarch64_rshrn<mode>_insn_be): Likewise.
1004 (aarch64_rshrn<mode>): Likewise.
1005 (aarch64_rshrn2<mode>_insn_le): Likewise.
1006 (aarch64_rshrn2<mode>_insn_be): Likewise.
1007 (aarch64_rshrn2<mode>): Likewise.
1008 * config/aarch64/aarch64.md (unspec): Add UNSPEC_RSHRN.
1009 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Reimplement
1010 using builtin.
1011 (vrshrn_high_n_s32): Likewise.
1012 (vrshrn_high_n_s64): Likewise.
1013 (vrshrn_high_n_u16): Likewise.
1014 (vrshrn_high_n_u32): Likewise.
1015 (vrshrn_high_n_u64): Likewise.
1016 (vrshrn_n_s16): Likewise.
1017 (vrshrn_n_s32): Likewise.
1018 (vrshrn_n_s64): Likewise.
1019 (vrshrn_n_u16): Likewise.
1020 (vrshrn_n_u32): Likewise.
1021 (vrshrn_n_u64): Likewise.
1022
1023 2021-02-01 Sergei Trofimovich <siarheit@google.com>
1024
1025 PR tree-optimization/98499
1026 * ipa-modref.c (analyze_ssa_name_flags): treat RVO
1027 conservatively and assume all possible side-effects.
1028
1029 2021-02-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1030
1031 * config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi,
1032 vec_unpacku_hi_): Define builtins.
1033 * config/aarch64/arm_neon.h (vmovl_high_s8): Reimplement using
1034 builtin.
1035 (vmovl_high_s16): Likewise.
1036 (vmovl_high_s32): Likewise.
1037 (vmovl_high_u8): Likewise.
1038 (vmovl_high_u16): Likewise.
1039 (vmovl_high_u32): Likewise.
1040
1041 2021-02-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1042
1043 * config/aarch64/aarch64-simd-builtins.def (sabdl, uabdl):
1044 Define builtins.
1045 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): New
1046 pattern.
1047 * config/aarch64/aarch64.md (unspec): Define UNSPEC_SABDL,
1048 UNSPEC_UABDL.
1049 * config/aarch64/arm_neon.h (vabdl_s8): Reimplemet using
1050 builtin.
1051 (vabdl_s16): Likewise.
1052 (vabdl_s32): Likewise.
1053 (vabdl_u8): Likewise.
1054 (vabdl_u16): Likewise.
1055 (vabdl_u32): Likewise.
1056 * config/aarch64/iterators.md (ABDL): New int iterator.
1057 (sur): Handle UNSPEC_SABDL, UNSPEC_UABDL.
1058
1059 2021-02-01 Martin Sebor <msebor@redhat.com>
1060
1061 * tree.h (BLOCK_VARS): Add comment.
1062 (BLOCK_SUBBLOCKS): Same.
1063 (BLOCK_SUPERCONTEXT): Same.
1064 (BLOCK_ABSTRACT_ORIGIN): Same.
1065 (inlined_function_outer_scope_p): Same.
1066
1067 2021-02-01 Martin Sebor <msebor@redhat.com>
1068
1069 PR middle-end/97172
1070 * attribs.c (attr_access::free_lang_data): Define new function.
1071 * attribs.h (attr_access::free_lang_data): Declare new function.
1072
1073 2021-02-01 Richard Biener <rguenther@suse.de>
1074
1075 * vec.h (auto_vec::auto_vec): Add memory stat parameters
1076 and pass them on.
1077 * bitmap.h (auto_bitmap::auto_bitmap): Likewise.
1078
1079 2021-02-01 Tamar Christina <tamar.christina@arm.com>
1080
1081 * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>,
1082 aarch64_<su>mlsl<mode>, aarch64_<su>mlsl_n<mode>): Flip mult operands.
1083
1084 2021-02-01 Richard Biener <rguenther@suse.de>
1085
1086 PR rtl-optimization/98863
1087 * config/i386/i386-features.c (convert_scalars_to_vector):
1088 Set DF_RD_PRUNE_DEAD_DEFS.
1089
1090 2021-01-31 Eric Botcazou <ebotcazou@adacore.com>
1091
1092 * system.h (SIZE_MAX): Define if not already defined.
1093
1094 2021-01-30 Aaron Sawdey <acsawdey@linux.ibm.com>
1095
1096 * config/rs6000/genfusion.pl (gen_2logical): New function to
1097 generate patterns for logical-logical fusion.
1098 * config/rs6000/fusion.md: Regenerated patterns.
1099 * config/rs6000/rs6000-cpus.def: Add
1100 OPTION_MASK_P10_FUSION_2LOGICAL.
1101 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1102 Enable logical-logical fusion for p10.
1103 * config/rs6000/rs6000.opt: Add -mpower10-fusion-2logical.
1104
1105 2021-01-30 David Edelsohn <dje.gcc@gmail.com>
1106
1107 * config/rs6000/rs6000.opt: Add periods to new AIX options.
1108
1109 2021-01-30 David Edelsohn <dje.gcc@gmail.com>
1110
1111 * config/rs6000/rs6000.opt (mabi=vec-extabi): New.
1112 (mabi=vec-default): New.
1113 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
1114 __EXTABI__ for AIX Vector extended ABI.
1115 * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print AIX Vector
1116 extabi info.
1117 (conditional_register_usage): If AIX vec_extabi enabled, vs20-vs31
1118 are non-volatile.
1119 * doc/invoke.texi (PowerPC mabi): Add AIX vec-extabi and vec-default.
1120
1121 2021-01-30 Jakub Jelinek <jakub@redhat.com>
1122
1123 * config/i386/i386-features.c (remove_partial_avx_dependency): Clear
1124 DF_DEFER_INSN_RESCAN after calling df_process_deferred_rescans.
1125
1126 2021-01-29 Vladimir N. Makarov <vmakarov@redhat.com>
1127
1128 PR target/97701
1129 * lra-constraints.c (in_class_p): Don't narrow class only for REG
1130 or MEM.
1131
1132 2021-01-29 Will Schmidt <will_schmidt@vnet.ibm.com>
1133
1134 * config/rs6000/rs6000-call.c (rs6000_expand_binup_builtin): Add
1135 clauses for CODE_FOR_vsx_xvcvuxddp_scale and
1136 CODE_FOR_vsx_xvcvsxddp_scale to the parameter checking code.
1137
1138 2021-01-29 Andrew MacLeod <amacleod@redhat.com>
1139
1140 PR tree-optimization/98866
1141 * gimple-range-gori.h (gori_compute:set_range_invariant): New.
1142 * gimple-range-gori.cc (gori_map::set_range_invariant): New.
1143 (gori_map::m_maybe_invariant): Rename from all_outgoing.
1144 (gori_map::gori_map): Rename all_outgoing to m_maybe_invariant.
1145 (gori_map::is_export_p): Ditto.
1146 (gori_map::calculate_gori): Ditto.
1147 (gori_compute::set_range_invariant): New.
1148 * gimple-range.cc (gimple_ranger::range_of_stmt): Set range
1149 invariant for pointers evaluating to [1, +INF].
1150
1151 2021-01-29 Richard Biener <rguenther@suse.de>
1152
1153 PR rtl-optimization/98863
1154 * config/i386/i386-features.c (remove_partial_avx_dependency):
1155 Do not perform DF analysis.
1156 (pass_data_remove_partial_avx_dependency): Remove
1157 TODO_df_finish.
1158
1159 2021-01-29 Jonathan Wright <jonathan.wright@arm.com>
1160
1161 * config/aarch64/aarch64-simd-builtins.def: Add [su]mull_n
1162 builtin generator macros.
1163 * config/aarch64/aarch64-simd.md (aarch64_<su>mull_n<mode>):
1164 Define.
1165 * config/aarch64/arm_neon.h (vmull_n_s16): Use RTL builtin
1166 instead of inline asm.
1167 (vmull_n_s32): Likewise.
1168 (vmull_n_u16): Likewise.
1169 (vmull_n_u32): Likewise.
1170
1171 2021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1172
1173 * config/aarch64/aarch64-simd-builtins.def (sabdl2, uabdl2):
1174 Define builtins.
1175 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>_3):
1176 Rename to...
1177 (aarch64_<sur>abdl2<mode>): ... This.
1178 (<sur>sadv16qi): Adjust use of above.
1179 * config/aarch64/arm_neon.h (vabdl_high_s8): Reimplement using
1180 builtin.
1181 (vabdl_high_s16): Likewise.
1182 (vabdl_high_s32): Likewise.
1183 (vabdl_high_u8): Likewise.
1184 (vabdl_high_u16): Likewise.
1185 (vabdl_high_u32): Likewise.
1186
1187 2021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1188
1189 * config/aarch64/aarch64-simd-builtins.def (sabal2): Define
1190 builtin.
1191 (uabal2): Likewise.
1192 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): New
1193 pattern.
1194 * config/aarch64/aarch64.md (unspec): Add UNSPEC_SABAL2 and
1195 UNSPEC_UABAL2.
1196 * config/aarch64/arm_neon.h (vabal_high_s8): Reimplement using
1197 builtin.
1198 (vabal_high_s16): Likewise.
1199 (vabal_high_s32): Likewise.
1200 (vabal_high_u8): Likewise.
1201 (vabal_high_u16): Likewise.
1202 (vabal_high_u32): Likewise.
1203 * config/aarch64/iterators.md (ABAL2): New mode iterator.
1204 (sur): Handle UNSPEC_SABAL2, UNSPEC_UABAL2.
1205
1206 2021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1207
1208 * config/aarch64/aarch64-simd-builtins.def (sabal): Define
1209 builtin.
1210 (uabal): Likewise.
1211 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>_4):
1212 Rename to...
1213 (aarch64_<sur>abal<mode>): ... This
1214 (<sur>sadv16qi): Adust use of the above.
1215 * config/aarch64/arm_neon.h (vabal_s8): Reimplement using
1216 builtin.
1217 (vabal_s16): Likewise.
1218 (vabal_s32): Likewise.
1219 (vabal_u8): Likewise.
1220 (vabal_u16): Likewise.
1221 (vabal_u32): Likewise.
1222
1223 2021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1224
1225 * config/aarch64/aarch64-simd-builtins.def (saddlv, uaddlv):
1226 Define builtins.
1227 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
1228 Define.
1229 * config/aarch64/arm_neon.h (vaddlv_s8): Reimplement using
1230 builtin.
1231 (vaddlv_s16): Likewise.
1232 (vaddlv_u8): Likewise.
1233 (vaddlv_u16): Likewise.
1234 (vaddlvq_s8): Likewise.
1235 (vaddlvq_s16): Likewise.
1236 (vaddlvq_s32): Likewise.
1237 (vaddlvq_u8): Likewise.
1238 (vaddlvq_u16): Likewise.
1239 (vaddlvq_u32): Likewise.
1240 (vaddlv_s32): Likewise.
1241 (vaddlv_u32): Likewise.
1242 * config/aarch64/iterators.md (VDQV_L): New mode iterator.
1243 (unspec): Add UNSPEC_SADDLV, UNSPEC_UADDLV.
1244 (Vwstype): New mode attribute.
1245 (Vwsuf): Likewise.
1246 (VWIDE_S): Likewise.
1247 (USADDLV): New int iterator.
1248 (su): Handle UNSPEC_SADDLV, UNSPEC_UADDLV.
1249
1250 2021-01-29 Jonathan Wright <jonathan.wright@arm.com>
1251
1252 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_lane[q]
1253 builtin generator macros.
1254 * config/aarch64/aarch64-simd.md (aarch64_vec_<su>mlsl_lane<Qlane>):
1255 Define.
1256 * config/aarch64/arm_neon.h (vmlsl_lane_s16): Use RTL builtin
1257 instead of inline asm.
1258 (vmlsl_lane_s32): Likewise.
1259 (vmlsl_lane_u16): Likewise.
1260 (vmlsl_lane_u32): Likewise.
1261 (vmlsl_laneq_s16): Likewise.
1262 (vmlsl_laneq_s32): Likewise.
1263 (vmlsl_laneq_u16): Likewise.
1264 (vmlsl_laneq_u32): Likewise.
1265
1266 2021-01-29 Richard Biener <rguenther@suse.de>
1267
1268 * doc/invoke.texi (--param max-gcse-memory): Document unit
1269 of size.
1270 * gcse.c (gcse_or_cprop_is_too_expensive): Adjust.
1271 * params.opt (--param max-gcse-memory): Adjust default and
1272 document unit of size.
1273
1274 2021-01-29 Richard Biener <rguenther@suse.de>
1275
1276 PR rtl-optimization/98863
1277 * gcse.c (gcse_or_cprop_is_too_expensive): Use unsigned
1278 HOST_WIDE_INT for the memory estimate.
1279
1280 2021-01-29 Bin Cheng <bin.cheng@linux.alibaba.com>
1281 Richard Biener <rguenther@suse.de>
1282
1283 PR tree-optimization/97627
1284 * tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
1285 Do not analyze fake edges.
1286
1287 2021-01-29 Richard Biener <rguenther@suse.de>
1288
1289 PR rtl-optimization/98144
1290 * df.h (df_mir_bb_info): Add con_visited member.
1291 * df-problems.c (df_mir_alloc): Initialize con_visited,
1292 do not fully populate IN and OUT.
1293 (df_mir_reset): Likewise.
1294 (df_mir_confluence_0): Set con_visited.
1295 (df_mir_confluence_n): Properly handle implicitely
1296 fully populated IN and OUT as designated by con_visited
1297 and update con_visited accordingly.
1298
1299 2021-01-29 Jakub Jelinek <jakub@redhat.com>
1300
1301 PR target/98849
1302 * config/arm/vec-common.md (mve_vshlq_<supf><mode>,
1303 vashl<mode>3, vashr<mode>3, vlshr<mode>3): Add
1304 && !TARGET_REALLY_IWMMXT to conditions.
1305
1306 2021-01-29 Jakub Jelinek <jakub@redhat.com>
1307
1308 PR debug/98331
1309 * cfgbuild.c (find_bb_boundaries): Reset debug_insn when seeing
1310 a BARRIER.
1311
1312 2021-01-28 Marek Polacek <polacek@redhat.com>
1313
1314 PR c++/94775
1315 * stor-layout.c (finalize_type_size): If we reset TYPE_USER_ALIGN in
1316 the main variant, maybe reset it in its variants too.
1317 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
1318 (check_aligned_type): Check if TYPE_USER_ALIGN match.
1319
1320 2021-01-28 Christophe Lyon <christophe.lyon@linaro.org>
1321
1322 PR target/98730
1323 * config/arm/arm.c (arm_rtx_costs_internal): Adjust cost of vector
1324 of constant zero for comparisons.
1325
1326 2021-01-28 Michael Meissner <meissner@linux.ibm.com>
1327
1328 * config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Add
1329 support for mapping built-in function names for long double
1330 built-in functions if long double is IEEE 128-bit.
1331
1332 2021-01-28 Jonathan Wright <jonathan.wright@arm.com>
1333
1334 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_n
1335 builtin generator macros.
1336 * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_n<mode>):
1337 Define.
1338 * config/aarch64/arm_neon.h (vmlsl_n_s16): Use RTL builtin
1339 instead of inline asm.
1340 (vmlsl_n_s32): Likewise.
1341 (vmlsl_n_u16): Likewise.
1342 (vmlsl_n_u32): Likewise.
1343
1344 2021-01-28 Jonathan Wright <jonathan.wright@arm.com>
1345
1346 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_n
1347 builtin generator macros.
1348 * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>):
1349 Define.
1350 * config/aarch64/arm_neon.h (vmlal_n_s16): Use RTL builtin
1351 instead of inline asm.
1352 (vmlal_n_s32): Likewise.
1353 (vmlal_n_u16): Likewise.
1354 (vmlal_n_u32): Likewise.
1355
1356 2021-01-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1357
1358 * config/aarch64/aarch64-simd-builtins.def (shrn2): Define
1359 builtin.
1360 * config/aarch64/aarch64-simd.md (aarch64_shrn2<mode>_insn_le):
1361 Define.
1362 (aarch64_shrn2<mode>_insn_be): Likewise.
1363 (aarch64_shrn2<mode>): Likewise.
1364 * config/aarch64/arm_neon.h (vshrn_high_n_s16): Reimlplement
1365 using builtins.
1366 (vshrn_high_n_s32): Likewise.
1367 (vshrn_high_n_s64): Likewise.
1368 (vshrn_high_n_u16): Likewise.
1369 (vshrn_high_n_u32): Likewise.
1370 (vshrn_high_n_u64): Likewise.
1371
1372 2021-01-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1373
1374 * config/aarch64/aarch64-simd-builtins.def (shrn): Define
1375 builtin.
1376 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le):
1377 Define.
1378 (aarch64_shrn<mode>_insn_be): Likewise.
1379 (aarch64_shrn<mode>): Likewise.
1380 * config/aarch64/arm_neon.h (vshrn_n_s16): Reimplement using
1381 builtins.
1382 (vshrn_n_s32): Likewise.
1383 (vshrn_n_s64): Likewise.
1384 (vshrn_n_u16): Likewise.
1385 (vshrn_n_u32): Likewise.
1386 (vshrn_n_u64): Likewise.
1387 * config/aarch64/iterators.md (vn_mode): New mode attribute.
1388
1389 2021-01-28 Richard Biener <rguenther@suse.de>
1390
1391 PR rtl-optimization/80960
1392 * dse.c (check_mem_read_rtx): Call get_addr on the
1393 offsetted address.
1394
1395 2021-01-28 Xionghu Luo <luoxhu@linux.ibm.com>
1396 David Edelsohn <dje.gcc@gmail.com>
1397
1398 PR target/98799
1399 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1400 Don't generate VIEW_CONVERT_EXPR for fcode ALTIVEC_BUILTIN_VEC_INSERT
1401 when -m32.
1402 * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
1403 Delete.
1404 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Remove the
1405 wrapper call rs6000_expand_vector_set_var for cleanup. Call
1406 rs6000_expand_vector_set_var_p9 and rs6000_expand_vector_set_var_p8
1407 directly.
1408 (rs6000_expand_vector_set_var): Delete.
1409 (rs6000_expand_vector_set_var_p9): Make static.
1410 (rs6000_expand_vector_set_var_p8): Make static.
1411
1412 2021-01-28 Xing GUO <higuoxing@gmail.com>
1413
1414 * common/config/riscv/riscv-common.c
1415 (riscv_subset_list::parsing_subset_version): Fix -march option parsing
1416 when `p` extension exists.
1417
1418 2021-01-27 Vladimir N. Makarov <vmakarov@redhat.com>
1419
1420 PR rtl-optimization/97684
1421 * ira.c (ira): Call ira_set_pseudo_classes before
1422 update_equiv_regs when it is necessary.
1423
1424 2021-01-27 Jakub Jelinek <jakub@redhat.com>
1425
1426 PR target/98853
1427 * config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Use
1428 %w0, %w1 and %2 instead of %0, %1 and %2.
1429
1430 2021-01-27 Aaron Sawdey <acsawdey@linux.ibm.com>
1431
1432 * config/rs6000/genfusion.pl: New script to generate
1433 define_insn_and_split patterns so combine can arrange fused
1434 instructions next to each other.
1435 * config/rs6000/fusion.md: New file, generated fused instruction
1436 patterns for combine.
1437 * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
1438 (non_update_memory_operand): New predicate.
1439 * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
1440 OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
1441 POWERPC_MASKS.
1442 * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
1443 prototype.
1444 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1445 Automatically set OPTION_MASK_P10_FUSION and
1446 OPTION_MASK_P10_FUSION_LD_CMPI if target is power10.
1447 (rs600_opt_masks): Allow -mpower10-fusion
1448 in function attributes.
1449 (address_is_non_pfx_d_or_x): New function.
1450 * config/rs6000/rs6000.h: Add MASK_P10_FUSION.
1451 * config/rs6000/rs6000.md: Include fusion.md.
1452 * config/rs6000/rs6000.opt: Add -mpower10-fusion
1453 and -mpower10-fusion-ld-cmpi.
1454 * config/rs6000/t-rs6000: Add dependencies involving fusion.md.
1455
1456 2021-01-27 Jonathan Wright <jonathan.wright@arm.com>
1457
1458 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal
1459 builtin generator macros.
1460 * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal<mode>):
1461 Rename to...
1462 (aarch64_<su>mlal<mode>): This.
1463 * config/aarch64/arm_neon.h (vmlal_s8): Use RTL builtin
1464 instead of inline asm.
1465 (vmlal_s16): Likewise.
1466 (vmlal_s32): Likewise.
1467 (vmlal_u8): Likewise.
1468 (vmlal_u16): Likewise.
1469 (vmlal_u32): Likewise.
1470
1471 2021-01-27 Richard Biener <rguenther@suse.de>
1472
1473 PR tree-optimization/98854
1474 * tree-vect-slp.c (vect_build_slp_tree_2): Also build
1475 PHIs from scalars when the number of CTORs matches the
1476 number of children.
1477
1478 2021-01-27 Jonathan Wright <jonathan.wright@arm.com>
1479
1480 * config/aarch64/aarch64-simd-builtins.def: Add mls_n builtin
1481 generator macro.
1482 * config/aarch64/aarch64-simd.md (*aarch64_mls_elt_merge<mode>):
1483 Rename to...
1484 (aarch64_mls_n<mode>): This.
1485 * config/aarch64/arm_neon.h (vmls_n_s16): Use RTL builtin
1486 instead of asm.
1487 (vmls_n_s32): Likewise.
1488 (vmls_n_u16): Likewise.
1489 (vmls_n_u32): Likewise.
1490 (vmlsq_n_s16): Likewise.
1491 (vmlsq_n_s32): Likewise.
1492 (vmlsq_n_u16): Likewise.
1493 (vmlsq_n_u32): Likewise.
1494
1495 2021-01-27 Jonathan Wright <jonathan.wright@arm.com>
1496
1497 * config/aarch64/aarch64-simd-builtins.def: Add mls builtin
1498 generator macro.
1499 * config/aarch64/arm_neon.h (vmls_s8): Use RTL builtin rather
1500 than asm.
1501 (vmls_s16): Likewise.
1502 (vmls_s32): Likewise.
1503 (vmls_u8): Likewise.
1504 (vmls_u16): Likewise.
1505 (vmls_u32): Likewise.
1506 (vmlsq_s8): Likewise.
1507 (vmlsq_s16): Likewise.
1508 (vmlsq_s32): Likewise.
1509 (vmlsq_u8): Likewise.
1510 (vmlsq_u16): Likewise.
1511 (vmlsq_u32): Likewise.
1512
1513 2021-01-27 Jonathan Wright <jonathan.wright@arm.com>
1514
1515 * config/aarch64/aarch64-simd-builtins.def: Add mla_n builtin
1516 generator macro.
1517 * config/aarch64/aarch64-simd.md (*aarch64_mla_elt_merge<mode>):
1518 Rename to...
1519 (aarch64_mla_n<mode>): This.
1520 * config/aarch64/arm_neon.h (vmla_n_s16): Use RTL builtin
1521 instead of asm.
1522 (vmla_n_s32): Likewise.
1523 (vmla_n_u16): Likewise.
1524 (vmla_n_u32): Likewise.
1525 (vmlaq_n_s16): Likewise.
1526 (vmlaq_n_s32): Likewise.
1527 (vmlaq_n_u16): Likewise.
1528 (vmlaq_n_u32): Likewise.
1529
1530 2021-01-27 liuhongt <hongtao.liu@intel.com>
1531
1532 PR target/98833
1533 * config/i386/sse.md (sse2_gt<mode>3): Drop !TARGET_XOP in condition.
1534 (*sse2_eq<mode>3): Ditto.
1535
1536 2021-01-27 Jakub Jelinek <jakub@redhat.com>
1537
1538 * tree-pass.h (PROP_trees): Rename to ...
1539 (PROP_gimple): ... this.
1540 * cfgexpand.c (pass_data_expand): Replace PROP_trees with PROP_gimple.
1541 * passes.c (execute_function_dump, execute_function_todo,
1542 execute_one_ipa_transform_pass, execute_one_pass): Likewise.
1543 * varpool.c (ctor_for_folding): Likewise.
1544
1545 2021-01-27 Jakub Jelinek <jakub@redhat.com>
1546
1547 PR tree-optimization/97260
1548 * varpool.c: Include tree-pass.h.
1549 (ctor_for_folding): In GENERIC return DECL_INITIAL for TREE_READONLY
1550 non-TREE_SIDE_EFFECTS automatic variables.
1551
1552 2021-01-26 Paul Fee <paul.f.fee@gmail.com>
1553
1554 * doc/cpp.texi (__cplusplus): Document value for -std=c++23
1555 or -std=gnu++23.
1556 * doc/invoke.texi: Document -std=c++23 and -std=gnu++23.
1557 * dwarf2out.c (highest_c_language): Recognise C++20 and C++23.
1558 (gen_compile_unit_die): Recognise C++23.
1559
1560 2021-01-26 Jakub Jelinek <jakub@redhat.com>
1561
1562 PR bootstrap/98839
1563 * dwarf2asm.c (dw2_assemble_integer): Cast DWARF2_ADDR_SIZE to int
1564 in comparison.
1565
1566 2021-01-26 Jakub Jelinek <jakub@redhat.com>
1567
1568 PR target/98681
1569 * config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
1570 Use UINTVAL (shft_amnt) and UINTVAL (mask) instead of INTVAL (shft_amnt)
1571 and INTVAL (mask). Add && INTVAL (mask) > 0 condition.
1572
1573 2021-01-26 Richard Biener <rguenther@suse.de>
1574
1575 * gimple-pretty-print.c (dump_binary_rhs): Handle
1576 VEC_WIDEN_{PLUS,MINUS}_{LO,HI}_EXPR.
1577
1578 2021-01-26 Richard Biener <rguenther@suse.de>
1579
1580 PR middle-end/98726
1581 * tree.h (vector_cst_int_elt): Remove.
1582 * tree.c (vector_cst_int_elt): Use poly_wide_int for computations,
1583 make static.
1584
1585 2021-01-26 Andrew Stubbs <ams@codesourcery.com>
1586
1587 * config/gcn/gcn.c (gcn_expand_reduc_scalar): Use move instructions
1588 for V64DFmode min/max reductions.
1589
1590 2021-01-26 Jakub Jelinek <jakub@redhat.com>
1591
1592 * dwarf2asm.c (dw2_assemble_integer): Handle size twice as large
1593 as DWARF2_ADDR_SIZE if x is not a scalar int by emitting it as
1594 two halves, one with x and the other with const0_rtx, ordered
1595 depending on endianity.
1596
1597 2021-01-26 Alexandre Oliva <oliva@adacore.com>
1598
1599 * gimplify.c (gimplify_decl_expr): Skip asan marking calls for
1600 temporaries not seen in binding block, and not about to be
1601 added as gimple variables.
1602
1603 2021-01-25 Martin Sebor <msebor@redhat.com>
1604
1605 PR c++/98646
1606 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust warning text.
1607
1608 2021-01-25 Martin Liska <mliska@suse.cz>
1609
1610 * value-prof.c (get_nth_most_common_value): Use %s instead
1611 of %qs string.
1612
1613 2021-01-25 Jakub Jelinek <jakub@redhat.com>
1614
1615 PR debug/98811
1616 * configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG): Only define if
1617 readelf -wi is able to read the emitted .debug_info back.
1618 * configure: Regenerated.
1619
1620 2021-01-25 Martin Liska <mliska@suse.cz>
1621
1622 PR gcov-profile/98739
1623 * common.opt: Add missing sign symbol.
1624 * value-prof.c (get_nth_most_common_value): Restore handling
1625 of PROFILE_REPRODUCIBILITY_PARALLEL_RUNS and
1626 PROFILE_REPRODUCIBILITY_MULTITHREADED.
1627
1628 2021-01-25 Richard Biener <rguenther@suse.de>
1629
1630 PR middle-end/98807
1631 * tree.c (vector_element_bits): Always use precision of
1632 the element type for boolean vectors.
1633
1634 2021-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de>
1635
1636 * config/rtems.h (STARTFILE_SPEC): Remove qnolinkcmds.
1637 (ENDFILE_SPEC): Evaluate qnolinkcmds.
1638
1639 2021-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de>
1640
1641 * config/rtems.h (STARTFILE_SPEC): Remove nostdlib and
1642 nostartfiles handling since this is already done by
1643 LINK_COMMAND_SPEC. Evaluate qnolinkcmds.
1644 (ENDFILE_SPEC): Remove nostdlib and nostartfiles handling since this
1645 is already done by LINK_COMMAND_SPEC.
1646 (LIB_SPECS): Remove nostdlib and nodefaultlibs handling since
1647 this is already done by LINK_COMMAND_SPEC. Remove qnolinkcmds
1648 evaluation.
1649
1650 2021-01-25 Jakub Jelinek <jakub@redhat.com>
1651
1652 PR testsuite/98771
1653 * fold-const-call.c (host_size_t_cst_p): Renamed to ...
1654 (size_t_cst_p): ... this. Check and store unsigned HOST_WIDE_INT
1655 value rather than host size_t.
1656 (fold_const_call): Change type of s2 from size_t to
1657 unsigned HOST_WIDE_INT. Use size_t_cst_p instead of
1658 host_size_t_cst_p. For strncmp calls, pass MIN (s2, SIZE_MAX)
1659 instead of s2 as last argument.
1660
1661 2021-01-25 Tamar Christina <tamar.christina@arm.com>
1662
1663 * config/arm/iterators.md (rotsplit1, rotsplit2, conj_op, fcmac1,
1664 VCMLA_OP, VCMUL_OP): New.
1665 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Support vec_dup 0.
1666 * config/arm/neon.md (cmul<conj_op><mode>3): New.
1667 * config/arm/unspecs.md (UNSPEC_VCMLA_CONJ, UNSPEC_VCMLA180_CONJ,
1668 UNSPEC_VCMUL_CONJ): New.
1669 * config/arm/vec-common.md (cmul<conj_op><mode>3, arm_vcmla<rot><mode>,
1670 cml<fcmac1><conj_op><mode>4): New.
1671
1672 2021-01-23 Jakub Jelinek <jakub@redhat.com>
1673
1674 PR testsuite/97301
1675 * config/rs6000/mmintrin.h (__m64): Add __may_alias__ attribute.
1676
1677 2021-01-22 Jonathan Wright <jonathan.wright@arm.com>
1678
1679 * config/aarch64/aarch64-simd-builtins.def: Add mla builtin
1680 generator macro.
1681 * config/aarch64/arm_neon.h (vmla_s8): Use RTL builtin rather
1682 than asm.
1683 (vmla_s16): Likewise.
1684 (vmla_s32): Likewise.
1685 (vmla_u8): Likewise.
1686 (vmla_u16): Likewise.
1687 (vmla_u32): Likewise.
1688 (vmlaq_s8): Likewise.
1689 (vmlaq_s16): Likewise.
1690 (vmlaq_s32): Likewise.
1691 (vmlaq_u8): Likewise.
1692 (vmlaq_u16): Likewise.
1693 (vmlaq_u32): Likewise.
1694
1695 2021-01-22 David Malcolm <dmalcolm@redhat.com>
1696
1697 * doc/invoke.texi (GCC_EXTRA_DIAGNOSTIC_OUTPUT): Add @findex
1698 directive.
1699
1700 2021-01-22 Jakub Jelinek <jakub@redhat.com>
1701
1702 PR debug/98796
1703 * dwarf2out.c (output_file_names): For -gdwarf-5, if there are no
1704 filenames to emit, still emit the required 0 index directory and
1705 filename entries that match DW_AT_comp_dir and DW_AT_name of the
1706 compilation unit.
1707
1708 2021-01-22 Marek Polacek <polacek@redhat.com>
1709
1710 PR c++/98545
1711 * doc/invoke.texi: Update C++ ABI Version 15 description.
1712
1713 2021-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1714
1715 PR tree-optimization/98766
1716 * tree-ssa-math-opts.c (convert_mult_to_fma): Use maybe_le when
1717 comparing against type size with param_avoid_fma_max_bits.
1718
1719 2021-01-22 Richard Biener <rguenther@suse.de>
1720
1721 PR middle-end/98793
1722 * tree.c (vector_element_bits): Key single-bit bool vector on
1723 integer mode rather than not vector mode.
1724
1725 2021-01-22 Xionghu Luo <luoxhu@linux.ibm.com>
1726
1727 PR target/98093
1728 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1729 Generate ARRAY_REF(VIEW_CONVERT_EXPR) for P8 and later
1730 platforms.
1731 * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): Update
1732 to call different path for P8 and P9.
1733 (rs6000_expand_vector_set_var_p9): New function.
1734 (rs6000_expand_vector_set_var_p8): New function.
1735
1736 2021-01-22 Xionghu Luo <luoxhu@linux.ibm.com>
1737
1738 PR target/79251
1739 PR target/98065
1740 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1741 Ajdust variable index vec_insert from address dereference to
1742 ARRAY_REF(VIEW_CONVERT_EXPR) tree expression.
1743 * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
1744 New declaration.
1745 * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): New function.
1746
1747 2021-01-22 Martin Liska <mliska@suse.cz>
1748
1749 PR gcov-profile/98739
1750 * profile.c (compute_value_histograms): Drop time profile for
1751 -fprofile-reproducible=multithreaded.
1752
1753 2021-01-22 Nathan Sidwell <nathan@acm.org>
1754
1755 * gcc.c (process_command): Don't check OPT_SPECIAL_input_file
1756 existence here.
1757
1758 2021-01-22 Richard Biener <rguenther@suse.de>
1759
1760 PR middle-end/98773
1761 * tree-data-ref.c (initalize_matrix_A): Revert previous
1762 change, retaining failing on HOST_WIDE_INT_MIN CHREC_RIGHT.
1763
1764 2021-01-22 Jakub Jelinek <jakub@redhat.com>
1765
1766 PR tree-optimization/90248
1767 * match.pd (X cmp 0.0 ? 1.0 : -1.0 -> copysign(1, +-X),
1768 X cmp 0.0 ? -1.0 : +1.0 -> copysign(1, -+X)): Remove
1769 simplifications.
1770 (X * (X cmp 0.0 ? 1.0 : -1.0) -> +-abs(X),
1771 X * (X cmp 0.0 ? -1.0 : 1.0) -> +-abs(X)): New simplifications.
1772
1773 2021-01-22 Jakub Jelinek <jakub@redhat.com>
1774
1775 PR tree-optimization/98255
1776 * tree-dfa.c (get_ref_base_and_extent): For ARRAY_REFs, sign
1777 extend index - low_bound from sizetype's precision rather than index
1778 precision.
1779 (get_addr_base_and_unit_offset_1): Likewise.
1780 * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Likewise.
1781 * gimple-fold.c (fold_const_aggregate_ref_1): Likewise.
1782
1783 2021-01-22 Richard Biener <rguenther@suse.de>
1784
1785 PR tree-optimization/98786
1786 * tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid
1787 adding new uses of abnormals. Verify we deal with a conditional
1788 conversion.
1789
1790 2021-01-22 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1791
1792 PR target/98636
1793 * optc-save-gen.awk: Add arm_fp16_format to checked_options.
1794
1795 2021-01-22 liuhongt <hongtao.liu@intel.com>
1796
1797 PR target/96891
1798 PR target/98348
1799 * config/i386/sse.md (VI_128_256): New mode iterator.
1800 (*avx_cmp<mode>3_1, *avx_cmp<mode>3_2, *avx_cmp<mode>3_3,
1801 *avx_cmp<mode>3_4, *avx2_eq<mode>3, *avx2_pcmp<mode>3_1,
1802 *avx2_pcmp<mode>3_2, *avx2_gt<mode>3): New
1803 define_insn_and_split to lower avx512 vector comparison to avx
1804 version when dest is vector.
1805 (*<avx512>_cmp<mode>3,*<avx512>_cmp<mode>3,*<avx512>_ucmp<mode>3):
1806 define_insn_and_split for negating the comparison result.
1807 * config/i386/predicates.md (float_vector_all_ones_operand):
1808 New predicate.
1809 * config/i386/i386-expand.c (ix86_expand_sse_movcc): Use
1810 general NOT operator without UNSPEC_MASKOP.
1811
1812 2021-01-21 Vladimir N. Makarov <vmakarov@redhat.com>
1813
1814 PR rtl-optimization/98777
1815 * lra-int.h (lra_pmode_pseudo): New extern.
1816 * lra.c (lra_pmode_pseudo): New global.
1817 (lra): Set it up.
1818 * lra-eliminations.c (eliminate_regs_in_insn): Use it.
1819
1820 2021-01-21 Ilya Leoshkevich <iii@linux.ibm.com>
1821
1822 * fwprop.c (fwprop_propagation::classify_result): Allow
1823 (subreg (mem)) simplifications.
1824
1825 2021-01-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1826
1827 * config/aarch64/aarch64-simd.md (aarch64_sqdml<SBINQOPS:as>l<mode>):
1828 Split into...
1829 (aarch64_sqdmlal<mode>): ... This...
1830 (aarch64_sqdmlsl<mode>): ... And this.
1831 (aarch64_sqdml<SBINQOPS:as>l_lane<mode>): Split into...
1832 (aarch64_sqdmlal_lane<mode>): ... This...
1833 (aarch64_sqdmlsl_lane<mode>): ... And this.
1834 (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): Split into...
1835 (aarch64_sqdmlsl_laneq<mode>): ... This...
1836 (aarch64_sqdmlal_laneq<mode>): ... And this.
1837 (aarch64_sqdml<SBINQOPS:as>l_n<mode>): Split into...
1838 (aarch64_sqdmlsl_n<mode>): ... This...
1839 (aarch64_sqdmlal_n<mode>): ... And this.
1840 (aarch64_sqdml<SBINQOPS:as>l2<mode>_internal): Split into...
1841 (aarch64_sqdmlal2<mode>_internal): ... This...
1842 (aarch64_sqdmlsl2<mode>_internal): ... And this.
1843
1844 2021-01-21 Christophe Lyon <christophe.lyon@linaro.org>
1845
1846 * config/arm/arm_mve.h (__arm_vcmpneq_s8): Fix return type.
1847
1848 2021-01-21 Andrea Corallo <andrea.corallo@arm.com>
1849
1850 PR target/96372
1851 * doc/sourcebuild.texi (arm_thumb2_no_arm_v8_1_lob): Document.
1852
1853 2021-01-21 liuhongt <hongtao.liu@intel.com>
1854
1855 PR rtl-optimization/98694
1856 * regcprop.c (copy_value): If SRC had been assigned a mode
1857 narrower than the copy, we can't link DEST into the chain even
1858 they have same hard_regno_nregs(i.e. HImode/SImode in i386
1859 backend).
1860
1861 2021-01-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1862
1863 * config/aarch64/aarch64-simd.md (aarch64_get_lane<mode>):
1864 Convert to define_insn_and_split. Split into simple move when moving
1865 bottom element.
1866
1867 2021-01-20 Segher Boessenkool <segher@kernel.crashing.org>
1868
1869 * config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Change assert.
1870 Adjust comment. Simplify code.
1871
1872 2021-01-20 Jakub Jelinek <jakub@redhat.com>
1873
1874 PR debug/98765
1875 * dwarf2out.c (reset_indirect_string): Also reset indirect strings
1876 with DW_FORM_line_strp form.
1877 (prune_unused_types_update_strings): Don't add into debug_str_hash
1878 indirect strings with DW_FORM_line_strp form.
1879 (adjust_name_comp_dir): New function.
1880 (dwarf2out_finish): Call it on CU DIEs after resetting
1881 debug_line_str_hash.
1882
1883 2021-01-20 Vladimir N. Makarov <vmakarov@redhat.com>
1884
1885 PR rtl-optimization/98722
1886 * lra-eliminations.c (eliminate_regs_in_insn): Check that target
1887 has no 3-op add insn to transform insns containing two pluses.
1888
1889 2021-01-20 Richard Biener <rguenther@suse.de>
1890
1891 * hwint.h (add_hwi): New function.
1892 (mul_hwi): Likewise.
1893 * tree-data-ref.c (initialize_matrix_A): Properly translate
1894 tree constants and avoid HOST_WIDE_INT_MIN.
1895 (lambda_matrix_row_add): Avoid undefined integer overflow
1896 and return true on such overflow.
1897 (lambda_matrix_right_hermite): Handle overflow from
1898 lambda_matrix_row_add gracefully. Simplify previous fix.
1899 (analyze_subscript_affine_affine): Likewise.
1900
1901 2021-01-20 Eugene Rozenfeld <erozen@microsoft.com>
1902
1903 PR tree-optimization/96674
1904 * match.pd: New patterns: x < y || y == XXX_MIN --> x <= y - 1
1905 x >= y && y != XXX_MIN --> x > y - 1
1906
1907 2021-01-20 Richard Sandiford <richard.sandiford@arm.com>
1908
1909 PR tree-optimization/98535
1910 * tree-vect-slp.c (duplicate_and_interleave): Use quick_grow_cleared.
1911 If the high and low permutes are the same, remove the high permutes
1912 from the working set and only continue with the low ones.
1913
1914 2021-01-20 Jakub Jelinek <jakub@redhat.com>
1915
1916 PR tree-optimization/98721
1917 * builtins.c (access_ref::inform_access): Don't assume
1918 SSA_NAME_IDENTIFIER must be non-NULL. Print messages about
1919 object whenever allocfn is NULL, rather than only when DECL_P
1920 is true. Use %qE instead of %qD for that. Formatting fixes.
1921
1922 2021-01-20 Richard Biener <rguenther@suse.de>
1923
1924 PR tree-optimization/98758
1925 * tree-data-ref.c (int_divides_p): Use lambda_int arguments.
1926 (lambda_matrix_right_hermite): Avoid undefinedness with
1927 signed integer abs and multiplication.
1928 (analyze_subscript_affine_affine): Use lambda_int.
1929
1930 2021-01-20 David Malcolm <dmalcolm@redhat.com>
1931
1932 PR debug/98751
1933 * dwarf2out.c (output_line_info): Rename static variable
1934 "generation", moving it out of the function to...
1935 (output_line_info_generation): New.
1936 (init_sections_and_labels): Likewise, renaming the variable to...
1937 (init_sections_and_labels_generation): New.
1938 (dwarf2out_c_finalize): Reset the new variables.
1939
1940 2021-01-19 Martin Sebor <msebor@redhat.com>
1941
1942 PR middle-end/98664
1943 * tree-ssa-live.c (remove_unused_scope_block_p): Keep scopes for
1944 all functions, even if they're not declared artificial or inline.
1945 * tree.c (tree_inlined_location): Use macro expansion location
1946 only if scope traversal fails to expose one.
1947
1948 2021-01-19 Richard Sandiford <richard.sandiford@arm.com>
1949
1950 PR rtl-optimization/92294
1951 * alias.c (compare_base_symbol_refs): Take an extra parameter
1952 and add the distance between two symbols to it. Enshrine in
1953 comments that -1 means "either 0 or 1, but we can't tell
1954 which at compile time".
1955 (memrefs_conflict_p): Update call accordingly.
1956 (rtx_equal_for_memref_p): Likewise. Take the distance between symbols
1957 into account.
1958
1959 2021-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1960
1961 * config/aarch64/aarch64-simd-builtins.def (sqshl, uqshl,
1962 sqrshl, uqrshl, sqadd, uqadd, sqsub, uqsub, suqadd, usqadd, sqmovn,
1963 uqmovn, sqxtn2, uqxtn2, sqabs, sqneg, sqdmlal, sqdmlsl, sqdmlal_lane,
1964 sqdmlsl_lane, sqdmlal_laneq, sqdmlsl_laneq, sqdmlal_n, sqdmlsl_n,
1965 sqdmlal2, sqdmlsl2, sqdmlal2_lane, sqdmlsl2_lane, sqdmlal2_laneq,
1966 sqdmlsl2_laneq, sqdmlal2_n, sqdmlsl2_n, sqdmull, sqdmull_lane,
1967 sqdmull_laneq, sqdmull_n, sqdmull2, sqdmull2_lane, sqdmull2_laneq,
1968 sqdmull2_n, sqdmulh, sqrdmulh, sqdmulh_lane, sqdmulh_laneq,
1969 sqrdmulh_lane, sqrdmulh_laneq, sqshrun_n, sqrshrun_n, sqshrn_n,
1970 uqshrn_n, sqrshrn_n, uqrshrn_n, sqshlu_n, sqshl_n, uqshl_n, sqrdmlah,
1971 sqrdmlsh, sqrdmlah_lane, sqrdmlsh_lane, sqrdmlah_laneq, sqrdmlsh_laneq,
1972 sqmovun): Use NONE flags.
1973
1974 2021-01-19 Richard Biener <rguenther@suse.de>
1975
1976 PR ipa/98330
1977 * ipa-modref.c (analyze_stmt): Only record a summary for a
1978 direct call.
1979
1980 2021-01-19 Richard Biener <rguenther@suse.de>
1981
1982 PR middle-end/98638
1983 * tree-ssanames.c (fini_ssanames): Zero SSA_NAME_DEF_STMT.
1984
1985 2021-01-19 Daniel Hellstrom <daniel@gaisler.com>
1986
1987 * config/sparc/rtemself.h (TARGET_OS_CPP_BUILTINS): Add
1988 built-in define __FIX_LEON3FT_TN0018.
1989
1990 2021-01-19 Richard Biener <rguenther@suse.de>
1991
1992 PR ipa/97673
1993 * tree-inline.c (tree_function_versioning): Set input_location
1994 to UNKNOWN_LOCATION throughout the function.
1995
1996 2021-01-19 Tobias Burnus <tobias@codesourcery.com>
1997
1998 PR fortran/98476
1999 * omp-low.c (lower_omp_target): Handle nonpointer is_device_ptr.
2000
2001 2021-01-19 Martin Jambor <mjambor@suse.cz>
2002
2003 PR ipa/98690
2004 * ipa-sra.c (ssa_name_only_returned_p): New parameter fun. Check
2005 whether non-call exceptions allow removal of a statement.
2006 (isra_analyze_call): Pass the appropriate function to
2007 ssa_name_only_returned_p.
2008
2009 2021-01-19 Geng Qi <gengqi@linux.alibaba.com>
2010
2011 * config/riscv/arch-canonicalize (longext_sort): New function for
2012 sorting 'multi-letter'.
2013 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in
2014 'alts'. The 'arch' may not be the first of 'alts'.
2015 (_expand_combination): Add underline for the 'ext' without '*'.
2016 This is because, a single-letter extension can always be treated well
2017 with a '_' prefix, but it cannot be separated out if it is appended
2018 to a multi-letter.
2019
2020 2021-01-18 Vladimir N. Makarov <vmakarov@redhat.com>
2021
2022 PR target/97847
2023 * ira.c (ira): Skip abnormal critical edge splitting.
2024
2025 2021-01-18 Jakub Jelinek <jakub@redhat.com>
2026
2027 PR tree-optimization/98727
2028 * tree-ssa-math-opts.c (match_arith_overflow): Fix up computation of
2029 second .MUL_OVERFLOW operand for signed multiplication with overflow
2030 checking if the second operand of multiplication is not constant.
2031
2032 2021-01-18 David Edelsohn <dje.gcc@gmail.com>
2033
2034 * doc/invoke.texi (-gdwarf): TPF defaults to version 2 and AIX
2035 defaults to version 4.
2036
2037 2021-01-18 David Malcolm <dmalcolm@redhat.com>
2038
2039 * attribs.h (fndecl_dealloc_argno): New decl.
2040 * builtins.c (call_dealloc_argno): Split out second half of
2041 function into...
2042 (fndecl_dealloc_argno): New.
2043 * doc/extend.texi (Common Function Attributes): Document the
2044 interaction between the analyzer and the malloc attribute.
2045 * doc/invoke.texi (Static Analyzer Options): Likewise.
2046
2047 2021-01-17 David Edelsohn <dje.gcc@gmail.com>
2048
2049 * config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Override
2050 dwarf_version to 4.
2051 * config/rs6000/aix72.h (SUBTARGET_OVERRIDE_OPTIONS): Same.
2052
2053 2021-01-17 Martin Jambor <mjambor@suse.cz>
2054
2055 PR ipa/98222
2056 * cgraph.c (clone_of_p): Check also former_clone_of as we climb
2057 the clone tree.
2058
2059 2021-01-17 Mark Wielaard <mark@klomp.org>
2060
2061 * common.opt (gdwarf-): Init(5).
2062 * doc/invoke.texi (-gdwarf): Document default to 5.
2063
2064 2021-01-16 Kwok Cheung Yeung <kcy@codesourcery.com>
2065
2066 * builtin-types.def
2067 (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT): Rename
2068 to...
2069 (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR):
2070 ...this. Add extra argument.
2071 * gimplify.c (omp_default_clause): Ensure that event handle is
2072 firstprivate in a task region.
2073 (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_DETACH.
2074 (gimplify_adjust_omp_clauses): Likewise.
2075 * omp-builtins.def (BUILT_IN_GOMP_TASK): Change function type to
2076 BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR.
2077 * omp-expand.c (expand_task_call): Add GOMP_TASK_FLAG_DETACH to flags
2078 if detach clause specified. Add detach argument when generating
2079 call to GOMP_task.
2080 * omp-low.c (scan_sharing_clauses): Setup data environment for detach
2081 clause.
2082 (finish_taskreg_scan): Move field for variable containing the event
2083 handle to the front of the struct.
2084 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DETACH. Fix
2085 ordering.
2086 * tree-nested.c (convert_nonlocal_omp_clauses): Handle
2087 OMP_CLAUSE_DETACH clause.
2088 (convert_local_omp_clauses): Handle OMP_CLAUSE_DETACH clause.
2089 * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_DETACH.
2090 * tree.c (omp_clause_num_ops): Add entry for OMP_CLAUSE_DETACH.
2091 Fix ordering.
2092 (omp_clause_code_name): Add entry for OMP_CLAUSE_DETACH. Fix
2093 ordering.
2094 (walk_tree_1): Handle OMP_CLAUSE_DETACH.
2095
2096 2021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
2097
2098 * config/nios2/t-rtems: Reset all MULTILIB_* variables. Shorten
2099 multilib directory names. Use MULTILIB_REQUIRED instead of
2100 MULTILIB_EXCEPTIONS. Add -mhw-mul -mhw-mulx -mhw-div
2101 -mcustom-fpu-cfg=fph2 multilib.
2102
2103 2021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
2104
2105 * config/nios2/nios2.c (NIOS2_FPU_CONFIG_NUM): Adjust value.
2106 (nios2_init_fpu_configs): Provide register values for new
2107 -mcustom-fpu-cfg=fph2 option variant.
2108 * doc/invoke.texi (-mcustom-fpu-cfg=fph2): Document new option
2109 variant.
2110
2111 2021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
2112
2113 * config/nios2/nios2.c (nios2_custom_check_insns): Remove
2114 custom instruction warnings.
2115
2116 2021-01-16 Jakub Jelinek <jakub@redhat.com>
2117
2118 PR tree-optimization/96669
2119 * match.pd ((CST << x) & 1 -> x == 0): New simplification.
2120
2121 2021-01-16 Jakub Jelinek <jakub@redhat.com>
2122
2123 PR tree-optimization/96271
2124 * passes.def: Pass false argument to first two pass_cd_dce
2125 instances and true to last instance. Add comment that
2126 last instance rewrites no longer addressed locals.
2127 * tree-ssa-dce.c (pass_cd_dce): Add update_address_taken_p member and
2128 initialize it.
2129 (pass_cd_dce::set_pass_param): New method.
2130 (pass_cd_dce::execute): Return TODO_update_address_taken from
2131 last cd_dce instance.
2132
2133 2021-01-15 Carl Love <cel@us.ibm.com>
2134
2135 * config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod):
2136 New defines.
2137 * config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
2138 * config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI,
2139 DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI,
2140 DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI,
2141 MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI):
2142 Add builtin define.
2143 (MULH, DIVE, MOD): Add new BU_P10_OVERLOAD_2 definitions.
2144 * config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
2145 VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH):
2146 New overloaded definitions.
2147 (builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI,
2148 P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI,
2149 P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI,
2150 P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI,
2151 P10V_BUILTIN_MULHU_V4SI]: Add case
2152 statement for builtins.
2153 * config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI.
2154 * config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md.
2155 (UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions.
2156 (vsx_mul_v2di): Add if TARGET_POWER10 statement.
2157 (vsx_udiv_v2di): Add if TARGET_POWER10 statement.
2158 (dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3,
2159 mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3):
2160 Add define_insn, mode is VIlong.
2161 * doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod):
2162 Add builtin descriptions.
2163
2164 2021-01-15 Eric Botcazou <ebotcazou@adacore.com>
2165
2166 * final.c (final_start_function_1): Reset force_source_line.
2167
2168 2021-01-15 Jakub Jelinek <jakub@redhat.com>
2169
2170 PR tree-optimization/96669
2171 * match.pd (((1 << A) & 1) != 0 -> A == 0,
2172 ((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by
2173 possibly different power of two constants and to right shift too.
2174
2175 2021-01-15 Jakub Jelinek <jakub@redhat.com>
2176
2177 PR tree-optimization/96681
2178 * match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification.
2179 ((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise.
2180 ((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise.
2181 ((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise.
2182
2183 2021-01-15 Alexandre Oliva <oliva@adacore.com>
2184
2185 * opts.c (gen_command_line_string): Exclude -dumpbase-ext.
2186
2187 2021-01-15 Tamar Christina <tamar.christina@arm.com>
2188
2189 * config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4,
2190 cmul<conj_op><mode>3): New.
2191 * config/aarch64/iterators.md (UNSPEC_FCMUL,
2192 UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ,
2193 UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180,
2194 FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1,
2195 sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New.
2196 (rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180.
2197 (rot_op): Renamed to conj_op.
2198 * config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4,
2199 cmul<conj_op><mode>3): New.
2200 * config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4,
2201 cmul<conj_op><mode>3): New.
2202
2203 2021-01-15 David Malcolm <dmalcolm@redhat.com>
2204
2205 PR bootstrap/98696
2206 * diagnostic.c
2207 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
2208 Escape the tempfile name when constructing the expected output.
2209
2210 2021-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2211
2212 * config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>):
2213 Rename to...
2214 (aarch64_<su>mlsl_hi<mode>): ... This.
2215 (aarch64_<su>mlsl_hi<mode>): Define.
2216 (*aarch64_<su>mlsl<mode): Rename to...
2217 (aarch64_<su>mlsl<mode): ... This.
2218 * config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl,
2219 smlsl_hi, umlsl_hi): Define builtins.
2220 * config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16,
2221 vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32,
2222 vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8,
2223 vmlsl_u16, vmlsl_u32): Reimplement with builtins.
2224
2225 2021-01-15 Uroš Bizjak <ubizjak@gmail.com>
2226
2227 * config/i386/i386-c.c (ix86_target_macros):
2228 Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition.
2229
2230 2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
2231
2232 PR target/88836
2233 * config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs.
2234 * Makefile.in (RTL_SSA_H): New variable.
2235 * config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule.
2236 * config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare.
2237 * config/aarch64/aarch64-passes.def: Add pass_cc_fusion after
2238 pass_combine.
2239 * config/aarch64/aarch64-cc-fusion.cc: New file.
2240
2241 2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
2242
2243 * recog.h (insn_change_watermark::~insn_change_watermark): Avoid
2244 calling cancel_changes for changes that no longer exist.
2245
2246 2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
2247
2248 * rtl-ssa/functions.h (function_info::ref_defs): Rename to...
2249 (function_info::reg_defs): ...this.
2250 * rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to...
2251 (function_info::reg_defs): ...this.
2252
2253 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
2254
2255 PR target/71233
2256 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
2257
2258 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
2259
2260 Revert:
2261 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
2262
2263 PR target/71233
2264 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
2265
2266 2021-01-15 Richard Biener <rguenther@suse.de>
2267
2268 PR tree-optimization/96376
2269 * tree-vect-stmts.c (get_load_store_type): Disregard alignment
2270 for VMAT_INVARIANT.
2271
2272 2021-01-15 Martin Liska <mliska@suse.cz>
2273
2274 * doc/install.texi: Document that some tests need pytest module.
2275 * doc/sourcebuild.texi: Likewise.
2276
2277 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
2278
2279 PR target/71233
2280 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
2281
2282 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
2283
2284 * config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry.
2285 (mve_vshrq_n_u<mode>_imm): Likewise.
2286 * config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ...
2287 * config/arm/vec-common.md: ... here.
2288
2289 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
2290
2291 * config/arm/mve.md (mve_vshlq_<supf><mode>): Move to
2292 vec-commond.md.
2293 * config/arm/neon.md (vashl<mode>3): Delete.
2294 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): New.
2295 (vasl<mode>3): New expander.
2296
2297 2021-01-15 Richard Biener <rguenther@suse.de>
2298
2299 PR tree-optimization/98685
2300 * tree-vect-slp.c (vect_schedule_slp_node): Refactor handling
2301 of vector extern defs.
2302
2303 2021-01-14 David Malcolm <dmalcolm@redhat.com>
2304
2305 PR jit/98586
2306 * diagnostic.c (diagnostic_kind_text): Break out this array
2307 from...
2308 (diagnostic_build_prefix): ...here.
2309 (fancy_abort): Detect when diagnostic_initialize has not yet been
2310 called and fall back to a minimal implementation of printing the
2311 ICE, rather than segfaulting in internal_error.
2312
2313 2021-01-14 David Malcolm <dmalcolm@redhat.com>
2314
2315 * diagnostic.c (diagnostic_initialize): Eliminate
2316 parseable_fixits_p in favor of initializing extra_output_kind from
2317 GCC_EXTRA_DIAGNOSTIC_OUTPUT.
2318 (convert_column_unit): New function, split out from...
2319 (diagnostic_converted_column): ...this.
2320 (print_parseable_fixits): Add "column_unit" and "tabstop" params.
2321 Use them to call convert_column_unit on the column values.
2322 (diagnostic_report_diagnostic): Eliminate conditional on
2323 parseable_fixits_p in favor of a switch statement on
2324 extra_output_kind, passing the appropriate values to the new
2325 params of print_parseable_fixits.
2326 (selftest::test_print_parseable_fixits_none): Update for new
2327 params of print_parseable_fixits.
2328 (selftest::test_print_parseable_fixits_insert): Likewise.
2329 (selftest::test_print_parseable_fixits_remove): Likewise.
2330 (selftest::test_print_parseable_fixits_replace): Likewise.
2331 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
2332 New.
2333 (selftest::diagnostic_c_tests): Call it.
2334 * diagnostic.h (enum diagnostics_extra_output_kind): New.
2335 (diagnostic_context::parseable_fixits_p): Delete field in favor
2336 of...
2337 (diagnostic_context::extra_output_kind): ...this new field.
2338 * doc/invoke.texi (Environment Variables): Add
2339 GCC_EXTRA_DIAGNOSTIC_OUTPUT.
2340 * opts.c (common_handle_option): Update handling of
2341 OPT_fdiagnostics_parseable_fixits for change to diagnostic_context
2342 fields.
2343
2344 2021-01-14 Tamar Christina <tamar.christina@arm.com>
2345
2346 * tree-vect-slp-patterns.c (class complex_operations_pattern,
2347 complex_operations_pattern::matches,
2348 complex_operations_pattern::recognize,
2349 complex_operations_pattern::build): New.
2350 (slp_patterns): Use it.
2351
2352 2021-01-14 Tamar Christina <tamar.christina@arm.com>
2353
2354 * internal-fn.def (COMPLEX_FMS, COMPLEX_FMS_CONJ): New.
2355 * optabs.def (cmls_optab, cmls_conj_optab): New.
2356 * doc/md.texi: Document them.
2357 * tree-vect-slp-patterns.c (class complex_fms_pattern,
2358 complex_fms_pattern::matches, complex_fms_pattern::recognize,
2359 complex_fms_pattern::build): New.
2360
2361 2021-01-14 Tamar Christina <tamar.christina@arm.com>
2362
2363 * internal-fn.def (COMPLEX_FMA, COMPLEX_FMA_CONJ): New.
2364 * optabs.def (cmla_optab, cmla_conj_optab): New.
2365 * doc/md.texi: Document them.
2366 * tree-vect-slp-patterns.c (vect_match_call_p,
2367 class complex_fma_pattern, vect_slp_reset_pattern,
2368 complex_fma_pattern::matches, complex_fma_pattern::recognize,
2369 complex_fma_pattern::build): New.
2370
2371 2021-01-14 Tamar Christina <tamar.christina@arm.com>
2372
2373 * internal-fn.def (COMPLEX_MUL, COMPLEX_MUL_CONJ): New.
2374 * optabs.def (cmul_optab, cmul_conj_optab): New.
2375 * doc/md.texi: Document them.
2376 * tree-vect-slp-patterns.c (vect_match_call_complex_mla,
2377 vect_normalize_conj_loc, is_eq_or_top, vect_validate_multiplication,
2378 vect_build_combine_node, class complex_mul_pattern,
2379 complex_mul_pattern::matches, complex_mul_pattern::recognize,
2380 complex_mul_pattern::build): New.
2381
2382 2021-01-14 Tamar Christina <tamar.christina@arm.com>
2383
2384 * tree-vect-slp.c (optimize_load_redistribution_1): New.
2385 (optimize_load_redistribution, vect_is_slp_load_node): New.
2386 (vect_match_slp_patterns): Use it.
2387
2388 2021-01-14 Tamar Christina <tamar.christina@arm.com>
2389
2390 * tree-vect-slp-patterns.c (complex_add_pattern::build):
2391 Elide nodes.
2392
2393 2021-01-14 Thomas Schwinge <thomas@codesourcery.com>
2394
2395 * config/gcn/mkoffload.c (main): Create an offload image only in
2396 64-bit configurations.
2397
2398 2021-01-14 H.J. Lu <hjl.tools@gmail.com>
2399
2400 PR target/98667
2401 * config/i386/i386-options.c (ix86_option_override_internal):
2402 Issue an error for -fcf-protection with CF_BRANCH when compiling
2403 for 32-bit non-TARGET_CMOV targets.
2404
2405 2021-01-14 Uroš Bizjak <ubizjak@gmail.com>
2406
2407 PR target/98671
2408 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
2409 Remove declaration and initialization of shadow variable "ret".
2410 (ix86_option_override_internal): Remove delcaration of
2411 shadow variable "i". Redeclare shadowed variable to unsigned.
2412 * common/config/i386/i386-common.c (pta_size): Redeclare to unsigned.
2413 * config/i386/i386-builtins.c (get_builtin_code_for_version):
2414 Update for redeclaration.
2415 * config/i386/i386.h (pta_size): Ditto.
2416
2417 2021-01-14 Richard Biener <rguenther@suse.de>
2418
2419 PR tree-optimization/98674
2420 * tree-data-ref.c (base_supports_access_fn_components_p): New.
2421 (initialize_data_dependence_relation): For two bases without
2422 possible access fns resort to type size equality when determining
2423 shape compatibility.
2424
2425 2021-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2426
2427 PR target/66791
2428 * config/arm/arm_neon.h: Replace calls to __builtin_vcge* by
2429 <=, >= operators in vcle and vcge intrinsics respectively.
2430 * config/arm/arm_neon_builtins.def: Remove entry for
2431 vcge and vcgeu.
2432
2433 2021-01-14 Uroš Bizjak <ubizjak@gmail.com>
2434
2435 PR target/98671
2436 * config/i386/i386-options.c (ix86_function_specific_save):
2437 Remove redundant assignment to opts->x_ix86_branch_cost.
2438 * config/i386/i386.c (ix86_prefetch_sse):
2439 Rename from x86_prefetch_sse. Update all uses.
2440 * config/i386/i386.h: Update for rename.
2441 * config/i386/i386-options.h: Ditto.
2442
2443 2021-01-14 Jakub Jelinek <jakub@redhat.com>
2444
2445 PR target/98670
2446 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3,
2447 *sse4_1_zero_extendv4hiv4si2_3, *sse4_1_zero_extendv2siv2di2_3):
2448 Use Bm instead of m for non-avx. Add isa attribute.
2449
2450 2021-01-14 Jakub Jelinek <jakub@redhat.com>
2451
2452 PR tree-optimization/96688
2453 * match.pd (~(X >> Y) -> ~X >> Y): New simplification if
2454 ~X can be simplified.
2455
2456 2021-01-14 Richard Sandiford <richard.sandiford@arm.com>
2457
2458 * tree-vect-stmts.c (vect_model_load_cost): Account for unused
2459 IFN_LOAD_LANES results.
2460
2461 2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2462
2463 * config/aarch64/aarch64-simd.md (aarch64_<su>xtl<mode>):
2464 Define.
2465 (aarch64_xtn<mode>): Likewise.
2466 * config/aarch64/aarch64-simd-builtins.def (sxtl, uxtl, xtn):
2467 Define
2468 builtins.
2469 * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
2470 builtin.
2471 (vmovl_s16): Likewise.
2472 (vmovl_s32): Likewise.
2473 (vmovl_u8): Likewise.
2474 (vmovl_u16): Likewise.
2475 (vmovl_u32): Likewise.
2476 (vmovn_s16): Likewise.
2477 (vmovn_s32): Likewise.
2478 (vmovn_s64): Likewise.
2479 (vmovn_u16): Likewise.
2480 (vmovn_u32): Likewise.
2481 (vmovn_u64): Likewise.
2482
2483 2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2484
2485 * config/aarch64/aarch64-simd.md (aarch64_<su>qxtn2<mode>_le):
2486 Define.
2487 (aarch64_<su>qxtn2<mode>_be): Likewise.
2488 (aarch64_<su>qxtn2<mode>): Likewise.
2489 * config/aarch64/aarch64-simd-builtins.def (sqxtn2, uqxtn2):
2490 Define builtins.
2491 * config/aarch64/iterators.md (SAT_TRUNC): Define code_iterator.
2492 (su): Handle ss_truncate and us_truncate.
2493 * config/aarch64/arm_neon.h (vqmovn_high_s16): Reimplement using
2494 builtin.
2495 (vqmovn_high_s32): Likewise.
2496 (vqmovn_high_s64): Likewise.
2497 (vqmovn_high_u16): Likewise.
2498 (vqmovn_high_u32): Likewise.
2499 (vqmovn_high_u64): Likewise.
2500
2501 2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2502
2503 * config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le):
2504 Define.
2505 (aarch64_xtn2<mode>_be): Likewise.
2506 (aarch64_xtn2<mode>): Likewise.
2507 * config/aarch64/aarch64-simd-builtins.def (xtn2): Define
2508 builtins.
2509 * config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using
2510 builtins.
2511 (vmovn_high_s32): Likewise.
2512 (vmovn_high_s64): Likewise.
2513 (vmovn_high_u16): Likewise.
2514 (vmovn_high_u32): Likewise.
2515 (vmovn_high_u64): Likewise.
2516
2517 2021-01-13 Stafford Horne <shorne@gmail.com>
2518
2519 * config/or1k/or1k.h (ASM_PREFERRED_EH_DATA_FORMAT): New macro.
2520
2521 2021-01-13 Stafford Horne <shorne@gmail.com>
2522
2523 * config/or1k/linux.h (TARGET_ASM_FILE_END): Define macro.
2524
2525 2021-01-13 Stafford Horne <shorne@gmail.com>
2526
2527 * config/or1k/or1k.h (TARGET_CPU_CPP_BUILTINS): Add builtin
2528 define for __or1k_hard_float__.
2529
2530 2021-01-13 Stafford Horne <shorne@gmail.com>
2531
2532 * config/or1k/or1k.h (NO_PROFILE_COUNTERS): Define as 1.
2533 (PROFILE_HOOK): Define to call _mcount.
2534 (FUNCTION_PROFILER): Change from abort to no-op.
2535
2536 2021-01-13 Jakub Jelinek <jakub@redhat.com>
2537
2538 PR tree-optimization/96691
2539 * match.pd ((~X | C) ^ D -> (X | C) ^ (~D ^ C),
2540 (~X & C) ^ D -> (X & C) ^ (D ^ C)): New simplifications if
2541 (~D ^ C) or (D ^ C) can be simplified.
2542
2543 2021-01-13 Richard Biener <rguenther@suse.de>
2544
2545 PR tree-optimization/92645
2546 * match.pd (BIT_FIELD_REF to conversion): Delay canonicalization
2547 until after vector lowering.
2548
2549 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
2550
2551 * config/aarch64/aarch64-sve.md (fnma<mode>4): Extend from SVE_FULL_I
2552 to SVE_I.
2553 (@aarch64_pred_fnma<mode>, cond_fnma<mode>, *cond_fnma<mode>_2)
2554 (*cond_fnma<mode>_4, *cond_fnma<mode>_any): Likewise.
2555
2556 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
2557
2558 * config/aarch64/aarch64-sve.md (fma<mode>4): Extend from SVE_FULL_I
2559 to SVE_I.
2560 (@aarch64_pred_fma<mode>, cond_fma<mode>, *cond_fma<mode>_2)
2561 (*cond_fma<mode>_4, *cond_fma<mode>_any): Likewise.
2562
2563 2021-01-13 Richard Biener <rguenther@suse.de>
2564
2565 PR tree-optimization/92645
2566 * tree-vect-slp.c (vect_build_slp_tree_1): Relax supported
2567 BIT_FIELD_REF argument.
2568 (vect_build_slp_tree_2): Record the desired vector type
2569 on the external vector def.
2570 (vectorizable_slp_permutation): Handle required punning
2571 of existing vector defs.
2572
2573 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
2574
2575 * rtl-ssa/accesses.h (def_lookup): Fix order of comparison results.
2576
2577 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
2578
2579 * config/sh/sh.md (movsf_ie): Remove operands[2] test.
2580
2581 2021-01-13 Samuel Thibault <samuel.thibault@ens-lyon.org>
2582
2583 * config.gcc [$target == *-*-gnu*]: Enable
2584 'default_gnu_indirect_function'.
2585
2586 2021-01-13 Jakub Jelinek <jakub@redhat.com>
2587
2588 PR target/95905
2589 * optabs.c (expand_vec_perm_const): Don't force v0 and v1 into
2590 registers before calling targetm.vectorize.vec_perm_const, only after
2591 that.
2592 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): Handle
2593 two argument permutation when one operand is zero vector and only
2594 after that force operands into registers.
2595 * config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_1): New
2596 define_insn_and_split pattern.
2597 (*avx512bw_zero_extendv32qiv32hi2_1): Likewise.
2598 (*avx512f_zero_extendv16hiv16si2_1): Likewise.
2599 (*avx2_zero_extendv8hiv8si2_1): Likewise.
2600 (*avx512f_zero_extendv8siv8di2_1): Likewise.
2601 (*avx2_zero_extendv4siv4di2_1): Likewise.
2602 * config/mips/mips.c (mips_vectorize_vec_perm_const): Force operands
2603 into registers.
2604 * config/arm/arm.c (arm_vectorize_vec_perm_const): Likewise.
2605 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Likewise.
2606 * config/ia64/ia64.c (ia64_vectorize_vec_perm_const): Likewise.
2607 * config/aarch64/aarch64.c (aarch64_vectorize_vec_perm_const): Likewise.
2608 * config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const): Likewise.
2609 * config/gcn/gcn.c (gcn_vectorize_vec_perm_const): Likewise. Use std::swap.
2610
2611 2021-01-13 Martin Liska <mliska@suse.cz>
2612
2613 PR tree-optimization/98455
2614 * gimple-if-to-switch.cc (condition_info::record_phi_mapping):
2615 Record also virtual PHIs.
2616 (pass_if_to_switch::execute): Return TODO_cleanup_cfg only
2617 conditionally.
2618
2619 2021-01-13 Jonathan Wakely <jwakely@redhat.com>
2620
2621 * doc/invoke.texi (C++ Modules): Fix typos.
2622
2623 2021-01-13 Richard Biener <rguenther@suse.de>
2624
2625 PR tree-optimization/98640
2626 * tree-ssa-sccvn.c (visit_nary_op): Do not try to
2627 handle plus or minus from a truncated operand to be
2628 sign-extended.
2629
2630 2021-01-13 Jakub Jelinek <jakub@redhat.com>
2631
2632 PR target/96938
2633 * config/i386/i386.md (*btr<mode>_1, *btr<mode>_2): New
2634 define_insn_and_split patterns.
2635 (splitter after *btr<mode>_2): New splitter.
2636
2637 2021-01-13 Martin Liska <mliska@suse.cz>
2638
2639 PR ipa/98652
2640 * cgraphunit.c (analyze_functions): Remove dead code.
2641
2642 2021-01-13 Qian Jianhua <qianjh@cn.fujitsu.com>
2643
2644 * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
2645 * config/aarch64/aarch64.c (a64fx_addrcost_table): New.
2646 (a64fx_regmove_cost, a64fx_vector_cost): New.
2647 (a64fx_tunings): Use the new added cost tables.
2648
2649 2021-01-13 Jakub Jelinek <jakub@redhat.com>
2650
2651 PR target/95905
2652 * config/i386/predicates.md (pmovzx_parallel): New predicate.
2653 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): New
2654 define_insn_and_split pattern.
2655 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
2656 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
2657
2658 2021-01-13 Julian Brown <julian@codesourcery.com>
2659
2660 * config/gcn/gcn.c (gcn_conditional_register_usage): Remove dead code
2661 to fix v0 register.
2662
2663 2021-01-13 Julian Brown <julian@codesourcery.com>
2664
2665 * config/gcn/gcn.c (gcn_md_reorg): Fix case where EXEC reg is live
2666 on entry to a BB.
2667
2668 2021-01-13 Julian Brown <julian@codesourcery.com>
2669
2670 * config/gcn/gcn-valu.md (recip<mode>2<exec>, recip<mode>2): Use unspec
2671 for reciprocal-approximation instructions.
2672 (div<mode>3): Use fused multiply-accumulate operations for reciprocal
2673 refinement and division result.
2674 * config/gcn/gcn.md (UNSPEC_RCP): New unspec constant.
2675
2676 2021-01-13 Julian Brown <julian@codesourcery.com>
2677
2678 * config/gcn/gcn-valu.md (subdf): Rename to...
2679 (subdf3): This.
2680
2681 2021-01-12 Martin Liska <mliska@suse.cz>
2682
2683 * gcov.c (source_info::debug): Fix printf format for 32-bit hosts.
2684
2685 2021-01-12 Andrea Corallo <andrea.corallo@arm.com>
2686
2687 * function-abi.h: Fix typo.
2688
2689 2021-01-12 Christophe Lyon <christophe.lyon@linaro.org>
2690
2691 PR target/97875
2692 PR target/97875
2693 * config/arm/arm.h (ARM_HAVE_NEON_V8QI_LDST): New macro.
2694 (ARM_HAVE_NEON_V16QI_LDST, ARM_HAVE_NEON_V4HI_LDST): Likewise.
2695 (ARM_HAVE_NEON_V8HI_LDST, ARM_HAVE_NEON_V2SI_LDST): Likewise.
2696 (ARM_HAVE_NEON_V4SI_LDST, ARM_HAVE_NEON_V4HF_LDST): Likewise.
2697 (ARM_HAVE_NEON_V8HF_LDST, ARM_HAVE_NEON_V4BF_LDST): Likewise.
2698 (ARM_HAVE_NEON_V8BF_LDST, ARM_HAVE_NEON_V2SF_LDST): Likewise.
2699 (ARM_HAVE_NEON_V4SF_LDST, ARM_HAVE_NEON_DI_LDST): Likewise.
2700 (ARM_HAVE_NEON_V2DI_LDST): Likewise.
2701 (ARM_HAVE_V8QI_LDST, ARM_HAVE_V16QI_LDST): Likewise.
2702 (ARM_HAVE_V4HI_LDST, ARM_HAVE_V8HI_LDST): Likewise.
2703 (ARM_HAVE_V2SI_LDST, ARM_HAVE_V4SI_LDST, ARM_HAVE_V4HF_LDST): Likewise.
2704 (ARM_HAVE_V8HF_LDST, ARM_HAVE_V4BF_LDST, ARM_HAVE_V8BF_LDST): Likewise.
2705 (ARM_HAVE_V2SF_LDST, ARM_HAVE_V4SF_LDST, ARM_HAVE_DI_LDST): Likewise.
2706 (ARM_HAVE_V2DI_LDST): Likewise.
2707 * config/arm/mve.md (*movmisalign<mode>_mve_store): New pattern.
2708 (*movmisalign<mode>_mve_load): New pattern.
2709 * config/arm/neon.md (movmisalign<mode>): Move to ...
2710 * config/arm/vec-common.md: ... here.
2711
2712 2021-01-12 Vladimir N. Makarov <vmakarov@redhat.com>
2713
2714 PR target/97969
2715 * lra-eliminations.c (eliminate_regs_in_insn): Add transformation
2716 of pattern 'plus (plus (hard reg, const), pseudo)'.
2717
2718 2021-01-12 Richard Biener <rguenther@suse.de>
2719
2720 PR tree-optimization/98550
2721 * tree-vect-slp.c (vect_record_max_nunits): Check whether
2722 the group size is a multiple of the vector element count.
2723 (vect_build_slp_tree_1): When we need to fail because
2724 the vector type choosen causes unrolling do so lazily
2725 without affecting matches only at the end to guide group splitting.
2726
2727 2021-01-12 Martin Liska <mliska@suse.cz>
2728
2729 PR c++/97284
2730 * optc-save-gen.awk: Compare also n_target_save vars with
2731 strcmp.
2732
2733 2021-01-12 Martin Liska <mliska@suse.cz>
2734
2735 * gcov.c (source_info::debug): New.
2736 (print_usage): Add --debug (-D) option.
2737 (process_args): Likewise.
2738 (generate_results): Call src->debug after
2739 accumulate_line_counts.
2740 (read_graph_file): Properly assign id for EXIT_BLOCK.
2741 * profile.c (branch_prob): Dump function body before it is
2742 instrumented.
2743
2744 2021-01-12 Jakub Jelinek <jakub@redhat.com>
2745
2746 PR tree-optimization/98629
2747 * tree-ssa-math-opts.c (arith_overflow_check_p): Don't update use_stmt
2748 unless returning non-zero.
2749
2750 2021-01-12 Jakub Jelinek <jakub@redhat.com>
2751
2752 PR tree-optimization/95731
2753 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
2754 x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z.
2755 (optimize_range_tests): Call optimize_range_tests_cmp_bitwise
2756 only after optimize_range_tests_var_bound.
2757
2758 2021-01-12 Jakub Jelinek <jakub@redhat.com>
2759
2760 * configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@.
2761 * configure: Regenerated.
2762
2763 2021-01-12 liuhongt <hongtao.liu@intel.com>
2764
2765 PR target/98612
2766 * config/i386/i386-builtins.h (BUILTIN_DESC_SWAP_OPERANDS):
2767 Deleted.
2768 * config/i386/i386-expand.c (ix86_expand_sse_comi): Delete
2769 dead code.
2770
2771 2021-01-12 Alexandre Oliva <oliva@adacore.com>
2772
2773 * ssa-iterators.h (end_imm_use_stmt_traverse): Forward
2774 declare.
2775 (auto_end_imm_use_stmt_traverse): New struct.
2776 (FOR_EACH_IMM_USE_STMT): Use it.
2777 (BREAK_FROM_IMM_USE_STMT, RETURN_FROM_IMM_USE_STMT): Remove,
2778 along with uses...
2779 * gimple-ssa-strength-reduction.c: ... here, ...
2780 * graphite-scop-detection.c: ... here, ...
2781 * ipa-modref.c, ipa-pure-const.c, ipa-sra.c: ... here, ...
2782 * tree-predcom.c, tree-ssa-ccp.c: ... here, ...
2783 * tree-ssa-dce.c, tree-ssa-dse.c: ... here, ...
2784 * tree-ssa-loop-ivopts.c, tree-ssa-math-opts.c: ... here, ...
2785 * tree-ssa-phiprop.c, tree-ssa.c: ... here, ...
2786 * tree-vect-slp.c: ... and here, ...
2787 * doc/tree-ssa.texi: ... and the example here.
2788
2789 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2790
2791 * config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from
2792 SVE_FULL_I to SVE_I. Generate an UNSPEC_PRED_X.
2793 (*sdiv_pow2<mode>3): New pattern.
2794 (@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I.
2795 Wrap the ASRD in an UNSPEC_PRED_X.
2796 (*cond_<sve_int_op><mode>_2): Likewise. Replace the UNSPEC_PRED_X
2797 predicate with a constant PTRUE, if it isn't already.
2798 (*cond_<sve_int_op><mode>_z): Replace with...
2799 (*cond_<sve_int_op><mode>_any): ...this new pattern.
2800
2801 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2802
2803 * config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from
2804 SVE_FULL_I to SVE_I.
2805 (*cond_bic<mode>_any): Likewise.
2806
2807 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2808
2809 * config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart)
2810 (@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I
2811 to SVE_I.
2812
2813 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2814
2815 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from
2816 SVE_FULL_I to SVE_I.
2817 (*aarch64_cond_<su>abd<mode>_2): Likewise.
2818 (*aarch64_cond_<su>abd<mode>_any): Likewise.
2819 (@aarch64_pred_<su>abd<mode>): Likewise. Use UNSPEC_PRED_X
2820 for the max and min but not for the minus.
2821 (*aarch64_cond_<su>abd<mode>_3): New pattern.
2822
2823 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2824
2825 * config/aarch64/iterators.md (SVE_24I): New iterator.
2826 * config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from
2827 SVE_FULL_SDI to SVE_24I. Use containers rather than elements.
2828
2829 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2830
2831 * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>)
2832 (*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I
2833 to SVE_I.
2834 (*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise.
2835 (*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise.
2836 (*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise.
2837 (*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise.
2838
2839 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2840
2841 * config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3)
2842 (@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>)
2843 (*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I
2844 to SVE_I.
2845
2846 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
2847
2848 * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3)
2849 (v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>)
2850 (*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I.
2851
2852 2021-01-11 Martin Liska <mliska@suse.cz>
2853
2854 PR jit/98615
2855 * symtab-clones.h (clone_info::release): Release
2856 symtab::m_clones with ggc_delete as it's a GGC memory.
2857
2858 2021-01-11 Matthias Klose <doko@ubuntu.com>
2859
2860 * Makefile.in (LINK_PROGRESS): Show the link target.
2861
2862 2021-01-11 Richard Biener <rguenther@suse.de>
2863
2864 PR tree-optimization/91403
2865 * tree-vect-data-refs.c (vect_analyze_group_access_1): Cap
2866 single-element interleaving group size at 4096 elements.
2867
2868 2021-01-11 Richard Biener <rguenther@suse.de>
2869
2870 PR tree-optimization/98526
2871 * tree-vect-loop.c (vect_model_reduction_cost): Remove costing
2872 of the actual reduction op for the regular case.
2873 (vectorizable_reduction): Cost the stmts
2874 vect_transform_reduction produces here.
2875
2876 2021-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
2877
2878 * tree-ssa-forwprop.c (simplify_vector_constructor): For
2879 big-endian, use UNPACK[_FLOAT]_HI.
2880
2881 2021-01-11 Tamar Christina <tamar.christina@arm.com>
2882
2883 * tree-vect-slp-patterns.c (class complex_pattern,
2884 class complex_add_pattern): Add parameters to matches.
2885 (complex_add_pattern::build): Free memory.
2886 (complex_add_pattern::matches): Move validation end of match.
2887 (complex_add_pattern::recognize): Likewise.
2888
2889 2021-01-11 Tamar Christina <tamar.christina@arm.com>
2890
2891 * tree-vect-slp-patterns.c (linear_loads_p): Fix externals.
2892
2893 2021-01-11 Tamar Christina <tamar.christina@arm.com>
2894
2895 * tree-vect-slp-patterns.c (is_linear_load_p): Fix ambiguity.
2896
2897 2021-01-11 Jakub Jelinek <jakub@redhat.com>
2898
2899 PR tree-optimization/95867
2900 * tree-ssa-math-opts.h: New header.
2901 * tree-ssa-math-opts.c: Include tree-ssa-math-opts.h.
2902 (powi_as_mults): No longer static. Use build_one_cst instead of
2903 build_real. Formatting fix.
2904 * tree-ssa-reassoc.c: Include tree-ssa-math-opts.h.
2905 (attempt_builtin_powi): Handle multiplication reassociation without
2906 powi_fndecl using powi_as_mults.
2907 (reassociate_bb): For integral types don't require
2908 -funsafe-math-optimizations to call attempt_builtin_powi.
2909
2910 2021-01-11 Jakub Jelinek <jakub@redhat.com>
2911
2912 PR tree-optimization/95852
2913 * tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change
2914 mul_stmts parameter type to vec<gimple *> &. Before cond_stmt
2915 allow in the bb any of the stmts in that vector, div_stmt and
2916 up to 3 cast stmts.
2917 (arith_cast_equal_p): New function.
2918 (arith_overflow_check_p): Add cast_stmt argument, handle signed
2919 multiply overflow checks.
2920 (match_arith_overflow): Adjust caller. Handle signed multiply
2921 overflow checks.
2922
2923 2021-01-11 Jakub Jelinek <jakub@redhat.com>
2924
2925 PR tree-optimization/95852
2926 * tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function.
2927 (uaddsub_overflow_check_p): Renamed to ...
2928 (arith_overflow_check_p): ... this. Handle also multiplication
2929 with overflow check.
2930 (match_uaddsub_overflow): Renamed to ...
2931 (match_arith_overflow): ... this. Add cfg_changed argument. Handle
2932 also multiplication with overflow check. Adjust function comment.
2933 (math_opts_dom_walker::after_dom_children): Adjust callers. Call
2934 match_arith_overflow also for MULT_EXPR.
2935
2936 2021-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2937
2938 * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
2939 __builtin_convertvector.
2940 (vmovl_s16): Likewise.
2941 (vmovl_s32): Likewise.
2942 (vmovl_u8): Likewise.
2943 (vmovl_u16): Likewise.
2944 (vmovl_u32): Likewise.
2945 (vmovn_s16): Likewise.
2946 (vmovn_s32): Likewise.
2947 (vmovn_s64): Likewise.
2948 (vmovn_u16): Likewise.
2949 (vmovn_u32): Likewise.
2950 (vmovn_u64): Likewise.
2951
2952 2021-01-11 Martin Liska <mliska@suse.cz>
2953
2954 * gimple-if-to-switch.cc (struct condition_info): Use auto_var.
2955 (if_chain::is_beneficial): Delete clusters
2956 (find_conditions): Make second argument of conditions_in_bbs a
2957 pointer so that we control over it's lifetime.
2958 (pass_if_to_switch::execute): Delete them.
2959
2960 2021-01-11 Kewen Lin <linkw@linux.ibm.com>
2961
2962 * ira.c (move_unallocated_pseudos): Check other_reg and skip if
2963 it isn't set.
2964
2965 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
2966
2967 * config/vax/vax.md (cc): Remove mode attribute.
2968 (subst_<cc>, subst_f<cc>): Rename to...
2969 (subst_<mode>, subst_f<VAXccnz:mode>): ... these respectively.
2970 (*cbranch<VAXint:mode>4_<VAXcc:mode>): Update for `cc' removal.
2971 (*cbranch<VAXfp:mode>4_<VAXccnz:mode>): Likewise.
2972 (*branch_<mode>, *branch_<mode>_reversed): Likewise.
2973
2974 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
2975
2976 * config/vax/vax.md (subst_f<cc>): Add mode to operands and
2977 `const_double_zero'.
2978
2979 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
2980
2981 * config/pdp11/pdp11.md (PDPfp): New mode iterator.
2982 (fcc_cc, fcc_ccnz): Use it. Add mode to `const_double_zero' and
2983 operands.
2984
2985 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
2986
2987 * genemit.c (gen_exp) <CONST_DOUBLE>: Handle `const_double_zero'
2988 rtx.
2989 * read-rtl.c (rtx_reader::read_rtx_code): Handle machine mode
2990 with `const_double_zero'.
2991 * doc/rtl.texi (Constant Expression Types): Document it.
2992
2993 2021-01-09 Jakub Jelinek <jakub@redhat.com>
2994
2995 PR c++/98556
2996 * tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
2997 POINTER_DIFF_EXPR to be any integral type.
2998
2999 2021-01-09 Jakub Jelinek <jakub@redhat.com>
3000
3001 PR rtl-optimization/98603
3002 * function.c (instantiate_virtual_regs_in_insn): For asm goto
3003 with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL
3004 if any, set ASM_OPERANDS mode to VOIDmode and change
3005 ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX.
3006
3007 2021-01-09 Alexandre Oliva <oliva@gnu.org>
3008
3009 PR debug/97714
3010 * final.c (notice_source_line): Narrow down the condition to
3011 skip a line-0 marker.
3012
3013 2021-01-08 Sergei Trofimovich <siarheit@google.com>
3014
3015 * ipa-modref.c (merge_call_side_effects): Fix
3016 linebreak split by reordering two print calls.
3017
3018 2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
3019
3020 * config/s390/vector.md (*tf_to_fprx2_0): Rename from
3021 "*mov_tf_to_fprx2_0" for consistency, fix constraint.
3022 (*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
3023 consistency, fix constraint.
3024
3025 2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
3026
3027 * config/s390/s390-c.c (s390_def_or_undef_macro): Accept
3028 callables instead of mask values.
3029 (struct target_flag_set_p): New predicate.
3030 (s390_cpu_cpp_builtins_internal): Define or undefine
3031 __LONG_DOUBLE_VX__ macro.
3032
3033 2021-01-08 H.J. Lu <hjl.tools@gmail.com>
3034
3035 PR target/98482
3036 * config/i386/i386.c (x86_function_profiler): Use R10 and R11
3037 to call mcount in large model with PIC for NO_PROFILE_COUNTERS
3038 targets.
3039
3040 2021-01-08 Richard Biener <rguenther@suse.de>
3041
3042 * tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.
3043
3044 2021-01-08 Richard Biener <rguenther@suse.de>
3045
3046 * tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
3047 (vect_build_slp_tree): On cache hit release the matched
3048 scalar stmts vector.
3049 * tree-vect-stmts.c (vectorizable_store): Properly free
3050 vec_oprnds before possibly gathering them again.
3051
3052 2021-01-08 Richard Biener <rguenther@suse.de>
3053
3054 PR tree-optimization/98544
3055 * tree-vect-slp.c (vect_optimize_slp): Always materialize
3056 permutes at a permute node.
3057
3058 2021-01-08 H.J. Lu <hjl.tools@gmail.com>
3059
3060 PR target/98482
3061 * config/i386/i386.c (x86_function_profiler): Use R10 to call
3062 mcount in large model. Sorry for large model with PIC.
3063
3064 2021-01-08 Jakub Jelinek <jakub@redhat.com>
3065
3066 PR target/98585
3067 * config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
3068 ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
3069 ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
3070 TargetSave and initialize for variables with enum types.
3071 (mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
3072 mstack-protector-guard-symbol=): Add Save.
3073 * config/i386/i386-options.c (ix86_function_specific_save,
3074 ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
3075 x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
3076 x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
3077 x_ix86_veclibabi_type.
3078
3079 2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
3080
3081 * config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
3082 SVE_FULL_I to SVE_I.
3083 (*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
3084
3085 2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
3086
3087 * config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
3088 SVE_FULL_I to SVE_I.
3089 (*cond_uxt<mode>_any): Likewise.
3090
3091 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3092
3093 * config/aarch64/iterators.md (Vwhalf): New iterator.
3094 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
3095 Rename to...
3096 (aarch64_<sur>adalp<mode>): ... This. Make more
3097 builtin-friendly.
3098 (<sur>sadv16qi): Adjust callsite of the above.
3099 * config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
3100 builtins.
3101 * config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
3102 builtins.
3103 (vpadal_s16): Likewise.
3104 (vpadal_u8): Likewise.
3105 (vpadal_u16): Likewise.
3106 (vpadalq_s8): Likewise.
3107 (vpadalq_s16): Likewise.
3108 (vpadalq_s32): Likewise.
3109 (vpadalq_u8): Likewise.
3110 (vpadalq_u16): Likewise.
3111 (vpadalq_u32): Likewise.
3112
3113 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3114
3115 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3):
3116 Rename to...
3117 (aarch64_<su>abd<mode>): ... This.
3118 (<sur>sadv16qi): Adjust callsite of the above.
3119 * config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define
3120 builtins.
3121 * config/aarch64/arm_neon.h (vabd_s8): Reimplement using
3122 builtin.
3123 (vabd_s16): Likewise.
3124 (vabd_s32): Likewise.
3125 (vabd_u8): Likewise.
3126 (vabd_u16): Likewise.
3127 (vabd_u32): Likewise.
3128 (vabdq_s8): Likewise.
3129 (vabdq_s16): Likewise.
3130 (vabdq_s32): Likewise.
3131 (vabdq_u8): Likewise.
3132 (vabdq_u16): Likewise.
3133 (vabdq_u32): Likewise.
3134
3135 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3136
3137 * config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define
3138 builtins.
3139 * config/aarch64/arm_neon.h (vaba_s8): Implement using builtin.
3140 (vaba_s16): Likewise.
3141 (vaba_s32): Likewise.
3142 (vaba_u8): Likewise.
3143 (vaba_u16): Likewise.
3144 (vaba_u32): Likewise.
3145 (vabaq_s8): Likewise.
3146 (vabaq_s16): Likewise.
3147 (vabaq_s32): Likewise.
3148 (vabaq_u8): Likewise.
3149 (vabaq_u16): Likewise.
3150 (vabaq_u32): Likewise.
3151
3152 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3153
3154 * config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
3155 (aarch64_<su>aba<mode>): ... This. Handle uaba as well.
3156 Change RTL pattern to match.
3157
3158 2021-01-08 Kito Cheng <kito.cheng@sifive.com>
3159
3160 * common/config/riscv/riscv-common.c (riscv_current_subset_list): New.
3161 * config/riscv/riscv-c.c (riscv-subset.h): New.
3162 (INCLUDE_STRING): Define.
3163 (riscv_cpu_cpp_builtins): Add new style architecture extension
3164 test macros.
3165 * config/riscv/riscv-subset.h (riscv_subset_list::begin): New.
3166 (riscv_subset_list::end): New.
3167 (riscv_current_subset_list): New.
3168
3169 2021-01-08 Kito Cheng <kito.cheng@sifive.com>
3170
3171 * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION):
3172 Move to riscv-subset.h.
3173 (struct riscv_subset_t): Ditto.
3174 (class riscv_subset_list): Ditto.
3175 * config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move
3176 from riscv-common.c.
3177 (struct riscv_subset_t): Ditto.
3178 (class riscv_subset_list): Ditto.
3179 * config/riscv/t-riscv ($(common_out_file)): Add file
3180 dependency.
3181
3182 2021-01-07 Jakub Jelinek <jakub@redhat.com>
3183
3184 PR target/98567
3185 * config/i386/i386.md (*bmi_blsi_<mode>_cmp, *bmi_blsi_<mode>_ccno):
3186 New define_insn patterns.
3187
3188 2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
3189
3190 * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_UNARY:optab><mode>)
3191 (*cond_<SVE_INT_UNARY:optab><mode>_2): Extend from SVE_FULL_I to SVE_I.
3192 (*cond_<SVE_INT_UNARY:optab><mode>_any): Likewise.
3193
3194 2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
3195
3196 PR tree-optimization/98560
3197 * internal-fn.def (IFN_VCONDU, IFN_VCONDEQ): Use type vec_cond.
3198 * internal-fn.c (vec_cond_mask_direct): Get the data mode from
3199 argument 1.
3200 (vec_cond_direct): Likewise argument 2.
3201 (vec_condu_direct, vec_condeq_direct): Delete.
3202 (expand_vect_cond_optab_fn): Rename to...
3203 (expand_vec_cond_optab_fn): ...this, replacing old macro.
3204 (expand_vec_condu_optab_fn, expand_vec_condeq_optab_fn): Delete.
3205 (expand_vect_cond_mask_optab_fn): Rename to...
3206 (expand_vec_cond_mask_optab_fn): ...this, replacing old macro.
3207 (direct_vec_cond_mask_optab_supported_p): Treat the optab as a
3208 convert optab.
3209 (direct_vec_cond_optab_supported_p): Likewise.
3210 (direct_vec_condu_optab_supported_p): Delete.
3211 (direct_vec_condeq_optab_supported_p): Delete.
3212 * gimple-isel.cc: Include internal-fn.h.
3213 (gimple_expand_vec_cond_expr): Check that IFN_VCONDEQ is supported
3214 before using it.
3215
3216 2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
3217
3218 PR tree-optimization/98560
3219 * gimple-isel.cc (gimple_expand_vec_cond_expr): If we fail to use
3220 IFN_VCOND{,U,EQ}, fall back on IFN_VCOND_MASK.
3221
3222 2021-01-07 Uroš Bizjak <ubizjak@gmail.com>
3223
3224 * config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn,
3225 rotate_insn and optab code attributes.
3226 Update all uses to merged code attribute.
3227 * config/i386/sse.md: Update all uses to merged code attribute.
3228 * config/i386/mmx.md: Update all uses to merged code attribute.
3229
3230 2021-01-07 Jakub Jelinek <jakub@redhat.com>
3231
3232 PR tree-optimization/98568
3233 * gimple-ssa-store-merging.c (bswap_view_convert): New function.
3234 (bswap_replace): Use it.
3235
3236 2021-01-06 Vladimir N. Makarov <vmakarov@redhat.com>
3237
3238 PR rtl-optimization/97978
3239 * lra-int.h (lra_hard_reg_split_p): New external.
3240 * lra.c (lra_hard_reg_split_p): New global.
3241 (lra): Set up lra_hard_reg_split_p after splitting a hard reg.
3242 * lra-assigns.c (lra_assign): Don't check allocation correctness
3243 after hard reg splitting.
3244
3245 2021-01-06 Martin Sebor <msebor@redhat.com>
3246
3247 PR c++/98305
3248 * builtins.c (new_delete_mismatch_p): New overload.
3249 (new_delete_mismatch_p (tree, tree)): Call it.
3250
3251 2021-01-06 Alexandre Oliva <oliva@adacore.com>
3252
3253 * Makefile.in (T_GLIMITS_H): New.
3254 (stmp-int-hdrs): Depend on it, use it.
3255 * config/t-vxworks (T_GLIMITS_H): Override it.
3256 (vxw-glimits.h): New.
3257
3258 2021-01-06 Richard Biener <rguenther@suse.de>
3259
3260 PR tree-optimization/98513
3261 * value-range.cc (intersect_ranges): Compare the upper bounds
3262 for the expected relation.
3263
3264 2021-01-06 Gerald Pfeifer <gerald@pfeifer.com>
3265
3266 Revert:
3267 2020-12-28 Gerald Pfeifer <gerald@pfeifer.com>
3268
3269 * doc/standards.texi (HSAIL): Remove section.
3270
3271 2021-01-05 Samuel Thibault <samuel.thibault@ens-lyon.org>
3272
3273 * configure: Re-generate.
3274
3275 2021-01-05 Jakub Jelinek <jakub@redhat.com>
3276
3277 * doc/invoke.texi (-std=c++20): Adjust for the publication of
3278 ISO 14882:2020 standard.
3279 * doc/standards.texi: Likewise.
3280
3281 2021-01-05 Jakub Jelinek <jakub@redhat.com>
3282
3283 PR tree-optimization/94802
3284 * expr.h (maybe_optimize_sub_cmp_0): Declare.
3285 * expr.c: Include tree-pretty-print.h and flags.h.
3286 (maybe_optimize_sub_cmp_0): New function.
3287 (do_store_flag): Use it.
3288 * cfgexpand.c (expand_gimple_cond): Likewise.
3289
3290 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
3291
3292 * mux-utils.h (pointer_mux::m_ptr): Tweak description of contents.
3293 * rtlanal.c (simple_regno_set): Tweak description to clarify the
3294 RMW condition.
3295
3296 2021-01-05 Richard Biener <rguenther@suse.de>
3297
3298 PR tree-optimization/98516
3299 * tree-vect-slp.c (vect_optimize_slp): Permute the incoming
3300 lanes when materializing on a VEC_PERM node.
3301 (vectorizable_slp_permutation): Dump the permute properly.
3302
3303 2021-01-05 Richard Biener <rguenther@suse.de>
3304
3305 * tree-vect-slp.c (vect_slp_region): Move debug counter
3306 to cover individual subgraphs.
3307
3308 2021-01-05 Richard Biener <rguenther@suse.de>
3309
3310 PR tree-optimization/98428
3311 * tree-vect-slp.c (vect_build_slp_tree_1): Properly reject
3312 vector lane extracts for loop vectorization.
3313
3314 2021-01-05 Jakub Jelinek <jakub@redhat.com>
3315
3316 PR tree-optimization/98514
3317 * tree-ssa-reassoc.c (bb_rank): Change type from long * to
3318 int64_t *.
3319 (operand_rank): Change type from hash_map<tree, long> to
3320 hash_map<tree, int64_t>.
3321 (phi_rank): Change return type from long to int64_t.
3322 (loop_carried_phi): Change block_rank variable type from long to
3323 int64_t.
3324 (propagate_rank): Change return type, rank parameter type and
3325 op_rank variable type from long to int64_t.
3326 (find_operand_rank): Change return type from long to int64_t
3327 and change slot variable type from long * to int64_t *.
3328 (insert_operand_rank): Change rank parameter type from long to
3329 int64_t.
3330 (get_rank): Change return type and rank variable type from long to
3331 int64_t. Use PRId64 instead of ld to print the rank.
3332 (init_reassoc): Change rank variable type from long to int64_t
3333 and adjust correspondingly bb_rank and operand_rank initialization.
3334
3335 2021-01-05 Jakub Jelinek <jakub@redhat.com>
3336
3337 PR tree-optimization/96928
3338 * tree-ssa-phiopt.c (xor_replacement): New function.
3339 (tree_ssa_phiopt_worker): Call it.
3340
3341 2021-01-05 Jakub Jelinek <jakub@redhat.com>
3342
3343 PR tree-optimization/96930
3344 * match.pd ((A / (1 << B)) -> (A >> B)): If A is extended
3345 from narrower value which has the same type as 1 << B, perform
3346 the right shift on the narrower value followed by extension.
3347
3348 2021-01-05 Jakub Jelinek <jakub@redhat.com>
3349
3350 PR tree-optimization/96239
3351 * gimple-ssa-store-merging.c (maybe_optimize_vector_constructor): New
3352 function.
3353 (get_status_for_store_merging): Don't return BB_INVALID for blocks
3354 with potential bswap optimizable CONSTRUCTORs.
3355 (pass_store_merging::execute): Optimize vector CONSTRUCTORs with bswap
3356 if possible.
3357
3358 2021-01-05 Richard Biener <rguenther@suse.de>
3359
3360 PR tree-optimization/98381
3361 * tree.c (vector_element_bits): Properly compute bool vector
3362 element size.
3363 * tree-vect-loop.c (vectorizable_live_operation): Properly
3364 compute the last lane bit offset.
3365
3366 2021-01-05 Uroš Bizjak <ubizjak@gmail.com>
3367
3368 PR target/98522
3369 * config/i386/sse.md (sse_cvtps2pi): Redefine as define_insn_and_split.
3370 Clear the top 64 bytes of the input XMM register.
3371 (sse_cvttps2pi): Ditto.
3372
3373 2021-01-05 Uroš Bizjak <ubizjak@gmail.com>
3374
3375 PR target/98521
3376 * config/i386/xopintrin.h (_mm256_cmov_si256): New.
3377
3378 2021-01-05 H.J. Lu <hjl.tools@gmail.com>
3379
3380 PR target/98495
3381 * config/i386/xmmintrin.h (_mm_extract_pi16): Cast to unsigned
3382 short first.
3383
3384 2021-01-05 Claudiu Zissulescu <claziss@synopsys.com>
3385
3386 * config/arc/arc.md (maddsidi4_split): Use ACC_REG_FIRST.
3387 (umaddsidi4_split): Likewise.
3388
3389 2021-01-05 liuhongt <hongtao.liu@intel.com>
3390
3391 PR target/98461
3392 * config/i386/sse.md (*sse2_pmovskb_zexthisi): New
3393 define_insn_and_split for zero_extend of subreg HI of pmovskb
3394 result.
3395 (*sse2_pmovskb_zexthisi): Add new combine splitters for
3396 zero_extend of not of subreg HI of pmovskb result.
3397
3398 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
3399
3400 PR target/97269
3401 * explow.c (convert_memory_address_addr_space_1): Handle UNSPECs
3402 nested in CONSTs.
3403 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Use
3404 convert_memory_address to convert symbolic immediates to ptr_mode
3405 before forcing them to memory.
3406
3407 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
3408
3409 PR rtl-optimization/97144
3410 * recog.c (constrain_operands): Initialize matching_operand
3411 for each alternative, rather than only doing it once.
3412
3413 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
3414
3415 PR rtl-optimization/98403
3416 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Explain
3417 why we don't remove call clobbers.
3418 (function_info::apply_changes_to_insn): Don't attempt to add
3419 call clobbers here.
3420
3421 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
3422
3423 PR tree-optimization/98371
3424 * tree-vect-loop.c (vect_reanalyze_as_main_loop): New function.
3425 (vect_analyze_loop): If an epilogue loop appears to be cheaper
3426 than the main loop, re-analyze it as a main loop before adopting
3427 it as a main loop.
3428
3429 2021-01-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3430
3431 PR c++/98316
3432 * configure.ac (NETLIBS): Determine using AX_LIB_SOCKET_NSL.
3433 * aclocal.m4, configure: Regenerate.
3434 * Makefile.in (NETLIBS): Define.
3435 (BACKEND): Remove $(CODYLIB).
3436
3437 2021-01-05 Jakub Jelinek <jakub@redhat.com>
3438
3439 PR rtl-optimization/98334
3440 * simplify-rtx.c (simplify_context::simplify_binary_operation_1):
3441 Optimize (X - 1) * Y + Y to X * Y or (X + 1) * Y - Y to X * Y.
3442
3443 2021-01-05 Bernd Edlinger <bernd.edlinger@hotmail.de>
3444
3445 * tree-inline.c (expand_call_inline): Restore input_location.
3446 Return result from recursive call.
3447
3448 2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
3449
3450 PR tree-optimization/95401
3451 * config/aarch64/aarch64-sve-builtins.cc
3452 (gimple_folder::load_store_cookie): Use bits rather than bytes
3453 for the alignment argument to IFN_MASK_LOAD and IFN_MASK_STORE.
3454 * gimple-fold.c (gimple_fold_mask_load_store_mem_ref): Likewise.
3455 * tree-vect-stmts.c (vectorizable_store): Likewise.
3456 (vectorizable_load): Likewise.
3457
3458 2021-01-04 Richard Biener <rguenther@suse.de>
3459
3460 PR tree-optimization/98308
3461 * tree-vect-stmts.c (vectorizable_load): Set invariant mask
3462 SLP vectype.
3463
3464 2021-01-04 Jakub Jelinek <jakub@redhat.com>
3465
3466 PR tree-optimization/95771
3467 * tree-ssa-loop-niter.c (number_of_iterations_popcount): Handle types
3468 with precision smaller than int's precision and types with precision
3469 twice as large as long long. Formatting fixes.
3470
3471 2021-01-04 Richard Biener <rguenther@suse.de>
3472
3473 PR tree-optimization/98464
3474 * tree-ssa-sccvn.c (vn_valueize_for_srt): Rename from ...
3475 (vn_valueize_wrapper): ... this. Temporarily adjust vn_context_bb.
3476 (process_bb): Adjust.
3477
3478 2021-01-04 Matthew Malcomson <matthew.malcomson@arm.com>
3479
3480 PR other/98437
3481 * doc/invoke.texi (-fsanitize=address): Fix wording describing
3482 clash with -fsanitize=hwaddress.
3483
3484 2021-01-04 Richard Biener <rguenther@suse.de>
3485
3486 PR tree-optimization/98282
3487 * tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on
3488 invariants as VN_NARY.
3489
3490 2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
3491
3492 PR target/89057
3493 * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Accept
3494 aarch64_simd_reg_or_zero for operand 2. Use the combinez patterns
3495 to handle zero operands.
3496
3497 2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
3498
3499 * config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function.
3500 (offset_6bit_unsigned_scaled_p): Fix typo in comment.
3501 (aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range
3502 [-32, 31].
3503
3504 2021-01-04 Richard Biener <rguenther@suse.de>
3505
3506 PR tree-optimization/98393
3507 * tree-vect-slp.c (vect_build_slp_tree): Properly zero matches
3508 when hitting the limit.
3509
3510 2021-01-04 Richard Biener <rguenther@suse.de>
3511
3512 PR tree-optimization/98291
3513 * tree-vect-loop.c (vectorizable_reduction): Bypass
3514 associativity check for SLP reductions with VF 1.
3515
3516 2021-01-04 Jakub Jelinek <jakub@redhat.com>
3517
3518 PR tree-optimization/96782
3519 * match.pd (x == ~x -> false, x != ~x -> true): New simplifications.
3520
3521 2021-01-04 Bernd Edlinger <bernd.edlinger@hotmail.de>
3522
3523 * collect-utils.c (collect_execute): Check dumppfx.
3524 * collect2.c (maybe_run_lto_and_relink, do_link): Pass atsuffix
3525 to collect_execute.
3526 (do_link): Add new parameter atsuffix.
3527 (main): Handle -dumpdir option. Skip one argument for
3528 -o, -isystem and -B options.
3529 * gcc.c (make_at_file): New helper function.
3530 (close_at_file): Use it.
3531
3532 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
3533
3534 * config/darwin.h (MIN_LD64_NO_COAL_SECTS): Adjust.
3535 Amend handling for LD64_VERSION fallback defaults.
3536
3537 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
3538
3539 * config.gcc: Compute default version information
3540 from the configured target. Likewise defaults for
3541 ld64.
3542 * config/darwin10.h: Removed.
3543 * config/darwin12.h: Removed.
3544 * config/darwin9.h: Removed.
3545 * config/rs6000/darwin8.h: Removed.
3546
3547 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
3548
3549 * config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Delete.
3550
3551 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
3552
3553 * config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Move from here..
3554 * config/darwin.h (STACK_CHECK_STATIC_BUILTIN): .. to here.
3555
3556 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
3557
3558 * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move from
3559 here...
3560 * config/darwin.h (LINK_GCC_C_SEQUENCE_SPEC): ... to here.
3561
3562 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
3563
3564 * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move the spec
3565 for the Darwin10 unwinder stub from here ...
3566 * config/darwin.h (LINK_COMMAND_SPEC_A): ... to here.
3567
3568 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
3569
3570 * config/darwin.h (DSYMUTIL_SPEC): Default to DWARF
3571 (ASM_DEBUG_SPEC):Only define if the assembler supports
3572 stabs.
3573 (PREFERRED_DEBUGGING_TYPE): Default to DWARF.
3574 (DARWIN_PREFER_DWARF): Define.
3575 * config/darwin9.h (PREFERRED_DEBUGGING_TYPE): Remove.
3576 (DARWIN_PREFER_DWARF): Likewise
3577 (DSYMUTIL_SPEC): Likewise.
3578 (COLLECT_RUN_DSYMUTIL): Likewise.
3579 (ASM_DEBUG_SPEC): Likewise.
3580 (ASM_DEBUG_OPTION_SPEC): Likewise.
3581
3582 2021-01-02 Jan Hubicka <jh@suse.cz>
3583
3584 * cfg.c (free_block): ggc_free bb.
3585
3586 2021-01-01 Jakub Jelinek <jakub@redhat.com>
3587
3588 * gcc.c (process_command): Update copyright notice dates.
3589 * gcov-dump.c (print_version): Ditto.
3590 * gcov.c (print_version): Ditto.
3591 * gcov-tool.c (print_version): Ditto.
3592 * gengtype.c (create_file): Ditto.
3593 * doc/cpp.texi: Bump @copying's copyright year.
3594 * doc/cppinternals.texi: Ditto.
3595 * doc/gcc.texi: Ditto.
3596 * doc/gccint.texi: Ditto.
3597 * doc/gcov.texi: Ditto.
3598 * doc/install.texi: Ditto.
3599 * doc/invoke.texi: Ditto.
3600
3601 2021-01-01 Jakub Jelinek <jakub@redhat.com>
3602
3603 * ChangeLog-2020: Rotate ChangeLog. New file.
3604
3605 \f
3606 Copyright (C) 2021 Free Software Foundation, Inc.
3607
3608 Copying and distribution of this file, with or without modification,
3609 are permitted in any medium without royalty provided the copyright
3610 notice and this notice are preserved.