gcc/ChangeLog

   1 2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
   2
   3         * config/aarch64/aarch64-simd-builtins.def (rshrn, rshrn2):
   4         Define builtins.
   5         * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le):
   6         Define.
   7         (aarch64_rshrn<mode>_insn_be): Likewise.
   8         (aarch64_rshrn<mode>): Likewise.
   9         (aarch64_rshrn2<mode>_insn_le): Likewise.
  10         (aarch64_rshrn2<mode>_insn_be): Likewise.
  11         (aarch64_rshrn2<mode>): Likewise.
  12         * config/aarch64/aarch64.md (unspec): Add UNSPEC_RSHRN.
  13         * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Reimplement
  14         using builtin.
  15         (vrshrn_high_n_s32): Likewise.
  16         (vrshrn_high_n_s64): Likewise.
  17         (vrshrn_high_n_u16): Likewise.
  18         (vrshrn_high_n_u32): Likewise.
  19         (vrshrn_high_n_u64): Likewise.
  20         (vrshrn_n_s16): Likewise.
  21         (vrshrn_n_s32): Likewise.
  22         (vrshrn_n_s64): Likewise.
  23         (vrshrn_n_u16): Likewise.
  24         (vrshrn_n_u32): Likewise.
  25         (vrshrn_n_u64): Likewise.
  26
  27 2021-02-01  Sergei Trofimovich  <siarheit@google.com>
  28
  29         PR tree-optimization/98499
  30         * ipa-modref.c (analyze_ssa_name_flags): treat RVO
  31         conservatively and assume all possible side-effects.
  32
  33 2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  34
  35         * config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi,
  36         vec_unpacku_hi_): Define builtins.
  37         * config/aarch64/arm_neon.h (vmovl_high_s8): Reimplement using
  38         builtin.
  39         (vmovl_high_s16): Likewise.
  40         (vmovl_high_s32): Likewise.
  41         (vmovl_high_u8): Likewise.
  42         (vmovl_high_u16): Likewise.
  43         (vmovl_high_u32): Likewise.
  44
  45 2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  46
  47         * config/aarch64/aarch64-simd-builtins.def (sabdl, uabdl):
  48         Define builtins.
  49         * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): New
  50         pattern.
  51         * config/aarch64/aarch64.md (unspec): Define UNSPEC_SABDL,
  52         UNSPEC_UABDL.
  53         * config/aarch64/arm_neon.h (vabdl_s8): Reimplemet using
  54         builtin.
  55         (vabdl_s16): Likewise.
  56         (vabdl_s32): Likewise.
  57         (vabdl_u8): Likewise.
  58         (vabdl_u16): Likewise.
  59         (vabdl_u32): Likewise.
  60         * config/aarch64/iterators.md (ABDL): New int iterator.
  61         (sur): Handle UNSPEC_SABDL, UNSPEC_UABDL.
  62
  63 2021-02-01  Martin Sebor  <msebor@redhat.com>
  64
  65         * tree.h (BLOCK_VARS): Add comment.
  66         (BLOCK_SUBBLOCKS): Same.
  67         (BLOCK_SUPERCONTEXT): Same.
  68         (BLOCK_ABSTRACT_ORIGIN): Same.
  69         (inlined_function_outer_scope_p): Same.
  70
  71 2021-02-01  Martin Sebor  <msebor@redhat.com>
  72
  73         PR middle-end/97172
  74         * attribs.c (attr_access::free_lang_data): Define new function.
  75         * attribs.h (attr_access::free_lang_data): Declare new function.
  76
  77 2021-02-01  Richard Biener  <rguenther@suse.de>
  78
  79         * vec.h (auto_vec::auto_vec): Add memory stat parameters
  80         and pass them on.
  81         * bitmap.h (auto_bitmap::auto_bitmap): Likewise.
  82
  83 2021-02-01  Tamar Christina  <tamar.christina@arm.com>
  84
  85         * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>,
  86         aarch64_<su>mlsl<mode>, aarch64_<su>mlsl_n<mode>): Flip mult operands.
  87
  88 2021-02-01  Richard Biener  <rguenther@suse.de>
  89
  90         PR rtl-optimization/98863
  91         * config/i386/i386-features.c (convert_scalars_to_vector):
  92         Set DF_RD_PRUNE_DEAD_DEFS.
  93
  94 2021-01-31  Eric Botcazou  <ebotcazou@adacore.com>
  95
  96         * system.h (SIZE_MAX): Define if not already defined.
  97
  98 2021-01-30  Aaron Sawdey  <acsawdey@linux.ibm.com>
  99
 100         * config/rs6000/genfusion.pl (gen_2logical): New function to
 101         generate patterns for logical-logical fusion.
 102         * config/rs6000/fusion.md: Regenerated patterns.
 103         * config/rs6000/rs6000-cpus.def: Add
 104         OPTION_MASK_P10_FUSION_2LOGICAL.
 105         * config/rs6000/rs6000.c (rs6000_option_override_internal):
 106         Enable logical-logical fusion for p10.
 107         * config/rs6000/rs6000.opt: Add -mpower10-fusion-2logical.
 108
 109 2021-01-30  David Edelsohn  <dje.gcc@gmail.com>
 110
 111         * config/rs6000/rs6000.opt: Add periods to new AIX options.
 112
 113 2021-01-30  David Edelsohn  <dje.gcc@gmail.com>
 114
 115         * config/rs6000/rs6000.opt (mabi=vec-extabi): New.
 116         (mabi=vec-default): New.
 117         * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
 118         __EXTABI__ for AIX Vector extended ABI.
 119         * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print AIX Vector
 120         extabi info.
 121         (conditional_register_usage): If AIX vec_extabi enabled, vs20-vs31
 122         are non-volatile.
 123         * doc/invoke.texi (PowerPC mabi): Add AIX vec-extabi and vec-default.
 124
 125 2021-01-30  Jakub Jelinek  <jakub@redhat.com>
 126
 127         * config/i386/i386-features.c (remove_partial_avx_dependency): Clear
 128         DF_DEFER_INSN_RESCAN after calling df_process_deferred_rescans.
 129
 130 2021-01-29  Vladimir N. Makarov  <vmakarov@redhat.com>
 131
 132         PR target/97701
 133         * lra-constraints.c (in_class_p): Don't narrow class only for REG
 134         or MEM.
 135
 136 2021-01-29  Will Schmidt  <will_schmidt@vnet.ibm.com>
 137
 138         * config/rs6000/rs6000-call.c (rs6000_expand_binup_builtin): Add
 139         clauses for CODE_FOR_vsx_xvcvuxddp_scale and
 140         CODE_FOR_vsx_xvcvsxddp_scale to the parameter checking code.
 141
 142 2021-01-29  Andrew MacLeod  <amacleod@redhat.com>
 143
 144         PR tree-optimization/98866
 145         * gimple-range-gori.h (gori_compute:set_range_invariant): New.
 146         * gimple-range-gori.cc (gori_map::set_range_invariant): New.
 147         (gori_map::m_maybe_invariant): Rename from all_outgoing.
 148         (gori_map::gori_map): Rename all_outgoing to m_maybe_invariant.
 149         (gori_map::is_export_p): Ditto.
 150         (gori_map::calculate_gori): Ditto.
 151         (gori_compute::set_range_invariant): New.
 152         * gimple-range.cc (gimple_ranger::range_of_stmt): Set range
 153         invariant for pointers evaluating to [1, +INF].
 154
 155 2021-01-29  Richard Biener  <rguenther@suse.de>
 156
 157         PR rtl-optimization/98863
 158         * config/i386/i386-features.c (remove_partial_avx_dependency):
 159         Do not perform DF analysis.
 160         (pass_data_remove_partial_avx_dependency): Remove
 161         TODO_df_finish.
 162
 163 2021-01-29  Jonathan Wright  <jonathan.wright@arm.com>
 164
 165         * config/aarch64/aarch64-simd-builtins.def: Add [su]mull_n
 166         builtin generator macros.
 167         * config/aarch64/aarch64-simd.md (aarch64_<su>mull_n<mode>):
 168         Define.
 169         * config/aarch64/arm_neon.h (vmull_n_s16): Use RTL builtin
 170         instead of inline asm.
 171         (vmull_n_s32): Likewise.
 172         (vmull_n_u16): Likewise.
 173         (vmull_n_u32): Likewise.
 174
 175 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 176
 177         * config/aarch64/aarch64-simd-builtins.def (sabdl2, uabdl2):
 178         Define builtins.
 179         * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>_3):
 180         Rename to...
 181         (aarch64_<sur>abdl2<mode>): ... This.
 182         (<sur>sadv16qi): Adjust use of above.
 183         * config/aarch64/arm_neon.h (vabdl_high_s8): Reimplement using
 184         builtin.
 185         (vabdl_high_s16): Likewise.
 186         (vabdl_high_s32): Likewise.
 187         (vabdl_high_u8): Likewise.
 188         (vabdl_high_u16): Likewise.
 189         (vabdl_high_u32): Likewise.
 190
 191 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 192
 193         * config/aarch64/aarch64-simd-builtins.def (sabal2): Define
 194         builtin.
 195         (uabal2): Likewise.
 196         * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): New
 197         pattern.
 198         * config/aarch64/aarch64.md (unspec): Add UNSPEC_SABAL2 and
 199         UNSPEC_UABAL2.
 200         * config/aarch64/arm_neon.h (vabal_high_s8): Reimplement using
 201         builtin.
 202         (vabal_high_s16): Likewise.
 203         (vabal_high_s32): Likewise.
 204         (vabal_high_u8): Likewise.
 205         (vabal_high_u16): Likewise.
 206         (vabal_high_u32): Likewise.
 207         * config/aarch64/iterators.md (ABAL2): New mode iterator.
 208         (sur): Handle UNSPEC_SABAL2, UNSPEC_UABAL2.
 209
 210 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 211
 212         * config/aarch64/aarch64-simd-builtins.def (sabal): Define
 213         builtin.
 214         (uabal): Likewise.
 215         * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>_4):
 216         Rename to...
 217         (aarch64_<sur>abal<mode>): ... This
 218         (<sur>sadv16qi): Adust use of the above.
 219         * config/aarch64/arm_neon.h (vabal_s8): Reimplement using
 220         builtin.
 221         (vabal_s16): Likewise.
 222         (vabal_s32): Likewise.
 223         (vabal_u8): Likewise.
 224         (vabal_u16): Likewise.
 225         (vabal_u32): Likewise.
 226
 227 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 228
 229         * config/aarch64/aarch64-simd-builtins.def (saddlv, uaddlv):
 230         Define builtins.
 231         * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
 232         Define.
 233         * config/aarch64/arm_neon.h (vaddlv_s8): Reimplement using
 234         builtin.
 235         (vaddlv_s16): Likewise.
 236         (vaddlv_u8): Likewise.
 237         (vaddlv_u16): Likewise.
 238         (vaddlvq_s8): Likewise.
 239         (vaddlvq_s16): Likewise.
 240         (vaddlvq_s32): Likewise.
 241         (vaddlvq_u8): Likewise.
 242         (vaddlvq_u16): Likewise.
 243         (vaddlvq_u32): Likewise.
 244         (vaddlv_s32): Likewise.
 245         (vaddlv_u32): Likewise.
 246         * config/aarch64/iterators.md (VDQV_L): New mode iterator.
 247         (unspec): Add UNSPEC_SADDLV, UNSPEC_UADDLV.
 248         (Vwstype): New mode attribute.
 249         (Vwsuf): Likewise.
 250         (VWIDE_S): Likewise.
 251         (USADDLV): New int iterator.
 252         (su): Handle UNSPEC_SADDLV, UNSPEC_UADDLV.
 253
 254 2021-01-29  Jonathan Wright  <jonathan.wright@arm.com>
 255
 256         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_lane[q]
 257         builtin generator macros.
 258         * config/aarch64/aarch64-simd.md (aarch64_vec_<su>mlsl_lane<Qlane>):
 259         Define.
 260         * config/aarch64/arm_neon.h (vmlsl_lane_s16): Use RTL builtin
 261         instead of inline asm.
 262         (vmlsl_lane_s32): Likewise.
 263         (vmlsl_lane_u16): Likewise.
 264         (vmlsl_lane_u32): Likewise.
 265         (vmlsl_laneq_s16): Likewise.
 266         (vmlsl_laneq_s32): Likewise.
 267         (vmlsl_laneq_u16): Likewise.
 268         (vmlsl_laneq_u32): Likewise.
 269
 270 2021-01-29  Richard Biener  <rguenther@suse.de>
 271
 272         * doc/invoke.texi (--param max-gcse-memory): Document unit
 273         of size.
 274         * gcse.c (gcse_or_cprop_is_too_expensive): Adjust.
 275         * params.opt (--param max-gcse-memory): Adjust default and
 276         document unit of size.
 277
 278 2021-01-29  Richard Biener  <rguenther@suse.de>
 279
 280         PR rtl-optimization/98863
 281         * gcse.c (gcse_or_cprop_is_too_expensive): Use unsigned
 282         HOST_WIDE_INT for the memory estimate.
 283
 284 2021-01-29  Bin Cheng  <bin.cheng@linux.alibaba.com>
 285             Richard Biener  <rguenther@suse.de>
 286
 287         PR tree-optimization/97627
 288         * tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
 289         Do not analyze fake edges.
 290
 291 2021-01-29  Richard Biener  <rguenther@suse.de>
 292
 293         PR rtl-optimization/98144
 294         * df.h (df_mir_bb_info): Add con_visited member.
 295         * df-problems.c (df_mir_alloc): Initialize con_visited,
 296         do not fully populate IN and OUT.
 297         (df_mir_reset): Likewise.
 298         (df_mir_confluence_0): Set con_visited.
 299         (df_mir_confluence_n): Properly handle implicitely
 300         fully populated IN and OUT as designated by con_visited
 301         and update con_visited accordingly.
 302
 303 2021-01-29  Jakub Jelinek  <jakub@redhat.com>
 304
 305         PR target/98849
 306         * config/arm/vec-common.md (mve_vshlq_<supf><mode>,
 307         vashl<mode>3, vashr<mode>3, vlshr<mode>3): Add
 308         && !TARGET_REALLY_IWMMXT to conditions.
 309
 310 2021-01-29  Jakub Jelinek  <jakub@redhat.com>
 311
 312         PR debug/98331
 313         * cfgbuild.c (find_bb_boundaries): Reset debug_insn when seeing
 314         a BARRIER.
 315
 316 2021-01-28  Marek Polacek  <polacek@redhat.com>
 317
 318         PR c++/94775
 319         * stor-layout.c (finalize_type_size): If we reset TYPE_USER_ALIGN in
 320         the main variant, maybe reset it in its variants too.
 321         * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
 322         (check_aligned_type): Check if TYPE_USER_ALIGN match.
 323
 324 2021-01-28  Christophe Lyon  <christophe.lyon@linaro.org>
 325
 326         PR target/98730
 327         * config/arm/arm.c (arm_rtx_costs_internal): Adjust cost of vector
 328         of constant zero for comparisons.
 329
 330 2021-01-28  Michael Meissner  <meissner@linux.ibm.com>
 331
 332         * config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Add
 333         support for mapping built-in function names for long double
 334         built-in functions if long double is IEEE 128-bit.
 335
 336 2021-01-28  Jonathan Wright  <jonathan.wright@arm.com>
 337
 338         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_n
 339         builtin generator macros.
 340         * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_n<mode>):
 341         Define.
 342         * config/aarch64/arm_neon.h (vmlsl_n_s16): Use RTL builtin
 343         instead of inline asm.
 344         (vmlsl_n_s32): Likewise.
 345         (vmlsl_n_u16): Likewise.
 346         (vmlsl_n_u32): Likewise.
 347
 348 2021-01-28  Jonathan Wright  <jonathan.wright@arm.com>
 349
 350         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_n
 351         builtin generator macros.
 352         * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>):
 353         Define.
 354         * config/aarch64/arm_neon.h (vmlal_n_s16): Use RTL builtin
 355         instead of inline asm.
 356         (vmlal_n_s32): Likewise.
 357         (vmlal_n_u16): Likewise.
 358         (vmlal_n_u32): Likewise.
 359
 360 2021-01-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 361
 362         * config/aarch64/aarch64-simd-builtins.def (shrn2): Define
 363         builtin.
 364         * config/aarch64/aarch64-simd.md (aarch64_shrn2<mode>_insn_le):
 365         Define.
 366         (aarch64_shrn2<mode>_insn_be): Likewise.
 367         (aarch64_shrn2<mode>): Likewise.
 368         * config/aarch64/arm_neon.h (vshrn_high_n_s16): Reimlplement
 369         using builtins.
 370         (vshrn_high_n_s32): Likewise.
 371         (vshrn_high_n_s64): Likewise.
 372         (vshrn_high_n_u16): Likewise.
 373         (vshrn_high_n_u32): Likewise.
 374         (vshrn_high_n_u64): Likewise.
 375
 376 2021-01-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 377
 378         * config/aarch64/aarch64-simd-builtins.def (shrn): Define
 379         builtin.
 380         * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le):
 381         Define.
 382         (aarch64_shrn<mode>_insn_be): Likewise.
 383         (aarch64_shrn<mode>): Likewise.
 384         * config/aarch64/arm_neon.h (vshrn_n_s16): Reimplement using
 385         builtins.
 386         (vshrn_n_s32): Likewise.
 387         (vshrn_n_s64): Likewise.
 388         (vshrn_n_u16): Likewise.
 389         (vshrn_n_u32): Likewise.
 390         (vshrn_n_u64): Likewise.
 391         * config/aarch64/iterators.md (vn_mode): New mode attribute.
 392
 393 2021-01-28  Richard Biener  <rguenther@suse.de>
 394
 395         PR rtl-optimization/80960
 396         * dse.c (check_mem_read_rtx): Call get_addr on the
 397         offsetted address.
 398
 399 2021-01-28  Xionghu Luo  <luoxhu@linux.ibm.com>
 400             David Edelsohn  <dje.gcc@gmail.com>
 401
 402         PR target/98799
 403         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
 404         Don't generate VIEW_CONVERT_EXPR for fcode ALTIVEC_BUILTIN_VEC_INSERT
 405         when -m32.
 406         * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
 407         Delete.
 408         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Remove the
 409         wrapper call rs6000_expand_vector_set_var for cleanup.  Call
 410         rs6000_expand_vector_set_var_p9 and rs6000_expand_vector_set_var_p8
 411         directly.
 412         (rs6000_expand_vector_set_var): Delete.
 413         (rs6000_expand_vector_set_var_p9): Make static.
 414         (rs6000_expand_vector_set_var_p8): Make static.
 415
 416 2021-01-28  Xing GUO  <higuoxing@gmail.com>
 417
 418         * common/config/riscv/riscv-common.c
 419         (riscv_subset_list::parsing_subset_version): Fix -march option parsing
 420         when `p` extension exists.
 421
 422 2021-01-27  Vladimir N. Makarov  <vmakarov@redhat.com>
 423
 424         PR rtl-optimization/97684
 425         * ira.c (ira): Call ira_set_pseudo_classes before
 426         update_equiv_regs when it is necessary.
 427
 428 2021-01-27  Jakub Jelinek  <jakub@redhat.com>
 429
 430         PR target/98853
 431         * config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Use
 432         %w0, %w1 and %2 instead of %0, %1 and %2.
 433
 434 2021-01-27  Aaron Sawdey  <acsawdey@linux.ibm.com>
 435
 436         * config/rs6000/genfusion.pl: New script to generate
 437         define_insn_and_split patterns so combine can arrange fused
 438         instructions next to each other.
 439         * config/rs6000/fusion.md: New file, generated fused instruction
 440         patterns for combine.
 441         * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
 442         (non_update_memory_operand): New predicate.
 443         * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
 444         OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
 445         POWERPC_MASKS.
 446         * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
 447         prototype.
 448         * config/rs6000/rs6000.c (rs6000_option_override_internal):
 449         Automatically set OPTION_MASK_P10_FUSION and
 450         OPTION_MASK_P10_FUSION_LD_CMPI if target is power10.
 451         (rs600_opt_masks): Allow -mpower10-fusion
 452         in function attributes.
 453         (address_is_non_pfx_d_or_x): New function.
 454         * config/rs6000/rs6000.h: Add MASK_P10_FUSION.
 455         * config/rs6000/rs6000.md: Include fusion.md.
 456         * config/rs6000/rs6000.opt: Add -mpower10-fusion
 457         and -mpower10-fusion-ld-cmpi.
 458         * config/rs6000/t-rs6000: Add dependencies involving fusion.md.
 459
 460 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
 461
 462         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal
 463         builtin generator macros.
 464         * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal<mode>):
 465         Rename to...
 466         (aarch64_<su>mlal<mode>): This.
 467         * config/aarch64/arm_neon.h (vmlal_s8): Use RTL builtin
 468         instead of inline asm.
 469         (vmlal_s16): Likewise.
 470         (vmlal_s32): Likewise.
 471         (vmlal_u8): Likewise.
 472         (vmlal_u16): Likewise.
 473         (vmlal_u32): Likewise.
 474
 475 2021-01-27  Richard Biener  <rguenther@suse.de>
 476
 477         PR tree-optimization/98854
 478         * tree-vect-slp.c (vect_build_slp_tree_2): Also build
 479         PHIs from scalars when the number of CTORs matches the
 480         number of children.
 481
 482 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
 483
 484         * config/aarch64/aarch64-simd-builtins.def: Add mls_n builtin
 485         generator macro.
 486         * config/aarch64/aarch64-simd.md (*aarch64_mls_elt_merge<mode>):
 487         Rename to...
 488         (aarch64_mls_n<mode>): This.
 489         * config/aarch64/arm_neon.h (vmls_n_s16): Use RTL builtin
 490         instead of asm.
 491         (vmls_n_s32): Likewise.
 492         (vmls_n_u16): Likewise.
 493         (vmls_n_u32): Likewise.
 494         (vmlsq_n_s16): Likewise.
 495         (vmlsq_n_s32): Likewise.
 496         (vmlsq_n_u16): Likewise.
 497         (vmlsq_n_u32): Likewise.
 498
 499 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
 500
 501         * config/aarch64/aarch64-simd-builtins.def: Add mls builtin
 502         generator macro.
 503         * config/aarch64/arm_neon.h (vmls_s8): Use RTL builtin rather
 504         than asm.
 505         (vmls_s16): Likewise.
 506         (vmls_s32): Likewise.
 507         (vmls_u8): Likewise.
 508         (vmls_u16): Likewise.
 509         (vmls_u32): Likewise.
 510         (vmlsq_s8): Likewise.
 511         (vmlsq_s16): Likewise.
 512         (vmlsq_s32): Likewise.
 513         (vmlsq_u8): Likewise.
 514         (vmlsq_u16): Likewise.
 515         (vmlsq_u32): Likewise.
 516
 517 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
 518
 519         * config/aarch64/aarch64-simd-builtins.def: Add mla_n builtin
 520         generator macro.
 521         * config/aarch64/aarch64-simd.md (*aarch64_mla_elt_merge<mode>):
 522         Rename to...
 523         (aarch64_mla_n<mode>): This.
 524         * config/aarch64/arm_neon.h (vmla_n_s16): Use RTL builtin
 525         instead of asm.
 526         (vmla_n_s32): Likewise.
 527         (vmla_n_u16): Likewise.
 528         (vmla_n_u32): Likewise.
 529         (vmlaq_n_s16): Likewise.
 530         (vmlaq_n_s32): Likewise.
 531         (vmlaq_n_u16): Likewise.
 532         (vmlaq_n_u32): Likewise.
 533
 534 2021-01-27  liuhongt  <hongtao.liu@intel.com>
 535
 536         PR target/98833
 537         * config/i386/sse.md (sse2_gt<mode>3): Drop !TARGET_XOP in condition.
 538         (*sse2_eq<mode>3): Ditto.
 539
 540 2021-01-27  Jakub Jelinek  <jakub@redhat.com>
 541
 542         * tree-pass.h (PROP_trees): Rename to ...
 543         (PROP_gimple): ... this.
 544         * cfgexpand.c (pass_data_expand): Replace PROP_trees with PROP_gimple.
 545         * passes.c (execute_function_dump, execute_function_todo,
 546         execute_one_ipa_transform_pass, execute_one_pass): Likewise.
 547         * varpool.c (ctor_for_folding): Likewise.
 548
 549 2021-01-27  Jakub Jelinek  <jakub@redhat.com>
 550
 551         PR tree-optimization/97260
 552         * varpool.c: Include tree-pass.h.
 553         (ctor_for_folding): In GENERIC return DECL_INITIAL for TREE_READONLY
 554         non-TREE_SIDE_EFFECTS automatic variables.
 555
 556 2021-01-26  Paul Fee  <paul.f.fee@gmail.com>
 557
 558         * doc/cpp.texi (__cplusplus): Document value for -std=c++23
 559         or -std=gnu++23.
 560         * doc/invoke.texi: Document -std=c++23 and -std=gnu++23.
 561         * dwarf2out.c (highest_c_language): Recognise C++20 and C++23.
 562         (gen_compile_unit_die): Recognise C++23.
 563
 564 2021-01-26  Jakub Jelinek  <jakub@redhat.com>
 565
 566         PR bootstrap/98839
 567         * dwarf2asm.c (dw2_assemble_integer): Cast DWARF2_ADDR_SIZE to int
 568         in comparison.
 569
 570 2021-01-26  Jakub Jelinek  <jakub@redhat.com>
 571
 572         PR target/98681
 573         * config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
 574         Use UINTVAL (shft_amnt) and UINTVAL (mask) instead of INTVAL (shft_amnt)
 575         and INTVAL (mask).  Add && INTVAL (mask) > 0 condition.
 576
 577 2021-01-26  Richard Biener  <rguenther@suse.de>
 578
 579         * gimple-pretty-print.c (dump_binary_rhs): Handle
 580         VEC_WIDEN_{PLUS,MINUS}_{LO,HI}_EXPR.
 581
 582 2021-01-26  Richard Biener  <rguenther@suse.de>
 583
 584         PR middle-end/98726
 585         * tree.h (vector_cst_int_elt): Remove.
 586         * tree.c (vector_cst_int_elt): Use poly_wide_int for computations,
 587         make static.
 588
 589 2021-01-26  Andrew Stubbs  <ams@codesourcery.com>
 590
 591         * config/gcn/gcn.c (gcn_expand_reduc_scalar): Use move instructions
 592         for V64DFmode min/max reductions.
 593
 594 2021-01-26  Jakub Jelinek  <jakub@redhat.com>
 595
 596         * dwarf2asm.c (dw2_assemble_integer): Handle size twice as large
 597         as DWARF2_ADDR_SIZE if x is not a scalar int by emitting it as
 598         two halves, one with x and the other with const0_rtx, ordered
 599         depending on endianity.
 600
 601 2021-01-26  Alexandre Oliva  <oliva@adacore.com>
 602
 603         * gimplify.c (gimplify_decl_expr): Skip asan marking calls for
 604         temporaries not seen in binding block, and not about to be
 605         added as gimple variables.
 606
 607 2021-01-25  Martin Sebor  <msebor@redhat.com>
 608
 609         PR c++/98646
 610         * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust warning text.
 611
 612 2021-01-25  Martin Liska  <mliska@suse.cz>
 613
 614         * value-prof.c (get_nth_most_common_value): Use %s instead
 615         of %qs string.
 616
 617 2021-01-25  Jakub Jelinek  <jakub@redhat.com>
 618
 619         PR debug/98811
 620         * configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG): Only define if
 621         readelf -wi is able to read the emitted .debug_info back.
 622         * configure: Regenerated.
 623
 624 2021-01-25  Martin Liska  <mliska@suse.cz>
 625
 626         PR gcov-profile/98739
 627         * common.opt: Add missing sign symbol.
 628         * value-prof.c (get_nth_most_common_value): Restore handling
 629         of PROFILE_REPRODUCIBILITY_PARALLEL_RUNS and
 630         PROFILE_REPRODUCIBILITY_MULTITHREADED.
 631
 632 2021-01-25  Richard Biener  <rguenther@suse.de>
 633
 634         PR middle-end/98807
 635         * tree.c (vector_element_bits): Always use precision of
 636         the element type for boolean vectors.
 637
 638 2021-01-25  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 639
 640         * config/rtems.h (STARTFILE_SPEC): Remove qnolinkcmds.
 641         (ENDFILE_SPEC): Evaluate qnolinkcmds.
 642
 643 2021-01-25  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 644
 645         * config/rtems.h (STARTFILE_SPEC): Remove nostdlib and
 646         nostartfiles handling since this is already done by
 647         LINK_COMMAND_SPEC.  Evaluate qnolinkcmds.
 648         (ENDFILE_SPEC): Remove nostdlib and nostartfiles handling since this
 649         is already done by LINK_COMMAND_SPEC.
 650         (LIB_SPECS): Remove nostdlib and nodefaultlibs handling since
 651         this is already done by LINK_COMMAND_SPEC.  Remove qnolinkcmds
 652         evaluation.
 653
 654 2021-01-25  Jakub Jelinek  <jakub@redhat.com>
 655
 656         PR testsuite/98771
 657         * fold-const-call.c (host_size_t_cst_p): Renamed to ...
 658         (size_t_cst_p): ... this.  Check and store unsigned HOST_WIDE_INT
 659         value rather than host size_t.
 660         (fold_const_call): Change type of s2 from size_t to
 661         unsigned HOST_WIDE_INT.  Use size_t_cst_p instead of
 662         host_size_t_cst_p.  For strncmp calls, pass MIN (s2, SIZE_MAX)
 663         instead of s2 as last argument.
 664
 665 2021-01-25  Tamar Christina  <tamar.christina@arm.com>
 666
 667         * config/arm/iterators.md (rotsplit1, rotsplit2, conj_op, fcmac1,
 668         VCMLA_OP, VCMUL_OP): New.
 669         * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Support vec_dup 0.
 670         * config/arm/neon.md (cmul<conj_op><mode>3): New.
 671         * config/arm/unspecs.md (UNSPEC_VCMLA_CONJ, UNSPEC_VCMLA180_CONJ,
 672         UNSPEC_VCMUL_CONJ): New.
 673         * config/arm/vec-common.md (cmul<conj_op><mode>3, arm_vcmla<rot><mode>,
 674         cml<fcmac1><conj_op><mode>4): New.
 675
 676 2021-01-23  Jakub Jelinek  <jakub@redhat.com>
 677
 678         PR testsuite/97301
 679         * config/rs6000/mmintrin.h (__m64): Add __may_alias__ attribute.
 680
 681 2021-01-22  Jonathan Wright  <jonathan.wright@arm.com>
 682
 683         * config/aarch64/aarch64-simd-builtins.def: Add mla builtin
 684         generator macro.
 685         * config/aarch64/arm_neon.h (vmla_s8): Use RTL builtin rather
 686         than asm.
 687         (vmla_s16): Likewise.
 688         (vmla_s32): Likewise.
 689         (vmla_u8): Likewise.
 690         (vmla_u16): Likewise.
 691         (vmla_u32): Likewise.
 692         (vmlaq_s8): Likewise.
 693         (vmlaq_s16): Likewise.
 694         (vmlaq_s32): Likewise.
 695         (vmlaq_u8): Likewise.
 696         (vmlaq_u16): Likewise.
 697         (vmlaq_u32): Likewise.
 698
 699 2021-01-22  David Malcolm  <dmalcolm@redhat.com>
 700
 701         * doc/invoke.texi (GCC_EXTRA_DIAGNOSTIC_OUTPUT): Add @findex
 702         directive.
 703
 704 2021-01-22  Jakub Jelinek  <jakub@redhat.com>
 705
 706         PR debug/98796
 707         * dwarf2out.c (output_file_names): For -gdwarf-5, if there are no
 708         filenames to emit, still emit the required 0 index directory and
 709         filename entries that match DW_AT_comp_dir and DW_AT_name of the
 710         compilation unit.
 711
 712 2021-01-22  Marek Polacek  <polacek@redhat.com>
 713
 714         PR c++/98545
 715         * doc/invoke.texi: Update C++ ABI Version 15 description.
 716
 717 2021-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 718
 719         PR tree-optimization/98766
 720         * tree-ssa-math-opts.c (convert_mult_to_fma): Use maybe_le when
 721         comparing against type size with param_avoid_fma_max_bits.
 722
 723 2021-01-22  Richard Biener  <rguenther@suse.de>
 724
 725         PR middle-end/98793
 726         * tree.c (vector_element_bits): Key single-bit bool vector on
 727         integer mode rather than not vector mode.
 728
 729 2021-01-22  Xionghu Luo  <luoxhu@linux.ibm.com>
 730
 731         PR target/98093
 732         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
 733         Generate ARRAY_REF(VIEW_CONVERT_EXPR) for P8 and later
 734         platforms.
 735         * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): Update
 736         to call different path for P8 and P9.
 737         (rs6000_expand_vector_set_var_p9): New function.
 738         (rs6000_expand_vector_set_var_p8): New function.
 739
 740 2021-01-22  Xionghu Luo  <luoxhu@linux.ibm.com>
 741
 742         PR target/79251
 743         PR target/98065
 744         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
 745         Ajdust variable index vec_insert from address dereference to
 746         ARRAY_REF(VIEW_CONVERT_EXPR) tree expression.
 747         * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
 748         New declaration.
 749         * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): New function.
 750
 751 2021-01-22  Martin Liska  <mliska@suse.cz>
 752
 753         PR gcov-profile/98739
 754         * profile.c (compute_value_histograms): Drop time profile for
 755         -fprofile-reproducible=multithreaded.
 756
 757 2021-01-22  Nathan Sidwell  <nathan@acm.org>
 758
 759         * gcc.c (process_command): Don't check OPT_SPECIAL_input_file
 760         existence here.
 761
 762 2021-01-22  Richard Biener  <rguenther@suse.de>
 763
 764         PR middle-end/98773
 765         * tree-data-ref.c (initalize_matrix_A): Revert previous
 766         change, retaining failing on HOST_WIDE_INT_MIN CHREC_RIGHT.
 767
 768 2021-01-22  Jakub Jelinek  <jakub@redhat.com>
 769
 770         PR tree-optimization/90248
 771         * match.pd (X cmp 0.0 ? 1.0 : -1.0 -> copysign(1, +-X),
 772         X cmp 0.0 ? -1.0 : +1.0 -> copysign(1, -+X)): Remove
 773         simplifications.
 774         (X * (X cmp 0.0 ? 1.0 : -1.0) -> +-abs(X),
 775         X * (X cmp 0.0 ? -1.0 : 1.0) -> +-abs(X)): New simplifications.
 776
 777 2021-01-22  Jakub Jelinek  <jakub@redhat.com>
 778
 779         PR tree-optimization/98255
 780         * tree-dfa.c (get_ref_base_and_extent): For ARRAY_REFs, sign
 781         extend index - low_bound from sizetype's precision rather than index
 782         precision.
 783         (get_addr_base_and_unit_offset_1): Likewise.
 784         * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Likewise.
 785         * gimple-fold.c (fold_const_aggregate_ref_1): Likewise.
 786
 787 2021-01-22  Richard Biener  <rguenther@suse.de>
 788
 789         PR tree-optimization/98786
 790         * tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid
 791         adding new uses of abnormals.  Verify we deal with a conditional
 792         conversion.
 793
 794 2021-01-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
 795
 796         PR target/98636
 797         * optc-save-gen.awk: Add arm_fp16_format to checked_options.
 798
 799 2021-01-22  liuhongt  <hongtao.liu@intel.com>
 800
 801         PR target/96891
 802         PR target/98348
 803         * config/i386/sse.md (VI_128_256): New mode iterator.
 804         (*avx_cmp<mode>3_1, *avx_cmp<mode>3_2, *avx_cmp<mode>3_3,
 805          *avx_cmp<mode>3_4, *avx2_eq<mode>3, *avx2_pcmp<mode>3_1,
 806          *avx2_pcmp<mode>3_2, *avx2_gt<mode>3): New
 807         define_insn_and_split to lower avx512 vector comparison to avx
 808         version when dest is vector.
 809         (*<avx512>_cmp<mode>3,*<avx512>_cmp<mode>3,*<avx512>_ucmp<mode>3):
 810         define_insn_and_split for negating the comparison result.
 811         * config/i386/predicates.md (float_vector_all_ones_operand):
 812         New predicate.
 813         * config/i386/i386-expand.c (ix86_expand_sse_movcc): Use
 814         general NOT operator without UNSPEC_MASKOP.
 815
 816 2021-01-21  Vladimir N. Makarov  <vmakarov@redhat.com>
 817
 818         PR rtl-optimization/98777
 819         * lra-int.h (lra_pmode_pseudo): New extern.
 820         * lra.c (lra_pmode_pseudo): New global.
 821         (lra): Set it up.
 822         * lra-eliminations.c (eliminate_regs_in_insn): Use it.
 823
 824 2021-01-21  Ilya Leoshkevich  <iii@linux.ibm.com>
 825
 826         * fwprop.c (fwprop_propagation::classify_result): Allow
 827         (subreg (mem)) simplifications.
 828
 829 2021-01-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 830
 831         * config/aarch64/aarch64-simd.md (aarch64_sqdml<SBINQOPS:as>l<mode>):
 832         Split into...
 833         (aarch64_sqdmlal<mode>): ... This...
 834         (aarch64_sqdmlsl<mode>): ... And this.
 835         (aarch64_sqdml<SBINQOPS:as>l_lane<mode>): Split into...
 836         (aarch64_sqdmlal_lane<mode>): ... This...
 837         (aarch64_sqdmlsl_lane<mode>): ... And this.
 838         (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): Split into...
 839         (aarch64_sqdmlsl_laneq<mode>): ... This...
 840         (aarch64_sqdmlal_laneq<mode>):  ... And this.
 841         (aarch64_sqdml<SBINQOPS:as>l_n<mode>): Split into...
 842         (aarch64_sqdmlsl_n<mode>): ... This...
 843         (aarch64_sqdmlal_n<mode>): ... And this.
 844         (aarch64_sqdml<SBINQOPS:as>l2<mode>_internal): Split into...
 845         (aarch64_sqdmlal2<mode>_internal): ... This...
 846         (aarch64_sqdmlsl2<mode>_internal): ... And this.
 847
 848 2021-01-21  Christophe Lyon  <christophe.lyon@linaro.org>
 849
 850         * config/arm/arm_mve.h (__arm_vcmpneq_s8): Fix return type.
 851
 852 2021-01-21  Andrea Corallo  <andrea.corallo@arm.com>
 853
 854         PR target/96372
 855         * doc/sourcebuild.texi (arm_thumb2_no_arm_v8_1_lob): Document.
 856
 857 2021-01-21  liuhongt  <hongtao.liu@intel.com>
 858
 859         PR rtl-optimization/98694
 860         * regcprop.c (copy_value): If SRC had been assigned a mode
 861         narrower than the copy, we can't link DEST into the chain even
 862         they have same hard_regno_nregs(i.e. HImode/SImode in i386
 863         backend).
 864
 865 2021-01-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 866
 867         * config/aarch64/aarch64-simd.md (aarch64_get_lane<mode>):
 868         Convert to define_insn_and_split.  Split into simple move when moving
 869         bottom element.
 870
 871 2021-01-20  Segher Boessenkool  <segher@kernel.crashing.org>
 872
 873         * config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Change assert.
 874         Adjust comment.  Simplify code.
 875
 876 2021-01-20  Jakub Jelinek  <jakub@redhat.com>
 877
 878         PR debug/98765
 879         * dwarf2out.c (reset_indirect_string): Also reset indirect strings
 880         with DW_FORM_line_strp form.
 881         (prune_unused_types_update_strings): Don't add into debug_str_hash
 882         indirect strings with DW_FORM_line_strp form.
 883         (adjust_name_comp_dir): New function.
 884         (dwarf2out_finish): Call it on CU DIEs after resetting
 885         debug_line_str_hash.
 886
 887 2021-01-20  Vladimir N. Makarov  <vmakarov@redhat.com>
 888
 889         PR rtl-optimization/98722
 890         * lra-eliminations.c (eliminate_regs_in_insn): Check that target
 891         has no 3-op add insn to transform insns containing two pluses.
 892
 893 2021-01-20  Richard Biener  <rguenther@suse.de>
 894
 895         * hwint.h (add_hwi): New function.
 896         (mul_hwi): Likewise.
 897         * tree-data-ref.c (initialize_matrix_A): Properly translate
 898         tree constants and avoid HOST_WIDE_INT_MIN.
 899         (lambda_matrix_row_add): Avoid undefined integer overflow
 900         and return true on such overflow.
 901         (lambda_matrix_right_hermite): Handle overflow from
 902         lambda_matrix_row_add gracefully.  Simplify previous fix.
 903         (analyze_subscript_affine_affine): Likewise.
 904
 905 2021-01-20  Eugene Rozenfeld  <erozen@microsoft.com>
 906
 907         PR tree-optimization/96674
 908         * match.pd: New patterns: x < y || y == XXX_MIN --> x <= y - 1
 909         x >= y && y != XXX_MIN --> x > y - 1
 910
 911 2021-01-20  Richard Sandiford  <richard.sandiford@arm.com>
 912
 913         PR tree-optimization/98535
 914         * tree-vect-slp.c (duplicate_and_interleave): Use quick_grow_cleared.
 915         If the high and low permutes are the same, remove the high permutes
 916         from the working set and only continue with the low ones.
 917
 918 2021-01-20  Jakub Jelinek  <jakub@redhat.com>
 919
 920         PR tree-optimization/98721
 921         * builtins.c (access_ref::inform_access): Don't assume
 922         SSA_NAME_IDENTIFIER must be non-NULL.  Print messages about
 923         object whenever allocfn is NULL, rather than only when DECL_P
 924         is true.  Use %qE instead of %qD for that.  Formatting fixes.
 925
 926 2021-01-20  Richard Biener  <rguenther@suse.de>
 927
 928         PR tree-optimization/98758
 929         * tree-data-ref.c (int_divides_p): Use lambda_int arguments.
 930         (lambda_matrix_right_hermite): Avoid undefinedness with
 931         signed integer abs and multiplication.
 932         (analyze_subscript_affine_affine): Use lambda_int.
 933
 934 2021-01-20  David Malcolm  <dmalcolm@redhat.com>
 935
 936         PR debug/98751
 937         * dwarf2out.c (output_line_info): Rename static variable
 938         "generation", moving it out of the function to...
 939         (output_line_info_generation): New.
 940         (init_sections_and_labels): Likewise, renaming the variable to...
 941         (init_sections_and_labels_generation): New.
 942         (dwarf2out_c_finalize): Reset the new variables.
 943
 944 2021-01-19  Martin Sebor  <msebor@redhat.com>
 945
 946         PR middle-end/98664
 947         * tree-ssa-live.c (remove_unused_scope_block_p): Keep scopes for
 948         all functions, even if they're not declared artificial or inline.
 949         * tree.c (tree_inlined_location): Use macro expansion location
 950         only if scope traversal fails to expose one.
 951
 952 2021-01-19  Richard Sandiford  <richard.sandiford@arm.com>
 953
 954         PR rtl-optimization/92294
 955         * alias.c (compare_base_symbol_refs): Take an extra parameter
 956         and add the distance between two symbols to it.  Enshrine in
 957         comments that -1 means "either 0 or 1, but we can't tell
 958         which at compile time".
 959         (memrefs_conflict_p): Update call accordingly.
 960         (rtx_equal_for_memref_p): Likewise.  Take the distance between symbols
 961         into account.
 962
 963 2021-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 964
 965         * config/aarch64/aarch64-simd-builtins.def (sqshl, uqshl,
 966         sqrshl, uqrshl, sqadd, uqadd, sqsub, uqsub, suqadd, usqadd, sqmovn,
 967         uqmovn, sqxtn2, uqxtn2, sqabs, sqneg, sqdmlal, sqdmlsl, sqdmlal_lane,
 968         sqdmlsl_lane, sqdmlal_laneq, sqdmlsl_laneq, sqdmlal_n, sqdmlsl_n,
 969         sqdmlal2, sqdmlsl2, sqdmlal2_lane, sqdmlsl2_lane, sqdmlal2_laneq,
 970         sqdmlsl2_laneq, sqdmlal2_n, sqdmlsl2_n, sqdmull, sqdmull_lane,
 971         sqdmull_laneq, sqdmull_n, sqdmull2, sqdmull2_lane, sqdmull2_laneq,
 972         sqdmull2_n, sqdmulh, sqrdmulh, sqdmulh_lane, sqdmulh_laneq,
 973         sqrdmulh_lane, sqrdmulh_laneq, sqshrun_n, sqrshrun_n, sqshrn_n,
 974         uqshrn_n, sqrshrn_n, uqrshrn_n, sqshlu_n, sqshl_n, uqshl_n, sqrdmlah,
 975         sqrdmlsh, sqrdmlah_lane, sqrdmlsh_lane, sqrdmlah_laneq, sqrdmlsh_laneq,
 976         sqmovun): Use NONE flags.
 977
 978 2021-01-19  Richard Biener  <rguenther@suse.de>
 979
 980         PR ipa/98330
 981         * ipa-modref.c (analyze_stmt): Only record a summary for a
 982         direct call.
 983
 984 2021-01-19  Richard Biener  <rguenther@suse.de>
 985
 986         PR middle-end/98638
 987         * tree-ssanames.c (fini_ssanames): Zero SSA_NAME_DEF_STMT.
 988
 989 2021-01-19  Daniel Hellstrom  <daniel@gaisler.com>
 990
 991         * config/sparc/rtemself.h (TARGET_OS_CPP_BUILTINS): Add
 992         built-in define __FIX_LEON3FT_TN0018.
 993
 994 2021-01-19  Richard Biener  <rguenther@suse.de>
 995
 996         PR ipa/97673
 997         * tree-inline.c (tree_function_versioning): Set input_location
 998         to UNKNOWN_LOCATION throughout the function.
 999
1000 2021-01-19  Tobias Burnus  <tobias@codesourcery.com>
1001
1002         PR fortran/98476
1003         * omp-low.c (lower_omp_target): Handle nonpointer is_device_ptr.
1004
1005 2021-01-19  Martin Jambor  <mjambor@suse.cz>
1006
1007         PR ipa/98690
1008         * ipa-sra.c (ssa_name_only_returned_p): New parameter fun.  Check
1009         whether non-call exceptions allow removal of a statement.
1010         (isra_analyze_call): Pass the appropriate function to
1011         ssa_name_only_returned_p.
1012
1013 2021-01-19  Geng Qi  <gengqi@linux.alibaba.com>
1014
1015         * config/riscv/arch-canonicalize (longext_sort): New function for
1016          sorting 'multi-letter'.
1017         * config/riscv/multilib-generator: Adjusting the loop of 'alt' in
1018         'alts'. The 'arch' may not be the first of 'alts'.
1019         (_expand_combination): Add underline for the 'ext' without '*'.
1020         This is because, a single-letter extension can always be treated well
1021         with a '_' prefix, but it cannot be separated out if it is appended
1022         to a multi-letter.
1023
1024 2021-01-18  Vladimir N. Makarov  <vmakarov@redhat.com>
1025
1026         PR target/97847
1027         * ira.c (ira): Skip abnormal critical edge splitting.
1028
1029 2021-01-18  Jakub Jelinek  <jakub@redhat.com>
1030
1031         PR tree-optimization/98727
1032         * tree-ssa-math-opts.c (match_arith_overflow): Fix up computation of
1033         second .MUL_OVERFLOW operand for signed multiplication with overflow
1034         checking if the second operand of multiplication is not constant.
1035
1036 2021-01-18  David Edelsohn  <dje.gcc@gmail.com>
1037
1038         * doc/invoke.texi (-gdwarf): TPF defaults to version 2 and AIX
1039         defaults to version 4.
1040
1041 2021-01-18  David Malcolm  <dmalcolm@redhat.com>
1042
1043         * attribs.h (fndecl_dealloc_argno): New decl.
1044         * builtins.c (call_dealloc_argno): Split out second half of
1045         function into...
1046         (fndecl_dealloc_argno): New.
1047         * doc/extend.texi (Common Function Attributes): Document the
1048         interaction between the analyzer and the malloc attribute.
1049         * doc/invoke.texi (Static Analyzer Options): Likewise.
1050
1051 2021-01-17  David Edelsohn  <dje.gcc@gmail.com>
1052
1053         * config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Override
1054         dwarf_version to 4.
1055         * config/rs6000/aix72.h (SUBTARGET_OVERRIDE_OPTIONS): Same.
1056
1057 2021-01-17  Martin Jambor  <mjambor@suse.cz>
1058
1059         PR ipa/98222
1060         * cgraph.c (clone_of_p): Check also former_clone_of as we climb
1061         the clone tree.
1062
1063 2021-01-17  Mark Wielaard  <mark@klomp.org>
1064
1065         * common.opt (gdwarf-): Init(5).
1066         * doc/invoke.texi (-gdwarf): Document default to 5.
1067
1068 2021-01-16  Kwok Cheung Yeung  <kcy@codesourcery.com>
1069
1070         * builtin-types.def
1071         (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT): Rename
1072         to...
1073         (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR):
1074         ...this.  Add extra argument.
1075         * gimplify.c (omp_default_clause): Ensure that event handle is
1076         firstprivate in a task region.
1077         (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_DETACH.
1078         (gimplify_adjust_omp_clauses): Likewise.
1079         * omp-builtins.def (BUILT_IN_GOMP_TASK): Change function type to
1080         BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR.
1081         * omp-expand.c (expand_task_call): Add GOMP_TASK_FLAG_DETACH to flags
1082         if detach clause specified.  Add detach argument when generating
1083         call to GOMP_task.
1084         * omp-low.c (scan_sharing_clauses): Setup data environment for detach
1085         clause.
1086         (finish_taskreg_scan): Move field for variable containing the event
1087         handle to the front of the struct.
1088         * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DETACH.  Fix
1089         ordering.
1090         * tree-nested.c (convert_nonlocal_omp_clauses): Handle
1091         OMP_CLAUSE_DETACH clause.
1092         (convert_local_omp_clauses): Handle OMP_CLAUSE_DETACH clause.
1093         * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_DETACH.
1094         * tree.c (omp_clause_num_ops): Add entry for OMP_CLAUSE_DETACH.
1095         Fix ordering.
1096         (omp_clause_code_name): Add entry for OMP_CLAUSE_DETACH.  Fix
1097         ordering.
1098         (walk_tree_1): Handle OMP_CLAUSE_DETACH.
1099
1100 2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>
1101
1102         * config/nios2/t-rtems: Reset all MULTILIB_* variables.  Shorten
1103         multilib directory names.  Use MULTILIB_REQUIRED instead of
1104         MULTILIB_EXCEPTIONS.  Add -mhw-mul -mhw-mulx -mhw-div
1105         -mcustom-fpu-cfg=fph2 multilib.
1106
1107 2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>
1108
1109         * config/nios2/nios2.c (NIOS2_FPU_CONFIG_NUM): Adjust value.
1110         (nios2_init_fpu_configs): Provide register values for new
1111         -mcustom-fpu-cfg=fph2 option variant.
1112         * doc/invoke.texi (-mcustom-fpu-cfg=fph2): Document new option
1113         variant.
1114
1115 2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>
1116
1117         * config/nios2/nios2.c (nios2_custom_check_insns): Remove
1118         custom instruction warnings.
1119
1120 2021-01-16  Jakub Jelinek  <jakub@redhat.com>
1121
1122         PR tree-optimization/96669
1123         * match.pd ((CST << x) & 1 -> x == 0): New simplification.
1124
1125 2021-01-16  Jakub Jelinek  <jakub@redhat.com>
1126
1127         PR tree-optimization/96271
1128         * passes.def: Pass false argument to first two pass_cd_dce
1129         instances and true to last instance.  Add comment that
1130         last instance rewrites no longer addressed locals.
1131         * tree-ssa-dce.c (pass_cd_dce): Add update_address_taken_p member and
1132         initialize it.
1133         (pass_cd_dce::set_pass_param): New method.
1134         (pass_cd_dce::execute): Return TODO_update_address_taken from
1135         last cd_dce instance.
1136
1137 2021-01-15  Carl Love  <cel@us.ibm.com>
1138
1139         * config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod):
1140         New defines.
1141         * config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
1142         * config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI,
1143         DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI,
1144         DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI,
1145         MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI):
1146         Add builtin define.
1147         (MULH, DIVE, MOD):  Add new BU_P10_OVERLOAD_2 definitions.
1148         * config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
1149         VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH):
1150         New overloaded definitions.
1151         (builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI,
1152         P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI,
1153         P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI,
1154         P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI,
1155         P10V_BUILTIN_MULHU_V4SI]: Add case
1156         statement for builtins.
1157         * config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI.
1158         * config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md.
1159         (UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions.
1160         (vsx_mul_v2di): Add if TARGET_POWER10 statement.
1161         (vsx_udiv_v2di): Add if TARGET_POWER10 statement.
1162         (dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3,
1163         mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3):
1164         Add define_insn, mode is VIlong.
1165         * doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod):
1166         Add builtin descriptions.
1167
1168 2021-01-15  Eric Botcazou  <ebotcazou@adacore.com>
1169
1170         * final.c (final_start_function_1): Reset force_source_line.
1171
1172 2021-01-15  Jakub Jelinek  <jakub@redhat.com>
1173
1174         PR tree-optimization/96669
1175         * match.pd (((1 << A) & 1) != 0 -> A == 0,
1176         ((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by
1177         possibly different power of two constants and to right shift too.
1178
1179 2021-01-15  Jakub Jelinek  <jakub@redhat.com>
1180
1181         PR tree-optimization/96681
1182         * match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification.
1183         ((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise.
1184         ((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise.
1185         ((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise.
1186
1187 2021-01-15  Alexandre Oliva  <oliva@adacore.com>
1188
1189         * opts.c (gen_command_line_string): Exclude -dumpbase-ext.
1190
1191 2021-01-15  Tamar Christina  <tamar.christina@arm.com>
1192
1193         * config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4,
1194         cmul<conj_op><mode>3): New.
1195         * config/aarch64/iterators.md (UNSPEC_FCMUL,
1196         UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ,
1197         UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180,
1198         FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1,
1199         sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New.
1200         (rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180.
1201         (rot_op): Renamed to conj_op.
1202         * config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4,
1203         cmul<conj_op><mode>3): New.
1204         * config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4,
1205         cmul<conj_op><mode>3): New.
1206
1207 2021-01-15  David Malcolm  <dmalcolm@redhat.com>
1208
1209         PR bootstrap/98696
1210         * diagnostic.c
1211         (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
1212         Escape the tempfile name when constructing the expected output.
1213
1214 2021-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1215
1216         * config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>):
1217         Rename to...
1218         (aarch64_<su>mlsl_hi<mode>): ... This.
1219         (aarch64_<su>mlsl_hi<mode>): Define.
1220         (*aarch64_<su>mlsl<mode): Rename to...
1221         (aarch64_<su>mlsl<mode): ... This.
1222         * config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl,
1223         smlsl_hi, umlsl_hi): Define builtins.
1224         * config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16,
1225         vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32,
1226         vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8,
1227         vmlsl_u16, vmlsl_u32): Reimplement with builtins.
1228
1229 2021-01-15  Uroš Bizjak  <ubizjak@gmail.com>
1230
1231         * config/i386/i386-c.c (ix86_target_macros):
1232         Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition.
1233
1234 2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
1235
1236         PR target/88836
1237         * config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs.
1238         * Makefile.in (RTL_SSA_H): New variable.
1239         * config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule.
1240         * config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare.
1241         * config/aarch64/aarch64-passes.def: Add pass_cc_fusion after
1242         pass_combine.
1243         * config/aarch64/aarch64-cc-fusion.cc: New file.
1244
1245 2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
1246
1247         * recog.h (insn_change_watermark::~insn_change_watermark): Avoid
1248         calling cancel_changes for changes that no longer exist.
1249
1250 2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
1251
1252         * rtl-ssa/functions.h (function_info::ref_defs): Rename to...
1253         (function_info::reg_defs): ...this.
1254         * rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to...
1255         (function_info::reg_defs): ...this.
1256
1257 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
1258
1259         PR target/71233
1260         * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
1261
1262 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
1263
1264         Revert:
1265         2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
1266
1267         PR target/71233
1268         * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
1269
1270 2021-01-15  Richard Biener  <rguenther@suse.de>
1271
1272         PR tree-optimization/96376
1273         * tree-vect-stmts.c (get_load_store_type): Disregard alignment
1274         for VMAT_INVARIANT.
1275
1276 2021-01-15  Martin Liska  <mliska@suse.cz>
1277
1278         * doc/install.texi: Document that some tests need pytest module.
1279         * doc/sourcebuild.texi: Likewise.
1280
1281 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
1282
1283         PR target/71233
1284         * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
1285
1286 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
1287
1288         * config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry.
1289         (mve_vshrq_n_u<mode>_imm): Likewise.
1290         * config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ...
1291         * config/arm/vec-common.md: ... here.
1292
1293 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
1294
1295         * config/arm/mve.md (mve_vshlq_<supf><mode>): Move to
1296         vec-commond.md.
1297         * config/arm/neon.md (vashl<mode>3): Delete.
1298         * config/arm/vec-common.md (mve_vshlq_<supf><mode>): New.
1299         (vasl<mode>3): New expander.
1300
1301 2021-01-15  Richard Biener  <rguenther@suse.de>
1302
1303         PR tree-optimization/98685
1304         * tree-vect-slp.c (vect_schedule_slp_node): Refactor handling
1305         of vector extern defs.
1306
1307 2021-01-14  David Malcolm  <dmalcolm@redhat.com>
1308
1309         PR jit/98586
1310         * diagnostic.c (diagnostic_kind_text): Break out this array
1311         from...
1312         (diagnostic_build_prefix): ...here.
1313         (fancy_abort): Detect when diagnostic_initialize has not yet been
1314         called and fall back to a minimal implementation of printing the
1315         ICE, rather than segfaulting in internal_error.
1316
1317 2021-01-14  David Malcolm  <dmalcolm@redhat.com>
1318
1319         * diagnostic.c (diagnostic_initialize): Eliminate
1320         parseable_fixits_p in favor of initializing extra_output_kind from
1321         GCC_EXTRA_DIAGNOSTIC_OUTPUT.
1322         (convert_column_unit): New function, split out from...
1323         (diagnostic_converted_column): ...this.
1324         (print_parseable_fixits): Add "column_unit" and "tabstop" params.
1325         Use them to call convert_column_unit on the column values.
1326         (diagnostic_report_diagnostic): Eliminate conditional on
1327         parseable_fixits_p in favor of a switch statement on
1328         extra_output_kind, passing the appropriate values to the new
1329         params of print_parseable_fixits.
1330         (selftest::test_print_parseable_fixits_none): Update for new
1331         params of print_parseable_fixits.
1332         (selftest::test_print_parseable_fixits_insert): Likewise.
1333         (selftest::test_print_parseable_fixits_remove): Likewise.
1334         (selftest::test_print_parseable_fixits_replace): Likewise.
1335         (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
1336         New.
1337         (selftest::diagnostic_c_tests): Call it.
1338         * diagnostic.h (enum diagnostics_extra_output_kind): New.
1339         (diagnostic_context::parseable_fixits_p): Delete field in favor
1340         of...
1341         (diagnostic_context::extra_output_kind): ...this new field.
1342         * doc/invoke.texi (Environment Variables): Add
1343         GCC_EXTRA_DIAGNOSTIC_OUTPUT.
1344         * opts.c (common_handle_option): Update handling of
1345         OPT_fdiagnostics_parseable_fixits for change to diagnostic_context
1346         fields.
1347
1348 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
1349
1350         * tree-vect-slp-patterns.c (class complex_operations_pattern,
1351         complex_operations_pattern::matches,
1352         complex_operations_pattern::recognize,
1353         complex_operations_pattern::build): New.
1354         (slp_patterns): Use it.
1355
1356 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
1357
1358         * internal-fn.def (COMPLEX_FMS, COMPLEX_FMS_CONJ): New.
1359         * optabs.def (cmls_optab, cmls_conj_optab): New.
1360         * doc/md.texi: Document them.
1361         * tree-vect-slp-patterns.c (class complex_fms_pattern,
1362         complex_fms_pattern::matches, complex_fms_pattern::recognize,
1363         complex_fms_pattern::build): New.
1364
1365 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
1366
1367         * internal-fn.def (COMPLEX_FMA, COMPLEX_FMA_CONJ): New.
1368         * optabs.def (cmla_optab, cmla_conj_optab): New.
1369         * doc/md.texi: Document them.
1370         * tree-vect-slp-patterns.c (vect_match_call_p,
1371         class complex_fma_pattern, vect_slp_reset_pattern,
1372         complex_fma_pattern::matches, complex_fma_pattern::recognize,
1373         complex_fma_pattern::build): New.
1374
1375 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
1376
1377         * internal-fn.def (COMPLEX_MUL, COMPLEX_MUL_CONJ): New.
1378         * optabs.def (cmul_optab, cmul_conj_optab): New.
1379         * doc/md.texi: Document them.
1380         * tree-vect-slp-patterns.c (vect_match_call_complex_mla,
1381         vect_normalize_conj_loc, is_eq_or_top, vect_validate_multiplication,
1382         vect_build_combine_node, class complex_mul_pattern,
1383         complex_mul_pattern::matches, complex_mul_pattern::recognize,
1384         complex_mul_pattern::build): New.
1385
1386 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
1387
1388         * tree-vect-slp.c (optimize_load_redistribution_1): New.
1389         (optimize_load_redistribution, vect_is_slp_load_node): New.
1390         (vect_match_slp_patterns): Use it.
1391
1392 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
1393
1394         * tree-vect-slp-patterns.c (complex_add_pattern::build):
1395         Elide nodes.
1396
1397 2021-01-14  Thomas Schwinge  <thomas@codesourcery.com>
1398
1399         * config/gcn/mkoffload.c (main): Create an offload image only in
1400         64-bit configurations.
1401
1402 2021-01-14  H.J. Lu  <hjl.tools@gmail.com>
1403
1404         PR target/98667
1405         * config/i386/i386-options.c (ix86_option_override_internal):
1406         Issue an error for -fcf-protection with CF_BRANCH when compiling
1407         for 32-bit non-TARGET_CMOV targets.
1408
1409 2021-01-14  Uroš Bizjak  <ubizjak@gmail.com>
1410
1411         PR target/98671
1412         * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
1413         Remove declaration and initialization of shadow variable "ret".
1414         (ix86_option_override_internal): Remove delcaration of
1415         shadow variable "i".  Redeclare shadowed variable to unsigned.
1416         * common/config/i386/i386-common.c (pta_size): Redeclare to unsigned.
1417         * config/i386/i386-builtins.c (get_builtin_code_for_version):
1418         Update for redeclaration.
1419         * config/i386/i386.h (pta_size): Ditto.
1420
1421 2021-01-14  Richard Biener  <rguenther@suse.de>
1422
1423         PR tree-optimization/98674
1424         * tree-data-ref.c (base_supports_access_fn_components_p): New.
1425         (initialize_data_dependence_relation): For two bases without
1426         possible access fns resort to type size equality when determining
1427         shape compatibility.
1428
1429 2021-01-14  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1430
1431         PR target/66791
1432         * config/arm/arm_neon.h: Replace calls to __builtin_vcge* by
1433         <=, >= operators in vcle and vcge intrinsics respectively.
1434         * config/arm/arm_neon_builtins.def: Remove entry for
1435         vcge and vcgeu.
1436
1437 2021-01-14  Uroš Bizjak  <ubizjak@gmail.com>
1438
1439         PR target/98671
1440         * config/i386/i386-options.c (ix86_function_specific_save):
1441         Remove redundant assignment to opts->x_ix86_branch_cost.
1442         * config/i386/i386.c (ix86_prefetch_sse):
1443         Rename from x86_prefetch_sse.  Update all uses.
1444         * config/i386/i386.h: Update for rename.
1445         * config/i386/i386-options.h: Ditto.
1446
1447 2021-01-14  Jakub Jelinek  <jakub@redhat.com>
1448
1449         PR target/98670
1450         * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3,
1451         *sse4_1_zero_extendv4hiv4si2_3, *sse4_1_zero_extendv2siv2di2_3):
1452         Use Bm instead of m for non-avx.  Add isa attribute.
1453
1454 2021-01-14  Jakub Jelinek  <jakub@redhat.com>
1455
1456         PR tree-optimization/96688
1457         * match.pd (~(X >> Y) -> ~X >> Y): New simplification if
1458         ~X can be simplified.
1459
1460 2021-01-14  Richard Sandiford  <richard.sandiford@arm.com>
1461
1462         * tree-vect-stmts.c (vect_model_load_cost): Account for unused
1463         IFN_LOAD_LANES results.
1464
1465 2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1466
1467         * config/aarch64/aarch64-simd.md (aarch64_<su>xtl<mode>):
1468         Define.
1469         (aarch64_xtn<mode>): Likewise.
1470         * config/aarch64/aarch64-simd-builtins.def (sxtl, uxtl, xtn):
1471         Define
1472         builtins.
1473         * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
1474         builtin.
1475         (vmovl_s16): Likewise.
1476         (vmovl_s32): Likewise.
1477         (vmovl_u8): Likewise.
1478         (vmovl_u16): Likewise.
1479         (vmovl_u32): Likewise.
1480         (vmovn_s16): Likewise.
1481         (vmovn_s32): Likewise.
1482         (vmovn_s64): Likewise.
1483         (vmovn_u16): Likewise.
1484         (vmovn_u32): Likewise.
1485         (vmovn_u64): Likewise.
1486
1487 2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1488
1489         * config/aarch64/aarch64-simd.md (aarch64_<su>qxtn2<mode>_le):
1490         Define.
1491         (aarch64_<su>qxtn2<mode>_be): Likewise.
1492         (aarch64_<su>qxtn2<mode>): Likewise.
1493         * config/aarch64/aarch64-simd-builtins.def (sqxtn2, uqxtn2):
1494         Define builtins.
1495         * config/aarch64/iterators.md (SAT_TRUNC): Define code_iterator.
1496         (su): Handle ss_truncate and us_truncate.
1497         * config/aarch64/arm_neon.h (vqmovn_high_s16): Reimplement using
1498         builtin.
1499         (vqmovn_high_s32): Likewise.
1500         (vqmovn_high_s64): Likewise.
1501         (vqmovn_high_u16): Likewise.
1502         (vqmovn_high_u32): Likewise.
1503         (vqmovn_high_u64): Likewise.
1504
1505 2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1506
1507         * config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le):
1508         Define.
1509         (aarch64_xtn2<mode>_be): Likewise.
1510         (aarch64_xtn2<mode>): Likewise.
1511         * config/aarch64/aarch64-simd-builtins.def (xtn2): Define
1512         builtins.
1513         * config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using
1514         builtins.
1515         (vmovn_high_s32): Likewise.
1516         (vmovn_high_s64): Likewise.
1517         (vmovn_high_u16): Likewise.
1518         (vmovn_high_u32): Likewise.
1519         (vmovn_high_u64): Likewise.
1520
1521 2021-01-13  Stafford Horne  <shorne@gmail.com>
1522
1523         * config/or1k/or1k.h (ASM_PREFERRED_EH_DATA_FORMAT): New macro.
1524
1525 2021-01-13  Stafford Horne  <shorne@gmail.com>
1526
1527         * config/or1k/linux.h (TARGET_ASM_FILE_END): Define macro.
1528
1529 2021-01-13  Stafford Horne  <shorne@gmail.com>
1530
1531         * config/or1k/or1k.h (TARGET_CPU_CPP_BUILTINS): Add builtin
1532           define for __or1k_hard_float__.
1533
1534 2021-01-13  Stafford Horne  <shorne@gmail.com>
1535
1536         * config/or1k/or1k.h (NO_PROFILE_COUNTERS): Define as 1.
1537         (PROFILE_HOOK): Define to call _mcount.
1538         (FUNCTION_PROFILER): Change from abort to no-op.
1539
1540 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
1541
1542         PR tree-optimization/96691
1543         * match.pd ((~X | C) ^ D -> (X | C) ^ (~D ^ C),
1544         (~X & C) ^ D -> (X & C) ^ (D ^ C)): New simplifications if
1545         (~D ^ C) or (D ^ C) can be simplified.
1546
1547 2021-01-13  Richard Biener  <rguenther@suse.de>
1548
1549         PR tree-optimization/92645
1550         * match.pd (BIT_FIELD_REF to conversion): Delay canonicalization
1551         until after vector lowering.
1552
1553 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
1554
1555         * config/aarch64/aarch64-sve.md (fnma<mode>4): Extend from SVE_FULL_I
1556         to SVE_I.
1557         (@aarch64_pred_fnma<mode>, cond_fnma<mode>, *cond_fnma<mode>_2)
1558         (*cond_fnma<mode>_4, *cond_fnma<mode>_any): Likewise.
1559
1560 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
1561
1562         * config/aarch64/aarch64-sve.md (fma<mode>4): Extend from SVE_FULL_I
1563         to SVE_I.
1564         (@aarch64_pred_fma<mode>, cond_fma<mode>, *cond_fma<mode>_2)
1565         (*cond_fma<mode>_4, *cond_fma<mode>_any): Likewise.
1566
1567 2021-01-13  Richard Biener  <rguenther@suse.de>
1568
1569         PR tree-optimization/92645
1570         * tree-vect-slp.c (vect_build_slp_tree_1): Relax supported
1571         BIT_FIELD_REF argument.
1572         (vect_build_slp_tree_2): Record the desired vector type
1573         on the external vector def.
1574         (vectorizable_slp_permutation): Handle required punning
1575         of existing vector defs.
1576
1577 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
1578
1579         * rtl-ssa/accesses.h (def_lookup): Fix order of comparison results.
1580
1581 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
1582
1583         * config/sh/sh.md (movsf_ie): Remove operands[2] test.
1584
1585 2021-01-13  Samuel Thibault  <samuel.thibault@ens-lyon.org>
1586
1587         * config.gcc [$target == *-*-gnu*]: Enable
1588         'default_gnu_indirect_function'.
1589
1590 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
1591
1592         PR target/95905
1593         * optabs.c (expand_vec_perm_const): Don't force v0 and v1 into
1594         registers before calling targetm.vectorize.vec_perm_const, only after
1595         that.
1596         * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): Handle
1597         two argument permutation when one operand is zero vector and only
1598         after that force operands into registers.
1599         * config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_1): New
1600         define_insn_and_split pattern.
1601         (*avx512bw_zero_extendv32qiv32hi2_1): Likewise.
1602         (*avx512f_zero_extendv16hiv16si2_1): Likewise.
1603         (*avx2_zero_extendv8hiv8si2_1): Likewise.
1604         (*avx512f_zero_extendv8siv8di2_1): Likewise.
1605         (*avx2_zero_extendv4siv4di2_1): Likewise.
1606         * config/mips/mips.c (mips_vectorize_vec_perm_const): Force operands
1607         into registers.
1608         * config/arm/arm.c (arm_vectorize_vec_perm_const): Likewise.
1609         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Likewise.
1610         * config/ia64/ia64.c (ia64_vectorize_vec_perm_const): Likewise.
1611         * config/aarch64/aarch64.c (aarch64_vectorize_vec_perm_const): Likewise.
1612         * config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const): Likewise.
1613         * config/gcn/gcn.c (gcn_vectorize_vec_perm_const): Likewise.  Use std::swap.
1614
1615 2021-01-13  Martin Liska  <mliska@suse.cz>
1616
1617         PR tree-optimization/98455
1618         * gimple-if-to-switch.cc (condition_info::record_phi_mapping):
1619         Record also virtual PHIs.
1620         (pass_if_to_switch::execute): Return TODO_cleanup_cfg only
1621         conditionally.
1622
1623 2021-01-13  Jonathan Wakely  <jwakely@redhat.com>
1624
1625         * doc/invoke.texi (C++ Modules): Fix typos.
1626
1627 2021-01-13  Richard Biener  <rguenther@suse.de>
1628
1629         PR tree-optimization/98640
1630         * tree-ssa-sccvn.c (visit_nary_op): Do not try to
1631         handle plus or minus from a truncated operand to be
1632         sign-extended.
1633
1634 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
1635
1636         PR target/96938
1637         * config/i386/i386.md (*btr<mode>_1, *btr<mode>_2): New
1638         define_insn_and_split patterns.
1639         (splitter after *btr<mode>_2): New splitter.
1640
1641 2021-01-13  Martin Liska  <mliska@suse.cz>
1642
1643         PR ipa/98652
1644         * cgraphunit.c (analyze_functions): Remove dead code.
1645
1646 2021-01-13  Qian Jianhua  <qianjh@cn.fujitsu.com>
1647
1648         * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
1649         * config/aarch64/aarch64.c (a64fx_addrcost_table): New.
1650         (a64fx_regmove_cost, a64fx_vector_cost): New.
1651         (a64fx_tunings): Use the new added cost tables.
1652
1653 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
1654
1655         PR target/95905
1656         * config/i386/predicates.md (pmovzx_parallel): New predicate.
1657         * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): New
1658         define_insn_and_split pattern.
1659         (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
1660         (*sse4_1_zero_extendv2siv2di2_3): Likewise.
1661
1662 2021-01-13  Julian Brown  <julian@codesourcery.com>
1663
1664         * config/gcn/gcn.c (gcn_conditional_register_usage): Remove dead code
1665         to fix v0 register.
1666
1667 2021-01-13  Julian Brown  <julian@codesourcery.com>
1668
1669         * config/gcn/gcn.c (gcn_md_reorg): Fix case where EXEC reg is live
1670         on entry to a BB.
1671
1672 2021-01-13  Julian Brown  <julian@codesourcery.com>
1673
1674         * config/gcn/gcn-valu.md (recip<mode>2<exec>, recip<mode>2): Use unspec
1675         for reciprocal-approximation instructions.
1676         (div<mode>3): Use fused multiply-accumulate operations for reciprocal
1677         refinement and division result.
1678         * config/gcn/gcn.md (UNSPEC_RCP): New unspec constant.
1679
1680 2021-01-13  Julian Brown  <julian@codesourcery.com>
1681
1682         * config/gcn/gcn-valu.md (subdf): Rename to...
1683         (subdf3): This.
1684
1685 2021-01-12  Martin Liska  <mliska@suse.cz>
1686
1687         * gcov.c (source_info::debug): Fix printf format for 32-bit hosts.
1688
1689 2021-01-12  Andrea Corallo  <andrea.corallo@arm.com>
1690
1691         * function-abi.h: Fix typo.
1692
1693 2021-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
1694
1695         PR target/97875
1696         PR target/97875
1697         * config/arm/arm.h (ARM_HAVE_NEON_V8QI_LDST): New macro.
1698         (ARM_HAVE_NEON_V16QI_LDST, ARM_HAVE_NEON_V4HI_LDST): Likewise.
1699         (ARM_HAVE_NEON_V8HI_LDST, ARM_HAVE_NEON_V2SI_LDST): Likewise.
1700         (ARM_HAVE_NEON_V4SI_LDST, ARM_HAVE_NEON_V4HF_LDST): Likewise.
1701         (ARM_HAVE_NEON_V8HF_LDST, ARM_HAVE_NEON_V4BF_LDST): Likewise.
1702         (ARM_HAVE_NEON_V8BF_LDST, ARM_HAVE_NEON_V2SF_LDST): Likewise.
1703         (ARM_HAVE_NEON_V4SF_LDST, ARM_HAVE_NEON_DI_LDST): Likewise.
1704         (ARM_HAVE_NEON_V2DI_LDST): Likewise.
1705         (ARM_HAVE_V8QI_LDST, ARM_HAVE_V16QI_LDST): Likewise.
1706         (ARM_HAVE_V4HI_LDST, ARM_HAVE_V8HI_LDST): Likewise.
1707         (ARM_HAVE_V2SI_LDST, ARM_HAVE_V4SI_LDST, ARM_HAVE_V4HF_LDST): Likewise.
1708         (ARM_HAVE_V8HF_LDST, ARM_HAVE_V4BF_LDST, ARM_HAVE_V8BF_LDST): Likewise.
1709         (ARM_HAVE_V2SF_LDST, ARM_HAVE_V4SF_LDST, ARM_HAVE_DI_LDST): Likewise.
1710         (ARM_HAVE_V2DI_LDST): Likewise.
1711         * config/arm/mve.md (*movmisalign<mode>_mve_store): New pattern.
1712         (*movmisalign<mode>_mve_load): New pattern.
1713         * config/arm/neon.md (movmisalign<mode>): Move to ...
1714         * config/arm/vec-common.md: ... here.
1715
1716 2021-01-12  Vladimir N. Makarov  <vmakarov@redhat.com>
1717
1718         PR target/97969
1719         * lra-eliminations.c (eliminate_regs_in_insn): Add transformation
1720         of pattern 'plus (plus (hard reg, const), pseudo)'.
1721
1722 2021-01-12  Richard Biener  <rguenther@suse.de>
1723
1724         PR tree-optimization/98550
1725         * tree-vect-slp.c (vect_record_max_nunits): Check whether
1726         the group size is a multiple of the vector element count.
1727         (vect_build_slp_tree_1): When we need to fail because
1728         the vector type choosen causes unrolling do so lazily
1729         without affecting matches only at the end to guide group splitting.
1730
1731 2021-01-12  Martin Liska  <mliska@suse.cz>
1732
1733         PR c++/97284
1734         * optc-save-gen.awk: Compare also n_target_save vars with
1735         strcmp.
1736
1737 2021-01-12  Martin Liska  <mliska@suse.cz>
1738
1739         * gcov.c (source_info::debug): New.
1740         (print_usage): Add --debug (-D) option.
1741         (process_args): Likewise.
1742         (generate_results): Call src->debug after
1743         accumulate_line_counts.
1744         (read_graph_file): Properly assign id for EXIT_BLOCK.
1745         * profile.c (branch_prob): Dump function body before it is
1746         instrumented.
1747
1748 2021-01-12  Jakub Jelinek  <jakub@redhat.com>
1749
1750         PR tree-optimization/98629
1751         * tree-ssa-math-opts.c (arith_overflow_check_p): Don't update use_stmt
1752         unless returning non-zero.
1753
1754 2021-01-12  Jakub Jelinek  <jakub@redhat.com>
1755
1756         PR tree-optimization/95731
1757         * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
1758         x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z.
1759         (optimize_range_tests): Call optimize_range_tests_cmp_bitwise
1760         only after optimize_range_tests_var_bound.
1761
1762 2021-01-12  Jakub Jelinek  <jakub@redhat.com>
1763
1764         * configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@.
1765         * configure: Regenerated.
1766
1767 2021-01-12  liuhongt  <hongtao.liu@intel.com>
1768
1769         PR target/98612
1770         * config/i386/i386-builtins.h (BUILTIN_DESC_SWAP_OPERANDS):
1771         Deleted.
1772         * config/i386/i386-expand.c (ix86_expand_sse_comi): Delete
1773         dead code.
1774
1775 2021-01-12  Alexandre Oliva  <oliva@adacore.com>
1776
1777         * ssa-iterators.h (end_imm_use_stmt_traverse): Forward
1778         declare.
1779         (auto_end_imm_use_stmt_traverse): New struct.
1780         (FOR_EACH_IMM_USE_STMT): Use it.
1781         (BREAK_FROM_IMM_USE_STMT, RETURN_FROM_IMM_USE_STMT): Remove,
1782         along with uses...
1783         * gimple-ssa-strength-reduction.c: ... here, ...
1784         * graphite-scop-detection.c: ... here, ...
1785         * ipa-modref.c, ipa-pure-const.c, ipa-sra.c: ... here, ...
1786         * tree-predcom.c, tree-ssa-ccp.c: ... here, ...
1787         * tree-ssa-dce.c, tree-ssa-dse.c: ... here, ...
1788         * tree-ssa-loop-ivopts.c, tree-ssa-math-opts.c: ... here, ...
1789         * tree-ssa-phiprop.c, tree-ssa.c: ... here, ...
1790         * tree-vect-slp.c: ... and here, ...
1791         * doc/tree-ssa.texi: ... and the example here.
1792
1793 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1794
1795         * config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from
1796         SVE_FULL_I to SVE_I.  Generate an UNSPEC_PRED_X.
1797         (*sdiv_pow2<mode>3): New pattern.
1798         (@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I.
1799         Wrap the ASRD in an UNSPEC_PRED_X.
1800         (*cond_<sve_int_op><mode>_2): Likewise.  Replace the UNSPEC_PRED_X
1801         predicate with a constant PTRUE, if it isn't already.
1802         (*cond_<sve_int_op><mode>_z): Replace with...
1803         (*cond_<sve_int_op><mode>_any): ...this new pattern.
1804
1805 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1806
1807         * config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from
1808         SVE_FULL_I to SVE_I.
1809         (*cond_bic<mode>_any): Likewise.
1810
1811 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1812
1813         * config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart)
1814         (@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I
1815         to SVE_I.
1816
1817 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1818
1819         * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from
1820         SVE_FULL_I to SVE_I.
1821         (*aarch64_cond_<su>abd<mode>_2): Likewise.
1822         (*aarch64_cond_<su>abd<mode>_any): Likewise.
1823         (@aarch64_pred_<su>abd<mode>): Likewise.  Use UNSPEC_PRED_X
1824         for the max and min but not for the minus.
1825         (*aarch64_cond_<su>abd<mode>_3): New pattern.
1826
1827 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1828
1829         * config/aarch64/iterators.md (SVE_24I): New iterator.
1830         * config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from
1831         SVE_FULL_SDI to SVE_24I.  Use containers rather than elements.
1832
1833 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1834
1835         * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>)
1836         (*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I
1837         to SVE_I.
1838         (*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise.
1839         (*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise.
1840         (*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise.
1841         (*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise.
1842
1843 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1844
1845         * config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3)
1846         (@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>)
1847         (*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I
1848         to SVE_I.
1849
1850 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
1851
1852         * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3)
1853         (v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>)
1854         (*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I.
1855
1856 2021-01-11  Martin Liska  <mliska@suse.cz>
1857
1858         PR jit/98615
1859         * symtab-clones.h (clone_info::release): Release
1860         symtab::m_clones with ggc_delete as it's a GGC memory.
1861
1862 2021-01-11  Matthias Klose  <doko@ubuntu.com>
1863
1864         * Makefile.in (LINK_PROGRESS): Show the link target.
1865
1866 2021-01-11  Richard Biener  <rguenther@suse.de>
1867
1868         PR tree-optimization/91403
1869         * tree-vect-data-refs.c (vect_analyze_group_access_1): Cap
1870         single-element interleaving group size at 4096 elements.
1871
1872 2021-01-11  Richard Biener  <rguenther@suse.de>
1873
1874         PR tree-optimization/98526
1875         * tree-vect-loop.c (vect_model_reduction_cost): Remove costing
1876         of the actual reduction op for the regular case.
1877         (vectorizable_reduction): Cost the stmts
1878         vect_transform_reduction produces here.
1879
1880 2021-01-11  Andreas Krebbel  <krebbel@linux.ibm.com>
1881
1882         * tree-ssa-forwprop.c (simplify_vector_constructor): For
1883         big-endian, use UNPACK[_FLOAT]_HI.
1884
1885 2021-01-11  Tamar Christina  <tamar.christina@arm.com>
1886
1887         * tree-vect-slp-patterns.c (class complex_pattern,
1888         class complex_add_pattern): Add parameters to matches.
1889         (complex_add_pattern::build): Free memory.
1890         (complex_add_pattern::matches): Move validation end of match.
1891         (complex_add_pattern::recognize): Likewise.
1892
1893 2021-01-11  Tamar Christina  <tamar.christina@arm.com>
1894
1895         * tree-vect-slp-patterns.c (linear_loads_p): Fix externals.
1896
1897 2021-01-11  Tamar Christina  <tamar.christina@arm.com>
1898
1899         * tree-vect-slp-patterns.c (is_linear_load_p): Fix ambiguity.
1900
1901 2021-01-11  Jakub Jelinek  <jakub@redhat.com>
1902
1903         PR tree-optimization/95867
1904         * tree-ssa-math-opts.h: New header.
1905         * tree-ssa-math-opts.c: Include tree-ssa-math-opts.h.
1906         (powi_as_mults): No longer static.  Use build_one_cst instead of
1907         build_real.  Formatting fix.
1908         * tree-ssa-reassoc.c: Include tree-ssa-math-opts.h.
1909         (attempt_builtin_powi): Handle multiplication reassociation without
1910         powi_fndecl using powi_as_mults.
1911         (reassociate_bb): For integral types don't require
1912         -funsafe-math-optimizations to call attempt_builtin_powi.
1913
1914 2021-01-11  Jakub Jelinek  <jakub@redhat.com>
1915
1916         PR tree-optimization/95852
1917         * tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change
1918         mul_stmts parameter type to vec<gimple *> &.  Before cond_stmt
1919         allow in the bb any of the stmts in that vector, div_stmt and
1920         up to 3 cast stmts.
1921         (arith_cast_equal_p): New function.
1922         (arith_overflow_check_p): Add cast_stmt argument, handle signed
1923         multiply overflow checks.
1924         (match_arith_overflow): Adjust caller.  Handle signed multiply
1925         overflow checks.
1926
1927 2021-01-11  Jakub Jelinek  <jakub@redhat.com>
1928
1929         PR tree-optimization/95852
1930         * tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function.
1931         (uaddsub_overflow_check_p): Renamed to ...
1932         (arith_overflow_check_p): ... this.  Handle also multiplication
1933         with overflow check.
1934         (match_uaddsub_overflow): Renamed to ...
1935         (match_arith_overflow): ... this.  Add cfg_changed argument.  Handle
1936         also multiplication with overflow check.  Adjust function comment.
1937         (math_opts_dom_walker::after_dom_children): Adjust callers.  Call
1938         match_arith_overflow also for MULT_EXPR.
1939
1940 2021-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1941
1942         * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
1943         __builtin_convertvector.
1944         (vmovl_s16): Likewise.
1945         (vmovl_s32): Likewise.
1946         (vmovl_u8): Likewise.
1947         (vmovl_u16): Likewise.
1948         (vmovl_u32): Likewise.
1949         (vmovn_s16): Likewise.
1950         (vmovn_s32): Likewise.
1951         (vmovn_s64): Likewise.
1952         (vmovn_u16): Likewise.
1953         (vmovn_u32): Likewise.
1954         (vmovn_u64): Likewise.
1955
1956 2021-01-11  Martin Liska  <mliska@suse.cz>
1957
1958         * gimple-if-to-switch.cc (struct condition_info): Use auto_var.
1959         (if_chain::is_beneficial): Delete clusters
1960         (find_conditions): Make second argument of conditions_in_bbs a
1961         pointer so that we control over it's lifetime.
1962         (pass_if_to_switch::execute): Delete them.
1963
1964 2021-01-11  Kewen Lin  <linkw@linux.ibm.com>
1965
1966         * ira.c (move_unallocated_pseudos): Check other_reg and skip if
1967         it isn't set.
1968
1969 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
1970
1971         * config/vax/vax.md (cc): Remove mode attribute.
1972         (subst_<cc>, subst_f<cc>): Rename to...
1973         (subst_<mode>, subst_f<VAXccnz:mode>): ... these respectively.
1974         (*cbranch<VAXint:mode>4_<VAXcc:mode>): Update for `cc' removal.
1975         (*cbranch<VAXfp:mode>4_<VAXccnz:mode>): Likewise.
1976         (*branch_<mode>, *branch_<mode>_reversed): Likewise.
1977
1978 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
1979
1980         * config/vax/vax.md (subst_f<cc>): Add mode to operands and
1981         `const_double_zero'.
1982
1983 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
1984
1985         * config/pdp11/pdp11.md (PDPfp): New mode iterator.
1986         (fcc_cc, fcc_ccnz): Use it.  Add mode to `const_double_zero' and
1987         operands.
1988
1989 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
1990
1991         * genemit.c (gen_exp) <CONST_DOUBLE>: Handle `const_double_zero'
1992         rtx.
1993         * read-rtl.c (rtx_reader::read_rtx_code): Handle machine mode
1994         with `const_double_zero'.
1995         * doc/rtl.texi (Constant Expression Types): Document it.
1996
1997 2021-01-09  Jakub Jelinek  <jakub@redhat.com>
1998
1999         PR c++/98556
2000         * tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
2001         POINTER_DIFF_EXPR to be any integral type.
2002
2003 2021-01-09  Jakub Jelinek  <jakub@redhat.com>
2004
2005         PR rtl-optimization/98603
2006         * function.c (instantiate_virtual_regs_in_insn): For asm goto
2007         with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL
2008         if any, set ASM_OPERANDS mode to VOIDmode and change
2009         ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX.
2010
2011 2021-01-09  Alexandre Oliva  <oliva@gnu.org>
2012
2013         PR debug/97714
2014         * final.c (notice_source_line): Narrow down the condition to
2015         skip a line-0 marker.
2016
2017 2021-01-08  Sergei Trofimovich  <siarheit@google.com>
2018
2019         * ipa-modref.c (merge_call_side_effects): Fix
2020         linebreak split by reordering two print calls.
2021
2022 2021-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>
2023
2024         * config/s390/vector.md (*tf_to_fprx2_0): Rename from
2025         "*mov_tf_to_fprx2_0" for consistency, fix constraint.
2026         (*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
2027         consistency, fix constraint.
2028
2029 2021-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>
2030
2031         * config/s390/s390-c.c (s390_def_or_undef_macro): Accept
2032         callables instead of mask values.
2033         (struct target_flag_set_p): New predicate.
2034         (s390_cpu_cpp_builtins_internal): Define or undefine
2035         __LONG_DOUBLE_VX__ macro.
2036
2037 2021-01-08  H.J. Lu  <hjl.tools@gmail.com>
2038
2039         PR target/98482
2040         * config/i386/i386.c (x86_function_profiler): Use R10 and R11
2041         to call mcount in large model with PIC for NO_PROFILE_COUNTERS
2042         targets.
2043
2044 2021-01-08  Richard Biener  <rguenther@suse.de>
2045
2046         * tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.
2047
2048 2021-01-08  Richard Biener  <rguenther@suse.de>
2049
2050         * tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
2051         (vect_build_slp_tree): On cache hit release the matched
2052         scalar stmts vector.
2053         * tree-vect-stmts.c (vectorizable_store): Properly free
2054         vec_oprnds before possibly gathering them again.
2055
2056 2021-01-08  Richard Biener  <rguenther@suse.de>
2057
2058         PR tree-optimization/98544
2059         * tree-vect-slp.c (vect_optimize_slp): Always materialize
2060         permutes at a permute node.
2061
2062 2021-01-08  H.J. Lu  <hjl.tools@gmail.com>
2063
2064         PR target/98482
2065         * config/i386/i386.c (x86_function_profiler): Use R10 to call
2066         mcount in large model.  Sorry for large model with PIC.
2067
2068 2021-01-08  Jakub Jelinek  <jakub@redhat.com>
2069
2070         PR target/98585
2071         * config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
2072         ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
2073         ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
2074         TargetSave and initialize for variables with enum types.
2075         (mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
2076         mstack-protector-guard-symbol=): Add Save.
2077         * config/i386/i386-options.c (ix86_function_specific_save,
2078         ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
2079         x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
2080         x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
2081         x_ix86_veclibabi_type.
2082
2083 2021-01-08  Richard Sandiford  <richard.sandiford@arm.com>
2084
2085         * config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
2086         SVE_FULL_I to SVE_I.
2087         (*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
2088
2089 2021-01-08  Richard Sandiford  <richard.sandiford@arm.com>
2090
2091         * config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
2092         SVE_FULL_I to SVE_I.
2093         (*cond_uxt<mode>_any): Likewise.
2094
2095 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2096
2097         * config/aarch64/iterators.md (Vwhalf): New iterator.
2098         * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
2099         Rename to...
2100         (aarch64_<sur>adalp<mode>): ... This.  Make more
2101         builtin-friendly.
2102         (<sur>sadv16qi): Adjust callsite of the above.
2103         * config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
2104         builtins.
2105         * config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
2106         builtins.
2107         (vpadal_s16): Likewise.
2108         (vpadal_u8): Likewise.
2109         (vpadal_u16): Likewise.
2110         (vpadalq_s8): Likewise.
2111         (vpadalq_s16): Likewise.
2112         (vpadalq_s32): Likewise.
2113         (vpadalq_u8): Likewise.
2114         (vpadalq_u16): Likewise.
2115         (vpadalq_u32): Likewise.
2116
2117 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2118
2119         * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3):
2120         Rename to...
2121         (aarch64_<su>abd<mode>): ... This.
2122         (<sur>sadv16qi): Adjust callsite of the above.
2123         * config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define
2124         builtins.
2125         * config/aarch64/arm_neon.h (vabd_s8): Reimplement using
2126         builtin.
2127         (vabd_s16): Likewise.
2128         (vabd_s32): Likewise.
2129         (vabd_u8): Likewise.
2130         (vabd_u16): Likewise.
2131         (vabd_u32): Likewise.
2132         (vabdq_s8): Likewise.
2133         (vabdq_s16): Likewise.
2134         (vabdq_s32): Likewise.
2135         (vabdq_u8): Likewise.
2136         (vabdq_u16): Likewise.
2137         (vabdq_u32): Likewise.
2138
2139 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2140
2141         * config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define
2142         builtins.
2143         * config/aarch64/arm_neon.h (vaba_s8): Implement using builtin.
2144         (vaba_s16): Likewise.
2145         (vaba_s32): Likewise.
2146         (vaba_u8): Likewise.
2147         (vaba_u16): Likewise.
2148         (vaba_u32): Likewise.
2149         (vabaq_s8): Likewise.
2150         (vabaq_s16): Likewise.
2151         (vabaq_s32): Likewise.
2152         (vabaq_u8): Likewise.
2153         (vabaq_u16): Likewise.
2154         (vabaq_u32): Likewise.
2155
2156 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2157
2158         * config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
2159         (aarch64_<su>aba<mode>): ... This.  Handle uaba as well.
2160         Change RTL pattern to match.
2161
2162 2021-01-08  Kito Cheng  <kito.cheng@sifive.com>
2163
2164         * common/config/riscv/riscv-common.c (riscv_current_subset_list): New.
2165         * config/riscv/riscv-c.c (riscv-subset.h): New.
2166         (INCLUDE_STRING): Define.
2167         (riscv_cpu_cpp_builtins): Add new style architecture extension
2168         test macros.
2169         * config/riscv/riscv-subset.h (riscv_subset_list::begin): New.
2170         (riscv_subset_list::end): New.
2171         (riscv_current_subset_list): New.
2172
2173 2021-01-08  Kito Cheng  <kito.cheng@sifive.com>
2174
2175         * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION):
2176         Move to riscv-subset.h.
2177         (struct riscv_subset_t): Ditto.
2178         (class riscv_subset_list): Ditto.
2179         * config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move
2180         from riscv-common.c.
2181         (struct riscv_subset_t): Ditto.
2182         (class riscv_subset_list): Ditto.
2183         * config/riscv/t-riscv ($(common_out_file)): Add file
2184         dependency.
2185
2186 2021-01-07  Jakub Jelinek  <jakub@redhat.com>
2187
2188         PR target/98567
2189         * config/i386/i386.md (*bmi_blsi_<mode>_cmp, *bmi_blsi_<mode>_ccno):
2190         New define_insn patterns.
2191
2192 2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>
2193
2194         * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_UNARY:optab><mode>)
2195         (*cond_<SVE_INT_UNARY:optab><mode>_2): Extend from SVE_FULL_I to SVE_I.
2196         (*cond_<SVE_INT_UNARY:optab><mode>_any): Likewise.
2197
2198 2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>
2199
2200         PR tree-optimization/98560
2201         * internal-fn.def (IFN_VCONDU, IFN_VCONDEQ): Use type vec_cond.
2202         * internal-fn.c (vec_cond_mask_direct): Get the data mode from
2203         argument 1.
2204         (vec_cond_direct): Likewise argument 2.
2205         (vec_condu_direct, vec_condeq_direct): Delete.
2206         (expand_vect_cond_optab_fn): Rename to...
2207         (expand_vec_cond_optab_fn): ...this, replacing old macro.
2208         (expand_vec_condu_optab_fn, expand_vec_condeq_optab_fn): Delete.
2209         (expand_vect_cond_mask_optab_fn): Rename to...
2210         (expand_vec_cond_mask_optab_fn): ...this, replacing old macro.
2211         (direct_vec_cond_mask_optab_supported_p): Treat the optab as a
2212         convert optab.
2213         (direct_vec_cond_optab_supported_p): Likewise.
2214         (direct_vec_condu_optab_supported_p): Delete.
2215         (direct_vec_condeq_optab_supported_p): Delete.
2216         * gimple-isel.cc: Include internal-fn.h.
2217         (gimple_expand_vec_cond_expr): Check that IFN_VCONDEQ is supported
2218         before using it.
2219
2220 2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>
2221
2222         PR tree-optimization/98560
2223         * gimple-isel.cc (gimple_expand_vec_cond_expr): If we fail to use
2224         IFN_VCOND{,U,EQ}, fall back on IFN_VCOND_MASK.
2225
2226 2021-01-07  Uroš Bizjak  <ubizjak@gmail.com>
2227
2228         * config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn,
2229         rotate_insn and optab code attributes.
2230         Update all uses to merged code attribute.
2231         * config/i386/sse.md: Update all uses to merged code attribute.
2232         * config/i386/mmx.md: Update all uses to merged code attribute.
2233
2234 2021-01-07  Jakub Jelinek  <jakub@redhat.com>
2235
2236         PR tree-optimization/98568
2237         * gimple-ssa-store-merging.c (bswap_view_convert): New function.
2238         (bswap_replace): Use it.
2239
2240 2021-01-06  Vladimir N. Makarov  <vmakarov@redhat.com>
2241
2242         PR rtl-optimization/97978
2243         * lra-int.h (lra_hard_reg_split_p): New external.
2244         * lra.c (lra_hard_reg_split_p): New global.
2245         (lra): Set up lra_hard_reg_split_p after splitting a hard reg.
2246         * lra-assigns.c (lra_assign): Don't check allocation correctness
2247         after hard reg splitting.
2248
2249 2021-01-06  Martin Sebor  <msebor@redhat.com>
2250
2251         PR c++/98305
2252         * builtins.c (new_delete_mismatch_p): New overload.
2253         (new_delete_mismatch_p (tree, tree)): Call it.
2254
2255 2021-01-06  Alexandre Oliva  <oliva@adacore.com>
2256
2257         * Makefile.in (T_GLIMITS_H): New.
2258         (stmp-int-hdrs): Depend on it, use it.
2259         * config/t-vxworks (T_GLIMITS_H): Override it.
2260         (vxw-glimits.h): New.
2261
2262 2021-01-06  Richard Biener  <rguenther@suse.de>
2263
2264         PR tree-optimization/98513
2265         * value-range.cc (intersect_ranges): Compare the upper bounds
2266         for the expected relation.
2267
2268 2021-01-06  Gerald Pfeifer  <gerald@pfeifer.com>
2269
2270         Revert:
2271         2020-12-28  Gerald Pfeifer  <gerald@pfeifer.com>
2272
2273         * doc/standards.texi (HSAIL): Remove section.
2274
2275 2021-01-05  Samuel Thibault  <samuel.thibault@ens-lyon.org>
2276
2277         * configure: Re-generate.
2278
2279 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
2280
2281         * doc/invoke.texi (-std=c++20): Adjust for the publication of
2282         ISO 14882:2020 standard.
2283         * doc/standards.texi: Likewise.
2284
2285 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
2286
2287         PR tree-optimization/94802
2288         * expr.h (maybe_optimize_sub_cmp_0): Declare.
2289         * expr.c: Include tree-pretty-print.h and flags.h.
2290         (maybe_optimize_sub_cmp_0): New function.
2291         (do_store_flag): Use it.
2292         * cfgexpand.c (expand_gimple_cond): Likewise.
2293
2294 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
2295
2296         * mux-utils.h (pointer_mux::m_ptr): Tweak description of contents.
2297         * rtlanal.c (simple_regno_set): Tweak description to clarify the
2298         RMW condition.
2299
2300 2021-01-05  Richard Biener  <rguenther@suse.de>
2301
2302         PR tree-optimization/98516
2303         * tree-vect-slp.c (vect_optimize_slp): Permute the incoming
2304         lanes when materializing on a VEC_PERM node.
2305         (vectorizable_slp_permutation): Dump the permute properly.
2306
2307 2021-01-05  Richard Biener  <rguenther@suse.de>
2308
2309         * tree-vect-slp.c (vect_slp_region): Move debug counter
2310         to cover individual subgraphs.
2311
2312 2021-01-05  Richard Biener  <rguenther@suse.de>
2313
2314         PR tree-optimization/98428
2315         * tree-vect-slp.c (vect_build_slp_tree_1): Properly reject
2316         vector lane extracts for loop vectorization.
2317
2318 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
2319
2320         PR tree-optimization/98514
2321         * tree-ssa-reassoc.c (bb_rank): Change type from long * to
2322         int64_t *.
2323         (operand_rank): Change type from hash_map<tree, long> to
2324         hash_map<tree, int64_t>.
2325         (phi_rank): Change return type from long to int64_t.
2326         (loop_carried_phi): Change block_rank variable type from long to
2327         int64_t.
2328         (propagate_rank): Change return type, rank parameter type and
2329         op_rank variable type from long to int64_t.
2330         (find_operand_rank): Change return type from long to int64_t
2331         and change slot variable type from long * to int64_t *.
2332         (insert_operand_rank): Change rank parameter type from long to
2333         int64_t.
2334         (get_rank): Change return type and rank variable type from long to
2335         int64_t.  Use PRId64 instead of ld to print the rank.
2336         (init_reassoc): Change rank variable type from long to int64_t
2337         and adjust correspondingly bb_rank and operand_rank initialization.
2338
2339 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
2340
2341         PR tree-optimization/96928
2342         * tree-ssa-phiopt.c (xor_replacement): New function.
2343         (tree_ssa_phiopt_worker): Call it.
2344
2345 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
2346
2347         PR tree-optimization/96930
2348         * match.pd ((A / (1 << B)) -> (A >> B)): If A is extended
2349         from narrower value which has the same type as 1 << B, perform
2350         the right shift on the narrower value followed by extension.
2351
2352 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
2353
2354         PR tree-optimization/96239
2355         * gimple-ssa-store-merging.c (maybe_optimize_vector_constructor): New
2356         function.
2357         (get_status_for_store_merging): Don't return BB_INVALID for blocks
2358         with potential bswap optimizable CONSTRUCTORs.
2359         (pass_store_merging::execute): Optimize vector CONSTRUCTORs with bswap
2360         if possible.
2361
2362 2021-01-05  Richard Biener  <rguenther@suse.de>
2363
2364         PR tree-optimization/98381
2365         * tree.c (vector_element_bits): Properly compute bool vector
2366         element size.
2367         * tree-vect-loop.c (vectorizable_live_operation): Properly
2368         compute the last lane bit offset.
2369
2370 2021-01-05  Uroš Bizjak  <ubizjak@gmail.com>
2371
2372         PR target/98522
2373         * config/i386/sse.md (sse_cvtps2pi): Redefine as define_insn_and_split.
2374         Clear the top 64 bytes of the input XMM register.
2375         (sse_cvttps2pi): Ditto.
2376
2377 2021-01-05  Uroš Bizjak  <ubizjak@gmail.com>
2378
2379         PR target/98521
2380         * config/i386/xopintrin.h (_mm256_cmov_si256): New.
2381
2382 2021-01-05  H.J. Lu  <hjl.tools@gmail.com>
2383
2384         PR target/98495
2385         * config/i386/xmmintrin.h (_mm_extract_pi16): Cast to unsigned
2386         short first.
2387
2388 2021-01-05  Claudiu Zissulescu  <claziss@synopsys.com>
2389
2390         * config/arc/arc.md (maddsidi4_split): Use ACC_REG_FIRST.
2391         (umaddsidi4_split): Likewise.
2392
2393 2021-01-05  liuhongt  <hongtao.liu@intel.com>
2394
2395         PR target/98461
2396         * config/i386/sse.md (*sse2_pmovskb_zexthisi): New
2397         define_insn_and_split for zero_extend of subreg HI of pmovskb
2398         result.
2399         (*sse2_pmovskb_zexthisi): Add new combine splitters for
2400         zero_extend of not of subreg HI of pmovskb result.
2401
2402 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
2403
2404         PR target/97269
2405         * explow.c (convert_memory_address_addr_space_1): Handle UNSPECs
2406         nested in CONSTs.
2407         * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Use
2408         convert_memory_address to convert symbolic immediates to ptr_mode
2409         before forcing them to memory.
2410
2411 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
2412
2413         PR rtl-optimization/97144
2414         * recog.c (constrain_operands): Initialize matching_operand
2415         for each alternative, rather than only doing it once.
2416
2417 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
2418
2419         PR rtl-optimization/98403
2420         * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Explain
2421         why we don't remove call clobbers.
2422         (function_info::apply_changes_to_insn): Don't attempt to add
2423         call clobbers here.
2424
2425 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
2426
2427         PR tree-optimization/98371
2428         * tree-vect-loop.c (vect_reanalyze_as_main_loop): New function.
2429         (vect_analyze_loop): If an epilogue loop appears to be cheaper
2430         than the main loop, re-analyze it as a main loop before adopting
2431         it as a main loop.
2432
2433 2021-01-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2434
2435         PR c++/98316
2436         * configure.ac (NETLIBS): Determine using AX_LIB_SOCKET_NSL.
2437         * aclocal.m4, configure: Regenerate.
2438         * Makefile.in (NETLIBS): Define.
2439         (BACKEND): Remove $(CODYLIB).
2440
2441 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
2442
2443         PR rtl-optimization/98334
2444         * simplify-rtx.c (simplify_context::simplify_binary_operation_1):
2445         Optimize (X - 1) * Y + Y to X * Y or (X + 1) * Y - Y to X * Y.
2446
2447 2021-01-05  Bernd Edlinger  <bernd.edlinger@hotmail.de>
2448
2449         * tree-inline.c (expand_call_inline): Restore input_location.
2450         Return result from recursive call.
2451
2452 2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>
2453
2454         PR tree-optimization/95401
2455         * config/aarch64/aarch64-sve-builtins.cc
2456         (gimple_folder::load_store_cookie): Use bits rather than bytes
2457         for the alignment argument to IFN_MASK_LOAD and IFN_MASK_STORE.
2458         * gimple-fold.c (gimple_fold_mask_load_store_mem_ref): Likewise.
2459         * tree-vect-stmts.c (vectorizable_store): Likewise.
2460         (vectorizable_load): Likewise.
2461
2462 2021-01-04  Richard Biener  <rguenther@suse.de>
2463
2464         PR tree-optimization/98308
2465         * tree-vect-stmts.c (vectorizable_load): Set invariant mask
2466         SLP vectype.
2467
2468 2021-01-04  Jakub Jelinek  <jakub@redhat.com>
2469
2470         PR tree-optimization/95771
2471         * tree-ssa-loop-niter.c (number_of_iterations_popcount): Handle types
2472         with precision smaller than int's precision and types with precision
2473         twice as large as long long.  Formatting fixes.
2474
2475 2021-01-04  Richard Biener  <rguenther@suse.de>
2476
2477         PR tree-optimization/98464
2478         * tree-ssa-sccvn.c (vn_valueize_for_srt): Rename from ...
2479         (vn_valueize_wrapper): ... this.  Temporarily adjust vn_context_bb.
2480         (process_bb): Adjust.
2481
2482 2021-01-04  Matthew Malcomson  <matthew.malcomson@arm.com>
2483
2484         PR other/98437
2485         * doc/invoke.texi (-fsanitize=address): Fix wording describing
2486         clash with -fsanitize=hwaddress.
2487
2488 2021-01-04  Richard Biener  <rguenther@suse.de>
2489
2490         PR tree-optimization/98282
2491         * tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on
2492         invariants as VN_NARY.
2493
2494 2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>
2495
2496         PR target/89057
2497         * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Accept
2498         aarch64_simd_reg_or_zero for operand 2.  Use the combinez patterns
2499         to handle zero operands.
2500
2501 2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>
2502
2503         * config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function.
2504         (offset_6bit_unsigned_scaled_p): Fix typo in comment.
2505         (aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range
2506         [-32, 31].
2507
2508 2021-01-04  Richard Biener  <rguenther@suse.de>
2509
2510         PR tree-optimization/98393
2511         * tree-vect-slp.c (vect_build_slp_tree): Properly zero matches
2512         when hitting the limit.
2513
2514 2021-01-04  Richard Biener  <rguenther@suse.de>
2515
2516         PR tree-optimization/98291
2517         * tree-vect-loop.c (vectorizable_reduction): Bypass
2518         associativity check for SLP reductions with VF 1.
2519
2520 2021-01-04  Jakub Jelinek  <jakub@redhat.com>
2521
2522         PR tree-optimization/96782
2523         * match.pd (x == ~x -> false, x != ~x -> true): New simplifications.
2524
2525 2021-01-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
2526
2527         * collect-utils.c (collect_execute): Check dumppfx.
2528         * collect2.c (maybe_run_lto_and_relink, do_link): Pass atsuffix
2529         to collect_execute.
2530         (do_link): Add new parameter atsuffix.
2531         (main): Handle -dumpdir option.  Skip one argument for
2532         -o, -isystem and -B options.
2533         * gcc.c (make_at_file): New helper function.
2534         (close_at_file): Use it.
2535
2536 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
2537
2538         * config/darwin.h (MIN_LD64_NO_COAL_SECTS): Adjust.
2539         Amend handling for LD64_VERSION fallback defaults.
2540
2541 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
2542
2543         * config.gcc: Compute default version information
2544         from the configured target.  Likewise defaults for
2545         ld64.
2546         * config/darwin10.h: Removed.
2547         * config/darwin12.h: Removed.
2548         * config/darwin9.h: Removed.
2549         * config/rs6000/darwin8.h: Removed.
2550
2551 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
2552
2553         * config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Delete.
2554
2555 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
2556
2557         * config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Move from here..
2558         * config/darwin.h (STACK_CHECK_STATIC_BUILTIN): .. to here.
2559
2560 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
2561
2562         * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move from
2563         here...
2564         * config/darwin.h (LINK_GCC_C_SEQUENCE_SPEC): ... to here.
2565
2566 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
2567
2568         * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move the spec
2569         for the Darwin10 unwinder stub from here ...
2570         * config/darwin.h (LINK_COMMAND_SPEC_A): ... to here.
2571
2572 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
2573
2574         * config/darwin.h (DSYMUTIL_SPEC): Default to DWARF
2575         (ASM_DEBUG_SPEC):Only define if the assembler supports
2576         stabs.
2577         (PREFERRED_DEBUGGING_TYPE): Default to DWARF.
2578         (DARWIN_PREFER_DWARF): Define.
2579         * config/darwin9.h (PREFERRED_DEBUGGING_TYPE): Remove.
2580         (DARWIN_PREFER_DWARF): Likewise
2581         (DSYMUTIL_SPEC): Likewise.
2582         (COLLECT_RUN_DSYMUTIL): Likewise.
2583         (ASM_DEBUG_SPEC): Likewise.
2584         (ASM_DEBUG_OPTION_SPEC): Likewise.
2585
2586 2021-01-02  Jan Hubicka  <jh@suse.cz>
2587
2588         * cfg.c (free_block): ggc_free bb.
2589
2590 2021-01-01  Jakub Jelinek  <jakub@redhat.com>
2591
2592         * gcc.c (process_command): Update copyright notice dates.
2593         * gcov-dump.c (print_version): Ditto.
2594         * gcov.c (print_version): Ditto.
2595         * gcov-tool.c (print_version): Ditto.
2596         * gengtype.c (create_file): Ditto.
2597         * doc/cpp.texi: Bump @copying's copyright year.
2598         * doc/cppinternals.texi: Ditto.
2599         * doc/gcc.texi: Ditto.
2600         * doc/gccint.texi: Ditto.
2601         * doc/gcov.texi: Ditto.
2602         * doc/install.texi: Ditto.
2603         * doc/invoke.texi: Ditto.
2604
2605 2021-01-01  Jakub Jelinek  <jakub@redhat.com>
2606
2607         * ChangeLog-2020: Rotate ChangeLog.  New file.
2608
2609 \f
2610 Copyright (C) 2021 Free Software Foundation, Inc.
2611
2612 Copying and distribution of this file, with or without modification,
2613 are permitted in any medium without royalty provided the copyright
2614 notice and this notice are preserved.