gcc/ChangeLog

   1 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
   2
   3         * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
   4
   5 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
   6
   7         * config/arm/arm.c (arm_mve_immediate_check): Removed.
   8         * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
   9         (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
  10          mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
  11          mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
  12          mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
  13          mve_vqshruntq_m_n_s*): Fixed immediate constraints.
  14
  15 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  16
  17         * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
  18
  19 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  20
  21         * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
  22         * config/arm/mve/md: Fix v[id]wdup patterns.
  23
  24 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  25
  26         * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
  27         * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
  28
  29 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  30
  31         * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
  32         and remove const_ptr enums.
  33
  34 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  35
  36         * config/arm/arm_mve.h (vsubq_n): Merge with...
  37         (vsubq): ... this.
  38         (vmulq_n): Merge with...
  39         (vmulq): ... this.
  40         (__ARM_mve_typeid): Simplify scalar and constant detection.
  41
  42 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
  43
  44         PR target/94509
  45         * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
  46         for inter-lane permutation for 64-byte modes.
  47
  48 2020-04-07  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  49
  50         * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
  51
  52 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
  53
  54         PR target/94500
  55         * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
  56         handle i < 64 using avx512bw_lshrv4ti3.  Formatting fixes.
  57
  58 2020-04-06  Jakub Jelinek  <jakub@redhat.com>
  59
  60         * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
  61         + const0_rtx return the SP_DERIVED_VALUE_P.
  62
  63 2020-04-06  Richard Sandiford  <richard.sandiford@arm.com>
  64
  65         PR rtl-optimization/92989
  66         * lra-lives.c (process_bb_lives): Do not treat eh_return data
  67         registers as being live at the beginning of the EH receiver.
  68
  69 2020-04-05 Zachary Spytz  <zspytz@gmail.com>
  70
  71         * extend.texi: Add free to list of ISO C90 functions that
  72         are recognized by the compiler.
  73
  74 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
  75
  76         * config/microblaze/microblaze.c (microblaze_must_save_register): Check
  77         for fast_interrupt.
  78
  79         * config/microblaze/microblaze.md (trap): Update output pattern.
  80
  81 2020-04-04  Hannes Domani  <ssbssa@yahoo.de>
  82             Jakub Jelinek  <jakub@redhat.com>
  83
  84         PR debug/94459
  85         * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
  86         arrays, pointer-to-members, function types and qualifiers when
  87         checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
  88         to emit type again on definition.
  89
  90 2020-04-04  Jan Hubicka  <hubicka@ucw.cz>
  91
  92         PR ipa/93940
  93         * ipa-fnsummary.c (vrp_will_run_p): New function.
  94         (fre_will_run_p): New function.
  95         (evaluate_properties_for_edge): Use it.
  96         * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
  97         !optimize_debug to optimize_debug.
  98
  99 2020-04-04  Jakub Jelinek  <jakub@redhat.com>
 100
 101         PR rtl-optimization/94468
 102         * cselib.c (references_value_p): Formatting fix.
 103         (cselib_useless_value_p): New function.
 104         (discard_useless_locs, discard_useless_values,
 105         cselib_invalidate_regno_val, cselib_invalidate_mem,
 106         cselib_record_set): Use it instead of
 107         v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
 108
 109         PR debug/94441
 110         * tree-iterator.h (expr_single): Declare.
 111         * tree-iterator.c (expr_single): New function.
 112         * tree.h (protected_set_expr_location_if_unset): Declare.
 113         * tree.c (protected_set_expr_location): Use expr_single.
 114         (protected_set_expr_location_if_unset): New function.
 115
 116 2020-04-03  Jeff Law  <law@redhat.com>
 117
 118         PR rtl-optimization/92264
 119         * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
 120         reloading of auto-increment addressing modes.
 121
 122 2020-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 123
 124         PR target/94467
 125         * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
 126         as earlyclobber.
 127
 128 2020-04-03  Jeff Law  <law@redhat.com>
 129
 130         PR rtl-optimization/92264
 131         * config/m32r/m32r.c (m32r_output_block_move): Properly account for
 132         post-increment addressing of source operands as well as residuals
 133         when computing any adjustments to the input pointer.
 134
 135 2020-04-03  Jakub Jelinek  <jakub@redhat.com>
 136
 137         PR target/94460
 138         * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
 139         avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
 140         second half of first lane from first lane of second operand and
 141         first half of second lane from second lane of first operand.
 142
 143 2020-04-03  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 144
 145         * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
 146
 147 2020-04-03  Tamar Christina  <tamar.christina@arm.com>
 148
 149         PR target/94396
 150         * common/config/aarch64/aarch64-common.c
 151         (aarch64_get_extension_string_for_isa_flags): Handle default flags.
 152
 153 2020-04-03  Richard Biener  <rguenther@suse.de>
 154
 155         PR middle-end/94465
 156         * tree.c (array_ref_low_bound): Deal with released SSA names
 157         in index position.
 158
 159 2020-04-03  Kwok Cheung Yeung  <kcy@codesourcery.com>
 160
 161         * config/gcn/gcn.c (print_operand): Handle unordered comparison
 162         operators.
 163         * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
 164         comparison operators.
 165
 166 2020-04-03  Kewen Lin  <linkw@gcc.gnu.org>
 167
 168         PR tree-optimization/94443
 169         * tree-vect-loop.c (vectorizable_live_operation): Use
 170         gsi_insert_seq_before to replace gsi_insert_before.
 171
 172 2020-04-03  Martin Liska  <mliska@suse.cz>
 173
 174         PR ipa/94445
 175         * ipa-icf-gimple.c (func_checker::compare_gimple_call):
 176           Compare type attributes for gimple_call_fntypes.
 177
 178 2020-04-02  Sandra Loosemore  <sandra@codesourcery.com>
 179
 180         * alias.c (get_alias_set): Fix comment typos.
 181
 182 2020-04-02  Fritz Reese  <foreese@gcc.gnu.org>
 183
 184         PR fortran/85982
 185         * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
 186         attribute checking used by TYPE.
 187
 188 2020-04-02  Martin Jambor  <mjambor@suse.cz>
 189
 190         PR ipa/92676
 191         * ipa-sra.c (struct caller_issues): New fields candidate and
 192         call_from_outside_comdat.
 193         (check_for_caller_issues): Check for calls from outsied of
 194         candidate's same_comdat_group.
 195         (check_all_callers_for_issues): Set up issues.candidate, check result
 196         of the new check.
 197         (mark_callers_calls_comdat_local): New function.
 198         (process_isra_node_results): Set calls_comdat_local of callers if
 199         appropriate.
 200
 201 2020-04-02  Richard Biener  <rguenther@suse.de>
 202
 203         PR c/94392
 204         * common.opt (ffinite-loops): Initialize to zero.
 205         * opts.c (default_options_table): Remove OPT_ffinite_loops
 206         entry.
 207         * cfgloop.h (loop::finite_p): New member.
 208         * cfgloopmanip.c (copy_loop_info): Copy finite_p.
 209         * ipa-icf-gimple.c (func_checker::compare_loops): Compare
 210         finite_p.
 211         * lto-streamer-in.c (input_cfg): Stream finite_p.
 212         * lto-streamer-out.c (output_cfg): Likewise.
 213         * tree-cfg.c (replace_loop_annotate): Initialize finite_p
 214         from flag_finite_loops at CFG build time.
 215         * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
 216         finite_p flag instead of flag_finite_loops.
 217         * doc/invoke.texi (ffinite-loops): Adjust documentation of
 218         default setting.
 219
 220 2020-04-02  Richard Biener  <rguenther@suse.de>
 221
 222         PR debug/94450
 223         * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
 224         DW_TAG_imported_unit.
 225
 226 2020-04-02  Maciej W. Rozycki  <macro@wdc.com>
 227
 228         * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
 229         <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
 230         2.30.
 231
 232 2020-04-02  Kewen Lin  <linkw@gcc.gnu.org>
 233
 234         PR tree-optimization/94401
 235         * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
 236         access type when loading halves of vector to avoid peeling for gaps.
 237
 238 2020-04-02  Jakub Jelinek  <jakub@redhat.com>
 239
 240         * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
 241         between a string literal and MIPS_SYSVERSION_SPEC macro.
 242
 243 2020-04-02  Martin Jambor  <mjambor@suse.cz>
 244
 245         * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
 246
 247 2020-04-02  Jakub Jelinek  <jakub@redhat.com>
 248
 249         PR rtl-optimization/92264
 250         * params.opt (-param=max-find-base-term-values=): Decrease default
 251         from 2000 to 200.
 252
 253         PR rtl-optimization/92264
 254         * rtl.h (struct rtx_def): Mention that call bit is used as
 255         SP_DERIVED_VALUE_P in cselib.c.
 256         * cselib.c (SP_DERIVED_VALUE_P): Define.
 257         (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
 258         (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
 259         val_rtx and sp based expression where offsets cancel each other.
 260         (preserve_constants_and_equivs): Formatting fix.
 261         (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
 262         locs list for cfa_base_preserved_val if needed.  Formatting fix.
 263         (autoinc_split): If the to be returned value is a REG, MEM or
 264         VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
 265         locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
 266         (rtx_equal_for_cselib_1): Call autoinc_split even if both
 267         expressions are PLUS in Pmode with CONST_INT second operands.
 268         Handle SP_DERIVED_VALUE_P cases.
 269         (cselib_hash_plus_const_int): New function.
 270         (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
 271         second operand, as well as for PRE_DEC etc. that ought to be
 272         hashed the same way.
 273         (cselib_subst_to_values): Substitute PLUS with Pmode and
 274         CONST_INT operand if the first operand is a VALUE which has
 275         SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
 276         SP_DERIVED_VALUE_P + adjusted offset.
 277         (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
 278         set SP_DERIVED_VALUE_P on it.  Set PRESERVED_VALUE_P when adding
 279         SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
 280         * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
 281         on the sp value before calling cselib_add_permanent_equiv on the
 282         cfa_base value.
 283         * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
 284         in the insn without REG_INC note.
 285         (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
 286         Punt on invalid insns added by copy_to_mode_reg.  Formatting fixes.
 287
 288         PR target/94435
 289         * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
 290         y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
 291
 292 2020-04-02  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 293
 294         PR target/94317
 295         * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
 296         (LDRGBWBXU_Z_QUALIFIERS): Likewise.
 297         * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
 298         intrinsic defintion by adding a new builtin call to writeback into base
 299         address.
 300         (__arm_vldrdq_gather_base_wb_u64): Likewise.
 301         (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
 302         (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
 303         (__arm_vldrwq_gather_base_wb_s32): Likewise.
 304         (__arm_vldrwq_gather_base_wb_u32): Likewise.
 305         (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
 306         (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
 307         (__arm_vldrwq_gather_base_wb_f32): Likewise.
 308         (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
 309         * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
 310         builtin's qualifier.
 311         (vldrdq_gather_base_wb_z_u): Likewise.
 312         (vldrwq_gather_base_wb_u): Likewise.
 313         (vldrdq_gather_base_wb_u): Likewise.
 314         (vldrwq_gather_base_wb_z_s): Likewise.
 315         (vldrwq_gather_base_wb_z_f): Likewise.
 316         (vldrdq_gather_base_wb_z_s): Likewise.
 317         (vldrwq_gather_base_wb_s): Likewise.
 318         (vldrwq_gather_base_wb_f): Likewise.
 319         (vldrdq_gather_base_wb_s): Likewise.
 320         (vldrwq_gather_base_nowb_z_u): Define builtin.
 321         (vldrdq_gather_base_nowb_z_u): Likewise.
 322         (vldrwq_gather_base_nowb_u): Likewise.
 323         (vldrdq_gather_base_nowb_u): Likewise.
 324         (vldrwq_gather_base_nowb_z_s): Likewise.
 325         (vldrwq_gather_base_nowb_z_f): Likewise.
 326         (vldrdq_gather_base_nowb_z_s): Likewise.
 327         (vldrwq_gather_base_nowb_s): Likewise.
 328         (vldrwq_gather_base_nowb_f): Likewise.
 329         (vldrdq_gather_base_nowb_s): Likewise.
 330         * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
 331         pattern.
 332         (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
 333         (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
 334         (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
 335         (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
 336         (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
 337         (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
 338         (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
 339         (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
 340         (mve_vldrdq_gather_base_wb_<supf>v4di):  Modify RTL pattern.
 341         (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
 342         (mve_vldrdq_gather_base_wb_z_<supf>v4di):  Modify RTL pattern.
 343
 344 2020-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
 345
 346         * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
 347         ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
 348         ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
 349         ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
 350         ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
 351         ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
 352         ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
 353         ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
 354         ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
 355         modifier.
 356         ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
 357         ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
 358         Remove constraints from expander.
 359         * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
 360         ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
 361         ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
 362         ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
 363         ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
 364         ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
 365
 366 2020-04-01  Peter Bergner  <bergner@linux.ibm.com>
 367
 368         PR rtl-optimization/94123
 369         * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
 370         flag_split_wide_types_early.
 371
 372 2020-04-01  Joerg Sonnenberger  <joerg@bec.de>
 373
 374         * doc/extend.texi (Common Function Attributes): Fix typo.
 375
 376 2020-04-01  Segher Boessenkool  <segher@kernel.crashing.org>
 377
 378         PR target/94420
 379         * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
 380         on operands[1].
 381
 382 2020-04-01  Zackery Spytz  <zspytz@gmail.com>
 383
 384         * doc/extend.texi: Fix a typo in the documentation of the
 385         copy function attribute.
 386
 387 2020-04-01  Jakub Jelinek  <jakub@redhat.com>
 388
 389         PR middle-end/94423
 390         * tree-object-size.c (pass_object_sizes::execute): Don't call
 391         replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
 392         call replace_call_with_value.
 393
 394 2020-04-01  Kewen Lin  <linkw@gcc.gnu.org>
 395
 396         PR tree-optimization/94043
 397         * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
 398         phi for vec_lhs and use it for lane extraction.
 399
 400 2020-03-31  Felix Yang  <felix.yang@huawei.com>
 401
 402         PR tree-optimization/94398
 403         * tree-vect-stmts.c (vectorizable_store): Instead of calling
 404         vect_supportable_dr_alignment, set alignment_support_scheme to
 405         dr_unaligned_supported for gather-scatter accesses.
 406         (vectorizable_load): Likewise.
 407
 408 2020-03-31  Andrew Stubbs  <ams@codesourcery.com>
 409
 410         * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
 411         New mode iterators.
 412         (vnsi, VnSI, vndi, VnDI): New mode attributes.
 413         (mov<mode>): Use <VnDI> in place of V64DI.
 414         (mov<mode>_exec): Likewise.
 415         (mov<mode>_sgprbase): Likewise.
 416         (reload_out<mode>): Likewise.
 417         (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
 418         (gather_load<mode>v64si): Rename to ...
 419         (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
 420         and <VnDI> in place of V64DI.
 421         (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
 422         (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
 423         (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
 424         (scatter_store<mode>v64si): Rename to ...
 425         (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
 426         (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
 427         (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
 428         (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
 429         (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
 430         (ds_bpermute<mode>): Use <VnSI>.
 431         (addv64si3_vcc<exec_vcc>): Rename to ...
 432         (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
 433         (addv64si3_vcc_dup<exec_vcc>): Rename to ...
 434         (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
 435         (addcv64si3<exec_vcc>): Rename to ...
 436         (addc<mode>3<exec_vcc>): ... this, and use V_SI.
 437         (subv64si3_vcc<exec_vcc>): Rename to ...
 438         (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
 439         (subcv64si3<exec_vcc>): Rename to ...
 440         (subc<mode>3<exec_vcc>): ... this, and use V_SI.
 441         (addv64di3): Rename to ...
 442         (add<mode>3): ... this, and use V_DI.
 443         (addv64di3_exec): Rename to ...
 444         (add<mode>3_exec): ... this, and use V_DI.
 445         (subv64di3): Rename to ...
 446         (sub<mode>3): ... this, and use V_DI.
 447         (subv64di3_exec): Rename to ...
 448         (sub<mode>3_exec): ... this, and use V_DI.
 449         (addv64di3_zext): Rename to ...
 450         (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
 451         (addv64di3_zext_exec): Rename to ...
 452         (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
 453         (addv64di3_zext_dup): Rename to ...
 454         (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
 455         (addv64di3_zext_dup_exec): Rename to ...
 456         (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
 457         (addv64di3_zext_dup2): Rename to ...
 458         (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
 459         (addv64di3_zext_dup2_exec): Rename to ...
 460         (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
 461         (addv64di3_sext_dup2): Rename to ...
 462         (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
 463         (addv64di3_sext_dup2_exec): Rename to ...
 464         (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
 465         (<su>mulv64si3_highpart<exec>): Rename to ...
 466         (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
 467         (mulv64di3): Rename to ...
 468         (mul<mode>3): ... this, and use V_DI and <VnSI>.
 469         (mulv64di3_exec): Rename to ...
 470         (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
 471         (mulv64di3_zext): Rename to ...
 472         (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
 473         (mulv64di3_zext_exec): Rename to ...
 474         (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
 475         (mulv64di3_zext_dup2): Rename to ...
 476         (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
 477         (mulv64di3_zext_dup2_exec): Rename to ...
 478         (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
 479         (<expander>v64di3): Rename to ...
 480         (<expander><mode>3): ... this, and use V_DI and <VnSI>.
 481         (<expander>v64di3_exec): Rename to ...
 482         (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
 483         (<expander>v64si3<exec>): Rename to ...
 484         (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
 485         (v<expander>v64si3<exec>): Rename to ...
 486         (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
 487         (<expander>v64si3<exec>): Rename to ...
 488         (<expander><vnsi>3<exec>): ... this, and use V_SI.
 489         (subv64df3<exec>): Rename to ...
 490         (sub<mode>3<exec>): ... this, and use V_DF.
 491         (truncv64di<mode>2): Rename to ...
 492         (trunc<vndi><mode>2): ... this, and use <VnDI>.
 493         (truncv64di<mode>2_exec): Rename to ...
 494         (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
 495         (<convop><mode>v64di2): Rename to ...
 496         (<convop><mode><vndi>2): ... this, and use <VnDI>.
 497         (<convop><mode>v64di2_exec): Rename to ...
 498         (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
 499         (vec_cmp<u>v64qidi): Rename to ...
 500         (vec_cmp<u><mode>di): ... this, and use <VnSI>.
 501         (vec_cmp<u>v64qidi_exec): Rename to ...
 502         (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
 503         (vcond_mask_<mode>di): Use <VnDI>.
 504         (maskload<mode>di): Likewise.
 505         (maskstore<mode>di): Likewise.
 506         (mask_gather_load<mode>v64si): Rename to ...
 507         (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
 508         (mask_scatter_store<mode>v64si): Rename to ...
 509         (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
 510         (*<reduc_op>_dpp_shr_v64di): Rename to ...
 511         (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
 512         (*plus_carry_in_dpp_shr_v64si): Rename to ...
 513         (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
 514         (*plus_carry_dpp_shr_v64di): Rename to ...
 515         (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
 516         (vec_seriesv64si): Rename to ...
 517         (vec_series<mode>): ... this, and use V_SI.
 518         (vec_seriesv64di): Rename to ...
 519         (vec_series<mode>): ... this, and use V_DI.
 520
 521 2020-03-31  Claudiu Zissulescu  <claziss@synopsys.com>
 522
 523         * config/arc/arc.c (arc_print_operand): Use
 524         HOST_WIDE_INT_PRINT_DEC macro.
 525
 526 2020-03-31  Claudiu Zissulescu  <claziss@synopsys.com>
 527
 528         * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
 529
 530 2020-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 531
 532         * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
 533         variant.
 534         (__arm_vbicq): Likewise.
 535
 536 2020-03-31  Vineet Gupta <vgupta@synopsys.com>
 537
 538         * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
 539
 540 2020-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 541
 542         * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
 543         common section of both MVE Integer and MVE Floating Point.
 544         (vaddvq): Likewise.
 545         (vaddlvq_p): Likewise.
 546         (vaddvaq): Likewise.
 547         (vaddvq_p): Likewise.
 548         (vcmpcsq): Likewise.
 549         (vmlsdavxq): Likewise.
 550         (vmlsdavq): Likewise.
 551         (vmladavxq): Likewise.
 552         (vmladavq): Likewise.
 553         (vminvq): Likewise.
 554         (vminavq): Likewise.
 555         (vmaxvq): Likewise.
 556         (vmaxavq): Likewise.
 557         (vmlaldavq): Likewise.
 558         (vcmphiq): Likewise.
 559         (vaddlvaq): Likewise.
 560         (vrmlaldavhq): Likewise.
 561         (vrmlaldavhxq): Likewise.
 562         (vrmlsldavhq): Likewise.
 563         (vrmlsldavhxq): Likewise.
 564         (vmlsldavxq): Likewise.
 565         (vmlsldavq): Likewise.
 566         (vabavq): Likewise.
 567         (vrmlaldavhaq): Likewise.
 568         (vcmpgeq_m_n): Likewise.
 569         (vmlsdavxq_p): Likewise.
 570         (vmlsdavq_p): Likewise.
 571         (vmlsdavaxq): Likewise.
 572         (vmlsdavaq): Likewise.
 573         (vaddvaq_p): Likewise.
 574         (vcmpcsq_m_n): Likewise.
 575         (vcmpcsq_m): Likewise.
 576         (vmladavxq_p): Likewise.
 577         (vmladavq_p): Likewise.
 578         (vmladavaxq): Likewise.
 579         (vmladavaq): Likewise.
 580         (vminvq_p): Likewise.
 581         (vminavq_p): Likewise.
 582         (vmaxvq_p): Likewise.
 583         (vmaxavq_p): Likewise.
 584         (vcmphiq_m): Likewise.
 585         (vaddlvaq_p): Likewise.
 586         (vmlaldavaq): Likewise.
 587         (vmlaldavaxq): Likewise.
 588         (vmlaldavq_p): Likewise.
 589         (vmlaldavxq_p): Likewise.
 590         (vmlsldavaq): Likewise.
 591         (vmlsldavaxq): Likewise.
 592         (vmlsldavq_p): Likewise.
 593         (vmlsldavxq_p): Likewise.
 594         (vrmlaldavhaxq): Likewise.
 595         (vrmlaldavhq_p): Likewise.
 596         (vrmlaldavhxq_p): Likewise.
 597         (vrmlsldavhaq): Likewise.
 598         (vrmlsldavhaxq): Likewise.
 599         (vrmlsldavhq_p): Likewise.
 600         (vrmlsldavhxq_p): Likewise.
 601         (vabavq_p): Likewise.
 602         (vmladavaq_p): Likewise.
 603         (vstrbq_scatter_offset): Likewise.
 604         (vstrbq_p): Likewise.
 605         (vstrbq_scatter_offset_p): Likewise.
 606         (vstrdq_scatter_base_p): Likewise.
 607         (vstrdq_scatter_base): Likewise.
 608         (vstrdq_scatter_offset_p): Likewise.
 609         (vstrdq_scatter_offset): Likewise.
 610         (vstrdq_scatter_shifted_offset_p): Likewise.
 611         (vstrdq_scatter_shifted_offset): Likewise.
 612         (vmaxq_x): Likewise.
 613         (vminq_x): Likewise.
 614         (vmovlbq_x): Likewise.
 615         (vmovltq_x): Likewise.
 616         (vmulhq_x): Likewise.
 617         (vmullbq_int_x): Likewise.
 618         (vmullbq_poly_x): Likewise.
 619         (vmulltq_int_x): Likewise.
 620         (vmulltq_poly_x): Likewise.
 621         (vstrbq): Likewise.
 622
 623 2020-03-31  Jakub Jelinek  <jakub@redhat.com>
 624
 625         PR target/94368
 626         * config/aarch64/constraints.md (Uph): New constraint.
 627         * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
 628         (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
 629         constraint.
 630
 631 2020-03-31  Marc Glisse  <marc.glisse@inria.fr>
 632             Jakub Jelinek  <jakub@redhat.com>
 633
 634         PR middle-end/94412
 635         * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
 636         ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
 637
 638 2020-03-31  Jakub Jelinek  <jakub@redhat.com>
 639
 640         PR tree-optimization/94403
 641         * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
 642         ENUMERAL_TYPE lhs_type.
 643
 644         PR rtl-optimization/94344
 645         * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
 646         conversions, either on both operands of |^+ or just one.  Handle
 647         also extra same precision conversion on RSHIFT_EXPR first operand
 648         provided RSHIFT_EXPR is performed in unsigned type.
 649
 650 2020-03-30  David Malcolm  <dmalcolm@redhat.com>
 651
 652         * lra.c (finish_insn_code_data_once): Set the array elements
 653         to NULL after freeing them.
 654
 655 2020-03-30  Andreas Schwab  <schwab@suse.de>
 656
 657         * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
 658         Define.
 659
 660 2020-03-30  Will Schmidt  <will_schmidt@vnet.ibm.com>
 661
 662         * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
 663         to skip defining builtins based on builtin_mask.
 664
 665 2020-03-30  Jakub Jelinek  <jakub@redhat.com>
 666
 667         PR target/94343
 668         * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
 669         !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
 670         operand is a register.  Don't enable masked variants for V*[QH]Imode.
 671
 672         PR target/93069
 673         * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
 674         <store_mask_constraint> instead of m in output operand constraint.
 675         (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
 676         %{%3%}.
 677
 678 2020-03-30  Alan Modra  <amodra@gmail.com>
 679
 680         * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
 681         (rs6000_indirect_call_template_1): Adjust to suit.
 682         * config/rs6000/rs6000.md (call_local): Merge call_local32,
 683         call_local64, and call_local_aix.
 684         (call_value_local): Simlarly.
 685         (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
 686         and disable pattern when CALL_LONG.
 687         (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
 688         (call_indirect_elfv2, call_indirect_pcrel): Likewise.
 689         (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
 690
 691 2020-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 692
 693         PR driver/94381
 694         * doc/invoke.texi: Update -falign-functions, -falign-loops and
 695         -falign-jumps documentation.
 696
 697 2020-03-29  Martin Liska  <mliska@suse.cz>
 698
 699         PR ipa/94363
 700         * cgraphunit.c (process_function_and_variable_attributes): Remove
 701         double 'attribute' words.
 702
 703 2020-03-29  John David Anglin  <dave.anglin@bell.net>
 704
 705         * gcc/config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
 706         .align output.
 707
 708 2020-03-28  Jakub Jelinek  <jakub@redhat.com>
 709
 710         PR c/93573
 711         * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
 712         to true after setting size to integer_one_node.
 713
 714         PR tree-optimization/94329
 715         * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
 716         on the last stmt in a bb, make sure gsi_prev isn't done immediately
 717         after gsi_last_bb.
 718
 719 2020-03-27  Alan Modra  <amodra@gmail.com>
 720
 721         PR target/94145
 722         * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
 723         for PLT16_LO and PLT_PCREL.
 724         * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
 725         (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
 726         (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
 727
 728 2020-03-27  Martin Sebor  <msebor@redhat.com>
 729
 730         PR c++/94098
 731         * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
 732
 733 2020-03-27  Andrew Stubbs  <ams@codesourcery.com>
 734
 735         * config/gcn/gcn-valu.md:
 736         (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
 737         (VEC_1REG_MODE): Delete.
 738         (VEC_1REG_ALT): Delete.
 739         (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
 740         (VEC_1REG_INT_MODE): Delete.
 741         (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
 742         (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
 743         (VEC_2REG_MODE): Rename to V_2REG throughout.
 744         (VEC_REG_MODE): Rename to V_noHI throughout.
 745         (VEC_ALLREG_MODE): Rename to V_ALL throughout.
 746         (VEC_ALLREG_ALT):  Rename to V_ALL_ALT throughout.
 747         (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
 748         (VEC_INT_MODE): Delete.
 749         (VEC_FP_MODE): Rename to V_FP throughout and move to top.
 750         (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
 751         (FP_MODE): Delete and replace with FP throughout.
 752         (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
 753         (VCMP_MODE): Rename to V_noQI throughout and move to top.
 754         (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
 755         * config/gcn/gcn.md (FP): New mode iterator.
 756         (FP_1REG): New mode iterator.
 757
 758 2020-03-27  David Malcolm  <dmalcolm@redhat.com>
 759
 760         * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
 761         now emits two .dot files.
 762         * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
 763         (graphviz_out::end_tr): Only close a TR, not a TD.
 764         (graphviz_out::begin_td): New.
 765         (graphviz_out::end_td): New.
 766         (graphviz_out::begin_trtd): New, replacing the old implementation
 767         of graphviz_out::begin_tr.
 768         (graphviz_out::end_tdtr): New, replacing the old implementation
 769         of graphviz_out::end_tr.
 770         * graphviz.h (graphviz_out::begin_td): New decl.
 771         (graphviz_out::end_td): New decl.
 772         (graphviz_out::begin_trtd): New decl.
 773         (graphviz_out::end_tdtr): New decl.
 774
 775 2020-03-27  Richard Biener  <rguenther@suse.de>
 776
 777         PR debug/94273
 778         * dwarf2out.c (should_emit_struct_debug): Return false for
 779         DINFO_LEVEL_TERSE.
 780
 781 2020-03-27  Richard Biener  <rguenther@suse.de>
 782
 783         PR tree-optimization/94352
 784         * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
 785         worklist ...
 786         (ssa_propagation_engine::ssa_propagate): ... here after
 787         initializing curr_order.
 788
 789 2020-03-27  Kewen Lin  <linkw@gcc.gnu.org>
 790
 791         PR tree-optimization/90332
 792         * tree-vect-stmts.c (vector_vector_composition_type): New function.
 793         (get_group_load_store_type): Adjust to call
 794         vector_vector_composition_type, extend it to construct with scalar
 795         types.
 796         (vectorizable_load): Likewise.
 797
 798 2020-03-27  Roman Zhuykov  <zhroma@ispras.ru>
 799
 800         * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
 801         (create_ddg_dep_no_link): Likewise.
 802         (add_cross_iteration_register_deps): Move debug instruction check.
 803         Other minor refactoring.
 804         (add_intra_loop_mem_dep): Do not check for debug instructions.
 805         (add_inter_loop_mem_dep): Likewise.
 806         (build_intra_loop_deps): Likewise.
 807         (create_ddg): Do not include debug insns into the graph.
 808         * ddg.h (struct ddg): Remove num_debug field.
 809         * modulo-sched.c (doloop_register_get): Adjust condition.
 810         (res_MII): Remove DDG num_debug field usage.
 811         (sms_schedule_by_order): Use assertion against debug insns.
 812         (ps_has_conflicts): Drop debug insn check.
 813
 814 2020-03-26  Jakub Jelinek  <jakub@redhat.com>
 815
 816         PR debug/94323
 817         * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
 818         that contains exactly one non-DEBUG_BEGIN_STMT statement.
 819
 820         PR debug/94281
 821         * gimple.h (gimple_seq_first_nondebug_stmt): New function.
 822         (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
 823         a single non-debug stmt followed by one or more debug stmts.
 824         * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
 825         instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
 826         and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
 827         gimple_seq_last to check if outer_stmt gbind could be reused and
 828         if yes and it is surrounded by any debug stmts, move them into the
 829         gbind body.
 830
 831         PR rtl-optimization/92264
 832         * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
 833         for sp based values in !frame_pointer_needed
 834         && !ACCUMULATE_OUTGOING_ARGS functions.
 835
 836 2020-03-26  Felix Yang  <felix.yang@huawei.com>
 837
 838         PR tree-optimization/94269
 839         * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
 840         this
 841         operation to single basic block.
 842
 843 2020-03-25  Jeff Law  <law@redhat.com>
 844
 845         PR rtl-optimization/90275
 846         * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
 847         pattern.
 848
 849 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
 850
 851         PR target/94292
 852         * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
 853         mode rather than VOIDmode.
 854
 855 2020-03-25  Martin Sebor  <msebor@redhat.com>
 856
 857         PR middle-end/94004
 858         * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
 859         even for alloca calls resulting from system macro expansion.
 860         Include inlining context in all warnings.
 861
 862 2020-03-25  Richard Sandiford  <richard.sandiford@arm.com>
 863
 864         PR target/94254
 865         * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
 866         FPRs to change between SDmode and DDmode.
 867
 868 2020-03-25  Martin Sebor  <msebor@redhat.com>
 869
 870         PR tree-optimization/94131
 871         * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
 872         types and decls.
 873         * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
 874         types have constant sizes.
 875
 876 2020-03-25  Martin Liska  <mliska@suse.cz>
 877
 878         PR lto/94259
 879         * configure.ac: Report error only when --with-zstd
 880         is used.
 881         * configure: Regenerate.
 882
 883 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
 884
 885         PR target/94308
 886         * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
 887         INSN_CODE (insn) to -1 when changing the pattern.
 888
 889 2020-03-25  Martin Liska  <mliska@suse.cz>
 890
 891         PR target/93274
 892         PR ipa/94271
 893         * config/i386/i386-features.c (make_resolver_func): Drop
 894         public flag for resolver.
 895         * config/rs6000/rs6000.c (make_resolver_func): Add comdat
 896         group for resolver and drop public flag if possible.
 897         * multiple_target.c (create_dispatcher_calls): Drop unique_name
 898         and resolution as we want to enable LTO privatization of the default
 899         symbol.
 900
 901 2020-03-25  Martin Liska  <mliska@suse.cz>
 902
 903         PR lto/94259
 904         * configure.ac: Respect --without-zstd and report
 905         error when we can't find header file with --with-zstd.
 906         * configure: Regenerate.
 907
 908 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
 909
 910         PR middle-end/94303
 911         * varasm.c (output_constructor_array_range): If local->index
 912         RANGE_EXPR doesn't start at the current location in the constructor,
 913         skip needed number of bytes using assemble_zeros or assert we don't
 914         go backwards.
 915
 916         PR c++/94223
 917         * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
 918         counter instead of DECL_UID.
 919
 920         PR tree-optimization/94300
 921         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
 922         is positive, make sure that off + size isn't larger than needed_len.
 923
 924 2020-03-25  Richard Biener  <rguenther@suse.de>
 925             Jakub Jelinek  <jakub@redhat.com>
 926
 927         PR debug/94283
 928         * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
 929
 930 2020-03-24  Christophe Lyon  <christophe.lyon@linaro.org>
 931
 932         * doc/sourcebuild.texi (ARM-specific attributes): Add
 933         arm_fp_dp_ok.
 934         (Features for dg-add-options): Add arm_fp_dp.
 935
 936 2020-03-24  John David Anglin  <danglin@gcc.gnu.org>
 937
 938         PR lto/94249
 939         * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
 940
 941 2020-03-24  Tobias Burnus  <tobias@codesourcery.com>
 942
 943         PR libgomp/81689
 944         * omp-offload.c (omp_finish_file): Fix target-link handling if
 945         targetm_common.have_named_sections is false.
 946
 947 2020-03-24  Jakub Jelinek  <jakub@redhat.com>
 948
 949         PR target/94286
 950         * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
 951         instead of GEN_INT.
 952
 953         PR debug/94285
 954         * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
 955         e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
 956         If not after and at *incr_pos is a debug stmt, set stmt location to
 957         location of next non-debug stmt after it if any.
 958
 959         PR debug/94283
 960         * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
 961         GF_PLF_2, but don't add them to worklist.  Don't add an assigment to
 962         worklist or set GF_PLF_2 just because it is used in a debug stmt in
 963         another bb.  Formatting improvements.
 964
 965         PR debug/94277
 966         * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
 967         non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
 968         regardless of whether TREE_NO_WARNING is set on it or whether
 969         warn_unused_function is true or not.
 970
 971 2020-03-23  Jeff Law  <law@redhat.com>
 972
 973         PR rtl-optimization/90275
 974         PR target/94238
 975         PR target/94144
 976         * simplify-rtx.c (comparison_code_valid_for_mode): New function.
 977         (simplify_logical_relational_operation): Use it.
 978
 979 2020-03-23  Jakub Jelinek  <jakub@redhat.com>
 980
 981         PR c++/91993
 982         * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
 983         ultimate rhs and if returned something different, reconstructing
 984         the COMPOUND_EXPRs.
 985
 986 2020-03-23  Lewis Hyatt  <lhyatt@gmail.com>
 987
 988         * opts.c (print_filtered_help): Improve the help text for alias options.
 989
 990 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 991             Andre Vieira  <andre.simoesdiasvieira@arm.com>
 992             Mihail Ionescu  <mihail.ionescu@arm.com>
 993
 994         * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
 995         (vshlcq_m_u8): Likewise.
 996         (vshlcq_m_s16): Likewise.
 997         (vshlcq_m_u16): Likewise.
 998         (vshlcq_m_s32): Likewise.
 999         (vshlcq_m_u32): Likewise.
1000         (__arm_vshlcq_m_s8): Define intrinsic.
1001         (__arm_vshlcq_m_u8): Likewise.
1002         (__arm_vshlcq_m_s16): Likewise.
1003         (__arm_vshlcq_m_u16): Likewise.
1004         (__arm_vshlcq_m_s32): Likewise.
1005         (__arm_vshlcq_m_u32): Likewise.
1006         (vshlcq_m): Define polymorphic variant.
1007         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
1008         Use builtin qualifier.
1009         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
1010         * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
1011         (mve_vshlcq_m_carry_<supf><mode>): Likewise.
1012         (mve_vshlcq_m_<supf><mode>): Likewise.
1013
1014 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
1015
1016         * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
1017         (UQSHL_QUALIFIERS): Likewise.
1018         (ASRL_QUALIFIERS): Likewise.
1019         (SQSHL_QUALIFIERS): Likewise.
1020         * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
1021         Big-Endian Mode.
1022         (sqrshr): Define macro.
1023         (sqrshrl): Likewise.
1024         (sqrshrl_sat48): Likewise.
1025         (sqshl): Likewise.
1026         (sqshll): Likewise.
1027         (srshr): Likewise.
1028         (srshrl): Likewise.
1029         (uqrshl): Likewise.
1030         (uqrshll): Likewise.
1031         (uqrshll_sat48): Likewise.
1032         (uqshl): Likewise.
1033         (uqshll): Likewise.
1034         (urshr): Likewise.
1035         (urshrl): Likewise.
1036         (lsll): Likewise.
1037         (asrl): Likewise.
1038         (__arm_lsll): Define intrinsic.
1039         (__arm_asrl): Likewise.
1040         (__arm_uqrshll): Likewise.
1041         (__arm_uqrshll_sat48): Likewise.
1042         (__arm_sqrshrl): Likewise.
1043         (__arm_sqrshrl_sat48): Likewise.
1044         (__arm_uqshll): Likewise.
1045         (__arm_urshrl): Likewise.
1046         (__arm_srshrl): Likewise.
1047         (__arm_sqshll): Likewise.
1048         (__arm_uqrshl): Likewise.
1049         (__arm_sqrshr): Likewise.
1050         (__arm_uqshl): Likewise.
1051         (__arm_urshr): Likewise.
1052         (__arm_sqshl): Likewise.
1053         (__arm_srshr): Likewise.
1054         * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
1055         qualifier.
1056         (UQSHL_QUALIFIERS): Likewise.
1057         (ASRL_QUALIFIERS): Likewise.
1058         (SQSHL_QUALIFIERS): Likewise.
1059         * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
1060         (mve_sqrshrl_sat<supf>_di): Likewise.
1061         (mve_uqrshl_si): Likewise.
1062         (mve_sqrshr_si): Likewise.
1063         (mve_uqshll_di): Likewise.
1064         (mve_urshrl_di): Likewise.
1065         (mve_uqshl_si): Likewise.
1066         (mve_urshr_si): Likewise.
1067         (mve_sqshl_si): Likewise.
1068         (mve_srshr_si): Likewise.
1069         (mve_srshrl_di): Likewise.
1070         (mve_sqshll_di): Likewise.
1071
1072 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
1073             Andre Vieira  <andre.simoesdiasvieira@arm.com>
1074             Mihail Ionescu  <mihail.ionescu@arm.com>
1075
1076         * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
1077         (vsetq_lane_f32): Likewise.
1078         (vsetq_lane_s16): Likewise.
1079         (vsetq_lane_s32): Likewise.
1080         (vsetq_lane_s8): Likewise.
1081         (vsetq_lane_s64): Likewise.
1082         (vsetq_lane_u8): Likewise.
1083         (vsetq_lane_u16): Likewise.
1084         (vsetq_lane_u32): Likewise.
1085         (vsetq_lane_u64): Likewise.
1086         (vgetq_lane_f16): Likewise.
1087         (vgetq_lane_f32): Likewise.
1088         (vgetq_lane_s16): Likewise.
1089         (vgetq_lane_s32): Likewise.
1090         (vgetq_lane_s8): Likewise.
1091         (vgetq_lane_s64): Likewise.
1092         (vgetq_lane_u8): Likewise.
1093         (vgetq_lane_u16): Likewise.
1094         (vgetq_lane_u32): Likewise.
1095         (vgetq_lane_u64): Likewise.
1096         (__ARM_NUM_LANES): Likewise.
1097         (__ARM_LANEQ): Likewise.
1098         (__ARM_CHECK_LANEQ): Likewise.
1099         (__arm_vsetq_lane_s16): Define intrinsic.
1100         (__arm_vsetq_lane_s32): Likewise.
1101         (__arm_vsetq_lane_s8): Likewise.
1102         (__arm_vsetq_lane_s64): Likewise.
1103         (__arm_vsetq_lane_u8): Likewise.
1104         (__arm_vsetq_lane_u16): Likewise.
1105         (__arm_vsetq_lane_u32): Likewise.
1106         (__arm_vsetq_lane_u64): Likewise.
1107         (__arm_vgetq_lane_s16): Likewise.
1108         (__arm_vgetq_lane_s32): Likewise.
1109         (__arm_vgetq_lane_s8): Likewise.
1110         (__arm_vgetq_lane_s64): Likewise.
1111         (__arm_vgetq_lane_u8): Likewise.
1112         (__arm_vgetq_lane_u16): Likewise.
1113         (__arm_vgetq_lane_u32): Likewise.
1114         (__arm_vgetq_lane_u64): Likewise.
1115         (__arm_vsetq_lane_f16): Likewise.
1116         (__arm_vsetq_lane_f32): Likewise.
1117         (__arm_vgetq_lane_f16): Likewise.
1118         (__arm_vgetq_lane_f32): Likewise.
1119         (vgetq_lane): Define polymorphic variant.
1120         (vsetq_lane): Likewise.
1121         * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
1122         pattern.
1123         (mve_vec_extractv2didi): Likewise.
1124         (mve_vec_extract_sext_internal<mode>): Likewise.
1125         (mve_vec_extract_zext_internal<mode>): Likewise.
1126         (mve_vec_set<mode>_internal): Likewise.
1127         (mve_vec_setv2di_internal): Likewise.
1128         * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
1129         file.
1130         (vec_extract<mode><V_elem_l>): Rename to
1131         "neon_vec_extract<mode><V_elem_l>".
1132         (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
1133         * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
1134         pattern common for MVE and NEON.
1135         (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
1136         MVE and NEON.
1137
1138 2020-03-23  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1139
1140         * config/arm/mve.md (earlyclobber_32): New mode attribute.
1141         (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
1142          mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
1143
1144 2020-03-23  Richard Biener  <rguenther@suse.de>
1145
1146         PR tree-optimization/94261
1147         * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
1148         IL operand swapping code.
1149         (vect_slp_rearrange_stmts): Do not arrange isomorphic
1150         nodes that would need operation code adjustments.
1151
1152 2020-03-23  Tobias Burnus  <tobias@codesourcery.com>
1153
1154         * doc/install.texi (amdgcn-*-amdhsa): Renamed
1155         from amdgcn-unknown-amdhsa; change
1156         amdgcn-unknown-amdhsa to amdgcn-amdhsa.
1157
1158 2020-03-23  Richard Biener  <rguenther@suse.de>
1159
1160         PR ipa/94245
1161         * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
1162         directly rather than also folding it via build_fold_addr_expr.
1163
1164 2020-03-23  Richard Biener  <rguenther@suse.de>
1165
1166         PR tree-optimization/94266
1167         * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
1168         addresses of TARGET_MEM_REFs.
1169
1170 2020-03-23  Martin Liska  <mliska@suse.cz>
1171
1172         PR ipa/94250
1173         * symtab.c (symtab_node::clone_references): Save speculative_id
1174         as ref may be overwritten by create_reference.
1175         (symtab_node::clone_referring): Likewise.
1176         (symtab_node::clone_reference): Likewise.
1177
1178 2020-03-22  Iain Sandoe  <iain@sandoe.co.uk>
1179
1180         * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
1181         references to Darwin.
1182         * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
1183         unconditionally and comment on why.
1184
1185 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
1186
1187         * config/darwin.c (darwin_mergeable_constant_section): Collect
1188         section anchor checks into the caller.
1189         (machopic_select_section): Collect section anchor checks into
1190         the determination of 'effective zero-size' objects. When the
1191         size is unknown, assume it is non-zero, and thus return the
1192         'generic' section for the DECL.
1193
1194 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
1195
1196         PR target/93694
1197         * gcc/config/darwin.opt: Amend options descriptions.
1198
1199 2020-03-21  Richard Sandiford  <richard.sandiford@arm.com>
1200
1201         PR rtl-optimization/94052
1202         * lra-constraints.c (simplify_operand_subreg): Reload the inner
1203         register of a paradoxical subreg if simplify_subreg_regno fails
1204         to give a valid hard register for the outer mode.
1205
1206 2020-03-20  Martin Jambor  <mjambor@suse.cz>
1207
1208         PR tree-optimization/93435
1209         * params.opt (sra-max-propagations): New parameter.
1210         * tree-sra.c (propagation_budget): New variable.
1211         (budget_for_propagation_access): New function.
1212         (propagate_subaccesses_from_rhs): Use it.
1213         (propagate_subaccesses_from_lhs): Likewise.
1214         (propagate_all_subaccesses): Set up and destroy propagation_budget.
1215
1216 2020-03-20  Carl Love  <cel@us.ibm.com>
1217
1218         PR/target 87583
1219         * gcc/config/rs6000/rs6000.c (rs6000_option_override_internal):
1220         Add check for TARGET_FPRND for Power 7 or newer.
1221
1222 2020-03-20  Jan Hubicka  <hubicka@ucw.cz>
1223
1224         PR ipa/93347
1225         * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
1226         (cgraph_edge::redirect_callee): Move here; likewise.
1227         (cgraph_node::remove_callees): Update calls_comdat_local flag.
1228         (cgraph_node::verify_node): Verify that calls_comdat_local flag match
1229         reality.
1230         (cgraph_node::check_calls_comdat_local_p): New member function.
1231         * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
1232         (cgraph_edge::redirect_callee): Move offline.
1233         * ipa-fnsummary.c (compute_fn_summary): Do not compute
1234         calls_comdat_local flag here.
1235         * ipa-inline-transform.c (inline_call): Fix updating of
1236         calls_comdat_local flag.
1237         * ipa-split.c (split_function): Use true instead of 1 to set the flag.
1238         * symtab.c (symtab_node::add_to_same_comdat_group): Update
1239         calls_comdat_local flag.
1240
1241 2020-03-20  Richard Biener  <rguenther@suse.de>
1242
1243         * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
1244         from the possibly modified root.
1245
1246 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
1247             Andre Vieira  <andre.simoesdiasvieira@arm.com>
1248             Mihail Ionescu  <mihail.ionescu@arm.com>
1249
1250         * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
1251         (vst1q_p_s8): Likewise.
1252         (vst2q_s8): Likewise.
1253         (vst2q_u8): Likewise.
1254         (vld1q_z_u8): Likewise.
1255         (vld1q_z_s8): Likewise.
1256         (vld2q_s8): Likewise.
1257         (vld2q_u8): Likewise.
1258         (vld4q_s8): Likewise.
1259         (vld4q_u8): Likewise.
1260         (vst1q_p_u16): Likewise.
1261         (vst1q_p_s16): Likewise.
1262         (vst2q_s16): Likewise.
1263         (vst2q_u16): Likewise.
1264         (vld1q_z_u16): Likewise.
1265         (vld1q_z_s16): Likewise.
1266         (vld2q_s16): Likewise.
1267         (vld2q_u16): Likewise.
1268         (vld4q_s16): Likewise.
1269         (vld4q_u16): Likewise.
1270         (vst1q_p_u32): Likewise.
1271         (vst1q_p_s32): Likewise.
1272         (vst2q_s32): Likewise.
1273         (vst2q_u32): Likewise.
1274         (vld1q_z_u32): Likewise.
1275         (vld1q_z_s32): Likewise.
1276         (vld2q_s32): Likewise.
1277         (vld2q_u32): Likewise.
1278         (vld4q_s32): Likewise.
1279         (vld4q_u32): Likewise.
1280         (vld4q_f16): Likewise.
1281         (vld2q_f16): Likewise.
1282         (vld1q_z_f16): Likewise.
1283         (vst2q_f16): Likewise.
1284         (vst1q_p_f16): Likewise.
1285         (vld4q_f32): Likewise.
1286         (vld2q_f32): Likewise.
1287         (vld1q_z_f32): Likewise.
1288         (vst2q_f32): Likewise.
1289         (vst1q_p_f32): Likewise.
1290         (__arm_vst1q_p_u8): Define intrinsic.
1291         (__arm_vst1q_p_s8): Likewise.
1292         (__arm_vst2q_s8): Likewise.
1293         (__arm_vst2q_u8): Likewise.
1294         (__arm_vld1q_z_u8): Likewise.
1295         (__arm_vld1q_z_s8): Likewise.
1296         (__arm_vld2q_s8): Likewise.
1297         (__arm_vld2q_u8): Likewise.
1298         (__arm_vld4q_s8): Likewise.
1299         (__arm_vld4q_u8): Likewise.
1300         (__arm_vst1q_p_u16): Likewise.
1301         (__arm_vst1q_p_s16): Likewise.
1302         (__arm_vst2q_s16): Likewise.
1303         (__arm_vst2q_u16): Likewise.
1304         (__arm_vld1q_z_u16): Likewise.
1305         (__arm_vld1q_z_s16): Likewise.
1306         (__arm_vld2q_s16): Likewise.
1307         (__arm_vld2q_u16): Likewise.
1308         (__arm_vld4q_s16): Likewise.
1309         (__arm_vld4q_u16): Likewise.
1310         (__arm_vst1q_p_u32): Likewise.
1311         (__arm_vst1q_p_s32): Likewise.
1312         (__arm_vst2q_s32): Likewise.
1313         (__arm_vst2q_u32): Likewise.
1314         (__arm_vld1q_z_u32): Likewise.
1315         (__arm_vld1q_z_s32): Likewise.
1316         (__arm_vld2q_s32): Likewise.
1317         (__arm_vld2q_u32): Likewise.
1318         (__arm_vld4q_s32): Likewise.
1319         (__arm_vld4q_u32): Likewise.
1320         (__arm_vld4q_f16): Likewise.
1321         (__arm_vld2q_f16): Likewise.
1322         (__arm_vld1q_z_f16): Likewise.
1323         (__arm_vst2q_f16): Likewise.
1324         (__arm_vst1q_p_f16): Likewise.
1325         (__arm_vld4q_f32): Likewise.
1326         (__arm_vld2q_f32): Likewise.
1327         (__arm_vld1q_z_f32): Likewise.
1328         (__arm_vst2q_f32): Likewise.
1329         (__arm_vst1q_p_f32): Likewise.
1330         (vld1q_z): Define polymorphic variant.
1331         (vld2q): Likewise.
1332         (vld4q): Likewise.
1333         (vst1q_p): Likewise.
1334         (vst2q): Likewise.
1335         * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
1336         (LOAD1): Likewise.
1337         * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
1338         (mve_vld2q<mode>): Likewise.
1339         (mve_vld4q<mode>): Likewise.
1340
1341 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
1342             Andre Vieira  <andre.simoesdiasvieira@arm.com>
1343             Mihail Ionescu  <mihail.ionescu@arm.com>
1344
1345         * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
1346         (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
1347         (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
1348         "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
1349         (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
1350         and ARM_BUILTIN_SET_FPSCR_NZCVQC.
1351         * config/arm/arm_mve.h (vadciq_s32): Define macro.
1352         (vadciq_u32): Likewise.
1353         (vadciq_m_s32): Likewise.
1354         (vadciq_m_u32): Likewise.
1355         (vadcq_s32): Likewise.
1356         (vadcq_u32): Likewise.
1357         (vadcq_m_s32): Likewise.
1358         (vadcq_m_u32): Likewise.
1359         (vsbciq_s32): Likewise.
1360         (vsbciq_u32): Likewise.
1361         (vsbciq_m_s32): Likewise.
1362         (vsbciq_m_u32): Likewise.
1363         (vsbcq_s32): Likewise.
1364         (vsbcq_u32): Likewise.
1365         (vsbcq_m_s32): Likewise.
1366         (vsbcq_m_u32): Likewise.
1367         (__arm_vadciq_s32): Define intrinsic.
1368         (__arm_vadciq_u32): Likewise.
1369         (__arm_vadciq_m_s32): Likewise.
1370         (__arm_vadciq_m_u32): Likewise.
1371         (__arm_vadcq_s32): Likewise.
1372         (__arm_vadcq_u32): Likewise.
1373         (__arm_vadcq_m_s32): Likewise.
1374         (__arm_vadcq_m_u32): Likewise.
1375         (__arm_vsbciq_s32): Likewise.
1376         (__arm_vsbciq_u32): Likewise.
1377         (__arm_vsbciq_m_s32): Likewise.
1378         (__arm_vsbciq_m_u32): Likewise.
1379         (__arm_vsbcq_s32): Likewise.
1380         (__arm_vsbcq_u32): Likewise.
1381         (__arm_vsbcq_m_s32): Likewise.
1382         (__arm_vsbcq_m_u32): Likewise.
1383         (vadciq_m): Define polymorphic variant.
1384         (vadciq): Likewise.
1385         (vadcq_m): Likewise.
1386         (vadcq): Likewise.
1387         (vsbciq_m): Likewise.
1388         (vsbciq): Likewise.
1389         (vsbcq_m): Likewise.
1390         (vsbcq): Likewise.
1391         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
1392         qualifier.
1393         (BINOP_UNONE_UNONE_UNONE): Likewise.
1394         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
1395         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
1396         * config/arm/mve.md (VADCIQ): Define iterator.
1397         (VADCIQ_M): Likewise.
1398         (VSBCQ): Likewise.
1399         (VSBCQ_M): Likewise.
1400         (VSBCIQ): Likewise.
1401         (VSBCIQ_M): Likewise.
1402         (VADCQ): Likewise.
1403         (VADCQ_M): Likewise.
1404         (mve_vadciq_m_<supf>v4si): Define RTL pattern.
1405         (mve_vadciq_<supf>v4si): Likewise.
1406         (mve_vadcq_m_<supf>v4si): Likewise.
1407         (mve_vadcq_<supf>v4si): Likewise.
1408         (mve_vsbciq_m_<supf>v4si): Likewise.
1409         (mve_vsbciq_<supf>v4si): Likewise.
1410         (mve_vsbcq_m_<supf>v4si): Likewise.
1411         (mve_vsbcq_<supf>v4si): Likewise.
1412         (get_fpscr_nzcvqc): Define isns.
1413         (set_fpscr_nzcvqc): Define isns.
1414         * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
1415         (UNSPEC_SET_FPSCR_NZCVQC): Define.
1416
1417 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
1418
1419         * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
1420         (vddupq_x_n_u16): Likewise.
1421         (vddupq_x_n_u32): Likewise.
1422         (vddupq_x_wb_u8): Likewise.
1423         (vddupq_x_wb_u16): Likewise.
1424         (vddupq_x_wb_u32): Likewise.
1425         (vdwdupq_x_n_u8): Likewise.
1426         (vdwdupq_x_n_u16): Likewise.
1427         (vdwdupq_x_n_u32): Likewise.
1428         (vdwdupq_x_wb_u8): Likewise.
1429         (vdwdupq_x_wb_u16): Likewise.
1430         (vdwdupq_x_wb_u32): Likewise.
1431         (vidupq_x_n_u8): Likewise.
1432         (vidupq_x_n_u16): Likewise.
1433         (vidupq_x_n_u32): Likewise.
1434         (vidupq_x_wb_u8): Likewise.
1435         (vidupq_x_wb_u16): Likewise.
1436         (vidupq_x_wb_u32): Likewise.
1437         (viwdupq_x_n_u8): Likewise.
1438         (viwdupq_x_n_u16): Likewise.
1439         (viwdupq_x_n_u32): Likewise.
1440         (viwdupq_x_wb_u8): Likewise.
1441         (viwdupq_x_wb_u16): Likewise.
1442         (viwdupq_x_wb_u32): Likewise.
1443         (vdupq_x_n_s8): Likewise.
1444         (vdupq_x_n_s16): Likewise.
1445         (vdupq_x_n_s32): Likewise.
1446         (vdupq_x_n_u8): Likewise.
1447         (vdupq_x_n_u16): Likewise.
1448         (vdupq_x_n_u32): Likewise.
1449         (vminq_x_s8): Likewise.
1450         (vminq_x_s16): Likewise.
1451         (vminq_x_s32): Likewise.
1452         (vminq_x_u8): Likewise.
1453         (vminq_x_u16): Likewise.
1454         (vminq_x_u32): Likewise.
1455         (vmaxq_x_s8): Likewise.
1456         (vmaxq_x_s16): Likewise.
1457         (vmaxq_x_s32): Likewise.
1458         (vmaxq_x_u8): Likewise.
1459         (vmaxq_x_u16): Likewise.
1460         (vmaxq_x_u32): Likewise.
1461         (vabdq_x_s8): Likewise.
1462         (vabdq_x_s16): Likewise.
1463         (vabdq_x_s32): Likewise.
1464         (vabdq_x_u8): Likewise.
1465         (vabdq_x_u16): Likewise.
1466         (vabdq_x_u32): Likewise.
1467         (vabsq_x_s8): Likewise.
1468         (vabsq_x_s16): Likewise.
1469         (vabsq_x_s32): Likewise.
1470         (vaddq_x_s8): Likewise.
1471         (vaddq_x_s16): Likewise.
1472         (vaddq_x_s32): Likewise.
1473         (vaddq_x_n_s8): Likewise.
1474         (vaddq_x_n_s16): Likewise.
1475         (vaddq_x_n_s32): Likewise.
1476         (vaddq_x_u8): Likewise.
1477         (vaddq_x_u16): Likewise.
1478         (vaddq_x_u32): Likewise.
1479         (vaddq_x_n_u8): Likewise.
1480         (vaddq_x_n_u16): Likewise.
1481         (vaddq_x_n_u32): Likewise.
1482         (vclsq_x_s8): Likewise.
1483         (vclsq_x_s16): Likewise.
1484         (vclsq_x_s32): Likewise.
1485         (vclzq_x_s8): Likewise.
1486         (vclzq_x_s16): Likewise.
1487         (vclzq_x_s32): Likewise.
1488         (vclzq_x_u8): Likewise.
1489         (vclzq_x_u16): Likewise.
1490         (vclzq_x_u32): Likewise.
1491         (vnegq_x_s8): Likewise.
1492         (vnegq_x_s16): Likewise.
1493         (vnegq_x_s32): Likewise.
1494         (vmulhq_x_s8): Likewise.
1495         (vmulhq_x_s16): Likewise.
1496         (vmulhq_x_s32): Likewise.
1497         (vmulhq_x_u8): Likewise.
1498         (vmulhq_x_u16): Likewise.
1499         (vmulhq_x_u32): Likewise.
1500         (vmullbq_poly_x_p8): Likewise.
1501         (vmullbq_poly_x_p16): Likewise.
1502         (vmullbq_int_x_s8): Likewise.
1503         (vmullbq_int_x_s16): Likewise.
1504         (vmullbq_int_x_s32): Likewise.
1505         (vmullbq_int_x_u8): Likewise.
1506         (vmullbq_int_x_u16): Likewise.
1507         (vmullbq_int_x_u32): Likewise.
1508         (vmulltq_poly_x_p8): Likewise.
1509         (vmulltq_poly_x_p16): Likewise.
1510         (vmulltq_int_x_s8): Likewise.
1511         (vmulltq_int_x_s16): Likewise.
1512         (vmulltq_int_x_s32): Likewise.
1513         (vmulltq_int_x_u8): Likewise.
1514         (vmulltq_int_x_u16): Likewise.
1515         (vmulltq_int_x_u32): Likewise.
1516         (vmulq_x_s8): Likewise.
1517         (vmulq_x_s16): Likewise.
1518         (vmulq_x_s32): Likewise.
1519         (vmulq_x_n_s8): Likewise.
1520         (vmulq_x_n_s16): Likewise.
1521         (vmulq_x_n_s32): Likewise.
1522         (vmulq_x_u8): Likewise.
1523         (vmulq_x_u16): Likewise.
1524         (vmulq_x_u32): Likewise.
1525         (vmulq_x_n_u8): Likewise.
1526         (vmulq_x_n_u16): Likewise.
1527         (vmulq_x_n_u32): Likewise.
1528         (vsubq_x_s8): Likewise.
1529         (vsubq_x_s16): Likewise.
1530         (vsubq_x_s32): Likewise.
1531         (vsubq_x_n_s8): Likewise.
1532         (vsubq_x_n_s16): Likewise.
1533         (vsubq_x_n_s32): Likewise.
1534         (vsubq_x_u8): Likewise.
1535         (vsubq_x_u16): Likewise.
1536         (vsubq_x_u32): Likewise.
1537         (vsubq_x_n_u8): Likewise.
1538         (vsubq_x_n_u16): Likewise.
1539         (vsubq_x_n_u32): Likewise.
1540         (vcaddq_rot90_x_s8): Likewise.
1541         (vcaddq_rot90_x_s16): Likewise.
1542         (vcaddq_rot90_x_s32): Likewise.
1543         (vcaddq_rot90_x_u8): Likewise.
1544         (vcaddq_rot90_x_u16): Likewise.
1545         (vcaddq_rot90_x_u32): Likewise.
1546         (vcaddq_rot270_x_s8): Likewise.
1547         (vcaddq_rot270_x_s16): Likewise.
1548         (vcaddq_rot270_x_s32): Likewise.
1549         (vcaddq_rot270_x_u8): Likewise.
1550         (vcaddq_rot270_x_u16): Likewise.
1551         (vcaddq_rot270_x_u32): Likewise.
1552         (vhaddq_x_n_s8): Likewise.
1553         (vhaddq_x_n_s16): Likewise.
1554         (vhaddq_x_n_s32): Likewise.
1555         (vhaddq_x_n_u8): Likewise.
1556         (vhaddq_x_n_u16): Likewise.
1557         (vhaddq_x_n_u32): Likewise.
1558         (vhaddq_x_s8): Likewise.
1559         (vhaddq_x_s16): Likewise.
1560         (vhaddq_x_s32): Likewise.
1561         (vhaddq_x_u8): Likewise.
1562         (vhaddq_x_u16): Likewise.
1563         (vhaddq_x_u32): Likewise.
1564         (vhcaddq_rot90_x_s8): Likewise.
1565         (vhcaddq_rot90_x_s16): Likewise.
1566         (vhcaddq_rot90_x_s32): Likewise.
1567         (vhcaddq_rot270_x_s8): Likewise.
1568         (vhcaddq_rot270_x_s16): Likewise.
1569         (vhcaddq_rot270_x_s32): Likewise.
1570         (vhsubq_x_n_s8): Likewise.
1571         (vhsubq_x_n_s16): Likewise.
1572         (vhsubq_x_n_s32): Likewise.
1573         (vhsubq_x_n_u8): Likewise.
1574         (vhsubq_x_n_u16): Likewise.
1575         (vhsubq_x_n_u32): Likewise.
1576         (vhsubq_x_s8): Likewise.
1577         (vhsubq_x_s16): Likewise.
1578         (vhsubq_x_s32): Likewise.
1579         (vhsubq_x_u8): Likewise.
1580         (vhsubq_x_u16): Likewise.
1581         (vhsubq_x_u32): Likewise.
1582         (vrhaddq_x_s8): Likewise.
1583         (vrhaddq_x_s16): Likewise.
1584         (vrhaddq_x_s32): Likewise.
1585         (vrhaddq_x_u8): Likewise.
1586         (vrhaddq_x_u16): Likewise.
1587         (vrhaddq_x_u32): Likewise.
1588         (vrmulhq_x_s8): Likewise.
1589         (vrmulhq_x_s16): Likewise.
1590         (vrmulhq_x_s32): Likewise.
1591         (vrmulhq_x_u8): Likewise.
1592         (vrmulhq_x_u16): Likewise.
1593         (vrmulhq_x_u32): Likewise.
1594         (vandq_x_s8): Likewise.
1595         (vandq_x_s16): Likewise.
1596         (vandq_x_s32): Likewise.
1597         (vandq_x_u8): Likewise.
1598         (vandq_x_u16): Likewise.
1599         (vandq_x_u32): Likewise.
1600         (vbicq_x_s8): Likewise.
1601         (vbicq_x_s16): Likewise.
1602         (vbicq_x_s32): Likewise.
1603         (vbicq_x_u8): Likewise.
1604         (vbicq_x_u16): Likewise.
1605         (vbicq_x_u32): Likewise.
1606         (vbrsrq_x_n_s8): Likewise.
1607         (vbrsrq_x_n_s16): Likewise.
1608         (vbrsrq_x_n_s32): Likewise.
1609         (vbrsrq_x_n_u8): Likewise.
1610         (vbrsrq_x_n_u16): Likewise.
1611         (vbrsrq_x_n_u32): Likewise.
1612         (veorq_x_s8): Likewise.
1613         (veorq_x_s16): Likewise.
1614         (veorq_x_s32): Likewise.
1615         (veorq_x_u8): Likewise.
1616         (veorq_x_u16): Likewise.
1617         (veorq_x_u32): Likewise.
1618         (vmovlbq_x_s8): Likewise.
1619         (vmovlbq_x_s16): Likewise.
1620         (vmovlbq_x_u8): Likewise.
1621         (vmovlbq_x_u16): Likewise.
1622         (vmovltq_x_s8): Likewise.
1623         (vmovltq_x_s16): Likewise.
1624         (vmovltq_x_u8): Likewise.
1625         (vmovltq_x_u16): Likewise.
1626         (vmvnq_x_s8): Likewise.
1627         (vmvnq_x_s16): Likewise.
1628         (vmvnq_x_s32): Likewise.
1629         (vmvnq_x_u8): Likewise.
1630         (vmvnq_x_u16): Likewise.
1631         (vmvnq_x_u32): Likewise.
1632         (vmvnq_x_n_s16): Likewise.
1633         (vmvnq_x_n_s32): Likewise.
1634         (vmvnq_x_n_u16): Likewise.
1635         (vmvnq_x_n_u32): Likewise.
1636         (vornq_x_s8): Likewise.
1637         (vornq_x_s16): Likewise.
1638         (vornq_x_s32): Likewise.
1639         (vornq_x_u8): Likewise.
1640         (vornq_x_u16): Likewise.
1641         (vornq_x_u32): Likewise.
1642         (vorrq_x_s8): Likewise.
1643         (vorrq_x_s16): Likewise.
1644         (vorrq_x_s32): Likewise.
1645         (vorrq_x_u8): Likewise.
1646         (vorrq_x_u16): Likewise.
1647         (vorrq_x_u32): Likewise.
1648         (vrev16q_x_s8): Likewise.
1649         (vrev16q_x_u8): Likewise.
1650         (vrev32q_x_s8): Likewise.
1651         (vrev32q_x_s16): Likewise.
1652         (vrev32q_x_u8): Likewise.
1653         (vrev32q_x_u16): Likewise.
1654         (vrev64q_x_s8): Likewise.
1655         (vrev64q_x_s16): Likewise.
1656         (vrev64q_x_s32): Likewise.
1657         (vrev64q_x_u8): Likewise.
1658         (vrev64q_x_u16): Likewise.
1659         (vrev64q_x_u32): Likewise.
1660         (vrshlq_x_s8): Likewise.
1661         (vrshlq_x_s16): Likewise.
1662         (vrshlq_x_s32): Likewise.
1663         (vrshlq_x_u8): Likewise.
1664         (vrshlq_x_u16): Likewise.
1665         (vrshlq_x_u32): Likewise.
1666         (vshllbq_x_n_s8): Likewise.
1667         (vshllbq_x_n_s16): Likewise.
1668         (vshllbq_x_n_u8): Likewise.
1669         (vshllbq_x_n_u16): Likewise.
1670         (vshlltq_x_n_s8): Likewise.
1671         (vshlltq_x_n_s16): Likewise.
1672         (vshlltq_x_n_u8): Likewise.
1673         (vshlltq_x_n_u16): Likewise.
1674         (vshlq_x_s8): Likewise.
1675         (vshlq_x_s16): Likewise.
1676         (vshlq_x_s32): Likewise.
1677         (vshlq_x_u8): Likewise.
1678         (vshlq_x_u16): Likewise.
1679         (vshlq_x_u32): Likewise.
1680         (vshlq_x_n_s8): Likewise.
1681         (vshlq_x_n_s16): Likewise.
1682         (vshlq_x_n_s32): Likewise.
1683         (vshlq_x_n_u8): Likewise.
1684         (vshlq_x_n_u16): Likewise.
1685         (vshlq_x_n_u32): Likewise.
1686         (vrshrq_x_n_s8): Likewise.
1687         (vrshrq_x_n_s16): Likewise.
1688         (vrshrq_x_n_s32): Likewise.
1689         (vrshrq_x_n_u8): Likewise.
1690         (vrshrq_x_n_u16): Likewise.
1691         (vrshrq_x_n_u32): Likewise.
1692         (vshrq_x_n_s8): Likewise.
1693         (vshrq_x_n_s16): Likewise.
1694         (vshrq_x_n_s32): Likewise.
1695         (vshrq_x_n_u8): Likewise.
1696         (vshrq_x_n_u16): Likewise.
1697         (vshrq_x_n_u32): Likewise.
1698         (vdupq_x_n_f16): Likewise.
1699         (vdupq_x_n_f32): Likewise.
1700         (vminnmq_x_f16): Likewise.
1701         (vminnmq_x_f32): Likewise.
1702         (vmaxnmq_x_f16): Likewise.
1703         (vmaxnmq_x_f32): Likewise.
1704         (vabdq_x_f16): Likewise.
1705         (vabdq_x_f32): Likewise.
1706         (vabsq_x_f16): Likewise.
1707         (vabsq_x_f32): Likewise.
1708         (vaddq_x_f16): Likewise.
1709         (vaddq_x_f32): Likewise.
1710         (vaddq_x_n_f16): Likewise.
1711         (vaddq_x_n_f32): Likewise.
1712         (vnegq_x_f16): Likewise.
1713         (vnegq_x_f32): Likewise.
1714         (vmulq_x_f16): Likewise.
1715         (vmulq_x_f32): Likewise.
1716         (vmulq_x_n_f16): Likewise.
1717         (vmulq_x_n_f32): Likewise.
1718         (vsubq_x_f16): Likewise.
1719         (vsubq_x_f32): Likewise.
1720         (vsubq_x_n_f16): Likewise.
1721         (vsubq_x_n_f32): Likewise.
1722         (vcaddq_rot90_x_f16): Likewise.
1723         (vcaddq_rot90_x_f32): Likewise.
1724         (vcaddq_rot270_x_f16): Likewise.
1725         (vcaddq_rot270_x_f32): Likewise.
1726         (vcmulq_x_f16): Likewise.
1727         (vcmulq_x_f32): Likewise.
1728         (vcmulq_rot90_x_f16): Likewise.
1729         (vcmulq_rot90_x_f32): Likewise.
1730         (vcmulq_rot180_x_f16): Likewise.
1731         (vcmulq_rot180_x_f32): Likewise.
1732         (vcmulq_rot270_x_f16): Likewise.
1733         (vcmulq_rot270_x_f32): Likewise.
1734         (vcvtaq_x_s16_f16): Likewise.
1735         (vcvtaq_x_s32_f32): Likewise.
1736         (vcvtaq_x_u16_f16): Likewise.
1737         (vcvtaq_x_u32_f32): Likewise.
1738         (vcvtnq_x_s16_f16): Likewise.
1739         (vcvtnq_x_s32_f32): Likewise.
1740         (vcvtnq_x_u16_f16): Likewise.
1741         (vcvtnq_x_u32_f32): Likewise.
1742         (vcvtpq_x_s16_f16): Likewise.
1743         (vcvtpq_x_s32_f32): Likewise.
1744         (vcvtpq_x_u16_f16): Likewise.
1745         (vcvtpq_x_u32_f32): Likewise.
1746         (vcvtmq_x_s16_f16): Likewise.
1747         (vcvtmq_x_s32_f32): Likewise.
1748         (vcvtmq_x_u16_f16): Likewise.
1749         (vcvtmq_x_u32_f32): Likewise.
1750         (vcvtbq_x_f32_f16): Likewise.
1751         (vcvttq_x_f32_f16): Likewise.
1752         (vcvtq_x_f16_u16): Likewise.
1753         (vcvtq_x_f16_s16): Likewise.
1754         (vcvtq_x_f32_s32): Likewise.
1755         (vcvtq_x_f32_u32): Likewise.
1756         (vcvtq_x_n_f16_s16): Likewise.
1757         (vcvtq_x_n_f16_u16): Likewise.
1758         (vcvtq_x_n_f32_s32): Likewise.
1759         (vcvtq_x_n_f32_u32): Likewise.
1760         (vcvtq_x_s16_f16): Likewise.
1761         (vcvtq_x_s32_f32): Likewise.
1762         (vcvtq_x_u16_f16): Likewise.
1763         (vcvtq_x_u32_f32): Likewise.
1764         (vcvtq_x_n_s16_f16): Likewise.
1765         (vcvtq_x_n_s32_f32): Likewise.
1766         (vcvtq_x_n_u16_f16): Likewise.
1767         (vcvtq_x_n_u32_f32): Likewise.
1768         (vrndq_x_f16): Likewise.
1769         (vrndq_x_f32): Likewise.
1770         (vrndnq_x_f16): Likewise.
1771         (vrndnq_x_f32): Likewise.
1772         (vrndmq_x_f16): Likewise.
1773         (vrndmq_x_f32): Likewise.
1774         (vrndpq_x_f16): Likewise.
1775         (vrndpq_x_f32): Likewise.
1776         (vrndaq_x_f16): Likewise.
1777         (vrndaq_x_f32): Likewise.
1778         (vrndxq_x_f16): Likewise.
1779         (vrndxq_x_f32): Likewise.
1780         (vandq_x_f16): Likewise.
1781         (vandq_x_f32): Likewise.
1782         (vbicq_x_f16): Likewise.
1783         (vbicq_x_f32): Likewise.
1784         (vbrsrq_x_n_f16): Likewise.
1785         (vbrsrq_x_n_f32): Likewise.
1786         (veorq_x_f16): Likewise.
1787         (veorq_x_f32): Likewise.
1788         (vornq_x_f16): Likewise.
1789         (vornq_x_f32): Likewise.
1790         (vorrq_x_f16): Likewise.
1791         (vorrq_x_f32): Likewise.
1792         (vrev32q_x_f16): Likewise.
1793         (vrev64q_x_f16): Likewise.
1794         (vrev64q_x_f32): Likewise.
1795         (__arm_vddupq_x_n_u8): Define intrinsic.
1796         (__arm_vddupq_x_n_u16): Likewise.
1797         (__arm_vddupq_x_n_u32): Likewise.
1798         (__arm_vddupq_x_wb_u8): Likewise.
1799         (__arm_vddupq_x_wb_u16): Likewise.
1800         (__arm_vddupq_x_wb_u32): Likewise.
1801         (__arm_vdwdupq_x_n_u8): Likewise.
1802         (__arm_vdwdupq_x_n_u16): Likewise.
1803         (__arm_vdwdupq_x_n_u32): Likewise.
1804         (__arm_vdwdupq_x_wb_u8): Likewise.
1805         (__arm_vdwdupq_x_wb_u16): Likewise.
1806         (__arm_vdwdupq_x_wb_u32): Likewise.
1807         (__arm_vidupq_x_n_u8): Likewise.
1808         (__arm_vidupq_x_n_u16): Likewise.
1809         (__arm_vidupq_x_n_u32): Likewise.
1810         (__arm_vidupq_x_wb_u8): Likewise.
1811         (__arm_vidupq_x_wb_u16): Likewise.
1812         (__arm_vidupq_x_wb_u32): Likewise.
1813         (__arm_viwdupq_x_n_u8): Likewise.
1814         (__arm_viwdupq_x_n_u16): Likewise.
1815         (__arm_viwdupq_x_n_u32): Likewise.
1816         (__arm_viwdupq_x_wb_u8): Likewise.
1817         (__arm_viwdupq_x_wb_u16): Likewise.
1818         (__arm_viwdupq_x_wb_u32): Likewise.
1819         (__arm_vdupq_x_n_s8): Likewise.
1820         (__arm_vdupq_x_n_s16): Likewise.
1821         (__arm_vdupq_x_n_s32): Likewise.
1822         (__arm_vdupq_x_n_u8): Likewise.
1823         (__arm_vdupq_x_n_u16): Likewise.
1824         (__arm_vdupq_x_n_u32): Likewise.
1825         (__arm_vminq_x_s8): Likewise.
1826         (__arm_vminq_x_s16): Likewise.
1827         (__arm_vminq_x_s32): Likewise.
1828         (__arm_vminq_x_u8): Likewise.
1829         (__arm_vminq_x_u16): Likewise.
1830         (__arm_vminq_x_u32): Likewise.
1831         (__arm_vmaxq_x_s8): Likewise.
1832         (__arm_vmaxq_x_s16): Likewise.
1833         (__arm_vmaxq_x_s32): Likewise.
1834         (__arm_vmaxq_x_u8): Likewise.
1835         (__arm_vmaxq_x_u16): Likewise.
1836         (__arm_vmaxq_x_u32): Likewise.
1837         (__arm_vabdq_x_s8): Likewise.
1838         (__arm_vabdq_x_s16): Likewise.
1839         (__arm_vabdq_x_s32): Likewise.
1840         (__arm_vabdq_x_u8): Likewise.
1841         (__arm_vabdq_x_u16): Likewise.
1842         (__arm_vabdq_x_u32): Likewise.
1843         (__arm_vabsq_x_s8): Likewise.
1844         (__arm_vabsq_x_s16): Likewise.
1845         (__arm_vabsq_x_s32): Likewise.
1846         (__arm_vaddq_x_s8): Likewise.
1847         (__arm_vaddq_x_s16): Likewise.
1848         (__arm_vaddq_x_s32): Likewise.
1849         (__arm_vaddq_x_n_s8): Likewise.
1850         (__arm_vaddq_x_n_s16): Likewise.
1851         (__arm_vaddq_x_n_s32): Likewise.
1852         (__arm_vaddq_x_u8): Likewise.
1853         (__arm_vaddq_x_u16): Likewise.
1854         (__arm_vaddq_x_u32): Likewise.
1855         (__arm_vaddq_x_n_u8): Likewise.
1856         (__arm_vaddq_x_n_u16): Likewise.
1857         (__arm_vaddq_x_n_u32): Likewise.
1858         (__arm_vclsq_x_s8): Likewise.
1859         (__arm_vclsq_x_s16): Likewise.
1860         (__arm_vclsq_x_s32): Likewise.
1861         (__arm_vclzq_x_s8): Likewise.
1862         (__arm_vclzq_x_s16): Likewise.
1863         (__arm_vclzq_x_s32): Likewise.
1864         (__arm_vclzq_x_u8): Likewise.
1865         (__arm_vclzq_x_u16): Likewise.
1866         (__arm_vclzq_x_u32): Likewise.
1867         (__arm_vnegq_x_s8): Likewise.
1868         (__arm_vnegq_x_s16): Likewise.
1869         (__arm_vnegq_x_s32): Likewise.
1870         (__arm_vmulhq_x_s8): Likewise.
1871         (__arm_vmulhq_x_s16): Likewise.
1872         (__arm_vmulhq_x_s32): Likewise.
1873         (__arm_vmulhq_x_u8): Likewise.
1874         (__arm_vmulhq_x_u16): Likewise.
1875         (__arm_vmulhq_x_u32): Likewise.
1876         (__arm_vmullbq_poly_x_p8): Likewise.
1877         (__arm_vmullbq_poly_x_p16): Likewise.
1878         (__arm_vmullbq_int_x_s8): Likewise.
1879         (__arm_vmullbq_int_x_s16): Likewise.
1880         (__arm_vmullbq_int_x_s32): Likewise.
1881         (__arm_vmullbq_int_x_u8): Likewise.
1882         (__arm_vmullbq_int_x_u16): Likewise.
1883         (__arm_vmullbq_int_x_u32): Likewise.
1884         (__arm_vmulltq_poly_x_p8): Likewise.
1885         (__arm_vmulltq_poly_x_p16): Likewise.
1886         (__arm_vmulltq_int_x_s8): Likewise.
1887         (__arm_vmulltq_int_x_s16): Likewise.
1888         (__arm_vmulltq_int_x_s32): Likewise.
1889         (__arm_vmulltq_int_x_u8): Likewise.
1890         (__arm_vmulltq_int_x_u16): Likewise.
1891         (__arm_vmulltq_int_x_u32): Likewise.
1892         (__arm_vmulq_x_s8): Likewise.
1893         (__arm_vmulq_x_s16): Likewise.
1894         (__arm_vmulq_x_s32): Likewise.
1895         (__arm_vmulq_x_n_s8): Likewise.
1896         (__arm_vmulq_x_n_s16): Likewise.
1897         (__arm_vmulq_x_n_s32): Likewise.
1898         (__arm_vmulq_x_u8): Likewise.
1899         (__arm_vmulq_x_u16): Likewise.
1900         (__arm_vmulq_x_u32): Likewise.
1901         (__arm_vmulq_x_n_u8): Likewise.
1902         (__arm_vmulq_x_n_u16): Likewise.
1903         (__arm_vmulq_x_n_u32): Likewise.
1904         (__arm_vsubq_x_s8): Likewise.
1905         (__arm_vsubq_x_s16): Likewise.
1906         (__arm_vsubq_x_s32): Likewise.
1907         (__arm_vsubq_x_n_s8): Likewise.
1908         (__arm_vsubq_x_n_s16): Likewise.
1909         (__arm_vsubq_x_n_s32): Likewise.
1910         (__arm_vsubq_x_u8): Likewise.
1911         (__arm_vsubq_x_u16): Likewise.
1912         (__arm_vsubq_x_u32): Likewise.
1913         (__arm_vsubq_x_n_u8): Likewise.
1914         (__arm_vsubq_x_n_u16): Likewise.
1915         (__arm_vsubq_x_n_u32): Likewise.
1916         (__arm_vcaddq_rot90_x_s8): Likewise.
1917         (__arm_vcaddq_rot90_x_s16): Likewise.
1918         (__arm_vcaddq_rot90_x_s32): Likewise.
1919         (__arm_vcaddq_rot90_x_u8): Likewise.
1920         (__arm_vcaddq_rot90_x_u16): Likewise.
1921         (__arm_vcaddq_rot90_x_u32): Likewise.
1922         (__arm_vcaddq_rot270_x_s8): Likewise.
1923         (__arm_vcaddq_rot270_x_s16): Likewise.
1924         (__arm_vcaddq_rot270_x_s32): Likewise.
1925         (__arm_vcaddq_rot270_x_u8): Likewise.
1926         (__arm_vcaddq_rot270_x_u16): Likewise.
1927         (__arm_vcaddq_rot270_x_u32): Likewise.
1928         (__arm_vhaddq_x_n_s8): Likewise.
1929         (__arm_vhaddq_x_n_s16): Likewise.
1930         (__arm_vhaddq_x_n_s32): Likewise.
1931         (__arm_vhaddq_x_n_u8): Likewise.
1932         (__arm_vhaddq_x_n_u16): Likewise.
1933         (__arm_vhaddq_x_n_u32): Likewise.
1934         (__arm_vhaddq_x_s8): Likewise.
1935         (__arm_vhaddq_x_s16): Likewise.
1936         (__arm_vhaddq_x_s32): Likewise.
1937         (__arm_vhaddq_x_u8): Likewise.
1938         (__arm_vhaddq_x_u16): Likewise.
1939         (__arm_vhaddq_x_u32): Likewise.
1940         (__arm_vhcaddq_rot90_x_s8): Likewise.
1941         (__arm_vhcaddq_rot90_x_s16): Likewise.
1942         (__arm_vhcaddq_rot90_x_s32): Likewise.
1943         (__arm_vhcaddq_rot270_x_s8): Likewise.
1944         (__arm_vhcaddq_rot270_x_s16): Likewise.
1945         (__arm_vhcaddq_rot270_x_s32): Likewise.
1946         (__arm_vhsubq_x_n_s8): Likewise.
1947         (__arm_vhsubq_x_n_s16): Likewise.
1948         (__arm_vhsubq_x_n_s32): Likewise.
1949         (__arm_vhsubq_x_n_u8): Likewise.
1950         (__arm_vhsubq_x_n_u16): Likewise.
1951         (__arm_vhsubq_x_n_u32): Likewise.
1952         (__arm_vhsubq_x_s8): Likewise.
1953         (__arm_vhsubq_x_s16): Likewise.
1954         (__arm_vhsubq_x_s32): Likewise.
1955         (__arm_vhsubq_x_u8): Likewise.
1956         (__arm_vhsubq_x_u16): Likewise.
1957         (__arm_vhsubq_x_u32): Likewise.
1958         (__arm_vrhaddq_x_s8): Likewise.
1959         (__arm_vrhaddq_x_s16): Likewise.
1960         (__arm_vrhaddq_x_s32): Likewise.
1961         (__arm_vrhaddq_x_u8): Likewise.
1962         (__arm_vrhaddq_x_u16): Likewise.
1963         (__arm_vrhaddq_x_u32): Likewise.
1964         (__arm_vrmulhq_x_s8): Likewise.
1965         (__arm_vrmulhq_x_s16): Likewise.
1966         (__arm_vrmulhq_x_s32): Likewise.
1967         (__arm_vrmulhq_x_u8): Likewise.
1968         (__arm_vrmulhq_x_u16): Likewise.
1969         (__arm_vrmulhq_x_u32): Likewise.
1970         (__arm_vandq_x_s8): Likewise.
1971         (__arm_vandq_x_s16): Likewise.
1972         (__arm_vandq_x_s32): Likewise.
1973         (__arm_vandq_x_u8): Likewise.
1974         (__arm_vandq_x_u16): Likewise.
1975         (__arm_vandq_x_u32): Likewise.
1976         (__arm_vbicq_x_s8): Likewise.
1977         (__arm_vbicq_x_s16): Likewise.
1978         (__arm_vbicq_x_s32): Likewise.
1979         (__arm_vbicq_x_u8): Likewise.
1980         (__arm_vbicq_x_u16): Likewise.
1981         (__arm_vbicq_x_u32): Likewise.
1982         (__arm_vbrsrq_x_n_s8): Likewise.
1983         (__arm_vbrsrq_x_n_s16): Likewise.
1984         (__arm_vbrsrq_x_n_s32): Likewise.
1985         (__arm_vbrsrq_x_n_u8): Likewise.
1986         (__arm_vbrsrq_x_n_u16): Likewise.
1987         (__arm_vbrsrq_x_n_u32): Likewise.
1988         (__arm_veorq_x_s8): Likewise.
1989         (__arm_veorq_x_s16): Likewise.
1990         (__arm_veorq_x_s32): Likewise.
1991         (__arm_veorq_x_u8): Likewise.
1992         (__arm_veorq_x_u16): Likewise.
1993         (__arm_veorq_x_u32): Likewise.
1994         (__arm_vmovlbq_x_s8): Likewise.
1995         (__arm_vmovlbq_x_s16): Likewise.
1996         (__arm_vmovlbq_x_u8): Likewise.
1997         (__arm_vmovlbq_x_u16): Likewise.
1998         (__arm_vmovltq_x_s8): Likewise.
1999         (__arm_vmovltq_x_s16): Likewise.
2000         (__arm_vmovltq_x_u8): Likewise.
2001         (__arm_vmovltq_x_u16): Likewise.
2002         (__arm_vmvnq_x_s8): Likewise.
2003         (__arm_vmvnq_x_s16): Likewise.
2004         (__arm_vmvnq_x_s32): Likewise.
2005         (__arm_vmvnq_x_u8): Likewise.
2006         (__arm_vmvnq_x_u16): Likewise.
2007         (__arm_vmvnq_x_u32): Likewise.
2008         (__arm_vmvnq_x_n_s16): Likewise.
2009         (__arm_vmvnq_x_n_s32): Likewise.
2010         (__arm_vmvnq_x_n_u16): Likewise.
2011         (__arm_vmvnq_x_n_u32): Likewise.
2012         (__arm_vornq_x_s8): Likewise.
2013         (__arm_vornq_x_s16): Likewise.
2014         (__arm_vornq_x_s32): Likewise.
2015         (__arm_vornq_x_u8): Likewise.
2016         (__arm_vornq_x_u16): Likewise.
2017         (__arm_vornq_x_u32): Likewise.
2018         (__arm_vorrq_x_s8): Likewise.
2019         (__arm_vorrq_x_s16): Likewise.
2020         (__arm_vorrq_x_s32): Likewise.
2021         (__arm_vorrq_x_u8): Likewise.
2022         (__arm_vorrq_x_u16): Likewise.
2023         (__arm_vorrq_x_u32): Likewise.
2024         (__arm_vrev16q_x_s8): Likewise.
2025         (__arm_vrev16q_x_u8): Likewise.
2026         (__arm_vrev32q_x_s8): Likewise.
2027         (__arm_vrev32q_x_s16): Likewise.
2028         (__arm_vrev32q_x_u8): Likewise.
2029         (__arm_vrev32q_x_u16): Likewise.
2030         (__arm_vrev64q_x_s8): Likewise.
2031         (__arm_vrev64q_x_s16): Likewise.
2032         (__arm_vrev64q_x_s32): Likewise.
2033         (__arm_vrev64q_x_u8): Likewise.
2034         (__arm_vrev64q_x_u16): Likewise.
2035         (__arm_vrev64q_x_u32): Likewise.
2036         (__arm_vrshlq_x_s8): Likewise.
2037         (__arm_vrshlq_x_s16): Likewise.
2038         (__arm_vrshlq_x_s32): Likewise.
2039         (__arm_vrshlq_x_u8): Likewise.
2040         (__arm_vrshlq_x_u16): Likewise.
2041         (__arm_vrshlq_x_u32): Likewise.
2042         (__arm_vshllbq_x_n_s8): Likewise.
2043         (__arm_vshllbq_x_n_s16): Likewise.
2044         (__arm_vshllbq_x_n_u8): Likewise.
2045         (__arm_vshllbq_x_n_u16): Likewise.
2046         (__arm_vshlltq_x_n_s8): Likewise.
2047         (__arm_vshlltq_x_n_s16): Likewise.
2048         (__arm_vshlltq_x_n_u8): Likewise.
2049         (__arm_vshlltq_x_n_u16): Likewise.
2050         (__arm_vshlq_x_s8): Likewise.
2051         (__arm_vshlq_x_s16): Likewise.
2052         (__arm_vshlq_x_s32): Likewise.
2053         (__arm_vshlq_x_u8): Likewise.
2054         (__arm_vshlq_x_u16): Likewise.
2055         (__arm_vshlq_x_u32): Likewise.
2056         (__arm_vshlq_x_n_s8): Likewise.
2057         (__arm_vshlq_x_n_s16): Likewise.
2058         (__arm_vshlq_x_n_s32): Likewise.
2059         (__arm_vshlq_x_n_u8): Likewise.
2060         (__arm_vshlq_x_n_u16): Likewise.
2061         (__arm_vshlq_x_n_u32): Likewise.
2062         (__arm_vrshrq_x_n_s8): Likewise.
2063         (__arm_vrshrq_x_n_s16): Likewise.
2064         (__arm_vrshrq_x_n_s32): Likewise.
2065         (__arm_vrshrq_x_n_u8): Likewise.
2066         (__arm_vrshrq_x_n_u16): Likewise.
2067         (__arm_vrshrq_x_n_u32): Likewise.
2068         (__arm_vshrq_x_n_s8): Likewise.
2069         (__arm_vshrq_x_n_s16): Likewise.
2070         (__arm_vshrq_x_n_s32): Likewise.
2071         (__arm_vshrq_x_n_u8): Likewise.
2072         (__arm_vshrq_x_n_u16): Likewise.
2073         (__arm_vshrq_x_n_u32): Likewise.
2074         (__arm_vdupq_x_n_f16): Likewise.
2075         (__arm_vdupq_x_n_f32): Likewise.
2076         (__arm_vminnmq_x_f16): Likewise.
2077         (__arm_vminnmq_x_f32): Likewise.
2078         (__arm_vmaxnmq_x_f16): Likewise.
2079         (__arm_vmaxnmq_x_f32): Likewise.
2080         (__arm_vabdq_x_f16): Likewise.
2081         (__arm_vabdq_x_f32): Likewise.
2082         (__arm_vabsq_x_f16): Likewise.
2083         (__arm_vabsq_x_f32): Likewise.
2084         (__arm_vaddq_x_f16): Likewise.
2085         (__arm_vaddq_x_f32): Likewise.
2086         (__arm_vaddq_x_n_f16): Likewise.
2087         (__arm_vaddq_x_n_f32): Likewise.
2088         (__arm_vnegq_x_f16): Likewise.
2089         (__arm_vnegq_x_f32): Likewise.
2090         (__arm_vmulq_x_f16): Likewise.
2091         (__arm_vmulq_x_f32): Likewise.
2092         (__arm_vmulq_x_n_f16): Likewise.
2093         (__arm_vmulq_x_n_f32): Likewise.
2094         (__arm_vsubq_x_f16): Likewise.
2095         (__arm_vsubq_x_f32): Likewise.
2096         (__arm_vsubq_x_n_f16): Likewise.
2097         (__arm_vsubq_x_n_f32): Likewise.
2098         (__arm_vcaddq_rot90_x_f16): Likewise.
2099         (__arm_vcaddq_rot90_x_f32): Likewise.
2100         (__arm_vcaddq_rot270_x_f16): Likewise.
2101         (__arm_vcaddq_rot270_x_f32): Likewise.
2102         (__arm_vcmulq_x_f16): Likewise.
2103         (__arm_vcmulq_x_f32): Likewise.
2104         (__arm_vcmulq_rot90_x_f16): Likewise.
2105         (__arm_vcmulq_rot90_x_f32): Likewise.
2106         (__arm_vcmulq_rot180_x_f16): Likewise.
2107         (__arm_vcmulq_rot180_x_f32): Likewise.
2108         (__arm_vcmulq_rot270_x_f16): Likewise.
2109         (__arm_vcmulq_rot270_x_f32): Likewise.
2110         (__arm_vcvtaq_x_s16_f16): Likewise.
2111         (__arm_vcvtaq_x_s32_f32): Likewise.
2112         (__arm_vcvtaq_x_u16_f16): Likewise.
2113         (__arm_vcvtaq_x_u32_f32): Likewise.
2114         (__arm_vcvtnq_x_s16_f16): Likewise.
2115         (__arm_vcvtnq_x_s32_f32): Likewise.
2116         (__arm_vcvtnq_x_u16_f16): Likewise.
2117         (__arm_vcvtnq_x_u32_f32): Likewise.
2118         (__arm_vcvtpq_x_s16_f16): Likewise.
2119         (__arm_vcvtpq_x_s32_f32): Likewise.
2120         (__arm_vcvtpq_x_u16_f16): Likewise.
2121         (__arm_vcvtpq_x_u32_f32): Likewise.
2122         (__arm_vcvtmq_x_s16_f16): Likewise.
2123         (__arm_vcvtmq_x_s32_f32): Likewise.
2124         (__arm_vcvtmq_x_u16_f16): Likewise.
2125         (__arm_vcvtmq_x_u32_f32): Likewise.
2126         (__arm_vcvtbq_x_f32_f16): Likewise.
2127         (__arm_vcvttq_x_f32_f16): Likewise.
2128         (__arm_vcvtq_x_f16_u16): Likewise.
2129         (__arm_vcvtq_x_f16_s16): Likewise.
2130         (__arm_vcvtq_x_f32_s32): Likewise.
2131         (__arm_vcvtq_x_f32_u32): Likewise.
2132         (__arm_vcvtq_x_n_f16_s16): Likewise.
2133         (__arm_vcvtq_x_n_f16_u16): Likewise.
2134         (__arm_vcvtq_x_n_f32_s32): Likewise.
2135         (__arm_vcvtq_x_n_f32_u32): Likewise.
2136         (__arm_vcvtq_x_s16_f16): Likewise.
2137         (__arm_vcvtq_x_s32_f32): Likewise.
2138         (__arm_vcvtq_x_u16_f16): Likewise.
2139         (__arm_vcvtq_x_u32_f32): Likewise.
2140         (__arm_vcvtq_x_n_s16_f16): Likewise.
2141         (__arm_vcvtq_x_n_s32_f32): Likewise.
2142         (__arm_vcvtq_x_n_u16_f16): Likewise.
2143         (__arm_vcvtq_x_n_u32_f32): Likewise.
2144         (__arm_vrndq_x_f16): Likewise.
2145         (__arm_vrndq_x_f32): Likewise.
2146         (__arm_vrndnq_x_f16): Likewise.
2147         (__arm_vrndnq_x_f32): Likewise.
2148         (__arm_vrndmq_x_f16): Likewise.
2149         (__arm_vrndmq_x_f32): Likewise.
2150         (__arm_vrndpq_x_f16): Likewise.
2151         (__arm_vrndpq_x_f32): Likewise.
2152         (__arm_vrndaq_x_f16): Likewise.
2153         (__arm_vrndaq_x_f32): Likewise.
2154         (__arm_vrndxq_x_f16): Likewise.
2155         (__arm_vrndxq_x_f32): Likewise.
2156         (__arm_vandq_x_f16): Likewise.
2157         (__arm_vandq_x_f32): Likewise.
2158         (__arm_vbicq_x_f16): Likewise.
2159         (__arm_vbicq_x_f32): Likewise.
2160         (__arm_vbrsrq_x_n_f16): Likewise.
2161         (__arm_vbrsrq_x_n_f32): Likewise.
2162         (__arm_veorq_x_f16): Likewise.
2163         (__arm_veorq_x_f32): Likewise.
2164         (__arm_vornq_x_f16): Likewise.
2165         (__arm_vornq_x_f32): Likewise.
2166         (__arm_vorrq_x_f16): Likewise.
2167         (__arm_vorrq_x_f32): Likewise.
2168         (__arm_vrev32q_x_f16): Likewise.
2169         (__arm_vrev64q_x_f16): Likewise.
2170         (__arm_vrev64q_x_f32): Likewise.
2171         (vabdq_x): Define polymorphic variant.
2172         (vabsq_x): Likewise.
2173         (vaddq_x): Likewise.
2174         (vandq_x): Likewise.
2175         (vbicq_x): Likewise.
2176         (vbrsrq_x): Likewise.
2177         (vcaddq_rot270_x): Likewise.
2178         (vcaddq_rot90_x): Likewise.
2179         (vcmulq_rot180_x): Likewise.
2180         (vcmulq_rot270_x): Likewise.
2181         (vcmulq_x): Likewise.
2182         (vcvtq_x): Likewise.
2183         (vcvtq_x_n): Likewise.
2184         (vcvtnq_m): Likewise.
2185         (veorq_x): Likewise.
2186         (vmaxnmq_x): Likewise.
2187         (vminnmq_x): Likewise.
2188         (vmulq_x): Likewise.
2189         (vnegq_x): Likewise.
2190         (vornq_x): Likewise.
2191         (vorrq_x): Likewise.
2192         (vrev32q_x): Likewise.
2193         (vrev64q_x): Likewise.
2194         (vrndaq_x): Likewise.
2195         (vrndmq_x): Likewise.
2196         (vrndnq_x): Likewise.
2197         (vrndpq_x): Likewise.
2198         (vrndq_x): Likewise.
2199         (vrndxq_x): Likewise.
2200         (vsubq_x): Likewise.
2201         (vcmulq_rot90_x): Likewise.
2202         (vadciq): Likewise.
2203         (vclsq_x): Likewise.
2204         (vclzq_x): Likewise.
2205         (vhaddq_x): Likewise.
2206         (vhcaddq_rot270_x): Likewise.
2207         (vhcaddq_rot90_x): Likewise.
2208         (vhsubq_x): Likewise.
2209         (vmaxq_x): Likewise.
2210         (vminq_x): Likewise.
2211         (vmovlbq_x): Likewise.
2212         (vmovltq_x): Likewise.
2213         (vmulhq_x): Likewise.
2214         (vmullbq_int_x): Likewise.
2215         (vmullbq_poly_x): Likewise.
2216         (vmulltq_int_x): Likewise.
2217         (vmulltq_poly_x): Likewise.
2218         (vmvnq_x): Likewise.
2219         (vrev16q_x): Likewise.
2220         (vrhaddq_x): Likewise.
2221         (vrmulhq_x): Likewise.
2222         (vrshlq_x): Likewise.
2223         (vrshrq_x): Likewise.
2224         (vshllbq_x): Likewise.
2225         (vshlltq_x): Likewise.
2226         (vshlq_x_n): Likewise.
2227         (vshlq_x): Likewise.
2228         (vdwdupq_x_u8): Likewise.
2229         (vdwdupq_x_u16): Likewise.
2230         (vdwdupq_x_u32): Likewise.
2231         (viwdupq_x_u8): Likewise.
2232         (viwdupq_x_u16): Likewise.
2233         (viwdupq_x_u32): Likewise.
2234         (vidupq_x_u8): Likewise.
2235         (vddupq_x_u8): Likewise.
2236         (vidupq_x_u16): Likewise.
2237         (vddupq_x_u16): Likewise.
2238         (vidupq_x_u32): Likewise.
2239         (vddupq_x_u32): Likewise.
2240         (vshrq_x): Likewise.
2241
2242 2020-03-20  Richard Biener  <rguenther@suse.de>
2243
2244         * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
2245         to vectorize for CTOR defs.
2246
2247 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2248             Andre Vieira  <andre.simoesdiasvieira@arm.com>
2249             Mihail Ionescu  <mihail.ionescu@arm.com>
2250
2251         * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
2252         qualifier.
2253         (LDRGBWBU_QUALIFIERS): Likewise.
2254         (LDRGBWBS_Z_QUALIFIERS): Likewise.
2255         (LDRGBWBU_Z_QUALIFIERS): Likewise.
2256         (STRSBWBS_QUALIFIERS): Likewise.
2257         (STRSBWBU_QUALIFIERS): Likewise.
2258         (STRSBWBS_P_QUALIFIERS): Likewise.
2259         (STRSBWBU_P_QUALIFIERS): Likewise.
2260         * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
2261         (vldrdq_gather_base_wb_u64): Likewise.
2262         (vldrdq_gather_base_wb_z_s64): Likewise.
2263         (vldrdq_gather_base_wb_z_u64): Likewise.
2264         (vldrwq_gather_base_wb_f32): Likewise.
2265         (vldrwq_gather_base_wb_s32): Likewise.
2266         (vldrwq_gather_base_wb_u32): Likewise.
2267         (vldrwq_gather_base_wb_z_f32): Likewise.
2268         (vldrwq_gather_base_wb_z_s32): Likewise.
2269         (vldrwq_gather_base_wb_z_u32): Likewise.
2270         (vstrdq_scatter_base_wb_p_s64): Likewise.
2271         (vstrdq_scatter_base_wb_p_u64): Likewise.
2272         (vstrdq_scatter_base_wb_s64): Likewise.
2273         (vstrdq_scatter_base_wb_u64): Likewise.
2274         (vstrwq_scatter_base_wb_p_s32): Likewise.
2275         (vstrwq_scatter_base_wb_p_f32): Likewise.
2276         (vstrwq_scatter_base_wb_p_u32): Likewise.
2277         (vstrwq_scatter_base_wb_s32): Likewise.
2278         (vstrwq_scatter_base_wb_u32): Likewise.
2279         (vstrwq_scatter_base_wb_f32): Likewise.
2280         (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
2281         (__arm_vldrdq_gather_base_wb_u64): Likewise.
2282         (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
2283         (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
2284         (__arm_vldrwq_gather_base_wb_s32): Likewise.
2285         (__arm_vldrwq_gather_base_wb_u32): Likewise.
2286         (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
2287         (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
2288         (__arm_vstrdq_scatter_base_wb_s64): Likewise.
2289         (__arm_vstrdq_scatter_base_wb_u64): Likewise.
2290         (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
2291         (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
2292         (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
2293         (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
2294         (__arm_vstrwq_scatter_base_wb_s32): Likewise.
2295         (__arm_vstrwq_scatter_base_wb_u32): Likewise.
2296         (__arm_vldrwq_gather_base_wb_f32): Likewise.
2297         (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
2298         (__arm_vstrwq_scatter_base_wb_f32): Likewise.
2299         (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
2300         (vstrwq_scatter_base_wb): Define polymorphic variant.
2301         (vstrwq_scatter_base_wb_p): Likewise.
2302         (vstrdq_scatter_base_wb_p): Likewise.
2303         (vstrdq_scatter_base_wb): Likewise.
2304         * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
2305         qualifier.
2306         * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
2307         pattern.
2308         (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
2309         (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
2310         (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
2311         (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
2312         (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
2313         (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
2314         (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
2315         (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
2316         (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
2317         (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
2318         (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
2319         (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
2320         (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
2321         (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
2322         (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
2323         (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
2324         (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
2325         (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
2326         (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
2327         (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
2328         (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
2329         (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
2330         (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
2331         (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
2332         (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
2333         (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
2334         (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
2335         (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
2336         (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
2337
2338 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2339             Andre Vieira  <andre.simoesdiasvieira@arm.com>
2340             Mihail Ionescu  <mihail.ionescu@arm.com>
2341
2342         * config/arm/arm-builtins.c
2343         (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
2344         builtin qualifier.
2345         * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
2346         (vddupq_m_n_u32): Likewise.
2347         (vddupq_m_n_u16): Likewise.
2348         (vddupq_m_wb_u8): Likewise.
2349         (vddupq_m_wb_u16): Likewise.
2350         (vddupq_m_wb_u32): Likewise.
2351         (vddupq_n_u8): Likewise.
2352         (vddupq_n_u32): Likewise.
2353         (vddupq_n_u16): Likewise.
2354         (vddupq_wb_u8): Likewise.
2355         (vddupq_wb_u16): Likewise.
2356         (vddupq_wb_u32): Likewise.
2357         (vdwdupq_m_n_u8): Likewise.
2358         (vdwdupq_m_n_u32): Likewise.
2359         (vdwdupq_m_n_u16): Likewise.
2360         (vdwdupq_m_wb_u8): Likewise.
2361         (vdwdupq_m_wb_u32): Likewise.
2362         (vdwdupq_m_wb_u16): Likewise.
2363         (vdwdupq_n_u8): Likewise.
2364         (vdwdupq_n_u32): Likewise.
2365         (vdwdupq_n_u16): Likewise.
2366         (vdwdupq_wb_u8): Likewise.
2367         (vdwdupq_wb_u32): Likewise.
2368         (vdwdupq_wb_u16): Likewise.
2369         (vidupq_m_n_u8): Likewise.
2370         (vidupq_m_n_u32): Likewise.
2371         (vidupq_m_n_u16): Likewise.
2372         (vidupq_m_wb_u8): Likewise.
2373         (vidupq_m_wb_u16): Likewise.
2374         (vidupq_m_wb_u32): Likewise.
2375         (vidupq_n_u8): Likewise.
2376         (vidupq_n_u32): Likewise.
2377         (vidupq_n_u16): Likewise.
2378         (vidupq_wb_u8): Likewise.
2379         (vidupq_wb_u16): Likewise.
2380         (vidupq_wb_u32): Likewise.
2381         (viwdupq_m_n_u8): Likewise.
2382         (viwdupq_m_n_u32): Likewise.
2383         (viwdupq_m_n_u16): Likewise.
2384         (viwdupq_m_wb_u8): Likewise.
2385         (viwdupq_m_wb_u32): Likewise.
2386         (viwdupq_m_wb_u16): Likewise.
2387         (viwdupq_n_u8): Likewise.
2388         (viwdupq_n_u32): Likewise.
2389         (viwdupq_n_u16): Likewise.
2390         (viwdupq_wb_u8): Likewise.
2391         (viwdupq_wb_u32): Likewise.
2392         (viwdupq_wb_u16): Likewise.
2393         (__arm_vddupq_m_n_u8): Define intrinsic.
2394         (__arm_vddupq_m_n_u32): Likewise.
2395         (__arm_vddupq_m_n_u16): Likewise.
2396         (__arm_vddupq_m_wb_u8): Likewise.
2397         (__arm_vddupq_m_wb_u16): Likewise.
2398         (__arm_vddupq_m_wb_u32): Likewise.
2399         (__arm_vddupq_n_u8): Likewise.
2400         (__arm_vddupq_n_u32): Likewise.
2401         (__arm_vddupq_n_u16): Likewise.
2402         (__arm_vdwdupq_m_n_u8): Likewise.
2403         (__arm_vdwdupq_m_n_u32): Likewise.
2404         (__arm_vdwdupq_m_n_u16): Likewise.
2405         (__arm_vdwdupq_m_wb_u8): Likewise.
2406         (__arm_vdwdupq_m_wb_u32): Likewise.
2407         (__arm_vdwdupq_m_wb_u16): Likewise.
2408         (__arm_vdwdupq_n_u8): Likewise.
2409         (__arm_vdwdupq_n_u32): Likewise.
2410         (__arm_vdwdupq_n_u16): Likewise.
2411         (__arm_vdwdupq_wb_u8): Likewise.
2412         (__arm_vdwdupq_wb_u32): Likewise.
2413         (__arm_vdwdupq_wb_u16): Likewise.
2414         (__arm_vidupq_m_n_u8): Likewise.
2415         (__arm_vidupq_m_n_u32): Likewise.
2416         (__arm_vidupq_m_n_u16): Likewise.
2417         (__arm_vidupq_n_u8): Likewise.
2418         (__arm_vidupq_m_wb_u8): Likewise.
2419         (__arm_vidupq_m_wb_u16): Likewise.
2420         (__arm_vidupq_m_wb_u32): Likewise.
2421         (__arm_vidupq_n_u32): Likewise.
2422         (__arm_vidupq_n_u16): Likewise.
2423         (__arm_vidupq_wb_u8): Likewise.
2424         (__arm_vidupq_wb_u16): Likewise.
2425         (__arm_vidupq_wb_u32): Likewise.
2426         (__arm_vddupq_wb_u8): Likewise.
2427         (__arm_vddupq_wb_u16): Likewise.
2428         (__arm_vddupq_wb_u32): Likewise.
2429         (__arm_viwdupq_m_n_u8): Likewise.
2430         (__arm_viwdupq_m_n_u32): Likewise.
2431         (__arm_viwdupq_m_n_u16): Likewise.
2432         (__arm_viwdupq_m_wb_u8): Likewise.
2433         (__arm_viwdupq_m_wb_u32): Likewise.
2434         (__arm_viwdupq_m_wb_u16): Likewise.
2435         (__arm_viwdupq_n_u8): Likewise.
2436         (__arm_viwdupq_n_u32): Likewise.
2437         (__arm_viwdupq_n_u16): Likewise.
2438         (__arm_viwdupq_wb_u8): Likewise.
2439         (__arm_viwdupq_wb_u32): Likewise.
2440         (__arm_viwdupq_wb_u16): Likewise.
2441         (vidupq_m): Define polymorphic variant.
2442         (vddupq_m): Likewise.
2443         (vidupq_u16): Likewise.
2444         (vidupq_u32): Likewise.
2445         (vidupq_u8): Likewise.
2446         (vddupq_u16): Likewise.
2447         (vddupq_u32): Likewise.
2448         (vddupq_u8): Likewise.
2449         (viwdupq_m): Likewise.
2450         (viwdupq_u16): Likewise.
2451         (viwdupq_u32): Likewise.
2452         (viwdupq_u8): Likewise.
2453         (vdwdupq_m): Likewise.
2454         (vdwdupq_u16): Likewise.
2455         (vdwdupq_u32): Likewise.
2456         (vdwdupq_u8): Likewise.
2457         * config/arm/arm_mve_builtins.def
2458         (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
2459         qualifier.
2460         * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
2461         (mve_vidupq_u<mode>_insn): Likewise.
2462         (mve_vidupq_m_n_u<mode>): Likewise.
2463         (mve_vidupq_m_wb_u<mode>_insn): Likewise.
2464         (mve_vddupq_n_u<mode>): Likewise.
2465         (mve_vddupq_u<mode>_insn): Likewise.
2466         (mve_vddupq_m_n_u<mode>): Likewise.
2467         (mve_vddupq_m_wb_u<mode>_insn): Likewise.
2468         (mve_vdwdupq_n_u<mode>): Likewise.
2469         (mve_vdwdupq_wb_u<mode>): Likewise.
2470         (mve_vdwdupq_wb_u<mode>_insn): Likewise.
2471         (mve_vdwdupq_m_n_u<mode>): Likewise.
2472         (mve_vdwdupq_m_wb_u<mode>): Likewise.
2473         (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
2474         (mve_viwdupq_n_u<mode>): Likewise.
2475         (mve_viwdupq_wb_u<mode>): Likewise.
2476         (mve_viwdupq_wb_u<mode>_insn): Likewise.
2477         (mve_viwdupq_m_n_u<mode>): Likewise.
2478         (mve_viwdupq_m_wb_u<mode>): Likewise.
2479         (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
2480
2481 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2482
2483         * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
2484         (vreinterpretq_s16_s64): Likewise.
2485         (vreinterpretq_s16_s8): Likewise.
2486         (vreinterpretq_s16_u16): Likewise.
2487         (vreinterpretq_s16_u32): Likewise.
2488         (vreinterpretq_s16_u64): Likewise.
2489         (vreinterpretq_s16_u8): Likewise.
2490         (vreinterpretq_s32_s16): Likewise.
2491         (vreinterpretq_s32_s64): Likewise.
2492         (vreinterpretq_s32_s8): Likewise.
2493         (vreinterpretq_s32_u16): Likewise.
2494         (vreinterpretq_s32_u32): Likewise.
2495         (vreinterpretq_s32_u64): Likewise.
2496         (vreinterpretq_s32_u8): Likewise.
2497         (vreinterpretq_s64_s16): Likewise.
2498         (vreinterpretq_s64_s32): Likewise.
2499         (vreinterpretq_s64_s8): Likewise.
2500         (vreinterpretq_s64_u16): Likewise.
2501         (vreinterpretq_s64_u32): Likewise.
2502         (vreinterpretq_s64_u64): Likewise.
2503         (vreinterpretq_s64_u8): Likewise.
2504         (vreinterpretq_s8_s16): Likewise.
2505         (vreinterpretq_s8_s32): Likewise.
2506         (vreinterpretq_s8_s64): Likewise.
2507         (vreinterpretq_s8_u16): Likewise.
2508         (vreinterpretq_s8_u32): Likewise.
2509         (vreinterpretq_s8_u64): Likewise.
2510         (vreinterpretq_s8_u8): Likewise.
2511         (vreinterpretq_u16_s16): Likewise.
2512         (vreinterpretq_u16_s32): Likewise.
2513         (vreinterpretq_u16_s64): Likewise.
2514         (vreinterpretq_u16_s8): Likewise.
2515         (vreinterpretq_u16_u32): Likewise.
2516         (vreinterpretq_u16_u64): Likewise.
2517         (vreinterpretq_u16_u8): Likewise.
2518         (vreinterpretq_u32_s16): Likewise.
2519         (vreinterpretq_u32_s32): Likewise.
2520         (vreinterpretq_u32_s64): Likewise.
2521         (vreinterpretq_u32_s8): Likewise.
2522         (vreinterpretq_u32_u16): Likewise.
2523         (vreinterpretq_u32_u64): Likewise.
2524         (vreinterpretq_u32_u8): Likewise.
2525         (vreinterpretq_u64_s16): Likewise.
2526         (vreinterpretq_u64_s32): Likewise.
2527         (vreinterpretq_u64_s64): Likewise.
2528         (vreinterpretq_u64_s8): Likewise.
2529         (vreinterpretq_u64_u16): Likewise.
2530         (vreinterpretq_u64_u32): Likewise.
2531         (vreinterpretq_u64_u8): Likewise.
2532         (vreinterpretq_u8_s16): Likewise.
2533         (vreinterpretq_u8_s32): Likewise.
2534         (vreinterpretq_u8_s64): Likewise.
2535         (vreinterpretq_u8_s8): Likewise.
2536         (vreinterpretq_u8_u16): Likewise.
2537         (vreinterpretq_u8_u32): Likewise.
2538         (vreinterpretq_u8_u64): Likewise.
2539         (vreinterpretq_s32_f16): Likewise.
2540         (vreinterpretq_s32_f32): Likewise.
2541         (vreinterpretq_u16_f16): Likewise.
2542         (vreinterpretq_u16_f32): Likewise.
2543         (vreinterpretq_u32_f16): Likewise.
2544         (vreinterpretq_u32_f32): Likewise.
2545         (vreinterpretq_u64_f16): Likewise.
2546         (vreinterpretq_u64_f32): Likewise.
2547         (vreinterpretq_u8_f16): Likewise.
2548         (vreinterpretq_u8_f32): Likewise.
2549         (vreinterpretq_f16_f32): Likewise.
2550         (vreinterpretq_f16_s16): Likewise.
2551         (vreinterpretq_f16_s32): Likewise.
2552         (vreinterpretq_f16_s64): Likewise.
2553         (vreinterpretq_f16_s8): Likewise.
2554         (vreinterpretq_f16_u16): Likewise.
2555         (vreinterpretq_f16_u32): Likewise.
2556         (vreinterpretq_f16_u64): Likewise.
2557         (vreinterpretq_f16_u8): Likewise.
2558         (vreinterpretq_f32_f16): Likewise.
2559         (vreinterpretq_f32_s16): Likewise.
2560         (vreinterpretq_f32_s32): Likewise.
2561         (vreinterpretq_f32_s64): Likewise.
2562         (vreinterpretq_f32_s8): Likewise.
2563         (vreinterpretq_f32_u16): Likewise.
2564         (vreinterpretq_f32_u32): Likewise.
2565         (vreinterpretq_f32_u64): Likewise.
2566         (vreinterpretq_f32_u8): Likewise.
2567         (vreinterpretq_s16_f16): Likewise.
2568         (vreinterpretq_s16_f32): Likewise.
2569         (vreinterpretq_s64_f16): Likewise.
2570         (vreinterpretq_s64_f32): Likewise.
2571         (vreinterpretq_s8_f16): Likewise.
2572         (vreinterpretq_s8_f32): Likewise.
2573         (vuninitializedq_u8): Likewise.
2574         (vuninitializedq_u16): Likewise.
2575         (vuninitializedq_u32): Likewise.
2576         (vuninitializedq_u64): Likewise.
2577         (vuninitializedq_s8): Likewise.
2578         (vuninitializedq_s16): Likewise.
2579         (vuninitializedq_s32): Likewise.
2580         (vuninitializedq_s64): Likewise.
2581         (vuninitializedq_f16): Likewise.
2582         (vuninitializedq_f32): Likewise.
2583         (__arm_vuninitializedq_u8): Define intrinsic.
2584         (__arm_vuninitializedq_u16): Likewise.
2585         (__arm_vuninitializedq_u32): Likewise.
2586         (__arm_vuninitializedq_u64): Likewise.
2587         (__arm_vuninitializedq_s8): Likewise.
2588         (__arm_vuninitializedq_s16): Likewise.
2589         (__arm_vuninitializedq_s32): Likewise.
2590         (__arm_vuninitializedq_s64): Likewise.
2591         (__arm_vreinterpretq_s16_s32): Likewise.
2592         (__arm_vreinterpretq_s16_s64): Likewise.
2593         (__arm_vreinterpretq_s16_s8): Likewise.
2594         (__arm_vreinterpretq_s16_u16): Likewise.
2595         (__arm_vreinterpretq_s16_u32): Likewise.
2596         (__arm_vreinterpretq_s16_u64): Likewise.
2597         (__arm_vreinterpretq_s16_u8): Likewise.
2598         (__arm_vreinterpretq_s32_s16): Likewise.
2599         (__arm_vreinterpretq_s32_s64): Likewise.
2600         (__arm_vreinterpretq_s32_s8): Likewise.
2601         (__arm_vreinterpretq_s32_u16): Likewise.
2602         (__arm_vreinterpretq_s32_u32): Likewise.
2603         (__arm_vreinterpretq_s32_u64): Likewise.
2604         (__arm_vreinterpretq_s32_u8): Likewise.
2605         (__arm_vreinterpretq_s64_s16): Likewise.
2606         (__arm_vreinterpretq_s64_s32): Likewise.
2607         (__arm_vreinterpretq_s64_s8): Likewise.
2608         (__arm_vreinterpretq_s64_u16): Likewise.
2609         (__arm_vreinterpretq_s64_u32): Likewise.
2610         (__arm_vreinterpretq_s64_u64): Likewise.
2611         (__arm_vreinterpretq_s64_u8): Likewise.
2612         (__arm_vreinterpretq_s8_s16): Likewise.
2613         (__arm_vreinterpretq_s8_s32): Likewise.
2614         (__arm_vreinterpretq_s8_s64): Likewise.
2615         (__arm_vreinterpretq_s8_u16): Likewise.
2616         (__arm_vreinterpretq_s8_u32): Likewise.
2617         (__arm_vreinterpretq_s8_u64): Likewise.
2618         (__arm_vreinterpretq_s8_u8): Likewise.
2619         (__arm_vreinterpretq_u16_s16): Likewise.
2620         (__arm_vreinterpretq_u16_s32): Likewise.
2621         (__arm_vreinterpretq_u16_s64): Likewise.
2622         (__arm_vreinterpretq_u16_s8): Likewise.
2623         (__arm_vreinterpretq_u16_u32): Likewise.
2624         (__arm_vreinterpretq_u16_u64): Likewise.
2625         (__arm_vreinterpretq_u16_u8): Likewise.
2626         (__arm_vreinterpretq_u32_s16): Likewise.
2627         (__arm_vreinterpretq_u32_s32): Likewise.
2628         (__arm_vreinterpretq_u32_s64): Likewise.
2629         (__arm_vreinterpretq_u32_s8): Likewise.
2630         (__arm_vreinterpretq_u32_u16): Likewise.
2631         (__arm_vreinterpretq_u32_u64): Likewise.
2632         (__arm_vreinterpretq_u32_u8): Likewise.
2633         (__arm_vreinterpretq_u64_s16): Likewise.
2634         (__arm_vreinterpretq_u64_s32): Likewise.
2635         (__arm_vreinterpretq_u64_s64): Likewise.
2636         (__arm_vreinterpretq_u64_s8): Likewise.
2637         (__arm_vreinterpretq_u64_u16): Likewise.
2638         (__arm_vreinterpretq_u64_u32): Likewise.
2639         (__arm_vreinterpretq_u64_u8): Likewise.
2640         (__arm_vreinterpretq_u8_s16): Likewise.
2641         (__arm_vreinterpretq_u8_s32): Likewise.
2642         (__arm_vreinterpretq_u8_s64): Likewise.
2643         (__arm_vreinterpretq_u8_s8): Likewise.
2644         (__arm_vreinterpretq_u8_u16): Likewise.
2645         (__arm_vreinterpretq_u8_u32): Likewise.
2646         (__arm_vreinterpretq_u8_u64): Likewise.
2647         (__arm_vuninitializedq_f16): Likewise.
2648         (__arm_vuninitializedq_f32): Likewise.
2649         (__arm_vreinterpretq_s32_f16): Likewise.
2650         (__arm_vreinterpretq_s32_f32): Likewise.
2651         (__arm_vreinterpretq_s16_f16): Likewise.
2652         (__arm_vreinterpretq_s16_f32): Likewise.
2653         (__arm_vreinterpretq_s64_f16): Likewise.
2654         (__arm_vreinterpretq_s64_f32): Likewise.
2655         (__arm_vreinterpretq_s8_f16): Likewise.
2656         (__arm_vreinterpretq_s8_f32): Likewise.
2657         (__arm_vreinterpretq_u16_f16): Likewise.
2658         (__arm_vreinterpretq_u16_f32): Likewise.
2659         (__arm_vreinterpretq_u32_f16): Likewise.
2660         (__arm_vreinterpretq_u32_f32): Likewise.
2661         (__arm_vreinterpretq_u64_f16): Likewise.
2662         (__arm_vreinterpretq_u64_f32): Likewise.
2663         (__arm_vreinterpretq_u8_f16): Likewise.
2664         (__arm_vreinterpretq_u8_f32): Likewise.
2665         (__arm_vreinterpretq_f16_f32): Likewise.
2666         (__arm_vreinterpretq_f16_s16): Likewise.
2667         (__arm_vreinterpretq_f16_s32): Likewise.
2668         (__arm_vreinterpretq_f16_s64): Likewise.
2669         (__arm_vreinterpretq_f16_s8): Likewise.
2670         (__arm_vreinterpretq_f16_u16): Likewise.
2671         (__arm_vreinterpretq_f16_u32): Likewise.
2672         (__arm_vreinterpretq_f16_u64): Likewise.
2673         (__arm_vreinterpretq_f16_u8): Likewise.
2674         (__arm_vreinterpretq_f32_f16): Likewise.
2675         (__arm_vreinterpretq_f32_s16): Likewise.
2676         (__arm_vreinterpretq_f32_s32): Likewise.
2677         (__arm_vreinterpretq_f32_s64): Likewise.
2678         (__arm_vreinterpretq_f32_s8): Likewise.
2679         (__arm_vreinterpretq_f32_u16): Likewise.
2680         (__arm_vreinterpretq_f32_u32): Likewise.
2681         (__arm_vreinterpretq_f32_u64): Likewise.
2682         (__arm_vreinterpretq_f32_u8): Likewise.
2683         (vuninitializedq): Define polymorphic variant.
2684         (vreinterpretq_f16): Likewise.
2685         (vreinterpretq_f32): Likewise.
2686         (vreinterpretq_s16): Likewise.
2687         (vreinterpretq_s32): Likewise.
2688         (vreinterpretq_s64): Likewise.
2689         (vreinterpretq_s8): Likewise.
2690         (vreinterpretq_u16): Likewise.
2691         (vreinterpretq_u32): Likewise.
2692         (vreinterpretq_u64): Likewise.
2693         (vreinterpretq_u8): Likewise.
2694
2695 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2696             Andre Vieira  <andre.simoesdiasvieira@arm.com>
2697             Mihail Ionescu  <mihail.ionescu@arm.com>
2698
2699         * config/arm/arm_mve.h (vaddq_s8): Define macro.
2700         (vaddq_s16): Likewise.
2701         (vaddq_s32): Likewise.
2702         (vaddq_u8): Likewise.
2703         (vaddq_u16): Likewise.
2704         (vaddq_u32): Likewise.
2705         (vaddq_f16): Likewise.
2706         (vaddq_f32): Likewise.
2707         (__arm_vaddq_s8): Define intrinsic.
2708         (__arm_vaddq_s16): Likewise.
2709         (__arm_vaddq_s32): Likewise.
2710         (__arm_vaddq_u8): Likewise.
2711         (__arm_vaddq_u16): Likewise.
2712         (__arm_vaddq_u32): Likewise.
2713         (__arm_vaddq_f16): Likewise.
2714         (__arm_vaddq_f32): Likewise.
2715         (vaddq): Define polymorphic variant.
2716         * config/arm/iterators.md (VNIM): Define mode iterator for common types
2717         Neon, IWMMXT and MVE.
2718         (VNINOTM): Likewise.
2719         * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
2720         (mve_vaddq_f<mode>): Define RTL pattern.
2721         * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
2722         (addv8hf3_neon): Define RTL pattern.
2723         * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
2724         to support MVE.
2725         (addv8hf3): Define standard RTL pattern for MVE and Neon.
2726         (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
2727
2728 2020-03-20  Martin Liska  <mliska@suse.cz>
2729
2730         PR ipa/94232
2731         * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
2732         build_ref_for_offset function was used and it transforms off to bytes
2733         from bits.
2734
2735 2020-03-20  Richard Biener  <rguenther@suse.de>
2736
2737         PR tree-optimization/94266
2738         * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
2739         type of the underlying object to adjust for the containing
2740         field if available.
2741
2742 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2743
2744         * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
2745         (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
2746         * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
2747
2748 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2749
2750         * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
2751
2752 2020-03-20  Jakub Jelinek  <jakub@redhat.com>
2753
2754         PR tree-optimization/94224
2755         * gimple-ssa-store-merging.c
2756         (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
2757         or adjacent INTEGER_CST rhs_code stores as mergeable if they have
2758         different lp_nr.
2759
2760 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2761
2762         * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
2763
2764 2020-03-19  Jan Hubicka  <hubicka@ucw.cz>
2765
2766         PR ipa/94202
2767         * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
2768         (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
2769
2770 2020-03-19  Jan Hubicka  <hubicka@ucw.cz>
2771
2772         PR ipa/92372
2773         * cgraphunit.c (process_function_and_variable_attributes): warn
2774         for flatten attribute on alias.
2775         * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
2776
2777 2020-03-19  Martin Liska  <mliska@suse.cz>
2778
2779         * lto-section-in.c: Add ext_symtab.
2780         * lto-streamer-out.c (write_symbol_extension_info): New.
2781         (produce_symtab_extension): New.
2782         (produce_asm_for_decls): Stream also produce_symtab_extension.
2783         * lto-streamer.h (enum lto_section_type): New section.
2784
2785 2020-03-19  Jakub Jelinek  <jakub@redhat.com>
2786
2787         PR tree-optimization/94211
2788         * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
2789         instead of estimate_num_insns for bb_seq (middle_bb).  Rename
2790         emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
2791         all uses.
2792
2793 2020-03-19  Richard Biener  <rguenther@suse.de>
2794
2795         PR ipa/94217
2796         * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
2797         and build_ref_for_offset.
2798
2799 2020-03-19  Richard Biener  <rguenther@suse.de>
2800
2801         PR middle-end/94216
2802         * fold-const.c (fold_binary_loc): Avoid using
2803         build_fold_addr_expr when we really want an ADDR_EXPR.
2804
2805 2020-03-18  Segher Boessenkool  <segher@kernel.crashing.org>
2806
2807         * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
2808         aliases for "wa".
2809
2810 2020-03-12  Richard Sandiford  <richard.sandiford@arm.com>
2811
2812         PR rtl-optimization/90275
2813         * cse.c (cse_insn): Delete no-op register moves too.
2814
2815 2020-03-18  Martin Sebor  <msebor@redhat.com>
2816
2817         PR ipa/92799
2818         * cgraphunit.c (process_function_and_variable_attributes): Also
2819         complain about weakref function definitions and drop all effects
2820         of the attribute.
2821
2822 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2823             Mihail Ionescu  <mihail.ionescu@arm.com>
2824             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2825
2826         * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
2827         (vstrdq_scatter_base_p_u64): Likewise.
2828         (vstrdq_scatter_base_s64): Likewise.
2829         (vstrdq_scatter_base_u64): Likewise.
2830         (vstrdq_scatter_offset_p_s64): Likewise.
2831         (vstrdq_scatter_offset_p_u64): Likewise.
2832         (vstrdq_scatter_offset_s64): Likewise.
2833         (vstrdq_scatter_offset_u64): Likewise.
2834         (vstrdq_scatter_shifted_offset_p_s64): Likewise.
2835         (vstrdq_scatter_shifted_offset_p_u64): Likewise.
2836         (vstrdq_scatter_shifted_offset_s64): Likewise.
2837         (vstrdq_scatter_shifted_offset_u64): Likewise.
2838         (vstrhq_scatter_offset_f16): Likewise.
2839         (vstrhq_scatter_offset_p_f16): Likewise.
2840         (vstrhq_scatter_shifted_offset_f16): Likewise.
2841         (vstrhq_scatter_shifted_offset_p_f16): Likewise.
2842         (vstrwq_scatter_base_f32): Likewise.
2843         (vstrwq_scatter_base_p_f32): Likewise.
2844         (vstrwq_scatter_offset_f32): Likewise.
2845         (vstrwq_scatter_offset_p_f32): Likewise.
2846         (vstrwq_scatter_offset_p_s32): Likewise.
2847         (vstrwq_scatter_offset_p_u32): Likewise.
2848         (vstrwq_scatter_offset_s32): Likewise.
2849         (vstrwq_scatter_offset_u32): Likewise.
2850         (vstrwq_scatter_shifted_offset_f32): Likewise.
2851         (vstrwq_scatter_shifted_offset_p_f32): Likewise.
2852         (vstrwq_scatter_shifted_offset_p_s32): Likewise.
2853         (vstrwq_scatter_shifted_offset_p_u32): Likewise.
2854         (vstrwq_scatter_shifted_offset_s32): Likewise.
2855         (vstrwq_scatter_shifted_offset_u32): Likewise.
2856         (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
2857         (__arm_vstrdq_scatter_base_p_u64): Likewise.
2858         (__arm_vstrdq_scatter_base_s64): Likewise.
2859         (__arm_vstrdq_scatter_base_u64): Likewise.
2860         (__arm_vstrdq_scatter_offset_p_s64): Likewise.
2861         (__arm_vstrdq_scatter_offset_p_u64): Likewise.
2862         (__arm_vstrdq_scatter_offset_s64): Likewise.
2863         (__arm_vstrdq_scatter_offset_u64): Likewise.
2864         (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
2865         (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
2866         (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
2867         (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
2868         (__arm_vstrwq_scatter_offset_p_s32): Likewise.
2869         (__arm_vstrwq_scatter_offset_p_u32): Likewise.
2870         (__arm_vstrwq_scatter_offset_s32): Likewise.
2871         (__arm_vstrwq_scatter_offset_u32): Likewise.
2872         (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
2873         (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
2874         (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
2875         (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
2876         (__arm_vstrhq_scatter_offset_f16): Likewise.
2877         (__arm_vstrhq_scatter_offset_p_f16): Likewise.
2878         (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
2879         (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
2880         (__arm_vstrwq_scatter_base_f32): Likewise.
2881         (__arm_vstrwq_scatter_base_p_f32): Likewise.
2882         (__arm_vstrwq_scatter_offset_f32): Likewise.
2883         (__arm_vstrwq_scatter_offset_p_f32): Likewise.
2884         (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
2885         (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
2886         (vstrhq_scatter_offset): Define polymorphic variant.
2887         (vstrhq_scatter_offset_p): Likewise.
2888         (vstrhq_scatter_shifted_offset): Likewise.
2889         (vstrhq_scatter_shifted_offset_p): Likewise.
2890         (vstrwq_scatter_base): Likewise.
2891         (vstrwq_scatter_base_p): Likewise.
2892         (vstrwq_scatter_offset): Likewise.
2893         (vstrwq_scatter_offset_p): Likewise.
2894         (vstrwq_scatter_shifted_offset): Likewise.
2895         (vstrwq_scatter_shifted_offset_p): Likewise.
2896         (vstrdq_scatter_base_p): Likewise.
2897         (vstrdq_scatter_base): Likewise.
2898         (vstrdq_scatter_offset_p): Likewise.
2899         (vstrdq_scatter_offset): Likewise.
2900         (vstrdq_scatter_shifted_offset_p): Likewise.
2901         (vstrdq_scatter_shifted_offset): Likewise.
2902         * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
2903         (STRSBS_P): Likewise.
2904         (STRSBU): Likewise.
2905         (STRSBU_P): Likewise.
2906         (STRSS): Likewise.
2907         (STRSS_P): Likewise.
2908         (STRSU): Likewise.
2909         (STRSU_P): Likewise.
2910         * config/arm/constraints.md (Ri): Define.
2911         * config/arm/mve.md (VSTRDSBQ): Define iterator.
2912         (VSTRDSOQ): Likewise.
2913         (VSTRDSSOQ): Likewise.
2914         (VSTRWSOQ): Likewise.
2915         (VSTRWSSOQ): Likewise.
2916         (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
2917         (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
2918         (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
2919         (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
2920         (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
2921         (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
2922         (mve_vstrhq_scatter_offset_fv8hf): Likewise.
2923         (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
2924         (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
2925         (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
2926         (mve_vstrwq_scatter_base_fv4sf): Likewise.
2927         (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
2928         (mve_vstrwq_scatter_offset_fv4sf): Likewise.
2929         (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
2930         (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
2931         (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
2932         (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
2933         (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
2934         (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
2935         (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
2936         * config/arm/predicates.md (Ri): Define predicate to check immediate
2937         is the range +/-1016 and multiple of 8.
2938
2939 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2940             Mihail Ionescu  <mihail.ionescu@arm.com>
2941             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2942
2943         * config/arm/arm_mve.h (vst1q_f32): Define macro.
2944         (vst1q_f16): Likewise.
2945         (vst1q_s8): Likewise.
2946         (vst1q_s32): Likewise.
2947         (vst1q_s16): Likewise.
2948         (vst1q_u8): Likewise.
2949         (vst1q_u32): Likewise.
2950         (vst1q_u16): Likewise.
2951         (vstrhq_f16): Likewise.
2952         (vstrhq_scatter_offset_s32): Likewise.
2953         (vstrhq_scatter_offset_s16): Likewise.
2954         (vstrhq_scatter_offset_u32): Likewise.
2955         (vstrhq_scatter_offset_u16): Likewise.
2956         (vstrhq_scatter_offset_p_s32): Likewise.
2957         (vstrhq_scatter_offset_p_s16): Likewise.
2958         (vstrhq_scatter_offset_p_u32): Likewise.
2959         (vstrhq_scatter_offset_p_u16): Likewise.
2960         (vstrhq_scatter_shifted_offset_s32): Likewise.
2961         (vstrhq_scatter_shifted_offset_s16): Likewise.
2962         (vstrhq_scatter_shifted_offset_u32): Likewise.
2963         (vstrhq_scatter_shifted_offset_u16): Likewise.
2964         (vstrhq_scatter_shifted_offset_p_s32): Likewise.
2965         (vstrhq_scatter_shifted_offset_p_s16): Likewise.
2966         (vstrhq_scatter_shifted_offset_p_u32): Likewise.
2967         (vstrhq_scatter_shifted_offset_p_u16): Likewise.
2968         (vstrhq_s32): Likewise.
2969         (vstrhq_s16): Likewise.
2970         (vstrhq_u32): Likewise.
2971         (vstrhq_u16): Likewise.
2972         (vstrhq_p_f16): Likewise.
2973         (vstrhq_p_s32): Likewise.
2974         (vstrhq_p_s16): Likewise.
2975         (vstrhq_p_u32): Likewise.
2976         (vstrhq_p_u16): Likewise.
2977         (vstrwq_f32): Likewise.
2978         (vstrwq_s32): Likewise.
2979         (vstrwq_u32): Likewise.
2980         (vstrwq_p_f32): Likewise.
2981         (vstrwq_p_s32): Likewise.
2982         (vstrwq_p_u32): Likewise.
2983         (__arm_vst1q_s8): Define intrinsic.
2984         (__arm_vst1q_s32): Likewise.
2985         (__arm_vst1q_s16): Likewise.
2986         (__arm_vst1q_u8): Likewise.
2987         (__arm_vst1q_u32): Likewise.
2988         (__arm_vst1q_u16): Likewise.
2989         (__arm_vstrhq_scatter_offset_s32): Likewise.
2990         (__arm_vstrhq_scatter_offset_s16): Likewise.
2991         (__arm_vstrhq_scatter_offset_u32): Likewise.
2992         (__arm_vstrhq_scatter_offset_u16): Likewise.
2993         (__arm_vstrhq_scatter_offset_p_s32): Likewise.
2994         (__arm_vstrhq_scatter_offset_p_s16): Likewise.
2995         (__arm_vstrhq_scatter_offset_p_u32): Likewise.
2996         (__arm_vstrhq_scatter_offset_p_u16): Likewise.
2997         (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
2998         (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
2999         (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
3000         (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
3001         (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
3002         (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
3003         (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
3004         (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
3005         (__arm_vstrhq_s32): Likewise.
3006         (__arm_vstrhq_s16): Likewise.
3007         (__arm_vstrhq_u32): Likewise.
3008         (__arm_vstrhq_u16): Likewise.
3009         (__arm_vstrhq_p_s32): Likewise.
3010         (__arm_vstrhq_p_s16): Likewise.
3011         (__arm_vstrhq_p_u32): Likewise.
3012         (__arm_vstrhq_p_u16): Likewise.
3013         (__arm_vstrwq_s32): Likewise.
3014         (__arm_vstrwq_u32): Likewise.
3015         (__arm_vstrwq_p_s32): Likewise.
3016         (__arm_vstrwq_p_u32): Likewise.
3017         (__arm_vstrwq_p_f32): Likewise.
3018         (__arm_vstrwq_f32): Likewise.
3019         (__arm_vst1q_f32): Likewise.
3020         (__arm_vst1q_f16): Likewise.
3021         (__arm_vstrhq_f16): Likewise.
3022         (__arm_vstrhq_p_f16): Likewise.
3023         (vst1q): Define polymorphic variant.
3024         (vstrhq): Likewise.
3025         (vstrhq_p): Likewise.
3026         (vstrhq_scatter_offset_p): Likewise.
3027         (vstrhq_scatter_offset): Likewise.
3028         (vstrhq_scatter_shifted_offset_p): Likewise.
3029         (vstrhq_scatter_shifted_offset): Likewise.
3030         (vstrwq_p): Likewise.
3031         (vstrwq): Likewise.
3032         * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
3033         (STRS_P): Likewise.
3034         (STRSS): Likewise.
3035         (STRSS_P): Likewise.
3036         (STRSU): Likewise.
3037         (STRSU_P): Likewise.
3038         (STRU): Likewise.
3039         (STRU_P): Likewise.
3040         * config/arm/mve.md (VST1Q): Define iterator.
3041         (VSTRHSOQ): Likewise.
3042         (VSTRHSSOQ): Likewise.
3043         (VSTRHQ): Likewise.
3044         (VSTRWQ): Likewise.
3045         (mve_vstrhq_fv8hf): Define RTL pattern.
3046         (mve_vstrhq_p_fv8hf): Likewise.
3047         (mve_vstrhq_p_<supf><mode>): Likewise.
3048         (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
3049         (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
3050         (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
3051         (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
3052         (mve_vstrhq_<supf><mode>): Likewise.
3053         (mve_vstrwq_fv4sf): Likewise.
3054         (mve_vstrwq_p_fv4sf): Likewise.
3055         (mve_vstrwq_p_<supf>v4si): Likewise.
3056         (mve_vstrwq_<supf>v4si): Likewise.
3057         (mve_vst1q_f<mode>): Define expand.
3058         (mve_vst1q_<supf><mode>): Likewise.
3059
3060 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3061             Mihail Ionescu  <mihail.ionescu@arm.com>
3062             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3063
3064         * config/arm/arm_mve.h (vld1q_s8): Define macro.
3065         (vld1q_s32): Likewise.
3066         (vld1q_s16): Likewise.
3067         (vld1q_u8): Likewise.
3068         (vld1q_u32): Likewise.
3069         (vld1q_u16): Likewise.
3070         (vldrhq_gather_offset_s32): Likewise.
3071         (vldrhq_gather_offset_s16): Likewise.
3072         (vldrhq_gather_offset_u32): Likewise.
3073         (vldrhq_gather_offset_u16): Likewise.
3074         (vldrhq_gather_offset_z_s32): Likewise.
3075         (vldrhq_gather_offset_z_s16): Likewise.
3076         (vldrhq_gather_offset_z_u32): Likewise.
3077         (vldrhq_gather_offset_z_u16): Likewise.
3078         (vldrhq_gather_shifted_offset_s32): Likewise.
3079         (vldrhq_gather_shifted_offset_s16): Likewise.
3080         (vldrhq_gather_shifted_offset_u32): Likewise.
3081         (vldrhq_gather_shifted_offset_u16): Likewise.
3082         (vldrhq_gather_shifted_offset_z_s32): Likewise.
3083         (vldrhq_gather_shifted_offset_z_s16): Likewise.
3084         (vldrhq_gather_shifted_offset_z_u32): Likewise.
3085         (vldrhq_gather_shifted_offset_z_u16): Likewise.
3086         (vldrhq_s32): Likewise.
3087         (vldrhq_s16): Likewise.
3088         (vldrhq_u32): Likewise.
3089         (vldrhq_u16): Likewise.
3090         (vldrhq_z_s32): Likewise.
3091         (vldrhq_z_s16): Likewise.
3092         (vldrhq_z_u32): Likewise.
3093         (vldrhq_z_u16): Likewise.
3094         (vldrwq_s32): Likewise.
3095         (vldrwq_u32): Likewise.
3096         (vldrwq_z_s32): Likewise.
3097         (vldrwq_z_u32): Likewise.
3098         (vld1q_f32): Likewise.
3099         (vld1q_f16): Likewise.
3100         (vldrhq_f16): Likewise.
3101         (vldrhq_z_f16): Likewise.
3102         (vldrwq_f32): Likewise.
3103         (vldrwq_z_f32): Likewise.
3104         (__arm_vld1q_s8): Define intrinsic.
3105         (__arm_vld1q_s32): Likewise.
3106         (__arm_vld1q_s16): Likewise.
3107         (__arm_vld1q_u8): Likewise.
3108         (__arm_vld1q_u32): Likewise.
3109         (__arm_vld1q_u16): Likewise.
3110         (__arm_vldrhq_gather_offset_s32): Likewise.
3111         (__arm_vldrhq_gather_offset_s16): Likewise.
3112         (__arm_vldrhq_gather_offset_u32): Likewise.
3113         (__arm_vldrhq_gather_offset_u16): Likewise.
3114         (__arm_vldrhq_gather_offset_z_s32): Likewise.
3115         (__arm_vldrhq_gather_offset_z_s16): Likewise.
3116         (__arm_vldrhq_gather_offset_z_u32): Likewise.
3117         (__arm_vldrhq_gather_offset_z_u16): Likewise.
3118         (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
3119         (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
3120         (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
3121         (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
3122         (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
3123         (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
3124         (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
3125         (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
3126         (__arm_vldrhq_s32): Likewise.
3127         (__arm_vldrhq_s16): Likewise.
3128         (__arm_vldrhq_u32): Likewise.
3129         (__arm_vldrhq_u16): Likewise.
3130         (__arm_vldrhq_z_s32): Likewise.
3131         (__arm_vldrhq_z_s16): Likewise.
3132         (__arm_vldrhq_z_u32): Likewise.
3133         (__arm_vldrhq_z_u16): Likewise.
3134         (__arm_vldrwq_s32): Likewise.
3135         (__arm_vldrwq_u32): Likewise.
3136         (__arm_vldrwq_z_s32): Likewise.
3137         (__arm_vldrwq_z_u32): Likewise.
3138         (__arm_vld1q_f32): Likewise.
3139         (__arm_vld1q_f16): Likewise.
3140         (__arm_vldrwq_f32): Likewise.
3141         (__arm_vldrwq_z_f32): Likewise.
3142         (__arm_vldrhq_z_f16): Likewise.
3143         (__arm_vldrhq_f16): Likewise.
3144         (vld1q): Define polymorphic variant.
3145         (vldrhq_gather_offset): Likewise.
3146         (vldrhq_gather_offset_z): Likewise.
3147         (vldrhq_gather_shifted_offset): Likewise.
3148         (vldrhq_gather_shifted_offset_z): Likewise.
3149         * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
3150         (LDRS): Likewise.
3151         (LDRU_Z): Likewise.
3152         (LDRS_Z): Likewise.
3153         (LDRGU_Z): Likewise.
3154         (LDRGU): Likewise.
3155         (LDRGS_Z): Likewise.
3156         (LDRGS): Likewise.
3157         * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
3158         (V_sz_elem1): Likewise.
3159         (VLD1Q): Define iterator.
3160         (VLDRHGOQ): Likewise.
3161         (VLDRHGSOQ): Likewise.
3162         (VLDRHQ): Likewise.
3163         (VLDRWQ): Likewise.
3164         (mve_vldrhq_fv8hf): Define RTL pattern.
3165         (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
3166         (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
3167         (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
3168         (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
3169         (mve_vldrhq_<supf><mode>): Likewise.
3170         (mve_vldrhq_z_fv8hf): Likewise.
3171         (mve_vldrhq_z_<supf><mode>): Likewise.
3172         (mve_vldrwq_fv4sf): Likewise.
3173         (mve_vldrwq_<supf>v4si): Likewise.
3174         (mve_vldrwq_z_fv4sf): Likewise.
3175         (mve_vldrwq_z_<supf>v4si): Likewise.
3176         (mve_vld1q_f<mode>): Define RTL expand pattern.
3177         (mve_vld1q_<supf><mode>): Likewise.
3178
3179 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3180             Mihail Ionescu  <mihail.ionescu@arm.com>
3181             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3182
3183         * config/arm/arm_mve.h (vld1q_s8): Define macro.
3184         (vld1q_s32): Likewise.
3185         (vld1q_s16): Likewise.
3186         (vld1q_u8): Likewise.
3187         (vld1q_u32): Likewise.
3188         (vld1q_u16): Likewise.
3189         (vldrhq_gather_offset_s32): Likewise.
3190         (vldrhq_gather_offset_s16): Likewise.
3191         (vldrhq_gather_offset_u32): Likewise.
3192         (vldrhq_gather_offset_u16): Likewise.
3193         (vldrhq_gather_offset_z_s32): Likewise.
3194         (vldrhq_gather_offset_z_s16): Likewise.
3195         (vldrhq_gather_offset_z_u32): Likewise.
3196         (vldrhq_gather_offset_z_u16): Likewise.
3197         (vldrhq_gather_shifted_offset_s32): Likewise.
3198         (vldrhq_gather_shifted_offset_s16): Likewise.
3199         (vldrhq_gather_shifted_offset_u32): Likewise.
3200         (vldrhq_gather_shifted_offset_u16): Likewise.
3201         (vldrhq_gather_shifted_offset_z_s32): Likewise.
3202         (vldrhq_gather_shifted_offset_z_s16): Likewise.
3203         (vldrhq_gather_shifted_offset_z_u32): Likewise.
3204         (vldrhq_gather_shifted_offset_z_u16): Likewise.
3205         (vldrhq_s32): Likewise.
3206         (vldrhq_s16): Likewise.
3207         (vldrhq_u32): Likewise.
3208         (vldrhq_u16): Likewise.
3209         (vldrhq_z_s32): Likewise.
3210         (vldrhq_z_s16): Likewise.
3211         (vldrhq_z_u32): Likewise.
3212         (vldrhq_z_u16): Likewise.
3213         (vldrwq_s32): Likewise.
3214         (vldrwq_u32): Likewise.
3215         (vldrwq_z_s32): Likewise.
3216         (vldrwq_z_u32): Likewise.
3217         (vld1q_f32): Likewise.
3218         (vld1q_f16): Likewise.
3219         (vldrhq_f16): Likewise.
3220         (vldrhq_z_f16): Likewise.
3221         (vldrwq_f32): Likewise.
3222         (vldrwq_z_f32): Likewise.
3223         (__arm_vld1q_s8): Define intrinsic.
3224         (__arm_vld1q_s32): Likewise.
3225         (__arm_vld1q_s16): Likewise.
3226         (__arm_vld1q_u8): Likewise.
3227         (__arm_vld1q_u32): Likewise.
3228         (__arm_vld1q_u16): Likewise.
3229         (__arm_vldrhq_gather_offset_s32): Likewise.
3230         (__arm_vldrhq_gather_offset_s16): Likewise.
3231         (__arm_vldrhq_gather_offset_u32): Likewise.
3232         (__arm_vldrhq_gather_offset_u16): Likewise.
3233         (__arm_vldrhq_gather_offset_z_s32): Likewise.
3234         (__arm_vldrhq_gather_offset_z_s16): Likewise.
3235         (__arm_vldrhq_gather_offset_z_u32): Likewise.
3236         (__arm_vldrhq_gather_offset_z_u16): Likewise.
3237         (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
3238         (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
3239         (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
3240         (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
3241         (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
3242         (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
3243         (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
3244         (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
3245         (__arm_vldrhq_s32): Likewise.
3246         (__arm_vldrhq_s16): Likewise.
3247         (__arm_vldrhq_u32): Likewise.
3248         (__arm_vldrhq_u16): Likewise.
3249         (__arm_vldrhq_z_s32): Likewise.
3250         (__arm_vldrhq_z_s16): Likewise.
3251         (__arm_vldrhq_z_u32): Likewise.
3252         (__arm_vldrhq_z_u16): Likewise.
3253         (__arm_vldrwq_s32): Likewise.
3254         (__arm_vldrwq_u32): Likewise.
3255         (__arm_vldrwq_z_s32): Likewise.
3256         (__arm_vldrwq_z_u32): Likewise.
3257         (__arm_vld1q_f32): Likewise.
3258         (__arm_vld1q_f16): Likewise.
3259         (__arm_vldrwq_f32): Likewise.
3260         (__arm_vldrwq_z_f32): Likewise.
3261         (__arm_vldrhq_z_f16): Likewise.
3262         (__arm_vldrhq_f16): Likewise.
3263         (vld1q): Define polymorphic variant.
3264         (vldrhq_gather_offset): Likewise.
3265         (vldrhq_gather_offset_z): Likewise.
3266         (vldrhq_gather_shifted_offset): Likewise.
3267         (vldrhq_gather_shifted_offset_z): Likewise.
3268         * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
3269         (LDRS): Likewise.
3270         (LDRU_Z): Likewise.
3271         (LDRS_Z): Likewise.
3272         (LDRGU_Z): Likewise.
3273         (LDRGU): Likewise.
3274         (LDRGS_Z): Likewise.
3275         (LDRGS): Likewise.
3276         * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
3277         (V_sz_elem1): Likewise.
3278         (VLD1Q): Define iterator.
3279         (VLDRHGOQ): Likewise.
3280         (VLDRHGSOQ): Likewise.
3281         (VLDRHQ): Likewise.
3282         (VLDRWQ): Likewise.
3283         (mve_vldrhq_fv8hf): Define RTL pattern.
3284         (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
3285         (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
3286         (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
3287         (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
3288         (mve_vldrhq_<supf><mode>): Likewise.
3289         (mve_vldrhq_z_fv8hf): Likewise.
3290         (mve_vldrhq_z_<supf><mode>): Likewise.
3291         (mve_vldrwq_fv4sf): Likewise.
3292         (mve_vldrwq_<supf>v4si): Likewise.
3293         (mve_vldrwq_z_fv4sf): Likewise.
3294         (mve_vldrwq_z_<supf>v4si): Likewise.
3295         (mve_vld1q_f<mode>): Define RTL expand pattern.
3296         (mve_vld1q_<supf><mode>): Likewise.
3297
3298 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3299             Mihail Ionescu  <mihail.ionescu@arm.com>
3300             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3301
3302         * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
3303         qualifier.
3304         (LDRGBU_Z_QUALIFIERS): Likewise.
3305         (LDRGS_Z_QUALIFIERS): Likewise.
3306         (LDRGU_Z_QUALIFIERS): Likewise.
3307         (LDRS_Z_QUALIFIERS): Likewise.
3308         (LDRU_Z_QUALIFIERS): Likewise.
3309         * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
3310         (vldrbq_gather_offset_z_u8): Likewise.
3311         (vldrbq_gather_offset_z_s32): Likewise.
3312         (vldrbq_gather_offset_z_u16): Likewise.
3313         (vldrbq_gather_offset_z_u32): Likewise.
3314         (vldrbq_gather_offset_z_s8): Likewise.
3315         (vldrbq_z_s16): Likewise.
3316         (vldrbq_z_u8): Likewise.
3317         (vldrbq_z_s8): Likewise.
3318         (vldrbq_z_s32): Likewise.
3319         (vldrbq_z_u16): Likewise.
3320         (vldrbq_z_u32): Likewise.
3321         (vldrwq_gather_base_z_u32): Likewise.
3322         (vldrwq_gather_base_z_s32): Likewise.
3323         (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
3324         (__arm_vldrbq_gather_offset_z_s32): Likewise.
3325         (__arm_vldrbq_gather_offset_z_s16): Likewise.
3326         (__arm_vldrbq_gather_offset_z_u8): Likewise.
3327         (__arm_vldrbq_gather_offset_z_u32): Likewise.
3328         (__arm_vldrbq_gather_offset_z_u16): Likewise.
3329         (__arm_vldrbq_z_s8): Likewise.
3330         (__arm_vldrbq_z_s32): Likewise.
3331         (__arm_vldrbq_z_s16): Likewise.
3332         (__arm_vldrbq_z_u8): Likewise.
3333         (__arm_vldrbq_z_u32): Likewise.
3334         (__arm_vldrbq_z_u16): Likewise.
3335         (__arm_vldrwq_gather_base_z_s32): Likewise.
3336         (__arm_vldrwq_gather_base_z_u32): Likewise.
3337         (vldrbq_gather_offset_z): Define polymorphic variant.
3338         * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
3339         qualifier.
3340         (LDRGBU_Z_QUALIFIERS): Likewise.
3341         (LDRGS_Z_QUALIFIERS): Likewise.
3342         (LDRGU_Z_QUALIFIERS): Likewise.
3343         (LDRS_Z_QUALIFIERS): Likewise.
3344         (LDRU_Z_QUALIFIERS): Likewise.
3345         * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
3346         RTL pattern.
3347         (mve_vldrbq_z_<supf><mode>): Likewise.
3348         (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
3349
3350 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3351             Mihail Ionescu  <mihail.ionescu@arm.com>
3352             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3353
3354         * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
3355         qualifier.
3356         (STRU_P_QUALIFIERS): Likewise.
3357         (STRSU_P_QUALIFIERS): Likewise.
3358         (STRSS_P_QUALIFIERS): Likewise.
3359         (STRSBS_P_QUALIFIERS): Likewise.
3360         (STRSBU_P_QUALIFIERS): Likewise.
3361         * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
3362         (vstrbq_p_s32): Likewise.
3363         (vstrbq_p_s16): Likewise.
3364         (vstrbq_p_u8): Likewise.
3365         (vstrbq_p_u32): Likewise.
3366         (vstrbq_p_u16): Likewise.
3367         (vstrbq_scatter_offset_p_s8): Likewise.
3368         (vstrbq_scatter_offset_p_s32): Likewise.
3369         (vstrbq_scatter_offset_p_s16): Likewise.
3370         (vstrbq_scatter_offset_p_u8): Likewise.
3371         (vstrbq_scatter_offset_p_u32): Likewise.
3372         (vstrbq_scatter_offset_p_u16): Likewise.
3373         (vstrwq_scatter_base_p_s32): Likewise.
3374         (vstrwq_scatter_base_p_u32): Likewise.
3375         (__arm_vstrbq_p_s8): Define intrinsic.
3376         (__arm_vstrbq_p_s32): Likewise.
3377         (__arm_vstrbq_p_s16): Likewise.
3378         (__arm_vstrbq_p_u8): Likewise.
3379         (__arm_vstrbq_p_u32): Likewise.
3380         (__arm_vstrbq_p_u16): Likewise.
3381         (__arm_vstrbq_scatter_offset_p_s8): Likewise.
3382         (__arm_vstrbq_scatter_offset_p_s32): Likewise.
3383         (__arm_vstrbq_scatter_offset_p_s16): Likewise.
3384         (__arm_vstrbq_scatter_offset_p_u8): Likewise.
3385         (__arm_vstrbq_scatter_offset_p_u32): Likewise.
3386         (__arm_vstrbq_scatter_offset_p_u16): Likewise.
3387         (__arm_vstrwq_scatter_base_p_s32): Likewise.
3388         (__arm_vstrwq_scatter_base_p_u32): Likewise.
3389         (vstrbq_p): Define polymorphic variant.
3390         (vstrbq_scatter_offset_p): Likewise.
3391         (vstrwq_scatter_base_p): Likewise.
3392         * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
3393         qualifier.
3394         (STRU_P_QUALIFIERS): Likewise.
3395         (STRSU_P_QUALIFIERS): Likewise.
3396         (STRSS_P_QUALIFIERS): Likewise.
3397         (STRSBS_P_QUALIFIERS): Likewise.
3398         (STRSBU_P_QUALIFIERS): Likewise.
3399         * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
3400         RTL pattern.
3401         (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
3402         (mve_vstrbq_p_<supf><mode>): Likewise.
3403
3404 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3405             Mihail Ionescu  <mihail.ionescu@arm.com>
3406             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3407
3408         * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
3409         qualifier.
3410         (LDRGS_QUALIFIERS): Likewise.
3411         (LDRS_QUALIFIERS): Likewise.
3412         (LDRU_QUALIFIERS): Likewise.
3413         (LDRGBS_QUALIFIERS): Likewise.
3414         (LDRGBU_QUALIFIERS): Likewise.
3415         * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
3416         (vldrbq_gather_offset_s8): Likewise.
3417         (vldrbq_s8): Likewise.
3418         (vldrbq_u8): Likewise.
3419         (vldrbq_gather_offset_u16): Likewise.
3420         (vldrbq_gather_offset_s16): Likewise.
3421         (vldrbq_s16): Likewise.
3422         (vldrbq_u16): Likewise.
3423         (vldrbq_gather_offset_u32): Likewise.
3424         (vldrbq_gather_offset_s32): Likewise.
3425         (vldrbq_s32): Likewise.
3426         (vldrbq_u32): Likewise.
3427         (vldrwq_gather_base_s32): Likewise.
3428         (vldrwq_gather_base_u32): Likewise.
3429         (__arm_vldrbq_gather_offset_u8): Define intrinsic.
3430         (__arm_vldrbq_gather_offset_s8): Likewise.
3431         (__arm_vldrbq_s8): Likewise.
3432         (__arm_vldrbq_u8): Likewise.
3433         (__arm_vldrbq_gather_offset_u16): Likewise.
3434         (__arm_vldrbq_gather_offset_s16): Likewise.
3435         (__arm_vldrbq_s16): Likewise.
3436         (__arm_vldrbq_u16): Likewise.
3437         (__arm_vldrbq_gather_offset_u32): Likewise.
3438         (__arm_vldrbq_gather_offset_s32): Likewise.
3439         (__arm_vldrbq_s32): Likewise.
3440         (__arm_vldrbq_u32): Likewise.
3441         (__arm_vldrwq_gather_base_s32): Likewise.
3442         (__arm_vldrwq_gather_base_u32): Likewise.
3443         (vldrbq_gather_offset): Define polymorphic variant.
3444         * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
3445         qualifier.
3446         (LDRGS_QUALIFIERS): Likewise.
3447         (LDRS_QUALIFIERS): Likewise.
3448         (LDRU_QUALIFIERS): Likewise.
3449         (LDRGBS_QUALIFIERS): Likewise.
3450         (LDRGBU_QUALIFIERS): Likewise.
3451         * config/arm/mve.md (VLDRBGOQ): Define iterator.
3452         (VLDRBQ): Likewise.
3453         (VLDRWGBQ): Likewise.
3454         (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
3455         (mve_vldrbq_<supf><mode>): Likewise.
3456         (mve_vldrwq_gather_base_<supf>v4si): Likewise.
3457
3458 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3459             Mihail Ionescu  <mihail.ionescu@arm.com>
3460             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3461
3462         * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
3463         (STRU_QUALIFIERS): Likewise.
3464         (STRSS_QUALIFIERS): Likewise.
3465         (STRSU_QUALIFIERS): Likewise.
3466         (STRSBS_QUALIFIERS): Likewise.
3467         (STRSBU_QUALIFIERS): Likewise.
3468         * config/arm/arm_mve.h (vstrbq_s8): Define macro.
3469         (vstrbq_u8): Likewise.
3470         (vstrbq_u16): Likewise.
3471         (vstrbq_scatter_offset_s8): Likewise.
3472         (vstrbq_scatter_offset_u8): Likewise.
3473         (vstrbq_scatter_offset_u16): Likewise.
3474         (vstrbq_s16): Likewise.
3475         (vstrbq_u32): Likewise.
3476         (vstrbq_scatter_offset_s16): Likewise.
3477         (vstrbq_scatter_offset_u32): Likewise.
3478         (vstrbq_s32): Likewise.
3479         (vstrbq_scatter_offset_s32): Likewise.
3480         (vstrwq_scatter_base_s32): Likewise.
3481         (vstrwq_scatter_base_u32): Likewise.
3482         (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
3483         (__arm_vstrbq_scatter_offset_s32): Likewise.
3484         (__arm_vstrbq_scatter_offset_s16): Likewise.
3485         (__arm_vstrbq_scatter_offset_u8): Likewise.
3486         (__arm_vstrbq_scatter_offset_u32): Likewise.
3487         (__arm_vstrbq_scatter_offset_u16): Likewise.
3488         (__arm_vstrbq_s8): Likewise.
3489         (__arm_vstrbq_s32): Likewise.
3490         (__arm_vstrbq_s16): Likewise.
3491         (__arm_vstrbq_u8): Likewise.
3492         (__arm_vstrbq_u32): Likewise.
3493         (__arm_vstrbq_u16): Likewise.
3494         (__arm_vstrwq_scatter_base_s32): Likewise.
3495         (__arm_vstrwq_scatter_base_u32): Likewise.
3496         (vstrbq): Define polymorphic variant.
3497         (vstrbq_scatter_offset): Likewise.
3498         (vstrwq_scatter_base): Likewise.
3499         * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
3500         qualifier.
3501         (STRU_QUALIFIERS): Likewise.
3502         (STRSS_QUALIFIERS): Likewise.
3503         (STRSU_QUALIFIERS): Likewise.
3504         (STRSBS_QUALIFIERS): Likewise.
3505         (STRSBU_QUALIFIERS): Likewise.
3506         * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
3507         (VSTRWSBQ): Define iterators.
3508         (VSTRBSOQ): Likewise.
3509         (VSTRBQ): Likewise.
3510         (mve_vstrbq_<supf><mode>): Define RTL pattern.
3511         (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
3512         (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
3513
3514 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3515             Mihail Ionescu  <mihail.ionescu@arm.com>
3516             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3517
3518         * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
3519         (vabdq_m_f16): Likewise.
3520         (vaddq_m_f32): Likewise.
3521         (vaddq_m_f16): Likewise.
3522         (vaddq_m_n_f32): Likewise.
3523         (vaddq_m_n_f16): Likewise.
3524         (vandq_m_f32): Likewise.
3525         (vandq_m_f16): Likewise.
3526         (vbicq_m_f32): Likewise.
3527         (vbicq_m_f16): Likewise.
3528         (vbrsrq_m_n_f32): Likewise.
3529         (vbrsrq_m_n_f16): Likewise.
3530         (vcaddq_rot270_m_f32): Likewise.
3531         (vcaddq_rot270_m_f16): Likewise.
3532         (vcaddq_rot90_m_f32): Likewise.
3533         (vcaddq_rot90_m_f16): Likewise.
3534         (vcmlaq_m_f32): Likewise.
3535         (vcmlaq_m_f16): Likewise.
3536         (vcmlaq_rot180_m_f32): Likewise.
3537         (vcmlaq_rot180_m_f16): Likewise.
3538         (vcmlaq_rot270_m_f32): Likewise.
3539         (vcmlaq_rot270_m_f16): Likewise.
3540         (vcmlaq_rot90_m_f32): Likewise.
3541         (vcmlaq_rot90_m_f16): Likewise.
3542         (vcmulq_m_f32): Likewise.
3543         (vcmulq_m_f16): Likewise.
3544         (vcmulq_rot180_m_f32): Likewise.
3545         (vcmulq_rot180_m_f16): Likewise.
3546         (vcmulq_rot270_m_f32): Likewise.
3547         (vcmulq_rot270_m_f16): Likewise.
3548         (vcmulq_rot90_m_f32): Likewise.
3549         (vcmulq_rot90_m_f16): Likewise.
3550         (vcvtq_m_n_s32_f32): Likewise.
3551         (vcvtq_m_n_s16_f16): Likewise.
3552         (vcvtq_m_n_u32_f32): Likewise.
3553         (vcvtq_m_n_u16_f16): Likewise.
3554         (veorq_m_f32): Likewise.
3555         (veorq_m_f16): Likewise.
3556         (vfmaq_m_f32): Likewise.
3557         (vfmaq_m_f16): Likewise.
3558         (vfmaq_m_n_f32): Likewise.
3559         (vfmaq_m_n_f16): Likewise.
3560         (vfmasq_m_n_f32): Likewise.
3561         (vfmasq_m_n_f16): Likewise.
3562         (vfmsq_m_f32): Likewise.
3563         (vfmsq_m_f16): Likewise.
3564         (vmaxnmq_m_f32): Likewise.
3565         (vmaxnmq_m_f16): Likewise.
3566         (vminnmq_m_f32): Likewise.
3567         (vminnmq_m_f16): Likewise.
3568         (vmulq_m_f32): Likewise.
3569         (vmulq_m_f16): Likewise.
3570         (vmulq_m_n_f32): Likewise.
3571         (vmulq_m_n_f16): Likewise.
3572         (vornq_m_f32): Likewise.
3573         (vornq_m_f16): Likewise.
3574         (vorrq_m_f32): Likewise.
3575         (vorrq_m_f16): Likewise.
3576         (vsubq_m_f32): Likewise.
3577         (vsubq_m_f16): Likewise.
3578         (vsubq_m_n_f32): Likewise.
3579         (vsubq_m_n_f16): Likewise.
3580         (__attribute__): Likewise.
3581         (__arm_vabdq_m_f32): Likewise.
3582         (__arm_vabdq_m_f16): Likewise.
3583         (__arm_vaddq_m_f32): Likewise.
3584         (__arm_vaddq_m_f16): Likewise.
3585         (__arm_vaddq_m_n_f32): Likewise.
3586         (__arm_vaddq_m_n_f16): Likewise.
3587         (__arm_vandq_m_f32): Likewise.
3588         (__arm_vandq_m_f16): Likewise.
3589         (__arm_vbicq_m_f32): Likewise.
3590         (__arm_vbicq_m_f16): Likewise.
3591         (__arm_vbrsrq_m_n_f32): Likewise.
3592         (__arm_vbrsrq_m_n_f16): Likewise.
3593         (__arm_vcaddq_rot270_m_f32): Likewise.
3594         (__arm_vcaddq_rot270_m_f16): Likewise.
3595         (__arm_vcaddq_rot90_m_f32): Likewise.
3596         (__arm_vcaddq_rot90_m_f16): Likewise.
3597         (__arm_vcmlaq_m_f32): Likewise.
3598         (__arm_vcmlaq_m_f16): Likewise.
3599         (__arm_vcmlaq_rot180_m_f32): Likewise.
3600         (__arm_vcmlaq_rot180_m_f16): Likewise.
3601         (__arm_vcmlaq_rot270_m_f32): Likewise.
3602         (__arm_vcmlaq_rot270_m_f16): Likewise.
3603         (__arm_vcmlaq_rot90_m_f32): Likewise.
3604         (__arm_vcmlaq_rot90_m_f16): Likewise.
3605         (__arm_vcmulq_m_f32): Likewise.
3606         (__arm_vcmulq_m_f16): Likewise.
3607         (__arm_vcmulq_rot180_m_f32): Define intrinsic.
3608         (__arm_vcmulq_rot180_m_f16): Likewise.
3609         (__arm_vcmulq_rot270_m_f32): Likewise.
3610         (__arm_vcmulq_rot270_m_f16): Likewise.
3611         (__arm_vcmulq_rot90_m_f32): Likewise.
3612         (__arm_vcmulq_rot90_m_f16): Likewise.
3613         (__arm_vcvtq_m_n_s32_f32): Likewise.
3614         (__arm_vcvtq_m_n_s16_f16): Likewise.
3615         (__arm_vcvtq_m_n_u32_f32): Likewise.
3616         (__arm_vcvtq_m_n_u16_f16): Likewise.
3617         (__arm_veorq_m_f32): Likewise.
3618         (__arm_veorq_m_f16): Likewise.
3619         (__arm_vfmaq_m_f32): Likewise.
3620         (__arm_vfmaq_m_f16): Likewise.
3621         (__arm_vfmaq_m_n_f32): Likewise.
3622         (__arm_vfmaq_m_n_f16): Likewise.
3623         (__arm_vfmasq_m_n_f32): Likewise.
3624         (__arm_vfmasq_m_n_f16): Likewise.
3625         (__arm_vfmsq_m_f32): Likewise.
3626         (__arm_vfmsq_m_f16): Likewise.
3627         (__arm_vmaxnmq_m_f32): Likewise.
3628         (__arm_vmaxnmq_m_f16): Likewise.
3629         (__arm_vminnmq_m_f32): Likewise.
3630         (__arm_vminnmq_m_f16): Likewise.
3631         (__arm_vmulq_m_f32): Likewise.
3632         (__arm_vmulq_m_f16): Likewise.
3633         (__arm_vmulq_m_n_f32): Likewise.
3634         (__arm_vmulq_m_n_f16): Likewise.
3635         (__arm_vornq_m_f32): Likewise.
3636         (__arm_vornq_m_f16): Likewise.
3637         (__arm_vorrq_m_f32): Likewise.
3638         (__arm_vorrq_m_f16): Likewise.
3639         (__arm_vsubq_m_f32): Likewise.
3640         (__arm_vsubq_m_f16): Likewise.
3641         (__arm_vsubq_m_n_f32): Likewise.
3642         (__arm_vsubq_m_n_f16): Likewise.
3643         (vabdq_m): Define polymorphic variant.
3644         (vaddq_m): Likewise.
3645         (vaddq_m_n): Likewise.
3646         (vandq_m): Likewise.
3647         (vbicq_m): Likewise.
3648         (vbrsrq_m_n): Likewise.
3649         (vcaddq_rot270_m): Likewise.
3650         (vcaddq_rot90_m): Likewise.
3651         (vcmlaq_m): Likewise.
3652         (vcmlaq_rot180_m): Likewise.
3653         (vcmlaq_rot270_m): Likewise.
3654         (vcmlaq_rot90_m): Likewise.
3655         (vcmulq_m): Likewise.
3656         (vcmulq_rot180_m): Likewise.
3657         (vcmulq_rot270_m): Likewise.
3658         (vcmulq_rot90_m): Likewise.
3659         (veorq_m): Likewise.
3660         (vfmaq_m): Likewise.
3661         (vfmaq_m_n): Likewise.
3662         (vfmasq_m_n): Likewise.
3663         (vfmsq_m): Likewise.
3664         (vmaxnmq_m): Likewise.
3665         (vminnmq_m): Likewise.
3666         (vmulq_m): Likewise.
3667         (vmulq_m_n): Likewise.
3668         (vornq_m): Likewise.
3669         (vsubq_m): Likewise.
3670         (vsubq_m_n): Likewise.
3671         (vorrq_m): Likewise.
3672         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
3673         builtin qualifier.
3674         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
3675         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
3676         * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
3677         (mve_vaddq_m_f<mode>): Likewise.
3678         (mve_vaddq_m_n_f<mode>): Likewise.
3679         (mve_vandq_m_f<mode>): Likewise.
3680         (mve_vbicq_m_f<mode>): Likewise.
3681         (mve_vbrsrq_m_n_f<mode>): Likewise.
3682         (mve_vcaddq_rot270_m_f<mode>): Likewise.
3683         (mve_vcaddq_rot90_m_f<mode>): Likewise.
3684         (mve_vcmlaq_m_f<mode>): Likewise.
3685         (mve_vcmlaq_rot180_m_f<mode>): Likewise.
3686         (mve_vcmlaq_rot270_m_f<mode>): Likewise.
3687         (mve_vcmlaq_rot90_m_f<mode>): Likewise.
3688         (mve_vcmulq_m_f<mode>): Likewise.
3689         (mve_vcmulq_rot180_m_f<mode>): Likewise.
3690         (mve_vcmulq_rot270_m_f<mode>): Likewise.
3691         (mve_vcmulq_rot90_m_f<mode>): Likewise.
3692         (mve_veorq_m_f<mode>): Likewise.
3693         (mve_vfmaq_m_f<mode>): Likewise.
3694         (mve_vfmaq_m_n_f<mode>): Likewise.
3695         (mve_vfmasq_m_n_f<mode>): Likewise.
3696         (mve_vfmsq_m_f<mode>): Likewise.
3697         (mve_vmaxnmq_m_f<mode>): Likewise.
3698         (mve_vminnmq_m_f<mode>): Likewise.
3699         (mve_vmulq_m_f<mode>): Likewise.
3700         (mve_vmulq_m_n_f<mode>): Likewise.
3701         (mve_vornq_m_f<mode>): Likewise.
3702         (mve_vorrq_m_f<mode>): Likewise.
3703         (mve_vsubq_m_f<mode>): Likewise.
3704         (mve_vsubq_m_n_f<mode>): Likewise.
3705
3706 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3707             Mihail Ionescu  <mihail.ionescu@arm.com>
3708             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3709
3710         * config/arm/arm-protos.h (arm_mve_immediate_check):
3711         * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
3712         mode and interger value.
3713         * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
3714         (vmlaldavaq_p_s16): Likewise.
3715         (vmlaldavaq_p_u32): Likewise.
3716         (vmlaldavaq_p_u16): Likewise.
3717         (vmlaldavaxq_p_s32): Likewise.
3718         (vmlaldavaxq_p_s16): Likewise.
3719         (vmlaldavaxq_p_u32): Likewise.
3720         (vmlaldavaxq_p_u16): Likewise.
3721         (vmlsldavaq_p_s32): Likewise.
3722         (vmlsldavaq_p_s16): Likewise.
3723         (vmlsldavaxq_p_s32): Likewise.
3724         (vmlsldavaxq_p_s16): Likewise.
3725         (vmullbq_poly_m_p8): Likewise.
3726         (vmullbq_poly_m_p16): Likewise.
3727         (vmulltq_poly_m_p8): Likewise.
3728         (vmulltq_poly_m_p16): Likewise.
3729         (vqdmullbq_m_n_s32): Likewise.
3730         (vqdmullbq_m_n_s16): Likewise.
3731         (vqdmullbq_m_s32): Likewise.
3732         (vqdmullbq_m_s16): Likewise.
3733         (vqdmulltq_m_n_s32): Likewise.
3734         (vqdmulltq_m_n_s16): Likewise.
3735         (vqdmulltq_m_s32): Likewise.
3736         (vqdmulltq_m_s16): Likewise.
3737         (vqrshrnbq_m_n_s32): Likewise.
3738         (vqrshrnbq_m_n_s16): Likewise.
3739         (vqrshrnbq_m_n_u32): Likewise.
3740         (vqrshrnbq_m_n_u16): Likewise.
3741         (vqrshrntq_m_n_s32): Likewise.
3742         (vqrshrntq_m_n_s16): Likewise.
3743         (vqrshrntq_m_n_u32): Likewise.
3744         (vqrshrntq_m_n_u16): Likewise.
3745         (vqrshrunbq_m_n_s32): Likewise.
3746         (vqrshrunbq_m_n_s16): Likewise.
3747         (vqrshruntq_m_n_s32): Likewise.
3748         (vqrshruntq_m_n_s16): Likewise.
3749         (vqshrnbq_m_n_s32): Likewise.
3750         (vqshrnbq_m_n_s16): Likewise.
3751         (vqshrnbq_m_n_u32): Likewise.
3752         (vqshrnbq_m_n_u16): Likewise.
3753         (vqshrntq_m_n_s32): Likewise.
3754         (vqshrntq_m_n_s16): Likewise.
3755         (vqshrntq_m_n_u32): Likewise.
3756         (vqshrntq_m_n_u16): Likewise.
3757         (vqshrunbq_m_n_s32): Likewise.
3758         (vqshrunbq_m_n_s16): Likewise.
3759         (vqshruntq_m_n_s32): Likewise.
3760         (vqshruntq_m_n_s16): Likewise.
3761         (vrmlaldavhaq_p_s32): Likewise.
3762         (vrmlaldavhaq_p_u32): Likewise.
3763         (vrmlaldavhaxq_p_s32): Likewise.
3764         (vrmlsldavhaq_p_s32): Likewise.
3765         (vrmlsldavhaxq_p_s32): Likewise.
3766         (vrshrnbq_m_n_s32): Likewise.
3767         (vrshrnbq_m_n_s16): Likewise.
3768         (vrshrnbq_m_n_u32): Likewise.
3769         (vrshrnbq_m_n_u16): Likewise.
3770         (vrshrntq_m_n_s32): Likewise.
3771         (vrshrntq_m_n_s16): Likewise.
3772         (vrshrntq_m_n_u32): Likewise.
3773         (vrshrntq_m_n_u16): Likewise.
3774         (vshllbq_m_n_s8): Likewise.
3775         (vshllbq_m_n_s16): Likewise.
3776         (vshllbq_m_n_u8): Likewise.
3777         (vshllbq_m_n_u16): Likewise.
3778         (vshlltq_m_n_s8): Likewise.
3779         (vshlltq_m_n_s16): Likewise.
3780         (vshlltq_m_n_u8): Likewise.
3781         (vshlltq_m_n_u16): Likewise.
3782         (vshrnbq_m_n_s32): Likewise.
3783         (vshrnbq_m_n_s16): Likewise.
3784         (vshrnbq_m_n_u32): Likewise.
3785         (vshrnbq_m_n_u16): Likewise.
3786         (vshrntq_m_n_s32): Likewise.
3787         (vshrntq_m_n_s16): Likewise.
3788         (vshrntq_m_n_u32): Likewise.
3789         (vshrntq_m_n_u16): Likewise.
3790         (__arm_vmlaldavaq_p_s32): Define intrinsic.
3791         (__arm_vmlaldavaq_p_s16): Likewise.
3792         (__arm_vmlaldavaq_p_u32): Likewise.
3793         (__arm_vmlaldavaq_p_u16): Likewise.
3794         (__arm_vmlaldavaxq_p_s32): Likewise.
3795         (__arm_vmlaldavaxq_p_s16): Likewise.
3796         (__arm_vmlaldavaxq_p_u32): Likewise.
3797         (__arm_vmlaldavaxq_p_u16): Likewise.
3798         (__arm_vmlsldavaq_p_s32): Likewise.
3799         (__arm_vmlsldavaq_p_s16): Likewise.
3800         (__arm_vmlsldavaxq_p_s32): Likewise.
3801         (__arm_vmlsldavaxq_p_s16): Likewise.
3802         (__arm_vmullbq_poly_m_p8): Likewise.
3803         (__arm_vmullbq_poly_m_p16): Likewise.
3804         (__arm_vmulltq_poly_m_p8): Likewise.
3805         (__arm_vmulltq_poly_m_p16): Likewise.
3806         (__arm_vqdmullbq_m_n_s32): Likewise.
3807         (__arm_vqdmullbq_m_n_s16): Likewise.
3808         (__arm_vqdmullbq_m_s32): Likewise.
3809         (__arm_vqdmullbq_m_s16): Likewise.
3810         (__arm_vqdmulltq_m_n_s32): Likewise.
3811         (__arm_vqdmulltq_m_n_s16): Likewise.
3812         (__arm_vqdmulltq_m_s32): Likewise.
3813         (__arm_vqdmulltq_m_s16): Likewise.
3814         (__arm_vqrshrnbq_m_n_s32): Likewise.
3815         (__arm_vqrshrnbq_m_n_s16): Likewise.
3816         (__arm_vqrshrnbq_m_n_u32): Likewise.
3817         (__arm_vqrshrnbq_m_n_u16): Likewise.
3818         (__arm_vqrshrntq_m_n_s32): Likewise.
3819         (__arm_vqrshrntq_m_n_s16): Likewise.
3820         (__arm_vqrshrntq_m_n_u32): Likewise.
3821         (__arm_vqrshrntq_m_n_u16): Likewise.
3822         (__arm_vqrshrunbq_m_n_s32): Likewise.
3823         (__arm_vqrshrunbq_m_n_s16): Likewise.
3824         (__arm_vqrshruntq_m_n_s32): Likewise.
3825         (__arm_vqrshruntq_m_n_s16): Likewise.
3826         (__arm_vqshrnbq_m_n_s32): Likewise.
3827         (__arm_vqshrnbq_m_n_s16): Likewise.
3828         (__arm_vqshrnbq_m_n_u32): Likewise.
3829         (__arm_vqshrnbq_m_n_u16): Likewise.
3830         (__arm_vqshrntq_m_n_s32): Likewise.
3831         (__arm_vqshrntq_m_n_s16): Likewise.
3832         (__arm_vqshrntq_m_n_u32): Likewise.
3833         (__arm_vqshrntq_m_n_u16): Likewise.
3834         (__arm_vqshrunbq_m_n_s32): Likewise.
3835         (__arm_vqshrunbq_m_n_s16): Likewise.
3836         (__arm_vqshruntq_m_n_s32): Likewise.
3837         (__arm_vqshruntq_m_n_s16): Likewise.
3838         (__arm_vrmlaldavhaq_p_s32): Likewise.
3839         (__arm_vrmlaldavhaq_p_u32): Likewise.
3840         (__arm_vrmlaldavhaxq_p_s32): Likewise.
3841         (__arm_vrmlsldavhaq_p_s32): Likewise.
3842         (__arm_vrmlsldavhaxq_p_s32): Likewise.
3843         (__arm_vrshrnbq_m_n_s32): Likewise.
3844         (__arm_vrshrnbq_m_n_s16): Likewise.
3845         (__arm_vrshrnbq_m_n_u32): Likewise.
3846         (__arm_vrshrnbq_m_n_u16): Likewise.
3847         (__arm_vrshrntq_m_n_s32): Likewise.
3848         (__arm_vrshrntq_m_n_s16): Likewise.
3849         (__arm_vrshrntq_m_n_u32): Likewise.
3850         (__arm_vrshrntq_m_n_u16): Likewise.
3851         (__arm_vshllbq_m_n_s8): Likewise.
3852         (__arm_vshllbq_m_n_s16): Likewise.
3853         (__arm_vshllbq_m_n_u8): Likewise.
3854         (__arm_vshllbq_m_n_u16): Likewise.
3855         (__arm_vshlltq_m_n_s8): Likewise.
3856         (__arm_vshlltq_m_n_s16): Likewise.
3857         (__arm_vshlltq_m_n_u8): Likewise.
3858         (__arm_vshlltq_m_n_u16): Likewise.
3859         (__arm_vshrnbq_m_n_s32): Likewise.
3860         (__arm_vshrnbq_m_n_s16): Likewise.
3861         (__arm_vshrnbq_m_n_u32): Likewise.
3862         (__arm_vshrnbq_m_n_u16): Likewise.
3863         (__arm_vshrntq_m_n_s32): Likewise.
3864         (__arm_vshrntq_m_n_s16): Likewise.
3865         (__arm_vshrntq_m_n_u32): Likewise.
3866         (__arm_vshrntq_m_n_u16): Likewise.
3867         (vmullbq_poly_m): Define polymorphic variant.
3868         (vmulltq_poly_m): Likewise.
3869         (vshllbq_m): Likewise.
3870         (vshrntq_m_n): Likewise.
3871         (vshrnbq_m_n): Likewise.
3872         (vshlltq_m_n): Likewise.
3873         (vshllbq_m_n): Likewise.
3874         (vrshrntq_m_n): Likewise.
3875         (vrshrnbq_m_n): Likewise.
3876         (vqshruntq_m_n): Likewise.
3877         (vqshrunbq_m_n): Likewise.
3878         (vqdmullbq_m_n): Likewise.
3879         (vqdmullbq_m): Likewise.
3880         (vqdmulltq_m_n): Likewise.
3881         (vqdmulltq_m): Likewise.
3882         (vqrshrnbq_m_n): Likewise.
3883         (vqrshrntq_m_n): Likewise.
3884         (vqrshrunbq_m_n): Likewise.
3885         (vqrshruntq_m_n): Likewise.
3886         (vqshrnbq_m_n): Likewise.
3887         (vqshrntq_m_n): Likewise.
3888         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
3889         builtin qualifiers.
3890         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
3891         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
3892         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
3893         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
3894         * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
3895         (VMLALDAVAXQ_P): Likewise.
3896         (VQRSHRNBQ_M_N): Likewise.
3897         (VQRSHRNTQ_M_N): Likewise.
3898         (VQSHRNBQ_M_N): Likewise.
3899         (VQSHRNTQ_M_N): Likewise.
3900         (VRSHRNBQ_M_N): Likewise.
3901         (VRSHRNTQ_M_N): Likewise.
3902         (VSHLLBQ_M_N): Likewise.
3903         (VSHLLTQ_M_N): Likewise.
3904         (VSHRNBQ_M_N): Likewise.
3905         (VSHRNTQ_M_N): Likewise.
3906         (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
3907         (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
3908         (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
3909         (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
3910         (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
3911         (mve_vqshrntq_m_n_<supf><mode>): Likewise.
3912         (mve_vrmlaldavhaq_p_sv4si): Likewise.
3913         (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
3914         (mve_vrshrntq_m_n_<supf><mode>): Likewise.
3915         (mve_vshllbq_m_n_<supf><mode>): Likewise.
3916         (mve_vshlltq_m_n_<supf><mode>): Likewise.
3917         (mve_vshrnbq_m_n_<supf><mode>): Likewise.
3918         (mve_vshrntq_m_n_<supf><mode>): Likewise.
3919         (mve_vmlsldavaq_p_s<mode>): Likewise.
3920         (mve_vmlsldavaxq_p_s<mode>): Likewise.
3921         (mve_vmullbq_poly_m_p<mode>): Likewise.
3922         (mve_vmulltq_poly_m_p<mode>): Likewise.
3923         (mve_vqdmullbq_m_n_s<mode>): Likewise.
3924         (mve_vqdmullbq_m_s<mode>): Likewise.
3925         (mve_vqdmulltq_m_n_s<mode>): Likewise.
3926         (mve_vqdmulltq_m_s<mode>): Likewise.
3927         (mve_vqrshrunbq_m_n_s<mode>): Likewise.
3928         (mve_vqrshruntq_m_n_s<mode>): Likewise.
3929         (mve_vqshrunbq_m_n_s<mode>): Likewise.
3930         (mve_vqshruntq_m_n_s<mode>): Likewise.
3931         (mve_vrmlaldavhaq_p_uv4si): Likewise.
3932         (mve_vrmlaldavhaxq_p_sv4si): Likewise.
3933         (mve_vrmlsldavhaq_p_sv4si): Likewise.
3934         (mve_vrmlsldavhaxq_p_sv4si): Likewise.
3935
3936 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
3937             Mihail Ionescu  <mihail.ionescu@arm.com>
3938             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3939
3940         * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
3941         (vabdq_m_s32): Likewise.
3942         (vabdq_m_s16): Likewise.
3943         (vabdq_m_u8): Likewise.
3944         (vabdq_m_u32): Likewise.
3945         (vabdq_m_u16): Likewise.
3946         (vaddq_m_n_s8): Likewise.
3947         (vaddq_m_n_s32): Likewise.
3948         (vaddq_m_n_s16): Likewise.
3949         (vaddq_m_n_u8): Likewise.
3950         (vaddq_m_n_u32): Likewise.
3951         (vaddq_m_n_u16): Likewise.
3952         (vaddq_m_s8): Likewise.
3953         (vaddq_m_s32): Likewise.
3954         (vaddq_m_s16): Likewise.
3955         (vaddq_m_u8): Likewise.
3956         (vaddq_m_u32): Likewise.
3957         (vaddq_m_u16): Likewise.
3958         (vandq_m_s8): Likewise.
3959         (vandq_m_s32): Likewise.
3960         (vandq_m_s16): Likewise.
3961         (vandq_m_u8): Likewise.
3962         (vandq_m_u32): Likewise.
3963         (vandq_m_u16): Likewise.
3964         (vbicq_m_s8): Likewise.
3965         (vbicq_m_s32): Likewise.
3966         (vbicq_m_s16): Likewise.
3967         (vbicq_m_u8): Likewise.
3968         (vbicq_m_u32): Likewise.
3969         (vbicq_m_u16): Likewise.
3970         (vbrsrq_m_n_s8): Likewise.
3971         (vbrsrq_m_n_s32): Likewise.
3972         (vbrsrq_m_n_s16): Likewise.
3973         (vbrsrq_m_n_u8): Likewise.
3974         (vbrsrq_m_n_u32): Likewise.
3975         (vbrsrq_m_n_u16): Likewise.
3976         (vcaddq_rot270_m_s8): Likewise.
3977         (vcaddq_rot270_m_s32): Likewise.
3978         (vcaddq_rot270_m_s16): Likewise.
3979         (vcaddq_rot270_m_u8): Likewise.
3980         (vcaddq_rot270_m_u32): Likewise.
3981         (vcaddq_rot270_m_u16): Likewise.
3982         (vcaddq_rot90_m_s8): Likewise.
3983         (vcaddq_rot90_m_s32): Likewise.
3984         (vcaddq_rot90_m_s16): Likewise.
3985         (vcaddq_rot90_m_u8): Likewise.
3986         (vcaddq_rot90_m_u32): Likewise.
3987         (vcaddq_rot90_m_u16): Likewise.
3988         (veorq_m_s8): Likewise.
3989         (veorq_m_s32): Likewise.
3990         (veorq_m_s16): Likewise.
3991         (veorq_m_u8): Likewise.
3992         (veorq_m_u32): Likewise.
3993         (veorq_m_u16): Likewise.
3994         (vhaddq_m_n_s8): Likewise.
3995         (vhaddq_m_n_s32): Likewise.
3996         (vhaddq_m_n_s16): Likewise.
3997         (vhaddq_m_n_u8): Likewise.
3998         (vhaddq_m_n_u32): Likewise.
3999         (vhaddq_m_n_u16): Likewise.
4000         (vhaddq_m_s8): Likewise.
4001         (vhaddq_m_s32): Likewise.
4002         (vhaddq_m_s16): Likewise.
4003         (vhaddq_m_u8): Likewise.
4004         (vhaddq_m_u32): Likewise.
4005         (vhaddq_m_u16): Likewise.
4006         (vhcaddq_rot270_m_s8): Likewise.
4007         (vhcaddq_rot270_m_s32): Likewise.
4008         (vhcaddq_rot270_m_s16): Likewise.
4009         (vhcaddq_rot90_m_s8): Likewise.
4010         (vhcaddq_rot90_m_s32): Likewise.
4011         (vhcaddq_rot90_m_s16): Likewise.
4012         (vhsubq_m_n_s8): Likewise.
4013         (vhsubq_m_n_s32): Likewise.
4014         (vhsubq_m_n_s16): Likewise.
4015         (vhsubq_m_n_u8): Likewise.
4016         (vhsubq_m_n_u32): Likewise.
4017         (vhsubq_m_n_u16): Likewise.
4018         (vhsubq_m_s8): Likewise.
4019         (vhsubq_m_s32): Likewise.
4020         (vhsubq_m_s16): Likewise.
4021         (vhsubq_m_u8): Likewise.
4022         (vhsubq_m_u32): Likewise.
4023         (vhsubq_m_u16): Likewise.
4024         (vmaxq_m_s8): Likewise.
4025         (vmaxq_m_s32): Likewise.
4026         (vmaxq_m_s16): Likewise.
4027         (vmaxq_m_u8): Likewise.
4028         (vmaxq_m_u32): Likewise.
4029         (vmaxq_m_u16): Likewise.
4030         (vminq_m_s8): Likewise.
4031         (vminq_m_s32): Likewise.
4032         (vminq_m_s16): Likewise.
4033         (vminq_m_u8): Likewise.
4034         (vminq_m_u32): Likewise.
4035         (vminq_m_u16): Likewise.
4036         (vmladavaq_p_s8): Likewise.
4037         (vmladavaq_p_s32): Likewise.
4038         (vmladavaq_p_s16): Likewise.
4039         (vmladavaq_p_u8): Likewise.
4040         (vmladavaq_p_u32): Likewise.
4041         (vmladavaq_p_u16): Likewise.
4042         (vmladavaxq_p_s8): Likewise.
4043         (vmladavaxq_p_s32): Likewise.
4044         (vmladavaxq_p_s16): Likewise.
4045         (vmlaq_m_n_s8): Likewise.
4046         (vmlaq_m_n_s32): Likewise.
4047         (vmlaq_m_n_s16): Likewise.
4048         (vmlaq_m_n_u8): Likewise.
4049         (vmlaq_m_n_u32): Likewise.
4050         (vmlaq_m_n_u16): Likewise.
4051         (vmlasq_m_n_s8): Likewise.
4052         (vmlasq_m_n_s32): Likewise.
4053         (vmlasq_m_n_s16): Likewise.
4054         (vmlasq_m_n_u8): Likewise.
4055         (vmlasq_m_n_u32): Likewise.
4056         (vmlasq_m_n_u16): Likewise.
4057         (vmlsdavaq_p_s8): Likewise.
4058         (vmlsdavaq_p_s32): Likewise.
4059         (vmlsdavaq_p_s16): Likewise.
4060         (vmlsdavaxq_p_s8): Likewise.
4061         (vmlsdavaxq_p_s32): Likewise.
4062         (vmlsdavaxq_p_s16): Likewise.
4063         (vmulhq_m_s8): Likewise.
4064         (vmulhq_m_s32): Likewise.
4065         (vmulhq_m_s16): Likewise.
4066         (vmulhq_m_u8): Likewise.
4067         (vmulhq_m_u32): Likewise.
4068         (vmulhq_m_u16): Likewise.
4069         (vmullbq_int_m_s8): Likewise.
4070         (vmullbq_int_m_s32): Likewise.
4071         (vmullbq_int_m_s16): Likewise.
4072         (vmullbq_int_m_u8): Likewise.
4073         (vmullbq_int_m_u32): Likewise.
4074         (vmullbq_int_m_u16): Likewise.
4075         (vmulltq_int_m_s8): Likewise.
4076         (vmulltq_int_m_s32): Likewise.
4077         (vmulltq_int_m_s16): Likewise.
4078         (vmulltq_int_m_u8): Likewise.
4079         (vmulltq_int_m_u32): Likewise.
4080         (vmulltq_int_m_u16): Likewise.
4081         (vmulq_m_n_s8): Likewise.
4082         (vmulq_m_n_s32): Likewise.
4083         (vmulq_m_n_s16): Likewise.
4084         (vmulq_m_n_u8): Likewise.
4085         (vmulq_m_n_u32): Likewise.
4086         (vmulq_m_n_u16): Likewise.
4087         (vmulq_m_s8): Likewise.
4088         (vmulq_m_s32): Likewise.
4089         (vmulq_m_s16): Likewise.
4090         (vmulq_m_u8): Likewise.
4091         (vmulq_m_u32): Likewise.
4092         (vmulq_m_u16): Likewise.
4093         (vornq_m_s8): Likewise.
4094         (vornq_m_s32): Likewise.
4095         (vornq_m_s16): Likewise.
4096         (vornq_m_u8): Likewise.
4097         (vornq_m_u32): Likewise.
4098         (vornq_m_u16): Likewise.
4099         (vorrq_m_s8): Likewise.
4100         (vorrq_m_s32): Likewise.
4101         (vorrq_m_s16): Likewise.
4102         (vorrq_m_u8): Likewise.
4103         (vorrq_m_u32): Likewise.
4104         (vorrq_m_u16): Likewise.
4105         (vqaddq_m_n_s8): Likewise.
4106         (vqaddq_m_n_s32): Likewise.
4107         (vqaddq_m_n_s16): Likewise.
4108         (vqaddq_m_n_u8): Likewise.
4109         (vqaddq_m_n_u32): Likewise.
4110         (vqaddq_m_n_u16): Likewise.
4111         (vqaddq_m_s8): Likewise.
4112         (vqaddq_m_s32): Likewise.
4113         (vqaddq_m_s16): Likewise.
4114         (vqaddq_m_u8): Likewise.
4115         (vqaddq_m_u32): Likewise.
4116         (vqaddq_m_u16): Likewise.
4117         (vqdmladhq_m_s8): Likewise.
4118         (vqdmladhq_m_s32): Likewise.
4119         (vqdmladhq_m_s16): Likewise.
4120         (vqdmladhxq_m_s8): Likewise.
4121         (vqdmladhxq_m_s32): Likewise.
4122         (vqdmladhxq_m_s16): Likewise.
4123         (vqdmlahq_m_n_s8): Likewise.
4124         (vqdmlahq_m_n_s32): Likewise.
4125         (vqdmlahq_m_n_s16): Likewise.
4126         (vqdmlahq_m_n_u8): Likewise.
4127         (vqdmlahq_m_n_u32): Likewise.
4128         (vqdmlahq_m_n_u16): Likewise.
4129         (vqdmlsdhq_m_s8): Likewise.
4130         (vqdmlsdhq_m_s32): Likewise.
4131         (vqdmlsdhq_m_s16): Likewise.
4132         (vqdmlsdhxq_m_s8): Likewise.
4133         (vqdmlsdhxq_m_s32): Likewise.
4134         (vqdmlsdhxq_m_s16): Likewise.
4135         (vqdmulhq_m_n_s8): Likewise.
4136         (vqdmulhq_m_n_s32): Likewise.
4137         (vqdmulhq_m_n_s16): Likewise.
4138         (vqdmulhq_m_s8): Likewise.
4139         (vqdmulhq_m_s32): Likewise.
4140         (vqdmulhq_m_s16): Likewise.
4141         (vqrdmladhq_m_s8): Likewise.
4142         (vqrdmladhq_m_s32): Likewise.
4143         (vqrdmladhq_m_s16): Likewise.
4144         (vqrdmladhxq_m_s8): Likewise.
4145         (vqrdmladhxq_m_s32): Likewise.
4146         (vqrdmladhxq_m_s16): Likewise.
4147         (vqrdmlahq_m_n_s8): Likewise.
4148         (vqrdmlahq_m_n_s32): Likewise.
4149         (vqrdmlahq_m_n_s16): Likewise.
4150         (vqrdmlahq_m_n_u8): Likewise.
4151         (vqrdmlahq_m_n_u32): Likewise.
4152         (vqrdmlahq_m_n_u16): Likewise.
4153         (vqrdmlashq_m_n_s8): Likewise.
4154         (vqrdmlashq_m_n_s32): Likewise.
4155         (vqrdmlashq_m_n_s16): Likewise.
4156         (vqrdmlashq_m_n_u8): Likewise.
4157         (vqrdmlashq_m_n_u32): Likewise.
4158         (vqrdmlashq_m_n_u16): Likewise.
4159         (vqrdmlsdhq_m_s8): Likewise.
4160         (vqrdmlsdhq_m_s32): Likewise.
4161         (vqrdmlsdhq_m_s16): Likewise.
4162         (vqrdmlsdhxq_m_s8): Likewise.
4163         (vqrdmlsdhxq_m_s32): Likewise.
4164         (vqrdmlsdhxq_m_s16): Likewise.
4165         (vqrdmulhq_m_n_s8): Likewise.
4166         (vqrdmulhq_m_n_s32): Likewise.
4167         (vqrdmulhq_m_n_s16): Likewise.
4168         (vqrdmulhq_m_s8): Likewise.
4169         (vqrdmulhq_m_s32): Likewise.
4170         (vqrdmulhq_m_s16): Likewise.
4171         (vqrshlq_m_s8): Likewise.
4172         (vqrshlq_m_s32): Likewise.
4173         (vqrshlq_m_s16): Likewise.
4174         (vqrshlq_m_u8): Likewise.
4175         (vqrshlq_m_u32): Likewise.
4176         (vqrshlq_m_u16): Likewise.
4177         (vqshlq_m_n_s8): Likewise.
4178         (vqshlq_m_n_s32): Likewise.
4179         (vqshlq_m_n_s16): Likewise.
4180         (vqshlq_m_n_u8): Likewise.
4181         (vqshlq_m_n_u32): Likewise.
4182         (vqshlq_m_n_u16): Likewise.
4183         (vqshlq_m_s8): Likewise.
4184         (vqshlq_m_s32): Likewise.
4185         (vqshlq_m_s16): Likewise.
4186         (vqshlq_m_u8): Likewise.
4187         (vqshlq_m_u32): Likewise.
4188         (vqshlq_m_u16): Likewise.
4189         (vqsubq_m_n_s8): Likewise.
4190         (vqsubq_m_n_s32): Likewise.
4191         (vqsubq_m_n_s16): Likewise.
4192         (vqsubq_m_n_u8): Likewise.
4193         (vqsubq_m_n_u32): Likewise.
4194         (vqsubq_m_n_u16): Likewise.
4195         (vqsubq_m_s8): Likewise.
4196         (vqsubq_m_s32): Likewise.
4197         (vqsubq_m_s16): Likewise.
4198         (vqsubq_m_u8): Likewise.
4199         (vqsubq_m_u32): Likewise.
4200         (vqsubq_m_u16): Likewise.
4201         (vrhaddq_m_s8): Likewise.
4202         (vrhaddq_m_s32): Likewise.
4203         (vrhaddq_m_s16): Likewise.
4204         (vrhaddq_m_u8): Likewise.
4205         (vrhaddq_m_u32): Likewise.
4206         (vrhaddq_m_u16): Likewise.
4207         (vrmulhq_m_s8): Likewise.
4208         (vrmulhq_m_s32): Likewise.
4209         (vrmulhq_m_s16): Likewise.
4210         (vrmulhq_m_u8): Likewise.
4211         (vrmulhq_m_u32): Likewise.
4212         (vrmulhq_m_u16): Likewise.
4213         (vrshlq_m_s8): Likewise.
4214         (vrshlq_m_s32): Likewise.
4215         (vrshlq_m_s16): Likewise.
4216         (vrshlq_m_u8): Likewise.
4217         (vrshlq_m_u32): Likewise.
4218         (vrshlq_m_u16): Likewise.
4219         (vrshrq_m_n_s8): Likewise.
4220         (vrshrq_m_n_s32): Likewise.
4221         (vrshrq_m_n_s16): Likewise.
4222         (vrshrq_m_n_u8): Likewise.
4223         (vrshrq_m_n_u32): Likewise.
4224         (vrshrq_m_n_u16): Likewise.
4225         (vshlq_m_n_s8): Likewise.
4226         (vshlq_m_n_s32): Likewise.
4227         (vshlq_m_n_s16): Likewise.
4228         (vshlq_m_n_u8): Likewise.
4229         (vshlq_m_n_u32): Likewise.
4230         (vshlq_m_n_u16): Likewise.
4231         (vshrq_m_n_s8): Likewise.
4232         (vshrq_m_n_s32): Likewise.
4233         (vshrq_m_n_s16): Likewise.
4234         (vshrq_m_n_u8): Likewise.
4235         (vshrq_m_n_u32): Likewise.
4236         (vshrq_m_n_u16): Likewise.
4237         (vsliq_m_n_s8): Likewise.
4238         (vsliq_m_n_s32): Likewise.
4239         (vsliq_m_n_s16): Likewise.
4240         (vsliq_m_n_u8): Likewise.
4241         (vsliq_m_n_u32): Likewise.
4242         (vsliq_m_n_u16): Likewise.
4243         (vsubq_m_n_s8): Likewise.
4244         (vsubq_m_n_s32): Likewise.
4245         (vsubq_m_n_s16): Likewise.
4246         (vsubq_m_n_u8): Likewise.
4247         (vsubq_m_n_u32): Likewise.
4248         (vsubq_m_n_u16): Likewise.
4249         (__arm_vabdq_m_s8): Define intrinsic.
4250         (__arm_vabdq_m_s32): Likewise.
4251         (__arm_vabdq_m_s16): Likewise.
4252         (__arm_vabdq_m_u8): Likewise.
4253         (__arm_vabdq_m_u32): Likewise.
4254         (__arm_vabdq_m_u16): Likewise.
4255         (__arm_vaddq_m_n_s8): Likewise.
4256         (__arm_vaddq_m_n_s32): Likewise.
4257         (__arm_vaddq_m_n_s16): Likewise.
4258         (__arm_vaddq_m_n_u8): Likewise.
4259         (__arm_vaddq_m_n_u32): Likewise.
4260         (__arm_vaddq_m_n_u16): Likewise.
4261         (__arm_vaddq_m_s8): Likewise.
4262         (__arm_vaddq_m_s32): Likewise.
4263         (__arm_vaddq_m_s16): Likewise.
4264         (__arm_vaddq_m_u8): Likewise.
4265         (__arm_vaddq_m_u32): Likewise.
4266         (__arm_vaddq_m_u16): Likewise.
4267         (__arm_vandq_m_s8): Likewise.
4268         (__arm_vandq_m_s32): Likewise.
4269         (__arm_vandq_m_s16): Likewise.
4270         (__arm_vandq_m_u8): Likewise.
4271         (__arm_vandq_m_u32): Likewise.
4272         (__arm_vandq_m_u16): Likewise.
4273         (__arm_vbicq_m_s8): Likewise.
4274         (__arm_vbicq_m_s32): Likewise.
4275         (__arm_vbicq_m_s16): Likewise.
4276         (__arm_vbicq_m_u8): Likewise.
4277         (__arm_vbicq_m_u32): Likewise.
4278         (__arm_vbicq_m_u16): Likewise.
4279         (__arm_vbrsrq_m_n_s8): Likewise.
4280         (__arm_vbrsrq_m_n_s32): Likewise.
4281         (__arm_vbrsrq_m_n_s16): Likewise.
4282         (__arm_vbrsrq_m_n_u8): Likewise.
4283         (__arm_vbrsrq_m_n_u32): Likewise.
4284         (__arm_vbrsrq_m_n_u16): Likewise.
4285         (__arm_vcaddq_rot270_m_s8): Likewise.
4286         (__arm_vcaddq_rot270_m_s32): Likewise.
4287         (__arm_vcaddq_rot270_m_s16): Likewise.
4288         (__arm_vcaddq_rot270_m_u8): Likewise.
4289         (__arm_vcaddq_rot270_m_u32): Likewise.
4290         (__arm_vcaddq_rot270_m_u16): Likewise.
4291         (__arm_vcaddq_rot90_m_s8): Likewise.
4292         (__arm_vcaddq_rot90_m_s32): Likewise.
4293         (__arm_vcaddq_rot90_m_s16): Likewise.
4294         (__arm_vcaddq_rot90_m_u8): Likewise.
4295         (__arm_vcaddq_rot90_m_u32): Likewise.
4296         (__arm_vcaddq_rot90_m_u16): Likewise.
4297         (__arm_veorq_m_s8): Likewise.
4298         (__arm_veorq_m_s32): Likewise.
4299         (__arm_veorq_m_s16): Likewise.
4300         (__arm_veorq_m_u8): Likewise.
4301         (__arm_veorq_m_u32): Likewise.
4302         (__arm_veorq_m_u16): Likewise.
4303         (__arm_vhaddq_m_n_s8): Likewise.
4304         (__arm_vhaddq_m_n_s32): Likewise.
4305         (__arm_vhaddq_m_n_s16): Likewise.
4306         (__arm_vhaddq_m_n_u8): Likewise.
4307         (__arm_vhaddq_m_n_u32): Likewise.
4308         (__arm_vhaddq_m_n_u16): Likewise.
4309         (__arm_vhaddq_m_s8): Likewise.
4310         (__arm_vhaddq_m_s32): Likewise.
4311         (__arm_vhaddq_m_s16): Likewise.
4312         (__arm_vhaddq_m_u8): Likewise.
4313         (__arm_vhaddq_m_u32): Likewise.
4314         (__arm_vhaddq_m_u16): Likewise.
4315         (__arm_vhcaddq_rot270_m_s8): Likewise.
4316         (__arm_vhcaddq_rot270_m_s32): Likewise.
4317         (__arm_vhcaddq_rot270_m_s16): Likewise.
4318         (__arm_vhcaddq_rot90_m_s8): Likewise.
4319         (__arm_vhcaddq_rot90_m_s32): Likewise.
4320         (__arm_vhcaddq_rot90_m_s16): Likewise.
4321         (__arm_vhsubq_m_n_s8): Likewise.
4322         (__arm_vhsubq_m_n_s32): Likewise.
4323         (__arm_vhsubq_m_n_s16): Likewise.
4324         (__arm_vhsubq_m_n_u8): Likewise.
4325         (__arm_vhsubq_m_n_u32): Likewise.
4326         (__arm_vhsubq_m_n_u16): Likewise.
4327         (__arm_vhsubq_m_s8): Likewise.
4328         (__arm_vhsubq_m_s32): Likewise.
4329         (__arm_vhsubq_m_s16): Likewise.
4330         (__arm_vhsubq_m_u8): Likewise.
4331         (__arm_vhsubq_m_u32): Likewise.
4332         (__arm_vhsubq_m_u16): Likewise.
4333         (__arm_vmaxq_m_s8): Likewise.
4334         (__arm_vmaxq_m_s32): Likewise.
4335         (__arm_vmaxq_m_s16): Likewise.
4336         (__arm_vmaxq_m_u8): Likewise.
4337         (__arm_vmaxq_m_u32): Likewise.
4338         (__arm_vmaxq_m_u16): Likewise.
4339         (__arm_vminq_m_s8): Likewise.
4340         (__arm_vminq_m_s32): Likewise.
4341         (__arm_vminq_m_s16): Likewise.
4342         (__arm_vminq_m_u8): Likewise.
4343         (__arm_vminq_m_u32): Likewise.
4344         (__arm_vminq_m_u16): Likewise.
4345         (__arm_vmladavaq_p_s8): Likewise.
4346         (__arm_vmladavaq_p_s32): Likewise.
4347         (__arm_vmladavaq_p_s16): Likewise.
4348         (__arm_vmladavaq_p_u8): Likewise.
4349         (__arm_vmladavaq_p_u32): Likewise.
4350         (__arm_vmladavaq_p_u16): Likewise.
4351         (__arm_vmladavaxq_p_s8): Likewise.
4352         (__arm_vmladavaxq_p_s32): Likewise.
4353         (__arm_vmladavaxq_p_s16): Likewise.
4354         (__arm_vmlaq_m_n_s8): Likewise.
4355         (__arm_vmlaq_m_n_s32): Likewise.
4356         (__arm_vmlaq_m_n_s16): Likewise.
4357         (__arm_vmlaq_m_n_u8): Likewise.
4358         (__arm_vmlaq_m_n_u32): Likewise.
4359         (__arm_vmlaq_m_n_u16): Likewise.
4360         (__arm_vmlasq_m_n_s8): Likewise.
4361         (__arm_vmlasq_m_n_s32): Likewise.
4362         (__arm_vmlasq_m_n_s16): Likewise.
4363         (__arm_vmlasq_m_n_u8): Likewise.
4364         (__arm_vmlasq_m_n_u32): Likewise.
4365         (__arm_vmlasq_m_n_u16): Likewise.
4366         (__arm_vmlsdavaq_p_s8): Likewise.
4367         (__arm_vmlsdavaq_p_s32): Likewise.
4368         (__arm_vmlsdavaq_p_s16): Likewise.
4369         (__arm_vmlsdavaxq_p_s8): Likewise.
4370         (__arm_vmlsdavaxq_p_s32): Likewise.
4371         (__arm_vmlsdavaxq_p_s16): Likewise.
4372         (__arm_vmulhq_m_s8): Likewise.
4373         (__arm_vmulhq_m_s32): Likewise.
4374         (__arm_vmulhq_m_s16): Likewise.
4375         (__arm_vmulhq_m_u8): Likewise.
4376         (__arm_vmulhq_m_u32): Likewise.
4377         (__arm_vmulhq_m_u16): Likewise.
4378         (__arm_vmullbq_int_m_s8): Likewise.
4379         (__arm_vmullbq_int_m_s32): Likewise.
4380         (__arm_vmullbq_int_m_s16): Likewise.
4381         (__arm_vmullbq_int_m_u8): Likewise.
4382         (__arm_vmullbq_int_m_u32): Likewise.
4383         (__arm_vmullbq_int_m_u16): Likewise.
4384         (__arm_vmulltq_int_m_s8): Likewise.
4385         (__arm_vmulltq_int_m_s32): Likewise.
4386         (__arm_vmulltq_int_m_s16): Likewise.
4387         (__arm_vmulltq_int_m_u8): Likewise.
4388         (__arm_vmulltq_int_m_u32): Likewise.
4389         (__arm_vmulltq_int_m_u16): Likewise.
4390         (__arm_vmulq_m_n_s8): Likewise.
4391         (__arm_vmulq_m_n_s32): Likewise.
4392         (__arm_vmulq_m_n_s16): Likewise.
4393         (__arm_vmulq_m_n_u8): Likewise.
4394         (__arm_vmulq_m_n_u32): Likewise.
4395         (__arm_vmulq_m_n_u16): Likewise.
4396         (__arm_vmulq_m_s8): Likewise.
4397         (__arm_vmulq_m_s32): Likewise.
4398         (__arm_vmulq_m_s16): Likewise.
4399         (__arm_vmulq_m_u8): Likewise.
4400         (__arm_vmulq_m_u32): Likewise.
4401         (__arm_vmulq_m_u16): Likewise.
4402         (__arm_vornq_m_s8): Likewise.
4403         (__arm_vornq_m_s32): Likewise.
4404         (__arm_vornq_m_s16): Likewise.
4405         (__arm_vornq_m_u8): Likewise.
4406         (__arm_vornq_m_u32): Likewise.
4407         (__arm_vornq_m_u16): Likewise.
4408         (__arm_vorrq_m_s8): Likewise.
4409         (__arm_vorrq_m_s32): Likewise.
4410         (__arm_vorrq_m_s16): Likewise.
4411         (__arm_vorrq_m_u8): Likewise.
4412         (__arm_vorrq_m_u32): Likewise.
4413         (__arm_vorrq_m_u16): Likewise.
4414         (__arm_vqaddq_m_n_s8): Likewise.
4415         (__arm_vqaddq_m_n_s32): Likewise.
4416         (__arm_vqaddq_m_n_s16): Likewise.
4417         (__arm_vqaddq_m_n_u8): Likewise.
4418         (__arm_vqaddq_m_n_u32): Likewise.
4419         (__arm_vqaddq_m_n_u16): Likewise.
4420         (__arm_vqaddq_m_s8): Likewise.
4421         (__arm_vqaddq_m_s32): Likewise.
4422         (__arm_vqaddq_m_s16): Likewise.
4423         (__arm_vqaddq_m_u8): Likewise.
4424         (__arm_vqaddq_m_u32): Likewise.
4425         (__arm_vqaddq_m_u16): Likewise.
4426         (__arm_vqdmladhq_m_s8): Likewise.
4427         (__arm_vqdmladhq_m_s32): Likewise.
4428         (__arm_vqdmladhq_m_s16): Likewise.
4429         (__arm_vqdmladhxq_m_s8): Likewise.
4430         (__arm_vqdmladhxq_m_s32): Likewise.
4431         (__arm_vqdmladhxq_m_s16): Likewise.
4432         (__arm_vqdmlahq_m_n_s8): Likewise.
4433         (__arm_vqdmlahq_m_n_s32): Likewise.
4434         (__arm_vqdmlahq_m_n_s16): Likewise.
4435         (__arm_vqdmlahq_m_n_u8): Likewise.
4436         (__arm_vqdmlahq_m_n_u32): Likewise.
4437         (__arm_vqdmlahq_m_n_u16): Likewise.
4438         (__arm_vqdmlsdhq_m_s8): Likewise.
4439         (__arm_vqdmlsdhq_m_s32): Likewise.
4440         (__arm_vqdmlsdhq_m_s16): Likewise.
4441         (__arm_vqdmlsdhxq_m_s8): Likewise.
4442         (__arm_vqdmlsdhxq_m_s32): Likewise.
4443         (__arm_vqdmlsdhxq_m_s16): Likewise.
4444         (__arm_vqdmulhq_m_n_s8): Likewise.
4445         (__arm_vqdmulhq_m_n_s32): Likewise.
4446         (__arm_vqdmulhq_m_n_s16): Likewise.
4447         (__arm_vqdmulhq_m_s8): Likewise.
4448         (__arm_vqdmulhq_m_s32): Likewise.
4449         (__arm_vqdmulhq_m_s16): Likewise.
4450         (__arm_vqrdmladhq_m_s8): Likewise.
4451         (__arm_vqrdmladhq_m_s32): Likewise.
4452         (__arm_vqrdmladhq_m_s16): Likewise.
4453         (__arm_vqrdmladhxq_m_s8): Likewise.
4454         (__arm_vqrdmladhxq_m_s32): Likewise.
4455         (__arm_vqrdmladhxq_m_s16): Likewise.
4456         (__arm_vqrdmlahq_m_n_s8): Likewise.
4457         (__arm_vqrdmlahq_m_n_s32): Likewise.
4458         (__arm_vqrdmlahq_m_n_s16): Likewise.
4459         (__arm_vqrdmlahq_m_n_u8): Likewise.
4460         (__arm_vqrdmlahq_m_n_u32): Likewise.
4461         (__arm_vqrdmlahq_m_n_u16): Likewise.
4462         (__arm_vqrdmlashq_m_n_s8): Likewise.
4463         (__arm_vqrdmlashq_m_n_s32): Likewise.
4464         (__arm_vqrdmlashq_m_n_s16): Likewise.
4465         (__arm_vqrdmlashq_m_n_u8): Likewise.
4466         (__arm_vqrdmlashq_m_n_u32): Likewise.
4467         (__arm_vqrdmlashq_m_n_u16): Likewise.
4468         (__arm_vqrdmlsdhq_m_s8): Likewise.
4469         (__arm_vqrdmlsdhq_m_s32): Likewise.
4470         (__arm_vqrdmlsdhq_m_s16): Likewise.
4471         (__arm_vqrdmlsdhxq_m_s8): Likewise.
4472         (__arm_vqrdmlsdhxq_m_s32): Likewise.
4473         (__arm_vqrdmlsdhxq_m_s16): Likewise.
4474         (__arm_vqrdmulhq_m_n_s8): Likewise.
4475         (__arm_vqrdmulhq_m_n_s32): Likewise.
4476         (__arm_vqrdmulhq_m_n_s16): Likewise.
4477         (__arm_vqrdmulhq_m_s8): Likewise.
4478         (__arm_vqrdmulhq_m_s32): Likewise.
4479         (__arm_vqrdmulhq_m_s16): Likewise.
4480         (__arm_vqrshlq_m_s8): Likewise.
4481         (__arm_vqrshlq_m_s32): Likewise.
4482         (__arm_vqrshlq_m_s16): Likewise.
4483         (__arm_vqrshlq_m_u8): Likewise.
4484         (__arm_vqrshlq_m_u32): Likewise.
4485         (__arm_vqrshlq_m_u16): Likewise.
4486         (__arm_vqshlq_m_n_s8): Likewise.
4487         (__arm_vqshlq_m_n_s32): Likewise.
4488         (__arm_vqshlq_m_n_s16): Likewise.
4489         (__arm_vqshlq_m_n_u8): Likewise.
4490         (__arm_vqshlq_m_n_u32): Likewise.
4491         (__arm_vqshlq_m_n_u16): Likewise.
4492         (__arm_vqshlq_m_s8): Likewise.
4493         (__arm_vqshlq_m_s32): Likewise.
4494         (__arm_vqshlq_m_s16): Likewise.
4495         (__arm_vqshlq_m_u8): Likewise.
4496         (__arm_vqshlq_m_u32): Likewise.
4497         (__arm_vqshlq_m_u16): Likewise.
4498         (__arm_vqsubq_m_n_s8): Likewise.
4499         (__arm_vqsubq_m_n_s32): Likewise.
4500         (__arm_vqsubq_m_n_s16): Likewise.
4501         (__arm_vqsubq_m_n_u8): Likewise.
4502         (__arm_vqsubq_m_n_u32): Likewise.
4503         (__arm_vqsubq_m_n_u16): Likewise.
4504         (__arm_vqsubq_m_s8): Likewise.
4505         (__arm_vqsubq_m_s32): Likewise.
4506         (__arm_vqsubq_m_s16): Likewise.
4507         (__arm_vqsubq_m_u8): Likewise.
4508         (__arm_vqsubq_m_u32): Likewise.
4509         (__arm_vqsubq_m_u16): Likewise.
4510         (__arm_vrhaddq_m_s8): Likewise.
4511         (__arm_vrhaddq_m_s32): Likewise.
4512         (__arm_vrhaddq_m_s16): Likewise.
4513         (__arm_vrhaddq_m_u8): Likewise.
4514         (__arm_vrhaddq_m_u32): Likewise.
4515         (__arm_vrhaddq_m_u16): Likewise.
4516         (__arm_vrmulhq_m_s8): Likewise.
4517         (__arm_vrmulhq_m_s32): Likewise.
4518         (__arm_vrmulhq_m_s16): Likewise.
4519         (__arm_vrmulhq_m_u8): Likewise.
4520         (__arm_vrmulhq_m_u32): Likewise.
4521         (__arm_vrmulhq_m_u16): Likewise.
4522         (__arm_vrshlq_m_s8): Likewise.
4523         (__arm_vrshlq_m_s32): Likewise.
4524         (__arm_vrshlq_m_s16): Likewise.
4525         (__arm_vrshlq_m_u8): Likewise.
4526         (__arm_vrshlq_m_u32): Likewise.
4527         (__arm_vrshlq_m_u16): Likewise.
4528         (__arm_vrshrq_m_n_s8): Likewise.
4529         (__arm_vrshrq_m_n_s32): Likewise.
4530         (__arm_vrshrq_m_n_s16): Likewise.
4531         (__arm_vrshrq_m_n_u8): Likewise.
4532         (__arm_vrshrq_m_n_u32): Likewise.
4533         (__arm_vrshrq_m_n_u16): Likewise.
4534         (__arm_vshlq_m_n_s8): Likewise.
4535         (__arm_vshlq_m_n_s32): Likewise.
4536         (__arm_vshlq_m_n_s16): Likewise.
4537         (__arm_vshlq_m_n_u8): Likewise.
4538         (__arm_vshlq_m_n_u32): Likewise.
4539         (__arm_vshlq_m_n_u16): Likewise.
4540         (__arm_vshrq_m_n_s8): Likewise.
4541         (__arm_vshrq_m_n_s32): Likewise.
4542         (__arm_vshrq_m_n_s16): Likewise.
4543         (__arm_vshrq_m_n_u8): Likewise.
4544         (__arm_vshrq_m_n_u32): Likewise.
4545         (__arm_vshrq_m_n_u16): Likewise.
4546         (__arm_vsliq_m_n_s8): Likewise.
4547         (__arm_vsliq_m_n_s32): Likewise.
4548         (__arm_vsliq_m_n_s16): Likewise.
4549         (__arm_vsliq_m_n_u8): Likewise.
4550         (__arm_vsliq_m_n_u32): Likewise.
4551         (__arm_vsliq_m_n_u16): Likewise.
4552         (__arm_vsubq_m_n_s8): Likewise.
4553         (__arm_vsubq_m_n_s32): Likewise.
4554         (__arm_vsubq_m_n_s16): Likewise.
4555         (__arm_vsubq_m_n_u8): Likewise.
4556         (__arm_vsubq_m_n_u32): Likewise.
4557         (__arm_vsubq_m_n_u16): Likewise.
4558         (vqdmladhq_m): Define polymorphic variant.
4559         (vqdmladhxq_m): Likewise.
4560         (vqdmlsdhq_m): Likewise.
4561         (vqdmlsdhxq_m): Likewise.
4562         (vabdq_m): Likewise.
4563         (vandq_m): Likewise.
4564         (vbicq_m): Likewise.
4565         (vbrsrq_m_n): Likewise.
4566         (vcaddq_rot270_m): Likewise.
4567         (vcaddq_rot90_m): Likewise.
4568         (veorq_m): Likewise.
4569         (vmaxq_m): Likewise.
4570         (vminq_m): Likewise.
4571         (vmladavaq_p): Likewise.
4572         (vmlaq_m_n): Likewise.
4573         (vmlasq_m_n): Likewise.
4574         (vmulhq_m): Likewise.
4575         (vmullbq_int_m): Likewise.
4576         (vmulltq_int_m): Likewise.
4577         (vornq_m): Likewise.
4578         (vorrq_m): Likewise.
4579         (vqdmlahq_m_n): Likewise.
4580         (vqrdmlahq_m_n): Likewise.
4581         (vqrdmlashq_m_n): Likewise.
4582         (vqrshlq_m): Likewise.
4583         (vqshlq_m_n): Likewise.
4584         (vqshlq_m): Likewise.
4585         (vrhaddq_m): Likewise.
4586         (vrmulhq_m): Likewise.
4587         (vrshlq_m): Likewise.
4588         (vrshrq_m_n): Likewise.
4589         (vshlq_m_n): Likewise.
4590         (vshrq_m_n): Likewise.
4591         (vsliq_m): Likewise.
4592         (vaddq_m_n): Likewise.
4593         (vaddq_m): Likewise.
4594         (vhaddq_m_n): Likewise.
4595         (vhaddq_m): Likewise.
4596         (vhcaddq_rot270_m): Likewise.
4597         (vhcaddq_rot90_m): Likewise.
4598         (vhsubq_m): Likewise.
4599         (vhsubq_m_n): Likewise.
4600         (vmulq_m_n): Likewise.
4601         (vmulq_m): Likewise.
4602         (vqaddq_m_n): Likewise.
4603         (vqaddq_m): Likewise.
4604         (vqdmulhq_m_n): Likewise.
4605         (vqdmulhq_m): Likewise.
4606         (vsubq_m_n): Likewise.
4607         (vsliq_m_n): Likewise.
4608         (vqsubq_m_n): Likewise.
4609         (vqsubq_m): Likewise.
4610         (vqrdmulhq_m): Likewise.
4611         (vqrdmulhq_m_n): Likewise.
4612         (vqrdmlsdhxq_m): Likewise.
4613         (vqrdmlsdhq_m): Likewise.
4614         (vqrdmladhq_m): Likewise.
4615         (vqrdmladhxq_m): Likewise.
4616         (vmlsdavaxq_p): Likewise.
4617         (vmlsdavaq_p): Likewise.
4618         (vmladavaxq_p): Likewise.
4619         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
4620         builtin qualifier.
4621         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
4622         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
4623         (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
4624         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
4625         * config/arm/mve.md (VHSUBQ_M): Define iterators.
4626         (VSLIQ_M_N): Likewise.
4627         (VQRDMLAHQ_M_N): Likewise.
4628         (VRSHLQ_M): Likewise.
4629         (VMINQ_M): Likewise.
4630         (VMULLBQ_INT_M): Likewise.
4631         (VMULHQ_M): Likewise.
4632         (VMULQ_M): Likewise.
4633         (VHSUBQ_M_N): Likewise.
4634         (VHADDQ_M_N): Likewise.
4635         (VORRQ_M): Likewise.
4636         (VRMULHQ_M): Likewise.
4637         (VQADDQ_M): Likewise.
4638         (VRSHRQ_M_N): Likewise.
4639         (VQSUBQ_M_N): Likewise.
4640         (VADDQ_M): Likewise.
4641         (VORNQ_M): Likewise.
4642         (VQDMLAHQ_M_N): Likewise.
4643         (VRHADDQ_M): Likewise.
4644         (VQSHLQ_M): Likewise.
4645         (VANDQ_M): Likewise.
4646         (VBICQ_M): Likewise.
4647         (VSHLQ_M_N): Likewise.
4648         (VCADDQ_ROT270_M): Likewise.
4649         (VQRSHLQ_M): Likewise.
4650         (VQADDQ_M_N): Likewise.
4651         (VADDQ_M_N): Likewise.
4652         (VMAXQ_M): Likewise.
4653         (VQSUBQ_M): Likewise.
4654         (VMLASQ_M_N): Likewise.
4655         (VMLADAVAQ_P): Likewise.
4656         (VBRSRQ_M_N): Likewise.
4657         (VMULQ_M_N): Likewise.
4658         (VCADDQ_ROT90_M): Likewise.
4659         (VMULLTQ_INT_M): Likewise.
4660         (VEORQ_M): Likewise.
4661         (VSHRQ_M_N): Likewise.
4662         (VSUBQ_M_N): Likewise.
4663         (VHADDQ_M): Likewise.
4664         (VABDQ_M): Likewise.
4665         (VQRDMLASHQ_M_N): Likewise.
4666         (VMLAQ_M_N): Likewise.
4667         (VQSHLQ_M_N): Likewise.
4668         (mve_vabdq_m_<supf><mode>): Define RTL pattern.
4669         (mve_vaddq_m_n_<supf><mode>): Likewise.
4670         (mve_vaddq_m_<supf><mode>): Likewise.
4671         (mve_vandq_m_<supf><mode>): Likewise.
4672         (mve_vbicq_m_<supf><mode>): Likewise.
4673         (mve_vbrsrq_m_n_<supf><mode>): Likewise.
4674         (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
4675         (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
4676         (mve_veorq_m_<supf><mode>): Likewise.
4677         (mve_vhaddq_m_n_<supf><mode>): Likewise.
4678         (mve_vhaddq_m_<supf><mode>): Likewise.
4679         (mve_vhsubq_m_n_<supf><mode>): Likewise.
4680         (mve_vhsubq_m_<supf><mode>): Likewise.
4681         (mve_vmaxq_m_<supf><mode>): Likewise.
4682         (mve_vminq_m_<supf><mode>): Likewise.
4683         (mve_vmladavaq_p_<supf><mode>): Likewise.
4684         (mve_vmlaq_m_n_<supf><mode>): Likewise.
4685         (mve_vmlasq_m_n_<supf><mode>): Likewise.
4686         (mve_vmulhq_m_<supf><mode>): Likewise.
4687         (mve_vmullbq_int_m_<supf><mode>): Likewise.
4688         (mve_vmulltq_int_m_<supf><mode>): Likewise.
4689         (mve_vmulq_m_n_<supf><mode>): Likewise.
4690         (mve_vmulq_m_<supf><mode>): Likewise.
4691         (mve_vornq_m_<supf><mode>): Likewise.
4692         (mve_vorrq_m_<supf><mode>): Likewise.
4693         (mve_vqaddq_m_n_<supf><mode>): Likewise.
4694         (mve_vqaddq_m_<supf><mode>): Likewise.
4695         (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
4696         (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
4697         (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
4698         (mve_vqrshlq_m_<supf><mode>): Likewise.
4699         (mve_vqshlq_m_n_<supf><mode>): Likewise.
4700         (mve_vqshlq_m_<supf><mode>): Likewise.
4701         (mve_vqsubq_m_n_<supf><mode>): Likewise.
4702         (mve_vqsubq_m_<supf><mode>): Likewise.
4703         (mve_vrhaddq_m_<supf><mode>): Likewise.
4704         (mve_vrmulhq_m_<supf><mode>): Likewise.
4705         (mve_vrshlq_m_<supf><mode>): Likewise.
4706         (mve_vrshrq_m_n_<supf><mode>): Likewise.
4707         (mve_vshlq_m_n_<supf><mode>): Likewise.
4708         (mve_vshrq_m_n_<supf><mode>): Likewise.
4709         (mve_vsliq_m_n_<supf><mode>): Likewise.
4710         (mve_vsubq_m_n_<supf><mode>): Likewise.
4711         (mve_vhcaddq_rot270_m_s<mode>): Likewise.
4712         (mve_vhcaddq_rot90_m_s<mode>): Likewise.
4713         (mve_vmladavaxq_p_s<mode>): Likewise.
4714         (mve_vmlsdavaq_p_s<mode>): Likewise.
4715         (mve_vmlsdavaxq_p_s<mode>): Likewise.
4716         (mve_vqdmladhq_m_s<mode>): Likewise.
4717         (mve_vqdmladhxq_m_s<mode>): Likewise.
4718         (mve_vqdmlsdhq_m_s<mode>): Likewise.
4719         (mve_vqdmlsdhxq_m_s<mode>): Likewise.
4720         (mve_vqdmulhq_m_n_s<mode>): Likewise.
4721         (mve_vqdmulhq_m_s<mode>): Likewise.
4722         (mve_vqrdmladhq_m_s<mode>): Likewise.
4723         (mve_vqrdmladhxq_m_s<mode>): Likewise.
4724         (mve_vqrdmlsdhq_m_s<mode>): Likewise.
4725         (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
4726         (mve_vqrdmulhq_m_n_s<mode>): Likewise.
4727         (mve_vqrdmulhq_m_s<mode>): Likewise.
4728
4729 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4730             Mihail Ionescu  <mihail.ionescu@arm.com>
4731             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4732
4733         * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
4734         Define builtin qualifier.
4735         (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
4736         (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
4737         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
4738         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
4739         (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
4740         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
4741         (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
4742         * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
4743         (vsubq_m_s8): Likewise.
4744         (vcvtq_m_n_f16_u16): Likewise.
4745         (vqshluq_m_n_s8): Likewise.
4746         (vabavq_p_s8): Likewise.
4747         (vsriq_m_n_u8): Likewise.
4748         (vshlq_m_u8): Likewise.
4749         (vsubq_m_u8): Likewise.
4750         (vabavq_p_u8): Likewise.
4751         (vshlq_m_s8): Likewise.
4752         (vcvtq_m_n_f16_s16): Likewise.
4753         (vsriq_m_n_s16): Likewise.
4754         (vsubq_m_s16): Likewise.
4755         (vcvtq_m_n_f32_u32): Likewise.
4756         (vqshluq_m_n_s16): Likewise.
4757         (vabavq_p_s16): Likewise.
4758         (vsriq_m_n_u16): Likewise.
4759         (vshlq_m_u16): Likewise.
4760         (vsubq_m_u16): Likewise.
4761         (vabavq_p_u16): Likewise.
4762         (vshlq_m_s16): Likewise.
4763         (vcvtq_m_n_f32_s32): Likewise.
4764         (vsriq_m_n_s32): Likewise.
4765         (vsubq_m_s32): Likewise.
4766         (vqshluq_m_n_s32): Likewise.
4767         (vabavq_p_s32): Likewise.
4768         (vsriq_m_n_u32): Likewise.
4769         (vshlq_m_u32): Likewise.
4770         (vsubq_m_u32): Likewise.
4771         (vabavq_p_u32): Likewise.
4772         (vshlq_m_s32): Likewise.
4773         (__arm_vsriq_m_n_s8): Define intrinsic.
4774         (__arm_vsubq_m_s8): Likewise.
4775         (__arm_vqshluq_m_n_s8): Likewise.
4776         (__arm_vabavq_p_s8): Likewise.
4777         (__arm_vsriq_m_n_u8): Likewise.
4778         (__arm_vshlq_m_u8): Likewise.
4779         (__arm_vsubq_m_u8): Likewise.
4780         (__arm_vabavq_p_u8): Likewise.
4781         (__arm_vshlq_m_s8): Likewise.
4782         (__arm_vsriq_m_n_s16): Likewise.
4783         (__arm_vsubq_m_s16): Likewise.
4784         (__arm_vqshluq_m_n_s16): Likewise.
4785         (__arm_vabavq_p_s16): Likewise.
4786         (__arm_vsriq_m_n_u16): Likewise.
4787         (__arm_vshlq_m_u16): Likewise.
4788         (__arm_vsubq_m_u16): Likewise.
4789         (__arm_vabavq_p_u16): Likewise.
4790         (__arm_vshlq_m_s16): Likewise.
4791         (__arm_vsriq_m_n_s32): Likewise.
4792         (__arm_vsubq_m_s32): Likewise.
4793         (__arm_vqshluq_m_n_s32): Likewise.
4794         (__arm_vabavq_p_s32): Likewise.
4795         (__arm_vsriq_m_n_u32): Likewise.
4796         (__arm_vshlq_m_u32): Likewise.
4797         (__arm_vsubq_m_u32): Likewise.
4798         (__arm_vabavq_p_u32): Likewise.
4799         (__arm_vshlq_m_s32): Likewise.
4800         (__arm_vcvtq_m_n_f16_u16): Likewise.
4801         (__arm_vcvtq_m_n_f16_s16): Likewise.
4802         (__arm_vcvtq_m_n_f32_u32): Likewise.
4803         (__arm_vcvtq_m_n_f32_s32): Likewise.
4804         (vcvtq_m_n): Define polymorphic variant.
4805         (vqshluq_m_n): Likewise.
4806         (vshlq_m): Likewise.
4807         (vsriq_m_n): Likewise.
4808         (vsubq_m): Likewise.
4809         (vabavq_p): Likewise.
4810         * config/arm/arm_mve_builtins.def
4811         (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
4812         (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
4813         (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
4814         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
4815         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
4816         (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
4817         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
4818         (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
4819         * config/arm/mve.md (VABAVQ_P): Define iterator.
4820         (VSHLQ_M): Likewise.
4821         (VSRIQ_M_N): Likewise.
4822         (VSUBQ_M): Likewise.
4823         (VCVTQ_M_N_TO_F): Likewise.
4824         (mve_vabavq_p_<supf><mode>): Define RTL pattern.
4825         (mve_vqshluq_m_n_s<mode>): Likewise.
4826         (mve_vshlq_m_<supf><mode>): Likewise.
4827         (mve_vsriq_m_n_<supf><mode>): Likewise.
4828         (mve_vsubq_m_<supf><mode>): Likewise.
4829         (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
4830
4831 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4832             Mihail Ionescu  <mihail.ionescu@arm.com>
4833             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4834
4835         * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
4836         (vrmlsldavhaq_s32): Likewise.
4837         (vrmlsldavhaxq_s32): Likewise.
4838         (vaddlvaq_p_s32): Likewise.
4839         (vcvtbq_m_f16_f32): Likewise.
4840         (vcvtbq_m_f32_f16): Likewise.
4841         (vcvttq_m_f16_f32): Likewise.
4842         (vcvttq_m_f32_f16): Likewise.
4843         (vrev16q_m_s8): Likewise.
4844         (vrev32q_m_f16): Likewise.
4845         (vrmlaldavhq_p_s32): Likewise.
4846         (vrmlaldavhxq_p_s32): Likewise.
4847         (vrmlsldavhq_p_s32): Likewise.
4848         (vrmlsldavhxq_p_s32): Likewise.
4849         (vaddlvaq_p_u32): Likewise.
4850         (vrev16q_m_u8): Likewise.
4851         (vrmlaldavhq_p_u32): Likewise.
4852         (vmvnq_m_n_s16): Likewise.
4853         (vorrq_m_n_s16): Likewise.
4854         (vqrshrntq_n_s16): Likewise.
4855         (vqshrnbq_n_s16): Likewise.
4856         (vqshrntq_n_s16): Likewise.
4857         (vrshrnbq_n_s16): Likewise.
4858         (vrshrntq_n_s16): Likewise.
4859         (vshrnbq_n_s16): Likewise.
4860         (vshrntq_n_s16): Likewise.
4861         (vcmlaq_f16): Likewise.
4862         (vcmlaq_rot180_f16): Likewise.
4863         (vcmlaq_rot270_f16): Likewise.
4864         (vcmlaq_rot90_f16): Likewise.
4865         (vfmaq_f16): Likewise.
4866         (vfmaq_n_f16): Likewise.
4867         (vfmasq_n_f16): Likewise.
4868         (vfmsq_f16): Likewise.
4869         (vmlaldavaq_s16): Likewise.
4870         (vmlaldavaxq_s16): Likewise.
4871         (vmlsldavaq_s16): Likewise.
4872         (vmlsldavaxq_s16): Likewise.
4873         (vabsq_m_f16): Likewise.
4874         (vcvtmq_m_s16_f16): Likewise.
4875         (vcvtnq_m_s16_f16): Likewise.
4876         (vcvtpq_m_s16_f16): Likewise.
4877         (vcvtq_m_s16_f16): Likewise.
4878         (vdupq_m_n_f16): Likewise.
4879         (vmaxnmaq_m_f16): Likewise.
4880         (vmaxnmavq_p_f16): Likewise.
4881         (vmaxnmvq_p_f16): Likewise.
4882         (vminnmaq_m_f16): Likewise.
4883         (vminnmavq_p_f16): Likewise.
4884         (vminnmvq_p_f16): Likewise.
4885         (vmlaldavq_p_s16): Likewise.
4886         (vmlaldavxq_p_s16): Likewise.
4887         (vmlsldavq_p_s16): Likewise.
4888         (vmlsldavxq_p_s16): Likewise.
4889         (vmovlbq_m_s8): Likewise.
4890         (vmovltq_m_s8): Likewise.
4891         (vmovnbq_m_s16): Likewise.
4892         (vmovntq_m_s16): Likewise.
4893         (vnegq_m_f16): Likewise.
4894         (vpselq_f16): Likewise.
4895         (vqmovnbq_m_s16): Likewise.
4896         (vqmovntq_m_s16): Likewise.
4897         (vrev32q_m_s8): Likewise.
4898         (vrev64q_m_f16): Likewise.
4899         (vrndaq_m_f16): Likewise.
4900         (vrndmq_m_f16): Likewise.
4901         (vrndnq_m_f16): Likewise.
4902         (vrndpq_m_f16): Likewise.
4903         (vrndq_m_f16): Likewise.
4904         (vrndxq_m_f16): Likewise.
4905         (vcmpeqq_m_n_f16): Likewise.
4906         (vcmpgeq_m_f16): Likewise.
4907         (vcmpgeq_m_n_f16): Likewise.
4908         (vcmpgtq_m_f16): Likewise.
4909         (vcmpgtq_m_n_f16): Likewise.
4910         (vcmpleq_m_f16): Likewise.
4911         (vcmpleq_m_n_f16): Likewise.
4912         (vcmpltq_m_f16): Likewise.
4913         (vcmpltq_m_n_f16): Likewise.
4914         (vcmpneq_m_f16): Likewise.
4915         (vcmpneq_m_n_f16): Likewise.
4916         (vmvnq_m_n_u16): Likewise.
4917         (vorrq_m_n_u16): Likewise.
4918         (vqrshruntq_n_s16): Likewise.
4919         (vqshrunbq_n_s16): Likewise.
4920         (vqshruntq_n_s16): Likewise.
4921         (vcvtmq_m_u16_f16): Likewise.
4922         (vcvtnq_m_u16_f16): Likewise.
4923         (vcvtpq_m_u16_f16): Likewise.
4924         (vcvtq_m_u16_f16): Likewise.
4925         (vqmovunbq_m_s16): Likewise.
4926         (vqmovuntq_m_s16): Likewise.
4927         (vqrshrntq_n_u16): Likewise.
4928         (vqshrnbq_n_u16): Likewise.
4929         (vqshrntq_n_u16): Likewise.
4930         (vrshrnbq_n_u16): Likewise.
4931         (vrshrntq_n_u16): Likewise.
4932         (vshrnbq_n_u16): Likewise.
4933         (vshrntq_n_u16): Likewise.
4934         (vmlaldavaq_u16): Likewise.
4935         (vmlaldavaxq_u16): Likewise.
4936         (vmlaldavq_p_u16): Likewise.
4937         (vmlaldavxq_p_u16): Likewise.
4938         (vmovlbq_m_u8): Likewise.
4939         (vmovltq_m_u8): Likewise.
4940         (vmovnbq_m_u16): Likewise.
4941         (vmovntq_m_u16): Likewise.
4942         (vqmovnbq_m_u16): Likewise.
4943         (vqmovntq_m_u16): Likewise.
4944         (vrev32q_m_u8): Likewise.
4945         (vmvnq_m_n_s32): Likewise.
4946         (vorrq_m_n_s32): Likewise.
4947         (vqrshrntq_n_s32): Likewise.
4948         (vqshrnbq_n_s32): Likewise.
4949         (vqshrntq_n_s32): Likewise.
4950         (vrshrnbq_n_s32): Likewise.
4951         (vrshrntq_n_s32): Likewise.
4952         (vshrnbq_n_s32): Likewise.
4953         (vshrntq_n_s32): Likewise.
4954         (vcmlaq_f32): Likewise.
4955         (vcmlaq_rot180_f32): Likewise.
4956         (vcmlaq_rot270_f32): Likewise.
4957         (vcmlaq_rot90_f32): Likewise.
4958         (vfmaq_f32): Likewise.
4959         (vfmaq_n_f32): Likewise.
4960         (vfmasq_n_f32): Likewise.
4961         (vfmsq_f32): Likewise.
4962         (vmlaldavaq_s32): Likewise.
4963         (vmlaldavaxq_s32): Likewise.
4964         (vmlsldavaq_s32): Likewise.
4965         (vmlsldavaxq_s32): Likewise.
4966         (vabsq_m_f32): Likewise.
4967         (vcvtmq_m_s32_f32): Likewise.
4968         (vcvtnq_m_s32_f32): Likewise.
4969         (vcvtpq_m_s32_f32): Likewise.
4970         (vcvtq_m_s32_f32): Likewise.
4971         (vdupq_m_n_f32): Likewise.
4972         (vmaxnmaq_m_f32): Likewise.
4973         (vmaxnmavq_p_f32): Likewise.
4974         (vmaxnmvq_p_f32): Likewise.
4975         (vminnmaq_m_f32): Likewise.
4976         (vminnmavq_p_f32): Likewise.
4977         (vminnmvq_p_f32): Likewise.
4978         (vmlaldavq_p_s32): Likewise.
4979         (vmlaldavxq_p_s32): Likewise.
4980         (vmlsldavq_p_s32): Likewise.
4981         (vmlsldavxq_p_s32): Likewise.
4982         (vmovlbq_m_s16): Likewise.
4983         (vmovltq_m_s16): Likewise.
4984         (vmovnbq_m_s32): Likewise.
4985         (vmovntq_m_s32): Likewise.
4986         (vnegq_m_f32): Likewise.
4987         (vpselq_f32): Likewise.
4988         (vqmovnbq_m_s32): Likewise.
4989         (vqmovntq_m_s32): Likewise.
4990         (vrev32q_m_s16): Likewise.
4991         (vrev64q_m_f32): Likewise.
4992         (vrndaq_m_f32): Likewise.
4993         (vrndmq_m_f32): Likewise.
4994         (vrndnq_m_f32): Likewise.
4995         (vrndpq_m_f32): Likewise.
4996         (vrndq_m_f32): Likewise.
4997         (vrndxq_m_f32): Likewise.
4998         (vcmpeqq_m_n_f32): Likewise.
4999         (vcmpgeq_m_f32): Likewise.
5000         (vcmpgeq_m_n_f32): Likewise.
5001         (vcmpgtq_m_f32): Likewise.
5002         (vcmpgtq_m_n_f32): Likewise.
5003         (vcmpleq_m_f32): Likewise.
5004         (vcmpleq_m_n_f32): Likewise.
5005         (vcmpltq_m_f32): Likewise.
5006         (vcmpltq_m_n_f32): Likewise.
5007         (vcmpneq_m_f32): Likewise.
5008         (vcmpneq_m_n_f32): Likewise.
5009         (vmvnq_m_n_u32): Likewise.
5010         (vorrq_m_n_u32): Likewise.
5011         (vqrshruntq_n_s32): Likewise.
5012         (vqshrunbq_n_s32): Likewise.
5013         (vqshruntq_n_s32): Likewise.
5014         (vcvtmq_m_u32_f32): Likewise.
5015         (vcvtnq_m_u32_f32): Likewise.
5016         (vcvtpq_m_u32_f32): Likewise.
5017         (vcvtq_m_u32_f32): Likewise.
5018         (vqmovunbq_m_s32): Likewise.
5019         (vqmovuntq_m_s32): Likewise.
5020         (vqrshrntq_n_u32): Likewise.
5021         (vqshrnbq_n_u32): Likewise.
5022         (vqshrntq_n_u32): Likewise.
5023         (vrshrnbq_n_u32): Likewise.
5024         (vrshrntq_n_u32): Likewise.
5025         (vshrnbq_n_u32): Likewise.
5026         (vshrntq_n_u32): Likewise.
5027         (vmlaldavaq_u32): Likewise.
5028         (vmlaldavaxq_u32): Likewise.
5029         (vmlaldavq_p_u32): Likewise.
5030         (vmlaldavxq_p_u32): Likewise.
5031         (vmovlbq_m_u16): Likewise.
5032         (vmovltq_m_u16): Likewise.
5033         (vmovnbq_m_u32): Likewise.
5034         (vmovntq_m_u32): Likewise.
5035         (vqmovnbq_m_u32): Likewise.
5036         (vqmovntq_m_u32): Likewise.
5037         (vrev32q_m_u16): Likewise.
5038         (__arm_vrmlaldavhaxq_s32): Define intrinsic.
5039         (__arm_vrmlsldavhaq_s32): Likewise.
5040         (__arm_vrmlsldavhaxq_s32): Likewise.
5041         (__arm_vaddlvaq_p_s32): Likewise.
5042         (__arm_vrev16q_m_s8): Likewise.
5043         (__arm_vrmlaldavhq_p_s32): Likewise.
5044         (__arm_vrmlaldavhxq_p_s32): Likewise.
5045         (__arm_vrmlsldavhq_p_s32): Likewise.
5046         (__arm_vrmlsldavhxq_p_s32): Likewise.
5047         (__arm_vaddlvaq_p_u32): Likewise.
5048         (__arm_vrev16q_m_u8): Likewise.
5049         (__arm_vrmlaldavhq_p_u32): Likewise.
5050         (__arm_vmvnq_m_n_s16): Likewise.
5051         (__arm_vorrq_m_n_s16): Likewise.
5052         (__arm_vqrshrntq_n_s16): Likewise.
5053         (__arm_vqshrnbq_n_s16): Likewise.
5054         (__arm_vqshrntq_n_s16): Likewise.
5055         (__arm_vrshrnbq_n_s16): Likewise.
5056         (__arm_vrshrntq_n_s16): Likewise.
5057         (__arm_vshrnbq_n_s16): Likewise.
5058         (__arm_vshrntq_n_s16): Likewise.
5059         (__arm_vmlaldavaq_s16): Likewise.
5060         (__arm_vmlaldavaxq_s16): Likewise.
5061         (__arm_vmlsldavaq_s16): Likewise.
5062         (__arm_vmlsldavaxq_s16): Likewise.
5063         (__arm_vmlaldavq_p_s16): Likewise.
5064         (__arm_vmlaldavxq_p_s16): Likewise.
5065         (__arm_vmlsldavq_p_s16): Likewise.
5066         (__arm_vmlsldavxq_p_s16): Likewise.
5067         (__arm_vmovlbq_m_s8): Likewise.
5068         (__arm_vmovltq_m_s8): Likewise.
5069         (__arm_vmovnbq_m_s16): Likewise.
5070         (__arm_vmovntq_m_s16): Likewise.
5071         (__arm_vqmovnbq_m_s16): Likewise.
5072         (__arm_vqmovntq_m_s16): Likewise.
5073         (__arm_vrev32q_m_s8): Likewise.
5074         (__arm_vmvnq_m_n_u16): Likewise.
5075         (__arm_vorrq_m_n_u16): Likewise.
5076         (__arm_vqrshruntq_n_s16): Likewise.
5077         (__arm_vqshrunbq_n_s16): Likewise.
5078         (__arm_vqshruntq_n_s16): Likewise.
5079         (__arm_vqmovunbq_m_s16): Likewise.
5080         (__arm_vqmovuntq_m_s16): Likewise.
5081         (__arm_vqrshrntq_n_u16): Likewise.
5082         (__arm_vqshrnbq_n_u16): Likewise.
5083         (__arm_vqshrntq_n_u16): Likewise.
5084         (__arm_vrshrnbq_n_u16): Likewise.
5085         (__arm_vrshrntq_n_u16): Likewise.
5086         (__arm_vshrnbq_n_u16): Likewise.
5087         (__arm_vshrntq_n_u16): Likewise.
5088         (__arm_vmlaldavaq_u16): Likewise.
5089         (__arm_vmlaldavaxq_u16): Likewise.
5090         (__arm_vmlaldavq_p_u16): Likewise.
5091         (__arm_vmlaldavxq_p_u16): Likewise.
5092         (__arm_vmovlbq_m_u8): Likewise.
5093         (__arm_vmovltq_m_u8): Likewise.
5094         (__arm_vmovnbq_m_u16): Likewise.
5095         (__arm_vmovntq_m_u16): Likewise.
5096         (__arm_vqmovnbq_m_u16): Likewise.
5097         (__arm_vqmovntq_m_u16): Likewise.
5098         (__arm_vrev32q_m_u8): Likewise.
5099         (__arm_vmvnq_m_n_s32): Likewise.
5100         (__arm_vorrq_m_n_s32): Likewise.
5101         (__arm_vqrshrntq_n_s32): Likewise.
5102         (__arm_vqshrnbq_n_s32): Likewise.
5103         (__arm_vqshrntq_n_s32): Likewise.
5104         (__arm_vrshrnbq_n_s32): Likewise.
5105         (__arm_vrshrntq_n_s32): Likewise.
5106         (__arm_vshrnbq_n_s32): Likewise.
5107         (__arm_vshrntq_n_s32): Likewise.
5108         (__arm_vmlaldavaq_s32): Likewise.
5109         (__arm_vmlaldavaxq_s32): Likewise.
5110         (__arm_vmlsldavaq_s32): Likewise.
5111         (__arm_vmlsldavaxq_s32): Likewise.
5112         (__arm_vmlaldavq_p_s32): Likewise.
5113         (__arm_vmlaldavxq_p_s32): Likewise.
5114         (__arm_vmlsldavq_p_s32): Likewise.
5115         (__arm_vmlsldavxq_p_s32): Likewise.
5116         (__arm_vmovlbq_m_s16): Likewise.
5117         (__arm_vmovltq_m_s16): Likewise.
5118         (__arm_vmovnbq_m_s32): Likewise.
5119         (__arm_vmovntq_m_s32): Likewise.
5120         (__arm_vqmovnbq_m_s32): Likewise.
5121         (__arm_vqmovntq_m_s32): Likewise.
5122         (__arm_vrev32q_m_s16): Likewise.
5123         (__arm_vmvnq_m_n_u32): Likewise.
5124         (__arm_vorrq_m_n_u32): Likewise.
5125         (__arm_vqrshruntq_n_s32): Likewise.
5126         (__arm_vqshrunbq_n_s32): Likewise.
5127         (__arm_vqshruntq_n_s32): Likewise.
5128         (__arm_vqmovunbq_m_s32): Likewise.
5129         (__arm_vqmovuntq_m_s32): Likewise.
5130         (__arm_vqrshrntq_n_u32): Likewise.
5131         (__arm_vqshrnbq_n_u32): Likewise.
5132         (__arm_vqshrntq_n_u32): Likewise.
5133         (__arm_vrshrnbq_n_u32): Likewise.
5134         (__arm_vrshrntq_n_u32): Likewise.
5135         (__arm_vshrnbq_n_u32): Likewise.
5136         (__arm_vshrntq_n_u32): Likewise.
5137         (__arm_vmlaldavaq_u32): Likewise.
5138         (__arm_vmlaldavaxq_u32): Likewise.
5139         (__arm_vmlaldavq_p_u32): Likewise.
5140         (__arm_vmlaldavxq_p_u32): Likewise.
5141         (__arm_vmovlbq_m_u16): Likewise.
5142         (__arm_vmovltq_m_u16): Likewise.
5143         (__arm_vmovnbq_m_u32): Likewise.
5144         (__arm_vmovntq_m_u32): Likewise.
5145         (__arm_vqmovnbq_m_u32): Likewise.
5146         (__arm_vqmovntq_m_u32): Likewise.
5147         (__arm_vrev32q_m_u16): Likewise.
5148         (__arm_vcvtbq_m_f16_f32): Likewise.
5149         (__arm_vcvtbq_m_f32_f16): Likewise.
5150         (__arm_vcvttq_m_f16_f32): Likewise.
5151         (__arm_vcvttq_m_f32_f16): Likewise.
5152         (__arm_vrev32q_m_f16): Likewise.
5153         (__arm_vcmlaq_f16): Likewise.
5154         (__arm_vcmlaq_rot180_f16): Likewise.
5155         (__arm_vcmlaq_rot270_f16): Likewise.
5156         (__arm_vcmlaq_rot90_f16): Likewise.
5157         (__arm_vfmaq_f16): Likewise.
5158         (__arm_vfmaq_n_f16): Likewise.
5159         (__arm_vfmasq_n_f16): Likewise.
5160         (__arm_vfmsq_f16): Likewise.
5161         (__arm_vabsq_m_f16): Likewise.
5162         (__arm_vcvtmq_m_s16_f16): Likewise.
5163         (__arm_vcvtnq_m_s16_f16): Likewise.
5164         (__arm_vcvtpq_m_s16_f16): Likewise.
5165         (__arm_vcvtq_m_s16_f16): Likewise.
5166         (__arm_vdupq_m_n_f16): Likewise.
5167         (__arm_vmaxnmaq_m_f16): Likewise.
5168         (__arm_vmaxnmavq_p_f16): Likewise.
5169         (__arm_vmaxnmvq_p_f16): Likewise.
5170         (__arm_vminnmaq_m_f16): Likewise.
5171         (__arm_vminnmavq_p_f16): Likewise.
5172         (__arm_vminnmvq_p_f16): Likewise.
5173         (__arm_vnegq_m_f16): Likewise.
5174         (__arm_vpselq_f16): Likewise.
5175         (__arm_vrev64q_m_f16): Likewise.
5176         (__arm_vrndaq_m_f16): Likewise.
5177         (__arm_vrndmq_m_f16): Likewise.
5178         (__arm_vrndnq_m_f16): Likewise.
5179         (__arm_vrndpq_m_f16): Likewise.
5180         (__arm_vrndq_m_f16): Likewise.
5181         (__arm_vrndxq_m_f16): Likewise.
5182         (__arm_vcmpeqq_m_n_f16): Likewise.
5183         (__arm_vcmpgeq_m_f16): Likewise.
5184         (__arm_vcmpgeq_m_n_f16): Likewise.
5185         (__arm_vcmpgtq_m_f16): Likewise.
5186         (__arm_vcmpgtq_m_n_f16): Likewise.
5187         (__arm_vcmpleq_m_f16): Likewise.
5188         (__arm_vcmpleq_m_n_f16): Likewise.
5189         (__arm_vcmpltq_m_f16): Likewise.
5190         (__arm_vcmpltq_m_n_f16): Likewise.
5191         (__arm_vcmpneq_m_f16): Likewise.
5192         (__arm_vcmpneq_m_n_f16): Likewise.
5193         (__arm_vcvtmq_m_u16_f16): Likewise.
5194         (__arm_vcvtnq_m_u16_f16): Likewise.
5195         (__arm_vcvtpq_m_u16_f16): Likewise.
5196         (__arm_vcvtq_m_u16_f16): Likewise.
5197         (__arm_vcmlaq_f32): Likewise.
5198         (__arm_vcmlaq_rot180_f32): Likewise.
5199         (__arm_vcmlaq_rot270_f32): Likewise.
5200         (__arm_vcmlaq_rot90_f32): Likewise.
5201         (__arm_vfmaq_f32): Likewise.
5202         (__arm_vfmaq_n_f32): Likewise.
5203         (__arm_vfmasq_n_f32): Likewise.
5204         (__arm_vfmsq_f32): Likewise.
5205         (__arm_vabsq_m_f32): Likewise.
5206         (__arm_vcvtmq_m_s32_f32): Likewise.
5207         (__arm_vcvtnq_m_s32_f32): Likewise.
5208         (__arm_vcvtpq_m_s32_f32): Likewise.
5209         (__arm_vcvtq_m_s32_f32): Likewise.
5210         (__arm_vdupq_m_n_f32): Likewise.
5211         (__arm_vmaxnmaq_m_f32): Likewise.
5212         (__arm_vmaxnmavq_p_f32): Likewise.
5213         (__arm_vmaxnmvq_p_f32): Likewise.
5214         (__arm_vminnmaq_m_f32): Likewise.
5215         (__arm_vminnmavq_p_f32): Likewise.
5216         (__arm_vminnmvq_p_f32): Likewise.
5217         (__arm_vnegq_m_f32): Likewise.
5218         (__arm_vpselq_f32): Likewise.
5219         (__arm_vrev64q_m_f32): Likewise.
5220         (__arm_vrndaq_m_f32): Likewise.
5221         (__arm_vrndmq_m_f32): Likewise.
5222         (__arm_vrndnq_m_f32): Likewise.
5223         (__arm_vrndpq_m_f32): Likewise.
5224         (__arm_vrndq_m_f32): Likewise.
5225         (__arm_vrndxq_m_f32): Likewise.
5226         (__arm_vcmpeqq_m_n_f32): Likewise.
5227         (__arm_vcmpgeq_m_f32): Likewise.
5228         (__arm_vcmpgeq_m_n_f32): Likewise.
5229         (__arm_vcmpgtq_m_f32): Likewise.
5230         (__arm_vcmpgtq_m_n_f32): Likewise.
5231         (__arm_vcmpleq_m_f32): Likewise.
5232         (__arm_vcmpleq_m_n_f32): Likewise.
5233         (__arm_vcmpltq_m_f32): Likewise.
5234         (__arm_vcmpltq_m_n_f32): Likewise.
5235         (__arm_vcmpneq_m_f32): Likewise.
5236         (__arm_vcmpneq_m_n_f32): Likewise.
5237         (__arm_vcvtmq_m_u32_f32): Likewise.
5238         (__arm_vcvtnq_m_u32_f32): Likewise.
5239         (__arm_vcvtpq_m_u32_f32): Likewise.
5240         (__arm_vcvtq_m_u32_f32): Likewise.
5241         (vcvtq_m): Define polymorphic variant.
5242         (vabsq_m): Likewise.
5243         (vcmlaq): Likewise.
5244         (vcmlaq_rot180): Likewise.
5245         (vcmlaq_rot270): Likewise.
5246         (vcmlaq_rot90): Likewise.
5247         (vcmpeqq_m_n): Likewise.
5248         (vcmpgeq_m_n): Likewise.
5249         (vrndxq_m): Likewise.
5250         (vrndq_m): Likewise.
5251         (vrndpq_m): Likewise.
5252         (vcmpgtq_m_n): Likewise.
5253         (vcmpgtq_m): Likewise.
5254         (vcmpleq_m): Likewise.
5255         (vcmpleq_m_n): Likewise.
5256         (vcmpltq_m_n): Likewise.
5257         (vcmpltq_m): Likewise.
5258         (vcmpneq_m): Likewise.
5259         (vcmpneq_m_n): Likewise.
5260         (vcvtbq_m): Likewise.
5261         (vcvttq_m): Likewise.
5262         (vcvtmq_m): Likewise.
5263         (vcvtnq_m): Likewise.
5264         (vcvtpq_m): Likewise.
5265         (vdupq_m_n): Likewise.
5266         (vfmaq_n): Likewise.
5267         (vfmaq): Likewise.
5268         (vfmasq_n): Likewise.
5269         (vfmsq): Likewise.
5270         (vmaxnmaq_m): Likewise.
5271         (vmaxnmavq_m): Likewise.
5272         (vmaxnmvq_m): Likewise.
5273         (vmaxnmavq_p): Likewise.
5274         (vmaxnmvq_p): Likewise.
5275         (vminnmaq_m): Likewise.
5276         (vminnmavq_p): Likewise.
5277         (vminnmvq_p): Likewise.
5278         (vrndnq_m): Likewise.
5279         (vrndaq_m): Likewise.
5280         (vrndmq_m): Likewise.
5281         (vrev64q_m): Likewise.
5282         (vrev32q_m): Likewise.
5283         (vpselq): Likewise.
5284         (vnegq_m): Likewise.
5285         (vcmpgeq_m): Likewise.
5286         (vshrntq_n): Likewise.
5287         (vrshrntq_n): Likewise.
5288         (vmovlbq_m): Likewise.
5289         (vmovnbq_m): Likewise.
5290         (vmovntq_m): Likewise.
5291         (vmvnq_m_n): Likewise.
5292         (vmvnq_m): Likewise.
5293         (vshrnbq_n): Likewise.
5294         (vrshrnbq_n): Likewise.
5295         (vqshruntq_n): Likewise.
5296         (vrev16q_m): Likewise.
5297         (vqshrunbq_n): Likewise.
5298         (vqshrntq_n): Likewise.
5299         (vqrshruntq_n): Likewise.
5300         (vqrshrntq_n): Likewise.
5301         (vqshrnbq_n): Likewise.
5302         (vqmovuntq_m): Likewise.
5303         (vqmovntq_m): Likewise.
5304         (vqmovnbq_m): Likewise.
5305         (vorrq_m_n): Likewise.
5306         (vmovltq_m): Likewise.
5307         (vqmovunbq_m): Likewise.
5308         (vaddlvaq_p): Likewise.
5309         (vmlaldavaq): Likewise.
5310         (vmlaldavaxq): Likewise.
5311         (vmlaldavq_p): Likewise.
5312         (vmlaldavxq_p): Likewise.
5313         (vmlsldavaq): Likewise.
5314         (vmlsldavaxq): Likewise.
5315         (vmlsldavq_p): Likewise.
5316         (vmlsldavxq_p): Likewise.
5317         (vrmlaldavhaxq): Likewise.
5318         (vrmlaldavhq_p): Likewise.
5319         (vrmlaldavhxq_p): Likewise.
5320         (vrmlsldavhaq): Likewise.
5321         (vrmlsldavhaxq): Likewise.
5322         (vrmlsldavhq_p): Likewise.
5323         (vrmlsldavhxq_p): Likewise.
5324         * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
5325         builtin qualifier.
5326         (TERNOP_NONE_NONE_NONE_IMM): Likewise.
5327         (TERNOP_NONE_NONE_NONE_NONE): Likewise.
5328         (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
5329         (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
5330         (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
5331         (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
5332         (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
5333         (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
5334         (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
5335         * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
5336         (MVE_pred3): Likewise.
5337         (MVE_constraint1): Likewise.
5338         (MVE_pred1): Likewise.
5339         (VMLALDAVQ_P): Define iterator.
5340         (VQMOVNBQ_M): Likewise.
5341         (VMOVLTQ_M): Likewise.
5342         (VMOVNBQ_M): Likewise.
5343         (VRSHRNTQ_N): Likewise.
5344         (VORRQ_M_N): Likewise.
5345         (VREV32Q_M): Likewise.
5346         (VREV16Q_M): Likewise.
5347         (VQRSHRNTQ_N): Likewise.
5348         (VMOVNTQ_M): Likewise.
5349         (VMOVLBQ_M): Likewise.
5350         (VMLALDAVAQ): Likewise.
5351         (VQSHRNBQ_N): Likewise.
5352         (VSHRNBQ_N): Likewise.
5353         (VRSHRNBQ_N): Likewise.
5354         (VMLALDAVXQ_P): Likewise.
5355         (VQMOVNTQ_M): Likewise.
5356         (VMVNQ_M_N): Likewise.
5357         (VQSHRNTQ_N): Likewise.
5358         (VMLALDAVAXQ): Likewise.
5359         (VSHRNTQ_N): Likewise.
5360         (VCVTMQ_M): Likewise.
5361         (VCVTNQ_M): Likewise.
5362         (VCVTPQ_M): Likewise.
5363         (VCVTQ_M_N_FROM_F): Likewise.
5364         (VCVTQ_M_FROM_F): Likewise.
5365         (VRMLALDAVHQ_P): Likewise.
5366         (VADDLVAQ_P): Likewise.
5367         (mve_vrndq_m_f<mode>): Define RTL pattern.
5368         (mve_vabsq_m_f<mode>): Likewise.
5369         (mve_vaddlvaq_p_<supf>v4si): Likewise.
5370         (mve_vcmlaq_f<mode>): Likewise.
5371         (mve_vcmlaq_rot180_f<mode>): Likewise.
5372         (mve_vcmlaq_rot270_f<mode>): Likewise.
5373         (mve_vcmlaq_rot90_f<mode>): Likewise.
5374         (mve_vcmpeqq_m_n_f<mode>): Likewise.
5375         (mve_vcmpgeq_m_f<mode>): Likewise.
5376         (mve_vcmpgeq_m_n_f<mode>): Likewise.
5377         (mve_vcmpgtq_m_f<mode>): Likewise.
5378         (mve_vcmpgtq_m_n_f<mode>): Likewise.
5379         (mve_vcmpleq_m_f<mode>): Likewise.
5380         (mve_vcmpleq_m_n_f<mode>): Likewise.
5381         (mve_vcmpltq_m_f<mode>): Likewise.
5382         (mve_vcmpltq_m_n_f<mode>): Likewise.
5383         (mve_vcmpneq_m_f<mode>): Likewise.
5384         (mve_vcmpneq_m_n_f<mode>): Likewise.
5385         (mve_vcvtbq_m_f16_f32v8hf): Likewise.
5386         (mve_vcvtbq_m_f32_f16v4sf): Likewise.
5387         (mve_vcvttq_m_f16_f32v8hf): Likewise.
5388         (mve_vcvttq_m_f32_f16v4sf): Likewise.
5389         (mve_vdupq_m_n_f<mode>): Likewise.
5390         (mve_vfmaq_f<mode>): Likewise.
5391         (mve_vfmaq_n_f<mode>): Likewise.
5392         (mve_vfmasq_n_f<mode>): Likewise.
5393         (mve_vfmsq_f<mode>): Likewise.
5394         (mve_vmaxnmaq_m_f<mode>): Likewise.
5395         (mve_vmaxnmavq_p_f<mode>): Likewise.
5396         (mve_vmaxnmvq_p_f<mode>): Likewise.
5397         (mve_vminnmaq_m_f<mode>): Likewise.
5398         (mve_vminnmavq_p_f<mode>): Likewise.
5399         (mve_vminnmvq_p_f<mode>): Likewise.
5400         (mve_vmlaldavaq_<supf><mode>): Likewise.
5401         (mve_vmlaldavaxq_<supf><mode>): Likewise.
5402         (mve_vmlaldavq_p_<supf><mode>): Likewise.
5403         (mve_vmlaldavxq_p_<supf><mode>): Likewise.
5404         (mve_vmlsldavaq_s<mode>): Likewise.
5405         (mve_vmlsldavaxq_s<mode>): Likewise.
5406         (mve_vmlsldavq_p_s<mode>): Likewise.
5407         (mve_vmlsldavxq_p_s<mode>): Likewise.
5408         (mve_vmovlbq_m_<supf><mode>): Likewise.
5409         (mve_vmovltq_m_<supf><mode>): Likewise.
5410         (mve_vmovnbq_m_<supf><mode>): Likewise.
5411         (mve_vmovntq_m_<supf><mode>): Likewise.
5412         (mve_vmvnq_m_n_<supf><mode>): Likewise.
5413         (mve_vnegq_m_f<mode>): Likewise.
5414         (mve_vorrq_m_n_<supf><mode>): Likewise.
5415         (mve_vpselq_f<mode>): Likewise.
5416         (mve_vqmovnbq_m_<supf><mode>): Likewise.
5417         (mve_vqmovntq_m_<supf><mode>): Likewise.
5418         (mve_vqmovunbq_m_s<mode>): Likewise.
5419         (mve_vqmovuntq_m_s<mode>): Likewise.
5420         (mve_vqrshrntq_n_<supf><mode>): Likewise.
5421         (mve_vqrshruntq_n_s<mode>): Likewise.
5422         (mve_vqshrnbq_n_<supf><mode>): Likewise.
5423         (mve_vqshrntq_n_<supf><mode>): Likewise.
5424         (mve_vqshrunbq_n_s<mode>): Likewise.
5425         (mve_vqshruntq_n_s<mode>): Likewise.
5426         (mve_vrev32q_m_fv8hf): Likewise.
5427         (mve_vrev32q_m_<supf><mode>): Likewise.
5428         (mve_vrev64q_m_f<mode>): Likewise.
5429         (mve_vrmlaldavhaxq_sv4si): Likewise.
5430         (mve_vrmlaldavhxq_p_sv4si): Likewise.
5431         (mve_vrmlsldavhaxq_sv4si): Likewise.
5432         (mve_vrmlsldavhq_p_sv4si): Likewise.
5433         (mve_vrmlsldavhxq_p_sv4si): Likewise.
5434         (mve_vrndaq_m_f<mode>): Likewise.
5435         (mve_vrndmq_m_f<mode>): Likewise.
5436         (mve_vrndnq_m_f<mode>): Likewise.
5437         (mve_vrndpq_m_f<mode>): Likewise.
5438         (mve_vrndxq_m_f<mode>): Likewise.
5439         (mve_vrshrnbq_n_<supf><mode>): Likewise.
5440         (mve_vrshrntq_n_<supf><mode>): Likewise.
5441         (mve_vshrnbq_n_<supf><mode>): Likewise.
5442         (mve_vshrntq_n_<supf><mode>): Likewise.
5443         (mve_vcvtmq_m_<supf><mode>): Likewise.
5444         (mve_vcvtpq_m_<supf><mode>): Likewise.
5445         (mve_vcvtnq_m_<supf><mode>): Likewise.
5446         (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
5447         (mve_vrev16q_m_<supf>v16qi): Likewise.
5448         (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
5449         (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
5450         (mve_vrmlsldavhaq_sv4si): Likewise.
5451
5452 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5453             Mihail Ionescu  <mihail.ionescu@arm.com>
5454             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5455
5456         * config/arm/arm_mve.h (vpselq_u8): Define macro.
5457         (vpselq_s8): Likewise.
5458         (vrev64q_m_u8): Likewise.
5459         (vqrdmlashq_n_u8): Likewise.
5460         (vqrdmlahq_n_u8): Likewise.
5461         (vqdmlahq_n_u8): Likewise.
5462         (vmvnq_m_u8): Likewise.
5463         (vmlasq_n_u8): Likewise.
5464         (vmlaq_n_u8): Likewise.
5465         (vmladavq_p_u8): Likewise.
5466         (vmladavaq_u8): Likewise.
5467         (vminvq_p_u8): Likewise.
5468         (vmaxvq_p_u8): Likewise.
5469         (vdupq_m_n_u8): Likewise.
5470         (vcmpneq_m_u8): Likewise.
5471         (vcmpneq_m_n_u8): Likewise.
5472         (vcmphiq_m_u8): Likewise.
5473         (vcmphiq_m_n_u8): Likewise.
5474         (vcmpeqq_m_u8): Likewise.
5475         (vcmpeqq_m_n_u8): Likewise.
5476         (vcmpcsq_m_u8): Likewise.
5477         (vcmpcsq_m_n_u8): Likewise.
5478         (vclzq_m_u8): Likewise.
5479         (vaddvaq_p_u8): Likewise.
5480         (vsriq_n_u8): Likewise.
5481         (vsliq_n_u8): Likewise.
5482         (vshlq_m_r_u8): Likewise.
5483         (vrshlq_m_n_u8): Likewise.
5484         (vqshlq_m_r_u8): Likewise.
5485         (vqrshlq_m_n_u8): Likewise.
5486         (vminavq_p_s8): Likewise.
5487         (vminaq_m_s8): Likewise.
5488         (vmaxavq_p_s8): Likewise.
5489         (vmaxaq_m_s8): Likewise.
5490         (vcmpneq_m_s8): Likewise.
5491         (vcmpneq_m_n_s8): Likewise.
5492         (vcmpltq_m_s8): Likewise.
5493         (vcmpltq_m_n_s8): Likewise.
5494         (vcmpleq_m_s8): Likewise.
5495         (vcmpleq_m_n_s8): Likewise.
5496         (vcmpgtq_m_s8): Likewise.
5497         (vcmpgtq_m_n_s8): Likewise.
5498         (vcmpgeq_m_s8): Likewise.
5499         (vcmpgeq_m_n_s8): Likewise.
5500         (vcmpeqq_m_s8): Likewise.
5501         (vcmpeqq_m_n_s8): Likewise.
5502         (vshlq_m_r_s8): Likewise.
5503         (vrshlq_m_n_s8): Likewise.
5504         (vrev64q_m_s8): Likewise.
5505         (vqshlq_m_r_s8): Likewise.
5506         (vqrshlq_m_n_s8): Likewise.
5507         (vqnegq_m_s8): Likewise.
5508         (vqabsq_m_s8): Likewise.
5509         (vnegq_m_s8): Likewise.
5510         (vmvnq_m_s8): Likewise.
5511         (vmlsdavxq_p_s8): Likewise.
5512         (vmlsdavq_p_s8): Likewise.
5513         (vmladavxq_p_s8): Likewise.
5514         (vmladavq_p_s8): Likewise.
5515         (vminvq_p_s8): Likewise.
5516         (vmaxvq_p_s8): Likewise.
5517         (vdupq_m_n_s8): Likewise.
5518         (vclzq_m_s8): Likewise.
5519         (vclsq_m_s8): Likewise.
5520         (vaddvaq_p_s8): Likewise.
5521         (vabsq_m_s8): Likewise.
5522         (vqrdmlsdhxq_s8): Likewise.
5523         (vqrdmlsdhq_s8): Likewise.
5524         (vqrdmlashq_n_s8): Likewise.
5525         (vqrdmlahq_n_s8): Likewise.
5526         (vqrdmladhxq_s8): Likewise.
5527         (vqrdmladhq_s8): Likewise.
5528         (vqdmlsdhxq_s8): Likewise.
5529         (vqdmlsdhq_s8): Likewise.
5530         (vqdmlahq_n_s8): Likewise.
5531         (vqdmladhxq_s8): Likewise.
5532         (vqdmladhq_s8): Likewise.
5533         (vmlsdavaxq_s8): Likewise.
5534         (vmlsdavaq_s8): Likewise.
5535         (vmlasq_n_s8): Likewise.
5536         (vmlaq_n_s8): Likewise.
5537         (vmladavaxq_s8): Likewise.
5538         (vmladavaq_s8): Likewise.
5539         (vsriq_n_s8): Likewise.
5540         (vsliq_n_s8): Likewise.
5541         (vpselq_u16): Likewise.
5542         (vpselq_s16): Likewise.
5543         (vrev64q_m_u16): Likewise.
5544         (vqrdmlashq_n_u16): Likewise.
5545         (vqrdmlahq_n_u16): Likewise.
5546         (vqdmlahq_n_u16): Likewise.
5547         (vmvnq_m_u16): Likewise.
5548         (vmlasq_n_u16): Likewise.
5549         (vmlaq_n_u16): Likewise.
5550         (vmladavq_p_u16): Likewise.
5551         (vmladavaq_u16): Likewise.
5552         (vminvq_p_u16): Likewise.
5553         (vmaxvq_p_u16): Likewise.
5554         (vdupq_m_n_u16): Likewise.
5555         (vcmpneq_m_u16): Likewise.
5556         (vcmpneq_m_n_u16): Likewise.
5557         (vcmphiq_m_u16): Likewise.
5558         (vcmphiq_m_n_u16): Likewise.
5559         (vcmpeqq_m_u16): Likewise.
5560         (vcmpeqq_m_n_u16): Likewise.
5561         (vcmpcsq_m_u16): Likewise.
5562         (vcmpcsq_m_n_u16): Likewise.
5563         (vclzq_m_u16): Likewise.
5564         (vaddvaq_p_u16): Likewise.
5565         (vsriq_n_u16): Likewise.
5566         (vsliq_n_u16): Likewise.
5567         (vshlq_m_r_u16): Likewise.
5568         (vrshlq_m_n_u16): Likewise.
5569         (vqshlq_m_r_u16): Likewise.
5570         (vqrshlq_m_n_u16): Likewise.
5571         (vminavq_p_s16): Likewise.
5572         (vminaq_m_s16): Likewise.
5573         (vmaxavq_p_s16): Likewise.
5574         (vmaxaq_m_s16): Likewise.
5575         (vcmpneq_m_s16): Likewise.
5576         (vcmpneq_m_n_s16): Likewise.
5577         (vcmpltq_m_s16): Likewise.
5578         (vcmpltq_m_n_s16): Likewise.
5579         (vcmpleq_m_s16): Likewise.
5580         (vcmpleq_m_n_s16): Likewise.
5581         (vcmpgtq_m_s16): Likewise.
5582         (vcmpgtq_m_n_s16): Likewise.
5583         (vcmpgeq_m_s16): Likewise.
5584         (vcmpgeq_m_n_s16): Likewise.
5585         (vcmpeqq_m_s16): Likewise.
5586         (vcmpeqq_m_n_s16): Likewise.
5587         (vshlq_m_r_s16): Likewise.
5588         (vrshlq_m_n_s16): Likewise.
5589         (vrev64q_m_s16): Likewise.
5590         (vqshlq_m_r_s16): Likewise.
5591         (vqrshlq_m_n_s16): Likewise.
5592         (vqnegq_m_s16): Likewise.
5593         (vqabsq_m_s16): Likewise.
5594         (vnegq_m_s16): Likewise.
5595         (vmvnq_m_s16): Likewise.
5596         (vmlsdavxq_p_s16): Likewise.
5597         (vmlsdavq_p_s16): Likewise.
5598         (vmladavxq_p_s16): Likewise.
5599         (vmladavq_p_s16): Likewise.
5600         (vminvq_p_s16): Likewise.
5601         (vmaxvq_p_s16): Likewise.
5602         (vdupq_m_n_s16): Likewise.
5603         (vclzq_m_s16): Likewise.
5604         (vclsq_m_s16): Likewise.
5605         (vaddvaq_p_s16): Likewise.
5606         (vabsq_m_s16): Likewise.
5607         (vqrdmlsdhxq_s16): Likewise.
5608         (vqrdmlsdhq_s16): Likewise.
5609         (vqrdmlashq_n_s16): Likewise.
5610         (vqrdmlahq_n_s16): Likewise.
5611         (vqrdmladhxq_s16): Likewise.
5612         (vqrdmladhq_s16): Likewise.
5613         (vqdmlsdhxq_s16): Likewise.
5614         (vqdmlsdhq_s16): Likewise.
5615         (vqdmlahq_n_s16): Likewise.
5616         (vqdmladhxq_s16): Likewise.
5617         (vqdmladhq_s16): Likewise.
5618         (vmlsdavaxq_s16): Likewise.
5619         (vmlsdavaq_s16): Likewise.
5620         (vmlasq_n_s16): Likewise.
5621         (vmlaq_n_s16): Likewise.
5622         (vmladavaxq_s16): Likewise.
5623         (vmladavaq_s16): Likewise.
5624         (vsriq_n_s16): Likewise.
5625         (vsliq_n_s16): Likewise.
5626         (vpselq_u32): Likewise.
5627         (vpselq_s32): Likewise.
5628         (vrev64q_m_u32): Likewise.
5629         (vqrdmlashq_n_u32): Likewise.
5630         (vqrdmlahq_n_u32): Likewise.
5631         (vqdmlahq_n_u32): Likewise.
5632         (vmvnq_m_u32): Likewise.
5633         (vmlasq_n_u32): Likewise.
5634         (vmlaq_n_u32): Likewise.
5635         (vmladavq_p_u32): Likewise.
5636         (vmladavaq_u32): Likewise.
5637         (vminvq_p_u32): Likewise.
5638         (vmaxvq_p_u32): Likewise.
5639         (vdupq_m_n_u32): Likewise.
5640         (vcmpneq_m_u32): Likewise.
5641         (vcmpneq_m_n_u32): Likewise.
5642         (vcmphiq_m_u32): Likewise.
5643         (vcmphiq_m_n_u32): Likewise.
5644         (vcmpeqq_m_u32): Likewise.
5645         (vcmpeqq_m_n_u32): Likewise.
5646         (vcmpcsq_m_u32): Likewise.
5647         (vcmpcsq_m_n_u32): Likewise.
5648         (vclzq_m_u32): Likewise.
5649         (vaddvaq_p_u32): Likewise.
5650         (vsriq_n_u32): Likewise.
5651         (vsliq_n_u32): Likewise.
5652         (vshlq_m_r_u32): Likewise.
5653         (vrshlq_m_n_u32): Likewise.
5654         (vqshlq_m_r_u32): Likewise.
5655         (vqrshlq_m_n_u32): Likewise.
5656         (vminavq_p_s32): Likewise.
5657         (vminaq_m_s32): Likewise.
5658         (vmaxavq_p_s32): Likewise.
5659         (vmaxaq_m_s32): Likewise.
5660         (vcmpneq_m_s32): Likewise.
5661         (vcmpneq_m_n_s32): Likewise.
5662         (vcmpltq_m_s32): Likewise.
5663         (vcmpltq_m_n_s32): Likewise.
5664         (vcmpleq_m_s32): Likewise.
5665         (vcmpleq_m_n_s32): Likewise.
5666         (vcmpgtq_m_s32): Likewise.
5667         (vcmpgtq_m_n_s32): Likewise.
5668         (vcmpgeq_m_s32): Likewise.
5669         (vcmpgeq_m_n_s32): Likewise.
5670         (vcmpeqq_m_s32): Likewise.
5671         (vcmpeqq_m_n_s32): Likewise.
5672         (vshlq_m_r_s32): Likewise.
5673         (vrshlq_m_n_s32): Likewise.
5674         (vrev64q_m_s32): Likewise.
5675         (vqshlq_m_r_s32): Likewise.
5676         (vqrshlq_m_n_s32): Likewise.
5677         (vqnegq_m_s32): Likewise.
5678         (vqabsq_m_s32): Likewise.
5679         (vnegq_m_s32): Likewise.
5680         (vmvnq_m_s32): Likewise.
5681         (vmlsdavxq_p_s32): Likewise.
5682         (vmlsdavq_p_s32): Likewise.
5683         (vmladavxq_p_s32): Likewise.
5684         (vmladavq_p_s32): Likewise.
5685         (vminvq_p_s32): Likewise.
5686         (vmaxvq_p_s32): Likewise.
5687         (vdupq_m_n_s32): Likewise.
5688         (vclzq_m_s32): Likewise.
5689         (vclsq_m_s32): Likewise.
5690         (vaddvaq_p_s32): Likewise.
5691         (vabsq_m_s32): Likewise.
5692         (vqrdmlsdhxq_s32): Likewise.
5693         (vqrdmlsdhq_s32): Likewise.
5694         (vqrdmlashq_n_s32): Likewise.
5695         (vqrdmlahq_n_s32): Likewise.
5696         (vqrdmladhxq_s32): Likewise.
5697         (vqrdmladhq_s32): Likewise.
5698         (vqdmlsdhxq_s32): Likewise.
5699         (vqdmlsdhq_s32): Likewise.
5700         (vqdmlahq_n_s32): Likewise.
5701         (vqdmladhxq_s32): Likewise.
5702         (vqdmladhq_s32): Likewise.
5703         (vmlsdavaxq_s32): Likewise.
5704         (vmlsdavaq_s32): Likewise.
5705         (vmlasq_n_s32): Likewise.
5706         (vmlaq_n_s32): Likewise.
5707         (vmladavaxq_s32): Likewise.
5708         (vmladavaq_s32): Likewise.
5709         (vsriq_n_s32): Likewise.
5710         (vsliq_n_s32): Likewise.
5711         (vpselq_u64): Likewise.
5712         (vpselq_s64): Likewise.
5713         (__arm_vpselq_u8): Define intrinsic.
5714         (__arm_vpselq_s8): Likewise.
5715         (__arm_vrev64q_m_u8): Likewise.
5716         (__arm_vqrdmlashq_n_u8): Likewise.
5717         (__arm_vqrdmlahq_n_u8): Likewise.
5718         (__arm_vqdmlahq_n_u8): Likewise.
5719         (__arm_vmvnq_m_u8): Likewise.
5720         (__arm_vmlasq_n_u8): Likewise.
5721         (__arm_vmlaq_n_u8): Likewise.
5722         (__arm_vmladavq_p_u8): Likewise.
5723         (__arm_vmladavaq_u8): Likewise.
5724         (__arm_vminvq_p_u8): Likewise.
5725         (__arm_vmaxvq_p_u8): Likewise.
5726         (__arm_vdupq_m_n_u8): Likewise.
5727         (__arm_vcmpneq_m_u8): Likewise.
5728         (__arm_vcmpneq_m_n_u8): Likewise.
5729         (__arm_vcmphiq_m_u8): Likewise.
5730         (__arm_vcmphiq_m_n_u8): Likewise.
5731         (__arm_vcmpeqq_m_u8): Likewise.
5732         (__arm_vcmpeqq_m_n_u8): Likewise.
5733         (__arm_vcmpcsq_m_u8): Likewise.
5734         (__arm_vcmpcsq_m_n_u8): Likewise.
5735         (__arm_vclzq_m_u8): Likewise.
5736         (__arm_vaddvaq_p_u8): Likewise.
5737         (__arm_vsriq_n_u8): Likewise.
5738         (__arm_vsliq_n_u8): Likewise.
5739         (__arm_vshlq_m_r_u8): Likewise.
5740         (__arm_vrshlq_m_n_u8): Likewise.
5741         (__arm_vqshlq_m_r_u8): Likewise.
5742         (__arm_vqrshlq_m_n_u8): Likewise.
5743         (__arm_vminavq_p_s8): Likewise.
5744         (__arm_vminaq_m_s8): Likewise.
5745         (__arm_vmaxavq_p_s8): Likewise.
5746         (__arm_vmaxaq_m_s8): Likewise.
5747         (__arm_vcmpneq_m_s8): Likewise.
5748         (__arm_vcmpneq_m_n_s8): Likewise.
5749         (__arm_vcmpltq_m_s8): Likewise.
5750         (__arm_vcmpltq_m_n_s8): Likewise.
5751         (__arm_vcmpleq_m_s8): Likewise.
5752         (__arm_vcmpleq_m_n_s8): Likewise.
5753         (__arm_vcmpgtq_m_s8): Likewise.
5754         (__arm_vcmpgtq_m_n_s8): Likewise.
5755         (__arm_vcmpgeq_m_s8): Likewise.
5756         (__arm_vcmpgeq_m_n_s8): Likewise.
5757         (__arm_vcmpeqq_m_s8): Likewise.
5758         (__arm_vcmpeqq_m_n_s8): Likewise.
5759         (__arm_vshlq_m_r_s8): Likewise.
5760         (__arm_vrshlq_m_n_s8): Likewise.
5761         (__arm_vrev64q_m_s8): Likewise.
5762         (__arm_vqshlq_m_r_s8): Likewise.
5763         (__arm_vqrshlq_m_n_s8): Likewise.
5764         (__arm_vqnegq_m_s8): Likewise.
5765         (__arm_vqabsq_m_s8): Likewise.
5766         (__arm_vnegq_m_s8): Likewise.
5767         (__arm_vmvnq_m_s8): Likewise.
5768         (__arm_vmlsdavxq_p_s8): Likewise.
5769         (__arm_vmlsdavq_p_s8): Likewise.
5770         (__arm_vmladavxq_p_s8): Likewise.
5771         (__arm_vmladavq_p_s8): Likewise.
5772         (__arm_vminvq_p_s8): Likewise.
5773         (__arm_vmaxvq_p_s8): Likewise.
5774         (__arm_vdupq_m_n_s8): Likewise.
5775         (__arm_vclzq_m_s8): Likewise.
5776         (__arm_vclsq_m_s8): Likewise.
5777         (__arm_vaddvaq_p_s8): Likewise.
5778         (__arm_vabsq_m_s8): Likewise.
5779         (__arm_vqrdmlsdhxq_s8): Likewise.
5780         (__arm_vqrdmlsdhq_s8): Likewise.
5781         (__arm_vqrdmlashq_n_s8): Likewise.
5782         (__arm_vqrdmlahq_n_s8): Likewise.
5783         (__arm_vqrdmladhxq_s8): Likewise.
5784         (__arm_vqrdmladhq_s8): Likewise.
5785         (__arm_vqdmlsdhxq_s8): Likewise.
5786         (__arm_vqdmlsdhq_s8): Likewise.
5787         (__arm_vqdmlahq_n_s8): Likewise.
5788         (__arm_vqdmladhxq_s8): Likewise.
5789         (__arm_vqdmladhq_s8): Likewise.
5790         (__arm_vmlsdavaxq_s8): Likewise.
5791         (__arm_vmlsdavaq_s8): Likewise.
5792         (__arm_vmlasq_n_s8): Likewise.
5793         (__arm_vmlaq_n_s8): Likewise.
5794         (__arm_vmladavaxq_s8): Likewise.
5795         (__arm_vmladavaq_s8): Likewise.
5796         (__arm_vsriq_n_s8): Likewise.
5797         (__arm_vsliq_n_s8): Likewise.
5798         (__arm_vpselq_u16): Likewise.
5799         (__arm_vpselq_s16): Likewise.
5800         (__arm_vrev64q_m_u16): Likewise.
5801         (__arm_vqrdmlashq_n_u16): Likewise.
5802         (__arm_vqrdmlahq_n_u16): Likewise.
5803         (__arm_vqdmlahq_n_u16): Likewise.
5804         (__arm_vmvnq_m_u16): Likewise.
5805         (__arm_vmlasq_n_u16): Likewise.
5806         (__arm_vmlaq_n_u16): Likewise.
5807         (__arm_vmladavq_p_u16): Likewise.
5808         (__arm_vmladavaq_u16): Likewise.
5809         (__arm_vminvq_p_u16): Likewise.
5810         (__arm_vmaxvq_p_u16): Likewise.
5811         (__arm_vdupq_m_n_u16): Likewise.
5812         (__arm_vcmpneq_m_u16): Likewise.
5813         (__arm_vcmpneq_m_n_u16): Likewise.
5814         (__arm_vcmphiq_m_u16): Likewise.
5815         (__arm_vcmphiq_m_n_u16): Likewise.
5816         (__arm_vcmpeqq_m_u16): Likewise.
5817         (__arm_vcmpeqq_m_n_u16): Likewise.
5818         (__arm_vcmpcsq_m_u16): Likewise.
5819         (__arm_vcmpcsq_m_n_u16): Likewise.
5820         (__arm_vclzq_m_u16): Likewise.
5821         (__arm_vaddvaq_p_u16): Likewise.
5822         (__arm_vsriq_n_u16): Likewise.
5823         (__arm_vsliq_n_u16): Likewise.
5824         (__arm_vshlq_m_r_u16): Likewise.
5825         (__arm_vrshlq_m_n_u16): Likewise.
5826         (__arm_vqshlq_m_r_u16): Likewise.
5827         (__arm_vqrshlq_m_n_u16): Likewise.
5828         (__arm_vminavq_p_s16): Likewise.
5829         (__arm_vminaq_m_s16): Likewise.
5830         (__arm_vmaxavq_p_s16): Likewise.
5831         (__arm_vmaxaq_m_s16): Likewise.
5832         (__arm_vcmpneq_m_s16): Likewise.
5833         (__arm_vcmpneq_m_n_s16): Likewise.
5834         (__arm_vcmpltq_m_s16): Likewise.
5835         (__arm_vcmpltq_m_n_s16): Likewise.
5836         (__arm_vcmpleq_m_s16): Likewise.
5837         (__arm_vcmpleq_m_n_s16): Likewise.
5838         (__arm_vcmpgtq_m_s16): Likewise.
5839         (__arm_vcmpgtq_m_n_s16): Likewise.
5840         (__arm_vcmpgeq_m_s16): Likewise.
5841         (__arm_vcmpgeq_m_n_s16): Likewise.
5842         (__arm_vcmpeqq_m_s16): Likewise.
5843         (__arm_vcmpeqq_m_n_s16): Likewise.
5844         (__arm_vshlq_m_r_s16): Likewise.
5845         (__arm_vrshlq_m_n_s16): Likewise.
5846         (__arm_vrev64q_m_s16): Likewise.
5847         (__arm_vqshlq_m_r_s16): Likewise.
5848         (__arm_vqrshlq_m_n_s16): Likewise.
5849         (__arm_vqnegq_m_s16): Likewise.
5850         (__arm_vqabsq_m_s16): Likewise.
5851         (__arm_vnegq_m_s16): Likewise.
5852         (__arm_vmvnq_m_s16): Likewise.
5853         (__arm_vmlsdavxq_p_s16): Likewise.
5854         (__arm_vmlsdavq_p_s16): Likewise.
5855         (__arm_vmladavxq_p_s16): Likewise.
5856         (__arm_vmladavq_p_s16): Likewise.
5857         (__arm_vminvq_p_s16): Likewise.
5858         (__arm_vmaxvq_p_s16): Likewise.
5859         (__arm_vdupq_m_n_s16): Likewise.
5860         (__arm_vclzq_m_s16): Likewise.
5861         (__arm_vclsq_m_s16): Likewise.
5862         (__arm_vaddvaq_p_s16): Likewise.
5863         (__arm_vabsq_m_s16): Likewise.
5864         (__arm_vqrdmlsdhxq_s16): Likewise.
5865         (__arm_vqrdmlsdhq_s16): Likewise.
5866         (__arm_vqrdmlashq_n_s16): Likewise.
5867         (__arm_vqrdmlahq_n_s16): Likewise.
5868         (__arm_vqrdmladhxq_s16): Likewise.
5869         (__arm_vqrdmladhq_s16): Likewise.
5870         (__arm_vqdmlsdhxq_s16): Likewise.
5871         (__arm_vqdmlsdhq_s16): Likewise.
5872         (__arm_vqdmlahq_n_s16): Likewise.
5873         (__arm_vqdmladhxq_s16): Likewise.
5874         (__arm_vqdmladhq_s16): Likewise.
5875         (__arm_vmlsdavaxq_s16): Likewise.
5876         (__arm_vmlsdavaq_s16): Likewise.
5877         (__arm_vmlasq_n_s16): Likewise.
5878         (__arm_vmlaq_n_s16): Likewise.
5879         (__arm_vmladavaxq_s16): Likewise.
5880         (__arm_vmladavaq_s16): Likewise.
5881         (__arm_vsriq_n_s16): Likewise.
5882         (__arm_vsliq_n_s16): Likewise.
5883         (__arm_vpselq_u32): Likewise.
5884         (__arm_vpselq_s32): Likewise.
5885         (__arm_vrev64q_m_u32): Likewise.
5886         (__arm_vqrdmlashq_n_u32): Likewise.
5887         (__arm_vqrdmlahq_n_u32): Likewise.
5888         (__arm_vqdmlahq_n_u32): Likewise.
5889         (__arm_vmvnq_m_u32): Likewise.
5890         (__arm_vmlasq_n_u32): Likewise.
5891         (__arm_vmlaq_n_u32): Likewise.
5892         (__arm_vmladavq_p_u32): Likewise.
5893         (__arm_vmladavaq_u32): Likewise.
5894         (__arm_vminvq_p_u32): Likewise.
5895         (__arm_vmaxvq_p_u32): Likewise.
5896         (__arm_vdupq_m_n_u32): Likewise.
5897         (__arm_vcmpneq_m_u32): Likewise.
5898         (__arm_vcmpneq_m_n_u32): Likewise.
5899         (__arm_vcmphiq_m_u32): Likewise.
5900         (__arm_vcmphiq_m_n_u32): Likewise.
5901         (__arm_vcmpeqq_m_u32): Likewise.
5902         (__arm_vcmpeqq_m_n_u32): Likewise.
5903         (__arm_vcmpcsq_m_u32): Likewise.
5904         (__arm_vcmpcsq_m_n_u32): Likewise.
5905         (__arm_vclzq_m_u32): Likewise.
5906         (__arm_vaddvaq_p_u32): Likewise.
5907         (__arm_vsriq_n_u32): Likewise.
5908         (__arm_vsliq_n_u32): Likewise.
5909         (__arm_vshlq_m_r_u32): Likewise.
5910         (__arm_vrshlq_m_n_u32): Likewise.
5911         (__arm_vqshlq_m_r_u32): Likewise.
5912         (__arm_vqrshlq_m_n_u32): Likewise.
5913         (__arm_vminavq_p_s32): Likewise.
5914         (__arm_vminaq_m_s32): Likewise.
5915         (__arm_vmaxavq_p_s32): Likewise.
5916         (__arm_vmaxaq_m_s32): Likewise.
5917         (__arm_vcmpneq_m_s32): Likewise.
5918         (__arm_vcmpneq_m_n_s32): Likewise.
5919         (__arm_vcmpltq_m_s32): Likewise.
5920         (__arm_vcmpltq_m_n_s32): Likewise.
5921         (__arm_vcmpleq_m_s32): Likewise.
5922         (__arm_vcmpleq_m_n_s32): Likewise.
5923         (__arm_vcmpgtq_m_s32): Likewise.
5924         (__arm_vcmpgtq_m_n_s32): Likewise.
5925         (__arm_vcmpgeq_m_s32): Likewise.
5926         (__arm_vcmpgeq_m_n_s32): Likewise.
5927         (__arm_vcmpeqq_m_s32): Likewise.
5928         (__arm_vcmpeqq_m_n_s32): Likewise.
5929         (__arm_vshlq_m_r_s32): Likewise.
5930         (__arm_vrshlq_m_n_s32): Likewise.
5931         (__arm_vrev64q_m_s32): Likewise.
5932         (__arm_vqshlq_m_r_s32): Likewise.
5933         (__arm_vqrshlq_m_n_s32): Likewise.
5934         (__arm_vqnegq_m_s32): Likewise.
5935         (__arm_vqabsq_m_s32): Likewise.
5936         (__arm_vnegq_m_s32): Likewise.
5937         (__arm_vmvnq_m_s32): Likewise.
5938         (__arm_vmlsdavxq_p_s32): Likewise.
5939         (__arm_vmlsdavq_p_s32): Likewise.
5940         (__arm_vmladavxq_p_s32): Likewise.
5941         (__arm_vmladavq_p_s32): Likewise.
5942         (__arm_vminvq_p_s32): Likewise.
5943         (__arm_vmaxvq_p_s32): Likewise.
5944         (__arm_vdupq_m_n_s32): Likewise.
5945         (__arm_vclzq_m_s32): Likewise.
5946         (__arm_vclsq_m_s32): Likewise.
5947         (__arm_vaddvaq_p_s32): Likewise.
5948         (__arm_vabsq_m_s32): Likewise.
5949         (__arm_vqrdmlsdhxq_s32): Likewise.
5950         (__arm_vqrdmlsdhq_s32): Likewise.
5951         (__arm_vqrdmlashq_n_s32): Likewise.
5952         (__arm_vqrdmlahq_n_s32): Likewise.
5953         (__arm_vqrdmladhxq_s32): Likewise.
5954         (__arm_vqrdmladhq_s32): Likewise.
5955         (__arm_vqdmlsdhxq_s32): Likewise.
5956         (__arm_vqdmlsdhq_s32): Likewise.
5957         (__arm_vqdmlahq_n_s32): Likewise.
5958         (__arm_vqdmladhxq_s32): Likewise.
5959         (__arm_vqdmladhq_s32): Likewise.
5960         (__arm_vmlsdavaxq_s32): Likewise.
5961         (__arm_vmlsdavaq_s32): Likewise.
5962         (__arm_vmlasq_n_s32): Likewise.
5963         (__arm_vmlaq_n_s32): Likewise.
5964         (__arm_vmladavaxq_s32): Likewise.
5965         (__arm_vmladavaq_s32): Likewise.
5966         (__arm_vsriq_n_s32): Likewise.
5967         (__arm_vsliq_n_s32): Likewise.
5968         (__arm_vpselq_u64): Likewise.
5969         (__arm_vpselq_s64): Likewise.
5970         (vcmpneq_m_n): Define polymorphic variant.
5971         (vcmpneq_m): Likewise.
5972         (vqrdmlsdhq): Likewise.
5973         (vqrdmlsdhxq): Likewise.
5974         (vqrshlq_m_n): Likewise.
5975         (vqshlq_m_r): Likewise.
5976         (vrev64q_m): Likewise.
5977         (vrshlq_m_n): Likewise.
5978         (vshlq_m_r): Likewise.
5979         (vsliq_n): Likewise.
5980         (vsriq_n): Likewise.
5981         (vqrdmlashq_n): Likewise.
5982         (vqrdmlahq): Likewise.
5983         (vqrdmladhxq): Likewise.
5984         (vqrdmladhq): Likewise.
5985         (vqnegq_m): Likewise.
5986         (vqdmlsdhxq): Likewise.
5987         (vabsq_m): Likewise.
5988         (vclsq_m): Likewise.
5989         (vclzq_m): Likewise.
5990         (vcmpgeq_m): Likewise.
5991         (vcmpgeq_m_n): Likewise.
5992         (vdupq_m_n): Likewise.
5993         (vmaxaq_m): Likewise.
5994         (vmlaq_n): Likewise.
5995         (vmlasq_n): Likewise.
5996         (vmvnq_m): Likewise.
5997         (vnegq_m): Likewise.
5998         (vpselq): Likewise.
5999         (vqdmlahq_n): Likewise.
6000         (vqrdmlahq_n): Likewise.
6001         (vqdmlsdhq): Likewise.
6002         (vqdmladhq): Likewise.
6003         (vqabsq_m): Likewise.
6004         (vminaq_m): Likewise.
6005         (vrmlaldavhaq): Likewise.
6006         (vmlsdavxq_p): Likewise.
6007         (vmlsdavq_p): Likewise.
6008         (vmlsdavaxq): Likewise.
6009         (vmlsdavaq): Likewise.
6010         (vaddvaq_p): Likewise.
6011         (vcmpcsq_m_n): Likewise.
6012         (vcmpcsq_m): Likewise.
6013         (vcmpeqq_m_n): Likewise.
6014         (vcmpeqq_m): Likewise.
6015         (vmladavxq_p): Likewise.
6016         (vmladavq_p): Likewise.
6017         (vmladavaxq): Likewise.
6018         (vmladavaq): Likewise.
6019         (vminvq_p): Likewise.
6020         (vminavq_p): Likewise.
6021         (vmaxvq_p): Likewise.
6022         (vmaxavq_p): Likewise.
6023         (vcmpltq_m_n): Likewise.
6024         (vcmpltq_m): Likewise.
6025         (vcmpleq_m): Likewise.
6026         (vcmpleq_m_n): Likewise.
6027         (vcmphiq_m_n): Likewise.
6028         (vcmphiq_m): Likewise.
6029         (vcmpgtq_m_n): Likewise.
6030         (vcmpgtq_m): Likewise.
6031         * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
6032         builtin qualifier.
6033         (TERNOP_NONE_NONE_NONE_NONE): Likewise.
6034         (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
6035         (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
6036         (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
6037         (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
6038         (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
6039         * config/arm/constraints.md (Rc): Define constraint to check constant is
6040         in the range of 0 to 15.
6041         (Re): Define constraint to check constant is in the range of 0 to 31.
6042         * config/arm/mve.md (VADDVAQ_P): Define iterator.
6043         (VCLZQ_M): Likewise.
6044         (VCMPEQQ_M_N): Likewise.
6045         (VCMPEQQ_M): Likewise.
6046         (VCMPNEQ_M_N): Likewise.
6047         (VCMPNEQ_M): Likewise.
6048         (VDUPQ_M_N): Likewise.
6049         (VMAXVQ_P): Likewise.
6050         (VMINVQ_P): Likewise.
6051         (VMLADAVAQ): Likewise.
6052         (VMLADAVQ_P): Likewise.
6053         (VMLAQ_N): Likewise.
6054         (VMLASQ_N): Likewise.
6055         (VMVNQ_M): Likewise.
6056         (VPSELQ): Likewise.
6057         (VQDMLAHQ_N): Likewise.
6058         (VQRDMLAHQ_N): Likewise.
6059         (VQRDMLASHQ_N): Likewise.
6060         (VQRSHLQ_M_N): Likewise.
6061         (VQSHLQ_M_R): Likewise.
6062         (VREV64Q_M): Likewise.
6063         (VRSHLQ_M_N): Likewise.
6064         (VSHLQ_M_R): Likewise.
6065         (VSLIQ_N): Likewise.
6066         (VSRIQ_N): Likewise.
6067         (mve_vabsq_m_s<mode>): Define RTL pattern.
6068         (mve_vaddvaq_p_<supf><mode>): Likewise.
6069         (mve_vclsq_m_s<mode>): Likewise.
6070         (mve_vclzq_m_<supf><mode>): Likewise.
6071         (mve_vcmpcsq_m_n_u<mode>): Likewise.
6072         (mve_vcmpcsq_m_u<mode>): Likewise.
6073         (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
6074         (mve_vcmpeqq_m_<supf><mode>): Likewise.
6075         (mve_vcmpgeq_m_n_s<mode>): Likewise.
6076         (mve_vcmpgeq_m_s<mode>): Likewise.
6077         (mve_vcmpgtq_m_n_s<mode>): Likewise.
6078         (mve_vcmpgtq_m_s<mode>): Likewise.
6079         (mve_vcmphiq_m_n_u<mode>): Likewise.
6080         (mve_vcmphiq_m_u<mode>): Likewise.
6081         (mve_vcmpleq_m_n_s<mode>): Likewise.
6082         (mve_vcmpleq_m_s<mode>): Likewise.
6083         (mve_vcmpltq_m_n_s<mode>): Likewise.
6084         (mve_vcmpltq_m_s<mode>): Likewise.
6085         (mve_vcmpneq_m_n_<supf><mode>): Likewise.
6086         (mve_vcmpneq_m_<supf><mode>): Likewise.
6087         (mve_vdupq_m_n_<supf><mode>): Likewise.
6088         (mve_vmaxaq_m_s<mode>): Likewise.
6089         (mve_vmaxavq_p_s<mode>): Likewise.
6090         (mve_vmaxvq_p_<supf><mode>): Likewise.
6091         (mve_vminaq_m_s<mode>): Likewise.
6092         (mve_vminavq_p_s<mode>): Likewise.
6093         (mve_vminvq_p_<supf><mode>): Likewise.
6094         (mve_vmladavaq_<supf><mode>): Likewise.
6095         (mve_vmladavq_p_<supf><mode>): Likewise.
6096         (mve_vmladavxq_p_s<mode>): Likewise.
6097         (mve_vmlaq_n_<supf><mode>): Likewise.
6098         (mve_vmlasq_n_<supf><mode>): Likewise.
6099         (mve_vmlsdavq_p_s<mode>): Likewise.
6100         (mve_vmlsdavxq_p_s<mode>): Likewise.
6101         (mve_vmvnq_m_<supf><mode>): Likewise.
6102         (mve_vnegq_m_s<mode>): Likewise.
6103         (mve_vpselq_<supf><mode>): Likewise.
6104         (mve_vqabsq_m_s<mode>): Likewise.
6105         (mve_vqdmlahq_n_<supf><mode>): Likewise.
6106         (mve_vqnegq_m_s<mode>): Likewise.
6107         (mve_vqrdmladhq_s<mode>): Likewise.
6108         (mve_vqrdmladhxq_s<mode>): Likewise.
6109         (mve_vqrdmlahq_n_<supf><mode>): Likewise.
6110         (mve_vqrdmlashq_n_<supf><mode>): Likewise.
6111         (mve_vqrdmlsdhq_s<mode>): Likewise.
6112         (mve_vqrdmlsdhxq_s<mode>): Likewise.
6113         (mve_vqrshlq_m_n_<supf><mode>): Likewise.
6114         (mve_vqshlq_m_r_<supf><mode>): Likewise.
6115         (mve_vrev64q_m_<supf><mode>): Likewise.
6116         (mve_vrshlq_m_n_<supf><mode>): Likewise.
6117         (mve_vshlq_m_r_<supf><mode>): Likewise.
6118         (mve_vsliq_n_<supf><mode>): Likewise.
6119         (mve_vsriq_n_<supf><mode>): Likewise.
6120         (mve_vqdmlsdhxq_s<mode>): Likewise.
6121         (mve_vqdmlsdhq_s<mode>): Likewise.
6122         (mve_vqdmladhxq_s<mode>): Likewise.
6123         (mve_vqdmladhq_s<mode>): Likewise.
6124         (mve_vmlsdavaxq_s<mode>): Likewise.
6125         (mve_vmlsdavaq_s<mode>): Likewise.
6126         (mve_vmladavaxq_s<mode>): Likewise.
6127         * config/arm/predicates.md (mve_imm_15):Define predicate to check the
6128         matching constraint Rc.
6129         (mve_imm_31): Define predicate to check the matching constraint Re.
6130
6131 2020-03-18  Andrew Stubbs  <ams@codesourcery.com>
6132
6133         * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
6134         (vec_cmp<mode>di_dup): Likewise.
6135         * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
6136
6137 2020-03-18  Andrew Stubbs  <ams@codesourcery.com>
6138
6139         * config/gcn/gcn-valu.md (COND_MODE): Delete.
6140         (COND_INT_MODE): Delete.
6141         (cond_op): Add "mult".
6142         (cond_<expander><mode>): Use VEC_ALLREG_MODE.
6143         (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
6144
6145 2020-03-18   Richard Biener  <rguenther@suse.de>
6146
6147         PR middle-end/94206
6148         * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
6149         partial int modes or not mode-precision integer types for
6150         the store.
6151
6152 2020-03-18  Jakub Jelinek  <jakub@redhat.com>
6153
6154         * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
6155         in a comment.
6156         * config/arc/arc.c (frame_stack_add): Likewise.
6157         * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
6158         Likewise.
6159         * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
6160         * tree-ssa-strlen.h (handle_printf_call): Likewise.
6161         * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
6162         * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
6163
6164 2020-03-18  Duan bo  <duanbo3@huawei.com>
6165
6166         PR target/94201
6167         * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
6168         (@ldr_got_tiny_<mode>): New pattern.
6169         (ldr_got_tiny_sidi): Likewise.
6170         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
6171         them to handle SYMBOL_TINY_GOT for ILP32.
6172
6173 2020-03-18  Richard Sandiford  <richard.sandiford@arm.com>
6174
6175         * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
6176         call-preserved for SVE PCS functions.
6177         (aarch64_layout_frame): Cope with up to 12 predicate save slots.
6178         Optimize the case in which there are no following vector save slots.
6179
6180 2020-03-18  Richard Biener  <rguenther@suse.de>
6181
6182         PR middle-end/94188
6183         * fold-const.c (build_fold_addr_expr): Convert address to
6184         correct type.
6185         * asan.c (maybe_create_ssa_name): Strip useless type conversions.
6186         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
6187         to build the ADDR_EXPR which we don't really want to simplify.
6188         * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
6189         * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
6190         * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
6191         (simplify_builtin_call): Strip useless type conversions.
6192         * tree-ssa-strlen.c (new_strinfo): Likewise.
6193
6194 2020-03-17  Alexey Neyman  <stilor@att.net>
6195
6196         PR debug/93751
6197         * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
6198         the debug level is terse and the declaration is public. Do not
6199         generate type info.
6200         (dwarf2out_decl): Same.
6201         (add_type_attribute): Return immediately if debug level is
6202         terse.
6203
6204 2020-03-17  Richard Sandiford  <richard.sandiford@arm.com>
6205
6206         * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
6207
6208 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
6209             Mihail Ionescu  <mihail.ionescu@arm.com>
6210             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
6211
6212         * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
6213         Define qualifier for ternary operands.
6214         (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
6215         (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
6216         (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
6217         (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
6218         (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6219         (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6220         (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6221         (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
6222         (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6223         (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6224         (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
6225         (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6226         (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
6227         * config/arm/arm_mve.h (vabavq_s8): Define macro.
6228         (vabavq_s16): Likewise.
6229         (vabavq_s32): Likewise.
6230         (vbicq_m_n_s16): Likewise.
6231         (vbicq_m_n_s32): Likewise.
6232         (vbicq_m_n_u16): Likewise.
6233         (vbicq_m_n_u32): Likewise.
6234         (vcmpeqq_m_f16): Likewise.
6235         (vcmpeqq_m_f32): Likewise.
6236         (vcvtaq_m_s16_f16): Likewise.
6237         (vcvtaq_m_u16_f16): Likewise.
6238         (vcvtaq_m_s32_f32): Likewise.
6239         (vcvtaq_m_u32_f32): Likewise.
6240         (vcvtq_m_f16_s16): Likewise.
6241         (vcvtq_m_f16_u16): Likewise.
6242         (vcvtq_m_f32_s32): Likewise.
6243         (vcvtq_m_f32_u32): Likewise.
6244         (vqrshrnbq_n_s16): Likewise.
6245         (vqrshrnbq_n_u16): Likewise.
6246         (vqrshrnbq_n_s32): Likewise.
6247         (vqrshrnbq_n_u32): Likewise.
6248         (vqrshrunbq_n_s16): Likewise.
6249         (vqrshrunbq_n_s32): Likewise.
6250         (vrmlaldavhaq_s32): Likewise.
6251         (vrmlaldavhaq_u32): Likewise.
6252         (vshlcq_s8): Likewise.
6253         (vshlcq_u8): Likewise.
6254         (vshlcq_s16): Likewise.
6255         (vshlcq_u16): Likewise.
6256         (vshlcq_s32): Likewise.
6257         (vshlcq_u32): Likewise.
6258         (vabavq_u8): Likewise.
6259         (vabavq_u16): Likewise.
6260         (vabavq_u32): Likewise.
6261         (__arm_vabavq_s8): Define intrinsic.
6262         (__arm_vabavq_s16): Likewise.
6263         (__arm_vabavq_s32): Likewise.
6264         (__arm_vabavq_u8): Likewise.
6265         (__arm_vabavq_u16): Likewise.
6266         (__arm_vabavq_u32): Likewise.
6267         (__arm_vbicq_m_n_s16): Likewise.
6268         (__arm_vbicq_m_n_s32): Likewise.
6269         (__arm_vbicq_m_n_u16): Likewise.
6270         (__arm_vbicq_m_n_u32): Likewise.
6271         (__arm_vqrshrnbq_n_s16): Likewise.
6272         (__arm_vqrshrnbq_n_u16): Likewise.
6273         (__arm_vqrshrnbq_n_s32): Likewise.
6274         (__arm_vqrshrnbq_n_u32): Likewise.
6275         (__arm_vqrshrunbq_n_s16): Likewise.
6276         (__arm_vqrshrunbq_n_s32): Likewise.
6277         (__arm_vrmlaldavhaq_s32): Likewise.
6278         (__arm_vrmlaldavhaq_u32): Likewise.
6279         (__arm_vshlcq_s8): Likewise.
6280         (__arm_vshlcq_u8): Likewise.
6281         (__arm_vshlcq_s16): Likewise.
6282         (__arm_vshlcq_u16): Likewise.
6283         (__arm_vshlcq_s32): Likewise.
6284         (__arm_vshlcq_u32): Likewise.
6285         (__arm_vcmpeqq_m_f16): Likewise.
6286         (__arm_vcmpeqq_m_f32): Likewise.
6287         (__arm_vcvtaq_m_s16_f16): Likewise.
6288         (__arm_vcvtaq_m_u16_f16): Likewise.
6289         (__arm_vcvtaq_m_s32_f32): Likewise.
6290         (__arm_vcvtaq_m_u32_f32): Likewise.
6291         (__arm_vcvtq_m_f16_s16): Likewise.
6292         (__arm_vcvtq_m_f16_u16): Likewise.
6293         (__arm_vcvtq_m_f32_s32): Likewise.
6294         (__arm_vcvtq_m_f32_u32): Likewise.
6295         (vcvtaq_m): Define polymorphic variant.
6296         (vcvtq_m): Likewise.
6297         (vabavq): Likewise.
6298         (vshlcq): Likewise.
6299         (vbicq_m_n): Likewise.
6300         (vqrshrnbq_n): Likewise.
6301         (vqrshrunbq_n): Likewise.
6302         * config/arm/arm_mve_builtins.def
6303         (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
6304         (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
6305         (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
6306         (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
6307         (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
6308         (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6309         (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6310         (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6311         (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
6312         (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6313         (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6314         (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
6315         (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6316         (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
6317         * config/arm/mve.md (VBICQ_M_N): Define iterator.
6318         (VCVTAQ_M): Likewise.
6319         (VCVTQ_M_TO_F): Likewise.
6320         (VQRSHRNBQ_N): Likewise.
6321         (VABAVQ): Likewise.
6322         (VSHLCQ): Likewise.
6323         (VRMLALDAVHAQ): Likewise.
6324         (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
6325         (mve_vcmpeqq_m_f<mode>): Likewise.
6326         (mve_vcvtaq_m_<supf><mode>): Likewise.
6327         (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
6328         (mve_vqrshrnbq_n_<supf><mode>): Likewise.
6329         (mve_vqrshrunbq_n_s<mode>): Likewise.
6330         (mve_vrmlaldavhaq_<supf>v4si): Likewise.
6331         (mve_vabavq_<supf><mode>): Likewise.
6332         (mve_vshlcq_<supf><mode>): Likewise.
6333         (mve_vshlcq_<supf><mode>): Likewise.
6334         (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
6335         (mve_vshlcq_carry_<supf><mode>): Likewise.
6336
6337 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
6338             Mihail Ionescu  <mihail.ionescu@arm.com>
6339             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
6340
6341         * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
6342         (vqmovnbq_u16): Likewise.
6343         (vmulltq_poly_p8): Likewise.
6344         (vmullbq_poly_p8): Likewise.
6345         (vmovntq_u16): Likewise.
6346         (vmovnbq_u16): Likewise.
6347         (vmlaldavxq_u16): Likewise.
6348         (vmlaldavq_u16): Likewise.
6349         (vqmovuntq_s16): Likewise.
6350         (vqmovunbq_s16): Likewise.
6351         (vshlltq_n_u8): Likewise.
6352         (vshllbq_n_u8): Likewise.
6353         (vorrq_n_u16): Likewise.
6354         (vbicq_n_u16): Likewise.
6355         (vcmpneq_n_f16): Likewise.
6356         (vcmpneq_f16): Likewise.
6357         (vcmpltq_n_f16): Likewise.
6358         (vcmpltq_f16): Likewise.
6359         (vcmpleq_n_f16): Likewise.
6360         (vcmpleq_f16): Likewise.
6361         (vcmpgtq_n_f16): Likewise.
6362         (vcmpgtq_f16): Likewise.
6363         (vcmpgeq_n_f16): Likewise.
6364         (vcmpgeq_f16): Likewise.
6365         (vcmpeqq_n_f16): Likewise.
6366         (vcmpeqq_f16): Likewise.
6367         (vsubq_f16): Likewise.
6368         (vqmovntq_s16): Likewise.
6369         (vqmovnbq_s16): Likewise.
6370         (vqdmulltq_s16): Likewise.
6371         (vqdmulltq_n_s16): Likewise.
6372         (vqdmullbq_s16): Likewise.
6373         (vqdmullbq_n_s16): Likewise.
6374         (vorrq_f16): Likewise.
6375         (vornq_f16): Likewise.
6376         (vmulq_n_f16): Likewise.
6377         (vmulq_f16): Likewise.
6378         (vmovntq_s16): Likewise.
6379         (vmovnbq_s16): Likewise.
6380         (vmlsldavxq_s16): Likewise.
6381         (vmlsldavq_s16): Likewise.
6382         (vmlaldavxq_s16): Likewise.
6383         (vmlaldavq_s16): Likewise.
6384         (vminnmvq_f16): Likewise.
6385         (vminnmq_f16): Likewise.
6386         (vminnmavq_f16): Likewise.
6387         (vminnmaq_f16): Likewise.
6388         (vmaxnmvq_f16): Likewise.
6389         (vmaxnmq_f16): Likewise.
6390         (vmaxnmavq_f16): Likewise.
6391         (vmaxnmaq_f16): Likewise.
6392         (veorq_f16): Likewise.
6393         (vcmulq_rot90_f16): Likewise.
6394         (vcmulq_rot270_f16): Likewise.
6395         (vcmulq_rot180_f16): Likewise.
6396         (vcmulq_f16): Likewise.
6397         (vcaddq_rot90_f16): Likewise.
6398         (vcaddq_rot270_f16): Likewise.
6399         (vbicq_f16): Likewise.
6400         (vandq_f16): Likewise.
6401         (vaddq_n_f16): Likewise.
6402         (vabdq_f16): Likewise.
6403         (vshlltq_n_s8): Likewise.
6404         (vshllbq_n_s8): Likewise.
6405         (vorrq_n_s16): Likewise.
6406         (vbicq_n_s16): Likewise.
6407         (vqmovntq_u32): Likewise.
6408         (vqmovnbq_u32): Likewise.
6409         (vmulltq_poly_p16): Likewise.
6410         (vmullbq_poly_p16): Likewise.
6411         (vmovntq_u32): Likewise.
6412         (vmovnbq_u32): Likewise.
6413         (vmlaldavxq_u32): Likewise.
6414         (vmlaldavq_u32): Likewise.
6415         (vqmovuntq_s32): Likewise.
6416         (vqmovunbq_s32): Likewise.
6417         (vshlltq_n_u16): Likewise.
6418         (vshllbq_n_u16): Likewise.
6419         (vorrq_n_u32): Likewise.
6420         (vbicq_n_u32): Likewise.
6421         (vcmpneq_n_f32): Likewise.
6422         (vcmpneq_f32): Likewise.
6423         (vcmpltq_n_f32): Likewise.
6424         (vcmpltq_f32): Likewise.
6425         (vcmpleq_n_f32): Likewise.
6426         (vcmpleq_f32): Likewise.
6427         (vcmpgtq_n_f32): Likewise.
6428         (vcmpgtq_f32): Likewise.
6429         (vcmpgeq_n_f32): Likewise.
6430         (vcmpgeq_f32): Likewise.
6431         (vcmpeqq_n_f32): Likewise.
6432         (vcmpeqq_f32): Likewise.
6433         (vsubq_f32): Likewise.
6434         (vqmovntq_s32): Likewise.
6435         (vqmovnbq_s32): Likewise.
6436         (vqdmulltq_s32): Likewise.
6437         (vqdmulltq_n_s32): Likewise.
6438         (vqdmullbq_s32): Likewise.
6439         (vqdmullbq_n_s32): Likewise.
6440         (vorrq_f32): Likewise.
6441         (vornq_f32): Likewise.
6442         (vmulq_n_f32): Likewise.
6443         (vmulq_f32): Likewise.
6444         (vmovntq_s32): Likewise.
6445         (vmovnbq_s32): Likewise.
6446         (vmlsldavxq_s32): Likewise.
6447         (vmlsldavq_s32): Likewise.
6448         (vmlaldavxq_s32): Likewise.
6449         (vmlaldavq_s32): Likewise.
6450         (vminnmvq_f32): Likewise.
6451         (vminnmq_f32): Likewise.
6452         (vminnmavq_f32): Likewise.
6453         (vminnmaq_f32): Likewise.
6454         (vmaxnmvq_f32): Likewise.
6455         (vmaxnmq_f32): Likewise.
6456         (vmaxnmavq_f32): Likewise.
6457         (vmaxnmaq_f32): Likewise.
6458         (veorq_f32): Likewise.
6459         (vcmulq_rot90_f32): Likewise.
6460         (vcmulq_rot270_f32): Likewise.
6461         (vcmulq_rot180_f32): Likewise.
6462         (vcmulq_f32): Likewise.
6463         (vcaddq_rot90_f32): Likewise.
6464         (vcaddq_rot270_f32): Likewise.
6465         (vbicq_f32): Likewise.
6466         (vandq_f32): Likewise.
6467         (vaddq_n_f32): Likewise.
6468         (vabdq_f32): Likewise.
6469         (vshlltq_n_s16): Likewise.
6470         (vshllbq_n_s16): Likewise.
6471         (vorrq_n_s32): Likewise.
6472         (vbicq_n_s32): Likewise.
6473         (vrmlaldavhq_u32): Likewise.
6474         (vctp8q_m): Likewise.
6475         (vctp64q_m): Likewise.
6476         (vctp32q_m): Likewise.
6477         (vctp16q_m): Likewise.
6478         (vaddlvaq_u32): Likewise.
6479         (vrmlsldavhxq_s32): Likewise.
6480         (vrmlsldavhq_s32): Likewise.
6481         (vrmlaldavhxq_s32): Likewise.
6482         (vrmlaldavhq_s32): Likewise.
6483         (vcvttq_f16_f32): Likewise.
6484         (vcvtbq_f16_f32): Likewise.
6485         (vaddlvaq_s32): Likewise.
6486         (__arm_vqmovntq_u16): Define intrinsic.
6487         (__arm_vqmovnbq_u16): Likewise.
6488         (__arm_vmulltq_poly_p8): Likewise.
6489         (__arm_vmullbq_poly_p8): Likewise.
6490         (__arm_vmovntq_u16): Likewise.
6491         (__arm_vmovnbq_u16): Likewise.
6492         (__arm_vmlaldavxq_u16): Likewise.
6493         (__arm_vmlaldavq_u16): Likewise.
6494         (__arm_vqmovuntq_s16): Likewise.
6495         (__arm_vqmovunbq_s16): Likewise.
6496         (__arm_vshlltq_n_u8): Likewise.
6497         (__arm_vshllbq_n_u8): Likewise.
6498         (__arm_vorrq_n_u16): Likewise.
6499         (__arm_vbicq_n_u16): Likewise.
6500         (__arm_vcmpneq_n_f16): Likewise.
6501         (__arm_vcmpneq_f16): Likewise.
6502         (__arm_vcmpltq_n_f16): Likewise.
6503         (__arm_vcmpltq_f16): Likewise.
6504         (__arm_vcmpleq_n_f16): Likewise.
6505         (__arm_vcmpleq_f16): Likewise.
6506         (__arm_vcmpgtq_n_f16): Likewise.
6507         (__arm_vcmpgtq_f16): Likewise.
6508         (__arm_vcmpgeq_n_f16): Likewise.
6509         (__arm_vcmpgeq_f16): Likewise.
6510         (__arm_vcmpeqq_n_f16): Likewise.
6511         (__arm_vcmpeqq_f16): Likewise.
6512         (__arm_vsubq_f16): Likewise.
6513         (__arm_vqmovntq_s16): Likewise.
6514         (__arm_vqmovnbq_s16): Likewise.
6515         (__arm_vqdmulltq_s16): Likewise.
6516         (__arm_vqdmulltq_n_s16): Likewise.
6517         (__arm_vqdmullbq_s16): Likewise.
6518         (__arm_vqdmullbq_n_s16): Likewise.
6519         (__arm_vorrq_f16): Likewise.
6520         (__arm_vornq_f16): Likewise.
6521         (__arm_vmulq_n_f16): Likewise.
6522         (__arm_vmulq_f16): Likewise.
6523         (__arm_vmovntq_s16): Likewise.
6524         (__arm_vmovnbq_s16): Likewise.
6525         (__arm_vmlsldavxq_s16): Likewise.
6526         (__arm_vmlsldavq_s16): Likewise.
6527         (__arm_vmlaldavxq_s16): Likewise.
6528         (__arm_vmlaldavq_s16): Likewise.
6529         (__arm_vminnmvq_f16): Likewise.
6530         (__arm_vminnmq_f16): Likewise.
6531         (__arm_vminnmavq_f16): Likewise.
6532         (__arm_vminnmaq_f16): Likewise.
6533         (__arm_vmaxnmvq_f16): Likewise.
6534         (__arm_vmaxnmq_f16): Likewise.
6535         (__arm_vmaxnmavq_f16): Likewise.
6536         (__arm_vmaxnmaq_f16): Likewise.
6537         (__arm_veorq_f16): Likewise.
6538         (__arm_vcmulq_rot90_f16): Likewise.
6539         (__arm_vcmulq_rot270_f16): Likewise.
6540         (__arm_vcmulq_rot180_f16): Likewise.
6541         (__arm_vcmulq_f16): Likewise.
6542         (__arm_vcaddq_rot90_f16): Likewise.
6543         (__arm_vcaddq_rot270_f16): Likewise.
6544         (__arm_vbicq_f16): Likewise.
6545         (__arm_vandq_f16): Likewise.
6546         (__arm_vaddq_n_f16): Likewise.
6547         (__arm_vabdq_f16): Likewise.
6548         (__arm_vshlltq_n_s8): Likewise.
6549         (__arm_vshllbq_n_s8): Likewise.
6550         (__arm_vorrq_n_s16): Likewise.
6551         (__arm_vbicq_n_s16): Likewise.
6552         (__arm_vqmovntq_u32): Likewise.
6553         (__arm_vqmovnbq_u32): Likewise.
6554         (__arm_vmulltq_poly_p16): Likewise.
6555         (__arm_vmullbq_poly_p16): Likewise.
6556         (__arm_vmovntq_u32): Likewise.
6557         (__arm_vmovnbq_u32): Likewise.
6558         (__arm_vmlaldavxq_u32): Likewise.
6559         (__arm_vmlaldavq_u32): Likewise.
6560         (__arm_vqmovuntq_s32): Likewise.
6561         (__arm_vqmovunbq_s32): Likewise.
6562         (__arm_vshlltq_n_u16): Likewise.
6563         (__arm_vshllbq_n_u16): Likewise.
6564         (__arm_vorrq_n_u32): Likewise.
6565         (__arm_vbicq_n_u32): Likewise.
6566         (__arm_vcmpneq_n_f32): Likewise.
6567         (__arm_vcmpneq_f32): Likewise.
6568         (__arm_vcmpltq_n_f32): Likewise.
6569         (__arm_vcmpltq_f32): Likewise.
6570         (__arm_vcmpleq_n_f32): Likewise.
6571         (__arm_vcmpleq_f32): Likewise.
6572         (__arm_vcmpgtq_n_f32): Likewise.
6573         (__arm_vcmpgtq_f32): Likewise.
6574         (__arm_vcmpgeq_n_f32): Likewise.
6575         (__arm_vcmpgeq_f32): Likewise.
6576         (__arm_vcmpeqq_n_f32): Likewise.
6577         (__arm_vcmpeqq_f32): Likewise.
6578         (__arm_vsubq_f32): Likewise.
6579         (__arm_vqmovntq_s32): Likewise.
6580         (__arm_vqmovnbq_s32): Likewise.
6581         (__arm_vqdmulltq_s32): Likewise.
6582         (__arm_vqdmulltq_n_s32): Likewise.
6583         (__arm_vqdmullbq_s32): Likewise.
6584         (__arm_vqdmullbq_n_s32): Likewise.
6585         (__arm_vorrq_f32): Likewise.
6586         (__arm_vornq_f32): Likewise.
6587         (__arm_vmulq_n_f32): Likewise.
6588         (__arm_vmulq_f32): Likewise.
6589         (__arm_vmovntq_s32): Likewise.
6590         (__arm_vmovnbq_s32): Likewise.
6591         (__arm_vmlsldavxq_s32): Likewise.
6592         (__arm_vmlsldavq_s32): Likewise.
6593         (__arm_vmlaldavxq_s32): Likewise.
6594         (__arm_vmlaldavq_s32): Likewise.
6595         (__arm_vminnmvq_f32): Likewise.
6596         (__arm_vminnmq_f32): Likewise.
6597         (__arm_vminnmavq_f32): Likewise.
6598         (__arm_vminnmaq_f32): Likewise.
6599         (__arm_vmaxnmvq_f32): Likewise.
6600         (__arm_vmaxnmq_f32): Likewise.
6601         (__arm_vmaxnmavq_f32): Likewise.
6602         (__arm_vmaxnmaq_f32): Likewise.
6603         (__arm_veorq_f32): Likewise.
6604         (__arm_vcmulq_rot90_f32): Likewise.
6605         (__arm_vcmulq_rot270_f32): Likewise.
6606         (__arm_vcmulq_rot180_f32): Likewise.
6607         (__arm_vcmulq_f32): Likewise.
6608         (__arm_vcaddq_rot90_f32): Likewise.
6609         (__arm_vcaddq_rot270_f32): Likewise.
6610         (__arm_vbicq_f32): Likewise.
6611         (__arm_vandq_f32): Likewise.
6612         (__arm_vaddq_n_f32): Likewise.
6613         (__arm_vabdq_f32): Likewise.
6614         (__arm_vshlltq_n_s16): Likewise.
6615         (__arm_vshllbq_n_s16): Likewise.
6616         (__arm_vorrq_n_s32): Likewise.
6617         (__arm_vbicq_n_s32): Likewise.
6618         (__arm_vrmlaldavhq_u32): Likewise.
6619         (__arm_vctp8q_m): Likewise.
6620         (__arm_vctp64q_m): Likewise.
6621         (__arm_vctp32q_m): Likewise.
6622         (__arm_vctp16q_m): Likewise.
6623         (__arm_vaddlvaq_u32): Likewise.
6624         (__arm_vrmlsldavhxq_s32): Likewise.
6625         (__arm_vrmlsldavhq_s32): Likewise.
6626         (__arm_vrmlaldavhxq_s32): Likewise.
6627         (__arm_vrmlaldavhq_s32): Likewise.
6628         (__arm_vcvttq_f16_f32): Likewise.
6629         (__arm_vcvtbq_f16_f32): Likewise.
6630         (__arm_vaddlvaq_s32): Likewise.
6631         (vst4q): Define polymorphic variant.
6632         (vrndxq): Likewise.
6633         (vrndq): Likewise.
6634         (vrndpq): Likewise.
6635         (vrndnq): Likewise.
6636         (vrndmq): Likewise.
6637         (vrndaq): Likewise.
6638         (vrev64q): Likewise.
6639         (vnegq): Likewise.
6640         (vdupq_n): Likewise.
6641         (vabsq): Likewise.
6642         (vrev32q): Likewise.
6643         (vcvtbq_f32): Likewise.
6644         (vcvttq_f32): Likewise.
6645         (vcvtq): Likewise.
6646         (vsubq_n): Likewise.
6647         (vbrsrq_n): Likewise.
6648         (vcvtq_n): Likewise.
6649         (vsubq): Likewise.
6650         (vorrq): Likewise.
6651         (vabdq): Likewise.
6652         (vaddq_n): Likewise.
6653         (vandq): Likewise.
6654         (vbicq): Likewise.
6655         (vornq): Likewise.
6656         (vmulq_n): Likewise.
6657         (vmulq): Likewise.
6658         (vcaddq_rot270): Likewise.
6659         (vcmpeqq_n): Likewise.
6660         (vcmpeqq): Likewise.
6661         (vcaddq_rot90): Likewise.
6662         (vcmpgeq_n): Likewise.
6663         (vcmpgeq): Likewise.
6664         (vcmpgtq_n): Likewise.
6665         (vcmpgtq): Likewise.
6666         (vcmpgtq): Likewise.
6667         (vcmpleq_n): Likewise.
6668         (vcmpleq_n): Likewise.
6669         (vcmpleq): Likewise.
6670         (vcmpleq): Likewise.
6671         (vcmpltq_n): Likewise.
6672         (vcmpltq_n): Likewise.
6673         (vcmpltq): Likewise.
6674         (vcmpltq): Likewise.
6675         (vcmpneq_n): Likewise.
6676         (vcmpneq_n): Likewise.
6677         (vcmpneq): Likewise.
6678         (vcmpneq): Likewise.
6679         (vcmulq): Likewise.
6680         (vcmulq): Likewise.
6681         (vcmulq_rot180): Likewise.
6682         (vcmulq_rot180): Likewise.
6683         (vcmulq_rot270): Likewise.
6684         (vcmulq_rot270): Likewise.
6685         (vcmulq_rot90): Likewise.
6686         (vcmulq_rot90): Likewise.
6687         (veorq): Likewise.
6688         (veorq): Likewise.
6689         (vmaxnmaq): Likewise.
6690         (vmaxnmaq): Likewise.
6691         (vmaxnmavq): Likewise.
6692         (vmaxnmavq): Likewise.
6693         (vmaxnmq): Likewise.
6694         (vmaxnmq): Likewise.
6695         (vmaxnmvq): Likewise.
6696         (vmaxnmvq): Likewise.
6697         (vminnmaq): Likewise.
6698         (vminnmaq): Likewise.
6699         (vminnmavq): Likewise.
6700         (vminnmavq): Likewise.
6701         (vminnmq): Likewise.
6702         (vminnmq): Likewise.
6703         (vminnmvq): Likewise.
6704         (vminnmvq): Likewise.
6705         (vbicq_n): Likewise.
6706         (vqmovntq): Likewise.
6707         (vqmovntq): Likewise.
6708         (vqmovnbq): Likewise.
6709         (vqmovnbq): Likewise.
6710         (vmulltq_poly): Likewise.
6711         (vmulltq_poly): Likewise.
6712         (vmullbq_poly): Likewise.
6713         (vmullbq_poly): Likewise.
6714         (vmovntq): Likewise.
6715         (vmovntq): Likewise.
6716         (vmovnbq): Likewise.
6717         (vmovnbq): Likewise.
6718         (vmlaldavxq): Likewise.
6719         (vmlaldavxq): Likewise.
6720         (vqmovuntq): Likewise.
6721         (vqmovuntq): Likewise.
6722         (vshlltq_n): Likewise.
6723         (vshlltq_n): Likewise.
6724         (vshllbq_n): Likewise.
6725         (vshllbq_n): Likewise.
6726         (vorrq_n): Likewise.
6727         (vorrq_n): Likewise.
6728         (vmlaldavq): Likewise.
6729         (vmlaldavq): Likewise.
6730         (vqmovunbq): Likewise.
6731         (vqmovunbq): Likewise.
6732         (vqdmulltq_n): Likewise.
6733         (vqdmulltq_n): Likewise.
6734         (vqdmulltq): Likewise.
6735         (vqdmulltq): Likewise.
6736         (vqdmullbq_n): Likewise.
6737         (vqdmullbq_n): Likewise.
6738         (vqdmullbq): Likewise.
6739         (vqdmullbq): Likewise.
6740         (vaddlvaq): Likewise.
6741         (vaddlvaq): Likewise.
6742         (vrmlaldavhq): Likewise.
6743         (vrmlaldavhq): Likewise.
6744         (vrmlaldavhxq): Likewise.
6745         (vrmlaldavhxq): Likewise.
6746         (vrmlsldavhq): Likewise.
6747         (vrmlsldavhq): Likewise.
6748         (vrmlsldavhxq): Likewise.
6749         (vrmlsldavhxq): Likewise.
6750         (vmlsldavxq): Likewise.
6751         (vmlsldavxq): Likewise.
6752         (vmlsldavq): Likewise.
6753         (vmlsldavq): Likewise.
6754         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
6755         (BINOP_NONE_NONE_NONE): Likewise.
6756         (BINOP_UNONE_NONE_NONE): Likewise.
6757         (BINOP_UNONE_UNONE_IMM): Likewise.
6758         (BINOP_UNONE_UNONE_NONE): Likewise.
6759         (BINOP_UNONE_UNONE_UNONE): Likewise.
6760         * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
6761         (mve_vaddlvaq_<supf>v4si): Likewise.
6762         (mve_vaddq_n_f<mode>): Likewise.
6763         (mve_vandq_f<mode>): Likewise.
6764         (mve_vbicq_f<mode>): Likewise.
6765         (mve_vbicq_n_<supf><mode>): Likewise.
6766         (mve_vcaddq_rot270_f<mode>): Likewise.
6767         (mve_vcaddq_rot90_f<mode>): Likewise.
6768         (mve_vcmpeqq_f<mode>): Likewise.
6769         (mve_vcmpeqq_n_f<mode>): Likewise.
6770         (mve_vcmpgeq_f<mode>): Likewise.
6771         (mve_vcmpgeq_n_f<mode>): Likewise.
6772         (mve_vcmpgtq_f<mode>): Likewise.
6773         (mve_vcmpgtq_n_f<mode>): Likewise.
6774         (mve_vcmpleq_f<mode>): Likewise.
6775         (mve_vcmpleq_n_f<mode>): Likewise.
6776         (mve_vcmpltq_f<mode>): Likewise.
6777         (mve_vcmpltq_n_f<mode>): Likewise.
6778         (mve_vcmpneq_f<mode>): Likewise.
6779         (mve_vcmpneq_n_f<mode>): Likewise.
6780         (mve_vcmulq_f<mode>): Likewise.
6781         (mve_vcmulq_rot180_f<mode>): Likewise.
6782         (mve_vcmulq_rot270_f<mode>): Likewise.
6783         (mve_vcmulq_rot90_f<mode>): Likewise.
6784         (mve_vctp<mode1>q_mhi): Likewise.
6785         (mve_vcvtbq_f16_f32v8hf): Likewise.
6786         (mve_vcvttq_f16_f32v8hf): Likewise.
6787         (mve_veorq_f<mode>): Likewise.
6788         (mve_vmaxnmaq_f<mode>): Likewise.
6789         (mve_vmaxnmavq_f<mode>): Likewise.
6790         (mve_vmaxnmq_f<mode>): Likewise.
6791         (mve_vmaxnmvq_f<mode>): Likewise.
6792         (mve_vminnmaq_f<mode>): Likewise.
6793         (mve_vminnmavq_f<mode>): Likewise.
6794         (mve_vminnmq_f<mode>): Likewise.
6795         (mve_vminnmvq_f<mode>): Likewise.
6796         (mve_vmlaldavq_<supf><mode>): Likewise.
6797         (mve_vmlaldavxq_<supf><mode>): Likewise.
6798         (mve_vmlsldavq_s<mode>): Likewise.
6799         (mve_vmlsldavxq_s<mode>): Likewise.
6800         (mve_vmovnbq_<supf><mode>): Likewise.
6801         (mve_vmovntq_<supf><mode>): Likewise.
6802         (mve_vmulq_f<mode>): Likewise.
6803         (mve_vmulq_n_f<mode>): Likewise.
6804         (mve_vornq_f<mode>): Likewise.
6805         (mve_vorrq_f<mode>): Likewise.
6806         (mve_vorrq_n_<supf><mode>): Likewise.
6807         (mve_vqdmullbq_n_s<mode>): Likewise.
6808         (mve_vqdmullbq_s<mode>): Likewise.
6809         (mve_vqdmulltq_n_s<mode>): Likewise.
6810         (mve_vqdmulltq_s<mode>): Likewise.
6811         (mve_vqmovnbq_<supf><mode>): Likewise.
6812         (mve_vqmovntq_<supf><mode>): Likewise.
6813         (mve_vqmovunbq_s<mode>): Likewise.
6814         (mve_vqmovuntq_s<mode>): Likewise.
6815         (mve_vrmlaldavhxq_sv4si): Likewise.
6816         (mve_vrmlsldavhq_sv4si): Likewise.
6817         (mve_vrmlsldavhxq_sv4si): Likewise.
6818         (mve_vshllbq_n_<supf><mode>): Likewise.
6819         (mve_vshlltq_n_<supf><mode>): Likewise.
6820         (mve_vsubq_f<mode>): Likewise.
6821         (mve_vmulltq_poly_p<mode>): Likewise.
6822         (mve_vmullbq_poly_p<mode>): Likewise.
6823         (mve_vrmlaldavhq_<supf>v4si): Likewise.
6824
6825 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
6826             Mihail Ionescu  <mihail.ionescu@arm.com>
6827             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
6828
6829         * config/arm/arm_mve.h (vsubq_u8): Define macro.
6830         (vsubq_n_u8): Likewise.
6831         (vrmulhq_u8): Likewise.
6832         (vrhaddq_u8): Likewise.
6833         (vqsubq_u8): Likewise.
6834         (vqsubq_n_u8): Likewise.
6835         (vqaddq_u8): Likewise.
6836         (vqaddq_n_u8): Likewise.
6837         (vorrq_u8): Likewise.
6838         (vornq_u8): Likewise.
6839         (vmulq_u8): Likewise.
6840         (vmulq_n_u8): Likewise.
6841         (vmulltq_int_u8): Likewise.
6842         (vmullbq_int_u8): Likewise.
6843         (vmulhq_u8): Likewise.
6844         (vmladavq_u8): Likewise.
6845         (vminvq_u8): Likewise.
6846         (vminq_u8): Likewise.
6847         (vmaxvq_u8): Likewise.
6848         (vmaxq_u8): Likewise.
6849         (vhsubq_u8): Likewise.
6850         (vhsubq_n_u8): Likewise.
6851         (vhaddq_u8): Likewise.
6852         (vhaddq_n_u8): Likewise.
6853         (veorq_u8): Likewise.
6854         (vcmpneq_n_u8): Likewise.
6855         (vcmphiq_u8): Likewise.
6856         (vcmphiq_n_u8): Likewise.
6857         (vcmpeqq_u8): Likewise.
6858         (vcmpeqq_n_u8): Likewise.
6859         (vcmpcsq_u8): Likewise.
6860         (vcmpcsq_n_u8): Likewise.
6861         (vcaddq_rot90_u8): Likewise.
6862         (vcaddq_rot270_u8): Likewise.
6863         (vbicq_u8): Likewise.
6864         (vandq_u8): Likewise.
6865         (vaddvq_p_u8): Likewise.
6866         (vaddvaq_u8): Likewise.
6867         (vaddq_n_u8): Likewise.
6868         (vabdq_u8): Likewise.
6869         (vshlq_r_u8): Likewise.
6870         (vrshlq_u8): Likewise.
6871         (vrshlq_n_u8): Likewise.
6872         (vqshlq_u8): Likewise.
6873         (vqshlq_r_u8): Likewise.
6874         (vqrshlq_u8): Likewise.
6875         (vqrshlq_n_u8): Likewise.
6876         (vminavq_s8): Likewise.
6877         (vminaq_s8): Likewise.
6878         (vmaxavq_s8): Likewise.
6879         (vmaxaq_s8): Likewise.
6880         (vbrsrq_n_u8): Likewise.
6881         (vshlq_n_u8): Likewise.
6882         (vrshrq_n_u8): Likewise.
6883         (vqshlq_n_u8): Likewise.
6884         (vcmpneq_n_s8): Likewise.
6885         (vcmpltq_s8): Likewise.
6886         (vcmpltq_n_s8): Likewise.
6887         (vcmpleq_s8): Likewise.
6888         (vcmpleq_n_s8): Likewise.
6889         (vcmpgtq_s8): Likewise.
6890         (vcmpgtq_n_s8): Likewise.
6891         (vcmpgeq_s8): Likewise.
6892         (vcmpgeq_n_s8): Likewise.
6893         (vcmpeqq_s8): Likewise.
6894         (vcmpeqq_n_s8): Likewise.
6895         (vqshluq_n_s8): Likewise.
6896         (vaddvq_p_s8): Likewise.
6897         (vsubq_s8): Likewise.
6898         (vsubq_n_s8): Likewise.
6899         (vshlq_r_s8): Likewise.
6900         (vrshlq_s8): Likewise.
6901         (vrshlq_n_s8): Likewise.
6902         (vrmulhq_s8): Likewise.
6903         (vrhaddq_s8): Likewise.
6904         (vqsubq_s8): Likewise.
6905         (vqsubq_n_s8): Likewise.
6906         (vqshlq_s8): Likewise.
6907         (vqshlq_r_s8): Likewise.
6908         (vqrshlq_s8): Likewise.
6909         (vqrshlq_n_s8): Likewise.
6910         (vqrdmulhq_s8): Likewise.
6911         (vqrdmulhq_n_s8): Likewise.
6912         (vqdmulhq_s8): Likewise.
6913         (vqdmulhq_n_s8): Likewise.
6914         (vqaddq_s8): Likewise.
6915         (vqaddq_n_s8): Likewise.
6916         (vorrq_s8): Likewise.
6917         (vornq_s8): Likewise.
6918         (vmulq_s8): Likewise.
6919         (vmulq_n_s8): Likewise.
6920         (vmulltq_int_s8): Likewise.
6921         (vmullbq_int_s8): Likewise.
6922         (vmulhq_s8): Likewise.
6923         (vmlsdavxq_s8): Likewise.
6924         (vmlsdavq_s8): Likewise.
6925         (vmladavxq_s8): Likewise.
6926         (vmladavq_s8): Likewise.
6927         (vminvq_s8): Likewise.
6928         (vminq_s8): Likewise.
6929         (vmaxvq_s8): Likewise.
6930         (vmaxq_s8): Likewise.
6931         (vhsubq_s8): Likewise.
6932         (vhsubq_n_s8): Likewise.
6933         (vhcaddq_rot90_s8): Likewise.
6934         (vhcaddq_rot270_s8): Likewise.
6935         (vhaddq_s8): Likewise.
6936         (vhaddq_n_s8): Likewise.
6937         (veorq_s8): Likewise.
6938         (vcaddq_rot90_s8): Likewise.
6939         (vcaddq_rot270_s8): Likewise.
6940         (vbrsrq_n_s8): Likewise.
6941         (vbicq_s8): Likewise.
6942         (vandq_s8): Likewise.
6943         (vaddvaq_s8): Likewise.
6944         (vaddq_n_s8): Likewise.
6945         (vabdq_s8): Likewise.
6946         (vshlq_n_s8): Likewise.
6947         (vrshrq_n_s8): Likewise.
6948         (vqshlq_n_s8): Likewise.
6949         (vsubq_u16): Likewise.
6950         (vsubq_n_u16): Likewise.
6951         (vrmulhq_u16): Likewise.
6952         (vrhaddq_u16): Likewise.
6953         (vqsubq_u16): Likewise.
6954         (vqsubq_n_u16): Likewise.
6955         (vqaddq_u16): Likewise.
6956         (vqaddq_n_u16): Likewise.
6957         (vorrq_u16): Likewise.
6958         (vornq_u16): Likewise.
6959         (vmulq_u16): Likewise.
6960         (vmulq_n_u16): Likewise.
6961         (vmulltq_int_u16): Likewise.
6962         (vmullbq_int_u16): Likewise.
6963         (vmulhq_u16): Likewise.
6964         (vmladavq_u16): Likewise.
6965         (vminvq_u16): Likewise.
6966         (vminq_u16): Likewise.
6967         (vmaxvq_u16): Likewise.
6968         (vmaxq_u16): Likewise.
6969         (vhsubq_u16): Likewise.
6970         (vhsubq_n_u16): Likewise.
6971         (vhaddq_u16): Likewise.
6972         (vhaddq_n_u16): Likewise.
6973         (veorq_u16): Likewise.
6974         (vcmpneq_n_u16): Likewise.
6975         (vcmphiq_u16): Likewise.
6976         (vcmphiq_n_u16): Likewise.
6977         (vcmpeqq_u16): Likewise.
6978         (vcmpeqq_n_u16): Likewise.
6979         (vcmpcsq_u16): Likewise.
6980         (vcmpcsq_n_u16): Likewise.
6981         (vcaddq_rot90_u16): Likewise.
6982         (vcaddq_rot270_u16): Likewise.
6983         (vbicq_u16): Likewise.
6984         (vandq_u16): Likewise.
6985         (vaddvq_p_u16): Likewise.
6986         (vaddvaq_u16): Likewise.
6987         (vaddq_n_u16): Likewise.
6988         (vabdq_u16): Likewise.
6989         (vshlq_r_u16): Likewise.
6990         (vrshlq_u16): Likewise.
6991         (vrshlq_n_u16): Likewise.
6992         (vqshlq_u16): Likewise.
6993         (vqshlq_r_u16): Likewise.
6994         (vqrshlq_u16): Likewise.
6995         (vqrshlq_n_u16): Likewise.
6996         (vminavq_s16): Likewise.
6997         (vminaq_s16): Likewise.
6998         (vmaxavq_s16): Likewise.
6999         (vmaxaq_s16): Likewise.
7000         (vbrsrq_n_u16): Likewise.
7001         (vshlq_n_u16): Likewise.
7002         (vrshrq_n_u16): Likewise.
7003         (vqshlq_n_u16): Likewise.
7004         (vcmpneq_n_s16): Likewise.
7005         (vcmpltq_s16): Likewise.
7006         (vcmpltq_n_s16): Likewise.
7007         (vcmpleq_s16): Likewise.
7008         (vcmpleq_n_s16): Likewise.
7009         (vcmpgtq_s16): Likewise.
7010         (vcmpgtq_n_s16): Likewise.
7011         (vcmpgeq_s16): Likewise.
7012         (vcmpgeq_n_s16): Likewise.
7013         (vcmpeqq_s16): Likewise.
7014         (vcmpeqq_n_s16): Likewise.
7015         (vqshluq_n_s16): Likewise.
7016         (vaddvq_p_s16): Likewise.
7017         (vsubq_s16): Likewise.
7018         (vsubq_n_s16): Likewise.
7019         (vshlq_r_s16): Likewise.
7020         (vrshlq_s16): Likewise.
7021         (vrshlq_n_s16): Likewise.
7022         (vrmulhq_s16): Likewise.
7023         (vrhaddq_s16): Likewise.
7024         (vqsubq_s16): Likewise.
7025         (vqsubq_n_s16): Likewise.
7026         (vqshlq_s16): Likewise.
7027         (vqshlq_r_s16): Likewise.
7028         (vqrshlq_s16): Likewise.
7029         (vqrshlq_n_s16): Likewise.
7030         (vqrdmulhq_s16): Likewise.
7031         (vqrdmulhq_n_s16): Likewise.
7032         (vqdmulhq_s16): Likewise.
7033         (vqdmulhq_n_s16): Likewise.
7034         (vqaddq_s16): Likewise.
7035         (vqaddq_n_s16): Likewise.
7036         (vorrq_s16): Likewise.
7037         (vornq_s16): Likewise.
7038         (vmulq_s16): Likewise.
7039         (vmulq_n_s16): Likewise.
7040         (vmulltq_int_s16): Likewise.
7041         (vmullbq_int_s16): Likewise.
7042         (vmulhq_s16): Likewise.
7043         (vmlsdavxq_s16): Likewise.
7044         (vmlsdavq_s16): Likewise.
7045         (vmladavxq_s16): Likewise.
7046         (vmladavq_s16): Likewise.
7047         (vminvq_s16): Likewise.
7048         (vminq_s16): Likewise.
7049         (vmaxvq_s16): Likewise.
7050         (vmaxq_s16): Likewise.
7051         (vhsubq_s16): Likewise.
7052         (vhsubq_n_s16): Likewise.
7053         (vhcaddq_rot90_s16): Likewise.
7054         (vhcaddq_rot270_s16): Likewise.
7055         (vhaddq_s16): Likewise.
7056         (vhaddq_n_s16): Likewise.
7057         (veorq_s16): Likewise.
7058         (vcaddq_rot90_s16): Likewise.
7059         (vcaddq_rot270_s16): Likewise.
7060         (vbrsrq_n_s16): Likewise.
7061         (vbicq_s16): Likewise.
7062         (vandq_s16): Likewise.
7063         (vaddvaq_s16): Likewise.
7064         (vaddq_n_s16): Likewise.
7065         (vabdq_s16): Likewise.
7066         (vshlq_n_s16): Likewise.
7067         (vrshrq_n_s16): Likewise.
7068         (vqshlq_n_s16): Likewise.
7069         (vsubq_u32): Likewise.
7070         (vsubq_n_u32): Likewise.
7071         (vrmulhq_u32): Likewise.
7072         (vrhaddq_u32): Likewise.
7073         (vqsubq_u32): Likewise.
7074         (vqsubq_n_u32): Likewise.
7075         (vqaddq_u32): Likewise.
7076         (vqaddq_n_u32): Likewise.
7077         (vorrq_u32): Likewise.
7078         (vornq_u32): Likewise.
7079         (vmulq_u32): Likewise.
7080         (vmulq_n_u32): Likewise.
7081         (vmulltq_int_u32): Likewise.
7082         (vmullbq_int_u32): Likewise.
7083         (vmulhq_u32): Likewise.
7084         (vmladavq_u32): Likewise.
7085         (vminvq_u32): Likewise.
7086         (vminq_u32): Likewise.
7087         (vmaxvq_u32): Likewise.
7088         (vmaxq_u32): Likewise.
7089         (vhsubq_u32): Likewise.
7090         (vhsubq_n_u32): Likewise.
7091         (vhaddq_u32): Likewise.
7092         (vhaddq_n_u32): Likewise.
7093         (veorq_u32): Likewise.
7094         (vcmpneq_n_u32): Likewise.
7095         (vcmphiq_u32): Likewise.
7096         (vcmphiq_n_u32): Likewise.
7097         (vcmpeqq_u32): Likewise.
7098         (vcmpeqq_n_u32): Likewise.
7099         (vcmpcsq_u32): Likewise.
7100         (vcmpcsq_n_u32): Likewise.
7101         (vcaddq_rot90_u32): Likewise.
7102         (vcaddq_rot270_u32): Likewise.
7103         (vbicq_u32): Likewise.
7104         (vandq_u32): Likewise.
7105         (vaddvq_p_u32): Likewise.
7106         (vaddvaq_u32): Likewise.
7107         (vaddq_n_u32): Likewise.
7108         (vabdq_u32): Likewise.
7109         (vshlq_r_u32): Likewise.
7110         (vrshlq_u32): Likewise.
7111         (vrshlq_n_u32): Likewise.
7112         (vqshlq_u32): Likewise.
7113         (vqshlq_r_u32): Likewise.
7114         (vqrshlq_u32): Likewise.
7115         (vqrshlq_n_u32): Likewise.
7116         (vminavq_s32): Likewise.
7117         (vminaq_s32): Likewise.
7118         (vmaxavq_s32): Likewise.
7119         (vmaxaq_s32): Likewise.
7120         (vbrsrq_n_u32): Likewise.
7121         (vshlq_n_u32): Likewise.
7122         (vrshrq_n_u32): Likewise.
7123         (vqshlq_n_u32): Likewise.
7124         (vcmpneq_n_s32): Likewise.
7125         (vcmpltq_s32): Likewise.
7126         (vcmpltq_n_s32): Likewise.
7127         (vcmpleq_s32): Likewise.
7128         (vcmpleq_n_s32): Likewise.
7129         (vcmpgtq_s32): Likewise.
7130         (vcmpgtq_n_s32): Likewise.
7131         (vcmpgeq_s32): Likewise.
7132         (vcmpgeq_n_s32): Likewise.
7133         (vcmpeqq_s32): Likewise.
7134         (vcmpeqq_n_s32): Likewise.
7135         (vqshluq_n_s32): Likewise.
7136         (vaddvq_p_s32): Likewise.
7137         (vsubq_s32): Likewise.
7138         (vsubq_n_s32): Likewise.
7139         (vshlq_r_s32): Likewise.
7140         (vrshlq_s32): Likewise.
7141         (vrshlq_n_s32): Likewise.
7142         (vrmulhq_s32): Likewise.
7143         (vrhaddq_s32): Likewise.
7144         (vqsubq_s32): Likewise.
7145         (vqsubq_n_s32): Likewise.
7146         (vqshlq_s32): Likewise.
7147         (vqshlq_r_s32): Likewise.
7148         (vqrshlq_s32): Likewise.
7149         (vqrshlq_n_s32): Likewise.
7150         (vqrdmulhq_s32): Likewise.
7151         (vqrdmulhq_n_s32): Likewise.
7152         (vqdmulhq_s32): Likewise.
7153         (vqdmulhq_n_s32): Likewise.
7154         (vqaddq_s32): Likewise.
7155         (vqaddq_n_s32): Likewise.
7156         (vorrq_s32): Likewise.
7157         (vornq_s32): Likewise.
7158         (vmulq_s32): Likewise.
7159         (vmulq_n_s32): Likewise.
7160         (vmulltq_int_s32): Likewise.
7161         (vmullbq_int_s32): Likewise.
7162         (vmulhq_s32): Likewise.
7163         (vmlsdavxq_s32): Likewise.
7164         (vmlsdavq_s32): Likewise.
7165         (vmladavxq_s32): Likewise.
7166         (vmladavq_s32): Likewise.
7167         (vminvq_s32): Likewise.
7168         (vminq_s32): Likewise.
7169         (vmaxvq_s32): Likewise.
7170         (vmaxq_s32): Likewise.
7171         (vhsubq_s32): Likewise.
7172         (vhsubq_n_s32): Likewise.
7173         (vhcaddq_rot90_s32): Likewise.
7174         (vhcaddq_rot270_s32): Likewise.
7175         (vhaddq_s32): Likewise.
7176         (vhaddq_n_s32): Likewise.
7177         (veorq_s32): Likewise.
7178         (vcaddq_rot90_s32): Likewise.
7179         (vcaddq_rot270_s32): Likewise.
7180         (vbrsrq_n_s32): Likewise.
7181         (vbicq_s32): Likewise.
7182         (vandq_s32): Likewise.
7183         (vaddvaq_s32): Likewise.
7184         (vaddq_n_s32): Likewise.
7185         (vabdq_s32): Likewise.
7186         (vshlq_n_s32): Likewise.
7187         (vrshrq_n_s32): Likewise.
7188         (vqshlq_n_s32): Likewise.
7189         (__arm_vsubq_u8): Define intrinsic.
7190         (__arm_vsubq_n_u8): Likewise.
7191         (__arm_vrmulhq_u8): Likewise.
7192         (__arm_vrhaddq_u8): Likewise.
7193         (__arm_vqsubq_u8): Likewise.
7194         (__arm_vqsubq_n_u8): Likewise.
7195         (__arm_vqaddq_u8): Likewise.
7196         (__arm_vqaddq_n_u8): Likewise.
7197         (__arm_vorrq_u8): Likewise.
7198         (__arm_vornq_u8): Likewise.
7199         (__arm_vmulq_u8): Likewise.
7200         (__arm_vmulq_n_u8): Likewise.
7201         (__arm_vmulltq_int_u8): Likewise.
7202         (__arm_vmullbq_int_u8): Likewise.
7203         (__arm_vmulhq_u8): Likewise.
7204         (__arm_vmladavq_u8): Likewise.
7205         (__arm_vminvq_u8): Likewise.
7206         (__arm_vminq_u8): Likewise.
7207         (__arm_vmaxvq_u8): Likewise.
7208         (__arm_vmaxq_u8): Likewise.
7209         (__arm_vhsubq_u8): Likewise.
7210         (__arm_vhsubq_n_u8): Likewise.
7211         (__arm_vhaddq_u8): Likewise.
7212         (__arm_vhaddq_n_u8): Likewise.
7213         (__arm_veorq_u8): Likewise.
7214         (__arm_vcmpneq_n_u8): Likewise.
7215         (__arm_vcmphiq_u8): Likewise.
7216         (__arm_vcmphiq_n_u8): Likewise.
7217         (__arm_vcmpeqq_u8): Likewise.
7218         (__arm_vcmpeqq_n_u8): Likewise.
7219         (__arm_vcmpcsq_u8): Likewise.
7220         (__arm_vcmpcsq_n_u8): Likewise.
7221         (__arm_vcaddq_rot90_u8): Likewise.
7222         (__arm_vcaddq_rot270_u8): Likewise.
7223         (__arm_vbicq_u8): Likewise.
7224         (__arm_vandq_u8): Likewise.
7225         (__arm_vaddvq_p_u8): Likewise.
7226         (__arm_vaddvaq_u8): Likewise.
7227         (__arm_vaddq_n_u8): Likewise.
7228         (__arm_vabdq_u8): Likewise.
7229         (__arm_vshlq_r_u8): Likewise.
7230         (__arm_vrshlq_u8): Likewise.
7231         (__arm_vrshlq_n_u8): Likewise.
7232         (__arm_vqshlq_u8): Likewise.
7233         (__arm_vqshlq_r_u8): Likewise.
7234         (__arm_vqrshlq_u8): Likewise.
7235         (__arm_vqrshlq_n_u8): Likewise.
7236         (__arm_vminavq_s8): Likewise.
7237         (__arm_vminaq_s8): Likewise.
7238         (__arm_vmaxavq_s8): Likewise.
7239         (__arm_vmaxaq_s8): Likewise.
7240         (__arm_vbrsrq_n_u8): Likewise.
7241         (__arm_vshlq_n_u8): Likewise.
7242         (__arm_vrshrq_n_u8): Likewise.
7243         (__arm_vqshlq_n_u8): Likewise.
7244         (__arm_vcmpneq_n_s8): Likewise.
7245         (__arm_vcmpltq_s8): Likewise.
7246         (__arm_vcmpltq_n_s8): Likewise.
7247         (__arm_vcmpleq_s8): Likewise.
7248         (__arm_vcmpleq_n_s8): Likewise.
7249         (__arm_vcmpgtq_s8): Likewise.
7250         (__arm_vcmpgtq_n_s8): Likewise.
7251         (__arm_vcmpgeq_s8): Likewise.
7252         (__arm_vcmpgeq_n_s8): Likewise.
7253         (__arm_vcmpeqq_s8): Likewise.
7254         (__arm_vcmpeqq_n_s8): Likewise.
7255         (__arm_vqshluq_n_s8): Likewise.
7256         (__arm_vaddvq_p_s8): Likewise.
7257         (__arm_vsubq_s8): Likewise.
7258         (__arm_vsubq_n_s8): Likewise.
7259         (__arm_vshlq_r_s8): Likewise.
7260         (__arm_vrshlq_s8): Likewise.
7261         (__arm_vrshlq_n_s8): Likewise.
7262         (__arm_vrmulhq_s8): Likewise.
7263         (__arm_vrhaddq_s8): Likewise.
7264         (__arm_vqsubq_s8): Likewise.
7265         (__arm_vqsubq_n_s8): Likewise.
7266         (__arm_vqshlq_s8): Likewise.
7267         (__arm_vqshlq_r_s8): Likewise.
7268         (__arm_vqrshlq_s8): Likewise.
7269         (__arm_vqrshlq_n_s8): Likewise.
7270         (__arm_vqrdmulhq_s8): Likewise.
7271         (__arm_vqrdmulhq_n_s8): Likewise.
7272         (__arm_vqdmulhq_s8): Likewise.
7273         (__arm_vqdmulhq_n_s8): Likewise.
7274         (__arm_vqaddq_s8): Likewise.
7275         (__arm_vqaddq_n_s8): Likewise.
7276         (__arm_vorrq_s8): Likewise.
7277         (__arm_vornq_s8): Likewise.
7278         (__arm_vmulq_s8): Likewise.
7279         (__arm_vmulq_n_s8): Likewise.
7280         (__arm_vmulltq_int_s8): Likewise.
7281         (__arm_vmullbq_int_s8): Likewise.
7282         (__arm_vmulhq_s8): Likewise.
7283         (__arm_vmlsdavxq_s8): Likewise.
7284         (__arm_vmlsdavq_s8): Likewise.
7285         (__arm_vmladavxq_s8): Likewise.
7286         (__arm_vmladavq_s8): Likewise.
7287         (__arm_vminvq_s8): Likewise.
7288         (__arm_vminq_s8): Likewise.
7289         (__arm_vmaxvq_s8): Likewise.
7290         (__arm_vmaxq_s8): Likewise.
7291         (__arm_vhsubq_s8): Likewise.
7292         (__arm_vhsubq_n_s8): Likewise.
7293         (__arm_vhcaddq_rot90_s8): Likewise.
7294         (__arm_vhcaddq_rot270_s8): Likewise.
7295         (__arm_vhaddq_s8): Likewise.
7296         (__arm_vhaddq_n_s8): Likewise.
7297         (__arm_veorq_s8): Likewise.
7298         (__arm_vcaddq_rot90_s8): Likewise.
7299         (__arm_vcaddq_rot270_s8): Likewise.
7300         (__arm_vbrsrq_n_s8): Likewise.
7301         (__arm_vbicq_s8): Likewise.
7302         (__arm_vandq_s8): Likewise.
7303         (__arm_vaddvaq_s8): Likewise.
7304         (__arm_vaddq_n_s8): Likewise.
7305         (__arm_vabdq_s8): Likewise.
7306         (__arm_vshlq_n_s8): Likewise.
7307         (__arm_vrshrq_n_s8): Likewise.
7308         (__arm_vqshlq_n_s8): Likewise.
7309         (__arm_vsubq_u16): Likewise.
7310         (__arm_vsubq_n_u16): Likewise.
7311         (__arm_vrmulhq_u16): Likewise.
7312         (__arm_vrhaddq_u16): Likewise.
7313         (__arm_vqsubq_u16): Likewise.
7314         (__arm_vqsubq_n_u16): Likewise.
7315         (__arm_vqaddq_u16): Likewise.
7316         (__arm_vqaddq_n_u16): Likewise.
7317         (__arm_vorrq_u16): Likewise.
7318         (__arm_vornq_u16): Likewise.
7319         (__arm_vmulq_u16): Likewise.
7320         (__arm_vmulq_n_u16): Likewise.
7321         (__arm_vmulltq_int_u16): Likewise.
7322         (__arm_vmullbq_int_u16): Likewise.
7323         (__arm_vmulhq_u16): Likewise.
7324         (__arm_vmladavq_u16): Likewise.
7325         (__arm_vminvq_u16): Likewise.
7326         (__arm_vminq_u16): Likewise.
7327         (__arm_vmaxvq_u16): Likewise.
7328         (__arm_vmaxq_u16): Likewise.
7329         (__arm_vhsubq_u16): Likewise.
7330         (__arm_vhsubq_n_u16): Likewise.
7331         (__arm_vhaddq_u16): Likewise.
7332         (__arm_vhaddq_n_u16): Likewise.
7333         (__arm_veorq_u16): Likewise.
7334         (__arm_vcmpneq_n_u16): Likewise.
7335         (__arm_vcmphiq_u16): Likewise.
7336         (__arm_vcmphiq_n_u16): Likewise.
7337         (__arm_vcmpeqq_u16): Likewise.
7338         (__arm_vcmpeqq_n_u16): Likewise.
7339         (__arm_vcmpcsq_u16): Likewise.
7340         (__arm_vcmpcsq_n_u16): Likewise.
7341         (__arm_vcaddq_rot90_u16): Likewise.
7342         (__arm_vcaddq_rot270_u16): Likewise.
7343         (__arm_vbicq_u16): Likewise.
7344         (__arm_vandq_u16): Likewise.
7345         (__arm_vaddvq_p_u16): Likewise.
7346         (__arm_vaddvaq_u16): Likewise.
7347         (__arm_vaddq_n_u16): Likewise.
7348         (__arm_vabdq_u16): Likewise.
7349         (__arm_vshlq_r_u16): Likewise.
7350         (__arm_vrshlq_u16): Likewise.
7351         (__arm_vrshlq_n_u16): Likewise.
7352         (__arm_vqshlq_u16): Likewise.
7353         (__arm_vqshlq_r_u16): Likewise.
7354         (__arm_vqrshlq_u16): Likewise.
7355         (__arm_vqrshlq_n_u16): Likewise.
7356         (__arm_vminavq_s16): Likewise.
7357         (__arm_vminaq_s16): Likewise.
7358         (__arm_vmaxavq_s16): Likewise.
7359         (__arm_vmaxaq_s16): Likewise.
7360         (__arm_vbrsrq_n_u16): Likewise.
7361         (__arm_vshlq_n_u16): Likewise.
7362         (__arm_vrshrq_n_u16): Likewise.
7363         (__arm_vqshlq_n_u16): Likewise.
7364         (__arm_vcmpneq_n_s16): Likewise.
7365         (__arm_vcmpltq_s16): Likewise.
7366         (__arm_vcmpltq_n_s16): Likewise.
7367         (__arm_vcmpleq_s16): Likewise.
7368         (__arm_vcmpleq_n_s16): Likewise.
7369         (__arm_vcmpgtq_s16): Likewise.
7370         (__arm_vcmpgtq_n_s16): Likewise.
7371         (__arm_vcmpgeq_s16): Likewise.
7372         (__arm_vcmpgeq_n_s16): Likewise.
7373         (__arm_vcmpeqq_s16): Likewise.
7374         (__arm_vcmpeqq_n_s16): Likewise.
7375         (__arm_vqshluq_n_s16): Likewise.
7376         (__arm_vaddvq_p_s16): Likewise.
7377         (__arm_vsubq_s16): Likewise.
7378         (__arm_vsubq_n_s16): Likewise.
7379         (__arm_vshlq_r_s16): Likewise.
7380         (__arm_vrshlq_s16): Likewise.
7381         (__arm_vrshlq_n_s16): Likewise.
7382         (__arm_vrmulhq_s16): Likewise.
7383         (__arm_vrhaddq_s16): Likewise.
7384         (__arm_vqsubq_s16): Likewise.
7385         (__arm_vqsubq_n_s16): Likewise.
7386         (__arm_vqshlq_s16): Likewise.
7387         (__arm_vqshlq_r_s16): Likewise.
7388         (__arm_vqrshlq_s16): Likewise.
7389         (__arm_vqrshlq_n_s16): Likewise.
7390         (__arm_vqrdmulhq_s16): Likewise.
7391         (__arm_vqrdmulhq_n_s16): Likewise.
7392         (__arm_vqdmulhq_s16): Likewise.
7393         (__arm_vqdmulhq_n_s16): Likewise.
7394         (__arm_vqaddq_s16): Likewise.
7395         (__arm_vqaddq_n_s16): Likewise.
7396         (__arm_vorrq_s16): Likewise.
7397         (__arm_vornq_s16): Likewise.
7398         (__arm_vmulq_s16): Likewise.
7399         (__arm_vmulq_n_s16): Likewise.
7400         (__arm_vmulltq_int_s16): Likewise.
7401         (__arm_vmullbq_int_s16): Likewise.
7402         (__arm_vmulhq_s16): Likewise.
7403         (__arm_vmlsdavxq_s16): Likewise.
7404         (__arm_vmlsdavq_s16): Likewise.
7405         (__arm_vmladavxq_s16): Likewise.
7406         (__arm_vmladavq_s16): Likewise.
7407         (__arm_vminvq_s16): Likewise.
7408         (__arm_vminq_s16): Likewise.
7409         (__arm_vmaxvq_s16): Likewise.
7410         (__arm_vmaxq_s16): Likewise.
7411         (__arm_vhsubq_s16): Likewise.
7412         (__arm_vhsubq_n_s16): Likewise.
7413         (__arm_vhcaddq_rot90_s16): Likewise.
7414         (__arm_vhcaddq_rot270_s16): Likewise.
7415         (__arm_vhaddq_s16): Likewise.
7416         (__arm_vhaddq_n_s16): Likewise.
7417         (__arm_veorq_s16): Likewise.
7418         (__arm_vcaddq_rot90_s16): Likewise.
7419         (__arm_vcaddq_rot270_s16): Likewise.
7420         (__arm_vbrsrq_n_s16): Likewise.
7421         (__arm_vbicq_s16): Likewise.
7422         (__arm_vandq_s16): Likewise.
7423         (__arm_vaddvaq_s16): Likewise.
7424         (__arm_vaddq_n_s16): Likewise.
7425         (__arm_vabdq_s16): Likewise.
7426         (__arm_vshlq_n_s16): Likewise.
7427         (__arm_vrshrq_n_s16): Likewise.
7428         (__arm_vqshlq_n_s16): Likewise.
7429         (__arm_vsubq_u32): Likewise.
7430         (__arm_vsubq_n_u32): Likewise.
7431         (__arm_vrmulhq_u32): Likewise.
7432         (__arm_vrhaddq_u32): Likewise.
7433         (__arm_vqsubq_u32): Likewise.
7434         (__arm_vqsubq_n_u32): Likewise.
7435         (__arm_vqaddq_u32): Likewise.
7436         (__arm_vqaddq_n_u32): Likewise.
7437         (__arm_vorrq_u32): Likewise.
7438         (__arm_vornq_u32): Likewise.
7439         (__arm_vmulq_u32): Likewise.
7440         (__arm_vmulq_n_u32): Likewise.
7441         (__arm_vmulltq_int_u32): Likewise.
7442         (__arm_vmullbq_int_u32): Likewise.
7443         (__arm_vmulhq_u32): Likewise.
7444         (__arm_vmladavq_u32): Likewise.
7445         (__arm_vminvq_u32): Likewise.
7446         (__arm_vminq_u32): Likewise.
7447         (__arm_vmaxvq_u32): Likewise.
7448         (__arm_vmaxq_u32): Likewise.
7449         (__arm_vhsubq_u32): Likewise.
7450         (__arm_vhsubq_n_u32): Likewise.
7451         (__arm_vhaddq_u32): Likewise.
7452         (__arm_vhaddq_n_u32): Likewise.
7453         (__arm_veorq_u32): Likewise.
7454         (__arm_vcmpneq_n_u32): Likewise.
7455         (__arm_vcmphiq_u32): Likewise.
7456         (__arm_vcmphiq_n_u32): Likewise.
7457         (__arm_vcmpeqq_u32): Likewise.
7458         (__arm_vcmpeqq_n_u32): Likewise.
7459         (__arm_vcmpcsq_u32): Likewise.
7460         (__arm_vcmpcsq_n_u32): Likewise.
7461         (__arm_vcaddq_rot90_u32): Likewise.
7462         (__arm_vcaddq_rot270_u32): Likewise.
7463         (__arm_vbicq_u32): Likewise.
7464         (__arm_vandq_u32): Likewise.
7465         (__arm_vaddvq_p_u32): Likewise.
7466         (__arm_vaddvaq_u32): Likewise.
7467         (__arm_vaddq_n_u32): Likewise.
7468         (__arm_vabdq_u32): Likewise.
7469         (__arm_vshlq_r_u32): Likewise.
7470         (__arm_vrshlq_u32): Likewise.
7471         (__arm_vrshlq_n_u32): Likewise.
7472         (__arm_vqshlq_u32): Likewise.
7473         (__arm_vqshlq_r_u32): Likewise.
7474         (__arm_vqrshlq_u32): Likewise.
7475         (__arm_vqrshlq_n_u32): Likewise.
7476         (__arm_vminavq_s32): Likewise.
7477         (__arm_vminaq_s32): Likewise.
7478         (__arm_vmaxavq_s32): Likewise.
7479         (__arm_vmaxaq_s32): Likewise.
7480         (__arm_vbrsrq_n_u32): Likewise.
7481         (__arm_vshlq_n_u32): Likewise.
7482         (__arm_vrshrq_n_u32): Likewise.
7483         (__arm_vqshlq_n_u32): Likewise.
7484         (__arm_vcmpneq_n_s32): Likewise.
7485         (__arm_vcmpltq_s32): Likewise.
7486         (__arm_vcmpltq_n_s32): Likewise.
7487         (__arm_vcmpleq_s32): Likewise.
7488         (__arm_vcmpleq_n_s32): Likewise.
7489         (__arm_vcmpgtq_s32): Likewise.
7490         (__arm_vcmpgtq_n_s32): Likewise.
7491         (__arm_vcmpgeq_s32): Likewise.
7492         (__arm_vcmpgeq_n_s32): Likewise.
7493         (__arm_vcmpeqq_s32): Likewise.
7494         (__arm_vcmpeqq_n_s32): Likewise.
7495         (__arm_vqshluq_n_s32): Likewise.
7496         (__arm_vaddvq_p_s32): Likewise.
7497         (__arm_vsubq_s32): Likewise.
7498         (__arm_vsubq_n_s32): Likewise.
7499         (__arm_vshlq_r_s32): Likewise.
7500         (__arm_vrshlq_s32): Likewise.
7501         (__arm_vrshlq_n_s32): Likewise.
7502         (__arm_vrmulhq_s32): Likewise.
7503         (__arm_vrhaddq_s32): Likewise.
7504         (__arm_vqsubq_s32): Likewise.
7505         (__arm_vqsubq_n_s32): Likewise.
7506         (__arm_vqshlq_s32): Likewise.
7507         (__arm_vqshlq_r_s32): Likewise.
7508         (__arm_vqrshlq_s32): Likewise.
7509         (__arm_vqrshlq_n_s32): Likewise.
7510         (__arm_vqrdmulhq_s32): Likewise.
7511         (__arm_vqrdmulhq_n_s32): Likewise.
7512         (__arm_vqdmulhq_s32): Likewise.
7513         (__arm_vqdmulhq_n_s32): Likewise.
7514         (__arm_vqaddq_s32): Likewise.
7515         (__arm_vqaddq_n_s32): Likewise.
7516         (__arm_vorrq_s32): Likewise.
7517         (__arm_vornq_s32): Likewise.
7518         (__arm_vmulq_s32): Likewise.
7519         (__arm_vmulq_n_s32): Likewise.
7520         (__arm_vmulltq_int_s32): Likewise.
7521         (__arm_vmullbq_int_s32): Likewise.
7522         (__arm_vmulhq_s32): Likewise.
7523         (__arm_vmlsdavxq_s32): Likewise.
7524         (__arm_vmlsdavq_s32): Likewise.
7525         (__arm_vmladavxq_s32): Likewise.
7526         (__arm_vmladavq_s32): Likewise.
7527         (__arm_vminvq_s32): Likewise.
7528         (__arm_vminq_s32): Likewise.
7529         (__arm_vmaxvq_s32): Likewise.
7530         (__arm_vmaxq_s32): Likewise.
7531         (__arm_vhsubq_s32): Likewise.
7532         (__arm_vhsubq_n_s32): Likewise.
7533         (__arm_vhcaddq_rot90_s32): Likewise.
7534         (__arm_vhcaddq_rot270_s32): Likewise.
7535         (__arm_vhaddq_s32): Likewise.
7536         (__arm_vhaddq_n_s32): Likewise.
7537         (__arm_veorq_s32): Likewise.
7538         (__arm_vcaddq_rot90_s32): Likewise.
7539         (__arm_vcaddq_rot270_s32): Likewise.
7540         (__arm_vbrsrq_n_s32): Likewise.
7541         (__arm_vbicq_s32): Likewise.
7542         (__arm_vandq_s32): Likewise.
7543         (__arm_vaddvaq_s32): Likewise.
7544         (__arm_vaddq_n_s32): Likewise.
7545         (__arm_vabdq_s32): Likewise.
7546         (__arm_vshlq_n_s32): Likewise.
7547         (__arm_vrshrq_n_s32): Likewise.
7548         (__arm_vqshlq_n_s32): Likewise.
7549         (vsubq): Define polymorphic variant.
7550         (vsubq_n): Likewise.
7551         (vshlq_r): Likewise.
7552         (vrshlq_n): Likewise.
7553         (vrshlq): Likewise.
7554         (vrmulhq): Likewise.
7555         (vrhaddq): Likewise.
7556         (vqsubq_n): Likewise.
7557         (vqsubq): Likewise.
7558         (vqshlq): Likewise.
7559         (vqshlq_r): Likewise.
7560         (vqshluq): Likewise.
7561         (vrshrq_n): Likewise.
7562         (vshlq_n): Likewise.
7563         (vqshluq_n): Likewise.
7564         (vqshlq_n): Likewise.
7565         (vqrshlq_n): Likewise.
7566         (vqrshlq): Likewise.
7567         (vqrdmulhq_n): Likewise.
7568         (vqrdmulhq): Likewise.
7569         (vqdmulhq_n): Likewise.
7570         (vqdmulhq): Likewise.
7571         (vqaddq_n): Likewise.
7572         (vqaddq): Likewise.
7573         (vorrq_n): Likewise.
7574         (vorrq): Likewise.
7575         (vornq): Likewise.
7576         (vmulq_n): Likewise.
7577         (vmulq): Likewise.
7578         (vmulltq_int): Likewise.
7579         (vmullbq_int): Likewise.
7580         (vmulhq): Likewise.
7581         (vminq): Likewise.
7582         (vminaq): Likewise.
7583         (vmaxq): Likewise.
7584         (vmaxaq): Likewise.
7585         (vhsubq_n): Likewise.
7586         (vhsubq): Likewise.
7587         (vhcaddq_rot90): Likewise.
7588         (vhcaddq_rot270): Likewise.
7589         (vhaddq_n): Likewise.
7590         (vhaddq): Likewise.
7591         (veorq): Likewise.
7592         (vcaddq_rot90): Likewise.
7593         (vcaddq_rot270): Likewise.
7594         (vbrsrq_n): Likewise.
7595         (vbicq_n): Likewise.
7596         (vbicq): Likewise.
7597         (vaddq): Likewise.
7598         (vaddq_n): Likewise.
7599         (vandq): Likewise.
7600         (vabdq): Likewise.
7601         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
7602         (BINOP_NONE_NONE_NONE): Likewise.
7603         (BINOP_NONE_NONE_UNONE): Likewise.
7604         (BINOP_UNONE_NONE_IMM): Likewise.
7605         (BINOP_UNONE_NONE_NONE): Likewise.
7606         (BINOP_UNONE_UNONE_IMM): Likewise.
7607         (BINOP_UNONE_UNONE_NONE): Likewise.
7608         (BINOP_UNONE_UNONE_UNONE): Likewise.
7609         * config/arm/constraints.md (Ra): Define constraint to check constant is
7610         in the range of 0 to 7.
7611         (Rg): Define constriant to check the constant is one among 1, 2, 4
7612         and 8.
7613         * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
7614         (mve_vaddq_n_<supf>): Likewise.
7615         (mve_vaddvaq_<supf>): Likewise.
7616         (mve_vaddvq_p_<supf>): Likewise.
7617         (mve_vandq_<supf>): Likewise.
7618         (mve_vbicq_<supf>): Likewise.
7619         (mve_vbrsrq_n_<supf>): Likewise.
7620         (mve_vcaddq_rot270_<supf>): Likewise.
7621         (mve_vcaddq_rot90_<supf>): Likewise.
7622         (mve_vcmpcsq_n_u): Likewise.
7623         (mve_vcmpcsq_u): Likewise.
7624         (mve_vcmpeqq_n_<supf>): Likewise.
7625         (mve_vcmpeqq_<supf>): Likewise.
7626         (mve_vcmpgeq_n_s): Likewise.
7627         (mve_vcmpgeq_s): Likewise.
7628         (mve_vcmpgtq_n_s): Likewise.
7629         (mve_vcmpgtq_s): Likewise.
7630         (mve_vcmphiq_n_u): Likewise.
7631         (mve_vcmphiq_u): Likewise.
7632         (mve_vcmpleq_n_s): Likewise.
7633         (mve_vcmpleq_s): Likewise.
7634         (mve_vcmpltq_n_s): Likewise.
7635         (mve_vcmpltq_s): Likewise.
7636         (mve_vcmpneq_n_<supf>): Likewise.
7637         (mve_vddupq_n_u): Likewise.
7638         (mve_veorq_<supf>): Likewise.
7639         (mve_vhaddq_n_<supf>): Likewise.
7640         (mve_vhaddq_<supf>): Likewise.
7641         (mve_vhcaddq_rot270_s): Likewise.
7642         (mve_vhcaddq_rot90_s): Likewise.
7643         (mve_vhsubq_n_<supf>): Likewise.
7644         (mve_vhsubq_<supf>): Likewise.
7645         (mve_vidupq_n_u): Likewise.
7646         (mve_vmaxaq_s): Likewise.
7647         (mve_vmaxavq_s): Likewise.
7648         (mve_vmaxq_<supf>): Likewise.
7649         (mve_vmaxvq_<supf>): Likewise.
7650         (mve_vminaq_s): Likewise.
7651         (mve_vminavq_s): Likewise.
7652         (mve_vminq_<supf>): Likewise.
7653         (mve_vminvq_<supf>): Likewise.
7654         (mve_vmladavq_<supf>): Likewise.
7655         (mve_vmladavxq_s): Likewise.
7656         (mve_vmlsdavq_s): Likewise.
7657         (mve_vmlsdavxq_s): Likewise.
7658         (mve_vmulhq_<supf>): Likewise.
7659         (mve_vmullbq_int_<supf>): Likewise.
7660         (mve_vmulltq_int_<supf>): Likewise.
7661         (mve_vmulq_n_<supf>): Likewise.
7662         (mve_vmulq_<supf>): Likewise.
7663         (mve_vornq_<supf>): Likewise.
7664         (mve_vorrq_<supf>): Likewise.
7665         (mve_vqaddq_n_<supf>): Likewise.
7666         (mve_vqaddq_<supf>): Likewise.
7667         (mve_vqdmulhq_n_s): Likewise.
7668         (mve_vqdmulhq_s): Likewise.
7669         (mve_vqrdmulhq_n_s): Likewise.
7670         (mve_vqrdmulhq_s): Likewise.
7671         (mve_vqrshlq_n_<supf>): Likewise.
7672         (mve_vqrshlq_<supf>): Likewise.
7673         (mve_vqshlq_n_<supf>): Likewise.
7674         (mve_vqshlq_r_<supf>): Likewise.
7675         (mve_vqshlq_<supf>): Likewise.
7676         (mve_vqshluq_n_s): Likewise.
7677         (mve_vqsubq_n_<supf>): Likewise.
7678         (mve_vqsubq_<supf>): Likewise.
7679         (mve_vrhaddq_<supf>): Likewise.
7680         (mve_vrmulhq_<supf>): Likewise.
7681         (mve_vrshlq_n_<supf>): Likewise.
7682         (mve_vrshlq_<supf>): Likewise.
7683         (mve_vrshrq_n_<supf>): Likewise.
7684         (mve_vshlq_n_<supf>): Likewise.
7685         (mve_vshlq_r_<supf>): Likewise.
7686         (mve_vsubq_n_<supf>): Likewise.
7687         (mve_vsubq_<supf>): Likewise.
7688         * config/arm/predicates.md (mve_imm_7): Define predicate to check
7689         the matching constraint Ra.
7690         (mve_imm_selective_upto_8): Define predicate to check the matching
7691         constraint Rg.
7692
7693 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7694             Mihail Ionescu  <mihail.ionescu@arm.com>
7695             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
7696
7697         * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
7698         qualifier for binary operands.
7699         (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
7700         (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
7701         * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
7702         (vaddlvq_p_u32): Likewise.
7703         (vcmpneq_s8): Likewise.
7704         (vcmpneq_s16): Likewise.
7705         (vcmpneq_s32): Likewise.
7706         (vcmpneq_u8): Likewise.
7707         (vcmpneq_u16): Likewise.
7708         (vcmpneq_u32): Likewise.
7709         (vshlq_s8): Likewise.
7710         (vshlq_s16): Likewise.
7711         (vshlq_s32): Likewise.
7712         (vshlq_u8): Likewise.
7713         (vshlq_u16): Likewise.
7714         (vshlq_u32): Likewise.
7715         (__arm_vaddlvq_p_s32): Define intrinsic.
7716         (__arm_vaddlvq_p_u32): Likewise.
7717         (__arm_vcmpneq_s8): Likewise.
7718         (__arm_vcmpneq_s16): Likewise.
7719         (__arm_vcmpneq_s32): Likewise.
7720         (__arm_vcmpneq_u8): Likewise.
7721         (__arm_vcmpneq_u16): Likewise.
7722         (__arm_vcmpneq_u32): Likewise.
7723         (__arm_vshlq_s8): Likewise.
7724         (__arm_vshlq_s16): Likewise.
7725         (__arm_vshlq_s32): Likewise.
7726         (__arm_vshlq_u8): Likewise.
7727         (__arm_vshlq_u16): Likewise.
7728         (__arm_vshlq_u32): Likewise.
7729         (vaddlvq_p): Define polymorphic variant.
7730         (vcmpneq): Likewise.
7731         (vshlq): Likewise.
7732         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
7733         Use it.
7734         (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
7735         (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
7736         * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
7737         (mve_vcmpneq_<supf><mode>): Likewise.
7738         (mve_vshlq_<supf><mode>): Likewise.
7739
7740 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7741             Mihail Ionescu  <mihail.ionescu@arm.com>
7742             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
7743
7744         * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
7745         qualifier for binary operands.
7746         (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
7747         (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
7748         * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
7749         (vcvtq_n_s32_f32): Likewise.
7750         (vcvtq_n_u16_f16): Likewise.
7751         (vcvtq_n_u32_f32): Likewise.
7752         (vcreateq_u8): Likewise.
7753         (vcreateq_u16): Likewise.
7754         (vcreateq_u32): Likewise.
7755         (vcreateq_u64): Likewise.
7756         (vcreateq_s8): Likewise.
7757         (vcreateq_s16): Likewise.
7758         (vcreateq_s32): Likewise.
7759         (vcreateq_s64): Likewise.
7760         (vshrq_n_s8): Likewise.
7761         (vshrq_n_s16): Likewise.
7762         (vshrq_n_s32): Likewise.
7763         (vshrq_n_u8): Likewise.
7764         (vshrq_n_u16): Likewise.
7765         (vshrq_n_u32): Likewise.
7766         (__arm_vcreateq_u8): Define intrinsic.
7767         (__arm_vcreateq_u16): Likewise.
7768         (__arm_vcreateq_u32): Likewise.
7769         (__arm_vcreateq_u64): Likewise.
7770         (__arm_vcreateq_s8): Likewise.
7771         (__arm_vcreateq_s16): Likewise.
7772         (__arm_vcreateq_s32): Likewise.
7773         (__arm_vcreateq_s64): Likewise.
7774         (__arm_vshrq_n_s8): Likewise.
7775         (__arm_vshrq_n_s16): Likewise.
7776         (__arm_vshrq_n_s32): Likewise.
7777         (__arm_vshrq_n_u8): Likewise.
7778         (__arm_vshrq_n_u16): Likewise.
7779         (__arm_vshrq_n_u32): Likewise.
7780         (__arm_vcvtq_n_s16_f16): Likewise.
7781         (__arm_vcvtq_n_s32_f32): Likewise.
7782         (__arm_vcvtq_n_u16_f16): Likewise.
7783         (__arm_vcvtq_n_u32_f32): Likewise.
7784         (vshrq_n): Define polymorphic variant.
7785         * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
7786         Use it.
7787         (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
7788         (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
7789         * config/arm/constraints.md (Rb): Define constraint to check constant is
7790         in the range of 1 to 8.
7791         (Rf): Define constraint to check constant is in the range of 1 to 32.
7792         * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
7793         (mve_vshrq_n_<supf><mode>): Likewise.
7794         (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
7795         * config/arm/predicates.md (mve_imm_8): Define predicate to check
7796         the matching constraint Rb.
7797         (mve_imm_32): Define predicate to check the matching constraint Rf.
7798
7799 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7800             Mihail Ionescu  <mihail.ionescu@arm.com>
7801             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
7802
7803         * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
7804         qualifier for binary operands.
7805         (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
7806         (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
7807         (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
7808         * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
7809         (vsubq_n_f32): Likewise.
7810         (vbrsrq_n_f16): Likewise.
7811         (vbrsrq_n_f32): Likewise.
7812         (vcvtq_n_f16_s16): Likewise.
7813         (vcvtq_n_f32_s32): Likewise.
7814         (vcvtq_n_f16_u16): Likewise.
7815         (vcvtq_n_f32_u32): Likewise.
7816         (vcreateq_f16): Likewise.
7817         (vcreateq_f32): Likewise.
7818         (__arm_vsubq_n_f16): Define intrinsic.
7819         (__arm_vsubq_n_f32): Likewise.
7820         (__arm_vbrsrq_n_f16): Likewise.
7821         (__arm_vbrsrq_n_f32): Likewise.
7822         (__arm_vcvtq_n_f16_s16): Likewise.
7823         (__arm_vcvtq_n_f32_s32): Likewise.
7824         (__arm_vcvtq_n_f16_u16): Likewise.
7825         (__arm_vcvtq_n_f32_u32): Likewise.
7826         (__arm_vcreateq_f16): Likewise.
7827         (__arm_vcreateq_f32): Likewise.
7828         (vsubq): Define polymorphic variant.
7829         (vbrsrq): Likewise.
7830         (vcvtq_n): Likewise.
7831         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
7832         it.
7833         (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
7834         (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
7835         (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
7836         * config/arm/constraints.md (Rd): Define constraint to check constant is
7837         in the range of 1 to 16.
7838         * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
7839         mve_vbrsrq_n_f<mode>: Likewise.
7840         mve_vcvtq_n_to_f_<supf><mode>: Likewise.
7841         mve_vcreateq_f<mode>: Likewise.
7842         * config/arm/predicates.md (mve_imm_16): Define predicate to check
7843         the matching constraint Rd.
7844
7845 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7846             Mihail Ionescu  <mihail.ionescu@arm.com>
7847             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
7848
7849         * config/arm/arm-builtins.c (hi_UP): Define mode.
7850         * config/arm/arm.h (IS_VPR_REGNUM): Move.
7851         * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
7852         (APSRQ_REGNUM): Modify.
7853         (APSRGE_REGNUM): Modify.
7854         * config/arm/arm_mve.h (vctp16q): Define macro.
7855         (vctp32q): Likewise.
7856         (vctp64q): Likewise.
7857         (vctp8q): Likewise.
7858         (vpnot): Likewise.
7859         (__arm_vctp16q): Define intrinsic.
7860         (__arm_vctp32q): Likewise.
7861         (__arm_vctp64q): Likewise.
7862         (__arm_vctp8q): Likewise.
7863         (__arm_vpnot): Likewise.
7864         * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
7865         qualifier.
7866         * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
7867         (mve_vpnothi): Likewise.
7868
7869 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7870             Mihail Ionescu  <mihail.ionescu@arm.com>
7871             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
7872
7873         * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
7874         * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
7875         (vdupq_n_s16): Likewise.
7876         (vdupq_n_s32): Likewise.
7877         (vabsq_s8): Likewise.
7878         (vabsq_s16): Likewise.
7879         (vabsq_s32): Likewise.
7880         (vclsq_s8): Likewise.
7881         (vclsq_s16): Likewise.
7882         (vclsq_s32): Likewise.
7883         (vclzq_s8): Likewise.
7884         (vclzq_s16): Likewise.
7885         (vclzq_s32): Likewise.
7886         (vnegq_s8): Likewise.
7887         (vnegq_s16): Likewise.
7888         (vnegq_s32): Likewise.
7889         (vaddlvq_s32): Likewise.
7890         (vaddvq_s8): Likewise.
7891         (vaddvq_s16): Likewise.
7892         (vaddvq_s32): Likewise.
7893         (vmovlbq_s8): Likewise.
7894         (vmovlbq_s16): Likewise.
7895         (vmovltq_s8): Likewise.
7896         (vmovltq_s16): Likewise.
7897         (vmvnq_s8): Likewise.
7898         (vmvnq_s16): Likewise.
7899         (vmvnq_s32): Likewise.
7900         (vrev16q_s8): Likewise.
7901         (vrev32q_s8): Likewise.
7902         (vrev32q_s16): Likewise.
7903         (vqabsq_s8): Likewise.
7904         (vqabsq_s16): Likewise.
7905         (vqabsq_s32): Likewise.
7906         (vqnegq_s8): Likewise.
7907         (vqnegq_s16): Likewise.
7908         (vqnegq_s32): Likewise.
7909         (vcvtaq_s16_f16): Likewise.
7910         (vcvtaq_s32_f32): Likewise.
7911         (vcvtnq_s16_f16): Likewise.
7912         (vcvtnq_s32_f32): Likewise.
7913         (vcvtpq_s16_f16): Likewise.
7914         (vcvtpq_s32_f32): Likewise.
7915         (vcvtmq_s16_f16): Likewise.
7916         (vcvtmq_s32_f32): Likewise.
7917         (vmvnq_u8): Likewise.
7918         (vmvnq_u16): Likewise.
7919         (vmvnq_u32): Likewise.
7920         (vdupq_n_u8): Likewise.
7921         (vdupq_n_u16): Likewise.
7922         (vdupq_n_u32): Likewise.
7923         (vclzq_u8): Likewise.
7924         (vclzq_u16): Likewise.
7925         (vclzq_u32): Likewise.
7926         (vaddvq_u8): Likewise.
7927         (vaddvq_u16): Likewise.
7928         (vaddvq_u32): Likewise.
7929         (vrev32q_u8): Likewise.
7930         (vrev32q_u16): Likewise.
7931         (vmovltq_u8): Likewise.
7932         (vmovltq_u16): Likewise.
7933         (vmovlbq_u8): Likewise.
7934         (vmovlbq_u16): Likewise.
7935         (vrev16q_u8): Likewise.
7936         (vaddlvq_u32): Likewise.
7937         (vcvtpq_u16_f16): Likewise.
7938         (vcvtpq_u32_f32): Likewise.
7939         (vcvtnq_u16_f16): Likewise.
7940         (vcvtmq_u16_f16): Likewise.
7941         (vcvtmq_u32_f32): Likewise.
7942         (vcvtaq_u16_f16): Likewise.
7943         (vcvtaq_u32_f32): Likewise.
7944         (__arm_vdupq_n_s8): Define intrinsic.
7945         (__arm_vdupq_n_s16): Likewise.
7946         (__arm_vdupq_n_s32): Likewise.
7947         (__arm_vabsq_s8): Likewise.
7948         (__arm_vabsq_s16): Likewise.
7949         (__arm_vabsq_s32): Likewise.
7950         (__arm_vclsq_s8): Likewise.
7951         (__arm_vclsq_s16): Likewise.
7952         (__arm_vclsq_s32): Likewise.
7953         (__arm_vclzq_s8): Likewise.
7954         (__arm_vclzq_s16): Likewise.
7955         (__arm_vclzq_s32): Likewise.
7956         (__arm_vnegq_s8): Likewise.
7957         (__arm_vnegq_s16): Likewise.
7958         (__arm_vnegq_s32): Likewise.
7959         (__arm_vaddlvq_s32): Likewise.
7960         (__arm_vaddvq_s8): Likewise.
7961         (__arm_vaddvq_s16): Likewise.
7962         (__arm_vaddvq_s32): Likewise.
7963         (__arm_vmovlbq_s8): Likewise.
7964         (__arm_vmovlbq_s16): Likewise.
7965         (__arm_vmovltq_s8): Likewise.
7966         (__arm_vmovltq_s16): Likewise.
7967         (__arm_vmvnq_s8): Likewise.
7968         (__arm_vmvnq_s16): Likewise.
7969         (__arm_vmvnq_s32): Likewise.
7970         (__arm_vrev16q_s8): Likewise.
7971         (__arm_vrev32q_s8): Likewise.
7972         (__arm_vrev32q_s16): Likewise.
7973         (__arm_vqabsq_s8): Likewise.
7974         (__arm_vqabsq_s16): Likewise.
7975         (__arm_vqabsq_s32): Likewise.
7976         (__arm_vqnegq_s8): Likewise.
7977         (__arm_vqnegq_s16): Likewise.
7978         (__arm_vqnegq_s32): Likewise.
7979         (__arm_vmvnq_u8): Likewise.
7980         (__arm_vmvnq_u16): Likewise.
7981         (__arm_vmvnq_u32): Likewise.
7982         (__arm_vdupq_n_u8): Likewise.
7983         (__arm_vdupq_n_u16): Likewise.
7984         (__arm_vdupq_n_u32): Likewise.
7985         (__arm_vclzq_u8): Likewise.
7986         (__arm_vclzq_u16): Likewise.
7987         (__arm_vclzq_u32): Likewise.
7988         (__arm_vaddvq_u8): Likewise.
7989         (__arm_vaddvq_u16): Likewise.
7990         (__arm_vaddvq_u32): Likewise.
7991         (__arm_vrev32q_u8): Likewise.
7992         (__arm_vrev32q_u16): Likewise.
7993         (__arm_vmovltq_u8): Likewise.
7994         (__arm_vmovltq_u16): Likewise.
7995         (__arm_vmovlbq_u8): Likewise.
7996         (__arm_vmovlbq_u16): Likewise.
7997         (__arm_vrev16q_u8): Likewise.
7998         (__arm_vaddlvq_u32): Likewise.
7999         (__arm_vcvtpq_u16_f16): Likewise.
8000         (__arm_vcvtpq_u32_f32): Likewise.
8001         (__arm_vcvtnq_u16_f16): Likewise.
8002         (__arm_vcvtmq_u16_f16): Likewise.
8003         (__arm_vcvtmq_u32_f32): Likewise.
8004         (__arm_vcvtaq_u16_f16): Likewise.
8005         (__arm_vcvtaq_u32_f32): Likewise.
8006         (__arm_vcvtaq_s16_f16): Likewise.
8007         (__arm_vcvtaq_s32_f32): Likewise.
8008         (__arm_vcvtnq_s16_f16): Likewise.
8009         (__arm_vcvtnq_s32_f32): Likewise.
8010         (__arm_vcvtpq_s16_f16): Likewise.
8011         (__arm_vcvtpq_s32_f32): Likewise.
8012         (__arm_vcvtmq_s16_f16): Likewise.
8013         (__arm_vcvtmq_s32_f32): Likewise.
8014         (vdupq_n): Define polymorphic variant.
8015         (vabsq): Likewise.
8016         (vclsq): Likewise.
8017         (vclzq): Likewise.
8018         (vnegq): Likewise.
8019         (vaddlvq): Likewise.
8020         (vaddvq): Likewise.
8021         (vmovlbq): Likewise.
8022         (vmovltq): Likewise.
8023         (vmvnq): Likewise.
8024         (vrev16q): Likewise.
8025         (vrev32q): Likewise.
8026         (vqabsq): Likewise.
8027         (vqnegq): Likewise.
8028         * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
8029         (UNOP_SNONE_NONE): Likewise.
8030         (UNOP_UNONE_UNONE): Likewise.
8031         (UNOP_UNONE_NONE): Likewise.
8032         * config/arm/constraints.md (e): Define new constriant to allow only
8033         even registers.
8034         * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
8035         (mve_vnegq_s<mode>): Likewise.
8036         (mve_vmvnq_<supf><mode>): Likewise.
8037         (mve_vdupq_n_<supf><mode>): Likewise.
8038         (mve_vclzq_<supf><mode>): Likewise.
8039         (mve_vclsq_s<mode>): Likewise.
8040         (mve_vaddvq_<supf><mode>): Likewise.
8041         (mve_vabsq_s<mode>): Likewise.
8042         (mve_vrev32q_<supf><mode>): Likewise.
8043         (mve_vmovltq_<supf><mode>): Likewise.
8044         (mve_vmovlbq_<supf><mode>): Likewise.
8045         (mve_vcvtpq_<supf><mode>): Likewise.
8046         (mve_vcvtnq_<supf><mode>): Likewise.
8047         (mve_vcvtmq_<supf><mode>): Likewise.
8048         (mve_vcvtaq_<supf><mode>): Likewise.
8049         (mve_vrev16q_<supf>v16qi): Likewise.
8050         (mve_vaddlvq_<supf>v4si): Likewise.
8051
8052 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
8053
8054         * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
8055         a dump message.
8056         * tree-sra.c (create_access_replacement): Fix up duplicated word issue
8057         in a comment.
8058         * read-rtl-function.c (find_param_by_name,
8059         function_reader::parse_enum_value, function_reader::get_insn_by_uid):
8060         Likewise.
8061         * spellcheck.c (get_edit_distance_cutoff): Likewise.
8062         * tree-data-ref.c (create_ifn_alias_checks): Likewise.
8063         * tree.def (SWITCH_EXPR): Likewise.
8064         * selftest.c (assert_str_contains): Likewise.
8065         * ipa-param-manipulation.h (class ipa_param_body_adjustments):
8066         Likewise.
8067         * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
8068         * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
8069         * langhooks.h (struct lang_hooks_for_decls): Likewise.
8070         * ipa-prop.h (struct ipa_param_descriptor): Likewise.
8071         * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
8072         Likewise.
8073         * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
8074         * tree-ssa-reassoc.c (reassociate_bb): Likewise.
8075         * tree.c (component_ref_size): Likewise.
8076         * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
8077         * gimple-ssa-sprintf.c (get_string_length, format_string,
8078         format_directive): Likewise.
8079         * omp-grid.c (grid_process_kernel_body_copy): Likewise.
8080         * input.c (string_concat_db::get_string_concatenation,
8081         test_lexer_string_locations_ucn4): Likewise.
8082         * cfgexpand.c (pass_expand::execute): Likewise.
8083         * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
8084         maybe_diag_overlap): Likewise.
8085         * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
8086         * shrink-wrap.c (spread_components): Likewise.
8087         * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
8088         Likewise.
8089         * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
8090         Likewise.
8091         * dwarf2out.c (dwarf2out_early_finish): Likewise.
8092         * gimple-ssa-store-merging.c: Likewise.
8093         * ira-costs.c (record_operand_costs): Likewise.
8094         * tree-vect-loop.c (vectorizable_reduction): Likewise.
8095         * target.def (dispatch): Likewise.
8096         (validate_dims, gen_ccmp_first): Fix up duplicated word issue
8097         in documentation text.
8098         * doc/tm.texi: Regenerated.
8099         * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
8100         duplicated word issue in a comment.
8101         * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
8102         * config/i386/i386-features.c (remove_partial_avx_dependency):
8103         Likewise.
8104         * config/msp430/msp430.c (msp430_select_section): Likewise.
8105         * config/gcn/gcn-run.c (load_image): Likewise.
8106         * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
8107         * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
8108         * config/aarch64/falkor-tag-collision-avoidance.c
8109         (single_dest_per_chain): Likewise.
8110         * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
8111         * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
8112         * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
8113         * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
8114         Likewise.
8115         * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
8116         * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
8117         * config/rs6000/rs6000-logue.c
8118         (rs6000_emit_probe_stack_range_stack_clash): Likewise.
8119         * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
8120         Fix various other issues in the comment.
8121
8122 2020-03-17  Mihail Ionescu  <mihail.ionescu@arm.com>
8123
8124         * config/arm/t-rmprofile: create new multilib for
8125         armv8.1-m.main+mve hard float and reuse v8-m.main ones for
8126         v8.1-m.main+mve.
8127
8128 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
8129
8130         PR tree-optimization/94015
8131         * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
8132         function where EXP is address of the bytes being stored rather than
8133         the bytes themselves into count_nonzero_bytes_addr.  Punt on zero
8134         sized MEM_REF.  Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
8135         Use ctor_for_folding instead of looking at DECL_INITIAL.  Punt before
8136         calling native_encode_expr if host or target doesn't have 8-bit
8137         chars.  Formatting fixes.
8138         (count_nonzero_bytes_addr): New function.
8139
8140 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8141             Mihail Ionescu  <mihail.ionescu@arm.com>
8142             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8143
8144         * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
8145         (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
8146         (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
8147         (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
8148         (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
8149         (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
8150         * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
8151         (vmvnq_n_s32): Likewise.
8152         (vrev64q_s8): Likewise.
8153         (vrev64q_s16): Likewise.
8154         (vrev64q_s32): Likewise.
8155         (vcvtq_s16_f16): Likewise.
8156         (vcvtq_s32_f32): Likewise.
8157         (vrev64q_u8): Likewise.
8158         (vrev64q_u16): Likewise.
8159         (vrev64q_u32): Likewise.
8160         (vmvnq_n_u16): Likewise.
8161         (vmvnq_n_u32): Likewise.
8162         (vcvtq_u16_f16): Likewise.
8163         (vcvtq_u32_f32): Likewise.
8164         (__arm_vmvnq_n_s16): Define intrinsic.
8165         (__arm_vmvnq_n_s32): Likewise.
8166         (__arm_vrev64q_s8): Likewise.
8167         (__arm_vrev64q_s16): Likewise.
8168         (__arm_vrev64q_s32): Likewise.
8169         (__arm_vrev64q_u8): Likewise.
8170         (__arm_vrev64q_u16): Likewise.
8171         (__arm_vrev64q_u32): Likewise.
8172         (__arm_vmvnq_n_u16): Likewise.
8173         (__arm_vmvnq_n_u32): Likewise.
8174         (__arm_vcvtq_s16_f16): Likewise.
8175         (__arm_vcvtq_s32_f32): Likewise.
8176         (__arm_vcvtq_u16_f16): Likewise.
8177         (__arm_vcvtq_u32_f32): Likewise.
8178         (vrev64q): Define polymorphic variant.
8179         * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
8180         (UNOP_SNONE_NONE): Likewise.
8181         (UNOP_SNONE_IMM): Likewise.
8182         (UNOP_UNONE_UNONE): Likewise.
8183         (UNOP_UNONE_NONE): Likewise.
8184         (UNOP_UNONE_IMM): Likewise.
8185         * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
8186         (mve_vcvtq_from_f_<supf><mode>): Likewise.
8187         (mve_vmvnq_n_<supf><mode>): Likewise.
8188
8189 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8190             Mihail Ionescu  <mihail.ionescu@arm.com>
8191             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8192
8193         * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
8194         (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
8195         (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
8196         * config/arm/arm_mve.h (vrndxq_f16): Define macro.
8197         (vrndxq_f32): Likewise.
8198         (vrndq_f16) Likewise.
8199         (vrndq_f32): Likewise.
8200         (vrndpq_f16): Likewise.
8201         (vrndpq_f32): Likewise.
8202         (vrndnq_f16): Likewise.
8203         (vrndnq_f32): Likewise.
8204         (vrndmq_f16): Likewise.
8205         (vrndmq_f32): Likewise.
8206         (vrndaq_f16): Likewise.
8207         (vrndaq_f32): Likewise.
8208         (vrev64q_f16): Likewise.
8209         (vrev64q_f32): Likewise.
8210         (vnegq_f16): Likewise.
8211         (vnegq_f32): Likewise.
8212         (vdupq_n_f16): Likewise.
8213         (vdupq_n_f32): Likewise.
8214         (vabsq_f16): Likewise.
8215         (vabsq_f32): Likewise.
8216         (vrev32q_f16): Likewise.
8217         (vcvttq_f32_f16): Likewise.
8218         (vcvtbq_f32_f16): Likewise.
8219         (vcvtq_f16_s16): Likewise.
8220         (vcvtq_f32_s32): Likewise.
8221         (vcvtq_f16_u16): Likewise.
8222         (vcvtq_f32_u32): Likewise.
8223         (__arm_vrndxq_f16): Define intrinsic.
8224         (__arm_vrndxq_f32): Likewise.
8225         (__arm_vrndq_f16): Likewise.
8226         (__arm_vrndq_f32): Likewise.
8227         (__arm_vrndpq_f16): Likewise.
8228         (__arm_vrndpq_f32): Likewise.
8229         (__arm_vrndnq_f16): Likewise.
8230         (__arm_vrndnq_f32): Likewise.
8231         (__arm_vrndmq_f16): Likewise.
8232         (__arm_vrndmq_f32): Likewise.
8233         (__arm_vrndaq_f16): Likewise.
8234         (__arm_vrndaq_f32): Likewise.
8235         (__arm_vrev64q_f16): Likewise.
8236         (__arm_vrev64q_f32): Likewise.
8237         (__arm_vnegq_f16): Likewise.
8238         (__arm_vnegq_f32): Likewise.
8239         (__arm_vdupq_n_f16): Likewise.
8240         (__arm_vdupq_n_f32): Likewise.
8241         (__arm_vabsq_f16): Likewise.
8242         (__arm_vabsq_f32): Likewise.
8243         (__arm_vrev32q_f16): Likewise.
8244         (__arm_vcvttq_f32_f16): Likewise.
8245         (__arm_vcvtbq_f32_f16): Likewise.
8246         (__arm_vcvtq_f16_s16): Likewise.
8247         (__arm_vcvtq_f32_s32): Likewise.
8248         (__arm_vcvtq_f16_u16): Likewise.
8249         (__arm_vcvtq_f32_u32): Likewise.
8250         (vrndxq): Define polymorphic variants.
8251         (vrndq): Likewise.
8252         (vrndpq): Likewise.
8253         (vrndnq): Likewise.
8254         (vrndmq): Likewise.
8255         (vrndaq): Likewise.
8256         (vrev64q): Likewise.
8257         (vnegq): Likewise.
8258         (vabsq): Likewise.
8259         (vrev32q): Likewise.
8260         (vcvtbq_f32): Likewise.
8261         (vcvttq_f32): Likewise.
8262         (vcvtq): Likewise.
8263         * config/arm/arm_mve_builtins.def (VAR2): Define.
8264         (VAR1): Define.
8265         * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
8266         (mve_vrndq_f<mode>): Likewise.
8267         (mve_vrndpq_f<mode>): Likewise.
8268         (mve_vrndnq_f<mode>): Likewise.
8269         (mve_vrndmq_f<mode>): Likewise.
8270         (mve_vrndaq_f<mode>): Likewise.
8271         (mve_vrev64q_f<mode>): Likewise.
8272         (mve_vnegq_f<mode>): Likewise.
8273         (mve_vdupq_n_f<mode>): Likewise.
8274         (mve_vabsq_f<mode>): Likewise.
8275         (mve_vrev32q_fv8hf): Likewise.
8276         (mve_vcvttq_f32_f16v4sf): Likewise.
8277         (mve_vcvtbq_f32_f16v4sf): Likewise.
8278         (mve_vcvtq_to_f_<supf><mode>): Likewise.
8279
8280 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8281             Mihail Ionescu  <mihail.ionescu@arm.com>
8282             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8283
8284         * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
8285         (VAR1): Define.
8286         (ARM_BUILTIN_MVE_PATTERN_START): Define.
8287         (arm_init_mve_builtins): Define function.
8288         (arm_init_builtins): Add TARGET_HAVE_MVE check.
8289         (arm_expand_builtin_1): Check the range of fcode.
8290         (arm_expand_mve_builtin): Define function to expand MVE builtins.
8291         (arm_expand_builtin): Check the range of fcode.
8292         * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
8293         types.
8294         (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
8295         (vst4q_s8): Define macro.
8296         (vst4q_s16): Likewise.
8297         (vst4q_s32): Likewise.
8298         (vst4q_u8): Likewise.
8299         (vst4q_u16): Likewise.
8300         (vst4q_u32): Likewise.
8301         (vst4q_f16): Likewise.
8302         (vst4q_f32): Likewise.
8303         (__arm_vst4q_s8): Define inline builtin.
8304         (__arm_vst4q_s16): Likewise.
8305         (__arm_vst4q_s32): Likewise.
8306         (__arm_vst4q_u8): Likewise.
8307         (__arm_vst4q_u16): Likewise.
8308         (__arm_vst4q_u32): Likewise.
8309         (__arm_vst4q_f16): Likewise.
8310         (__arm_vst4q_f32): Likewise.
8311         (__ARM_mve_typeid): Define macro with MVE types.
8312         (__ARM_mve_coerce): Define macro with _Generic feature.
8313         (vst4q): Define polymorphic variant for different vst4q builtins.
8314         * config/arm/arm_mve_builtins.def: New file.
8315         * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
8316         modes in MVE.
8317         * config/arm/mve.md (MVE_VLD_ST): Define iterator.
8318         (unspec): Define unspec.
8319         (mve_vst4q<mode>): Define RTL pattern.
8320         * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
8321         modes in MVE.
8322         (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
8323         in MVE.
8324         (define_split): Allow OI mode split for MVE after reload.
8325         (define_split): Allow XI mode split for MVE after reload.
8326         * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
8327         (arm-builtins.o): Likewise.
8328
8329 2020-03-17  Christophe Lyon  <christophe.lyon@linaro.org>
8330
8331         * c-typeck.c (process_init_element): Handle constructor_type with
8332         type size represented by POLY_INT_CST.
8333
8334 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
8335
8336         PR tree-optimization/94187
8337         * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
8338         nchars - offset < nbytes.
8339
8340         PR middle-end/94189
8341         * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
8342         emit a warning if it was enabled and don't depend on TREE_NO_WARNING
8343         for code-generation.
8344
8345 2020-03-16  Vladimir Makarov  <vmakarov@redhat.com>
8346
8347         PR target/94185
8348         * lra-spills.c (remove_pseudos): Do not reuse insn alternative
8349         after changing memory subreg.
8350
8351 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8352             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8353
8354         * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
8355         emulator calls for dobule precision arithmetic operations for MVE.
8356
8357 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8358             Mihail Ionescu  <mihail.ionescu@arm.com>
8359             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8360
8361         * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
8362         feature bit is on and -mfpu=auto is passed as compiler option, do not
8363         generate error on not finding any matching fpu. Because in this case
8364         fpu is not required.
8365         * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
8366         enabled for MVE and also for all VFP extensions.
8367         (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
8368         is enabled.
8369         (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
8370         (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
8371         along with feature bits mve_float.
8372         (mve): Modify add options in armv8.1-m.main arch for MVE.
8373         (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
8374         floating point.
8375         * config/arm/arm.c (use_return_insn): Replace the
8376         check with TARGET_VFP_BASE.
8377         (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
8378         TARGET_VFP_BASE.
8379         (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
8380         with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
8381         well.
8382         (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
8383         TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
8384         as well.
8385         (arm_compute_frame_layout): Likewise.
8386         (arm_save_coproc_regs): Likewise.
8387         (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
8388         in MVE as well.
8389         (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
8390         with equivalent macro TARGET_VFP_BASE.
8391         (arm_expand_epilogue_apcs_frame): Likewise.
8392         (arm_expand_epilogue): Likewise.
8393         (arm_conditional_register_usage): Likewise.
8394         (arm_declare_function_name): Add check to skip printing .fpu directive
8395         in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
8396         "softvfp".
8397         * config/arm/arm.h (TARGET_VFP_BASE): Define.
8398         * config/arm/arm.md (arch): Add "mve" to arch.
8399         (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
8400         (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
8401         || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
8402         * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
8403         in MVE.
8404         * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
8405         to not allow for MVE.
8406         * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
8407         enum.
8408         (VUNSPEC_GET_FPSCR): Define.
8409         * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
8410         instructions which move to general-purpose Register from Floating-point
8411         Special register and vice-versa.
8412         (thumb2_movhi_fp16): Likewise.
8413         (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
8414         with MCR and MRC instructions which set and get Floating-point Status
8415         and Control Register (FPSCR).
8416         (movdi_vfp): Modify pattern to enable Single-precision scalar float move
8417         in MVE.
8418         (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
8419         float move patterns in MVE.
8420         (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
8421         code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
8422         (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
8423         code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
8424         (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
8425         TARGET_VFP_BASE check.
8426         (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
8427         using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
8428         register.
8429         (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
8430         using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
8431         register.
8432
8433
8434 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8435             Mihail Ionescu  <mihail.ionescu@arm.com>
8436             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8437
8438         * config.gcc (arm_mve.h): Include mve intrinsics header file.
8439         * config/arm/aout.h (p0): Add new register name for MVE predicated
8440         cases.
8441         * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
8442         common to Neon and MVE.
8443         (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
8444         (arm_init_simd_builtin_types): Disable poly types for MVE.
8445         (arm_init_neon_builtins): Move a check to arm_init_builtins function.
8446         (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
8447         ARM_BUILTIN_NEON_LANE_CHECK.
8448         (mve_dereference_pointer): Add function.
8449         (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
8450         enabled.
8451         (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
8452         (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
8453         * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
8454         with floating point enabled.
8455         * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
8456         simd_immediate_valid_for_move.
8457         (simd_immediate_valid_for_move): Renamed from
8458         neon_immediate_valid_for_move function.
8459         * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
8460         error if vfpv2 feature bit is disabled and mve feature bit is also
8461         disabled for HARD_FLOAT_ABI.
8462         (use_return_insn): Check to not push VFP regs for MVE.
8463         (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
8464         as Neon.
8465         (aapcs_vfp_allocate_return_reg): Likewise.
8466         (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
8467         address operand for MVE.
8468         (arm_rtx_costs_internal): MVE check to determine cost of rtx.
8469         (neon_valid_immediate): Rename to simd_valid_immediate.
8470         (simd_valid_immediate): Rename from neon_valid_immediate.
8471         (simd_valid_immediate): MVE check on size of vector is 128 bits.
8472         (neon_immediate_valid_for_move): Rename to
8473         simd_immediate_valid_for_move.
8474         (simd_immediate_valid_for_move): Rename from
8475         neon_immediate_valid_for_move.
8476         (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
8477         function.
8478         (neon_make_constant): Modify call to neon_valid_immediate function.
8479         (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
8480         for MVE.
8481         (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
8482         (arm_compute_frame_layout): Calculate space for saved VFP registers for
8483         MVE.
8484         (arm_save_coproc_regs): Save coproc registers for MVE.
8485         (arm_print_operand): Add case 'E' to print memory operands for MVE.
8486         (arm_print_operand_address): Check to print register number for MVE.
8487         (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
8488         (arm_modes_tieable_p): Check to allow structure mode for MVE.
8489         (arm_regno_class): Add VPR_REGNUM check.
8490         (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
8491         for APCS frame.
8492         (arm_expand_epilogue): MVE check for enabling pop instructions in
8493         epilogue.
8494         (arm_print_asm_arch_directives): Modify function to disable print of
8495         .arch_extension "mve" and "fp" for cases where MVE is enabled with
8496         "SOFT FLOAT ABI".
8497         (arm_vector_mode_supported_p): Check for modes available in MVE interger
8498         and MVE floating point.
8499         (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
8500         pointer support.
8501         (arm_conditional_register_usage): Enable usage of conditional regsiter
8502         for MVE.
8503         (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
8504         (arm_declare_function_name): Modify function to disable print of
8505         .arch_extension "mve" and "fp" for cases where MVE is enabled with
8506         "SOFT FLOAT ABI".
8507         * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
8508         when target general registers are required.
8509         (TARGET_HAVE_MVE_FLOAT): Likewise.
8510         (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
8511         for MVE.
8512         (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
8513         which indicate this is not available for across function calls.
8514         (FIRST_PSEUDO_REGISTER): Modify.
8515         (VALID_MVE_MODE): Define valid MVE mode.
8516         (VALID_MVE_SI_MODE): Define valid MVE SI mode.
8517         (VALID_MVE_SF_MODE): Define valid MVE SF mode.
8518         (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
8519         (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
8520         for MVE.
8521         (IS_VPR_REGNUM): Macro to check for VPR_REG register.
8522         (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
8523         (enum reg_class): Add VPR_REG entry.
8524         (REG_CLASS_NAMES): Add VPR_REG entry.
8525         * config/arm/arm.md (VPR_REGNUM): Define.
8526         (conds): Check is_mve_type attrbiute to differentiate "conditional" and
8527         "unconditional" instructions.
8528         (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
8529         (movdf_soft_insn): Modify RTL to not allow for MVE.
8530         (vfp_pop_multiple_with_writeback): Enable for MVE.
8531         (include "mve.md"): Include mve.md file.
8532         * config/arm/arm_mve.h: Add MVE intrinsics head file.
8533         * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
8534         for vector predicated operands.
8535         * config/arm/iterators.md (VNIM1): Define.
8536         (VNINOTM1): Define.
8537         (VHFBF_split): Define
8538         * config/arm/mve.md: New file.
8539         (mve_mov<mode>): Define RTL for move, store and load in MVE.
8540         (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
8541         second operand.
8542         * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
8543         simd_immediate_valid_for_move.
8544         (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
8545         is common to MVE and  NEON to vec-common.md file.
8546         (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
8547         * config/arm/predicates.md (vpr_register_operand): Define.
8548         * config/arm/t-arm: Add mve.md file.
8549         * config/arm/types.md (mve_move): Add MVE instructions mve_move to
8550         attribute "type".
8551         (mve_store): Add MVE instructions mve_store to attribute "type".
8552         (mve_load): Add MVE instructions mve_load to attribute "type".
8553         (is_mve_type): Define attribute.
8554         * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
8555         standard move patterns in MVE along with NEON and IWMMXT with mode
8556         iterator VNIM1.
8557         (mov<mode>): Modify RTL expand to support standard move patterns in NEON
8558         and IWMMXT with mode iterator V8HF.
8559         (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
8560         NEON and MVE.
8561         * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
8562         simd_immediate_valid_for_move.
8563
8564
8565 2020-03-16  H.J. Lu  <hongjiu.lu@intel.com>
8566
8567         PR target/89229
8568         * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
8569         for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
8570         check.
8571         * config/i386/predicates.md (ext_sse_reg_operand): Removed.
8572
8573 2020-03-16  Jakub Jelinek  <jakub@redhat.com>
8574
8575         PR debug/94167
8576         * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
8577         DEBUG_STMTs.
8578
8579         PR tree-optimization/94166
8580         * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
8581         as secondary comparison key.
8582
8583 2020-03-16  Bin Cheng  <bin.cheng@linux.alibaba.com>
8584
8585         PR tree-optimization/94125
8586         * tree-loop-distribution.c
8587         (loop_distribution::break_alias_scc_partitions): Update post order
8588         number for merged scc.
8589
8590 2020-03-15  H.J. Lu  <hongjiu.lu@intel.com>
8591
8592         PR target/89229
8593         * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
8594         MODE_SF.
8595         * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
8596         for TYPE_SSEMOV.  Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
8597         and ext_sse_reg_operand check.
8598
8599 2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>
8600
8601         * common.opt: Avoid redundancy in the help text.
8602         * config/arc/arc.opt: Likewise.
8603         * config/cr16/cr16.opt: Likewise.
8604
8605 2020-03-14  Jakub Jelinek  <jakub@redhat.com>
8606
8607         PR middle-end/93566
8608         * tree-nested.c (convert_nonlocal_omp_clauses,
8609         convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
8610         with C/C++ array sections.
8611
8612 2020-03-14  H.J. Lu  <hongjiu.lu@intel.com>
8613
8614         PR target/89229
8615         * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
8616         for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
8617         check.
8618
8619 2020-03-14  Jakub Jelinek  <jakub@redhat.com>
8620
8621         * gimple-fold.c (gimple_fold_builtin_strncpy): Change
8622         "a an" to "an" in a comment.
8623         * hsa-common.h (is_a_helper): Likewise.
8624         * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
8625         * config/arc/arc.c (arc600_corereg_hazard): Likewise.
8626         * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
8627
8628 2020-03-13  Aaron Sawdey  <acsawdey@linux.ibm.com>
8629
8630         PR target/92379
8631         * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
8632         64-bit value by 64 bits (UB).
8633
8634 2020-03-13  Vladimir Makarov  <vmakarov@redhat.com>
8635
8636         PR rtl-optimization/92303
8637         * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
8638
8639 2020-03-13  Segher Boessenkool  <segher@kernel.crashing.org>
8640
8641         PR rtl-optimization/94148
8642         PR rtl-optimization/94042
8643         * df-core.c (BB_LAST_CHANGE_AGE): Delete.
8644         (df_worklist_propagate_forward): New parameter last_change_age, use
8645         that instead of bb->aux.
8646         (df_worklist_propagate_backward): Ditto.
8647         (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
8648
8649 2020-03-13  Richard Biener  <rguenther@suse.de>
8650
8651         PR tree-optimization/94163
8652         * tree-ssa-pre.c (create_expression_by_pieces): Check
8653         whether alignment would be zero.
8654
8655 2020-03-13  Martin Liska  <mliska@suse.cz>
8656
8657         PR lto/94157
8658         * lto-wrapper.c (run_gcc): Use concat for appending
8659         to collect_gcc_options.
8660
8661 2020-03-13  Jakub Jelinek  <jakub@redhat.com>
8662
8663         PR target/94121
8664         * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
8665         instead of GEN_INT.
8666
8667 2020-03-13  H.J. Lu  <hongjiu.lu@intel.com>
8668
8669         PR target/89229
8670         * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
8671         * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
8672         for TYPE_SSEMOV.  Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
8673         TARGET_AVX512VL and ext_sse_reg_operand check.
8674
8675 2020-03-13  Bu Le  <bule1@huawei.com>
8676
8677         PR target/94154
8678         * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
8679         (-param=aarch64-double-recp-precision=): New options.
8680         * doc/invoke.texi: Document them.
8681         * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
8682         instead of hard-coding the choice of 1 for float and 2 for double.
8683
8684 2020-03-13  Eric Botcazou  <ebotcazou@adacore.com>
8685
8686         PR rtl-optimization/94119
8687         * resource.h (clear_hashed_info_until_next_barrier): Declare.
8688         * resource.c (clear_hashed_info_until_next_barrier): New function.
8689         * reorg.c (add_to_delay_list): Fix formatting.
8690         (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
8691         the next instruction after removing a BARRIER.
8692
8693 2020-03-13  Eric Botcazou  <ebotcazou@adacore.com>
8694
8695         PR middle-end/92071
8696         * expmed.c (store_integral_bit_field): For fields larger than a word,
8697         call extract_bit_field on the value if the mode is BLKmode.  Remove
8698         specific path for big-endian targets and tidy things up a little bit.
8699
8700 2020-03-12  Richard Sandiford  <richard.sandiford@arm.com>
8701
8702         PR rtl-optimization/90275
8703         * cse.c (cse_insn): Delete no-op register moves too.
8704
8705 2020-03-12  Darius Galis  <darius.galis@cyberthorstudios.com>
8706
8707         * config/rx/rx.md (CTRLREG_CPEN): Remove.
8708         * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
8709
8710 2020-03-12  Richard Biener  <rguenther@suse.de>
8711
8712         PR tree-optimization/94103
8713         * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
8714         punning when the mode precision is not sufficient.
8715
8716 2020-03-12  H.J. Lu  <hongjiu.lu@intel.com>
8717
8718         PR target/89229
8719         * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
8720         MODE_V1DF and MODE_V2SF.
8721         * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
8722         ix86_output_ssemov for TYPE_SSEMOV.  Remove ext_sse_reg_operand
8723         check.
8724
8725 2020-03-12  Jakub Jelinek  <jakub@redhat.com>
8726
8727         * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
8728         ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
8729         and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
8730         * doc/tm.texi: Regenerated.
8731
8732         PR tree-optimization/94130
8733         * tree-ssa-dse.c: Include gimplify.h.
8734         (increment_start_addr): If stmt has lhs, drop the lhs from call and
8735         set it after the call to the original value of the first argument.
8736         Formatting fixes.
8737         (decrement_count): Formatting fix.
8738
8739 2020-03-11  Delia Burduv  <delia.burduv@arm.com>
8740
8741         * config/arm/arm-builtins.c
8742         (arm_init_simd_builtin_scalar_types): New.
8743         * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
8744         (vld2q_bf16): Used new builtin type.
8745         (vld3_bf16): Used new builtin type.
8746         (vld3q_bf16): Used new builtin type.
8747         (vld4_bf16): Used new builtin type.
8748         (vld4q_bf16): Used new builtin type.
8749         (vld2_dup_bf16): Used new builtin type.
8750         (vld2q_dup_bf16): Used new builtin type.
8751         (vld3_dup_bf16): Used new builtin type.
8752         (vld3q_dup_bf16): Used new builtin type.
8753         (vld4_dup_bf16): Used new builtin type.
8754         (vld4q_dup_bf16): Used new builtin type.
8755
8756 2020-03-11  Jakub Jelinek  <jakub@redhat.com>
8757
8758         PR target/94134
8759         * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
8760         at the start to switch to data section.  Don't print extra newline if
8761         .globl directive has not been emitted.
8762
8763 2020-03-11  Richard Biener  <rguenther@suse.de>
8764
8765         * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
8766         New pattern.
8767
8768 2020-03-11  Eric Botcazou  <ebotcazou@adacore.com>
8769
8770         PR middle-end/93961
8771         * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
8772         whose type is a qualified union.
8773
8774 2020-03-11  Jakub Jelinek  <jakub@redhat.com>
8775
8776         PR target/94121
8777         * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
8778         instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
8779
8780         PR bootstrap/93962
8781         * value-prof.c (dump_histogram_value): Use abs_hwi instead of
8782         std::abs.
8783         (get_nth_most_common_value): Use abs_hwi instead of abs.
8784
8785         PR middle-end/94111
8786         * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
8787         is rvc_normal, otherwise use real_to_decimal to print the number to
8788         string.
8789
8790         PR tree-optimization/94114
8791         * tree-loop-distribution.c (generate_memset_builtin): Call
8792         rewrite_to_non_trapping_overflow even on mem.
8793         (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
8794         on dest and src.
8795
8796 2020-03-10  Jeff Law  <law@redhat.com>
8797
8798         * config/bfin/bfin.md (movsi_insv): Add length attribute.
8799
8800 2020-03-10  Jiufu Guo  <guojiufu@linux.ibm.com>
8801
8802         PR target/93709
8803         * gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
8804         NAN and SIGNED_ZEROR for smax/smin.
8805
8806 2020-03-10  Will Schmidt  <will_schmidt@vnet.ibm.com>
8807
8808         PR target/90763
8809         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
8810         clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
8811
8812 2020-03-10  Roman Zhuykov  <zhroma@ispras.ru>
8813
8814         * loop-iv.c (find_simple_exit): Make it static.
8815         * cfgloop.h: Remove the corresponding prototype.
8816
8817 2020-03-10  Roman Zhuykov  <zhroma@ispras.ru>
8818
8819         * ddg.c (create_ddg): Fix intendation.
8820         (set_recurrence_length): Likewise.
8821         (create_ddg_all_sccs): Likewise.
8822
8823 2020-03-10  Jakub Jelinek  <jakub@redhat.com>
8824
8825         PR target/94088
8826         * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
8827         CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
8828         is 32.
8829
8830 2020-03-09  Jason Merrill  <jason@redhat.com>
8831
8832         * gdbinit.in (pgs): Fix typo in documentation.
8833
8834 2020-03-09  Vladimir Makarov  <vmakarov@redhat.com>
8835
8836         Revert:
8837
8838         2020-02-28  Vladimir Makarov  <vmakarov@redhat.com>
8839
8840         PR rtl-optimization/93564
8841         * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
8842         do not honor reg alloc order.
8843
8844 2020-03-09  Andrew Pinski  <apinski@marvell.com>
8845
8846         PR inline-asm/94095
8847         * doc/extend.texi (x86 Operand Modifiers): Fix column
8848         for 'A' modifier.
8849
8850 2020-03-09  Martin Liska  <mliska@suse.cz>
8851
8852         PR target/93800
8853         * config/rs6000/rs6000.c (rs6000_option_override_internal):
8854         Remove set of str_align_loops and str_align_jumps as these
8855         should be set in previous 2 conditions in the function.
8856
8857 2020-03-09  Jakub Jelinek  <jakub@redhat.com>
8858
8859         PR rtl-optimization/94045
8860         * params.opt (-param=max-find-base-term-values=): New option.
8861         * alias.c (find_base_term): Add cut-off for number of visited VALUEs
8862         in a single toplevel find_base_term call.
8863
8864 2020-03-06  Wilco Dijkstra  <wdijkstr@arm.com>
8865
8866         PR target/91598
8867         * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
8868         * config/aarch64/aarch64-simd.md
8869         (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
8870         (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
8871         * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
8872         * config/aarch64/arm_neon.h:
8873         (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
8874         (vmlal_lane_u16): Likewise.
8875         (vmlal_lane_s32): Likewise.
8876         (vmlal_lane_u32): Likewise.
8877         (vmlal_laneq_s16): Likewise.
8878         (vmlal_laneq_u16): Likewise.
8879         (vmlal_laneq_s32): Likewise.
8880         (vmlal_laneq_u32): Likewise.
8881         (vmull_lane_s16): Likewise.
8882         (vmull_lane_u16): Likewise.
8883         (vmull_lane_s32): Likewise.
8884         (vmull_lane_u32): Likewise.
8885         (vmull_laneq_s16): Likewise.
8886         (vmull_laneq_u16): Likewise.
8887         (vmull_laneq_s32): Likewise.
8888         (vmull_laneq_u32): Likewise.
8889         * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
8890         (Qlane): Likewise.
8891
8892 2020-03-06  Wilco Dijkstra  <wdijkstr@arm.com>
8893
8894         * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
8895         (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
8896         (aarch64_mls_elt<mode>): Likewise.
8897         (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
8898         (aarch64_fma4_elt<mode>): Likewise.
8899         (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
8900         (aarch64_fma4_elt_to_64v2df): Likewise.
8901         (aarch64_fnma4_elt<mode>): Likewise.
8902         (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
8903         (aarch64_fnma4_elt_to_64v2df): Likewise.
8904
8905 2020-03-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
8906
8907         * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
8908         Specify movprfx attribute.
8909         (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
8910
8911 2020-03-06  David Edelsohn  <dje.gcc@gmail.com>
8912
8913         PR target/94065
8914         * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
8915         cmodel=large.
8916         (TARGET_NO_FP_IN_TOC): Same.
8917         * config/rs6000/aix71.h: Same.
8918         * config/rs6000/aix72.h: Same.
8919
8920 2020-03-06  Andrew Pinski  <apinski@marvell.com>
8921             Jeff Law  <law@redhat.com>
8922
8923         PR rtl-optimization/93996
8924         * haifa-sched.c (remove_notes): Be more careful when adding
8925         REG_SAVE_NOTE.
8926
8927 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
8928
8929         * config/arm/arm_neon.h (vld2_bf16): New.
8930         (vld2q_bf16): New.
8931         (vld3_bf16): New.
8932         (vld3q_bf16): New.
8933         (vld4_bf16): New.
8934         (vld4q_bf16): New.
8935         (vld2_dup_bf16): New.
8936         (vld2q_dup_bf16): New.
8937         (vld3_dup_bf16): New.
8938         (vld3q_dup_bf16): New.
8939         (vld4_dup_bf16): New.
8940         (vld4q_dup_bf16): New.
8941         * config/arm/arm_neon_builtins.def
8942         (vld2): Changed to VAR13 and added v4bf, v8bf
8943         (vld2_dup): Changed to VAR8 and added v4bf, v8bf
8944         (vld3): Changed to VAR13 and added v4bf, v8bf
8945         (vld3_dup): Changed to VAR8 and added v4bf, v8bf
8946         (vld4): Changed to VAR13 and added v4bf, v8bf
8947         (vld4_dup): Changed to VAR8 and added v4bf, v8bf
8948         * config/arm/iterators.md (VDXBF2): New iterator.
8949         *config/arm/neon.md (neon_vld2): Use new iterators.
8950         (neon_vld2_dup<mode): Use new iterators.
8951         (neon_vld3<mode>): Likewise.
8952         (neon_vld3qa<mode>): Likewise.
8953         (neon_vld3qb<mode>): Likewise.
8954         (neon_vld3_dup<mode>): Likewise.
8955         (neon_vld4<mode>): Likewise.
8956         (neon_vld4qa<mode>): Likewise.
8957         (neon_vld4qb<mode>): Likewise.
8958         (neon_vld4_dup<mode>): Likewise.
8959         (neon_vld2_dupv8bf): New.
8960         (neon_vld3_dupv8bf): Likewise.
8961         (neon_vld4_dupv8bf): Likewise.
8962
8963 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
8964
8965         * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
8966         (bfloat16x8x2_t): New typedef.
8967         (bfloat16x4x3_t): New typedef.
8968         (bfloat16x8x3_t): New typedef.
8969         (bfloat16x4x4_t): New typedef.
8970         (bfloat16x8x4_t): New typedef.
8971         (vst2_bf16): New.
8972         (vst2q_bf16): New.
8973         (vst3_bf16): New.
8974         (vst3q_bf16): New.
8975         (vst4_bf16): New.
8976         (vst4q_bf16): New.
8977         * config/arm/arm-builtins.c (v2bf_UP): Define.
8978         (VAR13): New.
8979         (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
8980         * config/arm/arm-modes.def (V2BF): New mode.
8981         * config/arm/arm-simd-builtin-types.def
8982         (Bfloat16x2_t): New entry.
8983         * config/arm/arm_neon_builtins.def
8984         (vst2): Changed to VAR13 and added v4bf, v8bf
8985         (vst3): Changed to VAR13 and added v4bf, v8bf
8986         (vst4): Changed to VAR13 and added v4bf, v8bf
8987         * config/arm/iterators.md (VDXBF): New iterator.
8988         (VQ2BF): New iterator.
8989         *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
8990         (neon_vst2<mode>): Used new iterators.
8991         (neon_vst3<mode>): Used new iterators.
8992         (neon_vst3<mode>): Used new iterators.
8993         (neon_vst3qa<mode>): Used new iterators.
8994         (neon_vst3qb<mode>): Used new iterators.
8995         (neon_vst4<mode>): Used new iterators.
8996         (neon_vst4<mode>): Used new iterators.
8997         (neon_vst4qa<mode>): Used new iterators.
8998         (neon_vst4qb<mode>): Used new iterators.
8999
9000 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
9001
9002         * config/aarch64/aarch64-simd-builtins.def
9003         (bfcvtn): New built-in function.
9004         (bfcvtn_q): New built-in function.
9005         (bfcvtn2): New built-in function.
9006         (bfcvt): New built-in function.
9007         * config/aarch64/aarch64-simd.md
9008         (aarch64_bfcvtn<q><mode>): New pattern.
9009         (aarch64_bfcvtn2v8bf): New pattern.
9010         (aarch64_bfcvtbf): New pattern.
9011         * config/aarch64/arm_bf16.h (float32_t): New typedef.
9012         (vcvth_bf16_f32): New intrinsic.
9013         * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
9014         (vcvtq_low_bf16_f32): New intrinsic.
9015         (vcvtq_high_bf16_f32): New intrinsic.
9016         * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
9017         (UNSPEC_BFCVTN): New UNSPEC.
9018         (UNSPEC_BFCVTN2): New UNSPEC.
9019         (UNSPEC_BFCVT): New UNSPEC.
9020         * config/arm/types.md (bf_cvt): New type.
9021
9022 2020-03-06  Andreas Krebbel  <krebbel@linux.ibm.com>
9023
9024         * config/s390/s390.md ("tabort"): Get rid of two consecutive
9025         blanks in format string.
9026
9027 2020-03-05  H.J. Lu  <hongjiu.lu@intel.com>
9028
9029         PR target/89229
9030         PR target/89346
9031         * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
9032         * config/i386/i386.c (ix86_get_ssemov): New function.
9033         (ix86_output_ssemov): Likewise.
9034         * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
9035         ix86_output_ssemov for TYPE_SSEMOV.  Remove TARGET_AVX512VL
9036         check.
9037         (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
9038         (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
9039         Remove ext_sse_reg_operand and TARGET_AVX512VL check.
9040         (*movti_internal): Likewise.
9041         (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
9042
9043 2020-03-05  Jeff Law  <law@redhat.com>
9044
9045         PR tree-optimization/91890
9046         * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
9047         Use gimple_or_expr_nonartificial_location.
9048         (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
9049         Use gimple_or_expr_nonartificial_location.
9050         * gimple.c (gimple_or_expr_nonartificial_location): New function.
9051         * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
9052         * tree-ssa-strlen.c (maybe_warn_overflow): Use
9053         gimple_or_expr_nonartificial_location.
9054         (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
9055         (maybe_warn_pointless_strcmp): Likewise.
9056
9057 2020-03-05  Jakub Jelinek  <jakub@redhat.com>
9058
9059         PR target/94046
9060         * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
9061         SRC and MASK arguments to __m128 from __m128d.
9062         (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
9063         from __m256d.
9064         (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
9065         from __m128d.
9066         * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
9067         argument to __m128i from __m128d.
9068         (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
9069         __m256d.
9070         (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
9071         (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
9072         __m256.
9073
9074 2020-03-05  Delia Burduv  <delia.burduv@arm.com>
9075
9076         * config/arm/arm_neon.h (vbfmmlaq_f32): New.
9077         (vbfmlalbq_f32): New.
9078         (vbfmlaltq_f32): New.
9079         (vbfmlalbq_lane_f32): New.
9080         (vbfmlaltq_lane_f32): New.
9081         (vbfmlalbq_laneq_f32): New.
9082         (vbfmlaltq_laneq_f32): New.
9083         * config/arm/arm_neon_builtins.def (vmmla): New.
9084         (vfmab): New.
9085         (vfmat): New.
9086         (vfmab_lane): New.
9087         (vfmat_lane): New.
9088         (vfmab_laneq): New.
9089         (vfmat_laneq): New.
9090         * config/arm/iterators.md (BF_MA): New int iterator.
9091         (bt): New int attribute.
9092         (VQXBF): Copy of VQX with V8BF.
9093         * config/arm/neon.md (neon_vmmlav8bf): New insn.
9094         (neon_vfma<bt>v8bf): New insn.
9095         (neon_vfma<bt>_lanev8bf): New insn.
9096         (neon_vfma<bt>_laneqv8bf): New expand.
9097         (neon_vget_high<mode>): Changed iterator to VQXBF.
9098         * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
9099         (UNSPEC_BFMAB): New UNSPEC.
9100         (UNSPEC_BFMAT): New UNSPEC.
9101
9102 2020-03-05  Jakub Jelinek  <jakub@redhat.com>
9103
9104         PR middle-end/93399
9105         * tree-pretty-print.h (pretty_print_string): Declare.
9106         * tree-pretty-print.c (pretty_print_string): Remove forward
9107         declaration, no longer static.  Change nbytes parameter type
9108         from unsigned to size_t.
9109         * print-rtl.c (print_value) <case CONST_STRING>: Use
9110         pretty_print_string and for shrink way too long strings.
9111
9112 2020-03-05  Richard Biener  <rguenther@suse.de>
9113             Jakub Jelinek  <jakub@redhat.com>
9114
9115         PR tree-optimization/93582
9116         * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
9117         last operand as signed when looking for memset offset.  Formatting
9118         fix.
9119
9120 2020-03-04  Andrew Pinski  <apinski@marvell.com>
9121
9122         PR bootstrap/93962
9123         * value-prof.c (dump_histogram_value): Use std::abs.
9124
9125 2020-03-04  Martin Sebor  <msebor@redhat.com>
9126
9127         PR tree-optimization/93986
9128         * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
9129         operands to the same precision widest_int to avoid ICEs.
9130
9131 2020-03-04  Bill Schmidt  <wschmidt@linux.ibm.com>
9132
9133         PR target/87560
9134         * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
9135         * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
9136         for OPTION_MASK_ALTIVEC.
9137
9138 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
9139
9140         * config.gcc: Include the glibc-stdint.h header for zTPF.
9141
9142 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
9143
9144         * config/s390/s390.c (s390_secondary_memory_needed): Disallow
9145         direct FPR-GPR copies.
9146         (s390_register_info_gprtofpr): Disallow GPR content to be saved in
9147         FPRs.
9148
9149 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
9150
9151         * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
9152         operands to the prologue_tpf expander.
9153         (s390_emit_epilogue): Likewise.
9154         (s390_option_override_internal): Do error checking and setup for
9155         the new options.
9156         * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
9157         (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
9158         (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
9159         (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
9160         * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
9161         operands for the check flag and the branch target.
9162         * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
9163         ("mtpf-trace-hook-prologue-target")
9164         ("mtpf-trace-hook-epilogue-check")
9165         ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
9166         options.
9167         * doc/invoke.texi: Document -mtpf-trace-skip option. The other
9168         options are for debugging purposes and will not be documented
9169         here.
9170
9171 2020-03-04  Jakub Jelinek  <jakub@redhat.com>
9172
9173         PR debug/93888
9174         * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
9175
9176         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
9177         argument.  Change pd argument so that it can be modified.  Turn
9178         constant non-CONSTRUCTOR store into non-constant if it is too large.
9179         Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
9180         overflows.
9181         (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
9182         callers.
9183
9184 2020-02-04  Richard Biener  <rguenther@suse.de>
9185
9186         PR tree-optimization/93964
9187         * graphite-isl-ast-to-gimple.c
9188         (gcc_expression_from_isl_ast_expr_id): Add intermediate
9189         conversion for pointer to integer converts.
9190         * graphite-scop-detection.c (assign_parameter_index_in_region):
9191         Relax assert.
9192
9193 2020-03-04  Martin Liska  <mliska@suse.cz>
9194
9195         PR c/93886
9196         PR c/93887
9197         * doc/invoke.texi: Clarify --help=language and --help=common
9198         interaction.
9199
9200 2020-03-04  Jakub Jelinek  <jakub@redhat.com>
9201
9202         PR tree-optimization/94001
9203         * tree-tailcall.c (process_assignment): Before comparing op1 to
9204         *ass_var, verify *ass_var is non-NULL.
9205
9206 2020-03-04  Kito Cheng  <kito.cheng@sifive.com>
9207
9208         PR target/93995
9209         * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
9210         the result of IOR.
9211
9212 2020-03-03  Dennis Zhang  <dennis.zhang@arm.com>
9213
9214         * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
9215         * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
9216         (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
9217         (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
9218         * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
9219         (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
9220         * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
9221         (V_bf_low, V_bf_cvt_m): New mode attributes.
9222         * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
9223         (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
9224         (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
9225         (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
9226         * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
9227
9228 2020-03-03  Jakub Jelinek  <jakub@redhat.com>
9229
9230         PR tree-optimization/93582
9231         * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
9232         * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
9233         members, initialize them in the constructor and if mask is non-NULL,
9234         artificially push_partial_def {} for the portions of the mask that
9235         contain zeros.
9236         (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
9237         val and return (void *)-1.  Formatting fix.
9238         (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
9239         Formatting fix.
9240         (vn_reference_lookup): Add mask argument.  If non-NULL, don't call
9241         fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
9242         data.mask_result.
9243         (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
9244         mask.
9245         (visit_stmt): Formatting fix.
9246
9247 2020-03-03  Richard Biener  <rguenther@suse.de>
9248
9249         PR tree-optimization/93946
9250         * alias.h (refs_same_for_tbaa_p): Declare.
9251         * alias.c (refs_same_for_tbaa_p): New function.
9252         * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
9253         zero.
9254         * tree-ssa-scopedtables.h
9255         (avail_exprs_stack::lookup_avail_expr): Add output argument
9256         giving access to the hashtable entry.
9257         * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
9258         Likewise.
9259         * tree-ssa-dom.c: Include alias.h.
9260         (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
9261         removing redundant store.
9262         * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
9263         (ao_ref_init_from_vn_reference): Adjust prototype.
9264         (vn_reference_lookup_pieces): Likewise.
9265         (vn_reference_insert_pieces): Likewise.
9266         * tree-ssa-sccvn.c: Track base alias set in addition to alias
9267         set everywhere.
9268         (eliminate_dom_walker::eliminate_stmt): Also check base alias
9269         set when removing redundant stores.
9270         (visit_reference_op_store): Likewise.
9271         * dse.c (record_store): Adjust valdity check for redundant
9272         store removal.
9273
9274 2020-03-03  Jakub Jelinek  <jakub@redhat.com>
9275
9276         PR target/26877
9277         * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
9278
9279         PR rtl-optimization/94002
9280         * explow.c (plus_constant): Punt if cst has VOIDmode and
9281         get_pool_mode is different from mode.
9282
9283 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
9284
9285         * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
9286         address has an offset which fits the scalling constraint for a
9287         load/store operation.
9288         (legitimate_scaled_address_p): Update use
9289         leigitimate_small_data_address_p.
9290         (arc_print_operand): Likewise.
9291         (arc_legitimate_address_p): Likewise.
9292         (legitimate_small_data_address_p): Likewise.
9293
9294 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
9295
9296         * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
9297         (fnmasf4_fpu): Likewise.
9298
9299 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
9300
9301         * config/arc/arc.md (adddi3): Early expand the 64bit operation into
9302         32bit ops.
9303         (subdi3): Likewise.
9304         (adddi3_i): Remove pattern.
9305         (subdi3_i): Likewise.
9306
9307 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
9308
9309         * config/arc/arc.md (eh_return): Add length info.
9310
9311 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
9312
9313         * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
9314
9315 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
9316
9317         * doc/invoke.texi (Static Analyzer Options): Add
9318         -Wanalyzer-stale-setjmp-buffer to the list of options enabled
9319         by -fanalyzer.
9320
9321 2020-03-02  Uroš Bizjak  <ubizjak@gmail.com>
9322
9323         PR target/93997
9324         * config/i386/i386.md (movstrict<mode>): Allow only
9325         registers with VALID_INT_MODE_P modes.
9326
9327 2020-03-02  Andrew Stubbs  <ams@codesourcery.com>
9328
9329         * config/gcn/gcn-valu.md (dpp_move<mode>): New.
9330         (reduc_insn): Use 'U' and 'B' operand codes.
9331         (reduc_<reduc_op>_scal_<mode>): Allow all types.
9332         (reduc_<reduc_op>_scal_v64di): Delete.
9333         (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
9334         (*plus_carry_dpp_shr_v64si): Change to ...
9335         (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
9336         (mov_from_lane63_v64di): Change to ...
9337         (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
9338         * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
9339         Support UNSPEC_MOV_DPP_SHR output formats.
9340         (gcn_expand_reduc_scalar): Add "use_moves" reductions.
9341         Add "use_extends" reductions.
9342         (print_operand_address): Add 'I' and 'U' codes.
9343         * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
9344
9345 2020-03-02  Martin Liska  <mliska@suse.cz>
9346
9347         * lto-wrapper.c: Fix typo in comment about
9348         C++ standard version.
9349
9350 2020-03-01  Martin Sebor  <msebor@redhat.com>
9351
9352         PR c++/92721
9353         * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
9354
9355 2020-03-01  Martin Sebor  <msebor@redhat.com>
9356
9357         PR middle-end/93829
9358         * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
9359           of a pointer in the outermost ADDR_EXPRs.
9360
9361 2020-02-28  Jeff Law  <law@redhat.com>
9362
9363         * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
9364         * config/v850/v850.c (v850_asm_trampoline_template): Update
9365         accordingly.
9366
9367 2020-02-28  Michael Meissner  <meissner@linux.ibm.com>
9368
9369         PR target/93937
9370         * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
9371         Delete insn.
9372
9373 2020-02-28  Martin Liska  <mliska@suse.cz>
9374
9375         PR other/93965
9376         * configure.ac: Improve detection of ld_date by requiring
9377         either two dashes or none.
9378         * configure: Regenerate.
9379
9380 2020-02-28  Vladimir Makarov  <vmakarov@redhat.com>
9381
9382         PR rtl-optimization/93564
9383         * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
9384         do not honor reg alloc order.
9385
9386 2020-02-27  Joel Hutton  <Joel.Hutton@arm.com>
9387
9388         PR target/87612
9389         * config/aarch64/aarch64.c (aarch64_override_options): Fix
9390         misleading warning string.
9391
9392 2020-02-27  Martin Sebor  <msebor@redhat.com>
9393
9394         * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
9395
9396 2020-02-27  Michael Meissner  <meissner@linux.ibm.com>
9397
9398         PR target/93932
9399         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
9400         Split the insn into two parts.  This insn only does variable
9401         extract from a register.
9402         (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
9403         variable extract from memory.
9404         (vsx_extract_v4sf_var): Split the insn into two parts.  This insn
9405         only does variable extract from a register.
9406         (vsx_extract_v4sf_var_load): New insn, do variable extract from
9407         memory.
9408         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
9409         into two parts.  This insn only does variable extract from a
9410         register.
9411         (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
9412         do variable extract from memory.
9413
9414 2020-02-27  Martin Jambor  <mjambor@suse.cz>
9415             Feng Xue  <fxue@os.amperecomputing.com>
9416
9417         PR ipa/93707
9418         * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
9419         new function calls_same_node_or_its_all_contexts_clone_p.
9420         (cgraph_edge_brings_value_p): Use it.
9421         (cgraph_edge_brings_value_p): Likewise.
9422         (self_recursive_pass_through_p): Return false if caller is a clone.
9423         (self_recursive_agg_pass_through_p): Likewise.
9424
9425 2020-02-27  Jan Hubicka  <hubicka@ucw.cz>
9426
9427         PR middle-end/92152
9428         * alias.c (ends_tbaa_access_path_p): Break out from ...
9429         (component_uses_parent_alias_set_from): ... here.
9430         * alias.h (ends_tbaa_access_path_p): Declare.
9431         * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
9432         handle trailing arrays past end of tbaa access path.
9433         (aliasing_component_refs_p): ... here; likewise.
9434         (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
9435         path; disambiguate also past end of it.
9436         (nonoverlapping_component_refs_p): Use only TBAA segment of the access
9437         path.
9438
9439 2020-02-27  Mihail Ionescu  <mihail.ionescu@arm.com>
9440
9441         * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
9442         beginning of the file.
9443         (vcreate_bf16, vcombine_bf16): New.
9444         (vdup_n_bf16, vdupq_n_bf16): New.
9445         (vdup_lane_bf16, vdup_laneq_bf16): New.
9446         (vdupq_lane_bf16, vdupq_laneq_bf16): New.
9447         (vduph_lane_bf16, vduph_laneq_bf16): New.
9448         (vset_lane_bf16, vsetq_lane_bf16): New.
9449         (vget_lane_bf16, vgetq_lane_bf16): New.
9450         (vget_high_bf16, vget_low_bf16): New.
9451         (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
9452         (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
9453         (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
9454         (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
9455         (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
9456         (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
9457         (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
9458         (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
9459         (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
9460         (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
9461         (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
9462         (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
9463         (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
9464         (vreinterpretq_bf16_p128): New.
9465         (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
9466         (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
9467         (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
9468         (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
9469         (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
9470         (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
9471         (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
9472         (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
9473         (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
9474         (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
9475         (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
9476         (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
9477         (vreinterpretq_p128_bf16): New.
9478         * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
9479         (V_elem): Likewise.
9480         (V_elem_l): Likewise.
9481         (VD_LANE): Likewise.
9482         (VQX) Add V8BF.
9483         (V_DOUBLE): Likewise.
9484         (VDQX): Add V4BF and V8BF.
9485         (V_two_elem, V_three_elem, V_four_elem): Likewise.
9486         (V_reg): Likewise.
9487         (V_HALF): Likewise.
9488         (V_double_vector_mode): Likewise.
9489         (V_cmp_result): Likewise.
9490         (V_uf_sclr): Likewise.
9491         (V_sz_elem): Likewise.
9492         (Is_d_reg): Likewise.
9493         (V_mode_nunits): Likewise.
9494         * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
9495
9496 2020-02-27  Andrew Stubbs  <ams@codesourcery.com>
9497
9498         * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
9499         (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
9500         (<expander><mode>3<exec>): Likewise.
9501         (<expander><mode>3): New.
9502         (v<expander><mode>3): New.
9503         (<expander><mode>3): New.
9504         (<expander><mode>3<exec>): Rename to ...
9505         (<expander>v64si3<exec>): ... this, and change modes to V64SI.
9506         * config/gcn/gcn.md (mnemonic): Use '%B' for not.
9507
9508 2020-02-27  Alexandre Oliva <oliva@adacore.com>
9509
9510         * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
9511         them alone on vx7.
9512
9513 2020-02-27  Richard Biener  <rguenther@suse.de>
9514
9515         PR tree-optimization/93508
9516         * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
9517         non-_CHK variants.  Valueize their length arguments.
9518
9519 2020-02-27  Richard Biener  <rguenther@suse.de>
9520
9521         PR tree-optimization/93953
9522         * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
9523         to the hash-map entry.
9524
9525 2020-02-27  Andrew Stubbs  <ams@codesourcery.com>
9526
9527         * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
9528
9529 2020-02-27  Mark Williams  <mwilliams@fb.com>
9530
9531         * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
9532         * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
9533         -ffile-prefix-map and -fmacro-prefix-map.
9534         * lto-streamer-out.c: Include file-prefix-map.h.
9535         (lto_output_location): Remap the file part of locations.
9536
9537 2020-02-27  Jakub Jelinek  <jakub@redhat.com>
9538
9539         PR c/93949
9540         * gimplify.c (gimplify_init_constructor): Don't promote readonly
9541         DECL_REGISTER variables to TREE_STATIC.
9542
9543         PR tree-optimization/93582
9544         PR tree-optimization/93945
9545         * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
9546         non-zero INTEGER_CST second argument and ref->offset or ref->size
9547         not a multiple of BITS_PER_UNIT.
9548
9549 2020-02-27  Jonathan Wakely  <jwakely@redhat.com>
9550
9551         * doc/install.texi (Binaries): Update description of BullFreeware.
9552
9553 2020-02-26  Sandra Loosemore  <sandra@codesourcery.com>
9554
9555         PR c++/90467
9556
9557         * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
9558         C++ Language Options, Warning Options, and Static Analyzer
9559         Options lists.  Document negative form of options enabled by
9560         default.  Move some things around to more accurately sort
9561         warnings by category.
9562         (C++ Dialect Options, Warning Options, Static Analyzer
9563         Options): Document negative form of options when enabled by
9564         default.  Move some things around to more accurately sort
9565         warnings by category.  Add some missing index entries.
9566         Light copy-editing.
9567
9568 2020-02-26  Carl Love  <cel@us.ibm.com>
9569
9570         PR target/91276
9571         * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
9572         ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
9573         for the vector unsigned short arguments.  It is also listed as the
9574         name of the built-in for arguments vector unsigned short,
9575         vector unsigned int and vector unsigned long long built-ins.  The
9576         name of the builtins for these arguments should be:
9577         __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
9578         __builtin_crypto_vpmsumd respectively.
9579
9580 2020-02-26  Richard Biener  <rguenther@suse.de>
9581
9582         * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
9583         and load permutation.
9584
9585 2020-02-26  Richard Sandiford  <richard.sandiford@arm.com>
9586
9587         PR middle-end/93843
9588         * optabs-tree.c (supportable_convert_operation): Reject types with
9589         scalar modes.
9590
9591 2020-02-26  David Malcolm  <dmalcolm@redhat.com>
9592
9593         * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
9594
9595 2020-02-26  Jakub Jelinek  <jakub@redhat.com>
9596
9597         PR tree-optimization/93820
9598         * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
9599         argument to ALL_INTEGER_CST_P boolean.
9600         (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
9601         (imm_store_chain_info::coalesce_immediate_stores): Likewise.  Handle
9602         adjacent INTEGER_CST store into merged_store->only_constants like
9603         overlapping one.
9604
9605 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
9606
9607         PR other/93912
9608         * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
9609         -> probability.
9610         * cfghooks.c (verify_flow_info): Likewise.
9611         * predict.c (combine_predictions_for_bb): Likewise.
9612         * bb-reorder.c (connect_better_edge_p): Likewise.  Fix comment typo,
9613         sucessor -> successor.
9614         (find_traces_1_round): Fix comment typo, destinarion -> destination.
9615         * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
9616         successors.
9617         * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
9618         message typo, sucessors -> successors.
9619
9620 2020-02-25  Martin Sebor  <msebor@redhat.com>
9621
9622         * doc/extend.texi (attribute access): Correct an example.
9623
9624 2020-02-25  Mihail Ionescu  <mihail.ionescu@arm.com>
9625
9626         * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
9627         Add simd_bf.
9628         (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
9629         (VAR15, VAR16): New.
9630         * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
9631         (VD): Enable for V4BF.
9632         (VDC): Likewise.
9633         (VQ): Enable for V8BF.
9634         (VQ2): Likewise.
9635         (VQ_NO2E): Likewise.
9636         (VDBL, Vdbl): Add V4BF.
9637         (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
9638         * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
9639         (bfloat16x8x2_t): Likewise.
9640         (bfloat16x4x3_t): Likewise.
9641         (bfloat16x8x3_t): Likewise.
9642         (bfloat16x4x4_t): Likewise.
9643         (bfloat16x8x4_t): Likewise.
9644         (vcombine_bf16): New.
9645         (vld1_bf16, vld1_bf16_x2): New.
9646         (vld1_bf16_x3, vld1_bf16_x4): New.
9647         (vld1q_bf16, vld1q_bf16_x2): New.
9648         (vld1q_bf16_x3, vld1q_bf16_x4): New.
9649         (vld1_lane_bf16): New.
9650         (vld1q_lane_bf16): New.
9651         (vld1_dup_bf16): New.
9652         (vld1q_dup_bf16): New.
9653         (vld2_bf16): New.
9654         (vld2q_bf16): New.
9655         (vld2_dup_bf16): New.
9656         (vld2q_dup_bf16): New.
9657         (vld3_bf16): New.
9658         (vld3q_bf16): New.
9659         (vld3_dup_bf16): New.
9660         (vld3q_dup_bf16): New.
9661         (vld4_bf16): New.
9662         (vld4q_bf16): New.
9663         (vld4_dup_bf16): New.
9664         (vld4q_dup_bf16): New.
9665         (vst1_bf16, vst1_bf16_x2): New.
9666         (vst1_bf16_x3, vst1_bf16_x4): New.
9667         (vst1q_bf16, vst1q_bf16_x2): New.
9668         (vst1q_bf16_x3, vst1q_bf16_x4): New.
9669         (vst1_lane_bf16): New.
9670         (vst1q_lane_bf16): New.
9671         (vst2_bf16): New.
9672         (vst2q_bf16): New.
9673         (vst3_bf16): New.
9674         (vst3q_bf16): New.
9675         (vst4_bf16): New.
9676         (vst4q_bf16): New.
9677
9678 2020-02-25  Mihail Ionescu  <mihail.ionescu@arm.com>
9679
9680         * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
9681         (VALL_F16): Likewise.
9682         (VALLDI_F16): Likewise.
9683         (Vtype): Likewise.
9684         (Vetype): Likewise.
9685         (vswap_width_name): Likewise.
9686         (VSWAP_WIDTH): Likewise.
9687         (Vel): Likewise.
9688         (VEL): Likewise.
9689         (q): Likewise.
9690         * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
9691         (vget_lane_bf16, vgetq_lane_bf16): New.
9692         (vcreate_bf16): New.
9693         (vdup_n_bf16, vdupq_n_bf16): New.
9694         (vdup_lane_bf16, vdup_laneq_bf16): New.
9695         (vdupq_lane_bf16, vdupq_laneq_bf16): New.
9696         (vduph_lane_bf16, vduph_laneq_bf16): New.
9697         (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
9698         (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
9699         (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
9700         (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
9701         (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
9702         (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
9703         (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
9704         (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
9705         (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
9706         (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
9707         (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
9708         (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
9709         (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
9710         (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
9711         (vreinterpretq_bf16_p128): New.
9712         (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
9713         (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
9714         (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
9715         (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
9716         (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
9717         (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
9718         (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
9719         (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
9720         (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
9721         (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
9722         (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
9723         (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
9724         (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
9725         (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
9726         (vreinterpretq_p128_bf16): New.
9727
9728 2020-02-25  Dennis Zhang  <dennis.zhang@arm.com>
9729
9730         * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
9731         (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
9732         (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
9733         * config/arm/arm_neon_builtins.def (vbfdot): New entry.
9734         (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
9735         * config/arm/iterators.md (VSF2BF): New attribute.
9736         * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
9737         (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
9738         (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
9739
9740 2020-02-25  Christophe Lyon  <christophe.lyon@linaro.org>
9741
9742         * config/arm/arm.md (required_for_purecode): New attribute.
9743         (enabled): Handle required_for_purecode.
9744         * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
9745         work with -mpure-code.
9746
9747 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
9748
9749         PR rtl-optimization/93908
9750         * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
9751         with mask.
9752
9753 2019-02-25  Eric Botcazou  <ebotcazou@adacore.com>
9754
9755         * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
9756
9757 2020-02-25  Roman Zhuykov  <zhroma@ispras.ru>
9758
9759         * doc/install.texi (--enable-checking): Adjust wording.
9760
9761 2020-02-25  Richard Biener  <rguenther@suse.de>
9762
9763         PR tree-optimization/93868
9764         * tree-vect-slp.c (slp_copy_subtree): New function.
9765         (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
9766         re-arranging stmts in it.
9767
9768 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
9769
9770         PR middle-end/93874
9771         * passes.c (pass_manager::dump_passes): Create a cgraph node for the
9772         dummy function and remove it at the end.
9773
9774         PR translation/93864
9775         * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
9776         paramter -> parameter.
9777         * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
9778         * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
9779
9780 2020-02-24  Roman Zhuykov  <zhroma@ispras.ru>
9781
9782         * doc/install.texi (--enable-checking): Properly document current
9783         behavior.
9784         (--enable-stage1-checking): Minor clarification about bootstrap.
9785
9786 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
9787
9788         PR analyzer/93032
9789         * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
9790         -fanalyzer-checker=taint is also required.
9791         (-fanalyzer-checker=): Note that providing this option enables the
9792         given checker, and doing so may be required for checkers that are
9793         disabled by default.
9794
9795 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
9796
9797         * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
9798         significant control flow events; add a "3" which shows all
9799         control flow events; the old "3" becomes "4".
9800
9801 2020-02-24  Jakub Jelinek  <jakub@redhat.com>
9802
9803         PR tree-optimization/93582
9804         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
9805         pd.offset and pd.size to be counted in bits rather than bytes, add
9806         support for maxsizei that is not a multiple of BITS_PER_UNIT and
9807         handle bitfield stores and loads.
9808         (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
9809         uncomparable quantities - bytes vs. bits.  Allow push_partial_def
9810         on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
9811         pd.offset/pd.size to be counted in bits rather than bytes.
9812         Formatting fix.  Rename shadowed len variable to buflen.
9813
9814 2020-02-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
9815             Kugan Vivekandarajah  <kugan.vivekanandarajah@linaro.org>
9816
9817         PR driver/47785
9818         * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
9819         (driver::main): Call putenv_COLLECT_AS_OPTIONS.
9820         * opts-common.c (parse_options_from_collect_gcc_options): New function.
9821         (prepend_xassembler_to_collect_as_options): Likewise.
9822         * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
9823         (prepend_xassembler_to_collect_as_options): Likewise.
9824         * lto-opts.c (lto_write_options): Stream assembler options
9825         in COLLECT_AS_OPTIONS.
9826         * lto-wrapper.c (xassembler_options_error): New static variable.
9827         (get_options_from_collect_gcc_options): Move parsing options code to
9828         parse_options_from_collect_gcc_options and call it.
9829         (merge_and_complain): Validate -Xassembler options.
9830         (append_compiler_options): Handle OPT_Xassembler.
9831         (run_gcc): Append command line -Xassembler options to
9832         collect_gcc_options.
9833         * doc/invoke.texi: Add documentation about using Xassembler
9834         options with LTO.
9835
9836 2020-02-24  Kito Cheng  <kito.cheng@sifive.com>
9837
9838         * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
9839         for LTGT.
9840         (riscv_rtx_costs): Update cost model for LTGT.
9841
9842 2020-02-23  Vladimir Makarov  <vmakarov@redhat.com>
9843
9844         PR rtl-optimization/93564
9845         * ira-color.c (struct update_cost_queue_elem): New member start.
9846         (queue_update_cost, get_next_update_cost): Add new arg start.
9847         (allocnos_conflict_p): New function.
9848         (update_costs_from_allocno): Add new arg conflict_cost_update_p.
9849         Add checking conflicts with allocnos_conflict_p.
9850         (update_costs_from_prefs, restore_costs_from_copies): Adjust
9851         update_costs_from_allocno calls.
9852         (update_conflict_hard_regno_costs): Add checking conflicts with
9853         allocnos_conflict_p.  Adjust calls of queue_update_cost and
9854         get_next_update_cost.
9855         (assign_hard_reg): Adjust calls of queue_update_cost.  Add
9856         debugging print.
9857         (bucket_allocno_compare_func): Restore previous version.
9858
9859 2020-02-21  John David Anglin  <danglin@gcc.gnu.org>
9860
9861         * gcc/config/pa/pa.c (pa_function_value): Fix check for word and
9862         double-word size when handling aggregate return values.
9863         * gcc/config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
9864         that homogeneous SFmode and DFmode aggregates are passed and returned
9865         in general registers.
9866
9867 2020-02-21  Jakub Jelinek  <jakub@redhat.com>
9868
9869         PR translation/93759
9870         * opts.c (print_filtered_help): Translate help before appending
9871         messages to it rather than after that.
9872
9873 2020-02-19  Richard Sandiford  <richard.sandiford@arm.com>
9874
9875         PR rtl-optimization/PR92989
9876         * lra-lives.c (process_bb_lives): Restore the original order
9877         of the bb liveness update.  Call make_hard_regno_dead for each
9878         register clobbered at the start of an EH receiver.
9879
9880 2020-02-18  Feng Xue  <fxue@os.amperecomputing.com>
9881
9882         PR ipa/93763
9883         * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
9884         self-recursively generated.
9885
9886 2020-02-21  Iain Sandoe  <iain@sandoe.co.uk>
9887
9888         PR target/93860
9889         * config/darwin-c.c (pop_field_alignment): Adjust quoting of
9890         error string.
9891
9892 2020-02-21  Mihail Ionescu  <mihail.ionescu@arm.com>
9893
9894         * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
9895         Document new target supports option.
9896
9897 2020-02-21  Dennis Zhang  <dennis.zhang@arm.com>
9898
9899         * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
9900         * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
9901         * config/arm/iterators.md (MATMUL): New iterator.
9902         (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
9903         (mmla_sfx): New attribute.
9904         * config/arm/neon.md (neon_<sup>mmlav16qi): New.
9905         * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
9906         (UNSPEC_MATMUL_US): New.
9907
9908 2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
9909
9910         * config/arm/arm.md: Prevent scalar shifts from being used when big
9911         endian is enabled.
9912
9913 2020-02-21  Jan Hubicka  <hubicka@ucw.cz>
9914             Richard Biener  <rguenther@suse.de>
9915
9916         PR tree-optimization/93586
9917         * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
9918         after mismatched array refs; do not sure type size information to
9919         recover from unmatched referneces with !flag_strict_aliasing_p.
9920
9921 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
9922
9923         * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
9924         (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
9925         (scatter_store<mode>): Rename to ...
9926         (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
9927         (scatter<mode>_exec): Delete. Move contents ...
9928         (mask_scatter_store<mode>): ... here, and rename that to ...
9929         (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
9930         Remove mode conversion.
9931         (mask_gather_load<mode>): Rename to ...
9932         (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
9933         Remove mode conversion.
9934         * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
9935
9936 2020-02-21  Martin Jambor  <mjambor@suse.cz>
9937
9938         PR tree-optimization/93845
9939         * tree-sra.c (verify_sra_access_forest): Only test access size of
9940         scalar types.
9941
9942 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
9943
9944         * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
9945         * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
9946         (addv64di3_exec): Likewise.
9947         (subv64di3): Likewise.
9948         (subv64di3_exec): Likewise.
9949         (addv64di3_zext): Likewise.
9950         (addv64di3_zext_exec): Likewise.
9951         (addv64di3_zext_dup): Likewise.
9952         (addv64di3_zext_dup_exec): Likewise.
9953         (addv64di3_zext_dup2): Likewise.
9954         (addv64di3_zext_dup2_exec): Likewise.
9955         (addv64di3_sext_dup2): Likewise.
9956         (addv64di3_sext_dup2_exec): Likewise.
9957         (<expander>v64di3): Likewise.
9958         (<expander>v64di3_exec): Likewise.
9959         (*<reduc_op>_dpp_shr_v64di): Likewise.
9960         (*plus_carry_dpp_shr_v64di): Likewise.
9961         * config/gcn/gcn.md (adddi3): Likewise.
9962         (addptrdi3): Likewise.
9963         (<expander>di3): Likewise.
9964
9965 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
9966
9967         * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
9968
9969 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
9970
9971         * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
9972         support.  Use aarch64_emit_mult instead of emitting multiplication
9973         instructions directly.
9974         * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
9975         (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
9976
9977 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
9978
9979         * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
9980         (aarch64_emit_approx_div): Add SVE support.  Use aarch64_emit_mult
9981         instead of emitting multiplication instructions directly.
9982         * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
9983         * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
9984         (@aarch64_frecps<mode>): New expanders.
9985
9986 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
9987
9988         * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
9989         on and produce uint64_ts rather than ints.
9990         (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
9991         (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
9992
9993 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
9994
9995         * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
9996         an unused xmsk register when handling approximate rsqrt.
9997
9998 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
9999
10000         * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
10001         flag_finite_math_only condition.
10002
10003 2020-02-20  Uroš Bizjak  <ubizjak@gmail.com>
10004
10005         PR target/93828
10006         * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
10007         to destination operand for shufps alternative.
10008         (*vec_extractv2si_1): Ditto.
10009
10010 2020-02-20  Peter Bergner  <bergner@linux.ibm.com>
10011
10012         PR target/93658
10013         * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
10014         vector modes.
10015
10016 2020-02-20  Martin Liska  <mliska@suse.cz>
10017
10018         PR translation/93831
10019         * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
10020
10021 2020-02-20  Martin Liska  <mliska@suse.cz>
10022
10023         PR translation/93830
10024         * common/config/avr/avr-common.c: Remote trailing "|".
10025
10026 2020-02-19  Bernd Edlinger  <bernd.edlinger@hotmail.de>
10027
10028         * collect2.c (maybe_run_lto_and_relink): Fix typo in
10029         comment.
10030
10031 2020-02-19  Richard Sandiford  <richard.sandiford@arm.com>
10032
10033         PR tree-optimization/93767
10034         * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
10035         access-size bias from the offset calculations for negative strides.
10036
10037 2020-02-19  Bernd Edlinger  <bernd.edlinger@hotmail.de>
10038
10039         * collect2.c (c_file, o_file): Make const again.
10040         (ldout,lderrout, dump_ld_file): Remove.
10041         (tool_cleanup): Avoid calling not signal-safe functions.
10042         (maybe_run_lto_and_relink): Avoid possible signal handler
10043         access to unintialzed memory (lto_o_files).
10044         (main): Avoid leaking temp files in $TMPDIR.
10045         Initialize c_file/o_file with concat, which avoids exposing
10046         uninitialized memory to signal handler, which calls unlink(!).
10047         Avoid calling maybe_unlink when the main function returns,
10048         since the atexit handler is already doing this.
10049         * collect2.h (dump_ld_file, ldout, lderrout): Remove.
10050
10051 2020-02-19  Martin Jambor  <mjambor@suse.cz>
10052
10053         PR tree-optimization/93776
10054         * tree-sra.c (create_access): Do not create zero size accesses.
10055         (get_access_for_expr): Do not search for zero sized accesses.
10056
10057 2020-02-19  Martin Jambor  <mjambor@suse.cz>
10058
10059         PR tree-optimization/93667
10060         * tree-sra.c (scalarizable_type_p): Return false if record fields
10061         do not follow wach other.
10062
10063 2020-01-21  Kito Cheng  <kito.cheng@sifive.com>
10064
10065         * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
10066         rather than fmv.x.s/fmv.s.x.
10067
10068 2020-02-18  James Greenhalgh  <james.greenhalgh@arm.com>
10069
10070         * config/aarch64/aarch64-simd-builtins.def
10071         (intrinsic_vec_smult_lo_): New.
10072         (intrinsic_vec_umult_lo_): Likewise.
10073         (vec_widen_smult_hi_): Likewise.
10074         (vec_widen_umult_hi_): Likewise.
10075         * config/aarch64/aarch64-simd.md
10076         (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
10077         * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
10078         (vmull_high_s16): Likewise.
10079         (vmull_high_s32): Likewise.
10080         (vmull_high_u8): Likewise.
10081         (vmull_high_u16): Likewise.
10082         (vmull_high_u32): Likewise.
10083         (vmull_s8): Likewise.
10084         (vmull_s16): Likewise.
10085         (vmull_s32): Likewise.
10086         (vmull_u8): Likewise.
10087         (vmull_u16): Likewise.
10088         (vmull_u32): Likewise.
10089
10090 2020-02-18  Martin Liska  <mliska@suse.cz>
10091
10092         * value-prof.c (stream_out_histogram_value): Restore LTO PGO
10093         bootstrap by missing removal of invalid sanity check.
10094
10095 2020-02-18  Martin Liska  <mliska@suse.cz>
10096
10097         PR ipa/92518
10098         * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
10099         Always compare LHS of gimple_assign.
10100
10101 2020-02-18  Martin Liska  <mliska@suse.cz>
10102
10103         PR ipa/93583
10104         * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
10105         and return type of functions.
10106         * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
10107         Drop MALLOC attribute for void functions.
10108         * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
10109         malloc_state for a new VOID clone.
10110
10111 2020-02-18  Martin Liska  <mliska@suse.cz>
10112
10113         PR ipa/92924
10114         * common.opt: Add -fprofile-reproducibility.
10115         * doc/invoke.texi: Document it.
10116         * value-prof.c (dump_histogram_value):
10117         Document and support behavior for counters[0]
10118         being a negative value.
10119         (get_nth_most_common_value): Handle negative
10120         counters[0] in respect to flag_profile_reproducible.
10121
10122 2020-02-18  Jakub Jelinek  <jakub@redhat.com>
10123
10124         PR ipa/93797
10125         * cgraph.c (verify_speculative_call): Use speculative_id instead of
10126         speculative_uid in messages.  Remove trailing whitespace from error
10127         message.  Use num_speculative_call_targets instead of
10128         num_speculative_targets in a message.
10129         (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
10130         edge messages and stmt instead of cal_stmt in reference message.
10131
10132         PR tree-optimization/93780
10133         * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
10134         before calling build_vector_type.
10135         (execute_update_addresses_taken): Likewise.
10136
10137         PR driver/93796
10138         * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
10139         typo, functoin -> function.
10140         * tree.c (free_lang_data_in_decl): Fix comment typo,
10141         functoin -> function.
10142         * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
10143
10144 2020-02-17  David Malcolm  <dmalcolm@redhat.com>
10145
10146         * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
10147         won't be printed.
10148         (print_option_information): Don't call get_option_url if URLs
10149         won't be printed.
10150
10151 2020-02-17  Alexandre Oliva  <oliva@adacore.com>
10152
10153         * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
10154         handling of register_common-less targets.
10155
10156 2020-02-17  Martin Liska  <mliska@suse.cz>
10157
10158         PR ipa/93760
10159         * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
10160
10161 2020-02-17  Martin Liska  <mliska@suse.cz>
10162
10163         PR translation/93755
10164         * config/rs6000/rs6000.c (rs6000_option_override_internal):
10165         Fix double quotes.
10166
10167 2020-02-17  Martin Liska  <mliska@suse.cz>
10168
10169         PR other/93756
10170         * config/rx/elf.opt: Fix typo.
10171
10172 2020-02-17  Richard Biener  <rguenther@suse.de>
10173
10174         PR c/86134
10175         * opts-global.c (print_ignored_options): Use inform and
10176         amend message.
10177
10178 2020-02-17  Jiufu Guo  <guojiufu@linux.ibm.com>
10179
10180         PR target/93047
10181         * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
10182
10183 2020-02-16  Uroš Bizjak  <ubizjak@gmail.com>
10184
10185         PR target/93743
10186         * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
10187         (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
10188
10189 2020-02-15  Jason Merrill  <jason@redhat.com>
10190
10191         * doc/invoke.texi (C Dialect Options): Add -std=c++20.
10192
10193 2020-02-15  Jakub Jelinek  <jakub@redhat.com>
10194
10195         PR tree-optimization/93744
10196         * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
10197         A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
10198         A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
10199         sure @2 in the first and @1 in the other patterns has no side-effects.
10200
10201 2020-02-15  David Malcolm  <dmalcolm@redhat.com>
10202             Bernd Edlinger  <bernd.edlinger@hotmail.de>
10203
10204         PR 87488
10205         PR other/93168
10206         * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
10207         * configure.ac (--with-diagnostics-urls): New configuration
10208         option, based on --with-diagnostics-color.
10209         (DIAGNOSTICS_URLS_DEFAULT): New define.
10210         * config.h: Regenerate.
10211         * configure: Regenerate.
10212         * diagnostic.c (diagnostic_urls_init): Handle -1 for
10213         DIAGNOSTICS_URLS_DEFAULT from configure-time
10214         --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
10215         and TERM_URLS environment variable.
10216         * diagnostic-url.h (diagnostic_url_format): New enum type.
10217         (diagnostic_urls_enabled_p): rename to...
10218         (determine_url_format): ... this, and change return type.
10219         * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
10220         (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
10221         the linux console, and mingw.
10222         (diagnostic_urls_enabled_p): rename to...
10223         (determine_url_format): ... this, and adjust.
10224         * pretty-print.h (pretty_printer::show_urls): rename to...
10225         (pretty_printer::url_format): ... this, and change to enum.
10226         * pretty-print.c (pretty_printer::pretty_printer,
10227         pp_begin_url, pp_end_url, test_urls): Adjust.
10228         * doc/install.texi (--with-diagnostics-urls): Document the new
10229         configuration option.
10230         (--with-diagnostics-color): Document the existing interaction
10231         with GCC_COLORS better.
10232         * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
10233         vindex reference.  Update description of defaults based on the above.
10234         (-fdiagnostics-color): Update description of how -fdiagnostics-color
10235         interacts with GCC_COLORS.
10236
10237 2020-02-14  Eric Botcazou  <ebotcazou@adacore.com>
10238
10239         PR target/93704
10240         * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
10241         conjunction with TARGET_GNU_TLS in early return.
10242
10243 2020-02-14  Alexander Monakov  <amonakov@ispras.ru>
10244
10245         * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
10246         the mode is not wider than UNITS_PER_WORD.
10247
10248 2020-02-14  Martin Jambor  <mjambor@suse.cz>
10249
10250         PR tree-optimization/93516
10251         * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
10252         access of the same type as the parent.
10253         (propagate_subaccesses_from_lhs): Likewise.
10254
10255 2020-02-14 Hongtao Liu  <hongtao.liu@intel.com>
10256
10257         PR target/93724
10258         * config/i386/avx512vbmi2intrin.h
10259         (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
10260         _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
10261         _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
10262         _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
10263         _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
10264         _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
10265         _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
10266         _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
10267         _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
10268         of lacking a closing parenthesis.
10269         * config/i386/avx512vbmi2vlintrin.h
10270         (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
10271         _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
10272         _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
10273         _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
10274         _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
10275         _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
10276         _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
10277         _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
10278         _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
10279         _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
10280         _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
10281         _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
10282         _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
10283         _m_maskz_shrdi_epi64, _mm_shldi_epi16,
10284         _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
10285         _mm_shldi_epi32, _mm_mask_shldi_epi32,
10286         _mm_maskz_shldi_epi32, _mm_shldi_epi64,
10287         _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
10288
10289 2020-02-13  H.J. Lu  <hongjiu.lu@intel.com>
10290
10291         PR target/93656
10292         * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
10293         the target function entry.
10294
10295 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
10296
10297         * common/config/arc/arc-common.c (arc_option_optimization_table):
10298         Disable if-conversion step when optimized for size.
10299
10300 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
10301
10302         * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
10303         R12-R15 are always in ARCOMPACT16_REGS register class.
10304         * config/arc/arc.opt (mq-class): Deprecate.
10305         * config/arc/constraint.md ("q"): Remove dependency on mq-class
10306         option.
10307         * doc/invoke.texi (mq-class): Update text.
10308         * common/config/arc/arc-common.c (arc_option_optimization_table):
10309         Update list.
10310
10311 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
10312
10313         * config/arc/arc.c (arc_insn_cost): New function.
10314         (TARGET_INSN_COST): Define.
10315         * config/arc/arc.md (cost): New attribute.
10316         (add_n): Use arc_nonmemory_operand.
10317         (ashlsi3_insn): Likewise, also update constraints.
10318         (ashrsi3_insn): Likewise.
10319         (rotrsi3): Likewise.
10320         (add_shift): Likewise.
10321         * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
10322
10323 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
10324
10325         * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
10326         registers.
10327         (umulsidi_600): Likewise.
10328
10329 2020-02-13  Jakub Jelinek  <jakub@redhat.com>
10330
10331         PR target/93696
10332         * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
10333         _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
10334         _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
10335         _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
10336         pass __A to the builtin followed by __W instead of __A followed by
10337         __B.
10338         * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
10339         _mm512_mask_popcnt_epi64): Likewise.
10340         * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
10341         _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
10342         _mm256_mask_popcnt_epi64): Likewise.
10343
10344         PR tree-optimization/93582
10345         * fold-const.h (shift_bytes_in_array_left,
10346         shift_bytes_in_array_right): Declare.
10347         * fold-const.c (shift_bytes_in_array_left,
10348         shift_bytes_in_array_right): New function, moved from
10349         gimple-ssa-store-merging.c, no longer static.
10350         * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
10351         to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
10352         (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
10353         (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
10354         shift_bytes_in_array.
10355         (verify_shift_bytes_in_array): Rename to ...
10356         (verify_shift_bytes_in_array_left): ... this.  Use
10357         shift_bytes_in_array_left instead of shift_bytes_in_array.
10358         (store_merging_c_tests): Call verify_shift_bytes_in_array_left
10359         instead of verify_shift_bytes_in_array.
10360         * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
10361         / native_interpret_expr where the store covers all needed bits,
10362         punt on PDP-endian, otherwise allow all involved offsets and sizes
10363         not to be byte-aligned.
10364
10365         PR target/93673
10366         * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
10367         use const_0_to_255_operand predicate instead of immediate_operand.
10368         (avx512dq_fpclass<mode><mask_scalar_merge_name>,
10369         avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
10370         vgf2p8affineinvqb_<mode><mask_name>,
10371         vgf2p8affineqb_<mode><mask_name>): Drop mode from
10372         const_0_to_255_operand predicated operands.
10373
10374 2020-02-12  Jeff Law  <law@redhat.com>
10375
10376         * config/h8300/h8300.md (comparison shortening peepholes): Use
10377         a mode iterator to merge the HImode and SImode peepholes.
10378
10379 2020-02-12  Jakub Jelinek  <jakub@redhat.com>
10380
10381         PR middle-end/93663
10382         * real.c (is_even): Make static.  Function comment fix.
10383         (is_halfway_below): Make static, don't assert R is not inf/nan,
10384         instead return false for those.  Small formatting fixes.
10385
10386 2020-02-12  Martin Sebor  <msebor@redhat.com>
10387
10388         PR middle-end/93646
10389         * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
10390         (handle_builtin_stxncpy_strncat): ...to this.  Change first argument.
10391         Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
10392         (strlen_check_and_optimize_call): Adjust callee name.
10393
10394 2020-02-12  Jeff Law  <law@redhat.com>
10395
10396         * config/h8300/h8300.md (comparison shortening peepholes): Drop
10397         (and (xor)) variant.  Combine other two into single peephole.
10398
10399 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
10400
10401         PR rtl-optimization/93565
10402         * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
10403
10404 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
10405
10406         * config/aarch64/aarch64-simd.md
10407         (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
10408         * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
10409         generating separate ADDV and zero_extend patterns.
10410         * config/aarch64/iterators.md (VDQV_E): New iterator.
10411
10412 2020-02-12  Jeff Law  <law@redhat.com>
10413
10414         * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
10415         expanders, splits, etc.
10416         (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
10417         (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
10418         (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
10419         * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
10420         (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
10421         * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
10422         function prototype.
10423         (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
10424
10425 2020-02-12  Jakub Jelinek  <jakub@redhat.com>
10426
10427         PR target/93670
10428         * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
10429         (avx512vl_vextractf128<mode>): Use it instead of VI48F_256.  Remove
10430         TARGET_AVX512DQ from condition.
10431         (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
10432         instead of <mask_mode512bit_condition> in condition.  If
10433         TARGET_AVX512DQ is false, emit vextract*64x4 instead of
10434         vextract*32x8.
10435         (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
10436         from condition.
10437
10438 2020-02-12  Kewen Lin  <linkw@gcc.gnu.org>
10439
10440         PR target/91052
10441         * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
10442
10443 2020-02-12  Segher Boessenkool  <segher@kernel.crashing.org>
10444
10445         * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
10446         where strlen is more legible.
10447         (rs6000_builtin_vectorized_libmass): Ditto.
10448         (rs6000_print_options_internal): Ditto.
10449
10450 2020-02-11  Martin Sebor  <msebor@redhat.com>
10451
10452         PR tree-optimization/93683
10453         * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
10454
10455 2020-02-11  Michael Meissner  <meissner@linux.ibm.com>
10456
10457         * config/rs6000/predicates.md (cint34_operand): Rename the
10458         -mprefixed-addr option to be -mprefixed.
10459         * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
10460         the -mprefixed-addr option to be -mprefixed.
10461         (OTHER_FUTURE_MASKS): Likewise.
10462         (POWERPC_MASKS): Likewise.
10463         * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
10464         the -mprefixed-addr option to be -mprefixed.  Change error
10465         messages to refer to -mprefixed.
10466         (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
10467         -mprefixed.
10468         (rs6000_legitimate_offset_address_p): Likewise.
10469         (rs6000_mode_dependent_address): Likewise.
10470         (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
10471         "-mprefixed" for target attributes and pragmas.
10472         (address_to_insn_form): Rename the -mprefixed-addr option to be
10473         -mprefixed.
10474         (rs6000_adjust_insn_length): Likewise.
10475         * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
10476         -mprefixed-addr option to be -mprefixed.
10477         (ASM_OUTPUT_OPCODE): Likewise.
10478         * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
10479         -mprefixed-addr option to be -mprefixed.
10480         * config/rs6000/rs6000.opt (-mprefixed): Rename the
10481         -mprefixed-addr option to be prefixed.  Change the option from
10482         being undocumented to being documented.
10483         * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
10484         -mprefixed option.  Update the -mpcrel documentation to mention
10485         -mprefixed.
10486
10487 2020-02-11  Hans-Peter Nilsson  <hp@axis.com>
10488
10489         * ira-conflicts.c (print_hard_reg_set): Correct output for sets
10490         including FIRST_PSEUDO_REGISTER - 1.
10491         * ira-color.c (print_hard_reg_set): Ditto.
10492
10493 2020-02-11  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
10494
10495         * config/arm/arm-builtins.c (enum arm_type_qualifiers):
10496         (USTERNOP_QUALIFIERS): New define.
10497         (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
10498         (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
10499         (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
10500         (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
10501         * config/arm/arm_neon.h (vusdot_s32): New.
10502         (vusdot_lane_s32): New.
10503         (vusdotq_lane_s32): New.
10504         (vsudot_lane_s32): New.
10505         (vsudotq_lane_s32): New.
10506         * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
10507         * config/arm/iterators.md (DOTPROD_I8MM): New.
10508         (sup, opsuffix): Add <us/su>.
10509         * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
10510         * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
10511
10512 2020-02-11  Richard Biener  <rguenther@suse.de>
10513
10514         PR tree-optimization/93661
10515         PR tree-optimization/93662
10516         * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
10517         tree_to_poly_int64.
10518         * tree-sra.c (get_access_for_expr): Likewise.
10519
10520 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
10521
10522         PR target/93637
10523         * config/i386/sse.md (VI_256_AVX2): New mode iterator.
10524         (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
10525         Change condition from TARGET_AVX2 to TARGET_AVX.
10526
10527 2020-02-10  Iain Sandoe  <iain@sandoe.co.uk>
10528
10529         PR other/93641
10530         * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
10531         argument of strncmp.
10532
10533 2020-02-10  Hans-Peter Nilsson  <hp@axis.com>
10534
10535         Try to generate zero-based comparisons.
10536         * config/cris/cris.c (cris_reduce_compare): New function.
10537         * config/cris/cris-protos.h  (cris_reduce_compare): Add prototype.
10538         * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
10539         (cstore<mode>4"): Apply cris_reduce_compare in expanders.
10540
10541 2020-02-10  Richard Earnshaw  <rearnsha@arm.com>
10542
10543         PR target/91913
10544         * config/arm/arm.md (movsi_compare0): Allow SP as a source register
10545         in Thumb state and also as a destination in Arm state.  Add T16
10546         variants.
10547
10548 2020-02-10  Hans-Peter Nilsson  <hp@axis.com>
10549
10550         * md.texi (Define Subst): Match closing paren in example.
10551
10552 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
10553
10554         PR target/58218
10555         PR other/93641
10556         * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
10557         arguments of strncmp.
10558
10559 2020-02-10  Feng Xue  <fxue@os.amperecomputing.com>
10560
10561         PR ipa/93203
10562         * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
10563         but different source value.
10564         (adjust_callers_for_value_intersection): New function.
10565         (gather_edges_for_value): Adjust order of callers to let a
10566         non-self-recursive caller be the first element.
10567         (self_recursive_pass_through_p): Add a new parameter "simple", and
10568         check generalized self-recursive pass-through jump function.
10569         (self_recursive_agg_pass_through_p): Likewise.
10570         (find_more_scalar_values_for_callers_subset): Compute value from
10571         pass-through jump function for self-recursive.
10572         (intersect_with_plats): Cleanup previous implementation code for value
10573         itersection with self-recursive call edge.
10574         (intersect_with_agg_replacements): Likewise.
10575         (intersect_aggregates_with_edge): Deduce value from pass-through jump
10576         function for self-recursive call edge.  Cleanup previous implementation
10577         code for value intersection with self-recursive call edge.
10578         (decide_whether_version_node): Remove dead callers and adjust order
10579         to let a non-self-recursive caller be the first element.
10580
10581 2020-02-09  Uroš Bizjak  <ubizjak@gmail.com>
10582
10583         * recog.c: Move pass_split_before_sched2 code in front of
10584         pass_split_before_regstack.
10585         (pass_data_split_before_sched2): Rename pass to split3 from split4.
10586         (pass_data_split_before_regstack): Rename pass to split4 from split3.
10587         (rest_of_handle_split_before_sched2): Remove.
10588         (pass_split_before_sched2::execute): Unconditionally call
10589         split_all_insns.
10590         (enable_split_before_sched2): New function.
10591         (pass_split_before_sched2::gate): Use enable_split_before_sched2.
10592         (pass_split_before_regstack::gate): Ditto.
10593         * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
10594         Update name check for renamed split4 pass.
10595         * config/sh/sh.c (register_sh_passes): Update pass insertion
10596         point for renamed split4 pass.
10597
10598 2020-02-09  Jakub Jelinek  <jakub@redhat.com>
10599
10600         * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
10601         DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
10602         copying them around between host and target.
10603
10604 2020-02-08  Andrew Pinski  <apinski@marvell.com>
10605
10606         PR target/91927
10607         * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
10608         STRICT_ALIGNMENT also.
10609
10610 2020-02-08  Jim Wilson  <jimw@sifive.com>
10611
10612         PR target/93532
10613         * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
10614
10615 2020-02-08  Uroš Bizjak  <ubizjak@gmail.com>
10616             Jakub Jelinek  <jakub@redhat.com>
10617
10618         PR target/65782
10619         * config/i386/i386.h (CALL_USED_REGISTERS): Make
10620         xmm16-xmm31 call-used even in 64-bit ms-abi.
10621
10622 2020-02-07  Dennis Zhang  <dennis.zhang@arm.com>
10623
10624         * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
10625         (simd_ummla, simd_usmmla): Likewise.
10626         * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
10627         * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
10628         (vusmmlaq_s32): New.
10629
10630 2020-02-07  Richard Biener  <rguenther@suse.de>
10631
10632         PR middle-end/93519
10633         * tree-inline.c (fold_marked_statements): Do a PRE walk,
10634         skipping unreachable regions.
10635         (optimize_inline_calls): Skip folding stmts when we didn't
10636         inline.
10637
10638 2020-02-07  H.J. Lu  <hongjiu.lu@intel.com>
10639
10640         PR target/85667
10641         * config/i386/i386.c (function_arg_ms_64): Add a type argument.
10642         Don't return aggregates with only SFmode and DFmode in SSE
10643         register.
10644         (ix86_function_arg): Pass arg.type to function_arg_ms_64.
10645
10646 2020-02-07  Jakub Jelinek  <jakub@redhat.com>
10647
10648         PR target/93122
10649         * config/rs6000/rs6000-logue.c
10650         (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
10651         if it fails, move rs into end_addr and retry.  Add
10652         REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
10653         the insn pattern doesn't describe well what exactly happens to
10654         dwarf2cfi.c.
10655
10656         PR target/93594
10657         * config/i386/predicates.md (avx_identity_operand): Remove.
10658         * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
10659         (avx_<castmode><avxsizesuffix>_<castmode>,
10660         avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
10661         a VEC_CONCAT of the operand and UNSPEC_CAST.
10662         (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
10663         a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
10664         UNSPEC_CAST.
10665
10666         PR target/93611
10667         * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
10668         recog_data.insn if distance_non_agu_define changed it.
10669
10670 2020-02-06  Michael Meissner  <meissner@linux.ibm.com>
10671
10672         PR target/93569
10673         * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
10674         we only had X-FORM (reg+reg) addressing for vectors.  Also before
10675         ISA 3.0, we only had X-FORM addressing for scalars in the
10676         traditional Altivec registers.
10677
10678 2020-02-06  <zhongyunde@huawei.com>
10679             Vladimir Makarov  <vmakarov@redhat.com>
10680
10681         PR rtl-optimization/93561
10682         * lra-assigns.c (spill_for): Check that tested hard regno is not out of
10683         hard register range.
10684
10685 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
10686
10687         * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
10688         attribute.
10689
10690 2020-02-06  Segher Boessenkool  <segher@kernel.crashing.org>
10691
10692         * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
10693         where the low and the high 32 bits are equal to each other specially,
10694         with an rldimi instruction.
10695
10696 2020-02-06  Mihail Ionescu  <mihail.ionescu@arm.com>
10697
10698         * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
10699
10700 2020-02-06  Mihail Ionescu  <mihail.ionescu@arm.com>
10701
10702         * config/arm/arm-tables.opt: Regenerate.
10703
10704 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
10705
10706         PR target/87763
10707         * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
10708         * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
10709         * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
10710
10711 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
10712
10713         PR rtl-optimization/87763
10714         * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
10715
10716 2020-02-06  Delia Burduv  <delia.burduv@arm.com>
10717
10718         * config/aarch64/aarch64-simd-builtins.def
10719         (bfmlaq): New built-in function.
10720         (bfmlalb): New built-in function.
10721         (bfmlalt): New built-in function.
10722         (bfmlalb_lane): New built-in function.
10723         (bfmlalt_lane): New built-in function.
10724         * config/aarch64/aarch64-simd.md
10725         (aarch64_bfmmlaqv4sf): New pattern.
10726         (aarch64_bfmlal<bt>v4sf): New pattern.
10727         (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
10728         * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
10729         (vbfmlalbq_f32): New intrinsic.
10730         (vbfmlaltq_f32): New intrinsic.
10731         (vbfmlalbq_lane_f32): New intrinsic.
10732         (vbfmlaltq_lane_f32): New intrinsic.
10733         (vbfmlalbq_laneq_f32): New intrinsic.
10734         (vbfmlaltq_laneq_f32): New intrinsic.
10735         * config/aarch64/iterators.md (BF_MLA): New int iterator.
10736         (bt): New int attribute.
10737
10738 2020-02-06  Uroš Bizjak  <ubizjak@gmail.com>
10739
10740         * config/i386/i386.md (*pushtf): Emit "#" instead of
10741         calling gcc_unreachable in insn output.
10742         (*pushxf): Ditto.
10743         (*pushdf): Ditto.
10744         (*pushsf_rex64): Ditto for alternatives other than 1.
10745         (*pushsf): Ditto for alternatives other than 1.
10746
10747 2020-02-06  Martin Liska  <mliska@suse.cz>
10748
10749         PR gcov-profile/91971
10750         PR gcov-profile/93466
10751         * coverage.c (coverage_init): Revert mangling of
10752         path into filename.  It can lead to huge filename length.
10753         Creation of subfolders seem more natural.
10754
10755 2020-02-06  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
10756
10757         PR target/93300
10758         * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
10759         (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
10760         Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
10761
10762 2020-02-06  Jakub Jelinek  <jakub@redhat.com>
10763
10764         PR target/93594
10765         * config/i386/predicates.md (avx_identity_operand): New predicate.
10766         * config/i386/sse.md (*avx_vec_concat<mode>_1): New
10767         define_insn_and_split.
10768
10769         PR libgomp/93515
10770         * omp-low.c (use_pointer_for_field): For nested constructs, also
10771         look for map clauses on target construct.
10772         (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
10773         taskreg_nesting_level.
10774
10775         PR libgomp/93515
10776         * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
10777         shared clause, call omp_notice_variable on outer context if any.
10778
10779 2020-02-05  Jason Merrill  <jason@redhat.com>
10780
10781         PR c++/92003
10782         * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
10783         non-zero address even if weak and not yet defined.
10784
10785 2020-02-05  Martin Sebor  <msebor@redhat.com>
10786
10787         PR tree-optimization/92765
10788         * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
10789         * tree-ssa-strlen.c (compute_string_length): Remove.
10790         (determine_min_objsize): Remove.
10791         (get_len_or_size): Add an argument.  Call get_range_strlen_dynamic.
10792         Avoid using type size as the upper bound on string length.
10793         (handle_builtin_string_cmp): Add an argument.  Adjust.
10794         (strlen_check_and_optimize_call): Pass additional argument to
10795         handle_builtin_string_cmp.
10796
10797 2020-02-05  Uroš Bizjak  <ubizjak@gmail.com>
10798
10799         * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
10800         (*pushdi2_rex64 peephole2): Unconditionally split after
10801         epilogue_completed.
10802         (*ashl<mode>3_doubleword): Ditto.
10803         (*<shift_insn><mode>3_doubleword): Ditto.
10804
10805 2020-02-05  Michael Meissner  <meissner@linux.ibm.com>
10806
10807         PR target/93568
10808         * config/rs6000/rs6000.c (get_vector_offset): Fix
10809
10810 2020-02-05  Andrew Stubbs  <ams@codesourcery.com>
10811
10812         * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
10813
10814 2020-02-05  David Malcolm  <dmalcolm@redhat.com>
10815
10816         * doc/analyzer.texi
10817         (Special Functions for Debugging the Analyzer): Update description
10818         of __analyzer_dump_exploded_nodes.
10819
10820 2020-02-05  Jakub Jelinek  <jakub@redhat.com>
10821
10822         PR target/92190
10823         * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
10824         include sets and not clobbers in the vzeroupper pattern.
10825         * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
10826         the parallel has 17 (64-bit) or 9 (32-bit) elts.
10827         (*avx_vzeroupper_1): New define_insn_and_split.
10828
10829         PR target/92190
10830         * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
10831         don't run when !optimize.
10832         (pass_split_before_regstack::gate): For STACK_REGS targets, run even
10833         when !optimize.
10834
10835 2020-02-05  Richard Biener  <rguenther@suse.de>
10836
10837         PR middle-end/90648
10838         * genmatch.c (dt_node::gen_kids_1): Emit number of argument
10839         checks before matching calls.
10840
10841 2020-02-05  Jakub Jelinek  <jakub@redhat.com>
10842
10843         * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
10844         function comment typo.
10845
10846         PR middle-end/93555
10847         * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
10848         simd_clone_create failed when i == 0, adjust clone->nargs by
10849         clone->inbranch.
10850
10851 2020-02-05  Martin Liska  <mliska@suse.cz>
10852
10853         PR c++/92717
10854         * doc/invoke.texi: Document that one should
10855         not combine ASLR and -fpch.
10856
10857 2020-02-04  Richard Biener  <rguenther@suse.de>
10858
10859         PR tree-optimization/93538
10860         * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
10861
10862 2020-02-04  Richard Biener  <rguenther@suse.de>
10863
10864         PR tree-optimization/91123
10865         * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
10866         (vn_walk_cb_data::last_vuse): New member.
10867         (vn_walk_cb_data::saved_operands): Likewsie.
10868         (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
10869         (vn_walk_cb_data::push_partial_def): Use finish.
10870         (vn_reference_lookup_2): Update last_vuse and use finish if
10871         we've saved operands.
10872         (vn_reference_lookup_3): Use finish and update calls to
10873         push_partial_defs everywhere.  When translating through
10874         memcpy or aggregate copies save off operands and alias-set.
10875         (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
10876         operation for redundant store removal.
10877
10878 2020-02-04  Richard Biener  <rguenther@suse.de>
10879
10880         PR tree-optimization/92819
10881         * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
10882         generating more stmts than before.
10883
10884 2020-02-04  Martin Liska  <mliska@suse.cz>
10885
10886         * config/arm/arm.c (arm_gen_far_branch): Move the function
10887         outside of selftests.
10888
10889 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
10890
10891         * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
10892         function to adjust PC-relative vector addresses.
10893         (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
10894         handle vectors with PC-relative addresses.
10895
10896 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
10897
10898         * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
10899         reference.
10900         (hard_reg_and_mode_to_addr_mask): Delete.
10901         (rs6000_adjust_vec_address): If the original vector address
10902         was REG+REG or REG+OFFSET and the element is not zero, do the add
10903         of the elements in the original address before adding the offset
10904         for the vector element.  Use address_to_insn_form to validate the
10905         address using the register being loaded, rather than guessing
10906         whether the address is a DS-FORM or DQ-FORM address.
10907
10908 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
10909
10910         * config/rs6000/rs6000.c (get_vector_offset): New helper function
10911         to calculate the offset in memory from the start of a vector of a
10912         particular element.  Add code to keep the element number in
10913         bounds if the element number is variable.
10914         (rs6000_adjust_vec_address): Move calculation of offset of the
10915         vector element to get_vector_offset.
10916         (rs6000_split_vec_extract_var): Do not do the initial AND of
10917         element here, move the code to get_vector_offset.
10918
10919 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
10920
10921         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
10922         gcc_asserts.
10923
10924 2020-02-03  Segher Boessenkool  <segher@kernel.crashing.org>
10925
10926         * config/rs6000/constraints.md: Improve documentation.
10927
10928 2020-02-03  Richard Earnshaw  <rearnsha@arm.com>
10929
10930         PR target/93548
10931         * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
10932         ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
10933
10934 2020-02-03  Andrew Stubbs  <ams@codesourcery.com>
10935
10936         * config.gcc: Remove "carrizo" support.
10937         * config/gcn/gcn-opts.h (processor_type): Likewise.
10938         * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
10939         * config/gcn/gcn.opt (gpu_type): Likewise.
10940         * config/gcn/t-omp-device: Likewise.
10941
10942 2020-02-03  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
10943
10944         PR target/91816
10945         * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
10946         * config/arm/arm.c (arm_gen_far_branch): New function
10947         arm_gen_far_branch.
10948         * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
10949
10950 2020-02-03  Julian Brown  <julian@codesourcery.com>
10951             Tobias Burnus  <tobias@codesourcery.com>
10952
10953         * doc/invoke.texi: Update mention of OpenACC version to 2.6.
10954
10955 2020-02-03  Jakub Jelinek  <jakub@redhat.com>
10956
10957         PR target/93533
10958         * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
10959         valid RTL to sum up the lowest and second lowest bytes of the popcnt
10960         result.
10961
10962 2020-02-02  Vladimir Makarov  <vmakarov@redhat.com>
10963
10964         PR rtl-optimization/91333
10965         * ira-color.c (struct allocno_color_data): Add member
10966         hard_reg_prefs.
10967         (init_allocno_threads): Set the member up.
10968         (bucket_allocno_compare_func): Add compare hard reg
10969         prefs.
10970
10971 2020-01-31  Sandra Loosemore  <sandra@codesourcery.com>
10972
10973         nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
10974
10975         * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
10976         * config.in: Regenerated.
10977         * configure: Regenerated.
10978         * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
10979         for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
10980         (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
10981
10982 2020-02-01  Andrew Burgess  <andrew.burgess@embecosm.com>
10983
10984         * configure: Regenerate.
10985
10986 2020-01-31  Vladimir Makarov  <vmakarov@redhat.com>
10987
10988         PR rtl-optimization/91333
10989         * ira-color.c (bucket_allocno_compare_func): Move conflict hard
10990         reg preferences comparison up.
10991
10992 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
10993
10994         * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
10995         * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
10996         aarch64-sve-builtins-base.h.
10997         * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
10998         aarch64-sve-builtins-base.cc.
10999         * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
11000         (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
11001         (svcvtnt): Declare.
11002         * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
11003         (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
11004         (svcvtnt): New functions.
11005         * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
11006         (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
11007         (svcvtnt): New functions.
11008         (svcvt): Add a form that converts f32 to bf16.
11009         * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
11010         (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
11011         Declare.
11012         * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
11013         Treat B as bfloat16_t.
11014         (ternary_bfloat_lane_base): New class.
11015         (ternary_bfloat_def): Likewise.
11016         (ternary_bfloat): New shape.
11017         (ternary_bfloat_lane_def): New class.
11018         (ternary_bfloat_lane): New shape.
11019         (ternary_bfloat_lanex2_def): New class.
11020         (ternary_bfloat_lanex2): New shape.
11021         (ternary_bfloat_opt_n_def): New class.
11022         (ternary_bfloat_opt_n): New shape.
11023         * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
11024         * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
11025         (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
11026         (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
11027         (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
11028         (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
11029         (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
11030         * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
11031         the pattern off the narrow mode instead of the wider one.
11032         * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
11033         (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
11034         (sve_fp_op): Handle them.
11035         (SVE_BFLOAT_TERNARY_LONG): New int itertor.
11036         (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
11037
11038 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
11039
11040         * config/aarch64/arm_sve.h: Include arm_bf16.h.
11041         * config/aarch64/aarch64-modes.def (BF): Move definition before
11042         VECTOR_MODES.  Remove separate VECTOR_MODES for V4BF and V8BF.
11043         (SVE_MODES): Handle BF modes.
11044         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
11045         BF modes.
11046         (aarch64_full_sve_mode): Likewise.
11047         * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
11048         and VNx32BF.
11049         (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
11050         (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
11051         (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
11052         (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
11053         new SVE BF modes.
11054         * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
11055         type_class_index.
11056         * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
11057         (TYPES_all_data): Add bf16.
11058         (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
11059         (register_tuple_type): Increase buffer size.
11060         * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
11061         (bf16): New type suffix.
11062         * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
11063         (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
11064         (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
11065         Change type from all_data to all_arith.
11066         * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
11067         (svminp): Likewise.
11068
11069 2020-01-31  Dennis Zhang  <dennis.zhang@arm.com>
11070             Matthew Malcomson  <matthew.malcomson@arm.com>
11071             Richard Sandiford  <richard.sandiford@arm.com>
11072
11073         * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
11074         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
11075         __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
11076         __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate.  Don't define
11077         __ARM_FEATURE_MATMUL_FP64.
11078         * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
11079         (sve): Add AARCH64_FL_F32MM to the list of extensions that should
11080         be disabled at the same time.
11081         (f32mm): New extension.
11082         * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
11083         (AARCH64_FL_F64MM): Bump to the next bit up.
11084         (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
11085         (TARGET_SVE_F64MM): New macros.
11086         * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
11087         (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
11088         (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
11089         (UNSPEC_ZIP2Q): New unspeccs.
11090         (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
11091         (optab, sur, perm_insn): Handle the new unspecs.
11092         (sve_fp_op): Handle UNSPEC_FMMLA.  Resort.
11093         * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
11094         TARGET_SVE_F64MM instead of separate tests.
11095         (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
11096         (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
11097         (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
11098         (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
11099         (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
11100         * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
11101         (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
11102         (TYPES_s_signed): New macro.
11103         (TYPES_s_integer): Use it.
11104         (TYPES_d_float): New macro.
11105         (TYPES_d_data): Use it.
11106         * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
11107         (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
11108         (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
11109         * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
11110         (svmmla): New shape.
11111         (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
11112         template parameters.
11113         (ternary_resize2_lane_base): Likewise.
11114         (ternary_resize2_base): New class.
11115         (ternary_qq_lane_base): Likewise.
11116         (ternary_intq_uintq_lane_def): Likewise.
11117         (ternary_intq_uintq_lane): New shape.
11118         (ternary_intq_uintq_opt_n_def): New class
11119         (ternary_intq_uintq_opt_n): New shape.
11120         (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
11121         (ternary_uintq_intq_def): New class.
11122         (ternary_uintq_intq): New shape.
11123         (ternary_uintq_intq_lane_def): New class.
11124         (ternary_uintq_intq_lane): New shape.
11125         (ternary_uintq_intq_opt_n_def): New class.
11126         (ternary_uintq_intq_opt_n): New shape.
11127         * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
11128         (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
11129         (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
11130         * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
11131         Generalize to...
11132         (svdotprod_lane_impl): ...this new class.
11133         (svmmla_impl, svusdot_impl): New classes.
11134         (svdot_lane): Update to use svdotprod_lane_impl.
11135         (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
11136         (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
11137         functions.
11138         * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
11139         function, with no types defined.
11140         (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
11141         AARCH64_FL_I8MM functions.
11142         (svmmla): New AARCH64_FL_F32MM function.
11143         (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
11144         (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
11145         AARCH64_FL_F64MM function.
11146         (REQUIRED_EXTENSIONS):
11147
11148 2020-01-31  Andrew Stubbs  <ams@codesourcery.com>
11149
11150         * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
11151         alternative only.
11152
11153 2020-01-31  Uroš Bizjak  <ubizjak@gmail.com>
11154
11155         * config/i386/i386.md (*movoi_internal_avx): Do not check for
11156         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.  Remove MODE_V8SF handling.
11157         (*movti_internal): Do not check for
11158         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
11159         (*movtf_internal): Move check for TARGET_SSE2 and size optimization
11160         just after check for TARGET_AVX.
11161         (*movdf_internal): Ditto.
11162         * config/i386/mmx.md (*mov<mode>_internal): Do not check for
11163         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
11164         * config/i386/sse.md (mov<mode>_internal): Only check
11165         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode.  Move check
11166         for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
11167         (<sse>_andnot<mode>3<mask_name>): Move check for
11168         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
11169         (<code><mode>3<mask_name>): Ditto.
11170         (*andnot<mode>3): Ditto.
11171         (*andnottf3): Ditto.
11172         (*<code><mode>3): Ditto.
11173         (*<code>tf3): Ditto.
11174         (*andnot<VI:mode>3): Remove
11175         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
11176         (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
11177         (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
11178         (sse4_1_blendv<ssemodesuffix>): Ditto.
11179         * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
11180         Explain that tune applies to 128bit instructions only.
11181
11182 2020-01-31  Kwok Cheung Yeung  <kcy@codesourcery.com>
11183
11184         * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
11185         to definition of hsa_kernel_description.  Parse assembly to find SGPR
11186         and VGPR count of kernel and store in hsa_kernel_description.
11187
11188 2020-01-31  Tamar Christina  <tamar.christina@arm.com>
11189
11190         PR rtl-optimization/91838
11191         * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
11192         to truncate if allowed or reject combination.
11193
11194 2020-01-31  Andrew Stubbs  <ams@codesourcery.com>
11195
11196         * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
11197         (find_inv_vars_cb): Likewise.
11198
11199 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
11200
11201         * calls.c (special_function_p): Split out the check for DECL_NAME
11202         being non-NULL and fndecl being extern at file scope into a
11203         new maybe_special_function_p and call it.  Drop check for fndecl
11204         being non-NULL that was after a usage of DECL_NAME (fndecl).
11205         * tree.h (maybe_special_function_p): New inline function.
11206
11207 2020-01-30  Andrew Stubbs  <ams@codesourcery.com>
11208
11209         * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
11210         (mask_gather_load<mode>): ... here, and zero-initialize the
11211         destination.
11212         (maskload<mode>di): Zero-initialize the destination.
11213         * config/gcn/gcn.c:
11214
11215 2020-01-30  David Malcolm  <dmalcolm@redhat.com>
11216
11217         PR analyzer/93356
11218         * doc/analyzer.texi (Limitations): Note that constraints on
11219         floating-point values are currently ignored.
11220
11221 2020-01-30  Jakub Jelinek  <jakub@redhat.com>
11222
11223         PR lto/93384
11224         * symtab.c (symtab_node::noninterposable_alias): If localalias
11225         already exists, but is not usable, append numbers after it until
11226         a unique name is found.  Formatting fix.
11227
11228         PR middle-end/93505
11229         * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
11230         rotate counts.
11231
11232 2020-01-30  Andrew Stubbs  <ams@codesourcery.com>
11233
11234         * config/gcn/gcn.c (print_operand): Handle LTGT.
11235         * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
11236
11237 2020-01-30  Richard Biener  <rguenther@suse.de>
11238
11239         * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
11240         and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
11241
11242 2020-01-30  John David Anglin  <danglin@gcc.gnu.org>
11243
11244         * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
11245         without a DECL in .data.rel.ro.local.
11246
11247 2020-01-30  Jakub Jelinek  <jakub@redhat.com>
11248
11249         PR target/93494
11250         * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
11251         returned.
11252
11253         PR target/91824
11254         * config/i386/sse.md
11255         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
11256         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this.  Use
11257         any_extend code iterator instead of always zero_extend.
11258         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
11259         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
11260         Use any_extend code iterator instead of always zero_extend.
11261         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
11262         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
11263         Use any_extend code iterator instead of always zero_extend.
11264         (*sse2_pmovmskb_ext): New define_insn.
11265         (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
11266
11267         PR target/91824
11268         * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
11269         (*popcountsi2_zext_falsedep): New define_insn.
11270
11271 2020-01-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
11272
11273         * config.in: Regenerated.
11274         * configure: Regenerated.
11275
11276 2020-01-29  Tobias Burnus  <tobias@codesourcery.com>
11277
11278         PR bootstrap/93409
11279         * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
11280         LLVM's assembler changed the default in version 9.
11281
11282 2020-01-24  Jeff Law  <law@redhat.com>
11283
11284         PR tree-optimization/89689
11285         * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
11286
11287 2020-01-29  Richard Sandiford  <richard.sandiford@arm.com>
11288
11289         Revert:
11290
11291         2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
11292
11293         PR rtl-optimization/87763
11294         * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
11295         simplification to handle subregs as well as bare regs.
11296         * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
11297
11298 2020-01-29  Joel Hutton  <Joel.Hutton@arm.com>
11299
11300         PR target/93221
11301         * ira.c (ira): Revert use of simplified LRA algorithm.
11302
11303 2020-01-29  Martin Jambor  <mjambor@suse.cz>
11304
11305         PR tree-optimization/92706
11306         * tree-sra.c (struct access): Fields first_link, last_link,
11307         next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
11308         next_rhs_queued and grp_rhs_queued respectively, new fields
11309         first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
11310         (struct assign_link): Field next renamed to next_rhs, new field
11311         next_lhs.  Updated comment.
11312         (work_queue_head): Renamed to rhs_work_queue_head.
11313         (lhs_work_queue_head): New variable.
11314         (add_link_to_lhs): New function.
11315         (relink_to_new_repr): Also relink LHS lists.
11316         (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
11317         (add_access_to_lhs_work_queue): New function.
11318         (pop_access_from_work_queue): Renamed to
11319         pop_access_from_rhs_work_queue.
11320         (pop_access_from_lhs_work_queue): New function.
11321         (build_accesses_from_assign): Also add links to LHS lists and to LHS
11322         work_queue.
11323         (child_would_conflict_in_lacc): Renamed to
11324         child_would_conflict_in_acc.  Adjusted parameter names.
11325         (create_artificial_child_access): New parameter set_grp_read, use it.
11326         (subtree_mark_written_and_enqueue): Renamed to
11327         subtree_mark_written_and_rhs_enqueue.
11328         (propagate_subaccesses_across_link): Renamed to
11329         propagate_subaccesses_from_rhs.
11330         (propagate_subaccesses_from_lhs): New function.
11331         (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
11332         RHSs.
11333
11334 2020-01-29  Martin Jambor  <mjambor@suse.cz>
11335
11336         PR tree-optimization/92706
11337         * tree-sra.c (struct access): Adjust comment of
11338         grp_total_scalarization.
11339         (find_access_in_subtree): Look for single children spanning an entire
11340         access.
11341         (scalarizable_type_p): Allow register accesses, adjust callers.
11342         (completely_scalarize): Remove function.
11343         (scalarize_elem): Likewise.
11344         (create_total_scalarization_access): Likewise.
11345         (sort_and_splice_var_accesses): Do not track total scalarization
11346         flags.
11347         (analyze_access_subtree): New parameter totally, adjust to new meaning
11348         of grp_total_scalarization.
11349         (analyze_access_trees): Pass new parameter to analyze_access_subtree.
11350         (can_totally_scalarize_forest_p): New function.
11351         (create_total_scalarization_access): Likewise.
11352         (create_total_access_and_reshape): Likewise.
11353         (total_should_skip_creating_access): Likewise.
11354         (totally_scalarize_subtree): Likewise.
11355         (analyze_all_variable_accesses): Perform total scalarization after
11356         subaccess propagation using the new functions above.
11357         (initialize_constant_pool_replacements): Output initializers by
11358         traversing the access tree.
11359
11360 2020-01-29  Martin Jambor  <mjambor@suse.cz>
11361
11362         * tree-sra.c (verify_sra_access_forest): New function.
11363         (verify_all_sra_access_forests): Likewise.
11364         (create_artificial_child_access): Set parent.
11365         (analyze_all_variable_accesses): Call the verifier.
11366
11367 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
11368
11369         * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
11370         if called on indirect edge.
11371         (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
11372         speculative call if needed.
11373
11374 2020-01-29  Richard Biener  <rguenther@suse.de>
11375
11376         PR tree-optimization/93428
11377         * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
11378         permutation when the load node is created.
11379         (vect_analyze_slp_instance): Re-use it here.
11380
11381 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
11382
11383         * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
11384
11385 2020-01-28  Vladimir Makarov  <vmakarov@redhat.com>
11386
11387         PR rtl-optimization/93272
11388         * ira-lives.c (process_out_of_region_eh_regs): New function.
11389         (process_bb_node_lives): Call it.
11390
11391 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
11392
11393         * coverage.c (read_counts_file): Make error message lowercase.
11394
11395 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
11396
11397         * profile-count.c (profile_quality_display_names): Fix ordering.
11398
11399 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
11400
11401         PR lto/93318
11402         * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
11403         hash only when edge is first within the sequence.
11404         (cgraph_edge::set_call_stmt): Update handling of speculative calls.
11405         (symbol_table::create_edge): Do not set target_prob.
11406         (cgraph_edge::remove_caller): Watch for speculative calls when updating
11407         the call site hash.
11408         (cgraph_edge::make_speculative): Drop target_prob parameter.
11409         (cgraph_edge::speculative_call_info): Remove.
11410         (cgraph_edge::first_speculative_call_target): New member function.
11411         (update_call_stmt_hash_for_removing_direct_edge): New function.
11412         (cgraph_edge::resolve_speculation): Rewrite to new API.
11413         (cgraph_edge::speculative_call_for_target): New member function.
11414         (cgraph_edge::make_direct): Rewrite to new API; fix handling of
11415         multiple speculation targets.
11416         (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
11417         of profile.
11418         (verify_speculative_call): Verify that targets form an interval.
11419         * cgraph.h (cgraph_edge::speculative_call_info): Remove.
11420         (cgraph_edge::first_speculative_call_target): New member function.
11421         (cgraph_edge::next_speculative_call_target): New member function.
11422         (cgraph_edge::speculative_call_target_ref): New member function.
11423         (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
11424         (cgraph_edge): Remove target_prob.
11425         * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
11426         Fix handling of speculative calls.
11427         * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
11428         * ipa-fnsummary.c (analyze_function_body): Likewise.
11429         * ipa-inline.c (speculation_useful_p): Use new speculative call API.
11430         * ipa-profile.c (dump_histogram): Fix formating.
11431         (ipa_profile_generate_summary): Watch for overflows.
11432         (ipa_profile): Do not require probablity to be 1/2; update to new API.
11433         * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
11434         (update_indirect_edges_after_inlining): Update to new API.
11435         * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
11436         profiles.
11437         * profile-count.h: (profile_probability::adjusted): New.
11438         * tree-inline.c (copy_bb): Update to new speculative call API; fix
11439         updating of profile.
11440         * value-prof.c (gimple_ic_transform): Rename to ...
11441         (dump_ic_profile): ... this one; update dumping.
11442         (stream_in_histogram_value): Fix formating.
11443         (gimple_value_profile_transformations): Update.
11444
11445 2020-01-28  H.J. Lu  <hongjiu.lu@intel.com>
11446
11447         PR target/91461
11448         * config/i386/i386.md (*movoi_internal_avx): Remove
11449         TARGET_SSE_TYPELESS_STORES check.
11450         (*movti_internal): Prefer TARGET_AVX over
11451         TARGET_SSE_TYPELESS_STORES.
11452         (*movtf_internal): Likewise.
11453         * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
11454         TARGET_SSE_TYPELESS_STORES.  Remove "<MODE_SIZE> == 16" check
11455         from TARGET_SSE_TYPELESS_STORES.
11456
11457 2020-01-28  David Malcolm  <dmalcolm@redhat.com>
11458
11459         * diagnostic-core.h (warning_at): Rename overload to...
11460         (warning_meta): ...this.
11461         (emit_diagnostic_valist): Delete decl of overload taking
11462         diagnostic_metadata.
11463         * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
11464         (warning_at): Rename overload taking diagnostic_metadata to...
11465         (warning_meta): ...this.
11466
11467 2020-01-28  Richard Biener  <rguenther@suse.de>
11468
11469         PR tree-optimization/93439
11470         * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
11471         * tree-cfg.c (move_sese_region_to_fn): ... here.
11472         (verify_types_in_gimple_reference): Verify used cliques are
11473         tracked.
11474
11475 2020-01-28  H.J. Lu  <hongjiu.lu@intel.com>
11476
11477         PR target/91399
11478         * config/i386/i386-options.c (set_ix86_tune_features): Add an
11479         argument of a pointer to struct gcc_options and pass it to
11480         parse_mtune_ctrl_str.
11481         (ix86_function_specific_restore): Pass opts to
11482         set_ix86_tune_features.
11483         (ix86_option_override_internal): Likewise.
11484         (parse_mtune_ctrl_str): Add an argument of a pointer to struct
11485         gcc_options and use it for x_ix86_tune_ctrl_string.
11486
11487 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
11488
11489         PR rtl-optimization/87763
11490         * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
11491         simplification to handle subregs as well as bare regs.
11492         * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
11493
11494 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
11495
11496         * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
11497         for reduction chains that (now) include a call.
11498
11499 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
11500
11501         PR tree-optimization/92822
11502         * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
11503         out the don't-care elements of a vector whose significant elements
11504         are duplicates, make the don't-care elements duplicates too.
11505
11506 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
11507
11508         PR tree-optimization/93434
11509         * tree-predcom.c (split_data_refs_to_components): Record which
11510         components have had aliasing loads removed.  Prevent store-store
11511         commoning for all such components.
11512
11513 2020-01-28  Jakub Jelinek  <jakub@redhat.com>
11514
11515         PR target/93418
11516         * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
11517         -1 or is_vshift is true, use new_vector with number of elts npatterns
11518         rather than new_unary_operation.
11519
11520         PR tree-optimization/93454
11521         * gimple-fold.c (fold_array_ctor_reference): Perform
11522         elt_size.to_uhwi () just once, instead of calling it in every
11523         iteration.  Punt if that value is above size of the temporary
11524         buffer.  Decrease third native_encode_expr argument when
11525         bufoff + elt_sz is above size of buf.
11526
11527 2020-01-27  Joseph Myers  <joseph@codesourcery.com>
11528
11529         * config/mips/mips.c (mips_declare_object_name)
11530         [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
11531
11532 2020-01-27  Martin Liska  <mliska@suse.cz>
11533
11534         PR gcov-profile/93403
11535         * tree-profile.c (gimple_init_gcov_profiler): Generate
11536         both __gcov_indirect_call_profiler_v4 and
11537         __gcov_indirect_call_profiler_v4_atomic.
11538
11539 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
11540
11541         PR target/92822
11542         * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
11543         expander.
11544         (@aarch64_split_simd_mov<mode>): Use it.
11545         (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
11546         Leave the vec_extract patterns to handle 2-element vectors.
11547         (aarch64_simd_mov_from_<mode>high): Likewise.
11548         (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
11549         (vec_extractv2dfv1df): Likewise.
11550
11551 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
11552
11553         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
11554         jump conditions for *compare_condjump<GPI:mode>.
11555
11556 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
11557
11558         PR analyzer/93276
11559         * digraph.cc (test_edge::test_edge): Specify template for base
11560         class initializer.
11561
11562 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
11563
11564         * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
11565
11566 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
11567
11568         * config/arc/arc-protos.h (gen_mlo): Remove.
11569         (gen_mhi): Likewise.
11570         * config/arc/arc.c (AUX_MULHI): Define.
11571         (arc_must_save_reister): Special handling for r58/59.
11572         (arc_compute_frame_size): Consider mlo/mhi registers.
11573         (arc_save_callee_saves): Emit fp/sp move only when emit_move
11574         paramter is true.
11575         (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
11576         mlo/mhi name selection.
11577         (arc_restore_callee_saves): Don't early restore blink when ISR.
11578         (arc_expand_prologue): Add mlo/mhi saving.
11579         (arc_expand_epilogue): Add mlo/mhi restoring.
11580         (gen_mlo): Remove.
11581         (gen_mhi): Remove.
11582         * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
11583         numbering when MUL64 option is used.
11584         (DWARF2_FRAME_REG_OUT): Define.
11585         * config/arc/arc.md (arc600_stall): New pattern.
11586         (VUNSPEC_ARC_ARC600_STALL): Define.
11587         (mulsi64): Use correct mlo/mhi registers.
11588         (mulsi_600): Clean it up.
11589         * config/arc/predicates.md (mlo_operand): Remove any dependency on
11590         TARGET_BIG_ENDIAN.
11591         (mhi_operand): Likewise.
11592
11593 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
11594             Petro Karashchenko  <petro.karashchenko@ring.com>
11595
11596         * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
11597         attributes if needed.
11598         (prepare_move_operands): Generate special unspec instruction for
11599         direct access.
11600         (arc_isuncached_mem_p): Propagate uncached attribute to each
11601         structure member.
11602         * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
11603         (VUNSPEC_ARC_STDI): Likewise.
11604         (ALLI): New mode iterator.
11605         (mALLI): New mode attribute.
11606         (lddi): New instruction pattern.
11607         (stdi): Likewise.
11608         (stdidi_split): Split instruction for architectures which are not
11609         supporting ll64 option.
11610         (lddidi_split): Likewise.
11611
11612 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
11613
11614         PR rtl-optimization/92989
11615         * lra-lives.c (process_bb_lives): Update the live-in set before
11616         processing additional clobbers.
11617
11618 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
11619
11620         PR rtl-optimization/93170
11621         * cselib.c (cselib_invalidate_regno_val): New function, split out
11622         from...
11623         (cselib_invalidate_regno): ...here.
11624         (cselib_invalidated_by_call_p): New function.
11625         (cselib_process_insn): Iterate over all the hard-register entries in
11626         REG_VALUES and invalidate any that cross call-clobbered registers.
11627
11628 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
11629
11630         * dojump.c (split_comparison): Use HONOR_NANS rather than
11631         HONOR_SNANS when splitting LTGT.
11632
11633 2020-01-27  Martin Liska  <mliska@suse.cz>
11634
11635         PR driver/91220
11636         * opts.c (print_filtered_help): Exclude language-specific
11637         options from --help=common unless enabled in all FEs.
11638
11639 2020-01-27  Martin Liska  <mliska@suse.cz>
11640
11641         * opts.c (print_help): Exclude params from
11642         all except --help=param.
11643
11644 2020-01-27  Martin Liska  <mliska@suse.cz>
11645
11646         PR target/93274
11647         * config/i386/i386-features.c (make_resolver_func):
11648         Align the code with ppc64 target implementation.
11649         Do not generate a unique name for resolver function.
11650
11651 2020-01-27  Richard Biener  <rguenther@suse.de>
11652
11653         PR tree-optimization/93397
11654         * tree-vect-slp.c (vect_analyze_slp_instance): Delay
11655         converted reduction chain SLP graph adjustment.
11656
11657 2020-01-26  Marek Polacek  <polacek@redhat.com>
11658
11659         PR sanitizer/93436
11660         * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
11661         null DECL_NAME.
11662
11663 2020-01-26  Jason Merrill  <jason@redhat.com>
11664
11665         PR c++/92601
11666         * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
11667         of complete types.
11668
11669 2020-01-26  Darius Galis  <darius.galis@cyberthorstudios.com>
11670
11671         * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
11672         (rx_setmem): Likewise.
11673
11674 2020-01-26  Jakub Jelinek  <jakub@redhat.com>
11675
11676         PR target/93412
11677         * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
11678         Use nonimmediate_operand instead of x86_64_hilo_general_operand and
11679         drop <di> from constraint of last operand.
11680
11681         PR target/93430
11682         * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
11683         TARGET_AVX2 and V4DFmode not in the split condition, but in the
11684         pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
11685
11686 2020-01-25  Feng Xue  <fxue@os.amperecomputing.com>
11687
11688         PR ipa/93166
11689         * ipa-cp.c (get_info_about_necessary_edges): Remove value
11690         check assertion.
11691
11692 2020-01-24  Jeff Law  <law@redhat.com>
11693
11694         PR tree-optimization/92788
11695         * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
11696         not EDGE_ABNORMAL.
11697
11698 2020-01-24  Jakub Jelinek  <jakub@redhat.com>
11699
11700         PR target/93395
11701         * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
11702         *avx_vperm_broadcast_<mode>,
11703         <sse2_avx_avx512f>_vpermil<mode><mask_name>,
11704         *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
11705         Move before avx2_perm<mode>/avx512f_perm<mode>.
11706
11707         PR target/93376
11708         * simplify-rtx.c (simplify_const_unary_operation,
11709         simplify_const_binary_operation): Punt for mode precision above
11710         MAX_BITSIZE_MODE_ANY_INT.
11711
11712 2020-01-24  Andrew Pinski  <apinski@marvell.com>
11713
11714         * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
11715         alu.shift_reg to 0.
11716
11717 2020-01-24  Jeff Law  <law@redhat.com>
11718
11719         PR target/13721
11720         * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
11721         for REGs.  Call output_operand_lossage to get more reasonable
11722         diagnostics.
11723
11724 2020-01-24  Andrew Stubbs  <ams@codesourcery.com>
11725
11726         * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
11727         gcn_fp_compare_operator.
11728         (vec_cmpu<mode>di): Use gcn_compare_operator.
11729         (vec_cmp<u>v64qidi): Use gcn_compare_operator.
11730         (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
11731         (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
11732         (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
11733         (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
11734         (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
11735         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
11736         gcn_fp_compare_operator.
11737         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
11738         gcn_fp_compare_operator.
11739         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
11740         gcn_fp_compare_operator.
11741         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
11742         gcn_fp_compare_operator.
11743
11744 2020-01-24  Maciej W. Rozycki  <macro@wdc.com>
11745
11746         * doc/install.texi (Cross-Compiler-Specific Options): Document
11747         `--with-toolexeclibdir' option.
11748
11749 2020-01-24  Hans-Peter Nilsson  <hp@axis.com>
11750
11751         * target.def (flags_regnum): Also mention effect on delay slot filling.
11752         * doc/tm.texi: Regenerate.
11753
11754 2020-01-23  Jeff Law  <law@redhat.com>
11755
11756         PR translation/90162
11757         * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
11758
11759 2020-01-23  Mikael Tillenius  <mti-1@tillenius.com>
11760
11761         PR target/92269
11762         * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
11763         profiling label
11764
11765 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
11766
11767         PR rtl-optimization/93402
11768         * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
11769         USE insns.
11770
11771 2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
11772
11773         * config.in: Regenerated.
11774         * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
11775         for TARGET_LIBC_GNUSTACK.
11776         * configure: Regenerated.
11777         * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
11778         found to be 2.31 or greater.
11779
11780 2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
11781
11782         * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
11783         TARGET_SOFT_FLOAT.
11784         * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
11785         (mips_asm_file_end): New function. Delegate to
11786         file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
11787         * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
11788
11789 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
11790
11791         PR target/93376
11792         * config/i386/i386-modes.def (POImode): New mode.
11793         (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
11794         * config/i386/i386.md (DPWI): New mode attribute.
11795         (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
11796         (QWI): Rename to...
11797         (QPWI): ... this.  Use POI instead of OI for TImode.
11798         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
11799         *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
11800         instead of <QWI>.
11801
11802 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
11803
11804         PR target/93341
11805         * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
11806         unspec.
11807         (speculation_tracker_rev): New pattern.
11808         * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
11809         Use speculation_tracker_rev to track the inverse condition.
11810
11811 2020-01-23  Richard Biener  <rguenther@suse.de>
11812
11813         PR tree-optimization/93381
11814         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
11815         alias-set of the def as argument and record the first one.
11816         (vn_walk_cb_data::first_set): New member.
11817         (vn_reference_lookup_3): Pass the alias-set of the current def
11818         to push_partial_def.  Fix alias-set used in the aggregate copy
11819         case.
11820         (vn_reference_lookup): Consistently set *last_vuse_ptr.
11821         * real.c (clear_significand_below): Fix out-of-bound access.
11822
11823 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
11824
11825         PR target/93346
11826         * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
11827         New define_insn patterns.
11828
11829 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
11830
11831         * doc/sourcebuild.texi (check-function-bodies): Add an
11832         optional target/xfail selector.
11833
11834 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
11835
11836         PR rtl-optimization/93124
11837         * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
11838         bare USE and CLOBBER insns.
11839
11840 2020-01-22  Andrew Pinski  <apinski@marvell.com>
11841
11842         * config/arc/arc.c (output_short_suffix): Check insn for nullness.
11843
11844 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
11845
11846         PR analyzer/93307
11847         * gdbinit.in (break-on-saved-diagnostic): Update for move of
11848         diagnostic_manager into "ana" namespace.
11849         * selftest-run-tests.c (selftest::run_tests): Update for move of
11850         selftest::run_analyzer_selftests to
11851         ana::selftest::run_analyzer_selftests.
11852
11853 2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>
11854
11855         * cfgexpand.c (union_stack_vars): Update the size.
11856
11857 2020-01-22  Richard Biener  <rguenther@suse.de>
11858
11859         PR tree-optimization/93381
11860         * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
11861         throughout, handle all conversions the same.
11862
11863 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
11864
11865         PR target/93335
11866         * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
11867         gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
11868         predicate, not whenever it is CONST_INT.  Otherwise, force_reg it.
11869         Call force_reg on high_in2 unconditionally.
11870
11871 2020-01-22  Martin Liska  <mliska@suse.cz>
11872
11873         PR tree-optimization/92924
11874         * profile.c (compute_value_histograms): Divide
11875         all counter values.
11876
11877 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
11878
11879         PR target/91298
11880         * output.h (assemble_name_resolve): Declare.
11881         * varasm.c (assemble_name_resolve): New function.
11882         (assemble_name): Use it.
11883         * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
11884
11885 2020-01-22  Joseph Myers  <joseph@codesourcery.com>
11886
11887         * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
11888         update_web_docs_git instead of update_web_docs_svn.
11889
11890 2020-01-21  Andrew Pinski  <apinski@marvell.com>
11891
11892         PR target/9311
11893         * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
11894         as PTR mode. Have operand 1 as being modeless, it can be P mode.
11895         (*tlsgd_small_<mode>): Likewise.
11896         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
11897         <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
11898         register.  Convert that register back to dest using convert_mode.
11899
11900 2020-01-21  Jim Wilson  <jimw@sifive.com>
11901
11902         * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
11903         instead of XINT.
11904
11905 2020-01-21  H.J. Lu  <hongjiu.lu@intel.com>
11906             Uros Bizjak    <ubizjak@gmail.com>
11907
11908         PR target/93319
11909         * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
11910         with ptr_mode.
11911         (legitimize_tls_address): Do GNU2 TLS address computation in
11912         ptr_mode and zero-extend result to Pmode.
11913         *  config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
11914         :P with :PTR and Pmode with ptr_mode.
11915         (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
11916         (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
11917         (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
11918
11919 2020-01-21  Jakub Jelinek  <jakub@redhat.com>
11920
11921         PR target/93333
11922         * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
11923         the last two operands are CONST_INT_P before using them as such.
11924
11925 2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>
11926
11927         * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
11928         to get the integer element types.
11929
11930 2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>
11931
11932         * config/aarch64/aarch64-sve-builtins.h
11933         (function_expander::convert_to_pmode): Declare.
11934         * config/aarch64/aarch64-sve-builtins.cc
11935         (function_expander::convert_to_pmode): New function.
11936         (function_expander::get_contiguous_base): Use it.
11937         (function_expander::prepare_gather_address_operands): Likewise.
11938         * config/aarch64/aarch64-sve-builtins-sve2.cc
11939         (svwhilerw_svwhilewr_impl::expand): Likewise.
11940
11941 2020-01-21  Szabolcs Nagy  <szabolcs.nagy@arm.com>
11942
11943         PR target/92424
11944         * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
11945         cfun->machine->label_is_assembled.
11946         (aarch64_print_patchable_function_entry): New.
11947         (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
11948         * config/aarch64/aarch64.h (struct machine_function): New field,
11949         label_is_assembled.
11950
11951 2020-01-21  David Malcolm  <dmalcolm@redhat.com>
11952
11953         PR ipa/93315
11954         * ipa-profile.c (ipa_profile): Delete call_sums and set it to
11955         NULL on exit.
11956
11957 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
11958
11959         PR lto/93318
11960         * cgraph.c (cgraph_edge::resolve_speculation,
11961         cgraph_edge::redirect_call_stmt_to_callee): Fix update of
11962         call_stmt_site_hash.
11963
11964 2020-01-21  Martin Liska  <mliska@suse.cz>
11965
11966         * config/rs6000/rs6000.c (common_mode_defined): Remove
11967         unused variable.
11968
11969 2020-01-21  Richard Biener  <rguenther@suse.de>
11970
11971         PR tree-optimization/92328
11972         * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
11973         type when value-numbering same-sized store by inserting a
11974         VIEW_CONVERT_EXPR.
11975         (eliminate_dom_walker::eliminate_stmt): When eliminating
11976         a redundant store handle bit-reinterpretation of the same value.
11977
11978 2020-01-21  Andrew Pinski  <apinski@marvel.com>
11979
11980         PR tree-opt/93321
11981         * tree-into-ssa.c (prepare_block_for_update_1): Split out
11982         from ...
11983         (prepare_block_for_update): This.  Use a worklist instead of
11984         recursing.
11985
11986 2020-01-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
11987
11988         * gcc/config/arm/arm.c (clear_operation_p):
11989         Initialise last_regno, skip first iteration
11990         based on the first_set value and use ints instead
11991         of the unnecessary HOST_WIDE_INTs.
11992
11993 2020-01-21  Jakub Jelinek  <jakub@redhat.com>
11994
11995         PR target/93073
11996         * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
11997         compare_mode other than SFmode or DFmode.
11998
11999 2020-01-21  Kito Cheng  <kito.cheng@sifive.com>
12000
12001         PR target/93304
12002         * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
12003         * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
12004         * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
12005
12006 2020-01-20  Wilco Dijkstra  <wdijkstr@arm.com>
12007
12008         * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
12009
12010 2020-01-20  Andrew Pinski  <apinski@marvell.com>
12011
12012         PR middle-end/93242
12013         * targhooks.c (default_print_patchable_function_entry): Use
12014         output_asm_insn to emit the nop instruction.
12015
12016 2020-01-20  Fangrui Song  <maskray@google.com>
12017
12018         PR middle-end/93194
12019         * targhooks.c (default_print_patchable_function_entry): Align to
12020         POINTER_SIZE.
12021
12022 2020-01-20  H.J. Lu  <hongjiu.lu@intel.com>
12023
12024         PR target/93319
12025         * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
12026         gen_tls_dynamic_gnu2_64.  Compute GNU2 TLS address in ptr_mode.
12027         * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
12028         (@tls_dynamic_gnu2_64_<mode>): This.  Replace DI with P.
12029         (*tls_dynamic_gnu2_lea_64): Renamed to ...
12030         (*tls_dynamic_gnu2_lea_64_<mode>): This.  Replace DI with P.
12031         Remove the {q} suffix from lea.
12032         (*tls_dynamic_gnu2_call_64): Renamed to ...
12033         (*tls_dynamic_gnu2_call_64_<mode>): This.  Replace DI with P.
12034         (*tls_dynamic_gnu2_combine_64): Renamed to ...
12035         (*tls_dynamic_gnu2_combine_64_<mode>): This.  Replace DI with P.
12036         Pass Pmode to gen_tls_dynamic_gnu2_64.
12037
12038 2020-01-20  Wilco Dijkstra  <wdijkstr@arm.com>
12039
12040         * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
12041
12042 2020-01-20  Richard Sandiford  <richard.sandiford@arm.com>
12043
12044         * config/aarch64/aarch64-sve-builtins-base.cc
12045         (svld1ro_impl::memory_vector_mode): Remove parameter name.
12046
12047 2020-01-20  Richard Biener  <rguenther@suse.de>
12048
12049         PR debug/92763
12050         * dwarf2out.c (prune_unused_types): Unconditionally mark
12051         called function DIEs.
12052
12053 2020-01-20  Martin Liska  <mliska@suse.cz>
12054
12055         PR tree-optimization/93199
12056         * tree-eh.c (struct leh_state): Add
12057         new field outer_non_cleanup.
12058         (cleanup_is_dead_in): Pass leh_state instead
12059         of eh_region.  Add a checking that state->outer_non_cleanup
12060         points to outer non-clean up region.
12061         (lower_try_finally): Record outer_non_cleanup
12062         for this_state.
12063         (lower_catch): Likewise.
12064         (lower_eh_filter): Likewise.
12065         (lower_eh_must_not_throw): Likewise.
12066         (lower_cleanup): Likewise.
12067
12068 2020-01-20  Richard Biener  <rguenther@suse.de>
12069
12070         PR tree-optimization/93094
12071         * tree-vectorizer.h (vect_loop_versioning): Adjust.
12072         (vect_transform_loop): Likewise.
12073         * tree-vectorizer.c (try_vectorize_loop_1): Pass down
12074         loop_vectorized_call to vect_transform_loop.
12075         * tree-vect-loop.c (vect_transform_loop): Pass down
12076         loop_vectorized_call to vect_loop_versioning.
12077         * tree-vect-loop-manip.c (vect_loop_versioning): Use
12078         the earlier discovered loop_vectorized_call.
12079
12080 2020-01-19  Eric S. Raymond <esr@thyrsus.com>
12081
12082         * doc/contribute.texi: Update for SVN -> Git transition.
12083         * doc/install.texi: Likewise.
12084
12085 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
12086
12087         PR lto/93318
12088         * cgraph.c (cgraph_edge::make_speculative): Increase number of
12089         speculative targets.
12090         (verify_speculative_call): New function
12091         (cgraph_node::verify_node): Use it.
12092         * ipa-profile.c (ipa_profile): Fix formating; do not set number of
12093         speculations.
12094
12095 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
12096
12097         PR lto/93318
12098         * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
12099         (cgraph_edge::make_direct): Remove all indirect targets.
12100         (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
12101         (cgraph_node::verify_node): Verify that only one call_stmt or
12102         lto_stmt_uid is set.
12103         * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
12104         lto_stmt_uid.
12105         * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
12106         (lto_output_ref): Simplify streaming of stmt.
12107         * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
12108
12109 2020-01-18  Tamar Christina  <tamar.christina@arm.com>
12110
12111         * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
12112         Mark parameter unused.
12113
12114 2020-01-18  Hans-Peter Nilsson  <hp@axis.com>
12115
12116         * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
12117
12118 2019-01-18  Gerald Pfeifer  <gerald@pfeifer.com>
12119
12120         * varpool.c (ctor_useable_for_folding_p): Fix grammar.
12121
12122 2020-01-18  Iain Sandoe  <iain@sandoe.co.uk>
12123
12124         * Makefile.in: Add coroutine-passes.o.
12125         * builtin-types.def (BT_CONST_SIZE): New.
12126         (BT_FN_BOOL_PTR): New.
12127         (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
12128         * builtins.def (DEF_COROUTINE_BUILTIN): New.
12129         * coroutine-builtins.def: New file.
12130         * coroutine-passes.cc: New file.
12131         * function.h (struct GTY function): Add a bit to indicate that the
12132         function is a coroutine component.
12133         * internal-fn.c (expand_CO_FRAME): New.
12134         (expand_CO_YIELD): New.
12135         (expand_CO_SUSPN): New.
12136         (expand_CO_ACTOR): New.
12137         * internal-fn.def (CO_ACTOR): New.
12138         (CO_YIELD): New.
12139         (CO_SUSPN): New.
12140         (CO_FRAME): New.
12141         * passes.def: Add pass_coroutine_lower_builtins,
12142         pass_coroutine_early_expand_ifns.
12143         * tree-pass.h (make_pass_coroutine_lower_builtins): New.
12144         (make_pass_coroutine_early_expand_ifns): New.
12145         * doc/invoke.texi: Document the fcoroutines command line
12146         switch.
12147
12148 2020-01-18  Jakub Jelinek  <jakub@redhat.com>
12149
12150         * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
12151
12152         PR target/93312
12153         * config/arm/arm.c (clear_operation_p): Don't use REGNO until
12154         after checking the argument is a REG.  Don't use REGNO (reg)
12155         again to set last_regno, reuse regno variable instead.
12156
12157 2020-01-17  David Malcolm  <dmalcolm@redhat.com>
12158
12159         * doc/analyzer.texi (Limitations): Add note about NaN.
12160
12161 2020-01-17  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12162             Sudakshina Das  <sudi.das@arm.com>
12163
12164         * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
12165         and valid immediate.
12166         (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
12167         (lshrdi3): Generate thumb2_lsrl for valid immediates.
12168         * config/arm/constraints.md (Pg): New.
12169         * config/arm/predicates.md (long_shift_imm): New.
12170         (arm_reg_or_long_shift_imm): Likewise.
12171         * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
12172         (thumb2_lsll): Likewise.
12173         (thumb2_lsrl): New.
12174
12175 2020-01-17  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12176             Sudakshina Das  <sudi.das@arm.com>
12177
12178         * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
12179         (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
12180         * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
12181         register pairs for doubleword quantities for ARMv8.1M-Mainline.
12182         * config/arm/thumb2.md (thumb2_asrl): New.
12183         (thumb2_lsll): Likewise.
12184
12185 2020-01-17  Jakub Jelinek  <jakub@redhat.com>
12186
12187         * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
12188         unused variable.
12189
12190 2020-01-17  Alexander Monakov  <amonakov@ispras.ru>
12191
12192         * gdbinit.in (help-gcc-hooks): New command.
12193         (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
12194         pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
12195         documentation.
12196
12197 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
12198
12199         * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
12200         correct target macro.
12201
12202 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
12203
12204         * config/aarch64/aarch64-protos.h
12205         (aarch64_sve_ld1ro_operand_p): New.
12206         * config/aarch64/aarch64-sve-builtins-base.cc
12207         (class load_replicate): New.
12208         (class svld1ro_impl): New.
12209         (class svld1rq_impl): Change to inherit from load_replicate.
12210         (svld1ro): New sve intrinsic function base.
12211         * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
12212         New DEF_SVE_FUNCTION.
12213         * config/aarch64/aarch64-sve-builtins-base.h
12214         (svld1ro): New decl.
12215         * config/aarch64/aarch64-sve-builtins.cc
12216         (function_expander::add_mem_operand): Modify assert to allow
12217         OImode.
12218         * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
12219         pattern.
12220         * config/aarch64/aarch64.c
12221         (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
12222         (aarch64_sve_ld1rq_ld1ro_operand_p): This.
12223         (aarch64_sve_ld1ro_operand_p): New.
12224         * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
12225         * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
12226         * config/aarch64/predicates.md
12227         (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
12228
12229 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
12230
12231         * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
12232         Introduce this ACLE specified predefined macro.
12233         * config/aarch64/aarch64-option-extensions.def (f64mm): New.
12234         (fp): Disabling this disables f64mm.
12235         (simd): Disabling this disables f64mm.
12236         (fp16): Disabling this disables f64mm.
12237         (sve): Disabling this disables f64mm.
12238         * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
12239         (AARCH64_ISA_F64MM): New.
12240         (TARGET_F64MM): New.
12241         * doc/invoke.texi (f64mm): Document new option.
12242
12243 2020-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
12244
12245         * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
12246         (neoversen1_tunings): Likewise.
12247
12248 2020-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
12249
12250         PR target/92692
12251         * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
12252         Add assert to ensure prolog has been emitted.
12253         (aarch64_split_atomic_op): Likewise.
12254         * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
12255         Use epilogue_completed rather than reload_completed.
12256         (aarch64_atomic_exchange<mode>): Likewise.
12257         (aarch64_atomic_<atomic_optab><mode>): Likewise.
12258         (atomic_nand<mode>): Likewise.
12259         (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
12260         (atomic_fetch_nand<mode>): Likewise.
12261         (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
12262         (atomic_nand_fetch<mode>): Likewise.
12263
12264 2020-01-17  Richard Sandiford  <richard.sandiford@arm.com>
12265
12266         PR target/93133
12267         * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
12268         for FP modes.
12269         (REVERSE_CONDITION): Delete.
12270         * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
12271         (CCFP_CCFPE): Likewise.
12272         (e): New mode attribute.
12273         * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
12274         (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
12275         (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
12276         (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
12277         (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
12278         (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
12279         * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
12280         name of generator from gen_ccmpdi to gen_ccmpccdi.
12281         (aarch64_gen_ccmp_next): Use code_for_ccmp.  If we want to reverse
12282         the previous comparison but aren't able to, use the new ccmp_rev
12283         patterns instead.
12284
12285 2020-01-17  Richard Sandiford  <richard.sandiford@arm.com>
12286
12287         * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
12288         than testing directly for INTEGER_CST.
12289         (gimplify_target_expr, gimplify_omp_depend): Likewise.
12290
12291 2020-01-17  Jakub Jelinek  <jakub@redhat.com>
12292
12293         PR tree-optimization/93292
12294         * tree-vect-stmts.c (vectorizable_comparison): Punt also if
12295         get_vectype_for_scalar_type returns NULL.
12296
12297 2020-01-16  Jan Hubicka  <hubicka@ucw.cz>
12298
12299         * params.opt (-param=max-predicted-iterations): Increase range from 0.
12300         * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
12301
12302 2020-01-16  Jan Hubicka  <hubicka@ucw.cz>
12303
12304         * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
12305         dump.
12306         * params.opt: (max-predicted-iterations): Set bounds.
12307         * predict.c (real_almost_one, real_br_prob_base,
12308         real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
12309         (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
12310         probabilities; do not truncate to reg_br_prob_bases.
12311         (estimate_loops_at_level): Pass max_cyclic_prob.
12312         (estimate_loops): Compute max_cyclic_prob.
12313         (estimate_bb_frequencies): Do not initialize real_*; update calculation
12314         of back edge prob.
12315         * profile-count.c (profile_probability::to_sreal): New.
12316         * profile-count.h (class sreal): Move up in file.
12317         (profile_probability::to_sreal): Declare.
12318
12319 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
12320
12321         * config/arm/arm.c
12322         (arm_invalid_conversion): New function for target hook.
12323         (arm_invalid_unary_op): New function for target hook.
12324         (arm_invalid_binary_op): New function for target hook.
12325
12326 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
12327
12328         * config.gcc: Add arm_bf16.h.
12329         * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
12330         (arm_simd_builtin_std_type): Add BFmode.
12331         (arm_init_simd_builtin_types): Define element types for vector types.
12332         (arm_init_bf16_types): New function.
12333         (arm_init_builtins): Add arm_init_bf16_types function call.
12334         * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
12335         * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
12336         * config/arm/arm.c (aapcs_vfp_sub_candidate):  Add BFmode.
12337         (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
12338         (arm_vector_mode_supported_p): Add V4BF, V8BF.
12339         (arm_mangle_type):  Add __bf16.
12340         * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
12341         VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
12342         arm_bf16_ptr_type_node.
12343         * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
12344         define_split between ARM registers.
12345         * config/arm/arm_bf16.h: New file.
12346         * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
12347         * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
12348         (VQXMOV): Add V8BF.
12349         * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
12350         * config/arm/vfp.md: Add BFmode to movhf patterns.
12351
12352 2020-01-16  Mihail Ionescu  <mihail.ionescu@arm.com>
12353             Andre Vieira  <andre.simoesdiasvieira@arm.com>
12354
12355         * config/arm/arm-cpus.in (mve, mve_float): New features.
12356         (dsp, mve, mve.fp): New options.
12357         * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
12358         * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
12359         * doc/invoke.texi: Document the armv8.1-m mve and dps options.
12360
12361 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12362             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12363
12364         * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
12365         Armv8-M Mainline.
12366         * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
12367         error for using -mcmse when targeting Armv8.1-M Mainline.
12368
12369 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12370             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12371
12372         * config/arm/arm.md (nonsecure_call_internal): Do not force memory
12373         address in r4 when targeting Armv8.1-M Mainline.
12374         (nonsecure_call_value_internal): Likewise.
12375         * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
12376         a register match_operand again.  Emit BLXNS when targeting
12377         Armv8.1-M Mainline.
12378         (nonsecure_call_value_reg_thumb2): Likewise.
12379
12380 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12381             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12382
12383         * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
12384         (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
12385         variable as true when floating-point ABI is not hard.  Replace
12386         check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
12387         Generate VLSTM and VLLDM instruction respectively before and
12388         after a function call to cmse_nonsecure_call function.
12389         * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
12390         (VUNSPEC_VLLDM): Likewise.
12391         * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
12392         (lazy_load_multiple_insn): Likewise.
12393
12394 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12395             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12396
12397         * config/arm/arm.c (vfp_emit_fstmd): Declare early.
12398         (arm_emit_vfp_multi_reg_pop): Likewise.
12399         (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
12400         registers to clear in max_fp_regno.  Emit VPUSH and VPOP to save and
12401         restore callee-saved VFP registers.
12402
12403 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12404             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12405
12406         * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
12407         (cmse_nonsecure_call_clear_caller_saved): Rename into ...
12408         (cmse_nonsecure_call_inline_register_clear): This.  Save and clear
12409         callee-saved GPRs as well as clear ip register before doing a nonsecure
12410         call then restore callee-saved GPRs after it when targeting
12411         Armv8.1-M Mainline.
12412         (arm_reorg): Adapt to function rename.
12413
12414 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12415             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12416
12417         * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
12418         * config/arm/arm.c (clear_operation_p): Extend to be able to check a
12419         clear_vfp_multiple pattern based on a new vfp parameter.
12420         (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
12421         targeting Armv8.1-M Mainline.
12422         (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
12423         unconditionally when targeting Armv8.1-M Mainline architecture.  Check
12424         whether VFP registers are available before looking call_used_regs for a
12425         VFP register.
12426         * config/arm/predicates.md (clear_multiple_operation): Adapt to change
12427         of prototype of clear_operation_p.
12428         (clear_vfp_multiple_operation): New predicate.
12429         * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
12430         * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
12431
12432 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12433             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12434
12435         * config/arm/arm-protos.h (clear_operation_p): Declare.
12436         * config/arm/arm.c (clear_operation_p): New function.
12437         (cmse_clear_registers): Generate clear_multiple instruction pattern if
12438         targeting Armv8.1-M Mainline or successor.
12439         (output_return_instruction): Only output APSR register clearing if
12440         Armv8.1-M Mainline instructions not available.
12441         (thumb_exit): Likewise.
12442         * config/arm/predicates.md (clear_multiple_operation): New predicate.
12443         * config/arm/thumb2.md (clear_apsr): New define_insn.
12444         (clear_multiple): Likewise.
12445         * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
12446
12447 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12448             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12449
12450         * config/arm/arm.c (fp_sysreg_names): Declare and define.
12451         (use_return_insn): Also return false for Armv8.1-M Mainline.
12452         (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
12453         Mainline instructions are available.
12454         (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
12455         when targeting Armv8.1-M Mainline Security Extensions.
12456         (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
12457         Mainline entry function.
12458         (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
12459         targeting Armv8.1-M Mainline or successor.
12460         (arm_expand_epilogue): Fix indentation of caller-saved register
12461         clearing.  Restore FPCXTNS if this is an Armv8.1-M Mainline
12462         entry function.
12463         * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
12464         (FP_SYSREGS): Likewise.
12465         (enum vfp_sysregs_encoding): Define enum.
12466         (fp_sysreg_names): Declare.
12467         * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
12468         * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
12469         (pop_fpsysreg_insn): Likewise.
12470
12471 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
12472             Thomas Preud'homme  <thomas.preudhomme@arm.com>
12473
12474         * config/arm/arm-cpus.in (armv8_1m_main): New feature.
12475         (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
12476         ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
12477         ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
12478         ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
12479         (ARMv8_1m_main): New feature group.
12480         (armv8.1-m.main): New architecture.
12481         * config/arm/arm-tables.opt: Regenerate.
12482         * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
12483         (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
12484         (arm_options_perform_arch_sanity_checks): Error out when targeting
12485         Armv8.1-M Mainline Security Extensions.
12486         * config/arm/arm.h (arm_arch8_1m_main): Declare.
12487
12488 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
12489
12490         * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
12491         aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
12492         * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
12493         aarch64_bfdot_laneq): New.
12494         * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
12495         vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
12496         vbfdotq_laneq_f32): New.
12497         * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
12498         VBFMLA_W, VBF): New.
12499         (isquadop): Add V4BF, V8BF.
12500
12501 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
12502
12503         * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
12504         New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
12505         TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
12506         (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
12507         (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
12508         * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
12509         usdot_laneq, sudot_lane,sudot_laneq): New.
12510         * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
12511         (aarch64_<sur>dot_lane): New.
12512         * config/aarch64/arm_neon.h (vusdot_s32): New.
12513         (vusdotq_s32): New.
12514         (vusdot_lane_s32): New.
12515         (vsudot_lane_s32): New.
12516         * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
12517         (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
12518
12519 2020-01-16  Martin Liska  <mliska@suse.cz>
12520
12521         * value-prof.c (dump_histogram_value): Fix
12522         obvious spacing issue.
12523
12524 2020-01-16  Andrew Pinski  <apinski@marvell.com>
12525
12526         * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
12527         !storage_order_barrier_p.
12528
12529 2020-01-16  Andrew Pinski  <apinski@marvell.com>
12530
12531         * sched-int.h (_dep): Add unused bit-field field for the padding.
12532         * sched-deps.c (init_dep_1): Init unused field.
12533
12534 2020-01-16  Andrew Pinski  <apinski@marvell.com>
12535
12536         * optabs.h (create_expand_operand): Initialize target field also.
12537
12538 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
12539
12540         PR tree-optimization/92429
12541         * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
12542         * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
12543         control folding.
12544         * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
12545         tree.
12546
12547 2020-01-16  Richard Sandiford  <richard.sandiford@arm.com>
12548
12549         * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
12550         aarch64_sve_int_mode to each mode.
12551
12552 2020-01-15  David Malcolm  <dmalcolm@redhat.com>
12553
12554         * doc/analyzer.texi (Overview): Add note about
12555         -fdump-ipa-analyzer.
12556
12557 2020-01-15  Wilco Dijkstra  <wdijkstr@arm.com>
12558
12559         PR tree-optimization/93231
12560         * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
12561         input_type is unsigned.  Use tree_to_shwi for shift constant.
12562         Check CST_STRING element size is CHAR_TYPE_SIZE bits.
12563         (simplify_count_trailing_zeroes): Add test to handle known non-zero
12564         inputs more efficiently.
12565
12566 2020-01-15  Uroš Bizjak  <ubizjak@gmail.com>
12567
12568         * config/i386/i386.md (*movsf_internal): Do not require
12569         SSE2 ISA for alternatives 14 and 15.
12570
12571 2020-01-15  Richard Biener  <rguenther@suse.de>
12572
12573         PR middle-end/93273
12574         * tree-eh.c (sink_clobbers): If we already visited the destination
12575         block do not defer insertion.
12576         (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
12577         the purpose of defered insertion.
12578
12579 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
12580
12581         * BASE-VER: Bump to 10.0.1.
12582
12583 2020-01-15  Richard Sandiford  <richard.sandiford@arm.com>
12584
12585         PR tree-optimization/93247
12586         * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
12587         type of the stmt that we're going to vectorize.
12588
12589 2020-01-15  Richard Sandiford  <richard.sandiford@arm.com>
12590
12591         * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
12592         VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
12593         type from the lhs.
12594
12595 2020-01-15  Martin Liska  <mliska@suse.cz>
12596
12597         * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
12598         2 calls of streamer_read_hwi in a function call.
12599
12600 2020-01-15  Richard Biener  <rguenther@suse.de>
12601
12602         * alias.c (record_alias_subset): Avoid redundant work when
12603         subset is already recorded.
12604
12605 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
12606
12607         * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
12608         the analyzer options provide CWE identifiers.
12609
12610 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
12611
12612         * tree-diagnostic-path.cc (path_summary::event_range::print):
12613         When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
12614         using get_pure_location.
12615
12616 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
12617
12618         PR tree-optimization/93262
12619         * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
12620         perform head trimming only if the last argument is constant,
12621         either all ones, or larger or equal to head trim, in the latter
12622         case decrease the last argument by head_trim.
12623
12624         PR tree-optimization/93249
12625         * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
12626         (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
12627         function body scope, reindent.  For BUILTIN_IN_STRNCPY*, don't
12628         perform head trim unless we can prove there are no '\0' chars
12629         from the source among the first head_trim chars.
12630
12631 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
12632
12633         * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
12634
12635 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
12636
12637         PR target/93009
12638         * config/i386/sse.md
12639         (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
12640         *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
12641         *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
12642         *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
12643         just a single alternative instead of two, make operands 1 and 2
12644         commutative.
12645
12646 2020-01-14  Jan Hubicka  <hubicka@ucw.cz>
12647
12648         PR lto/91576
12649         * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
12650         TYPE_MODE.
12651
12652 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
12653
12654         * Makefile.in (lang_opt_files): Add analyzer.opt.
12655         (ANALYZER_OBJS): New.
12656         (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
12657         tristate.o and ANALYZER_OBJS.
12658         (TEXI_GCCINT_FILES): Add analyzer.texi.
12659         * common.opt (-fanalyzer): New driver option.
12660         * config.in: Regenerate.
12661         * configure: Regenerate.
12662         * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
12663         (gccdepdir): Also create depdir for "analyzer" subdir.
12664         * digraph.cc: New file.
12665         * digraph.h: New file.
12666         * doc/analyzer.texi: New file.
12667         * doc/gccint.texi ("Static Analyzer") New menu item.
12668         (analyzer.texi): Include it.
12669         * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
12670         ("Warning Options"): Add static analysis warnings to the list.
12671         (-Wno-analyzer-double-fclose): New option.
12672         (-Wno-analyzer-double-free): New option.
12673         (-Wno-analyzer-exposure-through-output-file): New option.
12674         (-Wno-analyzer-file-leak): New option.
12675         (-Wno-analyzer-free-of-non-heap): New option.
12676         (-Wno-analyzer-malloc-leak): New option.
12677         (-Wno-analyzer-possible-null-argument): New option.
12678         (-Wno-analyzer-possible-null-dereference): New option.
12679         (-Wno-analyzer-null-argument): New option.
12680         (-Wno-analyzer-null-dereference): New option.
12681         (-Wno-analyzer-stale-setjmp-buffer): New option.
12682         (-Wno-analyzer-tainted-array-index): New option.
12683         (-Wno-analyzer-use-after-free): New option.
12684         (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
12685         (-Wno-analyzer-use-of-uninitialized-value): New option.
12686         (-Wanalyzer-too-complex): New option.
12687         (-fanalyzer-call-summaries): New warning.
12688         (-fanalyzer-checker=): New warning.
12689         (-fanalyzer-fine-grained): New warning.
12690         (-fno-analyzer-state-merge): New warning.
12691         (-fno-analyzer-state-purge): New warning.
12692         (-fanalyzer-transitivity): New warning.
12693         (-fanalyzer-verbose-edges): New warning.
12694         (-fanalyzer-verbose-state-changes): New warning.
12695         (-fanalyzer-verbosity=): New warning.
12696         (-fdump-analyzer): New warning.
12697         (-fdump-analyzer-callgraph): New warning.
12698         (-fdump-analyzer-exploded-graph): New warning.
12699         (-fdump-analyzer-exploded-nodes): New warning.
12700         (-fdump-analyzer-exploded-nodes-2): New warning.
12701         (-fdump-analyzer-exploded-nodes-3): New warning.
12702         (-fdump-analyzer-supergraph): New warning.
12703         * doc/sourcebuild.texi (dg-require-dot): New.
12704         (dg-check-dot): New.
12705         * gdbinit.in (break-on-saved-diagnostic): New command.
12706         * graphviz.cc: New file.
12707         * graphviz.h: New file.
12708         * ordered-hash-map-tests.cc: New file.
12709         * ordered-hash-map.h: New file.
12710         * passes.def (pass_analyzer): Add before
12711         pass_ipa_whole_program_visibility.
12712         * selftest-run-tests.c (selftest::run_tests): Call
12713         selftest::ordered_hash_map_tests_cc_tests.
12714         * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
12715         decl.
12716         * shortest-paths.h: New file.
12717         * timevar.def (TV_ANALYZER): New timevar.
12718         (TV_ANALYZER_SUPERGRAPH): Likewise.
12719         (TV_ANALYZER_STATE_PURGE): Likewise.
12720         (TV_ANALYZER_PLAN): Likewise.
12721         (TV_ANALYZER_SCC): Likewise.
12722         (TV_ANALYZER_WORKLIST): Likewise.
12723         (TV_ANALYZER_DUMP): Likewise.
12724         (TV_ANALYZER_DIAGNOSTICS): Likewise.
12725         (TV_ANALYZER_SHORTEST_PATHS): Likewise.
12726         * tree-pass.h (make_pass_analyzer): New decl.
12727         * tristate.cc: New file.
12728         * tristate.h: New file.
12729
12730 2020-01-14  Uroš Bizjak  <ubizjak@gmail.com>
12731
12732         PR target/93254
12733         * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
12734         alternatives 9 and 10.
12735
12736 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
12737
12738         * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
12739         * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
12740         * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
12741         * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
12742         (selftest::hash_map_tests_c_tests): Call it.
12743         * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
12744         New static constant, using the value of = H::empty_zero_p.
12745         (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
12746         from default_hash_traits <Value>.
12747         * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
12748         from Traits.
12749         * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
12750         * hash-table.h (hash_table::alloc_entries): Guard the loop of
12751         calls to mark_empty with !Descriptor::empty_zero_p.
12752         (hash_table::empty_slow): Conditionalize the memset call with a
12753         check that Descriptor::empty_zero_p; otherwise, loop through the
12754         entries calling mark_empty on them.
12755         * hash-traits.h (int_hash::empty_zero_p): New static constant.
12756         (pointer_hash::empty_zero_p): Likewise.
12757         (pair_hash::empty_zero_p): Likewise.
12758         * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
12759         Likewise.
12760         * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
12761         (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
12762         * profile.c (location_triplet_hash::empty_zero_p): Likewise.
12763         * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
12764         (sanopt_tree_couple_hash::empty_zero_p): Likewise.
12765         * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
12766         * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
12767         * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
12768         * tree-vectorizer.h
12769         (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
12770         Likewise.
12771
12772 2020-01-14  Kewen Lin  <linkw@gcc.gnu.org>
12773
12774         * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
12775         fix typo on return value.
12776
12777 2020-01-14  Xiong Hu Luo  <luoxhu@linux.ibm.com>
12778
12779         PR ipa/69678
12780         * cgraph.c (symbol_table::create_edge): Init speculative_id and
12781         target_prob.
12782         (cgraph_edge::make_speculative): Add param for setting speculative_id
12783         and target_prob.
12784         (cgraph_edge::speculative_call_info): Update comments and find reference
12785         by speculative_id for multiple indirect targets.
12786         (cgraph_edge::resolve_speculation): Decrease the speculations
12787         for indirect edge, drop it's speculative if not direct target
12788         left. Update comments.
12789         (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
12790         (cgraph_node::dump): Print num_speculative_call_targets.
12791         (cgraph_node::verify_node): Don't report error if speculative
12792         edge not include statement.
12793         (cgraph_edge::num_speculative_call_targets_p): New function.
12794         * cgraph.h (int common_target_id): Remove.
12795         (int common_target_probability): Remove.
12796         (num_speculative_call_targets): New variable.
12797         (make_speculative): Add param for setting speculative_id.
12798         (cgraph_edge::num_speculative_call_targets_p): New declare.
12799         (target_prob): New variable.
12800         (speculative_id): New variable.
12801         * ipa-fnsummary.c (analyze_function_body): Create and duplicate
12802           call summaries for multiple speculative call targets.
12803         * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
12804         * ipa-profile.c (struct speculative_call_target): New struct.
12805         (class speculative_call_summary): New class.
12806         (class speculative_call_summaries): New class.
12807         (call_sums): New variable.
12808         (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
12809         (ipa_profile_write_edge_summary): New function.
12810         (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
12811         (ipa_profile_dump_all_summaries): New function.
12812         (ipa_profile_read_edge_summary): New function.
12813         (ipa_profile_read_summary_section): New function.
12814         (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
12815         (ipa_profile): Generate num_speculative_call_targets from
12816         profile summaries.
12817         * ipa-ref.h (speculative_id): New variable.
12818         * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
12819         * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
12820         common_target_probability.   Stream out speculative_id and
12821         num_speculative_call_targets.
12822         (input_edge): Likewise.
12823         * predict.c (dump_prediction): Remove edges count assert to be
12824         precise.
12825         * symtab.c (symtab_node::create_reference): Init speculative_id.
12826         (symtab_node::clone_references): Clone speculative_id.
12827         (symtab_node::clone_referring): Clone speculative_id.
12828         (symtab_node::clone_reference): Clone speculative_id.
12829         (symtab_node::clear_stmts_in_references): Clear speculative_id.
12830         * tree-inline.c (copy_bb): Duplicate all the speculative edges
12831         if indirect call contains multiple speculative targets.
12832         * value-prof.h  (check_ic_target): Remove.
12833         * value-prof.c  (gimple_value_profile_transformations):
12834         Use void function gimple_ic_transform.
12835         * value-prof.c  (gimple_ic_transform): Handle topn case.
12836         Fix comment typos.  Change it to a void function.
12837
12838 2020-01-13  Andrew Pinski  <apinski@marvell.com>
12839
12840         * config/aarch64/aarch64-cores.def (octeontx2): New define.
12841         (octeontx2t98): New define.
12842         (octeontx2t96): New define.
12843         (octeontx2t93): New define.
12844         (octeontx2f95): New define.
12845         (octeontx2f95n): New define.
12846         (octeontx2f95mm): New define.
12847         * config/aarch64/aarch64-tune.md: Regenerate.
12848         * doc/invoke.texi (-mcpu=): Document the new cpu types.
12849
12850 2020-01-13  Jason Merrill  <jason@redhat.com>
12851
12852         PR c++/33799 - destroy return value if local cleanup throws.
12853         * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
12854
12855 2020-01-13  Martin Liska  <mliska@suse.cz>
12856
12857         * ipa-cp.c (get_max_overall_size): Use newly
12858         renamed param param_ipa_cp_unit_growth.
12859         * params.opt: Remove legacy param name.
12860
12861 2020-01-13  Martin Sebor  <msebor@redhat.com>
12862
12863         PR tree-optimization/93213
12864         * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
12865         stores to be eliminated.
12866
12867 2020-01-13  Martin Liska  <mliska@suse.cz>
12868
12869         * opts.c (print_help): Do not print CL_PARAM
12870         and CL_WARNING for CL_OPTIMIZATION.
12871
12872 2020-01-13  Jonathan Wakely  <jwakely@redhat.com>
12873
12874         PR driver/92757
12875         * doc/invoke.texi (Warning Options): Add caveat about some warnings
12876         depending on optimization settings.
12877
12878 2020-01-13  Jakub Jelinek  <jakub@redhat.com>
12879
12880         PR tree-optimization/90838
12881         * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
12882         SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
12883         argument rather than to initialize temporary for targets that
12884         don't use the mode argument at all.  Initialize ctzval to avoid
12885         warning at -O0.
12886
12887 2020-01-10  Thomas Schwinge  <thomas@codesourcery.com>
12888
12889         * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
12890         * tree-core.h: Document it.
12891         * gimplify.c (gimplify_omp_workshare): Set it.
12892         * omp-low.c (lower_omp_target): Use it.
12893         * tree-pretty-print.c (dump_omp_clause): Print it.
12894
12895         * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
12896         Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
12897
12898 2020-01-10  David Malcolm  <dmalcolm@redhat.com>
12899
12900         * Makefile.in (OBJS): Add tree-diagnostic-path.o.
12901         * common.opt (fdiagnostics-path-format=): New option.
12902         (diagnostic_path_format): New enum.
12903         (fdiagnostics-show-path-depths): New option.
12904         * coretypes.h (diagnostic_event_id_t): New forward decl.
12905         * diagnostic-color.c (color_dict): Add "path".
12906         * diagnostic-event-id.h: New file.
12907         * diagnostic-format-json.cc (json_from_expanded_location): Make
12908         non-static.
12909         (json_end_diagnostic): Call context->make_json_for_path if it
12910         exists and the diagnostic has a path.
12911         (diagnostic_output_format_init): Clear context->print_path.
12912         * diagnostic-path.h: New file.
12913         * diagnostic-show-locus.c (colorizer::set_range): Special-case
12914         when printing a run of events in a diagnostic_path so that they
12915         all get the same color.
12916         (layout::m_diagnostic_path_p): New field.
12917         (layout::layout): Initialize it.
12918         (layout::print_any_labels): Don't colorize the label text for an
12919         event in a diagnostic_path.
12920         (gcc_rich_location::add_location_if_nearby): Add
12921         "restrict_to_current_line_spans" and "label" params.  Pass the
12922         former to layout.maybe_add_location_range; pass the latter
12923         when calling add_range.
12924         * diagnostic.c: Include "diagnostic-path.h".
12925         (diagnostic_initialize): Initialize context->path_format and
12926         context->show_path_depths.
12927         (diagnostic_show_any_path): New function.
12928         (diagnostic_path::interprocedural_p): New function.
12929         (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
12930         (simple_diagnostic_path::num_events): New function.
12931         (simple_diagnostic_path::get_event): New function.
12932         (simple_diagnostic_path::add_event): New function.
12933         (simple_diagnostic_event::simple_diagnostic_event): New ctor.
12934         (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
12935         (debug): New overload taking a diagnostic_path *.
12936         * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
12937         * diagnostic.h (enum diagnostic_path_format): New enum.
12938         (json::value): New forward decl.
12939         (diagnostic_context::path_format): New field.
12940         (diagnostic_context::show_path_depths): New field.
12941         (diagnostic_context::print_path): New callback field.
12942         (diagnostic_context::make_json_for_path): New callback field.
12943         (diagnostic_show_any_path): New decl.
12944         (json_from_expanded_location): New decl.
12945         * doc/invoke.texi (-fdiagnostics-path-format=): New option.
12946         (-fdiagnostics-show-path-depths): New option.
12947         (-fdiagnostics-color): Add "path" to description of default
12948         GCC_COLORS; describe it.
12949         (-fdiagnostics-format=json): Document how diagnostic paths are
12950         represented in the JSON output format.
12951         * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
12952         Add optional params "restrict_to_current_line_spans" and "label".
12953         * opts.c (common_handle_option): Handle
12954         OPT_fdiagnostics_path_format_ and
12955         OPT_fdiagnostics_show_path_depths.
12956         * pretty-print.c: Include "diagnostic-event-id.h".
12957         (pp_format): Implement "%@" format code for printing
12958         diagnostic_event_id_t *.
12959         (selftest::test_pp_format): Add tests for "%@".
12960         * selftest-run-tests.c (selftest::run_tests): Call
12961         selftest::tree_diagnostic_path_cc_tests.
12962         * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
12963         * toplev.c (general_init): Initialize global_dc->path_format and
12964         global_dc->show_path_depths.
12965         * tree-diagnostic-path.cc: New file.
12966         * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
12967         non-static.  Drop "diagnostic" param in favor of storing the
12968         original value of "where" and re-using it.
12969         (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
12970         maybe_unwind_expanded_macro_loc.
12971         (tree_diagnostics_defaults): Initialize context->print_path and
12972         context->make_json_for_path.
12973         * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
12974         decl.
12975         (default_tree_make_json_for_path): New decl.
12976         (maybe_unwind_expanded_macro_loc): New decl.
12977
12978 2020-01-10  Jakub Jelinek  <jakub@redhat.com>
12979
12980         PR tree-optimization/93210
12981         * fold-const.h (native_encode_initializer,
12982         can_native_interpret_type_p): Declare.
12983         * fold-const.c (native_encode_string): Fix up handling with off != -1,
12984         simplify.
12985         (native_encode_initializer): New function, moved from dwarf2out.c.
12986         Adjust to native_encode_expr compatible arguments, including dry-run
12987         and partial extraction modes.  Don't handle STRING_CST.
12988         (can_native_interpret_type_p): No longer static.
12989         * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
12990         offset / BITS_PER_UNIT fits into int and don't call it if
12991         can_native_interpret_type_p fails.  If suboff is NULL and for
12992         CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
12993         native_encode_initializer.
12994         (fold_const_aggregate_ref_1): Formatting fix.
12995         * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
12996         (tree_add_const_value_attribute): Adjust caller.
12997
12998         PR tree-optimization/90838
12999         * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
13000         SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
13001         CTZ_DEFINED_VALUE_AT_ZERO.
13002
13003 2020-01-10  Vladimir Makarov  <vmakarov@redhat.com>
13004
13005         PR inline-asm/93027
13006         * lra-constraints.c (match_reload): Permit input operands have the
13007         same mode as output while other input operands have a different
13008         mode.
13009
13010 2020-01-10  Wilco Dijkstra  <wdijkstr@arm.com>
13011
13012         PR tree-optimization/90838
13013         * tree-ssa-forwprop.c (check_ctz_array): Add new function.
13014         (check_ctz_string): Likewise.
13015         (optimize_count_trailing_zeroes): Likewise.
13016         (simplify_count_trailing_zeroes): Likewise.
13017         (pass_forwprop::execute): Try ctz simplification.
13018         * match.pd: Add matching for ctz idioms.
13019
13020 2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
13021
13022         * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
13023         for target hook.
13024         (aarch64_invalid_unary_op): New function for target hook.
13025         (aarch64_invalid_binary_op): New function for target hook.
13026
13027 2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
13028
13029         * config.gcc: Add arm_bf16.h.
13030         * config/aarch64/aarch64-builtins.c
13031         (aarch64_simd_builtin_std_type): Add BFmode.
13032         (aarch64_init_simd_builtin_types): Define element types for vector
13033         types.
13034         (aarch64_init_bf16_types): New function.
13035         (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
13036         * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
13037         modes.
13038         * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
13039         * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
13040         patterns.
13041         * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
13042         (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
13043         * config/aarch64/aarch64.c
13044         (aarch64_classify_vector_mode): Add support for BF types.
13045         (aarch64_gimplify_va_arg_expr): Add support for BF types.
13046         (aarch64_vq_mode): Add support for BF types.
13047         (aarch64_simd_container_mode): Add support for BF types.
13048         (aarch64_mangle_type): Add support for BF scalar type.
13049         * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
13050         * config/aarch64/arm_bf16.h: New file.
13051         * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
13052         * config/aarch64/iterators.md: Add BF types to mode attributes.
13053         (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
13054
13055 2020-01-10  Jason Merrill  <jason@redhat.com>
13056
13057         PR c++/93173 - incorrect tree sharing.
13058         * gimplify.c (copy_if_shared): No longer static.
13059         * gimplify.h: Declare it.
13060
13061 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
13062
13063         * doc/invoke.texi (-msve-vector-bits=): Document that
13064         -msve-vector-bits=128 now generates VL-specific code for
13065         little-endian targets.
13066         * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
13067         build_vector_type_for_mode to construct the data vector types.
13068         * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
13069         VL-specific code for -msve-vector-bits=128 on little-endian targets.
13070         (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
13071         for 128-bit vectors.
13072
13073 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
13074
13075         * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
13076         invocation.
13077
13078 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
13079
13080         * config/aarch64/aarch64-builtins.c
13081         (aarch64_builtin_vectorized_function): Check for specific vector modes,
13082         rather than checking the number of elements and the element mode.
13083
13084 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
13085
13086         * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
13087         get_related_vectype_for_scalar_type rather than build_vector_type
13088         to create the index type for a conditional reduction.
13089
13090 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
13091
13092         * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
13093         for any type of gather or scatter, including strided accesses.
13094
13095 2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>
13096
13097         * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
13098          comment.
13099
13100 2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>
13101
13102         * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
13103         get_dr_vinfo_offset
13104         * tree-vect-loop.c (update_epilogue_loop_vinfo):  Remove orig_drs_init
13105         parameter and its use to reset DR_OFFSET's.
13106         (vect_transform_loop): Remove orig_drs_init argument.
13107         * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
13108         member of dr_vec_info rather than the offset of the associated
13109         data_reference's innermost_loop_behavior.
13110         (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
13111         (vect_do_peeling): Remove orig_drs_init parameter and its construction.
13112         * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
13113         get_dr_vinfo_offset.
13114         (vectorizable_store): Likewise.
13115         (vectorizable_load): Likewise.
13116
13117 2020-01-10  Richard Biener  <rguenther@suse.de>
13118
13119         * gimple-ssa-store-merging
13120         (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
13121
13122 2020-01-10  Martin Liska  <mliska@suse.cz>
13123
13124         PR ipa/93217
13125         * ipa-inline-analysis.c (offline_size): Make proper parenthesis
13126         encapsulation that was there before r280040.
13127
13128 2020-01-10  Richard Biener  <rguenther@suse.de>
13129
13130         PR middle-end/93199
13131         * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
13132         sequences to avoid walking them again for secondary opportunities.
13133         (pass_lower_eh_dispatch::execute): Instead actually insert
13134         them here.
13135
13136 2020-01-10  Richard Biener  <rguenther@suse.de>
13137
13138         PR middle-end/93199
13139         * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
13140         (cleanup_all_empty_eh): Walk landing pads in reverse order to
13141         avoid quadraticness.
13142
13143 2020-01-10  Martin Jambor  <mjambor@suse.cz>
13144
13145         * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
13146         * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
13147         to get param_ipa_sra_max_replacements.
13148         (param_splitting_across_edge): Pass the caller to
13149         pull_accesses_from_callee.
13150
13151 2020-01-10  Martin Jambor  <mjambor@suse.cz>
13152
13153         * params.opt (param_ipcp_unit_growth): Mark as Optimization.
13154         * ipa-cp.c (max_new_size): Removed.
13155         (orig_overall_size): New variable.
13156         (get_max_overall_size): New function.
13157         (estimate_local_effects): Use it.  Adjust dump.
13158         (decide_about_value): Likewise.
13159         (ipcp_propagate_stage): Do not calculate max_new_size, just store
13160         orig_overall_size.  Adjust dump.
13161         (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
13162
13163 2020-01-10  Martin Jambor  <mjambor@suse.cz>
13164
13165         * params.opt (param_ipa_max_agg_items): Mark as Optimization
13166         * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
13167         instead of param_ipa_max_agg_items.
13168         (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
13169         optimization info for the callee.
13170
13171 2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>
13172
13173         * lto-streamer-in.c (input_function): Remove streamed-in inline debug
13174         markers if debug_inline_points is false.
13175
13176 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13177
13178         * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
13179         extra_objs.
13180         * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
13181         aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
13182         aarch64-sve-builtins-sve2.h.
13183         (aarch64-sve-builtins-sve2.o): New rule.
13184         * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
13185         (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
13186         (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
13187         (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
13188         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
13189         TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
13190         TARGET_SVE2_SM4.
13191         * config/aarch64/aarch64-sve.md: Update comments with SVE2
13192         instructions that are handled here.
13193         (@cond_asrd<mode>): Generalize to...
13194         (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
13195         (*cond_asrd<mode>_2): Generalize to...
13196         (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
13197         (*cond_asrd<mode>_z): Generalize to...
13198         (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
13199         * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
13200         (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
13201         (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
13202         * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
13203         pattern.
13204         (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
13205         (@aarch64_scatter_stnt<mode>): Likewise.
13206         (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
13207         (@aarch64_mul_lane_<mode>): Likewise.
13208         (@aarch64_sve_suqadd<mode>_const): Likewise.
13209         (*<sur>h<addsub><mode>): Generalize to...
13210         (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
13211         new pattern.
13212         (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
13213         (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
13214         (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
13215         (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
13216         (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
13217         (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
13218         (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
13219         (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
13220         (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
13221         (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
13222         (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
13223         (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
13224         (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
13225         (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
13226         (@aarch64_sve_add_mul_lane_<mode>): Likewise.
13227         (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
13228         (@aarch64_sve2_xar<mode>): Likewise.
13229         (@aarch64_sve2_bcax<mode>): Likewise.
13230         (*aarch64_sve2_eor3<mode>): Rename to...
13231         (@aarch64_sve2_eor3<mode>): ...this.
13232         (@aarch64_sve2_bsl<mode>): New expander.
13233         (@aarch64_sve2_nbsl<mode>): Likewise.
13234         (@aarch64_sve2_bsl1n<mode>): Likewise.
13235         (@aarch64_sve2_bsl2n<mode>): Likewise.
13236         (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
13237         (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
13238         (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
13239         (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
13240         (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
13241         (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
13242         (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
13243         (<su>mull<bt><Vwide>): Generalize to...
13244         (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
13245         pattern.
13246         (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
13247         (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
13248         (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
13249         (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
13250         (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
13251         (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
13252         (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
13253         (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
13254         (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
13255         (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
13256         (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
13257         (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
13258         (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
13259         (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
13260         (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
13261         (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
13262         (<SHRNB:r>shrnb<mode>): Generalize to...
13263         (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
13264         new pattern.
13265         (<SHRNT:r>shrnt<mode>): Generalize to...
13266         (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
13267         new pattern.
13268         (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
13269         (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
13270         (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
13271         (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
13272         (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
13273         (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
13274         (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
13275         (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
13276         (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
13277         (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
13278         (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
13279         (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
13280         (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
13281         (@aarch64_sve2_cvtnt<mode>): Likewise.
13282         (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
13283         (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
13284         (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
13285         (@aarch64_sve2_cvtxnt<mode>): Likewise.
13286         (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
13287         (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
13288         (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
13289         (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
13290         (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
13291         (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
13292         (@aarch64_sve2_pmul<mode>): Likewise.
13293         (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
13294         (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
13295         (@aarch64_sve2_tbl2<mode>): Likewise.
13296         (@aarch64_sve2_tbx<mode>): Likewise.
13297         (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
13298         (@aarch64_sve2_histcnt<mode>): Likewise.
13299         (@aarch64_sve2_histseg<mode>): Likewise.
13300         (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
13301         (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
13302         (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
13303         (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
13304         (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
13305         (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
13306         (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
13307         (<su>mulh<r>s<mode>3): Update after above pattern name changes.
13308         * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
13309         (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
13310         (SVE2_PMULL_PAIR_I): New mode iterators.
13311         (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
13312         (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
13313         (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
13314         (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
13315         (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
13316         (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
13317         (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
13318         (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
13319         (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
13320         (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
13321         (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
13322         (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
13323         (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
13324         (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
13325         (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
13326         (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
13327         (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
13328         (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
13329         (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
13330         (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
13331         (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
13332         (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
13333         (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
13334         (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
13335         (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
13336         (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
13337         (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
13338         (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
13339         (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
13340         (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
13341         (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
13342         further down file.
13343         (VNARROW, Ventype): New mode attributes.
13344         (Vewtype): Handle VNx2DI.  Fix typo in comment.
13345         (VDOUBLE): New mode attribute.
13346         (sve_lane_con): Handle VNx8HI.
13347         (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
13348         (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
13349         (sve_int_op, sve_int_op_rev): Handle the above codes.
13350         (sve_pred_int_rhs2_operand): Likewise.
13351         (MULLBT, SHRNB, SHRNT): Delete.
13352         (SVE_INT_SHIFT_IMM): New int iterator.
13353         (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
13354         and UNSPEC_WHILEHS for TARGET_SVE2.
13355         (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
13356         (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
13357         (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
13358         (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
13359         (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
13360         (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
13361         (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
13362         (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
13363         (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
13364         (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
13365         (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
13366         (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
13367         (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
13368         (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
13369         (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
13370         (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
13371         (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
13372         (optab): Handle the new unspecs.
13373         (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
13374         and UNSPEC_RSHRNT.
13375         (lr): Handle the new unspecs.
13376         (bt): Delete.
13377         (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
13378         (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
13379         (sve_int_qsub_op): New int attributes.
13380         (sve_fp_op, rot): Handle the new unspecs.
13381         * config/aarch64/aarch64-sve-builtins.h
13382         (function_resolver::require_matching_pointer_type): Declare.
13383         (function_resolver::resolve_unary): Add an optional boolean argument.
13384         (function_resolver::finish_opt_n_resolution): Add an optional
13385         type_suffix_index argument.
13386         (gimple_folder::redirect_call): Declare.
13387         (gimple_expander::prepare_gather_address_operands): Add an optional
13388         bool parameter.
13389         * config/aarch64/aarch64-sve-builtins.cc: Include
13390         aarch64-sve-builtins-sve2.h.
13391         (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
13392         (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
13393         (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
13394         (TYPES_hsd_integer): Use TYPES_hsd_signed.
13395         (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
13396         (TYPES_s_unsigned): Likewise.
13397         (TYPES_s_integer): Use TYPES_s_unsigned.
13398         (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
13399         (TYPES_sd_integer): Use them.
13400         (TYPES_d_unsigned): New macro.
13401         (TYPES_d_integer): Use it.
13402         (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
13403         (TYPES_cvt_narrow): Likewise.
13404         (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
13405         (preds_mx): New variable.
13406         (function_builder::add_overloaded_function): Allow the new feature
13407         set to be more restrictive than the original one.
13408         (function_resolver::infer_pointer_type): Remove qualifiers from
13409         the pointer type before printing it.
13410         (function_resolver::require_matching_pointer_type): New function.
13411         (function_resolver::resolve_sv_displacement): Handle functions
13412         that don't support 32-bit vector indices or svint32_t vector offsets.
13413         (function_resolver::finish_opt_n_resolution): Take the inferred type
13414         as a separate argument.
13415         (function_resolver::resolve_unary): Optionally treat all forms in
13416         the same way as normal merging functions.
13417         (gimple_folder::redirect_call): New function.
13418         (function_expander::prepare_gather_address_operands): Add an argument
13419         that says whether scaled forms are available.  If they aren't,
13420         handle scaling of vector indices and don't add the extension and
13421         scaling operands.
13422         (function_expander::map_to_unspecs): If aarch64_sve isn't available,
13423         fall back to using cond_* instead.
13424         * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
13425         Split out the member variables into...
13426         (rtx_code_function_base): ...this new base class.
13427         (rtx_code_function_rotated): Inherit rtx_code_function_base.
13428         (unspec_based_function): Split out the member variables into...
13429         (unspec_based_function_base): ...this new base class.
13430         (unspec_based_function_rotated): Inherit unspec_based_function_base.
13431         (unspec_based_function_exact_insn): New class.
13432         (unspec_based_add_function, unspec_based_add_lane_function)
13433         (unspec_based_lane_function, unspec_based_pred_function)
13434         (unspec_based_qadd_function, unspec_based_qadd_lane_function)
13435         (unspec_based_qsub_function, unspec_based_qsub_lane_function)
13436         (unspec_based_sub_function, unspec_based_sub_lane_function): New
13437         typedefs.
13438         (unspec_based_fused_function): New class.
13439         (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
13440         (unspec_based_fused_lane_function): New class.
13441         (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
13442         typedefs.
13443         (CODE_FOR_MODE1): New macro.
13444         (fixed_insn_function): New class.
13445         (while_comparison): Likewise.
13446         * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
13447         (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
13448         (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
13449         (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
13450         (load_gather_sv_restricted, shift_left_imm_long): Declare.
13451         (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
13452         (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
13453         (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
13454         (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
13455         (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
13456         (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
13457         (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
13458         (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
13459         * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
13460         Also add an initial argument for unary_convert_narrowt, regardless
13461         of the predication type.
13462         (build_32_64): Allow loads and stores to specify MODE_none.
13463         (build_sv_index64, build_sv_uint_offset): New functions.
13464         (long_type_suffix): New function.
13465         (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
13466         (binary_imm_long_base, load_gather_sv_base): Likewise.
13467         (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
13468         (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
13469         (unary_narrowb_base, unary_narrowt_base): Likewise.
13470         (binary_long_lane_def, binary_long_lane): New shape.
13471         (binary_long_opt_n_def, binary_long_opt_n): Likewise.
13472         (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
13473         (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
13474         (binary_to_uint_def, binary_to_uint): Likewise.
13475         (binary_wide_def, binary_wide): Likewise.
13476         (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
13477         (compare_def, compare): Likewise.
13478         (compare_ptr_def, compare_ptr): Likewise.
13479         (load_ext_gather_index_restricted_def,
13480         load_ext_gather_index_restricted): Likewise.
13481         (load_ext_gather_offset_restricted_def,
13482         load_ext_gather_offset_restricted): Likewise.
13483         (load_gather_sv_def): Inherit from load_gather_sv_base.
13484         (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
13485         (shift_left_imm_def, shift_left_imm): Likewise.
13486         (shift_left_imm_long_def, shift_left_imm_long): Likewise.
13487         (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
13488         (store_scatter_index_restricted_def,
13489         store_scatter_index_restricted): Likewise.
13490         (store_scatter_offset_restricted_def,
13491         store_scatter_offset_restricted): Likewise.
13492         (tbl_tuple_def, tbl_tuple): Likewise.
13493         (ternary_long_lane_def, ternary_long_lane): Likewise.
13494         (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
13495         (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
13496         (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
13497         (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
13498         (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
13499         (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
13500         (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
13501         (ternary_uint_def, ternary_uint): Likewise.
13502         (unary_convert): Fix typo in comment.
13503         (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
13504         (unary_long_def, unary_long): Likewise.
13505         (unary_narrowb_def, unary_narrowb): Likewise.
13506         (unary_narrowt_def, unary_narrowt): Likewise.
13507         (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
13508         (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
13509         (unary_to_int_def, unary_to_int): Likewise.
13510         * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
13511         (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
13512         (svasrd_impl): Delete.
13513         (svcadd_impl::expand): Handle integer operations too.
13514         (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
13515         new functions to derive the unspec numbers.
13516         (svmla_svmls_lane_impl): Replace with...
13517         (svmla_lane_impl, svmls_lane_impl): ...these new classes.  Handle
13518         integer operations too.
13519         (svwhile_impl): Rename to...
13520         (svwhilelx_impl): ...this and inherit from while_comparison.
13521         (svasrd): Use unspec_based_function.
13522         (svmla_lane): Use svmla_lane_impl.
13523         (svmls_lane): Use svmls_lane_impl.
13524         (svrecpe, svrsqrte): Handle unsigned integer operations too.
13525         (svwhilele, svwhilelt): Use svwhilelx_impl.
13526         * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
13527         * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
13528         * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
13529         * config/aarch64/aarch64-sve-builtins.def: Include
13530         aarch64-sve-builtins-sve2.def.
13531
13532 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13533
13534         * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
13535         (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
13536         * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
13537         (aarch64_sve_sqadd_sqsub_immediate_p): Likewise.  Handle scalar
13538         immediates as well as vector ones.
13539         * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
13540         (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
13541         (aarch64_sve_qsub_immediate): Update calls accordingly.
13542
13543 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13544
13545         * config/aarch64/aarch64-sve2.md: Add banner comments.
13546         (<su>mulh<r>s<mode>3): Move further up file.
13547         (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
13548         (*aarch64_sve2_sra<mode>): Move further down file.
13549         * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
13550
13551 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13552
13553         * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
13554         and UNSPEC_WHILEWR.
13555         (while_optab_cmp): Handle them.
13556         * config/aarch64/aarch64-sve.md
13557         (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
13558         and add a "@" marker.
13559         * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
13560         instead of gen_aarch64_sve2_while_ptest.
13561         (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
13562
13563 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13564
13565         * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
13566         (UNSPEC_WHILELE): ...this.
13567         (UNSPEC_WHILE_LO): Rename to...
13568         (UNSPEC_WHILELO): ...this.
13569         (UNSPEC_WHILE_LS): Rename to...
13570         (UNSPEC_WHILELS): ...this.
13571         (UNSPEC_WHILE_LT): Rename to...
13572         (UNSPEC_WHILELT): ...this.
13573         * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
13574         (cmp_op, while_optab_cmp): Likewise.
13575         * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
13576         * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
13577         (svwhilelt): Likewise.
13578
13579 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13580
13581         * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
13582         (unary_to_uint): Define.
13583         * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
13584         (unary_count): Rename to...
13585         (unary_to_uint_def, unary_to_uint): ...this.
13586         * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
13587
13588 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13589
13590         * config/aarch64/aarch64-sve-builtins-functions.h
13591         (code_for_mode_function): New class.
13592         (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
13593         * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
13594         (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
13595         (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
13596         (svmul_lane, svtmad): Use CODE_FOR_MODE0.
13597
13598 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13599
13600         * config/aarch64/iterators.md (addsub): New code attribute.
13601         * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
13602         Re-express as...
13603         (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
13604         in the asm string and attributes.  Fix indentation.
13605         * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
13606         Re-express as...
13607         (@aarch64_sve_<optab><mode>): ...this.
13608         * config/aarch64/aarch64-sve-builtins.h
13609         (function_expander::expand_signed_unpred_op): Delete.
13610         * config/aarch64/aarch64-sve-builtins.cc
13611         (function_expander::expand_signed_unpred_op): Likewise.
13612         (function_expander::map_to_rtx_codes): If the optab isn't defined,
13613         try using code_for_aarch64_sve instead.
13614         * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
13615         (svqsub_impl): Likewise.
13616         (svqadd, svqsub): Use rtx_code_function instead.
13617
13618 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13619
13620         * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
13621         (HADDSUB, sur, addsub): Remove them.
13622
13623 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13624
13625         * tree-nrv.c (pass_return_slot::execute): Handle all internal
13626         functions the same way, rather than singling out those that
13627         aren't mapped directly to optabs.
13628
13629 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
13630
13631         * target.def (compatible_vector_types_p): New target hook.
13632         * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
13633         * hooks.c (hook_bool_const_tree_const_tree_true): New function.
13634         * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
13635         * doc/tm.texi: Regenerate.
13636         * gimple-expr.c: Include target.h.
13637         (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
13638         * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
13639         function.
13640         (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
13641         * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
13642         Use the original predicate if it already has a suitable type.
13643
13644 2020-01-09  Martin Jambor  <mjambor@suse.cz>
13645
13646         * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
13647         resolve_speculation and redirect_call_stmt_to_callee static.  Change
13648         return type of set_call_stmt to cgraph_edge *.
13649         * auto-profile.c (afdo_indirect_call): Adjust call to
13650         redirect_call_stmt_to_callee.
13651         * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
13652         make the this pointer explicit, adjust self-recursive calls and the
13653         call top make_direct.  Return the resulting edge.
13654         (cgraph_edge::remove): Make this pointer explicit.
13655         (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
13656         (cgraph_edge::make_direct): Likewise, adjust call to
13657         resolve_speculation.
13658         (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
13659         call to set_call_stmt.
13660         (cgraph_update_edges_for_call_stmt_node): Update call to
13661         set_call_stmt and remove.
13662         * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
13663         Renamed edge to master_edge.  Adjusted calls to set_call_stmt.
13664         (cgraph_node::create_edge_including_clones): Moved "first" definition
13665         of edge to the block where it was used.  Adjusted calls to
13666         set_call_stmt.
13667         (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
13668         cgraph_edge::remove.
13669         * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
13670         make_direct and redirect_call_stmt_to_callee.
13671         * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
13672         resolve_speculation and make_direct.
13673         * ipa-inline-transform.c (inline_transform): Adjust call to
13674         redirect_call_stmt_to_callee.
13675         (check_speculations_1):: Adjust call to resolve_speculation.
13676         * ipa-inline.c (resolve_noninline_speculation): Adjust call to
13677         resolve-speculation.
13678         (inline_small_functions): Adjust call to resolve_speculation.
13679         (ipa_inline): Likewise.
13680         * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
13681         make_direct.
13682         * ipa-visibility.c (function_and_variable_visibility): Make iteration
13683         safe with regards to edge removal, adjust calls to
13684         redirect_call_stmt_to_callee.
13685         * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
13686         and redirect_call_stmt_to_callee.
13687         * multiple_target.c (create_dispatcher_calls): Adjust call to
13688         redirect_call_stmt_to_callee
13689         (redirect_to_specific_clone): Likewise.
13690         * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
13691         Adjust calls to cgraph_edge::remove.
13692         * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
13693         (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
13694         (expand_call_inline): Adjust call to cgraph_edge::remove.
13695
13696 2020-01-09  Martin Liska  <mliska@suse.cz>
13697
13698         * params.opt: Set Optimization for
13699         param_max_speculative_devirt_maydefs.
13700
13701 2020-01-09  Martin Sebor  <msebor@redhat.com>
13702
13703         PR middle-end/93200
13704         PR fortran/92956
13705         * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
13706
13707 2020-01-09  Martin Liska  <mliska@suse.cz>
13708
13709         * auto-profile.c (auto_profile): Use opt_for_fn
13710         for a parameter.
13711         * ipa-cp.c (ipcp_lattice::add_value): Likewise.
13712         (propagate_vals_across_arith_jfunc): Likewise.
13713         (hint_time_bonus): Likewise.
13714         (incorporate_penalties): Likewise.
13715         (good_cloning_opportunity_p): Likewise.
13716         (perform_estimation_of_a_value): Likewise.
13717         (estimate_local_effects): Likewise.
13718         (ipcp_propagate_stage): Likewise.
13719         * ipa-fnsummary.c (decompose_param_expr): Likewise.
13720         (set_switch_stmt_execution_predicate): Likewise.
13721         (analyze_function_body): Likewise.
13722         * ipa-inline-analysis.c (offline_size): Likewise.
13723         * ipa-inline.c (early_inliner): Likewise.
13724         * ipa-prop.c (ipa_analyze_node): Likewise.
13725         (ipcp_transform_function): Likewise.
13726         * ipa-sra.c (process_scan_results): Likewise.
13727         (ipa_sra_summarize_function): Likewise.
13728         * params.opt: Rename ipcp-unit-growth to
13729         ipa-cp-unit-growth.  Add Optimization for various
13730         IPA-related parameters.
13731
13732 2020-01-09  Richard Biener  <rguenther@suse.de>
13733
13734         PR middle-end/93054
13735         * gimplify.c (gimplify_expr): Deal with NOP definitions.
13736
13737 2020-01-09  Richard Biener  <rguenther@suse.de>
13738
13739         PR tree-optimization/93040
13740         * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
13741
13742 2020-01-09  Georg-Johann Lay  <avr@gjlay.de>
13743
13744         * common/config/avr/avr-common.c (avr_option_optimization_table)
13745         [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
13746
13747 2020-01-09  Martin Liska  <mliska@suse.cz>
13748
13749         * cgraphclones.c (symbol_table::materialize_all_clones):
13750         Use cgraph_node::dump_name.
13751
13752 2020-01-09  Jakub Jelinek  <jakub@redhat.com>
13753
13754         PR inline-asm/93202
13755         * config/riscv/riscv.c (riscv_print_operand_reloc): Use
13756         output_operand_lossage instead of gcc_unreachable.
13757         * doc/md.texi (riscv f constraint): Fix typo.
13758
13759         PR target/93141
13760         * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
13761         SWI.  Use <general_hilo_operand> instead of <general_operand>.  Use
13762         CONST_SCALAR_INT_P instead of CONST_INT_P.
13763         (*subv<mode>4_1): Rename to ...
13764         (subv<mode>4_1): ... this.
13765         (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
13766         define_insn_and_split patterns.
13767         (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
13768         patterns.
13769
13770 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
13771
13772         * vec.c (class selftest::count_dtor): New class.
13773         (selftest::test_auto_delete_vec): New test.
13774         (selftest::vec_c_tests): Call it.
13775         * vec.h (class auto_delete_vec): New class template.
13776         (auto_delete_vec<T>::~auto_delete_vec): New dtor.
13777
13778 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
13779
13780         * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
13781
13782 2020-01-08  Jim Wilson  <jimw@sifive.com>
13783
13784         * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
13785         use of TLS_MODEL_LOCAL_EXEC when not pic.
13786
13787 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
13788
13789         * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
13790         memory leak.
13791
13792 2020-01-08  Jakub Jelinek  <jakub@redhat.com>
13793
13794         PR target/93187
13795         * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
13796         *stack_protect_set_3 peephole2): Also check that the second
13797         insns source is general_operand.
13798
13799         PR target/93174
13800         * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
13801         predicate for output operand instead of register_operand.
13802         (addcarry<mode>, addcarry<mode>_1): Likewise.  Add alternative with
13803         memory destination and non-memory operands[2].
13804
13805 2020-01-08  Martin Liska  <mliska@suse.cz>
13806
13807         * cgraph.c (cgraph_node::dump): Use ::dump_name or
13808         ::dump_asm_name instead of (::name or ::asm_name).
13809         * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
13810         * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
13811         (analyze_functions): Likewise.
13812         (expand_all_functions): Likewise.
13813         * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
13814         (propagate_bits_across_jump_function): Likewise.
13815         (dump_profile_updates): Likewise.
13816         (ipcp_store_bits_results): Likewise.
13817         (ipcp_store_vr_results): Likewise.
13818         * ipa-devirt.c (dump_targets): Likewise.
13819         * ipa-fnsummary.c (analyze_function_body): Likewise.
13820         * ipa-hsa.c (check_warn_node_versionable): Likewise.
13821         (process_hsa_functions): Likewise.
13822         * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
13823         (set_alias_uids): Likewise.
13824         * ipa-inline-transform.c (save_inline_function_body): Likewise.
13825         * ipa-inline.c (recursive_inlining): Likewise.
13826         (inline_to_all_callers_1): Likewise.
13827         (ipa_inline): Likewise.
13828         * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
13829         (ipa_propagate_frequency): Likewise.
13830         * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
13831         (remove_described_reference): Likewise.
13832         * ipa-pure-const.c (worse_state): Likewise.
13833         (check_retval_uses): Likewise.
13834         (analyze_function): Likewise.
13835         (propagate_pure_const): Likewise.
13836         (propagate_nothrow): Likewise.
13837         (dump_malloc_lattice): Likewise.
13838         (propagate_malloc): Likewise.
13839         (pass_local_pure_const::execute): Likewise.
13840         * ipa-visibility.c (optimize_weakref): Likewise.
13841         (function_and_variable_visibility): Likewise.
13842         * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
13843         (ipa_discover_variable_flags): Likewise.
13844         * lto-streamer-out.c (output_function): Likewise.
13845         (output_constructor): Likewise.
13846         * tree-inline.c (copy_bb): Likewise.
13847         * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
13848         * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
13849
13850 2020-01-08  Richard Biener  <rguenther@suse.de>
13851
13852         PR middle-end/93199
13853         * tree-eh.c (sink_clobbers): Update virtual operands for
13854         the first and last stmt only.  Add a dry-run capability.
13855         (pass_lower_eh_dispatch::execute): Perform clobber sinking
13856         after CFG manipulations and in RPO order to catch all
13857         secondary opportunities reliably.
13858
13859 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
13860
13861         PR target/93182
13862         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
13863
13864 2019-01-08  Richard Biener  <rguenther@suse.de>
13865
13866         PR middle-end/93199
13867         * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
13868         * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
13869         virtual operand, also updating SSA use.
13870         * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
13871         Update stmt after resetting virtual operand.
13872         (tree_loop_interchange::move_code_to_inner_loop): Likewise.
13873         * gimple-iterator.c (gsi_remove): When not removing the stmt
13874         permanently do not delink immediate uses or mark the stmt modified.
13875
13876 2020-01-08  Martin Liska  <mliska@suse.cz>
13877
13878         * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
13879         (ipa_call_context::estimate_size_and_time): Likewise.
13880         (inline_analyze_function): Likewise.
13881
13882 2020-01-08  Martin Liska  <mliska@suse.cz>
13883
13884         * cgraph.c (cgraph_node::dump): Use systematically
13885         dump_asm_name.
13886
13887 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
13888
13889         Add -nodevicespecs option for avr.
13890
13891         PR target/93182
13892         * config/avr/avr.opt (-nodevicespecs): New driver option.
13893         * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
13894         "-specs=device-specs/..." if that option is not set.
13895         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
13896
13897 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
13898
13899         Implement 64-bit double functions for avr.
13900
13901         PR target/92055
13902         * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
13903         --with-double-comparison.
13904         * doc/install.texi: Document them.
13905         * config/avr/avr-c.c (avr_cpu_cpp_builtins)
13906         <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
13907         <WITH_DOUBLE_COMPARISON>: New built-in defines.
13908         * doc/invoke.texi (AVR Built-in Macros): Document them.
13909         * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
13910         * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
13911         * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
13912
13913 2020-01-08  Richard Earnshaw  <rearnsha@arm.com>
13914
13915         PR target/93188
13916         * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
13917         armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
13918         when only building rm-profile multilibs.
13919
13920 2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>
13921
13922         PR ipa/93084
13923         * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
13924         lattice for a value to check.
13925         (propagate_vals_across_arith_jfunc): Add an assertion to ensure
13926         finite propagation in self-recursive scc.
13927
13928 2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>
13929
13930         * ipa-inline.c (caller_growth_limits): Restore the AND.
13931
13932 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
13933
13934         * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
13935         (VEC_ALLREG_ALT): New iterator.
13936         (VEC_ALLREG_INT_MODE): New iterator.
13937         (VCMP_MODE): New iterator.
13938         (VCMP_MODE_INT): New iterator.
13939         (vec_cmpu<mode>di): Use VCMP_MODE_INT.
13940         (vec_cmp<u>v64qidi): New define_expand.
13941         (vec_cmp<mode>di_exec): Use VCMP_MODE.
13942         (vec_cmpu<mode>di_exec): New define_expand.
13943         (vec_cmp<u>v64qidi_exec): New define_expand.
13944         (vec_cmp<mode>di_dup): Use VCMP_MODE.
13945         (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
13946         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
13947         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
13948         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
13949         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
13950         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
13951         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
13952         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
13953         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
13954         this.
13955         * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
13956         * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
13957
13958 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
13959
13960         * config/gcn/constraints.md (DA): Update description and match.
13961         (DB): Likewise.
13962         (Db): New constraint.
13963         * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
13964         parameter.
13965         * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
13966         Implement 'Db' mixed immediate type.
13967         * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
13968         (addcv64si3_dup<exec_vcc>): Delete.
13969         (subcv64si3<exec_vcc>): Rework constraints.
13970         (addv64di3): Rework constraints.
13971         (addv64di3_exec): Rework constraints.
13972         (subv64di3): Rework constraints.
13973         (addv64di3_dup): Delete.
13974         (addv64di3_dup_exec): Delete.
13975         (addv64di3_zext): Rework constraints.
13976         (addv64di3_zext_exec): Rework constraints.
13977         (addv64di3_zext_dup): Rework constraints.
13978         (addv64di3_zext_dup_exec): Rework constraints.
13979         (addv64di3_zext_dup2): Rework constraints.
13980         (addv64di3_zext_dup2_exec): Rework constraints.
13981         (addv64di3_sext_dup2): Rework constraints.
13982         (addv64di3_sext_dup2_exec): Rework constraints.
13983
13984 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
13985
13986         * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
13987         existing target checks.
13988
13989 2020-01-07  Richard Biener  <rguenther@suse.de>
13990
13991         * doc/install.texi: Bump minimal supported MPC version.
13992
13993 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
13994
13995         * langhooks-def.h (lhd_simulate_enum_decl): Declare.
13996         (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
13997         * langhooks.c: Include stor-layout.h.
13998         (lhd_simulate_enum_decl): New function.
13999         * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
14000         handle_arm_sve_h for the LTO frontend.
14001         (register_vector_type): Cope with null returns from pushdecl.
14002
14003 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
14004
14005         * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
14006         (aarch64_sve::nvectors_if_data_type): Replace with...
14007         (aarch64_sve::builtin_type_p): ...this.
14008         * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
14009         (find_vector_type): Delete.
14010         (add_sve_type_attribute): New function.
14011         (lookup_sve_type_attribute): Likewise.
14012         (register_builtin_types): Add an "SVE type" attribute to each type.
14013         (register_tuple_type): Likewise.
14014         (svbool_type_p, nvectors_if_data_type): Delete.
14015         (mangle_builtin_type): Use lookup_sve_type_attribute.
14016         (builtin_type_p): Likewise.  Add an overload that returns the
14017         number of constituent vector and predicate registers.
14018         * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
14019         (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
14020         instead of aarch64_sve_argument_p.
14021         (aarch64_takes_arguments_in_sve_regs_p): Likewise.
14022         (aarch64_pass_by_reference): Likewise.
14023         (aarch64_function_value_1): Likewise.
14024         (aarch64_return_in_memory): Likewise.
14025         (aarch64_layout_arg): Likewise.
14026
14027 2020-01-07  Jakub Jelinek  <jakub@redhat.com>
14028
14029         PR tree-optimization/93156
14030         * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
14031         least significant bit is always clear.
14032
14033         PR tree-optimization/93118
14034         * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
14035         simplifier with two intermediate conversions.
14036
14037 2020-01-07  Martin Liska  <mliska@suse.cz>
14038
14039         * params.opt: Add Optimization for various parameters.
14040
14041 2020-01-07  Martin Liska  <mliska@suse.cz>
14042
14043         PR ipa/83411
14044         * doc/extend.texi: Explain cloning for target_clone
14045         attribute.
14046
14047 2020-01-07  Martin Liska  <mliska@suse.cz>
14048
14049         PR tree-optimization/92860
14050         * common.opt: Make in Optimization option
14051         as it is affected by -O0, which is an Optimization
14052         option.
14053         * tree-inline.c (tree_inlinable_function_p):
14054         Use opt_for_fn for warn_inline.
14055         (expand_call_inline): Likewise.
14056
14057 2020-01-07  Martin Liska  <mliska@suse.cz>
14058
14059         PR tree-optimization/92860
14060         * common.opt: Make flag_ree as optimization
14061         attribute.
14062
14063 2020-01-07  Martin Liska  <mliska@suse.cz>
14064
14065         PR optimization/92860
14066         * params.opt: Mark param_min_crossjump_insns with Optimization
14067         keyword.
14068
14069 2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
14070
14071         * ipa-inline-analysis.c (estimate_growth): Fix typo.
14072         * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
14073
14074 2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
14075
14076         * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
14077         helper function to return the valid addressing formats for a given
14078         hard register and mode.
14079         (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
14080
14081         * config/rs6000/constraints.md (Q constraint): Update
14082         documentation.
14083         * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
14084         documentation.
14085
14086         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
14087         Use 'Q' for doing vector extract from memory.
14088         (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
14089         memory.
14090         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
14091         doing vector extract from memory.
14092         (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
14093         extract from memory.
14094
14095         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
14096         for the offset being 34-bits when -mcpu=future is used.
14097
14098 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
14099
14100         * config/pa/pa.md: Revert change to use ordered_comparison_operator
14101         instead of cmpib_comparison_operator in cmpib patterns.
14102         * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
14103         of cmpib_comparison_operator.  Revise comment.
14104
14105 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
14106
14107         * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
14108         in an IFN_DIV_POW2 node to be equal.
14109
14110 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
14111
14112         * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
14113         (vect_check_scalar_mask): ...this.
14114         (vectorizable_store, vectorizable_load): Update call accordingly.
14115         (vectorizable_call): Use vect_check_scalar_mask to check the mask
14116         argument in calls to conditional internal functions.
14117
14118 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
14119
14120         * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
14121         '0' matching inputs.
14122         (subv64di3_exec): Likewise.
14123
14124 2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
14125
14126         * config/mips/mips.c (vr4130_align_insns): Fix typo.
14127         * doc/md.texi (movstr): Likewise.
14128
14129 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
14130
14131         * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
14132         clobber.
14133
14134 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
14135
14136         * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
14137         Depend on...
14138         (s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
14139         to a temporary file and use move-if-change to update the real
14140         file where necessary.
14141
14142 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
14143
14144         * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
14145         rather than Upa for CPY /M.
14146
14147 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
14148
14149         * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
14150         immediate.
14151
14152 2020-01-06  Martin Liska  <mliska@suse.cz>
14153
14154     PR tree-optimization/92860
14155     * params.opt: Mark param_max_combine_insns with Optimization
14156     keyword.
14157
14158 2020-01-05  Jakub Jelinek  <jakub@redhat.com>
14159
14160         PR target/93141
14161         * config/i386/i386.md (SWIDWI): New mode iterator.
14162         (DWI, dwi): Add TImode variants.
14163         (addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
14164         <general_hilo_operand> instead of <general_operand>.  Use
14165         CONST_SCALAR_INT_P instead of CONST_INT_P.
14166         (*addv<mode>4_1): Rename to ...
14167         (addv<mode>4_1): ... this.
14168         (QWI): New mode attribute.
14169         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
14170         define_insn_and_split patterns.
14171         (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
14172         patterns.
14173         (uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
14174         <general_hilo_operand> instead of <general_operand>.
14175         (*addcarry<mode>_1): New define_insn.
14176         (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
14177
14178 2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>
14179
14180         * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
14181         Use "call" instead of "set".
14182
14183 2020-01-03  Martin Jambor  <mjambor@suse.cz>
14184
14185         PR ipa/92917
14186         * ipa-cp.c (print_all_lattices): Skip functions without info.
14187
14188 2020-01-03  Jakub Jelinek  <jakub@redhat.com>
14189
14190         PR target/93089
14191         * config/i386/i386-options.c (ix86_simd_clone_adjust): If
14192         TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
14193         simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
14194         for 'e' simd clones.
14195
14196         PR target/93089
14197         * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
14198         entry.
14199         (mprefer-vector-width=): Add Save.
14200         * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
14201         -mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
14202         (ix86_debug_options, ix86_function_specific_print): Adjust
14203         ix86_target_string callers.
14204         (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
14205         (ix86_valid_target_attribute_tree): Likewise.
14206         * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
14207         * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
14208         ix86_target_string caller.
14209
14210         PR target/93110
14211         * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
14212         emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
14213         instead of gen_int_shift_amount + convert_modes.
14214
14215         PR rtl-optimization/93088
14216         * loop-iv.c (find_single_def_src): Punt after looking through
14217         128 reg copies for regs with single definitions.  Move definitions
14218         to first uses.
14219
14220 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
14221
14222         * config/arm/arm-c.c (arm_cpu_builtins): Define
14223         __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
14224         __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
14225         __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
14226         * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
14227         * config/arm/arm-tables.opt: Regenerated.
14228         * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
14229         arm_arch_i8mm and arm_arch_bf16 when enabled.
14230         * config/arm/arm.h (TARGET_I8MM): New macro.
14231         (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
14232         * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
14233         * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
14234         * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
14235         (v8_6_a_simd_variants): New.
14236         (v8_*_a_simd_variants): Add i8mm and bf16.
14237         * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
14238
14239 2020-01-02  Jakub Jelinek  <jakub@redhat.com>
14240
14241         PR ipa/93087
14242         * predict.c (compute_function_frequency): Don't call
14243         warn_function_cold on functions that already have cold attribute.
14244
14245 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
14246
14247         PR target/67834
14248         * config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
14249         COMDAT group function labels in .data.rel.ro.local section.
14250         * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
14251
14252         PR target/93111
14253         * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
14254         comparison_operator in B and S integer comparisons.  Likewise, use
14255         ordered_comparison_operator instead of cmpib_comparison_operator in
14256         cmpib patterns.
14257         * config/pa/predicates.md (cmpib_comparison_operator): Remove.
14258
14259 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
14260
14261         Update copyright years.
14262
14263         * gcc.c (process_command): Update copyright notice dates.
14264         * gcov-dump.c (print_version): Ditto.
14265         * gcov.c (print_version): Ditto.
14266         * gcov-tool.c (print_version): Ditto.
14267         * gengtype.c (create_file): Ditto.
14268         * doc/cpp.texi: Bump @copying's copyright year.
14269         * doc/cppinternals.texi: Ditto.
14270         * doc/gcc.texi: Ditto.
14271         * doc/gccint.texi: Ditto.
14272         * doc/gcov.texi: Ditto.
14273         * doc/install.texi: Ditto.
14274         * doc/invoke.texi: Ditto.
14275
14276 2020-01-01  Jan Hubicka  <hubicka@ucw.cz>
14277
14278         * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
14279         summary.
14280
14281 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
14282
14283         PR tree-optimization/93098
14284         * match.pd (popcount): For shift amounts, use integer_onep
14285         or wi::to_widest () == cst instead of tree_to_uhwi () == cst
14286         tests.  Make sure that precision is power of two larger than or equal
14287         to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
14288         instead of ULL suffixed constants.  Formatting fixes.
14289 \f
14290 Copyright (C) 2020 Free Software Foundation, Inc.
14291
14292 Copying and distribution of this file, with or without modification,
14293 are permitted in any medium without royalty provided the copyright
14294 notice and this notice are preserved.