1 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
4 * config/aarch64/aarch64.cc (aarch64_split_compare_and_swap):
5 For 128-bit store the loaded value and loop if needed.
7 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
10 * config/aarch64/aarch64.md (cpymemdi): Remove pattern condition.
12 * config/aarch64/aarch64.cc (aarch64_expand_cpymem): Support
13 strict-align. Cleanup condition for using MOPS.
14 (aarch64_expand_setmem): Likewise.
16 2023-11-30 Richard Biener <rguenther@suse.de>
18 PR tree-optimization/112767
19 * tree-scalar-evolution.cc (final_value_replacement_loop):
20 Propagate constants to immediate uses immediately.
22 2023-11-30 Richard Biener <rguenther@suse.de>
24 PR tree-optimization/112766
25 * gimple-predicate-analysis.cc (find_var_cmp_const):
26 Support continuing the iteration and report every candidate.
27 (uninit_analysis::overlap): Iterate over all flag var
30 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33 * config/riscv/vector.md: Add widening overlap of vf2/vf4.
35 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38 * config/riscv/vector.md: Remove earlyclobber for wx/wf instructions.
40 2023-11-30 Jakub Jelinek <jakub@redhat.com>
43 * wide-int.cc (wi::mul_internal): Don't allocate twice as much
44 space for u, v and r as needed.
45 (divmod_internal_2): Change return type from void to int, for n == 1
46 return 1, otherwise before writing b_dividend into b_remainder set
47 n to MIN (n, m) and at the end return it.
48 (wi::divmod_internal): Don't allocate 4 times as much space for
49 b_quotient, b_remainder, b_dividend and b_divisor. Set n to
50 result of divmod_internal_2.
51 (wide_int_cc_tests): Add test for unsigned widest_int
52 wi::multiple_of_p of 1 and -128.
54 2023-11-30 liuhongt <hongtao.liu@intel.com>
56 * config/i386/sse.md (sdot_prodv64qi): New expander.
57 (sseunpackmodelower): New mode attr.
58 (sdot_prod<mode>): Emulate sdot_prodv*qi with sodt_prov*hi
59 when TARGET_VNNIINT8 is not available.
61 2023-11-30 liuhongt <hongtao.liu@intel.com>
63 * config/i386/sse.md: (reduc_plus_scal_<mode>): Use
64 vec_extract_lo instead of subreg.
65 (reduc_<code>_scal_<mode>): Ditto.
66 (reduc_<code>_scal_<mode>): Ditto.
67 (reduc_<code>_scal_<mode>): Ditto.
68 (reduc_<code>_scal_<mode>): Ditto.
70 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
73 * config/riscv/vector.md: Add widenning overlap.
75 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
77 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Fix constraint.
78 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Rename vconstraint into group_overlap.
80 (none,W21,W42,W84,W43,W86,W87): Ditto.
81 * config/riscv/vector.md: Ditto.
83 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
85 * config/riscv/vector.md: Support highpart overlap for vext.vf2
87 2023-11-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
89 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add ampere-1b
90 * config/aarch64/aarch64-cost-tables.h: Add ampere1b_extra_costs
91 * config/aarch64/aarch64-tune.md: Regenerate
92 * config/aarch64/aarch64.cc: Include ampere1b tuning model
93 * doc/invoke.texi: Document -mcpu=ampere1b
94 * config/aarch64/tuning_models/ampere1b.h: New file.
96 2023-11-29 David Faust <david.faust@oracle.com>
98 * config/bpf/bpf.h (ASM_COMMENT_START): Change from ';' to '#'.
100 2023-11-29 Jakub Jelinek <jakub@redhat.com>
103 * config/rs6000/rs6000.cc (invalid_arg_for_unprototyped_fn): Return
104 NULL for __builtin_classify_type calls with vector arguments.
106 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
108 PR tree-optimization/111922
109 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Check the
110 operands are valid before calling fold_range.
112 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
114 * range-op-mixed.h (operator_equal::operand_check_p): New.
115 (operator_not_equal::operand_check_p): New.
116 (operator_lt::operand_check_p): New.
117 (operator_le::operand_check_p): New.
118 (operator_gt::operand_check_p): New.
119 (operator_ge::operand_check_p): New.
120 (operator_plus::operand_check_p): New.
121 (operator_abs::operand_check_p): New.
122 (operator_minus::operand_check_p): New.
123 (operator_negate::operand_check_p): New.
124 (operator_mult::operand_check_p): New.
125 (operator_bitwise_not::operand_check_p): New.
126 (operator_bitwise_xor::operand_check_p): New.
127 (operator_bitwise_and::operand_check_p): New.
128 (operator_bitwise_or::operand_check_p): New.
129 (operator_min::operand_check_p): New.
130 (operator_max::operand_check_p): New.
131 * range-op.cc (range_op_handler::fold_range): Check operand
133 (range_op_handler::op1_range): Ditto.
134 (range_op_handler::op2_range): Ditto.
135 (range_op_handler::operand_check_p): New.
136 (range_operator::operand_check_p): New.
137 (operator_lshift::operand_check_p): New.
138 (operator_rshift::operand_check_p): New.
139 (operator_logical_and::operand_check_p): New.
140 (operator_logical_or::operand_check_p): New.
141 (operator_logical_not::operand_check_p): New.
142 * range-op.h (range_operator::operand_check_p): New.
143 (range_op_handler::operand_check_p): New.
145 2023-11-29 Martin Jambor <mjambor@suse.cz>
147 PR tree-optimization/112711
148 PR tree-optimization/112721
149 * tree-sra.cc (build_access_from_call_arg): New parameter
150 CAN_BE_RETURNED, disqualify any candidate passed by reference if it is
151 true. Adjust leading comment.
152 (scan_function): Pass appropriate value to CAN_BE_RETURNED of
153 build_access_from_call_arg.
155 2023-11-29 Thomas Schwinge <thomas@codesourcery.com>
157 * doc/sourcebuild.texi (Final Actions): Document
158 'only_for_offload_target' wrapper.
160 2023-11-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
163 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
164 attributes): Document cfi.
166 2023-11-29 Richard Biener <rguenther@suse.de>
169 * internal-fn.cc (expand_partial_load_optab_fn): Clear
170 MEM_EXPR and MEM_OFFSET.
171 (expand_partial_store_optab_fn): Likewise.
173 2023-11-29 Jakub Jelinek <jakub@redhat.com>
176 * fold-const.cc (multiple_of_p): Pass SIGNED rather than
177 UNSIGNED for wi::multiple_of_p on widest_int arguments.
179 2023-11-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
180 kito-cheng <kito.cheng@sifive.com>
181 kito-cheng <kito.cheng@gmail.com>
184 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): New register filters.
185 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Ditto.
187 * config/riscv/vector.md: Support highpart register overlap for vwcvt.
189 2023-11-29 xuli <xuli1@eswincomputing.com>
191 * config/riscv/riscv.cc (riscv_option_override): Eliminate warning.
193 2023-11-29 Jakub Jelinek <jakub@redhat.com>
196 * fold-mem-offsets.cc (get_uses): Ignore DEBUG_INSN uses. Otherwise,
197 punt if use is in a different basic block from INSN or appears before
198 INSN in the same basic block. Formatting fixes.
199 (get_single_def_in_bb): Formatting fixes.
200 (fold_offsets_1, pass_fold_mem_offsets::execute): Comment formatting
203 2023-11-29 Xi Ruoyao <xry111@xry111.site>
205 * config/loongarch/simd.md (LSX_SCALAR_FRINT): New int iterator.
206 (VLSX_FOR_FMODE): New mode attribute.
207 (<simd_for_scalar_frint_pattern><mode>2): New expander,
208 expanding to vreplvei.{w/d} + frint{rp/rz/rm/rne}.{s.d}.
210 2023-11-29 Xi Ruoyao <xry111@xry111.site>
212 * config/loongarch/loongarch.md (lrint_allow_inexact): Remove.
213 (<lrint_pattern><ANYF:mode><ANYFI:mode>2): Check if <LRINT>
214 == UNSPEC_FTINT instead of <lrint_allow_inexact>.
216 2023-11-29 Xi Ruoyao <xry111@xry111.site>
218 * config/loongarch/lsx.md (bitimm): Move to ...
219 (UNSPEC_LSX_VROTR): Remove.
220 (lsx_vrotr_<lsxfmt>): Remove.
221 (lsx_vrotri_<lsxfmt>): Remove.
222 * config/loongarch/lasx.md (UNSPEC_LASX_XVROTR): Remove.
223 (lsx_vrotr_<lsxfmt>): Remove.
224 (lsx_vrotri_<lsxfmt>): Remove.
225 * config/loongarch/simd.md (bitimm): ... here. Expand it to
227 (vrotr<mode>3): New define_insn.
228 (vrotri<mode>3): New define_insn.
229 * config/loongarch/loongarch-builtins.cc:
230 (CODE_FOR_lsx_vrotr_b): Use standard pattern name.
231 (CODE_FOR_lsx_vrotr_h): Likewise.
232 (CODE_FOR_lsx_vrotr_w): Likewise.
233 (CODE_FOR_lsx_vrotr_d): Likewise.
234 (CODE_FOR_lasx_xvrotr_b): Likewise.
235 (CODE_FOR_lasx_xvrotr_h): Likewise.
236 (CODE_FOR_lasx_xvrotr_w): Likewise.
237 (CODE_FOR_lasx_xvrotr_d): Likewise.
238 (CODE_FOR_lsx_vrotri_b): Define to standard pattern name.
239 (CODE_FOR_lsx_vrotri_h): Likewise.
240 (CODE_FOR_lsx_vrotri_w): Likewise.
241 (CODE_FOR_lsx_vrotri_d): Likewise.
242 (CODE_FOR_lasx_xvrotri_b): Likewise.
243 (CODE_FOR_lasx_xvrotri_h): Likewise.
244 (CODE_FOR_lasx_xvrotri_w): Likewise.
245 (CODE_FOR_lasx_xvrotri_d): Likewise.
247 2023-11-29 Xi Ruoyao <xry111@xry111.site>
249 * config/loongarch/simd.md (muh): New code attribute mapping
250 any_extend to smul_highpart or umul_highpart.
251 (<su>mul<mode>3_highpart): New define_insn.
252 * config/loongarch/lsx.md (UNSPEC_LSX_VMUH_S): Remove.
253 (UNSPEC_LSX_VMUH_U): Remove.
254 (lsx_vmuh_s_<lsxfmt>): Remove.
255 (lsx_vmuh_u_<lsxfmt>): Remove.
256 * config/loongarch/lasx.md (UNSPEC_LASX_XVMUH_S): Remove.
257 (UNSPEC_LASX_XVMUH_U): Remove.
258 (lasx_xvmuh_s_<lasxfmt>): Remove.
259 (lasx_xvmuh_u_<lasxfmt>): Remove.
260 * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vmuh_b):
261 Redefine to standard pattern name.
262 (CODE_FOR_lsx_vmuh_h): Likewise.
263 (CODE_FOR_lsx_vmuh_w): Likewise.
264 (CODE_FOR_lsx_vmuh_d): Likewise.
265 (CODE_FOR_lsx_vmuh_bu): Likewise.
266 (CODE_FOR_lsx_vmuh_hu): Likewise.
267 (CODE_FOR_lsx_vmuh_wu): Likewise.
268 (CODE_FOR_lsx_vmuh_du): Likewise.
269 (CODE_FOR_lasx_xvmuh_b): Likewise.
270 (CODE_FOR_lasx_xvmuh_h): Likewise.
271 (CODE_FOR_lasx_xvmuh_w): Likewise.
272 (CODE_FOR_lasx_xvmuh_d): Likewise.
273 (CODE_FOR_lasx_xvmuh_bu): Likewise.
274 (CODE_FOR_lasx_xvmuh_hu): Likewise.
275 (CODE_FOR_lasx_xvmuh_wu): Likewise.
276 (CODE_FOR_lasx_xvmuh_du): Likewise.
278 2023-11-29 Xi Ruoyao <xry111@xry111.site>
281 * config/loongarch/lsx.md (UNSPEC_LSX_VFTINT_S,
282 UNSPEC_LSX_VFTINTRNE, UNSPEC_LSX_VFTINTRP,
283 UNSPEC_LSX_VFTINTRM, UNSPEC_LSX_VFRINTRNE_S,
284 UNSPEC_LSX_VFRINTRNE_D, UNSPEC_LSX_VFRINTRZ_S,
285 UNSPEC_LSX_VFRINTRZ_D, UNSPEC_LSX_VFRINTRP_S,
286 UNSPEC_LSX_VFRINTRP_D, UNSPEC_LSX_VFRINTRM_S,
287 UNSPEC_LSX_VFRINTRM_D): Remove.
288 (ILSX, FLSX): Move into ...
289 (VIMODE): Move into ...
290 (FRINT_S, FRINT_D): Remove.
291 (frint_pattern_s, frint_pattern_d, frint_suffix): Remove.
292 (lsx_vfrint_<flsxfmt>, lsx_vftint_s_<ilsxfmt>_<flsxfmt>,
293 lsx_vftintrne_w_s, lsx_vftintrne_l_d, lsx_vftintrp_w_s,
294 lsx_vftintrp_l_d, lsx_vftintrm_w_s, lsx_vftintrm_l_d,
295 lsx_vfrintrne_s, lsx_vfrintrne_d, lsx_vfrintrz_s,
296 lsx_vfrintrz_d, lsx_vfrintrp_s, lsx_vfrintrp_d,
297 lsx_vfrintrm_s, lsx_vfrintrm_d,
298 <FRINT_S:frint_pattern_s>v4sf2,
299 <FRINT_D:frint_pattern_d>v2df2, round<mode>2,
300 fix_trunc<mode>2): Remove.
301 * config/loongarch/lasx.md: Likewise.
302 * config/loongarch/simd.md: New file.
303 (ILSX, ILASX, FLSX, FLASX, VIMODE): ... here.
304 (IVEC, FVEC): New mode iterators.
305 (VIMODE): ... here. Extend it to work for all LSX/LASX vector
307 (x, wu, simd_isa, WVEC, vimode, simdfmt, simdifmt_for_f,
308 elebits): New mode attributes.
309 (UNSPEC_SIMD_FRINTRP, UNSPEC_SIMD_FRINTRZ, UNSPEC_SIMD_FRINT,
310 UNSPEC_SIMD_FRINTRM, UNSPEC_SIMD_FRINTRNE): New unspecs.
311 (SIMD_FRINT): New int iterator.
312 (simd_frint_rounding, simd_frint_pattern): New int attributes.
313 (<simd_isa>_<x>vfrint<simd_frint_rounding>_<simdfmt>): New
314 define_insn template for frint instructions.
315 (<simd_isa>_<x>vftint<simd_frint_rounding>_<simdifmt_for_f>_<simdfmt>):
316 Likewise, but for ftint instructions.
317 (<simd_frint_pattern><mode>2): New define_expand with
318 flag_fp_int_builtin_inexact checked.
319 (l<simd_frint_pattern><mode><vimode>2): Likewise.
320 (ftrunc<mode>2): New define_expand. It does not require
321 flag_fp_int_builtin_inexact.
322 (fix_trunc<mode><vimode>2): New define_insn_and_split. It does
323 not require flag_fp_int_builtin_inexact.
324 (include): Add lsx.md and lasx.md.
325 * config/loongarch/loongarch.md (include): Include simd.md,
326 instead of including lsx.md and lasx.md directly.
327 * config/loongarch/loongarch-builtins.cc
328 (CODE_FOR_lsx_vftint_w_s, CODE_FOR_lsx_vftint_l_d,
329 CODE_FOR_lasx_xvftint_w_s, CODE_FOR_lasx_xvftint_l_d):
332 2023-11-29 Alexandre Oliva <oliva@adacore.com>
334 * doc/extend.texi (hardbool): New type attribute.
335 * doc/invoke.texi (-ftrivial-auto-var-init): Document
336 representation vs values.
338 2023-11-29 Alexandre Oliva <oliva@adacore.com>
340 * expr.cc (emit_block_move_hints): Take ctz of len. Obey
341 -finline-stringops. Use oriented or sized loop.
342 (emit_block_move): Take ctz of len, and pass it on.
343 (emit_block_move_via_sized_loop): New.
344 (emit_block_move_via_oriented_loop): New.
345 (emit_block_move_via_loop): Take incr. Move an incr-sized
347 (emit_block_cmp_via_cmpmem): Take ctz of len. Obey
349 (emit_block_cmp_via_loop): New.
350 * expr.h (emit_block_move): Add ctz of len defaulting to zero.
351 (emit_block_move_hints): Likewise.
352 (emit_block_cmp_hints): Likewise.
353 * builtins.cc (expand_builtin_memory_copy_args): Pass ctz of
354 len to emit_block_move_hints.
355 (try_store_by_multiple_pieces): Support starting with a loop.
356 (expand_builtin_memcmp): Pass ctz of len to
357 emit_block_cmp_hints.
358 (expand_builtin): Allow inline expansion of memset, memcpy,
359 memmove and memcmp if requested.
360 * common.opt (finline-stringops): New.
361 (ilsop_fn): New enum.
362 * flag-types.h (enum ilsop_fn): New.
363 * doc/invoke.texi (-finline-stringops): Add.
365 2023-11-29 Pan Li <pan2.li@intel.com>
368 * config/riscv/riscv-string.cc (expand_block_move): Add
369 precondition check for exact_div.
371 2023-11-28 Roger Sayle <roger@nextmovesoftware.com>
373 * config/arc/arc.md: Make output template whitespace consistent.
375 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
377 * varasm.cc (assemble_external_libcall): Refer in assert only ifdef
380 2023-11-28 Andrew Pinski <quic_apinski@quicinc.com>
382 PR tree-optimization/112738
383 * match.pd (`(nop_convert)-(convert)a`): Reject
384 when the outer type is boolean.
386 2023-11-28 Richard Biener <rguenther@suse.de>
389 * tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET
390 of the newly built type.
392 2023-11-28 Uros Bizjak <ubizjak@gmail.com>
395 * config/i386/i386.md (cmpstrnqi_1): Set FLAGS_REG to its previous
396 value when operand 2 equals zero.
397 (*cmpstrnqi_1): Ditto.
398 (*cmpstrnqi_1 peephole2): Ditto.
400 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
403 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
405 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
406 function call is for a builtin.
407 (bpf_external_libcall): Added target hook to detect and report
408 error when other external calls that are not builtins.
410 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
413 * varasm.cc (pending_libcall_symbols): New variable.
414 (process_pending_assemble_externals): Process
415 pending_libcall_symbols.
416 (assemble_external_libcall): Defer emitting external libcall
417 symbols to process_pending_assemble_externals.
419 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
421 * btfout.cc (btf_calc_num_vbytes): Fixed logic for enum64.
422 (btf_asm_enum_const): Corrected logic for enum64 and smaller
425 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
427 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
428 function call is for a builtin.
429 (bpf_external_libcall): Added target hook to detect and report
430 error when other external calls that are not builtins.
432 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
434 * config/bpf/bpf.cc (bpf_use_by_pieces_infrastructure_p): Added
435 function to bypass default behaviour.
436 * config/bpf/bpf.h (COMPARE_MAX_PIECES): Defined to 1024 bytes.
438 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
440 * config/bpf/core-builtins.cc (core_mark_as_access_index):
443 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
445 * config/bpf/core-builtins.cc
446 (bpf_resolve_overloaded_core_builtin): Removed call.
447 (execute_lower_bpf_core): Added all to remove_parser_plugin.
449 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
452 * config/riscv/riscv-v.cc (expand_vec_perm_const): Disallow poly size (1, 1) VLA SLP.
454 2023-11-28 Jakub Jelinek <jakub@redhat.com>
456 PR tree-optimization/112719
457 * match.pd (parity(X)^parity(Y) -> parity(X^Y)): Handle case of
459 * gimple-match-exports.cc (build_call_internal): Add special-case for
460 bit query ifns on large/huge BITINT_TYPE before bitint lowering.
462 2023-11-28 Jakub Jelinek <jakub@redhat.com>
464 PR tree-optimization/112719
465 * match.pd (popcount (X) + popcount (Y) -> POPCOUNT (X | Y)): Deal
466 with argument types with different precisions.
468 2023-11-28 David Malcolm <dmalcolm@redhat.com>
471 * Makefile.in (PLUGIN_HEADERS): Add analyzer headers.
472 (install-plugin): Keep the directory structure for files in
475 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
478 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix regression.
480 2023-11-28 David Malcolm <dmalcolm@redhat.com>
482 * diagnostic-show-locus.cc (layout::maybe_add_location_range):
483 Don't print annotation lines for ranges when there's no column
485 (selftest::test_one_liner_no_column): New.
486 (selftest::test_diagnostic_show_locus_one_liner): Call it.
488 2023-11-28 David Malcolm <dmalcolm@redhat.com>
490 * diagnostic.cc (diagnostic_get_location_text): Convert to...
491 (diagnostic_context::get_location_text): ...this, and convert
492 return type from char * to label_text.
493 (diagnostic_build_prefix): Update for above change.
494 (default_diagnostic_start_span_fn): Likewise.
495 (selftest::assert_location_text): Likewise.
496 * diagnostic.h (diagnostic_context::get_location_text): New decl.
498 2023-11-27 Andrew Pinski <quic_apinski@quicinc.com>
500 * config/aarch64/aarch64.cc (aarch64_if_then_else_costs):
501 Handle csinv/csinc case of 1/-1.
503 2023-11-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
504 Richard Sandiford <richard.sandiford@arm.com>
507 * fold-const.cc (fold_vec_perm_cst): Set result's encoding to sel's
508 encoding, and set res_nelts_per_pattern to 2 if sel contains stepped
509 sequence but input vectors do not.
510 (test_nunits_min_2): New test Case 8.
511 (test_nunits_min_4): New tests Case 8 and Case 9.
513 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
515 * config/aarch64/aarch64.cc (aarch64_needs_frame_chain): Do not
516 force frame chain for eh_return.
518 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
520 * config/aarch64/aarch64-protos.h (aarch64_eh_return_handler_rtx):
522 * config/aarch64/aarch64.cc (aarch64_return_address_signing_enabled):
523 Sign return address even in functions with eh_return.
524 (aarch64_expand_epilogue): Conditionally return with br or ret.
525 (aarch64_eh_return_handler_rtx): Remove.
526 * config/aarch64/aarch64.h (EH_RETURN_TAKEN_RTX): Define.
527 (EH_RETURN_STACKADJ_RTX): Change to R5.
528 (EH_RETURN_HANDLER_RTX): Change to R6.
529 * df-scan.cc: Handle EH_RETURN_TAKEN_RTX.
530 * doc/tm.texi: Regenerate.
531 * doc/tm.texi.in: Document EH_RETURN_TAKEN_RTX.
532 * except.cc (expand_eh_return): Handle EH_RETURN_TAKEN_RTX.
534 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
536 * config.gcc <amdgcn-*-amdhsa> (extra_gcc_objs): Don't set.
537 * config/gcn/driver-gcn.cc: Remove.
538 * config/gcn/gcn-hsa.h (ASM_SPEC, EXTRA_SPEC_FUNCTIONS): Remove
539 'last_arg' spec function.
540 * config/gcn/t-gcn-hsa (driver-gcn.o): Remove.
542 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
545 * config/gcn/gcn.opt (march=, mtune=): Tag as 'Negative' of
548 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
550 * config/i386/gnu.h: Use PIE_SPEC, add static-pie case.
551 * config/i386/gnu64.h: Use PIE_SPEC, add static-pie case.
553 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
555 * config/i386/t-gnu64: New file.
556 * config.gcc [x86_64-*-gnu*]: Add i386/t-gnu64 to
559 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
562 * config/aarch64/aarch64-sve-builtins.h (is_ptrue): Declare.
563 * config/aarch64/aarch64-sve-builtins.cc (is_ptrue): New function.
564 (gimple_folder::redirect_pred_x): Likewise.
565 (gimple_folder::fold): Use it.
567 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
569 * config/aarch64/aarch64-sve-builtins.h (vector_cst_all_same): Declare.
570 * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same): New
571 function, a generalized replacement of...
572 * config/aarch64/aarch64-sve-builtins-base.cc
573 (svlast_impl::vect_all_same): ...this.
574 (svlast_impl::fold): Update accordingly.
576 2023-11-27 Richard Biener <rguenther@suse.de>
578 PR tree-optimization/112653
579 * gimple-ssa.h (gimple_df): Add escaped_return solution.
580 * tree-ssa.cc (init_tree_ssa): Reset it.
581 (delete_tree_ssa): Likewise.
582 * tree-ssa-structalias.cc (escaped_return_id): New.
583 (find_func_aliases): Handle non-IPA return stmts by
584 adding to ESCAPED_RETURN.
585 (set_uids_in_ptset): Adjust HEAP escaping to also cover
586 escapes through return.
587 (init_base_vars): Initialize ESCAPED_RETURN.
588 (compute_points_to_sets): Replace ESCAPED post-processing
589 with recording the ESCAPED_RETURN solution.
590 * tree-ssa-alias.cc (ref_may_alias_global_p_1): Check
591 the ESCAPED_RETUNR solution.
592 (dump_alias_info): Dump it.
593 * cfgexpand.cc (update_alias_info_with_stack_vars): Update it.
594 * ipa-icf.cc (sem_item_optimizer::fixup_points_to_sets):
596 * tree-inline.cc (expand_call_inline): Reset it.
597 * tree-parloops.cc (parallelize_loops): Likewise.
598 * tree-sra.cc (maybe_add_sra_candidate): Check it.
600 2023-11-27 Richard Biener <rguenther@suse.de>
601 Richard Sandiford <richard.sandiford@arm.com>
603 PR tree-optimization/112661
604 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Defer duplicate-and-
605 interleave test to...
606 (vect_build_slp_tree_2): ...here, once we have all the operands.
607 Skip the test for uniform vectors.
608 (vect_create_constant_vectors): Detect uniform vectors. Avoid
609 redundant conversions in that case. Use gimple_build_vector_from_val
612 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
614 * attribs.cc (excl_hash_traits): Delete.
615 (test_attribute_exclusions): Use pair_hash and nofree_string_hash
618 2023-11-27 Andrew Stubbs <ams@codesourcery.com>
620 * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Disallow TImode.
622 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
624 * config/s390/s390-builtin-types.def (BT_FN_UV8HI_UV8HI_UINT):
625 Add missing builtin type.
627 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
629 * config/s390/s390-builtin-types.def: Remove types.
630 * config/s390/s390-builtins.def (O_U64): Remove 64-bit literal support.
631 Don't restrict s390_vec_rli and s390_verll[bhfg] to immediates.
632 * config/s390/s390.cc (s390_const_operand_ok): Remove 64-bit
635 2023-11-27 Alex Coplan <alex.coplan@arm.com>
636 Iain Sandoe <iain@sandoe.co.uk>
639 * doc/cpp.texi: Document __has_{feature,extension}.
641 2023-11-27 Richard Biener <rguenther@suse.de>
643 PR tree-optimization/112706
644 * match.pd (ptr + o ==/!=/- ptr + o'): New patterns.
646 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
648 * config/s390/s390-builtin-types.def: Add/remove types.
649 * config/s390/s390-builtins.def
650 (s390_vclfnhs,s390_vclfnls,s390_vcrnfs,s390_vcfn,s390_vcnf):
651 Replace type V8HI with UV8HI.
653 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
655 * config/s390/s390-builtins.def
656 (s390_vcefb,s390_vcdgb,s390_vcelfb,s390_vcdlgb,s390_vcfeb,s390_vcgdb,
657 s390_vclfeb,s390_vclgdb): Remove flags for non-existing operands
660 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
662 * config/s390/s390.md (*cmphi_ccu): For immediate operand 1 make
663 use of constraint n instead of D and chop of high bits in the
666 2023-11-27 Jakub Jelinek <jakub@redhat.com>
669 * config.gcc (mips*-sde-elf*): Append to tm_defines rather than
672 2023-11-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
674 * config/riscv/autovec.md
675 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>):
676 Remove gather_scatter_valid_offset_mode_p.
677 (mask_len_gather_load<mode><mode>): Ditto.
678 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
679 (mask_len_scatter_store<mode><mode>): Ditto.
680 * config/riscv/predicates.md (const_1_or_8_operand): New predicate.
681 (vector_gs_scale_operand_64): Remove.
682 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): Remove.
683 * config/riscv/riscv-v.cc (expand_gather_scatter): Refine code.
684 (gather_scatter_valid_offset_mode_p): Remove.
685 * config/riscv/vector-iterators.md: Fix iterator bugs.
687 2023-11-27 Tsukasa OI <research_trasio@irq.a4lg.com>
689 * common/config/riscv/riscv-common.cc
690 (riscv_ext_version_table): Set version to ratified 2.0.
691 (riscv_subset_list::parse_std_ext): Allow RV64E.
692 * config.gcc: Parse base ISA 'rv64e' and ABI 'lp64e'.
693 * config/riscv/arch-canonicalize: Parse base ISA 'rv64e'.
694 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
695 Define different macro per XLEN. Add handling for ABI_LP64E.
696 * config/riscv/riscv-d.cc (riscv_d_handle_target_float_abi):
697 Add handling for ABI_LP64E.
698 * config/riscv/riscv-opts.h (enum riscv_abi_type): Add ABI_LP64E.
699 * config/riscv/riscv.cc (riscv_option_override): Enhance error
700 handling to support RV64E and LP64E.
701 (riscv_conditional_register_usage): Change "RV32E" in a comment
703 * config/riscv/riscv.h
704 (UNITS_PER_FP_ARG): Add handling for ABI_LP64E.
705 (STACK_BOUNDARY): Ditto.
706 (ABI_STACK_BOUNDARY): Ditto.
707 (MAX_ARGS_IN_REGISTERS): Ditto.
708 (ABI_SPEC): Add support for "lp64e".
709 * config/riscv/riscv.opt: Parse -mabi=lp64e as ABI_LP64E.
710 * doc/invoke.texi: Add documentation of the LP64E ABI.
712 2023-11-27 Jose E. Marchesi <jose.marchesi@oracle.com>
714 * config/bpf/bpf-helpers.h: Remove.
715 * config.gcc: Adapt accordingly.
717 2023-11-27 Guo Jie <guojie@loongson.cn>
719 * config/loongarch/loongarch.cc (loongarch_split_plus_constant):
720 avoid left shift of negative value -0x8000.
722 2023-11-27 Guo Jie <guojie@loongson.cn>
724 * config/loongarch/loongarch.cc
725 (enum loongarch_load_imm_method): Add new method.
726 (loongarch_build_integer): Add relevant implementations for
728 (loongarch_move_integer): Ditto.
730 2023-11-26 Alexander Monakov <amonakov@ispras.ru>
732 * sort.cc: Use 'sorting networks' in comments.
734 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
737 * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): Add slidedown.
739 (pass_avlprop::get_vlmax_ta_preferred_avl): Ditto.
741 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
743 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): Fix typo.
744 (avl_can_be_propagated_p): Ditto.
747 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
750 * doc/install.texi (Downloading the source): Sort the list of
751 front ends and add D, Go, and Modula-2.
753 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
756 * doc/install.texi (Specific) <*-*-freebsd*>: Remove older
757 contents referencing GCC 4.x.
759 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
761 * doc/standards.texi (Standards): Update ISO C++ reference.
763 2023-11-25 Jakub Jelinek <jakub@redhat.com>
766 * config/i386/i386.md (*jcc_bt<mode>_mask,
767 *jcc_bt<SWI48:mode>_mask_1): Add (const_int 0) as expected
768 second operand of bt_comparison_operator.
770 2023-11-25 Andrew Pinski <pinskia@gmail.com>
771 Jakub Jelinek <jakub@redhat.com>
774 * config/aarch64/aarch64-simd.md (aarch64_simd_stp<mode>): Use <vwcore>
775 rather than %<vw> for alternative with r constraint on input operand.
777 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
779 * doc/install.texi (amdgcn-*-amdhsa): Fix URL to ROCm;
780 change 'in the future' to 'in LLVM 18'.
782 2023-11-24 John David Anglin <danglin@gcc.gnu.org>
784 * config/pa/pa.cc (pa_emit_move_sequence): Use INT14_OK_STRICT
785 in a couple of places.
787 2023-11-24 Martin Jambor <mjambor@suse.cz>
790 * tree-sra.cc (passed_by_ref_in_call): New.
791 (sra_initialize): Allocate passed_by_ref_in_call.
792 (sra_deinitialize): Free passed_by_ref_in_call.
793 (create_access): Add decl pool candidates only if they are not
795 (build_access_from_expr_1): Bail out on ADDR_EXPRs.
796 (build_access_from_call_arg): New function.
797 (asm_visit_addr): Rename to scan_visit_addr, change the
798 disqualification dump message.
799 (scan_function): Check taken addresses for all non-call statements,
800 including phi nodes. Process all call arguments, including the static
801 chain, build_access_from_call_arg.
802 (maybe_add_sra_candidate): Relax need_to_live_in_memory check to allow
803 non-escaped local variables.
804 (sort_and_splice_var_accesses): Disallow smaller-than-precision
805 replacements for aggregates passed by reference to functions.
806 (sra_modify_expr): Use a separate stmt iterator for adding satements
807 before the processed statement and after it.
808 (enum out_edge_check): New type.
809 (abnormal_edge_after_stmt_p): New function.
810 (sra_modify_call_arg): New function.
811 (sra_modify_assign): Adjust calls to sra_modify_expr.
812 (sra_modify_function_body): Likewise, use sra_modify_call_arg to
813 process call arguments, including the static chain.
815 2023-11-24 Uros Bizjak <ubizjak@gmail.com>
818 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Load
819 function address to a register for ix86_cmodel == CM_LARGE.
821 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
823 * doc/invoke.texi (-Wopenmp): Add.
824 * gimplify.cc (gimplify_omp_for): Add OPT_Wopenmp to warning_at.
825 * omp-expand.cc (expand_omp_ordered_sink): Likewise.
826 * omp-general.cc (omp_check_context_selector): Likewise.
827 * omp-low.cc (scan_omp_for, check_omp_nesting_restrictions,
828 lower_omp_ordered_clauses): Likewise.
829 * omp-simd-clone.cc (simd_clone_clauses_extract): Likewise.
831 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
834 * config/riscv/riscv-v.cc (preferred_simd_mode): Allow poly_int (1,1) vectors.
836 2023-11-24 Alexander Monakov <amonakov@ispras.ru>
838 * config.in: Regenerate.
839 * configure: Regenerate.
840 * configure.ac: Delete manual checks for old Valgrind headers.
841 * system.h (VALGRIND_MAKE_MEM_NOACCESS): Delete.
842 (VALGRIND_MAKE_MEM_DEFINED): Delete.
843 (VALGRIND_MAKE_MEM_UNDEFINED): Delete.
844 (VALGRIND_MALLOCLIKE_BLOCK): Delete.
845 (VALGRIND_FREELIKE_BLOCK): Delete.
847 2023-11-24 Jakub Jelinek <jakub@redhat.com>
850 * config/i386/i386-expand.cc (ix86_expand_branch): Use
851 ix86_expand_vector_logical_operator to expand vector XOR rather than
852 gen_rtx_SET on gen_rtx_XOR.
854 2023-11-24 Alex Coplan <alex.coplan@arm.com>
856 * rtl-ssa/access-utils.h (filter_accesses): New.
857 (remove_regno_access): New.
858 (check_remove_regno_access): New.
859 * rtl-ssa/accesses.cc (rtl_ssa::remove_note_accesses_base): Use
860 new filter_accesses helper.
862 2023-11-24 Alex Coplan <alex.coplan@arm.com>
864 * rtl-ssa/accesses.cc (function_info::create_set): New.
865 * rtl-ssa/accesses.h (access_info::is_temporary): New.
866 * rtl-ssa/changes.cc (move_insn): Handle new (temporary) insns.
867 (function_info::finalize_new_accesses): Handle new/temporary
868 user-created accesses.
869 (function_info::apply_changes_to_insn): Ensure m_is_temp flag
870 on new insns gets cleared.
871 (function_info::change_insns): Handle new/temporary insns.
872 (function_info::create_insn): New.
873 * rtl-ssa/changes.h (class insn_change): Make function_info a
875 * rtl-ssa/functions.h (function_info): Declare new entry points:
876 create_set, create_insn. Declare new change_alloc helper.
877 * rtl-ssa/insns.cc (insn_info::print_full): Identify temporary insns in
879 * rtl-ssa/insns.h (insn_info): Add new m_is_temp flag and accompanying
880 is_temporary accessor.
881 * rtl-ssa/internals.inl (insn_info::insn_info): Initialize m_is_temp to
883 * rtl-ssa/member-fns.inl (function_info::change_alloc): New.
884 * rtl-ssa/movement.h (restrict_movement_for_defs_ignoring): Add
885 handling for temporary defs.
887 2023-11-24 Jakub Jelinek <jakub@redhat.com>
889 PR tree-optimization/112673
890 * match.pd (bit_field_ref (vce @0) -> bit_field_ref @0): Only simplify
891 if either @0 doesn't have scalar integral type or if it has mode
894 2023-11-24 Jakub Jelinek <jakub@redhat.com>
897 * gimple-lower-bitint.cc (gimple_lower_bitint): Also stop first loop on
898 floating point SSA_NAME set in FLOAT_EXPR assignment from BITINT_TYPE
899 INTEGER_CST. Set has_large_huge for those if that BITINT_TYPE is large
900 or huge. Set kind to such FLOAT_EXPR assignment rhs1 BITINT_TYPE's kind.
902 2023-11-24 Richard Biener <rguenther@suse.de>
904 PR tree-optimization/112677
905 * tree-vect-loop.cc (vectorizable_reduction): Use alloca
906 to allocate vectype_op.
908 2023-11-24 Haochen Gui <guihaoc@gcc.gnu.org>
910 * expr.cc (by_pieces_ninsns): Include by pieces compare when
911 do the adjustment for overlap operations. Replace mov_optab
912 checks with gcc assertion.
914 2023-11-24 Jakub Jelinek <jakub@redhat.com>
917 * gimple-iterator.h (gsi_end, gsi_end_bb): New inline functions.
918 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): After
919 temporarily adding statements after m_init_gsi, update m_init_gsi
920 such that later additions after it will be after the added statements.
921 (bitint_large_huge::handle_load): Likewise. When splitting
922 gsi_bb (m_init_gsi) basic block, update m_preheader_bb if needed
923 and update saved m_gsi as well if needed.
924 (bitint_large_huge::lower_mergeable_stmt,
925 bitint_large_huge::lower_comparison_stmt,
926 bitint_large_huge::lower_mul_overflow,
927 bitint_large_huge::lower_bit_query): Use gsi_end_bb.
929 2023-11-24 Jakub Jelinek <jakub@redhat.com>
932 * tree.cc (try_catch_may_fallthru): If second operand of
933 TRY_CATCH_EXPR is not a STATEMENT_LIST, handle it as if it was a
934 STATEMENT_LIST containing a single statement.
936 2023-11-24 Richard Biener <rguenther@suse.de>
938 PR tree-optimization/112344
939 * tree-chrec.cc (chrec_apply): Only use an unsigned add
940 when the overall increment doesn't fit the signed type.
942 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
945 * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): New function.
946 (expand_vec_perm_const_1): Add new optimization.
948 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
950 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): Disable for NUNIT < 4.
952 2023-11-24 Haochen Jiang <haochen.jiang@intel.com>
955 * config/i386/driver-i386.cc (check_avx10_avx512_features):
957 (check_avx512_features): this and remove avx10 check.
958 (host_detect_local_cpu): Never append -mno-avx10.1-{256,512} to
959 avoid emitting warnings when building GCC with native arch.
960 * config/i386/i386-builtin.def (BDESC): Add missing AVX512VL for
961 128/256 bit builtin for AVX512VP2INTERSECT.
962 * config/i386/i386-options.cc (ix86_option_override_internal):
963 Also check whether the AVX512 flags is set when trying to reset.
965 (PTA_SKYLAKE_AVX512): Add missing PTA_EVEX512.
968 2023-11-23 Georg-Johann Lay <avr@gjlay.de>
971 * config/avr/avr.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define
972 to speculation_safe_value_not_needed.
974 2023-11-23 Marek Polacek <polacek@redhat.com>
976 * common.opt (Whardened, fhardened): New options.
977 * config.in: Regenerate.
978 * config/bpf/bpf.cc: Include "opts.h".
979 (bpf_option_override): If flag_stack_protector_set_by_fhardened_p, do
980 not inform that -fstack-protector does not work.
981 * config/i386/i386-options.cc (ix86_option_override_internal): When
982 -fhardened, maybe enable -fcf-protection=full.
983 * config/linux-protos.h (linux_fortify_source_default_level): Declare.
984 * config/linux.cc (linux_fortify_source_default_level): New.
985 * config/linux.h (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Redefine.
986 * configure: Regenerate.
987 * configure.ac: Check if the linker supports '-z now' and '-z relro'.
988 Check if -fhardened is supported on $target_os.
989 * doc/invoke.texi: Document -fhardened and -Whardened.
990 * doc/tm.texi: Regenerate.
991 * doc/tm.texi.in (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Add.
992 * gcc.cc (driver_handle_option): Remember if any link options or -static
993 were specified on the command line.
994 (process_command): When -fhardened, maybe enable -pie and
996 * opts.cc (flag_stack_protector_set_by_fhardened_p): New global.
997 (finish_options): When -fhardened, enable
998 -ftrivial-auto-var-init=zero and -fstack-protector-strong.
999 (print_help_hardened): New.
1000 (print_help): Call it.
1001 * opts.h (flag_stack_protector_set_by_fhardened_p): Declare.
1002 * target.def (fortify_source_default_level): New target hook.
1003 * targhooks.cc (default_fortify_source_default_level): New.
1004 * targhooks.h (default_fortify_source_default_level): Declare.
1005 * toplev.cc (process_options): When -fhardened, enable
1006 -fstack-clash-protection. If flag_stack_protector_set_by_fhardened_p,
1007 do not warn that -fstack-protector not supported for this target.
1008 Don't enable -fhardened when !HAVE_FHARDENED_SUPPORT.
1010 2023-11-23 Christophe Lyon <christophe.lyon@linaro.org>
1012 * config/arm/arm-mve-builtins-functions.h
1013 (full_width_access::memory_vector_mode): Add default clause.
1015 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
1018 * config/i386/i386.md (parityhi2):
1019 Use temporary register in the call to gen_parityhi2_cmp.
1021 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
1024 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Obtain
1025 scratch regno when flag_force_indirect_call is set. On 64-bit
1026 targets, call __morestack_large_model when flag_force_indirect_call
1027 is set and on 32-bit targets with -fpic, manually expand PIC sequence
1028 to call __morestack. Move the function address to an indirect
1029 call scratch register.
1031 2023-11-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
1033 PR tree-optimization/112678
1034 * tree-profile.cc (tree_profiling): Do not use atomic operations
1035 for -fprofile-update=single.
1037 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
1039 * config/s390/s390-c.cc (s390_cpu_cpp_builtins): Define
1040 __GCC_ASM_FLAG_OUTPUTS__.
1041 * config/s390/s390.cc (s390_canonicalize_comparison): More
1042 UNSPEC_CC_TO_INT cases.
1043 (s390_md_asm_adjust): Implement flags output.
1044 * config/s390/s390.md (ccstore4): Allow mask operands.
1045 * doc/extend.texi: Document flags output.
1047 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
1049 * config/s390/s390.md: Split TImode loads.
1051 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
1053 * config/s390/vector.md: (*vec_extract) Fix.
1055 2023-11-23 Di Zhao <dizhao@os.amperecomputing.com>
1057 * tree-ssa-reassoc.cc (get_reassociation_width): check
1058 for loop dependent FMAs.
1059 (reassociate_bb): For 3 ops, refine the condition to call
1060 swap_ops_for_binary_stmt.
1062 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1064 * config/riscv/riscv-protos.h (emit_vec_extract): New function.
1065 * config/riscv/riscv-v.cc (emit_vec_extract): Ditto.
1066 * config/riscv/riscv.cc (riscv_legitimize_move): Refine codes.
1068 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1072 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): New function.
1073 (vlmax_ta_p): Disable vrgather AVL propagation.
1075 2023-11-23 Jakub Jelinek <jakub@redhat.com>
1077 PR middle-end/112336
1078 * expr.cc (EXTEND_BITINT): Don't call reduce_to_bit_field_precision
1079 if modifier is EXPAND_INITIALIZER.
1081 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1083 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Refine codes.
1084 (emit_vlmax_masked_gather_mu_insn): Ditto.
1085 (modulo_sel_indices): Ditto.
1086 (expand_vec_perm): Ditto.
1087 (shuffle_generic_patterns): Ditto.
1089 2023-11-23 Jakub Jelinek <jakub@redhat.com>
1091 * doc/extend.texi (__builtin_stdc_bit_ceil, __builtin_stdc_bit_floor,
1092 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
1093 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
1094 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
1095 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
1096 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
1097 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros): Document.
1099 2023-11-23 Richard Biener <rguenther@suse.de>
1102 * doc/md.texi (cpymem): Document that exact overlap of source
1103 and destination needs to work.
1104 * doc/standards.texi (ffreestanding): Mention memcpy is required
1105 to handle the exact overlap case.
1107 2023-11-23 Jakub Jelinek <jakub@redhat.com>
1110 * doc/invoke.texi (-Wno-c++26-extensions): Document.
1112 2023-11-23 Manolis Tsamis <manolis.tsamis@vrull.eu>
1114 * ifcvt.cc (noce_convert_multiple_sets_1): Remove old code.
1116 2023-11-23 Pan Li <pan2.li@intel.com>
1119 * dse.cc (get_stored_val): Allow vector mode if read size is
1120 less than or equal to stored size.
1122 2023-11-23 Costas Argyris <costas.argyris@gmail.com>
1124 * configure.ac: Handle new --enable-win32-utf8-manifest
1126 * config.host: allow win32 utf8 manifest to be disabled
1128 * configure: Regenerate.
1130 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
1133 * config/pa/pa.h (MAX_FIXED_MODE_SIZE): Define.
1135 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
1138 * config/pa/predicates.md (integer_store_memory_operand): Return
1139 true for REG+D addresses when reload_in_progress is true.
1141 2023-11-22 Richard Biener <rguenther@suse.de>
1143 PR tree-optimization/112344
1144 * tree-chrec.cc (chrec_apply): Perform the overall increment
1145 calculation and increment in an unsigned type.
1147 2023-11-22 Andrew Stubbs <ams@codesourcery.com>
1149 * config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a
1152 2023-11-22 Vladimir N. Makarov <vmakarov@redhat.com>
1154 PR rtl-optimization/112610
1155 * ira-costs.cc: (find_costs_and_classes): Remove arg.
1156 Use ira_dump_file for printing.
1157 (print_allocno_costs, print_pseudo_costs): Ditto.
1158 (ira_costs): Adjust call of find_costs_and_classes.
1159 (ira_set_pseudo_classes): Set up and restore ira_dump_file.
1161 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1164 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix vcompress bug.
1166 2023-11-22 Tamar Christina <tamar.christina@arm.com>
1168 * config/aarch64/aarch64-simd.md
1169 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip,
1170 aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): Split into...
1171 (aarch64_uaddw<mode>_lo_zip, aarch64_uaddw<mode>_hi_zip,
1172 "aarch64_usubw<mode>_lo_zip, "aarch64_usubw<mode>_hi_zip): ... This.
1173 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): Remove.
1174 (perm_hilo): Remove UNSPEC_ZIP1, UNSPEC_ZIP2.
1176 2023-11-22 Christophe Lyon <christophe.lyon@linaro.org>
1178 * config/arm/arm-mve-builtins.cc
1179 (function_resolver::infer_pointer_type): Remove spurious line.
1181 2023-11-22 Xi Ruoyao <xry111@xry111.site>
1183 * config/loongarch/lsx.md (vec_perm<mode:LSX>): Make the
1185 * config/loongarch/loongarch.cc (loongarch_expand_vec_perm):
1186 Use the mode of the selector (instead of the shuffled vector)
1187 for truncating it. Operate on subregs in the selector mode if
1188 the shuffled vector has a different mode (i. e. it's a
1189 floating-point vector).
1191 2023-11-22 Hongyu Wang <hongyu.wang@intel.com>
1193 * config/i386/i386.md (push2_di): Adjust operand order for AT&T
1195 (pop2_di): Likewise.
1196 (push2p_di): Likewise.
1197 (pop2p_di): Likewise.
1199 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1202 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Adapt the priority.
1203 (shuffle_generic_patterns): Fix permutation indice bug.
1204 * config/riscv/vector-iterators.md: Fix VEI16 bug.
1206 2023-11-22 liuhongt <hongtao.liu@intel.com>
1208 * config/i386/sse.md (cbranch<mode>4): Extend to Vector
1211 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1214 * config/vax/vax.cc (index_term_p): Only accept the index scaler
1215 as the RHS operand to ASHIFT.
1217 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1219 * config/riscv/predicates.md (order_operator): Remove predicate.
1220 * config/riscv/riscv.cc (riscv_rtx_costs): Update accordingly.
1221 * config/riscv/riscv.md (*branch<mode>, *mov<GPR:mode><X:mode>cc)
1222 (cstore<mode>4): Likewise.
1224 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1226 * config/riscv/riscv-protos.h (riscv_expand_float_scc): Add
1227 `invert_ptr' parameter.
1228 * config/riscv/riscv.cc (riscv_emit_float_compare): Add NE
1230 (riscv_expand_float_scc): Pass `invert_ptr' through to
1231 `riscv_emit_float_compare'.
1232 (riscv_expand_conditional_move): Pass `&invert' to
1233 `riscv_expand_float_scc'.
1234 * config/riscv/riscv.md (add<mode>cc): Likewise.
1236 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1238 * config/riscv/riscv.cc (riscv_emit_float_compare) <NE>: Handle
1240 <EQ, LE, LT, GE, GT>: Return operands supplied as is.
1241 (riscv_emit_binary): Call `riscv_emit_binary' directly rather
1242 than going through a temporary register for word-mode targets.
1243 (riscv_expand_conditional_branch): Canonicalize the comparison
1244 if not against constant zero.
1246 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1248 * config/riscv/predicates.md (ne_operator): New predicate.
1249 * config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
1250 floating-point condition.
1251 * config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
1252 (@cbranch<ANYF:mode>4): ... this. Only expand the RTX via
1253 `riscv_expand_conditional_branch' for `!signed_order_operator'
1254 operators, otherwise let it through.
1255 (*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
1258 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1260 * config/riscv/riscv.cc (riscv_expand_conditional_move): Don't
1261 bail out in floating-point conditions.
1263 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1265 * config/riscv/riscv.cc (riscv_expand_float_scc): Suppress the
1266 use of SUBREG if the conditional-set target is word-mode.
1268 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1270 * config/riscv/riscv.md (add<mode>cc): New expander.
1272 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1274 * config/riscv/predicates.md (movcc_operand): New predicate.
1275 * config/riscv/riscv.cc (riscv_expand_conditional_move): Handle
1277 * config/riscv/riscv.md (mov<mode>cc): Likewise.
1278 * config/riscv/riscv.opt (mmovcc): New option.
1279 * doc/invoke.texi (Option Summary): Document it.
1281 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1283 * config/riscv/riscv-protos.h (riscv_emit_unary): New prototype.
1284 * config/riscv/riscv.cc (riscv_emit_unary): New function.
1286 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1288 * config/riscv/riscv.cc (riscv_expand_conditional_move): Unify
1289 conditional-move handling across all the relevant targets.
1291 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1293 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
1294 accept constants for T-Head data input operands.
1296 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1298 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
1299 accept constants for T-Head comparison operands.
1301 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1303 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
1304 the check for operand 1 being constant 0 in the Ventana/Zicond
1305 case for equality comparisons.
1307 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1309 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
1310 invert the condition for GEU and LEU.
1312 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1314 * config/riscv/riscv.cc (riscv_insn_cost): New function.
1315 (riscv_max_noce_ifcvt_seq_cost): Likewise.
1316 (riscv_noce_conversion_profitable_p): Likewise.
1317 (TARGET_INSN_COST): New macro.
1318 (TARGET_MAX_NOCE_IFCVT_SEQ_COST): New macro.
1319 (TARGET_NOCE_CONVERSION_PROFITABLE_P): New macro.
1321 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1323 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
1324 extraneous variable for EQ vs NE operation selection.
1326 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1328 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
1329 `nullptr' rather than 0 to initialize a pointer.
1331 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1333 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
1334 `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
1336 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1338 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
1339 `mode' for `GET_MODE (dest)' throughout.
1341 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1343 * config/riscv/riscv.cc (riscv_emit_int_compare): Bail out if
1344 NEED_EQ_NE_P but the comparison is neither EQ nor NE.
1346 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
1348 * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
1350 (*mov<GPR:mode><X:mode>cc): ... here.
1352 2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
1354 PR middle-end/112406
1355 * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow
1356 reduction index != 1.
1357 (vect_transform_reduction): Handle reduction index != 1.
1359 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
1361 * common.md (aligned_register_operand): New predicate.
1363 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
1365 * ira-int.h (ira_allocno): Add a register_filters field.
1366 (ALLOCNO_REGISTER_FILTERS): New macro.
1367 (ALLOCNO_SET_REGISTER_FILTERS): Likewise.
1368 * ira-build.cc (ira_create_allocno): Initialize register_filters.
1369 (create_cap_allocno): Propagate register_filters.
1370 (propagate_allocno_info): Likewise.
1371 (propagate_some_info_from_allocno): Likewise.
1372 * ira-lives.cc (process_register_constraint_filters): New function.
1373 (process_bb_node_lives): Use it to record register filter
1375 * ira-color.cc (assign_hard_reg): Check register filters.
1376 (improve_allocation, fast_allocation): Likewise.
1378 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
1380 * lra-constraints.cc (process_alt_operands): Check register filters.
1382 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
1384 * recog.h (operand_alternative): Add a register_filters field.
1385 (alternative_register_filters): New function.
1386 * recog.cc (preprocess_constraints): Calculate the filters field.
1387 (constrain_operands): Check register filters.
1389 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
1391 * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter
1393 * doc/md.texi (define_register_constraint): Document it.
1394 * doc/tm.texi.in: Reference it in discussion about aligned registers.
1395 * doc/tm.texi: Regenerate.
1396 * gensupport.h (register_filters, get_register_filter_id): Declare.
1397 * gensupport.cc (register_filter_map, register_filters): New variables.
1398 (get_register_filter_id): New function.
1399 (process_define_register_constraint): Likewise.
1400 (process_rtx): Pass define_register_constraints to
1401 process_define_register_constraint.
1402 * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS.
1403 * genpreds.cc (constraint_data): Add a filter field.
1404 (add_constraint): Update accordingly.
1405 (process_define_register_constraint): Pass the filter operand.
1406 (write_init_reg_class_start_regs): New function.
1407 (write_get_register_filter): Likewise.
1408 (write_get_register_filter_id): Likewise.
1409 (write_tm_preds_h): Write a definition of target_constraints,
1410 plus helpers to test its contents. Write the get_register_filter*
1412 (write_insn_preds_c): Write init_reg_class_start_regs.
1413 * reginfo.cc (init_reg_class_start_regs): Declare.
1414 (init_reg_sets): Call it.
1415 * target-globals.h (this_target_constraints): Declare.
1416 (target_globals): Add a constraints field.
1417 (restore_target_globals): Update accordingly.
1418 * target-globals.cc: Include tm_p.h.
1419 (default_target_globals): Initialize the constraints field.
1420 (save_target_globals): Handle the constraints field.
1421 (target_globals::~target_globals): Likewise.
1423 2023-11-21 Richard Biener <rguenther@suse.de>
1425 PR tree-optimization/112623
1426 * tree-ssa-forwprop.cc (simplify_vector_constructor):
1427 Check the source mode of the insn for vector pack/unpacks.
1429 2023-11-21 Richard Biener <rguenther@suse.de>
1431 * tree-vect-loop.cc (vect_analyze_loop_2): Move check
1432 of VF against max_vf until VF is final.
1434 2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1437 * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32.
1439 2023-11-21 Tamar Christina <tamar.christina@arm.com>
1441 * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings.
1443 2023-11-21 Tamar Christina <tamar.christina@arm.com>
1446 * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a,
1447 armv9.3-a): Update to generic-armv9-a.
1448 * config/aarch64/aarch64-cores.def (generic-armv9-a): New.
1449 * config/aarch64/aarch64-tune.md: Regenerate.
1450 * config/aarch64/aarch64.cc: Include generic_armv9_a.h.
1451 * config/aarch64/tuning_models/generic_armv9_a.h: New file.
1453 2023-11-21 Tamar Christina <tamar.christina@arm.com>
1456 * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a,
1457 armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a,
1458 armv8.8-a): Update to generic_armv8_a.
1459 * config/aarch64/aarch64-cores.def (generic-armv8-a): New.
1460 * config/aarch64/aarch64-tune.md: Regenerate.
1461 * config/aarch64/aarch64.cc: Include generic_armv8_a.h
1462 * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to
1463 TARGET_CPU_generic_armv8_a.
1464 * config/aarch64/tuning_models/generic_armv8_a.h: New file.
1466 2023-11-21 Tamar Christina <tamar.christina@arm.com>
1469 * config/aarch64/aarch64-cores.def: Add generic.
1470 * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic.
1471 * config/aarch64/aarch64-tune.md: Regenerate
1472 * config/aarch64/aarch64.cc (all_cores): Remove generic
1473 * config/aarch64/aarch64.h (enum target_cpus): Remove
1476 2023-11-21 Tamar Christina <tamar.christina@arm.com>
1479 * config/aarch64/aarch64.cc (generic_addrcost_table,
1480 exynosm1_addrcost_table,
1481 xgene1_addrcost_table,
1482 thunderx2t99_addrcost_table,
1483 thunderx3t110_addrcost_table,
1484 tsv110_addrcost_table,
1485 qdf24xx_addrcost_table,
1486 a64fx_addrcost_table,
1487 neoversev1_addrcost_table,
1488 neoversen2_addrcost_table,
1489 neoversev2_addrcost_table,
1490 generic_regmove_cost,
1491 cortexa57_regmove_cost,
1492 cortexa53_regmove_cost,
1493 exynosm1_regmove_cost,
1494 thunderx_regmove_cost,
1495 xgene1_regmove_cost,
1496 qdf24xx_regmove_cost,
1497 thunderx2t99_regmove_cost,
1498 thunderx3t110_regmove_cost,
1499 tsv110_regmove_cost,
1501 neoversen2_regmove_cost,
1502 neoversev1_regmove_cost,
1503 neoversev2_regmove_cost,
1504 generic_vector_cost,
1506 qdf24xx_vector_cost,
1507 thunderx_vector_cost,
1509 cortexa57_vector_cost,
1510 exynosm1_vector_cost,
1512 thunderx2t99_vector_cost,
1513 thunderx3t110_vector_cost,
1514 ampere1_vector_cost,
1515 generic_branch_cost,
1523 thunderxt88_tunings,
1530 thunderx2t99_tunings,
1531 thunderx3t110_tunings,
1535 neoversev1_vector_cost,
1537 neoverse512tvb_vector_cost,
1538 neoverse512tvb_tunings,
1539 neoversen2_vector_cost,
1541 neoversev2_vector_cost,
1543 a64fx_tunings): Split into own files.
1544 * config/aarch64/tuning_models/a64fx.h: New file.
1545 * config/aarch64/tuning_models/ampere1.h: New file.
1546 * config/aarch64/tuning_models/ampere1a.h: New file.
1547 * config/aarch64/tuning_models/cortexa35.h: New file.
1548 * config/aarch64/tuning_models/cortexa53.h: New file.
1549 * config/aarch64/tuning_models/cortexa57.h: New file.
1550 * config/aarch64/tuning_models/cortexa72.h: New file.
1551 * config/aarch64/tuning_models/cortexa73.h: New file.
1552 * config/aarch64/tuning_models/emag.h: New file.
1553 * config/aarch64/tuning_models/exynosm1.h: New file.
1554 * config/aarch64/tuning_models/generic.h: New file.
1555 * config/aarch64/tuning_models/neoverse512tvb.h: New file.
1556 * config/aarch64/tuning_models/neoversen1.h: New file.
1557 * config/aarch64/tuning_models/neoversen2.h: New file.
1558 * config/aarch64/tuning_models/neoversev1.h: New file.
1559 * config/aarch64/tuning_models/neoversev2.h: New file.
1560 * config/aarch64/tuning_models/qdf24xx.h: New file.
1561 * config/aarch64/tuning_models/saphira.h: New file.
1562 * config/aarch64/tuning_models/thunderx.h: New file.
1563 * config/aarch64/tuning_models/thunderx2t99.h: New file.
1564 * config/aarch64/tuning_models/thunderx3t110.h: New file.
1565 * config/aarch64/tuning_models/thunderxt88.h: New file.
1566 * config/aarch64/tuning_models/tsv110.h: New file.
1567 * config/aarch64/tuning_models/xgene1.h: New file.
1569 2023-11-21 Tamar Christina <tamar.christina@arm.com>
1571 * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode,
1572 vec_unpack<su>_lo_<mode): Split into...
1573 (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode,
1574 vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These.
1575 (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
1576 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
1577 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New.
1578 (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2.
1580 2023-11-21 Tamar Christina <tamar.christina@arm.com>
1582 * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla.
1583 (aarch64_vector_costs::count_ops): Likewise.
1585 2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
1587 PR middle-end/112634
1588 * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of
1589 __atomic_add_fetch() to the signed counter type.
1590 (gen_counter_update): Fix formatting.
1592 2023-11-21 Jakub Jelinek <jakub@redhat.com>
1594 * tree-profile.cc (gen_counter_update, tree_profiling): Formatting
1597 2023-11-21 Jakub Jelinek <jakub@redhat.com>
1599 PR middle-end/112639
1600 * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1
1601 is specified but cleared, call save_expr on arg0.
1603 2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
1605 * config/i386/i386-expand.h (gen_push): Add default bool
1607 (gen_pop): Likewise.
1608 * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add
1610 * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add
1611 ppx_p parameter for function declaration.
1612 (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true.
1613 (gen_push): Likewise.
1614 (ix86_emit_restore_reg_using_pop2): Likewise for pop2p.
1615 (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX.
1616 (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn
1617 and adjust cfi when ppx_p is ture.
1618 (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its
1620 (ix86_emit_restore_regs_using_pop2): Likewise.
1621 (ix86_expand_epilogue): Parse TARGET_APX_PPX to
1622 ix86_emit_restore_reg_using_pop.
1623 * config/i386/i386.h (TARGET_APX_PPX): New.
1624 * config/i386/i386.md (UNSPEC_APX_PPX): New unspec.
1625 (pushp_di): New define_insn.
1626 (popp_di): Likewise.
1627 (push2p_di): Likewise.
1628 (pop2p_di): Likewise.
1629 * config/i386/i386.opt: Add apx_ppx enum.
1631 2023-11-21 Richard Biener <rguenther@suse.de>
1633 PR tree-optimization/111970
1634 * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation
1635 for SLP gather load.
1636 (vectorizable_store): Likewise for SLP scatter store.
1638 2023-11-21 Xi Ruoyao <xry111@xry111.site>
1640 * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to
1641 exclude it for target libraries.
1642 (loongarch_isa_base_features): Likewise.
1643 (loongarch_isa): Likewise.
1644 (loongarch_abi): Likewise.
1645 (loongarch_target): Likewise.
1646 (loongarch_cpu_default_isa): Likewise.
1648 2023-11-21 liuhongt <hongtao.liu@intel.com>
1651 * config/i386/i386-expand.cc (emit_reduc_half): Hanlde
1653 * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander.
1654 (reduc_<code>_scal_v4qi): Ditto.
1656 2023-11-20 Marc Poulhiès <dkm@kataplop.net>
1658 * config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic.
1659 * config/nvptx/nvptx.cc (nvptx_function_arg_advance): Adjust to use fixed name.
1660 (nvptx_declare_function_name): Likewise.
1661 (nvptx_call_args): Likewise.
1662 (nvptx_expand_call): Likewise.
1664 2023-11-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
1666 * tree-profile.cc (gen_counter_update): Use unshare_expr() for the
1667 counter expression in the second gimple_build_assign().
1669 2023-11-20 Jan Hubicka <jh@suse.cz>
1671 * cgraph.cc (add_detected_attribute_1): New function.
1672 (cgraph_node::add_detected_attribute): Likewise.
1673 * cgraph.h (cgraph_node::add_detected_attribute): Declare.
1674 * common.opt: Add -Wsuggest-attribute=returns_nonnull.
1675 * doc/invoke.texi: Document new flag.
1676 * gimple-range-fold.cc (fold_using_range::range_of_call):
1677 Use known reutrn value ranges.
1678 * ipa-prop.cc (struct ipa_return_value_summary): New type.
1679 (class ipa_return_value_sum_t): New type.
1680 (ipa_return_value_sum): New summary.
1681 (ipa_record_return_value_range): New function.
1682 (ipa_return_value_range): New function.
1683 * ipa-prop.h (ipa_return_value_range): Declare.
1684 (ipa_record_return_value_range): Declare.
1685 * ipa-pure-const.cc (warn_function_returns_nonnull): New funcion.
1686 * ipa-utils.h (warn_function_returns_nonnull): Declare.
1687 * symbol-summary.h: Fix comment.
1688 * tree-vrp.cc (execute_ranger_vrp): Record return values.
1690 2023-11-20 Richard Biener <rguenther@suse.de>
1692 PR tree-optimization/112618
1693 * tree-vect-loop.cc (vect_transform_loop_stmt): For not
1694 relevant and unused .MASK_CALL make sure we remove the
1697 2023-11-20 Richard Biener <rguenther@suse.de>
1699 PR tree-optimization/112281
1700 * tree-loop-distribution.cc
1701 (loop_distribution::pg_add_dependence_edges): For = in the
1702 innermost common loop record a partition conflict.
1704 2023-11-20 Richard Biener <rguenther@suse.de>
1706 PR middle-end/112622
1707 * convert.cc (convert_to_real_1): Use element_precision
1708 where a vector type might appear. Provide specific
1709 diagnostic for unexpected vector argument.
1711 2023-11-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1714 * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE.
1715 * config/riscv/vector.md: Fix slide1 intermediate mode bug.
1717 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
1719 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p):
1720 Add check for XLEN == 32.
1721 * config/riscv/vector-iterators.md: Change VLS part of the
1722 demote iterator to 2x elements modes
1723 * config/riscv/vector.md: Adjust iterators and insn conditions.
1725 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1727 * config/arm/arm-mve-builtins-base.cc (vld1_impl, vld1q)
1728 (vst1_impl, vst1q): New.
1729 * config/arm/arm-mve-builtins-base.def (vld1q, vst1q): New.
1730 * config/arm/arm-mve-builtins-base.h (vld1q, vst1q): New.
1731 * config/arm/arm_mve.h
1735 (vld1q_s32): Delete.
1736 (vld1q_s16): Delete.
1738 (vld1q_u32): Delete.
1739 (vld1q_u16): Delete.
1740 (vld1q_f32): Delete.
1741 (vld1q_f16): Delete.
1742 (vst1q_f32): Delete.
1743 (vst1q_f16): Delete.
1745 (vst1q_s32): Delete.
1746 (vst1q_s16): Delete.
1748 (vst1q_u32): Delete.
1749 (vst1q_u16): Delete.
1750 (__arm_vld1q_s8): Delete.
1751 (__arm_vld1q_s32): Delete.
1752 (__arm_vld1q_s16): Delete.
1753 (__arm_vld1q_u8): Delete.
1754 (__arm_vld1q_u32): Delete.
1755 (__arm_vld1q_u16): Delete.
1756 (__arm_vst1q_s8): Delete.
1757 (__arm_vst1q_s32): Delete.
1758 (__arm_vst1q_s16): Delete.
1759 (__arm_vst1q_u8): Delete.
1760 (__arm_vst1q_u32): Delete.
1761 (__arm_vst1q_u16): Delete.
1762 (__arm_vld1q_f32): Delete.
1763 (__arm_vld1q_f16): Delete.
1764 (__arm_vst1q_f32): Delete.
1765 (__arm_vst1q_f16): Delete.
1766 (__arm_vld1q): Delete.
1767 (__arm_vst1q): Delete.
1768 * config/arm/mve.md (mve_vld1q_f<mode>): Rename into ...
1769 (@mve_vld1q_f<mode>): ... this.
1770 (mve_vld1q_<supf><mode>): Rename into ...
1771 (@mve_vld1q_<supf><mode>) ... this.
1772 (mve_vst1q_f<mode>): Rename into ...
1773 (@mve_vst1q_f<mode>): ... this.
1774 (mve_vst1q_<supf><mode>): Rename into ...
1775 (@mve_vst1q_<supf><mode>) ... this.
1777 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1779 * config/arm/arm-mve-builtins-shapes.cc (load, store): New.
1780 * config/arm/arm-mve-builtins-shapes.h (load, store): New.
1782 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1784 * config/arm/arm-mve-builtins-functions.h (multi_vector_function)
1785 (full_width_access): New classes.
1786 * config/arm/arm-mve-builtins.cc
1787 (find_type_suffix_for_scalar_type, infer_pointer_type)
1788 (require_pointer_type, get_contiguous_base, add_mem_operand)
1789 (add_fixed_operand, use_contiguous_load_insn)
1790 (use_contiguous_store_insn): New.
1791 * config/arm/arm-mve-builtins.h (memory_vector_mode)
1792 (infer_pointer_type, require_pointer_type, get_contiguous_base)
1794 (add_fixed_operand, use_contiguous_load_insn)
1795 (use_contiguous_store_insn): New.
1797 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1799 * config/arm/arm-mve-builtins-shapes.cc (build_const_pointer):
1801 (parse_type): Add support for '_', 'al' and 'as'.
1802 * config/arm/arm-mve-builtins.h (function_instance): Add
1804 (function_base): Likewise.
1806 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1808 * config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Fix
1809 initialization of arm_simd_types[].eltype.
1810 * config/arm/arm-mve-builtins.def (DEF_MVE_TYPE): Fix scalar
1813 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1815 * typeclass.h (enum type_class): Add vector_type_class.
1816 * builtins.cc (type_to_class): Return vector_type_class for
1818 * doc/extend.texi (__builtin_classify_type): Mention bit-precise
1819 integer types and vector types.
1821 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
1823 PR middle-end/112406
1824 * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern):
1825 Convert masks for conditional operations as well.
1827 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1829 PR tree-optimization/90693
1830 * tree-ssa-math-opts.cc (match_single_bit_test): Mark POPCOUNT with
1831 result only used in equality comparison against 1 with direct optab
1832 support as .POPCOUNT call with 2 arguments.
1833 * internal-fn.h (expand_POPCOUNT): Declare.
1834 * internal-fn.def (DEF_INTERNAL_INT_EXT_FN): New macro, document it,
1835 undefine at the end.
1836 (POPCOUNT): Use it instead of DEF_INTERNAL_INT_FN.
1837 * internal-fn.cc (DEF_INTERNAL_INT_EXT_FN): Define to nothing before
1838 inclusion to define expanders.
1839 (expand_POPCOUNT): New function.
1841 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1843 PR tree-optimization/90693
1844 * tree-ssa-math-opts.cc (match_single_bit_test): New function.
1845 (math_opts_dom_walker::after_dom_children): Call it for EQ_EXPR
1846 and NE_EXPR assignments and GIMPLE_CONDs.
1848 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1850 * internal-fn.def: Document missing DEF_INTERNAL* macros and make sure
1851 they are all undefined at the end.
1852 * internal-fn.cc (lookup_hilo_internal_fn, lookup_evenodd_internal_fn,
1853 widening_fn_p, get_len_internal_fn): Don't undef DEF_INTERNAL_*FN
1854 macros after inclusion of internal-fn.def.
1856 2023-11-20 Haochen Jiang <haochen.jiang@intel.com>
1858 * common/config/i386/cpuinfo.h (get_available_features):
1859 Add avx10_set and version and detect avx10.1.
1860 (cpu_indicator_init): Handle avx10.1-512.
1861 * common/config/i386/i386-common.cc
1862 (OPTION_MASK_ISA2_AVX10_1_256_SET): New.
1863 (OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto.
1864 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
1865 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
1866 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1.
1867 (ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512.
1868 Add indicator for explicit no-avx512 and no-avx10.1 options.
1869 * common/config/i386/i386-cpuinfo.h (enum processor_features):
1870 Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512.
1871 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
1872 AVX10_1_256 and AVX10_1_512.
1873 * config/i386/cpuid.h (bit_AVX10): New.
1874 (bit_AVX10_256): Ditto.
1875 (bit_AVX10_512): Ditto.
1876 * config/i386/driver-i386.cc (check_avx10_avx512_features): New.
1877 (host_detect_local_cpu): Do not append "-mno-" options under
1878 specific scenarios to avoid emitting a warning.
1879 * config/i386/i386-isa.def
1880 (EVEX512): Add DEF_PTA(EVEX512).
1881 (AVX10_1_256): Add DEF_PTA(AVX10_1_256).
1882 (AVX10_1_512): Add DEF_PTA(AVX10_1_512).
1883 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and
1885 (ix86_function_specific_save): Save explicit no indicator.
1886 (ix86_function_specific_restore): Restore explicit no indicator.
1887 (ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and
1889 (ix86_valid_target_attribute_tree): Handle avx512 function
1890 attributes with avx10.1 command line option.
1891 (ix86_option_override_internal): Handle AVX10.1 options.
1892 * config/i386/i386.h: Add PTA_EVEX512 for AVX512 target
1894 * config/i386/i386.opt: Add variable ix86_no_avx512_explicit and
1895 ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and
1897 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
1898 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
1899 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
1902 2023-11-20 liuhongt <hongtao.liu@intel.com>
1905 * config/i386/sse.md (reduc_<code>_scal_<mode>): New expander.
1906 (REDUC_ANY_LOGIC_MODE): New iterator.
1907 (REDUC_PLUS_MODE): Extend to VxHI/SI/DImode.
1908 (REDUC_SSE_PLUS_MODE): Ditto.
1910 2023-11-20 xuli <xuli1@eswincomputing.com>
1913 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum.
1914 * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options.
1915 (expand_block_move): Ditto.
1916 * config/riscv/riscv.opt: Add -mmemcpy-strategy=.
1918 2023-11-20 Lulu Cheng <chenglulu@loongson.cn>
1920 * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
1922 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1924 * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Optimize constant AVL.
1926 2023-11-19 Philipp Tomsich <philipp.tomsich@vrull.eu>
1928 * config/riscv/riscv-protos.h (extract_base_offset_in_addr): Prototype.
1929 * config/riscv/riscv.cc (riscv_fusion_pairs): New enum.
1930 (riscv_tune_param): Add fusible_ops field.
1931 (riscv_tune_param_rocket_tune_info): Initialize new field.
1932 (riscv_tune_param_sifive_7_tune_info): Likewise.
1933 (thead_c906_tune_info): Likewise.
1934 (generic_oo_tune_info): Likewise.
1935 (optimize_size_tune_info): Likewise.
1936 (riscv_macro_fusion_p): New function.
1937 (riscv_fusion_enabled_p): Likewise.
1938 (riscv_macro_fusion_pair_p): Likewise.
1939 (TARGET_SCHED_MACRO_FUSION_P): Define.
1940 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
1941 (extract_base_offset_in_addr): Moved into riscv.cc from...
1942 * config/riscv/thead.cc: Here.
1943 Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>
1944 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
1946 2023-11-19 Jeff Law <jlaw@ventanamicro.com>
1948 * config/c6x/c6x.md (mvilc): Add mode to UNSPEC source.
1949 * config/mips/mips.md (rdhwr_synci_step_<mode>): Likewise.
1950 * config/riscv/riscv.md (riscv_frcsr, riscv_frflags): Likewise.
1951 * config/s390/s390.md (@split_stack_call<mode>): Likewise.
1952 (@split_stack_cond_call<mode>): Likewise.
1953 * config/sh/sh.md (sp_switch_1): Likewise.
1955 2023-11-19 David Malcolm <dmalcolm@redhat.com>
1957 * diagnostic.h: Include "rich-location.h".
1958 * edit-context.h (class fixit_hint): New forward decl.
1959 * gcc-rich-location.h: Include "rich-location.h".
1960 * genmatch.cc: Likewise.
1961 * pretty-print.h: Likewise.
1963 2023-11-19 David Malcolm <dmalcolm@redhat.com>
1965 * Makefile.in (CPPLIB_H): Add libcpp/include/rich-location.h.
1966 * coretypes.h (class rich_location): New forward decl.
1968 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1970 * config/riscv/riscv-v.cc (expand_tuple_move): Fix bug.
1972 2023-11-19 David Malcolm <dmalcolm@redhat.com>
1975 * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-strtok.
1977 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1979 * config/loongarch/predicates.md (const_call_insn_operand):
1980 Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to
1981 "true" to make the coding style consistent.
1983 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1985 * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas):
1987 * config/loongarch/loongarch-str.h: Regenerate.
1988 * config/loongarch/loongarch.opt: Regenerate.
1989 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
1990 * config/loongarch/loongarch-cpu.cc
1991 (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH
1992 and OPTION_MASK_ISA_LAMCAS.
1993 * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use
1994 TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty
1995 lines from assembly output.
1996 (atomic_exchange<mode>_short): Likewise.
1997 (atomic_exchange<mode:SHORT>): Likewise.
1998 (atomic_fetch_add<mode>_short): Likewise.
1999 (atomic_fetch_add<mode:SHORT>): Likewise.
2000 (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead
2001 of ISA_BASE_IS_LA64V110.
2002 (atomic_compare_and_swap<mode>): Likewise.
2003 (atomic_compare_and_swap<mode:GPR>): Likewise.
2004 (atomic_compare_and_swap<mode:SHORT>): Likewise.
2005 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump
2006 status if -mlam-bh and -mlamcas if -fverbose-asm.
2008 2023-11-18 Xi Ruoyao <xry111@xry111.site>
2010 * config/loongarch/loongarch.cc (loongarch_print_operand): Don't
2011 print dbar 0x700 if TARGET_LD_SEQ_SA.
2012 * config/loongarch/sync.md (atomic_load<mode>): Likewise.
2014 2023-11-18 Xi Ruoyao <xry111@xry111.site>
2016 * config/loongarch/loongarch.md (DIV): New mode iterator.
2017 (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32.
2018 (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32.
2019 (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32.
2020 (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32.
2022 2023-11-18 Xi Ruoyao <xry111@xry111.site>
2024 * config/loongarch/loongarch-def.h:
2025 (loongarch_isa_base_features): Declare. Define it in ...
2026 * config/loongarch/loongarch-cpu.cc
2027 (loongarch_isa_base_features): ... here.
2028 (fill_native_cpu_config): If we know the base ISA of the CPU
2029 model from PRID, use it instead of la64 (v1.0). Check if all
2030 expected features of this base ISA is available, emit a warning
2032 * config/loongarch/loongarch-opts.cc (config_target_isa): Enable
2033 the features implied by the base ISA if not -march=native.
2035 2023-11-18 Xi Ruoyao <xry111@xry111.site>
2037 * config/loongarch/genopts/isa-evolution.in: New data file.
2038 * config/loongarch/genopts/genstr.sh: Translate info in
2039 isa-evolution.in when generating loongarch-str.h, loongarch.opt,
2040 and loongarch-cpucfg-map.h.
2041 * config/loongarch/genopts/loongarch.opt.in (isa_evolution):
2043 * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New
2045 (loongarch-str.h): Depend on isa-evolution.in.
2046 (loongarch.opt): Depend on isa-evolution.in.
2047 (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h.
2048 * config/loongarch/loongarch-str.h: Regenerate.
2049 * config/loongarch/loongarch-def.h (loongarch_isa): Add field
2050 for evolution features. Add helper function to enable features
2052 Probe native CPU capability and save the corresponding options
2054 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config):
2055 Probe native CPU capability and save the corresponding options
2057 (cache_cpucfg): Simplify with C++11-style for loop.
2058 (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ...
2059 * config/loongarch/loongarch.cc
2060 (loongarch_option_override_internal): Enable the ISA evolution
2061 feature options implied by -march and not explicitly disabled.
2062 (loongarch_asm_code_end): New function, print ISA information as
2063 comments in the assembly if -fverbose-asm. It makes easier to
2064 debug things like -march=native.
2065 (TARGET_ASM_CODE_END): Define.
2066 * config/loongarch/loongarch.opt: Regenerate.
2067 * config/loongarch/loongarch-cpucfg-map.h: Generate.
2068 (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here.
2070 2023-11-18 Xi Ruoyao <xry111@xry111.site>
2072 * config/loongarch/genopts/loongarch-strings:
2073 (STR_ISA_BASE_LA64V110): Add.
2074 * config/loongarch/genopts/loongarch.opt.in:
2075 (ISA_BASE_LA64V110): Add.
2076 * config/loongarch/loongarch-def.c
2077 (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
2078 to STR_ISA_BASE_LA64V110.
2079 * config/loongarch/loongarch.opt: Regenerate.
2080 * config/loongarch/loongarch-str.h: Regenerate.
2082 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
2084 * doc/invoke.texi (-fprofile-update): Clarify default method. Document
2085 the atomic method behaviour.
2086 * tree-profile.cc (enum counter_update_method): New.
2087 (counter_update): Likewise.
2088 (gen_counter_update): Use counter_update_method. Split the
2089 atomic counter update in two 32-bit atomic operations if
2091 (tree_profiling): Select counter_update_method.
2093 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
2095 * tree-profile.cc (gen_assign_counter_update): New.
2096 (gen_counter_update): Likewise.
2097 (gimple_gen_edge_profiler): Use gen_counter_update().
2098 (gimple_gen_time_profiler): Likewise.
2100 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
2102 * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define.
2103 * doc/tm.texi: Regenerate.
2104 * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add.
2105 * target.def (have_libatomic): New.
2107 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
2110 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
2112 * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
2113 * config/sparc/sparc.c (sparc_gcov_type_size): New.
2114 (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
2115 * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
2116 * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
2117 * doc/tm.texi.in: Regenerate.
2118 * target.def (gcov_type_size): New target hook.
2119 * targhooks.c (default_gcov_type_size): New.
2120 * targhooks.h (default_gcov_type_size): Declare.
2121 * tree-profile.c (gimple_gen_edge_profiler): Use precision of
2123 (gimple_gen_time_profiler): Likewise.
2125 2023-11-18 Kito Cheng <kito.cheng@sifive.com>
2127 * config/riscv/riscv-target-attr.cc
2128 (riscv_target_attr_parser::parse_arch): Use char[] for
2129 std::unique_ptr to prevent mismatched new delete issue.
2130 (riscv_process_one_target_attr): Ditto.
2131 (riscv_process_target_attr): Ditto.
2133 2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2135 * config/riscv/vector-iterators.md: Refactor iterators.
2137 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
2139 * config/loongarch/sync.md (atomic_load<mode>): New template.
2141 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
2143 * config/loongarch/loongarch-def.h: Add comments.
2144 * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro.
2145 * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence):
2146 Remove redundant code implementations.
2147 * config/loongarch/sync.md (d): Added QI, HI support.
2148 (atomic_add<mode>): New template.
2149 (atomic_exchange<mode>_short): Likewise.
2150 (atomic_cas_value_strong<mode>_amcas): Likewise..
2151 (atomic_fetch_add<mode>_short): Likewise.
2153 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
2155 * config.gcc: Support LA664.
2156 * config/loongarch/genopts/loongarch-strings: Likewise.
2157 * config/loongarch/genopts/loongarch.opt.in: Likewise.
2158 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise.
2159 * config/loongarch/loongarch-def.c: Likewise.
2160 * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise.
2161 (ISA_BASE_LA64V110): Define macro.
2162 (N_ARCH_TYPES): Update value.
2163 (N_TUNE_TYPES): Update value.
2164 (CPU_LA664): New macro.
2165 * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise.
2166 (isa_base_compat_p): Likewise.
2167 * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled
2168 when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110.
2169 (TARGET_uARCH_LA664): Define macro.
2170 * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise.
2171 * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width):
2173 * config/loongarch/loongarch.opt: Regenerate.
2175 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
2176 Xi Ruoyao <xry111@xry111.site>
2178 * config.in: Regenerate.
2179 * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro.
2180 * config/loongarch/loongarch.cc (loongarch_legitimize_call_address):
2181 If binutils supports call36, the function call is not split over expand.
2182 * config/loongarch/loongarch.md: Add call36 generation code.
2183 * config/loongarch/predicates.md: Likewise.
2184 * configure: Regenerate.
2185 * configure.ac: Check whether binutils supports call36.
2187 2023-11-18 David Malcolm <dmalcolm@redhat.com>
2190 * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o.
2191 * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and
2192 -Wanalyzer-infinite-loop. Add missing CWE link for
2193 -Wanalyzer-infinite-recursion.
2194 * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New.
2196 2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
2198 PR middle-end/112406
2199 PR middle-end/112552
2200 * tree-vect-loop.cc (vect_transform_reduction): Pass truth
2201 vectype for mask operand.
2203 2023-11-17 Jakub Jelinek <jakub@redhat.com>
2206 * gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after
2207 gsi_remove, change the way of passing fallthrough stmt at the end
2208 of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH
2209 with GF_CALL_NOTHROW flag.
2210 (expand_FALLTHROUGH): Change loc into array of 2 location_t elts,
2211 don't test wi.callback_result, instead check whether first
2212 elt is not UNKNOWN_LOCATION and in that case pedwarn with the
2214 * gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt
2215 after the flag has been used.
2216 * internal-fn.def (FALLTHROUGH): Mention in comment the special
2217 meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls.
2219 2023-11-17 Jakub Jelinek <jakub@redhat.com>
2221 PR tree-optimization/112566
2222 PR tree-optimization/83171
2223 * match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X),
2224 parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New
2226 ( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than
2227 BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX.
2229 2023-11-17 Jakub Jelinek <jakub@redhat.com>
2231 PR tree-optimization/112374
2232 * tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p
2233 special case only if op_use_stmt == use_stmt, use as_a rather than
2234 dyn_cast in that case.
2236 2023-11-17 Richard Biener <rguenther@suse.de>
2239 2023-11-14 Richard Biener <rguenther@suse.de>
2241 PR tree-optimization/112281
2242 * tree-loop-distribution.cc (pg_add_dependence_edges):
2243 Preserve stmt order when the innermost loop has exact
2246 2023-11-17 Georg-Johann Lay <avr@gjlay.de>
2249 * config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]:
2250 Only return some .progmem*.data section if the user did not
2251 specify a section attribute.
2252 (avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE
2253 in returned section flags.
2255 2023-11-17 Xi Ruoyao <xry111@xry111.site>
2257 * config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to
2258 be an reg_or_vector_same_val_operand. If it's a const vector
2259 with same negative elements, expand the copysign with a bitset
2260 instruction. Otherwise, force it into an register.
2261 * config/loongarch/lasx.md (copysign<mode>3): Likewise.
2263 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
2266 * config/rs6000/vsx.md (*vsx_le_mem_to_mem_mov_ti): New.
2268 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
2271 * config/rs6000/altivec.md (cbranchv16qi4): New expand pattern.
2272 * config/rs6000/rs6000.cc (rs6000_generate_compare): Generate
2273 insn sequence for V16QImode equality compare.
2274 * config/rs6000/rs6000.h (MOVE_MAX_PIECES): Define.
2275 (STORE_MAX_PIECES): Define.
2277 2023-11-17 Li Wei <liwei@loongson.cn>
2279 * config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO):
2281 (CTZ_DEFINED_VALUE_AT_ZERO): Same.
2283 2023-11-17 Richard Biener <rguenther@suse.de>
2285 * dwarf2out.cc (add_AT_die_ref): Assert we do not add
2286 a self-ref DW_AT_abstract_origin or DW_AT_specification.
2288 2023-11-17 Jiahao Xu <xujiahao@loongson.cn>
2290 * config/loongarch/loongarch.cc
2291 (loongarch_builtin_vectorization_cost): Adjust.
2293 2023-11-16 Andrew Pinski <pinskia@gmail.com>
2295 PR rtl-optimization/112483
2296 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
2297 Call simplify_unary_operation for NEG instead of
2300 2023-11-16 Edwin Lu <ewlu@rivosinc.com>
2303 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): update macro name
2305 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
2308 * config/i386/i386.md (*addqi_ext2<mode>_0):
2309 New define_insn_and_split pattern.
2310 (*subqi_ext2<mode>_0): Ditto.
2311 (*<code>qi_ext2<mode>_0): Ditto.
2313 2023-11-16 John David Anglin <danglin@gcc.gnu.org>
2315 PR rtl-optimization/112415
2316 * config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
2317 displacements before reload. Simplify logic flow. Revise
2319 * config/pa/pa.h (TARGET_ELF64): New define.
2320 (INT14_OK_STRICT): Update define and comment.
2321 * config/pa/pa64-linux.h (TARGET_ELF64): Define.
2322 * config/pa/predicates.md (base14_operand): Don't check
2323 alignment of short displacements.
2324 (integer_store_memory_operand): Don't return true when
2325 reload_in_progress is true. Remove INT_5_BITS check.
2326 (floating_point_store_memory_operand): Don't return true when
2327 reload_in_progress is true. Use INT14_OK_STRICT to check
2328 whether long displacements are always okay.
2330 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
2333 * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp):
2334 Fix generation of invalid RTX in split pattern.
2336 2023-11-16 David Malcolm <dmalcolm@redhat.com>
2338 * diagnostic.cc (diagnostic_context::set_option_hooks): Add
2340 * diagnostic.h (diagnostic_context::option_enabled_p): Update for
2341 move of m_lang_mask.
2342 (diagnostic_context::set_option_hooks): Add "lang_mask" param.
2343 (diagnostic_context::get_lang_mask): New.
2344 (diagnostic_context::m_lang_mask): Move into m_option_callbacks,
2345 thus making private.
2346 * lto-wrapper.cc (main): Update for new lang_mask param of
2348 * toplev.cc (init_asm_output): Use get_lang_mask.
2349 (general_init): Move initialization of global_dc's lang_mask to
2350 new lang_mask param of set_option_hooks.
2352 2023-11-16 Tamar Christina <tamar.christina@arm.com>
2354 PR tree-optimization/111878
2355 * tree-vect-loop-manip.cc (find_loop_location): Skip edges check if
2358 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
2360 * config.gcc (riscv): Add riscv-target-attr.o.
2361 * config/riscv/riscv-protos.h (riscv_declare_function_size) New.
2362 (riscv_option_valid_attribute_p): New.
2363 (riscv_override_options_internal): New.
2364 (struct riscv_tune_info): New.
2365 (riscv_parse_tune): New.
2366 * config/riscv/riscv-target-attr.cc
2367 (class riscv_target_attr_parser): New.
2368 (struct riscv_attribute_info): New.
2369 (riscv_attributes): New.
2370 (riscv_target_attr_parser::parse_arch): New.
2371 (riscv_target_attr_parser::handle_arch): New.
2372 (riscv_target_attr_parser::handle_cpu): New.
2373 (riscv_target_attr_parser::handle_tune): New.
2374 (riscv_target_attr_parser::update_settings): New.
2375 (riscv_process_one_target_attr): New.
2376 (num_occurences_in_str): New.
2377 (riscv_process_target_attr): New.
2378 (riscv_option_valid_attribute_p): New.
2379 * config/riscv/riscv.cc: Include target-globals.h and
2381 (struct riscv_tune_info): Move to riscv-protos.h.
2382 (get_tune_str): New.
2383 (riscv_parse_tune): New parameter null_p.
2384 (riscv_declare_function_size): New.
2385 (riscv_option_override): Build target_option_default_node and
2386 target_option_current_node.
2387 (riscv_save_restore_target_globals): New.
2388 (riscv_option_restore): New.
2389 (riscv_previous_fndecl): New.
2390 (riscv_set_current_function): Apply the target attribute.
2391 (TARGET_OPTION_RESTORE): Define.
2392 (TARGET_OPTION_VALID_ATTRIBUTE_P): Ditto.
2393 * config/riscv/riscv.h (SWITCHABLE_TARGET): Define to 1.
2394 (ASM_DECLARE_FUNCTION_SIZE) Define.
2395 * config/riscv/riscv.opt (mtune=): Add Save attribute.
2398 * config/riscv/t-riscv: Add build rule for riscv-target-attr.o
2399 * doc/extend.texi: Add doc for target attribute.
2401 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
2404 * config/riscv/riscv.cc (riscv_save_return_addr_reg_p): Check ra
2407 2023-11-16 liuhongt <hongtao.liu@intel.com>
2410 * config/i386/mmx.md (*vec_dup<mode>): Extend for V4HI and
2413 2023-11-16 Jakub Jelinek <jakub@redhat.com>
2416 * config/i386/i386.md
2417 (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
2418 Verify in define_peephole2 that operands[2] dies or is overwritten
2419 at the end of multiplication.
2421 2023-11-16 Jakub Jelinek <jakub@redhat.com>
2423 PR tree-optimization/112536
2424 * tree-vect-slp.cc (arg0_map): New variable.
2425 (vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map.
2427 2023-11-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2429 PR middle-end/112554
2430 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
2431 Clear SELECT_VL_P for non-partial vectorization.
2433 2023-11-16 Hongyu Wang <hongyu.wang@intel.com>
2435 * config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl
2436 alternative with attr addr gpr16 and "jm" constraint.
2437 (vec_extract_hi_<mode>): Likewise for SF vector modes.
2438 (@vec_extract_hi_<mode>): Likewise.
2439 (*vec_extractv2ti): Likewise.
2440 (vec_set_hi_<mode><mask_name>): Likewise.
2441 * config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for
2444 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
2447 * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
2448 (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
2449 (*subqi_ext<mode>_2_slp): Ditto.
2450 (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
2452 2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
2454 * common/config/riscv/riscv-common.cc
2455 (riscv_subset_list::parse_std_ext): Emit an error and skip to
2456 the next extension when a non-canonical ordering is detected.
2458 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
2460 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
2461 Revert using the macro CAN_HAVE_LOCATION_P.
2463 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2466 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
2467 local vsetvl info before LCM suggested one.
2468 Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
2469 Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
2471 2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
2473 * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
2474 * (riscv_extend_comparands): Call New function on operands.
2476 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
2478 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
2479 Add "&& " before "reload_completed" in split condition.
2480 (*subqi_ext<mode>_1_slp): Ditto.
2481 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
2483 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
2486 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
2487 Correct operand numbers in split pattern. Replace !Q constraint
2488 of operand 1 with !qm. Add insn constrain.
2489 (*subqi_ext<mode>_1_slp): Ditto.
2490 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
2492 2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
2494 * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
2495 copy'n'paste-o in '__builtin_nvptx_brev' description.
2497 2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
2498 Thomas Schwinge <thomas@codesourcery.com>
2500 * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
2501 (bitrev<mode>2): Represent using bitreverse.
2503 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
2504 Andrew Jenner <andrew@codesourcery.com>
2506 * config/gcn/constraints.md: Add "a" AVGPR constraint.
2507 * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
2508 (*mov<mode>_4reg): Likewise.
2509 (@mov<mode>_sgprbase): Likewise.
2510 (gather<mode>_insn_1offset<exec>): Likewise.
2511 (gather<mode>_insn_1offset_ds<exec>): Likewise.
2512 (gather<mode>_insn_2offsets<exec>): Likewise.
2513 (scatter<mode>_expr<exec_scatter>): Likewise.
2514 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
2515 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
2516 * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
2517 (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
2518 (gcn_hard_regno_mode_ok): Likewise.
2519 (gcn_regno_reg_class): Likewise.
2520 (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
2521 (gcn_sgpr_move_p): Handle AVGPRs.
2522 (gcn_secondary_reload): Reload AVGPRs via VGPRs.
2523 (gcn_conditional_register_usage): Handle AVGPRs.
2524 (gcn_vgpr_equivalent_register_operand): New function.
2525 (gcn_valid_move_p): Check for validity of AVGPR moves.
2526 (gcn_compute_frame_offsets): Handle AVGPRs.
2527 (gcn_memory_move_cost): Likewise.
2528 (gcn_register_move_cost): Likewise.
2529 (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
2530 (gcn_md_reorg): Handle AVGPRs.
2531 (gcn_hsa_declare_function_name): Likewise.
2532 (print_reg): Likewise.
2533 (gcn_dwarf_register_number): Likewise.
2534 * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
2535 (AVGPR_REGNO): Define.
2536 (LAST_AVGPR_REG): Define.
2537 (SOFT_ARG_REG): Update.
2538 (FRAME_POINTER_REGNUM): Update.
2539 (DWARF_LINK_REGISTER): Update.
2540 (FIRST_PSEUDO_REGISTER): Update.
2541 (AVGPR_REGNO_P): Define.
2542 (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
2543 (REG_CLASS_CONTENTS): Add new register classes and add entries for
2544 AVGPRs to all classes.
2545 (REGISTER_NAMES): Add AVGPRs.
2546 * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
2547 (AP_REGNUM, FP_REGNUM): Update.
2548 (define_attr "type"): Add vop3p_mai.
2549 (define_attr "unit"): Handle vop3p_mai.
2550 (define_attr "gcn_version"): Add "cdna2".
2551 (define_attr "enabled"): Handle cdna2.
2552 (*mov<mode>_insn): Add AVGPR alternatives.
2553 (*movti_insn): Likewise.
2554 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
2555 (process_asm): Process avgpr_count.
2556 * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
2557 (gcn_avgpr_hard_register_operand): New.
2558 * doc/md.texi: Document the "a" constraint.
2560 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
2562 * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
2563 (reload_in<mode>): Delete.
2564 (reload_out<mode>): Delete.
2565 * config/gcn/gcn.cc (CODE_FOR): Delete.
2566 (get_code_for_##PREFIX##vN##SUFFIX): Delete.
2567 (CODE_FOR_OP): Delete.
2568 (get_code_for_##PREFIX): Delete.
2569 (gcn_secondary_reload): Replace "get_code_for" with "code_for".
2571 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2573 * config/s390/t-s390: Generate s390-gen-builtins.h without
2576 2023-11-15 Richard Biener <rguenther@suse.de>
2578 PR tree-optimization/112282
2579 * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
2582 2023-11-15 Richard Biener <rguenther@suse.de>
2584 * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
2585 we skipped an instance due to -fdbg-cnt.
2587 2023-11-15 Xi Ruoyao <xry111@xry111.site>
2589 * config/loongarch/loongarch.cc
2590 (loongarch_memmodel_needs_release_fence): Remove.
2591 (loongarch_cas_failure_memorder_needs_acquire): New static
2593 (loongarch_print_operand): Redefine 'G' for the barrier on CAS
2595 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
2596 Remove the redundant barrier before the LL instruction, and
2597 emit an acquire barrier on failure if needed by
2599 (atomic_cas_value_cmp_and_7_<mode>): Likewise.
2600 (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
2601 before the LL instruction.
2602 (atomic_cas_value_sub_7_<mode>): Likewise.
2603 (atomic_cas_value_and_7_<mode>): Likewise.
2604 (atomic_cas_value_xor_7_<mode>): Likewise.
2605 (atomic_cas_value_or_7_<mode>): Likewise.
2606 (atomic_cas_value_nand_7_<mode>): Likewise.
2607 (atomic_cas_value_exchange_7_<mode>): Likewise.
2609 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2611 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
2612 (expand_vec_init): Add trailing optimization.
2614 2023-11-15 Pan Li <pan2.li@intel.com>
2616 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
2617 Add inner_mode mask arg for mask int mode.
2618 (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
2619 to get the good enough vector int mode on precision.
2620 (expand_vector_init_merge_repeating_sequence): Pass required args
2623 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2626 * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
2628 2023-11-15 David Malcolm <dmalcolm@redhat.com>
2630 * json.cc (selftest::assert_print_eq): Add "loc" param and use
2632 (ASSERT_PRINT_EQ): New macro.
2633 (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
2634 source location of assertion.
2635 (selftest::test_writing_arrays): Likewise.
2636 (selftest::test_writing_float_numbers): Likewise.
2637 (selftest::test_writing_integer_numbers): Likewise.
2638 (selftest::test_writing_strings): Likewise.
2639 (selftest::test_writing_literals): Likewise.
2641 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2644 * doc/invoke.texi (Static Analyzer Options): Add the six
2645 -Wanalyzer-tainted-* warnings. Update documentation of each
2646 warning to reflect removed requirement to use
2647 -fanalyzer-checker=taint. Remove discussion of
2648 -fanalyzer-checker=taint.
2650 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2652 * diagnostic-format-json.cc
2653 (json_output_format::on_end_diagnostic): Update calls to m_context
2654 callbacks to use member functions; tighten up scopes.
2655 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
2657 (sarif_builder::make_reporting_descriptor_object_for_warning):
2659 * diagnostic.cc (diagnostic_context::initialize): Update for
2660 callbacks being moved into m_option_callbacks and being renamed.
2661 (diagnostic_context::set_option_hooks): New.
2662 (diagnostic_option_classifier::classify_diagnostic): Update call
2663 to global_dc->m_option_enabled to use option_enabled_p.
2664 (diagnostic_context::print_option_information): Update calls to
2665 m_context callbacks to use member functions; tighten up scopes.
2666 (diagnostic_context::diagnostic_enabled): Likewise.
2667 * diagnostic.h (diagnostic_option_enabled_cb): New typedef.
2668 (diagnostic_make_option_name_cb): New typedef.
2669 (diagnostic_make_option_url_cb): New typedef.
2670 (diagnostic_context::option_enabled_p): New.
2671 (diagnostic_context::make_option_name): New.
2672 (diagnostic_context::make_option_url): New.
2673 (diagnostic_context::set_option_hooks): New decl.
2674 (diagnostic_context::m_option_enabled): Rename to
2675 m_option_enabled_cb and move within m_option_callbacks, using
2677 (diagnostic_context::m_option_state): Move within
2679 (diagnostic_context::m_option_name): Rename to
2680 m_make_option_name_cb and move within m_option_callbacks, using
2682 (diagnostic_context::m_get_option_url): Likewise, renaming to
2683 m_make_option_url_cb.
2684 * lto-wrapper.cc (print_lto_docs_link): Update call to m_context
2685 callback to use member function.
2686 (main): Use diagnostic_context::set_option_hooks.
2687 * opts-diagnostic.h (option_name): Make context param const.
2688 (get_option_url): Likewise.
2689 * opts.cc (option_name): Likewise.
2690 (get_option_url): Likewise.
2691 * toplev.cc (general_init): Use
2692 diagnostic_context::set_option_hooks.
2694 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2696 * selftest-diagnostic.cc
2697 (test_diagnostic_context::test_diagnostic_context): Use
2698 diagnostic_start_span.
2699 * tree-diagnostic-path.cc (struct event_range): Likewise.
2701 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2703 * diagnostic-show-locus.cc (diagnostic_context::show_locus):
2704 Update for renaming of text callbacks fields.
2705 * diagnostic.cc (diagnostic_context::initialize): Likewise.
2706 * diagnostic.h (class diagnostic_context): Add "friend" for
2707 accessors to m_text_callbacks.
2708 (diagnostic_context::m_text_callbacks): Make private, and add an
2709 "m_" prefix to field names.
2710 (diagnostic_starter): Convert from macro to inline function.
2711 (diagnostic_start_span): New.
2712 (diagnostic_finalizer): Convert from macro to inline function.
2714 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2716 * diagnostic.h (diagnostic_ready_p): Convert from macro to inline
2719 2023-11-14 Uros Bizjak <ubizjak@gmail.com>
2722 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
2723 New define_insn_and_split pattern.
2724 (*subqi_ext<mode>_1_slp): Ditto.
2725 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
2727 2023-11-14 Andrew Stubbs <ams@codesourcery.com>
2730 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
2732 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2734 * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column):
2735 Use m_context's file_cache.
2736 (sarif_builder::maybe_make_artifact_content_object): Likewise.
2737 (sarif_builder::get_source_lines): Likewise.
2738 * diagnostic-show-locus.cc
2739 (exploc_with_display_col::exploc_with_display_col): Add file_cache
2741 (layout::m_file_cache): New field.
2742 (make_range): Add file_cache param.
2743 (selftest::test_layout_range_for_single_point): Create and use a
2744 temporary file_cache.
2745 (selftest::test_layout_range_for_single_line): Likewise.
2746 (selftest::test_layout_range_for_multiple_lines): Likewise.
2747 (layout::layout): Initialize m_file_cache from the context and use it.
2748 (layout::maybe_add_location_range): Use m_file_cache.
2749 (layout::calculate_x_offset_display): Likewise.
2750 (get_affected_range): Add file_cache param.
2751 (get_printed_columns): Likewise.
2752 (line_corrections::line_corrections): Likewwise.
2753 (line_corrections::m_file_cache): New field.
2754 (source_line::source_line): Add file_cache param.
2755 (line_corrections::add_hint): Use m_file_cache.
2756 (layout::print_trailing_fixits): Likewise.
2757 (layout::print_line): Likewise.
2758 (selftest::test_layout_x_offset_display_utf8): Create and use a
2759 temporary file_cache.
2760 (selftest::test_layout_x_offset_display_tab): Likewise.
2761 (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise.
2762 (selftest::test_add_location_if_nearby): Pass global_dc's
2763 file_cache to temp_source_file ctor.
2764 (selftest::test_overlapped_fixit_printing): Create and use a
2765 temporary file_cache.
2766 (selftest::test_overlapped_fixit_printing_utf8): Likewise.
2767 (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache.
2768 * diagnostic.cc (diagnostic_context::initialize): Always create a
2770 (diagnostic_context::initialize_input_context): Assume
2771 m_file_cache has already been created.
2772 (diagnostic_context::create_edit_context): Pass m_file_cache to
2774 (convert_column_unit): Add file_cache param.
2775 (diagnostic_context::converted_column): Use context's file_cache.
2776 (print_parseable_fixits): Add file_cache param.
2777 (diagnostic_context::report_diagnostic): Use context's file_cache.
2778 (selftest::test_print_parseable_fixits_none): Create and use a
2779 temporary file_cache.
2780 (selftest::test_print_parseable_fixits_insert): Likewise.
2781 (selftest::test_print_parseable_fixits_remove): Likewise.
2782 (selftest::test_print_parseable_fixits_replace): Likewise.
2783 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
2785 * diagnostic.h (diagnostic_context::file_cache_init): Delete.
2786 (diagnostic_context::get_file_cache): Convert return type from
2787 pointer to reference.
2788 * edit-context.cc (edited_file::get_file_cache): New.
2789 (edited_file::m_edit_context): New.
2790 (edit_context::edit_context): Add file_cache param.
2791 (edit_context::get_or_insert_file): Pass this to edited_file's
2793 (edited_file::edited_file): Add edit_context param.
2794 (edited_file::print_content): Use get_file_cache.
2795 (edited_file::print_diff_hunk): Likewise.
2796 (edited_file::print_run_of_changed_lines): Likewise.
2797 (edited_file::get_or_insert_line): Likewise.
2798 (edited_file::get_num_lines): Likewise.
2799 (edited_line::edited_line): Pass in file_cache and use it.
2800 (selftest::test_get_content): Create and use a
2801 temporary file_cache.
2802 (selftest::test_applying_fixits_insert_before): Likewise.
2803 (selftest::test_applying_fixits_insert_after): Likewise.
2804 (selftest::test_applying_fixits_insert_after_at_line_end):
2806 (selftest::test_applying_fixits_insert_after_failure): Likewise.
2807 (selftest::test_applying_fixits_insert_containing_newline):
2809 (selftest::test_applying_fixits_growing_replace): Likewise.
2810 (selftest::test_applying_fixits_shrinking_replace): Likewise.
2811 (selftest::test_applying_fixits_replace_containing_newline):
2813 (selftest::test_applying_fixits_remove): Likewise.
2814 (selftest::test_applying_fixits_multiple): Likewise.
2815 (selftest::test_applying_fixits_multiple_lines): Likewise.
2816 (selftest::test_applying_fixits_modernize_named_init): Likewise.
2817 (selftest::test_applying_fixits_modernize_named_init): Likewise.
2818 (selftest::test_applying_fixits_unreadable_file): Likewise.
2819 (selftest::test_applying_fixits_line_out_of_range): Likewise.
2820 (selftest::test_applying_fixits_column_validation): Likewise.
2821 (selftest::test_applying_fixits_column_validation): Likewise.
2822 (selftest::test_applying_fixits_column_validation): Likewise.
2823 (selftest::test_applying_fixits_column_validation): Likewise.
2824 * edit-context.h (edit_context::edit_context): Add file_cache
2826 (edit_context::get_file_cache): New.
2827 (edit_context::m_file_cache): New.
2828 * final.cc: Include "diagnostic.h".
2829 (asm_show_source): Use global_dc's file_cache.
2830 * gcc-rich-location.cc (blank_line_before_p): Add file_cache
2832 (use_new_line): Likewise.
2833 (gcc_rich_location::add_fixit_insert_formatted): Use global dc's
2835 * input.cc (diagnostic_file_cache_init): Delete.
2836 (diagnostic_context::file_cache_init): Delete.
2837 (diagnostics_file_cache_forcibly_evict_file): Delete.
2838 (file_cache::missing_trailing_newline_p): New.
2839 (file_cache::evicted_cache_tab_entry): Don't call
2840 diagnostic_file_cache_init.
2841 (location_get_source_line): Delete.
2842 (get_source_text_between): Add file_cache param.
2843 (get_source_file_content): Delete.
2844 (location_missing_trailing_newline): Delete.
2845 (location_compute_display_column): Add file_cache param.
2846 (dump_location_info): Create and use temporary file_cache.
2847 (get_substring_ranges_for_loc): Add file_cache param.
2848 (get_location_within_string): Likewise.
2849 (get_source_range_for_char): Likewise.
2850 (get_num_source_ranges_for_substring): Likewise.
2851 (selftest::test_reading_source_line): Create and use temporary
2853 (selftest::lexer_test::m_file_cache): New field.
2854 (selftest::assert_char_at_range): Use test.m_file_cache.
2855 (selftest::assert_num_substring_ranges): Likewise.
2856 (selftest::assert_has_no_substring_ranges): Likewise.
2857 (selftest::test_lexer_string_locations_concatenation_2): Likewise.
2858 * input.h (class file_cache): New forward decl.
2859 (location_compute_display_column): Add file_cache param.
2860 (location_get_source_line): Delete.
2861 (get_source_text_between): Add file_cache param.
2862 (get_source_file_content): Delete.
2863 (location_missing_trailing_newline): Delete.
2864 (file_cache::missing_trailing_newline_p): New decl.
2865 (diagnostics_file_cache_forcibly_evict_file): Delete.
2866 * selftest.cc (named_temp_file::named_temp_file): Add file_cache
2868 (named_temp_file::~named_temp_file): Optionally evict the file
2869 from the given file_cache.
2870 (temp_source_file::temp_source_file): Add file_cache param.
2871 * selftest.h (class file_cache): New forward decl.
2872 (named_temp_file::named_temp_file): Add file_cache param.
2873 (named_temp_file::m_file_cache): New field.
2874 (temp_source_file::temp_source_file): Add file_cache param.
2875 * substring-locations.h (get_location_within_string): Add
2878 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2880 * diagnostic-format-json.cc: Use type-specific "set_*" functions
2881 of json::object to avoid naked new of json value subclasses.
2882 * diagnostic-format-sarif.cc: Likewise.
2883 * gcov.cc: Likewise.
2884 * json.cc (object::set_string): New.
2885 (object::set_integer): New.
2886 (object::set_float): New.
2887 (object::set_bool): New.
2888 (selftest::test_writing_objects): Use object::set_string.
2889 * json.h (object::set_string): New decl.
2890 (object::set_integer): New decl.
2891 (object::set_float): New decl.
2892 (object::set_bool): New decl.
2893 * optinfo-emit-json.cc: Use type-specific "set_*" functions of
2894 json::object to avoid naked new of json value subclasses.
2895 * timevar.cc: Likewise.
2896 * tree-diagnostic-path.cc: Likewise.
2898 2023-11-14 Andrew MacLeod <amacleod@redhat.com>
2900 PR tree-optimization/112509
2901 * tree-vrp.cc (find_case_label_range): Create range from case labels.
2903 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2905 * config/s390/s390-builtin-types.def: Add/remove types.
2906 * config/s390/s390-builtins.def (s390_vec_scatter_element_flt):
2907 The type for the offset should be UV4SI instead of V4SF.
2909 2023-11-14 Saurabh Jha <saurabh.jha@arm.com>
2912 * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
2915 2023-11-14 Richard Biener <rguenther@suse.de>
2917 PR tree-optimization/111233
2918 PR tree-optimization/111652
2919 PR tree-optimization/111727
2920 PR tree-optimization/111838
2921 PR tree-optimization/112113
2922 * tree-ssa-loop-split.cc (patch_loop_exit): Get the new
2923 guard code instead of the old guard stmt.
2924 (split_loop): Adjust.
2926 2023-11-14 Richard Biener <rguenther@suse.de>
2928 * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p):
2929 Consider all loops in the nest when looking for
2930 lambda_vector_zerop.
2932 2023-11-14 Richard Biener <rguenther@suse.de>
2934 PR tree-optimization/112281
2935 * tree-loop-distribution.cc (pg_add_dependence_edges):
2936 Preserve stmt order when the innermost loop has exact
2939 2023-11-14 Jakub Jelinek <jakub@redhat.com>
2943 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move
2944 operands[1] aka low part of input rather than operands[3] aka high
2945 part of input to output if not the same register.
2947 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
2949 * config.gcc: Add s390-gen-builtins.h to target_gtfiles.
2950 * config/s390/s390-builtins.h (s390_builtin_types)
2951 (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker.
2952 * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h.
2953 Add build rule for s390-gen-builtins.h.
2955 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
2957 * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check
2958 for error_mark_node.
2960 2023-11-14 Jakub Jelinek <jakub@redhat.com>
2963 * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG,
2964 BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New
2966 * builtins.cc (fold_builtin_bit_query): New function.
2967 (fold_builtin_1): Use it for
2968 BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
2969 (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G.
2970 * fold-const-call.cc: Fix comment typo on tm.h inclusion.
2971 (fold_const_call_ss): Handle
2972 CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
2973 (fold_const_call_sss): New function.
2974 (fold_const_call_1): Call it for 2 argument functions returning
2975 scalar when passed 2 INTEGER_CSTs.
2976 * genmatch.cc (cmp_operand): For function calls also compare
2977 number of arguments.
2978 (fns_cmp): New function.
2979 (dt_node::gen_kids): Sort fns and generic_fns.
2980 (dt_node::gen_kids_1): Handle fns with the same id but different
2981 number of arguments.
2982 * match.pd (CLZ simplifications): Drop checks for defined behavior
2983 at zero. Add variant of simplifications for IFN_CLZ with 2 arguments.
2984 (CTZ simplifications): Drop checks for defined behavior at zero,
2985 don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of
2986 simplifications for IFN_CTZ with 2 arguments.
2987 (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of
2988 type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than
2989 one argument. Add variant for matching CLZ with 2 arguments.
2990 (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly.
2991 * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New
2993 (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS}
2994 and IFN_{PARITY,POPCOUNT} calls.
2995 * gimple-range-op.cc (cfn_clz::fold_range): Don't check
2996 CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead
2997 assume defined value at zero if the call has 2 arguments and use
2998 second argument value for that case.
2999 (cfn_ctz::fold_range): Similarly.
3000 (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal
3001 or op_cfn_ctz_internal only if internal fn call has 2 arguments and
3002 set m_op2 in that case.
3003 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern,
3004 vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero
3005 use second argument of calls if present, otherwise assume UB at zero,
3006 create 2 argument .CLZ/.CTZ calls if needed.
3007 * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ
3009 * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument
3010 .CLZ/.CTZ calls if needed.
3011 * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2
3012 argument .CTZ calls if needed.
3013 * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle
3014 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument
3016 * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg,
3017 __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document.
3019 2023-11-14 Xi Ruoyao <xry111@xry111.site>
3022 * config/loongarch/genopts/loongarch.opt.in: Add
3023 -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to
3024 account conditional branch relaxation support status.
3025 * config/loongarch/loongarch.opt: Regenerate.
3026 * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
3027 the assembler supports conditional branch relaxation.
3028 * configure: Regenerate.
3029 * config.in: Regenerate. Note that there are some unrelated
3030 changes introduced by r14-5424 (which does not contain a
3031 config.in regeneration).
3032 * config/loongarch/loongarch-opts.h
3033 (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
3034 * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
3036 (ASM_MRELAX_SPEC): Define.
3037 (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
3038 * config/loongarch/loongarch.cc: Take the setting of
3039 -m[no-]relax into account when determining the default of
3041 * doc/invoke.texi: Document -m[no-]relax and
3042 -m[no-]pass-mrelax-to-as for LoongArch. Update the default
3043 value of -mexplicit-relocs=.
3045 2023-11-14 liuhongt <hongtao.liu@intel.com>
3047 PR tree-optimization/112496
3048 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return
3049 false when !tree_nop_conversion_p (TREE_TYPE (vectype),
3050 TREE_TYPE (init_expr)).
3052 2023-11-14 Xi Ruoyao <xry111@xry111.site>
3054 * config/loongarch/sync.md (mem_thread_fence): Remove redundant
3056 (mem_thread_fence_1): Emit finer-grained DBAR hints for
3057 different memory models, instead of 0.
3059 2023-11-14 Jakub Jelinek <jakub@redhat.com>
3061 PR middle-end/112511
3062 * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like
3065 2023-11-14 Jakub Jelinek <jakub@redhat.com>
3066 Hu, Lin1 <lin1.hu@intel.com>
3069 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
3070 <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add
3071 alternative with just x instead of v constraints and xjm instead of
3072 vm and use vblendps as optimization only with that alternative.
3074 2023-11-14 liuhongt <hongtao.liu@intel.com>
3076 PR tree-optimization/105735
3077 PR tree-optimization/111972
3078 * tree-scalar-evolution.cc
3079 (analyze_and_compute_bitop_with_inv_effect): Handle bitop with
3082 2023-11-13 Arsen Arsenović <arsen@aarsen.me>
3084 * configure: Regenerate.
3085 * aclocal.m4: Regenerate.
3086 * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from
3088 * doc/install.texi: Document new (notable) flags added by the
3089 optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc
3090 with gettext dependency.
3092 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
3094 * config/i386/i386-expand.h (gen_pushfl): New prototype.
3096 * config/i386/i386-expand.cc (ix86_expand_builtin)
3097 [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
3098 [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
3099 * config/i386/i386.cc (gen_pushfl): New function.
3101 * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
3102 (@pushfl<mode>2): Rename from *pushfl<mode>2.
3103 Rewrite as unspec using UNSPEC_PUSHFL.
3104 (@popfl<mode>1): Rename from *popfl<mode>1.
3105 Rewrite as unspec using UNSPEC_POPFL.
3107 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
3110 * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode.
3112 2023-11-13 Robin Dapp <rdapp@ventanamicro.com>
3114 * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer
3115 equality for REG_EQUAL.
3117 2023-11-13 Richard Biener <rguenther@suse.de>
3119 PR tree-optimization/112495
3120 * tree-data-ref.cc (runtime_alias_check_p): Reject checks
3121 between different address spaces.
3123 2023-11-13 Richard Biener <rguenther@suse.de>
3125 PR middle-end/112487
3126 * tree-inline.cc (setup_one_parameter): When the parameter
3127 is unused only insert a debug bind when there's not a gross
3128 mismatch in value and declared parameter type. Do not assert
3129 there effectively isn't.
3131 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3133 * config/riscv/riscv-v.cc
3134 (rvv_builder::combine_sequence_use_merge_profitable_p): New function.
3135 (expand_vector_init_merge_combine_sequence): Ditto.
3136 (expand_vec_init): Adapt for new optimization.
3138 2023-11-13 liuhongt <hongtao.liu@intel.com>
3140 * config/i386/i386-expand.cc
3141 (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and
3143 (ix86_expand_vector_init_one_nonzero): Ditto.
3144 (ix86_expand_vector_init_one_var): Ditto.
3145 (ix86_expand_vector_init_general): Ditto.
3146 (ix86_expand_vector_set_var): Ditto.
3147 (ix86_expand_vector_set): Ditto.
3148 (ix86_expand_vector_extract): Ditto.
3149 * config/i386/mmx.md
3150 (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF.
3151 (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x,
3152 x, x), add a new define_split after the pattern.
3153 (*mmx_pextrw<mode>): New define_insn.
3154 (mmx_pshufw_1): Rename to ..
3155 (mmx_pshufw<mode>_1): .. this, extend to V4FI_64.
3156 (*mmx_pblendw64): Extend to V4FI_64.
3157 (*vec_dup<mode>): New define_insn.
3158 (vec_setv4hi): Rename to ..
3159 (vec_set<mode>): .. this, and extend to V4FI_64
3160 (vec_extractv4hihi): Rename to ..
3161 (vec_extract<mode><mmxscalarmodelower>): .. this, and extend
3163 (vec_init<mode><mmxscalarmodelower>): New define_insn.
3164 (*pinsrw): Extend to V2FI_32, add a new alternative (&x,
3165 x, x), and add a new define_split after it.
3166 (*pextrw<mode>): New define_insn.
3167 (vec_setv2hi): Rename to ..
3168 (vec_set<mode>): .. this, extend to V2FI_32.
3169 (vec_extractv2hihi): Rename to ..
3170 (vec_extract<mode><mmxscalarmodelower>): .. this, extend to
3172 (*punpckwd): Extend to V2FI_32.
3173 (*pshufw_1): Rename to ..
3174 (*pshufw<mode>_1): .. this, extend to V2FI_32.
3175 (vec_initv2hihi): Rename to ..
3176 (vec_init<mode><mmxscalarmodelower>): .. this, and extend to
3178 (*vec_dup<mode>): New define_insn.
3179 * config/i386/sse.md (*vec_extract<mode>): Refine constraint
3182 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
3184 * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that
3185 represents the carry flag being set if the operand is non-zero.
3186 (adc_f): New define_insn representing adc with updated flags.
3187 (ashrdi3): New define_expand that only handles shifts by 1.
3188 (ashrdi3_cnt1): New pre-reload define_insn_and_split.
3189 (lshrdi3): New define_expand that only handles shifts by 1.
3190 (lshrdi3_cnt1): New pre-reload define_insn_and_split.
3191 (rrcsi2): New define_insn for rrc (SImode rotate right through carry).
3192 (rrcsi2_carry): Likewise for rrc.f, as above but updating flags.
3193 (rotldi3): New define_expand that only handles rotates by 1.
3194 (rotldi3_cnt1): New pre-reload define_insn_and_split.
3195 (rotrdi3): New define_expand that only handles rotates by 1.
3196 (rotrdi3_cnt1): New pre-reload define_insn_and_split.
3197 (lshrsi3_cnt1_carry): New define_insn for lsr.f.
3198 (ashrsi3_cnt1_carry): New define_insn for asr.f.
3199 (btst_0_carry): New define_insn for asr.f without result.
3201 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
3203 * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to
3205 (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP
3206 into a rotate. Evaluate ARC_BUILTIN_NORM and
3207 ARC_BUILTIN_NORMW of constant arguments.
3208 * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete.
3209 (normw): Make output template/assembler whitespace consistent.
3210 (swap): Remove define_insn, only use of SWAP UNSPEC.
3211 * config/arc/builtins.def: Tweak indentation.
3212 (SWAP): Expand using rotlsi2_cnt16 instead of using swap.
3214 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
3216 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New
3217 define_insn_and_split to optimize register usage of doubleword
3218 right shifts followed by truncation.
3220 2023-11-13 Jakub Jelinek <jakub@redhat.com>
3222 * config/i386/constraints.md: Remove j constraint letter from list of
3225 2023-11-13 Xi Ruoyao <xry111@xry111.site>
3227 PR rtl-optimization/112483
3228 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
3229 Fix the simplification of (fcopysign x, NEGATIVE_CONST).
3231 2023-11-13 Jakub Jelinek <jakub@redhat.com>
3233 PR tree-optimization/111967
3234 * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
3235 m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
3236 (block_range_cache::dump): Iterate from 1 rather than 0. Don't use
3237 ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to
3238 m_ssa_ranges.length () rather than num_ssa_names.
3240 2023-11-13 Xi Ruoyao <xry111@xry111.site>
3242 * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode
3244 (ST_ANY): New mode iterator.
3245 (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and
3246 ST_ANY instead of QHWD for applicable patterns.
3248 2023-11-13 Xi Ruoyao <xry111@xry111.site>
3251 * config/loongarch/loongarch.cc
3252 (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
3253 instead of gen_rtx_SUBREG.
3255 2023-11-13 Pan Li <pan2.li@intel.com>
3257 * config/riscv/autovec.md: Add bridge mode to lrint and lround
3259 * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
3260 bridge machine mode.
3261 (expand_vec_lround): Ditto.
3262 * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
3263 func impl to emit vfwcvt.f.f.
3264 (emit_vec_rounding_to_integer): Handle the HF to DI rounding
3265 with the bridge mode.
3266 (expand_vec_lrint): Reorder the args.
3267 (expand_vec_lround): Ditto.
3268 (expand_vec_lceil): Ditto.
3269 (expand_vec_lfloor): Ditto.
3270 * config/riscv/vector-iterators.md: Add vector HFmode and bridge
3271 mode for converting to DI.
3273 2023-11-12 Jeff Law <jlaw@ventanamicro.com>
3276 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
3278 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
3279 (prune_ready_list): USE or CLOBBER should delay execution
3280 if it starts a new live range.
3282 2023-11-12 Uros Bizjak <ubizjak@gmail.com>
3284 * config/i386/i386.md (*stack_protect_set_4s_<mode>_di):
3285 Remove alternative 0.
3287 2023-11-11 Eric Botcazou <ebotcazou@adacore.com>
3289 * ipa-cp.cc (print_ipcp_constant_value): Move to...
3290 (values_equal_for_ipcp_p): Deal with VAR_DECLs from the
3292 * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise.
3293 (ipa_print_node_jump_functions_for_edge): Call the function
3294 ipa_print_constant_value to print IPA_JF_CONST elements.
3296 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
3298 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
3299 (prune_ready_list): USE or CLOBBER should delay execution
3300 if it starts a new live range.
3302 2023-11-11 Jakub Jelinek <jakub@redhat.com>
3304 PR middle-end/112430
3305 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the
3306 order they were pushed rather than in reverse order. Call
3307 release_defs after gsi_remove.
3309 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3311 * target.def (mode_switching.backprop): New hook.
3312 * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook.
3313 * doc/tm.texi: Regenerate.
3314 * mode-switching.cc (struct bb_info): Add single_succ.
3315 (confluence_info): Add transp field.
3316 (single_succ_confluence_n, single_succ_transfer): New functions.
3317 (backprop_confluence_n, backprop_transfer): Likewise.
3318 (optimize_mode_switching): Use them. Push mode transitions onto
3319 a block's incoming edges, if the backprop hook requires it.
3321 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3323 * target.def (mode_switching.confluence): New hook.
3324 * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook.
3325 * doc/tm.texi.in: Regenerate.
3326 * mode-switching.cc (confluence_info): New variable.
3327 (mode_confluence, forward_confluence_n, forward_transfer): New
3329 (optimize_mode_switching): Use them to calculate mode_in when
3330 TARGET_MODE_CONFLUENCE is defined.
3332 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3334 * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values.
3336 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3338 * target.def (mode_switching.after): Add a regs_live parameter.
3339 * doc/tm.texi: Regenerate.
3340 * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update
3342 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
3343 (epiphany_mode_after): Likewise.
3344 * config/i386/i386.cc (ix86_mode_after): Likewise.
3345 * config/riscv/riscv.cc (riscv_mode_after): Likewise.
3346 * config/sh/sh.cc (sh_mode_after): Likewise.
3347 * mode-switching.cc (optimize_mode_switching): Likewise.
3349 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3351 * target.def (mode_switching.needed): Add a regs_live parameter.
3352 * doc/tm.texi: Regenerate.
3353 * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update
3355 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
3356 * config/epiphany/mode-switch-use.cc (insert_uses): Likewise.
3357 * config/i386/i386.cc (ix86_mode_needed): Likewise.
3358 * config/riscv/riscv.cc (riscv_mode_needed): Likewise.
3359 * config/sh/sh.cc (sh_mode_needed): Likewise.
3360 * mode-switching.cc (optimize_mode_switching): Likewise.
3361 (create_pre_exit): Likewise, using the DF simulate functions
3362 to calculate the required information.
3364 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3366 * target.def (mode_switching.eh_handler): New hook.
3367 * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook.
3368 * doc/tm.texi: Regenerate.
3369 * mode-switching.cc (optimize_mode_switching): Use eh_handler
3370 to get the mode on entry to an exception handler.
3372 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3374 * mode-switching.cc (optimize_mode_switching): Mark the exit
3375 block as nontransparent if it requires a specific mode.
3376 Handle the entry and exit mode as sibling rather than nested
3377 concepts. Remove outdated comment.
3379 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3381 * mode-switching.cc (optimize_mode_switching): Initially
3382 compute transparency in a bit-per-block bitmap.
3384 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3386 * mode-switching.cc (seginfo): Add a prev_mode field.
3387 (new_seginfo): Take and initialize the prev_mode.
3388 (optimize_mode_switching): Update calls accordingly.
3389 Use the recorded modes during the emit phase, rather than
3390 computing one on the fly.
3392 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3394 * mode-switching.cc (add_seginfo): Replace head pointer with
3395 a pointer to the tail pointer.
3396 (optimize_mode_switching): Update calls accordingly.
3398 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3400 * mode-switching.cc (optimize_mode_switching): Call
3401 df_note_add_problem.
3403 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
3405 * target.def: Tweak documentation of mode-switching hooks.
3406 * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation.
3407 (NUM_MODES_FOR_MODE_SWITCHING): Likewise.
3408 * doc/tm.texi: Regenerate.
3410 2023-11-11 Martin Uecker <uecker@tugraz.at>
3414 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
3415 remove warning for parameters declared with `static`.
3417 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
3419 * doc/sourcebuild.texi (Scan the assembly output): Document change.
3421 2023-11-10 Mao <sray@live.com>
3423 PR middle-end/110983
3424 * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry.
3426 2023-11-10 Maciej W. Rozycki <macro@embecosm.com>
3428 * config/riscv/riscv.md (length): Fix indentation for branch and
3429 jump length calculation expressions.
3431 2023-11-10 Eric Botcazou <ebotcazou@adacore.com>
3433 * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>:
3434 Deal with nonempty constant CONSTRUCTORs.
3435 (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET
3436 and DECL_FIELD_BIT_OFFSET for FIELD_DECLs.
3438 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com>
3441 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
3442 (equiv_can_be_consumed_p): Use it.
3444 2023-11-10 Richard Sandiford <richard.sandiford@arm.com>
3446 * read-rtl.cc (md_reader::read_mapping): Allow iterators to
3447 include other iterators.
3448 * doc/md.texi: Document the change.
3449 * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
3450 the iterator that is being duplicated, rather than reproducing it.
3451 (VSTRUCT_D): Redefine using VSTRUCT_[234]D.
3452 (VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
3453 (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
3454 the individual D and Q iterators.
3456 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
3458 * config/i386/i386.md (stack_protect_set_1 peephole2):
3459 Explicitly check operand 2 for word_mode.
3460 (stack_protect_set_1 peephole2 #2): Ditto.
3461 (stack_protect_set_2 peephole2): Ditto.
3462 (stack_protect_set_3 peephole2): Ditto.
3463 (*stack_protect_set_4z_<mode>_di): New insn patter.
3464 (*stack_protect_set_4s_<mode>_di): Ditto.
3465 (stack_protect_set_4 peephole2): New peephole2 pattern to
3466 substitute stack protector scratch register clear with unrelated
3467 register initialization involving zero/sign-extend instruction.
3469 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
3471 * config/i386/i386.md (shift): Use SAL insted of SLL
3472 for ashift insn mnemonic.
3474 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3476 PR tree-optimization/112438
3477 * tree-vect-loop.cc (vectorizable_induction): Bugfix when
3478 LOOP_VINFO_USING_SELECT_VL_P.
3480 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3482 * config/riscv/riscv-protos.h (enum insn_type): New enum.
3483 * config/riscv/riscv-v.cc
3484 (rvv_builder::combine_sequence_use_slideup_profitable_p): New function.
3485 (expand_vector_init_slideup_combine_sequence): Ditto.
3486 (expand_vec_init): Add slideup combine optimization.
3488 2023-11-10 Robin Dapp <rdapp@ventanamicro.com>
3490 PR tree-optimization/112464
3491 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
3492 vect_orig_stmt on scalar_dest_def_info.
3494 2023-11-10 Jin Ma <jinma@linux.alibaba.com>
3496 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt
3497 operation before the XTheadMemPair.
3499 2023-11-10 Richard Biener <rguenther@suse.de>
3501 PR tree-optimization/110221
3502 * tree-vect-slp.cc (vect_schedule_slp_node): When loop
3503 masking / len is applied make sure to not schedule
3504 intenal defs outside of the loop.
3506 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
3508 * expr.cc (store_constructor): Add "and" operation to uniform mask
3511 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
3514 * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint
3515 and switch to the new format.
3516 (add<mode>3_dup<exec_clobber>): Likewise.
3517 (add<mode>3_vcc<exec_vcc>): Likewise.
3518 (add<mode>3_vcc_dup<exec_vcc>): Likewise.
3519 (add<mode>3_vcc_zext_dup): Likewise.
3520 (add<mode>3_vcc_zext_dup_exec): Likewise.
3521 (add<mode>3_vcc_zext_dup2): Likewise.
3522 (add<mode>3_vcc_zext_dup2_exec): Likewise.
3524 2023-11-10 Richard Biener <rguenther@suse.de>
3526 PR middle-end/112469
3527 * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add
3528 missing view_converts.
3530 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
3532 * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
3533 min/max instructions.
3535 2023-11-10 Chenghui Pan <panchenghui@loongson.cn>
3537 * config/loongarch/lsx.md: Fix instruction name typo in
3538 lsx_vreplgr2vr_<lsxfmt_f> template.
3540 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3542 * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
3544 2023-11-10 Pan Li <pan2.li@intel.com>
3547 2023-11-10 Pan Li <pan2.li@intel.com>
3548 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
3549 New fun impl to expand the insn when trailing same elements.
3550 (expand_vec_init): Try trailing same elements when vec_init.
3552 2023-11-10 Pan Li <pan2.li@intel.com>
3554 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
3555 New fun impl to expand the insn when trailing same elements.
3556 (expand_vec_init): Try trailing same elements when vec_init.
3558 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3560 * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
3561 * config/riscv/autovec.md (cond_copysign<mode>): New pattern.
3563 2023-11-10 Pan Li <pan2.li@intel.com>
3566 * internal-fn.def (LRINT): Add FLOATN support.
3571 2023-11-10 Jeff Law <jlaw@ventanamicro.com>
3573 * config/h8300/combiner.md (single bit sign_extract): Avoid recently
3574 added patterns for H8/SX.
3575 (single bit zero_extract): New patterns.
3577 2023-11-10 liuhongt <hongtao.liu@intel.com>
3580 * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
3581 from LT to GT since there's not in the pattern.
3582 (*avx2_pcmp<mode>3_5): Ditto.
3584 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com>
3586 * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
3587 to force emitting register names using the wN form.
3588 * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
3589 always use wN written form in pseudo-C assembly syntax.
3591 2023-11-09 David Malcolm <dmalcolm@redhat.com>
3593 * diagnostic-show-locus.cc (layout::m_line_table): New field.
3594 (compatible_locations_p): Convert to...
3595 (layout::compatible_locations_p): ...this, replacing uses of
3596 line_table global with m_line_table.
3597 (layout::layout): Convert "richloc" param from a pointer to a
3598 const reference. Initialize m_line_table member.
3599 (layout::maybe_add_location_range): Replace uses of line_table
3600 global with m_line_table. Pass the latter to
3601 linemap_client_expand_location_to_spelling_point.
3602 (layout::print_leading_fixits): Pass m_line_table to
3604 (layout::print_trailing_fixits): Likewise.
3605 (gcc_rich_location::add_location_if_nearby): Update for change
3606 to layout ctor params.
3607 (diagnostic_show_locus): Convert to...
3608 (diagnostic_context::maybe_show_locus): ...this, converting
3609 richloc param from a pointer to a const reference. Make "loc"
3610 const. Split out printing part of function to...
3611 (diagnostic_context::show_locus): ...this.
3612 (selftest::test_offset_impl): Update for change to layout ctor
3614 (selftest::test_layout_x_offset_display_utf8): Likewise.
3615 (selftest::test_layout_x_offset_display_tab): Likewise.
3616 (selftest::test_tab_expansion): Likewise.
3617 * diagnostic.h (diagnostic_context::maybe_show_locus): New decl.
3618 (diagnostic_context::show_locus): New decl.
3619 (diagnostic_show_locus): Convert from a decl to an inline function.
3620 * gdbinit.in (break-on-diagnostic): Update from a breakpoint
3621 on diagnostic_show_locus to one on
3622 diagnostic_context::maybe_show_locus.
3623 * genmatch.cc (linemap_client_expand_location_to_spelling_point):
3624 Add "set" param and use it in place of line_table global.
3625 * input.cc (expand_location_1): Likewise.
3626 (expand_location): Update for new param of expand_location_1.
3627 (expand_location_to_spelling_point): Likewise.
3628 (linemap_client_expand_location_to_spelling_point): Add "set"
3629 param and use it in place of line_table global.
3630 * tree-diagnostic-path.cc (event_range::print): Pass line_table
3631 for new param of linemap_client_expand_location_to_spelling_point.
3633 2023-11-09 Uros Bizjak <ubizjak@gmail.com>
3635 * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>):
3636 Use W mode iterator instead of SWI48. Output MOV instead of XOR
3637 for TARGET_USE_MOV0.
3638 (stack_protect_set_1 peephole2): Use integer modes with
3639 mode size <= word mode size for operand 3.
3640 (stack_protect_set_1 peephole2 #2): New peephole2 pattern to
3641 substitute stack protector scratch register clear with unrelated
3642 register initialization, originally in front of stack
3644 (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern.
3645 (stack_protect_set_1 peephole2): New peephole2 pattern to
3646 substitute stack protector scratch register clear with unrelated
3647 register initialization involving LEA instruction.
3649 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com>
3651 PR rtl-optimization/110215
3652 * ira-lives.cc: (add_conflict_from_region_landing_pads): New
3654 (process_bb_node_lives): Use it.
3656 2023-11-09 Alexandre Oliva <oliva@adacore.com>
3658 * config/i386/i386.cc (symbolic_base_address_p,
3659 base_address_p): New, factored out from...
3660 (extract_base_offset_in_addr): ... here and extended to
3661 recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c
3662 and sse2-store-multi.c with PIE enabled by default.
3664 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3666 PR tree-optimization/109154
3667 * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New.
3669 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3671 PR tree-optimization/109154
3672 * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle
3674 * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise.
3675 * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise.
3677 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3679 PR tree-optimization/109154
3680 * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case.
3681 * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise.
3682 * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New.
3684 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3686 PR tree-optimization/109154
3687 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
3688 *movdi_aarch64): Add new w -> Z case.
3689 * config/aarch64/iterators.md (Vbtype): Add QI and HI.
3691 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3693 PR tree-optimization/109154
3694 * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p,
3695 aarch64_maybe_generate_simd_constant): New.
3696 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>,
3697 *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants.
3698 * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int):
3700 (aarch64_simd_special_constant_p,
3701 aarch64_maybe_generate_simd_constant): New.
3702 * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for
3704 * config/aarch64/constraints.md (Dx): new.
3706 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3708 PR tree-optimization/109154
3709 * internal-fn.def (COPYSIGN): New.
3710 * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to
3712 * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New.
3714 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3716 PR tree-optimization/109154
3717 * match.pd: Add new neg+abs rule, remove inverse copysign rule.
3719 2023-11-09 Tamar Christina <tamar.christina@arm.com>
3721 PR tree-optimization/109154
3722 * match.pd: expand existing copysign optimizations.
3724 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
3727 * collect2.cc (main): Do not prepend target triple to
3730 2023-11-09 Richard Biener <rguenther@suse.de>
3732 PR tree-optimization/111133
3733 * tree-vect-stmts.cc (vect_build_scatter_store_calls):
3734 Remove and refactor to ...
3735 (vect_build_one_scatter_store_call): ... this new function.
3736 (vectorizable_store): Use vect_check_scalar_mask to record
3737 the SLP node for the mask operand. Code generate scatters
3738 with builtin decls from the main scatter vectorization
3739 path and prepare that for SLP.
3740 * tree-vect-slp.cc (vect_get_operand_map): Do not look
3741 at the VDEF to decide between scatter or gather since that
3742 doesn't work for patterns. Use the LHS being an SSA_NAME
3745 2023-11-09 Pan Li <pan2.li@intel.com>
3747 * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
3748 perform once emit when at least one succ edge is abnormal.
3750 2023-11-09 Richard Biener <rguenther@suse.de>
3752 * tree-vect-loop.cc (vect_verify_full_masking_avx512):
3753 Check we have integer mode masks as required by
3756 2023-11-09 Richard Biener <rguenther@suse.de>
3758 PR tree-optimization/112444
3759 * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited
3760 defs as undefined vals.
3762 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com>
3764 * config/mips/mips.cc(mips_option_override): Set mips_abs to
3765 2008, if mips_abs is default and mips_nan is 2008.
3767 2023-11-09 Florian Weimer <fweimer@redhat.com>
3769 * doc/invoke.texi (Warning Options): Document
3770 -Wreturn-mismatch. Update -Wreturn-type documentation.
3772 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3774 * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP.
3775 * config/s390/vector.md (eltswapv16qi): New expander.
3776 (*eltswapv16qi): New insn and splitter.
3777 (eltswapv8hi): New insn and splitter.
3778 (eltswap<mode>): New insn and splitter for modes V_HW_4 as well
3780 * config/s390/vx-builtins.md (eltswap<mode>): Remove.
3781 (*eltswapv16qi): Remove.
3782 (*eltswap<mode>): Remove.
3783 (*eltswap<mode>_emu): Remove.
3785 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3787 * config/s390/s390.cc (expand_perm_with_rot): Remove.
3788 (expand_perm_reverse_elements): New.
3789 (expand_perm_with_vster): Remove.
3790 (expand_perm_with_vstbrq): Remove.
3791 (vectorize_vec_perm_const_1): Replace removed functions with new
3794 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3796 * config/s390/s390.cc (expand_perm_with_merge): Deal with cases
3797 where vmr{l,h} are still applicable if the operands are swapped.
3798 (expand_perm_with_vpdi): Likewise for vpdi.
3800 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3802 * config/s390/s390.md (VX_CONV_INT): Remove iterator.
3803 (gf): Add float mappings.
3804 (TOINT, toint): New attribute.
3805 (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13):
3807 (*fixuns_trunc<mode><toint>2_z13): Add.
3808 (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13):
3810 (*fix_trunc<mode><toint>2_bfp_z13): Add.
3811 (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove.
3812 (*floatuns<toint><mode>2_z13): Add.
3813 * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator.
3814 (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
3815 (float<tointvec><mode>2): Add.
3816 (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
3817 (floatuns<tointvec><mode>2): Add.
3818 (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
3820 (fix_trunc<mode><tointvec>2): Add.
3821 (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
3823 (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add.
3825 2023-11-09 Jakub Jelinek <jakub@redhat.com>
3828 * attribs.cc (attribute_ignored_p): Only return true for
3829 attr_namespace_ignored_p if as is NULL.
3830 (decl_attributes): Never add ignored attributes.
3832 2023-11-09 Jin Ma <jinma@linux.alibaba.com>
3834 * config/riscv/bitmanip.md: Avoid the conflict between
3835 zbb and xtheadmemidx in patterns.
3837 2023-11-09 Richard Biener <rguenther@suse.de>
3839 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
3840 to the correct simd_clone_info.
3842 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3844 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE.
3846 2023-11-09 Alexandre Oliva <oliva@adacore.com>
3848 * tree-cfg.cc (assign_discriminators): Handle debug stmts.
3850 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
3853 * config/i386/i386.md (*add<mode>_1_slp):
3854 Split insn only for unmatched operand 0.
3855 (*sub<mode>_1_slp): Ditto.
3856 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
3857 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
3858 Split insn only for unmatched operand 0.
3859 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
3860 (*one_cmpl<mode>_1_slp): Ditto.
3861 (*ashl<mode>3_1_slp): Ditto.
3862 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
3863 (*<any_rotate:insn><mode>_1_slp): Ditto.
3864 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
3865 alternative 1 and split insn after reload for unmatched operand 0.
3866 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
3867 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
3868 iterator. Redefine as define_insn_and_split. Add alternative 1
3869 and split insn after reload for unmatched operand 0.
3870 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
3871 alternative 1 and split insn after reload for unmatched operand 0.
3872 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
3873 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
3874 any_logic code iterator.
3875 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
3876 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
3877 any_logic code iterator. Redefine as define_insn_and_split. Add
3878 alternative 1 and split insn after reload for unmatched operand 0.
3879 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
3880 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
3881 code iterator. Redefine as define_insn_and_split. Add alternative 1
3882 and split insn after reload for unmatched operand 0.
3883 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
3884 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
3885 any_logic code iterator. Redefine as define_insn_and_split. Add
3886 alternative 1 and split insn after reload for unmatched operand 0.
3887 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
3888 Add alternative 1 and split insn after reload for unmatched operand 0.
3889 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
3890 alternative 1 and split insn after reload for unmatched operand 0.
3891 (*one_cmplqi_ext<mode>_1): Ditto.
3892 (*ashlqi_ext<mode>_1): Ditto.
3893 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
3895 2023-11-08 Richard Biener <rguenther@suse.de>
3897 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
3898 vector gathering for SLP of emulated gathers.
3900 2023-11-08 Richard Biener <rguenther@suse.de>
3902 * tree-vectorizer.h (vect_slp_child_index_for_operand):
3903 Add gatherscatter_p argument.
3904 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
3906 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
3907 argument into an output, also output the SLP node associated
3909 (vectorizable_simd_clone_call): Adjust.
3910 (vectorizable_store): Likewise.
3911 (vectorizable_load): Likewise.
3913 2023-11-08 Richard Biener <rguenther@suse.de>
3915 * tree-vect-stmts.cc (vectorizable_load): Use the correct
3916 vectorized mask operand.
3918 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
3920 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
3921 New combine pattern.
3923 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3925 * config/riscv/riscv-vsetvl.cc: Fix ICE.
3927 2023-11-08 xuli <xuli1@eswincomputing.com>
3929 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
3931 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
3934 * config/i386/constraints.md (jc): New constraint that prohibits
3936 * config/i386/i386.md (*movdi_internal): Change r constraint
3938 (*movti_internal): Likewise.
3940 2023-11-08 Florian Weimer <fweimer@redhat.com>
3942 * doc/invoke.texi (Warning Options): Mention C diagnostics
3945 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3948 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
3950 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
3953 * config/i386/i386.md (avx_noavx512vl): New definition for isa
3955 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
3956 avx_noavx512f to avx_noavx512vl.
3958 2023-11-07 Pan Li <pan2.li@intel.com>
3960 * config/riscv/autovec.md: Remove the size check of lfloor.
3961 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
3962 emit_vec_rounding_to_integer for floor.
3964 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
3966 PR tree-optimization/112361
3968 PR middle-end/112406
3969 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
3970 loop was versioned and only then create COND_OPs.
3971 (predicate_scalar_phi): Do not create COND_OP when not
3973 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
3975 (vectorize_fold_left_reduction): Pass mask to
3976 vect_expand_fold_left.
3978 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
3980 * config/i386/predicates.md ("flags_reg_operand"):
3981 Make predicate special to avoid automatic mode checks.
3983 2023-11-07 Martin Jambor <mjambor@suse.cz>
3985 * configure: Regenerate.
3987 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
3989 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
3991 (output_offload_tables): Write indirect functions.
3992 (input_offload_tables): read indirect functions.
3993 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
3994 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
3995 * omp-offload.cc (offload_ind_funcs): New.
3996 (omp_discover_implicit_declare_target): Add functions marked with
3997 'omp declare target indirect' to indirect functions list.
3998 (omp_finish_file): Add indirect functions to section for offload
4000 (execute_omp_device_lower): Redirect indirect calls on target by
4001 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
4002 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
4003 indirect functions are present on an accelerator device.
4004 * omp-offload.h (offload_ind_funcs): New.
4005 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
4006 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
4007 (omp_clause_code_name): Likewise.
4008 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
4009 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
4010 section. Count number of indirect functions.
4011 (process_obj): Emit number of indirect functions.
4012 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
4013 (process): Emit offload_ind_func_table in PTX code. Emit indirect
4014 function names and count in image.
4015 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
4016 indirect functions in PTX code with IND_FUNC_MAP.
4018 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
4020 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
4021 attribute syntax supported also in C.
4023 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
4025 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
4026 modifier for SVE registers.
4028 2023-11-07 Joseph Myers <joseph@codesourcery.com>
4030 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
4031 use flag_isoc23 and function_c23_misc.
4032 * config/rl78/rl78.cc (rl78_option_override): Compare
4033 lang_hooks.name with "GNU C23" not "GNU C2X".
4034 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
4035 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
4037 * doc/extend.texi: Likewise.
4038 * doc/invoke.texi: Likewise.
4039 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
4040 against and return "GNU C23" language string instead of "GNU C2X".
4041 * ginclude/float.h: Refer to C23 instead of C2X in comments.
4042 * ginclude/stdint-gcc.h: Likewise.
4043 * glimits.h: Likewise.
4046 2023-11-07 Alexandre Oliva <oliva@adacore.com>
4048 * doc/sourcebuild.texi (opt_mstrict_align): New target.
4050 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
4052 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
4053 New combine pattern.
4054 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
4055 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
4056 (*cond_len_extend<v_double_trunc><mode>): Ditto.
4057 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
4059 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4062 * config/riscv/riscv-avlprop.cc
4063 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
4064 * config/riscv/t-riscv: Add new include.
4066 2023-11-07 Pan Li <pan2.li@intel.com>
4068 * config/riscv/autovec.md: Remove the size check of lceil.l
4069 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
4070 emit_vec_rounding_to_integer for ceil.
4072 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
4074 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
4076 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
4078 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
4080 2023-11-06 David Malcolm <dmalcolm@redhat.com>
4082 * diagnostic-show-locus.cc (class colorizer): Take just a
4083 pretty_printer rather than a diagnostic_context.
4084 (layout::layout): Make context param a const reference,
4085 and pretty_printer param non-optional.
4086 (layout::m_context): Drop field.
4087 (layout::m_options): New field.
4088 (layout::m_colorize_source_p): Drop field.
4089 (layout::m_show_labels_p): Drop field.
4090 (layout::m_show_line_numbers_p): Drop field.
4091 (layout::print_gap_in_line_numbering): Use m_options.
4092 (layout::calculate_line_spans): Likewise.
4093 (layout::calculate_linenum_width): Likewise.
4094 (layout::calculate_x_offset_display): Likewise.
4095 (layout::print_source_line): Likewise.
4096 (layout::start_annotation_line): Likewise.
4097 (layout::print_annotation_line): Likewise.
4098 (layout::print_line): Likewise.
4099 (gcc_rich_location::add_location_if_nearby): Update for changes to
4101 (diagnostic_show_locus): Likewise.
4102 (selftest::test_offset_impl): Likewise.
4103 (selftest::test_layout_x_offset_display_utf8): Likewise.
4104 (selftest::test_layout_x_offset_display_tab): Likewise.
4105 (selftest::test_tab_expansion): Likewise.
4106 * diagnostic.h (diagnostic_context::m_source_printing): Move
4107 declaration of struct outside diagnostic_context as...
4108 (struct diagnostic_source_printing_options)... this.
4110 2023-11-06 David Malcolm <dmalcolm@redhat.com>
4112 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
4114 (diagnostic_option_classifier::push): ...this.
4115 (diagnostic_context::pop_diagnostics): Convert to...
4116 (diagnostic_option_classifier::pop): ...this.
4117 (diagnostic_context::initialize): Move code to...
4118 (diagnostic_option_classifier::init): ...this new function.
4119 (diagnostic_context::finish): Move code to...
4120 (diagnostic_option_classifier::fini): ...this new function.
4121 (diagnostic_context::classify_diagnostic): Convert to...
4122 (diagnostic_option_classifier::classify_diagnostic): ...this.
4123 (diagnostic_context::update_effective_level_from_pragmas): Convert
4125 (diagnostic_option_classifier::update_effective_level_from_pragmas):
4127 (diagnostic_context::diagnostic_enabled): Update for refactoring.
4128 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
4129 (class diagnostic_option_classifier): ...this new class.
4130 (diagnostic_context::option_unspecified_p): Update for move of
4131 fields into m_option_classifier.
4132 (diagnostic_context::classify_diagnostic): Likewise.
4133 (diagnostic_context::push_diagnostics): Likewise.
4134 (diagnostic_context::pop_diagnostics): Likewise.
4135 (diagnostic_context::update_effective_level_from_pragmas): Delete.
4136 (diagnostic_context::m_classify_diagnostic): Move into class
4137 diagnostic_option_classifier.
4138 (diagnostic_context::m_option_classifier): Likewise.
4139 (diagnostic_context::m_classification_history): Likewise.
4140 (diagnostic_context::m_n_classification_history): Likewise.
4141 (diagnostic_context::m_push_list): Likewise.
4142 (diagnostic_context::m_n_push): Likewise.
4143 (diagnostic_context::m_option_classifier): New.
4145 2023-11-06 David Malcolm <dmalcolm@redhat.com>
4147 * diagnostic.cc (diagnostic_context::set_urlifier): New.
4148 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
4149 (diagnostic_context::m_urlifier): Make private.
4150 * gcc.cc (driver::global_initializations): Use set_urlifier rather
4151 than directly setting field.
4152 * toplev.cc (general_init): Likewise.
4154 2023-11-06 David Malcolm <dmalcolm@redhat.com>
4156 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
4157 uses of diagnostic_kind_count with simple field acesss.
4158 (diagnostic_context::report_diagnostic): Likewise.
4159 (diagnostic_text_output_format::~diagnostic_text_output_format):
4160 Replace use of diagnostic_kind_count with
4161 diagnostic_context::diagnostic_count.
4162 * diagnostic.h (diagnostic_kind_count): Delete.
4163 (errorcount): Replace use of diagnostic_kind_count with
4164 diagnostic_context::diagnostic_count.
4165 (warningcount): Likewise.
4166 (werrorcount): Likewise.
4167 (sorrycount): Likewise.
4169 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
4171 * doc/sourcebuild.texi (Other attributes): Document thread_fence
4174 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
4176 * config/i386/constraints.md (Bc): Remove constraint.
4177 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
4178 * config/i386/i386.cc (ix86_memory_address_reg_class):
4179 Do not limit processing to TARGET_APX_EGPR. Exit early for
4180 NULL insn. Do not check recog_data.insn before calling
4181 extract_insn_cached.
4182 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
4183 (ix86_regno_ok_for_insn_base_p): Ditto.
4184 (ix86_insn_index_reg_class): Ditto.
4185 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
4186 Remove insn pattern and corresponding peephole2 pattern.
4187 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
4188 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
4189 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
4190 and corresponding peephole2 pattern.
4191 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
4192 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
4193 (*extzvqi_mem_rex64): Remove insn pattern and
4194 corresponding peephole2 pattern.
4195 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
4196 alternative to (Q,QnBn). Add "addr" attribute.
4197 (*insvqi_1_mem_rex64): Remove insn pattern and
4198 corresponding peephole2 pattern.
4199 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
4200 alternative to (Q,QnBn). Add "addr" attribute.
4201 (@insv<mode>_1): Ditto.
4202 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
4203 alternative to (QBn,0,Q). Add "addr" attribute.
4204 (*subqi_ext<mode>_0): Ditto.
4205 (*andqi_ext<mode>_0): Ditto.
4206 (*<any_or:code>qi_ext<mode>_0): Ditto.
4207 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
4208 alternative to (Q,0,QnBn). Add "addr" attribute.
4209 (*andqi_ext<mode>_1): Ditto.
4210 (*andqi_ext<mode>_1_cc): Ditto.
4211 (*<any_or:code>qi_ext<mode>_1): Ditto.
4212 (*xorqi_ext<mode>_1_cc): Ditto.
4213 * config/i386/predicates.md (nonimm_x64constmem_operand):
4215 (general_x64constmem_operand): Ditto.
4216 (norex_memory_operand): Ditto.
4218 2023-11-06 Joseph Myers <joseph@codesourcery.com>
4221 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
4222 -std=gnu23 instead of -std=c2x and -std=gnu2x.
4223 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
4224 instead of C2x and -std=c2x.
4225 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
4226 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
4227 -std=gnu2x as deprecated aliases. Update descriptions of C23.
4228 * doc/standards.texi (Standards): Describe C23 with C2X as an old
4231 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
4233 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
4235 2023-11-06 Richard Biener <rguenther@suse.de>
4237 PR tree-optimization/112405
4238 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
4239 Properly handle invariant and/or loop mask passing.
4241 2023-11-06 Pan Li <pan2.li@intel.com>
4243 * config/riscv/autovec.md: Remove the size check of lround.
4244 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
4245 emit_vec_rounding_to_integer for round.
4247 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4249 * config/riscv/predicates.md: Adapt predicate.
4250 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
4251 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
4252 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
4253 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
4255 2023-11-06 Richard Biener <rguenther@suse.de>
4257 PR tree-optimization/111950
4258 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
4260 (find_guard_arg): Likewise.
4261 (slpeel_update_phi_nodes_for_guard2): Likewise.
4262 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
4263 slpeel_duplicate_current_defs_from_edges, do not elide
4264 LC-PHIs for invariant values.
4265 (vect_do_peeling): Materialize PHI arguments for the edge
4266 around the epilog from the PHI defs of the main loop exit.
4268 2023-11-06 Richard Biener <rguenther@suse.de>
4270 PR tree-optimization/112404
4271 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
4272 overload with SLP node argument.
4273 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
4274 (vect_check_scalar_mask): Use it.
4275 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
4276 loads also for nodes with children, like .MASK_LOAD.
4277 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
4278 representative for load nodes and check whether it is a grouped
4279 access before looking for load-lanes support.
4281 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
4283 PR tree-optimization/111760
4284 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
4286 * config/riscv/riscv-protos.h (enum insn_type): Add.
4287 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
4288 * doc/md.texi: Add vcond_mask_len.
4289 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
4290 Create VCOND_MASK_LEN when length masking.
4291 * gimple-match.h (gimple_match_op::gimple_match_op): Always
4292 initialize len and bias.
4293 * internal-fn.cc (vec_cond_mask_len_direct): Add.
4294 (direct_vec_cond_mask_len_optab_supported_p): Add.
4295 (internal_fn_len_index): Add VCOND_MASK_LEN.
4296 (internal_fn_mask_index): Ditto.
4297 * internal-fn.def (VCOND_MASK_LEN): New internal function.
4298 * match.pd: Combine unconditional unary, binary and ternary
4299 operations into the respective COND_LEN operations.
4300 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
4302 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
4304 * explow.cc (align_dynamic_address): Do nothing if the required
4305 alignment is a byte.
4307 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
4309 * function.h (get_stack_dynamic_offset): Declare.
4310 * function.cc (get_stack_dynamic_offset): New function,
4312 (get_stack_dynamic_offset): ...here.
4313 * explow.cc (allocate_dynamic_stack_space): Handle calls made
4314 after virtual registers have been instantiated.
4316 2023-11-06 liuhongt <hongtao.liu@intel.com>
4319 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
4320 Avoid generating RTL code when d->testing_p.
4322 2023-11-06 Richard Biener <rguenther@suse.de>
4324 PR tree-optimization/112369
4325 * tree.cc (strip_float_extensions): Use element_precision.
4327 2023-11-06 Richard Biener <rguenther@suse.de>
4329 PR middle-end/112296
4330 * doc/extend.texi (__builtin_constant_p): Clarify that
4331 side-effects are discarded.
4333 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
4336 * config.in: Regenerate.
4337 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
4338 inline asm handling under !HAVE_AS_POWER10_HTM.
4339 * configure: Regenerate.
4340 * configure.ac: Detect assembler support for HTM insns at power10.
4342 2023-11-06 xuli <xuli1@eswincomputing.com>
4343 Pan Li <pan2.li@intel.com>
4345 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
4346 (riscv_register_pragmas): Register the hook.
4347 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
4348 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
4349 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
4350 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
4352 (function_builder::add_function): Add overloaded arg.
4353 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
4354 (function_builder::add_overloaded_function): New API impl.
4355 (registered_function::overloaded_hash): Calculate hash value.
4356 (has_vxrm_or_frm_p): New function impl.
4357 (non_overloaded_registered_function_hasher::hash): Ditto.
4358 (non_overloaded_registered_function_hasher::equal): Ditto.
4359 (handle_pragma_vector): Allocate space for hash table.
4360 (resolve_overloaded_builtin): New function impl.
4361 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
4362 (function_base::may_require_vxrm_p): Ditto.
4364 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
4367 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
4368 * config/i386/avx512bf16vlintrin.h: Ditto.
4369 * config/i386/avx512bitalgvlintrin.h: Ditto.
4370 * config/i386/avx512bwintrin.h: Ditto.
4371 * config/i386/avx512dqintrin.h: Ditto.
4372 * config/i386/avx512fintrin.h: Ditto.
4373 * config/i386/avx512fp16intrin.h: Ditto.
4374 * config/i386/avx512fp16vlintrin.h: Ditto.
4375 * config/i386/avx512ifmavlintrin.h: Ditto.
4376 * config/i386/avx512vbmi2vlintrin.h: Ditto.
4377 * config/i386/avx512vbmivlintrin.h: Ditto.
4378 * config/i386/avx512vlbwintrin.h: Ditto.
4379 * config/i386/avx512vldqintrin.h: Ditto.
4380 * config/i386/avx512vlintrin.h: Ditto.
4381 * config/i386/avx512vnnivlintrin.h: Ditto.
4382 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
4383 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
4385 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
4387 * config/i386/avx512bf16vlintrin.h
4388 (_mm_avx512_castsi128_ps): New.
4389 (_mm256_avx512_castsi256_ps): Ditto.
4390 (_mm_avx512_slli_epi32): Ditto.
4391 (_mm256_avx512_slli_epi32): Ditto.
4392 (_mm_avx512_cvtepi16_epi32): Ditto.
4393 (_mm256_avx512_cvtepi16_epi32): Ditto.
4394 (__attribute__): Change intrin call.
4395 * config/i386/avx512bwintrin.h
4396 (_mm_avx512_set_epi32): New.
4397 (_mm_avx512_set_epi16): Ditto.
4398 (_mm_avx512_set_epi8): Ditto.
4399 (__attribute__): Change intrin call.
4400 * config/i386/avx512fp16intrin.h: Ditto.
4401 * config/i386/avx512fp16vlintrin.h
4402 (_mm_avx512_set1_ps): New.
4403 (_mm256_avx512_set1_ps): Ditto.
4404 (_mm_avx512_and_si128): Ditto.
4405 (_mm256_avx512_and_si256): Ditto.
4406 (__attribute__): Change intrin call.
4407 * config/i386/avx512vlbwintrin.h
4408 (_mm_avx512_set1_epi32): New.
4409 (_mm_avx512_set1_epi16): Ditto.
4410 (_mm_avx512_set1_epi8): Ditto.
4411 (_mm256_avx512_set_epi16): Ditto.
4412 (_mm256_avx512_set_epi8): Ditto.
4413 (_mm256_avx512_set1_epi16): Ditto.
4414 (_mm256_avx512_set1_epi32): Ditto.
4415 (_mm256_avx512_set1_epi8): Ditto.
4416 (_mm_avx512_max_epi16): Ditto.
4417 (_mm_avx512_min_epi16): Ditto.
4418 (_mm_avx512_max_epu16): Ditto.
4419 (_mm_avx512_min_epu16): Ditto.
4420 (_mm_avx512_max_epi8): Ditto.
4421 (_mm_avx512_min_epi8): Ditto.
4422 (_mm_avx512_max_epu8): Ditto.
4423 (_mm_avx512_min_epu8): Ditto.
4424 (_mm256_avx512_max_epi16): Ditto.
4425 (_mm256_avx512_min_epi16): Ditto.
4426 (_mm256_avx512_max_epu16): Ditto.
4427 (_mm256_avx512_min_epu16): Ditto.
4428 (_mm256_avx512_insertf128_ps): Ditto.
4429 (_mm256_avx512_extractf128_pd): Ditto.
4430 (_mm256_avx512_extracti128_si256): Ditto.
4431 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
4432 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
4433 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
4434 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
4435 (__attribute__): Change intrin call.
4437 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
4439 * config/i386/avx512bf16vlintrin.h: Change intrin call.
4440 * config/i386/avx512fintrin.h
4441 (_mm_avx512_undefined_ps): New.
4442 (_mm_avx512_undefined_pd): Ditto.
4443 (__attribute__): Change intrin call.
4444 * config/i386/avx512vbmivlintrin.h: Ditto.
4445 * config/i386/avx512vlbwintrin.h: Ditto.
4446 * config/i386/avx512vldqintrin.h: Ditto.
4447 * config/i386/avx512vlintrin.h
4448 (_mm_avx512_undefined_si128): New.
4449 (_mm256_avx512_undefined_ps): Ditto.
4450 (_mm256_avx512_undefined_pd): Ditto.
4451 (_mm256_avx512_undefined_si256): Ditto.
4452 (__attribute__): Change intrin call.
4454 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
4456 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
4457 * config/i386/avx512dqintrin.h: Ditto.
4458 * config/i386/avx512fintrin.h:
4459 (_mm_avx512_setzero_ps): New.
4460 (_mm_avx512_setzero_pd): Ditto.
4461 (__attribute__): Change intrin call.
4462 * config/i386/avx512fp16intrin.h: Ditto.
4463 * config/i386/avx512fp16vlintrin.h: Ditto.
4464 * config/i386/avx512vbmi2vlintrin.h: Ditto.
4465 * config/i386/avx512vbmivlintrin.h: Ditto.
4466 * config/i386/avx512vlbwintrin.h: Ditto.
4467 * config/i386/avx512vldqintrin.h: Ditto.
4468 * config/i386/avx512vlintrin.h
4469 (_mm_avx512_setzero_si128): New.
4470 (_mm256_avx512_setzero_pd): Ditto.
4471 (_mm256_avx512_setzero_ps): Ditto.
4472 (_mm256_avx512_setzero_si256): Ditto.
4473 (__attribute__): Change intrin call.
4474 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
4475 * config/i386/gfniintrin.h: Ditto.
4477 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
4479 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
4480 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
4481 (REG_CLASS_NAMES): Ditto.
4482 (REG_CLASS_CONTENTS): Ditto.
4483 * config/i386/constraints.md ("R"): Update for rename.
4485 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
4487 * mode-switching.cc: Remove unused forward references.
4488 (seginfo): Remove bbnum.
4489 (new_seginfo): Remove associated argument.
4490 (optimize_mode_switching): Update calls accordingly.
4492 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
4494 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
4495 invalid [...] operands.
4497 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
4500 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
4501 function, with the core logic extracted from...
4502 (aarch64_can_change_mode_class): ...here. Extend the previous rules
4503 to allow changes between partial SVE modes and other modes if
4504 the other mode is no bigger than an element, and if no other rule
4505 prevents it. Use the aarch64_modes_tieable_p handling of
4506 partial Advanced SIMD structure modes.
4507 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
4508 Allow all vector mode ties that it allows.
4510 2023-11-05 Pan Li <pan2.li@intel.com>
4512 * config/riscv/autovec.md: Remove the size check of lrint.
4513 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
4515 (emit_vec_widden_cvt_x_f): New help emit func impl.
4516 (emit_vec_rounding_to_integer): New func impl to emit the
4517 rounding from FP to integer.
4518 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
4519 * config/riscv/vector.md: Take V_VLSF for vfncvt.
4521 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4523 * config/riscv/vector.md: Fix bug.
4525 2023-11-04 Sergei Trofimovich <siarheit@google.com>
4528 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
4531 2023-11-04 Pan Li <pan2.li@intel.com>
4533 * config/riscv/vector-iterators.md: Remove HF modes.
4535 2023-11-04 David Malcolm <dmalcolm@redhat.com>
4537 * diagnostic.cc: Include "pretty-print-urlifier.h".
4538 (diagnostic_context::initialize): Initialize m_urlifier.
4539 (diagnostic_context::finish): Clean up m_urlifier
4540 (diagnostic_report::diagnostic): m_urlifier to pp_format.
4541 * diagnostic.h (diagnostic_context::m_urlifier): New field.
4542 * gcc-urlifier.cc: New file.
4543 * gcc-urlifier.def: New file.
4544 * gcc-urlifier.h: New file.
4545 * gcc.cc: Include "gcc-urlifier.h".
4546 (driver::global_initializations): Initialize global_dc->m_urlifier.
4547 * pretty-print-urlifier.h: New file.
4548 * pretty-print.cc: Include "pretty-print-urlifier.h".
4549 (obstack_append_string): New.
4550 (urlify_quoted_string): New.
4551 (pp_format): Add "urlifier" param and use it to implement optional
4552 urlification of quoted text strings.
4553 (pp_output_formatted_text): Make buffer a const pointer.
4554 (selftest::pp_printf_with_urlifier): New.
4555 (selftest::test_urlification): New.
4556 (selftest::pretty_print_cc_tests): Call it.
4557 * pretty-print.h (class urlifier): New forward declaration.
4558 (pp_format): Add optional urlifier param.
4559 * selftest-run-tests.cc (selftest::run_tests): Call
4560 selftest::gcc_urlifier_cc_tests .
4561 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
4562 * toplev.cc: Include "gcc-urlifier.h".
4563 (general_init): Initialize global_dc->m_urlifier.
4565 2023-11-04 David Malcolm <dmalcolm@redhat.com>
4567 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
4570 2023-11-04 David Malcolm <dmalcolm@redhat.com>
4572 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
4573 to diagnostic-text-art.h.
4574 * coretypes.h (struct diagnostic_context): Replace forward decl
4576 (class diagnostic_context): ...this.
4577 * diagnostic-format-json.cc: Update for changes to
4579 * diagnostic-format-sarif.cc: Likewise.
4580 * diagnostic-show-locus.cc: Likewise.
4581 * diagnostic-text-art.h: Deleted file, moving content...
4582 (enum diagnostic_text_art_charset): ...to diagnostic.h,
4583 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
4584 (diagnostics_text_art_charset_init): ...deleting in favor of
4585 diagnostic_context::set_text_art_charset.
4586 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
4587 (pedantic_warning_kind): Update for field renaming.
4588 (permissive_error_kind): Likewise.
4589 (permissive_error_option): Likewise.
4590 (diagnostic_initialize): Convert to...
4591 (diagnostic_context::initialize): ...this, updating for field
4593 (diagnostic_color_init): Convert to...
4594 (diagnostic_context::color_init): ...this.
4595 (diagnostic_urls_init): Convert to...
4596 (diagnostic_context::urls_init): ...this.
4597 (diagnostic_initialize_input_context): Convert to...
4598 (diagnostic_context::initialize_input_context): ...this.
4599 (diagnostic_finish): Convert to...
4600 (diagnostic_context::finish): ...this, updating for field
4602 (diagnostic_context::set_output_format): New.
4603 (diagnostic_context::set_client_data_hooks): New.
4604 (diagnostic_context::create_edit_context): New.
4605 (diagnostic_converted_column): Convert to...
4606 (diagnostic_context::converted_column): ...this.
4607 (diagnostic_get_location_text): Update for field renaming.
4608 (diagnostic_check_max_errors): Convert to...
4609 (diagnostic_context::check_max_errors): ...this, updating for
4611 (diagnostic_action_after_output): Convert to...
4612 (diagnostic_context::action_after_output): ...this, updating for
4614 (last_module_changed_p): Delete.
4615 (set_last_module): Delete.
4616 (includes_seen): Convert to...
4617 (diagnostic_context::includes_seen_p): ...this, updating for field
4619 (diagnostic_report_current_module): Convert to...
4620 (diagnostic_context::report_current_module): ...this, updating for
4621 field renamings, and replacing uses of last_module_changed_p and
4622 set_last_module to simple field accesses.
4623 (diagnostic_show_any_path): Convert to...
4624 (diagnostic_context::show_any_path): ...this.
4625 (diagnostic_classify_diagnostic): Convert to...
4626 (diagnostic_context::classify_diagnostic): ...this, updating for
4628 (diagnostic_push_diagnostics): Convert to...
4629 (diagnostic_context::push_diagnostics): ...this, updating for field
4631 (diagnostic_pop_diagnostics): Convert to...
4632 (diagnostic_context::pop_diagnostics): ...this, updating for field
4634 (get_any_inlining_info): Convert to...
4635 (diagnostic_context::get_any_inlining_info): ...this, updating for
4637 (update_effective_level_from_pragmas): Convert to...
4638 (diagnostic_context::update_effective_level_from_pragmas):
4639 ...this, updating for field renamings.
4640 (print_any_cwe): Convert to...
4641 (diagnostic_context::print_any_cwe): ...this.
4642 (print_any_rules): Convert to...
4643 (diagnostic_context::print_any_rules): ...this.
4644 (print_option_information): Convert to...
4645 (diagnostic_context::print_option_information): ...this, updating
4646 for field renamings.
4647 (diagnostic_enabled): Convert to...
4648 (diagnostic_context::diagnostic_enabled): ...this, updating for
4650 (warning_enabled_at): Convert to...
4651 (diagnostic_context::warning_enabled_at): ...this.
4652 (diagnostic_report_diagnostic): Convert to...
4653 (diagnostic_context::report_diagnostic): ...this, updating for
4654 field renamings and conversions to member functions.
4655 (diagnostic_append_note): Update for field renaming.
4656 (diagnostic_impl): Use diagnostic_context::report_diagnostic
4658 (diagnostic_n_impl): Likewise.
4659 (diagnostic_emit_diagram): Convert to...
4660 (diagnostic_context::emit_diagram): ...this, updating for field
4662 (error_recursion): Convert to...
4663 (diagnostic_context::error_recursion): ...this.
4664 (diagnostic_text_output_format::~diagnostic_text_output_format):
4666 (diagnostics_text_art_charset_init): Convert to...
4667 (diagnostic_context::set_text_art_charset): ...this.
4668 (assert_location_text): Update for field renamings.
4669 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
4670 diagnostic-text-art.h.
4671 (struct diagnostic_context): Convert to...
4672 (class diagnostic_context): ...this.
4673 (diagnostic_context::ice_handler_callback_t): New typedef.
4674 (diagnostic_context::set_locations_callback_t): New typedef.
4675 (diagnostic_context::initialize): New decl.
4676 (diagnostic_context::color_init): New decl.
4677 (diagnostic_context::urls_init): New decl.
4678 (diagnostic_context::file_cache_init): New decl.
4679 (diagnostic_context::finish): New decl.
4680 (diagnostic_context::set_set_locations_callback): New.
4681 (diagnostic_context::initialize_input_context): New decl.
4682 (diagnostic_context::warning_enabled_at): New decl.
4683 (diagnostic_context::option_unspecified_p): New.
4684 (diagnostic_context::report_diagnostic): New decl.
4685 (diagnostic_context::report_current_module): New decl.
4686 (diagnostic_context::check_max_errors): New decl.
4687 (diagnostic_context::action_after_output): New decl.
4688 (diagnostic_context::classify_diagnostic): New decl.
4689 (diagnostic_context::push_diagnostics): New decl.
4690 (diagnostic_context::pop_diagnostics): New decl.
4691 (diagnostic_context::emit_diagram): New decl.
4692 (diagnostic_context::set_output_format): New decl.
4693 (diagnostic_context::set_text_art_charset): New decl.
4694 (diagnostic_context::set_client_data_hooks): New decl.
4695 (diagnostic_context::create_edit_context): New decl.
4696 (diagnostic_context::set_warning_as_error_requested): New.
4697 (diagnostic_context::set_report_bug): New.
4698 (diagnostic_context::set_extra_output_kind): New.
4699 (diagnostic_context::set_show_cwe): New.
4700 (diagnostic_context::set_show_rules): New.
4701 (diagnostic_context::set_path_format): New.
4702 (diagnostic_context::set_show_path_depths): New.
4703 (diagnostic_context::set_show_option_requested): New.
4704 (diagnostic_context::set_max_errors): New.
4705 (diagnostic_context::set_escape_format): New.
4706 (diagnostic_context::set_ice_handler_callback): New.
4707 (diagnostic_context::warning_as_error_requested_p): New.
4708 (diagnostic_context::show_path_depths_p): New.
4709 (diagnostic_context::get_path_format): New.
4710 (diagnostic_context::get_escape_format): New.
4711 (diagnostic_context::get_file_cache): New.
4712 (diagnostic_context::get_edit_context): New.
4713 (diagnostic_context::get_client_data_hooks): New.
4714 (diagnostic_context::get_diagram_theme): New.
4715 (diagnostic_context::converted_column): New decl.
4716 (diagnostic_context::diagnostic_count): New.
4717 (diagnostic_context::includes_seen_p): New decl.
4718 (diagnostic_context::print_any_cwe): New decl.
4719 (diagnostic_context::print_any_rules): New decl.
4720 (diagnostic_context::print_option_information): New decl.
4721 (diagnostic_context::show_any_path): New decl.
4722 (diagnostic_context::error_recursion): New decl.
4723 (diagnostic_context::diagnostic_enabled): New decl.
4724 (diagnostic_context::get_any_inlining_info): New decl.
4725 (diagnostic_context::update_effective_level_from_pragmas): New
4727 (diagnostic_context::m_file_cache): Make private.
4728 (diagnostic_context::diagnostic_count): Rename to...
4729 (diagnostic_context::m_diagnostic_count): ...this and make
4731 (diagnostic_context::warning_as_error_requested): Rename to...
4732 (diagnostic_context::m_warning_as_error_requested): ...this and
4734 (diagnostic_context::n_opts): Rename to...
4735 (diagnostic_context::m_n_opts): ...this and make private.
4736 (diagnostic_context::classify_diagnostic): Rename to...
4737 (diagnostic_context::m_classify_diagnostic): ...this and make
4739 (diagnostic_context::classification_history): Rename to...
4740 (diagnostic_context::m_classification_history): ...this and make
4742 (diagnostic_context::n_classification_history): Rename to...
4743 (diagnostic_context::m_n_classification_history): ...this and make
4745 (diagnostic_context::push_list): Rename to...
4746 (diagnostic_context::m_push_list): ...this and make private.
4747 (diagnostic_context::n_push): Rename to...
4748 (diagnostic_context::m_n_push): ...this and make private.
4749 (diagnostic_context::show_cwe): Rename to...
4750 (diagnostic_context::m_show_cwe): ...this and make private.
4751 (diagnostic_context::show_rules): Rename to...
4752 (diagnostic_context::m_show_rules): ...this and make private.
4753 (diagnostic_context::path_format): Rename to...
4754 (diagnostic_context::m_path_format): ...this and make private.
4755 (diagnostic_context::show_path_depths): Rename to...
4756 (diagnostic_context::m_show_path_depths): ...this and make
4758 (diagnostic_context::show_option_requested): Rename to...
4759 (diagnostic_context::m_show_option_requested): ...this and make
4761 (diagnostic_context::abort_on_error): Rename to...
4762 (diagnostic_context::m_abort_on_error): ...this.
4763 (diagnostic_context::show_column): Rename to...
4764 (diagnostic_context::m_show_column): ...this.
4765 (diagnostic_context::pedantic_errors): Rename to...
4766 (diagnostic_context::m_pedantic_errors): ...this.
4767 (diagnostic_context::permissive): Rename to...
4768 (diagnostic_context::m_permissive): ...this.
4769 (diagnostic_context::opt_permissive): Rename to...
4770 (diagnostic_context::m_opt_permissive): ...this.
4771 (diagnostic_context::fatal_errors): Rename to...
4772 (diagnostic_context::m_fatal_errors): ...this.
4773 (diagnostic_context::dc_inhibit_warnings): Rename to...
4774 (diagnostic_context::m_inhibit_warnings): ...this.
4775 (diagnostic_context::dc_warn_system_headers): Rename to...
4776 (diagnostic_context::m_warn_system_headers): ...this.
4777 (diagnostic_context::max_errors): Rename to...
4778 (diagnostic_context::m_max_errors): ...this and make private.
4779 (diagnostic_context::internal_error): Rename to...
4780 (diagnostic_context::m_internal_error): ...this.
4781 (diagnostic_context::option_enabled): Rename to...
4782 (diagnostic_context::m_option_enabled): ...this.
4783 (diagnostic_context::option_state): Rename to...
4784 (diagnostic_context::m_option_state): ...this.
4785 (diagnostic_context::option_name): Rename to...
4786 (diagnostic_context::m_option_name): ...this.
4787 (diagnostic_context::get_option_url): Rename to...
4788 (diagnostic_context::m_get_option_url): ...this.
4789 (diagnostic_context::print_path): Rename to...
4790 (diagnostic_context::m_print_path): ...this.
4791 (diagnostic_context::make_json_for_path): Rename to...
4792 (diagnostic_context::m_make_json_for_path): ...this.
4793 (diagnostic_context::x_data): Rename to...
4794 (diagnostic_context::m_client_aux_data): ...this.
4795 (diagnostic_context::last_location): Rename to...
4796 (diagnostic_context::m_last_location): ...this.
4797 (diagnostic_context::last_module): Rename to...
4798 (diagnostic_context::m_last_module): ...this and make private.
4799 (diagnostic_context::lock): Rename to...
4800 (diagnostic_context::m_lock): ...this and make private.
4801 (diagnostic_context::lang_mask): Rename to...
4802 (diagnostic_context::m_lang_mask): ...this.
4803 (diagnostic_context::inhibit_notes_p): Rename to...
4804 (diagnostic_context::m_inhibit_notes_p): ...this.
4805 (diagnostic_context::report_bug): Rename to...
4806 (diagnostic_context::m_report_bug): ...this and make private.
4807 (diagnostic_context::extra_output_kind): Rename to...
4808 (diagnostic_context::m_extra_output_kind): ...this and make
4810 (diagnostic_context::column_unit): Rename to...
4811 (diagnostic_context::m_column_unit): ...this and make private.
4812 (diagnostic_context::column_origin): Rename to...
4813 (diagnostic_context::m_column_origin): ...this and make private.
4814 (diagnostic_context::tabstop): Rename to...
4815 (diagnostic_context::m_tabstop): ...this and make private.
4816 (diagnostic_context::escape_format): Rename to...
4817 (diagnostic_context::m_escape_format): ...this and make private.
4818 (diagnostic_context::edit_context_ptr): Rename to...
4819 (diagnostic_context::m_edit_context_ptr): ...this and make
4821 (diagnostic_context::set_locations_cb): Rename to...
4822 (diagnostic_context::m_set_locations_cb): ...this and make
4824 (diagnostic_context::ice_handler_cb): Rename to...
4825 (diagnostic_context::m_ice_handler_cb): ...this and make private.
4826 (diagnostic_context::includes_seen): Rename to...
4827 (diagnostic_context::m_includes_seen): ...this and make private.
4828 (diagnostic_inhibit_notes): Update for field renaming.
4829 (diagnostic_context_auxiliary_data): Likewise.
4830 (diagnostic_abort_on_error): Convert from macro to inline function
4831 and update for field renaming.
4832 (diagnostic_kind_count): Convert from macro to inline function and
4833 use diagnostic_count accessor.
4834 (diagnostic_report_warnings_p): Update for field renaming.
4835 (diagnostic_initialize): Convert decl to inline function calling
4836 into diagnostic_context.
4837 (diagnostic_color_init): Likewise.
4838 (diagnostic_urls_init): Likewise.
4839 (diagnostic_urls_init): Likewise.
4840 (diagnostic_finish): Likewise.
4841 (diagnostic_report_current_module): Likewise.
4842 (diagnostic_show_any_path): Delete decl.
4843 (diagnostic_initialize_input_context): Convert decl to inline
4844 function calling into diagnostic_context.
4845 (diagnostic_classify_diagnostic): Likewise.
4846 (diagnostic_push_diagnostics): Likewise.
4847 (diagnostic_pop_diagnostics): Likewise.
4848 (diagnostic_report_diagnostic): Likewise.
4849 (diagnostic_action_after_output): Likewise.
4850 (diagnostic_check_max_errors): Likewise.
4851 (diagnostic_file_cache_fini): Delete decl.
4852 (diagnostic_converted_column): Delete decl.
4853 (warning_enabled_at): Convert decl to inline function calling into
4855 (option_unspecified_p): New.
4856 (diagnostic_emit_diagram): Delete decl.
4857 * gcc.cc: Remove include of "diagnostic-text-art.h".
4858 Update for changes to diagnostic_context.
4859 * input.cc (diagnostic_file_cache_init): Move implementation
4861 (diagnostic_context::file_cache_init): ...this new member
4863 (diagnostic_file_cache_fini): Delete.
4864 (diagnostics_file_cache_forcibly_evict_file): Update for
4865 m_file_cache becoming private.
4866 (location_get_source_line): Likewise.
4867 (get_source_file_content): Likewise.
4868 (location_missing_trailing_newline): Likewise.
4869 * input.h (diagnostics_file_cache_fini): Delete.
4870 * langhooks.cc: Update for changes to diagnostic_context.
4871 * lto-wrapper.cc: Likewise.
4872 * opts.cc: Remove include of "diagnostic-text-art.h".
4873 Update for changes to diagnostic_context.
4874 * selftest-diagnostic.cc: Update for changes to
4876 * toplev.cc: Likewise.
4877 * tree-diagnostic-path.cc: Likewise.
4878 * tree-diagnostic.cc: Likewise.
4880 2023-11-03 Martin Uecker <uecker@tugraz.at>
4883 * gimple-ssa-warn-access.cc
4884 (pass_waccess::maybe_check_access_sizes): For VLA bounds
4885 in parameters, only warn about null pointers with 'static'.
4887 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
4889 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
4890 calls to use masked simdclones.
4892 2023-11-03 David Malcolm <dmalcolm@redhat.com>
4894 * diagnostic.cc (diagnostic_initialize): Update for consolidation
4895 of group-based fields.
4896 (diagnostic_report_diagnostic): Likewise.
4897 (diagnostic_context::begin_group): New, based on body of
4898 auto_diagnostic_group's ctor.
4899 (diagnostic_context::end_group): New, based on body of
4900 auto_diagnostic_group's dtor.
4901 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
4903 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
4905 * diagnostic.h (diagnostic_context::begin_group): New decl.
4906 (diagnostic_context::end_group): New decl.
4907 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
4908 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
4910 (diagnostic_context::diagnostic_group_emission_count): Rename
4912 (diagnostic_context::m_diagnostic_groups::m_emission_count):
4915 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
4917 PR tree-optimization/111766
4918 * range-op.cc (operator_equal::fold_range): Check constants
4919 against the bitmask.
4920 (operator_not_equal::fold_range): Ditto.
4921 * value-range.h (irange_bitmask::member_p): New.
4923 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
4925 * value-range.cc (irange_bitmask::adjust_range): New.
4926 (irange::intersect_bitmask): Call adjust_range.
4927 * value-range.h (irange_bitmask::adjust_range): New prototype.
4929 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
4931 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
4933 (ix86_memory_address_reg_class): ... this. Generalize address
4934 register class handling to allow multiple address register classes.
4935 Return maximal class for unrecognized instructions. Improve comments.
4936 (ix86_insn_base_reg_class): Rewrite to handle
4937 multiple address register classes.
4938 (ix86_regno_ok_for_insn_base_p): Ditto.
4939 (ix86_insn_index_reg_class): Ditto.
4940 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
4941 and substitute its values with "0" -> "gpr16", "1" -> "*".
4942 (addr): New attribute to limit allowed address register set.
4944 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
4945 and substitute its values with "0" -> "gpr16", "1" -> "*".
4946 * config/i386/sse.md: Ditto.
4948 2023-11-03 Richard Biener <rguenther@suse.de>
4950 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
4953 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
4955 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
4956 (adddi3): Change define_expand to generate a *adddi3.
4957 (*adddi3): New define_insn_and_split to lower DImode additions
4958 during the split1 pass (after combine and before reload).
4959 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
4960 for DImode left shifts by a single bit.
4961 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
4962 left shifts by one bit to an *adddi3.
4964 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
4966 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
4967 can_create_pseudo_p condition.
4969 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4971 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
4972 * tree-vect-stmts.cc (vectorizable_load): Ditto.
4974 2023-11-03 Richard Biener <rguenther@suse.de>
4976 PR tree-optimization/112366
4977 * tree-vect-loop.cc (vectorizable_live_operation): Remove
4980 2023-11-03 Richard Biener <rguenther@suse.de>
4982 PR tree-optimization/112310
4983 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
4984 of expressions, validate dependences are contained within
4985 the hoistable set before hoisting.
4987 2023-11-03 Pan Li <pan2.li@intel.com>
4989 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
4990 (lround<mode><v_i_l_ll_convert>2): Ditto.
4991 (lceil<mode><v_i_l_ll_convert>2): Ditto.
4992 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
4993 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
4995 (lround<mode><v_f2si_convert>2): Ditto.
4996 (lceil<mode><v_f2si_convert>2): Ditto.
4997 (lfloor<mode><v_f2si_convert>2): Ditto.
4998 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
5000 (lround<mode><v_f2di_convert>2): Ditto.
5001 (lceil<mode><v_f2di_convert>2): Ditto.
5002 (lfloor<mode><v_f2di_convert>2): Ditto.
5003 * config/riscv/vector-iterators.md: Renew iterators for both
5006 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5009 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
5010 (simplify_replace_vlmax_avl): Ditto.
5011 (pass_avlprop::execute): Add immediate AVL simplification.
5012 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
5013 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
5015 (emit_vlmax_insn): Adapt for new interface name.
5016 * config/riscv/vector.md (mode_idx): New attribute.
5018 2023-11-03 Pan Li <pan2.li@intel.com>
5021 2023-11-02 Pan Li <pan2.li@intel.com>
5023 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
5024 (lround<mode><v_i_l_ll_convert>2): Ditto.
5025 (lceil<mode><v_i_l_ll_convert>2): Ditto.
5026 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
5027 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
5029 (lround<mode><v_f2si_convert>2): Ditto.
5030 (lceil<mode><v_f2si_convert>2): Ditto.
5031 (lfloor<mode><v_f2si_convert>2): Ditto.
5032 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
5034 (lround<mode><v_f2di_convert>2): Ditto.
5035 (lceil<mode><v_f2di_convert>2): Ditto.
5036 (lfloor<mode><v_f2di_convert>2): Ditto.
5037 * config/riscv/vector-iterators.md: Renew iterators for both
5040 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
5042 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
5044 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
5046 * config/h8300/combiner.md: Add new patterns for single bit
5049 2023-11-02 Pan Li <pan2.li@intel.com>
5051 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
5052 (lround<mode><v_i_l_ll_convert>2): Ditto.
5053 (lceil<mode><v_i_l_ll_convert>2): Ditto.
5054 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
5055 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
5057 (lround<mode><v_f2si_convert>2): Ditto.
5058 (lceil<mode><v_f2si_convert>2): Ditto.
5059 (lfloor<mode><v_f2si_convert>2): Ditto.
5060 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
5062 (lround<mode><v_f2di_convert>2): Ditto.
5063 (lceil<mode><v_f2di_convert>2): Ditto.
5064 (lfloor<mode><v_f2di_convert>2): Ditto.
5065 * config/riscv/vector-iterators.md: Renew iterators for both
5068 2023-11-02 Sam James <sam@gentoo.org>
5070 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
5071 as this has become the standard term for what we're doing here.
5073 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5075 * config/riscv/riscv-avlprop.cc
5076 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
5077 non-real insn AVL propation.
5079 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
5081 PR middle-end/111401
5082 * internal-fn.cc (internal_fn_else_index): New function.
5083 * internal-fn.h (internal_fn_else_index): Define.
5084 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
5086 (predicate_scalar_phi): Add whitespace.
5087 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
5088 (neutral_op_for_reduction): Return -0 for PLUS.
5089 (check_reduction_path): Don't count else operand in COND_OP.
5090 (vect_is_simple_reduction): Ditto.
5091 (vect_create_epilog_for_reduction): Fix whitespace.
5092 (vectorize_fold_left_reduction): Add COND_OP handling.
5093 (vectorizable_reduction): Don't count else operand in COND_OP.
5094 (vect_transform_reduction): Add COND_OP handling.
5095 * tree-vectorizer.h (neutral_op_for_reduction): Add default
5098 2023-11-02 Richard Biener <rguenther@suse.de>
5100 PR tree-optimization/112320
5101 * gimple-fold.h (rewrite_to_defined_overflow): New overload
5102 for in-place operation.
5103 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
5104 iterator argument to worker, define separate API for
5105 in-place and not in-place operation.
5106 * tree-if-conv.cc (predicate_statements): Simplify.
5107 * tree-scalar-evolution.cc (final_value_replacement_loop):
5109 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
5110 * tree-ssa-reassoc.cc (update_range_test): Likewise.
5112 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
5114 * config/i386/i386.md: Move stack protector patterns
5115 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
5117 2023-11-02 liuhongt <hongtao.liu@intel.com>
5119 * config/i386/mmx.md (cmlav4hf4): New expander.
5120 (cmla_conjv4hf4): Ditto.
5122 (cmul_conjv4hf3): Ditto.
5124 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5126 * config/riscv/vector.md: Fix redundant codes in attributes.
5128 2023-11-02 xuli <xuli1@eswincomputing.com>
5130 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
5131 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
5132 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
5133 * config/riscv/riscv-vector-builtins.cc: Add arg types.
5135 2023-11-02 Pan Li <pan2.li@intel.com>
5137 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
5138 size check for vectype_out doesn't participating for optab query.
5139 (vectorizable_call): Remove the type size check.
5141 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5144 * config/riscv/vector.md: Add '0'.
5146 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
5149 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
5150 as operands[2] with predicate register_operand must be !MEM_P.
5151 (peephole2): Optimize a mulx followed by a register-to-register
5152 move, to place result in the correct destination if possible.
5154 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
5156 * config/riscv/sync.md: Use riscv_subword_address function to
5157 calculate the address and shift in atomic_test_and_set.
5159 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
5161 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
5162 returned for libcall case.
5164 2023-11-01 Martin Uecker <uecker@tugraz.at>
5167 * doc/invoke.texi: Document -Walloc-size option.
5169 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
5171 * genautomata.cc (write_automata): move endif
5173 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
5175 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
5176 create return array and don't return new type.
5177 (simd_clone_adjust_argument_types): Hoist out code that creates
5178 ipa_param_body_adjustments and don't return them.
5179 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
5180 argument types have been vectorized, create adjustments and return array
5182 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
5183 argument types have been vectorized.
5185 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
5188 * config/i386/i386.md (stack_protexct_set_2 peephole2):
5189 Use general_gr_operand as operand 4 predicate.
5191 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
5193 * config/i386/i386.md (stack_protect_set): Explicitly
5194 generate scratch register in word mode.
5195 (@stack_protect_set_1_<mode>): Rename to ...
5196 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
5197 Use SWI48 mode iterator to match scratch register.
5198 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
5199 iterators to match peephole sequence. Use general_operand
5200 predicate for operand 4. Allow different operand 2 and operand 3
5201 registers and use peep2_reg_dead_p to ensure new scratch
5202 register is dead before peephole seqeunce. Use peep2_reg_dead_p
5203 to ensure old scratch register is dead after peephole sequence.
5204 (*stack_protect_set_2_<mode>): Rename to ...
5205 (*stack_protect_set_2_<mode>_si): .. this.
5206 (*stack_protect_set_3): Rename to ...
5207 (*stack_protect_set_2_<mode>_di): ... this.
5208 Use PTR mode iterator to match stack protector memory move.
5209 Use earlyclobber for all alternatives of operand 1.
5210 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
5211 iterators to match peephole sequence. Use general_operand
5212 predicate for operand 4. Allow different operand 2 and operand 3
5213 registers and use peep2_reg_dead_p to ensure new scratch
5214 register is dead before peephole seqeunce. Use peep2_reg_dead_p
5215 to ensure old scratch register is dead after peephole sequence.
5217 2023-11-01 xuli <xuli1@eswincomputing.com>
5219 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
5220 intrinsics for tuple types.
5221 * config/riscv/riscv-vector-builtins.cc: Ditto.
5222 * config/riscv/vector.md (@vundefined<mode>): Ditto.
5224 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5226 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
5228 2023-10-31 David Malcolm <dmalcolm@redhat.com>
5230 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
5232 2023-10-31 David Malcolm <dmalcolm@redhat.com>
5234 * input.cc (dump_location_info): Update for removal of
5235 MACRO_MAP_EXPANSION_POINT_LOCATION.
5236 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
5239 2023-10-31 David Malcolm <dmalcolm@redhat.com>
5241 * opts.cc (get_option_url): Update comment; the requirement to
5242 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
5243 r10-8065-ge33a1eae25b8a8.
5245 2023-10-31 David Malcolm <dmalcolm@redhat.com>
5247 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
5248 m_skipping_null_url.
5249 (pp_begin_url): Handle URL being null.
5250 (pp_end_url): Likewise.
5251 (selftest::test_null_urls): New.
5252 (selftest::pretty_print_cc_tests): Call it.
5253 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
5255 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5257 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
5258 (vect_build_slp_tree_1): Ditto.
5259 (vect_build_slp_tree_2): Ditto.
5261 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
5263 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
5264 * config/bpf/bpf-protos.h: Added prototype for new pass.
5265 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
5266 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
5268 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
5270 (is_attr_preserve_access): Improved check.
5271 (core_field_info): Make use of root_for_core_field_info
5273 (process_field_expr): Adapted to new functions.
5274 (pack_type): Small improvement.
5275 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
5276 (bpf_init_core_builtins): Changed to new function names.
5277 (construct_builtin_core_reloc): Improved implementation.
5278 (bpf_resolve_overloaded_core_builtin): Changed how
5279 __builtin_preserve_access_index is converted.
5280 (compute_field_expr): Corrected implementation. Added
5281 access_node argument.
5282 (bpf_core_get_index): Added valid argument.
5283 (root_for_core_field_info, pack_field_expr)
5284 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
5285 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
5286 (core_access_clean, core_is_access_index, core_mark_as_access_index)
5287 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
5288 (make_pass_lower_bpf_core): Added functions.
5289 (pass_data_lower_bpf_core): New pass struct.
5290 (pass_lower_bpf_core): New gimple_opt_pass class.
5291 (pack_field_expr_for_preserve_field)
5292 (bpf_replace_core_move_operands): Removed function.
5293 (bpf_enum_value_kind): Added GTY(()).
5294 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
5295 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
5296 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
5298 2023-10-31 Neal Frager <neal.frager@amd.com>
5300 * config/microblaze/microblaze.cc: Fix mcpu version check.
5302 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
5304 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
5305 TARGET_ATOMIC constraint
5306 (atomic_store_rvwmo<mode>): Ditto.
5307 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
5308 (atomic_store_ztso<mode>): Ditto.
5309 * config/riscv/sync.md (atomic_load<mode>): Ditto.
5310 (atomic_store<mode>): Ditto.
5312 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
5314 * config/riscv/riscv.cc (riscv_index_reg_class):
5315 Return GR_REGS for XTheadFMemIdx.
5316 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
5317 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
5318 * config/riscv/thead.cc (is_fmemidx_mode): New function.
5319 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
5320 (th_fmemidx_output_index): New function.
5321 (th_output_move): Add support for XTheadFMemIdx.
5322 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
5323 (TH_M_NOEXTF): Likewise.
5324 (*th_fmemidx_movsf_hardfloat): New INSN.
5325 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
5326 (*th_fmemidx_I_a): Likewise.
5327 (*th_fmemidx_I_c): Likewise.
5328 (*th_fmemidx_US_a): Likewise.
5329 (*th_fmemidx_US_c): Likewise.
5330 (*th_fmemidx_UZ_a): Likewise.
5331 (*th_fmemidx_UZ_c): Likewise.
5333 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
5335 * config/riscv/constraints.md (th_m_mia): New constraint.
5336 (th_m_mib): Likewise.
5337 (th_m_mir): Likewise.
5338 (th_m_miu): Likewise.
5339 * config/riscv/riscv-protos.h (enum riscv_address_type):
5340 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
5341 and ADDRESS_REG_WB and their documentation.
5342 (struct riscv_address_info): Add new field 'shift' and
5343 document the field usage for the new address types.
5344 (riscv_valid_base_register_p): New prototype.
5345 (th_memidx_legitimate_modify_p): Likewise.
5346 (th_memidx_legitimate_index_p): Likewise.
5347 (th_classify_address): Likewise.
5348 (th_output_move): Likewise.
5349 (th_print_operand_address): Likewise.
5350 * config/riscv/riscv.cc (riscv_index_reg_class):
5351 Return GR_REGS for XTheadMemIdx.
5352 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
5353 (riscv_classify_address): Call th_classify_address() on top.
5354 (riscv_output_move): Call th_output_move() on top.
5355 (riscv_print_operand_address): Call th_print_operand_address()
5357 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
5358 (HAVE_PRE_MODIFY_DISP): Likewise.
5359 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
5361 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
5362 create INSN with same name and disable it for XTheadMemIdx.
5363 (extendsidi2): Likewise.
5364 (*extendsidi2_internal): Disable for XTheadMemIdx.
5365 * config/riscv/thead.cc (valid_signed_immediate): New helper
5367 (th_memidx_classify_address_modify): New function.
5368 (th_memidx_legitimate_modify_p): Likewise.
5369 (th_memidx_output_modify): Likewise.
5370 (is_memidx_mode): Likewise.
5371 (th_memidx_classify_address_index): Likewise.
5372 (th_memidx_legitimate_index_p): Likewise.
5373 (th_memidx_output_index): Likewise.
5374 (th_classify_address): Likewise.
5375 (th_output_move): Likewise.
5376 (th_print_operand_address): Likewise.
5377 * config/riscv/thead.md (*th_memidx_operand): New splitter.
5378 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
5379 (*th_memidx_extendsidi2): Likewise.
5380 (*th_memidx_zero_extendsidi2): Likewise.
5381 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
5382 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
5383 (*th_memidx_bb_zero_extendsidi2): Likewise.
5384 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
5385 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
5386 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
5387 (TH_M_ANYI): New mode iterator.
5388 (TH_M_NOEXTI): Likewise.
5389 (*th_memidx_I_a): New combiner optimization.
5390 (*th_memidx_I_b): Likewise.
5391 (*th_memidx_I_c): Likewise.
5392 (*th_memidx_US_a): Likewise.
5393 (*th_memidx_US_b): Likewise.
5394 (*th_memidx_US_c): Likewise.
5395 (*th_memidx_UZ_a): Likewise.
5396 (*th_memidx_UZ_b): Likewise.
5397 (*th_memidx_UZ_c): Likewise.
5399 2023-10-31 Carl Love <cel@us.ibm.com>
5401 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
5402 documentation for the builti-ins.
5404 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
5406 PR rtl-optimization/111971
5407 * lra-constraints.cc: (process_alt_operands): Don't check start
5408 hard regs for regs originated from register variables.
5410 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
5412 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
5414 (cond_<ieee_fmaxmin_op><mode>): Ditto.
5415 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
5416 (reduc_fmax_scal_<mode>): Ditto.
5417 (reduc_fmin_scal_<mode>): Ditto.
5418 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
5419 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
5420 (UNSPEC_VFMIN): Ditto.
5421 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
5422 UNSPEC insn patterns.
5423 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
5425 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
5429 * Makefile.in: Handle split insn-emit.cc.
5430 * configure: Regenerate.
5431 * configure.ac: Add --with-insnemit-partitions.
5432 * genemit.cc (output_peephole2_scratches): Print to file instead
5434 (print_code): Ditto.
5435 (gen_rtx_scratch): Ditto.
5437 (gen_emit_seq): Ditto.
5438 (emit_c_code): Ditto.
5440 (gen_expand): Ditto.
5442 (output_add_clobbers): Ditto.
5443 (output_added_clobbers_hard_reg_p): Ditto.
5444 (print_overload_arguments): Ditto.
5445 (print_overload_test): Ditto.
5446 (handle_overloaded_code_for): Ditto.
5447 (handle_overloaded_gen): Ditto.
5448 (print_header): New function.
5449 (handle_arg): New function.
5450 (main): Split output into 10 files.
5451 * gensupport.cc (count_patterns): New function.
5452 * gensupport.h (count_patterns): Define.
5453 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
5454 * read-md.h (class md_reader): Change definition.
5456 2023-10-31 Alexandre Oliva <oliva@adacore.com>
5458 PR tree-optimization/111943
5459 * gimple-harden-control-flow.cc: Adjust copyright year.
5460 (rt_bb_visited): Add vfalse and vtrue data members.
5461 Zero-initialize them in the ctor.
5462 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
5463 abnormal edges, insert initializers for vfalse and vtrue on
5464 entry, and insert the check sequence guarded by a conditional
5467 2023-10-31 Richard Biener <rguenther@suse.de>
5469 PR tree-optimization/112305
5470 * tree-scalar-evolution.h (expression_expensive): Adjust.
5471 * tree-scalar-evolution.cc (expression_expensive): Record
5472 when we see a COND_EXPR.
5473 (final_value_replacement_loop): When the replacement contains
5474 a COND_EXPR, rewrite it to defined overflow.
5475 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
5477 2023-10-31 Xi Ruoyao <xry111@xry111.site>
5480 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
5483 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
5485 * gimple-match.h (gimple_match_op::gimple_match_op):
5486 Add interfaces for more arguments.
5487 (gimple_match_op::set_op): Add interfaces for more arguments.
5488 * match.pd: Add support of combining cond_len_op + vec_cond
5490 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
5492 * config/i386/avx512cdintrin.h (target): Push evex512 for
5494 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
5496 * config/i386/i386-builtin.def (BDESC): Do not check evex512
5497 for builtins not needed.
5499 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
5501 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
5502 Change to define_expand.
5504 2023-10-31 liuhongt <hongtao.liu@intel.com>
5507 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
5508 define_split to define_insn_and_split to handle
5509 immediate_operand for comparison.
5510 (*mmx_pblendvb_v8qi_2): Ditto.
5511 (*mmx_pblendvb_<mode>_1): Ditto.
5512 (*mmx_pblendvb_v4qi_2): Ditto.
5513 (<code><mode>3): Remove define_split after it.
5514 (<code>v8qi3): Ditto.
5515 (<code><mode>3): Ditto.
5516 (<ode>v2hi3): Ditto.
5518 2023-10-31 Andrew Pinski <pinskia@gmail.com>
5520 * match.pd (`a == 1 ? b : a OP b`): New pattern.
5521 (`a == -1 ? b : a & b`): New pattern.
5523 2023-10-31 Andrew Pinski <pinskia@gmail.com>
5525 * match.pd: (`a == 0 ? b : b + a`,
5526 `a == 0 ? b : b - a`): New patterns.
5528 2023-10-31 Neal Frager <neal.frager@amd.com>
5530 * config/microblaze/microblaze.cc: Fix mcpu version check.
5532 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
5534 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
5535 * common/config/i386/i386-common.cc: Add yongfeng.
5536 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
5537 Add ZHAOXIN_FAM7H_YONGFENG.
5538 * config.gcc: Add yongfeng.
5539 * config/i386/driver-i386.cc (host_detect_local_cpu):
5540 Let -march=native recognize yongfeng processors.
5541 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
5542 * config/i386/i386-options.cc (m_YONGFENG): New definition.
5544 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
5545 * config/i386/i386.md: Add yongfeng.
5546 * config/i386/lujiazui.md: Fix typo.
5547 * config/i386/x86-tune-costs.h (struct processor_costs):
5549 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
5550 (ix86_adjust_cost): Ditto.
5551 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
5552 m_LUJIAZUI with m_ZHAOXIN.
5553 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
5554 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
5555 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
5556 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
5557 (X86_TUNE_MOVX): Ditto.
5558 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
5559 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
5560 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
5561 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
5562 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
5563 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
5564 (X86_TUNE_USE_LEAVE): Ditto.
5565 (X86_TUNE_PUSH_MEMORY): Ditto.
5566 (X86_TUNE_LCP_STALL): Ditto.
5567 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
5568 (X86_TUNE_OPT_AGU): Ditto.
5569 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
5570 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
5571 (X86_TUNE_USE_SAHF): Ditto.
5572 (X86_TUNE_USE_BT): Ditto.
5573 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
5574 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
5575 (X86_TUNE_AVOID_MFENCE): Ditto.
5576 (X86_TUNE_EXPAND_ABS): Ditto.
5577 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
5578 (X86_TUNE_USE_FFREEP): Ditto.
5579 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
5580 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
5581 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
5582 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
5583 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
5584 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
5585 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
5586 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
5587 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
5588 * doc/extend.texi: Add details about yongfeng.
5589 * doc/invoke.texi: Ditto.
5590 * config/i386/yongfeng.md: New file to describe yongfeng processor.
5592 2023-10-30 Martin Jambor <mjambor@suse.cz>
5595 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
5596 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
5597 (update_signature): Mark any any IPA-CP aggregate constants at
5598 positions known to be killed as killed. Move check that there is
5599 clone_info after this pruning.
5600 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
5601 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
5602 (push_agg_values_from_plats): Likewise.
5603 (ipa_push_agg_values_from_jfunc): Likewise.
5604 (estimate_local_effects): Likewise.
5605 (push_agg_values_for_index_from_edge): Likewise.
5606 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
5608 (read_ipcp_transformation_info): Likewise.
5609 (ipcp_get_aggregate_const): Update comment, assert that encountered
5610 record does not have killed flag set.
5611 (ipcp_transform_function): Prune all aggregate constants with killed
5614 2023-10-30 Martin Jambor <mjambor@suse.cz>
5617 * ipa-prop.h (ipcp_transformation): New member function template
5619 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
5620 filter aggreagate constants.
5622 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
5624 PR middle-end/101955
5625 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
5626 to convert sign extract of the least significant bit into an
5627 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
5629 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
5631 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
5632 Provide reasonable values for SHIFTS and ROTATES by constant
5633 bit counts depending upon TARGET_BARREL_SHIFTER.
5634 (arc_insn_cost): Use insn attributes if the instruction is
5635 recognized. Avoid calling get_attr_length for type "multi",
5636 i.e. define_insn_and_split patterns without explicit type.
5637 Fall-back to set_rtx_cost for single_set and pattern_cost
5639 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
5640 (BRANCH_COST): Improve/correct definition.
5641 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
5643 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
5645 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
5646 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
5647 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
5648 (arc_split_rotl): Use swap on TARGET_SWAP.
5649 (arc_split_rotr): Likewise.
5650 * config/arc/arc.md (ANY_ROTATE): New code iterator.
5651 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
5652 swap instruction on TARGET_SWAP.
5653 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
5654 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
5655 (*ashlsi2_cnt16): See above.
5657 2023-10-30 Richard Ball <richard.ball@arm.com>
5659 * config/arm/aout.h: Change to use the Lrtx label.
5660 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
5661 from (!target_pure_code) condition.
5662 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
5663 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
5664 .Lrtx label and remove adr instructions.
5666 (arm_casesi_internal): Use force_reg to generate ldr instructions that
5667 would otherwise be out of range, and change rtl to accommodate force reg.
5668 Additionally remove unnecessary register temp.
5669 (casesi): Remove pure code check for Arm.
5670 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
5671 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
5673 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
5676 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
5677 xor to an equality and fix comment indentation.
5679 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5681 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
5682 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
5683 * config/riscv/vector.md: Ditto.
5685 2023-10-30 liuhongt <hongtao.liu@intel.com>
5688 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
5689 512-bit vector with vpcmpeq + kortest.
5690 * config/i386/i386.md (cbranchxi4): New expander.
5691 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
5694 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
5697 * expr.cc (qi_vector_mode_supported_p): Rename to...
5698 (by_pieces_mode_supported_p): ...this, and extends it to do
5699 the checking for both scalar and vector mode.
5700 (widest_fixed_size_mode_for_size): Call
5701 by_pieces_mode_supported_p to examine the mode.
5702 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
5704 2023-10-29 Martin Uecker <uecker@tugraz.at>
5706 PR tree-optimization/109334
5707 * tree-object-size.cc (parm_object_size): Allow size
5708 computation for implicit access attributes.
5710 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
5712 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
5713 260000 (which corresponds to RF-2014.0) to 270000 (which
5714 corresponds to RG-2015.0, the release where salt/saltu opcodes
5717 2023-10-29 Pan Li <pan2.li@intel.com>
5719 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
5720 reference type to prevent copying.
5722 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
5724 PR rtl-optimization/112107
5725 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
5728 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
5731 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
5734 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
5736 * config/gcn/gcn-valu.md
5737 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
5738 condition to silence the warnings.
5739 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
5740 * config/gcn/gcn.md (*movti_insn): Likewise.
5742 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
5744 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
5747 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
5749 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
5750 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
5752 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
5754 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
5755 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
5757 (expand_rawmemchr): Define.
5758 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
5760 (expand_block_move): Move from here...
5761 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
5762 (expand_rawmemchr): Add vectorized expander.
5763 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
5765 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
5767 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
5768 Process reg equivalence invariants.
5770 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
5772 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
5773 i386: Fiy typo in "partial_memory_read_stall" tune option.
5775 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
5777 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
5778 support for CONST_STRING.
5780 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
5783 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
5784 2 take "regiser_operand" and "nonimmediate_operand" respectively.
5785 (<u>mulqihi3): Likewise.
5786 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
5787 matching the %d constraint. Use umul_highpart RTX to represent
5788 the highpart multiplication.
5789 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
5790 predicate, and "a" rather than "0" as operands 0 and 2 have
5792 (define_split): For mul to mulx conversion, use the new
5793 umul_highpart RTX representation.
5794 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
5795 and the constraint %a as operands 0 and 1 have different modes.
5796 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
5798 (define_peephole2): Providing widening multiplication variants
5799 of the peephole2s that tweak highpart multiplication register
5802 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
5804 PR preprocessor/87299
5805 * toplev.cc (no_backend): New static global.
5806 (finalize): Remove argument no_backend, which is now a
5808 (process_options): Likewise.
5809 (do_compile): Likewise.
5810 (target_reinit): Don't do anything in preprocess-only mode.
5811 (toplev::main): Adapt to no_backend change.
5812 (toplev::finalize): Likewise.
5814 2023-10-27 Andrew Pinski <apinski@marvell.com>
5816 PR tree-optimization/101590
5817 PR tree-optimization/94884
5818 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
5820 2023-10-27 liuhongt <hongtao.liu@intel.com>
5823 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
5824 V2HF/V2BF/V4HF/V4BFmode.
5825 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
5826 data_mode is V4HF/V2HFmode.
5827 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
5828 (vcond_mask_<mode>v4hi): Ditto.
5829 (vcond_mask_<mode>qi): Ditto.
5830 (vec_cmpv2hfqi): Ditto.
5831 (vcond_mask_<mode>v2hi): Ditto.
5832 (mmx_plendvb_<mode>): Add 2 combine splitters after the
5834 (mmx_pblendvb_v8qi): Ditto.
5835 (<code>v2hi3): Add a combine splitter after the pattern.
5836 (<code><mode>3): Ditto.
5837 (<code>v8qi3): Ditto.
5838 (<code><mode>3): Ditto.
5839 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
5840 (vcond<sseintvecmodelower><mode>): .. this into ..
5841 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
5842 and extend to V8BF/V16BF/V32BFmode.
5844 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5846 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
5847 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
5848 (autovectorize_vector_modes): Ditto.
5849 (can_find_related_mode_p): Ditto.
5851 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5855 * config.gcc: Add AVL propagation pass.
5856 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
5857 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
5858 * config/riscv/t-riscv: Ditto.
5859 * config/riscv/riscv-avlprop.cc: New file.
5861 2023-10-26 David Malcolm <dmalcolm@redhat.com>
5863 * doc/extend.texi (Common Function Attributes): Add
5864 null_terminated_string_arg.
5866 2023-10-26 Andrew Pinski <pinskia@gmail.com>
5868 PR tree-optimization/111957
5869 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
5871 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
5873 * range-op-float.cc (range_operator::fold_range): Delete unused
5876 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
5878 * range-op-float.cc (range_operator::fold_range): Remove
5880 (range_operator::rv_fold): Remove unneeded arguments.
5881 (operator_plus::rv_fold): Same.
5882 (operator_minus::rv_fold): Same.
5883 (operator_mult::rv_fold): Same.
5884 (operator_div::rv_fold): Same.
5885 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
5889 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
5891 * range-op-float.cc (range_operator::fold_range): Pass frange
5892 argument to rv_fold.
5893 (range_operator::rv_fold): Add frange argument.
5894 (operator_plus::rv_fold): Same.
5895 (operator_minus::rv_fold): Same.
5896 (operator_mult::rv_fold): Same.
5897 (operator_div::rv_fold): Same.
5898 * range-op-mixed.h: Add frange argument to rv_fold methods.
5901 2023-10-26 Richard Ball <richard.ball@arm.com>
5903 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
5904 for different machine modes for arm.
5905 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
5906 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
5907 ASM_OUTPUT_ADDR_DIFF_ELT.
5908 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
5910 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
5912 * config/arm/arm.cc (arm_output_casesi): New function.
5913 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
5915 for arm to use new function arm_output_casesi.
5917 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
5920 (darwin_label_is_anonymous_local_objc_name): Make metadata names
5921 linker-visibile for GNU objective C.
5923 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
5925 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
5927 * ira-costs.cc: Include regset.h.
5928 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
5930 (find_costs_and_classes): Call calculate_equiv_gains and redefine
5931 mem_cost of pseudos with equivs when LRA is used.
5932 * var-tracking.cc: Include ira.h and lra.h.
5933 (vt_initialize): Use lra_eliminate_regs when LRA is used.
5935 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5937 * doc/md.texi: Adapt COND_LEN pseudo code.
5939 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
5940 Richard Biener <rguenther@suse.de>
5942 PR rtl-optimization/91865
5943 * combine.cc (make_compound_operation): Avoid creating a
5944 ZERO_EXTEND of a ZERO_EXTEND.
5946 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
5948 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
5949 (vcond_mask_<mode><mode256_i>): this.
5950 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
5951 (vcond_mask_<mode><mode_i>): this.
5953 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
5955 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
5956 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
5958 * ipa-visibility.cc (function_and_variable_visibility): Change
5959 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
5960 * varasm.cc (output_constant_pool_contents)
5961 [#ifdef ASM_OUTPUT_DEF]:
5962 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
5963 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
5964 'if (!TARGET_SUPPORTS_ALIASES)',
5965 'gcc_checking_assert (seen_error ());'.
5966 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
5967 'if (!TARGET_SUPPORTS_ALIASES)'.
5968 (default_asm_output_anchor):
5969 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
5971 2023-10-26 Alexandre Oliva <oliva@adacore.com>
5973 PR tree-optimization/111520
5974 * gimple-harden-conditionals.cc
5975 (pass_harden_compares::execute): Set EH edge probability and
5976 EH block execution count.
5978 2023-10-26 Alexandre Oliva <oliva@adacore.com>
5980 * tree-eh.h (make_eh_edges): Rename to...
5981 (make_eh_edge): ... this.
5982 * tree-eh.cc: Likewise. Adjust all callers...
5983 * gimple-harden-conditionals.cc: ... here, ...
5984 * gimple-harden-control-flow.cc: ... here, ...
5985 * tree-cfg.cc: ... here, ...
5986 * tree-inline.cc: ... and here.
5988 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
5990 * config/darwin.cc (darwin_override_options): Handle fPIE.
5992 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
5994 * config.gcc: Use -E to to sed to indicate that we are using
5997 2023-10-25 Jason Merrill <jason@redhat.com>
5999 * tree-core.h (struct tree_base): Update address_space comment.
6001 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
6003 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
6004 Add support for immediates using MOV/EOR bitmask.
6006 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
6009 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
6011 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
6012 * config/i386/i386.md: New peephole pattern to narrow test
6013 instructions with immediate operands that test memory locations
6016 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
6018 * value-range.cc (irange::union_append): New.
6019 (irange::union_): Call union_append when appropriate.
6020 * value-range.h (irange::union_append): New prototype.
6022 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
6024 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
6025 (__lasx_xvfrintrne_s): Ditto.
6026 (__lasx_xvfrintrne_d): Ditto.
6027 (__lasx_xvfrintrz_s): Ditto.
6028 (__lasx_xvfrintrz_d): Ditto.
6029 (__lasx_xvfrintrp_s): Ditto.
6030 (__lasx_xvfrintrp_d): Ditto.
6031 (__lasx_xvfrintrm_s): Ditto.
6032 (__lasx_xvfrintrm_d): Ditto.
6033 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
6034 (__lsx_vfrintrne_s): Ditto.
6035 (__lsx_vfrintrne_d): Ditto.
6036 (__lsx_vfrintrz_s): Ditto.
6037 (__lsx_vfrintrz_d): Ditto.
6038 (__lsx_vfrintrp_s): Ditto.
6039 (__lsx_vfrintrp_d): Ditto.
6040 (__lsx_vfrintrm_s): Ditto.
6041 (__lsx_vfrintrm_d): Ditto.
6043 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
6045 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
6046 instruction template corresponding to the __builtin_thread_pointer
6048 * doc/extend.texi:Add the __builtin_thread_pointer function support
6049 description to the documentation.
6051 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6053 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
6054 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
6055 (single_set_info): New functions.
6056 (remove_uses_of_def, accesses_reference_same_resource): Declare.
6057 (insn_clobbers_resources): Likewise.
6058 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
6059 (rtl_ssa::accesses_reference_same_resource): Likewise.
6060 (rtl_ssa::insn_clobbers_resources): Likewise.
6061 * rtl-ssa/movement.h (can_move_insn_p): Declare.
6062 * rtl-ssa/movement.cc: New file.
6064 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6066 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
6067 New member function.
6068 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
6070 (function_info::make_use_available): Avoid false negatives for
6071 queries within an EBB.
6073 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6075 * rtl-ssa/changes.cc: Include sreal.h.
6076 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
6077 scale the cost of each instruction by its execution frequency.
6079 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6081 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
6082 (is_single_dominating_def, remains_available_on_exit): Replace with...
6083 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
6084 (function_info::remains_available_on_exit): ...these new member
6086 (function_info::m_clobbered_by_calls): New member variable.
6087 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
6088 initialize m_clobbered_by_calls.
6089 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
6090 m_clobbered_by_calls for each call-clobber note.
6091 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
6092 New function. Check for call clobbers.
6093 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
6096 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6098 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
6100 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
6101 (bb_walker::bb_walker): Use it, moving the computation of the
6103 (function_info::process_all_blocks): ...here.
6104 (function_info::place_phis): Add dominance frontiers for the
6107 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6109 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
6110 New member function.
6111 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
6113 (function_info::change_insns): Use it.
6115 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6117 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
6118 If a change describes a set of memory, ensure that that set
6119 is kept, regardless of the insn pattern.
6121 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6123 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
6124 call to add_reg_unused_notes and instead...
6125 (function_info::change_insns): ...use a separate loop here.
6127 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
6129 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
6130 global registers to be live on exit. Handle any block with zero
6131 successors like an exit block.
6133 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
6135 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
6136 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
6137 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
6138 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
6140 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
6142 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
6144 * tree-pretty-print.cc (dump_omp_clause): Adjust.
6145 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
6148 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6150 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
6151 (tail_agnostic_p): Ditto.
6152 (validate_change_or_fail): Ditto.
6153 (nonvlmax_avl_type_p): Ditto.
6154 (vlmax_avl_p): Ditto.
6156 (enum vlmul_type): Ditto.
6157 (count_regno_occurrences): Ditto.
6158 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
6159 (get_default_ta): Ditto.
6160 (tail_agnostic_p): Ditto.
6161 (validate_change_or_fail): Ditto.
6162 (nonvlmax_avl_type_p): Ditto.
6163 (vlmax_avl_p): Ditto.
6165 (enum vlmul_type): Ditto.
6167 (count_regno_occurrences): Ditto.
6168 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
6172 (get_default_ta): Ditto.
6173 (tail_agnostic_p): Ditto.
6174 (count_regno_occurrences): Ditto.
6175 (validate_change_or_fail): Ditto.
6177 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
6179 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
6180 (gimplify_adjust_omp_clauses): Likewise.
6181 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
6182 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
6183 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
6184 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
6186 (convert_local_omp_clauses): Likewise.
6187 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
6188 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
6189 (omp_clause_code_name): Likewise.
6190 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
6192 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6194 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
6195 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
6196 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
6197 * config/riscv/vector.md: Change avl_type into avl_type_idx.
6199 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6201 * recog.cc (constrain_operands): Remove UNARY_P handling.
6202 * reload.cc (find_reloads): Likewise.
6204 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
6206 * gcov-io.h: Fix record length encoding in comment.
6208 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
6210 * config/i386/i386-features.cc (compute_convert_gain): Provide
6211 more accurate values (sizes) for inter-unit moves with -Os.
6213 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
6214 Claudiu Zissulescu <claziss@gmail.com>
6216 * config/arc/arc-protos.h (output_shift): Rename to...
6217 (output_shift_loop): Tweak API to take an explicit rtx_code.
6218 (arc_split_ashl): Prototype new function here.
6219 (arc_split_ashr): Likewise.
6220 (arc_split_lshr): Likewise.
6221 (arc_split_rotl): Likewise.
6222 (arc_split_rotr): Likewise.
6223 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
6224 (output_shift_loop): New function replacing output_shift to output
6225 a zero overheap loop for SImode shifts and rotates on ARC targets
6226 without barrel shifter (i.e. no hardware support for these insns).
6227 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
6228 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
6229 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
6230 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
6231 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
6232 (arc_print_operand): Correct whitespace.
6233 (arc_rtx_costs): Likewise.
6234 (hwloop_optimize): Likewise.
6235 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
6236 (define_code_attr insn): New code attribute to map to pattern name.
6237 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
6238 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
6239 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
6240 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
6241 We now call arc_split_<insn> in arc.cc to implement each split.
6242 (shift_si3): Delete define_insn, all shifts/rotates are now split.
6243 (shift_si3_loop): Rename to...
6244 (<insn>si3_loop): define_insn to handle loop implementations of
6245 SImode shifts and rotates, calling ouput_shift_loop for template.
6246 (rotrsi3): Rename to...
6247 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
6248 (*rotlsi3): New define_insn_and_split to transform left rotates
6249 into right rotates before reload.
6250 (rotlsi3_cnt1): New define_insn_and_split to implement a left
6251 rotate by one bit using an add.f followed by an adc.
6252 * config/arc/predicates.md (shiftr4_operator): Delete.
6254 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
6256 * config/arc/arc.md (mulsi3_700): Update pattern.
6257 (mulsi3_v2): Likewise.
6258 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
6260 2023-10-24 Andrew Pinski <pinskia@gmail.com>
6262 PR tree-optimization/104376
6263 PR tree-optimization/101541
6264 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
6265 Allow nop conversions even if it is defined by a statement
6266 inside the conditional.
6268 2023-10-24 Andrew Pinski <pinskia@gmail.com>
6270 PR tree-optimization/111913
6271 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
6274 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6276 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
6277 whether the requested phi already exists.
6279 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6281 * rtl-ssa.h: Include cfgbuild.h.
6282 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
6283 more comprehensive control_flow_insn_p.
6285 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6287 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
6288 whether an insn has been replaced by a note.
6290 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6292 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
6295 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6297 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
6298 destination to be wider than the sources. Take the mode from the
6300 (ix86_expand_sse_extend): Pass the destination directly to
6301 ix86_split_mmx_punpck, rather than using a fresh register that
6304 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6306 * config/i386/predicates.md (aeswidekl_operation): Protect
6307 REGNO check with REG_P.
6309 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6311 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
6312 (TARGET_INSN_COST): Define.
6314 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
6316 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
6319 2023-10-24 xuli <xuli1@eswincomputing.com>
6322 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
6324 2023-10-24 Mark Harmstone <mark@harmstone.com>
6326 * opts.cc (debug_type_names): Remove stabs and xcoff.
6327 (df_set_names): Adjust.
6329 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6332 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
6334 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
6336 PR preprocessor/36887
6337 * toplev.h (ident_hash_extra): Declare...
6338 * stringpool.cc (ident_hash_extra): ...this new global variable.
6339 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
6340 (ggc_mark_stringpool): Likewise.
6341 (ggc_purge_stringpool): Likewise.
6342 (struct string_pool_data_extra): New struct.
6343 (spd2): New GC root variable.
6344 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
6345 analogous to how spd is used to handle ident_hash.
6346 (gt_pch_restore_stringpool): Likewise.
6348 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
6350 PR tree-optimization/111794
6351 * tree-vect-stmts.cc (vectorizable_assignment): Add
6352 same-precision exception for dest and source.
6354 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
6356 * config/riscv/autovec.md (popcount<mode>2): New expander.
6357 * config/riscv/riscv-protos.h (expand_popcount): Define.
6358 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
6359 with the WWG algorithm.
6361 2023-10-23 Richard Biener <rguenther@suse.de>
6363 PR tree-optimization/111916
6364 * tree-sra.cc (sra_modify_assign): Do not lower all
6365 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
6367 2023-10-23 Richard Biener <rguenther@suse.de>
6369 PR tree-optimization/111915
6370 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
6371 accesses are either grouped or not.
6373 2023-10-23 Richard Biener <rguenther@suse.de>
6376 * tree-inline.cc (setup_one_parameter): Move code emitting
6377 a dummy load when not optimizing ...
6378 (initialize_inlined_parameters): ... here to after when
6379 we remapped the parameter type.
6381 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
6384 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
6385 Skip over nop move insns.
6387 2023-10-23 Tamar Christina <tamar.christina@arm.com>
6389 PR tree-optimization/111860
6390 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
6391 Drop .MEM nodes only.
6393 2023-10-23 Andrew Pinski <apinski@marvell.com>
6395 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
6398 2023-10-23 Andrew Pinski <pinskia@gmail.com>
6400 * convert.cc (convert_to_pointer_1): Return error_mark_node
6402 (convert_to_real_1): Likewise.
6403 (convert_to_integer_1): Likewise.
6404 (convert_to_complex_1): Likewise.
6406 2023-10-23 Andrew Pinski <pinskia@gmail.com>
6409 * convert.cc (convert_to_complex_1): Return
6410 error_mark_node if either convert was an error
6411 when converting from a scalar.
6413 2023-10-23 Richard Biener <rguenther@suse.de>
6415 PR tree-optimization/111917
6416 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
6417 new conditional after last stmt.
6419 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6422 * config/riscv/riscv-vsetvl.cc: Fix bug.
6424 2023-10-23 Pan Li <pan2.li@intel.com>
6426 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
6428 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
6430 2023-10-23 Xi Ruoyao <xry111@xry111.site>
6432 * doc/invoke.texi (-mexplicit-relocs=style): Document.
6433 (-mexplicit-relocs): Document as an alias of
6434 -mexplicit-relocs=always.
6435 (-mno-explicit-relocs): Document as an alias of
6436 -mexplicit-relocs=none.
6437 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
6440 2023-10-23 Xi Ruoyao <xry111@xry111.site>
6442 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
6444 * config/loongarch/loongarch.md (define_peephole2): Optimize
6445 la.local + ld/st to pcalau12i + ld/st if the address is only used
6446 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
6448 2023-10-23 Xi Ruoyao <xry111@xry111.site>
6450 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
6451 Return true for TLS symbol types if -mexplicit-relocs=auto.
6452 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
6453 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
6454 (loongarch_legitimize_tls_address): Likewise.
6455 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
6456 TARGET_EXPLICIT_RELOCS from insn condition.
6458 2023-10-23 Xi Ruoyao <xry111@xry111.site>
6460 * config/loongarch/loongarch-protos.h
6461 (loongarch_explicit_relocs_p): Declare new function.
6462 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
6464 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
6465 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
6466 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
6467 deciding if return early, instead of using
6468 TARGET_EXPLICIT_RELOCS.
6469 (loongarch_output_move): CAll loongarch_explicit_relocs_p
6470 instead of using TARGET_EXPLICIT_RELOCS.
6471 * config/loongarch/loongarch.md (*low<mode>): Remove
6472 TARGET_EXPLICIT_RELOCS from insn condition.
6473 (@ld_from_got<mode>): Likewise.
6474 * config/loongarch/predicates.md (move_operand): Call
6475 loongarch_explicit_relocs_p instead of using
6476 TARGET_EXPLICIT_RELOCS.
6478 2023-10-23 Xi Ruoyao <xry111@xry111.site>
6480 * config/loongarch/genopts/loongarch-strings: Add strings for
6481 -mexplicit-relocs={auto,none,always}.
6482 * config/loongarch/genopts/loongarch.opt.in: Add options for
6483 -mexplicit-relocs={auto,none,always}.
6484 * config/loongarch/loongarch-str.h: Regenerate.
6485 * config/loongarch/loongarch.opt: Regenerate.
6486 * config/loongarch/loongarch-def.h
6487 (EXPLICIT_RELOCS_AUTO): Define.
6488 (EXPLICIT_RELOCS_NONE): Define.
6489 (EXPLICIT_RELOCS_ALWAYS): Define.
6490 (N_EXPLICIT_RELOCS_TYPES): Define.
6491 * config/loongarch/loongarch.cc
6492 (loongarch_option_override_internal): Error out if the old-style
6493 -m[no-]explicit-relocs option is used with
6494 -mexplicit-relocs={auto,none,always} together. Map
6495 -mno-explicit-relocs to -mexplicit-relocs=none and
6496 -mexplicit-relocs to -mexplicit-relocs=always for backward
6497 compatibility. Set a proper default for -mexplicit-relocs=
6498 based on configure-time probed linker capability. Update a
6499 diagnostic message to mention -mexplicit-relocs=always instead
6500 of the old-style -mexplicit-relocs.
6501 (loongarch_handle_model_attribute): Update a diagnostic message
6502 to mention -mexplicit-relocs=always instead of the old-style
6504 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
6506 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6508 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
6509 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
6511 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6513 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
6515 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
6517 PR tree-optimization/111784
6518 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
6519 adjacent vector stores, by costing them with the total number
6520 rather than costing them one by one.
6521 (vectorizable_load): Adjust costing way for adjacent vector
6522 loads, by costing them with the total number rather than costing
6525 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
6528 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
6529 Do not split to xmm16+ when !TARGET_AVX512VL.
6531 2023-10-23 Pan Li <pan2.li@intel.com>
6533 * config/riscv/riscv-protos.h (enum insn_type): Add new type
6535 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
6537 (expand_vec_ceil): Take MA instead of MU for tmp register.
6538 (expand_vec_floor): Ditto.
6539 (expand_vec_nearbyint): Ditto.
6540 (expand_vec_rint): Ditto.
6541 (expand_vec_round): Ditto.
6542 (expand_vec_roundeven): Ditto.
6544 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
6546 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
6548 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
6551 * expr.cc (can_use_qi_vectors): New function to return true if
6552 we know how to implement OP using vectors of bytes.
6553 (qi_vector_mode_supported_p): New function to check if optabs
6554 exists for the mode and certain by pieces operations.
6555 (widest_fixed_size_mode_for_size): Replace the second argument
6556 with the type of by pieces operations. Call can_use_qi_vectors
6557 and qi_vector_mode_supported_p to do the check. Call
6558 scalar_mode_supported_p to check if the scalar mode is supported.
6559 (by_pieces_ninsns): Pass the type of by pieces operation to
6560 widest_fixed_size_mode_for_size.
6561 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
6562 record the type of by pieces operations.
6563 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
6564 type of by pieces operations, initialize m_op with it. Pass
6565 m_op to function widest_fixed_size_mode_for_size.
6566 (op_by_pieces_d::get_usable_mode): Pass m_op to function
6567 widest_fixed_size_mode_for_size.
6568 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
6569 can_use_qi_vectors and qi_vector_mode_supported_p to do the
6571 (op_by_pieces_d::run): Pass m_op to function
6572 widest_fixed_size_mode_for_size.
6573 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
6574 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
6575 (can_store_by_pieces): Pass the type of by pieces operations to
6576 widest_fixed_size_mode_for_size.
6577 (clear_by_pieces): Initialize class store_by_pieces_d with
6579 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
6582 2023-10-23 liuhongt <hongtao.liu@intel.com>
6584 PR tree-optimization/111820
6585 PR tree-optimization/111833
6586 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
6587 up vectorization for nonlinear iv vect_step_op_mul when
6588 step_expr is not exact_log2 and niters is greater than
6589 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
6590 for nagative niters_skip which will be used by fully masked
6592 (vect_can_advance_ivs_p): Pass whole phi_info to
6593 vect_can_peel_nonlinear_iv_p.
6594 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
6595 init_expr * pow (step_expr, skipn) to init_expr
6596 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
6598 2023-10-23 liuhongt <hongtao.liu@intel.com>
6600 * config/i386/mmx.md (mmx_pinsrw): Remove.
6602 2023-10-22 Andrew Pinski <pinskia@gmail.com>
6605 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
6606 (*cmov_uxtw_insn_insv): Likewise.
6608 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
6610 * doc/invoke.texi: Document the new -nodefaultrpaths option.
6611 * doc/install.texi: Document the new --with-darwin-extra-rpath
6614 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
6616 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
6618 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
6620 * configure.ac: Add --with-darwin-extra-rpath option.
6621 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
6622 * config.in: Regenerate.
6623 * configure: Regenerate.
6625 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
6627 * aclocal.m4: Regenerate.
6628 * configure: Regenerate.
6629 * configure.ac: Handle Darwin rpaths.
6630 * config/darwin.h: Handle Darwin rpaths.
6631 * config/darwin.opt: Handle Darwin rpaths.
6632 * Makefile.in: Handle Darwin rpaths.
6634 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
6636 * gcc.cc (RUNPATH_OPTION): New.
6637 (do_spec_1): Provide '%P' as a spec to insert rpaths for
6638 each compiler startfile path.
6640 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
6641 Maxim Blinov <maxim.blinov@embecosm.com>
6642 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
6643 Iain Sandoe <iain@sandoe.co.uk>
6645 * config.gcc: Default to heap trampolines on macOS 11 and above.
6646 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
6647 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
6648 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
6650 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
6651 Maxim Blinov <maxim.blinov@embecosm.com>
6652 Iain Sandoe <iain@sandoe.co.uk>
6653 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
6655 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
6656 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
6657 * common.opt (ftrampoline-impl): Add option to control
6658 generation of trampoline instantiation (heap or stack).
6659 * coretypes.h: Define enum trampoline_impl.
6660 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
6661 __builtin_adjust_trampoline for heap trampolines.
6662 (finalize_nesting_tree_1): Emit calls to
6663 __builtin_nested_...{created,deleted} if we're generating with
6664 -ftrampoline-impl=heap.
6665 * tree.cc (build_common_builtin_nodes): Build
6666 __builtin_nested_...{created,deleted}.
6667 * doc/invoke.texi (-ftrampoline-impl): Document.
6669 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
6671 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
6672 Prohibit 'E' and 'H' combinations.
6674 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
6676 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
6677 Change version number of the 'Zfa' extension to 1.0.
6679 2023-10-21 Pan Li <pan2.li@intel.com>
6682 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
6683 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
6684 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
6685 macro reference to func.
6686 (vls_mode_valid_p): New func impl for vls mode valid or not.
6687 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
6688 macro reference to func.
6689 * config/riscv/vector-iterators.md: Ditto.
6691 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
6692 Uros Bizjak <ubizjak@gmail.com>
6694 PR middle-end/101955
6695 PR tree-optimization/106245
6696 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
6698 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
6700 * gimple-harden-control-flow.cc: Include memmodel.h.
6702 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
6704 * gimple-harden-control-flow.cc: Include tm_p.h.
6706 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6708 PR tree-optimization/111882
6709 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
6710 with non-constant offsets.
6712 2023-10-20 Tamar Christina <tamar.christina@arm.com>
6714 PR tree-optimization/111866
6715 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
6716 vect_set_loop_condition during prolog peeling.
6718 2023-10-20 Richard Biener <rguenther@suse.de>
6720 PR tree-optimization/111445
6721 * tree-scalar-evolution.cc (simple_iv_with_niters):
6722 Add missing check for a sign-conversion.
6724 2023-10-20 Richard Biener <rguenther@suse.de>
6726 PR tree-optimization/110243
6727 PR tree-optimization/111336
6728 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
6729 operations with undefined behavior on overflow to
6730 unsigned arithmetic.
6732 2023-10-20 Richard Biener <rguenther@suse.de>
6734 PR tree-optimization/111891
6735 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
6738 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
6740 * config.gcc: Allow --with-arch=gfx1030.
6741 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
6742 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
6743 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
6744 (TARGET_GFX1030): New.
6745 (TARGET_RDNA2): New.
6746 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
6747 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
6748 (subc<mode>3<exec_vcc>): Likewise.
6749 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
6750 (vec_cmp<mode>di): Likewise.
6751 (vec_cmp<u><mode>di): Likewise.
6752 (vec_cmp<mode>di_exec): Likewise.
6753 (vec_cmp<u><mode>di_exec): Likewise.
6754 (vec_cmp<mode>di_dup): Likewise.
6755 (vec_cmp<mode>di_dup_exec): Likewise.
6756 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
6757 (*<reduc_op>_dpp_shr_<mode>): Likewise.
6758 (*plus_carry_dpp_shr_<mode>): Likewise.
6759 (*plus_carry_in_dpp_shr_<mode>): Likewise.
6760 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
6761 (gcn_global_address_p): RDNA2 only allows smaller offsets.
6762 (gcn_addr_space_legitimate_address_p): Likewise.
6763 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
6764 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
6765 (output_file_start): Configure gfx1030.
6766 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
6767 (ASSEMBLER_DIALECT): New.
6768 * config/gcn/gcn.md (rdna): New define_attr.
6769 (enabled): Use "rdna" attribute.
6770 (gcn_return): Remove s_dcache_wb.
6771 (addcsi3_scalar): Add RDNA2 syntax variant.
6772 (addcsi3_scalar_zero): Likewise.
6773 (addptrdi3): Likewise.
6774 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
6775 (*memory_barrier): Add RDNA2 syntax variant.
6776 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
6777 scalar atomics for RDNA2.
6778 (atomic_store<mode>): Likewise.
6779 (atomic_exchange<mode>): Likewise.
6780 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
6781 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
6782 (main): Recognise -march=gfx1030.
6783 * config/gcn/t-omp-device: Add gfx1030 isa.
6785 2023-10-20 Richard Biener <rguenther@suse.de>
6787 PR tree-optimization/111000
6788 * stor-layout.h (element_precision): Move ..
6789 * tree.h (element_precision): .. here.
6790 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
6791 motion of shifts and rotates.
6793 2023-10-20 Alexandre Oliva <oliva@adacore.com>
6795 * tree-core.h (ECF_XTHROW): New macro.
6796 * tree.cc (set_call_expr): Add expected_throw attribute when
6798 (build_common_builtin_node): Add ECF_XTHROW to
6799 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
6800 * calls.cc (flags_from_decl_or_type): Check for expected_throw
6801 attribute to set ECF_XTHROW.
6802 * gimple.cc (gimple_build_call_from_tree): Propagate
6803 ECF_XTHROW from decl flags to gimple call...
6804 (gimple_call_flags): ... and back.
6805 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
6806 (gimple_call_set_expected_throw): New.
6807 (gimple_call_expected_throw_p): New.
6808 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
6809 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
6810 * common.opt (fharden-control-flow-redundancy): New.
6811 (-fhardcfr-check-returning-calls): New.
6812 (-fhardcfr-check-exceptions): New.
6813 (-fhardcfr-check-noreturn-calls=*): New.
6814 (Enum hardcfr_check_noreturn_calls): New.
6815 (fhardcfr-skip-leaf): New.
6816 * doc/invoke.texi: Document them.
6817 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
6818 * flag-types.h (enum hardcfr_noret): New.
6819 * gimple-harden-control-flow.cc: New.
6820 * params.opt (-param=hardcfr-max-blocks=): New.
6821 (-param=hradcfr-max-inline-blocks=): New.
6822 * passes.def (pass_harden_control_flow_redundancy): Add.
6823 * tree-pass.h (make_pass_harden_control_flow_redundancy):
6825 * doc/extend.texi: Document expected_throw attribute.
6827 2023-10-20 Alex Coplan <alex.coplan@arm.com>
6829 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
6830 ::remove_insn on deleted insns.
6832 2023-10-20 Richard Biener <rguenther@suse.de>
6834 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
6836 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
6839 * config/sh/sh.md (unnamed split pattern): Fix comparison of
6840 find_regno_note result.
6842 2023-10-20 Richard Biener <rguenther@suse.de>
6844 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
6845 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
6848 2023-10-20 Richard Biener <rguenther@suse.de>
6850 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
6851 off_arg3_arg2_map): New.
6852 (vect_get_operand_map): Get flag whether the stmt was
6853 recognized as gather or scatter and use the above
6855 (vect_get_and_check_slp_defs): Adjust.
6856 (vect_build_slp_tree_2): Likewise.
6858 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6860 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
6861 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
6862 (pre_vsetvl::emit_vsetvl): Ditto.
6864 2023-10-20 Tamar Christina <tamar.christina@arm.com>
6865 Andre Vieira <andre.simoesdiasvieira@arm.com>
6867 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
6868 (get_loop_body_if_conv_order): ... to here.
6869 (if_convertible_loop_p): Remove single_exit check.
6870 (tree_if_conversion): Move single_exit check to if-conversion part and
6871 support multiple exits.
6873 2023-10-20 Tamar Christina <tamar.christina@arm.com>
6874 Andre Vieira <andre.simoesdiasvieira@arm.com>
6876 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
6877 from original statement.
6878 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
6880 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6883 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
6884 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
6886 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
6891 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
6893 (compute_reaching_defintion): New.
6894 (enum vsetvl_type): Moved.
6895 (vlmax_avl_p): Moved.
6896 (enum emit_type): Moved.
6897 (vlmul_to_str): Moved.
6898 (vlmax_avl_insn_p): Removed.
6899 (policy_to_str): Moved.
6900 (loop_basic_block_p): Removed.
6901 (valid_sew_p): Removed.
6902 (vsetvl_insn_p): Moved.
6903 (vsetvl_vtype_change_only_p): Removed.
6904 (after_or_same_p): Removed.
6905 (before_p): Removed.
6906 (anticipatable_occurrence_p): Removed.
6907 (available_occurrence_p): Removed.
6908 (insn_should_be_added_p): Removed.
6909 (get_all_sets): Moved.
6910 (get_same_bb_set): Moved.
6911 (gen_vsetvl_pat): Removed.
6912 (calculate_vlmul): Moved.
6913 (get_max_int_sew): New.
6914 (emit_vsetvl_insn): Removed.
6915 (get_max_float_sew): New.
6916 (eliminate_insn): Removed.
6917 (insert_vsetvl): Removed.
6918 (count_regno_occurrences): Moved.
6919 (get_vl_vtype_info): Removed.
6920 (enum def_type): Moved.
6921 (validate_change_or_fail): Moved.
6922 (change_insn): Removed.
6923 (get_all_real_uses): Moved.
6924 (get_forward_read_vl_insn): Removed.
6925 (get_backward_fault_first_load_insn): Removed.
6926 (change_vsetvl_insn): Removed.
6927 (avl_source_has_vsetvl_p): Removed.
6928 (source_equal_p): Moved.
6929 (calculate_sew): Removed.
6930 (same_equiv_note_p): Moved.
6932 (incompatible_avl_p): Removed.
6934 (different_sew_p): Removed.
6935 (get_bb_index): New.
6936 (different_lmul_p): Removed.
6937 (has_no_uses): Moved.
6938 (different_ratio_p): Removed.
6939 (different_tail_policy_p): Removed.
6940 (different_mask_policy_p): Removed.
6941 (possible_zero_avl_p): Removed.
6942 (enum demand_flags): New.
6943 (second_ratio_invalid_for_first_sew_p): Removed.
6944 (second_ratio_invalid_for_first_lmul_p): Removed.
6946 (float_insn_valid_sew_p): Removed.
6947 (second_sew_less_than_first_sew_p): Removed.
6948 (first_sew_less_than_second_sew_p): Removed.
6949 (class vsetvl_info): New.
6950 (compare_lmul): Removed.
6951 (second_lmul_less_than_first_lmul_p): Removed.
6952 (second_ratio_less_than_first_ratio_p): Removed.
6953 (DEF_INCOMPATIBLE_COND): Removed.
6954 (greatest_sew): Removed.
6955 (first_sew): Removed.
6956 (second_sew): Removed.
6957 (first_vlmul): Removed.
6958 (second_vlmul): Removed.
6959 (first_ratio): Removed.
6960 (second_ratio): Removed.
6961 (vlmul_for_first_sew_second_ratio): Removed.
6962 (vlmul_for_greatest_sew_second_ratio): Removed.
6963 (ratio_for_second_sew_first_vlmul): Removed.
6964 (class vsetvl_block_info): New.
6965 (DEF_SEW_LMUL_FUSE_RULE): New.
6966 (always_unavailable): Removed.
6967 (avl_unavailable_p): Removed.
6968 (class demand_system): New.
6969 (sew_unavailable_p): Removed.
6970 (lmul_unavailable_p): Removed.
6971 (ge_sew_unavailable_p): Removed.
6972 (ge_sew_lmul_unavailable_p): Removed.
6973 (ge_sew_ratio_unavailable_p): Removed.
6974 (DEF_UNAVAILABLE_COND): Removed.
6975 (same_sew_lmul_demand_p): Removed.
6976 (propagate_avl_across_demands_p): Removed.
6977 (reg_available_p): Removed.
6978 (support_relaxed_compatible_p): Removed.
6979 (demands_can_be_fused_p): Removed.
6980 (earliest_pred_can_be_fused_p): Removed.
6981 (vsetvl_dominated_by_p): Removed.
6982 (avl_info::avl_info): Removed.
6983 (avl_info::single_source_equal_p): Removed.
6984 (avl_info::multiple_source_equal_p): Removed.
6985 (DEF_SEW_LMUL_RULE): New.
6986 (avl_info::operator=): Removed.
6987 (avl_info::operator==): Removed.
6988 (DEF_POLICY_RULE): New.
6989 (avl_info::operator!=): Removed.
6990 (avl_info::has_non_zero_avl): Removed.
6991 (vl_vtype_info::vl_vtype_info): Removed.
6992 (vl_vtype_info::operator==): Removed.
6993 (DEF_AVL_RULE): New.
6994 (vl_vtype_info::operator!=): Removed.
6995 (vl_vtype_info::same_avl_p): Removed.
6996 (vl_vtype_info::same_vtype_p): Removed.
6997 (vl_vtype_info::same_vlmax_p): Removed.
6998 (vector_insn_info::operator>=): Removed.
6999 (vector_insn_info::operator==): Removed.
7000 (class pre_vsetvl): New.
7001 (vector_insn_info::parse_insn): Removed.
7002 (vector_insn_info::compatible_p): Removed.
7003 (vector_insn_info::skip_avl_compatible_p): Removed.
7004 (vector_insn_info::compatible_avl_p): Removed.
7005 (vector_insn_info::compatible_vtype_p): Removed.
7006 (vector_insn_info::available_p): Removed.
7007 (vector_insn_info::fuse_avl): Removed.
7008 (vector_insn_info::fuse_sew_lmul): Removed.
7009 (vector_insn_info::fuse_tail_policy): Removed.
7010 (vector_insn_info::fuse_mask_policy): Removed.
7011 (vector_insn_info::local_merge): Removed.
7012 (vector_insn_info::global_merge): Removed.
7013 (vector_insn_info::get_avl_or_vl_reg): Removed.
7014 (vector_insn_info::update_fault_first_load_avl): Removed.
7015 (vector_insn_info::dump): Removed.
7016 (vector_infos_manager::vector_infos_manager): Removed.
7017 (vector_infos_manager::create_expr): Removed.
7018 (vector_infos_manager::get_expr_id): Removed.
7019 (vector_infos_manager::all_same_ratio_p): Removed.
7020 (vector_infos_manager::all_avail_in_compatible_p): Removed.
7021 (vector_infos_manager::all_same_avl_p): Removed.
7022 (vector_infos_manager::expr_set_num): Removed.
7023 (vector_infos_manager::release): Removed.
7024 (vector_infos_manager::create_bitmap_vectors): Removed.
7025 (vector_infos_manager::free_bitmap_vectors): Removed.
7026 (vector_infos_manager::dump): Removed.
7027 (class pass_vsetvl): Adjust.
7028 (pass_vsetvl::get_vector_info): Removed.
7029 (pass_vsetvl::get_block_info): Removed.
7030 (pass_vsetvl::update_vector_info): Removed.
7031 (pass_vsetvl::update_block_info): Removed.
7032 (pre_vsetvl::compute_avl_def_data): New.
7033 (pass_vsetvl::simple_vsetvl): Removed.
7034 (pass_vsetvl::compute_local_backward_infos): Removed.
7035 (pass_vsetvl::need_vsetvl): Removed.
7036 (pass_vsetvl::transfer_before): Removed.
7037 (pass_vsetvl::transfer_after): Removed.
7038 (pre_vsetvl::compute_vsetvl_def_data): New.
7039 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
7040 (pass_vsetvl::prune_expressions): Removed.
7041 (pass_vsetvl::compute_local_properties): Removed.
7042 (pre_vsetvl::compute_lcm_local_properties): New.
7043 (pass_vsetvl::earliest_fusion): Removed.
7044 (pre_vsetvl::fuse_local_vsetvl_info): New.
7045 (pass_vsetvl::vsetvl_fusion): Removed.
7046 (pass_vsetvl::can_refine_vsetvl_p): Removed.
7047 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
7048 (pass_vsetvl::refine_vsetvls): Removed.
7049 (pass_vsetvl::cleanup_vsetvls): Removed.
7050 (pass_vsetvl::commit_vsetvls): Removed.
7051 (pass_vsetvl::pre_vsetvl): Removed.
7052 (pass_vsetvl::get_vsetvl_at_end): Removed.
7053 (local_avl_compatible_p): Removed.
7054 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
7055 (pre_vsetvl::pre_global_vsetvl_info): New.
7056 (get_first_vsetvl_before_rvv_insns): Removed.
7057 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
7058 (pre_vsetvl::emit_vsetvl): New.
7059 (pass_vsetvl::ssa_post_optimization): Removed.
7060 (pre_vsetvl::cleaup): New.
7061 (pre_vsetvl::remove_avl_operand): New.
7062 (pass_vsetvl::df_post_optimization): Removed.
7063 (pre_vsetvl::remove_unused_dest_operand): New.
7064 (pass_vsetvl::init): Removed.
7065 (pass_vsetvl::done): Removed.
7066 (pass_vsetvl::compute_probabilities): Removed.
7067 (pass_vsetvl::lazy_vsetvl): Adjust.
7068 (pass_vsetvl::execute): Adjust.
7069 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
7070 (DEF_SEW_LMUL_RULE): New.
7071 (DEF_SEW_LMUL_FUSE_RULE): Removed.
7072 (DEF_POLICY_RULE): New.
7073 (DEF_UNAVAILABLE_COND): Removed
7074 (DEF_AVL_RULE): New demand type.
7075 (sew_lmul): New demand type.
7076 (ratio_only): New demand type.
7077 (sew_only): New demand type.
7078 (ge_sew): New demand type.
7079 (ratio_and_ge_sew): New demand type.
7080 (tail_mask_policy): New demand type.
7081 (tail_policy_only): New demand type.
7082 (mask_policy_only): New demand type.
7083 (ignore_policy): New demand type.
7084 (avl): New demand type.
7085 (non_zero_avl): New demand type.
7086 (ignore_avl): New demand type.
7087 * config/riscv/t-riscv: Removed riscv-vsetvl.h
7088 * config/riscv/riscv-vsetvl.h: Removed.
7090 2023-10-20 Alexandre Oliva <oliva@adacore.com>
7092 * tree-eh.cc (make_eh_edges): Return the new edge.
7093 * tree-eh.h (make_eh_edges): Likewise.
7095 2023-10-19 Marek Polacek <polacek@redhat.com>
7097 * doc/contrib.texi: Add entry for Patrick Palka.
7099 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
7101 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
7102 compatible with mask parameters in clone.
7103 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
7105 (vectorizable_simd_clone_call): Enable the use of masked clones in
7108 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
7110 PR tree-optimization/110485
7111 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
7112 vectors usage if a notinbranch simdclone has been selected.
7114 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
7116 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
7117 simd clone calls and only use types that are mapped to vectors.
7118 (simd_clone_call_p): New helper function.
7120 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
7122 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
7123 poly NIT and ALT_BOUND.
7125 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
7127 * tree-parloops.cc (create_loop_fn): Copy specific target and
7128 optimization options to clone.
7130 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
7132 * omp-simd-clone.cc (simd_clone_subparts): Remove.
7133 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
7134 TYPE_VECTOR_SUBPARTS.
7135 (ipa_simd_modify_function_body): Likewise.
7136 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
7137 (simd_clone_subparts): Remove.
7139 2023-10-19 Jason Merrill <jason@redhat.com>
7141 * ABOUT-GCC-NLS: Add usage guidance.
7143 2023-10-19 Jason Merrill <jason@redhat.com>
7145 * diagnostic-core.h (permerror): Rename new overloads...
7146 (permerror_opt): To this.
7147 * diagnostic.cc: Likewise.
7149 2023-10-19 Tamar Christina <tamar.christina@arm.com>
7151 PR tree-optimization/111860
7152 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
7153 Remove PHI nodes that dominate loop.
7155 2023-10-19 Richard Biener <rguenther@suse.de>
7157 PR tree-optimization/111131
7158 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
7159 sure to update all gather/scatter stmt DRs, not only those
7160 that eventually got VMAT_GATHER_SCATTER set.
7161 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
7162 (vect_get_and_check_slp_defs): Handle gathers/scatters,
7163 adding the offset as SLP operand and comparing base and scale.
7164 (vect_build_slp_tree_1): Handle gathers.
7165 (vect_build_slp_tree_2): Likewise.
7167 2023-10-19 Richard Biener <rguenther@suse.de>
7169 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
7171 (vect_build_one_gather_load_call): ... this. Refactor,
7172 inline widening/narrowing support ...
7173 (vectorizable_load): ... here, do gather vectorization
7174 with builtin decls along other gather vectorization.
7176 2023-10-19 Alex Coplan <alex.coplan@arm.com>
7178 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
7179 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
7180 (store_pair_dw_tftf): Rename to ...
7181 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
7182 * config/aarch64/iterators.md (TX2): New.
7184 2023-10-19 Alex Coplan <alex.coplan@arm.com>
7186 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
7187 parameter to give final insn position, infer use of mem if it isn't
7188 specified explicitly.
7189 (function_info::change_insns): Pass down final insn position to
7190 finalize_new_accesses.
7191 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
7193 2023-10-19 Alex Coplan <alex.coplan@arm.com>
7195 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
7196 * rtl-ssa/functions.h (function_info): Declare new member
7197 function reparent_use.
7199 2023-10-19 Alex Coplan <alex.coplan@arm.com>
7201 * rtl-ssa/access-utils.h (drop_memory_access): New.
7203 2023-10-19 Alex Coplan <alex.coplan@arm.com>
7205 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
7206 update the prev pointer on the following nondebug insn in the
7207 case that !insn->is_debug_insn () && next->is_debug_insn ().
7209 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
7211 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
7212 Also make Clearwater Forest depends on Sierra Forest.
7213 * config/i386/i386-options.cc: Revise the order of the macro
7214 definition to avoid confusion.
7215 * doc/extend.texi: Revise documentation.
7216 * doc/invoke.texi: Correct documentation.
7218 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
7220 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
7221 Implement support for --with-multilib-list.
7222 * config/gcn/t-gcn-hsa: Likewise.
7223 * doc/install.texi: Likewise.
7224 * doc/invoke.texi: Mark Fiji deprecated.
7226 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
7228 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
7229 vector_costs. Add a constructor.
7230 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
7231 adjust the cost for inner loops.
7232 (loongarch_vector_costs::count_operations): New function.
7233 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
7234 (loongarch_vector_costs::finish_cost): Ditto.
7235 (loongarch_builtin_vectorization_cost): Adjust.
7236 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
7237 (loongarcg-vect-issue-info): Ditto.
7238 (mmemvec-cost): Delete.
7239 * config/loongarch/genopts/loongarch.opt.in
7240 (loongarch-vect-unroll-limit): Ditto.
7241 (loongarcg-vect-issue-info): Ditto.
7242 (mmemvec-cost): Delete.
7243 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
7245 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
7247 * config/loongarch/lasx.md
7248 (vec_widen_<su>mult_even_v8si): New patterns.
7249 (vec_widen_<su>add_hi_<mode>): Ditto.
7250 (vec_widen_<su>add_lo_<mode>): Ditto.
7251 (vec_widen_<su>sub_hi_<mode>): Ditto.
7252 (vec_widen_<su>sub_lo_<mode>): Ditto.
7253 (vec_widen_<su>mult_hi_<mode>): Ditto.
7254 (vec_widen_<su>mult_lo_<mode>): Ditto.
7255 * config/loongarch/loongarch.md (u_bool): New iterator.
7256 * config/loongarch/loongarch-protos.h
7257 (loongarch_expand_vec_widen_hilo): New prototype.
7258 * config/loongarch/loongarch.cc
7259 (loongarch_expand_vec_interleave): New function.
7260 (loongarch_expand_vec_widen_hilo): New function.
7262 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
7264 * config/loongarch/lasx.md
7265 (avg<mode>3_ceil): New patterns.
7266 (uavg<mode>3_ceil): Ditto.
7267 (avg<mode>3_floor): Ditto.
7268 (uavg<mode>3_floor): Ditto.
7271 * config/loongarch/lsx.md
7272 (avg<mode>3_ceil): New patterns.
7273 (uavg<mode>3_ceil): Ditto.
7274 (avg<mode>3_floor): Ditto.
7275 (uavg<mode>3_floor): Ditto.
7279 2023-10-18 Andrew Pinski <pinskia@gmail.com>
7281 PR middle-end/111863
7282 * expr.cc (do_store_flag): Don't over write arg0
7283 when stripping off `& POW2`.
7285 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
7287 PR tree-optimization/111648
7288 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
7289 chooses base element from arg, ensure that it's a natural stepped
7291 (build_vec_cst_rand): New param natural_stepped and use it to
7292 construct a naturally stepped sequence.
7293 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
7295 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
7297 * config/pru/pru.cc (pru_insn_cost): New function.
7298 (TARGET_INSN_COST): Define for PRU.
7300 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
7302 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
7303 Test <= instead of testing < twice.
7305 2023-10-18 Jakub Jelinek <jakub@redhat.com>
7308 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
7309 using rtx_def type for memory_extend_buf, use unsigned char
7310 arrayy with size of rtx_def and its alignment.
7312 2023-10-18 Jason Merrill <jason@redhat.com>
7314 * doc/invoke.texi: Move -fpermissive to Warning Options.
7315 * diagnostic.cc (update_effective_level_from_pragmas): Remove
7316 redundant system header check.
7317 (diagnostic_report_diagnostic): Move down syshdr/-w check.
7318 (diagnostic_impl): Handle DK_PERMERROR with an option number.
7319 (permerror): Add new overloads.
7320 * diagnostic-core.h (permerror): Declare them.
7322 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
7324 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
7325 to avoid that auxillary statement list reaches LTO.
7327 2023-10-18 Jakub Jelinek <jakub@redhat.com>
7329 PR tree-optimization/111845
7330 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
7331 statements for the 4 operand addition or subtraction of 3 operands
7332 from 1 operand cases and remove them when successful. Look for
7333 nested additions even from rhs[2], not just rhs[1].
7335 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
7338 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
7339 instead of an assert ICE when no -march= has been specified.
7341 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
7343 * config.in: Regenerate.
7344 * config/darwin.cc (darwin_file_start): Add assembler directives
7345 for the target OS version, where these are supported by the
7347 (darwin_override_options): Check for building >= macOS 10.14.
7348 * configure: Regenerate.
7349 * configure.ac: Check for assembler support of .build_version
7352 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7354 PR tree-optimization/109154
7355 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
7356 (typedef struct ifcvt_arg_entry): New.
7357 (cmp_arg_entry): New.
7358 (gen_phi_arg_condition, gen_phi_nest_statement,
7359 predicate_scalar_phi): Use them.
7361 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7363 PR tree-optimization/109154
7364 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
7365 Rewrite to new syntax.
7366 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
7369 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7371 PR tree-optimization/109154
7372 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
7374 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7376 PR tree-optimization/109154
7377 * match.pd: Add new cond_op rule.
7379 2023-10-18 Xi Ruoyao <xry111@xry111.site>
7381 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
7384 2023-10-18 Richard Biener <rguenther@suse.de>
7386 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
7387 Relax check to again allow passing integer mode masks
7388 as traditional vectors.
7390 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7392 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
7393 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
7395 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
7396 (find_guard_arg): Look value up through explicit edge and original defs.
7397 (vect_do_peeling): Use it.
7398 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
7399 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
7401 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
7402 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
7403 optional param to turn off LCSSA mode.
7405 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7407 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
7408 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
7410 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
7411 (vec_init_loop_exit_info): Extend analysis when multiple exits.
7412 (vect_analyze_loop_form): Record conds and determine main cond.
7413 (vect_create_loop_vinfo): Extend bookkeeping of conds.
7414 (vect_analyze_loop): Release conds.
7415 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
7416 LOOP_VINFO_LOOP_IV_COND): New.
7417 (struct vect_loop_form_info): Add conds, alt_loop_conds;
7418 (struct loop_vec_info): Add conds, loop_iv_cond.
7420 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7422 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
7423 (loop_distribution::distribute_loop): Bail out of not single exit.
7424 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
7425 * tree-scalar-evolution.h (get_loop_exit_condition): New.
7426 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
7428 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
7429 vect_set_loop_condition_partial_vectors_avx512,
7430 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
7432 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
7433 return new peeled corresponding peeled exit.
7434 (slpeel_can_duplicate_loop_p): Explicitly take exit.
7435 (find_loop_location): Handle not knowing an explicit exit.
7436 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
7437 find_guard_arg, slpeel_update_phi_nodes_for_loops,
7438 slpeel_update_phi_nodes_for_guard2): Use new exits.
7439 (vect_do_peeling): Update bookkeeping to keep track of exits.
7440 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
7442 (vec_init_loop_exit_info): New.
7443 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
7444 vec_epilogue_loop_iv, scalar_loop_iv.
7445 (vect_analyze_loop_form): Initialize exits.
7446 (vect_create_loop_vinfo): Set main exit.
7447 (vect_create_epilog_for_reduction, vectorizable_live_operation,
7448 vect_transform_loop): Use it.
7449 (scale_profile_for_vect_loop): Explicitly take exit to scale.
7450 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
7451 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
7452 LOOP_VINFO_SCALAR_IV_EXIT): New.
7453 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
7455 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
7456 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
7457 (vec_init_loop_exit_info): New.
7458 (struct vect_loop_form_info): Add loop_exit.
7460 2023-10-18 Tamar Christina <tamar.christina@arm.com>
7462 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
7464 (vectorizable_comparison_1): ...This.
7466 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7468 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
7469 (expand_vec_perm_const_1): Add consecutive pattern recognition.
7471 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
7473 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
7475 * common/config/i386/i386-common.cc (processor_name):
7477 (processor_alias_table): Ditto.
7478 * common/config/i386/i386-cpuinfo.h (enum processor_types):
7479 Add INTEL_PANTHERLAKE.
7480 * config.gcc: Add -march=pantherlake.
7481 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
7482 the if clause. Handle pantherlake.
7483 * config/i386/i386-c.cc (ix86_target_macros_internal):
7485 * config/i386/i386-options.cc (processor_cost_table): Ditto.
7486 (m_PANTHERLAKE): New.
7487 (m_CORE_HYBRID): Add pantherlake.
7488 * config/i386/i386.h (enum processor_type): Ditto.
7489 * doc/extend.texi: Ditto.
7490 * doc/invoke.texi: Ditto.
7492 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
7494 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
7495 * config/i386/x86-tune.def: Replace hybrid client tune to
7498 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
7500 * common/config/i386/cpuinfo.h
7501 (get_intel_cpu): Handle Clearwater Forest.
7502 * common/config/i386/i386-common.cc (processor_name):
7503 Add Clearwater Forest.
7504 (processor_alias_table): Ditto.
7505 * common/config/i386/i386-cpuinfo.h (enum processor_types):
7506 Add INTEL_CLEARWATERFOREST.
7507 * config.gcc: Add -march=clearwaterforest.
7508 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
7510 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
7511 * config/i386/i386-options.cc (processor_cost_table): Ditto.
7512 (m_CLEARWATERFOREST): New.
7513 (m_CORE_ATOM): Add clearwaterforest.
7514 * config/i386/i386.h (enum processor_type): Ditto.
7515 * doc/extend.texi: Ditto.
7516 * doc/invoke.texi: Ditto.
7518 2023-10-18 liuhongt <hongtao.liu@intel.com>
7520 * config/i386/mmx.md (fma<mode>4): New expander.
7521 (fms<mode>4): Ditto.
7522 (fnma<mode>4): Ditto.
7523 (fnms<mode>4): Ditto.
7524 (vec_fmaddsubv4hf4): Ditto.
7525 (vec_fmsubaddv4hf4): Ditto.
7527 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7530 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
7532 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
7534 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
7535 the position of the LR save slot dependent on stack clash
7536 protection unless shadow call stacks are enabled.
7538 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
7540 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
7541 store the list saved GPRs, FPRs and predicate registers.
7542 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
7543 the lists of saved registers. Use them to choose push candidates.
7544 Invalidate pop candidates if we're not going to do a pop.
7545 (aarch64_next_callee_save): Delete.
7546 (aarch64_save_callee_saves): Take a list of registers,
7547 rather than a range. Make !skip_wb select only write-back
7549 (aarch64_expand_prologue): Update calls accordingly.
7550 (aarch64_restore_callee_saves): Take a list of registers,
7551 rather than a range. Always skip pop candidates. Also skip
7552 LR if shadow call stacks are enabled.
7553 (aarch64_expand_epilogue): Update calls accordingly.
7555 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
7557 * cfgbuild.h (find_sub_basic_blocks): Declare.
7558 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
7560 (find_many_sub_basic_blocks): ...here.
7561 (find_sub_basic_blocks): New function.
7562 * function.cc (thread_prologue_and_epilogue_insns): Handle
7563 epilogues that contain jumps.
7565 2023-10-17 Andrew Pinski <apinski@marvell.com>
7567 PR tree-optimization/110817
7568 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
7569 check for boolean type as they don't have "[0,1]" range.
7571 2023-10-17 Andrew Pinski <pinskia@gmail.com>
7573 PR tree-optimization/111432
7574 * match.pd (`a & (x | CST)`): New pattern.
7576 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
7578 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
7581 2023-10-17 Richard Biener <rguenther@suse.de>
7583 PR tree-optimization/111846
7584 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
7585 (SLP_TREE_SIMD_CLONE_INFO): New.
7586 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
7587 SLP_TREE_SIMD_CLONE_INFO.
7588 (_slp_tree::~_slp_tree): Release it.
7589 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
7590 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
7591 dependent on if we're doing SLP.
7593 2023-10-17 Jakub Jelinek <jakub@redhat.com>
7595 * wide-int-print.h (print_dec_buf_size): For length, divide number
7596 of bits by 3 and add 3 instead of division by 4 and adding 4.
7597 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
7598 print_hex, instead call print_decu on either negated value after
7599 printing - or on wi itself.
7600 (print_decu): Don't call print_hex, instead print even large numbers
7602 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
7603 even if it returns false.
7604 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
7605 pp_wide_int_large should be used.
7606 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
7607 to compute needed buffer size.
7609 2023-10-17 Richard Biener <rguenther@suse.de>
7611 PR middle-end/111818
7612 * tree-ssa.cc (maybe_optimize_var): When clearing
7613 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
7615 2023-10-17 Richard Biener <rguenther@suse.de>
7617 PR tree-optimization/111807
7618 * tree-sra.cc (build_ref_for_model): Only call
7619 build_reconstructed_reference when the offsets are the same.
7621 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
7624 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
7626 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
7628 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
7629 fix impl related to vec_initv32qiv16qi template to avoid ICE.
7631 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
7632 Chenghua Xu <xuchenghua@loongson.cn>
7634 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
7637 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7639 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
7640 (get_store_value): New function.
7642 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
7644 * explow.cc (probe_stack_range): Handle case when expand_binop
7645 does not construct its result in the expected location.
7647 2023-10-16 David Malcolm <dmalcolm@redhat.com>
7649 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
7650 default for -fdiagnostics-text-art-charset from emoji to ascii.
7651 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
7653 2023-10-16 David Malcolm <dmalcolm@redhat.com>
7655 * diagnostic.cc (diagnostic_initialize): Ensure
7656 context->extra_output_kind is initialized.
7658 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
7660 * config/i386/i386.cc (ix86_can_inline_p):
7661 Handle CM_LARGE and CM_LARGE_PIC.
7662 (x86_elf_aligned_decl_common): Ditto.
7663 (x86_output_aligned_bss): Ditto.
7664 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
7665 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
7667 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
7669 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
7670 prototype. Improve comment.
7671 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
7672 into riscv-string.cc.
7673 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
7674 (riscv_expand_block_move): Likewise.
7675 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
7677 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
7678 (riscv_expand_block_move): Likewise.
7680 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
7682 * Makefile.in: Add fold-mem-offsets.o.
7683 * passes.def: Schedule a new pass.
7684 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
7685 * common.opt: New options.
7686 * doc/invoke.texi: Document new option.
7687 * fold-mem-offsets.cc: New file.
7689 2023-10-16 Andrew Pinski <pinskia@gmail.com>
7691 PR tree-optimization/101541
7692 * match.pd (A CMP 0 ? A : -A): Improve
7693 using bitwise_equal_p.
7695 2023-10-16 Andrew Pinski <pinskia@gmail.com>
7697 PR tree-optimization/31531
7698 * match.pd (~X op ~Y): Allow for an optional nop convert.
7699 (~X op C): Likewise.
7701 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
7703 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
7704 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
7706 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7708 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
7709 unsigned vector element.
7711 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7713 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
7715 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
7717 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
7719 * gimple-fold.cc (size_must_be_zero_p): Likewise.
7720 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
7721 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
7722 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
7724 2023-10-16 liuhongt <hongtao.liu@intel.com>
7726 * config/i386/mmx.md (V2FI_32): New mode iterator
7727 (movd_v2hf_to_sse): Rename to ..
7728 (movd_<mode>_to_sse): .. this.
7729 (movd_v2hf_to_sse_reg): Rename to ..
7730 (movd_<mode>_to_sse_reg): .. this.
7731 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
7733 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
7734 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
7735 (float<floatunssuffix>v2siv2hf2): Ditto.
7736 (extendv2hfv2sf2): Ditto.
7737 (truncv2sfv2hf2): Ditto.
7738 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
7739 (*vec_concat<mode>_movss): .. this.
7741 2023-10-16 liuhongt <hongtao.liu@intel.com>
7743 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
7745 (ix86_expand_round_sse4): Ditto.
7746 * config/i386/i386.md (roundhf2): New expander.
7747 (lroundhf<mode>2): Ditto.
7748 (lrinthf<mode>2): Ditto.
7749 (l<rounding_insn>hf<mode>2): Ditto.
7750 * config/i386/mmx.md (sqrt<mode>2): Ditto.
7751 (btrunc<mode>2): Ditto.
7752 (nearbyint<mode>2): Ditto.
7753 (rint<mode>2): Ditto.
7754 (lrint<mode><mmxintvecmodelower>2): Ditto.
7755 (floor<mode>2): Ditto.
7756 (lfloor<mode><mmxintvecmodelower>2): Ditto.
7757 (ceil<mode>2): Ditto.
7758 (lceil<mode><mmxintvecmodelower>2): Ditto.
7759 (round<mode>2): Ditto.
7760 (lround<mode><mmxintvecmodelower>2): Ditto.
7761 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
7762 (lfloor<mode><sseintvecmodelower>2): Ditto.
7763 (lceil<mode><sseintvecmodelower>2): Ditto.
7764 (lround<mode><sseintvecmodelower>2): Ditto.
7765 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
7766 (round<mode>2): Extend to V8HF/V16HF/V32HF.
7768 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
7770 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
7771 @code; document more completely the supported Fortran sentinels.
7773 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
7775 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
7776 instead of expand_binop. Optimize cases (i.e. avoid generating
7777 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
7778 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
7780 2023-10-15 Jakub Jelinek <jakub@redhat.com>
7782 PR tree-optimization/111800
7783 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
7784 print_decu_buf_size, print_hex_buf_size): New inline functions.
7785 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
7786 (assert_hexeq): Use print_hex_buf_size.
7787 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
7788 (print_decu): Use print_decu_buf_size.
7789 (print_hex): Use print_hex_buf_size.
7790 (pp_wide_int_large): Use print_dec_buf_size.
7791 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
7792 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
7794 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
7795 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
7797 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7799 * combine.cc (simplify_compare_const): Fix handling of unsigned
7802 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7804 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
7806 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
7808 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
7809 'omp allocate' for stack variables.
7811 2023-10-14 Jakub Jelinek <jakub@redhat.com>
7814 * tree-core.h (struct tree_base): Remove int_length.offset
7815 member, change type of int_length.unextended and int_length.extended
7816 from unsigned char to unsigned short.
7817 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
7818 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
7819 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
7820 TREE_INT_CST_NUNITS.
7821 * tree.cc (wide_int_to_tree_1): Don't assert
7822 TREE_INT_CST_OFFSET_NUNITS value.
7823 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
7824 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
7825 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
7826 (trailing_wide_int_storage): Change m_len type from unsigned char *
7827 to unsigned short *.
7828 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
7829 argument from unsigned char * to unsigned short *.
7830 (trailing_wide_ints): Change m_max_len type from unsigned char to
7831 unsigned short. Change m_len element type from
7832 struct{unsigned char len;} to unsigned short.
7833 (trailing_wide_ints <N>::operator []): Remove .len from m_len
7835 * value-range-storage.h (irange_storage::lengths_address): Change
7836 return type from const unsigned char * to const unsigned short *.
7837 (irange_storage::write_lengths_address): Change return type from
7838 unsigned char * to unsigned short *.
7839 * value-range-storage.cc (irange_storage::write_lengths_address):
7841 (irange_storage::lengths_address): Change return type from
7842 const unsigned char * to const unsigned short *.
7843 (write_wide_int): Change len argument type from unsigned char *&
7844 to unsigned short *&.
7845 (irange_storage::set_irange): Change len variable type from
7846 unsigned char * to unsigned short *.
7847 (read_wide_int): Change len argument type from unsigned char to
7848 unsigned short. Use trailing_wide_int_storage <unsigned short>
7849 instead of trailing_wide_int_storage and
7850 trailing_wide_int <unsigned short> instead of trailing_wide_int.
7851 (irange_storage::get_irange): Change len variable type from
7852 unsigned char * to unsigned short *.
7853 (irange_storage::size): Multiply n by sizeof (unsigned short)
7854 in len_size variable initialization.
7855 (irange_storage::dump): Change len variable type from
7856 unsigned char * to unsigned short *.
7858 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7860 * config/riscv/vector-iterators.md: Remove redundant iterators.
7862 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
7864 PR tree-optimization/111622
7865 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
7866 register a partial equivalence if an operand has no uses.
7868 2023-10-13 Richard Biener <rguenther@suse.de>
7870 PR tree-optimization/111795
7871 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
7872 integer mode mask arguments.
7874 2023-10-13 Richard Biener <rguenther@suse.de>
7876 * tree-vect-slp.cc (mask_call_maps): New.
7877 (vect_get_operand_map): Handle IFN_MASK_CALL.
7878 (vect_build_slp_tree_1): Likewise.
7879 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
7882 2023-10-13 Richard Biener <rguenther@suse.de>
7884 PR tree-optimization/111779
7885 * tree-sra.cc (sra_handled_bf_read_p): New function.
7886 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
7887 (sra_modify_expr): Likewise.
7888 (make_fancy_name_1): Skip over BIT_FIELD_REF.
7890 2023-10-13 Richard Biener <rguenther@suse.de>
7892 PR tree-optimization/111773
7893 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
7894 not elide noreturn calls that are reflected to the IL.
7896 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
7898 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
7900 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
7902 2023-10-13 Pan Li <pan2.li@intel.com>
7904 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
7905 pattern for lfloor/lfloorf.
7906 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
7907 (expand_vec_lfloor): New func decl for expanding lfloor.
7908 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
7909 for expanding lfloor.
7911 2023-10-13 Pan Li <pan2.li@intel.com>
7913 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
7914 pattern] for lceil/lceilf.
7915 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
7916 (expand_vec_lceil): New func decl for expanding lceil.
7917 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
7918 for expanding lceil.
7920 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
7923 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
7924 code from shifts that are undefined.
7925 (can_be_built_by_li_lis_and_rldicr): Likewise.
7926 (can_be_built_by_li_and_rldic): Protect code from shifts that
7927 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
7929 2023-10-12 Alex Coplan <alex.coplan@arm.com>
7931 * reg-notes.def (NOALIAS): Correct comment.
7933 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7936 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
7938 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
7939 (wi::ints_for): Provide separate partial specializations for
7940 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
7941 and CONST_PRECISION, rather than using
7942 int_traits <extended_tree <N> >::precision_type as the second template
7944 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
7946 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
7949 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
7951 PR middle-end/111777
7952 * doc/extend.texi: Change subsubsection to subsection for
7955 2023-10-12 Tamar Christina <tamar.christina@arm.com>
7957 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
7959 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7961 * wide-int.h (widest_int_storage <N>::write_val): If l is small
7962 and there is space in u.val array, store a canary value at the
7964 (widest_int_storage <N>::set_len): Check the canary hasn't been
7967 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7970 * wide-int.h: Adjust file comment.
7971 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
7972 (WIDE_INT_MAX_INL_PRECISION): Define.
7973 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
7974 is smaller than WIDE_INT_MAX_ELTS.
7975 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
7976 WIDEST_INT_MAX_PRECISION): Define.
7977 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
7978 to pass 0 as a new argument.
7979 (class widest_int_storage): Likewise.
7980 (widest_int, widest2_int): Change typedefs to use widest_int_storage
7981 rather than fixed_wide_int_storage.
7982 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
7983 (struct binary_traits): Add partial specializations for
7984 INL_CONST_PRECISION.
7985 (generic_wide_int): Add needs_write_val_arg static data member.
7986 (int_traits): Likewise.
7987 (wide_int_storage): Replace val non-static data member with a union
7988 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
7989 assignment operator and destructor. Add unsigned int argument to
7991 (wide_int_storage::wide_int_storage): Initialize precision to 0
7992 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
7993 Assert in non-default ctor T's precision_type is not
7994 INL_CONST_PRECISION and allocate u.valp for large precision. Add
7996 (wide_int_storage::~wide_int_storage): New.
7997 (wide_int_storage::operator=): Add copy assignment operator. In
7998 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
7999 assert ctor T's precision_type is not INL_CONST_PRECISION and
8000 if precision changes, deallocate and/or allocate u.valp.
8001 (wide_int_storage::get_val): Return u.valp rather than u.val for
8003 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
8005 (wide_int_storage::set_len): Use write_val instead of writing val
8007 (wide_int_storage::from, wide_int_storage::from_array): Adjust
8009 (wide_int_storage::create): Allocate u.valp for large precisions.
8010 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
8011 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
8013 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
8014 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
8015 Adjust write_val callers.
8016 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
8017 (WIDEST_INT): Define.
8018 (widest_int_storage): New template class.
8019 (wi::int_traits <widest_int_storage>): New.
8020 (trailing_wide_int_storage::write_val): Add unused unsigned int
8022 (wi::get_binary_precision): Use
8023 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
8024 rather than get_precision on get_binary_result.
8025 (wi::copy): Adjust write_val callers. Don't call set_len if
8026 needs_write_val_arg.
8027 (wi::bit_not): If result.needs_write_val_arg, call write_val
8028 again with upper bound estimate of len.
8029 (wi::sext, wi::zext, wi::set_bit): Likewise.
8030 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
8031 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
8032 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
8033 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
8034 wi::lshift, wi::lrshift, wi::arshift): Likewise.
8035 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
8037 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
8038 generic_wide_int, instead add functions and templates for each
8039 storage of generic_wide_int. Make functions for
8040 generic_wide_int <wide_int_storage> and templates for
8041 generic_wide_int <widest_int_storage <N>> deleted.
8042 (wi::mask, wi::shifted_mask): Adjust write_val calls.
8043 * wide-int.cc (zeros): Decrease array size to 1.
8044 (BLOCKS_NEEDED): Use CEIL.
8045 (canonize): Use HOST_WIDE_INT_M1.
8046 (wi::from_buffer): Pass 0 to write_val.
8047 (wi::to_mpz): Use CEIL.
8048 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
8049 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
8050 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
8051 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
8052 above WIDE_INT_MAX_INL_PRECISION estimate precision from
8053 lengths of operands. Use XALLOCAVEC allocated buffers for
8054 prec above WIDE_INT_MAX_INL_PRECISION.
8055 (wi::divmod_internal): Likewise.
8056 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
8057 it from xlen and skip.
8058 (rshift_large_common): Remove xprecision argument, add len
8059 argument with len computed in caller. Don't return anything.
8060 (wi::lrshift_large, wi::arshift_large): Compute len here
8061 and pass it to rshift_large_common, for lengths above
8062 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
8063 (assert_deceq, assert_hexeq): For lengths above
8064 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
8065 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
8066 WIDE_INT_MAX_PRECISION.
8067 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
8068 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
8069 * wide-int-print.cc (print_decs, print_decu, print_hex): For
8070 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
8071 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
8072 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
8073 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
8074 WIDE_INT_MAX_PRECISION.
8075 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
8076 instead of hard coded CONST_PRECISION.
8077 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
8078 WIDE_INT_MAX_PRECISION.
8079 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
8080 than WIDE_INT_MAX_PRECISION.
8081 (wi::ints_for::zero): Use
8082 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
8083 wi::CONST_PRECISION.
8084 * tree.cc (build_replicated_int_cst): Formatting fix. Use
8085 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
8086 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
8087 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
8088 * double-int.h (wi::int_traits <double_int>::precision_type): Change
8089 to INL_CONST_PRECISION from CONST_PRECISION.
8090 * poly-int.h (struct poly_coeff_traits): Add partial specialization
8091 for wi::INL_CONST_PRECISION.
8092 * cfgloop.h (bound_wide_int): New typedef.
8093 (struct nb_iter_bound): Change bound type from widest_int to
8095 (struct loop): Change nb_iterations_upper_bound,
8096 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
8097 widest_int to bound_wide_int.
8098 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
8099 of i_bound is too large for bound_wide_int. Adjustments for the
8100 widest_int to bound_wide_int type change in non-static data members.
8101 (get_estimated_loop_iterations, get_max_loop_iterations,
8102 get_likely_max_loop_iterations): Adjustments for the widest_int to
8103 bound_wide_int type change in non-static data members.
8104 * tree-vect-loop.cc (vect_transform_loop): Likewise.
8105 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
8106 XALLOCAVEC allocated buffer for i_bound len above
8107 WIDE_INT_MAX_INL_ELTS.
8108 (record_estimate): Return early if wi::min_precision of i_bound is too
8109 large for bound_wide_int. Adjustments for the widest_int to
8110 bound_wide_int type change in non-static data members.
8111 (wide_int_cmp): Use bound_wide_int instead of widest_int.
8112 (bound_index): Use bound_wide_int instead of widest_int.
8113 (discover_iteration_bound_by_body_walk): Likewise. Use
8114 widest_int::from to convert it to widest_int when passed to
8116 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
8117 widest_int when passed to record_niter_bound.
8118 (estimate_numbers_of_iteration): Don't record upper bound if
8119 loop->nb_iterations has too large precision for bound_wide_int.
8120 (n_of_executions_at_most): Use widest_int::from.
8121 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
8122 the widest_int to bound_wide_int changes.
8123 * match.pd (fold_sign_changed_comparison simplification): Use
8124 wide_int::from on wi::to_wide instead of wi::to_widest.
8125 * value-range.h (irange::maybe_resize): Avoid using memcpy on
8126 non-trivially copyable elements.
8127 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
8128 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
8129 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
8130 Use wide_int::from on wi::to_wide instead of wi::to_widest.
8131 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
8132 before calling wi::udiv_trunc.
8133 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
8134 bound_wide_int type change in non-static data members.
8135 * lto-streamer-in.cc (input_cfg): Likewise.
8136 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
8137 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
8138 XALLOCAVEC allocated buffer. Formatting fix.
8139 * data-streamer-in.cc (streamer_read_wide_int,
8140 streamer_read_widest_int): Likewise.
8141 * tree-affine.cc (aff_combination_expand): Use placement new to
8142 construct name_expansion.
8143 (free_name_expansion): Destruct name_expansion.
8144 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
8145 index type from widest_int to offset_int.
8146 (class incr_info_d): Change incr type from widest_int to offset_int.
8147 (alloc_cand_and_find_basis, backtrace_base_for_ref,
8148 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
8149 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
8150 slsr_process_add, cand_abs_increment, replace_mult_candidate,
8151 replace_unconditional_candidate, incr_vec_index,
8152 create_add_on_incoming_edge, create_phi_basis_1,
8153 replace_conditional_candidate, record_increment,
8154 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
8155 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
8156 nearest_common_dominator_for_cands, insert_initializers,
8157 all_phi_incrs_profitable_1, replace_one_candidate,
8158 replace_profitable_candidates): Use offset_int rather than widest_int
8159 and wi::to_offset rather than wi::to_widest.
8160 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
8161 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
8163 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
8164 to construct tree_niter_desc and destruct it on failure.
8165 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
8166 * gengtype.cc (main): Remove widest_int handling.
8167 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
8168 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
8169 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
8170 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
8171 assert get_len () fits into it.
8172 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
8173 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
8175 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
8176 wide_int::from on wi::to_wide instead of wi::to_widest.
8177 * omp-general.cc (score_wide_int): New typedef.
8178 (omp_context_compute_score): Use score_wide_int instead of widest_int
8179 and adjust for those changes.
8180 (struct omp_declare_variant_entry): Change score and
8181 score_in_declare_simd_clone non-static data member type from widest_int
8183 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
8184 score_wide_int instead of widest_int and adjust for those changes.
8185 (omp_lto_output_declare_variant_alt): Likewise.
8186 (omp_lto_input_declare_variant_alt): Likewise.
8187 * godump.cc (go_output_typedef): Assert get_len () is smaller than
8188 WIDE_INT_MAX_INL_ELTS.
8190 2023-10-12 Pan Li <pan2.li@intel.com>
8192 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
8193 pattern for lround/lroundf.
8194 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
8195 (expand_vec_lround): New func decl for expanding lround.
8196 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
8197 for expanding lround.
8199 2023-10-12 Jakub Jelinek <jakub@redhat.com>
8201 * dwarf2out.h (wide_int_ptr): Remove.
8202 (dw_wide_int_ptr): New typedef.
8203 (struct dw_val_node): Change type of val_wide from wide_int_ptr
8205 (struct dw_wide_int): New type.
8206 (dw_wide_int::elt): New method.
8207 (dw_wide_int::operator ==): Likewise.
8208 * dwarf2out.cc (get_full_len): Change argument type to
8209 const dw_wide_int & from const wide_int &. Use CEIL. Call
8210 get_precision method instead of calling wi::get_precision.
8211 (alloc_dw_wide_int): New function.
8212 (add_AT_wide): Change w argument type to const wide_int_ref &
8213 from const wide_int &. Use alloc_dw_wide_int.
8214 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
8215 (insert_wide_int): Change val argument type to const wide_int_ref &
8216 from const wide_int &.
8217 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
8218 add_AT_wide instead of using a temporary variable.
8220 2023-10-12 Richard Biener <rguenther@suse.de>
8222 PR tree-optimization/111764
8223 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
8224 to allow x + x via special-casing of assigns.
8226 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
8228 * common/config/i386/cpuinfo.h (get_available_features):
8230 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
8231 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
8232 (ix86_handle_option): Handle -musermsr.
8233 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8234 Add FEATURE_USER_MSR.
8235 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
8236 * config.gcc: Add usermsrintrin.h
8237 * config/i386/cpuid.h (bit_USER_MSR): New.
8238 * config/i386/i386-builtin-types.def:
8239 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
8240 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
8241 Add __builtin_urdmsr and __builtin_uwrmsr.
8242 * config/i386/i386-builtins.h (ix86_builtins):
8243 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
8244 * config/i386/i386-c.cc (ix86_target_macros_internal):
8245 Define __USER_MSR__.
8246 * config/i386/i386-expand.cc (ix86_expand_builtin):
8247 Handle new builtins.
8248 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
8249 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
8251 * config/i386/i386.md (urdmsr): New define_insn.
8253 * config/i386/i386.opt: Add option -musermsr.
8254 * config/i386/x86gprintrin.h: Include usermsrintrin.h
8255 * doc/extend.texi: Document usermsr.
8256 * doc/invoke.texi: Document -musermsr.
8257 * doc/sourcebuild.texi: Document target usermsr.
8258 * config/i386/usermsrintrin.h: New file.
8260 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
8262 * config.gcc: Add loongarch-driver.h to tm_files.
8263 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
8264 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
8265 instead of $(TM_H) for building generator programs.
8267 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8270 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
8271 instruction emission and incorporate to stack_protect_set<mode>.
8272 (stack_protect_setdi): Rename to ...
8273 (stack_protect_set<mode>): ... this, adjust constraint.
8274 (stack_protect_testsi): Support prefixed instruction emission and
8275 incorporate to stack_protect_test<mode>.
8276 (stack_protect_testdi): Rename to ...
8277 (stack_protect_test<mode>): ... this, adjust constraint.
8279 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8281 * tree-vect-stmts.cc (vectorizable_store): Consider generated
8282 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
8285 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8287 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
8288 (vectorizable_store): Adjust the costing for the remaining memory
8289 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
8291 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8293 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
8294 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
8296 (vectorizable_store): Adjust the cost handling on
8297 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
8299 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8301 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
8302 get VMAT_LOAD_STORE_LANES.
8303 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
8304 without calling vect_model_store_cost. Factor out new lambda function
8305 update_prologue_cost.
8307 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8309 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
8310 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
8312 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
8313 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
8315 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8317 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
8318 vectorizable_scan_store without calling vect_model_store_cost
8321 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8323 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
8324 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
8325 handlings and the related parameter gs_info.
8326 (vect_build_scatter_store_calls): Add the handlings on costing with
8327 one more argument cost_vec.
8328 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
8329 without calling vect_model_store_cost any more.
8331 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8333 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
8334 to vect_model_store_cost down to some different transform paths
8335 according to the handlings of different vect_memory_access_types
8336 or some special handling need.
8338 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
8340 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
8341 vector store for some case of VMAT_ELEMENTWISE is supported.
8343 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
8344 Hu Lin1 <lin1.hu@intel.com>
8345 Hongyu Wang <hongyu.wang@intel.com>
8347 * config/i386/i386.cc (gen_push2): New function to emit push2
8348 and adjust cfa offset.
8349 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
8350 determine whether push2/pop2 can be used.
8351 (ix86_compute_frame_layout): Adjust preferred stack boundary
8352 and stack alignment needed for push2/pop2.
8353 (ix86_emit_save_regs): Emit push2 when available.
8354 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
8355 and adjust cfa info.
8356 (ix86_emit_restore_regs_using_pop2): New function to loop
8357 through the saved regs and call above.
8358 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
8359 when push2pop2 available.
8360 * config/i386/i386.md (push2_di): New pattern for push2.
8361 (pop2_di): Likewise for pop2.
8363 2023-10-12 Pan Li <pan2.li@intel.com>
8365 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
8366 (lrint<mode><v_i_l_ll_convert>2): Rename to.
8367 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
8369 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
8371 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
8373 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
8375 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
8376 pseudo op instead of a "call" pseudo op.
8378 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
8380 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
8382 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
8383 (riscv_subset_list::clone): Ditto.
8384 (riscv_subset_list::parse_single_ext): Ditto.
8385 (riscv_subset_list::set_loc): Ditto.
8386 (riscv_set_arch_by_subset_list): Ditto.
8387 * common/config/riscv/riscv-common.cc
8388 (riscv_subset_list::parse_single_std_ext): New.
8389 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
8390 (riscv_subset_list::clone): Ditto.
8391 (riscv_subset_list::parse_single_ext): Ditto.
8392 (riscv_subset_list::set_loc): Ditto.
8393 (riscv_set_arch_by_subset_list): Ditto.
8395 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
8397 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
8398 from argument rather than get setting from global setting.
8399 (riscv_override_options_internal): New, splited from
8400 riscv_override_options, also take a gcc_options argument.
8401 (riscv_option_override): Splited most part to
8402 riscv_override_options_internal.
8404 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
8406 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
8407 TARGET_<NAME>_OPTS_P.
8408 (InverseMask): Ditto.
8409 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
8410 TARGET_<NAME>_OPTS_P macro.
8411 (InverseMask): Ditto.
8413 2023-10-11 Andrew Pinski <pinskia@gmail.com>
8415 PR tree-optimization/111282
8416 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
8417 `a & ((~a) ^ b)`): New patterns.
8419 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
8421 * common/config/riscv/riscv-common.cc: Add the XCValu
8423 * config/riscv/constraints.md: Add builtins for the XCValu
8425 * config/riscv/predicates.md (immediate_register_operand):
8427 * config/riscv/corev.def: Likewise.
8428 * config/riscv/corev.md: Likewise.
8429 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
8430 (RISCV_ATYPE_UHI): Likewise.
8431 * config/riscv/riscv-ftypes.def: Likewise.
8432 * config/riscv/riscv.opt: Likewise.
8433 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
8434 * doc/extend.texi: Add XCValu documentation.
8435 * doc/sourcebuild.texi: Likewise.
8437 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
8439 * common/config/riscv/riscv-common.cc: Add XCVmac.
8440 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
8441 * config/riscv/riscv-builtins.cc: Likewise.
8442 * config/riscv/riscv.md: Likewise.
8443 * config/riscv/riscv.opt: Likewise.
8444 * doc/extend.texi: Add XCVmac builtin documentation.
8445 * doc/sourcebuild.texi: Likewise.
8446 * config/riscv/corev.def: New file.
8447 * config/riscv/corev.md: New file.
8449 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8451 * config/riscv/autovec.md: Fix index bug.
8452 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
8453 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
8454 (gather_scatter_valid_offset_mode_p): New function.
8456 2023-10-11 Pan Li <pan2.li@intel.com>
8458 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
8460 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
8462 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
8464 (expand_vec_lrint): New function impl for expanding lint.
8465 * config/riscv/vector-iterators.md: New mode attr and iterator.
8467 2023-10-11 Richard Biener <rguenther@suse.de>
8468 Jakub Jelinek <jakub@redhat.com>
8470 PR tree-optimization/111519
8471 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
8472 argument and pass it through to recursive calls and
8473 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
8474 change stmt for gimple_assign_single_p statements for which we don't
8476 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
8477 it through to recursive calls and count_nonzero_bytes calls. Don't
8478 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
8479 shadow the stmt argument.
8481 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
8483 PR middle-end/101955
8484 PR tree-optimization/106245
8485 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
8486 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
8488 2023-10-11 liuhongt <hongtao.liu@intel.com>
8491 * config/i386/mmx.md (divv4hf3): Refine predicate of
8492 operands[2] with register_operand.
8494 2023-10-10 Andrew Waterman <andrew@sifive.com>
8495 Philipp Tomsich <philipp.tomsich@vrull.eu>
8496 Jeff Law <jlaw@ventanamicro.com>
8498 * config/riscv/riscv.cc (struct machine_function): Track if a
8499 far-branch/jump is used within a function (and $ra needs to be
8501 (riscv_print_operand): Implement 'N' (inverse integer branch).
8502 (riscv_far_jump_used_p): Implement.
8503 (riscv_save_return_addr_reg_p): New function.
8504 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
8505 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
8506 (CALL_USED_REGISTERS): Update $ra.
8507 * config/riscv/riscv.md: Add new types "ret" and "jalr".
8508 (length attribute): Handle long conditional and unconditional
8510 (conditional branch pattern): Handle case where jump can not
8511 reach the intended target.
8512 (indirect_jump, tablejump): Use new "jalr" type.
8513 (simple_return): Use new "ret" type.
8514 (simple_return_internal, eh_return_internal): Likewise.
8515 (gpr_restore_return, riscv_mret): Likewise.
8516 (riscv_uret, riscv_sret): Likewise.
8517 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
8519 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
8521 2023-10-10 Andrew Pinski <pinskia@gmail.com>
8523 PR tree-optimization/111679
8524 * match.pd (`a | ((~a) ^ b)`): New pattern.
8526 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8529 * config/riscv/autovec.md: Add VLS BOOL modes.
8531 2023-10-10 Richard Biener <rguenther@suse.de>
8533 PR tree-optimization/111751
8534 * fold-const.cc (fold_view_convert_expr): Up the buffer size
8536 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
8537 constants, giving up when re-interpretation to the target type
8540 2023-10-10 Richard Biener <rguenther@suse.de>
8542 PR tree-optimization/111751
8543 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
8544 BLKmode result from the padding bits check.
8546 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
8548 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
8550 * config/arc/arc.md (addsi_compare): Make pattern canonical.
8551 (addsi_compare_2): Fix identation, constraint letters.
8552 (addsi_compare_3): Likewise.
8554 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
8556 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
8557 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
8558 when scaling loop profile
8560 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
8562 PR tree-optimization/111694
8563 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
8565 * value-relation.cc (adjust_equivalence_range): New.
8566 * value-relation.h (adjust_equivalence_range): New prototype.
8568 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
8570 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
8571 not call get_identity_relation.
8572 (gori_compute::compute_operand2_range): Ditto.
8573 * value-relation.cc (get_identity_relation): Remove.
8574 * value-relation.h (get_identity_relation): Remove protyotype.
8576 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
8578 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
8579 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
8581 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
8583 (TARGET_SCHED_ADJUST_COST): Define.
8584 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
8585 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
8586 * config/riscv/generic-ooo.md: New file.
8587 * config/riscv/vector.md: Add vsetvl_pre.
8589 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8591 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
8592 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
8593 * config/riscv/vector.md (movmisalign<mode>): New pattern.
8595 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
8597 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
8598 directives for store-pair instruction.
8600 2023-10-09 Richard Biener <rguenther@suse.de>
8602 PR tree-optimization/111715
8603 * alias.cc (reference_alias_ptr_type_1): When we have
8604 a type-punning ref at the base search for the access
8605 path part that's still semantically valid.
8607 2023-10-09 Pan Li <pan2.li@intel.com>
8609 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
8611 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
8613 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
8615 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
8616 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
8618 (ix86_split_lshr): Likewise, split shifts by one bit into
8619 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
8620 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
8621 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
8622 (rcrdi2): New define_insn for rcrq.
8623 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
8624 set the carry flag from the least significant bit, modelled using
8626 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
8627 controlling use of rcr 1 vs. shrd, which is significantly faster on
8630 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8632 * config/i386/i386.opt: Allow -mno-evex512.
8634 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8635 Hu, Lin1 <lin1.hu@intel.com>
8637 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
8640 (VFH_AVX512VL): Ditto.
8642 (VHF_AVX512VL): Ditto.
8643 (VI2H_AVX512VL): Ditto.
8644 (VI2F_256_512): Ditto.
8645 (VF48_I1248): Remove unused iterator.
8646 (VF48H_AVX512VL): Add TARGET_EVEX512.
8647 (VF_AVX512): Remove unused iterator.
8648 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
8649 (REDUC_SMINMAX_MODE): Ditto.
8651 (VFH_SF_AVX512VL): Ditto.
8652 (VEC_PERM_AVX2): Ditto.
8654 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8655 Hu, Lin1 <lin1.hu@intel.com>
8657 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
8659 (VI1_AVX512F): Ditto.
8660 (VI1_AVX512VNNI): Ditto.
8661 (VI1_AVX512VL_F): Ditto.
8662 (VI12_VI48F_AVX512VL): Ditto.
8663 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
8664 (sdot_prod<mode>): Ditto.
8665 (VEC_PERM_AVX2): Ditto.
8668 (vpmadd52<vpmadd52type>v8di): Ditto.
8669 (usdot_prod<mode>): Ditto.
8670 (vpdpbusd_v16si): Ditto.
8671 (vpdpbusds_v16si): Ditto.
8672 (vpdpwssd_v16si): Ditto.
8673 (vpdpwssds_v16si): Ditto.
8674 (VI48_AVX512VP2VL): Ditto.
8675 (avx512vp2intersect_2intersectv16si): Ditto.
8676 (VF_AVX512BF16VL): Ditto.
8677 (VF1_AVX512_256): Ditto.
8679 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8681 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
8682 Make sure there is EVEX512 enabled.
8683 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
8684 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
8685 when !TARGET_EVEX512.
8686 * config/i386/i386.md (avx512bw_512): New.
8687 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
8688 (*zero_extendsidi2): Change isa to avx512bw_512.
8691 (*andn<mode>_1): Change isa to kmov_isa.
8692 (*<code><mode>_1): Ditto.
8693 (*notxor<mode>_1): Ditto.
8694 (*one_cmpl<mode>2_1): Ditto.
8695 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
8696 (*ashl<mode>3_1): Change isa to kmov_isa.
8697 (*lshr<mode>3_1): Ditto.
8698 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
8699 (VI1248_AVX512VLBW): Ditto.
8700 (VHFBF_AVX512VL): Ditto.
8704 (VI1_AVX512): Ditto.
8705 (VI12_256_512_AVX512VL): Ditto.
8706 (VI2_AVX2_AVX512BW): Ditto.
8707 (VI2_AVX512VNNIBW): Ditto.
8708 (VI2_AVX512VL): Ditto.
8709 (VI2HFBF_AVX512VL): Ditto.
8710 (VI8_AVX2_AVX512BW): Ditto.
8711 (VIMAX_AVX2_AVX512BW): Ditto.
8712 (VIMAX_AVX512VL): Ditto.
8713 (VI12_AVX2_AVX512BW): Ditto.
8714 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
8715 (VI248_AVX512VL): Ditto.
8716 (VI248_AVX512VLBW): Ditto.
8717 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
8718 (VI248_AVX512BW): Ditto.
8719 (VI248_AVX512BW_AVX512VL): Ditto.
8721 (VI124_256_AVX512F_AVX512BW): Ditto.
8722 (VI_AVX512BW): Ditto.
8723 (VIHFBF_AVX512BW): Ditto.
8724 (SWI1248_AVX512BWDQ): Ditto.
8725 (SWI1248_AVX512BW): Ditto.
8726 (SWI1248_AVX512BWDQ2): Ditto.
8727 (*knotsi_1_zext): Ditto.
8728 (define_split for zero_extend + not): Ditto.
8730 (REDUC_SMINMAX_MODE): Ditto.
8731 (VEC_EXTRACT_MODE): Ditto.
8732 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
8733 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
8734 (truncv32hiv32qi2): Ditto.
8735 (avx512bw_<code>v32hiv32qi2): Ditto.
8736 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
8737 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
8739 (VEC_PERM_AVX2): Ditto.
8740 (AVX512ZEXTMASK): Ditto.
8742 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
8743 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
8744 (avx512bw_packssdw<mask_name>): Ditto.
8745 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
8746 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
8747 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
8748 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
8749 (vec_unpacks_lo_di): Ditto.
8751 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
8752 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
8753 (VI1248_AVX512VL_AVX512BW): Ditto.
8754 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
8755 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
8756 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
8757 (<insn>v32qiv32hi2): Ditto.
8758 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
8759 (VPERMI2): Add TARGET_EVEX512.
8762 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8764 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
8765 Add TARGET_EVEX512 for 512 bit usage.
8766 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
8767 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
8768 (VF1_128_256VL): Ditto.
8769 (VF2_AVX512VL): Ditto.
8770 (VI8_256_512): Ditto.
8771 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
8773 (AVX512_VEC): Ditto.
8774 (AVX512_VEC_2): Ditto.
8775 (VI4F_BRCST32x2): Ditto.
8776 (VI8F_BRCST64x2): Ditto.
8778 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8780 * config/i386/i386-builtins.cc
8781 (ix86_vectorize_builtin_gather): Disable 512 bit gather
8782 when !TARGET_EVEX512.
8783 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
8785 (ix86_expand_int_sse_cmp): Ditto.
8786 (ix86_expand_vector_init_one_nonzero): Disable subroutine
8787 when !TARGET_EVEX512.
8788 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
8789 (ix86_vectorize_vec_perm_const): Disable subroutine when
8791 * config/i386/i386.cc
8792 (standard_sse_constant_p): Add TARGET_EVEX512.
8793 (standard_sse_constant_opcode): Ditto.
8794 (ix86_get_ssemov): Ditto.
8795 (ix86_legitimate_constant_p): Ditto.
8796 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
8797 when !TARGET_EVEX512.
8798 * config/i386/i386.md (avx512f_512): New.
8799 (movxi): Add TARGET_EVEX512.
8800 (*movxi_internal_avx512f): Ditto.
8801 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
8803 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
8805 (*movhi_internal): Change alternative 11 to *Yv.
8806 (*movdf_internal): Change alternative 12 to Yv.
8807 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
8808 alternative 5 and 6.
8809 (*mov<mode>_internal): Change alternative 4 to Yv.
8810 (define_split for convert SF to DF): Add TARGET_EVEX512.
8811 (extendbfsf2_1): Ditto.
8812 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
8813 for 512 bit when !TARGET_EVEX512.
8814 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
8815 (V48_AVX512VL): Ditto.
8816 (V48_256_512_AVX512VL): Ditto.
8817 (V48H_AVX512VL): Ditto.
8818 (VI12_AVX512VL): Ditto.
8823 (VF1_VF2_AVX512DQ): Ditto.
8830 (VF2_512_256): Ditto.
8831 (VF2_512_256VL): Ditto.
8834 (VI48_AVX512VL): Ditto.
8835 (VI1248_AVX512VLBW): Ditto.
8836 (VF_AVX512VL): Ditto.
8837 (VFH_AVX512VL): Ditto.
8838 (VF1_AVX512VL): Ditto.
8843 (VI8_AVX512VL): Ditto.
8844 (VI2_AVX512F): Ditto.
8845 (VI4_AVX512F): Ditto.
8846 (VI4_AVX512VL): Ditto.
8847 (VI48_AVX512F_AVX512VL): Ditto.
8848 (VI8_AVX2_AVX512F): Ditto.
8849 (VI8_AVX_AVX512F): Ditto.
8852 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
8853 (VI248_AVX512VLBW): Ditto.
8854 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
8855 (VI248_AVX512BW): Ditto.
8856 (VI248_AVX512BW_AVX512VL): Ditto.
8857 (VI48_AVX512F): Ditto.
8858 (VI48_AVX_AVX512F): Ditto.
8859 (VI12_AVX_AVX512F): Ditto.
8861 (VI124_256_AVX512F_AVX512BW): Ditto.
8863 (VI_AVX512BW): Ditto.
8864 (VIHFBF_AVX512BW): Ditto.
8865 (VI4F_256_512): Ditto.
8866 (VI48F_256_512): Ditto.
8868 (VI12_VI48F_AVX512VL): Ditto.
8870 (AVX512MODE2P): Ditto.
8871 (STORENT_MODE): Ditto.
8872 (REDUC_PLUS_MODE): Ditto.
8873 (REDUC_SMINMAX_MODE): Ditto.
8874 (*andnot<mode>3): Change isa attribute to avx512f_512.
8875 (*andnot<mode>3): Ditto.
8876 (<code><mode>3): Ditto.
8878 (FMAMODEM): Add TARGET_EVEX512.
8879 (FMAMODE_AVX512): Ditto.
8880 (VFH_SF_AVX512VL): Ditto.
8881 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
8882 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
8884 (avx512f_cvtdq2pd512_2): Ditto.
8885 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
8886 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
8888 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
8889 (vec_unpacks_lo_v16sf): Ditto.
8890 (vec_unpacks_hi_v16sf): Ditto.
8891 (vec_unpacks_float_hi_v16si): Ditto.
8892 (vec_unpacks_float_lo_v16si): Ditto.
8893 (vec_unpacku_float_hi_v16si): Ditto.
8894 (vec_unpacku_float_lo_v16si): Ditto.
8895 (vec_pack_sfix_trunc_v8df): Ditto.
8896 (avx512f_vec_pack_sfix_v8df): Ditto.
8897 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
8898 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
8899 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
8900 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
8901 (AVX512_VEC): Ditto.
8902 (AVX512_VEC_2): Ditto.
8903 (vec_extract_lo_v64qi): Ditto.
8904 (vec_extract_hi_v64qi): Ditto.
8905 (VEC_EXTRACT_MODE): Ditto.
8906 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
8907 (avx512f_movddup512<mask_name>): Ditto.
8908 (avx512f_unpcklpd512<mask_name>): Ditto.
8909 (*<avx512>_vternlog<mode>_all): Ditto.
8910 (*<avx512>_vpternlog<mode>_1): Ditto.
8911 (*<avx512>_vpternlog<mode>_2): Ditto.
8912 (*<avx512>_vpternlog<mode>_3): Ditto.
8913 (avx512f_shufps512_mask): Ditto.
8914 (avx512f_shufps512_1<mask_name>): Ditto.
8915 (avx512f_shufpd512_mask): Ditto.
8916 (avx512f_shufpd512_1<mask_name>): Ditto.
8917 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
8918 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
8919 (vec_dupv2df<mask_name>): Ditto.
8920 (trunc<pmov_src_lower><mode>2): Ditto.
8921 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
8922 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
8923 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
8924 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
8925 (truncv8div8qi2): Ditto.
8926 (avx512f_<code>v8div16qi2): Ditto.
8927 (*avx512f_<code>v8div16qi2_store_1): Ditto.
8928 (*avx512f_<code>v8div16qi2_store_2): Ditto.
8929 (avx512f_<code>v8div16qi2_mask): Ditto.
8930 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
8931 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
8932 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
8933 (vec_widen_umult_even_v16si<mask_name>): Ditto.
8934 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
8935 (vec_widen_smult_even_v16si<mask_name>): Ditto.
8936 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
8937 (VEC_PERM_AVX2): Ditto.
8938 (one_cmpl<mode>2): Ditto.
8939 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
8940 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
8941 (define_split to xor): Ditto.
8942 (*andnot<mode>3): Ditto.
8943 (define_split for ior): Ditto.
8944 (*iornot<mode>3): Ditto.
8945 (*xnor<mode>3): Ditto.
8946 (*<nlogic><mode>3): Ditto.
8947 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
8948 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
8949 (avx512f_pshufdv3_mask): Ditto.
8950 (avx512f_pshufd_1<mask_name>): Ditto.
8951 (*vec_extractv4ti): Ditto.
8952 (VEXTRACTI128_MODE): Ditto.
8953 (define_split to vec_extract): Ditto.
8954 (VI1248_AVX512VL_AVX512BW): Ditto.
8955 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
8956 (<insn>v16qiv16si2): Ditto.
8957 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
8958 (<insn>v16hiv16si2): Ditto.
8959 (avx512f_zero_extendv16hiv16si2_1): Ditto.
8960 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
8961 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
8962 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
8963 (<insn>v8qiv8di2): Ditto.
8964 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
8965 (<insn>v8hiv8di2): Ditto.
8966 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
8967 (*avx512f_zero_extendv8siv8di2_1): Ditto.
8968 (*avx512f_zero_extendv8siv8di2_2): Ditto.
8969 (<insn>v8siv8di2): Ditto.
8970 (avx512f_roundps512_sfix): Ditto.
8971 (vashrv8di3): Ditto.
8972 (vashrv16si3): Ditto.
8973 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
8974 (vec_dupv4sf): Add TARGET_EVEX512.
8975 (*vec_dupv4si): Ditto.
8976 (*vec_dupv2di): Ditto.
8977 (vec_dup<mode>): Change isa attribute to avx512f_512.
8978 (VPERMI2): Add TARGET_EVEX512.
8980 (VEC_INIT_MODE): Ditto.
8981 (VEC_INIT_HALF_MODE): Ditto.
8982 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
8984 (avx512f_vcvtps2ph512_mask_sae): Ditto.
8985 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
8987 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
8988 (INT_BROADCAST_MODE): Ditto.
8990 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8992 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
8993 Disable zmm broadcast for !TARGET_EVEX512.
8994 * config/i386/i386-options.cc (ix86_option_override_internal):
8995 Do not use PVW_512 when no-evex512.
8996 (ix86_simd_clone_adjust): Add evex512 target into string.
8997 * config/i386/i386.cc (type_natural_mode): Report ABI warning
8998 when using zmm register w/o evex512.
8999 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
9000 (ix86_hard_regno_mode_ok): Ditto.
9001 (ix86_set_reg_reg_cost): Ditto.
9002 (ix86_rtx_costs): Ditto.
9003 (ix86_vector_mode_supported_p): Ditto.
9004 (ix86_preferred_simd_mode): Ditto.
9005 (ix86_get_mask_mode): Ditto.
9006 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
9007 libmvec call when !TARGET_EVEX512.
9008 (ix86_simd_clone_usable): Ditto.
9009 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
9010 when !TARGET_EVEX512
9011 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
9012 (STORE_MAX_PIECES): Ditto.
9014 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9016 * config/i386/i386-builtin.def (BDESC): Add
9017 OPTION_MASK_ISA2_EVEX512.
9019 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9021 * config/i386/i386-builtin.def (BDESC): Add
9022 OPTION_MASK_ISA2_EVEX512.
9024 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9026 * config/i386/i386-builtin.def (BDESC): Add
9027 OPTION_MASK_ISA2_EVEX512.
9029 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9031 * config/i386/i386-builtin.def (BDESC): Add
9032 OPTION_MASK_ISA2_EVEX512.
9034 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9036 * config/i386/i386-builtin.def (BDESC): Add
9037 OPTION_MASK_ISA2_EVEX512.
9038 * config/i386/i386-builtins.cc
9039 (ix86_init_mmx_sse_builtins): Ditto.
9041 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9042 Hu, Lin1 <lin1.hu@intel.com>
9044 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
9047 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9049 * config.gcc: Add avx512bitalgvlintrin.h.
9050 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
9052 * config/i386/avx5124vnniwintrin.h: Ditto.
9053 * config/i386/avx512bf16intrin.h: Ditto.
9054 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
9055 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
9056 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
9058 * config/i386/avx512ifmaintrin.h: Ditto
9059 * config/i386/avx512pfintrin.h: Ditto
9060 * config/i386/avx512vbmi2intrin.h: Ditto.
9061 * config/i386/avx512vbmiintrin.h: Ditto.
9062 * config/i386/avx512vnniintrin.h: Ditto.
9063 * config/i386/avx512vp2intersectintrin.h: Ditto.
9064 * config/i386/avx512vpopcntdqintrin.h: Ditto.
9065 * config/i386/gfniintrin.h: Ditto.
9066 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
9067 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
9068 * config/i386/vpclmulqdqintrin.h: Ditto.
9069 * config/i386/avx512bitalgvlintrin.h: New.
9071 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9073 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
9076 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9078 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
9081 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9083 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
9085 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
9087 * common/config/i386/i386-common.cc
9088 (OPTION_MASK_ISA2_EVEX512_SET): New.
9089 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
9090 (ix86_handle_option): Handle EVEX512.
9091 * config/i386/i386-c.cc
9092 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
9093 when AVX512VL is set.
9094 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
9095 (ix86_valid_target_attribute_inner_p): Ditto.
9096 (ix86_option_override_internal): Set EVEX512 target if it is not
9097 explicitly set when AVX512 is enabled. Disable
9098 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
9099 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
9101 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
9104 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
9105 from insn condition.
9106 (lrint<mode>si2): New insn pattern for 32bit lrint.
9108 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
9111 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
9112 Enable SImode on FP registers for P7.
9113 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
9114 move between FP registers. Set attribute isa of stfiwx to "*"
9115 and attribute of stxsiwx to "p7".
9117 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9119 * config/s390/s390.md: Make use of new copysign RTL.
9121 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
9123 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
9124 with "jm" for alternative 0 and 1 of operand 2.
9125 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
9126 "ja" for alternative 0 and 1 of operand2.
9128 2023-10-08 David Malcolm <dmalcolm@redhat.com>
9131 * text-art/table.cc (table::maybe_set_cell_span): New.
9132 (table::add_other_table): New.
9133 * text-art/table.h (class table::cell_placement): Add class table
9135 (table::add_rows): New.
9136 (table::add_row): Reimplement in terms of add_rows.
9137 (table::maybe_set_cell_span): New decl.
9138 (table::add_other_table): New decl.
9139 * text-art/types.h (operator+): New operator for rect + coord.
9141 2023-10-08 David Malcolm <dmalcolm@redhat.com>
9143 * genmatch.cc (main): Update for "m_" prefix of some fields of
9145 * input.cc (make_location): Update for removal of
9146 COMBINE_LOCATION_DATA.
9147 (dump_line_table_statistics): Update for "m_" prefix of some
9148 fields of line_maps.
9149 (location_with_discriminator): Update for removal of
9150 COMBINE_LOCATION_DATA.
9151 (line_table_test::line_table_test): Update for "m_" prefix of some
9152 fields of line_maps.
9153 * toplev.cc (general_init): Likewise.
9154 * tree.cc (set_block): Update for removal of
9155 COMBINE_LOCATION_DATA.
9156 (set_source_range): Likewise.
9158 2023-10-08 David Malcolm <dmalcolm@redhat.com>
9160 * input.cc (make_location): Move implementation to
9161 line_maps::make_location.
9163 2023-10-08 David Malcolm <dmalcolm@redhat.com>
9166 * input.cc (file_cache::add_file): Update leading comment to
9167 clarify that it can fail.
9168 (file_cache::lookup_or_add_file): Likewise.
9169 (file_cache::get_source_file_content): Gracefully handle
9170 lookup_or_add_file failing.
9172 2023-10-08 liuhongt <hongtao.liu@intel.com>
9174 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
9176 (ix86_build_signbit_mask): Ditto.
9177 * config/i386/mmx.md (mmxintvecmode): Ditto.
9178 (<code><mode>2): New define_expand.
9179 (*mmx_<code><mode>): New define_insn_and_split.
9180 (*mmx_nabs<mode>2): Ditto.
9181 (*mmx_andnot<mode>3): New define_insn.
9182 (<code><mode>3): Ditto.
9183 (copysign<mode>3): New define_expand.
9184 (xorsign<mode>3): Ditto.
9185 (signbit<mode>2): Ditto.
9187 2023-10-08 liuhongt <hongtao.liu@intel.com>
9189 * config/i386/mmx.md (VHF_32_64): New mode iterator.
9190 (<insn><mode>3): New define_expand, merged from ..
9191 (<insn>v4hf3): .. this and
9192 (<insn>v2hf3): .. this.
9193 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
9194 (movd_v2hf_to_sse): .. this.
9195 (<code><mode>3): New define_expand.
9197 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
9199 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
9200 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
9202 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
9204 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
9206 (can_be_built_by_li_lis_and_rldicr): New function.
9207 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
9208 can_be_built_by_li_lis_and_rldicl.
9210 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
9212 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
9214 (can_be_built_by_li_and_rotldi): Rename to ...
9215 (can_be_built_by_li_lis_and_rotldi): ... this function.
9216 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
9218 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
9220 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
9221 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
9223 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
9225 * config/riscv/linux.h: Pass the static-pie specific options to
9228 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
9230 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
9232 * config/aarch64/aarch64-tune.md: Regenerated.
9233 * doc/invoke.texi: Add command-line option for cortex-x4 core.
9235 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9236 Hongyu Wang <hongyu.wang@intel.com>
9237 Hongtao Liu <hongtao.liu@intel.com>
9239 * config/i386/constraints.md (jb): New constraint for vsib memory
9240 that does not allow gpr32.
9241 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
9242 alternative and set attr_gpr32 to 0.
9243 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
9245 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
9246 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
9247 (*rsqrtsf2_sse): Likewise.
9248 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
9249 avx/noavx and assign jr/r constraint to dest.
9250 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
9251 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
9252 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
9253 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
9254 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
9255 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
9256 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
9257 (<sse2_avx2>_pmovmskb): Likewise.
9258 (*<sse2_avx2>_pmovmskb_zext): Likewise.
9259 (*sse2_pmovmskb_ext): Likewise.
9260 (*<sse2_avx2>_pmovmskb_lt): Likewise.
9261 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
9262 (*sse2_pmovmskb_ext_lt): Likewise.
9263 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
9264 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
9265 (sse_vmrcpv4sf2): Likewise.
9266 (*sse_vmrcpv4sf2): Likewise.
9267 (rsqrt<mode>2): Likewise.
9268 (sse_vmrsqrtv4sf2): Likewise.
9269 (*sse_vmrsqrtv4sf2): Likewise.
9270 (avx_h<insn>v4df3): Likewise.
9271 (sse3_hsubv2df3): Likewise.
9272 (avx_h<insn>v8sf3): Likewise.
9273 (sse3_h<insn>v4sf3): Likewise.
9274 (<sse3>_lddqu<avxsizesuffix>): Likewise.
9275 (avx_cmp<mode>3): Likewise.
9276 (avx_vmcmp<mode>3): Likewise.
9277 (*sse2_gt<mode>3): Likewise.
9278 (sse_ldmxcsr): Likewise.
9279 (sse_stmxcsr): Likewise.
9280 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
9281 avx alternative and set attr_gpr32 to 0.
9282 (avx2_permv2ti): Likewise.
9283 (*avx_vperm2f128<mode>_full): Likewise.
9284 (*avx_vperm2f128<mode>_nozero): Likewise.
9285 (vec_set_lo_v32qi): Likewise.
9286 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
9287 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
9288 (avx_cmp<mode>3): Likewise.
9289 (avx_vmcmp<mode>3): Likewise.
9290 (*<sse>_maskcmp<mode>3_comm): Likewise.
9291 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
9293 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
9294 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
9295 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
9296 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
9297 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
9298 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
9299 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
9300 (vec_set_lo_<mode><mask_name>): Likewise.
9301 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
9302 (vec_set_hi_<mode><mask_name>): Likewise.
9303 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
9304 (vec_set_hi_<mode>): Likewise.
9305 (vec_set_lo_<mode>): Likewise.
9306 (avx2_set_hi_v32qi): Likewise.
9308 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9309 Hongyu Wang <hongyu.wang@intel.com>
9310 Hongtao Liu <hongtao.liu@intel.com>
9312 * config/i386/i386.md (*movhi_internal): Split out non-gpr
9313 supported pextrw with mem constraint to avx/noavx alternatives,
9314 set jm and attr gpr32 0 to the noavx alternative.
9315 (*mov<mode>_internal): Likewise.
9316 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
9317 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
9318 (mmx_pshufbv4qi3): Likewise.
9319 (*mmx_pinsrd): Likewise.
9320 (*mmx_pinsrb): Likewise.
9321 (*pinsrb): Likewise.
9322 (mmx_pshufbv8qi3): Likewise.
9323 (mmx_pshufbv4qi3): Likewise.
9324 (@sse4_1_insertps_<mode>): Likewise.
9325 (*mmx_pextrw): Split altrenatives and map non-EGPR
9326 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
9327 (*movv2qi_internal): Likewise.
9328 (*pextrw): Likewise.
9329 (*mmx_pextrb): Likewise.
9330 (*mmx_pextrb_zext): Likewise.
9331 (*pextrb): Likewise.
9332 (*pextrb_zext): Likewise.
9333 (vec_extractv2si_1): Likewise.
9334 (vec_extractv2si_1_zext): Likewise.
9335 * config/i386/sse.md: (vi128_h_r): New mode attr for
9336 pinsr{bw}/pextr{bw} with reg operand.
9337 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
9338 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
9339 (*vec_extract<mode>): Likewise.
9340 (*vec_extract<mode>): Likewise for HFBF pattern.
9341 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
9342 (*vec_extractv4si_1): Likewise.
9343 (*vec_extractv4si_zext): Likewise.
9344 (*vec_extractv2di_1): Likewise.
9345 (*vec_concatv2si_sse4_1): Likewise.
9346 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
9347 (vec_concatv2di): Likewise.
9348 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
9349 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
9350 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
9351 %v for avx/noavx alternatives if necessary.
9352 (*vec_concatv2sf_sse4_1): Likewise.
9353 (*sse4_1_extractps): Likewise.
9354 (vec_set<mode>_0): Likewise for VI4F_128.
9355 (*vec_setv4sf_sse4_1): Likewise.
9356 (@sse4_1_insertps<mode>): Likewise.
9357 (ssse3_pmaddubsw128): Likewise.
9358 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
9359 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
9360 (<ssse3_avx2>_palignr<mode>): Likewise.
9361 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
9362 (<sse4_1_avx2>_mpsadbw): Likewise.
9363 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
9364 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
9365 (*sse4_1_<code><mode>3<mask_name>): Likewise.
9366 (*<code>v8hi3): Likewise.
9367 (*<code>v16qi3): Likewise.
9368 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
9369 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
9370 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
9371 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
9372 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
9373 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
9374 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
9375 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
9376 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
9377 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
9378 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
9380 (aesdeclast): Likewise.
9382 (aesenclast): Likewise.
9383 (pclmulqdq): Likewise.
9384 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
9385 (vgf2p8affineqb_<mode><mask_name>): Likewise.
9386 (vgf2p8mulb_<mode><mask_name>): Likewise.
9388 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9389 Hongyu Wang <hongyu.wang@intel.com>
9390 Hongtao Liu <hongtao.liu@intel.com>
9392 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
9394 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
9396 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
9397 and constraint jm to all non-evex alternatives, adjust
9398 alternative outputs if evex reg is mentioned.
9399 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
9400 and constraint jm/ja to all non-evex alternatives.
9401 (ptesttf2): Likewise.
9402 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
9403 (sse4_1_round<ssescalarmodesuffix>): Likewise.
9404 (sse4_2_pcmpestri): Likewise.
9405 (sse4_2_pcmpestrm): Likewise.
9406 (sse4_2_pcmpestr_cconly): Likewise.
9407 (sse4_2_pcmpistr): Likewise.
9408 (sse4_2_pcmpistri): Likewise.
9409 (sse4_2_pcmpistrm): Likewise.
9410 (sse4_2_pcmpistr_cconly): Likewise.
9412 (aeskeygenassist): Likewise.
9414 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9415 Hongyu Wang <hongyu.wang@intel.com>
9416 Hongtao Liu <hongtao.liu@intel.com>
9418 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
9419 attr gpr32 0 and constraint jm/ja to all mem alternatives.
9420 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
9421 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
9422 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
9423 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
9424 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
9425 (<ssse3_avx2>_psign<mode>3): Likewise.
9426 (ssse3_psign<mode>3): Likewise.
9427 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
9428 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
9429 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
9430 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
9431 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
9432 (<sse4_1_avx2>_mpsadbw): Likewise.
9433 (<sse4_1_avx2>_pblendvb): Likewise.
9434 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
9435 (sse4_1_pblend<ssemodesuffix>): Likewise.
9436 (*avx2_pblend<ssemodesuffix>): Likewise.
9437 (avx2_permv2ti): Likewise.
9438 (*avx_vperm2f128<mode>_nozero): Likewise.
9439 (*avx2_eq<mode>3): Likewise.
9440 (*sse4_1_eqv2di3): Likewise.
9441 (sse4_2_gtv2di3): Likewise.
9442 (avx2_gt<mode>3): Likewise.
9444 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9445 Hongyu Wang <hongyu.wang@intel.com>
9446 Hongtao Liu <hongtao.liu@intel.com>
9448 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
9450 (<xsave>_rex64): Likewise.
9451 (<xrstor>_rex64): Likewise.
9452 (<xrstor>64): Likewise.
9453 (fxsave64): Likewise.
9454 (fxstore64): Likewise.
9456 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
9457 Kong Lingling <lingling.kong@intel.com>
9458 Hongtao Liu <hongtao.liu@intel.com>
9460 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
9461 adjust mnemonic for vmovduq/vmovdqa.
9462 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
9463 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
9464 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
9467 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9468 Hongyu Wang <hongyu.wang@intel.com>
9469 Hongtao Liu <hongtao.liu@intel.com>
9471 * config/i386/i386.cc (map_egpr_constraints): New funciton to
9472 map common constraints to EGPR prohibited constraints.
9473 (ix86_md_asm_adjust): Calls map_egpr_constraints.
9474 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
9476 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9477 Hongyu Wang <hongyu.wang@intel.com>
9478 Hongtao Liu <hongtao.liu@intel.com>
9480 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
9482 (ix86_regno_ok_for_insn_base_p): Likewise.
9483 (ix86_insn_index_reg_class): Likewise.
9484 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
9485 New helper function to scan the insn.
9486 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
9487 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
9488 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
9489 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
9490 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
9491 (INSN_INDEX_REG_CLASS): Likewise.
9492 (enum reg_class): Add INDEX_GPR16.
9493 (GENERAL_GPR16_REGNO_P): Define.
9494 * config/i386/i386.md (gpr32): New attribute.
9496 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9497 Hongyu Wang <hongyu.wang@intel.com>
9498 Hongtao Liu <hongtao.liu@intel.com>
9500 * config/i386/constraints.md (jr): New register constraint
9501 that prohibits EGPR.
9502 (jR): Constraint that force usage of EGPR.
9503 (jm): New memory constraint that prohibits EGPR.
9504 (ja): Likewise for Bm constraint.
9505 (jb): Likewise for Tv constraint.
9506 (j<): New auto-dec memory constraint that prohibits EGPR.
9507 (j>): Likewise for ">" constraint.
9508 (jo): Likewise for "o" constraint.
9509 (jv): Likewise for "V" constraint.
9510 (jp): Likewise for "p" constraint.
9511 * config/i386/i386.h (enum reg_class): Add new reg class
9514 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9515 Hongyu Wang <hongyu.wang@intel.com>
9516 Hongtao Liu <hongtao.liu@intel.com>
9518 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
9519 New function prototype.
9520 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
9522 (debugger64_register_map): Likewise.
9523 (ix86_conditional_register_usage): Clear REX2 register when APX
9525 (ix86_code_end): Add handling for REX2 reg.
9526 (print_reg): Likewise.
9527 (ix86_output_jmp_thunk_or_indirect): Likewise.
9528 (ix86_output_indirect_branch_via_reg): Likewise.
9529 (ix86_attr_length_vex_default): Likewise.
9530 (ix86_emit_save_regs): Adjust to allow saving r31.
9531 (ix86_register_priority): Set REX2 reg priority same as REX.
9532 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
9533 (x86_extended_rex2reg_mentioned_p): New function.
9534 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
9536 (REG_ALLOC_ORDER): Likewise.
9537 (FIRST_REX2_INT_REG): Define.
9538 (LAST_REX2_INT_REG): Ditto.
9539 (GENERAL_REGS): Add 16 new registers.
9540 (INT_SSE_REGS): Likewise.
9541 (FLOAT_INT_REGS): Likewise.
9542 (FLOAT_INT_SSE_REGS): Likewise.
9543 (INT_MASK_REGS): Likewise.
9544 (ALL_REGS):Likewise.
9545 (REX2_INT_REG_P): Define.
9546 (REX2_INT_REGNO_P): Ditto.
9547 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
9548 (REGNO_OK_FOR_INDEX_P): Ditto.
9549 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
9550 * config/i386/i386.md: Add 16 new integer general
9553 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9554 Hongyu Wang <hongyu.wang@intel.com>
9555 Hongtao Liu <hongtao.liu@intel.com>
9557 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
9558 (XCR_APX_F_ENABLED_MASK): Likewise.
9559 (get_available_features): Detect APX_F under
9560 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
9561 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
9562 (ix86_handle_option): Handle -mapxf.
9563 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
9564 * common/config/i386/i386-isas.h: Add entry for APX_F.
9565 * config/i386/cpuid.h (bit_APX_F): New.
9566 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
9567 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
9568 * config/i386/i386-opts.h (enum apx_features): New enum.
9569 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
9570 * config/i386/i386-options.cc (ix86_function_specific_save):
9571 Save ix86_apx_features.
9572 (ix86_function_specific_restore): Restore it.
9573 (ix86_valid_target_attribute_inner_p): Add mapxf.
9574 (ix86_option_override_internal): Set ix86_apx_features for PTA
9575 and TARGET_APX_F. Also reports error when APX_F is set but not
9576 having TARGET_64BIT.
9577 * config/i386/i386.opt: (-mapxf): New ISA flag option.
9578 (-mapx=): New enumeration option.
9579 (apx_features): New enum type.
9580 (apx_none): New enum value.
9581 (apx_egpr): Likewise.
9582 (apx_push2pop2): Likewise.
9583 (apx_ndd): Likewise.
9584 (apx_all): Likewise.
9585 * doc/invoke.texi: Document mapxf.
9587 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
9588 Kong Lingling <lingling.kong@intel.com>
9589 Hongtao Liu <hongtao.liu@intel.com>
9591 * addresses.h (index_reg_class): New wrapper function like
9593 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
9594 * doc/tm.texi.in: Ditto.
9595 * lra-constraints.cc (index_part_to_reg): Pass index_class.
9596 (process_address_1): Calls index_reg_class with curr_insn and
9597 replace INDEX_REG_CLASS with its return value index_cl.
9598 * reload.cc (find_reloads_address): Likewise.
9599 (find_reloads_address_1): Likewise.
9601 2023-10-07 Kong Lingling <lingling.kong@intel.com>
9602 Hongyu Wang <hongyu.wang@intel.com>
9603 Hongtao Liu <hongtao.liu@intel.com>
9605 * addresses.h (base_reg_class): Add insn argument and new macro
9606 INSN_BASE_REG_CLASS.
9607 (regno_ok_for_base_p_1): Add insn argument and new macro
9608 REGNO_OK_FOR_INSN_BASE_P.
9609 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
9610 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
9611 REGNO_OK_FOR_INSN_BASE_P.
9612 * doc/tm.texi.in: Ditto.
9613 * lra-constraints.cc (process_address_1): Pass insn to
9615 (curr_insn_transform): Ditto.
9616 * reload.cc (find_reloads): Ditto.
9617 (find_reloads_address): Ditto.
9618 (find_reloads_address_1): Ditto.
9619 (find_reloads_subreg_address): Ditto.
9620 * reload1.cc (maybe_fix_stack_asms): Ditto.
9622 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
9625 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
9628 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
9631 * config/rs6000/predicates.md (lowpart_subreg_operator): New
9633 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
9634 (movsf_from_si2): Rename to ...
9635 (movsf_from_si2_<code>): ... this.
9637 2023-10-07 Pan Li <pan2.li@intel.com>
9640 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
9641 object is a REG before extracting its' REGNO.
9643 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
9645 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
9646 one into add3_cc_overflow_1 followed by add3_carry.
9647 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
9648 "*add<mode>3_cc_overflow_1" to provide generator function.
9650 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
9651 Uros Bizjak <ubizjak@gmail.com>
9653 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
9654 to perform left shifts into shorter instructions with -Oz.
9656 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
9658 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
9660 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
9662 * doc/extend.texi (Function Attributes): Mention standard attribute
9664 (Variable Attributes): Likewise.
9665 (Type Attributes): Likewise.
9666 (Attribute Syntax): Likewise.
9668 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
9670 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
9671 (mov<mode>_exec): Likewise.
9672 (mov<mode>_sgprbase): Likewise.
9673 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
9674 (*movti_insn): Likewise.
9676 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
9678 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
9680 2023-10-06 Andrew Pinski <pinskia@gmail.com>
9682 PR middle-end/111699
9683 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
9684 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
9686 2023-10-06 Jakub Jelinek <jakub@redhat.com>
9688 * ipa-prop.h (ipa_bits): Remove.
9689 (struct ipa_jump_func): Remove bits member.
9690 (struct ipcp_transformation): Remove bits member, adjust
9692 (ipa_get_ipa_bits_for_value): Remove.
9693 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
9694 (ipa_bits_hash_table): Remove.
9695 (ipa_print_node_jump_functions_for_edge): Don't print bits.
9696 (ipa_get_ipa_bits_for_value): Remove.
9697 (ipa_set_jfunc_bits): Remove.
9698 (ipa_compute_jump_functions_for_edge): For pointers query
9699 pointer alignment before ipa_set_jfunc_vr and update_bitmask
9700 in there. For integral types, just rely on bitmask already
9701 being handled in value ranges.
9702 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
9703 (ipcp_transformation_initialize): Neither here.
9704 (ipcp_transformation_t::duplicate): Don't copy bits vector.
9705 (ipa_write_jump_function): Don't stream bits here.
9706 (ipa_read_jump_function): Neither here.
9707 (useful_ipcp_transformation_info_p): Don't test bits vec.
9708 (write_ipcp_transformation_info): Don't stream bits here.
9709 (read_ipcp_transformation_info): Neither here.
9710 (ipcp_get_parm_bits): Get mask and value from m_vr rather
9712 (ipcp_update_bits): Remove.
9713 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
9714 bitmask stored in value range.
9715 (ipcp_transform_function): Don't test bits vector, don't call
9717 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
9718 jfunc->bits, instead get mask and value from jfunc->m_vr.
9719 (ipcp_store_bits_results): Remove.
9720 (ipcp_store_vr_results): Incorporate parts of
9721 ipcp_store_bits_results here, merge the bitmasks with value
9722 range if both are supplied.
9723 (ipcp_driver): Don't call ipcp_store_bits_results.
9724 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
9727 2023-10-06 Pan Li <pan2.li@intel.com>
9729 * config/riscv/autovec.md: Update comments.
9731 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
9733 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
9735 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
9737 * timevar.def (TV_TREE_FAST_VRP): New.
9738 * tree-pass.h (make_pass_fast_vrp): New prototype.
9739 * tree-vrp.cc (class fvrp_folder): New.
9740 (fvrp_folder::fvrp_folder): New.
9741 (fvrp_folder::~fvrp_folder): New.
9742 (fvrp_folder::value_of_expr): New.
9743 (fvrp_folder::value_on_edge): New.
9744 (fvrp_folder::value_of_stmt): New.
9745 (fvrp_folder::pre_fold_bb): New.
9746 (fvrp_folder::post_fold_bb): New.
9747 (fvrp_folder::pre_fold_stmt): New.
9748 (fvrp_folder::fold_stmt): New.
9749 (execute_fast_vrp): New.
9750 (pass_data_fast_vrp): New.
9751 (pass_vrp:execute): Check for fast VRP pass.
9752 (make_pass_fast_vrp): New.
9754 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
9756 * gimple-range.cc (dom_ranger::dom_ranger): New.
9757 (dom_ranger::~dom_ranger): New.
9758 (dom_ranger::range_of_expr): New.
9759 (dom_ranger::edge_range): New.
9760 (dom_ranger::range_on_edge): New.
9761 (dom_ranger::range_in_bb): New.
9762 (dom_ranger::range_of_stmt): New.
9763 (dom_ranger::maybe_push_edge): New.
9764 (dom_ranger::pre_bb): New.
9765 (dom_ranger::post_bb): New.
9766 * gimple-range.h (class dom_ranger): New.
9768 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
9770 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
9771 (gori_calc_operands): New.
9772 (gori_on_edge): New.
9773 (gori_name_helper): New.
9774 (gori_name_on_edge): New.
9775 * gimple-range-gori.h (gori_on_edge): New prototype.
9776 (gori_name_on_edge): New prototype.
9778 2023-10-05 Sergei Trofimovich <siarheit@google.com>
9781 PR gcov-profile/111559
9782 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
9783 uninitialized probabilities when merging counters with zero
9786 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
9789 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
9790 strategy for non-default address spaces.
9791 (decide_alg): Use loop strategy as a fallback strategy for
9792 non-default address spaces.
9794 2023-10-05 Jakub Jelinek <jakub@redhat.com>
9796 * sreal.cc (verify_aritmetics): Rename to ...
9797 (verify_arithmetics): ... this.
9798 (sreal_verify_arithmetics): Adjust caller.
9800 2023-10-05 Martin Jambor <mjambor@suse.cz>
9803 2023-10-03 Martin Jambor <mjambor@suse.cz>
9806 * cgraph.h (cgraph_edge): Add a parameter to
9807 redirect_call_stmt_to_callee.
9808 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
9809 parameter to modify_call.
9810 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
9811 parameter killed_ssas, pass it to padjs->modify_call.
9812 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
9813 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
9814 Instead of substituting uses, invoke purge_transitive_uses. If
9815 hash of killed SSAs has not been provided, create a temporary one
9816 and release SSAs that have been added to it.
9817 * tree-inline.cc (redirect_all_calls): Create
9818 id->killed_new_ssa_names earlier, pass it to edge redirection,
9820 (copy_body): Release SSAs in id->killed_new_ssa_names.
9822 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9824 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
9825 (vec_series<mode>): Ditto.
9826 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
9827 (shuffle_decompress_patterns): Ditto.
9829 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
9831 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
9832 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
9833 (arc_ccfsm_record_branch_deleted): Likewise.
9834 (arc_ccfsm_cond_exec_p): Likewise.
9835 (arc_ccfsm): Likewise.
9836 (arc_ccfsm_record_condition): Likewise.
9837 (make_pass_arc_ifcvt): Likewise.
9838 * config/arc/arc.cc (arc_ccfsm): Remove.
9839 (arc_ccfsm_current): Likewise.
9840 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
9841 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
9842 (ARC_CCFSM_COND_EXEC_P): Likewise.
9843 (CCFSM_ISCOMPACT): Likewise.
9844 (CCFSM_DBR_ISCOMPACT): Likewise.
9845 (machine_function): Remove ccfsm related fields.
9846 (arc_ifcvt): Remove pass.
9847 (arc_print_operand): Remove `#` punct operand and other ccfsm
9849 (arc_ccfsm_advance): Remove.
9850 (arc_ccfsm_at_label): Likewise.
9851 (arc_ccfsm_record_condition): Likewise.
9852 (arc_ccfsm_post_advance): Likewise.
9853 (arc_ccfsm_branch_deleted_p): Likewise.
9854 (arc_ccfsm_record_branch_deleted): Likewise.
9855 (arc_ccfsm_cond_exec_p): Likewise.
9856 (arc_get_ccfsm_cond): Likewise.
9857 (arc_final_prescan_insn): Remove ccfsm references.
9858 (arc_internal_label): Likewise.
9859 (arc_reorg): Likewise.
9860 (arc_output_libcall): Likewise.
9861 * config/arc/arc.md: Remove ccfsm references and update related
9862 instruction patterns.
9864 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
9866 * config/arc/arc.cc (arc_init): Remove '^' punct char.
9867 (arc_print_operand): Remove related code.
9868 * config/arc/arc.md: Update patterns which uses '%&'.
9870 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
9872 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
9873 (arc_toggle_unalign): Likewise.
9874 * config/arc/arc.cc (machine_function) Remove unalign.
9875 (arc_init): Remove `&` punct character.
9876 (arc_print_operand): Remove `&` related functions.
9877 (arc_verify_short): Update function's number of parameters.
9878 (output_short_suffix): Update function.
9879 (arc_short_long): Likewise.
9880 (arc_clear_unalign): Remove.
9881 (arc_toggle_unalign): Likewise.
9882 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
9883 (ASM_OUTPUT_ALIGN): Update.
9884 * config/arc/arc.md: Remove all `%&` references.
9885 * config/arc/arc.opt (mannotate-align): Ignore option.
9886 * doc/invoke.texi (mannotate-align): Update description.
9888 2023-10-05 Richard Biener <rguenther@suse.de>
9890 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
9891 ask for internal_fn_p (CFN_LAST).
9893 2023-10-05 Richard Biener <rguenther@suse.de>
9895 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
9896 visited value numbers are available itself.
9898 2023-10-05 Richard Biener <rguenther@suse.de>
9901 * doc/extend.texi (attribute flatten): Clarify.
9903 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
9905 * config/arc/arc-protos.h (emit_shift): Delete prototype.
9906 (arc_pre_reload_split): New function prototype.
9907 * config/arc/arc.cc (emit_shift): Delete function.
9908 (arc_pre_reload_split): New predicate function, copied from i386,
9909 to schedule define_insn_and_split splitters to the split1 pass.
9910 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
9911 (ashrsi3): Likewise.
9912 (lshrsi3): Likewise.
9913 (shift_si3): Move after other shift patterns, and disable when
9914 operands[2] is one (which is handled by its own define_insn).
9915 Use shiftr4_operator, instead of shift4_operator, as this is no
9916 longer used for left shifts.
9917 (shift_si3_loop): Likewise. Additionally remove match_scratch.
9918 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
9919 (*ashrsi3_nobs): Likewise.
9920 (*lshrsi3_nobs): Likewise.
9921 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
9922 (add_shift): Rename define_insn from *add_shift.
9923 * config/arc/predicates.md (shiftl4_operator): Delete.
9924 (shift4_operator): Delete.
9926 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
9928 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
9929 Change type attribute to "unary", as this doesn't have operands[2].
9930 Change length attribute to "*,4" to allow compact representation.
9931 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
9932 insn type attribute to "unary", as this doesn't have operands[2].
9933 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
9934 insn type attribute to "unary", as this doesn't have operands[2].
9936 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
9938 PR rtl-optimization/110701
9939 * combine.cc (record_dead_and_set_regs_1): Split comment into
9940 pieces placed before the relevant clauses. When the SET_DEST
9941 is a partial_subreg_p, mark the bits outside of the updated
9942 portion of the destination as undefined.
9944 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
9947 * opt-read.awk: Drop multidimensional arrays.
9948 * opth-gen.awk: Ditto.
9950 2023-10-04 Xi Ruoyao <xry111@xry111.site>
9952 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
9953 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
9955 2023-10-04 Jakub Jelinek <jakub@redhat.com>
9957 PR middle-end/111369
9958 * match.pd (x == cstN ? cst4 : cst3): Use
9959 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
9960 Fix comment typo. Formatting fix.
9961 (a?~t:t -> (-(a))^t): Always convert to type rather
9962 than using build_nonstandard_integer_type. Perform negation
9963 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
9965 2023-10-04 Jakub Jelinek <jakub@redhat.com>
9967 PR tree-optimization/111668
9968 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
9969 a ? 0 : -1 cases before the powerof2cst cases and differentiate
9970 between 1-bit precision types, larger precision boolean types
9971 and other integral types. Fix comment pastos and formatting.
9973 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
9975 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
9976 pointers rather than range_info_get_range.
9978 2023-10-03 Martin Jambor <mjambor@suse.cz>
9980 * ipa-modref.h (modref_summary::dump): Make const.
9981 * ipa-modref.cc (modref_summary::dump): Likewise.
9982 (dump_lto_records): Dump to out instead of dump_file.
9984 2023-10-03 Martin Jambor <mjambor@suse.cz>
9987 * ipa-param-manipulation.cc
9988 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
9989 return uses of PARAM will be removed.
9990 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
9991 * ipa-sra.cc (isra_param_desc): New fields
9992 remove_only_when_retval_removed and split_only_when_retval_removed.
9993 (struct gensum_param_desc): Likewise. Fix comment long line.
9994 (ipa_sra_function_summaries::duplicate): Copy the new flags.
9995 (dump_gensum_param_descriptor): Dump the new flags.
9996 (dump_isra_param_descriptor): Likewise.
9997 (isra_track_scalar_value_uses): New parameter desc. Set its flag
9998 remove_only_when_retval_removed when encountering a simple return.
9999 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
10000 with desc. Pass it to isra_track_scalar_value_uses and set its
10002 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
10003 parameter. If there is a direct return use, mark any..
10004 (create_parameter_descriptors): Pass the whole parameter descriptor to
10005 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
10006 (process_scan_results): Copy the new flags.
10007 (isra_write_node_summary): Stream the new flags.
10008 (isra_read_node_info): Likewise.
10009 (adjust_parameter_descriptions): Check that transformations
10010 requring return removal only happen when return value is removed.
10011 Restructure main loop. Adjust dump message.
10013 2023-10-03 Martin Jambor <mjambor@suse.cz>
10016 * cgraph.h (cgraph_edge): Add a parameter to
10017 redirect_call_stmt_to_callee.
10018 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
10019 parameter to modify_call.
10020 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
10021 parameter killed_ssas, pass it to padjs->modify_call.
10022 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
10023 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
10024 Instead of substituting uses, invoke purge_transitive_uses. If
10025 hash of killed SSAs has not been provided, create a temporary one
10026 and release SSAs that have been added to it.
10027 * tree-inline.cc (redirect_all_calls): Create
10028 id->killed_new_ssa_names earlier, pass it to edge redirection,
10030 (copy_body): Release SSAs in id->killed_new_ssa_names.
10032 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
10034 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
10035 * tree-vrp.cc (vrp_pass_num): Remove.
10036 (pass_vrp::my_pass): Remove.
10037 (pass_vrp::pass_vrp): Add warn_p as a parameter.
10038 (pass_vrp::final_p): New.
10039 (pass_vrp::set_pass_param): Set final_p param.
10040 (pass_vrp::execute): Call execute_range_vrp with no conditions.
10041 (make_pass_vrp): Pass additional parameter.
10042 (make_pass_early_vrp): Ditto.
10044 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
10046 * tree-ssanames.cc (set_range_info): Return true only if the
10047 current value changes.
10049 2023-10-03 David Malcolm <dmalcolm@redhat.com>
10051 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
10052 prefixes to text_info fields.
10053 (diagnostic_report_diagnostic): Likewise.
10054 (verbatim): Use text_info ctor.
10055 (simple_diagnostic_path::add_event): Likewise.
10056 (simple_diagnostic_path::add_thread_event): Likewise.
10057 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
10058 "m_" prefixes to text_info fields.
10059 (dump_context::dump_printf_va): Use text_info ctor.
10060 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
10061 (graphviz_out::print): Likewise.
10062 * opt-problem.cc (opt_problem::opt_problem): Likewise.
10063 * pretty-print.cc (pp_format): Update for "m_" prefixes to
10065 (pp_printf): Use text_info ctor.
10066 (pp_verbatim): Likewise.
10067 (assert_pp_format_va): Likewise.
10068 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
10070 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
10072 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
10073 prefixes to text_info fields.
10074 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
10076 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
10078 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
10079 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
10080 (*scc_insn): Don't split to a conditional move sequence for LTU.
10082 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
10084 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
10085 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
10086 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
10087 (load_pair_dw_<DX:mode><DX2:mode>)
10088 (store_pair_sw_<SX:mode><SX2:mode>)
10089 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
10090 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
10091 (*extend<SHORT:mode><GPI:mode>2_aarch64)
10092 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
10093 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
10094 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
10095 (add<mode>3_compare0, *addsi3_compare0_uxtw)
10096 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
10097 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
10098 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
10099 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
10100 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
10101 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
10102 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
10103 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
10104 (*aarch64_ashl_sisd_or_int_<mode>3)
10105 (*aarch64_lshr_sisd_or_int_<mode>3)
10106 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
10107 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
10108 (<optab><fcvt_target><GPF:mode>2)
10109 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
10110 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
10111 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
10113 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
10114 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
10115 (*aarch64_mul_unpredicated_<mode>)
10116 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
10117 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
10118 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
10119 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
10120 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
10121 (@aarch64_sve_<sve_int_op>_lane_<mode>)
10122 (@aarch64_sve_add_mul_lane_<mode>)
10123 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
10124 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
10125 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
10126 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
10127 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
10128 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
10129 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
10130 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
10131 (@aarch64_sve_qadd_<sve_int_op><mode>)
10132 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
10133 (@aarch64_sve_sub_<sve_int_op><mode>)
10134 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
10135 (@aarch64_sve_qsub_<sve_int_op><mode>)
10136 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
10137 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
10138 (@aarch64_pred_<sve_int_op><mode>)
10139 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
10140 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
10141 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
10142 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
10143 (*cond_<sve_fp_op><mode>_any_relaxed)
10144 (*cond_<sve_fp_op><mode>_any_strict)
10145 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
10146 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
10147 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
10148 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
10149 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
10150 (*aarch64_sve_mov<mode>, aarch64_wrffr)
10151 (mask_scatter_store<mode><v_int_container>)
10152 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
10153 (*mask_scatter_store<mode><v_int_container>_sxtw)
10154 (*mask_scatter_store<mode><v_int_container>_uxtw)
10155 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
10156 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
10157 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
10158 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
10159 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
10160 (vec_series<mode>, @extract_<last_op>_<mode>)
10161 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
10162 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
10163 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
10164 (@cond_<optab><mode>)
10165 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
10166 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
10167 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
10168 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
10169 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
10170 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
10171 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
10172 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
10173 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
10174 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
10175 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
10176 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
10177 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
10178 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
10179 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
10180 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
10181 (*cond_bic<mode>_2, *cond_bic<mode>_any)
10182 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
10183 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
10184 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
10185 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
10186 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
10187 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
10188 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
10189 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
10190 (*cond_<optab><mode>_2_const_relaxed)
10191 (*cond_<optab><mode>_2_const_strict)
10192 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
10193 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
10194 (*cond_<optab><mode>_any_const_relaxed)
10195 (*cond_<optab><mode>_any_const_strict)
10196 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
10197 (*cond_add<mode>_2_const_strict)
10198 (*cond_add<mode>_any_const_relaxed)
10199 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
10200 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
10201 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
10202 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
10203 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
10204 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
10205 (*aarch64_pred_abd<mode>_strict)
10206 (*aarch64_cond_abd<mode>_2_relaxed)
10207 (*aarch64_cond_abd<mode>_2_strict)
10208 (*aarch64_cond_abd<mode>_3_relaxed)
10209 (*aarch64_cond_abd<mode>_3_strict)
10210 (*aarch64_cond_abd<mode>_any_relaxed)
10211 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
10212 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
10213 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
10214 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
10215 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
10216 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
10217 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
10218 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
10219 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
10220 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
10221 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
10222 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
10223 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
10224 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
10225 (@aarch64_sve_<sve_fp_op>vnx4sf)
10226 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
10227 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
10228 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
10229 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
10230 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
10231 (@aarch64_fold_extract_vector_<last_op>_<mode>)
10232 (@aarch64_sve_splice<mode>)
10233 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
10234 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
10235 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
10236 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
10237 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
10238 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
10239 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
10240 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
10241 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
10242 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
10243 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
10244 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
10245 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
10246 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
10247 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
10248 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
10249 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
10251 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
10252 (load_pair<DREG:mode><DREG2:mode>)
10253 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
10254 (aarch64_simd_mov_from_<mode>low)
10255 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
10256 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
10257 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
10258 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
10259 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
10260 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
10261 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
10262 (*aarch64_combinez_be<mode>)
10263 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
10264 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
10265 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
10267 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
10269 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
10270 in new compact pattern syntax.
10272 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
10274 * gensupport.cc (convert_syntax): Updated to support unordered
10275 constraints in compact syntax.
10277 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
10279 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
10280 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
10281 (copysign<mode>3_hard): Likewise.
10282 (copysign<mode>3_soft): Likewise.
10283 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
10285 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
10288 2023-10-02 David Malcolm <dmalcolm@redhat.com>
10290 * diagnostic-format-json.cc (toplevel_array): Remove global in
10291 favor of json_output_format::m_top_level_array.
10292 (cur_group): Likewise, for json_output_format::m_cur_group.
10293 (cur_children_array): Likewise, for
10294 json_output_format::m_cur_children_array.
10295 (class json_output_format): New.
10296 (json_begin_diagnostic): Remove, in favor of
10297 json_output_format::on_begin_diagnostic.
10298 (json_end_diagnostic): Convert to...
10299 (json_output_format::on_end_diagnostic): ...this.
10300 (json_begin_group): Remove, in favor of
10301 json_output_format::on_begin_group.
10302 (json_end_group): Remove, in favor of
10303 json_output_format::on_end_group.
10304 (json_flush_to_file): Remove, in favor of
10305 json_output_format::flush_to_file.
10306 (json_stderr_final_cb): Remove, in favor of json_output_format
10308 (json_output_base_file_name): Remove global.
10309 (class json_stderr_output_format): New.
10310 (json_file_final_cb): Remove.
10311 (class json_file_output_format): New.
10312 (json_emit_diagram): Remove.
10313 (diagnostic_output_format_init_json): Update.
10314 (diagnostic_output_format_init_json_file): Update.
10315 * diagnostic-format-sarif.cc (the_builder): Remove this global,
10316 moving to a field of the sarif_output_format.
10317 (sarif_builder::maybe_make_artifact_content_object): Use the
10318 context's m_file_cache.
10319 (get_source_lines): Convert to...
10320 (sarif_builder::get_source_lines): ...this, using context's
10322 (sarif_begin_diagnostic): Remove, in favor of
10323 sarif_output_format::on_begin_diagnostic.
10324 (sarif_end_diagnostic): Remove, in favor of
10325 sarif_output_format::on_end_diagnostic.
10326 (sarif_begin_group): Remove, in favor of
10327 sarif_output_format::on_begin_group.
10328 (sarif_end_group): Remove, in favor of
10329 sarif_output_format::on_end_group.
10330 (sarif_flush_to_file): Delete.
10331 (sarif_stderr_final_cb): Delete.
10332 (sarif_output_base_file_name): Delete.
10333 (sarif_file_final_cb): Delete.
10334 (class sarif_output_format): New.
10335 (sarif_emit_diagram): Delete.
10336 (class sarif_stream_output_format): New.
10337 (class sarif_file_output_format): New.
10338 (diagnostic_output_format_init_sarif): Update.
10339 (diagnostic_output_format_init_sarif_stderr): Update.
10340 (diagnostic_output_format_init_sarif_file): Update.
10341 (diagnostic_output_format_init_sarif_stream): Update.
10342 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
10343 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
10344 diagnostic_text_output_format's dtor.
10345 (diagnostic_initialize): Update, making a new instance of
10346 diagnostic_text_output_format.
10347 (diagnostic_finish): Delete m_output_format, rather than calling
10349 (diagnostic_report_diagnostic): Assert that m_output_format is
10350 non-NULL. Replace call to begin_group_cb with call to
10351 m_output_format->on_begin_group. Replace call to
10352 diagnostic_starter with call to
10353 m_output_format->on_begin_diagnostic. Replace call to
10354 diagnostic_finalizer with call to
10355 m_output_format->on_end_diagnostic.
10356 (diagnostic_emit_diagram): Replace both optional call to
10357 m_diagrams.m_emission_cb and default implementation with call to
10358 m_output_format->on_diagram. Move default implementation to
10359 diagnostic_text_output_format::on_diagram.
10360 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
10361 end_group_cb with call to m_output_format->on_end_group.
10362 (diagnostic_text_output_format::~diagnostic_text_output_format):
10363 New, based on default_diagnostic_final_cb.
10364 (diagnostic_text_output_format::on_begin_diagnostic): New, based
10365 on code from diagnostic_report_diagnostic.
10366 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
10367 (diagnostic_text_output_format::on_diagram): New, based on code
10368 from diagnostic_emit_diagram.
10369 * diagnostic.h (class diagnostic_output_format): New.
10370 (class diagnostic_text_output_format): New.
10371 (diagnostic_context::begin_diagnostic): Move to...
10372 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
10373 (diagnostic_context::start_span): Move to...
10374 (diagnostic_context::m_text_callbacks::start_span): ...here.
10375 (diagnostic_context::end_diagnostic): Move to...
10376 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
10377 (diagnostic_context::begin_group_cb): Remove, in favor of
10378 m_output_format->on_begin_group.
10379 (diagnostic_context::end_group_cb): Remove, in favor of
10380 m_output_format->on_end_group.
10381 (diagnostic_context::final_cb): Remove, in favor of
10382 m_output_format's dtor.
10383 (diagnostic_context::m_output_format): New field.
10384 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
10385 of m_output_format->on_diagram.
10386 (diagnostic_starter): Update.
10387 (diagnostic_finalizer): Update.
10388 (diagnostic_output_format_init_sarif_stream): New.
10389 * input.cc (location_get_source_line): Move implementation apart from
10390 call to diagnostic_file_cache_init to...
10391 (file_cache::get_source_line): ...this new function...
10392 (location_get_source_line): ...and reintroduce, rewritten in terms of
10393 file_cache::get_source_line.
10394 (get_source_file_content): Likewise, refactor into...
10395 (file_cache::get_source_file_content): ...this new function.
10396 * input.h (file_cache::get_source_line): New decl.
10397 (file_cache::get_source_file_content): New decl.
10398 * selftest-diagnostic.cc
10399 (test_diagnostic_context::test_diagnostic_context): Update.
10400 * tree-diagnostic-path.cc (event_range::print): Update for
10401 change to diagnostic_context's start_span callback.
10403 2023-10-02 David Malcolm <dmalcolm@redhat.com>
10405 * diagnostic-show-locus.cc: Update for reorganization of
10406 source-printing fields of diagnostic_context.
10407 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
10408 (diagnostic_initialize): Likewise.
10409 * diagnostic.h (diagnostic_context::show_caret): Move to...
10410 (diagnostic_context::m_source_printing::enabled): ...here.
10411 (diagnostic_context::caret_max_width): Move to...
10412 (diagnostic_context::m_source_printing::max_width): ...here.
10413 (diagnostic_context::caret_chars): Move to...
10414 (diagnostic_context::m_source_printing::caret_chars): ...here.
10415 (diagnostic_context::colorize_source_p): Move to...
10416 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
10417 (diagnostic_context::show_labels_p): Move to...
10418 (diagnostic_context::m_source_printing::show_labels_p): ...here.
10419 (diagnostic_context::show_line_numbers_p): Move to...
10420 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
10421 (diagnostic_context::min_margin_width): Move to...
10422 (diagnostic_context::m_source_printing::min_margin_width): ...here.
10423 (diagnostic_context::show_ruler_p): Move to...
10424 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
10425 (diagnostic_same_line): Update for above changes.
10426 * opts.cc (common_handle_option): Update for reorganization of
10427 source-printing fields of diagnostic_context.
10428 * selftest-diagnostic.cc
10429 (test_diagnostic_context::test_diagnostic_context): Likewise.
10430 * toplev.cc (general_init): Likewise.
10431 * tree-diagnostic-path.cc (struct event_range): Likewise.
10433 2023-10-02 David Malcolm <dmalcolm@redhat.com>
10435 * diagnostic.cc (diagnostic_initialize): Initialize
10436 set_locations_cb to nullptr.
10438 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
10441 * config/arm/constraints.md: Remove Pf constraint.
10442 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
10443 (arm_atomic_load_acquire<mode>): Likewise.
10444 (arm_atomic_store<mode>): Likewise.
10445 (arm_atomic_store_release<mode>): Likewise.
10446 (atomic_load<mode>): Switch patterns to define_expand.
10447 (atomic_store<mode>): Likewise.
10448 (arm_atomic_loaddi2_ldrd): Remove predication.
10449 (arm_load_exclusive<mode>): Likewise.
10450 (arm_load_acquire_exclusive<mode>): Likewise.
10451 (arm_load_exclusivesi): Likewise.
10452 (arm_load_acquire_exclusivesi): Likewise.
10453 (arm_load_exclusivedi): Likewise.
10454 (arm_load_acquire_exclusivedi): Likewise.
10455 (arm_store_exclusive<mode>): Likewise.
10456 (arm_store_release_exclusivedi): Likewise.
10457 (arm_store_release_exclusive<mode>): Likewise.
10458 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
10460 2023-10-02 Tamar Christina <tamar.christina@arm.com>
10463 2023-10-02 Tamar Christina <tamar.christina@arm.com>
10465 PR tree-optimization/109154
10466 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
10467 (cmp_arg_entry): New.
10468 (predicate_scalar_phi): Use it.
10470 2023-10-02 Tamar Christina <tamar.christina@arm.com>
10472 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
10473 (@xorsign<mode>3): ...This.
10474 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
10475 (@xorsign<mode>3): ..This and emit vectors directly
10476 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
10478 2023-10-02 Tamar Christina <tamar.christina@arm.com>
10480 * emit-rtl.cc (validate_subreg): Relax subreg rule.
10482 2023-10-02 Tamar Christina <tamar.christina@arm.com>
10484 PR tree-optimization/109154
10485 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
10486 (cmp_arg_entry): New.
10487 (predicate_scalar_phi): Use it.
10489 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
10491 PR bootstrap/111642
10492 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
10493 poly_int64 typedef.
10494 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
10496 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
10497 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10499 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
10501 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
10503 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
10505 (cpymem<P:mode>) .. this.
10507 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10509 * combine.cc (simplify_compare_const): Properly handle unsigned
10510 constants while narrowing comparison of memory and constants.
10512 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
10514 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
10515 (MASK_ZIFENCEI): Delete;
10516 (MASK_ZIHINTNTL): Ditto.
10517 (MASK_ZIHINTPAUSE): Ditto.
10518 (TARGET_ZICSR): Ditto.
10519 (TARGET_ZIFENCEI): Ditto.
10520 (TARGET_ZIHINTNTL): Ditto.
10521 (TARGET_ZIHINTPAUSE): Ditto.
10522 (MASK_ZAWRS): Ditto.
10523 (TARGET_ZAWRS): Ditto.
10528 (TARGET_ZBA): Ditto.
10529 (TARGET_ZBB): Ditto.
10530 (TARGET_ZBC): Ditto.
10531 (TARGET_ZBS): Ditto.
10532 (MASK_ZFINX): Ditto.
10533 (MASK_ZDINX): Ditto.
10534 (MASK_ZHINX): Ditto.
10535 (MASK_ZHINXMIN): Ditto.
10536 (TARGET_ZFINX): Ditto.
10537 (TARGET_ZDINX): Ditto.
10538 (TARGET_ZHINX): Ditto.
10539 (TARGET_ZHINXMIN): Ditto.
10540 (MASK_ZBKB): Ditto.
10541 (MASK_ZBKC): Ditto.
10542 (MASK_ZBKX): Ditto.
10543 (MASK_ZKNE): Ditto.
10544 (MASK_ZKND): Ditto.
10545 (MASK_ZKNH): Ditto.
10547 (MASK_ZKSED): Ditto.
10548 (MASK_ZKSH): Ditto.
10550 (TARGET_ZBKB): Ditto.
10551 (TARGET_ZBKC): Ditto.
10552 (TARGET_ZBKX): Ditto.
10553 (TARGET_ZKNE): Ditto.
10554 (TARGET_ZKND): Ditto.
10555 (TARGET_ZKNH): Ditto.
10556 (TARGET_ZKR): Ditto.
10557 (TARGET_ZKSED): Ditto.
10558 (TARGET_ZKSH): Ditto.
10559 (TARGET_ZKT): Ditto.
10560 (MASK_ZTSO): Ditto.
10561 (TARGET_ZTSO): Ditto.
10562 (MASK_VECTOR_ELEN_32): Ditto.
10563 (MASK_VECTOR_ELEN_64): Ditto.
10564 (MASK_VECTOR_ELEN_FP_32): Ditto.
10565 (MASK_VECTOR_ELEN_FP_64): Ditto.
10566 (MASK_VECTOR_ELEN_FP_16): Ditto.
10567 (TARGET_VECTOR_ELEN_32): Ditto.
10568 (TARGET_VECTOR_ELEN_64): Ditto.
10569 (TARGET_VECTOR_ELEN_FP_32): Ditto.
10570 (TARGET_VECTOR_ELEN_FP_64): Ditto.
10571 (TARGET_VECTOR_ELEN_FP_16): Ditto.
10572 (MASK_ZVBB): Ditto.
10573 (MASK_ZVBC): Ditto.
10574 (TARGET_ZVBB): Ditto.
10575 (TARGET_ZVBC): Ditto.
10576 (MASK_ZVKG): Ditto.
10577 (MASK_ZVKNED): Ditto.
10578 (MASK_ZVKNHA): Ditto.
10579 (MASK_ZVKNHB): Ditto.
10580 (MASK_ZVKSED): Ditto.
10581 (MASK_ZVKSH): Ditto.
10582 (MASK_ZVKN): Ditto.
10583 (MASK_ZVKNC): Ditto.
10584 (MASK_ZVKNG): Ditto.
10585 (MASK_ZVKS): Ditto.
10586 (MASK_ZVKSC): Ditto.
10587 (MASK_ZVKSG): Ditto.
10588 (MASK_ZVKT): Ditto.
10589 (TARGET_ZVKG): Ditto.
10590 (TARGET_ZVKNED): Ditto.
10591 (TARGET_ZVKNHA): Ditto.
10592 (TARGET_ZVKNHB): Ditto.
10593 (TARGET_ZVKSED): Ditto.
10594 (TARGET_ZVKSH): Ditto.
10595 (TARGET_ZVKN): Ditto.
10596 (TARGET_ZVKNC): Ditto.
10597 (TARGET_ZVKNG): Ditto.
10598 (TARGET_ZVKS): Ditto.
10599 (TARGET_ZVKSC): Ditto.
10600 (TARGET_ZVKSG): Ditto.
10601 (TARGET_ZVKT): Ditto.
10602 (MASK_ZVL32B): Ditto.
10603 (MASK_ZVL64B): Ditto.
10604 (MASK_ZVL128B): Ditto.
10605 (MASK_ZVL256B): Ditto.
10606 (MASK_ZVL512B): Ditto.
10607 (MASK_ZVL1024B): Ditto.
10608 (MASK_ZVL2048B): Ditto.
10609 (MASK_ZVL4096B): Ditto.
10610 (MASK_ZVL8192B): Ditto.
10611 (MASK_ZVL16384B): Ditto.
10612 (MASK_ZVL32768B): Ditto.
10613 (MASK_ZVL65536B): Ditto.
10614 (TARGET_ZVL32B): Ditto.
10615 (TARGET_ZVL64B): Ditto.
10616 (TARGET_ZVL128B): Ditto.
10617 (TARGET_ZVL256B): Ditto.
10618 (TARGET_ZVL512B): Ditto.
10619 (TARGET_ZVL1024B): Ditto.
10620 (TARGET_ZVL2048B): Ditto.
10621 (TARGET_ZVL4096B): Ditto.
10622 (TARGET_ZVL8192B): Ditto.
10623 (TARGET_ZVL16384B): Ditto.
10624 (TARGET_ZVL32768B): Ditto.
10625 (TARGET_ZVL65536B): Ditto.
10626 (MASK_ZICBOZ): Ditto.
10627 (MASK_ZICBOM): Ditto.
10628 (MASK_ZICBOP): Ditto.
10629 (TARGET_ZICBOZ): Ditto.
10630 (TARGET_ZICBOM): Ditto.
10631 (TARGET_ZICBOP): Ditto.
10632 (MASK_ZICOND): Ditto.
10633 (TARGET_ZICOND): Ditto.
10635 (TARGET_ZFA): Ditto.
10636 (MASK_ZFHMIN): Ditto.
10638 (MASK_ZVFHMIN): Ditto.
10639 (MASK_ZVFH): Ditto.
10640 (TARGET_ZFHMIN): Ditto.
10641 (TARGET_ZFH): Ditto.
10642 (TARGET_ZVFHMIN): Ditto.
10643 (TARGET_ZVFH): Ditto.
10644 (MASK_ZMMUL): Ditto.
10645 (TARGET_ZMMUL): Ditto.
10651 (MASK_ZCMP): Ditto.
10652 (MASK_ZCMT): Ditto.
10653 (TARGET_ZCA): Ditto.
10654 (TARGET_ZCB): Ditto.
10655 (TARGET_ZCE): Ditto.
10656 (TARGET_ZCF): Ditto.
10657 (TARGET_ZCD): Ditto.
10658 (TARGET_ZCMP): Ditto.
10659 (TARGET_ZCMT): Ditto.
10660 (MASK_SVINVAL): Ditto.
10661 (MASK_SVNAPOT): Ditto.
10662 (TARGET_SVINVAL): Ditto.
10663 (TARGET_SVNAPOT): Ditto.
10664 (MASK_XTHEADBA): Ditto.
10665 (MASK_XTHEADBB): Ditto.
10666 (MASK_XTHEADBS): Ditto.
10667 (MASK_XTHEADCMO): Ditto.
10668 (MASK_XTHEADCONDMOV): Ditto.
10669 (MASK_XTHEADFMEMIDX): Ditto.
10670 (MASK_XTHEADFMV): Ditto.
10671 (MASK_XTHEADINT): Ditto.
10672 (MASK_XTHEADMAC): Ditto.
10673 (MASK_XTHEADMEMIDX): Ditto.
10674 (MASK_XTHEADMEMPAIR): Ditto.
10675 (MASK_XTHEADSYNC): Ditto.
10676 (TARGET_XTHEADBA): Ditto.
10677 (TARGET_XTHEADBB): Ditto.
10678 (TARGET_XTHEADBS): Ditto.
10679 (TARGET_XTHEADCMO): Ditto.
10680 (TARGET_XTHEADCONDMOV): Ditto.
10681 (TARGET_XTHEADFMEMIDX): Ditto.
10682 (TARGET_XTHEADFMV): Ditto.
10683 (TARGET_XTHEADINT): Ditto.
10684 (TARGET_XTHEADMAC): Ditto.
10685 (TARGET_XTHEADMEMIDX): Ditto.
10686 (TARGET_XTHEADMEMPAIR): Ditto.
10687 (TARGET_XTHEADSYNC): Ditto.
10688 (MASK_XVENTANACONDOPS): Ditto.
10689 (TARGET_XVENTANACONDOPS): Ditto.
10690 * config/riscv/riscv.opt: Add new Mask defination.
10691 * doc/options.texi: Add explanation for this new usage.
10692 * opt-functions.awk: Add new function to find the index
10693 of target variable from extra_target_vars.
10694 * opt-read.awk: Add new function to store the Mask flags.
10695 * opth-gen.awk: Add new function to output the defination of
10696 Mask Macro and Target Macro.
10698 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
10699 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10700 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10703 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
10704 Change second parameter to rtx *.
10705 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
10706 * config/riscv/vector.md: Changed callers of
10707 riscv_vector::legitimize_move.
10708 (*mov<mode>_mem_to_mem): Remove.
10710 2023-09-30 Jakub Jelinek <jakub@redhat.com>
10713 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
10714 Replace safe_grow with safe_grow_cleared.
10716 2023-09-30 Jakub Jelinek <jakub@redhat.com>
10718 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
10719 in function comment.
10721 2023-09-30 Jakub Jelinek <jakub@redhat.com>
10723 PR middle-end/111625
10724 PR middle-end/111637
10725 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
10727 (bitint_large_huge::handle_operand_addr): For uninitialized operands
10728 use limb_prec or -limb_prec precision.
10730 2023-09-30 Jakub Jelinek <jakub@redhat.com>
10732 * vec.h (quick_grow): Uncomment static_assert.
10734 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
10736 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
10738 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
10740 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
10741 SETs when the outer code is INSN.
10743 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
10745 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
10748 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
10750 * poly-int.h (poly_int_pod): Delete.
10751 (poly_coeff_traits::init_cast): New type.
10752 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
10753 (poly_int): Replace constructors that take 1 and 2 coefficients with
10754 a general one that takes an arbitrary number of coefficients.
10755 Delegate initialization to two new private constructors, one of
10756 which uses the coefficients as-is and one of which adds an extra
10757 zero of the appropriate type (and precision, where applicable).
10758 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
10759 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
10760 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
10761 * gengtype.cc (main): Don't register poly_int64_pod.
10762 * calls.cc (initialize_argument_information): Use poly_int rather
10764 (combine_pending_stack_adjustment_and_call): Likewise.
10765 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
10766 * data-streamer.h (bp_unpack_poly_value): Likewise.
10767 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
10768 (struct queued_reg_save): Likewise.
10769 * dwarf2out.h (struct dw_cfa_location): Likewise.
10770 * emit-rtl.h (struct incoming_args): Likewise.
10771 (struct rtl_data): Likewise.
10772 * expr.cc (get_bit_range): Likewise.
10773 (get_inner_reference): Likewise.
10774 * expr.h (get_bit_range): Likewise.
10775 * fold-const.cc (split_address_to_core_and_offset): Likewise.
10776 (ptr_difference_const): Likewise.
10777 * fold-const.h (ptr_difference_const): Likewise.
10778 * function.cc (try_fit_stack_local): Likewise.
10779 (instantiate_new_reg): Likewise.
10780 * function.h (struct expr_status): Likewise.
10781 (struct args_size): Likewise.
10782 * genmodes.cc (ZERO_COEFFS): Likewise.
10783 (mode_size_inline): Likewise.
10784 (mode_nunits_inline): Likewise.
10785 (emit_mode_precision): Likewise.
10786 (emit_mode_size): Likewise.
10787 (emit_mode_nunits): Likewise.
10788 * gimple-fold.cc (get_base_constructor): Likewise.
10789 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
10790 * inchash.h (class hash): Likewise.
10791 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
10792 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
10794 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
10795 * lra-eliminations.cc (self_elim_offsets): Likewise.
10796 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
10797 * omp-low.cc (omplow_simd_context): Likewise.
10798 * pretty-print.cc (pp_wide_integer): Likewise.
10799 * pretty-print.h (pp_wide_integer): Likewise.
10800 * reload.cc (struct decomposition): Likewise.
10801 * reload.h (struct reload): Likewise.
10802 * reload1.cc (spill_stack_slot_width): Likewise.
10803 (struct elim_table): Likewise.
10804 (offsets_at): Likewise.
10805 (init_eliminable_invariants): Likewise.
10806 * rtl.h (union rtunion): Likewise.
10807 (poly_int_rtx_p): Likewise.
10808 (strip_offset): Likewise.
10809 (strip_offset_and_add): Likewise.
10810 * rtlanal.cc (strip_offset): Likewise.
10811 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
10812 (get_addr_base_and_unit_offset_1): Likewise.
10813 (get_addr_base_and_unit_offset): Likewise.
10814 * tree-dfa.h (get_ref_base_and_extent): Likewise.
10815 (get_addr_base_and_unit_offset_1): Likewise.
10816 (get_addr_base_and_unit_offset): Likewise.
10817 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
10818 (strip_offset): Likewise.
10819 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
10820 * tree.cc (ptrdiff_tree_p): Likewise.
10821 * tree.h (poly_int_tree_p): Likewise.
10822 (ptrdiff_tree_p): Likewise.
10823 (get_inner_reference): Likewise.
10825 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
10827 * config/pa/pa.md (memory_barrier): Revise comment.
10828 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
10829 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
10831 2023-09-29 Jakub Jelinek <jakub@redhat.com>
10833 * vec.h (quick_insert, ordered_remove, unordered_remove,
10834 block_remove, qsort, sort, stablesort, quick_grow): Guard
10835 std::is_trivially_{copyable,default_constructible} and
10836 vec_detail::is_trivially_copyable_or_pair static assertions
10837 with GCC_VERSION >= 5000.
10838 (vec_detail::is_trivially_copyable_or_pair): Guard definition
10839 with GCC_VERSION >= 5000.
10841 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
10843 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
10844 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
10845 and aarch64_stp_policy to aarch64_ldp_stp_policy.
10846 (enum aarch64_stp_policy): Removed.
10847 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
10848 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
10849 and left only the definitions to the aarch64-opts one.
10850 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
10851 (aarch64_parse_stp_policy): Removed.
10852 (aarch64_override_options_internal): Removed calls to parsing
10853 functions and added obvious direct assignments.
10854 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
10855 code quality based on the new changes.
10856 * config/aarch64/aarch64.opt: Use single enum type
10857 aarch64_ldp_stp_policy for both ldp and stp options.
10859 2023-09-29 Richard Biener <rguenther@suse.de>
10861 PR tree-optimization/111583
10862 * tree-loop-distribution.cc (find_single_drs): Ensure the
10863 load/store are always executed.
10865 2023-09-29 Jakub Jelinek <jakub@redhat.com>
10867 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
10868 quick_grow_cleared method on unprom rather than quick_grow.
10870 2023-09-29 Sergei Trofimovich <siarheit@google.com>
10872 PR middle-end/111505
10873 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
10874 Add new helper. Use helper instead of memset() to wipe out pointers.
10876 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
10878 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
10880 * builtins.cc (c_readstr): Likewise. Build a local array of
10881 bytes and use native_decode_rtx to get the rtx image.
10882 (builtin_memcpy_read_str): Simplify accordingly.
10883 (builtin_strncpy_read_str): Likewise.
10884 (builtin_memset_read_str): Likewise.
10885 (builtin_memset_gen_str): Likewise.
10886 * expr.cc (string_cst_read_str): Likewise.
10888 2023-09-29 Jakub Jelinek <jakub@redhat.com>
10890 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
10891 instead of quick_grow on vec<bitmap_head> members.
10892 * cfganal.cc (control_dependences::control_dependences): Likewise.
10893 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
10894 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
10895 on auto_vec<bitmap_head> vars.
10896 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
10897 of quick_grow on vec<bitmap_head> var.
10899 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
10902 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
10904 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
10907 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
10910 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
10911 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
10912 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
10914 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
10917 2023-09-28 Pan Li <pan2.li@intel.com>
10920 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
10922 * config/riscv/vector-iterators.md: New iterator.
10924 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
10926 * rtl.h (lra_in_progress): Change type to bool.
10927 (ira_in_progress): Add new extern.
10928 * ira.cc (ira_in_progress): New global.
10929 (pass_ira::execute): Set up ira_in_progress.
10930 * lra.cc: (lra_in_progress): Change type to bool and initialize.
10931 (lra): Use bool values for lra_in_progress.
10932 * lra-eliminations.cc (init_elim_table): Ditto.
10934 2023-09-28 Richard Biener <rguenther@suse.de>
10937 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
10938 Use a heap allocated worklist for CFG traversal instead of
10941 2023-09-28 Jakub Jelinek <jakub@redhat.com>
10942 Jonathan Wakely <jwakely@redhat.com>
10944 * vec.h: Mention in file comment limited support for non-POD types
10945 in some operations.
10946 (vec_destruct): New function template.
10947 (release): Use it for non-trivially destructible T.
10948 (truncate): Likewise.
10949 (quick_push): Perform a placement new into slot
10950 instead of assignment.
10951 (pop): For non-trivially destructible T return void
10952 rather than T & and destruct the popped element.
10953 (quick_insert, ordered_remove): Note that they aren't suitable
10954 for non-trivially copyable types. Add static_asserts for that.
10955 (block_remove): Assert T is trivially copyable.
10956 (vec_detail::is_trivially_copyable_or_pair): New trait.
10957 (qsort, sort, stablesort): Assert T is trivially copyable or
10958 std::pair with both trivally copyable types.
10959 (quick_grow): Add assert T is trivially default constructible,
10960 for now commented out.
10961 (quick_grow_cleared): Don't call quick_grow, instead inline it
10962 by hand except for the new static_assert.
10963 (gt_ggc_mx): Assert T is trivially destructable.
10964 (auto_vec::operator=): Formatting fixes.
10965 (auto_vec::auto_vec): Likewise.
10966 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
10967 it manually and call quick_grow_cleared method rather than quick_grow.
10968 (safe_grow_cleared): Likewise.
10969 * edit-context.cc (class line_event): Move definition earlier.
10970 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
10972 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
10973 safe_grow_cleared instead of safe_grow followed by placement new
10974 constructing the elements.
10976 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
10978 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
10979 * tree-affine.cc (expr_to_aff_combination): Likewise.
10981 2023-09-28 Richard Biener <rguenther@suse.de>
10983 PR tree-optimization/111614
10984 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
10985 convert the first vector when required.
10987 2023-09-28 xuli <xuli1@eswincomputing.com>
10990 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
10991 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
10993 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
10995 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
10997 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
11000 * configure: Regenerate.
11001 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
11003 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
11004 Philipp Tomsich <philipp.tomsich@vrull.eu>
11005 Manolis Tsamis <manolis.tsamis@vrull.eu>
11007 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
11009 (enum aarch64_stp_policy): New enum type.
11010 * config/aarch64/aarch64-protos.h (struct tune_params): Add
11011 appropriate enums for the policies.
11012 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
11013 * config/aarch64/aarch64-tuning-flags.def
11014 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
11016 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
11017 function to parse ldp-policy parameter.
11018 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
11019 (aarch64_override_options_internal): Call parsing functions.
11020 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
11021 (aarch64_operands_ok_for_ldpstp): Add call to
11022 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
11023 check and alignment check and remove superseded ones.
11024 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
11025 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
11026 check and alignment check and remove superseded ones.
11027 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
11028 (aarch64-stp-policy): New param.
11029 * doc/invoke.texi: Document the parameters accordingly.
11031 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
11033 * tree-data-ref.cc (include calls.h): Add new include.
11034 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
11036 2023-09-27 Richard Biener <rguenther@suse.de>
11038 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
11040 2023-09-27 Jakub Jelinek <jakub@redhat.com>
11043 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
11044 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
11046 * function.cc (assign_parm_find_data_types): Likewise.
11048 2023-09-27 Pan Li <pan2.li@intel.com>
11050 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
11051 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
11052 (enum insn_type): Ditto.
11053 (expand_vec_roundeven): New func decl.
11054 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
11056 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11059 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
11061 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11063 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
11065 2023-09-27 Pan Li <pan2.li@intel.com>
11067 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
11068 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
11069 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
11070 (expand_vec_trunc): Ditto.
11072 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
11076 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
11077 Handle failure from expand_builtin_atomic_test_and_set.
11078 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
11079 generate atomic code through target support, return NULL
11080 instead of emitting non-atomic code. Also, for code handling
11081 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
11082 from calling emit_store_flag_force instead of returning NULL.
11084 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
11086 PR tree-optimization/111599
11087 * value-relation.cc (relation_oracle::valid_equivs): Ensure
11090 2023-09-26 Andrew Pinski <apinski@marvell.com>
11092 PR tree-optimization/106164
11093 PR tree-optimization/111456
11094 * match.pd (`(A ==/!= B) & (A CMP C)`):
11095 Support an optional cast on the second A.
11096 (`(A ==/!= B) | (A CMP C)`): Likewise.
11098 2023-09-26 Andrew Pinski <apinski@marvell.com>
11100 PR tree-optimization/111469
11101 * tree-ssa-phiopt.cc (minmax_replacement): Fix
11102 the assumption for the `non-diamond` handling cases
11105 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11107 * match.pd: Optimize COND_ADD reduction pattern.
11109 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11111 PR tree-optimization/111594
11112 PR tree-optimization/110660
11113 * match.pd: Optimize COND_LEN_ADD reduction.
11115 2023-09-26 Pan Li <pan2.li@intel.com>
11117 * config/riscv/autovec.md (round<mode>2): New pattern.
11118 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
11119 (enum insn_type): Ditto.
11120 (expand_vec_round): New function decl.
11121 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
11123 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
11125 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
11127 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
11129 PR middle-end/111547
11130 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
11131 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
11133 2023-09-26 Pan Li <pan2.li@intel.com>
11135 * config/riscv/autovec.md (rint<mode>2): New pattern.
11136 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
11137 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
11139 2023-09-26 Pan Li <pan2.li@intel.com>
11141 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
11142 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11143 (expand_vec_nearbyint): New function decl.
11144 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
11146 2023-09-26 Pan Li <pan2.li@intel.com>
11148 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
11149 (get_fp_rounding_coefficient): Rename.
11150 (gen_floor_const_fp): Remove.
11151 (expand_vec_ceil): Take renamed func.
11152 (expand_vec_floor): Ditto.
11154 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
11156 PR middle-end/111497
11157 * lra-constraints.cc (lra_constraints): Copy substituted
11159 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
11161 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
11163 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
11164 return statement in the varying case.
11166 2023-09-25 Xi Ruoyao <xry111@xry111.site>
11168 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
11170 2023-09-25 Andrew Pinski <apinski@marvell.com>
11172 PR tree-optimization/110386
11173 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
11175 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11178 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
11180 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
11183 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
11186 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
11189 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
11190 target_option_default_node when the callee has no option
11191 attributes, also simplify the existing code accordingly.
11193 2023-09-25 Guo Jie <guojie@loongson.cn>
11195 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
11196 pattern for vector construction.
11197 (vec_set<mode>_internal): Ditto.
11198 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
11199 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
11200 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
11201 Optimized the implementation of vector construction.
11202 (loongarch_expand_vector_init_same): New function.
11203 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
11204 pattern for vector construction.
11205 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
11207 (vec_concatv2df): Ditto.
11208 (vec_concatv4sf): Ditto.
11210 2023-09-24 Pan Li <pan2.li@intel.com>
11213 * config/riscv/riscv-v.cc
11214 (expand_vector_init_merge_repeating_sequence): Bugfix
11216 2023-09-24 Andrew Pinski <apinski@marvell.com>
11218 PR tree-optimization/111543
11219 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
11221 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11223 * config/riscv/autovec-opt.md: Extend VLS modes
11224 * config/riscv/vector-iterators.md: Ditto.
11226 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11228 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
11230 2023-09-23 Pan Li <pan2.li@intel.com>
11232 * config/riscv/autovec.md (floor<mode>2): New pattern.
11233 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
11234 (enum insn_type): Ditto.
11235 (expand_vec_floor): New function decl.
11236 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
11237 (expand_vec_floor): Ditto.
11239 2023-09-22 Pan Li <pan2.li@intel.com>
11241 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
11242 (emit_vec_float_cmp_mask): Rename.
11243 (expand_vec_copysign): Ditto.
11244 (emit_vec_copysign): Ditto.
11245 (emit_vec_abs): New function impl.
11246 (emit_vec_cvt_x_f): Ditto.
11247 (emit_vec_cvt_f_x): Ditto.
11248 (expand_vec_ceil): Ditto.
11250 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11252 * config/riscv/vector-iterators.md: Extend VLS modes.
11254 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11256 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
11257 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
11258 (vec_duplicate<mode>): Ditto.
11260 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11262 * config/riscv/autovec.md: Add VLS conditional patterns.
11263 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
11264 (expand_cond_binop): Ditto.
11265 (expand_cond_ternop): Ditto.
11266 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
11267 (expand_cond_binop): Ditto.
11268 (expand_cond_ternop): Ditto.
11270 2023-09-22 xuli <xuli1@eswincomputing.com>
11273 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
11274 into vrgatherei16.vv.
11276 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
11278 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
11279 New combine patterns.
11280 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
11282 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
11284 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
11285 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
11287 2023-09-22 Pan Li <pan2.li@intel.com>
11289 * config/riscv/autovec.md (ceil<mode>2): New pattern.
11290 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
11291 (enum insn_type): Ditto.
11292 (expand_vec_ceil): New function decl.
11293 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
11294 (expand_vec_float_cmp_mask): Ditto.
11295 (expand_vec_copysign): Ditto.
11296 (expand_vec_ceil): Ditto.
11297 * config/riscv/vector.md: Add VLS mode support.
11299 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11301 * config/riscv/autovec.md: Extend VLS modes.
11303 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11305 * config/riscv/vector-iterators.md: Extend VLS modes.
11307 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
11308 Robin Dapp <rdapp.gcc@gmail.com>
11310 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
11311 (emit_nonvlmax_insn): Adjust comments.
11312 (emit_vlmax_insn_lra): Adjust comments.
11314 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11316 * config.gcc (*linux*): Set rust target_objs, and
11317 target_has_targetrustm,
11318 * config/t-linux (linux-rust.o): New rule.
11319 * config/linux-rust.cc: New file.
11321 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11323 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
11324 rust_target_objs and target_has_targetrustm.
11325 * config/t-winnt (winnt-rust.o): New rule.
11326 * config/winnt-rust.cc: New file.
11328 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11330 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
11331 and target_has_targetrustm.
11332 * config/fuchsia-rust.cc: New file.
11333 * config/t-fuchsia: New file.
11335 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11337 * config.gcc (*-*-vxworks*): Set rust_target_objs and
11338 target_has_targetrustm.
11339 * config/t-vxworks (vxworks-rust.o): New rule.
11340 * config/vxworks-rust.cc: New file.
11342 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11344 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
11345 target_has_targetrustm.
11346 * config/t-dragonfly (dragonfly-rust.o): New rule.
11347 * config/dragonfly-rust.cc: New file.
11349 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11351 * config.gcc (*-*-solaris2*): Set rust_target_objs and
11352 target_has_targetrustm.
11353 * config/t-sol2 (sol2-rust.o): New rule.
11354 * config/sol2-rust.cc: New file.
11356 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11358 * config.gcc (*-*-openbsd*): Set rust_target_objs and
11359 target_has_targetrustm.
11360 * config/t-openbsd (openbsd-rust.o): New rule.
11361 * config/openbsd-rust.cc: New file.
11363 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11365 * config.gcc (*-*-netbsd*): Set rust_target_objs and
11366 target_has_targetrustm.
11367 * config/t-netbsd (netbsd-rust.o): New rule.
11368 * config/netbsd-rust.cc: New file.
11370 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11372 * config.gcc (*-*-freebsd*): Set rust_target_objs and
11373 target_has_targetrustm.
11374 * config/t-freebsd (freebsd-rust.o): New rule.
11375 * config/freebsd-rust.cc: New file.
11377 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11379 * config.gcc (*-*-darwin*): Set rust_target_objs and
11380 target_has_targetrustm.
11381 * config/t-darwin (darwin-rust.o): New rule.
11382 * config/darwin-rust.cc: New file.
11384 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11386 * config/i386/t-i386 (i386-rust.o): New rule.
11387 * config/i386/i386-rust.cc: New file.
11388 * config/i386/i386-rust.h: New file.
11390 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11392 * doc/tm.texi: Regenerate.
11393 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
11395 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11397 * doc/tm.texi: Regenerate.
11398 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
11399 TARGET_RUST_CPU_INFO.
11401 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
11403 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
11404 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
11405 (tm_rust.h, cs-tm_rust.h, default-rust.o,
11406 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
11407 (s-tm-texi): Also check timestamp on rust-target.def.
11408 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
11409 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
11410 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
11412 * configure: Regenerate.
11413 * configure.ac (tm_rust_file_list, tm_rust_include_list,
11414 rust_target_objs): Add substitutes.
11415 * doc/tm.texi: Regenerate.
11416 * doc/tm.texi.in (targetrustm): Document.
11417 (target_has_targetrustm): Document.
11418 * genhooks.cc: Include rust/rust-target.def.
11419 * config/default-rust.cc: New file.
11421 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11424 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
11425 * config/riscv/predicates.md (autovec_else_operand): New predicate.
11426 * config/riscv/riscv-v.cc (get_else_operand): New function.
11427 (expand_cond_len_unop): Adapt ELSE value.
11428 (expand_cond_len_binop): Ditto.
11429 (expand_cond_len_ternop): Ditto.
11430 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
11431 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
11433 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11436 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
11438 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
11440 PR tree-optimization/111355
11441 * match.pd ((X + C) / N): Update pattern.
11443 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
11445 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
11447 2023-09-21 xuli <xuli1@eswincomputing.com>
11450 * config/riscv/constraints.md (c01): const_int 1.
11451 (c02): const_int 2.
11452 (c04): const_int 4.
11453 (c08): const_int 8.
11454 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
11455 (vector_eew16_stride_operand): Ditto.
11456 (vector_eew32_stride_operand): Ditto.
11457 (vector_eew64_stride_operand): Ditto.
11458 * config/riscv/vector-iterators.md: New iterator for stride operand.
11459 * config/riscv/vector.md: Add stride = element width constraint.
11461 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
11463 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
11464 (const_1_or_4_operand): Ditto.
11465 (vector_gs_scale_operand_16): Ditto.
11466 (vector_gs_scale_operand_32): Ditto.
11467 * config/riscv/vector-iterators.md: Adjust.
11469 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11471 * config/riscv/autovec.md: Extend VLS modes.
11472 * config/riscv/vector-iterators.md: Ditto.
11473 * config/riscv/vector.md: Ditto.
11475 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
11477 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
11478 of the return value.
11479 (ssa_cache::dump): Don't print GLOBAL RANGE header.
11480 (ssa_lazy_cache::merge_range): Adjust return value meaning.
11481 (ranger_cache::dump): Print GLOBAL RANGE header.
11483 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
11485 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
11487 (foperator_unordered_gt::fold_range): Same.
11488 (foperator_unordered_lt::fold_range): Same.
11489 (foperator_unordered_le::fold_range): Same.
11491 2023-09-20 Jakub Jelinek <jakub@redhat.com>
11493 * builtins.h (type_to_class): Declare.
11494 * builtins.cc (type_to_class): No longer static. Return
11495 int rather than enum.
11496 * doc/extend.texi (__builtin_classify_type): Document.
11498 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11501 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
11502 * optabs.cc (maybe_legitimize_operand): Ditto.
11503 (can_reuse_operands_p): Ditto.
11504 * optabs.h (enum expand_operand_type): Ditto.
11505 (create_undefined_input_operand): Ditto.
11507 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
11509 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
11510 'omp allocate' variables; move stack cleanup after other
11512 (omp_notice_variable): Process original decl when decl
11513 of the value-expression for a 'omp allocate' variable is passed.
11514 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
11516 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
11518 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
11519 support simplifying vector int not only scalar int.
11521 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11523 * config/riscv/vector-iterators.md: Extend VLS floating-point.
11525 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11527 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
11529 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
11532 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
11533 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
11535 2023-09-20 Richard Biener <rguenther@suse.de>
11537 PR tree-optimization/111489
11538 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
11540 2023-09-20 Richard Biener <rguenther@suse.de>
11542 PR tree-optimization/111489
11543 * doc/invoke.texi (--param uninit-max-chain-len): Document.
11544 (--param uninit-max-num-chains): Likewise.
11545 * params.opt (-param=uninit-max-chain-len=): New.
11546 (-param=uninit-max-num-chains=): Likewise.
11547 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
11548 param_uninit_max_num_chains.
11549 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
11550 (uninit_analysis::init_use_preds): Avoid VLA.
11551 (uninit_analysis::init_from_phi_def): Likewise.
11552 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
11553 template parameter.
11555 2023-09-20 Jakub Jelinek <jakub@redhat.com>
11557 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
11558 GET_MODE_PRECISION of TImode or DImode depending on whether
11559 TImode is supported scalar mode.
11560 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
11561 * expr.cc (expand_expr_real_1): Likewise.
11562 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
11563 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
11565 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
11567 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
11568 (*n<optab><mode>): Ditto.
11569 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
11570 (*<any_shiftrt:optab>trunc<mode>): Ditto.
11571 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
11572 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
11573 (*single_widen_mult<any_extend:su><mode>): Ditto.
11574 (*single_widen_mul<any_extend:su><mode>): Ditto.
11575 (*single_widen_mult<mode>): Ditto.
11576 (*single_widen_mul<mode>): Ditto.
11577 (*dual_widen_fma<mode>): Ditto.
11578 (*dual_widen_fma<su><mode>): Ditto.
11579 (*single_widen_fma<mode>): Ditto.
11580 (*single_widen_fma<su><mode>): Ditto.
11581 (*dual_fma<mode>): Ditto.
11582 (*single_fma<mode>): Ditto.
11583 (*dual_fnma<mode>): Ditto.
11584 (*dual_widen_fnma<mode>): Ditto.
11585 (*single_fnma<mode>): Ditto.
11586 (*single_widen_fnma<mode>): Ditto.
11587 (*dual_fms<mode>): Ditto.
11588 (*dual_widen_fms<mode>): Ditto.
11589 (*single_fms<mode>): Ditto.
11590 (*single_widen_fms<mode>): Ditto.
11591 (*dual_fnms<mode>): Ditto.
11592 (*dual_widen_fnms<mode>): Ditto.
11593 (*single_fnms<mode>): Ditto.
11594 (*single_widen_fnms<mode>): Ditto.
11596 2023-09-20 Jakub Jelinek <jakub@redhat.com>
11599 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
11600 on vars or function decls if -fopenmp or -fopenmp-simd.
11602 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
11605 * config/riscv/autovec-opt.md: Add missed operand.
11607 2023-09-20 Omar Sandoval <osandov@osandov.com>
11610 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
11611 dwarf_split_debug_info.
11613 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11615 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
11616 (vectorize_related_mode): Add VLS related modes.
11617 * config/riscv/vector-iterators.md: Extend VLS modes.
11619 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
11621 PR rtl-optimization/110071
11622 * ira-color.cc (improve_allocation): Consider cost of callee
11625 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
11626 Xi Ruoyao <xry111@xry111.site>
11628 * configure: Regenerate.
11629 * configure.ac: Checking assembler for -mno-relax support.
11630 Disable relaxation when probing leb128 support.
11632 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
11634 * config.in: Regenerate.
11635 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
11636 mrelax. And set the initial value of explicit-relocs according to the
11638 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
11639 --no-relax option to the linker.
11640 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
11641 -mno-relax, pass the -mno-relax option to the assembler.
11642 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
11643 * config/loongarch/loongarch.opt: Regenerate.
11644 * configure: Regenerate.
11645 * configure.ac: Add detection of support for binutils relax function.
11647 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
11649 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
11650 -fdeps-target= flags.
11651 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
11652 only -fdeps-format= is specified.
11653 * json.h: Add a TODO item to refactor out to share with
11654 `libcpp/mkdeps.cc`.
11656 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
11657 Jason Merrill <jason@redhat.com>
11659 * gcc.cc (join_spec_func): Add a spec function to join all
11662 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
11664 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
11665 src_op_0 var to avoid rtl check error.
11667 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
11669 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
11671 (operator_not_equal::fold_range): Handle VREL_EQ.
11672 (operator_lt::fold_range): Remove special casing for VREL_EQ.
11673 (operator_gt::fold_range): Same.
11674 (foperator_unordered_equal::fold_range): Same.
11676 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
11678 * doc/extend.texi: Document attributes hot, cold on C++ types.
11680 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
11682 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
11683 modulo instruction is disabled.
11684 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
11685 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
11686 (define_expand umod<mode>3): New.
11687 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
11688 instruction is disabled.
11689 (umodti3, modti3): Check if the modulo instruction is disabled.
11691 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
11693 * doc/gm2.texi (fdebug-builtins): Correct description.
11695 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
11697 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
11698 * config/iq2000/iq2000.md (rotrsi3): Use it.
11700 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
11702 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
11703 (operator_lt::op2_range): Same.
11704 (operator_le::op1_range): Same.
11705 (operator_le::op2_range): Same.
11706 (operator_gt::op1_range): Same.
11707 (operator_gt::op2_range): Same.
11708 (operator_ge::op1_range): Same.
11709 (operator_ge::op2_range): Same.
11710 (foperator_unordered_lt::op1_range): Same.
11711 (foperator_unordered_lt::op2_range): Same.
11712 (foperator_unordered_le::op1_range): Same.
11713 (foperator_unordered_le::op2_range): Same.
11714 (foperator_unordered_gt::op1_range): Same.
11715 (foperator_unordered_gt::op2_range): Same.
11716 (foperator_unordered_ge::op1_range): Same.
11717 (foperator_unordered_ge::op2_range): Same.
11719 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
11721 * value-range.h (frange::update_nan): New.
11723 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
11725 * range-op-float.cc (operator_not_equal::op2_range): New.
11726 * range-op-mixed.h: Add operator_not_equal::op2_range.
11728 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
11730 PR tree-optimization/110080
11731 PR tree-optimization/110249
11732 * tree-vrp.cc (remove_unreachable::final_p): New.
11733 (remove_unreachable::maybe_register): Rename from
11734 maybe_register_block and call early or final routine.
11735 (fully_replaceable): New.
11736 (remove_unreachable::handle_early): New.
11737 (remove_unreachable::remove_and_update_globals): Remove
11738 non-final processing.
11739 (rvrp_folder::rvrp_folder): Add final flag to constructor.
11740 (rvrp_folder::post_fold_bb): Remove unreachable registration.
11741 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
11742 (execute_ranger_vrp): Adjust some call parameters.
11744 2023-09-19 Richard Biener <rguenther@suse.de>
11747 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
11749 * tree-pretty-print.cc (op_symbol): Likewise.
11750 (op_symbol_code): Print TDF_GIMPLE variant if requested.
11751 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
11753 (dump_gimple_cond): Likewise.
11755 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
11756 Pan Li <pan2.li@intel.com>
11758 * tree-streamer.h (bp_unpack_machine_mode): If
11759 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
11761 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11763 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
11765 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11767 * config/riscv/autovec.md: Extend VLS modes.
11768 * config/riscv/vector.md: Ditto.
11770 2023-09-19 Richard Biener <rguenther@suse.de>
11772 PR tree-optimization/111465
11773 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
11774 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
11776 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11778 * config/riscv/autovec.md: Extend VLS floating-point modes.
11779 * config/riscv/vector.md: Ditto.
11781 2023-09-19 Jakub Jelinek <jakub@redhat.com>
11783 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
11784 nor check type_has_mode_precision_p for width larger than [TD]Imode
11786 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
11787 to type. Use boolean_true_node instead of
11788 constant_boolean_node (true, boolean_type_node). Formatting fixes.
11790 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11792 * config/riscv/autovec.md: Add VLS modes.
11793 * config/riscv/vector.md: Ditto.
11795 2023-09-19 Jakub Jelinek <jakub@redhat.com>
11797 * tree.cc (build_bitint_type): Assert precision is not 0, or
11798 for signed types 1.
11799 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
11800 of unsigned _BitInt(1).
11802 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
11804 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
11805 Removed old combine patterns.
11806 (*single_<optab>mult_plus<mode>): Ditto.
11807 (*double_<optab>mult_plus<mode>): Ditto.
11808 (*sign_zero_extend_fma): Ditto.
11809 (*zero_sign_extend_fma): Ditto.
11810 (*double_widen_fma<mode>): Ditto.
11811 (*single_widen_fma<mode>): Ditto.
11812 (*double_widen_fnma<mode>): Ditto.
11813 (*single_widen_fnma<mode>): Ditto.
11814 (*double_widen_fms<mode>): Ditto.
11815 (*single_widen_fms<mode>): Ditto.
11816 (*double_widen_fnms<mode>): Ditto.
11817 (*single_widen_fnms<mode>): Ditto.
11818 (*reduc_plus_scal_<mode>): Adjust name.
11819 (*widen_reduc_plus_scal_<mode>): Adjust name.
11820 (*dual_widen_fma<mode>): New combine pattern.
11821 (*dual_widen_fmasu<mode>): Ditto.
11822 (*dual_widen_fmaus<mode>): Ditto.
11823 (*dual_fma<mode>): Ditto.
11824 (*single_fma<mode>): Ditto.
11825 (*dual_fnma<mode>): Ditto.
11826 (*single_fnma<mode>): Ditto.
11827 (*dual_fms<mode>): Ditto.
11828 (*single_fms<mode>): Ditto.
11829 (*dual_fnms<mode>): Ditto.
11830 (*single_fnms<mode>): Ditto.
11831 * config/riscv/autovec.md (fma<mode>4):
11832 Reafctor fma pattern.
11833 (*fma<VI:mode><P:mode>): Removed.
11834 (fnma<mode>4): Reafctor.
11835 (*fnma<VI:mode><P:mode>): Removed.
11836 (*fma<VF:mode><P:mode>): Removed.
11837 (*fnma<VF:mode><P:mode>): Removed.
11838 (fms<mode>4): Reafctor.
11839 (*fms<VF:mode><P:mode>): Removed.
11840 (fnms<mode>4): Reafctor.
11841 (*fnms<VF:mode><P:mode>): Removed.
11842 * config/riscv/riscv-protos.h (prepare_ternary_operands):
11844 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
11845 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
11846 (*pred_mul_plus<mode>): Removed.
11847 (*pred_mul_plus<mode>_scalar): Removed.
11848 (*pred_mul_plus<mode>_extended_scalar): Removed.
11849 (*pred_minus_mul<mode>_undef): New pattern.
11850 (*pred_minus_mul<mode>): Removed.
11851 (*pred_minus_mul<mode>_scalar): Removed.
11852 (*pred_minus_mul<mode>_extended_scalar): Removed.
11853 (*pred_mul_<optab><mode>_undef): New pattern.
11854 (*pred_mul_<optab><mode>): Removed.
11855 (*pred_mul_<optab><mode>_scalar): Removed.
11856 (*pred_mul_neg_<optab><mode>_undef): New pattern.
11857 (*pred_mul_neg_<optab><mode>): Removed.
11858 (*pred_mul_neg_<optab><mode>_scalar): Removed.
11860 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
11862 * config/riscv/riscv-vector-builtins.cc
11863 (builtin_decl, expand_builtin): Replace SVE with RVV.
11865 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
11867 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
11868 riscv-cmo.def and riscv-scalar-crypto.def.
11870 2023-09-18 Pan Li <pan2.li@intel.com>
11872 * config/riscv/autovec.md: Extend to vls mode.
11874 2023-09-18 Pan Li <pan2.li@intel.com>
11876 * config/riscv/autovec.md: Bugfix.
11877 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
11879 2023-09-18 Andrew Pinski <apinski@marvell.com>
11881 PR tree-optimization/111442
11882 * match.pd (zero_one_valued_p): Have the bit_and match not be
11885 2023-09-18 Andrew Pinski <apinski@marvell.com>
11887 PR tree-optimization/111435
11888 * match.pd (zero_one_valued_p): Don't do recursion
11891 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
11893 * config/darwin-protos.h (enum darwin_external_toolchain): New.
11894 * config/darwin.cc (DSYMUTIL_VERSION): New.
11895 (darwin_override_options): Choose the default debug DWARF version
11896 depending on the configured dsymutil version.
11898 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
11900 * configure: Regenerate.
11901 * configure.ac: Handle explict disable of stdlib option, set
11902 defaults for Darwin.
11904 2023-09-18 Andrew Pinski <apinski@marvell.com>
11906 PR tree-optimization/111431
11907 * match.pd (`(a == CST) & a`): New pattern.
11909 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11911 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
11912 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
11914 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
11917 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
11918 Add support for immediates using shifted ORR/BIC.
11919 (aarch64_split_dimode_const_store): Apply if we save one instruction.
11920 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
11921 Make pattern global.
11923 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
11925 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
11926 (neoverse-v1): Place before zeus.
11927 (neoverse-v2): Place before demeter.
11928 * config/aarch64/aarch64-tune.md: Regenerate.
11930 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11932 * config/riscv/autovec.md: Add VLS modes.
11933 * config/riscv/vector-iterators.md: Ditto.
11934 * config/riscv/vector.md: Ditto.
11936 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11938 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
11939 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
11941 2023-09-18 Richard Biener <rguenther@suse.de>
11943 PR tree-optimization/111294
11944 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
11946 (back_threader::find_paths_to_names): Adjust.
11947 (back_threader::maybe_thread_block): Likewise.
11948 (back_threader_profitability::possibly_profitable_path_p): Remove
11949 code applying extra costs to copies PHIs.
11951 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11953 * config/riscv/autovec.md: Extend VLS modes.
11954 * config/riscv/vector.md: Ditto.
11956 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11958 * config/riscv/vector.md (mov<mode>): New pattern.
11959 (*mov<mode>_mem_to_mem): Ditto.
11960 (*mov<mode>): Ditto.
11961 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
11962 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
11963 (*mov<mode>_vls): Ditto.
11964 (movmisalign<mode>): Ditto.
11965 (@vec_duplicate<mode>): Ditto.
11966 * config/riscv/autovec-vls.md: Removed.
11968 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11971 * config/riscv/autovec.md: Add VLS modes.
11973 2023-09-18 Jason Merrill <jason@redhat.com>
11975 * doc/gty.texi: Add discussion of cache vs. deletable.
11977 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11979 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
11980 (copysign<mode>3): Ditto.
11981 (xorsign<mode>3): Ditto.
11982 (<optab><mode>2): Ditto.
11983 * config/riscv/autovec.md: Extend VLS modes.
11985 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
11987 PR middle-end/111303
11988 * match.pd ((t * 2) / 2): Update pattern.
11990 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
11992 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
11994 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11997 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
11998 (vec_extract<mode><vel>): Ditto.
11999 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
12000 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
12001 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
12003 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
12005 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
12006 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
12007 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
12008 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
12009 new insn/expansions.
12010 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
12011 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
12012 (*riscv_<sha256_op>_si): New raw instruction for RV32.
12013 (*riscv_<sm3_op>_si): Ditto.
12014 (*riscv_<sm4_op>_si): Ditto.
12015 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
12016 (riscv_<sm3_op>_di_extended): Ditto.
12017 (riscv_<sm4_op>_di_extended): Ditto.
12018 (riscv_<sha256_op>_si): New common instruction expansion.
12019 (riscv_<sm3_op>_si): Ditto.
12020 (riscv_<sm4_op>_si): Ditto.
12021 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
12022 "crypto_zksh" and "crypto_zksed". Remove availability
12023 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
12024 * config/riscv/riscv-ftypes.def: Remove unused function type.
12025 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
12026 intrinsics to operate on uint32_t.
12028 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
12030 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
12031 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
12032 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
12033 Removed as no longer used.
12034 (RISCV_ATYPE_UDI): New for uint64_t.
12035 * config/riscv/riscv-cmo.def: Make types unsigned for not working
12036 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
12037 argument/return types.
12038 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
12039 number and shift amount types unsigned.
12040 * config/riscv/riscv-scalar-crypto.def: Ditto.
12042 2023-09-16 Pan Li <pan2.li@intel.com>
12044 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
12046 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
12048 * config/riscv/predicates.md: Restrict predicate
12049 to allow 'reg' only.
12051 2023-09-15 Andrew Pinski <apinski@marvell.com>
12053 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
12054 Also match `a & zero_one_valued_p` too.
12056 2023-09-15 Andrew Pinski <apinski@marvell.com>
12058 PR tree-optimization/111414
12059 * match.pd (`(1 >> X) != 0`): Check to see if
12060 the integer_onep was an integral type (not a vector type).
12062 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
12064 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
12065 run phi analysis, and do it before loop analysis.
12067 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
12069 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
12072 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
12074 PR tree-optimization/111407
12075 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
12076 when one of the operands is subject to abnormal coalescing.
12078 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
12080 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
12081 (enum insn_type): Ditto.
12082 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
12083 (emit_vlmax_insn): Adjust.
12084 (emit_nonvlmax_insn): Adjust.
12085 (emit_vlmax_insn_lra): Adjust.
12087 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
12089 * config/riscv/autovec-opt.md: Adjust.
12090 * config/riscv/autovec.md: Ditto.
12091 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
12092 (expand_reduction): Adjust expand_reduction prototype.
12093 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
12094 (expand_reduction): Refactor expand_reduction.
12096 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
12099 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
12100 the lower memory access to a mem-pair operand.
12102 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
12104 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
12105 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
12106 before the driver canonicalization routines.
12107 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
12108 to loongarch-driver.h
12109 * config/loongarch/t-linux: Move multilib-related definitions to
12111 * config/loongarch/t-multilib: New file. Inject library build
12112 options obtained from --with-multilib-list.
12113 * config/loongarch/t-loongarch: Same.
12115 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
12118 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
12119 New combine pattern.
12120 (*fold_left_widen_plus_<mode>): Ditto.
12121 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
12122 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
12123 Change from define_expand to define_insn_and_split.
12124 (fold_left_plus_<mode>): Ditto.
12125 (mask_len_fold_left_plus_<mode>): Ditto.
12126 * config/riscv/riscv-v.cc (expand_reduction):
12127 Support widen reduction.
12128 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
12129 Add new iterators and attrs.
12131 2023-09-14 David Malcolm <dmalcolm@redhat.com>
12133 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
12134 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
12135 (sarif_thread_flow::sarif_thread_flow): New.
12136 (sarif_builder::make_code_flow_object): Reimplement, creating
12137 per-thread threadFlow objects, populating them with the relevant
12139 (sarif_builder::make_thread_flow_object): Delete, moving the
12140 code into sarif_builder::make_code_flow_object.
12141 (sarif_builder::make_thread_flow_location_object): Add
12142 "path_event_idx" param. Use it to set "executionOrder"
12144 * diagnostic-path.h (diagnostic_event::get_thread_id): New
12145 pure-virtual vfunc.
12146 (class diagnostic_thread): New.
12147 (diagnostic_path::num_threads): New pure-virtual vfunc.
12148 (diagnostic_path::get_thread): New pure-virtual vfunc.
12149 (diagnostic_path::multithreaded_p): New decl.
12150 (simple_diagnostic_event::simple_diagnostic_event): Add optional
12152 (simple_diagnostic_event::get_thread_id): New accessor.
12153 (simple_diagnostic_event::m_thread_id): New.
12154 (class simple_diagnostic_thread): New.
12155 (simple_diagnostic_path::simple_diagnostic_path): Move definition
12157 (simple_diagnostic_path::num_threads): New.
12158 (simple_diagnostic_path::get_thread): New.
12159 (simple_diagnostic_path::add_thread): New.
12160 (simple_diagnostic_path::add_thread_event): New.
12161 (simple_diagnostic_path::m_threads): New.
12162 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
12163 param for overriding the context's printer.
12164 (diagnostic_show_locus): Likwise.
12165 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
12166 Move here from diagnostic-path.h. Add main thread.
12167 (simple_diagnostic_path::num_threads): New.
12168 (simple_diagnostic_path::get_thread): New.
12169 (simple_diagnostic_path::add_thread): New.
12170 (simple_diagnostic_path::add_thread_event): New.
12171 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
12172 param and use it to initialize m_thread_id. Reformat.
12173 * diagnostic.h: Add pretty_printer param for overriding the
12175 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
12176 (can_consolidate_events): Compare thread ids.
12177 (class per_thread_summary): New.
12178 (event_range::event_range): Add per_thread_summary arg.
12179 (event_range::print): Add "pp" param and use it rather than dc's
12181 (event_range::m_thread_id): New field.
12182 (event_range::m_per_thread_summary): New field.
12183 (path_summary::multithreaded_p): New.
12184 (path_summary::get_events_for_thread_id): New.
12185 (path_summary::m_per_thread_summary): New field.
12186 (path_summary::m_thread_id_to_events): New field.
12187 (path_summary::get_or_create_events_for_thread_id): New.
12188 (path_summary::path_summary): Create per_thread_summary instances
12189 as needed and associate the event_range instances with them.
12190 (base_indent): Move here from print_path_summary_as_text.
12191 (per_frame_indent): Likewise.
12192 (class thread_event_printer): New, adapted from parts of
12193 print_path_summary_as_text.
12194 (print_path_summary_as_text): Make static. Reimplement to
12195 moving most of existing code to class thread_event_printer,
12196 capturing state as per-thread as appropriate.
12197 (default_tree_diagnostic_path_printer): Add missing 'break' on
12200 2023-09-14 David Malcolm <dmalcolm@redhat.com>
12202 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
12203 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
12204 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
12205 clearing the deletable gcc_root_tab_t.
12206 (ggc_common_finalize): New.
12207 * ggc.h (ggc_common_finalize): New decl.
12208 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
12209 ggc_common_finalize.
12211 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
12213 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
12214 unsigned comparisons.
12215 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
12216 generation of salt/saltu instructions.
12217 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
12218 * config/xtensa/xtensa.md (salt, saltu): New instruction
12221 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
12223 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
12226 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
12228 * config/riscv/autovec.md: Change rtx code to unspec.
12229 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
12230 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
12231 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
12233 (class widen_freducop): Removed.
12234 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
12235 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
12236 (@pred_<reduc_op><mode>): New name.
12237 (@pred_widen_reduc_plus<v_su><mode>): Change name.
12238 (@pred_reduc_plus<order><mode>): Change name.
12239 (@pred_widen_reduc_plus<order><mode>): Change name.
12241 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
12243 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
12244 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
12245 * config/riscv/vector-iterators.md: New iterators and attrs.
12246 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
12248 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
12249 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
12250 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
12251 (@pred_reduc_<reduc><mode>): Added.
12252 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
12253 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
12254 (@pred_widen_reduc_plus<v_su><mode>): Added.
12255 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
12256 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
12257 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
12258 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
12259 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
12260 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
12261 (@pred_reduc_plus<order><mode>): Added.
12262 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
12263 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
12264 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
12265 (@pred_widen_reduc_plus<order><mode>): Added.
12267 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
12269 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
12270 Move WHILELO handling to...
12271 (aarch64_vector_costs::finish_cost): ...here. Check whether the
12272 vectorizer has decided to use a predicated loop.
12274 2023-09-14 Andrew Pinski <apinski@marvell.com>
12276 PR tree-optimization/106164
12277 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
12278 Expand to support constants that are off by one.
12280 2023-09-14 Andrew Pinski <apinski@marvell.com>
12282 * genmatch.cc (parser::parse_result): For an else clause
12283 of an if statement inside a switch, error out explictly.
12285 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12287 * config/riscv/autovec-opt.md: Add VLS mask modes.
12288 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
12289 (vcond_mask_<mode><vm>): Add VLS mask modes.
12290 * config/riscv/vector.md: Ditto.
12292 2023-09-14 Richard Biener <rguenther@suse.de>
12294 PR tree-optimization/111294
12295 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
12296 operands that eventually become dead and use simple_dce_from_worklist
12297 to remove their definitions if they did so.
12299 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
12301 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
12302 Accept all nonimmediate_operands, but keep the existing constraints.
12303 If the instruction is split before RA, load invalid addresses into
12304 a temporary register.
12305 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
12307 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12310 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
12311 (vector_insn_info::global_merge): Ditto.
12312 (vector_insn_info::get_avl_or_vl_reg): Ditto.
12314 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12316 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
12318 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
12320 * config/loongarch/loongarch-def.c: Modify the default value of
12323 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12325 * config/xtensa/xtensa.cc (xtensa_expand_scc):
12326 Revert the changes from the last patch, as the work in the RTL
12327 expansion pass is too far to determine the physical registers.
12328 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
12329 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
12331 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
12334 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
12336 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12338 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
12339 (@vec_extract<mode><vel>): Ditto.
12340 * config/riscv/vector.md: Ditto
12342 2023-09-13 Andrew Pinski <apinski@marvell.com>
12344 * match.pd (`X <= MAX(X, Y)`):
12345 Move before `MIN (X, C1) < C2` pattern.
12347 2023-09-13 Andrew Pinski <apinski@marvell.com>
12349 PR tree-optimization/111364
12350 * match.pd (`MIN (X, Y) == X`): Extend
12351 to min/lt, min/ge, max/gt, max/le.
12353 2023-09-13 Andrew Pinski <apinski@marvell.com>
12355 PR tree-optimization/111345
12356 * match.pd (`Y > (X % Y)`): Merge
12358 (`(X % Y) < Y`): Pattern by adding `:c`
12361 2023-09-13 Richard Biener <rguenther@suse.de>
12363 PR tree-optimization/111387
12364 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
12365 EDGE_DFS_BACK when doing BB vectorization.
12366 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
12367 to compute RPO and mark backedges.
12369 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
12371 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
12372 New combine pattern.
12373 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
12374 (<mulh_table><mode>3_highpart): Merged pattern.
12375 (umul<mode>3_highpart): Mrege smul and umul.
12376 * config/riscv/vector-iterators.md (umul): New iterators.
12377 (UNSPEC_VMULHU): New iterators.
12379 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
12381 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
12382 New combine pattern.
12383 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
12385 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
12387 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
12388 (*cond_copysign<mode>): New combine pattern.
12389 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
12391 2023-09-13 Richard Biener <rguenther@suse.de>
12393 PR tree-optimization/111397
12394 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
12395 argument to specify whether the PHI destination doesn't flow in
12396 from an abnormal PHI.
12397 (propagate_value): Adjust.
12398 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
12400 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
12402 (process_bb): Likewise.
12404 2023-09-13 Pan Li <pan2.li@intel.com>
12407 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
12409 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
12411 PR tree-optimization/111303
12412 * match.pd ((X - N * M) / N): Add undefined_p checking.
12413 ((X + N * M) / N): Likewise.
12414 ((X + C) div_rshift N): Likewise.
12416 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12419 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
12421 2023-09-12 Martin Jambor <mjambor@suse.cz>
12423 * dbgcnt.def (form_fma): New.
12424 * tree-ssa-math-opts.cc: Include dbgcnt.h.
12425 (convert_mult_to_fma): Bail out if the debug counter say so.
12427 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
12429 * config/riscv/autovec-opt.md: Update type
12430 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
12432 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12434 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
12436 (aarch64_layout_frame): Use it to decide whether locals should
12437 go above or below the saved registers.
12438 (aarch64_expand_prologue): Update stack layout comment.
12439 Emit a stack tie after the final adjustment.
12441 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12443 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
12444 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
12445 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
12447 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12449 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
12450 (aarch64_frame::hard_fp_save_and_probe): New fields.
12451 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
12452 Rather than asserting that a leaf function saves LR, instead assert
12453 that a leaf function saves something.
12454 (aarch64_get_separate_components): Prevent the chosen probe
12455 registers from being individually shrink-wrapped.
12456 (aarch64_allocate_and_probe_stack_space): Remove workaround for
12457 probe registers that aren't at the bottom of the previous allocation.
12459 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12461 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
12462 Always probe the residual allocation at offset 1024, asserting
12463 that that is in range.
12465 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12467 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
12468 the LR save slot is in the first 16 bytes of the register save area.
12469 Only form STP/LDP push/pop candidates if both registers are valid.
12470 (aarch64_allocate_and_probe_stack_space): Remove workaround for
12471 when LR was not in the first 16 bytes.
12473 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12475 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
12476 Don't probe final allocations that are exactly 1KiB in size (after
12477 unprobed space above the final allocation has been deducted).
12479 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12481 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
12482 calculation of initial_adjust for frames in which all saves
12485 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12487 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
12488 the allocation of the top of the frame.
12490 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12492 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
12494 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
12495 from the bottom of the frame, rather than the bottom of the saved
12496 register area. Measure reg_offset from the bottom of the frame
12497 rather than the bottom of the saved register area.
12498 (aarch64_save_callee_saves): Update accordingly.
12499 (aarch64_restore_callee_saves): Likewise.
12500 (aarch64_get_separate_components): Likewise.
12501 (aarch64_process_components): Likewise.
12503 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12505 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
12507 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12509 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
12511 (aarch64_frame::bytes_above_hard_fp): ...this.
12512 * config/aarch64/aarch64.cc (aarch64_layout_frame)
12513 (aarch64_expand_prologue): Update accordingly.
12514 (aarch64_initial_elimination_offset): Likewise.
12516 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12518 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
12519 (aarch64_frame::bytes_above_locals): ...this.
12520 * config/aarch64/aarch64.cc (aarch64_layout_frame)
12521 (aarch64_initial_elimination_offset): Update accordingly.
12523 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12525 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
12526 calculation of chain_offset into the emit_frame_chain block.
12528 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12530 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
12531 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
12532 callee_offset handling.
12533 (aarch64_save_callee_saves): Replace the start_offset parameter
12534 with a bytes_below_sp parameter.
12535 (aarch64_restore_callee_saves): Likewise.
12536 (aarch64_expand_prologue): Update accordingly.
12537 (aarch64_expand_epilogue): Likewise.
12539 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12541 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
12543 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
12544 (aarch64_expand_epilogue): Use it instead of
12545 below_hard_fp_saved_regs_size.
12547 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12549 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
12551 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
12552 and use it instead of crtl->outgoing_args_size.
12553 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
12554 of outgoing_args_size.
12555 (aarch64_process_components): Likewise.
12557 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12559 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
12560 allocate the frame in one go if there are no saved registers.
12562 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12564 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
12565 chain_offset rather than callee_offset.
12567 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
12569 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
12570 a local shorthand for cfun->machine->frame.
12571 (aarch64_restore_callee_saves, aarch64_get_separate_components):
12572 (aarch64_process_components): Likewise.
12573 (aarch64_allocate_and_probe_stack_space): Likewise.
12574 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
12575 (aarch64_layout_frame): Use existing shorthand for one more case.
12577 2023-09-12 Andrew Pinski <apinski@marvell.com>
12579 PR tree-optimization/107881
12580 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
12581 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
12583 2023-09-12 Pan Li <pan2.li@intel.com>
12585 * config/riscv/riscv-vector-costs.h (struct range): Removed.
12587 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12589 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
12590 (compute_nregs_for_mode): Ditto.
12591 (live_range_conflict_p): Ditto.
12592 (max_number_of_live_regs): Ditto.
12593 (compute_lmul): Ditto.
12594 (costs::prefer_new_lmul_p): Ditto.
12595 (costs::better_main_loop_than_p): Ditto.
12596 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
12597 (struct var_live_range): Ditto.
12598 (struct autovec_info): Ditto.
12599 * config/riscv/t-riscv: Update makefile for COST model.
12601 2023-09-12 Jakub Jelinek <jakub@redhat.com>
12603 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
12606 2023-09-12 Jakub Jelinek <jakub@redhat.com>
12608 PR middle-end/111338
12609 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
12611 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
12612 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
12613 optimization if type's precision is too large for
12614 vn_walk_cb_data::bufsize.
12616 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
12618 * doc/gm2.texi (Compiler options): Document new option
12621 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
12623 * doc/sourcebuild.texi (stack_size): Update.
12625 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
12627 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
12628 (<optab>_not<mode>3): Likewise.
12629 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
12631 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
12633 (GEN_EMIT_HELPER2): Likewise.
12634 (emit_strcmp_scalar_compare_byte): New function.
12635 (emit_strcmp_scalar_compare_subword): Likewise.
12636 (emit_strcmp_scalar_compare_word): Likewise.
12637 (emit_strcmp_scalar_load_and_compare): Likewise.
12638 (emit_strcmp_scalar_call_to_libc): Likewise.
12639 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
12640 (emit_strcmp_scalar_result_calculation): Likewise.
12641 (riscv_expand_strcmp_scalar): Likewise.
12642 (riscv_expand_strcmp): Likewise.
12643 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
12645 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
12646 (cmpstrnsi): Invoke expansion function for str(n)cmp.
12647 (cmpstrsi): Likewise.
12648 * config/riscv/riscv.opt: Add new parameter
12649 '-mstring-compare-inline-limit'.
12650 * doc/invoke.texi: Document new parameter
12651 '-mstring-compare-inline-limit'.
12653 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
12655 * config.gcc: Add new object riscv-string.o.
12657 * config/riscv/riscv-protos.h (riscv_expand_strlen):
12659 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
12660 * config/riscv/riscv.opt: New flag 'minline-strlen'.
12661 * config/riscv/t-riscv: Add new object riscv-string.o.
12662 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
12663 (th_rev<mode>2): Likewise.
12664 (th_tstnbz<mode>2): New INSN.
12665 * doc/invoke.texi: Document '-minline-strlen'.
12666 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
12667 (emit_unlikely_jump_insn): Likewise.
12668 * rtl.h (emit_likely_jump_insn): New prototype.
12669 (emit_unlikely_jump_insn): Likewise.
12670 * config/riscv/riscv-string.cc: New file.
12672 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
12674 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
12675 (TARGET_SUPPORTS_ALIASES): Define.
12677 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
12679 * doc/sourcebuild.texi (check-function-bodies): Update.
12681 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
12683 * gimplify.cc (gimplify_bind_expr): Check for
12684 insertion after variable cleanup. Convert 'omp allocate'
12685 var-decl attribute to GOMP_alloc/GOMP_free calls.
12687 2023-09-12 xuli <xuli1@eswincomputing.com>
12689 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
12690 parameter e and replace NULL_RTX with gcc_unreachable.
12692 2023-09-12 xuli <xuli1@eswincomputing.com>
12694 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
12696 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12697 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
12698 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
12700 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
12701 * config/riscv/riscv-vector-builtins.cc: Add args type.
12703 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
12705 * config/riscv/riscv.cc
12706 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
12707 riscv_avoid_shrink_wrapping_separate.
12708 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
12710 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
12712 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
12714 * shrink-wrap.cc (try_shrink_wrapping_separate):call
12715 use_shrink_wrapping_separate.
12716 (use_shrink_wrapping_separate): wrap the condition
12717 check in use_shrink_wrapping_separate.
12718 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
12720 2023-09-11 Andrew Pinski <apinski@marvell.com>
12722 PR tree-optimization/111348
12723 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
12724 the cmp part of the pattern.
12726 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
12729 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
12730 Call output_addr_const for CASE_CONST_SCALAR_INT.
12732 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
12734 * config/riscv/thead.md: Update types
12736 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
12738 * config/riscv/riscv.md: Update types
12740 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
12742 * config/riscv/riscv.md: Add "zicond" type
12743 * config/riscv/zicond.md: Update types
12745 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
12747 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
12748 * config/riscv/zc.md: Update types
12750 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
12752 * config/riscv/autovec-opt.md: Update types
12753 * config/riscv/autovec.md: likewise
12755 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
12757 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
12759 (s390_vec_unsigned_flt): Ditto.
12760 (s390_vec_revb_flt): Ditto.
12761 (s390_vec_reve_flt): Ditto.
12762 (s390_vclfnhs): Fix operand flags.
12763 (s390_vclfnls): Ditto.
12764 (s390_vcrnfs): Ditto.
12765 (s390_vcfn): Ditto.
12766 (s390_vcnf): Ditto.
12768 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
12770 * config/s390/s390-builtins.def (O_U64): New.
12775 (O_M12): Change bit position.
12786 (OB_DEF_VAR): Add operand constraints.
12788 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
12791 2023-09-11 Andrew Pinski <apinski@marvell.com>
12793 PR tree-optimization/111349
12794 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
12795 the cmp part of the pattern.
12797 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12800 * config/riscv/riscv.opt: Set default as scalable vectorization.
12802 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12804 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
12805 (get_all_successors): Ditto.
12806 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
12807 (get_all_successors): Ditto.
12809 2023-09-11 Jakub Jelinek <jakub@redhat.com>
12811 PR middle-end/111329
12812 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
12813 function. For printing values which don't fit into digit_buffer
12814 use out-of-line function.
12815 * wide-int-print.h (pp_wide_int_large): Declare.
12816 * wide-int-print.cc: Include pretty-print.h.
12817 (pp_wide_int_large): Define.
12819 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12821 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
12822 Use dominance analysis.
12823 (pass_vsetvl::init): Ditto.
12824 (pass_vsetvl::done): Ditto.
12826 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12829 * config/riscv/autovec.md: Add VLS modes.
12830 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
12831 (cmp_lmul_gt_one): Ditto.
12832 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
12833 (cmp_lmul_gt_one): Ditto.
12834 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
12835 (riscv_vectorize_vec_perm_const): Ditto.
12836 * config/riscv/vector-iterators.md: Ditto.
12837 * config/riscv/vector.md: Ditto.
12839 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12841 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
12842 * config/riscv/vector-iterators.md: New iterator
12844 2023-09-11 Andrew Pinski <apinski@marvell.com>
12846 PR tree-optimization/111346
12847 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
12850 2023-09-11 liuhongt <hongtao.liu@intel.com>
12854 * config/i386/sse.md (int_comm): New int_attr.
12855 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
12856 Remove % for Complex conjugate operations since they're not
12858 (fma_<complexpairopname>_<mode>_pair): Ditto.
12859 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
12860 (cmul<conj_op><mode>3): Ditto.
12862 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12864 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
12865 fixed-vlmax/vls vector permutation.
12867 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12869 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
12871 2023-09-10 Andrew Pinski <apinski@marvell.com>
12873 PR tree-optimization/111331
12874 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
12875 Fix the LE/GE comparison to the correct value.
12876 * tree-ssa-phiopt.cc (minmax_replacement):
12877 Fix the LE/GE comparison for the
12878 `(a CMP CST1) ? max<a,CST2> : a` optimization.
12880 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
12882 * config/darwin.cc (darwin_function_section): Place unlikely
12883 executed global init code into the standard cold section.
12885 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12888 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
12889 (pass_vsetvl::pre_vsetvl): Ditto.
12890 (pass_vsetvl::init): Ditto.
12891 (pass_vsetvl::lazy_vsetvl): Ditto.
12893 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
12895 * config/loongarch/loongarch.md (mulsidi3_64bit):
12896 Field unsigned extension support.
12897 (<u>muldi3_highpart): Modify template name.
12898 (<u>mulsi3_highpart): Likewise.
12899 (<u>mulsidi3_64bit): Field unsigned extension support.
12900 (<su>muldi3_highpart): Modify muldi3_highpart to
12902 (<su>mulsi3_highpart): Modify mulsi3_highpart to
12905 2023-09-09 Xi Ruoyao <xry111@xry111.site>
12907 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
12908 Check precondition (delta must be a power of 2) and use
12909 popcount_hwi instead of a homebrew loop.
12911 2023-09-09 Xi Ruoyao <xry111@xry111.site>
12913 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
12914 Define to the maximum amount of bytes able to be loaded or
12915 stored with one machine instruction.
12916 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
12917 New static function.
12918 (loongarch_block_move_straight): Call
12919 loongarch_mode_for_move_size for machine_mode to be moved.
12920 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
12921 instead of UNITS_PER_WORD.
12923 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12925 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
12927 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
12929 * fold-const.cc (can_min_p): New function.
12930 (poly_int_binop): Try fold MIN_EXPR.
12932 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
12934 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
12935 case VREL_EQ nor call frelop_early_resolve.
12937 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
12939 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
12940 Remove broken INSN.
12941 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
12942 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
12944 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
12946 * config/riscv/thead.md: Use more appropriate mode attributes
12949 2023-09-08 Guo Jie <guojie@loongson.cn>
12951 * common/config/loongarch/loongarch-common.cc:
12952 (default_options loongarch_option_optimization_table):
12953 Default to -fsched-pressure.
12955 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
12957 * config.gcc: remove non-POSIX syntax "<<<".
12959 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
12961 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
12962 Rename postfix to _bitmanip.
12963 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
12964 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
12966 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12968 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
12970 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12972 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
12974 2023-09-07 liuhongt <hongtao.liu@intel.com>
12976 * config/i386/sse.md
12977 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
12978 (VHFBF_AVX512VL): New mode iterator.
12979 (VI2HFBF_AVX512VL): New mode iterator.
12981 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
12983 * value-range.h (contains_zero_p): Return false for undefined ranges.
12984 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
12985 contains_zero_p change above.
12986 (operator_ge::op1_op2_relation): Same.
12987 (operator_equal::op1_op2_relation): Same.
12988 (operator_not_equal::op1_op2_relation): Same.
12989 (operator_lt::op1_op2_relation): Same.
12990 (operator_le::op1_op2_relation): Same.
12991 (operator_ge::op1_op2_relation): Same.
12992 * range-op.cc (operator_equal::op1_op2_relation): Same.
12993 (operator_not_equal::op1_op2_relation): Same.
12994 (operator_lt::op1_op2_relation): Same.
12995 (operator_le::op1_op2_relation): Same.
12996 (operator_cast::op1_range): Same.
12997 (set_nonzero_range_from_mask): Same.
12998 (operator_bitwise_xor::op1_range): Same.
12999 (operator_addr_expr::fold_range): Same.
13000 (operator_addr_expr::op1_range): Same.
13002 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
13004 PR tree-optimization/110875
13005 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
13006 cache-prefilling routine when the ssa-name has no global value.
13008 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
13011 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
13012 (process_alt_operands): Set up the flag. Clear flag for chosen
13013 alternative with special memory constraints.
13014 (process_alt_operands): Set up used insn alternative depending on the flag.
13016 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13018 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
13019 * config/riscv/riscv.md: Ditto.
13020 * config/riscv/vector-iterators.md: Ditto.
13021 * config/riscv/vector.md: Ditto.
13023 2023-09-07 David Malcolm <dmalcolm@redhat.com>
13025 * diagnostic-core.h (error_meta): New decl.
13026 * diagnostic.cc (error_meta): New.
13028 2023-09-07 Jakub Jelinek <jakub@redhat.com>
13031 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
13032 inside gcc_assert, as later code relies on it filling info variable.
13033 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
13034 clear_padding_type): Likewise.
13035 * varasm.cc (output_constant): Likewise.
13036 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
13037 * stor-layout.cc (finish_bitfield_representative, layout_type):
13039 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
13041 2023-09-07 Xi Ruoyao <xry111@xry111.site>
13044 * config/loongarch/loongarch-protos.h
13045 (loongarch_pre_reload_split): Declare new function.
13046 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
13047 * config/loongarch/loongarch.cc
13048 (loongarch_pre_reload_split): Implement.
13049 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
13050 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
13052 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
13053 New define_insn_and_split.
13054 (bstrins_<mode>_for_ior_mask): Likewise.
13055 (define_peephole2): Further optimize code sequence produced by
13056 bstrins_<mode>_for_ior_mask if possible.
13058 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
13060 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
13061 rather than gen_rtx_PLUS.
13063 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13066 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
13067 (pass_vsetvl::df_post_optimization): Remove incorrect function.
13069 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
13071 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
13072 Parse 'XVentanaCondOps' extension.
13073 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
13074 (TARGET_XVENTANACONDOPS): Ditto.
13075 (TARGET_ZICOND_LIKE): New to represent targets with conditional
13076 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
13077 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
13078 with TARGET_ZICOND_LIKE.
13079 (riscv_expand_conditional_move): Ditto.
13080 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
13081 TARGET_ZICOND_LIKE.
13082 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
13083 * config/riscv/zicond.md: Modify description.
13084 (eqz_ventana): New to match corresponding czero instructions.
13085 (nez_ventana): Ditto.
13086 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
13087 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
13088 (*czero.<eqz>.<GPR><X>): Ditto.
13089 (*czero.eqz.<GPR><X>.opt1): Ditto.
13090 (*czero.nez.<GPR><X>.opt2): Ditto.
13092 2023-09-06 Ian Lance Taylor <iant@golang.org>
13095 * godump.cc (go_format_type): Handle BITINT_TYPE.
13097 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13100 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
13103 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13106 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
13107 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
13108 rather than make_edge, initialize bb->count.
13110 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13113 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
13114 Document general rules for _BitInt support library functions
13115 and document __mulbitint3 and __divmodbitint4.
13116 (Conversion functions): Document __fix{s,d,x,t}fbitint,
13117 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
13118 __bid_floatbitint{s,d,t}d.
13120 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13123 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
13126 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13129 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
13130 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
13131 check if all padding bits up to mode precision are zeros or sign
13132 bit copies and if not, jump to DO_ERROR.
13133 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
13134 Adjust expand_ubsan_result_store callers.
13135 * ubsan.cc: Include target.h and langhooks.h.
13136 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
13137 size converted to pointer sized integer, pass BITINT_TYPE values
13138 which fit into TImode (if supported) or DImode as those integer types
13139 or otherwise for now punt (pass 0).
13140 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
13141 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
13142 TImode/DImode precision rather than TK_Unknown used otherwise for
13143 large/huge BITINT_TYPEs.
13144 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
13145 they don't have mode precision.
13146 * ubsan.h (enum ubsan_print_style): New enumerator.
13148 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13151 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
13152 (ix86_bitint_type_info): New function.
13153 (TARGET_C_BITINT_TYPE_INFO): Redefine.
13155 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13158 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
13159 * passes.def: Add pass_lower_bitint after pass_lower_complex and
13160 pass_lower_bitint_O0 after pass_lower_complex_O0.
13161 * tree-pass.h (PROP_gimple_lbitint): Define.
13162 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
13163 * gimple-lower-bitint.h: New file.
13164 * tree-ssa-live.h (struct _var_map): Add bitint member.
13165 (init_var_map): Adjust declaration.
13166 (region_contains_p): Handle map->bitint like map->outofssa_p.
13167 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
13168 map->bitint and set map->outofssa_p to false if it is non-NULL.
13169 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
13170 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
13172 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
13173 not in that bitmap, and allow res without default def.
13174 (compute_optimized_partition_bases): In map->bitint mode try hard to
13175 coalesce any SSA_NAMEs with the same size.
13176 (coalesce_bitint): New function.
13177 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
13178 used_in_copies and call coalesce_bitint.
13179 * gimple-lower-bitint.cc: New file.
13181 2023-09-06 Jakub Jelinek <jakub@redhat.com>
13184 * tree.def (BITINT_TYPE): New type.
13185 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
13186 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
13188 (BITINT_TYPE_P): Define.
13189 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
13190 they have BITINT_TYPE type.
13191 (tree_check6, tree_not_check6): New inline functions.
13192 (any_integral_type_check): Include BITINT_TYPE.
13193 (build_bitint_type): Declare.
13194 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
13195 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
13196 type_hash_canon): Handle BITINT_TYPE.
13197 (bitint_type_cache): New variable.
13198 (build_bitint_type): New function.
13199 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
13200 Handle BITINT_TYPE.
13201 (tree_cc_finalize): Free bitint_type_cache.
13202 * builtins.cc (type_to_class): Handle BITINT_TYPE.
13203 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
13204 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
13206 * convert.cc (convert_to_pointer_1, convert_to_real_1,
13207 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
13208 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
13209 GET_MODE_PRECISION (TYPE_MODE (type)).
13210 * doc/generic.texi (BITINT_TYPE): Document.
13211 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
13212 * doc/tm.texi: Regenerated.
13213 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
13214 gen_type_die_with_usage): Handle BITINT_TYPE.
13215 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
13216 handle those which fit into shwi.
13217 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
13218 to bitfield precision reads from BITINT_TYPE vars, parameters or
13219 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
13221 * fold-const.cc (fold_convert_loc, make_range_step): Handle
13223 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
13224 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
13225 (native_encode_int, native_interpret_int, native_interpret_expr):
13226 Handle BITINT_TYPE.
13227 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
13228 to some other integral type or vice versa conversions non-useless.
13229 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
13230 (clear_padding_unit): Mention in comment that _BitInt types don't need
13232 (clear_padding_bitint_needs_padding_p): New function.
13233 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
13234 (clear_padding_type): Likewise.
13235 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
13236 precision operands force pos_neg? to 1.
13237 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
13238 expand_BITINTTOFLOAT): New functions.
13239 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
13240 BITINTTOFLOAT): New internal functions.
13241 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
13242 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
13243 * match.pd (non-equality compare simplifications from fold_binary):
13244 Punt if TYPE_MODE (arg1_type) is BLKmode.
13245 * pretty-print.h (pp_wide_int): Handle printing of large precision
13246 wide_ints which would buffer overflow digit_buffer.
13247 * stor-layout.cc (finish_bitfield_representative): For bit-fields
13248 with BITINT_TYPE, prefer representatives with precisions in
13249 multiple of limb precision.
13250 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
13251 element type and assert it is BITINT_TYPE.
13252 * target.def (bitint_type_info): New C target hook.
13253 * target.h (struct bitint_info): New type.
13254 * targhooks.cc (default_bitint_type_info): New function.
13255 * targhooks.h (default_bitint_type_info): Declare.
13256 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
13257 Handle printing large wide_ints which would buffer overflow
13259 * tree-ssa-sccvn.cc: Include target.h.
13260 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
13262 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
13263 64-bit BITINT_TYPE subtract low bound from expression and cast to
13264 64-bit integer type both the controlling expression and case labels.
13265 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
13266 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
13267 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
13269 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
13270 unsigned_type_for rather than build_nonstandard_integer_type.
13272 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13275 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
13276 tieable for RVV modes.
13278 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13281 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
13283 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13285 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
13287 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13289 * config/xtensa/xtensa.cc (xtensa_expand_scc):
13290 Add code for particular constants (only 0 and INT_MIN for now)
13291 for EQ/NE boolean evaluation in SImode.
13292 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
13293 implementation has been integrated into the above.
13295 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
13298 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
13300 (*pred_widen_mulsu<mode>): Delete.
13301 (*pred_single_widen_mul<mode>): Delete.
13302 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
13303 Add new combine patterns.
13304 (*single_widen_sub<any_extend:su><mode>): Ditto.
13305 (*single_widen_add<any_extend:su><mode>): Ditto.
13306 (*single_widen_mult<any_extend:su><mode>): Ditto.
13307 (*dual_widen_mulsu<mode>): Ditto.
13308 (*dual_widen_mulus<mode>): Ditto.
13309 (*dual_widen_<optab><mode>): Ditto.
13310 (*single_widen_add<mode>): Ditto.
13311 (*single_widen_sub<mode>): Ditto.
13312 (*single_widen_mult<mode>): Ditto.
13313 * config/riscv/autovec.md (<optab><mode>3):
13314 Change define_expand to define_insn_and_split.
13315 (<optab><mode>2): Ditto.
13316 (abs<mode>2): Ditto.
13317 (smul<mode>3_highpart): Ditto.
13318 (umul<mode>3_highpart): Ditto.
13320 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
13322 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
13323 (riscv_asm_output_alias): Ditto.
13324 (riscv_asm_output_external): Ditto.
13325 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
13326 Output .variant_cc directive for vector function.
13327 (riscv_declare_function_name): Ditto.
13328 (riscv_asm_output_alias): Ditto.
13329 (riscv_asm_output_external): Ditto.
13330 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
13331 Implement ASM_DECLARE_FUNCTION_NAME.
13332 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
13333 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
13335 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
13337 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
13338 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
13339 (riscv_frame_info::reset): Reset new fileds.
13340 (riscv_call_tls_get_addr): Pass riscv_cc.
13341 (riscv_function_arg): Return riscv_cc for call patterm.
13342 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
13343 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
13344 (riscv_save_reg_p): Add vector callee-saved check.
13345 (riscv_stack_align): Add vector save area comment.
13346 (riscv_compute_frame_info): Ditto.
13347 (riscv_restore_reg): Update for type change.
13348 (riscv_for_each_saved_v_reg): New function save vector registers.
13349 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
13350 (riscv_expand_prologue): Ditto.
13351 (riscv_expand_epilogue): Ditto.
13352 (riscv_output_mi_thunk): Pass riscv_cc.
13353 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
13354 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
13355 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
13357 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
13359 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
13360 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
13361 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
13362 (riscv_init_cumulative_args): Setup variant_cc field.
13363 (riscv_vector_type_p): New function for checking vector type.
13364 (riscv_hard_regno_nregs): Hoist declare.
13365 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
13366 (riscv_get_arg_info): Support vector cc.
13367 (riscv_function_arg_advance): Update cum.
13368 (riscv_pass_by_reference): Handle vector args.
13369 (riscv_v_abi): New function return vector abi.
13370 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
13371 (riscv_arguments_is_vector_type_p): New function for check vector returns.
13372 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
13373 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
13374 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
13375 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
13376 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
13377 (V_ARG_FIRST): Ditto.
13378 (V_ARG_LAST): Ditto.
13379 (enum riscv_cc): Define all RISCV_CC variants.
13380 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
13382 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
13384 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
13385 Add sqrt + vcond_mask combine pattern.
13386 * config/riscv/autovec.md (<optab><mode>2):
13387 Change define_expand to define_insn_and_split.
13389 2023-09-06 Jason Merrill <jason@redhat.com>
13391 * common.opt: Update -fabi-version=19.
13393 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
13395 * config/riscv/zicond.md: Add closing parent to a comment.
13397 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
13399 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
13400 large constant cons/alt into a register.
13402 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
13404 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
13405 require one zero bit in the upper 32 bits for LI+RORI synthesis.
13407 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
13409 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
13411 2023-09-05 Andrew Pinski <apinski@marvell.com>
13413 PR tree-optimization/98710
13414 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
13415 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
13417 2023-09-05 Andrew Pinski <apinski@marvell.com>
13419 PR tree-optimization/103536
13420 * match.pd (`(x | y) & (x & z)`,
13421 `(x & y) | (x | z)`): New patterns.
13423 2023-09-05 Andrew Pinski <apinski@marvell.com>
13425 PR tree-optimization/107137
13426 * match.pd (`(nop_convert)-(convert)a`): New pattern.
13428 2023-09-05 Andrew Pinski <apinski@marvell.com>
13430 PR tree-optimization/96694
13431 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
13433 2023-09-05 Andrew Pinski <apinski@marvell.com>
13435 PR tree-optimization/105832
13436 * match.pd (`(1 >> X) != 0`): New pattern
13438 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
13440 * config/riscv/riscv.md: Update/Add types
13442 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
13444 * config/riscv/pic.md: Update types
13446 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
13448 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
13449 synthesis with rotate-right for XTheadBb.
13451 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
13453 * config/riscv/zicond.md: Fix op2 pattern.
13455 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
13457 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
13459 2023-09-05 Xi Ruoyao <xry111@xry111.site>
13461 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
13462 Define to 0 if not defined yet.
13464 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
13466 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
13467 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
13469 2023-09-05 Pan Li <pan2.li@intel.com>
13471 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
13472 * config/riscv/vector.md: Extend iterator for VLS.
13474 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
13476 * config.gcc: Export the header file lasxintrin.h.
13477 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
13478 Add Loongson ASX builtin functions support.
13479 (AVAIL_ALL): Ditto.
13480 (LASX_BUILTIN): Ditto.
13481 (LASX_NO_TARGET_BUILTIN): Ditto.
13482 (LASX_BUILTIN_TEST_BRANCH): Ditto.
13483 (CODE_FOR_lasx_xvsadd_b): Ditto.
13484 (CODE_FOR_lasx_xvsadd_h): Ditto.
13485 (CODE_FOR_lasx_xvsadd_w): Ditto.
13486 (CODE_FOR_lasx_xvsadd_d): Ditto.
13487 (CODE_FOR_lasx_xvsadd_bu): Ditto.
13488 (CODE_FOR_lasx_xvsadd_hu): Ditto.
13489 (CODE_FOR_lasx_xvsadd_wu): Ditto.
13490 (CODE_FOR_lasx_xvsadd_du): Ditto.
13491 (CODE_FOR_lasx_xvadd_b): Ditto.
13492 (CODE_FOR_lasx_xvadd_h): Ditto.
13493 (CODE_FOR_lasx_xvadd_w): Ditto.
13494 (CODE_FOR_lasx_xvadd_d): Ditto.
13495 (CODE_FOR_lasx_xvaddi_bu): Ditto.
13496 (CODE_FOR_lasx_xvaddi_hu): Ditto.
13497 (CODE_FOR_lasx_xvaddi_wu): Ditto.
13498 (CODE_FOR_lasx_xvaddi_du): Ditto.
13499 (CODE_FOR_lasx_xvand_v): Ditto.
13500 (CODE_FOR_lasx_xvandi_b): Ditto.
13501 (CODE_FOR_lasx_xvbitsel_v): Ditto.
13502 (CODE_FOR_lasx_xvseqi_b): Ditto.
13503 (CODE_FOR_lasx_xvseqi_h): Ditto.
13504 (CODE_FOR_lasx_xvseqi_w): Ditto.
13505 (CODE_FOR_lasx_xvseqi_d): Ditto.
13506 (CODE_FOR_lasx_xvslti_b): Ditto.
13507 (CODE_FOR_lasx_xvslti_h): Ditto.
13508 (CODE_FOR_lasx_xvslti_w): Ditto.
13509 (CODE_FOR_lasx_xvslti_d): Ditto.
13510 (CODE_FOR_lasx_xvslti_bu): Ditto.
13511 (CODE_FOR_lasx_xvslti_hu): Ditto.
13512 (CODE_FOR_lasx_xvslti_wu): Ditto.
13513 (CODE_FOR_lasx_xvslti_du): Ditto.
13514 (CODE_FOR_lasx_xvslei_b): Ditto.
13515 (CODE_FOR_lasx_xvslei_h): Ditto.
13516 (CODE_FOR_lasx_xvslei_w): Ditto.
13517 (CODE_FOR_lasx_xvslei_d): Ditto.
13518 (CODE_FOR_lasx_xvslei_bu): Ditto.
13519 (CODE_FOR_lasx_xvslei_hu): Ditto.
13520 (CODE_FOR_lasx_xvslei_wu): Ditto.
13521 (CODE_FOR_lasx_xvslei_du): Ditto.
13522 (CODE_FOR_lasx_xvdiv_b): Ditto.
13523 (CODE_FOR_lasx_xvdiv_h): Ditto.
13524 (CODE_FOR_lasx_xvdiv_w): Ditto.
13525 (CODE_FOR_lasx_xvdiv_d): Ditto.
13526 (CODE_FOR_lasx_xvdiv_bu): Ditto.
13527 (CODE_FOR_lasx_xvdiv_hu): Ditto.
13528 (CODE_FOR_lasx_xvdiv_wu): Ditto.
13529 (CODE_FOR_lasx_xvdiv_du): Ditto.
13530 (CODE_FOR_lasx_xvfadd_s): Ditto.
13531 (CODE_FOR_lasx_xvfadd_d): Ditto.
13532 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
13533 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
13534 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
13535 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
13536 (CODE_FOR_lasx_xvffint_s_w): Ditto.
13537 (CODE_FOR_lasx_xvffint_d_l): Ditto.
13538 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
13539 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
13540 (CODE_FOR_lasx_xvfsub_s): Ditto.
13541 (CODE_FOR_lasx_xvfsub_d): Ditto.
13542 (CODE_FOR_lasx_xvfmul_s): Ditto.
13543 (CODE_FOR_lasx_xvfmul_d): Ditto.
13544 (CODE_FOR_lasx_xvfdiv_s): Ditto.
13545 (CODE_FOR_lasx_xvfdiv_d): Ditto.
13546 (CODE_FOR_lasx_xvfmax_s): Ditto.
13547 (CODE_FOR_lasx_xvfmax_d): Ditto.
13548 (CODE_FOR_lasx_xvfmin_s): Ditto.
13549 (CODE_FOR_lasx_xvfmin_d): Ditto.
13550 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
13551 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
13552 (CODE_FOR_lasx_xvflogb_s): Ditto.
13553 (CODE_FOR_lasx_xvflogb_d): Ditto.
13554 (CODE_FOR_lasx_xvmax_b): Ditto.
13555 (CODE_FOR_lasx_xvmax_h): Ditto.
13556 (CODE_FOR_lasx_xvmax_w): Ditto.
13557 (CODE_FOR_lasx_xvmax_d): Ditto.
13558 (CODE_FOR_lasx_xvmaxi_b): Ditto.
13559 (CODE_FOR_lasx_xvmaxi_h): Ditto.
13560 (CODE_FOR_lasx_xvmaxi_w): Ditto.
13561 (CODE_FOR_lasx_xvmaxi_d): Ditto.
13562 (CODE_FOR_lasx_xvmax_bu): Ditto.
13563 (CODE_FOR_lasx_xvmax_hu): Ditto.
13564 (CODE_FOR_lasx_xvmax_wu): Ditto.
13565 (CODE_FOR_lasx_xvmax_du): Ditto.
13566 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
13567 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
13568 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
13569 (CODE_FOR_lasx_xvmaxi_du): Ditto.
13570 (CODE_FOR_lasx_xvmin_b): Ditto.
13571 (CODE_FOR_lasx_xvmin_h): Ditto.
13572 (CODE_FOR_lasx_xvmin_w): Ditto.
13573 (CODE_FOR_lasx_xvmin_d): Ditto.
13574 (CODE_FOR_lasx_xvmini_b): Ditto.
13575 (CODE_FOR_lasx_xvmini_h): Ditto.
13576 (CODE_FOR_lasx_xvmini_w): Ditto.
13577 (CODE_FOR_lasx_xvmini_d): Ditto.
13578 (CODE_FOR_lasx_xvmin_bu): Ditto.
13579 (CODE_FOR_lasx_xvmin_hu): Ditto.
13580 (CODE_FOR_lasx_xvmin_wu): Ditto.
13581 (CODE_FOR_lasx_xvmin_du): Ditto.
13582 (CODE_FOR_lasx_xvmini_bu): Ditto.
13583 (CODE_FOR_lasx_xvmini_hu): Ditto.
13584 (CODE_FOR_lasx_xvmini_wu): Ditto.
13585 (CODE_FOR_lasx_xvmini_du): Ditto.
13586 (CODE_FOR_lasx_xvmod_b): Ditto.
13587 (CODE_FOR_lasx_xvmod_h): Ditto.
13588 (CODE_FOR_lasx_xvmod_w): Ditto.
13589 (CODE_FOR_lasx_xvmod_d): Ditto.
13590 (CODE_FOR_lasx_xvmod_bu): Ditto.
13591 (CODE_FOR_lasx_xvmod_hu): Ditto.
13592 (CODE_FOR_lasx_xvmod_wu): Ditto.
13593 (CODE_FOR_lasx_xvmod_du): Ditto.
13594 (CODE_FOR_lasx_xvmul_b): Ditto.
13595 (CODE_FOR_lasx_xvmul_h): Ditto.
13596 (CODE_FOR_lasx_xvmul_w): Ditto.
13597 (CODE_FOR_lasx_xvmul_d): Ditto.
13598 (CODE_FOR_lasx_xvclz_b): Ditto.
13599 (CODE_FOR_lasx_xvclz_h): Ditto.
13600 (CODE_FOR_lasx_xvclz_w): Ditto.
13601 (CODE_FOR_lasx_xvclz_d): Ditto.
13602 (CODE_FOR_lasx_xvnor_v): Ditto.
13603 (CODE_FOR_lasx_xvor_v): Ditto.
13604 (CODE_FOR_lasx_xvori_b): Ditto.
13605 (CODE_FOR_lasx_xvnori_b): Ditto.
13606 (CODE_FOR_lasx_xvpcnt_b): Ditto.
13607 (CODE_FOR_lasx_xvpcnt_h): Ditto.
13608 (CODE_FOR_lasx_xvpcnt_w): Ditto.
13609 (CODE_FOR_lasx_xvpcnt_d): Ditto.
13610 (CODE_FOR_lasx_xvxor_v): Ditto.
13611 (CODE_FOR_lasx_xvxori_b): Ditto.
13612 (CODE_FOR_lasx_xvsll_b): Ditto.
13613 (CODE_FOR_lasx_xvsll_h): Ditto.
13614 (CODE_FOR_lasx_xvsll_w): Ditto.
13615 (CODE_FOR_lasx_xvsll_d): Ditto.
13616 (CODE_FOR_lasx_xvslli_b): Ditto.
13617 (CODE_FOR_lasx_xvslli_h): Ditto.
13618 (CODE_FOR_lasx_xvslli_w): Ditto.
13619 (CODE_FOR_lasx_xvslli_d): Ditto.
13620 (CODE_FOR_lasx_xvsra_b): Ditto.
13621 (CODE_FOR_lasx_xvsra_h): Ditto.
13622 (CODE_FOR_lasx_xvsra_w): Ditto.
13623 (CODE_FOR_lasx_xvsra_d): Ditto.
13624 (CODE_FOR_lasx_xvsrai_b): Ditto.
13625 (CODE_FOR_lasx_xvsrai_h): Ditto.
13626 (CODE_FOR_lasx_xvsrai_w): Ditto.
13627 (CODE_FOR_lasx_xvsrai_d): Ditto.
13628 (CODE_FOR_lasx_xvsrl_b): Ditto.
13629 (CODE_FOR_lasx_xvsrl_h): Ditto.
13630 (CODE_FOR_lasx_xvsrl_w): Ditto.
13631 (CODE_FOR_lasx_xvsrl_d): Ditto.
13632 (CODE_FOR_lasx_xvsrli_b): Ditto.
13633 (CODE_FOR_lasx_xvsrli_h): Ditto.
13634 (CODE_FOR_lasx_xvsrli_w): Ditto.
13635 (CODE_FOR_lasx_xvsrli_d): Ditto.
13636 (CODE_FOR_lasx_xvsub_b): Ditto.
13637 (CODE_FOR_lasx_xvsub_h): Ditto.
13638 (CODE_FOR_lasx_xvsub_w): Ditto.
13639 (CODE_FOR_lasx_xvsub_d): Ditto.
13640 (CODE_FOR_lasx_xvsubi_bu): Ditto.
13641 (CODE_FOR_lasx_xvsubi_hu): Ditto.
13642 (CODE_FOR_lasx_xvsubi_wu): Ditto.
13643 (CODE_FOR_lasx_xvsubi_du): Ditto.
13644 (CODE_FOR_lasx_xvpackod_d): Ditto.
13645 (CODE_FOR_lasx_xvpackev_d): Ditto.
13646 (CODE_FOR_lasx_xvpickod_d): Ditto.
13647 (CODE_FOR_lasx_xvpickev_d): Ditto.
13648 (CODE_FOR_lasx_xvrepli_b): Ditto.
13649 (CODE_FOR_lasx_xvrepli_h): Ditto.
13650 (CODE_FOR_lasx_xvrepli_w): Ditto.
13651 (CODE_FOR_lasx_xvrepli_d): Ditto.
13652 (CODE_FOR_lasx_xvandn_v): Ditto.
13653 (CODE_FOR_lasx_xvorn_v): Ditto.
13654 (CODE_FOR_lasx_xvneg_b): Ditto.
13655 (CODE_FOR_lasx_xvneg_h): Ditto.
13656 (CODE_FOR_lasx_xvneg_w): Ditto.
13657 (CODE_FOR_lasx_xvneg_d): Ditto.
13658 (CODE_FOR_lasx_xvbsrl_v): Ditto.
13659 (CODE_FOR_lasx_xvbsll_v): Ditto.
13660 (CODE_FOR_lasx_xvfmadd_s): Ditto.
13661 (CODE_FOR_lasx_xvfmadd_d): Ditto.
13662 (CODE_FOR_lasx_xvfmsub_s): Ditto.
13663 (CODE_FOR_lasx_xvfmsub_d): Ditto.
13664 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
13665 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
13666 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
13667 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
13668 (CODE_FOR_lasx_xvpermi_q): Ditto.
13669 (CODE_FOR_lasx_xvpermi_d): Ditto.
13670 (CODE_FOR_lasx_xbnz_v): Ditto.
13671 (CODE_FOR_lasx_xbz_v): Ditto.
13672 (CODE_FOR_lasx_xvssub_b): Ditto.
13673 (CODE_FOR_lasx_xvssub_h): Ditto.
13674 (CODE_FOR_lasx_xvssub_w): Ditto.
13675 (CODE_FOR_lasx_xvssub_d): Ditto.
13676 (CODE_FOR_lasx_xvssub_bu): Ditto.
13677 (CODE_FOR_lasx_xvssub_hu): Ditto.
13678 (CODE_FOR_lasx_xvssub_wu): Ditto.
13679 (CODE_FOR_lasx_xvssub_du): Ditto.
13680 (CODE_FOR_lasx_xvabsd_b): Ditto.
13681 (CODE_FOR_lasx_xvabsd_h): Ditto.
13682 (CODE_FOR_lasx_xvabsd_w): Ditto.
13683 (CODE_FOR_lasx_xvabsd_d): Ditto.
13684 (CODE_FOR_lasx_xvabsd_bu): Ditto.
13685 (CODE_FOR_lasx_xvabsd_hu): Ditto.
13686 (CODE_FOR_lasx_xvabsd_wu): Ditto.
13687 (CODE_FOR_lasx_xvabsd_du): Ditto.
13688 (CODE_FOR_lasx_xvavg_b): Ditto.
13689 (CODE_FOR_lasx_xvavg_h): Ditto.
13690 (CODE_FOR_lasx_xvavg_w): Ditto.
13691 (CODE_FOR_lasx_xvavg_d): Ditto.
13692 (CODE_FOR_lasx_xvavg_bu): Ditto.
13693 (CODE_FOR_lasx_xvavg_hu): Ditto.
13694 (CODE_FOR_lasx_xvavg_wu): Ditto.
13695 (CODE_FOR_lasx_xvavg_du): Ditto.
13696 (CODE_FOR_lasx_xvavgr_b): Ditto.
13697 (CODE_FOR_lasx_xvavgr_h): Ditto.
13698 (CODE_FOR_lasx_xvavgr_w): Ditto.
13699 (CODE_FOR_lasx_xvavgr_d): Ditto.
13700 (CODE_FOR_lasx_xvavgr_bu): Ditto.
13701 (CODE_FOR_lasx_xvavgr_hu): Ditto.
13702 (CODE_FOR_lasx_xvavgr_wu): Ditto.
13703 (CODE_FOR_lasx_xvavgr_du): Ditto.
13704 (CODE_FOR_lasx_xvmuh_b): Ditto.
13705 (CODE_FOR_lasx_xvmuh_h): Ditto.
13706 (CODE_FOR_lasx_xvmuh_w): Ditto.
13707 (CODE_FOR_lasx_xvmuh_d): Ditto.
13708 (CODE_FOR_lasx_xvmuh_bu): Ditto.
13709 (CODE_FOR_lasx_xvmuh_hu): Ditto.
13710 (CODE_FOR_lasx_xvmuh_wu): Ditto.
13711 (CODE_FOR_lasx_xvmuh_du): Ditto.
13712 (CODE_FOR_lasx_xvssran_b_h): Ditto.
13713 (CODE_FOR_lasx_xvssran_h_w): Ditto.
13714 (CODE_FOR_lasx_xvssran_w_d): Ditto.
13715 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
13716 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
13717 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
13718 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
13719 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
13720 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
13721 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
13722 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
13723 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
13724 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
13725 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
13726 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
13727 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
13728 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
13729 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
13730 (CODE_FOR_lasx_xvftint_w_s): Ditto.
13731 (CODE_FOR_lasx_xvftint_l_d): Ditto.
13732 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
13733 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
13734 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
13735 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
13736 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
13737 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
13738 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
13739 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
13740 (CODE_FOR_lasx_xvsat_b): Ditto.
13741 (CODE_FOR_lasx_xvsat_h): Ditto.
13742 (CODE_FOR_lasx_xvsat_w): Ditto.
13743 (CODE_FOR_lasx_xvsat_d): Ditto.
13744 (CODE_FOR_lasx_xvsat_bu): Ditto.
13745 (CODE_FOR_lasx_xvsat_hu): Ditto.
13746 (CODE_FOR_lasx_xvsat_wu): Ditto.
13747 (CODE_FOR_lasx_xvsat_du): Ditto.
13748 (loongarch_builtin_vectorized_function): Ditto.
13749 (loongarch_expand_builtin_insn): Ditto.
13750 (loongarch_expand_builtin): Ditto.
13751 * config/loongarch/loongarch-ftypes.def (1): Ditto.
13755 * config/loongarch/lasxintrin.h: New file.
13757 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
13759 * config/loongarch/loongarch-modes.def
13760 (VECTOR_MODES): Add Loongson ASX instruction support.
13761 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
13762 (loongarch_split_256bit_move_p): Ditto.
13763 (loongarch_expand_vector_group_init): Ditto.
13764 (loongarch_expand_vec_perm_1): Ditto.
13765 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
13766 (loongarch_valid_offset_p): Ditto.
13767 (loongarch_address_insns): Ditto.
13768 (loongarch_const_insns): Ditto.
13769 (loongarch_legitimize_move): Ditto.
13770 (loongarch_builtin_vectorization_cost): Ditto.
13771 (loongarch_split_move_p): Ditto.
13772 (loongarch_split_move): Ditto.
13773 (loongarch_output_move_index_float): Ditto.
13774 (loongarch_split_256bit_move_p): Ditto.
13775 (loongarch_split_256bit_move): Ditto.
13776 (loongarch_output_move): Ditto.
13777 (loongarch_print_operand_reloc): Ditto.
13778 (loongarch_print_operand): Ditto.
13779 (loongarch_hard_regno_mode_ok_uncached): Ditto.
13780 (loongarch_hard_regno_nregs): Ditto.
13781 (loongarch_class_max_nregs): Ditto.
13782 (loongarch_can_change_mode_class): Ditto.
13783 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
13784 (loongarch_vector_mode_supported_p): Ditto.
13785 (loongarch_preferred_simd_mode): Ditto.
13786 (loongarch_autovectorize_vector_modes): Ditto.
13787 (loongarch_lsx_output_division): Ditto.
13788 (loongarch_expand_lsx_shuffle): Ditto.
13789 (loongarch_expand_vec_perm): Ditto.
13790 (loongarch_expand_vec_perm_interleave): Ditto.
13791 (loongarch_try_expand_lsx_vshuf_const): Ditto.
13792 (loongarch_expand_vec_perm_even_odd_1): Ditto.
13793 (loongarch_expand_vec_perm_even_odd): Ditto.
13794 (loongarch_expand_vec_perm_1): Ditto.
13795 (loongarch_expand_vec_perm_const_2): Ditto.
13796 (loongarch_is_quad_duplicate): Ditto.
13797 (loongarch_is_double_duplicate): Ditto.
13798 (loongarch_is_odd_extraction): Ditto.
13799 (loongarch_is_even_extraction): Ditto.
13800 (loongarch_is_extraction_permutation): Ditto.
13801 (loongarch_is_center_extraction): Ditto.
13802 (loongarch_is_reversing_permutation): Ditto.
13803 (loongarch_is_di_misalign_extract): Ditto.
13804 (loongarch_is_si_misalign_extract): Ditto.
13805 (loongarch_is_lasx_lowpart_interleave): Ditto.
13806 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
13807 (COMPARE_SELECTOR): Ditto.
13808 (loongarch_is_lasx_lowpart_extract): Ditto.
13809 (loongarch_is_lasx_highpart_interleave): Ditto.
13810 (loongarch_is_lasx_highpart_interleave_2): Ditto.
13811 (loongarch_is_elem_duplicate): Ditto.
13812 (loongarch_is_op_reverse_perm): Ditto.
13813 (loongarch_is_single_op_perm): Ditto.
13814 (loongarch_is_divisible_perm): Ditto.
13815 (loongarch_is_triple_stride_extract): Ditto.
13816 (loongarch_vectorize_vec_perm_const): Ditto.
13817 (loongarch_cpu_sched_reassociation_width): Ditto.
13818 (loongarch_expand_vector_extract): Ditto.
13819 (emit_reduc_half): Ditto.
13820 (loongarch_expand_vec_unpack): Ditto.
13821 (loongarch_expand_vector_group_init): Ditto.
13822 (loongarch_expand_vector_init): Ditto.
13823 (loongarch_expand_lsx_cmp): Ditto.
13824 (loongarch_builtin_support_vector_misalignment): Ditto.
13825 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
13826 (BITS_PER_LASX_REG): Ditto.
13827 (STRUCTURE_SIZE_BOUNDARY): Ditto.
13828 (LASX_REG_FIRST): Ditto.
13829 (LASX_REG_LAST): Ditto.
13830 (LASX_REG_NUM): Ditto.
13831 (LASX_REG_P): Ditto.
13832 (LASX_REG_RTX_P): Ditto.
13833 (LASX_SUPPORTED_MODE_P): Ditto.
13834 * config/loongarch/loongarch.md: Ditto.
13835 * config/loongarch/lasx.md: New file.
13837 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
13839 * config.gcc: Export the header file lsxintrin.h.
13840 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
13841 (enum loongarch_builtin_type): Ditto.
13842 (AVAIL_ALL): Ditto.
13843 (LARCH_BUILTIN): Ditto.
13844 (LSX_BUILTIN): Ditto.
13845 (LSX_BUILTIN_TEST_BRANCH): Ditto.
13846 (LSX_NO_TARGET_BUILTIN): Ditto.
13847 (CODE_FOR_lsx_vsadd_b): Ditto.
13848 (CODE_FOR_lsx_vsadd_h): Ditto.
13849 (CODE_FOR_lsx_vsadd_w): Ditto.
13850 (CODE_FOR_lsx_vsadd_d): Ditto.
13851 (CODE_FOR_lsx_vsadd_bu): Ditto.
13852 (CODE_FOR_lsx_vsadd_hu): Ditto.
13853 (CODE_FOR_lsx_vsadd_wu): Ditto.
13854 (CODE_FOR_lsx_vsadd_du): Ditto.
13855 (CODE_FOR_lsx_vadd_b): Ditto.
13856 (CODE_FOR_lsx_vadd_h): Ditto.
13857 (CODE_FOR_lsx_vadd_w): Ditto.
13858 (CODE_FOR_lsx_vadd_d): Ditto.
13859 (CODE_FOR_lsx_vaddi_bu): Ditto.
13860 (CODE_FOR_lsx_vaddi_hu): Ditto.
13861 (CODE_FOR_lsx_vaddi_wu): Ditto.
13862 (CODE_FOR_lsx_vaddi_du): Ditto.
13863 (CODE_FOR_lsx_vand_v): Ditto.
13864 (CODE_FOR_lsx_vandi_b): Ditto.
13865 (CODE_FOR_lsx_bnz_v): Ditto.
13866 (CODE_FOR_lsx_bz_v): Ditto.
13867 (CODE_FOR_lsx_vbitsel_v): Ditto.
13868 (CODE_FOR_lsx_vseqi_b): Ditto.
13869 (CODE_FOR_lsx_vseqi_h): Ditto.
13870 (CODE_FOR_lsx_vseqi_w): Ditto.
13871 (CODE_FOR_lsx_vseqi_d): Ditto.
13872 (CODE_FOR_lsx_vslti_b): Ditto.
13873 (CODE_FOR_lsx_vslti_h): Ditto.
13874 (CODE_FOR_lsx_vslti_w): Ditto.
13875 (CODE_FOR_lsx_vslti_d): Ditto.
13876 (CODE_FOR_lsx_vslti_bu): Ditto.
13877 (CODE_FOR_lsx_vslti_hu): Ditto.
13878 (CODE_FOR_lsx_vslti_wu): Ditto.
13879 (CODE_FOR_lsx_vslti_du): Ditto.
13880 (CODE_FOR_lsx_vslei_b): Ditto.
13881 (CODE_FOR_lsx_vslei_h): Ditto.
13882 (CODE_FOR_lsx_vslei_w): Ditto.
13883 (CODE_FOR_lsx_vslei_d): Ditto.
13884 (CODE_FOR_lsx_vslei_bu): Ditto.
13885 (CODE_FOR_lsx_vslei_hu): Ditto.
13886 (CODE_FOR_lsx_vslei_wu): Ditto.
13887 (CODE_FOR_lsx_vslei_du): Ditto.
13888 (CODE_FOR_lsx_vdiv_b): Ditto.
13889 (CODE_FOR_lsx_vdiv_h): Ditto.
13890 (CODE_FOR_lsx_vdiv_w): Ditto.
13891 (CODE_FOR_lsx_vdiv_d): Ditto.
13892 (CODE_FOR_lsx_vdiv_bu): Ditto.
13893 (CODE_FOR_lsx_vdiv_hu): Ditto.
13894 (CODE_FOR_lsx_vdiv_wu): Ditto.
13895 (CODE_FOR_lsx_vdiv_du): Ditto.
13896 (CODE_FOR_lsx_vfadd_s): Ditto.
13897 (CODE_FOR_lsx_vfadd_d): Ditto.
13898 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
13899 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
13900 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
13901 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
13902 (CODE_FOR_lsx_vffint_s_w): Ditto.
13903 (CODE_FOR_lsx_vffint_d_l): Ditto.
13904 (CODE_FOR_lsx_vffint_s_wu): Ditto.
13905 (CODE_FOR_lsx_vffint_d_lu): Ditto.
13906 (CODE_FOR_lsx_vfsub_s): Ditto.
13907 (CODE_FOR_lsx_vfsub_d): Ditto.
13908 (CODE_FOR_lsx_vfmul_s): Ditto.
13909 (CODE_FOR_lsx_vfmul_d): Ditto.
13910 (CODE_FOR_lsx_vfdiv_s): Ditto.
13911 (CODE_FOR_lsx_vfdiv_d): Ditto.
13912 (CODE_FOR_lsx_vfmax_s): Ditto.
13913 (CODE_FOR_lsx_vfmax_d): Ditto.
13914 (CODE_FOR_lsx_vfmin_s): Ditto.
13915 (CODE_FOR_lsx_vfmin_d): Ditto.
13916 (CODE_FOR_lsx_vfsqrt_s): Ditto.
13917 (CODE_FOR_lsx_vfsqrt_d): Ditto.
13918 (CODE_FOR_lsx_vflogb_s): Ditto.
13919 (CODE_FOR_lsx_vflogb_d): Ditto.
13920 (CODE_FOR_lsx_vmax_b): Ditto.
13921 (CODE_FOR_lsx_vmax_h): Ditto.
13922 (CODE_FOR_lsx_vmax_w): Ditto.
13923 (CODE_FOR_lsx_vmax_d): Ditto.
13924 (CODE_FOR_lsx_vmaxi_b): Ditto.
13925 (CODE_FOR_lsx_vmaxi_h): Ditto.
13926 (CODE_FOR_lsx_vmaxi_w): Ditto.
13927 (CODE_FOR_lsx_vmaxi_d): Ditto.
13928 (CODE_FOR_lsx_vmax_bu): Ditto.
13929 (CODE_FOR_lsx_vmax_hu): Ditto.
13930 (CODE_FOR_lsx_vmax_wu): Ditto.
13931 (CODE_FOR_lsx_vmax_du): Ditto.
13932 (CODE_FOR_lsx_vmaxi_bu): Ditto.
13933 (CODE_FOR_lsx_vmaxi_hu): Ditto.
13934 (CODE_FOR_lsx_vmaxi_wu): Ditto.
13935 (CODE_FOR_lsx_vmaxi_du): Ditto.
13936 (CODE_FOR_lsx_vmin_b): Ditto.
13937 (CODE_FOR_lsx_vmin_h): Ditto.
13938 (CODE_FOR_lsx_vmin_w): Ditto.
13939 (CODE_FOR_lsx_vmin_d): Ditto.
13940 (CODE_FOR_lsx_vmini_b): Ditto.
13941 (CODE_FOR_lsx_vmini_h): Ditto.
13942 (CODE_FOR_lsx_vmini_w): Ditto.
13943 (CODE_FOR_lsx_vmini_d): Ditto.
13944 (CODE_FOR_lsx_vmin_bu): Ditto.
13945 (CODE_FOR_lsx_vmin_hu): Ditto.
13946 (CODE_FOR_lsx_vmin_wu): Ditto.
13947 (CODE_FOR_lsx_vmin_du): Ditto.
13948 (CODE_FOR_lsx_vmini_bu): Ditto.
13949 (CODE_FOR_lsx_vmini_hu): Ditto.
13950 (CODE_FOR_lsx_vmini_wu): Ditto.
13951 (CODE_FOR_lsx_vmini_du): Ditto.
13952 (CODE_FOR_lsx_vmod_b): Ditto.
13953 (CODE_FOR_lsx_vmod_h): Ditto.
13954 (CODE_FOR_lsx_vmod_w): Ditto.
13955 (CODE_FOR_lsx_vmod_d): Ditto.
13956 (CODE_FOR_lsx_vmod_bu): Ditto.
13957 (CODE_FOR_lsx_vmod_hu): Ditto.
13958 (CODE_FOR_lsx_vmod_wu): Ditto.
13959 (CODE_FOR_lsx_vmod_du): Ditto.
13960 (CODE_FOR_lsx_vmul_b): Ditto.
13961 (CODE_FOR_lsx_vmul_h): Ditto.
13962 (CODE_FOR_lsx_vmul_w): Ditto.
13963 (CODE_FOR_lsx_vmul_d): Ditto.
13964 (CODE_FOR_lsx_vclz_b): Ditto.
13965 (CODE_FOR_lsx_vclz_h): Ditto.
13966 (CODE_FOR_lsx_vclz_w): Ditto.
13967 (CODE_FOR_lsx_vclz_d): Ditto.
13968 (CODE_FOR_lsx_vnor_v): Ditto.
13969 (CODE_FOR_lsx_vor_v): Ditto.
13970 (CODE_FOR_lsx_vori_b): Ditto.
13971 (CODE_FOR_lsx_vnori_b): Ditto.
13972 (CODE_FOR_lsx_vpcnt_b): Ditto.
13973 (CODE_FOR_lsx_vpcnt_h): Ditto.
13974 (CODE_FOR_lsx_vpcnt_w): Ditto.
13975 (CODE_FOR_lsx_vpcnt_d): Ditto.
13976 (CODE_FOR_lsx_vxor_v): Ditto.
13977 (CODE_FOR_lsx_vxori_b): Ditto.
13978 (CODE_FOR_lsx_vsll_b): Ditto.
13979 (CODE_FOR_lsx_vsll_h): Ditto.
13980 (CODE_FOR_lsx_vsll_w): Ditto.
13981 (CODE_FOR_lsx_vsll_d): Ditto.
13982 (CODE_FOR_lsx_vslli_b): Ditto.
13983 (CODE_FOR_lsx_vslli_h): Ditto.
13984 (CODE_FOR_lsx_vslli_w): Ditto.
13985 (CODE_FOR_lsx_vslli_d): Ditto.
13986 (CODE_FOR_lsx_vsra_b): Ditto.
13987 (CODE_FOR_lsx_vsra_h): Ditto.
13988 (CODE_FOR_lsx_vsra_w): Ditto.
13989 (CODE_FOR_lsx_vsra_d): Ditto.
13990 (CODE_FOR_lsx_vsrai_b): Ditto.
13991 (CODE_FOR_lsx_vsrai_h): Ditto.
13992 (CODE_FOR_lsx_vsrai_w): Ditto.
13993 (CODE_FOR_lsx_vsrai_d): Ditto.
13994 (CODE_FOR_lsx_vsrl_b): Ditto.
13995 (CODE_FOR_lsx_vsrl_h): Ditto.
13996 (CODE_FOR_lsx_vsrl_w): Ditto.
13997 (CODE_FOR_lsx_vsrl_d): Ditto.
13998 (CODE_FOR_lsx_vsrli_b): Ditto.
13999 (CODE_FOR_lsx_vsrli_h): Ditto.
14000 (CODE_FOR_lsx_vsrli_w): Ditto.
14001 (CODE_FOR_lsx_vsrli_d): Ditto.
14002 (CODE_FOR_lsx_vsub_b): Ditto.
14003 (CODE_FOR_lsx_vsub_h): Ditto.
14004 (CODE_FOR_lsx_vsub_w): Ditto.
14005 (CODE_FOR_lsx_vsub_d): Ditto.
14006 (CODE_FOR_lsx_vsubi_bu): Ditto.
14007 (CODE_FOR_lsx_vsubi_hu): Ditto.
14008 (CODE_FOR_lsx_vsubi_wu): Ditto.
14009 (CODE_FOR_lsx_vsubi_du): Ditto.
14010 (CODE_FOR_lsx_vpackod_d): Ditto.
14011 (CODE_FOR_lsx_vpackev_d): Ditto.
14012 (CODE_FOR_lsx_vpickod_d): Ditto.
14013 (CODE_FOR_lsx_vpickev_d): Ditto.
14014 (CODE_FOR_lsx_vrepli_b): Ditto.
14015 (CODE_FOR_lsx_vrepli_h): Ditto.
14016 (CODE_FOR_lsx_vrepli_w): Ditto.
14017 (CODE_FOR_lsx_vrepli_d): Ditto.
14018 (CODE_FOR_lsx_vsat_b): Ditto.
14019 (CODE_FOR_lsx_vsat_h): Ditto.
14020 (CODE_FOR_lsx_vsat_w): Ditto.
14021 (CODE_FOR_lsx_vsat_d): Ditto.
14022 (CODE_FOR_lsx_vsat_bu): Ditto.
14023 (CODE_FOR_lsx_vsat_hu): Ditto.
14024 (CODE_FOR_lsx_vsat_wu): Ditto.
14025 (CODE_FOR_lsx_vsat_du): Ditto.
14026 (CODE_FOR_lsx_vavg_b): Ditto.
14027 (CODE_FOR_lsx_vavg_h): Ditto.
14028 (CODE_FOR_lsx_vavg_w): Ditto.
14029 (CODE_FOR_lsx_vavg_d): Ditto.
14030 (CODE_FOR_lsx_vavg_bu): Ditto.
14031 (CODE_FOR_lsx_vavg_hu): Ditto.
14032 (CODE_FOR_lsx_vavg_wu): Ditto.
14033 (CODE_FOR_lsx_vavg_du): Ditto.
14034 (CODE_FOR_lsx_vavgr_b): Ditto.
14035 (CODE_FOR_lsx_vavgr_h): Ditto.
14036 (CODE_FOR_lsx_vavgr_w): Ditto.
14037 (CODE_FOR_lsx_vavgr_d): Ditto.
14038 (CODE_FOR_lsx_vavgr_bu): Ditto.
14039 (CODE_FOR_lsx_vavgr_hu): Ditto.
14040 (CODE_FOR_lsx_vavgr_wu): Ditto.
14041 (CODE_FOR_lsx_vavgr_du): Ditto.
14042 (CODE_FOR_lsx_vssub_b): Ditto.
14043 (CODE_FOR_lsx_vssub_h): Ditto.
14044 (CODE_FOR_lsx_vssub_w): Ditto.
14045 (CODE_FOR_lsx_vssub_d): Ditto.
14046 (CODE_FOR_lsx_vssub_bu): Ditto.
14047 (CODE_FOR_lsx_vssub_hu): Ditto.
14048 (CODE_FOR_lsx_vssub_wu): Ditto.
14049 (CODE_FOR_lsx_vssub_du): Ditto.
14050 (CODE_FOR_lsx_vabsd_b): Ditto.
14051 (CODE_FOR_lsx_vabsd_h): Ditto.
14052 (CODE_FOR_lsx_vabsd_w): Ditto.
14053 (CODE_FOR_lsx_vabsd_d): Ditto.
14054 (CODE_FOR_lsx_vabsd_bu): Ditto.
14055 (CODE_FOR_lsx_vabsd_hu): Ditto.
14056 (CODE_FOR_lsx_vabsd_wu): Ditto.
14057 (CODE_FOR_lsx_vabsd_du): Ditto.
14058 (CODE_FOR_lsx_vftint_w_s): Ditto.
14059 (CODE_FOR_lsx_vftint_l_d): Ditto.
14060 (CODE_FOR_lsx_vftint_wu_s): Ditto.
14061 (CODE_FOR_lsx_vftint_lu_d): Ditto.
14062 (CODE_FOR_lsx_vandn_v): Ditto.
14063 (CODE_FOR_lsx_vorn_v): Ditto.
14064 (CODE_FOR_lsx_vneg_b): Ditto.
14065 (CODE_FOR_lsx_vneg_h): Ditto.
14066 (CODE_FOR_lsx_vneg_w): Ditto.
14067 (CODE_FOR_lsx_vneg_d): Ditto.
14068 (CODE_FOR_lsx_vshuf4i_d): Ditto.
14069 (CODE_FOR_lsx_vbsrl_v): Ditto.
14070 (CODE_FOR_lsx_vbsll_v): Ditto.
14071 (CODE_FOR_lsx_vfmadd_s): Ditto.
14072 (CODE_FOR_lsx_vfmadd_d): Ditto.
14073 (CODE_FOR_lsx_vfmsub_s): Ditto.
14074 (CODE_FOR_lsx_vfmsub_d): Ditto.
14075 (CODE_FOR_lsx_vfnmadd_s): Ditto.
14076 (CODE_FOR_lsx_vfnmadd_d): Ditto.
14077 (CODE_FOR_lsx_vfnmsub_s): Ditto.
14078 (CODE_FOR_lsx_vfnmsub_d): Ditto.
14079 (CODE_FOR_lsx_vmuh_b): Ditto.
14080 (CODE_FOR_lsx_vmuh_h): Ditto.
14081 (CODE_FOR_lsx_vmuh_w): Ditto.
14082 (CODE_FOR_lsx_vmuh_d): Ditto.
14083 (CODE_FOR_lsx_vmuh_bu): Ditto.
14084 (CODE_FOR_lsx_vmuh_hu): Ditto.
14085 (CODE_FOR_lsx_vmuh_wu): Ditto.
14086 (CODE_FOR_lsx_vmuh_du): Ditto.
14087 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
14088 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
14089 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
14090 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
14091 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
14092 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
14093 (CODE_FOR_lsx_vssran_b_h): Ditto.
14094 (CODE_FOR_lsx_vssran_h_w): Ditto.
14095 (CODE_FOR_lsx_vssran_w_d): Ditto.
14096 (CODE_FOR_lsx_vssran_bu_h): Ditto.
14097 (CODE_FOR_lsx_vssran_hu_w): Ditto.
14098 (CODE_FOR_lsx_vssran_wu_d): Ditto.
14099 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
14100 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
14101 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
14102 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
14103 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
14104 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
14105 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
14106 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
14107 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
14108 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
14109 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
14110 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
14111 (loongarch_builtin_vector_type): Ditto.
14112 (loongarch_build_cvpointer_type): Ditto.
14113 (LARCH_ATYPE_CVPOINTER): Ditto.
14114 (LARCH_ATYPE_BOOLEAN): Ditto.
14115 (LARCH_ATYPE_V2SF): Ditto.
14116 (LARCH_ATYPE_V2HI): Ditto.
14117 (LARCH_ATYPE_V2SI): Ditto.
14118 (LARCH_ATYPE_V4QI): Ditto.
14119 (LARCH_ATYPE_V4HI): Ditto.
14120 (LARCH_ATYPE_V8QI): Ditto.
14121 (LARCH_ATYPE_V2DI): Ditto.
14122 (LARCH_ATYPE_V4SI): Ditto.
14123 (LARCH_ATYPE_V8HI): Ditto.
14124 (LARCH_ATYPE_V16QI): Ditto.
14125 (LARCH_ATYPE_V2DF): Ditto.
14126 (LARCH_ATYPE_V4SF): Ditto.
14127 (LARCH_ATYPE_V4DI): Ditto.
14128 (LARCH_ATYPE_V8SI): Ditto.
14129 (LARCH_ATYPE_V16HI): Ditto.
14130 (LARCH_ATYPE_V32QI): Ditto.
14131 (LARCH_ATYPE_V4DF): Ditto.
14132 (LARCH_ATYPE_V8SF): Ditto.
14133 (LARCH_ATYPE_UV2DI): Ditto.
14134 (LARCH_ATYPE_UV4SI): Ditto.
14135 (LARCH_ATYPE_UV8HI): Ditto.
14136 (LARCH_ATYPE_UV16QI): Ditto.
14137 (LARCH_ATYPE_UV4DI): Ditto.
14138 (LARCH_ATYPE_UV8SI): Ditto.
14139 (LARCH_ATYPE_UV16HI): Ditto.
14140 (LARCH_ATYPE_UV32QI): Ditto.
14141 (LARCH_ATYPE_UV2SI): Ditto.
14142 (LARCH_ATYPE_UV4HI): Ditto.
14143 (LARCH_ATYPE_UV8QI): Ditto.
14144 (loongarch_builtin_vectorized_function): Ditto.
14145 (LARCH_GET_BUILTIN): Ditto.
14146 (loongarch_expand_builtin_insn): Ditto.
14147 (loongarch_expand_builtin_lsx_test_branch): Ditto.
14148 (loongarch_expand_builtin): Ditto.
14149 * config/loongarch/loongarch-ftypes.def (1): Ditto.
14153 * config/loongarch/lsxintrin.h: New file.
14155 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
14157 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
14177 * config/loongarch/genopts/loongarch.opt.in: Ditto.
14178 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
14179 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
14180 (VECTOR_MODE): Ditto.
14182 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
14183 (loongarch_split_move_insn): Ditto.
14184 (loongarch_split_128bit_move): Ditto.
14185 (loongarch_split_128bit_move_p): Ditto.
14186 (loongarch_split_lsx_copy_d): Ditto.
14187 (loongarch_split_lsx_insert_d): Ditto.
14188 (loongarch_split_lsx_fill_d): Ditto.
14189 (loongarch_expand_vec_cmp): Ditto.
14190 (loongarch_const_vector_same_val_p): Ditto.
14191 (loongarch_const_vector_same_bytes_p): Ditto.
14192 (loongarch_const_vector_same_int_p): Ditto.
14193 (loongarch_const_vector_shuffle_set_p): Ditto.
14194 (loongarch_const_vector_bitimm_set_p): Ditto.
14195 (loongarch_const_vector_bitimm_clr_p): Ditto.
14196 (loongarch_lsx_vec_parallel_const_half): Ditto.
14197 (loongarch_gen_const_int_vector): Ditto.
14198 (loongarch_lsx_output_division): Ditto.
14199 (loongarch_expand_vector_init): Ditto.
14200 (loongarch_expand_vec_unpack): Ditto.
14201 (loongarch_expand_vec_perm): Ditto.
14202 (loongarch_expand_vector_extract): Ditto.
14203 (loongarch_expand_vector_reduc): Ditto.
14204 (loongarch_ldst_scaled_shift): Ditto.
14205 (loongarch_expand_vec_cond_expr): Ditto.
14206 (loongarch_expand_vec_cond_mask_expr): Ditto.
14207 (loongarch_builtin_vectorized_function): Ditto.
14208 (loongarch_gen_const_int_vector_shuffle): Ditto.
14209 (loongarch_build_signbit_mask): Ditto.
14210 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
14211 (loongarch_setup_incoming_varargs): Ditto.
14212 (loongarch_emit_move): Ditto.
14213 (loongarch_const_vector_bitimm_set_p): Ditto.
14214 (loongarch_const_vector_bitimm_clr_p): Ditto.
14215 (loongarch_const_vector_same_val_p): Ditto.
14216 (loongarch_const_vector_same_bytes_p): Ditto.
14217 (loongarch_const_vector_same_int_p): Ditto.
14218 (loongarch_const_vector_shuffle_set_p): Ditto.
14219 (loongarch_symbol_insns): Ditto.
14220 (loongarch_cannot_force_const_mem): Ditto.
14221 (loongarch_valid_offset_p): Ditto.
14222 (loongarch_valid_index_p): Ditto.
14223 (loongarch_classify_address): Ditto.
14224 (loongarch_address_insns): Ditto.
14225 (loongarch_ldst_scaled_shift): Ditto.
14226 (loongarch_const_insns): Ditto.
14227 (loongarch_split_move_insn_p): Ditto.
14228 (loongarch_subword_at_byte): Ditto.
14229 (loongarch_legitimize_move): Ditto.
14230 (loongarch_builtin_vectorization_cost): Ditto.
14231 (loongarch_split_move_p): Ditto.
14232 (loongarch_split_move): Ditto.
14233 (loongarch_split_move_insn): Ditto.
14234 (loongarch_output_move_index_float): Ditto.
14235 (loongarch_split_128bit_move_p): Ditto.
14236 (loongarch_split_128bit_move): Ditto.
14237 (loongarch_split_lsx_copy_d): Ditto.
14238 (loongarch_split_lsx_insert_d): Ditto.
14239 (loongarch_split_lsx_fill_d): Ditto.
14240 (loongarch_output_move): Ditto.
14241 (loongarch_extend_comparands): Ditto.
14242 (loongarch_print_operand_reloc): Ditto.
14243 (loongarch_print_operand): Ditto.
14244 (loongarch_hard_regno_mode_ok_uncached): Ditto.
14245 (loongarch_hard_regno_call_part_clobbered): Ditto.
14246 (loongarch_hard_regno_nregs): Ditto.
14247 (loongarch_class_max_nregs): Ditto.
14248 (loongarch_can_change_mode_class): Ditto.
14249 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
14250 (loongarch_secondary_reload): Ditto.
14251 (loongarch_vector_mode_supported_p): Ditto.
14252 (loongarch_preferred_simd_mode): Ditto.
14253 (loongarch_autovectorize_vector_modes): Ditto.
14254 (loongarch_lsx_output_division): Ditto.
14255 (loongarch_option_override_internal): Ditto.
14256 (loongarch_hard_regno_caller_save_mode): Ditto.
14257 (MAX_VECT_LEN): Ditto.
14258 (loongarch_spill_class): Ditto.
14259 (struct expand_vec_perm_d): Ditto.
14260 (loongarch_promote_function_mode): Ditto.
14261 (loongarch_expand_vselect): Ditto.
14262 (loongarch_starting_frame_offset): Ditto.
14263 (loongarch_expand_vselect_vconcat): Ditto.
14264 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
14265 (TARGET_OPTION_OVERRIDE): Ditto.
14266 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
14267 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
14268 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
14269 (loongarch_expand_lsx_shuffle): Ditto.
14270 (TARGET_SCHED_INIT): Ditto.
14271 (TARGET_SCHED_REORDER): Ditto.
14272 (TARGET_SCHED_REORDER2): Ditto.
14273 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
14274 (TARGET_SCHED_ADJUST_COST): Ditto.
14275 (TARGET_SCHED_ISSUE_RATE): Ditto.
14276 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
14277 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
14278 (TARGET_VALID_POINTER_MODE): Ditto.
14279 (TARGET_REGISTER_MOVE_COST): Ditto.
14280 (TARGET_MEMORY_MOVE_COST): Ditto.
14281 (TARGET_RTX_COSTS): Ditto.
14282 (TARGET_ADDRESS_COST): Ditto.
14283 (TARGET_IN_SMALL_DATA_P): Ditto.
14284 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
14285 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
14286 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
14287 (loongarch_expand_vec_perm): Ditto.
14288 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
14289 (TARGET_RETURN_IN_MEMORY): Ditto.
14290 (TARGET_FUNCTION_VALUE): Ditto.
14291 (TARGET_LIBCALL_VALUE): Ditto.
14292 (loongarch_try_expand_lsx_vshuf_const): Ditto.
14293 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
14294 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
14295 (TARGET_PRINT_OPERAND): Ditto.
14296 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
14297 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
14298 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
14299 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
14300 (TARGET_MUST_PASS_IN_STACK): Ditto.
14301 (TARGET_PASS_BY_REFERENCE): Ditto.
14302 (TARGET_ARG_PARTIAL_BYTES): Ditto.
14303 (TARGET_FUNCTION_ARG): Ditto.
14304 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
14305 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
14306 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
14307 (TARGET_INIT_BUILTINS): Ditto.
14308 (loongarch_expand_vec_perm_const_1): Ditto.
14309 (loongarch_expand_vec_perm_const_2): Ditto.
14310 (loongarch_vectorize_vec_perm_const): Ditto.
14311 (loongarch_cpu_sched_reassociation_width): Ditto.
14312 (loongarch_sched_reassociation_width): Ditto.
14313 (loongarch_expand_vector_extract): Ditto.
14314 (emit_reduc_half): Ditto.
14315 (loongarch_expand_vector_reduc): Ditto.
14316 (loongarch_expand_vec_unpack): Ditto.
14317 (loongarch_lsx_vec_parallel_const_half): Ditto.
14318 (loongarch_constant_elt_p): Ditto.
14319 (loongarch_gen_const_int_vector_shuffle): Ditto.
14320 (loongarch_expand_vector_init): Ditto.
14321 (loongarch_expand_lsx_cmp): Ditto.
14322 (loongarch_expand_vec_cond_expr): Ditto.
14323 (loongarch_expand_vec_cond_mask_expr): Ditto.
14324 (loongarch_expand_vec_cmp): Ditto.
14325 (loongarch_case_values_threshold): Ditto.
14326 (loongarch_build_const_vector): Ditto.
14327 (loongarch_build_signbit_mask): Ditto.
14328 (loongarch_builtin_support_vector_misalignment): Ditto.
14329 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
14330 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
14331 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
14332 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
14333 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
14334 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
14335 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
14336 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
14337 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
14338 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
14339 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
14340 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
14341 (UNITS_PER_LSX_REG): Ditto.
14342 (BITS_PER_LSX_REG): Ditto.
14343 (BIGGEST_ALIGNMENT): Ditto.
14344 (LSX_REG_FIRST): Ditto.
14345 (LSX_REG_LAST): Ditto.
14346 (LSX_REG_NUM): Ditto.
14347 (LSX_REG_P): Ditto.
14348 (LSX_REG_RTX_P): Ditto.
14349 (IMM13_OPERAND): Ditto.
14350 (LSX_SUPPORTED_MODE_P): Ditto.
14351 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
14352 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
14353 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
14360 * config/loongarch/loongarch.opt: Ditto.
14361 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
14362 (const_uimm3_operand): Ditto.
14363 (const_8_to_11_operand): Ditto.
14364 (const_12_to_15_operand): Ditto.
14365 (const_uimm4_operand): Ditto.
14366 (const_uimm6_operand): Ditto.
14367 (const_uimm7_operand): Ditto.
14368 (const_uimm8_operand): Ditto.
14369 (const_imm5_operand): Ditto.
14370 (const_imm10_operand): Ditto.
14371 (const_imm13_operand): Ditto.
14372 (reg_imm10_operand): Ditto.
14373 (aq8b_operand): Ditto.
14374 (aq8h_operand): Ditto.
14375 (aq8w_operand): Ditto.
14376 (aq8d_operand): Ditto.
14377 (aq10b_operand): Ditto.
14378 (aq10h_operand): Ditto.
14379 (aq10w_operand): Ditto.
14380 (aq10d_operand): Ditto.
14381 (aq12b_operand): Ditto.
14382 (aq12h_operand): Ditto.
14383 (aq12w_operand): Ditto.
14384 (aq12d_operand): Ditto.
14385 (const_m1_operand): Ditto.
14386 (reg_or_m1_operand): Ditto.
14387 (const_exp_2_operand): Ditto.
14388 (const_exp_4_operand): Ditto.
14389 (const_exp_8_operand): Ditto.
14390 (const_exp_16_operand): Ditto.
14391 (const_exp_32_operand): Ditto.
14392 (const_0_or_1_operand): Ditto.
14393 (const_0_to_3_operand): Ditto.
14394 (const_0_to_7_operand): Ditto.
14395 (const_2_or_3_operand): Ditto.
14396 (const_4_to_7_operand): Ditto.
14397 (const_8_to_15_operand): Ditto.
14398 (const_16_to_31_operand): Ditto.
14399 (qi_mask_operand): Ditto.
14400 (hi_mask_operand): Ditto.
14401 (si_mask_operand): Ditto.
14402 (d_operand): Ditto.
14403 (db4_operand): Ditto.
14404 (db7_operand): Ditto.
14405 (db8_operand): Ditto.
14406 (ib3_operand): Ditto.
14407 (sb4_operand): Ditto.
14408 (sb5_operand): Ditto.
14409 (sb8_operand): Ditto.
14410 (sd8_operand): Ditto.
14411 (ub4_operand): Ditto.
14412 (ub8_operand): Ditto.
14413 (uh4_operand): Ditto.
14414 (uw4_operand): Ditto.
14415 (uw5_operand): Ditto.
14416 (uw6_operand): Ditto.
14417 (uw8_operand): Ditto.
14418 (addiur2_operand): Ditto.
14419 (addiusp_operand): Ditto.
14420 (andi16_operand): Ditto.
14421 (movep_src_register): Ditto.
14422 (movep_src_operand): Ditto.
14423 (fcc_reload_operand): Ditto.
14424 (muldiv_target_operand): Ditto.
14425 (const_vector_same_val_operand): Ditto.
14426 (const_vector_same_simm5_operand): Ditto.
14427 (const_vector_same_uimm5_operand): Ditto.
14428 (const_vector_same_ximm5_operand): Ditto.
14429 (const_vector_same_uimm6_operand): Ditto.
14430 (par_const_vector_shf_set_operand): Ditto.
14431 (reg_or_vector_same_val_operand): Ditto.
14432 (reg_or_vector_same_simm5_operand): Ditto.
14433 (reg_or_vector_same_uimm5_operand): Ditto.
14434 (reg_or_vector_same_ximm5_operand): Ditto.
14435 (reg_or_vector_same_uimm6_operand): Ditto.
14436 * doc/md.texi: Ditto.
14437 * config/loongarch/lsx.md: New file.
14439 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14441 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
14442 (get_all_predecessors): New function.
14443 (get_all_successors): Ditto.
14444 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
14445 (get_all_successors): Ditto.
14446 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
14447 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
14449 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
14451 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
14452 (split_addsi): Likewise.
14453 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
14454 'N', 'x', and 'J' code letters.
14455 (arc_output_addsi): Make it static.
14456 (split_addsi): Remove it.
14457 * config/arc/arc.h (UNSIGNED_INT*): New defines.
14458 (SINNED_INT*): Likewise.
14459 * config/arc/arc.md (type): Add add, sub, bxor types.
14460 (tst_movb): Change code letter from 's' to 'x'.
14461 (andsi3_i): Likewise.
14462 (addsi3_mixed): Refurbish the pattern.
14463 (call_i): Change code letter from 'S' to 'J'.
14464 * config/arc/arc700.md: Add newly introduced types.
14465 * config/arc/arcHS.md: Likewsie.
14466 * config/arc/arcHS4x.md: Likewise.
14467 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
14468 (CM4): Update description.
14469 (CP4, C6u, C6n, CIs, C4p): New constraint.
14471 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
14473 * common/config/arc/arc-common.cc (arc_option_optimization_table):
14474 Remove mbbit_peephole.
14475 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
14476 (store_direct): Likewise.
14477 (BBIT peephole2): Likewise.
14478 * config/arc/arc.opt (mbbit-peephole): Ignore option.
14479 * doc/invoke.texi (mbbit-peephole): Update document.
14481 2023-09-05 Jakub Jelinek <jakub@redhat.com>
14483 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
14484 avreage -> average.
14486 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
14488 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
14489 options passed from driver to gnat1 as explicit for multilib.
14491 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
14493 * config.gcc: add loongarch*-elf target.
14494 * config/loongarch/elf.h: New file.
14495 Link against newlib by default.
14497 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
14499 * config.gcc: use -mstrict-align for building libraries
14500 if --with-strict-align-lib is given.
14501 * doc/install.texi: likewise.
14503 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
14505 * config/loongarch/loongarch-c.cc: Export macros
14506 "__loongarch_{arch,tune}" in the preprocessor.
14508 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
14510 * config.gcc: Make --with-abi= obsolete, decide the default ABI
14511 with target triplet. Allow specifying multilib library build
14512 options with --with-multilib-list and --with-multilib-default.
14513 * config/loongarch/t-linux: Likewise.
14514 * config/loongarch/genopts/loongarch-strings: Likewise.
14515 * config/loongarch/loongarch-str.h: Likewise.
14516 * doc/install.texi: Likewise.
14517 * config/loongarch/genopts/loongarch.opt.in: Introduce
14518 -m[no-]l[a]sx options. Only process -m*-float and
14519 -m[no-]l[a]sx in the GCC driver.
14520 * config/loongarch/loongarch.opt: Likewise.
14521 * config/loongarch/la464.md: Likewise.
14522 * config/loongarch/loongarch-c.cc: Likewise.
14523 * config/loongarch/loongarch-cpu.cc: Likewise.
14524 * config/loongarch/loongarch-cpu.h: Likewise.
14525 * config/loongarch/loongarch-def.c: Likewise.
14526 * config/loongarch/loongarch-def.h: Likewise.
14527 * config/loongarch/loongarch-driver.cc: Likewise.
14528 * config/loongarch/loongarch-driver.h: Likewise.
14529 * config/loongarch/loongarch-opts.cc: Likewise.
14530 * config/loongarch/loongarch-opts.h: Likewise.
14531 * config/loongarch/loongarch.cc: Likewise.
14532 * doc/invoke.texi: Likewise.
14534 2023-09-05 liuhongt <hongtao.liu@intel.com>
14536 * config/i386/sse.md: (V8BFH_128): Renamed to ..
14537 (VHFBF_128): .. this.
14538 (V16BFH_256): Renamed to ..
14539 (VHFBF_256): .. this.
14540 (avx512f_mov<mode>): Extend to V_128.
14541 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
14542 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
14543 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
14544 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
14545 * config/i386/i386-expand.cc (expand_vec_perm_blend):
14546 Canonicalize vec_merge.
14548 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14550 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
14551 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
14552 (autovectorize_vector_modes): Ditto.
14553 (vectorize_related_mode): Ditto.
14555 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
14557 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
14558 all 32b Darwin PowerPC cases.
14560 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
14562 * config/darwin-sections.def (static_init_section): Add the
14563 __TEXT,__StaticInit section.
14564 * config/darwin.cc (darwin_function_section): Use the static init
14565 section for global initializers, to match other platform toolchains.
14567 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
14569 * config/darwin-sections.def (darwin_exception_section): Move to
14570 the __TEXT segment.
14571 * config/darwin.cc (darwin_emit_except_table_label): Align before
14572 the exception table label.
14573 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
14574 relative 4byte relocs.
14576 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
14578 * config/darwin.cc (dump_machopic_symref_flags): New.
14579 (debug_machopic_symref_flags): New.
14581 2023-09-04 Pan Li <pan2.li@intel.com>
14583 * config/riscv/riscv-vector-builtins-types.def
14584 (vfloat16mf4_t): Add FP16 intrinsic def.
14585 (vfloat16mf2_t): Ditto.
14586 (vfloat16m1_t): Ditto.
14587 (vfloat16m2_t): Ditto.
14588 (vfloat16m4_t): Ditto.
14589 (vfloat16m8_t): Ditto.
14591 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
14593 PR tree-optimization/108757
14594 * match.pd ((X - N * M) / N): New pattern.
14595 ((X + N * M) / N): New pattern.
14596 ((X + C) div_rshift N): New pattern.
14598 2023-09-04 Guo Jie <guojie@loongson.cn>
14600 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
14601 movsf_hardfloat and movdf_hardfloat.
14603 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
14605 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
14606 In unsigned QImode test, check for sign extended subreg and/or
14607 constant operands, and do a sign extension in that case.
14608 * config/loongarch/loongarch.md (TARGET_64BIT): Define
14609 template cbranchqi4.
14611 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
14613 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
14614 from memory into floating-point registers.
14616 2023-09-03 Pan Li <pan2.li@intel.com>
14618 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
14620 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
14622 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
14624 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
14625 pointer before overwriting it.
14627 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
14629 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
14630 Associate the __float128 type to float128_type_node so that it can
14631 be recognized by the compiler.
14632 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
14633 Add the flag "FLOAT128_TYPE" to gcc and associate a function
14634 with the suffix "q" to "f128".
14635 * doc/extend.texi:Added support for 128-bit floating-point functions on
14636 the LoongArch architecture.
14638 2023-09-01 Jakub Jelinek <jakub@redhat.com>
14641 * common.opt (fabi-version=): Document version 19.
14642 * doc/invoke.texi (-fabi-version=): Likewise.
14644 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
14646 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
14647 New combine pattern.
14648 (*cond_<float_cvt><vconvert><mode>): Ditto.
14649 (*cond_<optab><vnconvert><mode>): Ditto.
14650 (*cond_<float_cvt><vnconvert><mode>): Ditto.
14651 (*cond_<optab><mode><vnconvert>): Ditto.
14652 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
14653 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
14654 (<float_cvt><vconvert><mode>2): Adjust.
14655 (<optab><vnconvert><mode>2): Adjust.
14656 (<float_cvt><vnconvert><mode>2): Adjust.
14657 (<optab><mode><vnconvert>2): Adjust.
14658 (<float_cvt><mode><vnconvert>2): Adjust.
14659 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
14661 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
14663 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
14664 New combine pattern.
14665 (*cond_trunc<mode><v_double_trunc>): Ditto.
14666 * config/riscv/autovec.md: Adjust.
14667 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
14669 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
14671 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
14672 New combine pattern.
14673 (*cond_<optab><v_quad_trunc><mode>): Ditto.
14674 (*cond_<optab><v_oct_trunc><mode>): Ditto.
14675 (*cond_trunc<mode><v_double_trunc>): Ditto.
14676 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
14677 (<optab><v_oct_trunc><mode>2): Ditto.
14679 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
14681 * config/riscv/autovec.md: Adjust.
14682 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
14683 (expand_cond_len_binop): Ditto.
14684 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
14685 (expand_cond_len_op): Ditto.
14686 (expand_cond_len_unop): Ditto.
14687 (expand_cond_len_binop): Ditto.
14688 (expand_cond_len_ternop): Ditto.
14690 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14692 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
14693 VECT_COMPARE_COSTS by default.
14695 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
14697 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
14699 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14701 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
14703 * config/riscv/riscv.opt: Add dynamic compile option.
14705 2023-09-01 Pan Li <pan2.li@intel.com>
14707 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
14708 vls floating-point autovec.
14709 * config/riscv/vector-iterators.md: New iterator for
14710 floating-point V and VLS.
14711 * config/riscv/vector.md: Add VLS to floating-point binop.
14713 2023-09-01 Andrew Pinski <apinski@marvell.com>
14715 PR tree-optimization/19832
14716 * match.pd: Add pattern to optimize
14717 `(a != b) ? a OP b : c`.
14719 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
14720 Guo Jie <guojie@loongson.cn>
14723 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
14724 frame_pointer_needed to determine whether to use the $fp register.
14726 2023-08-31 Andrew Pinski <apinski@marvell.com>
14728 PR tree-optimization/110915
14729 * match.pd (min_value, max_value): Extend to vector constants.
14731 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
14733 * config.in: Regenerate.
14734 * config/darwin-c.cc: Change spelling to macOS.
14735 * config/darwin-driver.cc: Likewise.
14736 * config/darwin.h: Likewise.
14737 * configure.ac: Likewise.
14738 * doc/contrib.texi: Likewise.
14739 * doc/extend.texi: Likewise.
14740 * doc/invoke.texi: Likewise.
14741 * doc/plugins.texi: Likewise.
14742 * doc/tm.texi: Regenerate.
14743 * doc/tm.texi.in: Change spelling to macOS.
14744 * plugin.cc: Likewise.
14746 2023-08-31 Pan Li <pan2.li@intel.com>
14748 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
14749 * config/riscv/autovec.md: Ditto.
14751 2023-08-31 Pan Li <pan2.li@intel.com>
14753 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
14754 * config/riscv/autovec.md: Ditto.
14756 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
14758 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
14759 rather than a call. List each possible destination register
14760 in the call pattern.
14762 2023-08-31 Pan Li <pan2.li@intel.com>
14764 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
14765 * config/riscv/autovec.md: Ditto.
14767 2023-08-31 Pan Li <pan2.li@intel.com>
14768 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14770 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
14771 * config/riscv/autovec.md: Ditto.
14772 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
14774 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
14776 * config/riscv/autovec.md (shifts): Use
14777 vector_scalar_shift_operand.
14778 * config/riscv/predicates.md (vector_scalar_shift_operand): New
14781 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14783 * config.gcc: Add vector cost model framework for RVV.
14784 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
14785 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
14786 * config/riscv/t-riscv: Ditto.
14787 * config/riscv/riscv-vector-costs.cc: New file.
14788 * config/riscv/riscv-vector-costs.h: New file.
14790 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
14793 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
14794 AltiVec address operands.
14795 (define_insn_and_split movxo): Likewise.
14796 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
14797 redundant mode size check.
14799 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
14801 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
14802 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
14803 Change to default policy.
14804 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
14805 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
14806 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
14808 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
14810 * config/riscv/autovec-opt.md: Adjust.
14811 * config/riscv/autovec-vls.md: Ditto.
14812 * config/riscv/autovec.md: Ditto.
14813 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
14814 (enum insn_flags): Add insn flags.
14815 (emit_vlmax_insn): Adjust.
14816 (emit_vlmax_fp_insn): Delete.
14817 (emit_vlmax_ternary_insn): Delete.
14818 (emit_vlmax_fp_ternary_insn): Delete.
14819 (emit_nonvlmax_insn): Adjust.
14820 (emit_vlmax_slide_insn): Delete.
14821 (emit_nonvlmax_slide_tu_insn): Delete.
14822 (emit_vlmax_merge_insn): Delete.
14823 (emit_vlmax_cmp_insn): Delete.
14824 (emit_vlmax_cmp_mu_insn): Delete.
14825 (emit_vlmax_masked_mu_insn): Delete.
14826 (emit_scalar_move_insn): Delete.
14827 (emit_nonvlmax_integer_move_insn): Delete.
14828 (emit_vlmax_insn_lra): Add.
14829 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
14830 (emit_vlmax_insn): Adjust.
14831 (emit_nonvlmax_insn): Adjust.
14832 (emit_vlmax_insn_lra): Add.
14833 (emit_vlmax_fp_insn): Delete.
14834 (emit_vlmax_ternary_insn): Delete.
14835 (emit_vlmax_fp_ternary_insn): Delete.
14836 (emit_vlmax_slide_insn): Delete.
14837 (emit_nonvlmax_slide_tu_insn): Delete.
14838 (emit_nonvlmax_slide_insn): Delete.
14839 (emit_vlmax_merge_insn): Delete.
14840 (emit_vlmax_cmp_insn): Delete.
14841 (emit_vlmax_cmp_mu_insn): Delete.
14842 (emit_vlmax_masked_insn): Delete.
14843 (emit_nonvlmax_masked_insn): Delete.
14844 (emit_vlmax_masked_store_insn): Delete.
14845 (emit_nonvlmax_masked_store_insn): Delete.
14846 (emit_vlmax_masked_mu_insn): Delete.
14847 (emit_vlmax_masked_fp_mu_insn): Delete.
14848 (emit_nonvlmax_tu_insn): Delete.
14849 (emit_nonvlmax_fp_tu_insn): Delete.
14850 (emit_nonvlmax_tumu_insn): Delete.
14851 (emit_nonvlmax_fp_tumu_insn): Delete.
14852 (emit_scalar_move_insn): Delete.
14853 (emit_cpop_insn): Delete.
14854 (emit_vlmax_integer_move_insn): Delete.
14855 (emit_nonvlmax_integer_move_insn): Delete.
14856 (emit_vlmax_gather_insn): Delete.
14857 (emit_vlmax_masked_gather_mu_insn): Delete.
14858 (emit_vlmax_compress_insn): Delete.
14859 (emit_nonvlmax_compress_insn): Delete.
14860 (emit_vlmax_reduction_insn): Delete.
14861 (emit_vlmax_fp_reduction_insn): Delete.
14862 (emit_nonvlmax_fp_reduction_insn): Delete.
14863 (expand_vec_series): Adjust.
14864 (expand_const_vector): Adjust.
14865 (legitimize_move): Adjust.
14866 (sew64_scalar_helper): Adjust.
14867 (expand_tuple_move): Adjust.
14868 (expand_vector_init_insert_elems): Adjust.
14869 (expand_vector_init_merge_repeating_sequence): Adjust.
14870 (expand_vec_cmp): Adjust.
14871 (expand_vec_cmp_float): Adjust.
14872 (expand_vec_perm): Adjust.
14873 (shuffle_merge_patterns): Adjust.
14874 (shuffle_compress_patterns): Adjust.
14875 (shuffle_decompress_patterns): Adjust.
14876 (expand_load_store): Adjust.
14877 (expand_cond_len_op): Adjust.
14878 (expand_cond_len_unop): Adjust.
14879 (expand_cond_len_binop): Adjust.
14880 (expand_gather_scatter): Adjust.
14881 (expand_cond_len_ternop): Adjust.
14882 (expand_reduction): Adjust.
14883 (expand_lanes_load_store): Adjust.
14884 (expand_fold_extract_last): Adjust.
14885 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
14886 * config/riscv/vector.md: Adjust.
14888 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
14891 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
14892 load/store with length only on 64-bit Power10.
14894 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
14896 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
14897 SWAP option is enabled.
14898 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
14900 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
14902 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
14903 Use common insn for signed and unsigned front-end definitions.
14904 * config/arm/arm_mve_builtins.def
14905 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
14906 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
14907 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
14910 (mve_rot): Likewise.
14912 (VxCADDQ_M): Likewise.
14913 * config/arm/unspecs.md (unspec): Likewise.
14914 * config/arm/mve.md: Fix minor typo.
14916 2023-08-31 liuhongt <hongtao.liu@intel.com>
14918 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
14919 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
14920 (VF_AVX512HFBF16): Renamed to VHFBF.
14921 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
14922 (VF_AVX512FP16): Removed.
14923 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
14924 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
14925 (rsqrt<mode>2): Ditto.
14926 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
14927 (vcond<mode><code>): Ditto.
14928 (vcond<sseintvecmodelower><mode>): Ditto.
14929 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
14930 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
14931 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
14932 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
14933 (cmla<conj_op><mode>4): Ditto.
14934 (fma_<mode>_fadd_fmul): Ditto.
14935 (fma_<mode>_fadd_fcmul): Ditto.
14936 (fma_<complexopname>_<mode>_fma_zero): Ditto.
14937 (fma_<mode>_fmaddc_bcst): Ditto.
14938 (fma_<mode>_fcmaddc_bcst): Ditto.
14939 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
14940 (cmul<conj_op><mode>3): Ditto.
14941 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
14943 (vec_unpacks_lo_<mode>): Ditto.
14944 (vec_unpacks_hi_<mode>): Ditto.
14945 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
14946 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
14947 (*vec_extract<mode>_0): Ditto.
14948 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
14950 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
14953 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
14955 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
14957 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
14958 (operator_minus::overflow_free_p): New declare.
14959 (operator_mult::overflow_free_p): New declare.
14960 * range-op.cc (range_op_handler::overflow_free_p): New function.
14961 (range_operator::overflow_free_p): New default function.
14962 (operator_plus::overflow_free_p): New function.
14963 (operator_minus::overflow_free_p): New function.
14964 (operator_mult::overflow_free_p): New function.
14965 * range-op.h (range_op_handler::overflow_free_p): New declare.
14966 (range_operator::overflow_free_p): New declare.
14967 * value-range.cc (irange::nonnegative_p): New function.
14968 (irange::nonpositive_p): New function.
14969 * value-range.h (irange::nonnegative_p): New declare.
14970 (irange::nonpositive_p): New declare.
14972 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
14975 * config/pru/predicates.md (const_0_operand): New predicate.
14976 (pru_cstore_comparison_operator): Ditto.
14977 * config/pru/pru.md (cstore<mode>4): New pattern.
14978 (cstoredi4): Ditto.
14980 2023-08-30 Richard Biener <rguenther@suse.de>
14982 PR tree-optimization/111228
14983 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
14984 New simplifications.
14986 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14988 * config/riscv/autovec.md (movmisalign<mode>): Delete.
14990 2023-08-30 Die Li <lidie@eswincomputing.com>
14991 Fei Gao <gaofei@eswincomputing.com>
14993 * config/riscv/peephole.md: New pattern.
14994 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
14995 (zcmp_mv_sreg_operand): New predicate.
14996 * config/riscv/riscv.md: New predicate.
14997 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
14998 (*mvsa01<X:mode>): New pattern.
15000 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
15002 * config/riscv/riscv.cc
15003 (riscv_zcmp_can_use_popretz): true if popretz can be used
15004 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
15005 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
15006 * config/riscv/riscv.md: define A0_REGNUM
15007 * config/riscv/zc.md
15008 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
15009 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
15010 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
15011 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
15012 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
15013 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
15014 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
15015 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
15016 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
15017 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
15018 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
15019 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
15021 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
15023 * config/riscv/iterators.md
15024 (slot0_offset): slot 0 offset in stack GPRs area in bytes
15025 (slot1_offset): slot 1 offset in stack GPRs area in bytes
15026 (slot2_offset): likewise
15027 (slot3_offset): likewise
15028 (slot4_offset): likewise
15029 (slot5_offset): likewise
15030 (slot6_offset): likewise
15031 (slot7_offset): likewise
15032 (slot8_offset): likewise
15033 (slot9_offset): likewise
15034 (slot10_offset): likewise
15035 (slot11_offset): likewise
15036 (slot12_offset): likewise
15037 * config/riscv/predicates.md
15038 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
15039 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
15040 (stack_push_up_to_s1_operand): likewise
15041 (stack_push_up_to_s2_operand): likewise
15042 (stack_push_up_to_s3_operand): likewise
15043 (stack_push_up_to_s4_operand): likewise
15044 (stack_push_up_to_s5_operand): likewise
15045 (stack_push_up_to_s6_operand): likewise
15046 (stack_push_up_to_s7_operand): likewise
15047 (stack_push_up_to_s8_operand): likewise
15048 (stack_push_up_to_s9_operand): likewise
15049 (stack_push_up_to_s11_operand): likewise
15050 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
15051 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
15052 (stack_pop_up_to_s1_operand): likewise
15053 (stack_pop_up_to_s2_operand): likewise
15054 (stack_pop_up_to_s3_operand): likewise
15055 (stack_pop_up_to_s4_operand): likewise
15056 (stack_pop_up_to_s5_operand): likewise
15057 (stack_pop_up_to_s6_operand): likewise
15058 (stack_pop_up_to_s7_operand): likewise
15059 (stack_pop_up_to_s8_operand): likewise
15060 (stack_pop_up_to_s9_operand): likewise
15061 (stack_pop_up_to_s11_operand): likewise
15062 * config/riscv/riscv-protos.h
15063 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
15064 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
15065 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
15066 (riscv_use_multi_push): true if multi push is used
15067 (riscv_multi_push_sregs_count): num of sregs in multi-push
15068 (riscv_multi_push_regs_count): num of regs in multi-push
15069 (riscv_16bytes_align): align to 16 bytes
15070 (riscv_stack_align): moved to a better place
15071 (riscv_save_libcall_count): no functional change
15072 (riscv_compute_frame_info): add zcmp frame info
15073 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
15074 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
15075 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
15076 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
15077 (riscv_expand_prologue): allocate stack by cm.push
15078 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
15079 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
15080 (zcmp_base_adj): calculate stack adjustment base size
15081 (zcmp_additional_adj): calculate stack adjustment additional size
15082 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
15083 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
15084 (S0_MASK): likewise
15085 (S1_MASK): likewise
15086 (S2_MASK): likewise
15087 (S3_MASK): likewise
15088 (S4_MASK): likewise
15089 (S5_MASK): likewise
15090 (S6_MASK): likewise
15091 (S7_MASK): likewise
15092 (S8_MASK): likewise
15093 (S9_MASK): likewise
15094 (S10_MASK): likewise
15095 (S11_MASK): likewise
15096 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
15097 (ZCMP_MAX_SPIMM): max spimm value
15098 (ZCMP_SP_INC_STEP): zcmp sp increment step
15099 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
15100 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
15101 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
15102 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
15103 * config/riscv/riscv.md: include zc.md
15104 * config/riscv/zc.md: New file. machine description for zcmp
15106 2023-08-30 Jakub Jelinek <jakub@redhat.com>
15108 PR tree-optimization/110914
15109 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
15110 adjust_last_stmt unless len is known constant.
15112 2023-08-30 Jakub Jelinek <jakub@redhat.com>
15114 PR tree-optimization/111015
15115 * gimple-ssa-store-merging.cc
15116 (imm_store_chain_info::output_merged_store): Use wi::mask and
15117 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
15118 build_int_cst to build BIT_AND_EXPR mask.
15120 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15122 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
15123 (call_may_clobber_ref_p_1): Ditto.
15124 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
15125 (get_alias_ptr_type_for_ptr_address): Ditto.
15127 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15129 * config/riscv/riscv-vsetvl.cc
15130 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
15132 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15134 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
15135 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
15138 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
15140 * config/riscv/zicond.md: New splitters to rewrite single bit
15141 sign extension as the condition to a czero in the desired form.
15143 2023-08-29 David Malcolm <dmalcolm@redhat.com>
15146 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
15148 2023-08-29 David Malcolm <dmalcolm@redhat.com>
15151 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
15153 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
15155 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
15156 zvfh can generate zfa extended instruction fli.h, just like zfh.
15158 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
15159 Vineet Gupta <vineetg@rivosinc.com>
15161 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
15162 __riscv_unaligned_avoid with value 1 or
15163 __riscv_unaligned_slow with value 1 or
15164 __riscv_unaligned_fast with value 1
15165 * config/riscv/riscv.cc (riscv_option_override): Define
15166 riscv_user_wants_strict_align. Set
15167 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
15168 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
15170 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
15172 * config/riscv/autovec-vls.md: Update types
15173 * config/riscv/riscv.md: Add vector placeholder type
15174 * config/riscv/vector.md: Update types
15176 2023-08-29 Carl Love <cel@us.ibm.com>
15178 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
15179 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
15180 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
15181 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
15182 New buit-in definitions.
15183 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
15184 overloaded definition.
15185 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
15187 2023-08-29 Pan Li <pan2.li@intel.com>
15188 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15190 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
15191 (riscv_legitimize_const_move): Handle ref plus const poly.
15193 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
15195 * common/config/riscv/riscv-common.cc
15196 (riscv_implied_info): Add implications from unprivileged extensions.
15197 (riscv_ext_version_table): Add stub support for all unprivileged
15198 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
15200 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
15202 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
15203 Add stub support for all vendor extensions supported by Binutils.
15205 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
15207 * common/config/riscv/riscv-common.cc
15208 (riscv_implied_info): Add implications from privileged extensions.
15209 (riscv_ext_version_table): Add stub support for all privileged
15210 extensions supported by Binutils.
15212 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
15214 * config/riscv/autovec.md: Adjust
15215 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
15216 (get_vlmax_rtx): Exported.
15217 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
15218 (emit_vlmax_masked_gather_mu_insn): Adjust.
15219 (get_vlmax_rtx): New func.
15220 (expand_load_store): Adjust.
15221 (expand_cond_len_unop): Call expand_cond_len_op.
15222 (expand_cond_len_op): New subroutine.
15223 (expand_cond_len_binop): Call expand_cond_len_op.
15224 (expand_cond_len_ternop): Call expand_cond_len_op.
15225 (expand_lanes_load_store): Adjust.
15227 2023-08-29 Jakub Jelinek <jakub@redhat.com>
15229 PR middle-end/79173
15230 PR middle-end/111209
15231 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
15232 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
15233 carry-out on higher limb. Don't match it though if it could be
15234 matched later on 4 argument addition/subtraction.
15236 2023-08-29 Andrew Pinski <apinski@marvell.com>
15238 PR tree-optimization/111147
15239 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
15240 instead of matching bit_not.
15242 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
15244 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
15247 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15249 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
15250 (pass_vsetvl::compute_local_properties): Fix bug.
15251 (pass_vsetvl::commit_vsetvls): Ditto.
15252 * config/riscv/riscv-vsetvl.h: New function.
15254 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
15257 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
15259 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
15260 force_reg mem target operand.
15261 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
15262 (*pred_mov<mode>): Remove imm -> reg pattern.
15263 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
15265 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
15267 * common/config/loongarch/loongarch-common.cc:
15268 Enable '-free' on O2 and above.
15269 * doc/invoke.texi: Modify the description information
15270 of the '-free' compilation option and add the LoongArch
15273 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
15275 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
15277 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
15279 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
15280 Implement the 'Zihintpause' extension, version 2.0.
15281 (riscv_ext_flag_table) Add 'Zihintpause' handling.
15282 * config/riscv/riscv-builtins.cc: Remove availability predicate
15283 "always" and add "hint_pause".
15284 (riscv_builtins) : Add "pause" extension.
15285 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
15286 * config/riscv/riscv.md (riscv_pause): Adjust output based on
15287 TARGET_ZIHINTPAUSE.
15289 2023-08-28 Andrew Pinski <apinski@marvell.com>
15291 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
15292 instead of specifically checking for ~X.
15294 2023-08-28 Andrew Pinski <apinski@marvell.com>
15296 PR tree-optimization/111146
15297 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
15300 2023-08-28 Andrew Pinski <apinski@marvell.com>
15302 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
15303 when resimplify returns true.
15304 (match_simplify_replacement): Print only if accepted the match-and-simplify
15305 result rather than the full sequence.
15307 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15309 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
15311 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
15313 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15315 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
15317 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15319 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
15320 (vmulltq_poly): New.
15321 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
15322 (vmulltq_poly): New.
15323 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
15324 (vmulltq_poly): New.
15325 * config/arm/arm_mve.h (vmulltq_poly): Remove.
15326 (vmullbq_poly): Remove.
15327 (vmullbq_poly_m): Remove.
15328 (vmulltq_poly_m): Remove.
15329 (vmullbq_poly_x): Remove.
15330 (vmulltq_poly_x): Remove.
15331 (vmulltq_poly_p8): Remove.
15332 (vmullbq_poly_p8): Remove.
15333 (vmulltq_poly_p16): Remove.
15334 (vmullbq_poly_p16): Remove.
15335 (vmullbq_poly_m_p8): Remove.
15336 (vmullbq_poly_m_p16): Remove.
15337 (vmulltq_poly_m_p8): Remove.
15338 (vmulltq_poly_m_p16): Remove.
15339 (vmullbq_poly_x_p8): Remove.
15340 (vmullbq_poly_x_p16): Remove.
15341 (vmulltq_poly_x_p8): Remove.
15342 (vmulltq_poly_x_p16): Remove.
15343 (__arm_vmulltq_poly_p8): Remove.
15344 (__arm_vmullbq_poly_p8): Remove.
15345 (__arm_vmulltq_poly_p16): Remove.
15346 (__arm_vmullbq_poly_p16): Remove.
15347 (__arm_vmullbq_poly_m_p8): Remove.
15348 (__arm_vmullbq_poly_m_p16): Remove.
15349 (__arm_vmulltq_poly_m_p8): Remove.
15350 (__arm_vmulltq_poly_m_p16): Remove.
15351 (__arm_vmullbq_poly_x_p8): Remove.
15352 (__arm_vmullbq_poly_x_p16): Remove.
15353 (__arm_vmulltq_poly_x_p8): Remove.
15354 (__arm_vmulltq_poly_x_p16): Remove.
15355 (__arm_vmulltq_poly): Remove.
15356 (__arm_vmullbq_poly): Remove.
15357 (__arm_vmullbq_poly_m): Remove.
15358 (__arm_vmulltq_poly_m): Remove.
15359 (__arm_vmullbq_poly_x): Remove.
15360 (__arm_vmulltq_poly_x): Remove.
15362 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15364 * config/arm/arm-mve-builtins-functions.h (class
15365 unspec_mve_function_exact_insn_vmull_poly): New.
15367 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15369 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
15370 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
15372 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15374 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
15375 support for 'U' and 'p' format specifiers.
15377 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15379 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
15381 (TYPES_poly_8_16): New.
15383 * config/arm/arm-mve-builtins.def (p8): New type suffix.
15385 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
15387 (struct type_suffix_info): Add poly_p field.
15389 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15391 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
15393 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
15395 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
15397 * config/arm/arm_mve.h (vmulltq_int): Remove.
15398 (vmullbq_int): Remove.
15399 (vmullbq_int_m): Remove.
15400 (vmulltq_int_m): Remove.
15401 (vmullbq_int_x): Remove.
15402 (vmulltq_int_x): Remove.
15403 (vmulltq_int_u8): Remove.
15404 (vmullbq_int_u8): Remove.
15405 (vmulltq_int_s8): Remove.
15406 (vmullbq_int_s8): Remove.
15407 (vmulltq_int_u16): Remove.
15408 (vmullbq_int_u16): Remove.
15409 (vmulltq_int_s16): Remove.
15410 (vmullbq_int_s16): Remove.
15411 (vmulltq_int_u32): Remove.
15412 (vmullbq_int_u32): Remove.
15413 (vmulltq_int_s32): Remove.
15414 (vmullbq_int_s32): Remove.
15415 (vmullbq_int_m_s8): Remove.
15416 (vmullbq_int_m_s32): Remove.
15417 (vmullbq_int_m_s16): Remove.
15418 (vmullbq_int_m_u8): Remove.
15419 (vmullbq_int_m_u32): Remove.
15420 (vmullbq_int_m_u16): Remove.
15421 (vmulltq_int_m_s8): Remove.
15422 (vmulltq_int_m_s32): Remove.
15423 (vmulltq_int_m_s16): Remove.
15424 (vmulltq_int_m_u8): Remove.
15425 (vmulltq_int_m_u32): Remove.
15426 (vmulltq_int_m_u16): Remove.
15427 (vmullbq_int_x_s8): Remove.
15428 (vmullbq_int_x_s16): Remove.
15429 (vmullbq_int_x_s32): Remove.
15430 (vmullbq_int_x_u8): Remove.
15431 (vmullbq_int_x_u16): Remove.
15432 (vmullbq_int_x_u32): Remove.
15433 (vmulltq_int_x_s8): Remove.
15434 (vmulltq_int_x_s16): Remove.
15435 (vmulltq_int_x_s32): Remove.
15436 (vmulltq_int_x_u8): Remove.
15437 (vmulltq_int_x_u16): Remove.
15438 (vmulltq_int_x_u32): Remove.
15439 (__arm_vmulltq_int_u8): Remove.
15440 (__arm_vmullbq_int_u8): Remove.
15441 (__arm_vmulltq_int_s8): Remove.
15442 (__arm_vmullbq_int_s8): Remove.
15443 (__arm_vmulltq_int_u16): Remove.
15444 (__arm_vmullbq_int_u16): Remove.
15445 (__arm_vmulltq_int_s16): Remove.
15446 (__arm_vmullbq_int_s16): Remove.
15447 (__arm_vmulltq_int_u32): Remove.
15448 (__arm_vmullbq_int_u32): Remove.
15449 (__arm_vmulltq_int_s32): Remove.
15450 (__arm_vmullbq_int_s32): Remove.
15451 (__arm_vmullbq_int_m_s8): Remove.
15452 (__arm_vmullbq_int_m_s32): Remove.
15453 (__arm_vmullbq_int_m_s16): Remove.
15454 (__arm_vmullbq_int_m_u8): Remove.
15455 (__arm_vmullbq_int_m_u32): Remove.
15456 (__arm_vmullbq_int_m_u16): Remove.
15457 (__arm_vmulltq_int_m_s8): Remove.
15458 (__arm_vmulltq_int_m_s32): Remove.
15459 (__arm_vmulltq_int_m_s16): Remove.
15460 (__arm_vmulltq_int_m_u8): Remove.
15461 (__arm_vmulltq_int_m_u32): Remove.
15462 (__arm_vmulltq_int_m_u16): Remove.
15463 (__arm_vmullbq_int_x_s8): Remove.
15464 (__arm_vmullbq_int_x_s16): Remove.
15465 (__arm_vmullbq_int_x_s32): Remove.
15466 (__arm_vmullbq_int_x_u8): Remove.
15467 (__arm_vmullbq_int_x_u16): Remove.
15468 (__arm_vmullbq_int_x_u32): Remove.
15469 (__arm_vmulltq_int_x_s8): Remove.
15470 (__arm_vmulltq_int_x_s16): Remove.
15471 (__arm_vmulltq_int_x_s32): Remove.
15472 (__arm_vmulltq_int_x_u8): Remove.
15473 (__arm_vmulltq_int_x_u16): Remove.
15474 (__arm_vmulltq_int_x_u32): Remove.
15475 (__arm_vmulltq_int): Remove.
15476 (__arm_vmullbq_int): Remove.
15477 (__arm_vmullbq_int_m): Remove.
15478 (__arm_vmulltq_int_m): Remove.
15479 (__arm_vmullbq_int_x): Remove.
15480 (__arm_vmulltq_int_x): Remove.
15482 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15484 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
15485 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
15487 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15489 * config/arm/arm-mve-builtins-functions.h (class
15490 unspec_mve_function_exact_insn_vmull): New.
15492 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15494 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
15495 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
15497 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
15499 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
15500 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
15501 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
15502 (mve_vmulltq_int_<supf><mode>): Merge into ...
15503 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
15504 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
15505 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
15506 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
15507 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
15508 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
15509 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
15511 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15513 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
15516 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
15518 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
15519 (binary_acca_int64): Likewise.
15521 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
15523 * range-op-float.cc (fold_range): Handle relations.
15525 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
15527 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
15528 Optimize the function implementation.
15530 2023-08-28 liuhongt <hongtao.liu@intel.com>
15533 * config/i386/sse.md (V48_AVX2): Rename to ..
15534 (V48_128_256): .. this.
15535 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
15536 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
15537 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
15538 integral modes when TARGET_AVX2 is not available.
15539 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
15540 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
15542 (maskstore<mode><sseintvecmodelower>): Ditto.
15544 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15546 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
15548 (after_or_same_p): Ditto.
15549 (find_reg_killed_by): Delete.
15550 (has_vsetvl_killed_avl_p): Ditto.
15551 (anticipatable_occurrence_p): Refactor.
15552 (any_set_in_bb_p): Delete.
15553 (count_regno_occurrences): Ditto.
15554 (backward_propagate_worthwhile_p): Ditto.
15555 (demands_can_be_fused_p): Ditto.
15556 (earliest_pred_can_be_fused_p): New function.
15557 (vsetvl_dominated_by_p): Ditto.
15558 (vector_insn_info::parse_insn): Refactor.
15559 (vector_insn_info::merge): Refactor.
15560 (vector_insn_info::dump): Refactor.
15561 (vector_infos_manager::vector_infos_manager): Refactor.
15562 (vector_infos_manager::all_empty_predecessor_p): Delete.
15563 (vector_infos_manager::all_same_avl_p): Ditto.
15564 (vector_infos_manager::create_bitmap_vectors): Refactor.
15565 (vector_infos_manager::free_bitmap_vectors): Refactor.
15566 (vector_infos_manager::dump): Refactor.
15567 (pass_vsetvl::update_block_info): New function.
15568 (enum fusion_type): Ditto.
15569 (pass_vsetvl::get_backward_fusion_type): Delete.
15570 (pass_vsetvl::hard_empty_block_p): Ditto.
15571 (pass_vsetvl::backward_demand_fusion): Ditto.
15572 (pass_vsetvl::forward_demand_fusion): Ditto.
15573 (pass_vsetvl::demand_fusion): Ditto.
15574 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
15575 (pass_vsetvl::compute_local_properties): Ditto.
15576 (pass_vsetvl::earliest_fusion): New function.
15577 (pass_vsetvl::vsetvl_fusion): Ditto.
15578 (pass_vsetvl::commit_vsetvls): Refactor.
15579 (get_first_vsetvl_before_rvv_insns): Ditto.
15580 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
15581 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
15582 (pass_vsetvl::df_post_optimization): Refactor.
15583 (pass_vsetvl::lazy_vsetvl): Ditto.
15584 * config/riscv/riscv-vsetvl.h: Ditto.
15586 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15588 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
15589 * config/riscv/riscv-protos.h (enum insn_type): New enum.
15590 (expand_fold_extract_last): New function.
15591 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
15592 (emit_cpop_insn): Ditto.
15593 (emit_nonvlmax_compress_insn): Ditto.
15594 (expand_fold_extract_last): Ditto.
15595 * config/riscv/vector.md: Fix vcpop.m ratio demand.
15597 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
15599 * config/riscv/sync-rvwmo.md: updated types to "multi" or
15600 "atomic" based on number of assembly lines generated
15601 * config/riscv/sync-ztso.md: likewise
15602 * config/riscv/sync.md: likewise
15604 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
15606 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
15608 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
15609 instructions FLI.H/S/D can load.
15610 * config/riscv/iterators.md (ceil): New.
15611 * config/riscv/riscv-opts.h (MASK_ZFA): New.
15613 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
15614 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
15615 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
15617 (riscv_const_insns): Likewise.
15618 (riscv_legitimize_const_move): Likewise.
15619 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
15621 (riscv_split_doubleword_move): Likewise.
15622 (riscv_output_move): Output the mov instructions in zfa extension.
15623 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
15625 (riscv_secondary_memory_needed): Likewise.
15626 * config/riscv/riscv.md (fminm<mode>3): New.
15627 (fmaxm<mode>3): New.
15628 (movsidf2_low_rv32): New.
15629 (movsidf2_high_rv32): New.
15630 (movdfsisi3_rv32): New.
15631 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
15632 * config/riscv/riscv.opt: New.
15634 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
15637 * omp-general.cc (omp_runtime_api_procname): New.
15638 (omp_runtime_api_call): Moved here from omp-low.cc, and make
15640 * omp-general.h: Include omp-api.h.
15641 * omp-low.cc (omp_runtime_api_call): Delete this copy.
15643 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
15645 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
15646 * doc/gimple.texi (GIMPLE instruction set): Add
15647 GIMPLE_OMP_STRUCTURED_BLOCK.
15648 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
15649 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
15650 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
15651 GIMPLE_OMP_STRUCTURED_BLOCK.
15652 (pp_gimple_stmt_1): Likewise.
15653 * gimple-walk.cc (walk_gimple_stmt): Likewise.
15654 * gimple.cc (gimple_build_omp_structured_block): New.
15655 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
15656 * gimple.h (gimple_build_omp_structured_block): Declare.
15657 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
15658 (CASE_GIMPLE_OMP): Likewise.
15659 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
15660 (gimplify_expr): Likewise.
15661 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
15662 GIMPLE_OMP_STRUCTURED_BLOCK.
15663 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
15664 (lower_omp_1): Likewise.
15665 (diagnose_sb_1): Likewise.
15666 (diagnose_sb_2): Likewise.
15667 * tree-inline.cc (remap_gimple_stmt): Handle
15668 GIMPLE_OMP_STRUCTURED_BLOCK.
15669 (estimate_num_insns): Likewise.
15670 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
15671 (convert_local_reference_stmt): Likewise.
15672 (convert_gimple_call): Likewise.
15673 * tree-pretty-print.cc (dump_generic_node): Handle
15674 OMP_STRUCTURED_BLOCK.
15675 * tree.def (OMP_STRUCTURED_BLOCK): New.
15676 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
15678 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
15680 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
15681 cost. Add some comments about different constants handling.
15683 2023-08-25 Andrew Pinski <apinski@marvell.com>
15685 * match.pd (`a ? one_zero : one_zero`): Move
15686 below detection of minmax.
15688 2023-08-25 Andrew Pinski <apinski@marvell.com>
15690 * match.pd (`a | C -> C`): New pattern.
15692 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
15694 * caller-save.cc (new_saved_hard_reg):
15695 Rename TRUE/FALSE to true/false.
15696 (setup_save_areas): Ditto.
15697 * gcc.cc (set_collect_gcc_options): Ditto.
15698 (driver::build_multilib_strings): Ditto.
15699 (print_multilib_info): Ditto.
15700 * genautomata.cc (gen_cpu_unit): Ditto.
15701 (gen_query_cpu_unit): Ditto.
15702 (gen_bypass): Ditto.
15703 (gen_excl_set): Ditto.
15704 (gen_presence_absence_set): Ditto.
15705 (gen_presence_set): Ditto.
15706 (gen_final_presence_set): Ditto.
15707 (gen_absence_set): Ditto.
15708 (gen_final_absence_set): Ditto.
15709 (gen_automaton): Ditto.
15710 (gen_regexp_repeat): Ditto.
15711 (gen_regexp_allof): Ditto.
15712 (gen_regexp_oneof): Ditto.
15713 (gen_regexp_sequence): Ditto.
15714 (process_decls): Ditto.
15715 (reserv_sets_are_intersected): Ditto.
15716 (initiate_excl_sets): Ditto.
15717 (form_reserv_sets_list): Ditto.
15718 (check_presence_pattern_sets): Ditto.
15719 (check_absence_pattern_sets): Ditto.
15720 (check_regexp_units_distribution): Ditto.
15721 (check_unit_distributions_to_automata): Ditto.
15722 (create_ainsns): Ditto.
15723 (output_insn_code_cases): Ditto.
15724 (output_internal_dead_lock_func): Ditto.
15725 (form_important_insn_automata_lists): Ditto.
15726 * gengtype-state.cc (read_state_files_list): Ditto.
15727 * gengtype.cc (main): Ditto.
15728 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
15730 * gimple.cc (gimple_build_call_from_tree): Ditto.
15731 (preprocess_case_label_vec_for_gimple): Ditto.
15732 * gimplify.cc (gimplify_call_expr): Ditto.
15733 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
15735 2023-08-25 Richard Biener <rguenther@suse.de>
15737 PR tree-optimization/111137
15738 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
15739 Properly handle grouped stores from other SLP instances.
15741 2023-08-25 Richard Biener <rguenther@suse.de>
15743 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
15744 Split out from vect_slp_analyze_node_dependences, remove
15746 (vect_slp_analyze_load_dependences): Split out from
15747 vect_slp_analyze_node_dependences, adjust comments. Process
15748 queued stores before any disambiguation.
15749 (vect_slp_analyze_node_dependences): Remove.
15750 (vect_slp_analyze_instance_dependence): Adjust.
15752 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
15754 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
15756 (operator_not_equal::fold_range): Adjust for relations.
15757 (operator_lt::fold_range): Same.
15758 (operator_gt::fold_range): Same.
15759 (foperator_unordered_equal::fold_range): Same.
15760 (foperator_unordered_lt::fold_range): Same.
15761 (foperator_unordered_le::fold_range): Same.
15762 (foperator_unordered_gt::fold_range): Same.
15763 (foperator_unordered_ge::fold_range): Same.
15765 2023-08-25 Richard Biener <rguenther@suse.de>
15767 PR tree-optimization/111136
15768 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
15769 stores force STMT_VINFO_STRIDED_P and also duplicate that
15772 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15774 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
15775 Add early continue.
15777 2023-08-25 liuhongt <hongtao.liu@intel.com>
15779 * config/i386/sse.md (vec_set<mode>): Removed.
15780 (V_128H): Merge into ..
15782 (V_256H): Merge into ..
15784 (V_512): Add V32HF, V32BF.
15785 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
15787 (vcond<mode><sseintvecmodelower>): Removed
15788 (vcondu<mode><sseintvecmodelower>): Removed.
15789 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
15791 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
15794 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
15795 Adjust paramter order.
15797 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
15800 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
15802 2023-08-24 David Malcolm <dmalcolm@redhat.com>
15805 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
15806 list of functions known to the analyzer.
15808 2023-08-24 Richard Biener <rguenther@suse.de>
15810 PR tree-optimization/111123
15811 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
15812 remove indirect clobbers here ...
15813 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
15814 (remove_indirect_clobbers): New function.
15816 2023-08-24 Jan Hubicka <jh@suse.cz>
15818 * cfg.h (struct control_flow_graph): New field full_profile.
15819 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
15820 * cfg.cc (init_flow): Set full_profile to false.
15821 * graphite.cc (graphite_transform_loops): Set full_profile to false.
15822 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
15823 * predict.cc (pass_profile::execute): Set full_profile to true.
15824 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
15825 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
15826 if full_profile is set.
15827 * tree-inline.cc (initialize_cfun): Initialize full_profile.
15828 (expand_call_inline): Combine full_profile.
15830 2023-08-24 Richard Biener <rguenther@suse.de>
15832 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
15833 load_p to ldst_p, fix mistakes and rely on
15834 STMT_VINFO_DATA_REF.
15836 2023-08-24 Jan Hubicka <jh@suse.cz>
15838 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
15839 of newly build trap bb.
15841 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15843 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
15844 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
15845 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
15847 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
15849 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
15850 * config/riscv/riscv.cc (riscv_option_override): Set sched
15851 pressure algorithm.
15853 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
15855 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
15857 2023-08-24 Richard Biener <rguenther@suse.de>
15859 PR tree-optimization/111125
15860 * tree-vect-slp.cc (vect_slp_function): Split at novector
15861 loop entry, do not push blocks in novector loops.
15863 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
15865 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
15867 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15869 * genmatch.cc (decision_tree::gen): Support
15870 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
15871 * gimple-match-exports.cc (gimple_simplify): Ditto.
15872 (gimple_resimplify6): New function.
15873 (gimple_resimplify7): New function.
15874 (gimple_match_op::resimplify): Support
15875 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
15876 (convert_conditional_op): Ditto.
15877 (build_call_internal): Ditto.
15878 (try_conditional_simplification): Ditto.
15879 (gimple_extract): Ditto.
15880 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
15881 * internal-fn.cc (CASE): Ditto.
15883 2023-08-24 Richard Biener <rguenther@suse.de>
15885 PR tree-optimization/111115
15886 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
15887 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
15889 * tree-vect-slp.cc (arg3_arg2_map): New.
15890 (vect_get_operand_map): Handle IFN_MASK_STORE.
15891 (vect_slp_child_index_for_operand): New function.
15892 (vect_build_slp_tree_1): Handle statements with no LHS,
15894 (vect_remove_slp_scalar_calls): Likewise.
15895 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
15896 SLP child corresponding to the ifn value index.
15897 (vectorizable_store): Likewise for the mask index. Support
15899 (vectorizable_load): Lookup the SLP child corresponding to the
15902 2023-08-24 Richard Biener <rguenther@suse.de>
15904 PR tree-optimization/111125
15905 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
15906 for the remain_defs processing.
15908 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
15910 * config/aarch64/aarch64.cc: Include ssa.h.
15911 (aarch64_multiply_add_p): Require the second operand of an
15912 Advanced SIMD subtraction to be a multiplication. Assume that
15913 such an operation won't be fused if the second operand is used
15914 multiple times and if the first operand is also a multiplication.
15916 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15918 * tree-vect-loop.cc (vectorizable_reduction): Apply
15919 LEN_FOLD_EXTRACT_LAST.
15920 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
15922 2023-08-24 Richard Biener <rguenther@suse.de>
15924 PR tree-optimization/111128
15925 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
15926 Emit external shift operand inline if we promoted it with
15927 another pattern stmt.
15929 2023-08-24 Pan Li <pan2.li@intel.com>
15931 * config/riscv/autovec.md: Fix typo.
15933 2023-08-24 Pan Li <pan2.li@intel.com>
15935 * config/riscv/riscv-vector-builtins-bases.cc
15936 (class binop_frm): Removed.
15937 (class reverse_binop_frm): Ditto.
15938 (class widen_binop_frm): Ditto.
15939 (class vfmacc_frm): Ditto.
15940 (class vfnmacc_frm): Ditto.
15941 (class vfmsac_frm): Ditto.
15942 (class vfnmsac_frm): Ditto.
15943 (class vfmadd_frm): Ditto.
15944 (class vfnmadd_frm): Ditto.
15945 (class vfmsub_frm): Ditto.
15946 (class vfnmsub_frm): Ditto.
15947 (class vfwmacc_frm): Ditto.
15948 (class vfwnmacc_frm): Ditto.
15949 (class vfwmsac_frm): Ditto.
15950 (class vfwnmsac_frm): Ditto.
15951 (class unop_frm): Ditto.
15952 (class vfrec7_frm): Ditto.
15953 (class binop): Add frm_op_type template arg.
15954 (class unop): Ditto.
15955 (class widen_binop): Ditto.
15956 (class widen_binop_fp): Ditto.
15957 (class reverse_binop): Ditto.
15958 (class vfmacc): Ditto.
15959 (class vfnmsac): Ditto.
15960 (class vfmadd): Ditto.
15961 (class vfnmsub): Ditto.
15962 (class vfnmacc): Ditto.
15963 (class vfmsac): Ditto.
15964 (class vfnmadd): Ditto.
15965 (class vfmsub): Ditto.
15966 (class vfwmacc): Ditto.
15967 (class vfwnmacc): Ditto.
15968 (class vfwmsac): Ditto.
15969 (class vfwnmsac): Ditto.
15970 (class float_misc): Ditto.
15972 2023-08-24 Andrew Pinski <apinski@marvell.com>
15974 PR tree-optimization/111109
15975 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
15976 Add check to make sure cmp and icmp are inverse.
15978 2023-08-24 Andrew Pinski <apinski@marvell.com>
15980 PR tree-optimization/95929
15981 * match.pd (convert?(-a)): New pattern
15982 for 1bit integer types.
15984 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15987 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15989 * common/config/i386/cpuinfo.h (get_available_features):
15990 Add avx10_set and version and detect avx10.1.
15991 (cpu_indicator_init): Handle avx10.1-512.
15992 * common/config/i386/i386-common.cc
15993 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
15994 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
15995 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
15996 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
15997 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
15998 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
16000 * common/config/i386/i386-cpuinfo.h (enum processor_features):
16001 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
16002 FEATURE_AVX10_512BIT.
16003 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
16004 AVX10_512BIT, AVX10_1 and AVX10_1_512.
16005 * config/i386/constraints.md (Yk): Add AVX10_1.
16008 * config/i386/cpuid.h (bit_AVX10): New.
16009 (bit_AVX10_256): Ditto.
16010 (bit_AVX10_512): Ditto.
16011 * config/i386/i386-c.cc (ix86_target_macros_internal):
16012 Define AVX10_512BIT and AVX10_1.
16013 * config/i386/i386-isa.def
16014 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
16015 (AVX10_1): Add DEF_PTA(AVX10_1).
16016 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
16017 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
16019 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
16020 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
16021 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
16022 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
16023 (ix86_conditional_register_usage): Ditto.
16024 (ix86_hard_regno_mode_ok): Ditto.
16025 (ix86_rtx_costs): Ditto.
16026 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
16027 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
16029 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
16030 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
16031 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
16034 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
16037 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16039 * common/config/i386/i386-common.cc
16040 (ix86_check_avx10): New function to check isa_flags and
16041 isa_flags_explicit to emit warning when AVX10 is enabled
16043 (ix86_check_avx512): New function to check isa_flags and
16044 isa_flags_explicit to emit warning when AVX512 is enabled
16046 (ix86_handle_option): Do not change the flags when warning
16048 * config/i386/driver-i386.cc (host_detect_local_cpu):
16049 Do not append -mno-avx10.1 for -march=native.
16051 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
16054 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16056 * common/config/i386/i386-common.cc
16057 (ix86_check_avx10_vector_width): New function to check isa_flags
16058 to emit a warning when there is a conflict in AVX10 options for
16060 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
16061 * config/i386/driver-i386.cc (host_detect_local_cpu):
16062 Do not append -mno-avx10-max-512bit for -march=native.
16064 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
16067 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16069 * config/i386/avx512vldqintrin.h: Remove target attribute.
16070 * config/i386/i386-builtin.def (BDESC):
16071 Add OPTION_MASK_ISA2_AVX10_1.
16072 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
16073 * config/i386/i386-expand.cc
16074 (ix86_check_builtin_isa_match): Ditto.
16075 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
16076 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
16077 and avx10_1_or_avx512vl.
16078 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
16079 (VF1_128_256VLDQ_AVX10_1): Ditto.
16080 (VI8_AVX512VLDQ_AVX10_1): Ditto.
16081 (<sse>_andnot<mode>3<mask_name>):
16082 Add TARGET_AVX10_1 and change isa attr from avx512dq to
16083 avx10_1_or_avx512dq.
16084 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
16085 avx512vl to avx10_1_or_avx512vl.
16086 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
16087 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
16088 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
16090 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
16092 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
16093 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
16094 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
16095 Add TARGET_AVX10_1.
16096 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
16097 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
16098 Remove target check.
16099 (avx512dq_mul<mode>3<mask_name>): Ditto.
16100 (*avx512dq_mul<mode>3<mask_name>): Ditto.
16101 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
16102 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
16103 Remove target check.
16104 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
16105 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
16106 Remove target check.
16107 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
16108 (mask_avx512vl_condition): Ditto.
16111 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
16114 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16116 * config/i386/avx512vldqintrin.h: Remove target attribute.
16117 * config/i386/i386-builtin.def (BDESC):
16118 Add OPTION_MASK_ISA2_AVX10_1.
16119 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
16120 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
16121 (VI48_AVX512VLDQ_AVX10_1): Ditto.
16122 (VF2_AVX512VL): Remove.
16123 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
16124 Add TARGET_AVX10_1.
16125 (*<code><mode>3<mask_name>): Change isa attribute to
16126 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
16127 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
16128 to avx10_1_or_avx512vl.
16129 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
16130 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
16131 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
16132 Add TARGET_AVX10_1.
16133 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
16134 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
16135 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
16136 Add TARGET_AVX10_1.
16137 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
16138 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
16139 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
16140 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
16141 (float<floatunssuffix>v4div4sf2<mask_name>):
16142 Add TARGET_AVX10_1.
16143 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
16144 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
16145 (float<floatunssuffix>v2div2sf2): Ditto.
16146 (float<floatunssuffix>v2div2sf2_mask): Ditto.
16147 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
16148 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
16149 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
16150 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
16151 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
16152 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
16153 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
16154 Change when constraint is enabled.
16156 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
16159 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16161 * config/i386/avx512vldqintrin.h: Remove target attribute.
16162 * config/i386/i386-builtin.def (BDESC):
16163 Add OPTION_MASK_ISA2_AVX10_1.
16164 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
16165 (VFH_AVX512VLDQ_AVX10_1): Ditto.
16166 (VF1_AVX512VLDQ_AVX10_1): Ditto.
16167 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
16168 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
16169 (vec_pack<floatprefix>_float_<mode>): Change iterator to
16170 VI8_AVX512VLDQ_AVX10_1. Remove target check.
16171 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
16172 VF1_AVX512VLDQ_AVX10_1. Remove target check.
16173 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
16174 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
16175 (avx512vl_vextractf128<mode>): Change iterator to
16176 VI48F_256_DQVL_AVX10_1. Remove target check.
16177 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
16178 (vec_extract_hi_<mode>): Ditto.
16179 (avx512vl_vinsert<mode>): Ditto.
16180 (vec_set_lo_<mode><mask_name>): Ditto.
16181 (vec_set_hi_<mode><mask_name>): Ditto.
16182 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
16183 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
16184 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
16185 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
16186 * config/i386/subst.md (mask_avx512dq_condition): Add
16188 (mask_scalar_merge): Ditto.
16190 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
16193 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
16196 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
16199 2023-08-24 Richard Biener <rguenther@suse.de>
16202 * dwarf2out.cc (prune_unused_types_walk): Handle
16203 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
16204 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
16205 and DW_TAG_dynamic_type as to only output them when referenced.
16207 2023-08-24 liuhongt <hongtao.liu@intel.com>
16209 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
16212 2023-08-24 liuhongt <hongtao.liu@intel.com>
16214 * common/config/i386/i386-common.cc (processor_names): Add new
16215 member graniterapids-s and arrowlake-s.
16216 * config/i386/i386-options.cc (processor_alias_table): Update
16217 table with PROCESSOR_ARROWLAKE_S and
16218 PROCESSOR_GRANITERAPIDS_D.
16219 (m_GRANITERAPID_D): New macro.
16220 (m_ARROWLAKE_S): Ditto.
16221 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
16222 (processor_cost_table): Add icelake_cost for
16223 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
16224 PROCESSOR_ARROWLAKE_S.
16225 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
16227 * config/i386/i386.h (enum processor_type): Add new member
16228 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
16229 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
16230 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
16232 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16234 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
16235 to help simplify code further.
16237 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
16239 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
16240 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
16241 Initialize using a range instead of value and edge.
16242 (phi_group::calculate_using_modifier): Use initializer value and
16243 process for relations after trying for iteration convergence.
16244 (phi_group::refine_using_relation): Use initializer range.
16245 (phi_group::dump): Rework the dump output.
16246 (phi_analyzer::process_phi): Allow multiple constant initilizers.
16247 Dump groups immediately as created.
16248 (phi_analyzer::dump): Tweak output.
16249 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
16250 (phi_group::initial_value): Delete.
16251 (phi_group::refine_using_relation): Adjust prototype.
16252 (phi_group::m_initial_value): Delete.
16253 (phi_group::m_initial_edge): Delete.
16254 (phi_group::m_vr): Use int_range_max.
16255 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
16257 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
16259 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
16260 no group was created.
16261 (phi_analyzer::process_phi): Do not create groups of one phi node.
16263 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
16265 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
16266 CODE, CMP_CODE and BIT_CODE arguments.
16267 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
16268 (aarch64_gen_ccmp_next): Likewise.
16269 * doc/tm.texi: Regenerated.
16271 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
16273 * coretypes.h (rtx_code): Add forward declaration.
16274 * rtl.h (rtx_code): Make compatible with forward declaration.
16276 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
16279 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
16280 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
16281 DWIH mode iterator. Disable (=&r,m,m) alternative for
16283 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
16284 alternative for 32-bit targets.
16286 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
16288 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
16289 appropriate type attribute.
16291 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
16293 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
16294 (*copysign<mode>_neg): Ditto.
16295 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
16296 (<optab><mode>2): Ditto.
16297 (cond_<optab><mode>): New.
16298 (cond_len_<optab><mode>): Ditto.
16299 * config/riscv/riscv-protos.h (enum insn_type): New.
16300 (expand_cond_len_unop): New helper func.
16301 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
16302 (expand_cond_len_unop): New helper func.
16304 2023-08-23 Jan Hubicka <jh@suse.cz>
16306 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
16307 (should_duplicate_loop_header_p): Fix return value for static exits.
16308 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
16310 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
16312 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
16313 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
16314 and update the final nest accordingly.
16316 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
16318 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
16319 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
16320 and update the final nest accordingly.
16322 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
16324 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
16325 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
16326 gvec_oprnds with auto_delete_vec.
16328 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16330 * config/riscv/riscv-vsetvl.cc
16331 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
16333 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16335 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
16337 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
16339 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16341 * config/riscv/vector.md: Add attribute.
16343 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16345 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
16346 (vector_infos_manager::all_same_ratio_p): Ditto.
16347 (vector_infos_manager::all_same_avl_p): Ditto.
16348 (pass_vsetvl::refine_vsetvls): Ditto.
16349 (pass_vsetvl::cleanup_vsetvls): Ditto.
16350 (pass_vsetvl::commit_vsetvls): Ditto.
16351 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
16352 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
16353 (pass_vsetvl::compute_probabilities): Ditto.
16355 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16357 * config/riscv/t-riscv: Add riscv-vsetvl.def
16359 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
16361 * config/riscv/riscv.opt: Add --param names
16362 riscv-autovec-preference and riscv-autovec-lmul
16364 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
16366 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
16368 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
16370 * tree-core.h (enum omp_clause_defaultmap_kind): Add
16371 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
16372 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
16373 * tree-pretty-print.cc (dump_omp_clause): Likewise.
16375 2023-08-22 Jakub Jelinek <jakub@redhat.com>
16378 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
16379 types aren't supported in C++.
16381 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16383 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
16384 * internal-fn.cc (fold_len_extract_direct): Ditto.
16385 (expand_fold_len_extract_optab_fn): Ditto.
16386 (direct_fold_len_extract_optab_supported_p): Ditto.
16387 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
16388 * optabs.def (OPTAB_D): Ditto.
16390 2023-08-22 Richard Biener <rguenther@suse.de>
16392 * tree-vect-stmts.cc (vectorizable_store): Do not bump
16393 DR_GROUP_STORE_COUNT here. Remove early out.
16394 (vect_transform_stmt): Only call vectorizable_store on
16395 the last element of an interleaving chain.
16397 2023-08-22 Richard Biener <rguenther@suse.de>
16399 PR tree-optimization/94864
16400 PR tree-optimization/94865
16401 PR tree-optimization/93080
16402 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
16403 for vector insertion from vector extraction.
16405 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16406 Kewen.Lin <linkw@linux.ibm.com>
16408 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
16409 (vectorizable_live_operation): Add live vectorization for length loop
16412 2023-08-22 David Malcolm <dmalcolm@redhat.com>
16415 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
16417 2023-08-22 Pan Li <pan2.li@intel.com>
16419 * config/riscv/riscv-vector-builtins-bases.cc
16420 (vfwredusum_frm_obj): New declaration.
16422 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16423 * config/riscv/riscv-vector-builtins-functions.def
16424 (vfwredusum_frm): New intrinsic function def.
16426 2023-08-21 David Faust <david.faust@oracle.com>
16428 * config/bpf/bpf.md (neg): Second operand must be a register.
16430 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
16432 * config/riscv/bitmanip.md: Added bitmanip type to insns
16433 that are missing types.
16435 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
16437 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
16440 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
16442 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
16443 Fix format specifier.
16445 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
16447 * value-range.cc (frange::union_nans): Return false if nothing
16449 (range_tests_floats): New test.
16451 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16453 PR tree-optimization/111048
16454 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
16456 (fold_vec_perm_cst): Remove workaround and again call
16457 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
16458 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
16460 2023-08-21 Richard Biener <rguenther@suse.de>
16462 PR tree-optimization/111082
16463 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
16464 pun operations that can overflow.
16466 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16468 * lcm.cc (compute_antinout_edge): Export as global use.
16469 (compute_earliest): Ditto.
16470 (compute_rev_insert_delete): Ditto.
16471 * lcm.h (compute_antinout_edge): Ditto.
16472 (compute_earliest): Ditto.
16474 2023-08-21 Richard Biener <rguenther@suse.de>
16476 PR tree-optimization/111070
16477 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
16478 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
16480 2023-08-21 Andrew Pinski <apinski@marvell.com>
16482 PR tree-optimization/111002
16483 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
16485 2023-08-21 liuhongt <hongtao.liu@intel.com>
16487 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
16489 * common/config/i386/i386-common.cc (alias_table): Support
16490 -march=gracemont as an alias of -march=alderlake.
16492 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
16494 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
16495 instead of src in the call to ix86_expand_sse_cmp.
16496 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
16497 force operands[1] to a register.
16498 (<any_extend:insn>v4hiv4si2): Ditto.
16499 (<any_extend:insn>v2siv2di2): Ditto.
16501 2023-08-20 Andrew Pinski <apinski@marvell.com>
16503 PR tree-optimization/111006
16504 PR tree-optimization/110986
16505 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
16507 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
16510 * Makefile.in: improve error message when /usr/include is
16513 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
16515 PR middle-end/111017
16516 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
16517 to expand_omp_build_cond for 'factor != 0' condition, resulting
16518 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
16520 2023-08-19 Guo Jie <guojie@loongson.cn>
16521 Lulu Cheng <chenglulu@loongson.cn>
16523 * config/loongarch/t-loongarch: Add loongarch-driver.h into
16524 TM_H. Add loongarch-def.h and loongarch-tune.h into
16527 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
16530 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
16531 Also handle V2QImode.
16532 (ix86_expand_sse_extend): New function.
16533 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
16534 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
16535 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
16536 (<any_extend:insn>v2hiv2si2): Ditto.
16537 (<any_extend:insn>v2qiv2hi2): Ditto.
16538 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
16539 (<any_extend:insn>v4hiv4si2): Ditto.
16540 (<any_extend:insn>v2siv2di2): Ditto.
16542 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
16545 * value-range.cc (irange::union_bitmask): Return FALSE if updated
16546 bitmask is semantically equivalent to the original mask.
16547 (irange::intersect_bitmask): Same.
16548 (irange::get_bitmask): Add comment.
16550 2023-08-18 Richard Biener <rguenther@suse.de>
16552 PR tree-optimization/111019
16553 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
16554 also scrap base and offset in case the ref is indirect.
16556 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
16558 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
16560 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
16562 PR bootstrap/111021
16563 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
16565 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
16567 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
16569 (vectorizable_store): ... here.
16571 2023-08-18 Richard Biener <rguenther@suse.de>
16573 PR tree-optimization/111048
16574 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
16577 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
16580 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
16583 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
16585 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
16586 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
16587 and update the final nest accordingly.
16589 2023-08-18 Andrew Pinski <apinski@marvell.com>
16591 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
16592 cond_len_neg and cond_len_one_cmpl.
16594 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
16596 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
16597 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
16598 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
16599 (*local_pic_load_32d<ANYF:mode>): Ditto.
16600 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
16601 (*local_pic_store<ANYF:mode>): Ditto.
16602 (*local_pic_store<ANYLSF:mode>): Ditto.
16603 (*local_pic_store_32d<ANYF:mode>): Ditto.
16604 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
16606 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
16607 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16609 * config/riscv/predicates.md (vector_const_0_operand): New.
16610 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
16612 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
16614 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
16617 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
16619 PR tree-optimization/111009
16620 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
16622 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
16624 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
16625 slots_num initialization from here ...
16626 (lra_spill): ... to here before the 1st call of
16627 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
16628 fp->sp elimination.
16630 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
16633 * doc/invoke.texi (Option Summary): Mention
16634 -Wcompare-distinct-pointer-types under `Warning Options'.
16635 (Warning Options): Document -Wcompare-distinct-pointer-types.
16637 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
16639 * recog.cc (memory_address_addr_space_p): Mark possibly unused
16640 argument as unused.
16642 2023-08-17 Richard Biener <rguenther@suse.de>
16644 PR tree-optimization/111039
16645 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
16646 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
16648 2023-08-17 Alex Coplan <alex.coplan@arm.com>
16650 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
16652 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
16655 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
16656 `naked' function attribute.
16657 (bpf_warn_func_return): New function.
16658 (TARGET_WARN_FUNC_RETURN): Define.
16659 (bpf_expand_prologue): Add preventive comment.
16660 (bpf_expand_epilogue): Likewise.
16661 * doc/extend.texi (BPF Function Attributes): Document the `naked'
16662 function attribute.
16664 2023-08-17 Richard Biener <rguenther@suse.de>
16666 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
16667 !needs_fold_left_reduction_p to decide whether we can
16668 handle the reduction with association.
16669 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
16670 reductions perform all arithmetic in an unsigned type.
16672 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
16674 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
16676 * configure: Regenerate.
16678 2023-08-17 Pan Li <pan2.li@intel.com>
16680 * config/riscv/riscv-vector-builtins-bases.cc
16681 (widen_freducop): Add frm_opt_type template arg.
16682 (vfwredosum_frm_obj): New declaration.
16684 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16685 * config/riscv/riscv-vector-builtins-functions.def
16686 (vfwredosum_frm): New intrinsic function def.
16688 2023-08-17 Pan Li <pan2.li@intel.com>
16690 * config/riscv/riscv-vector-builtins-bases.cc
16691 (vfredosum_frm_obj): New declaration.
16693 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16694 * config/riscv/riscv-vector-builtins-functions.def
16695 (vfredosum_frm): New intrinsic function def.
16697 2023-08-17 Pan Li <pan2.li@intel.com>
16699 * config/riscv/riscv-vector-builtins-bases.cc
16700 (class freducop): Add frm_op_type template arg.
16701 (vfredusum_frm_obj): New declaration.
16703 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16704 * config/riscv/riscv-vector-builtins-functions.def
16705 (vfredusum_frm): New intrinsic function def.
16706 * config/riscv/riscv-vector-builtins-shapes.cc
16707 (struct reduc_alu_frm_def): New class for frm shape.
16708 (SHAPE): New declaration.
16709 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
16711 2023-08-17 Pan Li <pan2.li@intel.com>
16713 * config/riscv/riscv-vector-builtins-bases.cc
16714 (class vfncvt_f): Add frm_op_type template arg.
16715 (vfncvt_f_frm_obj): New declaration.
16717 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16718 * config/riscv/riscv-vector-builtins-functions.def
16719 (vfncvt_f_frm): New intrinsic function def.
16721 2023-08-17 Pan Li <pan2.li@intel.com>
16723 * config/riscv/riscv-vector-builtins-bases.cc
16724 (vfncvt_xu_frm_obj): New declaration.
16726 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16727 * config/riscv/riscv-vector-builtins-functions.def
16728 (vfncvt_xu_frm): New intrinsic function def.
16730 2023-08-17 Pan Li <pan2.li@intel.com>
16732 * config/riscv/riscv-vector-builtins-bases.cc
16733 (class vfncvt_x): Add frm_op_type template arg.
16734 (BASE): New declaration.
16735 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16736 * config/riscv/riscv-vector-builtins-functions.def
16737 (vfncvt_x_frm): New intrinsic function def.
16738 * config/riscv/riscv-vector-builtins-shapes.cc
16739 (struct narrow_alu_frm_def): New shape function for frm.
16740 (SHAPE): New declaration.
16741 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
16743 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16745 * config/i386/avx512vldqintrin.h: Remove target attribute.
16746 * config/i386/i386-builtin.def (BDESC):
16747 Add OPTION_MASK_ISA2_AVX10_1.
16748 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
16749 (VFH_AVX512VLDQ_AVX10_1): Ditto.
16750 (VF1_AVX512VLDQ_AVX10_1): Ditto.
16751 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
16752 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
16753 (vec_pack<floatprefix>_float_<mode>): Change iterator to
16754 VI8_AVX512VLDQ_AVX10_1. Remove target check.
16755 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
16756 VF1_AVX512VLDQ_AVX10_1. Remove target check.
16757 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
16758 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
16759 (avx512vl_vextractf128<mode>): Change iterator to
16760 VI48F_256_DQVL_AVX10_1. Remove target check.
16761 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
16762 (vec_extract_hi_<mode>): Ditto.
16763 (avx512vl_vinsert<mode>): Ditto.
16764 (vec_set_lo_<mode><mask_name>): Ditto.
16765 (vec_set_hi_<mode><mask_name>): Ditto.
16766 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
16767 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
16768 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
16769 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
16770 * config/i386/subst.md (mask_avx512dq_condition): Add
16772 (mask_scalar_merge): Ditto.
16774 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16776 * config/i386/avx512vldqintrin.h: Remove target attribute.
16777 * config/i386/i386-builtin.def (BDESC):
16778 Add OPTION_MASK_ISA2_AVX10_1.
16779 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
16780 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
16781 (VI48_AVX512VLDQ_AVX10_1): Ditto.
16782 (VF2_AVX512VL): Remove.
16783 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
16784 Add TARGET_AVX10_1.
16785 (*<code><mode>3<mask_name>): Change isa attribute to
16786 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
16787 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
16788 to avx10_1_or_avx512vl.
16789 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
16790 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
16791 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
16792 Add TARGET_AVX10_1.
16793 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
16794 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
16795 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
16796 Add TARGET_AVX10_1.
16797 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
16798 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
16799 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
16800 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
16801 (float<floatunssuffix>v4div4sf2<mask_name>):
16802 Add TARGET_AVX10_1.
16803 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
16804 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
16805 (float<floatunssuffix>v2div2sf2): Ditto.
16806 (float<floatunssuffix>v2div2sf2_mask): Ditto.
16807 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
16808 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
16809 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
16810 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
16811 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
16812 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
16813 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
16814 Change when constraint is enabled.
16816 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16819 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
16820 (second_sew_less_than_first_sew_p): Fix bug.
16821 (first_sew_less_than_second_sew_p): Ditto.
16823 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16825 * config/i386/avx512vldqintrin.h: Remove target attribute.
16826 * config/i386/i386-builtin.def (BDESC):
16827 Add OPTION_MASK_ISA2_AVX10_1.
16828 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
16829 * config/i386/i386-expand.cc
16830 (ix86_check_builtin_isa_match): Ditto.
16831 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
16832 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
16833 and avx10_1_or_avx512vl.
16834 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
16835 (VF1_128_256VLDQ_AVX10_1): Ditto.
16836 (VI8_AVX512VLDQ_AVX10_1): Ditto.
16837 (<sse>_andnot<mode>3<mask_name>):
16838 Add TARGET_AVX10_1 and change isa attr from avx512dq to
16839 avx10_1_or_avx512dq.
16840 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
16841 avx512vl to avx10_1_or_avx512vl.
16842 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
16843 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
16844 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
16846 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
16848 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
16849 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
16850 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
16851 Add TARGET_AVX10_1.
16852 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
16853 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
16854 Remove target check.
16855 (avx512dq_mul<mode>3<mask_name>): Ditto.
16856 (*avx512dq_mul<mode>3<mask_name>): Ditto.
16857 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
16858 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
16859 Remove target check.
16860 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
16861 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
16862 Remove target check.
16863 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
16864 (mask_avx512vl_condition): Ditto.
16867 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16869 * common/config/i386/i386-common.cc
16870 (ix86_check_avx10_vector_width): New function to check isa_flags
16871 to emit a warning when there is a conflict in AVX10 options for
16873 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
16874 * config/i386/driver-i386.cc (host_detect_local_cpu):
16875 Do not append -mno-avx10-max-512bit for -march=native.
16877 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16879 * common/config/i386/i386-common.cc
16880 (ix86_check_avx10): New function to check isa_flags and
16881 isa_flags_explicit to emit warning when AVX10 is enabled
16883 (ix86_check_avx512): New function to check isa_flags and
16884 isa_flags_explicit to emit warning when AVX512 is enabled
16886 (ix86_handle_option): Do not change the flags when warning
16888 * config/i386/driver-i386.cc (host_detect_local_cpu):
16889 Do not append -mno-avx10.1 for -march=native.
16891 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16893 * common/config/i386/cpuinfo.h (get_available_features):
16894 Add avx10_set and version and detect avx10.1.
16895 (cpu_indicator_init): Handle avx10.1-512.
16896 * common/config/i386/i386-common.cc
16897 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
16898 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
16899 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
16900 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
16901 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
16902 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
16904 * common/config/i386/i386-cpuinfo.h (enum processor_features):
16905 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
16906 FEATURE_AVX10_512BIT.
16907 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
16908 AVX10_512BIT, AVX10_1 and AVX10_1_512.
16909 * config/i386/constraints.md (Yk): Add AVX10_1.
16912 * config/i386/cpuid.h (bit_AVX10): New.
16913 (bit_AVX10_256): Ditto.
16914 (bit_AVX10_512): Ditto.
16915 * config/i386/i386-c.cc (ix86_target_macros_internal):
16916 Define AVX10_512BIT and AVX10_1.
16917 * config/i386/i386-isa.def
16918 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
16919 (AVX10_1): Add DEF_PTA(AVX10_1).
16920 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
16921 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
16923 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
16924 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
16925 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
16926 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
16927 (ix86_conditional_register_usage): Ditto.
16928 (ix86_hard_regno_mode_ok): Ditto.
16929 (ix86_rtx_costs): Ditto.
16930 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
16931 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
16933 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
16934 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
16935 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
16938 2023-08-17 Sergei Trofimovich <siarheit@google.com>
16940 * flag-types.h (vrp_mode): Remove unused.
16942 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
16944 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
16947 2023-08-17 Andrew Pinski <apinski@marvell.com>
16949 * internal-fn.def (COND_NOT): New internal function.
16950 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
16952 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
16953 into conditional not.
16954 * optabs.def (cond_one_cmpl): New optab.
16955 (cond_len_one_cmpl): Likewise.
16957 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
16959 PR rtl-optimization/110254
16960 * ira-color.cc (improve_allocation): Update array
16961 allocated_hard_reg_p.
16963 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
16965 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
16966 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
16967 (lra_update_fp2sp_elimination): Ditto.
16968 (update_reg_eliminate): Adjust spill_pseudos call.
16969 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
16970 in lra_update_fp2sp_elimination.
16972 2023-08-16 Richard Ball <richard.ball@arm.com>
16974 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
16975 * config/aarch64/aarch64-tune.md: Regenerate.
16976 * doc/invoke.texi: Document Cortex-A720 CPU.
16978 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
16980 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
16981 Implement expander.
16982 (<u>avg<v_double_trunc>3_ceil): Ditto.
16983 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
16986 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
16988 * internal-fn.cc (vec_extract_direct): Change type argument
16990 (expand_vec_extract_optab_fn): Call convert_optab_fn.
16991 (direct_vec_extract_optab_supported_p): Use
16992 convert_optab_supported_p.
16994 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16995 Richard Sandiford <richard.sandiford@arm.com>
16997 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
16998 (valid_mask_for_fold_vec_perm_cst_p): New function.
16999 (fold_vec_perm_cst): Likewise.
17000 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
17001 (test_fold_vec_perm_cst): New namespace.
17002 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
17003 (test_fold_vec_perm_cst::validate_res): Likewise.
17004 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
17005 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
17006 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
17007 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
17008 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
17009 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
17010 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
17011 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
17012 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
17013 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
17014 (test_fold_vec_perm_cst::test): Likewise.
17015 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
17017 2023-08-16 Pan Li <pan2.li@intel.com>
17019 * config/riscv/riscv-vector-builtins-bases.cc
17020 (BASE): New declaration.
17021 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17022 * config/riscv/riscv-vector-builtins-functions.def
17023 (vfwcvt_xu_frm): New intrinsic function def.
17025 2023-08-16 Pan Li <pan2.li@intel.com>
17027 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
17029 2023-08-16 Pan Li <pan2.li@intel.com>
17031 * config/riscv/riscv-vector-builtins-bases.cc
17032 (BASE): New declaration.
17033 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17034 * config/riscv/riscv-vector-builtins-functions.def
17035 (vfwcvt_x_frm): New intrinsic function def.
17037 2023-08-16 Pan Li <pan2.li@intel.com>
17039 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
17040 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17041 * config/riscv/riscv-vector-builtins-functions.def
17042 (vfcvt_f_frm): New intrinsic function def.
17044 2023-08-16 Pan Li <pan2.li@intel.com>
17046 * config/riscv/riscv-vector-builtins-bases.cc
17047 (BASE): New declaration.
17048 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17049 * config/riscv/riscv-vector-builtins-functions.def
17050 (vfcvt_xu_frm): New intrinsic function def..
17052 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
17055 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
17056 extract when the element is 7 on BE while 8 on LE for byte or 3 on
17057 BE while 4 on LE for halfword.
17059 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
17062 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
17063 for V8HI and V16QI.
17064 (vsx_extract_v4si): New expand for V4SI extraction.
17065 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
17066 word 1 from BE order.
17067 (*mfvsrwz): New insn pattern for mfvsrwz.
17068 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
17069 word 1 from BE order.
17070 (*vsx_extract_si): Remove.
17071 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
17074 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17076 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
17078 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
17079 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
17080 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
17081 (expand_lanes_load_store): New function.
17082 * config/riscv/vector-iterators.md: New iterator.
17084 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17086 * internal-fn.cc (internal_load_fn_p): Apply
17087 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
17088 (internal_store_fn_p): Ditto.
17089 (internal_fn_len_index): Ditto.
17090 (internal_fn_mask_index): Ditto.
17091 (internal_fn_stored_value_index): Ditto.
17092 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
17093 (vect_load_lanes_supported): Ditto.
17094 * tree-vect-loop.cc: Ditto.
17095 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
17096 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
17097 (get_group_load_store_type): Ditto.
17098 (vectorizable_store): Ditto.
17099 (vectorizable_load): Ditto.
17100 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
17101 (vect_load_lanes_supported): Ditto.
17103 2023-08-16 Pan Li <pan2.li@intel.com>
17105 * config/riscv/riscv-vector-builtins-bases.cc
17106 (enum frm_op_type): New type for frm.
17107 (BASE): New declaration.
17108 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17109 * config/riscv/riscv-vector-builtins-functions.def
17110 (vfcvt_x_frm): New intrinsic function def.
17112 2023-08-16 liuhongt <hongtao.liu@intel.com>
17114 * config/i386/i386-builtins.cc
17115 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
17116 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
17117 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
17118 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
17119 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
17120 for use_scatter_8parts
17121 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
17122 (TARGET_USE_GATHER_8PARTS): .. this.
17123 (TARGET_USE_SCATTER): Rename to ..
17124 (TARGET_USE_SCATTER_8PARTS): .. this.
17125 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
17126 (X86_TUNE_USE_GATHER_8PARTS): .. this.
17127 (X86_TUNE_USE_SCATTER): Rename to
17128 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
17129 * config/i386/i386.opt: Add new options mgather, mscatter.
17131 2023-08-16 liuhongt <hongtao.liu@intel.com>
17133 * config/i386/i386-options.cc (m_GDS): New macro.
17134 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
17136 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
17137 (X86_TUNE_USE_GATHER): Ditto.
17139 2023-08-16 liuhongt <hongtao.liu@intel.com>
17141 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
17142 vmovsd when moving DFmode between SSE_REGS.
17143 (movhi_internal): Generate vmovdqa instead of vmovsh when
17144 moving HImode between SSE_REGS.
17145 (mov<mode>_internal): Use vmovaps instead of vmovsh when
17146 moving HF/BFmode between SSE_REGS.
17148 2023-08-15 David Faust <david.faust@oracle.com>
17150 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
17152 2023-08-15 David Faust <david.faust@oracle.com>
17155 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
17156 for any mode 32-bits or smaller, not just SImode.
17158 2023-08-15 Martin Jambor <mjambor@suse.cz>
17162 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
17163 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
17164 (ipcp_transform_function): Do not deallocate transformation info.
17165 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
17167 (vn_reference_lookup_2): When hitting default-def vuse, query
17168 IPA-CP transformation info for any known constants.
17170 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
17171 Thomas Schwinge <thomas@codesourcery.com>
17173 * gimplify.cc (oacc_region_type_name): New function.
17174 (oacc_default_clause): If no 'default' clause appears on this
17175 compute construct, see if one appears on a lexically containing
17177 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
17178 ctx->oacc_default_clause_ctx to current context.
17180 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17183 * config/riscv/predicates.md: Fix predicate.
17185 2023-08-15 Richard Biener <rguenther@suse.de>
17187 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
17188 slp_inst_kind_ctor handling.
17189 (vect_analyze_slp): Simplify.
17190 (vect_build_slp_instance): Dump when we analyze a CTOR.
17191 (vect_slp_check_for_constructors): Rename to ...
17192 (vect_slp_check_for_roots): ... this. Register a
17193 slp_root for CONSTRUCTORs instead of shoving them to
17194 the set of grouped stores.
17195 (vect_slp_analyze_bb_1): Adjust.
17197 2023-08-15 Richard Biener <rguenther@suse.de>
17199 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
17201 (_slp_instance::remain_defs): ... this.
17202 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
17203 (SLP_INSTANCE_REMAIN_DEFS): ... this.
17204 (slp_root::remain): New.
17205 (slp_root::slp_root): Adjust.
17206 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
17207 (vect_build_slp_instance): Get extra remain parameter,
17208 adjust former handling of a cut off stmt.
17209 (vect_analyze_slp_instance): Adjust.
17210 (vect_analyze_slp): Likewise.
17211 (_bb_vec_info::~_bb_vec_info): Likewise.
17212 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
17213 (vect_slp_check_for_constructors): Handle non-internal
17214 defs as remain defs of a reduction.
17215 (vectorize_slp_instance_root_stmt): Adjust.
17217 2023-08-15 Richard Biener <rguenther@suse.de>
17219 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
17220 (canonicalize_loop_induction_variables): Use find_loop_location.
17222 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
17224 PR bootstrap/111021
17225 * config/cris/cris-protos.h: Revert recent change.
17226 * config/cris/cris.cc (cris_legitimate_address_p): Remove
17227 code_helper unused parameter.
17228 (cris_legitimate_address_p_hook): New wrapper function.
17229 (TARGET_LEGITIMATE_ADDRESS_P): Change to
17230 cris_legitimate_address_p_hook.
17232 2023-08-15 Richard Biener <rguenther@suse.de>
17234 PR tree-optimization/110963
17235 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
17236 a PHI node when the expression is available on all edges
17237 and we insert at most one copy from a constant.
17239 2023-08-15 Richard Biener <rguenther@suse.de>
17241 PR tree-optimization/110991
17242 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
17243 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
17244 that will end up constant.
17246 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
17248 PR bootstrap/111021
17249 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
17251 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
17253 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
17254 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
17255 and update the final nest accordingly.
17257 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
17259 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
17262 2023-08-15 Pan Li <pan2.li@intel.com>
17264 * mode-switching.cc (create_pre_exit): Add SET insn check.
17266 2023-08-15 Pan Li <pan2.li@intel.com>
17268 * config/riscv/riscv-vector-builtins-bases.cc
17269 (class vfrec7_frm): New class for frm.
17270 (vfrec7_frm_obj): New declaration.
17272 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17273 * config/riscv/riscv-vector-builtins-functions.def
17274 (vfrec7_frm): New intrinsic function definition.
17275 * config/riscv/vector-iterators.md
17276 (VFMISC): Remove VFREC7.
17278 (float_insn_type): Ditto.
17279 (VFMISC_FRM): New int iterator.
17280 (misc_frm_op): New op for frm.
17281 (float_frm_insn_type): New type for frm.
17282 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
17283 New pattern for misc frm.
17285 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
17287 * lra-constraints.cc (curr_insn_transform): Process output stack
17288 pointer reloads before emitting reload insns.
17290 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
17293 * doc/invoke.texi: Add documentation of
17294 fanalyzer-show-events-in-system-headers
17296 2023-08-14 Jan Hubicka <jh@suse.cz>
17298 PR gcov-profile/110988
17299 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
17301 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
17303 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
17304 Enable compressed builtins when ZC* extensions enabled.
17305 * config/riscv/riscv-shorten-memrefs.cc:
17306 Enable shorten_memrefs pass when ZC* extensions enabled.
17307 * config/riscv/riscv.cc (riscv_compressed_reg_p):
17308 Enable compressible registers when ZC* extensions enabled.
17309 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
17310 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
17311 (riscv_first_stack_step): Allow compression of the register saves
17312 without adding extra instructions.
17313 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
17314 to 16 bits when ZC* extensions enabled.
17316 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
17318 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
17319 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
17324 (MASK_ZCMP): Ditto.
17325 (MASK_ZCMT): Ditto.
17326 (TARGET_ZCA): New target.
17327 (TARGET_ZCB): Ditto.
17328 (TARGET_ZCE): Ditto.
17329 (TARGET_ZCF): Ditto.
17330 (TARGET_ZCD): Ditto.
17331 (TARGET_ZCMP): Ditto.
17332 (TARGET_ZCMT): Ditto.
17333 * config/riscv/riscv.opt: New target variable.
17335 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17338 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
17340 * genrecog.cc (print_nonbool_test): Fix type error of
17341 switch (SUBREG_BYTE (op))'.
17343 2023-08-14 Richard Biener <rguenther@suse.de>
17345 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
17347 2023-08-14 Pan Li <pan2.li@intel.com>
17349 * config/riscv/riscv-vector-builtins-bases.cc
17350 (class unop_frm): New class for frm.
17351 (vfsqrt_frm_obj): New declaration.
17353 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17354 * config/riscv/riscv-vector-builtins-functions.def
17355 (vfsqrt_frm): New intrinsic function definition.
17357 2023-08-14 Pan Li <pan2.li@intel.com>
17359 * config/riscv/riscv-vector-builtins-bases.cc
17360 (class vfwnmsac_frm): New class for frm.
17361 (vfwnmsac_frm_obj): New declaration.
17363 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17364 * config/riscv/riscv-vector-builtins-functions.def
17365 (vfwnmsac_frm): New intrinsic function definition.
17367 2023-08-14 Pan Li <pan2.li@intel.com>
17369 * config/riscv/riscv-vector-builtins-bases.cc
17370 (class vfwmsac_frm): New class for frm.
17371 (vfwmsac_frm_obj): New declaration.
17373 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17374 * config/riscv/riscv-vector-builtins-functions.def
17375 (vfwmsac_frm): New intrinsic function definition.
17377 2023-08-14 Pan Li <pan2.li@intel.com>
17379 * config/riscv/riscv-vector-builtins-bases.cc
17380 (class vfwnmacc_frm): New class for frm.
17381 (vfwnmacc_frm_obj): New declaration.
17383 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17384 * config/riscv/riscv-vector-builtins-functions.def
17385 (vfwnmacc_frm): New intrinsic function definition.
17387 2023-08-14 Cui, Lili <lili.cui@intel.com>
17389 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
17392 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
17394 * config/mmix/predicates.md (mmix_address_operand): Use
17395 lra_in_progress, not reload_in_progress.
17397 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
17399 * config/mmix/mmix.cc: Re-enable LRA.
17401 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
17403 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
17404 when lra_in_progress.
17406 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
17408 * config/mmix/mmix.cc: Disable LRA for MMIX.
17410 2023-08-14 Pan Li <pan2.li@intel.com>
17412 * config/riscv/riscv-vector-builtins-bases.cc
17413 (class vfwmacc_frm): New class for vfwmacc frm.
17414 (vfwmacc_frm_obj): New declaration.
17416 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17417 * config/riscv/riscv-vector-builtins-functions.def
17418 (vfwmacc_frm): Function definition for vfwmacc.
17419 * config/riscv/riscv-vector-builtins.cc
17420 (function_expander::use_widen_ternop_insn): Add frm support.
17422 2023-08-14 Pan Li <pan2.li@intel.com>
17424 * config/riscv/riscv-vector-builtins-bases.cc
17425 (class vfnmsub_frm): New class for vfnmsub frm.
17426 (vfnmsub_frm): New declaration.
17428 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17429 * config/riscv/riscv-vector-builtins-functions.def
17430 (vfnmsub_frm): New function declaration.
17432 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
17434 * lra-constraints.cc (curr_insn_transform): Set done_p up and
17435 check it on true after processing output stack pointer reload.
17437 2023-08-12 Jakub Jelinek <jakub@redhat.com>
17439 * Makefile.in (USER_H): Add stdckdint.h.
17440 * ginclude/stdckdint.h: New file.
17442 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17445 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
17447 2023-08-12 Patrick Palka <ppalka@redhat.com>
17449 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
17450 Delimit output with braces.
17452 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17455 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
17457 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17459 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
17460 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
17461 * config/riscv/vector.md: Ditto.
17463 2023-08-11 David Malcolm <dmalcolm@redhat.com>
17466 * doc/analyzer.texi (__analyzer_get_strlen): New.
17467 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
17469 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
17471 * config/rx/rx.md (subdi3): Fix test for borrow.
17473 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17475 PR middle-end/110989
17476 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
17477 (vectorizable_load): Ditto.
17479 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
17481 * config/bpf/bpf.md (allocate_stack): Define.
17482 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
17483 stack pointer register.
17484 (FIXED_REGISTERS): Adjust accordingly.
17485 (CALL_USED_REGISTERS): Likewise.
17486 (REG_CLASS_CONTENTS): Likewise.
17487 (REGISTER_NAMES): Likewise.
17488 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
17489 space for callee-saved registers.
17490 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
17491 (bpf_expand_epilogue): Do not restore callee-saved registers in
17494 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
17496 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
17497 about too many arguments if function is always inlined.
17499 2023-08-11 Patrick Palka <ppalka@redhat.com>
17501 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
17502 Don't call component_ref_field_offset if the RHS isn't a decl.
17504 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
17506 PR bootstrap/110646
17507 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
17509 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
17511 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
17512 (process_alt_operands): Set the flag.
17513 (curr_insn_transform): Modify stack pointer offsets if output
17514 stack pointer reload is generated.
17516 2023-08-11 Joseph Myers <joseph@codesourcery.com>
17518 * configure: Regenerate.
17520 2023-08-11 Richard Biener <rguenther@suse.de>
17522 PR tree-optimization/110979
17523 * tree-vect-loop.cc (vectorizable_reduction): For
17524 FOLD_LEFT_REDUCTION without target support make sure
17525 we don't need to honor signed zeros and sign dependent rounding.
17527 2023-08-11 Richard Biener <rguenther@suse.de>
17529 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
17530 subgraph entries. Dump the used vector size based on the
17531 SLP subgraph entry root vector type.
17533 2023-08-11 Pan Li <pan2.li@intel.com>
17535 * config/riscv/riscv-vector-builtins-bases.cc
17536 (class vfmsub_frm): New class for vfmsub frm.
17537 (vfmsub_frm): New declaration.
17539 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17540 * config/riscv/riscv-vector-builtins-functions.def
17541 (vfmsub_frm): New function declaration.
17543 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17545 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
17546 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
17547 (expand_partial_store_optab_fn): Ditto.
17548 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
17549 (MASK_LEN_STORE_LANES): Ditto.
17550 * optabs.def (OPTAB_CD): Ditto.
17552 2023-08-11 Pan Li <pan2.li@intel.com>
17554 * config/riscv/riscv-vector-builtins-bases.cc
17555 (class vfnmadd_frm): New class for vfnmadd frm.
17556 (vfnmadd_frm): New declaration.
17558 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17559 * config/riscv/riscv-vector-builtins-functions.def
17560 (vfnmadd_frm): New function declaration.
17562 2023-08-11 Drew Ross <drross@redhat.com>
17563 Jakub Jelinek <jakub@redhat.com>
17565 PR tree-optimization/109938
17566 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
17568 2023-08-11 Pan Li <pan2.li@intel.com>
17570 * config/riscv/riscv-vector-builtins-bases.cc
17571 (class vfmadd_frm): New class for vfmadd frm.
17572 (vfmadd_frm_obj): New declaration.
17574 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17575 * config/riscv/riscv-vector-builtins-functions.def
17576 (vfmadd_frm): New function definition.
17578 2023-08-11 Pan Li <pan2.li@intel.com>
17580 * config/riscv/riscv-vector-builtins-bases.cc
17581 (class vfnmsac_frm): New class for vfnmsac frm.
17582 (vfnmsac_frm_obj): New declaration.
17584 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17585 * config/riscv/riscv-vector-builtins-functions.def
17586 (vfnmsac_frm): New function definition.
17588 2023-08-11 Jakub Jelinek <jakub@redhat.com>
17590 * doc/extend.texi (Typeof): Document typeof_unqual
17591 and __typeof_unqual__.
17593 2023-08-11 Andrew Pinski <apinski@marvell.com>
17595 PR tree-optimization/110954
17596 * generic-match-head.cc (bitwise_inverted_equal_p): Add
17597 wascmp argument and set it accordingly.
17598 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
17599 wascmp argument to the macro.
17600 (gimple_bitwise_inverted_equal_p): Add
17601 wascmp argument and set it accordingly.
17602 * match.pd (`a & ~a`, `a ^| ~a`): Update call
17603 to bitwise_inverted_equal_p and handle wascmp case.
17604 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
17605 call to bitwise_inverted_equal_p and check to see
17606 if was !wascmp or if precision was 1.
17608 2023-08-11 Martin Uecker <uecker@tugraz.at>
17611 * doc/invoke.texi: Update.
17613 2023-08-11 Pan Li <pan2.li@intel.com>
17615 * config/riscv/riscv-vector-builtins-bases.cc
17616 (class vfmsac_frm): New class for vfmsac frm.
17617 (vfmsac_frm_obj): New declaration.
17619 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17620 * config/riscv/riscv-vector-builtins-functions.def
17621 (vfmsac_frm): New function definition
17623 2023-08-10 Jan Hubicka <jh@suse.cz>
17625 PR middle-end/110923
17626 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
17628 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
17630 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
17631 dependent on 'a' extension.
17632 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
17633 (TARGET_ZTSO): New target.
17634 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
17636 (riscv_memmodel_needs_amo_release): Add Ztso case.
17637 (riscv_print_operand): Add Ztso case for LR/SC annotations.
17638 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
17639 * config/riscv/riscv.opt: Add Ztso target variable.
17640 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
17641 Ztso specific insn.
17642 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
17643 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
17644 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
17645 specific load/store/fence mappings.
17646 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
17647 specific load/store/fence mappings.
17649 2023-08-10 Jan Hubicka <jh@suse.cz>
17651 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
17654 2023-08-10 Jan Hubicka <jh@suse.cz>
17656 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
17658 2023-08-10 Jan Hubicka <jh@suse.cz>
17660 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
17661 handling of undefined values.
17663 2023-08-10 Jakub Jelinek <jakub@redhat.com>
17666 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
17667 return virtual phis and return NULL if there is a virtual phi
17668 where the arguments from E0 and E1 edges aren't equal.
17670 2023-08-10 Richard Biener <rguenther@suse.de>
17672 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
17673 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
17675 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17678 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
17680 2023-08-10 Pan Li <pan2.li@intel.com>
17682 * config/riscv/riscv-vector-builtins-bases.cc
17683 (class vfnmacc_frm): New class for vfnmacc.
17684 (vfnmacc_frm_obj): New declaration.
17686 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17687 * config/riscv/riscv-vector-builtins-functions.def
17688 (vfnmacc_frm): New function definition.
17690 2023-08-10 Pan Li <pan2.li@intel.com>
17692 * config/riscv/riscv-vector-builtins-bases.cc
17693 (class vfmacc_frm): New class for vfmacc frm.
17694 (vfmacc_frm_obj): New declaration.
17696 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17697 * config/riscv/riscv-vector-builtins-functions.def
17698 (vfmacc_frm): New function definition.
17700 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17703 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
17705 2023-08-10 Richard Biener <rguenther@suse.de>
17707 * tree-vectorizer.h (vectorizable_live_operation): Remove
17708 gimple_stmt_iterator * argument.
17709 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
17710 Adjust plumbing around vect_get_loop_mask.
17711 (vect_analyze_loop_operations): Adjust.
17712 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
17713 (vect_bb_slp_mark_live_stmts): Likewise.
17714 (vect_schedule_slp_node): Likewise.
17715 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
17716 Remove gimple_stmt_iterator * argument.
17717 (vect_transform_stmt): Adjust.
17719 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17721 * config/riscv/vector-iterators.md: Add missing modes.
17723 2023-08-10 Jakub Jelinek <jakub@redhat.com>
17726 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
17727 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
17729 2023-08-10 Jakub Jelinek <jakub@redhat.com>
17732 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
17733 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
17736 2023-08-10 liuhongt <hongtao.liu@intel.com>
17739 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
17740 sanitize upper part of V4HFmode register with
17741 -fno-trapping-math.
17742 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
17743 (<divv4hf3): Ditto.
17744 (<insn>v2hf3): Ditto.
17746 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
17747 register with -fno-trapping-math.
17749 2023-08-10 Pan Li <pan2.li@intel.com>
17750 Kito Cheng <kito.cheng@sifive.com>
17752 * config/riscv/riscv-protos.h
17753 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
17754 (get_frm_mode): New declaration.
17755 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
17756 * config/riscv/riscv-vector-builtins.cc
17757 (function_expander::use_ternop_insn): Take care of frm reg.
17758 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
17759 (riscv_emit_frm_mode_set): Ditto.
17760 (riscv_emit_mode_set): Ditto.
17761 (riscv_frm_adjust_mode_after_call): Ditto.
17762 (riscv_frm_mode_needed): Ditto.
17763 (riscv_frm_mode_after): Ditto.
17764 (riscv_mode_entry): Ditto.
17765 (riscv_mode_exit): Ditto.
17766 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
17767 * config/riscv/vector.md
17768 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
17769 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
17771 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17773 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
17774 incorrect anticipate info.
17776 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
17778 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
17779 Remove 'Zve32d' from the version list.
17781 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
17783 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
17784 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
17785 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
17786 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17788 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
17790 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
17791 (mem_shadd_or_shadd_rtx_p): New function.
17793 2023-08-09 Andrew Pinski <apinski@marvell.com>
17795 PR tree-optimization/110937
17796 PR tree-optimization/100798
17797 * match.pd (`a ? ~b : b`): Handle this
17800 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
17802 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
17804 2023-08-09 Richard Ball <richard.ball@arm.com>
17806 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
17807 * config/aarch64/aarch64-tune.md: Regenerate.
17808 * doc/invoke.texi: Document Cortex-A520 CPU.
17810 2023-08-09 Carl Love <cel@us.ibm.com>
17812 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
17813 Move definitions to Altivec stanza.
17814 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
17817 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17820 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
17821 stepped vector support.
17823 2023-08-09 liuhongt <hongtao.liu@intel.com>
17825 * common/config/i386/cpuinfo.h (get_available_features):
17826 Rename local variable subleaf_level to max_subleaf_level.
17828 2023-08-09 Richard Biener <rguenther@suse.de>
17830 PR rtl-optimization/110587
17831 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
17833 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
17835 PR tree-optimization/110248
17836 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
17837 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
17838 legitimate when outer code is PLUS.
17840 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
17842 PR tree-optimization/110248
17843 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
17844 type code_helper and pass it to targetm.addr_space.legitimate_address_p
17845 instead of ERROR_MARK.
17846 (offsettable_address_addr_space_p): Update one function pointer with
17847 one more argument of type code_helper as its assignees
17848 memory_address_addr_space_p and strict_memory_address_addr_space_p
17849 have been adjusted, and adjust some call sites with ERROR_MARK.
17850 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
17851 (memory_address_addr_space_p): Adjust with one more unnamed argument
17852 of type code_helper with default ERROR_MARK.
17853 (strict_memory_address_addr_space_p): Likewise.
17854 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
17855 argument of type code_helper.
17856 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
17857 type code_helper and pass it to memory_address_addr_space_p.
17858 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
17859 one more unnamed argument of type code_helper with default value
17861 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
17862 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
17863 pass it to all valid_mem_ref_p calls.
17865 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
17867 PR tree-optimization/110248
17868 * coretypes.h (class code_helper): Add forward declaration.
17869 * doc/tm.texi: Regenerate.
17870 * lra-constraints.cc (valid_address_p): Call target hook
17871 targetm.addr_space.legitimate_address_p with an extra parameter
17872 ERROR_MARK as its prototype changes.
17873 * recog.cc (memory_address_addr_space_p): Likewise.
17874 * reload.cc (strict_memory_address_addr_space_p): Likewise.
17875 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
17876 Extend with one more argument of type code_helper, update the
17877 documentation accordingly.
17878 * targhooks.cc (default_legitimate_address_p): Adjust for the
17879 new code_helper argument.
17880 (default_addr_space_legitimate_address_p): Likewise.
17881 * targhooks.h (default_legitimate_address_p): Likewise.
17882 (default_addr_space_legitimate_address_p): Likewise.
17883 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
17884 with extra unnamed code_helper argument with default ERROR_MARK.
17885 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
17886 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
17887 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
17888 (tree.h): New include for tree_code ERROR_MARK.
17889 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
17890 unnamed code_helper argument with default ERROR_MARK.
17891 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
17892 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
17893 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
17894 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
17895 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
17896 (tree.h): New include for tree_code ERROR_MARK.
17897 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
17898 unnamed code_helper argument with default ERROR_MARK.
17899 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
17900 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
17902 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
17903 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
17904 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
17905 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
17906 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
17907 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
17908 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
17909 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
17910 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
17912 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
17913 (m32c_addr_space_legitimate_address_p): Likewise.
17914 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
17915 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
17916 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
17917 * config/microblaze/microblaze-protos.h (tree.h): New include for
17918 tree_code ERROR_MARK.
17919 (microblaze_legitimate_address_p): Adjust with extra unnamed
17920 code_helper argument with default ERROR_MARK.
17921 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
17923 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
17924 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
17925 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
17926 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
17927 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
17928 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
17929 argument with default ERROR_MARK and adjust the call to function
17930 msp430_legitimate_address_p.
17931 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
17932 unnamed code_helper argument with default ERROR_MARK.
17933 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
17934 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
17935 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
17936 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
17937 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
17938 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
17939 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
17940 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
17941 (tree.h): New include for tree_code ERROR_MARK.
17942 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
17943 extra unnamed code_helper argument with default ERROR_MARK.
17944 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
17945 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
17946 argument and adjust the call to function rs6000_legitimate_address_p.
17947 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
17948 unnamed code_helper argument with default ERROR_MARK.
17949 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
17950 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
17951 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
17952 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
17953 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
17954 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
17955 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
17956 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
17958 (tree.h): New include for tree_code ERROR_MARK.
17959 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
17960 Adjust with extra unnamed code_helper argument with default
17963 2023-08-09 liuhongt <hongtao.liu@intel.com>
17965 * common/config/i386/cpuinfo.h (get_available_features): Check
17966 EAX for valid subleaf before use CPUID.
17968 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
17970 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
17971 for the temporary when canonicalizing the condition.
17973 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
17975 * config/bpf/core-builtins.cc: Cleaned include headers.
17976 (struct cr_builtins): Added GTY.
17977 (cr_builtins_ref): Created.
17978 (builtins_data) Changed to GC root.
17979 (allocate_builtin_data): Changed.
17980 Included gt-core-builtins.h.
17981 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
17982 (bpf_core_extra_ref): Created.
17983 (bpf_comment_info): Changed to GC root.
17984 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
17986 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
17989 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
17990 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
17991 upper part of V2SFmode register with -fno-trapping-math.
17992 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
17994 (<smaxmin:code>v2sf3): Ditto.
17995 (sqrtv2sf2): Ditto.
17996 (*mmx_haddv2sf3_low): Ditto.
17997 (*mmx_hsubv2sf3_low): Ditto.
17998 (vec_addsubv2sf3): Ditto.
17999 (vec_cmpv2sfv2si): Ditto.
18000 (vcond<V2FI:mode>v2sf): Ditto.
18003 (fnmav2sf4): Ditto.
18004 (fnmsv2sf4): Ditto.
18005 (fix_truncv2sfv2si2): Ditto.
18006 (fixuns_truncv2sfv2si2): Ditto.
18007 (floatv2siv2sf2): Ditto.
18008 (floatunsv2siv2sf2): Ditto.
18009 (nearbyintv2sf2): Ditto.
18010 (rintv2sf2): Ditto.
18011 (lrintv2sfv2si2): Ditto.
18012 (ceilv2sf2): Ditto.
18013 (lceilv2sfv2si2): Ditto.
18014 (floorv2sf2): Ditto.
18015 (lfloorv2sfv2si2): Ditto.
18016 (btruncv2sf2): Ditto.
18017 (roundv2sf2): Ditto.
18018 (lroundv2sfv2si2): Ditto.
18019 * doc/invoke.texi (x86 Options): Document
18020 -mpartial-vector-fp-math option.
18022 2023-08-08 Andrew Pinski <apinski@marvell.com>
18024 PR tree-optimization/103281
18025 PR tree-optimization/28794
18026 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
18028 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
18029 (simplify_using_ranges::simplify_casted_cond): Rename to ...
18030 (simplify_using_ranges::simplify_casted_compare): This
18031 and change arguments to take op0 and op1.
18032 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
18033 (simplify_using_ranges::simplify): For tcc_comparison assignments call
18034 simplify_compare_assign_using_ranges_1.
18035 * vr-values.h (simplify_using_ranges): Add
18036 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
18037 Rename simplify_casted_cond and simplify_casted_compare and
18038 update argument types.
18040 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
18042 * genmatch.cc: Log line numbers indirectly.
18044 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
18046 * genmatch.cc: Make sinfo map ordered.
18047 * Makefile.in: Require the ordered map header for genmatch.o.
18049 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
18051 * ordered-hash-map.h: Add get_or_insert.
18052 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
18054 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18056 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
18057 (cond_len_<optab><mode>): Ditto.
18058 (cond_fma<mode>): Ditto.
18059 (cond_len_fma<mode>): Ditto.
18060 (cond_fnma<mode>): Ditto.
18061 (cond_len_fnma<mode>): Ditto.
18062 (cond_fms<mode>): Ditto.
18063 (cond_len_fms<mode>): Ditto.
18064 (cond_fnms<mode>): Ditto.
18065 (cond_len_fnms<mode>): Ditto.
18066 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
18068 (enum insn_type): Add new enum type.
18069 (prepare_ternary_operands): New function.
18070 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
18071 (emit_nonvlmax_tumu_insn): Ditto.
18072 (emit_nonvlmax_fp_tumu_insn): Ditto.
18073 (expand_cond_len_binop): Add condtional operations.
18074 (expand_cond_len_ternop): Ditto.
18075 (prepare_ternary_operands): New function.
18076 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
18077 riscv_get_v_regno_alignment as global scope.
18078 * config/riscv/vector.md: Fix ternary bugs.
18080 2023-08-08 Richard Biener <rguenther@suse.de>
18082 PR tree-optimization/49955
18083 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
18084 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
18085 * tree-vect-slp.cc (vect_free_slp_instance): Release
18086 SLP_INSTANCE_REMAIN_STMTS.
18087 (vect_build_slp_instance): Make the number of lanes of
18088 a BB reduction even.
18089 (vectorize_slp_instance_root_stmt): Handle unvectorized
18090 defs of a BB reduction.
18092 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18094 * internal-fn.cc (get_len_internal_fn): New function.
18095 (DEF_INTERNAL_COND_FN): Ditto.
18096 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
18097 * internal-fn.h (get_len_internal_fn): Ditto.
18098 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
18100 2023-08-08 Richard Biener <rguenther@suse.de>
18102 PR tree-optimization/110924
18103 * tree-ssa-live.h (virtual_operand_live): Update comment.
18104 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
18105 optimization, look at each predecessor.
18106 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
18108 2023-08-08 yulong <shiyulong@iscas.ac.cn>
18110 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
18112 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18114 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
18115 * config/riscv/vector.md: Ditto.
18117 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18119 * config/riscv/autovec.md: Add VLS shift.
18121 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18123 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
18124 * config/riscv/vector-iterators.md: Ditto.
18125 * config/riscv/vector.md: Ditto.
18127 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
18129 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
18131 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
18133 * configure: Regenerate.
18135 2023-08-07 John Ericson <git@JohnEricson.me>
18137 * configure: Regenerate.
18139 2023-08-07 Alan Modra <amodra@gmail.com>
18141 * configure: Regenerate.
18143 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
18145 * configure: Regenerate.
18147 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
18149 * configure: Regenerate.
18151 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
18153 * configure: Regenerate.
18155 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
18157 * configure: Regenerate.
18159 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
18161 * configure: Regenerate.
18163 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
18165 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
18166 VOIDmode operands to conditional before canonicalization.
18168 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
18170 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
18171 (find_oldest_value_reg): Inline stack_pointer_rtx check.
18172 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
18174 2023-08-07 Martin Jambor <mjambor@suse.cz>
18177 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
18178 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
18179 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
18180 (ptr_parm_has_nonarg_uses): Likewise.
18181 * ipa-param-manipulation.cc
18182 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
18183 (ipa_param_body_adjustments::mark_dead_statements): Move initial
18184 checks to get_ddef_if_exists_and_is_used.
18185 (ipa_param_body_adjustments::mark_clobbers_dead): New.
18186 (ipa_param_body_adjustments::common_initialization): Call
18187 mark_clobbers_dead when splitting.
18189 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
18191 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
18192 as an argument and pass it to riscv_emit_int_order_test.
18193 (riscv_expand_conditional_move): Handle cases where the condition
18194 is not EQ/NE or the second argument to the conditional is not
18196 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
18197 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
18199 2023-08-07 Andrew Pinski <apinski@marvell.com>
18201 PR tree-optimization/109959
18202 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
18205 2023-08-07 Richard Biener <rguenther@suse.de>
18207 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
18208 calculate post-dominators. Calculate RPO on the inverted
18209 graph and process blocks in that order.
18211 2023-08-07 liuhongt <hongtao.liu@intel.com>
18214 * config/i386/i386-protos.h
18215 (vpternlog_redundant_operand_mask): Adjust parameter type.
18216 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
18217 INTVAL instead of XINT, also adjust parameter type from rtx*
18218 to rtx since the function only needs operands[4] in vpternlog
18220 (substitute_vpternlog_operands): Pass operands[4] instead of
18221 operands to vpternlog_redundant_operand_mask.
18222 * config/i386/sse.md: Ditto.
18224 2023-08-07 Richard Biener <rguenther@suse.de>
18226 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
18227 around dumping code.
18229 2023-08-07 liuhongt <hongtao.liu@intel.com>
18232 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
18233 to define_expand and break into ..
18234 (<insn>v4hf3): .. this.
18235 (divv4hf3): .. this.
18236 (<insn>v2hf3): .. this.
18237 (divv2hf3): .. this.
18238 (movd_v2hf_to_sse): New define_expand.
18239 (movq_<mode>_to_sse): Extend to V4HFmode.
18240 (mmxdoublevecmode): Ditto.
18241 (V2FI_V4HF): New mode iterator.
18242 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
18243 by using mode iterator V4SF_V8HF, renamed to ..
18244 (*vec_concat<mode>): .. this.
18245 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
18246 iterator V4SF_V8HF, renamed to ..
18247 (*vec_concat<mode>_0): .. this.
18248 (*vec_concatv8hf_movss): New define_insn.
18249 (V4SF_V8HF): New mode iterator.
18251 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18253 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
18255 2023-08-07 Jan Beulich <jbeulich@suse.com>
18257 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
18258 (*mmx_pinsrb): Likewise.
18259 (*mmx_pextrb): Likewise.
18260 (*mmx_pextrb_zext): Likewise.
18261 (mmx_pshufbv8qi3): Likewise.
18262 (mmx_pshufbv4qi3): Likewise.
18263 (mmx_pswapdv2si2): Likewise.
18264 (*pinsrb): Likewise.
18265 (*pextrb): Likewise.
18266 (*pextrb_zext): Likewise.
18267 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
18268 (*sse2_eq<mode>3): Likewise.
18269 (*sse2_gt<mode>3): Likewise.
18270 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
18271 (*vec_extract<mode>): Likewise.
18272 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
18273 (*vec_extractv16qi_zext): Likewise.
18274 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
18275 (ssse3_pmaddubsw128): Likewise.
18276 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
18277 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
18278 (<ssse3_avx2>_psign<mode>3): Likewise.
18279 (<ssse3_avx2>_palignr<mode>): Likewise.
18280 (*abs<mode>2): Likewise.
18281 (sse4_2_pcmpestr): Likewise.
18282 (sse4_2_pcmpestri): Likewise.
18283 (sse4_2_pcmpestrm): Likewise.
18284 (sse4_2_pcmpestr_cconly): Likewise.
18285 (sse4_2_pcmpistr): Likewise.
18286 (sse4_2_pcmpistri): Likewise.
18287 (sse4_2_pcmpistrm): Likewise.
18288 (sse4_2_pcmpistr_cconly): Likewise.
18289 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
18290 (vgf2p8affineqb_<mode><mask_name>): Likewise.
18291 (vgf2p8mulb_<mode><mask_name>): Likewise.
18292 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
18294 (*<code>v16qi3 [umaxmin]): Likewise.
18296 2023-08-07 Jan Beulich <jbeulich@suse.com>
18298 * config/i386/i386.md (sse4_1_round<mode>2): Make
18299 "length_immediate" uniformly 1.
18300 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
18301 (mmx_pblendvb_<mode>): Likewise.
18303 2023-08-07 Jan Beulich <jbeulich@suse.com>
18305 * config/i386/sse.md
18306 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
18307 "prefix" attribute.
18308 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
18311 2023-08-07 Jan Beulich <jbeulich@suse.com>
18313 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
18314 "prefix_extra", and "mode" attributes.
18315 (xop_phadd<u>bd): Likewise.
18316 (xop_phadd<u>bq): Likewise.
18317 (xop_phadd<u>wd): Likewise.
18318 (xop_phadd<u>wq): Likewise.
18319 (xop_phadd<u>dq): Likewise.
18320 (xop_phsubbw): Likewise.
18321 (xop_phsubwd): Likewise.
18322 (xop_phsubdq): Likewise.
18323 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
18324 (xop_rotr<mode>3): Likewise.
18325 (xop_frcz<mode>2): Likewise.
18326 (*xop_vmfrcz<mode>2): Likewise.
18327 (xop_vrotl<mode>3): Add "prefix" attribute. Change
18328 "prefix_extra" to 1.
18329 (xop_sha<mode>3): Likewise.
18330 (xop_shl<mode>3): Likewise.
18332 2023-08-07 Jan Beulich <jbeulich@suse.com>
18334 * config/i386/sse.md
18335 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
18337 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
18338 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
18339 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
18340 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
18341 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
18342 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
18343 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
18344 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
18345 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
18346 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
18347 (vec_extract_lo_v64qi): Likewise.
18348 (vec_extract_hi_v64qi): Likewise.
18349 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
18350 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
18351 (*avx512f_<code><mode>3<mask_name>): Likewise.
18352 (*vec_extractv4ti): Likewise.
18353 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
18354 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
18355 Add "length_immediate".
18357 2023-08-07 Jan Beulich <jbeulich@suse.com>
18359 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
18361 (@rdseed<mode>): Likewise.
18362 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
18363 Adjust "prefix_extra".
18364 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
18365 (*sse4_1_<code><mode>3<mask_name>): Likewise.
18366 (*avx2_eq<mode>3): Likewise.
18367 (avx2_gt<mode>3): Likewise.
18368 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
18369 (*vec_extract<mode>): Likewise.
18370 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
18372 2023-08-07 Jan Beulich <jbeulich@suse.com>
18374 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
18375 "prefix_rep". Drop "prefix_extra".
18376 (wr<fsgs>base<mode>): Likewise.
18377 (ptwrite<mode>): Likewise.
18379 2023-08-07 Jan Beulich <jbeulich@suse.com>
18381 * config/i386/i386.md (isa): Move up.
18382 (length_immediate): Handle "fma4".
18383 (prefix): Handle "ssemuladd".
18384 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
18385 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
18387 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
18388 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
18389 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
18391 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
18392 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
18393 (*fma_fnmadd_<mode>): Likewise.
18394 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
18396 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
18397 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
18398 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
18400 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
18401 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
18402 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
18404 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
18405 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
18406 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
18408 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
18409 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
18410 (*fmai_fmadd_<mode>): Likewise.
18411 (*fmai_fmsub_<mode>): Likewise.
18412 (*fmai_fnmadd_<mode><round_name>): Likewise.
18413 (*fmai_fnmsub_<mode><round_name>): Likewise.
18414 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
18415 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
18416 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
18417 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
18418 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
18419 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
18420 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
18421 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
18422 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
18423 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
18424 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
18425 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
18426 (*fma4i_vmfmadd_<mode>): Likewise.
18427 (*fma4i_vmfmsub_<mode>): Likewise.
18428 (*fma4i_vmfnmadd_<mode>): Likewise.
18429 (*fma4i_vmfnmsub_<mode>): Likewise.
18430 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
18431 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
18432 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
18434 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
18435 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
18436 (xop_p<macs>dql): Likewise.
18437 (xop_p<macs>dqh): Likewise.
18438 (xop_p<macs>wd): Likewise.
18439 (xop_p<madcs>wd): Likewise.
18440 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
18442 2023-08-07 Jan Beulich <jbeulich@suse.com>
18444 * config/i386/i386.md (length_immediate): Handle "sse4arg".
18445 (prefix): Likewise.
18446 (*xop_pcmov_<mode>): Add "mode" attribute.
18447 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
18448 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
18449 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
18450 (*xop_pcmov_<mode>): Add "mode" attribute.
18451 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
18453 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
18454 "prefix_extra", and "length_immediate" attributes.
18455 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
18456 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
18457 and "length_immediate" attributes. Switch "type" to "sse4arg".
18458 (xop_pcom_tf<mode>3): Likewise.
18459 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
18461 2023-08-07 Jan Beulich <jbeulich@suse.com>
18463 * config/i386/i386.md (prefix_extra): Correct comment. Fold
18464 cases yielding 2 into ones yielding 1.
18466 2023-08-07 Jan Hubicka <jh@suse.cz>
18468 PR tree-optimization/106293
18469 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
18470 * tree-vect-loop.cc (vect_transform_loop): Likewise.
18472 2023-08-07 Andrew Pinski <apinski@marvell.com>
18474 PR tree-optimization/96695
18475 * match.pd (min_value, max_value): Extend to
18478 2023-08-06 Jan Hubicka <jh@suse.cz>
18480 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
18481 __builtin_expect that CPU likely supports cpuid.
18483 2023-08-06 Jan Hubicka <jh@suse.cz>
18485 * tree-loop-distribution.cc (loop_distribution::execute): Disable
18486 distribution for loops with estimated iterations 0.
18488 2023-08-06 Jan Hubicka <jh@suse.cz>
18490 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
18492 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
18494 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
18495 more Zicond patterns. Fix whitespace typo.
18496 (riscv_rtx_costs): Remove accidental code duplication.
18497 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
18499 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
18502 * config/i386/i386-protos.h
18503 (vpternlog_redundant_operand_mask): Declare.
18504 (substitute_vpternlog_operands): Declare.
18505 * config/i386/i386.cc
18506 (vpternlog_redundant_operand_mask): New helper.
18507 (substitute_vpternlog_operands): New function. Use them...
18508 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
18510 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
18512 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
18513 value of -1 is equivalent to don't care.
18514 (extract_integral_bit_field): Indicate that we don't require
18515 the most significant word to be zero extended, if we're about
18517 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
18518 of -1 is equivalent to don't care. Don't clear the most
18519 significant bits with AND mask when UNSIGNEDP is -1.
18521 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
18523 * config/i386/sse.md (define_split): Convert highpart:DF extract
18524 from V2DFmode register into a sse2_storehpd instruction.
18525 (define_split): Likewise, convert lowpart:DF extract from V2DF
18526 register into a sse2_storelpd instruction.
18528 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
18530 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
18533 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
18535 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
18536 against early clobber hard regs.
18538 2023-08-04 Tamar Christina <tamar.christina@arm.com>
18540 * doc/extend.texi: Document it.
18542 2023-08-04 Tamar Christina <tamar.christina@arm.com>
18545 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
18546 vec_widen_<sur>shiftl_hi_<mode>): Remove.
18547 (aarch64_<sur>shll<mode>_internal): Renamed to...
18548 (aarch64_<su>shll<mode>): .. This.
18549 (aarch64_<sur>shll2<mode>_internal): Renamed to...
18550 (aarch64_<su>shll2<mode>): .. This.
18551 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
18553 * config/aarch64/constraints.md (D2, DL): New.
18554 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
18556 2023-08-04 Tamar Christina <tamar.christina@arm.com>
18558 * gensupport.cc (conlist): Support length 0 attribute.
18560 2023-08-04 Tamar Christina <tamar.christina@arm.com>
18562 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
18563 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
18565 2023-08-04 Tamar Christina <tamar.christina@arm.com>
18567 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
18569 (aarch64_adjust_stmt_cost): Use it.
18570 (aarch64_vector_costs::count_ops): Likewise.
18571 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
18572 aarch64_adjust_stmt_cost.
18574 2023-08-04 Richard Biener <rguenther@suse.de>
18576 PR tree-optimization/110838
18577 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
18578 Fix right-shift value sanitizing. Properly emit external
18579 def mangling in the preheader rather than in the pattern
18580 def sequence where it will fail vectorizing.
18582 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
18584 PR middle-end/110316
18586 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
18587 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
18588 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
18589 (timer::validate_phases): Use integral arithmetic to check
18591 (timer::print_row, timer::print): Convert from integral
18592 nanoseconds to floating point seconds before printing.
18593 (timer::all_zero): Change limit to nanosec count instead of
18594 fractional count of seconds.
18595 (make_json_for_timevar_time_def): Convert from integral
18596 nanoseconds to floating point seconds before recording.
18597 * timevar.h (struct timevar_time_def): Update all measurements
18598 to use uint64_t nanoseconds rather than seconds stored in a
18601 2023-08-04 Richard Biener <rguenther@suse.de>
18603 PR tree-optimization/110838
18604 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
18605 the arithmetic right-shift case to non-negative operands.
18607 2023-08-04 Pan Li <pan2.li@intel.com>
18610 2023-08-04 Pan Li <pan2.li@intel.com>
18612 * config/riscv/riscv-vector-builtins-bases.cc
18613 (class vfmacc_frm): New class for vfmacc frm.
18614 (vfmacc_frm_obj): New declaration.
18616 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18617 * config/riscv/riscv-vector-builtins-functions.def
18618 (vfmacc_frm): New function definition.
18619 * config/riscv/riscv-vector-builtins.cc
18620 (function_expander::use_ternop_insn): Add frm operand support.
18621 * config/riscv/vector.md: Add vfmuladd to frm_mode.
18623 2023-08-04 Pan Li <pan2.li@intel.com>
18626 2023-08-04 Pan Li <pan2.li@intel.com>
18628 * config/riscv/riscv-vector-builtins-bases.cc
18629 (class vfnmacc_frm): New class for vfnmacc.
18630 (vfnmacc_frm_obj): New declaration.
18632 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18633 * config/riscv/riscv-vector-builtins-functions.def
18634 (vfnmacc_frm): New function definition.
18636 2023-08-04 Pan Li <pan2.li@intel.com>
18639 2023-08-04 Pan Li <pan2.li@intel.com>
18641 * config/riscv/riscv-vector-builtins-bases.cc
18642 (class vfmsac_frm): New class for vfmsac frm.
18643 (vfmsac_frm_obj): New declaration.
18645 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18646 * config/riscv/riscv-vector-builtins-functions.def
18647 (vfmsac_frm): New function definition.
18649 2023-08-04 Pan Li <pan2.li@intel.com>
18652 2023-08-04 Pan Li <pan2.li@intel.com>
18654 * config/riscv/riscv-vector-builtins-bases.cc
18655 (class vfnmsac_frm): New class for vfnmsac frm.
18656 (vfnmsac_frm_obj): New declaration.
18658 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18659 * config/riscv/riscv-vector-builtins-functions.def
18660 (vfnmsac_frm): New function definition.
18662 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
18664 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
18665 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
18666 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
18667 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
18668 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
18669 (attiny102, attiny104): New devices.
18670 * doc/avr-mmcu.texi: Regenerate.
18672 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
18674 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
18675 and PM_OFFSET entries.
18677 2023-08-04 Andrew Pinski <apinski@marvell.com>
18679 PR tree-optimization/110874
18680 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
18681 (gimple_maybe_cmp): Likewise.
18682 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
18683 and gimple_maybe_cmp instead of being recursive.
18684 * match.pd (bit_not_with_nop): New match pattern.
18685 (maybe_cmp): Likewise.
18687 2023-08-04 Drew Ross <drross@redhat.com>
18689 PR middle-end/101955
18690 * match.pd ((signed x << c) >> c): New canonicalization.
18692 2023-08-04 Pan Li <pan2.li@intel.com>
18694 * config/riscv/riscv-vector-builtins-bases.cc
18695 (class vfnmsac_frm): New class for vfnmsac frm.
18696 (vfnmsac_frm_obj): New declaration.
18698 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18699 * config/riscv/riscv-vector-builtins-functions.def
18700 (vfnmsac_frm): New function definition.
18702 2023-08-04 Pan Li <pan2.li@intel.com>
18704 * config/riscv/riscv-vector-builtins-bases.cc
18705 (class vfmsac_frm): New class for vfmsac frm.
18706 (vfmsac_frm_obj): New declaration.
18708 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18709 * config/riscv/riscv-vector-builtins-functions.def
18710 (vfmsac_frm): New function definition.
18712 2023-08-04 Pan Li <pan2.li@intel.com>
18714 * config/riscv/riscv-vector-builtins-bases.cc
18715 (class vfnmacc_frm): New class for vfnmacc.
18716 (vfnmacc_frm_obj): New declaration.
18718 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18719 * config/riscv/riscv-vector-builtins-functions.def
18720 (vfnmacc_frm): New function definition.
18722 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
18725 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
18726 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
18728 2023-08-04 Pan Li <pan2.li@intel.com>
18730 * config/riscv/riscv-vector-builtins-bases.cc
18731 (class vfmacc_frm): New class for vfmacc frm.
18732 (vfmacc_frm_obj): New declaration.
18734 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18735 * config/riscv/riscv-vector-builtins-functions.def
18736 (vfmacc_frm): New function definition.
18737 * config/riscv/riscv-vector-builtins.cc
18738 (function_expander::use_ternop_insn): Add frm operand support.
18739 * config/riscv/vector.md: Add vfmuladd to frm_mode.
18741 2023-08-04 Pan Li <pan2.li@intel.com>
18743 * config/riscv/riscv-vector-builtins-bases.cc
18744 (vfwmul_frm_obj): New declaration.
18745 (vfwmul_frm): Ditto.
18746 * config/riscv/riscv-vector-builtins-bases.h:
18747 (vfwmul_frm): Ditto.
18748 * config/riscv/riscv-vector-builtins-functions.def
18749 (vfwmul_frm): New function definition.
18750 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
18752 2023-08-04 Pan Li <pan2.li@intel.com>
18754 * config/riscv/riscv-vector-builtins-bases.cc
18755 (binop_frm): New declaration.
18756 (reverse_binop_frm): Likewise.
18758 * config/riscv/riscv-vector-builtins-bases.h:
18759 (vfdiv_frm): New extern declaration.
18760 (vfrdiv_frm): Likewise.
18761 * config/riscv/riscv-vector-builtins-functions.def
18762 (vfdiv_frm): New function definition.
18763 (vfrdiv_frm): Likewise.
18764 * config/riscv/vector.md: Add vfdiv to frm_mode.
18766 2023-08-03 Jan Hubicka <jh@suse.cz>
18768 * tree-cfg.cc (print_loop_info): Print entry count.
18770 2023-08-03 Jan Hubicka <jh@suse.cz>
18772 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
18774 2023-08-03 Jan Hubicka <jh@suse.cz>
18776 PR bootstrap/110857
18777 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
18778 unadjusted_exit_count.
18780 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
18782 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
18785 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
18787 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
18788 various Zicond patterns.
18789 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
18790 sfb_alu_operand for both arms of the conditional move.
18791 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
18793 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
18799 * config.gcc: Added core-builtins.cc and .o files.
18800 * config/bpf/bpf-passes.def: Removed file.
18801 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
18802 bpf_replace_core_move_operands): New prototypes.
18803 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
18804 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
18805 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
18806 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
18807 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
18809 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
18810 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
18811 (mov_reloc_core<mode>): Added.
18812 * config/bpf/core-builtins.cc (struct cr_builtin, enum
18813 cr_decision struct cr_local, struct cr_final, struct
18814 core_builtin_helpers, enum bpf_plugin_states): Added types.
18815 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
18817 (allocate_builtin_data, get_builtin-data, search_builtin_data,
18818 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
18819 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
18820 bpf_core_get_index, compute_field_expr,
18821 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
18822 process_field_expr, pack_enum_value, process_enum_value, pack_type,
18823 process_type, bpf_require_core_support, make_core_relo, read_kind,
18824 kind_access_index, kind_preserve_field_info, kind_enum_value,
18825 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
18826 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
18827 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
18828 bpf_expand_core_builtin, bpf_add_core_reloc,
18829 bpf_replace_core_move_operands): Added functions.
18830 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
18831 (bpf_init_core_builtins, bpf_expand_core_builtin,
18832 bpf_resolve_overloaded_core_builtin): Added functions.
18833 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
18834 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
18835 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
18836 * config/bpf/t-bpf: Added core-builtins.o.
18837 * doc/extend.texi: Added documentation for new BPF builtins.
18839 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
18841 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
18842 ranges to the call to relation_fold_and_or.
18843 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
18844 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
18845 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
18846 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
18847 a varying op1 and op2 to call.
18848 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
18849 (operator_equal::op1_op2_relation): New float version.
18850 (operator_not_equal::op1_op2_relation): Ditto.
18851 (operator_lt::op1_op2_relation): Ditto.
18852 (operator_le::op1_op2_relation): Ditto.
18853 (operator_gt::op1_op2_relation): Ditto.
18854 (operator_ge::op1_op2_relation) Ditto.
18855 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
18857 (operator_not_equal::op1_op2_relation): Ditto.
18858 (operator_lt::op1_op2_relation): Ditto.
18859 (operator_le::op1_op2_relation): Ditto.
18860 (operator_gt::op1_op2_relation): Ditto.
18861 (operator_ge::op1_op2_relation): Ditto.
18862 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
18864 (range_operator::op1_op2_relation): Add extra params.
18865 (operator_equal::op1_op2_relation): Ditto.
18866 (operator_not_equal::op1_op2_relation): Ditto.
18867 (operator_lt::op1_op2_relation): Ditto.
18868 (operator_le::op1_op2_relation): Ditto.
18869 (operator_gt::op1_op2_relation): Ditto.
18870 (operator_ge::op1_op2_relation): Ditto.
18871 * range-op.h (range_operator): New prototypes.
18872 (range_op_handler): Ditto.
18874 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
18876 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
18877 Use identity relation.
18878 (gori_compute::compute_operand2_range): Ditto.
18879 * value-relation.cc (get_identity_relation): New.
18880 * value-relation.h (get_identity_relation): New prototype.
18882 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
18884 * value-range.h (Value_Range::set_varying): Set the type.
18885 (Value_Range::set_zero): Ditto.
18886 (Value_Range::set_nonzero): Ditto.
18888 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
18890 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
18893 2023-08-03 Pan Li <pan2.li@intel.com>
18895 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
18897 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
18899 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
18901 2023-08-03 Richard Biener <rguenther@suse.de>
18903 PR tree-optimization/110838
18904 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
18905 Adjust the shift operand of RSHIFT_EXPRs.
18907 2023-08-03 Richard Biener <rguenther@suse.de>
18909 PR tree-optimization/110702
18910 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
18911 we created a NULL pointer based access rewrite that to
18914 2023-08-03 Richard Biener <rguenther@suse.de>
18916 * tree-ssa-sink.cc: Include tree-ssa-live.h.
18917 (pass_sink_code::execute): Instantiate virtual_operand_live
18919 (sink_code_in_bb): Pass down virtual_operand_live.
18920 (statement_sink_location): Get virtual_operand_live and
18921 verify we are not sinking loads across stores by looking up
18922 the live virtual operand at the sink location.
18924 2023-08-03 Richard Biener <rguenther@suse.de>
18926 * tree-ssa-live.h (class virtual_operand_live): New.
18927 * tree-ssa-live.cc (virtual_operand_live::init): New.
18928 (virtual_operand_live::get_live_in): Likewise.
18929 (virtual_operand_live::get_live_out): Likewise.
18931 2023-08-03 Richard Biener <rguenther@suse.de>
18933 * passes.def: Exchange loop splitting and final value
18934 replacement passes.
18936 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18938 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
18939 New function which handles bswap patterns for vec_perm_const.
18940 (vectorize_vec_perm_const_1): Call new function.
18941 * config/s390/vector.md (*bswap<mode>): Fix operands in output
18943 (*vstbr<mode>): New insn.
18945 2023-08-03 Alexandre Oliva <oliva@adacore.com>
18947 * config/vxworks-smp.opt: New. Introduce -msmp.
18948 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
18949 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
18950 lib_smp when -msmp is present in the command line.
18951 * doc/invoke.texi: Document it.
18953 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
18955 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
18956 when enabling -mno-omit-leaf-frame-pointer
18957 (riscv_option_override): Override omit-frame-pointer.
18958 (riscv_frame_pointer_required): Save s0 for non-leaf function
18959 (TARGET_FRAME_POINTER_REQUIRED): Override defination
18960 * config/riscv/riscv.opt: Add option support.
18962 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
18965 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
18966 place operand in a register before gen_<insn>64ti2_doubleword.
18967 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
18968 operand in a register before gen_<insn>32di2_doubleword.
18969 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
18970 (<any_rotate>64ti2_doubleword): Likewise.
18972 2023-08-03 Pan Li <pan2.li@intel.com>
18974 * config/riscv/riscv-vector-builtins-bases.cc
18975 (vfmul_frm_obj): New declaration.
18977 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
18978 * config/riscv/riscv-vector-builtins-functions.def
18979 (vfmul_frm): New function definition.
18980 * config/riscv/vector.md: Add vfmul to frm_mode.
18982 2023-08-03 Andrew Pinski <apinski@marvell.com>
18984 * match.pd (`~X & X`): Check that the types match.
18985 (`~x | x`, `~x ^ x`): Likewise.
18987 2023-08-03 Pan Li <pan2.li@intel.com>
18989 * config/riscv/riscv-vector-builtins-bases.h: Remove
18990 redudant declaration.
18992 2023-08-03 Pan Li <pan2.li@intel.com>
18994 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
18996 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
18997 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
18998 Add vfwsub function definitions.
19000 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19002 PR rtl-optimization/110867
19003 * combine.cc (simplify_compare_const): Try the optimization only
19004 in case the constant fits into the comparison mode.
19006 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
19008 * config/riscv/zicond.md: Remove incorrect zicond patterns and
19009 renumber/rename them.
19010 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
19012 2023-08-02 Richard Biener <rguenther@suse.de>
19014 * tree-phinodes.h (add_phi_node_to_bb): Remove.
19015 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
19017 2023-08-02 Jan Beulich <jbeulich@suse.com>
19019 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
19020 two of the alternatives.
19022 2023-08-02 Richard Biener <rguenther@suse.de>
19024 PR tree-optimization/92335
19025 * tree-ssa-sink.cc (select_best_block): Before loop
19026 optimizations avoid sinking unconditional loads/stores
19027 in innermost loops to conditional executed places.
19029 2023-08-02 Andrew Pinski <apinski@marvell.com>
19031 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
19032 the comparison operands before comparing them.
19034 2023-08-02 Andrew Pinski <apinski@marvell.com>
19036 * match.pd (`~X & X`, `~X | X`): Move over to
19037 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
19038 handles that already.
19039 Remove range test simplifications to true/false as they
19040 are now handled by these patterns.
19042 2023-08-02 Andrew Pinski <apinski@marvell.com>
19044 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
19045 statement's lhs and rhs to check if trivial dead.
19046 Rename inserted_exprs to exprs_maybe_dce; also move it so
19047 bitmap is not allocated if not needed.
19049 2023-08-02 Pan Li <pan2.li@intel.com>
19051 * config/riscv/riscv-vector-builtins-bases.cc
19052 (class widen_binop_frm): New class for binop frm.
19053 (BASE): Add vfwadd_frm.
19054 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
19055 * config/riscv/riscv-vector-builtins-functions.def
19056 (vfwadd_frm): New function definition.
19057 * config/riscv/riscv-vector-builtins-shapes.cc
19058 (BASE_NAME_MAX_LEN): New macro.
19059 (struct alu_frm_def): Leverage new base class.
19060 (struct build_frm_base): New build base for frm.
19061 (struct widen_alu_frm_def): New struct for widen alu frm.
19062 (SHAPE): Add widen_alu_frm shape.
19063 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
19064 * config/riscv/vector.md (frm_mode): Add vfwalu type.
19066 2023-08-02 Jan Hubicka <jh@suse.cz>
19068 * cfgloop.h (loop_count_in): Declare.
19069 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
19070 (loop_count_in): Move here from ...
19071 * cfgloopmanip.cc (loop_count_in): ... here.
19072 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
19074 2023-08-02 Jan Hubicka <jh@suse.cz>
19076 * cfg.cc (scale_strictly_dominated_blocks): New function.
19077 * cfg.h (scale_strictly_dominated_blocks): Declare.
19078 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
19080 2023-08-02 Richard Biener <rguenther@suse.de>
19082 PR rtl-optimization/110587
19083 * lra-spills.cc (return_regno_p): Remove.
19084 (regno_in_use_p): Likewise.
19085 (lra_final_code_change): Do not remove noop moves
19086 between hard registers.
19088 2023-08-02 liuhongt <hongtao.liu@intel.com>
19091 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
19092 HFmode, use mode iterator VFH instead.
19093 (vec_fmsubadd<mode>4): Ditto.
19094 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
19095 Remove scalar mode from iterator, use VFH_AVX512VL instead.
19096 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
19099 2023-08-02 liuhongt <hongtao.liu@intel.com>
19101 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
19102 pre_reload define_insn_and_split.
19104 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
19106 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
19107 using Zicond to implement some conditional moves.
19109 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
19111 * config/riscv/zicond.md: Use the X iterator instead of ANYI
19112 on the comparison input operands.
19114 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
19116 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
19118 (case SET): For INSNs that just set a REG, take the cost from the
19120 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
19122 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
19124 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
19125 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
19126 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
19127 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
19128 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
19129 (OPTION_MASK_ISA_ABM_SET):
19130 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
19132 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
19134 * config/s390/s390.cc (s390_encode_section_info): Assume external
19135 symbols without explicit alignment to be unaligned if
19136 -munaligned-symbols has been specified.
19137 * config/s390/s390.opt (-munaligned-symbols): New option.
19139 2023-08-01 Richard Ball <richard.ball@arm.com>
19141 * gimple-fold.cc (fold_ctor_reference):
19142 Add support for poly_int.
19144 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
19147 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
19148 LABEL_NUSES of new conditional branch instruction.
19150 2023-08-01 Jan Hubicka <jh@suse.cz>
19152 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
19153 constant prologue peeling.
19155 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
19157 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
19159 2023-08-01 Pan Li <pan2.li@intel.com>
19160 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19162 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
19163 (STATIC_FRM_P): Ditto.
19164 (struct mode_switching_info): New struct for mode switching.
19165 (struct machine_function): Add new field mode switching.
19166 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
19167 (riscv_frm_adjust_mode_after_call): New function for call mode.
19168 (riscv_frm_emit_after_call_in_bb_end): New function for emit
19169 insn when call as the end of bb.
19170 (riscv_frm_mode_needed): New function for frm mode needed.
19171 (frm_unknown_dynamic_p): Remove call check.
19172 (riscv_mode_needed): Extrac function for frm.
19173 (riscv_frm_mode_after): Add DYN_CALL after.
19174 (riscv_mode_entry): Remove backup rtl initialization.
19175 * config/riscv/vector.md (frm_mode): Add dyn_call.
19176 (fsrmsi_restore_exit): Rename to _volatile.
19177 (fsrmsi_restore_volatile): Likewise.
19179 2023-08-01 Pan Li <pan2.li@intel.com>
19181 * config/riscv/riscv-vector-builtins-bases.cc
19182 (class reverse_binop_frm): Add new template for reversed frm.
19183 (vfsub_frm_obj): New obj.
19184 (vfrsub_frm_obj): Likewise.
19185 * config/riscv/riscv-vector-builtins-bases.h:
19186 (vfsub_frm): New declaration.
19187 (vfrsub_frm): Likewise.
19188 * config/riscv/riscv-vector-builtins-functions.def
19189 (vfsub_frm): New function define.
19190 (vfrsub_frm): Likewise.
19192 2023-08-01 Andrew Pinski <apinski@marvell.com>
19194 PR tree-optimization/93044
19195 * match.pd (nested int casts): A truncation (to the same size or smaller)
19196 can always remove the inner cast.
19198 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
19201 * doc/invoke.texi (-Wmissing-variable-declarations): Document
19204 2023-07-31 Andrew Pinski <apinski@marvell.com>
19206 PR tree-optimization/106164
19207 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
19208 `a == b | a < b`, `a == b | a > b`): Handle these cases
19211 2023-07-31 Andrew Pinski <apinski@marvell.com>
19213 PR tree-optimization/106164
19214 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
19215 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
19217 2023-07-31 Andrew Pinski <apinski@marvell.com>
19219 PR tree-optimization/100864
19220 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
19221 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
19222 (gimple_bitwise_inverted_equal_p): New function.
19223 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
19224 instead of direct matching bit_not.
19226 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
19229 * gcc-ar.cc (main): Expand argv and use
19230 temporary response file to call ar if any
19231 expansions were made.
19233 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
19235 PR tree-optimization/110582
19236 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
19237 range vector for non-ssa names.
19239 2023-07-31 David Malcolm <dmalcolm@redhat.com>
19242 * diagnostic-client-data-hooks.h (class sarif_object): New forward
19244 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
19246 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
19247 (class sarif_invocation): Inherit from sarif_object rather than
19249 (class sarif_result): Likewise.
19250 (class sarif_ice_notification): Likewise.
19251 (sarif_object::get_or_create_properties): New.
19252 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
19253 to call the context's add_sarif_invocation_properties hook.
19254 (sarif_builder::flush_to_file): Pass m_context to
19255 sarif_invocation::prepare_to_flush.
19256 * diagnostic-format-sarif.h: New header.
19257 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
19258 writes to stderr. Document that if SARIF diagnostic output is
19259 requested then any timing information is written in JSON form as
19260 part of the SARIF output, rather than to stderr.
19261 * timevar.cc: Include "json.h".
19262 (timer::named_items::m_hash_map): Split out type into...
19263 (timer::named_items::hash_map_t): ...this new typedef.
19264 (timer::named_items::make_json): New function.
19265 (timevar_diff): New function.
19266 (make_json_for_timevar_time_def): New function.
19267 (timer::timevar_def::make_json): New function.
19268 (timer::make_json): New function.
19269 * timevar.h (class json::value): New forward decl.
19270 (timer::make_json): New decl.
19271 (timer::timevar_def::make_json): New decl.
19272 * tree-diagnostic-client-data-hooks.cc: Include
19273 "diagnostic-format-sarif.h" and "timevar.h".
19274 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
19277 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19279 * combine.cc (simplify_compare_const): Narrow comparison of
19280 memory and constant.
19281 (try_combine): Adapt new function signature.
19282 (simplify_comparison): Adapt new function signature.
19284 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
19286 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
19288 (expand_vector_init_insert_elems): Ditto.
19290 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
19293 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
19294 single_defuse_cycle while counting reduction_latency.
19296 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19298 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
19299 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
19300 (COND_ADD): Remove.
19305 (COND_RDIV): Ditto.
19308 (COND_FMIN): Ditto.
19309 (COND_FMAX): Ditto.
19317 (COND_FNMA): Ditto.
19318 (COND_FNMS): Ditto.
19320 (COND_LEN_ADD): Ditto.
19321 (COND_LEN_SUB): Ditto.
19322 (COND_LEN_MUL): Ditto.
19323 (COND_LEN_DIV): Ditto.
19324 (COND_LEN_MOD): Ditto.
19325 (COND_LEN_RDIV): Ditto.
19326 (COND_LEN_MIN): Ditto.
19327 (COND_LEN_MAX): Ditto.
19328 (COND_LEN_FMIN): Ditto.
19329 (COND_LEN_FMAX): Ditto.
19330 (COND_LEN_AND): Ditto.
19331 (COND_LEN_IOR): Ditto.
19332 (COND_LEN_XOR): Ditto.
19333 (COND_LEN_SHL): Ditto.
19334 (COND_LEN_SHR): Ditto.
19335 (COND_LEN_FMA): Ditto.
19336 (COND_LEN_FMS): Ditto.
19337 (COND_LEN_FNMA): Ditto.
19338 (COND_LEN_FNMS): Ditto.
19339 (COND_LEN_NEG): Ditto.
19340 (ADD): New macro define.
19361 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
19364 * config/i386/i386-features.cc (compute_convert_gain): Check
19365 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
19366 and V4SImode rotates in STV.
19367 (general_scalar_chain::convert_rotate): Likewise.
19369 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
19371 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
19372 * config/riscv/riscv-protos.h (get_mask_mode): Update return
19374 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
19376 (emit_vlmax_insn): Ditto.
19377 (emit_vlmax_fp_insn): Ditto.
19378 (emit_vlmax_ternary_insn): Ditto.
19379 (emit_vlmax_fp_ternary_insn): Ditto.
19380 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
19381 (emit_nonvlmax_insn): Ditto.
19382 (emit_vlmax_slide_insn): Ditto.
19383 (emit_nonvlmax_slide_tu_insn): Ditto.
19384 (emit_vlmax_merge_insn): Ditto.
19385 (emit_vlmax_masked_insn): Ditto.
19386 (emit_nonvlmax_masked_insn): Ditto.
19387 (emit_vlmax_masked_store_insn): Ditto.
19388 (emit_nonvlmax_masked_store_insn): Ditto.
19389 (emit_vlmax_masked_mu_insn): Ditto.
19390 (emit_nonvlmax_tu_insn): Ditto.
19391 (emit_nonvlmax_fp_tu_insn): Ditto.
19392 (emit_scalar_move_insn): Ditto.
19393 (emit_vlmax_compress_insn): Ditto.
19394 (emit_vlmax_reduction_insn): Ditto.
19395 (emit_vlmax_fp_reduction_insn): Ditto.
19396 (emit_nonvlmax_fp_reduction_insn): Ditto.
19397 (expand_vec_series): Ditto.
19398 (expand_vector_init_merge_repeating_sequence): Ditto.
19399 (expand_vec_perm): Ditto.
19400 (shuffle_merge_patterns): Ditto.
19401 (shuffle_compress_patterns): Ditto.
19402 (shuffle_decompress_patterns): Ditto.
19403 (expand_reduction): Ditto.
19404 (get_mask_mode): Update return type.
19405 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
19406 is valid, and use new get_mask_mode interface.
19408 2023-07-31 Pan Li <pan2.li@intel.com>
19410 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
19411 Move rm suffix before mask.
19413 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19415 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
19416 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
19419 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
19422 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
19423 (extzv<mode>): Likewise.
19424 (insv<mode>): Likewise.
19425 (*testqi_ext_3): Likewise.
19426 (*btr<mode>_2): Likewise.
19427 (define_split): Likewise.
19428 (*btsq_imm): Likewise.
19429 (*btrq_imm): Likewise.
19430 (*btcq_imm): Likewise.
19431 (define_peephole2 x3): Likewise.
19432 (*bt<mode>): Likewise
19433 (*bt<mode>_mask): New define_insn_and_split.
19434 (*jcc_bt<mode>): Use QImode for offsets.
19435 (*jcc_bt<mode>_1): Delete obsolete pattern.
19436 (*jcc_bt<mode>_mask): Use QImode offsets.
19437 (*jcc_bt<mode>_mask_1): Likewise.
19438 (define_split): Likewise.
19439 (*bt<mode>_setcqi): Likewise.
19440 (*bt<mode>_setncqi): Likewise.
19441 (*bt<mode>_setnc<mode>): Likewise.
19442 (*bt<mode>_setncqi_2): Likewise.
19443 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
19444 (bmi2_bzhi_<mode>3): Use QImode offsets.
19445 (*bmi2_bzhi_<mode>3): Likewise.
19446 (*bmi2_bzhi_<mode>3_1): Likewise.
19447 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
19448 (@tbm_bextri_<mode>): Likewise.
19450 2023-07-29 Jan Hubicka <jh@suse.cz>
19452 * profile-count.cc (profile_probability::sqrt): New member function.
19453 (profile_probability::pow): Likewise.
19454 * profile-count.h: (profile_probability::sqrt): Declare
19455 (profile_probability::pow): Likewise.
19456 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
19458 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
19460 * gimple-range-cache.cc (ssa_cache::merge_range): New.
19461 (ssa_lazy_cache::merge_range): New.
19462 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
19463 (class ssa_lazy_cache): Ditto.
19464 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
19466 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
19468 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
19469 Move from value-query.cc.
19470 (substitute_and_fold_engine::value_of_stmt): Ditto.
19471 (substitute_and_fold_engine::range_of_expr): New.
19472 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
19473 range_query. New prototypes.
19474 * value-query.cc (value_query::value_on_edge): Relocate.
19475 (value_query::value_of_stmt): Ditto.
19476 * value-query.h (class value_query): Remove.
19477 (class range_query): Remove base class. Adjust prototypes.
19479 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
19481 PR tree-optimization/110205
19482 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
19483 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
19484 Add final override.
19485 * range-op.cc (operator_lshift): Add missing final overrides.
19486 (operator_rshift): Ditto.
19488 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
19490 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
19491 optimizations in BPF target.
19493 2023-07-28 Honza <jh@ryzen4.suse.cz>
19495 * cfgloopmanip.cc (loop_count_in): Break out from ...
19496 (loop_exit_for_scaling): Break out from ...
19497 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
19498 add more sanity check and debug info.
19499 (scale_loop_profile): ... here.
19500 (create_empty_loop_on_edge): Fix whitespac.
19501 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
19502 * loop-unroll.cc (unroll_loop_constant_iterations): Use
19503 update_loop_exit_probability_scale_dom_bbs.
19504 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
19505 (tree_transform_and_unroll_loop): Use
19506 update_loop_exit_probability_scale_dom_bbs.
19507 * tree-ssa-loop-split.cc (split_loop): Use
19508 update_loop_exit_probability_scale_dom_bbs.
19510 2023-07-28 Jan Hubicka <jh@suse.cz>
19512 PR middle-end/77689
19513 * tree-ssa-loop-split.cc: Include value-query.h.
19514 (split_at_bb_p): Analyze cases where EQ/NE can be turned
19515 into LT/LE/GT/GE; return updated guard code.
19516 (split_loop): Use guard code.
19518 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
19519 Richard Biener <rguenther@suse.de>
19521 PR middle-end/28071
19522 PR rtl-optimization/110587
19523 * expr.cc (emit_group_load_1): Simplify logic for calling
19524 force_reg on ORIG_SRC, to avoid making a copy if the source
19525 is already in a pseudo register.
19527 2023-07-28 Jan Hubicka <jh@suse.cz>
19529 PR middle-end/106923
19530 * tree-ssa-loop-split.cc (connect_loops): Change probability
19531 of the test preconditioning second loop to very_likely.
19532 (fix_loop_bb_probability): Handle correctly case where
19533 on of the arms of the conditional is empty.
19534 (split_loop): Fold the test guarding first condition to
19535 see if it is constant true; Set correct entry block
19536 probabilities of the split loops; determine correct loop
19537 eixt probabilities.
19539 2023-07-28 xuli <xuli1@eswincomputing.com>
19541 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
19542 vsadd[u] and vssub[u].
19543 * config/riscv/vector.md: Ditto.
19545 2023-07-28 Jan Hubicka <jh@suse.cz>
19547 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
19548 loops when IV test is not overflowing.
19550 2023-07-28 liuhongt <hongtao.liu@intel.com>
19553 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
19555 (avx512cd_maskw_vec_dup<mode>): Ditto.
19557 2023-07-27 David Faust <david.faust@oracle.com>
19561 * config/bpf/bpf.opt (msmov): New option.
19562 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
19563 * config/bpf/bpf.md (*extendsidi2): New.
19564 (extendhidi2): New.
19565 (extendqidi2): New.
19566 (extendsisi2): New.
19567 (extendhisi2): New.
19568 (extendqisi2): New.
19569 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
19570 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
19571 also enables -msmov.
19573 2023-07-27 David Faust <david.faust@oracle.com>
19575 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
19576 Add -mbswap and -msdiv eBPF options.
19577 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
19578 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
19581 2023-07-27 David Faust <david.faust@oracle.com>
19583 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
19584 in pseudo-C dialect output template.
19585 (sub<AM:mode>3): Likewise.
19587 2023-07-27 Jan Hubicka <jh@suse.cz>
19589 * tree-vect-loop.cc (optimize_mask_stores): Make store
19592 2023-07-27 Jan Hubicka <jh@suse.cz>
19594 * cfgloop.h (single_dom_exit): Declare.
19595 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
19596 * cfgrtl.cc (struct cfg_hooks): Fix comment.
19597 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
19598 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
19599 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
19601 (tree_transform_and_unroll_loop): ... here;
19603 2023-07-27 Jan Hubicka <jh@suse.cz>
19605 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
19606 tree-ssa-loop-manip.cc and avoid recursion.
19607 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
19608 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
19610 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
19611 (scale_dominated_blocks_in_loop): Declare.
19612 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
19613 (change_edge_frequency): Remove.
19614 * predict.h (change_edge_frequency): Remove.
19615 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
19617 (niter_for_unrolled_loop): Remove.
19618 (tree_transform_and_unroll_loop): Fix profile update.
19620 2023-07-27 Jan Hubicka <jh@suse.cz>
19622 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
19623 to guessed; fix count of new_bb.
19625 2023-07-27 Jan Hubicka <jh@suse.cz>
19627 * profile-count.h (profile_count::apply_probability): Fix
19628 handling of uninitialized probabilities, optimize scaling
19631 2023-07-27 Richard Biener <rguenther@suse.de>
19633 PR tree-optimization/91838
19634 * gimple-match-head.cc: Include attribs.h and asan.h.
19635 * generic-match-head.cc: Likewise.
19636 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
19638 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19640 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
19641 (ADJUST_ALIGNMENT): Ditto.
19642 (ADJUST_PRECISION): Ditto.
19643 (VLS_MODES): Ditto.
19644 (VECTOR_MODE_WITH_PREFIX): Ditto.
19645 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
19646 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
19647 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
19648 (legitimize_move): Enable basic VLS modes support.
19649 (get_vlmul): Ditto.
19650 (get_ratio): Ditto.
19651 (get_vector_mode): Ditto.
19652 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
19653 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
19654 (VLS_ENTRY): New macro.
19655 (riscv_v_ext_mode_p): Add vls modes.
19656 (riscv_get_v_regno_alignment): New function.
19657 (riscv_print_operand): Add vls modes.
19658 (riscv_hard_regno_nregs): Ditto.
19659 (riscv_hard_regno_mode_ok): Ditto.
19660 (riscv_regmode_natural_size): Ditto.
19661 (riscv_vectorize_preferred_vector_alignment): Ditto.
19662 * config/riscv/riscv.md: Ditto.
19663 * config/riscv/vector-iterators.md: Ditto.
19664 * config/riscv/vector.md: Ditto.
19665 * config/riscv/autovec-vls.md: New file.
19667 2023-07-27 Pan Li <pan2.li@intel.com>
19669 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
19670 (vread_csr): Ditto.
19671 (vwrite_csr): Ditto.
19673 2023-07-27 demin.han <demin.han@starfivetech.com>
19675 * config/riscv/autovec.md: Delete which_alternative use in split
19677 2023-07-27 Richard Biener <rguenther@suse.de>
19679 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
19681 (pass_sink_code::execute): ... in the caller.
19683 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
19684 Richard Biener <rguenther@suse.de>
19686 PR tree-optimization/110776
19687 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
19690 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
19692 * config/riscv/riscv.md: Include zicond.md
19693 * config/riscv/zicond.md: New file.
19695 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
19697 * common/config/riscv/riscv-common.cc: New extension.
19698 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
19699 (TARGET_ZICOND): New target.
19701 2023-07-26 Carl Love <cel@us.ibm.com>
19703 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
19704 specifies the number of built-in arguments to check.
19705 (altivec_resolve_overloaded_builtin): Update calls to find_instance
19706 to pass the number of built-in arguments to be checked.
19708 2023-07-26 David Faust <david.faust@oracle.com>
19710 * config/bpf/bpf.opt (mv3-atomics): New option.
19711 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
19712 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
19713 (REG_CLASS_NAMES): Likewise.
19714 (REG_CLASS_CONTENTS): Likewise.
19715 (REGNO_REG_CLASS): Handle R0.
19716 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
19717 (UNSPEC_AAND): New unspec.
19718 (UNSPEC_AOR): Likewise.
19719 (UNSPEC_AXOR): Likewise.
19720 (UNSPEC_AFADD): Likewise.
19721 (UNSPEC_AFAND): Likewise.
19722 (UNSPEC_AFOR): Likewise.
19723 (UNSPEC_AFXOR): Likewise.
19724 (UNSPEC_AXCHG): Likewise.
19725 (UNSPEC_ACMPX): Likewise.
19726 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
19728 * config/bpf/atomic.md: ...Here. New file.
19729 * config/bpf/constraints.md (t): New constraint for R0.
19730 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
19732 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
19734 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
19737 2023-07-26 Carl Love <cel@us.ibm.com>
19739 * config/rs6000/rs6000-builtins.def: Rename
19740 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
19741 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
19742 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
19743 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
19744 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
19745 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
19746 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
19747 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
19748 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
19749 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
19750 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
19751 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
19752 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
19753 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
19754 * config/rs6000/rs6000-c.cc (find_instance): Add case
19755 RS6000_OVLD_VEC_REPLACE_UN.
19756 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
19757 Fix first argument type. Rename VREPLACE_UN_UV4SI as
19758 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
19759 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
19760 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
19761 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
19762 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
19763 REPLACE_ELT_V for vector modes.
19764 (REPLACE_ELT): New scalar mode iterator.
19765 (REPLACE_ELT_char): Add scalar attributes.
19766 (vreplace_un_<mode>): Change iterator and mode attribute.
19768 2023-07-26 David Malcolm <dmalcolm@redhat.com>
19771 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
19773 2023-07-26 Richard Biener <rguenther@suse.de>
19775 PR tree-optimization/106081
19776 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
19777 Assign layout -1 to splats.
19779 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19781 * range-op-mixed.h (class operator_cast): Add update_bitmask.
19782 * range-op.cc (operator_cast::update_bitmask): New.
19783 (operator_cast::fold_range): Call update_bitmask.
19785 2023-07-26 Li Xu <xuli1@eswincomputing.com>
19787 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
19788 scalar type to float16, eliminate warning.
19789 (vfloat16mf4x3_t): Ditto.
19790 (vfloat16mf4x4_t): Ditto.
19791 (vfloat16mf4x5_t): Ditto.
19792 (vfloat16mf4x6_t): Ditto.
19793 (vfloat16mf4x7_t): Ditto.
19794 (vfloat16mf4x8_t): Ditto.
19795 (vfloat16mf2x2_t): Ditto.
19796 (vfloat16mf2x3_t): Ditto.
19797 (vfloat16mf2x4_t): Ditto.
19798 (vfloat16mf2x5_t): Ditto.
19799 (vfloat16mf2x6_t): Ditto.
19800 (vfloat16mf2x7_t): Ditto.
19801 (vfloat16mf2x8_t): Ditto.
19802 (vfloat16m1x2_t): Ditto.
19803 (vfloat16m1x3_t): Ditto.
19804 (vfloat16m1x4_t): Ditto.
19805 (vfloat16m1x5_t): Ditto.
19806 (vfloat16m1x6_t): Ditto.
19807 (vfloat16m1x7_t): Ditto.
19808 (vfloat16m1x8_t): Ditto.
19809 (vfloat16m2x2_t): Ditto.
19810 (vfloat16m2x3_t): Ditto.
19811 (vfloat16m2x4_t): Ditto.
19812 (vfloat16m4x2_t): Ditto.
19813 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
19814 * config/riscv/vector.md: add tuple mode in attr sew.
19816 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
19819 * config/i386/i386.md (plusminusmult): New code iterator.
19820 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
19821 (movq_<mode>_to_sse): New expander.
19822 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
19823 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
19824 as a wrapper around V4SFmode operation.
19825 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
19826 nonimmediate_operand.
19827 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
19828 operand 2 predicates to nonimmediate_operand.
19829 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
19830 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
19831 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
19832 operand 2 predicates to nonimmediate_operand.
19833 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
19834 nonimmediate_operand.
19835 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
19836 operand 2 predicates to nonimmediate_operand.
19837 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
19838 (<smaxmin:code>v2sf3): Ditto.
19839 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
19840 predicates to nonimmediate_operand.
19841 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
19842 operand 1 and operand 2 predicates to nonimmediate_operand.
19843 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
19844 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
19845 (*mmx_haddv2sf3_low): Ditto.
19846 (*mmx_hsubv2sf3_low): Ditto.
19847 (vec_addsubv2sf3): Ditto.
19848 (*mmx_maskcmpv2sf3_comm): Remove.
19849 (*mmx_maskcmpv2sf3): Remove.
19850 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
19851 (vcond<V2FI:mode>v2sf): Ditto.
19854 (fnmav2sf4): Ditto.
19855 (fnmsv2sf4): Ditto.
19856 (fix_truncv2sfv2si2): Ditto.
19857 (fixuns_truncv2sfv2si2): Ditto.
19858 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
19859 Change operand 1 predicate to nonimmediate_operand.
19860 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
19861 (floatunsv2siv2sf2): Ditto.
19862 (mmx_floatv2siv2sf2): Remove SSE alternatives.
19863 Change operand 1 predicate to nonimmediate_operand.
19864 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
19865 (rintv2sf2): Ditto.
19866 (lrintv2sfv2si2): Ditto.
19867 (ceilv2sf2): Ditto.
19868 (lceilv2sfv2si2): Ditto.
19869 (floorv2sf2): Ditto.
19870 (lfloorv2sfv2si2): Ditto.
19871 (btruncv2sf2): Ditto.
19872 (roundv2sf2): Ditto.
19873 (lroundv2sfv2si2): Ditto.
19874 (*mmx_roundv2sf2): Remove.
19876 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
19878 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
19880 2023-07-26 Richard Biener <rguenther@suse.de>
19882 PR tree-optimization/110799
19883 * tree-ssa-pre.cc (compute_avail): More thoroughly match
19884 up TBAA behavior of redundant loads.
19886 2023-07-26 Jakub Jelinek <jakub@redhat.com>
19888 PR tree-optimization/110755
19889 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
19890 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
19891 it is exact op1 + (-op1) or op1 - op1.
19893 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
19896 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
19897 operands output with "x".
19899 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19901 * range-op.cc (class operator_absu): Add update_bitmask.
19902 (operator_absu::update_bitmask): New.
19904 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19906 * range-op-mixed.h (class operator_abs): Add update_bitmask.
19907 * range-op.cc (operator_abs::update_bitmask): New.
19909 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19911 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
19912 * range-op.cc (operator_bitwise_not::update_bitmask): New.
19914 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19916 * range-op.cc (update_known_bitmask): Handle unary operators.
19918 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19920 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
19922 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
19924 * config/riscv/riscv.md: Likewise.
19926 2023-07-26 Jan Hubicka <jh@suse.cz>
19928 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
19929 if we divide by zero.
19931 2023-07-25 David Faust <david.faust@oracle.com>
19933 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
19934 enclosing parentheses for pseudo-C dialect.
19935 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
19936 operands of pseudo-C dialect output templates where needed.
19937 (zero_extendqidi2): Likewise.
19938 (zero_extendsidi2): Likewise.
19939 (*mov<MM:mode>): Likewise.
19941 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
19943 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
19944 (bit_value_mult_const): Same.
19945 (get_individual_bits): Same.
19947 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
19950 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
19951 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
19952 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
19953 (minmax_op): New int attribute.
19954 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
19955 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
19956 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
19957 pattern to fmaxdf3.
19958 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
19960 2023-07-24 David Faust <david.faust@oracle.com>
19962 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
19964 2023-07-24 Drew Ross <drross@redhat.com>
19965 Jakub Jelinek <jakub@redhat.com>
19967 PR middle-end/109986
19968 * generic-match-head.cc (bitwise_equal_p): New macro.
19969 * gimple-match-head.cc (bitwise_equal_p): New macro.
19970 (gimple_nop_convert): Declare.
19971 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
19972 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
19974 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
19976 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
19977 single quote rather than backquote in diagnostic.
19979 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
19982 * config/bpf/bpf.opt: New command-line option -msdiv.
19983 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
19984 * config/bpf/bpf.cc (bpf_option_override): Initialize
19986 * doc/invoke.texi (eBPF Options): Document -msdiv.
19988 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
19990 * config/riscv/riscv.cc (riscv_option_override): Spell out
19991 greater than and use cannot in diagnostic string.
19993 2023-07-24 Richard Biener <rguenther@suse.de>
19995 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
19996 (_slp_tree::vec_stmts): Remove.
19997 (SLP_TREE_VEC_STMTS): Remove.
19998 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
19999 (_slp_tree::_slp_tree): Adjust.
20000 (_slp_tree::~_slp_tree): Likewise.
20001 (vect_get_slp_vect_def): Simplify.
20002 (vect_get_slp_defs): Likewise.
20003 (vect_transform_slp_perm_load_1): Adjust.
20004 (vect_add_slp_permutation): Likewise.
20005 (vect_schedule_slp_node): Likewise.
20006 (vectorize_slp_instance_root_stmt): Likewise.
20007 (vect_schedule_scc): Likewise.
20008 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
20009 (vectorizable_call): Likewise.
20010 (vectorizable_call): Likewise.
20011 (vect_create_vectorized_demotion_stmts): Likewise.
20012 (vectorizable_conversion): Likewise.
20013 (vectorizable_assignment): Likewise.
20014 (vectorizable_shift): Likewise.
20015 (vectorizable_operation): Likewise.
20016 (vectorizable_load): Likewise.
20017 (vectorizable_condition): Likewise.
20018 (vectorizable_comparison): Likewise.
20019 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
20020 (vectorize_fold_left_reduction): Use push_vec_def.
20021 (vect_transform_reduction): Likewise.
20022 (vect_transform_cycle_phi): Likewise.
20023 (vectorizable_lc_phi): Likewise.
20024 (vectorizable_phi): Likewise.
20025 (vectorizable_recurr): Likewise.
20026 (vectorizable_induction): Likewise.
20027 (vectorizable_live_operation): Likewise.
20029 2023-07-24 Richard Biener <rguenther@suse.de>
20031 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
20033 2023-07-24 Richard Biener <rguenther@suse.de>
20035 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
20036 * config/i386/i386-expand.cc: Likewise.
20037 * config/i386/i386-features.cc: Likewise.
20038 * config/i386/i386-options.cc: Likewise.
20040 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
20042 * tree-vect-stmts.cc (vectorizable_conversion): Handle
20043 more demotion/promotion for modifier == NONE.
20045 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
20050 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
20051 (extzv<mode>): Likewise.
20052 (insv<mode>): Likewise.
20053 (*testqi_ext_3): Likewise.
20054 (*btr<mode>_2): Likewise.
20055 (define_split): Likewise.
20056 (*btsq_imm): Likewise.
20057 (*btrq_imm): Likewise.
20058 (*btcq_imm): Likewise.
20059 (define_peephole2 x3): Likewise.
20060 (*bt<mode>): Likewise
20061 (*bt<mode>_mask): New define_insn_and_split.
20062 (*jcc_bt<mode>): Use QImode for offsets.
20063 (*jcc_bt<mode>_1): Delete obsolete pattern.
20064 (*jcc_bt<mode>_mask): Use QImode offsets.
20065 (*jcc_bt<mode>_mask_1): Likewise.
20066 (define_split): Likewise.
20067 (*bt<mode>_setcqi): Likewise.
20068 (*bt<mode>_setncqi): Likewise.
20069 (*bt<mode>_setnc<mode>): Likewise.
20070 (*bt<mode>_setncqi_2): Likewise.
20071 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
20072 (bmi2_bzhi_<mode>3): Use QImode offsets.
20073 (*bmi2_bzhi_<mode>3): Likewise.
20074 (*bmi2_bzhi_<mode>3_1): Likewise.
20075 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
20076 (@tbm_bextri_<mode>): Likewise.
20078 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
20080 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
20081 * config/bpf/bpf.opt (mkernel): Remove option.
20082 * config/bpf/bpf.cc (bpf_target_macros): Do not define
20083 BPF_KERNEL_VERSION_CODE.
20085 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
20088 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
20089 (mbswap): New option.
20090 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
20091 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
20092 * config/bpf/bpf.md: Use bswap instructions if available for
20093 bswap* insn, and fix constraint.
20094 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
20096 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20098 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
20099 (mask_len_fold_left_plus_<mode>): Ditto.
20100 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20101 (enum reduction_type): Ditto.
20102 (expand_reduction): Add in-order reduction.
20103 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
20104 (expand_reduction): Add in-order reduction.
20106 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20108 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
20109 (vectorize_fold_left_reduction): Ditto.
20110 (vectorizable_reduction): Ditto.
20111 (vect_transform_reduction): Ditto.
20113 2023-07-24 Richard Biener <rguenther@suse.de>
20115 PR tree-optimization/110777
20116 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
20117 Avoid propagating abnormals.
20119 2023-07-24 Richard Biener <rguenther@suse.de>
20121 PR tree-optimization/110766
20122 * tree-scalar-evolution.cc
20123 (analyze_and_compute_bitwise_induction_effect): Check the PHI
20124 is defined in the loop header.
20126 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
20128 PR tree-optimization/110740
20129 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
20130 loop with a single scalar iteration.
20132 2023-07-24 Pan Li <pan2.li@intel.com>
20134 * config/riscv/riscv-vector-builtins-shapes.cc
20135 (struct alu_frm_def): Take range check.
20137 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
20140 * config/riscv/predicates.md (const_0_operand): Add back
20143 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
20145 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
20146 64-bit insertions into TImode optimizations with -O0, unless
20147 the function has the "naked" attribute (for PR target/110533).
20149 2023-07-22 Andrew Pinski <apinski@marvell.com>
20152 * rtl.h (extended_count): Change last argument type
20155 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
20157 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
20158 (extzv<mode>): Likewise.
20159 (insv<mode>): Likewise.
20160 (*testqi_ext_3): Likewise.
20161 (*btr<mode>_2): Likewise.
20162 (define_split): Likewise.
20163 (*btsq_imm): Likewise.
20164 (*btrq_imm): Likewise.
20165 (*btcq_imm): Likewise.
20166 (define_peephole2 x3): Likewise.
20167 (*bt<mode>): Likewise
20168 (*bt<mode>_mask): New define_insn_and_split.
20169 (*jcc_bt<mode>): Use QImode for offsets.
20170 (*jcc_bt<mode>_1): Delete obsolete pattern.
20171 (*jcc_bt<mode>_mask): Use QImode offsets.
20172 (*jcc_bt<mode>_mask_1): Likewise.
20173 (define_split): Likewise.
20174 (*bt<mode>_setcqi): Likewise.
20175 (*bt<mode>_setncqi): Likewise.
20176 (*bt<mode>_setnc<mode>): Likewise.
20177 (*bt<mode>_setncqi_2): Likewise.
20178 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
20179 (bmi2_bzhi_<mode>3): Use QImode offsets.
20180 (*bmi2_bzhi_<mode>3): Likewise.
20181 (*bmi2_bzhi_<mode>3_1): Likewise.
20182 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
20183 (@tbm_bextri_<mode>): Likewise.
20185 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
20187 * config/bfin/bfin.md (ones): Fix length computation.
20189 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
20191 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
20192 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
20193 instead of FRAME_POINTER_REGNUM to spill pseudos.
20195 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
20196 Richard Biener <rguenther@suse.de>
20199 * gimplify.cc (gimplify_compound_lval): If the array's type
20200 is error_mark_node then return GS_ERROR.
20202 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
20205 * config/bpf/bpf.opt: Added option -masm=<dialect>.
20206 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
20207 * config/bpf/bpf.cc (bpf_print_register): New function.
20208 (bpf_print_register): Support pseudo-c syntax for registers.
20209 (bpf_print_operand_address): Likewise.
20210 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
20211 (ASSEMBLER_DIALECT): Define.
20212 * config/bpf/bpf.md: Added pseudo-c templates.
20213 * doc/invoke.texi (-masm=): New eBPF option item.
20215 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
20217 * config/bpf/bpf.md: fixed template for neg instruction.
20219 2023-07-21 Jan Hubicka <jh@suse.cz>
20222 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
20223 profiles by vectorization factor.
20224 (vect_transform_loop): Check for flat profiles.
20226 2023-07-21 Jan Hubicka <jh@suse.cz>
20228 * cfgloop.h (maybe_flat_loop_profile): Declare
20229 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
20230 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
20232 2023-07-21 Jan Hubicka <jh@suse.cz>
20234 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
20235 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
20236 * predict.cc (estimate_bb_frequencies): Likewise.
20237 * profile.cc (branch_prob): Likewise.
20238 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
20240 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
20242 * config.in: Regenerate.
20243 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
20244 (LINK_COMMAND_SPEC_A): Add demangle handling.
20245 * configure: Regenerate.
20246 * configure.ac: Detect linker support for '-demangle'.
20248 2023-07-21 Jan Hubicka <jh@suse.cz>
20250 * sreal.cc (sreal::to_nearest_int): New.
20251 (sreal_verify_basics): Verify also to_nearest_int.
20252 (verify_aritmetics): Likewise.
20253 (sreal_verify_conversions): New.
20254 (sreal_cc_tests): Call sreal_verify_conversions.
20255 * sreal.h: (sreal::to_nearest_int): Declare
20257 2023-07-21 Jan Hubicka <jh@suse.cz>
20259 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
20260 (should_duplicate_loop_header_p): Return info on profitability.
20261 (do_while_loop_p): Watch for constant conditionals.
20262 (update_profile_after_ch): Do not sanity check that all
20263 static exits are taken.
20264 (ch_base::copy_headers): Run on all loops.
20265 (pass_ch::process_loop_p): Improve heuristics by handling also
20266 do_while loop and duplicating shortest sequence containing all
20269 2023-07-21 Jan Hubicka <jh@suse.cz>
20271 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
20272 tests first; update finite_p flag.
20274 2023-07-21 Jan Hubicka <jh@suse.cz>
20276 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
20277 * cfgloop.h (print_loop_info): Declare.
20278 * tree-cfg.cc (print_loop_info): Break out from ...; add
20279 printing of missing fields and profile
20280 (print_loop): ... here.
20282 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20284 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
20286 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20288 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
20289 (vectorizable_operation): Ditto.
20291 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20293 * config/riscv/autovec.md: Align order of mask and len.
20294 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
20295 (expand_gather_scatter): Ditto.
20296 * doc/md.texi: Ditto.
20297 * internal-fn.cc (add_len_and_mask_args): Ditto.
20298 (add_mask_and_len_args): Ditto.
20299 (expand_partial_load_optab_fn): Ditto.
20300 (expand_partial_store_optab_fn): Ditto.
20301 (expand_scatter_store_optab_fn): Ditto.
20302 (expand_gather_load_optab_fn): Ditto.
20303 (internal_fn_len_index): Ditto.
20304 (internal_fn_mask_index): Ditto.
20305 (internal_len_load_store_bias): Ditto.
20306 * tree-vect-stmts.cc (vectorizable_store): Ditto.
20307 (vectorizable_load): Ditto.
20309 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20311 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
20312 (mask_len_load<mode><vm>): Ditto.
20313 (len_maskstore<mode><vm>): Ditto.
20314 (mask_len_store<mode><vm>): Ditto.
20315 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
20316 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
20317 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
20318 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
20319 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
20320 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
20321 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
20322 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
20323 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
20324 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
20325 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
20326 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
20327 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
20328 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
20329 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
20330 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
20331 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
20332 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
20333 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
20334 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
20335 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
20336 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
20337 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
20338 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
20339 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
20340 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
20341 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
20342 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
20343 * doc/md.texi: Ditto.
20344 * genopinit.cc (main): Ditto.
20345 (CMP_NAME): Ditto. Ditto.
20346 * gimple-fold.cc (arith_overflowed_p): Ditto.
20347 (gimple_fold_partial_load_store_mem_ref): Ditto.
20348 (gimple_fold_call): Ditto.
20349 * internal-fn.cc (len_maskload_direct): Ditto.
20350 (mask_len_load_direct): Ditto.
20351 (len_maskstore_direct): Ditto.
20352 (mask_len_store_direct): Ditto.
20353 (expand_call_mem_ref): Ditto.
20354 (expand_len_maskload_optab_fn): Ditto.
20355 (expand_mask_len_load_optab_fn): Ditto.
20356 (expand_len_maskstore_optab_fn): Ditto.
20357 (expand_mask_len_store_optab_fn): Ditto.
20358 (direct_len_maskload_optab_supported_p): Ditto.
20359 (direct_mask_len_load_optab_supported_p): Ditto.
20360 (direct_len_maskstore_optab_supported_p): Ditto.
20361 (direct_mask_len_store_optab_supported_p): Ditto.
20362 (internal_load_fn_p): Ditto.
20363 (internal_store_fn_p): Ditto.
20364 (internal_gather_scatter_fn_p): Ditto.
20365 (internal_fn_len_index): Ditto.
20366 (internal_fn_mask_index): Ditto.
20367 (internal_fn_stored_value_index): Ditto.
20368 (internal_len_load_store_bias): Ditto.
20369 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
20370 (MASK_LEN_GATHER_LOAD): Ditto.
20371 (LEN_MASK_LOAD): Ditto.
20372 (MASK_LEN_LOAD): Ditto.
20373 (LEN_MASK_SCATTER_STORE): Ditto.
20374 (MASK_LEN_SCATTER_STORE): Ditto.
20375 (LEN_MASK_STORE): Ditto.
20376 (MASK_LEN_STORE): Ditto.
20377 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
20378 (supports_vec_scatter_store_p): Ditto.
20379 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
20380 (target_supports_len_load_store_p): Ditto.
20381 * optabs.def (OPTAB_CD): Ditto.
20382 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
20383 (call_may_clobber_ref_p_1): Ditto.
20384 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
20385 (dse_optimize_stmt): Ditto.
20386 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
20387 (get_alias_ptr_type_for_ptr_address): Ditto.
20388 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
20389 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
20390 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
20391 (vect_get_strided_load_store_ops): Ditto.
20392 (vectorizable_store): Ditto.
20393 (vectorizable_load): Ditto.
20395 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
20397 * config/i386/i386.opt: Fix a typo.
20399 2023-07-21 Richard Biener <rguenther@suse.de>
20401 PR tree-optimization/88540
20402 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
20403 with NaNs but handle the simple case by if-converting to a
20406 2023-07-21 Andrew Pinski <apinski@marvell.com>
20408 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
20411 2023-07-21 Richard Biener <rguenther@suse.de>
20413 PR tree-optimization/110742
20414 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
20415 Do not materialize an edge permutation in an external node with
20417 (vect_slp_analyze_node_operations_1): Guard purely internal
20420 2023-07-21 Jan Hubicka <jh@suse.cz>
20422 * cfgloop.cc: Include sreal.h.
20423 (flow_loop_dump): Dump sreal iteration exsitmate.
20424 (get_estimated_loop_iterations): Update.
20425 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
20426 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
20427 (expected_loop_iterations_unbounded): Use new API.
20428 * cfgloopmanip.cc (scale_loop_profile): Use
20429 expected_loop_iterations_by_profile
20430 * predict.cc (pass_profile::execute): Likewise.
20431 * profile.cc (branch_prob): Likewise.
20432 * tree-ssa-loop-niter.cc: Include sreal.h.
20433 (estimate_numbers_of_iterations): Likewise
20435 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
20437 PR tree-optimization/110744
20438 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
20439 operand for ifn IFN_LEN_STORE.
20441 2023-07-21 liuhongt <hongtao.liu@intel.com>
20444 * common.opt: (fcf-protection=): Add EnumSet attribute to
20445 support combination of params.
20447 2023-07-21 David Malcolm <dmalcolm@redhat.com>
20449 PR middle-end/110612
20450 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
20452 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
20453 (table_geometry::table_y_to_canvas_y): Likewise.
20454 * text-art/table.h (table_geometry::m_table): Drop unused field.
20455 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
20458 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
20461 * config/i386/i386-features.cc
20462 (general_scalar_chain::compute_convert_gain): Calculate gain
20463 for extend higpart case.
20464 (general_scalar_chain::convert_op): Handle
20465 ASHIFTRT/ASHIFT combined RTX.
20466 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
20467 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
20468 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
20469 New define_insn_and_split pattern.
20470 (*extendv2di2_highpart_stv): Ditto.
20472 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
20474 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
20477 2023-07-20 Andrew Pinski <apinski@marvell.com>
20479 * combine.cc (dump_combine_stats): Remove.
20480 (dump_combine_total_stats): Remove.
20481 (total_attempts, total_merges, total_extras,
20482 total_successes): Remove.
20483 (combine_instructions): Don't increment total stats
20484 instead use statistics_counter_event.
20485 * dumpfile.cc (print_combine_total_stats): Remove.
20486 * dumpfile.h (print_combine_total_stats): Remove.
20487 (dump_combine_total_stats): Remove.
20488 * passes.cc (finish_optimization_passes):
20489 Don't call print_combine_total_stats.
20490 * rtl.h (dump_combine_total_stats): Remove.
20491 (dump_combine_stats): Remove.
20493 2023-07-20 Jan Hubicka <jh@suse.cz>
20495 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
20498 2023-07-20 Martin Jambor <mjambor@suse.cz>
20500 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
20501 (analyzer-text-art-ideal-canvas-width): Likewise.
20502 (analyzer-text-art-string-ellipsis-head-len): Likewise.
20503 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
20505 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20507 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
20508 Refine code structure.
20510 2023-07-20 Jan Hubicka <jh@suse.cz>
20512 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
20513 (get_range_query): ... this one; do
20514 (static_loop_exit): Add query parametr, turn ranger to reference.
20515 (loop_static_stmt_p): New function.
20516 (loop_static_op_p): New function.
20517 (loop_iv_derived_p): Remove.
20518 (loop_combined_static_and_iv_p): New function.
20519 (should_duplicate_loop_header_p): Discover combined onditionals;
20520 do not track iv derived; improve dumps.
20521 (pass_ch::execute): Fix whitespace.
20523 2023-07-20 Richard Biener <rguenther@suse.de>
20525 PR tree-optimization/110204
20526 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
20527 Look through copies generated by PRE.
20529 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
20531 * tree-vect-stmts.cc (get_group_load_store_type): Account for
20532 `gap` when checking if need to peel twice.
20534 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
20536 PR middle-end/77928
20537 * doc/extend.texi: Document iseqsig builtin.
20538 * builtins.cc (fold_builtin_iseqsig): New function.
20539 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
20540 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
20541 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
20543 2023-07-20 Pan Li <pan2.li@intel.com>
20545 * config/riscv/vector.md: Fix incorrect match_operand.
20547 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
20549 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
20550 force_reg, to use SUBREG rather than create a new pseudo when
20551 inserting DFmode fields into TImode with insvti_{high,low}part.
20552 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
20553 define_insn_and_split...
20554 (*concatditi3_3): 64-bit implementation. Provide alternative
20555 that allows register allocation to use SSE registers that is
20556 split into vec_concatv2di after reload.
20557 (*concatsidi3_3): 32-bit implementation.
20559 2023-07-20 Richard Biener <rguenther@suse.de>
20561 PR middle-end/61747
20562 * internal-fn.cc (expand_vec_cond_optab_fn): When the
20563 value operands are equal to the original comparison operands
20564 preserve that equality by re-using the comparison expansion.
20565 * optabs.cc (emit_conditional_move): When the value operands
20566 are equal to the comparison operands and would be forced to
20567 a register by prepare_cmp_insn do so earlier, preserving the
20570 2023-07-20 Pan Li <pan2.li@intel.com>
20572 * config/riscv/vector.md: Align pattern format.
20574 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
20576 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
20577 Granite Rapids{, D} from documentation.
20579 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20581 * config/riscv/autovec.md
20582 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
20583 Refactor RVV machine modes.
20584 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
20585 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
20586 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
20587 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
20588 (len_mask_gather_load<mode><mode>): Ditto.
20589 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
20590 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
20591 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
20592 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
20593 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
20594 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
20595 (len_mask_scatter_store<mode><mode>): Ditto.
20596 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
20597 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
20598 (ADJUST_NUNITS): Ditto.
20599 (ADJUST_ALIGNMENT): Ditto.
20600 (ADJUST_BYTESIZE): Ditto.
20601 (ADJUST_PRECISION): Ditto.
20602 (RVV_MODES): Ditto.
20603 (RVV_WHOLE_MODES): Ditto.
20604 (RVV_FRACT_MODE): Ditto.
20605 (RVV_NF8_MODES): Ditto.
20606 (RVV_NF4_MODES): Ditto.
20607 (VECTOR_MODES_WITH_PREFIX): Ditto.
20608 (VECTOR_MODE_WITH_PREFIX): Ditto.
20609 (RVV_TUPLE_MODES): Ditto.
20610 (RVV_NF2_MODES): Ditto.
20611 (RVV_TUPLE_PARTIAL_MODES): Ditto.
20612 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
20614 (TUPLE_ENTRY): Ditto.
20615 (get_vlmul): Ditto.
20617 (get_ratio): Ditto.
20618 (preferred_simd_mode): Ditto.
20619 (autovectorize_vector_modes): Ditto.
20620 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
20621 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
20622 (vbool64_t): Ditto.
20623 (vbool32_t): Ditto.
20624 (vbool16_t): Ditto.
20629 (vint8mf8_t): Ditto.
20630 (vuint8mf8_t): Ditto.
20631 (vint8mf4_t): Ditto.
20632 (vuint8mf4_t): Ditto.
20633 (vint8mf2_t): Ditto.
20634 (vuint8mf2_t): Ditto.
20635 (vint8m1_t): Ditto.
20636 (vuint8m1_t): Ditto.
20637 (vint8m2_t): Ditto.
20638 (vuint8m2_t): Ditto.
20639 (vint8m4_t): Ditto.
20640 (vuint8m4_t): Ditto.
20641 (vint8m8_t): Ditto.
20642 (vuint8m8_t): Ditto.
20643 (vint16mf4_t): Ditto.
20644 (vuint16mf4_t): Ditto.
20645 (vint16mf2_t): Ditto.
20646 (vuint16mf2_t): Ditto.
20647 (vint16m1_t): Ditto.
20648 (vuint16m1_t): Ditto.
20649 (vint16m2_t): Ditto.
20650 (vuint16m2_t): Ditto.
20651 (vint16m4_t): Ditto.
20652 (vuint16m4_t): Ditto.
20653 (vint16m8_t): Ditto.
20654 (vuint16m8_t): Ditto.
20655 (vint32mf2_t): Ditto.
20656 (vuint32mf2_t): Ditto.
20657 (vint32m1_t): Ditto.
20658 (vuint32m1_t): Ditto.
20659 (vint32m2_t): Ditto.
20660 (vuint32m2_t): Ditto.
20661 (vint32m4_t): Ditto.
20662 (vuint32m4_t): Ditto.
20663 (vint32m8_t): Ditto.
20664 (vuint32m8_t): Ditto.
20665 (vint64m1_t): Ditto.
20666 (vuint64m1_t): Ditto.
20667 (vint64m2_t): Ditto.
20668 (vuint64m2_t): Ditto.
20669 (vint64m4_t): Ditto.
20670 (vuint64m4_t): Ditto.
20671 (vint64m8_t): Ditto.
20672 (vuint64m8_t): Ditto.
20673 (vfloat16mf4_t): Ditto.
20674 (vfloat16mf2_t): Ditto.
20675 (vfloat16m1_t): Ditto.
20676 (vfloat16m2_t): Ditto.
20677 (vfloat16m4_t): Ditto.
20678 (vfloat16m8_t): Ditto.
20679 (vfloat32mf2_t): Ditto.
20680 (vfloat32m1_t): Ditto.
20681 (vfloat32m2_t): Ditto.
20682 (vfloat32m4_t): Ditto.
20683 (vfloat32m8_t): Ditto.
20684 (vfloat64m1_t): Ditto.
20685 (vfloat64m2_t): Ditto.
20686 (vfloat64m4_t): Ditto.
20687 (vfloat64m8_t): Ditto.
20688 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
20689 (TUPLE_ENTRY): Ditto.
20690 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
20691 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
20692 (riscv_v_adjust_nunits): Ditto.
20693 (riscv_v_adjust_bytesize): Ditto.
20694 (riscv_v_adjust_precision): Ditto.
20695 (riscv_convert_vector_bits): Ditto.
20696 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
20697 * config/riscv/riscv.md: Ditto.
20698 * config/riscv/vector-iterators.md: Ditto.
20699 * config/riscv/vector.md
20700 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
20701 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
20702 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
20703 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
20704 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
20705 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
20706 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
20707 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
20708 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
20709 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
20710 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
20711 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
20712 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
20713 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
20714 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
20715 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
20716 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
20717 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
20718 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
20719 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
20720 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
20721 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
20722 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
20723 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
20724 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
20725 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
20726 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
20727 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
20728 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
20729 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
20730 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
20731 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
20732 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
20734 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
20736 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
20737 (lra_asm_insn_error): New prototype.
20738 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
20740 (lra_spill): Call lra_update_fp2sp_elimination.
20741 * lra-eliminations.cc: Remove trailing spaces.
20742 (elimination_fp2sp_occured_p): New static flag.
20743 (lra_eliminate_regs_1): Set the flag up.
20744 (update_reg_eliminate): Modify the assert for stack to frame
20745 pointer elimination.
20746 (lra_update_fp2sp_elimination): New function.
20747 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
20749 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
20751 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
20753 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
20754 dependencies from target pragmas.
20755 * config/aarch64/arm_fp16.h (target): Likewise.
20756 * config/aarch64/arm_neon.h (target): Likewise.
20758 2023-07-19 Andrew Pinski <apinski@marvell.com>
20760 PR tree-optimization/110252
20761 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
20762 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
20763 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
20764 (match_simplify_replacement): Temporarily
20765 remove the flow sensitive info on the two statements that might
20768 2023-07-19 Andrew Pinski <apinski@marvell.com>
20770 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
20771 with flow_sensitive_info_storage.
20772 (follow_outer_ssa_edges): Update how to save off the flow
20774 (maybe_fold_comparisons_from_match_pd): Update restoring
20775 of flow sensitive info.
20776 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
20777 (flow_sensitive_info_storage::restore): New method.
20778 (flow_sensitive_info_storage::save_and_clear): New method.
20779 (flow_sensitive_info_storage::clear_storage): New method.
20780 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
20782 2023-07-19 Andrew Pinski <apinski@marvell.com>
20784 PR tree-optimization/110726
20785 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
20786 Add checks to make sure the type was one bit precision
20789 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20791 * doc/md.texi: Add mask_len_fold_left_plus.
20792 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
20793 (expand_mask_len_fold_left_optab_fn): Ditto.
20794 (direct_mask_len_fold_left_optab_supported_p): Ditto.
20795 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
20796 * optabs.def (OPTAB_D): Ditto.
20798 2023-07-19 Jakub Jelinek <jakub@redhat.com>
20800 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
20802 2023-07-19 Jakub Jelinek <jakub@redhat.com>
20804 PR tree-optimization/110731
20805 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
20806 divisor as UNSIGNED regardless of sgn.
20808 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
20810 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
20811 (standard_extensions_p): Add check.
20812 (riscv_subset_list::add): Just return NULL if it failed before.
20813 (riscv_subset_list::parse_std_ext): Continue parse when find a error
20814 (riscv_subset_list::parse): Just return NULL if it failed before.
20815 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
20817 2023-07-19 Jan Beulich <jbeulich@suse.com>
20819 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
20821 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
20822 gen_vec_extract_hi.
20823 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
20824 gen_vec_interleave_low. Rename local variable.
20826 2023-07-19 Jan Beulich <jbeulich@suse.com>
20828 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
20829 alternative. Move AVX512VL part of condition to new "enabled"
20832 2023-07-19 liuhongt <hongtao.liu@intel.com>
20835 * config/i386/i386-builtins.cc
20836 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
20837 (ix86_register_bf16_builtin_type): Ditto.
20838 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
20839 isn't available, undef the macros which are used to check the
20840 backend support of the _Float16/__bf16 types when building
20841 libstdc++ and libgcc.
20842 * config/i386/i386.cc (construct_container): Issue errors for
20843 HFmode/BFmode when TARGET_SSE2 is not available.
20844 (function_value_32): Ditto.
20845 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
20846 (ix86_libgcc_floating_mode_supported_p): Ditto.
20847 (ix86_emit_support_tinfos): Adjust codes.
20848 (ix86_invalid_conversion): Return diagnostic message string
20849 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
20850 (ix86_invalid_unary_op): New function.
20851 (ix86_invalid_binary_op): Ditto.
20852 (TARGET_INVALID_UNARY_OP): Define.
20853 (TARGET_INVALID_BINARY_OP): Define.
20854 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
20855 related instrinsics header files.
20856 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
20858 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
20860 * dwarf2asm.cc: Change FALSE to false.
20861 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
20862 * dwarf2out.cc (matches_main_base): Change return type from
20863 int to bool. Change "last_match" variable to bool.
20864 (dump_struct_debug): Change return type from int to bool.
20865 Change "matches" and "result" function arguments to bool.
20866 (is_pseudo_reg): Change return type from int to bool.
20867 (is_tagged_type): Ditto.
20868 (same_loc_p): Ditto.
20869 (same_dw_val_p): Change return type from int to bool and adjust
20870 function body accordingly.
20871 (same_attr_p): Ditto.
20872 (same_die_p): Ditto.
20873 (is_type_die): Ditto.
20874 (is_declaration_die): Ditto.
20875 (should_move_die_to_comdat): Ditto.
20876 (is_base_type): Ditto.
20877 (is_based_loc): Ditto.
20878 (local_scope_p): Ditto.
20879 (class_scope_p): Ditto.
20880 (class_or_namespace_scope_p): Ditto.
20881 (is_tagged_type): Ditto.
20882 (is_rust): Use void argument.
20883 (is_nested_in_subprogram): Change return type from int to bool.
20884 (contains_subprogram_definition): Ditto.
20885 (gen_struct_or_union_type_die): Change "nested", "complete"
20886 and "ns_decl" variables to bool.
20887 (is_naming_typedef_decl): Change FALSE to false.
20889 2023-07-18 Jan Hubicka <jh@suse.cz>
20891 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
20892 for queries not in headers.
20893 (static_loop_exit): Add basic blck parameter; update use of
20895 (should_duplicate_loop_header_p): Add ranger and static_exits
20896 parameter. Do not account statements that will be optimized
20897 out after duplicaiton in overall size. Add ranger query to
20899 (update_profile_after_ch): Take static_exits has set instead of
20900 single eliminated_edge.
20901 (ch_base::copy_headers): Do all analysis in the first pass;
20902 remember invariant_exits and static_exits.
20904 2023-07-18 Jason Merrill <jason@redhat.com>
20906 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
20908 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
20910 * doc/gm2.texi (Semantic checking): Change example testwithptr
20913 2023-07-18 Richard Biener <rguenther@suse.de>
20915 PR middle-end/105715
20916 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
20917 (pass_gimple_isel::execute): ... this. Duplicate
20918 comparison defs of COND_EXPRs.
20920 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20922 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
20923 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
20924 (riscv_convert_vector_bits): Ditto.
20926 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20928 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
20929 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
20931 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
20933 * config/s390/vx-builtins.md: New vsel pattern.
20935 2023-07-18 liuhongt <hongtao.liu@intel.com>
20938 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
20939 Remove # from assemble output.
20941 2023-07-18 liuhongt <hongtao.liu@intel.com>
20944 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
20945 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
20946 3 define_peephole2 after the pattern.
20948 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20950 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
20952 2023-07-18 Pan Li <pan2.li@intel.com>
20953 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20955 * config/riscv/riscv.cc (struct machine_function): Add new field.
20956 (riscv_static_frm_mode_p): New function.
20957 (riscv_emit_frm_mode_set): New function for emit FRM.
20958 (riscv_emit_mode_set): Extract function for FRM.
20959 (riscv_mode_needed): Fix the TODO.
20960 (riscv_mode_entry): Initial dynamic frm RTL.
20961 (riscv_mode_exit): Return DYN_EXIT.
20962 * config/riscv/riscv.md: Add rdfrm.
20963 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
20964 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
20966 (fsrmsi_backup): New pattern for swap.
20967 (fsrmsi_restore): New pattern for restore.
20968 (fsrmsi_restore_exit): New pattern for restore exit.
20969 (frrmsi): New pattern for backup.
20971 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
20973 * doc/extend.texi: Add @cindex on __auto_type.
20975 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
20977 * combine-stack-adj.cc (stack_memref_p): Change return type from
20978 int to bool and adjust function body accordingly.
20979 (rest_of_handle_stack_adjustments): Change return type to void.
20981 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
20983 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
20984 (cant_combine_insn_p): Change return type from int to bool and adjust
20985 function body accordingly.
20986 (can_combine_p): Ditto.
20987 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
20988 function arguments from int to bool.
20989 (contains_muldiv): Change return type from int to bool and adjust
20990 function body accordingly.
20991 (try_combine): Ditto. Change "new_direct_jump" pointer function
20992 argument from int to bool. Change "substed_i2", "substed_i1",
20993 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
20994 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
20995 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
20996 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
20997 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
20998 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
21000 (subst): Change "in_dest", "in_cond" and "unique_copy" function
21001 arguments from int to bool.
21002 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
21003 arguments from int to bool.
21004 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
21005 function argument from int to bool.
21006 (force_int_to_mode): Change "just_select" function argument
21007 from int to bool. Change "next_select" variable to bool.
21008 (rtx_equal_for_field_assignment_p): Change return type from
21009 int to bool and adjust function body accordingly.
21010 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
21011 argument from int to bool.
21012 (get_last_value_validate): Change return type from int to bool
21013 and adjust function body accordingly.
21014 (reg_dead_at_p): Ditto.
21015 (reg_bitfield_target_p): Ditto.
21016 (combine_instructions): Ditto. Change "new_direct_jump"
21018 (can_combine_p): Change return type from int to bool
21019 and adjust function body accordingly.
21020 (likely_spilled_retval_p): Ditto.
21021 (can_change_dest_mode): Change "added_sets" function argument
21023 (find_split_point): Change "unsignedp" variable to bool.
21024 (simplify_if_then_else): Change "comparison_p" and "swapped"
21026 (simplify_set): Change "other_changed" variable to bool.
21027 (expand_compound_operation): Change "unsignedp" variable to bool.
21028 (force_to_mode): Change "just_select" function argument
21029 from int to bool. Change "next_select" variable to bool.
21030 (extended_count): Change "unsignedp" function argument to bool.
21031 (simplify_shift_const_1): Change "complement_p" variable to bool.
21032 (simplify_comparison): Change "changed" variable to bool.
21033 (rest_of_handle_combine): Change return type to void.
21035 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
21038 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
21040 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
21042 * ira.cc (setup_reg_class_relations): Continue
21043 if regclass cl3 is hard_reg_set_empty_p.
21045 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21047 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
21049 2023-07-17 Martin Jambor <mjambor@suse.cz>
21051 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
21054 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
21056 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
21058 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
21061 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
21062 recur add all implied extensions.
21063 (riscv_subset_list::check_implied_ext): Add new method.
21064 (riscv_subset_list::parse): Call checker check_implied_ext.
21065 * config/riscv/riscv-subset.h: Add new method.
21067 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21069 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
21070 (reduc_smax_scal_<mode>): Ditto.
21071 (reduc_umax_scal_<mode>): Ditto.
21072 (reduc_smin_scal_<mode>): Ditto.
21073 (reduc_umin_scal_<mode>): Ditto.
21074 (reduc_and_scal_<mode>): Ditto.
21075 (reduc_ior_scal_<mode>): Ditto.
21076 (reduc_xor_scal_<mode>): Ditto.
21077 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
21078 (expand_reduction): New function.
21079 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
21080 (emit_vlmax_fp_reduction_insn): Ditto.
21081 (get_m1_mode): Ditto.
21082 (expand_cond_len_binop): Fix name.
21083 (expand_reduction): New function
21084 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
21085 (validate_change_or_fail): New function.
21086 (change_insn): Fix VSETVL BUG.
21087 (change_vsetvl_insn): Ditto.
21088 (pass_vsetvl::backward_demand_fusion): Ditto.
21089 (pass_vsetvl::df_post_optimization): Ditto.
21091 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
21093 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
21095 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
21097 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
21098 Remove parameter name from declaration of unused parameter.
21100 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
21102 PR tree-optimization/110652
21103 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
21106 2023-07-17 Richard Biener <rguenther@suse.de>
21108 PR tree-optimization/110669
21109 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
21110 Check we matched a header PHI.
21112 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
21114 * tree-ssanames.cc (set_bitmask): New.
21115 * tree-ssanames.h (set_bitmask): New.
21117 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
21119 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
21121 * value-range.h (irange_bitmask::union_): Normalize beforehand.
21122 (irange_bitmask::intersect): Same.
21124 2023-07-17 Andrew Pinski <apinski@marvell.com>
21126 PR tree-optimization/95923
21127 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
21129 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
21131 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
21132 to the std::sort comparison lambda function const.
21134 2023-07-17 Andrew Pinski <apinski@marvell.com>
21136 PR tree-optimization/110666
21137 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
21139 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
21141 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
21142 Arrow Lake and Arrow Lake S.
21143 * common/config/i386/i386-common.cc:
21144 (processor_name): Add arrowlake.
21145 (processor_alias_table): Add arrow lake, arrow lake s and lunar
21147 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
21148 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
21149 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
21150 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
21152 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
21154 * config/i386/i386-options.cc (m_ARROWLAKE): New.
21155 (processor_cost_table): Add arrowlake.
21156 * config/i386/i386.h (enum processor_type):
21157 Add PROCESSOR_ARROWLAKE.
21158 * config/i386/x86-tune.def: Add m_ARROWLAKE.
21159 * doc/extend.texi: Add arrowlake and arrowlake-s.
21160 * doc/invoke.texi: Ditto.
21162 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
21164 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
21165 have the same iterator. Also renaming all the occurence to
21167 (usdot_prod<mode>): New define_expand.
21168 (udot_prod<mode>): Ditto.
21170 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
21172 * common/config/i386/cpuinfo.h (get_available_features):
21174 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
21175 OPTION_MASK_ISA2_SM4_UNSET): New.
21176 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
21177 (ix86_handle_option): Handle -msm4.
21178 * common/config/i386/i386-cpuinfo.h (enum processor_features):
21180 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
21182 * config.gcc: Add sm4intrin.h.
21183 * config/i386/cpuid.h (bit_SM4): New.
21184 * config/i386/i386-builtin.def (BDESC): Add new builtins.
21185 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
21187 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
21188 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
21189 (ix86_valid_target_attribute_inner_p): Handle sm4.
21190 * config/i386/i386.opt: Add option -msm4.
21191 * config/i386/immintrin.h: Include sm4intrin.h
21192 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
21193 (vsm4rnds4_<mode>): Ditto.
21194 * doc/extend.texi: Document sm4.
21195 * doc/invoke.texi: Document -msm4.
21196 * doc/sourcebuild.texi: Document target sm4.
21197 * config/i386/sm4intrin.h: New file.
21199 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
21201 * common/config/i386/cpuinfo.h (get_available_features):
21203 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
21204 OPTION_MASK_ISA2_SHA512_UNSET): New.
21205 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
21206 (ix86_handle_option): Handle -msha512.
21207 * common/config/i386/i386-cpuinfo.h (enum processor_features):
21208 Add FEATURE_SHA512.
21209 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
21211 * config.gcc: Add sha512intrin.h.
21212 * config/i386/cpuid.h (bit_SHA512): New.
21213 * config/i386/i386-builtin-types.def:
21214 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
21215 * config/i386/i386-builtin.def (BDESC): Add new builtins.
21216 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
21218 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
21219 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
21220 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
21221 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
21222 (ix86_valid_target_attribute_inner_p): Handle sha512.
21223 * config/i386/i386.opt: Add option -msha512.
21224 * config/i386/immintrin.h: Include sha512intrin.h.
21225 * config/i386/sse.md (vsha512msg1): New define insn.
21226 (vsha512msg2): Ditto.
21227 (vsha512rnds2): Ditto.
21228 * doc/extend.texi: Document sha512.
21229 * doc/invoke.texi: Document -msha512.
21230 * doc/sourcebuild.texi: Document target sha512.
21231 * config/i386/sha512intrin.h: New file.
21233 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
21235 * common/config/i386/cpuinfo.h (get_available_features):
21237 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
21238 OPTION_MASK_ISA2_SM3_UNSET): New.
21239 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
21240 (ix86_handle_option): Handle -msm3.
21241 * common/config/i386/i386-cpuinfo.h (enum processor_features):
21243 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
21245 * config.gcc: Add sm3intrin.h
21246 * config/i386/cpuid.h (bit_SM3): New.
21247 * config/i386/i386-builtin-types.def:
21248 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
21249 * config/i386/i386-builtin.def (BDESC): Add new builtins.
21250 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
21252 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
21253 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
21254 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
21255 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
21256 (ix86_valid_target_attribute_inner_p): Handle sm3.
21257 * config/i386/i386.opt: Add option -msm3.
21258 * config/i386/immintrin.h: Include sm3intrin.h.
21259 * config/i386/sse.md (vsm3msg1): New define insn.
21261 (vsm3rnds2): Ditto.
21262 * doc/extend.texi: Document sm3.
21263 * doc/invoke.texi: Document -msm3.
21264 * doc/sourcebuild.texi: Document target sm3.
21265 * config/i386/sm3intrin.h: New file.
21267 2023-07-17 Kong Lingling <lingling.kong@intel.com>
21268 Haochen Jiang <haochen.jiang@intel.com>
21270 * common/config/i386/cpuinfo.h (get_available_features): Detect
21272 * common/config/i386/i386-common.cc
21273 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
21274 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
21275 (ix86_handle_option): Handle -mavxvnniint16.
21276 * common/config/i386/i386-cpuinfo.h (enum processor_features):
21277 Add FEATURE_AVXVNNIINT16.
21278 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
21280 * config.gcc: Add avxvnniint16.h.
21281 * config/i386/avxvnniint16intrin.h: New file.
21282 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
21283 * config/i386/i386-builtin.def: Add new builtins.
21284 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
21286 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
21287 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
21288 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
21289 * config/i386/i386.opt: Add option -mavxvnniint16.
21290 * config/i386/immintrin.h: Include avxvnniint16.h.
21291 * config/i386/sse.md
21292 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
21293 * doc/extend.texi: Document avxvnniint16.
21294 * doc/invoke.texi: Document -mavxvnniint16.
21295 * doc/sourcebuild.texi: Document target avxvnniint16.
21297 2023-07-16 Jan Hubicka <jh@suse.cz>
21299 PR middle-end/110649
21300 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
21301 (vect_transform_loop): Move scale_profile_for_vect_loop after
21302 upper bound updates.
21304 2023-07-16 Jan Hubicka <jh@suse.cz>
21306 PR tree-optimization/110649
21307 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
21308 probability of the if-then-else construct.
21310 2023-07-16 Jan Hubicka <jh@suse.cz>
21312 PR middle-end/110649
21313 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
21315 2023-07-15 Andrew Pinski <apinski@marvell.com>
21317 * doc/contrib.texi: Update my entry.
21319 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
21321 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
21323 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
21324 (tld_load): Likewise.
21325 (tgd_load_pic): Change to expander.
21326 (tld_load_pic, tld_offset_load, tp_load): Likewise.
21327 (tie_load_pic, tle_load): Likewise.
21328 (tgd_load_picsi, tgd_load_picdi): New.
21329 (tld_load_picsi, tld_load_picdi): New.
21330 (tld_offset_load<P:mode>): New.
21331 (tp_load<P:mode>): New.
21332 (tie_load_picsi, tie_load_picdi): New.
21333 (tle_load<P:mode>): New.
21335 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
21337 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
21338 (vcmlaq_rot180, vcmlaq_rot270): New.
21339 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
21340 (vcmlaq_rot180, vcmlaq_rot270): New.
21341 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
21342 (vcmlaq_rot180, vcmlaq_rot270): New.
21343 * config/arm/arm-mve-builtins.cc
21344 (function_instance::has_inactive_argument): Handle vcmlaq,
21345 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
21346 * config/arm/arm_mve.h (vcmlaq): Delete.
21347 (vcmlaq_rot180): Delete.
21348 (vcmlaq_rot270): Delete.
21349 (vcmlaq_rot90): Delete.
21350 (vcmlaq_m): Delete.
21351 (vcmlaq_rot180_m): Delete.
21352 (vcmlaq_rot270_m): Delete.
21353 (vcmlaq_rot90_m): Delete.
21354 (vcmlaq_f16): Delete.
21355 (vcmlaq_rot180_f16): Delete.
21356 (vcmlaq_rot270_f16): Delete.
21357 (vcmlaq_rot90_f16): Delete.
21358 (vcmlaq_f32): Delete.
21359 (vcmlaq_rot180_f32): Delete.
21360 (vcmlaq_rot270_f32): Delete.
21361 (vcmlaq_rot90_f32): Delete.
21362 (vcmlaq_m_f32): Delete.
21363 (vcmlaq_m_f16): Delete.
21364 (vcmlaq_rot180_m_f32): Delete.
21365 (vcmlaq_rot180_m_f16): Delete.
21366 (vcmlaq_rot270_m_f32): Delete.
21367 (vcmlaq_rot270_m_f16): Delete.
21368 (vcmlaq_rot90_m_f32): Delete.
21369 (vcmlaq_rot90_m_f16): Delete.
21370 (__arm_vcmlaq_f16): Delete.
21371 (__arm_vcmlaq_rot180_f16): Delete.
21372 (__arm_vcmlaq_rot270_f16): Delete.
21373 (__arm_vcmlaq_rot90_f16): Delete.
21374 (__arm_vcmlaq_f32): Delete.
21375 (__arm_vcmlaq_rot180_f32): Delete.
21376 (__arm_vcmlaq_rot270_f32): Delete.
21377 (__arm_vcmlaq_rot90_f32): Delete.
21378 (__arm_vcmlaq_m_f32): Delete.
21379 (__arm_vcmlaq_m_f16): Delete.
21380 (__arm_vcmlaq_rot180_m_f32): Delete.
21381 (__arm_vcmlaq_rot180_m_f16): Delete.
21382 (__arm_vcmlaq_rot270_m_f32): Delete.
21383 (__arm_vcmlaq_rot270_m_f16): Delete.
21384 (__arm_vcmlaq_rot90_m_f32): Delete.
21385 (__arm_vcmlaq_rot90_m_f16): Delete.
21386 (__arm_vcmlaq): Delete.
21387 (__arm_vcmlaq_rot180): Delete.
21388 (__arm_vcmlaq_rot270): Delete.
21389 (__arm_vcmlaq_rot90): Delete.
21390 (__arm_vcmlaq_m): Delete.
21391 (__arm_vcmlaq_rot180_m): Delete.
21392 (__arm_vcmlaq_rot270_m): Delete.
21393 (__arm_vcmlaq_rot90_m): Delete.
21395 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
21397 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
21398 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
21399 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
21400 (mve_insn): Add vcmla.
21401 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
21403 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
21405 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
21406 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
21407 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
21408 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
21410 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
21412 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
21414 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
21415 (vcmulq_rot180, vcmulq_rot270): New.
21416 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
21417 (vcmulq_rot180, vcmulq_rot270): New.
21418 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
21419 (vcmulq_rot180, vcmulq_rot270): New.
21420 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
21421 (vcmulq_rot270): Delete.
21422 (vcmulq_rot180): Delete.
21424 (vcmulq_m): Delete.
21425 (vcmulq_rot180_m): Delete.
21426 (vcmulq_rot270_m): Delete.
21427 (vcmulq_rot90_m): Delete.
21428 (vcmulq_x): Delete.
21429 (vcmulq_rot90_x): Delete.
21430 (vcmulq_rot180_x): Delete.
21431 (vcmulq_rot270_x): Delete.
21432 (vcmulq_rot90_f16): Delete.
21433 (vcmulq_rot270_f16): Delete.
21434 (vcmulq_rot180_f16): Delete.
21435 (vcmulq_f16): Delete.
21436 (vcmulq_rot90_f32): Delete.
21437 (vcmulq_rot270_f32): Delete.
21438 (vcmulq_rot180_f32): Delete.
21439 (vcmulq_f32): Delete.
21440 (vcmulq_m_f32): Delete.
21441 (vcmulq_m_f16): Delete.
21442 (vcmulq_rot180_m_f32): Delete.
21443 (vcmulq_rot180_m_f16): Delete.
21444 (vcmulq_rot270_m_f32): Delete.
21445 (vcmulq_rot270_m_f16): Delete.
21446 (vcmulq_rot90_m_f32): Delete.
21447 (vcmulq_rot90_m_f16): Delete.
21448 (vcmulq_x_f16): Delete.
21449 (vcmulq_x_f32): Delete.
21450 (vcmulq_rot90_x_f16): Delete.
21451 (vcmulq_rot90_x_f32): Delete.
21452 (vcmulq_rot180_x_f16): Delete.
21453 (vcmulq_rot180_x_f32): Delete.
21454 (vcmulq_rot270_x_f16): Delete.
21455 (vcmulq_rot270_x_f32): Delete.
21456 (__arm_vcmulq_rot90_f16): Delete.
21457 (__arm_vcmulq_rot270_f16): Delete.
21458 (__arm_vcmulq_rot180_f16): Delete.
21459 (__arm_vcmulq_f16): Delete.
21460 (__arm_vcmulq_rot90_f32): Delete.
21461 (__arm_vcmulq_rot270_f32): Delete.
21462 (__arm_vcmulq_rot180_f32): Delete.
21463 (__arm_vcmulq_f32): Delete.
21464 (__arm_vcmulq_m_f32): Delete.
21465 (__arm_vcmulq_m_f16): Delete.
21466 (__arm_vcmulq_rot180_m_f32): Delete.
21467 (__arm_vcmulq_rot180_m_f16): Delete.
21468 (__arm_vcmulq_rot270_m_f32): Delete.
21469 (__arm_vcmulq_rot270_m_f16): Delete.
21470 (__arm_vcmulq_rot90_m_f32): Delete.
21471 (__arm_vcmulq_rot90_m_f16): Delete.
21472 (__arm_vcmulq_x_f16): Delete.
21473 (__arm_vcmulq_x_f32): Delete.
21474 (__arm_vcmulq_rot90_x_f16): Delete.
21475 (__arm_vcmulq_rot90_x_f32): Delete.
21476 (__arm_vcmulq_rot180_x_f16): Delete.
21477 (__arm_vcmulq_rot180_x_f32): Delete.
21478 (__arm_vcmulq_rot270_x_f16): Delete.
21479 (__arm_vcmulq_rot270_x_f32): Delete.
21480 (__arm_vcmulq_rot90): Delete.
21481 (__arm_vcmulq_rot270): Delete.
21482 (__arm_vcmulq_rot180): Delete.
21483 (__arm_vcmulq): Delete.
21484 (__arm_vcmulq_m): Delete.
21485 (__arm_vcmulq_rot180_m): Delete.
21486 (__arm_vcmulq_rot270_m): Delete.
21487 (__arm_vcmulq_rot90_m): Delete.
21488 (__arm_vcmulq_x): Delete.
21489 (__arm_vcmulq_rot90_x): Delete.
21490 (__arm_vcmulq_rot180_x): Delete.
21491 (__arm_vcmulq_rot270_x): Delete.
21493 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
21495 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
21496 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
21497 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
21498 (MVE_VCADDQ_VCMULQ_M): New.
21499 (mve_insn): Add vcmul.
21500 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
21503 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
21505 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
21506 @mve_<mve_insn>q<mve_rot>_f<mode>.
21507 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
21508 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
21509 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
21511 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
21513 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
21514 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
21515 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
21516 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
21517 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
21518 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
21519 * config/arm/arm-mve-builtins-functions.h (class
21520 unspec_mve_function_exact_insn_rot): New.
21521 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
21522 (vcaddq_rot270): Delete.
21523 (vhcaddq_rot90): Delete.
21524 (vhcaddq_rot270): Delete.
21525 (vcaddq_rot270_m): Delete.
21526 (vcaddq_rot90_m): Delete.
21527 (vhcaddq_rot270_m): Delete.
21528 (vhcaddq_rot90_m): Delete.
21529 (vcaddq_rot90_x): Delete.
21530 (vcaddq_rot270_x): Delete.
21531 (vhcaddq_rot90_x): Delete.
21532 (vhcaddq_rot270_x): Delete.
21533 (vcaddq_rot90_u8): Delete.
21534 (vcaddq_rot270_u8): Delete.
21535 (vhcaddq_rot90_s8): Delete.
21536 (vhcaddq_rot270_s8): Delete.
21537 (vcaddq_rot90_s8): Delete.
21538 (vcaddq_rot270_s8): Delete.
21539 (vcaddq_rot90_u16): Delete.
21540 (vcaddq_rot270_u16): Delete.
21541 (vhcaddq_rot90_s16): Delete.
21542 (vhcaddq_rot270_s16): Delete.
21543 (vcaddq_rot90_s16): Delete.
21544 (vcaddq_rot270_s16): Delete.
21545 (vcaddq_rot90_u32): Delete.
21546 (vcaddq_rot270_u32): Delete.
21547 (vhcaddq_rot90_s32): Delete.
21548 (vhcaddq_rot270_s32): Delete.
21549 (vcaddq_rot90_s32): Delete.
21550 (vcaddq_rot270_s32): Delete.
21551 (vcaddq_rot90_f16): Delete.
21552 (vcaddq_rot270_f16): Delete.
21553 (vcaddq_rot90_f32): Delete.
21554 (vcaddq_rot270_f32): Delete.
21555 (vcaddq_rot270_m_s8): Delete.
21556 (vcaddq_rot270_m_s32): Delete.
21557 (vcaddq_rot270_m_s16): Delete.
21558 (vcaddq_rot270_m_u8): Delete.
21559 (vcaddq_rot270_m_u32): Delete.
21560 (vcaddq_rot270_m_u16): Delete.
21561 (vcaddq_rot90_m_s8): Delete.
21562 (vcaddq_rot90_m_s32): Delete.
21563 (vcaddq_rot90_m_s16): Delete.
21564 (vcaddq_rot90_m_u8): Delete.
21565 (vcaddq_rot90_m_u32): Delete.
21566 (vcaddq_rot90_m_u16): Delete.
21567 (vhcaddq_rot270_m_s8): Delete.
21568 (vhcaddq_rot270_m_s32): Delete.
21569 (vhcaddq_rot270_m_s16): Delete.
21570 (vhcaddq_rot90_m_s8): Delete.
21571 (vhcaddq_rot90_m_s32): Delete.
21572 (vhcaddq_rot90_m_s16): Delete.
21573 (vcaddq_rot270_m_f32): Delete.
21574 (vcaddq_rot270_m_f16): Delete.
21575 (vcaddq_rot90_m_f32): Delete.
21576 (vcaddq_rot90_m_f16): Delete.
21577 (vcaddq_rot90_x_s8): Delete.
21578 (vcaddq_rot90_x_s16): Delete.
21579 (vcaddq_rot90_x_s32): Delete.
21580 (vcaddq_rot90_x_u8): Delete.
21581 (vcaddq_rot90_x_u16): Delete.
21582 (vcaddq_rot90_x_u32): Delete.
21583 (vcaddq_rot270_x_s8): Delete.
21584 (vcaddq_rot270_x_s16): Delete.
21585 (vcaddq_rot270_x_s32): Delete.
21586 (vcaddq_rot270_x_u8): Delete.
21587 (vcaddq_rot270_x_u16): Delete.
21588 (vcaddq_rot270_x_u32): Delete.
21589 (vhcaddq_rot90_x_s8): Delete.
21590 (vhcaddq_rot90_x_s16): Delete.
21591 (vhcaddq_rot90_x_s32): Delete.
21592 (vhcaddq_rot270_x_s8): Delete.
21593 (vhcaddq_rot270_x_s16): Delete.
21594 (vhcaddq_rot270_x_s32): Delete.
21595 (vcaddq_rot90_x_f16): Delete.
21596 (vcaddq_rot90_x_f32): Delete.
21597 (vcaddq_rot270_x_f16): Delete.
21598 (vcaddq_rot270_x_f32): Delete.
21599 (__arm_vcaddq_rot90_u8): Delete.
21600 (__arm_vcaddq_rot270_u8): Delete.
21601 (__arm_vhcaddq_rot90_s8): Delete.
21602 (__arm_vhcaddq_rot270_s8): Delete.
21603 (__arm_vcaddq_rot90_s8): Delete.
21604 (__arm_vcaddq_rot270_s8): Delete.
21605 (__arm_vcaddq_rot90_u16): Delete.
21606 (__arm_vcaddq_rot270_u16): Delete.
21607 (__arm_vhcaddq_rot90_s16): Delete.
21608 (__arm_vhcaddq_rot270_s16): Delete.
21609 (__arm_vcaddq_rot90_s16): Delete.
21610 (__arm_vcaddq_rot270_s16): Delete.
21611 (__arm_vcaddq_rot90_u32): Delete.
21612 (__arm_vcaddq_rot270_u32): Delete.
21613 (__arm_vhcaddq_rot90_s32): Delete.
21614 (__arm_vhcaddq_rot270_s32): Delete.
21615 (__arm_vcaddq_rot90_s32): Delete.
21616 (__arm_vcaddq_rot270_s32): Delete.
21617 (__arm_vcaddq_rot270_m_s8): Delete.
21618 (__arm_vcaddq_rot270_m_s32): Delete.
21619 (__arm_vcaddq_rot270_m_s16): Delete.
21620 (__arm_vcaddq_rot270_m_u8): Delete.
21621 (__arm_vcaddq_rot270_m_u32): Delete.
21622 (__arm_vcaddq_rot270_m_u16): Delete.
21623 (__arm_vcaddq_rot90_m_s8): Delete.
21624 (__arm_vcaddq_rot90_m_s32): Delete.
21625 (__arm_vcaddq_rot90_m_s16): Delete.
21626 (__arm_vcaddq_rot90_m_u8): Delete.
21627 (__arm_vcaddq_rot90_m_u32): Delete.
21628 (__arm_vcaddq_rot90_m_u16): Delete.
21629 (__arm_vhcaddq_rot270_m_s8): Delete.
21630 (__arm_vhcaddq_rot270_m_s32): Delete.
21631 (__arm_vhcaddq_rot270_m_s16): Delete.
21632 (__arm_vhcaddq_rot90_m_s8): Delete.
21633 (__arm_vhcaddq_rot90_m_s32): Delete.
21634 (__arm_vhcaddq_rot90_m_s16): Delete.
21635 (__arm_vcaddq_rot90_x_s8): Delete.
21636 (__arm_vcaddq_rot90_x_s16): Delete.
21637 (__arm_vcaddq_rot90_x_s32): Delete.
21638 (__arm_vcaddq_rot90_x_u8): Delete.
21639 (__arm_vcaddq_rot90_x_u16): Delete.
21640 (__arm_vcaddq_rot90_x_u32): Delete.
21641 (__arm_vcaddq_rot270_x_s8): Delete.
21642 (__arm_vcaddq_rot270_x_s16): Delete.
21643 (__arm_vcaddq_rot270_x_s32): Delete.
21644 (__arm_vcaddq_rot270_x_u8): Delete.
21645 (__arm_vcaddq_rot270_x_u16): Delete.
21646 (__arm_vcaddq_rot270_x_u32): Delete.
21647 (__arm_vhcaddq_rot90_x_s8): Delete.
21648 (__arm_vhcaddq_rot90_x_s16): Delete.
21649 (__arm_vhcaddq_rot90_x_s32): Delete.
21650 (__arm_vhcaddq_rot270_x_s8): Delete.
21651 (__arm_vhcaddq_rot270_x_s16): Delete.
21652 (__arm_vhcaddq_rot270_x_s32): Delete.
21653 (__arm_vcaddq_rot90_f16): Delete.
21654 (__arm_vcaddq_rot270_f16): Delete.
21655 (__arm_vcaddq_rot90_f32): Delete.
21656 (__arm_vcaddq_rot270_f32): Delete.
21657 (__arm_vcaddq_rot270_m_f32): Delete.
21658 (__arm_vcaddq_rot270_m_f16): Delete.
21659 (__arm_vcaddq_rot90_m_f32): Delete.
21660 (__arm_vcaddq_rot90_m_f16): Delete.
21661 (__arm_vcaddq_rot90_x_f16): Delete.
21662 (__arm_vcaddq_rot90_x_f32): Delete.
21663 (__arm_vcaddq_rot270_x_f16): Delete.
21664 (__arm_vcaddq_rot270_x_f32): Delete.
21665 (__arm_vcaddq_rot90): Delete.
21666 (__arm_vcaddq_rot270): Delete.
21667 (__arm_vhcaddq_rot90): Delete.
21668 (__arm_vhcaddq_rot270): Delete.
21669 (__arm_vcaddq_rot270_m): Delete.
21670 (__arm_vcaddq_rot90_m): Delete.
21671 (__arm_vhcaddq_rot270_m): Delete.
21672 (__arm_vhcaddq_rot90_m): Delete.
21673 (__arm_vcaddq_rot90_x): Delete.
21674 (__arm_vcaddq_rot270_x): Delete.
21675 (__arm_vhcaddq_rot90_x): Delete.
21676 (__arm_vhcaddq_rot270_x): Delete.
21678 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
21680 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
21681 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
21682 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
21683 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
21684 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
21685 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
21687 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
21688 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
21689 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
21690 VHCADDQ_ROT270_M_S.
21691 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
21692 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
21693 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
21694 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
21695 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
21696 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
21698 (VCADDQ_ROT270_M): Delete.
21699 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
21700 (VCADDQ_ROT90_M): Delete.
21701 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
21702 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
21704 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
21705 (mve_vcaddq<mve_rot><mode>): Rename into ...
21706 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
21707 (mve_vcaddq_rot270_m_<supf><mode>)
21708 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
21709 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
21710 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
21711 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
21713 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
21715 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
21718 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
21719 preparation statement over braces for a single statement.
21720 (*bt<mode>_setncqi): Likewise.
21721 (*bt<mode>_setncqi_2): New define_insn_and_split.
21723 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
21725 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
21726 case inserting of 64-bit values into a TImode register, to handle
21727 both DImode and DFmode using either *insvti_lowpart_1
21728 or *isnvti_highpart_1.
21730 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
21733 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
21734 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
21735 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
21736 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
21737 when the original source contains a paradoxical subreg.
21739 2023-07-14 Jan Hubicka <jh@suse.cz>
21741 * passes.cc (execute_function_todo): Remove
21742 TODO_rebuild_frequencies
21743 * passes.def: Add rebuild_frequencies pass.
21744 * predict.cc (estimate_bb_frequencies): Drop
21746 (tree_estimate_probability): Update call of
21747 estimate_bb_frequencies.
21748 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
21749 first and do not rebuild if not necessary.
21750 (class pass_rebuild_frequencies): New.
21751 (make_pass_rebuild_frequencies): New.
21752 * profile-count.h: Add profile_count::very_large_p.
21753 * tree-inline.cc (optimize_inline_calls): Do not return
21754 TODO_rebuild_frequencies
21755 * tree-pass.h (TODO_rebuild_frequencies): Remove.
21756 (make_pass_rebuild_frequencies): Declare.
21758 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21760 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
21761 * config/riscv/riscv-protos.h (enum insn_type): New enum.
21762 (expand_cond_len_ternop): New function.
21763 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
21764 (expand_cond_len_ternop): Ditto.
21766 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
21769 * config/bpf/bpf.md: Enable instruction scheduling.
21771 2023-07-14 Tamar Christina <tamar.christina@arm.com>
21773 PR tree-optimization/109154
21774 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
21775 (struct bb_predicate): Add no_predicate_stmts.
21776 (set_bb_predicate): Increase predicate count.
21777 (set_bb_predicate_gimplified_stmts): Conditionally initialize
21778 no_predicate_stmts.
21779 (get_bb_num_predicate_stmts): New.
21780 (init_bb_predicate): Initialzie no_predicate_stmts.
21781 (release_bb_predicate): Cleanup no_predicate_stmts.
21782 (insert_gimplified_predicates): Preserve no_predicate_stmts.
21784 2023-07-14 Tamar Christina <tamar.christina@arm.com>
21786 PR tree-optimization/109154
21787 * tree-if-conv.cc (gen_simplified_condition,
21788 gen_phi_nest_statement): New.
21789 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
21791 2023-07-14 Richard Biener <rguenther@suse.de>
21793 * gimple.h (gimple_phi_arg): New const overload.
21794 (gimple_phi_arg_def): Make gimple arg const.
21795 (gimple_phi_arg_def_from_edge): New inline function.
21796 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
21798 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
21799 new inline function.
21800 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
21802 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
21804 * common/config/riscv/riscv-common.cc:
21805 (riscv_implied_info): Add zihintntl item.
21806 (riscv_ext_version_table): Ditto.
21807 (riscv_ext_flag_table): Ditto.
21808 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
21809 (TARGET_ZIHINTNTL): Ditto.
21811 2023-07-14 Die Li <lidie@eswincomputing.com>
21813 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
21815 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
21818 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
21819 used by the address of the following memory operand.
21821 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
21824 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
21825 deallocate alloca-only frame.
21827 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
21830 * config/darwin.h (DARWIN_PLATFORM_ID): New.
21831 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
21832 and SDK data to the static linker.
21834 2023-07-13 Carl Love <cel@us.ibm.com>
21836 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
21837 built-in definition return type.
21838 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
21839 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
21840 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
21841 argument to return FPSCR fields.
21842 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
21843 the return value. Add description for
21844 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
21846 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
21849 * config/alpha/alpha.cc (alpha_emit_set_long_const):
21850 Always use DImode when constructing long const.
21852 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
21854 * haifa-sched.cc: Change TRUE/FALSE to true/false.
21856 * lra-assigns.cc: Ditto.
21857 * lra-constraints.cc: Ditto.
21858 * sel-sched.cc: Ditto.
21860 2023-07-13 Andrew Pinski <apinski@marvell.com>
21862 PR tree-optimization/110293
21863 PR tree-optimization/110539
21864 * match.pd: Expand the `x != (typeof x)(x == 0)`
21865 pattern to handle where the inner and outer comparsions
21866 are either `!=` or `==` and handle other constants
21869 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
21871 PR middle-end/109520
21872 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
21873 (lra_asm_insn_error): New prototype.
21874 * lra.cc: Include rtl_error.h.
21875 (lra_set_insn_recog_data): Initialize asm_reloads_num.
21876 (lra_asm_insn_error): New func whose code is taken from ...
21877 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
21878 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
21880 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21882 * genmatch.cc (commutative_op): Add COND_LEN_*
21883 * internal-fn.cc (first_commutative_argument): Ditto.
21885 (get_unconditional_internal_fn): Ditto.
21886 (can_interpret_as_conditional_op_p): Ditto.
21887 (internal_fn_len_index): Ditto.
21888 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
21889 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
21890 (convert_mult_to_fma): Ditto.
21891 (math_opts_dom_walker::after_dom_children): Ditto.
21893 2023-07-13 Pan Li <pan2.li@intel.com>
21895 * config/riscv/riscv.cc (vxrm_rtx): New static var.
21897 (global_state_unknown_p): Removed.
21898 (riscv_entity_mode_after): Removed.
21899 (asm_insn_p): New function.
21900 (vxrm_unknown_p): New function for fixed-point.
21901 (riscv_vxrm_mode_after): Ditto.
21902 (frm_unknown_dynamic_p): New function for floating-point.
21903 (riscv_frm_mode_after): Ditto.
21904 (riscv_mode_after): Leverage new functions.
21906 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21908 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
21909 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
21910 calling vect_model_load_cost.
21912 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21914 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
21915 handle memory_access_type VMAT_CONTIGUOUS, remove some
21916 VMAT_CONTIGUOUS_PERMUTE related handlings.
21917 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
21918 without calling vect_model_load_cost.
21920 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21922 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
21923 VMAT_CONTIGUOUS_REVERSE any more.
21924 (vectorizable_load): Adjust the costing handling on
21925 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
21927 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21929 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
21930 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
21931 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
21932 assert it will never get VMAT_LOAD_STORE_LANES.
21934 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21936 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
21937 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
21938 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
21939 remove VMAT_GATHER_SCATTER related handlings and the related parameter
21942 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21944 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
21945 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
21946 vect_model_load_cost.
21947 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
21948 VMAT_STRIDED_SLP any more, and remove their related handlings.
21950 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21952 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
21953 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
21954 hoisting decision and without calling vect_model_load_cost.
21955 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
21956 and remove VMAT_INVARIANT related handlings.
21958 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21960 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
21961 on costing with one extra argument cost_vec.
21962 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
21963 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
21964 gs_info.decl set any more.
21966 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21968 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
21969 to vect_model_load_cost down to some different transform paths
21970 according to the handlings of different vect_memory_access_types.
21972 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21974 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
21976 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21978 * config/riscv/autovec.md
21979 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
21980 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
21981 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
21982 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
21983 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
21984 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
21985 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
21986 (len_mask_gather_load<mode><mode>): Ditto.
21987 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
21988 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
21989 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
21990 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
21991 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
21992 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
21993 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
21994 (len_mask_scatter_store<mode><mode>): Ditto.
21995 * config/riscv/predicates.md (const_1_operand): New predicate.
21996 (vector_gs_scale_operand_16): Ditto.
21997 (vector_gs_scale_operand_32): Ditto.
21998 (vector_gs_scale_operand_64): Ditto.
21999 (vector_gs_extension_operand): Ditto.
22000 (vector_gs_scale_operand_16_rv32): Ditto.
22001 (vector_gs_scale_operand_32_rv32): Ditto.
22002 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
22003 (expand_gather_scatter): New function.
22004 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
22005 (emit_vlmax_masked_store_insn): New function.
22006 (emit_nonvlmax_masked_store_insn): Ditto.
22007 (modulo_sel_indices): Ditto.
22008 (expand_vec_perm): Fix SLP for gather/scatter.
22009 (prepare_gather_scatter): New function.
22010 (expand_gather_scatter): Ditto.
22011 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
22012 (subreg:SI (DI CONST_POLY_INT)).
22013 * config/riscv/vector-iterators.md: Add gather/scatter.
22014 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
22015 (@vec_duplicate<mode>): Ditto.
22016 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
22018 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
22020 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22022 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
22023 * config/riscv/riscv-protos.h (enum insn_type): New enum.
22024 (expand_cond_len_binop): New function.
22025 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
22026 (emit_nonvlmax_fp_tu_insn): Ditto.
22027 (need_fp_rounding_p): Ditto.
22028 (expand_cond_len_binop): Ditto.
22029 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
22030 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
22032 2023-07-12 Jan Hubicka <jh@suse.cz>
22034 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
22035 (gimple_duplicate_seme_region): ... this; break out profile updating
22037 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
22038 (ch_base::copy_headers): Update.
22039 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
22040 (gimple_duplicate_seme_region): ... this.
22042 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
22044 PR tree-optimization/107043
22045 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
22047 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
22049 PR tree-optimization/107053
22050 * gimple-range-op.cc (cfn_popcount): Use known set bits.
22052 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
22054 * ira.cc (equiv_init_varies_p): Change return type from int to bool
22055 and adjust function body accordingly.
22056 (equiv_init_movable_p): Ditto.
22057 (memref_used_between_p): Ditto.
22058 * lra-constraints.cc (valid_address_p): Ditto.
22060 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
22062 * range-op.cc (irange_to_masked_value): Remove.
22063 (update_known_bitmask): Update irange value/mask pair instead of
22064 only updating nonzero bits.
22066 2023-07-12 Jan Hubicka <jh@suse.cz>
22068 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
22069 parameter and rewrite profile updating code to handle edges elimination.
22070 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
22071 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
22072 (loop_iv_derived_p): New function.
22073 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
22074 of PHIs and propagation of IV derived variables.
22075 (ch_base::copy_headers): Pass around the invariant edges hash set.
22077 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
22079 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
22080 (last_active_insn): Change "skip_use_p" function argument to bool.
22081 (noce_operand_ok): Change return type from int to bool.
22082 (find_cond_trap): Ditto.
22083 (block_jumps_and_fallthru_p): Change "fallthru_p" and
22084 "jump_p" variables to bool.
22085 (noce_find_if_block): Change return type from int to bool.
22086 (cond_exec_find_if_block): Ditto.
22087 (find_if_case_1): Ditto.
22088 (find_if_case_2): Ditto.
22089 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
22090 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
22091 (cond_exec_process_insns): Change return type from int to bool.
22092 Change "mod_ok" function arg to bool.
22093 (cond_exec_process_if_block): Change return type from int to bool.
22094 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
22096 (noce_emit_store_flag): Change return type from int to bool.
22097 Change "reversep" function arg to bool. Change "cond_complex"
22099 (noce_try_move): Change return type from int to bool.
22100 (noce_try_ifelse_collapse): Ditto.
22101 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
22102 (noce_try_addcc): Change return type from int to bool. Change
22103 "subtract" variable to bool.
22104 (noce_try_store_flag_constants): Change return type from int to bool.
22105 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
22106 (noce_try_cmove): Change return type from int to bool.
22107 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
22108 (noce_try_minmax): Change return type from int to bool. Change
22109 "unsignedp" variable to bool.
22110 (noce_try_abs): Change return type from int to bool. Change
22111 "negate" variable to bool.
22112 (noce_try_sign_mask): Change return type from int to bool.
22113 (noce_try_move): Ditto.
22114 (noce_try_store_flag_constants): Ditto.
22115 (noce_try_cmove): Ditto.
22116 (noce_try_cmove_arith): Ditto.
22117 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
22118 (noce_try_bitop): Change return type from int to bool.
22119 (noce_operand_ok): Ditto.
22120 (noce_convert_multiple_sets): Ditto.
22121 (noce_convert_multiple_sets_1): Ditto.
22122 (noce_process_if_block): Ditto.
22123 (check_cond_move_block): Ditto.
22124 (cond_move_process_if_block): Ditto. Change "success_p"
22126 (rest_of_handle_if_conversion): Change return type to void.
22128 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22130 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
22132 (get_conditional_len_internal_fn): New function.
22133 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
22134 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
22137 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
22140 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
22142 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
22145 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
22146 define_insn_and_split derived from *add<dwi>3_doubleword_concat
22147 and *add<dwi>3_doubleword_zext.
22149 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
22152 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
22153 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
22154 (peephole2): Simplify rega = 0; rega op= rega cases.
22156 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
22158 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
22159 testing a TImode SUBREG of a 128-bit vector register against
22160 zero, use a PTEST instruction instead of first moving it to
22161 a pair of scalar registers.
22163 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
22165 * genopinit.cc (main): Adjust maximal number of optabs and
22167 * gensupport.cc (find_optab): Shift optab by 20 and mode by
22169 * optabs-query.h (optab_handler): Ditto.
22170 (convert_optab_handler): Ditto.
22172 2023-07-12 Richard Biener <rguenther@suse.de>
22174 PR tree-optimization/110630
22175 * tree-vect-slp.cc (vect_add_slp_permutation): New
22176 offset parameter, honor that for the extract code generation.
22177 (vectorizable_slp_permutation_1): Handle offsetted identities.
22179 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22181 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
22182 (umul<mode>3_highpart): Ditto.
22184 2023-07-12 Jan Beulich <jbeulich@suse.com>
22186 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
22187 alternative. Adjust original last alternative's "prefix"
22188 attribute to maybe_evex.
22190 2023-07-12 Jan Beulich <jbeulich@suse.com>
22192 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
22193 vbroadcastss for AVX2. New AVX512F alternative.
22194 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
22195 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
22197 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22199 * config/riscv/peephole.md: Remove XThead* peephole passes.
22200 * config/riscv/thead.md: Include thead-peephole.md.
22201 * config/riscv/thead-peephole.md: New file.
22203 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22205 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
22207 (riscv_index_reg_class): Likewise.
22208 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
22209 (riscv_index_reg_class): New function.
22210 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
22211 riscv_index_reg_class().
22212 (REGNO_OK_FOR_INDEX_P): Call new function
22213 riscv_regno_ok_for_index_p().
22215 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22217 * config/riscv/riscv-protos.h (enum riscv_address_type):
22218 New location of type definition.
22219 (struct riscv_address_info): Likewise.
22220 * config/riscv/riscv.cc (enum riscv_address_type):
22221 Old location of type definition.
22222 (struct riscv_address_info): Likewise.
22224 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22226 * config/riscv/riscv.h (Xmode): New macro.
22228 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22230 * config/riscv/riscv.cc (riscv_print_operand_address): Use
22231 output_addr_const rather than riscv_print_operand.
22233 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22235 * config/riscv/thead.md: Adjust constraints of th_addsl.
22237 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22239 * config/riscv/thead.cc (th_mempair_operands_p):
22240 Fix documentation of th_mempair_order_operands().
22242 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22244 * config/riscv/thead.cc (th_mempair_save_regs):
22245 Emit REG_FRAME_RELATED_EXPR notes in prologue.
22247 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
22249 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
22250 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
22251 New XThead extension INSN.
22252 (*zero_extendsidi2_th_extu): New XThead extension INSN.
22253 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
22255 2023-07-12 liuhongt <hongtao.liu@intel.com>
22259 * config/i386/predicates.md
22260 (int_float_vector_all_ones_operand): New predicate.
22261 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
22263 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
22265 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
22267 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
22268 define_insn_and_split to avoid false dependence.
22269 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
22270 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
22271 of operands 1 to '0' to avoid false dependence.
22272 (*andnot<mode>3): Ditto.
22273 (iornot<mode>3): Ditto.
22274 (*<nlogic><mode>3): Ditto.
22276 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
22278 * common/config/i386/cpuinfo.h
22279 (get_intel_cpu): Handle Granite Rapids D.
22280 * common/config/i386/i386-common.cc:
22281 (processor_alias_table): Add graniterapids-d.
22282 * common/config/i386/i386-cpuinfo.h
22283 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
22284 * config.gcc: Add -march=graniterapids-d.
22285 * config/i386/driver-i386.cc (host_detect_local_cpu):
22286 Handle graniterapids-d.
22287 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
22288 * doc/extend.texi: Add graniterapids-d.
22289 * doc/invoke.texi: Ditto.
22291 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
22293 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
22294 Add OPTION_MASK_ISA_AVX512VL.
22295 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
22298 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22300 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
22301 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
22302 (shuffle_compress_patterns): Ditto.
22303 (expand_vec_perm_const_1): Ditto.
22305 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
22307 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
22308 * cfghooks.h (struct cfg_hooks): Change return type of
22309 verify_flow_info from integer to bool.
22310 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
22311 (can_delete_label_p): Ditto.
22312 (rtl_verify_flow_info): Change return type from int to bool
22313 and adjust function body accordingly. Change "err" variable to bool.
22314 (rtl_verify_flow_info_1): Ditto.
22315 (free_bb_for_insn): Change return type to void.
22316 (rtl_merge_blocks): Change "b_empty" variable to bool.
22317 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
22318 (verify_hot_cold_block_grouping): Change return type from int to bool.
22319 Change "err" variable to bool.
22320 (rtl_verify_edges): Ditto.
22321 (rtl_verify_bb_insns): Ditto.
22322 (rtl_verify_bb_pointers): Ditto.
22323 (rtl_verify_bb_insn_chain): Ditto.
22324 (rtl_verify_fallthru): Ditto.
22325 (rtl_verify_bb_layout): Ditto.
22326 (purge_all_dead_edges): Change "purged" variable to bool.
22327 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
22328 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
22329 (load_killed_in_block_p): Change return type from int to bool
22330 and adjust function body accordingly.
22331 (oprs_unchanged_p): Return true/false.
22332 (rest_of_handle_gcse2): Change return type to void.
22333 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
22334 int to bool. Change "err" variable to bool.
22336 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
22338 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
22340 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22342 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
22343 * internal-fn.cc (cond_len_unary_direct): Ditto.
22344 (cond_len_binary_direct): Ditto.
22345 (cond_len_ternary_direct): Ditto.
22346 (expand_cond_len_unary_optab_fn): Ditto.
22347 (expand_cond_len_binary_optab_fn): Ditto.
22348 (expand_cond_len_ternary_optab_fn): Ditto.
22349 (direct_cond_len_unary_optab_supported_p): Ditto.
22350 (direct_cond_len_binary_optab_supported_p): Ditto.
22351 (direct_cond_len_ternary_optab_supported_p): Ditto.
22352 * internal-fn.def (COND_LEN_ADD): Ditto.
22353 (COND_LEN_SUB): Ditto.
22354 (COND_LEN_MUL): Ditto.
22355 (COND_LEN_DIV): Ditto.
22356 (COND_LEN_MOD): Ditto.
22357 (COND_LEN_RDIV): Ditto.
22358 (COND_LEN_MIN): Ditto.
22359 (COND_LEN_MAX): Ditto.
22360 (COND_LEN_FMIN): Ditto.
22361 (COND_LEN_FMAX): Ditto.
22362 (COND_LEN_AND): Ditto.
22363 (COND_LEN_IOR): Ditto.
22364 (COND_LEN_XOR): Ditto.
22365 (COND_LEN_SHL): Ditto.
22366 (COND_LEN_SHR): Ditto.
22367 (COND_LEN_FMA): Ditto.
22368 (COND_LEN_FMS): Ditto.
22369 (COND_LEN_FNMA): Ditto.
22370 (COND_LEN_FNMS): Ditto.
22371 (COND_LEN_NEG): Ditto.
22372 * optabs.def (OPTAB_D): Ditto.
22374 2023-07-11 Richard Biener <rguenther@suse.de>
22376 PR tree-optimization/110614
22377 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
22378 SLP splats are not suitable for re-align ops.
22380 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
22382 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
22384 (vsx_quad_dform_memory_operand): Likewise.
22386 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
22388 * reorg.cc (stop_search_p): Change return type from int to bool
22389 and adjust function body accordingly.
22390 (resource_conflicts_p): Ditto.
22391 (insn_references_resource_p): Change return type from int to bool.
22392 (insn_sets_resource_p): Ditto.
22393 (redirect_with_delay_slots_safe_p): Ditto.
22394 (condition_dominates_p): Change return type from int to bool
22395 and adjust function body accordingly.
22396 (redirect_with_delay_list_safe_p): Ditto.
22397 (check_annul_list_true_false): Ditto. Change "annul_true_p"
22398 function argument to bool.
22399 (steal_delay_list_from_target): Change "pannul_p" function
22400 argument to bool pointer. Change "must_annul" and "used_annul"
22401 variables from int to bool.
22402 (steal_delay_list_from_fallthrough): Ditto.
22403 (own_thread_p): Change return type from int to bool and adjust
22404 function body accordingly. Change "allow_fallthrough" function
22406 (reorg_redirect_jump): Change return type from int to bool.
22407 (fill_simple_delay_slots): Change "non_jumps_p" function
22408 argument from int to bool. Change "maybe_never" varible to bool.
22409 (fill_slots_from_thread): Change "likely", "thread_if_true" and
22410 "own_thread" function arguments to bool. Change "lose" and
22411 "must_annul" variables to bool.
22412 (delete_from_delay_slot): Change "had_barrier" variable to bool.
22413 (try_merge_delay_insns): Change "annul_p" variable to bool.
22414 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
22416 (rest_of_handle_delay_slots): Change return type from int to void
22417 and adjust function body accordingly.
22419 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
22421 * doc/extend.texi (RISC-V Operand Modifiers): New.
22423 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22425 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
22426 (insert_insn_end_basic_block): Ditto.
22427 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
22428 * gcse.cc (insert_insn_end_basic_block): Export as global function.
22429 * gcse.h (insert_insn_end_basic_block): Ditto.
22431 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
22434 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
22435 (arm_builtin_decl): Hahndle MVE builtins.
22436 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
22437 (add_unique_function): Fix handling of
22438 __ARM_MVE_PRESERVE_USER_NAMESPACE.
22439 (add_overloaded_function): Likewise.
22440 * config/arm/arm-protos.h (builtin_decl): New declaration.
22442 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
22444 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
22446 2023-07-10 Xi Ruoyao <xry111@xry111.site>
22448 PR tree-optimization/110557
22449 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
22450 Ensure the output sign-extended if necessary.
22452 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
22454 * config/i386/i386.md (peephole2): Transform xchg insn with a
22455 REG_UNUSED note to a (simple) move.
22456 (*insvti_lowpart_1): New define_insn_and_split.
22457 (*insvdi_lowpart_1): Likewise.
22459 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
22461 * config/i386/i386-features.cc (compute_convert_gain): Tweak
22462 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
22463 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
22464 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
22466 2023-07-10 liuhongt <hongtao.liu@intel.com>
22469 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
22470 splitter to detect fp max pattern.
22471 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
22473 2023-07-09 Jan Hubicka <jh@suse.cz>
22475 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
22476 (dump_edge_info): Likewise.
22477 (dump_bb_info): Likewise.
22478 * profile-count.cc (profile_count::dump): Add comma between quality and
22481 2023-07-08 Jan Hubicka <jh@suse.cz>
22483 PR tree-optimization/110600
22484 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
22486 2023-07-08 Jan Hubicka <jh@suse.cz>
22488 PR middle-end/110590
22489 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
22490 inner loops and be more careful about inconsistent profiles.
22491 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
22492 exit is followed by other exit.
22494 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
22496 * cprop.cc (reg_available_p): Change return type from int to bool.
22497 (reg_not_set_p): Ditto.
22498 (try_replace_reg): Ditto. Change "success" variable to bool.
22499 (cprop_jump): Change return type from int to void
22500 and adjust function body accordingly.
22501 (constprop_register): Ditto.
22502 (cprop_insn): Ditto. Change "changed" variable to bool.
22503 (local_cprop_pass): Change return type from int to void
22504 and adjust function body accordingly.
22505 (bypass_block): Ditto. Change "change", "may_be_loop_header"
22506 and "removed_p" variables to bool.
22507 (bypass_conditional_jumps): Change return type from int to void
22508 and adjust function body accordingly. Change "changed"
22510 (one_cprop_pass): Ditto.
22512 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
22514 * gcse.cc (expr_equiv_p): Change return type from int to bool.
22515 (oprs_unchanged_p): Change return type from int to void
22516 and adjust function body accordingly.
22517 (oprs_anticipatable_p): Ditto.
22518 (oprs_available_p): Ditto.
22519 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
22520 arguments to bool. Change "found" variable to bool.
22521 (load_killed_in_block_p): Change return type from int to void and
22522 adjust function body accordingly. Change "avail_p" argument to bool.
22523 (pre_expr_reaches_here_p): Change return type from int to void
22524 and adjust function body accordingly.
22525 (pre_delete): Ditto. Change "changed" variable to bool.
22526 (pre_gcse): Change return type from int to void
22527 and adjust function body accordingly. Change "did_insert" and
22528 "changed" variables to bool.
22529 (one_pre_gcse_pass): Change return type from int to void
22530 and adjust function body accordingly. Change "changed" variable
22532 (should_hoist_expr_to_dom): Change return type from int to void
22533 and adjust function body accordingly. Change
22534 "visited_allocated_locally" variable to bool.
22535 (hoist_code): Change return type from int to void and adjust
22536 function body accordingly. Change "changed" variable to bool.
22537 (one_code_hoisting_pass): Ditto.
22538 (pre_edge_insert): Change return type from int to void and adjust
22539 function body accordingly. Change "did_insert" variable to bool.
22540 (pre_expr_reaches_here_p_work): Change return type from int to void
22541 and adjust function body accordingly.
22542 (simple_mem): Ditto.
22543 (want_to_gcse_p): Change return type from int to void
22544 and adjust function body accordingly.
22545 (can_assign_to_reg_without_clobbers_p): Update function body
22546 for bool return type.
22547 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
22548 (pre_insert_copies): Change "added_copy" variable to bool.
22550 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
22554 * doc/invoke.texi (Warning Options): Fix typos.
22556 2023-07-07 Jan Hubicka <jh@suse.cz>
22558 * profile-count.cc (profile_count::dump): Add FUN
22559 parameter; print relative frequency.
22560 (profile_count::debug): Update.
22561 * profile-count.h (profile_count::dump): Update
22564 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
22568 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
22569 TImode destinations from paradoxical SUBREGs (setting the lowpart)
22570 into explicit zero extensions. Use *insvti_highpart_1 instruction
22571 to set the highpart of a TImode destination.
22573 2023-07-07 Jan Hubicka <jh@suse.cz>
22575 * predict.cc (force_edge_cold): Use
22576 set_edge_probability_and_rescale_others; improve dumps.
22578 2023-07-07 Jan Hubicka <jh@suse.cz>
22580 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
22582 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
22585 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
22587 * config/s390/s390.cc (vec_init): Fix default case
22589 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
22591 * lra-assigns.cc (assign_by_spills): Add reload insns involving
22592 reload pseudos with non-refined class to be processed on the next
22594 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
22595 (in_class_p): Use it.
22596 (print_curr_insn_alt): New func.
22597 (process_alt_operands): Use it. Improve debug info.
22598 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
22599 pseudo class if it is not refined yet.
22601 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
22603 * value-range.cc (irange::get_bitmask_from_range): Return all the
22604 known bits for a singleton.
22605 (irange::set_range_from_bitmask): Set a range of a singleton when
22606 all bits are known.
22608 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
22610 * value-range.cc (irange::intersect): Leave normalization to
22613 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
22615 * data-streamer-in.cc (streamer_read_value_range): Adjust for
22617 * data-streamer-out.cc (streamer_write_vrange): Same.
22618 * range-op.cc (operator_cast::fold_range): Same.
22619 * value-range-pretty-print.cc
22620 (vrange_printer::print_irange_bitmasks): Same.
22621 * value-range-storage.cc (irange_storage::write_lengths_address):
22623 (irange_storage::set_irange): Same.
22624 (irange_storage::get_irange): Same.
22625 (irange_storage::size): Same.
22626 (irange_storage::dump): Same.
22627 * value-range-storage.h: Same.
22628 * value-range.cc (debug): New.
22629 (irange_bitmask::dump): New.
22630 (add_vrange): Adjust for value/mask.
22631 (irange::operator=): Same.
22632 (irange::set): Same.
22633 (irange::verify_range): Same.
22634 (irange::operator==): Same.
22635 (irange::contains_p): Same.
22636 (irange::irange_single_pair_union): Same.
22637 (irange::union_): Same.
22638 (irange::intersect): Same.
22639 (irange::invert): Same.
22640 (irange::get_nonzero_bits_from_range): Rename to...
22641 (irange::get_bitmask_from_range): ...this.
22642 (irange::set_range_from_nonzero_bits): Rename to...
22643 (irange::set_range_from_bitmask): ...this.
22644 (irange::set_nonzero_bits): Rename to...
22645 (irange::update_bitmask): ...this.
22646 (irange::get_nonzero_bits): Rename to...
22647 (irange::get_bitmask): ...this.
22648 (irange::intersect_nonzero_bits): Rename to...
22649 (irange::intersect_bitmask): ...this.
22650 (irange::union_nonzero_bits): Rename to...
22651 (irange::union_bitmask): ...this.
22652 (irange_bitmask::verify_mask): New.
22653 * value-range.h (class irange_bitmask): New.
22654 (irange_bitmask::set_unknown): New.
22655 (irange_bitmask::unknown_p): New.
22656 (irange_bitmask::irange_bitmask): New.
22657 (irange_bitmask::get_precision): New.
22658 (irange_bitmask::get_nonzero_bits): New.
22659 (irange_bitmask::set_nonzero_bits): New.
22660 (irange_bitmask::operator==): New.
22661 (irange_bitmask::union_): New.
22662 (irange_bitmask::intersect): New.
22663 (class irange): Friend vrange_printer.
22664 (irange::varying_compatible_p): Adjust for bitmask.
22665 (irange::set_varying): Same.
22666 (irange::set_nonzero): Same.
22668 2023-07-07 Jan Beulich <jbeulich@suse.com>
22670 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
22672 2023-07-07 Jan Beulich <jbeulich@suse.com>
22674 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
22675 alternative. Switch new last alternative's "isa" attribute to
22677 (vec_extract_hi_v32qi): Likewise.
22679 2023-07-07 Pan Li <pan2.li@intel.com>
22680 Robin Dapp <rdapp@ventanamicro.com>
22682 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
22684 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
22685 (riscv_mode_exit): Likewise for exit mode.
22686 (riscv_mode_needed): Likewise for needed mode.
22687 (riscv_mode_after): Likewise for after mode.
22689 2023-07-07 Pan Li <pan2.li@intel.com>
22691 * config/riscv/vector.md: Fix typo.
22693 2023-07-06 Jan Hubicka <jh@suse.cz>
22695 PR middle-end/25623
22696 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
22697 of iterations determined.
22698 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
22700 2023-07-06 Jan Hubicka <jh@suse.cz>
22702 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
22703 probability update to be safe on loops with subloops.
22704 Make bound parameter to be iteration bound.
22705 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
22706 of scale_loop_profile.
22707 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
22709 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
22711 PR tree-optimization/110449
22712 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
22713 vec_loop for the unrolled loop.
22715 2023-07-06 Jan Hubicka <jh@suse.cz>
22717 * cfg.cc (set_edge_probability_and_rescale_others): New function.
22718 (update_bb_profile_for_threading): Use it; simplify the rest.
22719 * cfg.h (set_edge_probability_and_rescale_others): Declare.
22720 * profile-count.h (profile_probability::apply_scale): New.
22722 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
22724 * doc/extend.texi (ARC Built-in Functions): Update documentation
22725 with missing builtins.
22727 2023-07-06 Richard Biener <rguenther@suse.de>
22729 PR tree-optimization/110556
22730 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
22731 assign code and all operands of non-stores.
22733 2023-07-06 Richard Biener <rguenther@suse.de>
22735 PR tree-optimization/110563
22736 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
22737 Remove second argument.
22738 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
22739 Remove for_epilogue_p argument. Merge assert ...
22740 (vect_analyze_loop_2): ... with check done before determining
22741 partial vectors by moving it after.
22742 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
22744 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22746 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
22747 few things re 'reorder' option and strings.
22748 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
22750 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22752 * gengtype-parse.cc: Clean up obsolete parametrized structs
22754 * gengtype.cc: Likewise.
22755 * gengtype.h: Likewise.
22757 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22759 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
22762 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22764 * gengtype-parse.cc (token_names): Add '"user"'.
22765 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
22766 'FIRST_TOKEN_WITH_VALUE'.
22768 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22770 * doc/gty.texi (GTY Options) <string_length>: Enhance.
22772 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22774 * gengtype.cc (write_root, write_roots): Explicitly reject
22775 'string_length' option.
22776 * doc/gty.texi (GTY Options) <string_length>: Document.
22778 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22780 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
22781 (ggc_pch_write_object): Remove 'bool is_string' argument.
22782 * ggc-common.cc: Adjust.
22783 * ggc-page.cc: Likewise.
22785 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
22787 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
22789 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
22791 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
22792 and add description for inling of function with arch and tune
22795 2023-07-06 Richard Biener <rguenther@suse.de>
22797 PR tree-optimization/110515
22798 * tree-ssa-pre.cc (compute_avail): Make code dealing
22799 with hoisting loads with different alias-sets more
22802 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22804 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
22806 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
22808 * config/i386/i386.cc (ix86_can_inline_p): If callee has
22809 default arch=x86-64 and tune=generic, do not block the
22810 inlining to its caller. Also allow callee with different
22811 arch= to be inlined if it has always_inline attribute and
22812 it's ISA is subset of caller's.
22814 2023-07-06 liuhongt <hongtao.liu@intel.com>
22816 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
22817 DF/SFmode AND/IOR/XOR/ANDN operations.
22819 2023-07-06 Andrew Pinski <apinski@marvell.com>
22821 PR middle-end/110554
22822 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
22823 just build using boolean_type_node instead of the cond_type.
22824 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
22825 that will feed into the COND_EXPR.
22827 2023-07-06 liuhongt <hongtao.liu@intel.com>
22830 * config/i386/i386.md (movdf_internal): Disparage slightly for
22831 2 alternatives (r,v) and (v,r) by adding constraint modifier
22834 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
22837 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
22838 initialization of new_addr.
22840 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
22842 PR tree-optimization/110474
22843 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
22844 unroll factor while selecting the epilog vect loop VF.
22846 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22848 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
22851 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22853 * gimple-range-gori.cc (compute_operand_range): After calling
22854 compute_operand2_range, recursively call self if needed.
22855 (compute_operand2_range): Turn into a leaf function.
22856 (gori_compute::compute_operand1_and_operand2_range): Finish
22857 operand2 calculation.
22858 * gimple-range-gori.h (compute_operand2_range): Remove name param.
22860 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22862 * gimple-range-gori.cc (compute_operand_range): After calling
22863 compute_operand1_range, recursively call self if needed.
22864 (compute_operand1_range): Turn into a leaf function.
22865 (gori_compute::compute_operand1_and_operand2_range): Finish
22866 operand1 calculation.
22867 * gimple-range-gori.h (compute_operand1_range): Remove name param.
22869 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22871 * gimple-range-gori.cc (compute_operand_range): Check for
22872 operand interdependence when both op1 and op2 are computed.
22873 (compute_operand1_and_operand2_range): No checks required now.
22875 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22877 * gimple-range-gori.cc (compute_operand_range): Check for
22878 a relation between op1 and op2 and use that instead.
22879 (compute_operand1_range): Don't look for a relation override.
22880 (compute_operand2_range): Ditto.
22882 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
22884 * doc/contrib.texi (Contributors): Update my entry.
22886 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
22888 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
22891 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
22893 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
22894 scehdule_more_p and contributes_to_priority indirect frunction
22895 type from int to bool.
22896 (no_real_insns_p): Change return type from int to bool.
22897 (contributes_to_priority): Ditto.
22898 * haifa-sched.cc (no_real_insns_p): Change return type from
22899 int to bool and adjust function body accordingly.
22900 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
22901 variable type from int to bool.
22902 (ps_insn_advance_column): Change return type from int to bool.
22903 (ps_has_conflicts): Ditto. Change "has_conflicts"
22904 variable type from int to bool.
22905 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
22906 (conditions_mutex_p): Ditto.
22907 * sched-ebb.cc (schedule_more_p): Ditto.
22908 (ebb_contributes_to_priority): Change return type from
22909 int to bool and adjust function body accordingly.
22910 * sched-rgn.cc (is_cfg_nonregular): Ditto.
22911 (check_live_1): Ditto.
22913 (find_conditional_protection): Ditto.
22914 (is_conditionally_protected): Ditto.
22915 (is_prisky): Ditto.
22916 (is_exception_free): Ditto.
22917 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
22918 variables from int to bool.
22919 (extend_rgns): Change "rescan" variable from int to bool.
22920 (check_live): Change return type from
22921 int to bool and adjust function body accordingly.
22922 (can_schedule_ready_p): Ditto.
22923 (schedule_more_p): Ditto.
22924 (contributes_to_priority): Ditto.
22926 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22928 * doc/md.texi: Document that vec_set and vec_extract must not
22930 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
22931 (gimple_expand_vec_set_extract_expr): ...to this.
22932 (gimple_expand_vec_exprs): Call renamed function.
22933 * internal-fn.cc (vec_extract_direct): Add.
22934 (expand_vec_extract_optab_fn): New function to expand
22936 (direct_vec_extract_optab_supported_p): Add.
22937 * internal-fn.def (VEC_EXTRACT): Add.
22938 * optabs.cc (can_vec_extract_var_idx_p): New function.
22939 * optabs.h (can_vec_extract_var_idx_p): Declare.
22941 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22943 * config/riscv/autovec.md: Add gen_lowpart.
22945 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22947 * config/riscv/autovec.md: Allow register index operand.
22949 2023-07-05 Pan Li <pan2.li@intel.com>
22951 * config/riscv/riscv-vector-builtins.cc
22952 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
22954 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22956 * config/riscv/autovec.md: Use float_truncate.
22958 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22960 * internal-fn.cc (internal_fn_len_index): Apply
22961 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
22962 (internal_fn_mask_index): Ditto.
22963 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
22964 (supports_vec_scatter_store_p): Ditto.
22965 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
22966 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
22967 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
22968 (vect_get_strided_load_store_ops): Ditto.
22969 (vectorizable_store): Ditto.
22970 (vectorizable_load): Ditto.
22972 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22973 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22975 * simplify-rtx.cc (native_encode_rtx): Ditto.
22976 (native_decode_vector_rtx): Ditto.
22977 (simplify_const_vector_byte_offset): Ditto.
22978 (simplify_const_vector_subreg): Ditto.
22979 * tree.cc (build_truth_vector_type_for_mode): Ditto.
22980 * varasm.cc (output_constant_pool_2): Ditto.
22982 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
22984 * config/mips/mips.cc (mips_expand_block_move): don't expand for
22985 r6 with -mno-unaligned-access option if one or both of src and
22986 dest are unaligned. restruct: return directly if length is not const.
22987 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
22989 2023-07-05 Jan Beulich <jbeulich@suse.com>
22992 * config/i386/sse.md: New splitters to simplify
22993 not;vec_duplicate as a singular vpternlog.
22994 (one_cmpl<mode>2): Allow broadcast for operand 1.
22995 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
22997 2023-07-05 Jan Beulich <jbeulich@suse.com>
23000 * config/i386/sse.md: New splitters to simplify
23001 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
23003 2023-07-05 Jan Beulich <jbeulich@suse.com>
23006 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
23007 form of splitter for PR target/100711.
23009 2023-07-05 Richard Biener <rguenther@suse.de>
23011 PR middle-end/110541
23012 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
23015 2023-07-05 Jan Beulich <jbeulich@suse.com>
23018 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
23019 for memory form operand 1.
23021 2023-07-05 Jan Beulich <jbeulich@suse.com>
23024 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
23025 bitwise vector operations.
23026 * config/i386/sse.md (*iornot<mode>3): New insn.
23027 (*xnor<mode>3): Likewise.
23028 (*<nlogic><mode>3): Likewise.
23029 (andor): New code iterator.
23030 (nlogic): New code attribute.
23031 (ternlog_nlogic): Likewise.
23033 2023-07-05 Richard Biener <rguenther@suse.de>
23035 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
23037 2023-07-05 yulong <shiyulong@iscas.ac.cn>
23039 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
23041 2023-07-05 yulong <shiyulong@iscas.ac.cn>
23043 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
23044 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
23045 (ADJUST_ALIGNMENT): Ditto.
23046 (RVV_TUPLE_PARTIAL_MODES): Ditto.
23047 (ADJUST_NUNITS): Ditto.
23048 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
23050 (vfloat16mf4x3_t): Ditto.
23051 (vfloat16mf4x4_t): Ditto.
23052 (vfloat16mf4x5_t): Ditto.
23053 (vfloat16mf4x6_t): Ditto.
23054 (vfloat16mf4x7_t): Ditto.
23055 (vfloat16mf4x8_t): Ditto.
23056 (vfloat16mf2x2_t): Ditto.
23057 (vfloat16mf2x3_t): Ditto.
23058 (vfloat16mf2x4_t): Ditto.
23059 (vfloat16mf2x5_t): Ditto.
23060 (vfloat16mf2x6_t): Ditto.
23061 (vfloat16mf2x7_t): Ditto.
23062 (vfloat16mf2x8_t): Ditto.
23063 (vfloat16m1x2_t): Ditto.
23064 (vfloat16m1x3_t): Ditto.
23065 (vfloat16m1x4_t): Ditto.
23066 (vfloat16m1x5_t): Ditto.
23067 (vfloat16m1x6_t): Ditto.
23068 (vfloat16m1x7_t): Ditto.
23069 (vfloat16m1x8_t): Ditto.
23070 (vfloat16m2x2_t): Ditto.
23071 (vfloat16m2x3_t): Ditto.
23072 (vfloat16m2x4_t): Ditto.
23073 (vfloat16m4x2_t): Ditto.
23074 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
23075 (vfloat16mf4x3_t): Ditto.
23076 (vfloat16mf4x4_t): Ditto.
23077 (vfloat16mf4x5_t): Ditto.
23078 (vfloat16mf4x6_t): Ditto.
23079 (vfloat16mf4x7_t): Ditto.
23080 (vfloat16mf4x8_t): Ditto.
23081 (vfloat16mf2x2_t): Ditto.
23082 (vfloat16mf2x3_t): Ditto.
23083 (vfloat16mf2x4_t): Ditto.
23084 (vfloat16mf2x5_t): Ditto.
23085 (vfloat16mf2x6_t): Ditto.
23086 (vfloat16mf2x7_t): Ditto.
23087 (vfloat16mf2x8_t): Ditto.
23088 (vfloat16m1x2_t): Ditto.
23089 (vfloat16m1x3_t): Ditto.
23090 (vfloat16m1x4_t): Ditto.
23091 (vfloat16m1x5_t): Ditto.
23092 (vfloat16m1x6_t): Ditto.
23093 (vfloat16m1x7_t): Ditto.
23094 (vfloat16m1x8_t): Ditto.
23095 (vfloat16m2x2_t): Ditto.
23096 (vfloat16m2x3_t): Ditto.
23097 (vfloat16m2x4_t): Ditto.
23098 (vfloat16m4x2_t): Ditto.
23099 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
23100 * config/riscv/riscv.md: New.
23101 * config/riscv/vector-iterators.md: New.
23103 2023-07-04 Andrew Pinski <apinski@marvell.com>
23105 PR tree-optimization/110487
23106 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
23107 build a nonstandard integer and use that.
23109 2023-07-04 Andrew Pinski <apinski@marvell.com>
23111 * match.pd (a?-1:0): Cast type an integer type
23112 rather the type before the negative.
23113 (a?0:-1): Likewise.
23115 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
23117 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
23118 Change to use HARD_REG_BIT and its macros.
23119 * config/xtensa/xtensa.md
23120 (peephole2: regmove elimination during DFmode input reload):
23123 2023-07-04 Richard Biener <rguenther@suse.de>
23125 PR tree-optimization/110491
23126 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
23127 whether the PHI args are possibly undefined before folding
23130 2023-07-04 Pan Li <pan2.li@intel.com>
23131 Thomas Schwinge <thomas@codesourcery.com>
23133 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
23134 bits for machine mode table.
23135 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
23136 HOST machine mode bits.
23137 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
23138 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
23140 * tree-streamer.h (streamer_mode_table): Ditto.
23141 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
23142 as the packing limit.
23143 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
23145 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
23147 * lto-streamer.h (class lto_input_block): Capture
23148 'lto_file_decl_data *file_data' instead of just
23149 'unsigned char *mode_table'.
23150 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
23151 * ipa-fnsummary.cc (inline_read_section): Likewise.
23152 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
23153 * ipa-modref.cc (read_section): Likewise.
23154 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
23156 * ipa-sra.cc (isra_read_summary_section): Likewise.
23157 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
23158 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
23159 * lto-streamer-in.cc (lto_read_body_or_constructor)
23160 (lto_input_toplevel_asms): Likewise.
23161 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
23163 2023-07-04 Richard Biener <rguenther@suse.de>
23165 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
23166 (empty_bb_or_one_feeding_into_p): Check for them.
23167 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
23168 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
23170 2023-07-04 Richard Biener <rguenther@suse.de>
23172 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
23173 check guarding scalar_niter underflow.
23175 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
23177 PR tree-optimization/110531
23178 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
23179 slp_done_for_suggested_uf to false.
23181 2023-07-04 Richard Biener <rguenther@suse.de>
23183 PR tree-optimization/110228
23184 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
23185 Mark SSA may-undefs.
23186 (bb_no_side_effects_p): Check stmt uses for undefs.
23188 2023-07-04 Richard Biener <rguenther@suse.de>
23190 PR tree-optimization/110436
23191 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
23192 force live but not relevant pattern stmts relevant.
23194 2023-07-04 Lili Cui <lili.cui@intel.com>
23196 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
23197 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
23199 2023-07-04 Richard Biener <rguenther@suse.de>
23201 PR middle-end/110495
23202 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
23203 since we do not set TREE_OVERFLOW on those since the
23204 introduction of VL vectors.
23205 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
23206 at TREE_OVERFLOW to determine validity of association.
23208 2023-07-04 Richard Biener <rguenther@suse.de>
23210 PR tree-optimization/110310
23211 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
23212 Move costing part ...
23213 (vect_analyze_loop_costing): ... here. Integrate better
23214 estimate for epilogues from ...
23215 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
23216 with actual epilogue status.
23217 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
23218 avoid cancelling epilogue vectorization.
23219 (vect_update_epilogue_niters): Remove. No longer update
23220 epilogue LOOP_VINFO_NITERS.
23222 2023-07-04 Pan Li <pan2.li@intel.com>
23225 2023-07-03 Pan Li <pan2.li@intel.com>
23227 * config/riscv/vector.md: Fix typo.
23229 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23231 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
23232 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
23233 (expand_gather_load_optab_fn): Ditto.
23234 (internal_load_fn_p): Ditto.
23235 (internal_store_fn_p): Ditto.
23236 (internal_gather_scatter_fn_p): Ditto.
23237 (internal_fn_len_index): Ditto.
23238 (internal_fn_mask_index): Ditto.
23239 (internal_fn_stored_value_index): Ditto.
23240 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
23241 (LEN_MASK_SCATTER_STORE): Ditto.
23242 * optabs.def (OPTAB_CD): Ditto.
23244 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23246 * config/riscv/riscv-vsetvl.cc
23247 (vector_insn_info::parse_insn): Add early break.
23249 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
23251 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
23252 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
23254 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
23256 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
23258 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
23260 * common/config/riscv/riscv-common.cc: Add support for zvbb,
23261 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
23262 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
23263 * config/riscv/arch-canonicalize: Add canonicalization info for
23264 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
23265 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
23266 (MASK_ZVBC): Likewise.
23267 (TARGET_ZVBB): Likewise.
23268 (TARGET_ZVBC): Likewise.
23269 (MASK_ZVKG): Likewise.
23270 (MASK_ZVKNED): Likewise.
23271 (MASK_ZVKNHA): Likewise.
23272 (MASK_ZVKNHB): Likewise.
23273 (MASK_ZVKSED): Likewise.
23274 (MASK_ZVKSH): Likewise.
23275 (MASK_ZVKN): Likewise.
23276 (MASK_ZVKNC): Likewise.
23277 (MASK_ZVKNG): Likewise.
23278 (MASK_ZVKS): Likewise.
23279 (MASK_ZVKSC): Likewise.
23280 (MASK_ZVKSG): Likewise.
23281 (MASK_ZVKT): Likewise.
23282 (TARGET_ZVKG): Likewise.
23283 (TARGET_ZVKNED): Likewise.
23284 (TARGET_ZVKNHA): Likewise.
23285 (TARGET_ZVKNHB): Likewise.
23286 (TARGET_ZVKSED): Likewise.
23287 (TARGET_ZVKSH): Likewise.
23288 (TARGET_ZVKN): Likewise.
23289 (TARGET_ZVKNC): Likewise.
23290 (TARGET_ZVKNG): Likewise.
23291 (TARGET_ZVKS): Likewise.
23292 (TARGET_ZVKSC): Likewise.
23293 (TARGET_ZVKSG): Likewise.
23294 (TARGET_ZVKT): Likewise.
23295 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
23297 2023-07-03 Andrew Pinski <apinski@marvell.com>
23299 PR middle-end/110510
23300 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
23302 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
23304 * config/darwin.h: Avoid duplicate multiply_defined specs on
23305 earlier Darwin versions with shared libgcc.
23307 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
23309 * tree.h (tree_int_cst_equal): Change return type from int to bool.
23310 (operand_equal_for_phi_arg_p): Ditto.
23311 (tree_map_base_marked_p): Ditto.
23312 * tree.cc (contains_placeholder_p): Update function body
23313 for bool return type.
23314 (type_cache_hasher::equal): Ditto.
23315 (tree_map_base_hash): Change return type
23316 from int to void and adjust function body accordingly.
23317 (tree_int_cst_equal): Ditto.
23318 (operand_equal_for_phi_arg_p): Ditto.
23319 (get_narrower): Change "first" variable to bool.
23320 (cl_option_hasher::equal): Update function body for bool return type.
23321 * ggc.h (ggc_set_mark): Change return type from int to bool.
23322 (ggc_marked_p): Ditto.
23323 * ggc-page.cc (gt_ggc_mx): Change return type
23324 from int to void and adjust function body accordingly.
23325 (ggc_set_mark): Ditto.
23327 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23329 * config/riscv/autovec.md: Change order of
23330 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
23331 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
23332 * doc/md.texi: Ditto.
23333 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
23334 * internal-fn.cc (len_maskload_direct): Ditto.
23335 (len_maskstore_direct): Ditto.
23336 (add_len_and_mask_args): New function.
23337 (expand_partial_load_optab_fn): Change order of
23338 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
23339 (expand_partial_store_optab_fn): Ditto.
23340 (internal_fn_len_index): New function.
23341 (internal_fn_mask_index): Change order of
23342 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
23343 (internal_fn_stored_value_index): Ditto.
23344 (internal_len_load_store_bias): Ditto.
23345 * internal-fn.h (internal_fn_len_index): New function.
23346 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
23347 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
23348 * tree-vect-stmts.cc (vectorizable_store): Ditto.
23349 (vectorizable_load): Ditto.
23351 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
23354 * doc/gm2.texi (Semantic checking): Include examples using
23355 -Wuninit-variable-checking.
23357 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23359 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
23360 (*single_widen_fnma<mode>): Ditto.
23361 (*double_widen_fms<mode>): Ditto.
23362 (*single_widen_fms<mode>): Ditto.
23363 (*double_widen_fnms<mode>): Ditto.
23364 (*single_widen_fnms<mode>): Ditto.
23366 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23368 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
23369 into "*" in pattern name which simplifies build files.
23370 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
23371 (*pred_single_widen_mul<mode>): New pattern.
23373 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
23375 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
23376 the index to be 0 or 1.
23378 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
23381 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23383 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
23384 (*single_widen_fnma<mode>): Ditto.
23385 (*double_widen_fms<mode>): Ditto.
23386 (*single_widen_fms<mode>): Ditto.
23387 (*double_widen_fnms<mode>): Ditto.
23388 (*single_widen_fnms<mode>): Ditto.
23390 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23392 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
23393 (*single_widen_fnma<mode>): Ditto.
23394 (*double_widen_fms<mode>): Ditto.
23395 (*single_widen_fms<mode>): Ditto.
23396 (*double_widen_fnms<mode>): Ditto.
23397 (*single_widen_fnms<mode>): Ditto.
23399 2023-07-03 Pan Li <pan2.li@intel.com>
23401 * config/riscv/vector.md: Fix typo.
23403 2023-07-03 Richard Biener <rguenther@suse.de>
23405 PR tree-optimization/110506
23406 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
23407 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
23409 2023-07-03 Richard Biener <rguenther@suse.de>
23411 PR tree-optimization/110506
23412 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
23413 type before relying on TYPE_PRECISION to produce a nonzero mask.
23415 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23417 * config/mips/mips.md(*and<mode>3_mips16): Generates
23418 ZEB/ZEH instructions.
23420 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23422 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
23423 address register to M16_REGS for MIPS16.
23424 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
23425 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
23426 (AVAIL_NON_MIPS16 (cache..)): Update to
23427 AVAIL_MIPS16E2_OR_NON_MIPS16.
23428 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
23429 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
23431 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23433 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
23434 for ISA_HAS_MIPS16E2.
23435 (ISA_HAS_SYNC): Same as above.
23436 (ISA_HAS_LL_SC): Same as above.
23438 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23440 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
23441 Add logics for generating instruction.
23442 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
23443 * config/mips/mips.md(mov_<load>l): Generates instructions.
23444 (mov_<load>r): Same as above.
23445 (mov_<store>l): Adjusted for the conditions above.
23446 (mov_<store>r): Same as above.
23447 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
23448 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
23450 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23452 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
23453 (mips_const_insns): Same as above.
23454 (mips_output_move): Same as above.
23455 (mips_output_function_prologue): Same as above.
23456 * config/mips/mips.md: Same as above
23458 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23460 * config/mips/constraints.md(Yz): New constraints for mips16e2.
23461 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
23462 (mips_bit_clear_info): Same as above.
23463 * config/mips/mips.cc(mips_bit_clear_info): New function for
23464 generating instructions.
23465 (mips_bit_clear_p): Same as above.
23466 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
23467 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
23468 (*and<mode>3): Generates INS instruction.
23469 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
23470 (ior<mode>3): Add logics for ORI instruction.
23471 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
23472 (*ior<mode>3_mips16): Add logics for XORI instruction.
23473 (*xor<mode>3_mips16): Generates XORI instrucion.
23474 (*extzv<mode>): Add logics for EXT instruction.
23475 (*insv<mode>): Add logics for INS instruction.
23476 * config/mips/predicates.md(bit_clear_operand): New predicate for
23477 generating bitwise instructions.
23478 (and_reg_operand): Add logics for generating bitwise instructions.
23480 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23482 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
23483 that uses global pointer register.
23484 (mips16_unextended_reference_p): Same as above.
23485 (mips_pic_base_register): Same as above.
23486 (mips_init_relocs): Same as above.
23487 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
23488 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
23489 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
23490 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
23492 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23494 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
23495 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
23496 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
23497 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
23498 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
23499 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
23501 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
23503 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
23505 * config/mips/mips.h(__mips_mips16e2): Defined a new
23507 (ISA_HAS_MIPS16E2): Defined a new macro.
23508 (ASM_SPEC): Pass mmips16e2 to the assembler.
23509 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
23510 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
23511 * doc/invoke.texi: Add -m(no-)mips16e2 option..
23513 2023-07-02 Jakub Jelinek <jakub@redhat.com>
23515 PR tree-optimization/110508
23516 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
23517 REALPART_EXPR opf nlhs if re2 is non-NULL.
23519 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
23521 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
23523 * config/xtensa/xtensa.md (*xtensa_clamps):
23524 Add TARGET_MINMAX to the condition.
23526 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
23528 * config/xtensa/xtensa.md (*eqne_INT_MIN):
23529 Add missing ":SI" to the match_operator.
23531 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
23534 * config/darwin.opt: Add fconstant-cfstrings alias to
23535 mconstant-cfstrings.
23536 * doc/invoke.texi: Amend invocation descriptions to reflect
23537 that the fconstant-cfstrings is a target-option alias and to
23538 add the missing mconstant-cfstrings option description to the
23541 2023-07-01 Jan Hubicka <jh@suse.cz>
23543 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
23544 parmaeter; update profile.
23545 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
23546 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
23547 (static_loop_exit): ... this; return the edge to be elliminated.
23548 (ch_base::copy_headers): Handle profile updating for eliminated exits.
23550 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
23552 * config/i386/i386-features.cc (compute_convert_gain): Provide
23553 gains/costs for ROTATE and ROTATERT (by an integer constant).
23554 (general_scalar_chain::convert_rotate): New helper function to
23555 convert a DImode or SImode rotation by an integer constant into
23557 (general_scalar_chain::convert_insn): Call the new convert_rotate
23558 for ROTATE and ROTATERT.
23559 (general_scalar_to_vector_candidate_p): Consider ROTATE and
23560 ROTATERT to be candidates if the second operand is an integer
23561 constant, valid for a rotation (or shift) in the given mode.
23562 * config/i386/i386-features.h (general_scalar_chain): Add new
23563 helper method convert_rotate.
23565 2023-07-01 Jan Hubicka <jh@suse.cz>
23567 PR tree-optimization/103680
23568 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
23569 make message clearer.
23571 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
23573 PR tree-optimization/101832
23574 * tree-object-size.cc (addr_object_size): Handle structure/union type
23575 when it has flexible size.
23577 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
23579 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
23580 (fold_nonarray_ctor_reference): Likewise. Specifically deal
23581 with integral bit-fields.
23582 (fold_ctor_reference): Make sure that the constructor uses the
23583 native storage order.
23585 2023-06-30 Jan Hubicka <jh@suse.cz>
23587 PR middle-end/109849
23588 * predict.cc (estimate_bb_frequencies): Turn to static function.
23589 (expr_expected_value_1): Fix handling of binary expressions with
23591 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
23592 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
23594 * predict.h (estimate_bb_frequencies): No longer declare it.
23596 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
23598 * fold-const.h (multiple_of_p): Change return type from int to bool.
23599 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
23600 neg_conp_p and neg_var_p variables to bool.
23601 (const_binop): Change sat_p variable to bool.
23602 (merge_ranges): Change no_overlap variable to bool.
23603 (extract_muldiv_1): Change same_p variable to bool.
23604 (tree_swap_operands_p): Update function body for bool return type.
23605 (fold_truth_andor): Change commutative variable to bool.
23606 (multiple_of_p): Change return type
23607 from int to void and adjust function body accordingly.
23608 * optabs.h (expand_twoval_unop): Change return type from int to bool.
23609 (expand_twoval_binop): Ditto.
23610 (can_compare_p): Ditto.
23611 (have_add2_insn): Ditto.
23612 (have_addptr3_insn): Ditto.
23613 (have_sub2_insn): Ditto.
23614 (have_insn_for): Ditto.
23615 * optabs.cc (add_equal_note): Ditto.
23616 (widen_operand): Change no_extend argument from int to bool.
23617 (expand_binop): Ditto.
23618 (expand_twoval_unop): Change return type
23619 from int to void and adjust function body accordingly.
23620 (expand_twoval_binop): Ditto.
23621 (can_compare_p): Ditto.
23622 (have_add2_insn): Ditto.
23623 (have_addptr3_insn): Ditto.
23624 (have_sub2_insn): Ditto.
23625 (have_insn_for): Ditto.
23627 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
23629 * config/aarch64/aarch64-simd.md
23630 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
23631 Expansions for abd vec widen optabs.
23632 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
23633 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
23634 that give the appropriate extend RTL for the max RTL.
23636 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
23638 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
23639 * optabs.def (vec_widen_sabd_optab,
23640 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
23641 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
23642 vec_widen_uabd_optab,
23643 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
23644 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
23646 * doc/md.texi: Document them.
23647 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
23648 to build a VEC_WIDEN_ABD call if the input precision is smaller
23649 than the precision of the output.
23650 (vect_recog_widen_abd_pattern): Should an ABD expression be
23651 found preceeding an extension, replace the two with a
23654 2023-06-30 Pan Li <pan2.li@intel.com>
23656 * config/riscv/vector.md: Refactor the common condition.
23658 2023-06-30 Richard Biener <rguenther@suse.de>
23660 PR tree-optimization/110496
23661 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
23662 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
23664 2023-06-30 Richard Biener <rguenther@suse.de>
23666 PR middle-end/110489
23667 * statistics.cc (curr_statistics_hash): Add argument
23668 indicating whether we should allocate the hash.
23669 (statistics_fini_pass): If the hash isn't allocated
23670 only print the summary header.
23672 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
23673 Thomas Schwinge <thomas@codesourcery.com>
23675 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
23677 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
23680 * config/mips/mips.cc (mips_function_arg_alignment): Returns
23681 the alignment of function argument. In case of typedef type,
23682 it returns the aligment of the aliased type.
23683 (mips_function_arg_boundary): Relocated calculation of the
23684 aligment of function arguments.
23686 2023-06-29 Jan Hubicka <jh@suse.cz>
23688 PR tree-optimization/109849
23689 * ipa-fnsummary.cc (decompose_param_expr): Skip
23690 functions returning its parameter.
23691 (set_cond_stmt_execution_predicate): Return early
23692 if predicate was constructed.
23694 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
23697 * doc/extend.texi: Document GCC extension on a structure containing
23698 a flexible array member to be a member of another structure.
23700 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
23702 * print-tree.cc (print_node): Print new bit type_include_flexarray.
23703 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
23704 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
23705 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
23706 in bit no_named_args_stdarg_p properly for its corresponding type.
23707 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
23708 out bit no_named_args_stdarg_p properly for its corresponding type.
23709 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
23711 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
23713 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
23714 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
23715 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
23717 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
23719 * value-range.cc (frange::set): Do not call verify_range.
23720 (frange::normalize_kind): Verify range.
23721 (frange::union_nans): Do not call verify_range.
23722 (frange::union_): Same.
23723 (frange::intersect): Same.
23724 (irange::irange_single_pair_union): Call normalize_kind if
23726 (irange::union_): Same.
23727 (irange::intersect): Same.
23728 (irange::set_range_from_nonzero_bits): Verify range.
23729 (irange::set_nonzero_bits): Call normalize_kind if necessary.
23730 (irange::get_nonzero_bits): Tweak comment.
23731 (irange::intersect_nonzero_bits): Call normalize_kind if
23733 (irange::union_nonzero_bits): Same.
23734 * value-range.h (irange::normalize_kind): Verify range.
23736 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
23738 * cselib.h (rtx_equal_for_cselib_1):
23739 Change return type from int to bool.
23740 (references_value_p): Ditto.
23741 (rtx_equal_for_cselib_p): Ditto.
23742 * expr.h (can_store_by_pieces): Ditto.
23743 (try_casesi): Ditto.
23744 (try_tablejump): Ditto.
23745 (safe_from_p): Ditto.
23746 * sbitmap.h (bitmap_equal_p): Ditto.
23747 * cselib.cc (references_value_p): Change return type
23748 from int to void and adjust function body accordingly.
23749 (rtx_equal_for_cselib_1): Ditto.
23750 * expr.cc (is_aligning_offset): Ditto.
23751 (can_store_by_pieces): Ditto.
23752 (mostly_zeros_p): Ditto.
23753 (all_zeros_p): Ditto.
23754 (safe_from_p): Ditto.
23755 (is_aligning_offset): Ditto.
23756 (try_casesi): Ditto.
23757 (try_tablejump): Ditto.
23758 (store_constructor): Change "need_to_clear" and
23759 "const_bounds_p" variables to bool.
23760 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
23762 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
23764 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
23767 2023-06-29 Richard Biener <rguenther@suse.de>
23769 PR tree-optimization/110460
23770 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
23771 Only allow integral, pointer and scalar float type scalar_type.
23773 2023-06-29 Lili Cui <lili.cui@intel.com>
23775 PR tree-optimization/110148
23776 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
23777 ops in this function.
23779 2023-06-29 Richard Biener <rguenther@suse.de>
23781 PR middle-end/110452
23782 * expr.cc (store_constructor): Handle uniform boolean
23783 vectors with integer mode specially.
23785 2023-06-29 Richard Biener <rguenther@suse.de>
23787 PR middle-end/110461
23788 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
23791 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
23793 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
23794 (array_slice): Relax va_gc constructor to handle all vectors
23795 with a vl_embed layout.
23797 2023-06-29 Pan Li <pan2.li@intel.com>
23799 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
23800 (riscv_mode_needed): Likewise.
23801 (riscv_entity_mode_after): Likewise.
23802 (riscv_mode_after): Likewise.
23803 (riscv_mode_entry): Likewise.
23804 (riscv_mode_exit): Likewise.
23805 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
23807 * config/riscv/riscv.md: Add FRM register.
23808 * config/riscv/vector-iterators.md: Add FRM type.
23809 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
23810 (fsrm): Define new insn for fsrm instruction.
23812 2023-06-29 Pan Li <pan2.li@intel.com>
23814 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
23815 Add macro for static frm min and max.
23816 * config/riscv/riscv-vector-builtins-bases.cc
23817 (class binop_frm): New class for floating-point with frm.
23818 (BASE): Add vfadd for frm.
23819 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
23820 * config/riscv/riscv-vector-builtins-functions.def
23821 (vfadd_frm): Likewise.
23822 * config/riscv/riscv-vector-builtins-shapes.cc
23823 (struct alu_frm_def): New struct for alu with frm.
23824 (SHAPE): Add alu with frm.
23825 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
23826 * config/riscv/riscv-vector-builtins.cc
23827 (function_checker::report_out_of_range_and_not): New function
23828 for report out of range and not val.
23829 (function_checker::require_immediate_range_or): New function
23830 for checking in range or one val.
23831 * config/riscv/riscv-vector-builtins.h: Add function decl.
23833 2023-06-29 Cui, Lili <lili.cui@intel.com>
23835 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
23836 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
23838 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
23841 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
23842 to insn before validating it.
23844 2023-06-28 Jan Hubicka <jh@suse.cz>
23846 PR middle-end/110334
23847 * ipa-fnsummary.h (ipa_fn_summary): Add
23848 safe_to_inline_to_always_inline.
23849 * ipa-inline.cc (can_early_inline_edge_p): ICE
23850 if SSA is not built; do cycle checking for
23851 always_inline functions.
23852 (inline_always_inline_functions): Be recrusive;
23853 watch for cycles; do not updat overall summary.
23854 (early_inliner): Do not give up on always_inlines.
23855 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
23858 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
23860 * output.h (leaf_function_p): Change return type from int to bool.
23861 (final_forward_branch_p): Ditto.
23862 (only_leaf_regs_used): Ditto.
23863 (maybe_assemble_visibility): Ditto.
23864 * varasm.h (supports_one_only): Ditto.
23865 * rtl.h (compute_alignments): Change return type from int to void.
23866 * final.cc (app_on): Change return type from int to bool.
23867 (compute_alignments): Change return type from int to void
23868 and adjust function body accordingly.
23869 (shorten_branches): Change "something_changed" variable
23870 type from int to bool.
23871 (leaf_function_p): Change return type from int to bool
23872 and adjust function body accordingly.
23873 (final_forward_branch_p): Ditto.
23874 (only_leaf_regs_used): Ditto.
23875 * varasm.cc (contains_pointers_p): Change return type from
23876 int to bool and adjust function body accordingly.
23877 (compare_constant): Ditto.
23878 (maybe_assemble_visibility): Ditto.
23879 (supports_one_only): Ditto.
23881 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
23884 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
23885 (maybe_copy_reg_attrs): New function.
23886 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
23887 (copyprop_hardreg_forward_1): Ditto.
23889 2023-06-28 Richard Biener <rguenther@suse.de>
23891 PR tree-optimization/110434
23892 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
23893 VAR we replace with <retval>.
23895 2023-06-28 Richard Biener <rguenther@suse.de>
23897 PR tree-optimization/110451
23898 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
23899 tcc_comparison are expensive.
23901 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
23903 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
23904 for TImode comparisons on 32-bit architectures.
23905 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
23906 SWIM1248x to exclude/avoid TImode being conditional on -m64.
23907 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
23908 and/or with TARGET_SSE4_1.
23909 * config/i386/predicates.md (ix86_timode_comparison_operator):
23910 New predicate that depends upon TARGET_64BIT.
23911 (ix86_timode_comparison_operand): Likewise.
23913 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
23916 * config/i386/i386-features.cc (compute_convert_gain): Provide
23917 more accurate gains for conversion of scalar comparisons to
23920 2023-06-28 Richard Biener <rguenther@suse.de>
23922 PR tree-optimization/110443
23923 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
23926 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
23928 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
23929 (peephole2 for move_and_compare): New.
23930 (mode_iterator WORD): New. Set the mode to SI/DImode by
23932 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
23933 (split pattern for compare_and_move): Likewise.
23935 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23937 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
23938 (*single_widen_fma<mode>): Ditto.
23940 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
23943 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
23945 (altivec_vupkhs<VU_char>_direct): ...this.
23946 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
23947 predicate to test if a constant can be loaded with vspltisw and
23949 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
23950 a vector constant can be synthesized with a vspltisw and a vupkhsw.
23951 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
23953 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
23954 function to return true if OP mode is V2DI and can be synthesized
23955 with vupkhsw and vspltisw.
23956 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
23957 constants with vspltisw and vupkhsw.
23959 2023-06-28 Jan Hubicka <jh@suse.cz>
23961 PR tree-optimization/110377
23962 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
23964 (ipa_analyze_node): Enable ranger.
23966 2023-06-28 Richard Biener <rguenther@suse.de>
23968 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
23969 (TYPE_PRECISION_RAW): Provide raw access to the precision
23971 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
23972 (gimple_canonical_types_compatible_p): Likewise.
23973 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
23974 Stream TYPE_PRECISION_RAW.
23975 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
23977 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
23979 2023-06-28 Alexandre Oliva <oliva@adacore.com>
23981 * doc/extend.texi (zero-call-used-regs): Document leafy and
23983 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
23984 LEAFY and variants.
23985 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
23986 functions in leafy mode.
23987 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
23989 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23991 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
23992 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
23994 (@pred_single_widen_add<mode>): New pattern.
23995 (@pred_single_widen_sub<mode>): New pattern.
23997 2023-06-28 liuhongt <hongtao.liu@intel.com>
23999 * config/i386/i386.cc (ix86_invalid_conversion): New function.
24000 (TARGET_INVALID_CONVERSION): Define as
24001 ix86_invalid_conversion.
24003 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
24005 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
24007 (<float_cvt><vnconvert><mode>2): Ditto.
24008 (<optab><mode><vnconvert>2): Ditto.
24009 (<float_cvt><mode><vnconvert>2): Ditto.
24010 * config/riscv/vector-iterators.md: Add vnconvert.
24012 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
24014 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
24016 (extend<v_quad_trunc><mode>2): Ditto.
24017 (trunc<mode><v_double_trunc>2): Ditto.
24018 (trunc<mode><v_quad_trunc>2): Ditto.
24019 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
24020 V_QUAD_TRUNC and v_quad_trunc.
24022 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
24024 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
24027 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
24029 * config/riscv/autovec.md (copysign<mode>3): Add expander.
24030 (xorsign<mode>3): Ditto.
24031 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
24033 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
24037 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
24038 (@pred_ncopysign<mode>_scalar): Ditto.
24040 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
24042 * config/riscv/autovec.md: VF_AUTO -> VF.
24043 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
24044 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
24046 * config/riscv/vector.md: Use new iterators.
24048 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
24050 * match.pd: Use element_mode and check if target supports
24051 operation with new type.
24053 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
24055 * config/aarch64/aarch64-sve-builtins-base.cc
24056 (svdupq_impl::fold_nonconst_dupq): New method.
24057 (svdupq_impl::fold): Call fold_nonconst_dupq.
24059 2023-06-27 Andrew Pinski <apinski@marvell.com>
24061 PR middle-end/110420
24062 PR middle-end/103979
24063 PR middle-end/98619
24064 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
24066 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
24068 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
24069 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
24071 (set_switch_stmt_execution_predicate): Same.
24072 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
24074 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
24076 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
24077 ipa_vr instead of value_range.
24080 (ipa_get_value_range): Same.
24081 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
24085 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
24087 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
24088 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
24089 (ipa_set_jfunc_vr): Take a range.
24090 (ipa_compute_jump_functions_for_edge): Pass range to
24092 (ipa_write_jump_function): Call streamer write helper.
24093 (ipa_read_jump_function): Call streamer read helper.
24094 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
24096 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
24098 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
24099 as a probable initializer rather than a probable complete statement.
24101 2023-06-27 Richard Biener <rguenther@suse.de>
24103 PR tree-optimization/96208
24104 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
24105 a non-grouped load if it is the same for all lanes.
24106 (vect_build_slp_tree_2): Handle not grouped loads.
24107 (vect_optimize_slp_pass::remove_redundant_permutations):
24109 (vect_transform_slp_perm_load_1): Likewise.
24110 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
24111 (get_group_load_store_type): Likewise. Handle
24112 invariant accesses.
24113 (vectorizable_load): Likewise.
24115 2023-06-27 liuhongt <hongtao.liu@intel.com>
24117 PR rtl-optimization/110237
24118 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
24120 (maskstore<mode><avx512fmaskmodelower): Ditto.
24121 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
24122 from original <avx512>_store<mode>_mask.
24124 2023-06-27 liuhongt <hongtao.liu@intel.com>
24126 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
24127 Move flag_expensive_optimizations && !optimize_size to ..
24128 * config/i386/i386-options.cc (ix86_option_override_internal):
24129 .. this, it makes -mvzeroupper independent of optimization
24130 level, but still keeps the behavior of architecture
24131 tuning(emit_vzeroupper) unchanged.
24133 2023-06-27 liuhongt <hongtao.liu@intel.com>
24136 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
24137 vzeroupper for vzeroupper call_insn.
24139 2023-06-27 Andrew Pinski <apinski@marvell.com>
24141 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
24144 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24146 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
24149 2023-06-26 Andrew Pinski <apinski@marvell.com>
24151 * doc/extend.texi (access attribute): Add
24153 (interrupt/interrupt_handler attribute):
24156 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24158 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
24159 Use <DWI> instead of <V2XWIDE>.
24160 (aarch64_sqrshrun_n<mode>): Likewise.
24162 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24164 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
24166 (aarch64_rnd_imm_p): ... This.
24167 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
24169 (aarch64_int_rnd_operand): ... This.
24170 (aarch64_simd_rshrn_imm_vec): Delete.
24171 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
24172 Adjust for the above.
24173 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
24174 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
24175 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
24176 (aarch64_sqrshrun_n<mode>_insn): Likewise.
24177 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
24178 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
24179 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
24180 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
24181 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
24183 (aarch64_rnd_imm_p): ... This.
24185 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
24187 * config/s390/s390.cc (s390_encode_section_info): Set
24188 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
24191 2023-06-26 Jan Hubicka <jh@suse.cz>
24193 PR tree-optimization/109849
24194 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
24195 count of newly constructed forwarder block.
24197 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
24199 * doc/optinfo.texi: Fix "steam" -> "stream".
24201 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24203 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
24205 (dse_optimize_stmt): Add LEN_MASK_STORE.
24207 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24209 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
24210 fold of LOAD/STORE with length.
24212 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
24214 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
24215 Check for interdependence between operands 1 and 2.
24217 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
24219 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
24220 into account when costing non-widening/truncating conversions.
24222 2023-06-26 Richard Biener <rguenther@suse.de>
24224 PR tree-optimization/110381
24225 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
24226 Materialize permutes before fold-left reductions.
24228 2023-06-26 Pan Li <pan2.li@intel.com>
24230 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
24232 2023-06-26 Richard Biener <rguenther@suse.de>
24234 * varasm.cc (initializer_constant_valid_p_1): Also
24235 constrain the type of value to be scalar integral
24236 before dispatching to narrowing_initializer_constant_valid_p.
24238 2023-06-26 Richard Biener <rguenther@suse.de>
24240 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
24241 Use element_precision.
24243 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24245 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
24247 (vcondu<V:mode><VI:mode>): Ditto.
24248 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
24249 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
24251 2023-06-26 Richard Biener <rguenther@suse.de>
24253 PR tree-optimization/110392
24254 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
24255 Do early exits on true/false predicate only after normalization.
24257 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24259 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
24262 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
24264 * config/i386/i386.md (peephole2): Simplify zeroing a register
24265 followed by an IOR, XOR or PLUS operation on it, into a move.
24266 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
24267 eliminate (and hide from reload) unnecessary word to doubleword
24268 extensions that are followed by left shifts by sufficiently large,
24269 but valid, bit counts.
24271 2023-06-26 liuhongt <hongtao.liu@intel.com>
24273 PR tree-optimization/110371
24274 PR tree-optimization/110018
24275 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
24276 save intermediate type operand instead of "subtle" vec_dest
24279 2023-06-26 liuhongt <hongtao.liu@intel.com>
24281 PR tree-optimization/110371
24282 PR tree-optimization/110018
24283 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
24284 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
24286 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
24288 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
24289 Override tune_string with arch_string if tune_string is not
24290 explicitly specified.
24292 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24294 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
24296 * config/riscv/riscv-vsetvl.h: New function.
24298 2023-06-25 Li Xu <xuli1@eswincomputing.com>
24300 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
24303 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24305 * config/riscv/autovec.md (len_load_<mode>): Remove.
24306 (len_maskload<mode><vm>): Remove.
24307 (len_store_<mode>): New pattern.
24308 (len_maskstore<mode><vm>): New pattern.
24309 * config/riscv/predicates.md (autovec_length_operand): New predicate.
24310 * config/riscv/riscv-protos.h (enum insn_type): New enum.
24311 (expand_load_store): New function.
24312 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
24313 (emit_nonvlmax_masked_insn): Ditto.
24314 (expand_load_store): Ditto.
24315 * config/riscv/riscv-vector-builtins.cc
24316 (function_expander::use_contiguous_store_insn): Add avl_type operand
24318 * config/riscv/vector.md: Ditto.
24320 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24322 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
24325 2023-06-25 Pan Li <pan2.li@intel.com>
24327 * config/riscv/vector.md: Revert.
24329 2023-06-25 Pan Li <pan2.li@intel.com>
24331 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
24332 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
24333 (ADJUST_ALIGNMENT): Ditto.
24334 (RVV_TUPLE_PARTIAL_MODES): Ditto.
24335 (ADJUST_NUNITS): Ditto.
24336 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
24337 (vfloat16mf4x3_t): Ditto.
24338 (vfloat16mf4x4_t): Ditto.
24339 (vfloat16mf4x5_t): Ditto.
24340 (vfloat16mf4x6_t): Ditto.
24341 (vfloat16mf4x7_t): Ditto.
24342 (vfloat16mf4x8_t): Ditto.
24343 (vfloat16mf2x2_t): Ditto.
24344 (vfloat16mf2x3_t): Ditto.
24345 (vfloat16mf2x4_t): Ditto.
24346 (vfloat16mf2x5_t): Ditto.
24347 (vfloat16mf2x6_t): Ditto.
24348 (vfloat16mf2x7_t): Ditto.
24349 (vfloat16mf2x8_t): Ditto.
24350 (vfloat16m1x2_t): Ditto.
24351 (vfloat16m1x3_t): Ditto.
24352 (vfloat16m1x4_t): Ditto.
24353 (vfloat16m1x5_t): Ditto.
24354 (vfloat16m1x6_t): Ditto.
24355 (vfloat16m1x7_t): Ditto.
24356 (vfloat16m1x8_t): Ditto.
24357 (vfloat16m2x2_t): Ditto.
24358 (vfloat16m2x3_t): Diito.
24359 (vfloat16m2x4_t): Diito.
24360 (vfloat16m4x2_t): Diito.
24361 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
24362 (vfloat16mf4x3_t): Ditto.
24363 (vfloat16mf4x4_t): Ditto.
24364 (vfloat16mf4x5_t): Ditto.
24365 (vfloat16mf4x6_t): Ditto.
24366 (vfloat16mf4x7_t): Ditto.
24367 (vfloat16mf4x8_t): Ditto.
24368 (vfloat16mf2x2_t): Ditto.
24369 (vfloat16mf2x3_t): Ditto.
24370 (vfloat16mf2x4_t): Ditto.
24371 (vfloat16mf2x5_t): Ditto.
24372 (vfloat16mf2x6_t): Ditto.
24373 (vfloat16mf2x7_t): Ditto.
24374 (vfloat16mf2x8_t): Ditto.
24375 (vfloat16m1x2_t): Ditto.
24376 (vfloat16m1x3_t): Ditto.
24377 (vfloat16m1x4_t): Ditto.
24378 (vfloat16m1x5_t): Ditto.
24379 (vfloat16m1x6_t): Ditto.
24380 (vfloat16m1x7_t): Ditto.
24381 (vfloat16m1x8_t): Ditto.
24382 (vfloat16m2x2_t): Ditto.
24383 (vfloat16m2x3_t): Ditto.
24384 (vfloat16m2x4_t): Ditto.
24385 (vfloat16m4x2_t): Ditto.
24386 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
24387 * config/riscv/riscv.md: Ditto.
24388 * config/riscv/vector-iterators.md: Ditto.
24390 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24392 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
24393 (gimple_fold_partial_load_store_mem_ref): Ditto.
24394 (gimple_fold_partial_store): Ditto.
24395 (gimple_fold_call): Ditto.
24397 2023-06-25 liuhongt <hongtao.liu@intel.com>
24400 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
24401 Refine pattern with UNSPEC_MASKLOAD.
24402 (maskload<mode><avx512fmaskmodelower>): Ditto.
24403 (*<avx512>_load<mode>_mask): Extend mode iterator to
24405 (*<avx512>_load<mode>): Ditto.
24407 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24409 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
24411 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24413 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
24414 LEN_MASK_{LOAD,STORE}
24416 2023-06-25 yulong <shiyulong@iscas.ac.cn>
24418 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
24420 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
24422 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
24424 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24426 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
24427 (*fma<VI:mode><P:mode>): Ditto.
24428 (*fnma<mode>): Ditto.
24429 (*fnma<VI:mode><P:mode>): Ditto.
24431 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24433 * config/riscv/autovec.md (fma<mode>4): New pattern.
24434 (*fma<mode>): Ditto.
24435 (fnma<mode>4): Ditto.
24436 (*fnma<mode>): Ditto.
24437 (fms<mode>4): Ditto.
24438 (*fms<mode>): Ditto.
24439 (fnms<mode>4): Ditto.
24440 (*fnms<mode>): Ditto.
24441 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
24443 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
24444 * config/riscv/vector.md: Fix attribute bug.
24446 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24448 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
24449 Apply LEN_MASK_{LOAD,STORE}.
24451 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24453 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
24454 Add LEN_MASK_{LOAD,STORE}.
24456 2023-06-24 David Malcolm <dmalcolm@redhat.com>
24458 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
24459 * diagnostic.cc: Likewise.
24460 * text-art/box-drawing.cc: Likewise.
24461 * text-art/canvas.cc: Likewise.
24462 * text-art/ruler.cc: Likewise.
24463 * text-art/selftests.cc: Likewise.
24464 * text-art/selftests.h (text_art::canvas): New forward decl.
24465 * text-art/style.cc: Add #define INCLUDE_VECTOR.
24466 * text-art/styled-string.cc: Likewise.
24467 * text-art/table.cc: Likewise.
24468 * text-art/table.h: Remove #include <vector>.
24469 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
24470 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
24471 Remove #include of <vector> and <string>.
24472 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
24473 * text-art/widget.h: Remove #include <vector>.
24475 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24477 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
24478 (internal_load_fn_p): Add LEN_MASK_LOAD.
24479 (internal_store_fn_p): Add LEN_MASK_STORE.
24480 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
24481 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
24482 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
24483 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
24484 (get_len_load_store_mode): Ditto.
24485 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
24486 (get_len_load_store_mode): Ditto.
24487 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
24488 (get_all_ones_mask): New function.
24489 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
24490 (vectorizable_load): Ditto.
24492 2023-06-23 Marek Polacek <polacek@redhat.com>
24494 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
24495 -std=gnu++26. Document that for C++23, its value is 202302L.
24496 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
24497 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
24498 (gen_compile_unit_die): Likewise.
24500 2023-06-23 Jan Hubicka <jh@suse.cz>
24502 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
24504 (pass_phiprop::execute): Do not compute it here; return
24505 update_ssa_only_virtuals if something changed.
24506 (pass_data_phiprop): Remove TODO_update_ssa from todos.
24508 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
24509 Aaron Sawdey <acsawdey@linux.ibm.com>
24512 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
24513 allowed prefixed lwa to be generated.
24514 * config/rs6000/fusion.md: Regenerate.
24515 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
24516 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
24517 plus compare immediate fused insns.
24518 (maybe_prefixed): Likewise.
24520 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
24522 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
24523 of ASHIFT to const0_rtx with sufficiently large shift count.
24524 Optimize highpart SUBREGs of ASHIFT as the shift operand when
24525 the shift count is the correct offset. Optimize SUBREGs of
24526 multi-word logic operations if the SUBREGs of both operands
24529 2023-06-23 Richard Biener <rguenther@suse.de>
24531 * varasm.cc (initializer_constant_valid_p_1): Only
24532 allow conversions between scalar floating point types.
24534 2023-06-23 Richard Biener <rguenther@suse.de>
24536 * tree-vect-stmts.cc (vectorizable_assignment):
24537 Properly handle non-integral operands when analyzing
24540 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
24542 PR tree-optimization/110280
24543 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
24544 using build_vector_from_val with the element of input operand, and
24545 mask's type if operand and mask's types don't match.
24547 2023-06-23 Richard Biener <rguenther@suse.de>
24549 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
24550 the truth_value_p case with !VECTOR_TYPE_P.
24552 2023-06-23 Richard Biener <rguenther@suse.de>
24554 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
24555 Exit early when the type isn't scalar integral.
24557 2023-06-23 Richard Biener <rguenther@suse.de>
24559 * match.pd ((outertype)((innertype0)a+(innertype1)b)
24560 -> ((newtype)a+(newtype)b)): Use element_precision
24563 2023-06-23 Richard Biener <rguenther@suse.de>
24565 * fold-const.cc (fold_binary_loc): Use element_precision
24566 when trying (double)float1 CMP (double)float2 to
24567 float1 CMP float2 simplification.
24568 * match.pd: Likewise.
24570 2023-06-23 Richard Biener <rguenther@suse.de>
24572 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
24573 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
24575 2023-06-23 Richard Biener <rguenther@suse.de>
24577 * tree-vect-stmts.cc (vector_vector_composition_type):
24578 Handle composition of a vector from a number of elements that
24579 happens to match its number of lanes.
24581 2023-06-22 Marek Polacek <polacek@redhat.com>
24583 * configure.ac (--enable-host-bind-now): New check. Add
24584 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
24585 * configure: Regenerate.
24586 * doc/install.texi: Document --enable-host-bind-now.
24588 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
24590 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
24592 2023-06-22 Richard Biener <rguenther@suse.de>
24594 PR tree-optimization/110332
24595 * tree-ssa-phiprop.cc (propagate_with_phi): Always
24596 check aliasing with edge inserted loads.
24598 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
24599 Uros Bizjak <ubizjak@gmail.com>
24601 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
24602 expansion of ptestc with equal operands as producing const1_rtx.
24603 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
24604 estimates of UNSPEC_PTEST, where the ptest performs the PAND
24605 or PAND of its operands.
24606 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
24607 of reg_equal_p operands into an x86_stc instruction.
24608 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
24609 (define_split): Similar to above for strict_low_part destinations.
24610 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
24612 2023-06-22 David Malcolm <dmalcolm@redhat.com>
24615 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
24616 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
24618 (fanalyzer-debug-text-art): New.
24620 2023-06-22 David Malcolm <dmalcolm@redhat.com>
24622 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
24623 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
24624 text-art/style.o, text-art/styled-string.o, text-art/table.o,
24625 text-art/theme.o, and text-art/widget.o.
24626 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
24627 (COLOR_FG_BRIGHT_RED): New.
24628 (COLOR_FG_BRIGHT_GREEN): New.
24629 (COLOR_FG_BRIGHT_YELLOW): New.
24630 (COLOR_FG_BRIGHT_BLUE): New.
24631 (COLOR_FG_BRIGHT_MAGENTA): New.
24632 (COLOR_FG_BRIGHT_CYAN): New.
24633 (COLOR_FG_BRIGHT_WHITE): New.
24634 (COLOR_BG_BRIGHT_BLACK): New.
24635 (COLOR_BG_BRIGHT_RED): New.
24636 (COLOR_BG_BRIGHT_GREEN): New.
24637 (COLOR_BG_BRIGHT_YELLOW): New.
24638 (COLOR_BG_BRIGHT_BLUE): New.
24639 (COLOR_BG_BRIGHT_MAGENTA): New.
24640 (COLOR_BG_BRIGHT_CYAN): New.
24641 (COLOR_BG_BRIGHT_WHITE): New.
24642 * common.opt (fdiagnostics-text-art-charset=): New option.
24643 (diagnostic-text-art.h): New SourceInclude.
24644 (diagnostic_text_art_charset) New Enum and EnumValues.
24645 * configure: Regenerate.
24646 * configure.ac (gccdepdir): Add text-art to loop.
24647 * diagnostic-diagram.h: New file.
24648 * diagnostic-format-json.cc (json_emit_diagram): New.
24649 (diagnostic_output_format_init_json): Wire it up to
24650 context->m_diagrams.m_emission_cb.
24651 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
24652 "text-art/canvas.h".
24653 (sarif_result::on_nested_diagnostic): Move code to...
24654 (sarif_result::add_related_location): ...this new function.
24655 (sarif_result::on_diagram): New.
24656 (sarif_builder::emit_diagram): New.
24657 (sarif_builder::make_message_object_for_diagram): New.
24658 (sarif_emit_diagram): New.
24659 (diagnostic_output_format_init_sarif): Set
24660 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
24661 * diagnostic-text-art.h: New file.
24662 * diagnostic.cc: Include "diagnostic-text-art.h",
24663 "diagnostic-diagram.h", and "text-art/theme.h".
24664 (diagnostic_initialize): Initialize context->m_diagrams and
24665 call diagnostics_text_art_charset_init.
24666 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
24667 (diagnostic_emit_diagram): New.
24668 (diagnostics_text_art_charset_init): New.
24669 * diagnostic.h (text_art::theme): New forward decl.
24670 (class diagnostic_diagram): Likewise.
24671 (diagnostic_context::m_diagrams): New field.
24672 (diagnostic_emit_diagram): New decl.
24673 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
24674 -fdiagnostics-text-art-charset=.
24675 (-fdiagnostics-plain-output): Add
24676 -fdiagnostics-text-art-charset=none.
24677 * gcc.cc: Include "diagnostic-text-art.h".
24678 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
24679 * opts-common.cc (decode_cmdline_options_to_array): Add
24680 "-fdiagnostics-text-art-charset=none" to expanded_args for
24681 -fdiagnostics-plain-output.
24682 * opts.cc: Include "diagnostic-text-art.h".
24683 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
24684 * pretty-print.cc (pp_unicode_character): New.
24685 * pretty-print.h (pp_unicode_character): New decl.
24686 * selftest-run-tests.cc: Include "text-art/selftests.h".
24687 (selftest::run_tests): Call text_art_tests.
24688 * text-art/box-drawing-chars.inc: New file, generated by
24689 contrib/unicode/gen-box-drawing-chars.py.
24690 * text-art/box-drawing.cc: New file.
24691 * text-art/box-drawing.h: New file.
24692 * text-art/canvas.cc: New file.
24693 * text-art/canvas.h: New file.
24694 * text-art/ruler.cc: New file.
24695 * text-art/ruler.h: New file.
24696 * text-art/selftests.cc: New file.
24697 * text-art/selftests.h: New file.
24698 * text-art/style.cc: New file.
24699 * text-art/styled-string.cc: New file.
24700 * text-art/table.cc: New file.
24701 * text-art/table.h: New file.
24702 * text-art/theme.cc: New file.
24703 * text-art/theme.h: New file.
24704 * text-art/types.h: New file.
24705 * text-art/widget.cc: New file.
24706 * text-art/widget.h: New file.
24708 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
24710 * function.h (emit_initial_value_sets):
24711 Change return type from int to void.
24712 (aggregate_value_p): Change return type from int to bool.
24713 (prologue_contains): Ditto.
24714 (epilogue_contains): Ditto.
24715 (prologue_epilogue_contains): Ditto.
24716 * function.cc (temp_slot): Make "in_use" variable bool.
24717 (make_slot_available): Update for changed "in_use" variable.
24718 (assign_stack_temp_for_type): Ditto.
24719 (emit_initial_value_sets): Change return type from int to void
24720 and update function body accordingly.
24721 (instantiate_virtual_regs): Ditto.
24722 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
24723 (safe_insn_predicate): Change return type from int to bool.
24724 (aggregate_value_p): Change return type from int to bool
24725 and update function body accordingly.
24726 (prologue_contains): Change return type from int to bool.
24727 (prologue_epilogue_contains): Ditto.
24729 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
24731 * common.opt (fp_contract_mode) [on]: Remove fallback.
24732 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
24733 * doc/invoke.texi (-ffp-contract): Update.
24734 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
24736 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24738 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
24739 Add alternatives to prefer to avoid same input and output Z register.
24740 (mask_gather_load<mode><v_int_container>): Likewise.
24741 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
24742 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
24743 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
24744 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24746 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24748 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24749 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24750 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24751 <SVE_2BHSI:mode>_sxtw): Likewise.
24752 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24753 <SVE_2BHSI:mode>_uxtw): Likewise.
24754 (@aarch64_ldff1_gather<mode>): Likewise.
24755 (@aarch64_ldff1_gather<mode>): Likewise.
24756 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24757 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24758 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24759 <VNx4_NARROW:mode>): Likewise.
24760 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24761 <VNx2_NARROW:mode>): Likewise.
24762 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24763 <VNx2_NARROW:mode>_sxtw): Likewise.
24764 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24765 <VNx2_NARROW:mode>_uxtw): Likewise.
24766 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24767 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24768 <SVE_PARTIAL_I:mode>): Likewise.
24770 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24772 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
24773 Convert to compact alternatives syntax.
24774 (mask_gather_load<mode><v_int_container>): Likewise.
24775 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
24776 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
24777 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
24778 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24780 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24782 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24783 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24784 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24785 <SVE_2BHSI:mode>_sxtw): Likewise.
24786 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24787 <SVE_2BHSI:mode>_uxtw): Likewise.
24788 (@aarch64_ldff1_gather<mode>): Likewise.
24789 (@aarch64_ldff1_gather<mode>): Likewise.
24790 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24791 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24792 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24793 <VNx4_NARROW:mode>): Likewise.
24794 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24795 <VNx2_NARROW:mode>): Likewise.
24796 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24797 <VNx2_NARROW:mode>_sxtw): Likewise.
24798 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24799 <VNx2_NARROW:mode>_uxtw): Likewise.
24800 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24801 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24802 <SVE_PARTIAL_I:mode>): Likewise.
24804 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24807 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24809 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
24810 Convert to compact alternatives syntax.
24811 (mask_gather_load<mode><v_int_container>): Likewise.
24812 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
24813 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
24814 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
24815 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24817 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24819 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24820 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24821 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24822 <SVE_2BHSI:mode>_sxtw): Likewise.
24823 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24824 <SVE_2BHSI:mode>_uxtw): Likewise.
24825 (@aarch64_ldff1_gather<mode>): Likewise.
24826 (@aarch64_ldff1_gather<mode>): Likewise.
24827 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24828 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24829 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24830 <VNx4_NARROW:mode>): Likewise.
24831 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24832 <VNx2_NARROW:mode>): Likewise.
24833 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24834 <VNx2_NARROW:mode>_sxtw): Likewise.
24835 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24836 <VNx2_NARROW:mode>_uxtw): Likewise.
24837 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24838 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24839 <SVE_PARTIAL_I:mode>): Likewise.
24841 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24843 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
24844 (get_len_load_store_mode): Ditto.
24845 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
24846 (get_len_load_store_mode): Ditto.
24847 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
24848 (get_len_load_store_mode): Ditto.
24849 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
24850 (get_len_load_store_mode): Ditto.
24851 * tree-if-conv.cc: include optabs-tree instead of optabs-query
24853 2023-06-21 Richard Biener <rguenther@suse.de>
24855 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
24856 split_constant_offset for the POINTER_PLUS_EXPR case.
24858 2023-06-21 Richard Biener <rguenther@suse.de>
24860 * tree-ssa-loop-ivopts.cc (record_group_use): Use
24861 split_constant_offset.
24863 2023-06-21 Richard Biener <rguenther@suse.de>
24865 * tree-loop-distribution.cc (classify_builtin_st): Use
24866 split_constant_offset.
24867 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
24868 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
24870 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24872 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
24873 Convert to compact alternatives syntax.
24874 (mask_gather_load<mode><v_int_container>): Likewise.
24875 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
24876 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
24877 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
24878 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24880 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24882 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24883 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24884 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24885 <SVE_2BHSI:mode>_sxtw): Likewise.
24886 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24887 <SVE_2BHSI:mode>_uxtw): Likewise.
24888 (@aarch64_ldff1_gather<mode>): Likewise.
24889 (@aarch64_ldff1_gather<mode>): Likewise.
24890 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24891 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24892 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24893 <VNx4_NARROW:mode>): Likewise.
24894 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24895 <VNx2_NARROW:mode>): Likewise.
24896 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24897 <VNx2_NARROW:mode>_sxtw): Likewise.
24898 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24899 <VNx2_NARROW:mode>_uxtw): Likewise.
24900 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24901 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24902 <SVE_PARTIAL_I:mode>): Likewise.
24904 2023-06-21 Tamar Christina <tamar.christina@arm.com>
24907 * doc/md.texi: Replace backslashchar.
24909 2023-06-21 Richard Biener <rguenther@suse.de>
24911 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
24912 Overload. For masked main loops make sure the vectorization
24913 factor isn't more than double the number of iterations.
24915 2023-06-21 Jan Beulich <jbeulich@suse.com>
24917 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
24918 value duplication by ix86_build_signbit_mask() when AVX512F and
24920 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
24921 2-alternative form. Adjust "mode" attribute. Add "enabled"
24923 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
24924 && !TARGET_PREFER_AVX256.
24925 (*<avx512>_vpternlog<mode>_2): Likewise.
24926 (*<avx512>_vpternlog<mode>_3): Likewise.
24928 2023-06-21 liuhongt <hongtao.liu@intel.com>
24931 * tree-vect-stmts.cc (vectorizable_conversion): Use
24932 intermiediate integer type for float_expr/fix_trunc_expr when
24933 direct optab is not existed.
24935 2023-06-20 Tamar Christina <tamar.christina@arm.com>
24937 PR bootstrap/110324
24938 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
24940 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
24942 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
24943 register operand to the stack pointer. Require the second register
24944 operand to have the number specified in a separate const_int operand.
24945 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
24946 (aarch64_allocate_and_probe_stack_space): Use it.
24947 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
24948 (aarch64_expand_epilogue): Likewise.
24950 2023-06-20 Jakub Jelinek <jakub@redhat.com>
24952 PR middle-end/79173
24953 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
24954 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
24957 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
24959 * calls.h (setjmp_call_p): Change return type from int to bool.
24960 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
24961 (store_one_arg): Change return type from int to bool
24962 and adjust function body accordingly. Change "sibcall_failure"
24964 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
24965 argument to bool. Change "partial_seen" variable to bool.
24966 (load_register_parameters): Change *sibcall_failure
24967 pointer argument to bool.
24968 (check_sibcall_argument_overlap_1): Change return type from int to bool
24969 and adjust function body accordingly.
24970 (check_sibcall_argument_overlap): Ditto. Change
24971 "mark_stored_args_map" argument to bool.
24972 (emit_call_1): Change "already_popped" variable to bool.
24973 (setjmp_call_p): Change return type from int to bool
24974 and adjust function body accordingly.
24975 (initialize_argument_information): Change *must_preallocate
24976 pointer argument to bool.
24977 (expand_call): Change "pcc_struct_value", "must_preallocate"
24978 and "sibcall_failure" variables to bool.
24979 (emit_library_call_value_1): Change "pcc_struct_value"
24982 2023-06-20 Martin Jambor <mjambor@suse.cz>
24985 * ipa-sra.cc (struct caller_issues): New field there_is_one.
24986 (check_for_caller_issues): Set it.
24987 (check_all_callers_for_issues): Check it.
24989 2023-06-20 Martin Jambor <mjambor@suse.cz>
24991 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
24992 (struct ipcp_transformation): Rearrange members according to
24993 C++ class coding convention, add m_uid_to_idx,
24994 get_param_index and maybe_create_parm_idx_map.
24995 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
24996 (compare_uids): Likewise.
24997 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
24998 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
24999 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
25000 (ipcp_update_vr): Likewise.
25001 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
25002 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
25004 2023-06-20 Carl Love <cel@us.ibm.com>
25006 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
25007 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
25008 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
25009 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
25010 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
25011 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
25012 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
25013 * config/rs6000/rs6000-builtins.def
25014 (__builtin_vsx_scalar_extract_exp_to_vec,
25015 __builtin_vsx_scalar_extract_sig_to_vec,
25016 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
25017 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
25018 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
25019 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
25020 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
25021 overloaded instance. Update comments.
25022 * config/rs6000/rs6000-overload.def
25023 (__builtin_vec_scalar_insert_exp): Add new overload definition with
25025 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
25026 overloaded definitions.
25027 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
25028 (DI_to_TI): New mode attribute.
25029 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
25030 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
25031 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
25032 * doc/extend.texi (scalar_extract_exp_to_vec,
25033 scalar_extract_sig_to_vec): Add documentation for new builtins.
25034 (scalar_insert_exp): Add new overloaded builtin definition.
25036 2023-06-20 Li Xu <xuli1@eswincomputing.com>
25038 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
25039 size of vector mask mode to one rvv register.
25041 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25043 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
25045 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
25047 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
25050 2023-06-20 Richard Biener <rguenther@suse.de>
25052 * tree-ssa-dse.cc (dse_classify_store): When we found
25053 no defs and the basic-block with the original definition
25054 ends in __builtin_unreachable[_trap] the store is dead.
25056 2023-06-20 Richard Biener <rguenther@suse.de>
25058 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
25059 keep the virtual SSA form up-to-date.
25061 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25063 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
25064 New define_insn_and_split.
25066 2023-06-20 Tamar Christina <tamar.christina@arm.com>
25068 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
25070 2023-06-20 Jan Beulich <jbeulich@suse.com>
25072 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
25073 constraint. Add new AVX512F alternative.
25075 2023-06-20 Richard Biener <rguenther@suse.de>
25078 * dwarf2out.cc (process_scope_var): Continue processing
25079 the decl after setting a parent in case the existing DIE
25082 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
25084 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
25085 (riscv_arg_has_vector): Simplify.
25086 (riscv_pass_in_vector_p): Adjust warning message.
25088 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
25090 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
25091 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
25092 * config/riscv/riscv.md (riscv_frcsr): New patterns.
25093 (riscv_fscsr): Likewise.
25095 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
25097 PR rtl-optimization/110305
25098 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
25099 Handle HONOR_SNANS for x + 0.0.
25101 2023-06-19 Jan Hubicka <jh@suse.cz>
25103 PR tree-optimization/109811
25104 PR tree-optimization/109849
25105 * passes.def: Add phiprop to early optimization passes.
25106 * tree-ssa-phiprop.cc: Allow clonning.
25108 2023-06-19 Tamar Christina <tamar.christina@arm.com>
25110 * config/aarch64/aarch64.md (arches): Add nosimd.
25111 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
25114 2023-06-19 Tamar Christina <tamar.christina@arm.com>
25115 Omar Tahir <Omar.Tahir2@arm.com>
25117 * gensupport.cc (class conlist, add_constraints, add_attributes,
25118 skip_spaces, expect_char, preprocess_compact_syntax,
25119 parse_section_layout, parse_section, convert_syntax): New.
25120 (process_rtx): Check for conversion.
25121 * genoutput.cc (process_template): Check for unresolved iterators.
25122 (class data): Add compact_syntax_p.
25123 (gen_insn): Use it.
25124 * gensupport.h (compact_syntax): New.
25125 (hash-set.h): Include.
25126 * doc/md.texi: Document it.
25128 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
25130 * recog.h (check_asm_operands): Change return type from int to bool.
25131 (insn_invalid_p): Ditto.
25132 (verify_changes): Ditto.
25133 (apply_change_group): Ditto.
25134 (constrain_operands): Ditto.
25135 (constrain_operands_cached): Ditto.
25136 (validate_replace_rtx_subexp): Ditto.
25137 (validate_replace_rtx): Ditto.
25138 (validate_replace_rtx_part): Ditto.
25139 (validate_replace_rtx_part_nosimplify): Ditto.
25140 (added_clobbers_hard_reg_p): Ditto.
25141 (peep2_regno_dead_p): Ditto.
25142 (peep2_reg_dead_p): Ditto.
25143 (store_data_bypass_p): Ditto.
25144 (if_test_bypass_p): Ditto.
25145 * rtl.h (split_all_insns_noflow): Change
25146 return type from unsigned int to void.
25147 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
25148 of generated added_clobbers_hard_reg_p from int to bool and adjust
25149 function body accordingly. Change "used" variable type from
25151 * recog.cc (check_asm_operands): Change return type
25152 from int to bool and adjust function body accordingly.
25153 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
25154 (verify_changes): Change return type from int to bool.
25155 (apply_change_group): Change return type from int to bool
25156 and adjust function body accordingly.
25157 (validate_replace_rtx_subexp): Change return type from int to bool.
25158 (validate_replace_rtx): Ditto.
25159 (validate_replace_rtx_part): Ditto.
25160 (validate_replace_rtx_part_nosimplify): Ditto.
25161 (constrain_operands_cached): Ditto.
25162 (constrain_operands): Ditto. Change "lose" and "win"
25163 variables type from int to bool.
25164 (split_all_insns_noflow): Change return type from unsigned int
25165 to void and adjust function body accordingly.
25166 (peep2_regno_dead_p): Change return type from int to bool.
25167 (peep2_reg_dead_p): Ditto.
25168 (peep2_find_free_register): Change "success"
25169 variable type from int to bool
25170 (store_data_bypass_p_1): Change return type from int to bool.
25171 (store_data_bypass_p): Ditto.
25173 2023-06-19 Li Xu <xuli1@eswincomputing.com>
25175 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
25178 2023-06-19 Pan Li <pan2.li@intel.com>
25181 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
25183 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
25184 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
25185 VF_ZVE63 and VF_ZVE32.
25186 * config/riscv/vector.md
25187 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
25188 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
25189 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
25190 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
25191 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
25192 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
25193 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
25194 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
25195 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
25196 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
25198 2023-06-19 Pan Li <pan2.li@intel.com>
25201 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
25203 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
25204 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
25205 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
25206 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
25207 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
25208 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
25209 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
25210 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
25211 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
25212 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
25213 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
25214 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
25215 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
25216 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
25218 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
25220 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
25221 (gcn_init_libfuncs): Add div and mod functions for all modes.
25222 Add placeholders for divmod functions.
25223 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
25225 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
25227 * tree-vect-generic.cc: Include optabs-libfuncs.h.
25228 (get_compute_type): Check optab_libfunc.
25229 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
25230 (vectorizable_operation): Check optab_libfunc.
25232 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
25234 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
25235 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
25236 (V_MOV, V_MOV_ALT): Likewise.
25237 (scalar_mode, SCALAR_MODE): Add TImode.
25238 (vnsi, VnSI, vndi, VnDI): Likewise.
25239 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
25240 (mov<mode>, mov<mode>_unspec): Use V_MOV.
25241 (*mov<mode>_4reg): New insn.
25242 (mov<mode>_exec): New 4reg variant.
25243 (mov<mode>_sgprbase): Likewise.
25244 (reload_in<mode>, reload_out<mode>): Use V_MOV.
25245 (vec_set<mode>): Likewise.
25246 (vec_duplicate<mode><exec>): New 4reg variant.
25247 (vec_extract<mode><scalar_mode>): Likewise.
25248 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
25249 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
25250 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
25251 (fold_extract_last_<mode>): Use V_MOV.
25252 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
25253 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
25254 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
25255 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
25256 gather<mode>_insn_2offsets<exec>): Use V_MOV.
25257 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
25258 scatter<mode>_insn_1offset<exec_scatter>,
25259 scatter<mode>_insn_1offset_ds<exec_scatter>,
25260 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
25261 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
25262 mask_scatter_store<mode><vnsi>): Likewise.
25263 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
25264 (gcn_hard_regno_mode_ok): Likewise.
25265 (GEN_VNM): Add TImode support.
25266 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
25267 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
25268 V8TImode, and V2TImode.
25269 (print_operand): Add 'J' and 'K' print codes.
25271 2023-06-19 Richard Biener <rguenther@suse.de>
25273 PR tree-optimization/110298
25274 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
25275 Clear number of iterations info before cleaning up the CFG.
25277 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25279 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
25280 Simplify vec_concat of lowpart subreg and high part vec_select.
25282 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
25284 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
25286 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
25288 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
25289 Handle null niters_skip.
25291 2023-06-19 Richard Biener <rguenther@suse.de>
25293 * config/aarch64/aarch64.cc
25294 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
25295 to LOOP_VINFO_MASKS.
25297 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
25300 * common/config/avr/avr-common.cc: Remove setting
25301 of OPT_fdelete_null_pointer_checks.
25302 * config/avr/avr.cc (avr_option_override): Clear
25303 flag_delete_null_pointer_checks if zero_address_valid.
25304 (avr_addr_space_zero_address_valid): New function.
25305 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
25308 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25309 Robin Dapp <rdapp.gcc@gmail.com>
25311 * doc/md.texi: Add len_mask{load,store}.
25312 * genopinit.cc (main): Ditto.
25314 * internal-fn.cc (len_maskload_direct): Ditto.
25315 (len_maskstore_direct): Ditto.
25316 (expand_call_mem_ref): Ditto.
25317 (expand_partial_load_optab_fn): Ditto.
25318 (expand_len_maskload_optab_fn): Ditto.
25319 (expand_partial_store_optab_fn): Ditto.
25320 (expand_len_maskstore_optab_fn): Ditto.
25321 (direct_len_maskload_optab_supported_p): Ditto.
25322 (direct_len_maskstore_optab_supported_p): Ditto.
25323 * internal-fn.def (LEN_MASK_LOAD): Ditto.
25324 (LEN_MASK_STORE): Ditto.
25325 * optabs.def (OPTAB_CD): Ditto.
25327 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
25329 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
25331 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
25333 * config/riscv/autovec.md (<optab><mode>3): Implement binop
25335 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
25336 (enum vxrm_field_enum): Rename this...
25337 (enum fixed_point_rounding_mode): ...to this.
25338 (enum frm_field_enum): Rename this...
25339 (enum floating_point_rounding_mode): ...to this.
25340 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
25341 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
25343 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
25344 (riscv_excess_precision): Do not convert to float for ZVFH.
25345 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
25347 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
25349 * config/riscv/vector-iterators.md: Add VI_QH iterator.
25350 * config/riscv/autovec-opt.md
25351 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
25352 that includes sign extension.
25353 (@pred_extract_first_sextsi<mode>): Dito for SImode.
25355 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
25357 * config/riscv/autovec.md (vec_set<mode>): Implement.
25358 (vec_extract<mode><vel>): Implement.
25359 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
25360 (emit_vlmax_slide_insn): Declare.
25361 (emit_nonvlmax_slide_tu_insn): Declare.
25362 (emit_scalar_move_insn): Export.
25363 (emit_nonvlmax_integer_move_insn): Export.
25364 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
25365 (emit_nonvlmax_slide_tu_insn): New function.
25366 (emit_vlmax_masked_mu_insn): No change.
25367 (emit_vlmax_integer_move_insn): Export.
25369 2023-06-19 Richard Biener <rguenther@suse.de>
25371 * tree-vectorizer.h (enum vect_partial_vector_style): New.
25372 (_loop_vec_info::partial_vector_style): Likewise.
25373 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
25374 (rgroup_controls::compare_type): Add.
25375 (vec_loop_masks): Change from a typedef to auto_vec<>
25377 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
25378 Adjust. Convert niters_skip to compare_type.
25379 (vect_set_loop_condition_partial_vectors_avx512): New function
25380 implementing the AVX512 partial vector codegen.
25381 (vect_set_loop_condition): Dispatch to the correct
25382 vect_set_loop_condition_partial_vectors_* function based on
25383 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
25384 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
25385 in the original niter type.
25386 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
25387 partial_vector_style.
25388 (can_produce_all_loop_masks_p): Adjust.
25389 (vect_verify_full_masking): Produce the rgroup_controls vector
25390 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
25391 (vect_verify_full_masking_avx512): New function implementing
25392 verification of AVX512 style masking.
25393 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
25394 (vect_analyze_loop_2): Also try AVX512 style masking.
25396 (vect_estimate_min_profitable_iters): Implement AVX512 style
25397 mask producing cost.
25398 (vect_record_loop_mask): Do not build the rgroup_controls
25399 vector here but record masks in a hash-set.
25400 (vect_get_loop_mask): Implement AVX512 style mask query,
25401 complementing the existing while_ult style.
25403 2023-06-19 Richard Biener <rguenther@suse.de>
25405 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
25407 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
25408 (vectorize_fold_left_reduction): Adjust.
25409 (vect_transform_reduction): Likewise.
25410 (vectorizable_live_operation): Likewise.
25411 * tree-vect-stmts.cc (vectorizable_call): Likewise.
25412 (vectorizable_operation): Likewise.
25413 (vectorizable_store): Likewise.
25414 (vectorizable_load): Likewise.
25415 (vectorizable_condition): Likewise.
25417 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
25420 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
25421 Add Optimization option property.
25423 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
25425 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
25426 Add new pattern for the abovementioned case.
25428 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
25430 * config/xtensa/xtensa.cc
25431 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
25433 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
25435 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
25437 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
25439 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
25441 2023-06-19 liuhongt <hongtao.liu@intel.com>
25444 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
25446 (sse2_packsswb<mask_name>): .. this, ..
25447 (avx2_packsswb<mask_name>): .. this and ..
25448 (avx512bw_packsswb<mask_name>): .. this.
25449 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
25450 (sse2_packssdw<mask_name>): .. this, ..
25451 (avx2_packssdw<mask_name>): .. this and ..
25452 (avx512bw_packssdw<mask_name>): .. this.
25454 2023-06-19 liuhongt <hongtao.liu@intel.com>
25457 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
25458 UNSPEC_US_TRUNCATE instead of original us_truncate for
25460 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
25462 (mmx_packsswb): .. this and ..
25463 (mmx_packuswb): .. this.
25464 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
25466 (s_trunsuffix): Removed code iterator.
25467 (any_s_truncate): Ditto.
25468 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
25469 UNSPEC_US_TRUNCATE instead of original us_truncate.
25470 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
25471 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
25473 2023-06-18 Pan Li <pan2.li@intel.com>
25475 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
25477 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
25479 * rtl.h (*rtx_equal_p_callback_function):
25480 Change return type from int to bool.
25481 (rtx_equal_p): Ditto.
25482 (*hash_rtx_callback_function): Ditto.
25483 * rtl.cc (rtx_equal_p): Change return type from int to bool
25484 and adjust function body accordingly.
25485 * early-remat.cc (scratch_equal): Ditto.
25486 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
25487 (hash_with_unspec_callback): Ditto.
25489 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
25491 * config/arc/arc.md (movqi_insn): Allow certain constants to
25492 be stored into memory in the pattern's condition.
25493 (movsf_insn): Similarly.
25495 2023-06-18 Honza <jh@ryzen3.suse.cz>
25497 PR tree-optimization/109849
25498 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
25499 ES; handle ipa_predicate::not_sra_candidate.
25500 (evaluate_properties_for_edge): Pass es to
25501 evaluate_conditions_for_known_args.
25502 (ipa_fn_summary_t::duplicate): Handle sra candidates.
25503 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
25504 (load_or_store_of_ptr_parameter): New function.
25505 (points_to_possible_sra_candidate_p): New function.
25506 (analyze_function_body): Initialize points_to_possible_sra_candidate;
25507 determine sra predicates.
25508 (estimate_ipcp_clone_size_and_time): Update call of
25509 evaluate_conditions_for_known_args.
25510 (remap_edge_params): Update points_to_possible_sra_candidate.
25511 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
25512 (write_ipa_call_summary): Likewise.
25513 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
25514 (dump_condition): Dump it.
25515 * ipa-predicate.h (struct inline_param_summary): Add
25516 points_to_possible_sra_candidate.
25518 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
25520 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
25521 function for setting the carry flag.
25522 (ix86_expand_builtin) <handlecarry>: Use it here.
25523 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
25524 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
25525 (usubc<mode>5): Likewise.
25527 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
25529 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
25530 for the immediate constant shift count.
25531 (*concat<mode><dwi>3_2): Likewise.
25532 (*concat<mode><dwi>3_3): Likewise.
25533 (*concat<mode><dwi>3_4): Likewise.
25534 (*concat<mode><dwi>3_5): Likewise.
25535 (*concat<mode><dwi>3_6): Likewise.
25537 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
25539 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
25540 (hash_rtx): Remove.
25541 * early-remat.cc (remat_candidate_hasher::equal): Update
25542 to call rtx_equal_p with rtx_equal_p_callback_function argument.
25543 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
25544 (rtx_equal_p): Remove.
25545 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
25546 argument with NULL default value.
25547 (rtx_equal_p_cb): Remove function declaration.
25548 (hash_rtx_cb): Ditto.
25549 (hash_rtx): Add hash_rtx_callback_function argument
25550 with NULL default value.
25551 * sel-sched-ir.cc (free_nop_pool): Update function comment.
25552 (skip_unspecs_callback): Ditto.
25553 (vinsn_init): Update to call hash_rtx with
25554 hash_rtx_callback_function argument.
25555 (vinsn_equal_p): Ditto.
25557 2023-06-18 yulong <shiyulong@iscas.ac.cn>
25559 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
25560 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
25561 (ADJUST_ALIGNMENT): Ditto.
25562 (RVV_TUPLE_PARTIAL_MODES): Ditto.
25563 (ADJUST_NUNITS): Ditto.
25564 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
25566 (vfloat16mf4x3_t): Ditto.
25567 (vfloat16mf4x4_t): Ditto.
25568 (vfloat16mf4x5_t): Ditto.
25569 (vfloat16mf4x6_t): Ditto.
25570 (vfloat16mf4x7_t): Ditto.
25571 (vfloat16mf4x8_t): Ditto.
25572 (vfloat16mf2x2_t): Ditto.
25573 (vfloat16mf2x3_t): Ditto.
25574 (vfloat16mf2x4_t): Ditto.
25575 (vfloat16mf2x5_t): Ditto.
25576 (vfloat16mf2x6_t): Ditto.
25577 (vfloat16mf2x7_t): Ditto.
25578 (vfloat16mf2x8_t): Ditto.
25579 (vfloat16m1x2_t): Ditto.
25580 (vfloat16m1x3_t): Ditto.
25581 (vfloat16m1x4_t): Ditto.
25582 (vfloat16m1x5_t): Ditto.
25583 (vfloat16m1x6_t): Ditto.
25584 (vfloat16m1x7_t): Ditto.
25585 (vfloat16m1x8_t): Ditto.
25586 (vfloat16m2x2_t): Ditto.
25587 (vfloat16m2x3_t): Ditto.
25588 (vfloat16m2x4_t): Ditto.
25589 (vfloat16m4x2_t): Ditto.
25590 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
25591 (vfloat16mf4x3_t): Ditto.
25592 (vfloat16mf4x4_t): Ditto.
25593 (vfloat16mf4x5_t): Ditto.
25594 (vfloat16mf4x6_t): Ditto.
25595 (vfloat16mf4x7_t): Ditto.
25596 (vfloat16mf4x8_t): Ditto.
25597 (vfloat16mf2x2_t): Ditto.
25598 (vfloat16mf2x3_t): Ditto.
25599 (vfloat16mf2x4_t): Ditto.
25600 (vfloat16mf2x5_t): Ditto.
25601 (vfloat16mf2x6_t): Ditto.
25602 (vfloat16mf2x7_t): Ditto.
25603 (vfloat16mf2x8_t): Ditto.
25604 (vfloat16m1x2_t): Ditto.
25605 (vfloat16m1x3_t): Ditto.
25606 (vfloat16m1x4_t): Ditto.
25607 (vfloat16m1x5_t): Ditto.
25608 (vfloat16m1x6_t): Ditto.
25609 (vfloat16m1x7_t): Ditto.
25610 (vfloat16m1x8_t): Ditto.
25611 (vfloat16m2x2_t): Ditto.
25612 (vfloat16m2x3_t): Ditto.
25613 (vfloat16m2x4_t): Ditto.
25614 (vfloat16m4x2_t): Ditto.
25615 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
25616 * config/riscv/riscv.md: New.
25617 * config/riscv/vector-iterators.md: New.
25619 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
25621 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
25622 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
25623 Generalize special case for converting TImode to V1TImode to handle
25624 all 128-bit vector conversions.
25626 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
25628 * gcc-ar.cc (main): Refactor to slightly reduce code
25629 duplication. Avoid unnecessary elements in nargv.
25631 2023-06-16 Pan Li <pan2.li@intel.com>
25634 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
25635 integer reduction expand.
25636 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
25637 and the LMUL1 attr respectively.
25638 * config/riscv/vector.md
25639 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
25640 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
25641 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
25642 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
25643 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
25644 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
25645 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
25647 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25650 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
25652 2023-06-16 Jakub Jelinek <jakub@redhat.com>
25654 PR middle-end/79173
25655 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
25656 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
25657 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
25659 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
25660 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
25661 * builtins.cc (fold_builtin_addc_subc): New function.
25662 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
25663 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
25665 2023-06-16 Jakub Jelinek <jakub@redhat.com>
25667 PR tree-optimization/110271
25668 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
25669 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
25670 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
25672 2023-06-16 Martin Jambor <mjambor@suse.cz>
25674 * configure: Regenerate.
25676 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
25677 Uros Bizjak <ubizjak@gmail.com>
25680 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
25681 define_insn_and_split combine *add<dwi>3_doubleword with
25682 a *concat<mode><dwi>3 for more efficient lowering after reload.
25684 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
25686 * ira-lives.cc: Include except.h.
25687 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
25688 when the pseudo does not live at the exception landing pad.
25690 2023-06-16 Alex Coplan <alex.coplan@arm.com>
25692 * doc/invoke.texi: Document -Welaborated-enum-base.
25694 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25696 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
25697 (ushrn2_n): ... This.
25698 (sqshrn2_n): Rename builtins to...
25699 (ssqshrn2_n): ... This.
25700 (uqshrn2_n): Rename builtins to...
25701 (uqushrn2_n): ... This.
25702 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
25703 (vqshrn_high_n_s32): Likewise.
25704 (vqshrn_high_n_s64): Likewise.
25705 (vqshrn_high_n_u16): Likewise.
25706 (vqshrn_high_n_u32): Likewise.
25707 (vqshrn_high_n_u64): Likewise.
25708 (vshrn_high_n_s16): Likewise.
25709 (vshrn_high_n_s32): Likewise.
25710 (vshrn_high_n_s64): Likewise.
25711 (vshrn_high_n_u16): Likewise.
25712 (vshrn_high_n_u32): Likewise.
25713 (vshrn_high_n_u64): Likewise.
25714 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
25716 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
25717 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
25718 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
25719 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
25720 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
25721 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
25722 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
25723 Update expander for the above.
25725 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25727 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
25728 (shrn2_n): ... This.
25729 (rshrn2): Rename builtins to...
25730 (rshrn2_n): ... This.
25731 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
25732 (vrshrn_high_n_s32): Likewise.
25733 (vrshrn_high_n_s64): Likewise.
25734 (vrshrn_high_n_u16): Likewise.
25735 (vrshrn_high_n_u32): Likewise.
25736 (vrshrn_high_n_u64): Likewise.
25737 (vshrn_high_n_s16): Likewise.
25738 (vshrn_high_n_s32): Likewise.
25739 (vshrn_high_n_s64): Likewise.
25740 (vshrn_high_n_u16): Likewise.
25741 (vshrn_high_n_u32): Likewise.
25742 (vshrn_high_n_u64): Likewise.
25743 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
25745 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
25746 (aarch64_shrn2<mode>_insn_le): Likewise.
25747 (aarch64_shrn2<mode>_insn_be): Likewise.
25748 (aarch64_shrn2<mode>): Likewise.
25749 (aarch64_rshrn2<mode>_insn_le): Likewise.
25750 (aarch64_rshrn2<mode>_insn_be): Likewise.
25751 (aarch64_rshrn2<mode>): Likewise.
25752 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
25753 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
25754 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
25755 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
25756 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
25757 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
25758 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
25759 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
25760 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
25761 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
25762 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
25763 (aarch64_sqshrun2_n<mode>): New define_expand.
25764 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
25765 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
25766 (aarch64_sqrshrun2_n<mode>): New define_expand.
25767 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
25768 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
25769 Delete unspec values.
25770 (VQSHRN_N): Delete int iterator.
25772 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25774 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
25775 * config/aarch64/aarch64-simd.md
25776 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
25777 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
25778 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
25779 * config/aarch64/iterators.md (shrn_s): New code attribute.
25781 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25783 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
25785 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
25786 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
25787 (aarch64_sqrshrun_n<mode>_insn): Likewise.
25788 (aarch64_sqshrun_n<mode>_insn): Likewise.
25789 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
25790 (aarch64_sqshrun_n<mode>): Likewise.
25791 (aarch64_sqrshrun_n<mode>): Likewise.
25792 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
25794 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25796 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
25797 (shrn_n): ... This.
25798 (rshrn): Rename builtins to...
25799 (rshrn_n): ... This.
25800 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
25801 (vshrn_n_s32): Likewise.
25802 (vshrn_n_s64): Likewise.
25803 (vshrn_n_u16): Likewise.
25804 (vshrn_n_u32): Likewise.
25805 (vshrn_n_u64): Likewise.
25806 (vrshrn_n_s16): Likewise.
25807 (vrshrn_n_s32): Likewise.
25808 (vrshrn_n_s64): Likewise.
25809 (vrshrn_n_u16): Likewise.
25810 (vrshrn_n_u32): Likewise.
25811 (vrshrn_n_u64): Likewise.
25812 * config/aarch64/aarch64-simd.md
25813 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
25814 (aarch64_shrn<mode>): Likewise.
25815 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
25816 (aarch64_rshrn<mode>): Likewise.
25817 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
25818 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
25819 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
25820 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
25821 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
25822 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
25823 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
25824 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
25825 (aarch64_sqshrun_n<mode>): Likewise.
25826 (aarch64_sqrshrun_n<mode>): Likewise.
25827 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
25828 (TRUNCEXTEND): New code attribute.
25829 (TRUNC_SHIFT): Likewise.
25830 (shrn_op): Likewise.
25831 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
25834 2023-06-16 Pan Li <pan2.li@intel.com>
25836 * config/riscv/riscv-vsetvl.cc
25837 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
25839 2023-06-16 Richard Biener <rguenther@suse.de>
25841 PR tree-optimization/110278
25842 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
25843 (x != (typeof x)(x == 0) -> true): Likewise.
25845 2023-06-16 Pali Rohár <pali@kernel.org>
25847 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
25848 (REAL_LIBGCC_SPEC): New define.
25849 * config/i386/mingw.opt: Add mcrtdll=
25850 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
25851 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
25852 (STARTFILE_SPEC): Adjust for -mcrtdll=.
25853 * doc/invoke.texi: Add mcrtdll= documentation.
25855 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
25857 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
25858 (mips_handle_code_readable_attr):New static function.
25859 (mips_get_code_readable_attr):New static enum function.
25860 (mips_set_current_function):Set the code_readable mode.
25861 (mips_option_override):Same as above.
25862 * doc/extend.texi:Document code_readable.
25864 2023-06-16 Richard Biener <rguenther@suse.de>
25866 PR tree-optimization/110269
25867 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
25868 with tree_expr_nonzero_p ...
25869 * match.pd (cmp (convert? addr@0) integer_zerop): With this
25872 2023-06-15 Marek Polacek <polacek@redhat.com>
25874 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
25875 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
25876 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
25877 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
25878 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
25880 * configure: Regenerate.
25881 * doc/install.texi: Document --enable-host-pie.
25883 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
25885 * regcprop.cc (maybe_mode_change): Enable stack pointer
25888 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
25890 PR tree-optimization/110266
25891 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
25893 (adjust_realpart_expr): Ditto.
25895 2023-06-15 Jan Beulich <jbeulich@suse.com>
25897 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
25900 2023-06-15 Jan Beulich <jbeulich@suse.com>
25902 * config/i386/constraints.md: Mention k and r for B.
25904 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
25905 Andrew Pinski <apinski@marvell.com>
25908 * config/loongarch/loongarch.md: Modify the register constraints for template
25909 "jumptable" and "indirect_jump" from "r" to "e".
25911 2023-06-15 Xi Ruoyao <xry111@xry111.site>
25913 * config/loongarch/loongarch-tune.h (loongarch_align): New
25915 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
25917 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
25919 * config/loongarch/loongarch.cc
25920 (loongarch_option_override_internal): Set the value of
25921 -falign-functions= if -falign-functions is enabled but no value
25922 is given. Likewise for -falign-labels=.
25924 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25926 PR middle-end/79173
25927 * internal-fn.def (UADDC, USUBC): New internal functions.
25928 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
25929 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
25930 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
25931 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
25932 match_uaddc_usubc): New functions.
25933 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
25934 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
25935 other optimizations have been successful for those.
25936 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
25937 * fold-const-call.cc (fold_const_call): Likewise.
25938 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
25939 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
25940 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
25942 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
25943 define_expand patterns.
25944 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
25945 into NOTE_INSN_DELETED note rather than nop instruction.
25946 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
25949 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25951 PR middle-end/79173
25952 * config/i386/i386.md (subborrow<mode>): Add alternative with
25953 memory destination and add for it define_peephole2
25954 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
25955 destination in these patterns.
25957 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25959 PR middle-end/79173
25960 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
25961 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
25962 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
25963 using memory destination in these patterns.
25965 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25967 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
25968 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
25969 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
25970 * fold-const-call.cc (fold_const_call): ... here.
25972 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
25974 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
25975 Rename to <su>abd<mode>3.
25976 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
25979 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
25981 * doc/md.texi (sabd, uabd): Document them.
25982 * internal-fn.def (ABD): Use new optab.
25983 * optabs.def (sabd_optab, uabd_optab): New optabs,
25984 * tree-vect-patterns.cc (vect_recog_absolute_difference):
25985 Recognize the following idiom abs (a - b).
25986 (vect_recog_sad_pattern): Refactor to use
25987 vect_recog_absolute_difference.
25988 (vect_recog_abd_pattern): Use patterns found by
25989 vect_recog_absolute_difference to build a new ABD
25992 2023-06-15 chenxiaolong <chenxl04200420@163.com>
25994 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
25995 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
25997 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25999 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
26000 (expand_vec_perm_const_1): Add merge optmization.
26002 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
26005 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
26006 (riscv_pass_by_reference): Return true for vector mode
26008 2023-06-15 Pan Li <pan2.li@intel.com>
26010 * config/riscv/autovec-opt.md: Align the predictor sytle.
26011 * config/riscv/autovec.md: Ditto.
26013 2023-06-15 Pan Li <pan2.li@intel.com>
26015 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
26016 Take elen instead of scalar BITS_PER_WORD.
26017 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
26018 instead of scaler BITS_PER_WORD.
26020 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
26022 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
26024 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26026 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
26027 Fix signed comparison warning in loop from npats to enelts.
26029 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
26031 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
26032 to offloading compilation.
26033 * config/gcn/mkoffload.cc (main): Adjust.
26034 * config/nvptx/mkoffload.cc (main): Likewise.
26035 * doc/invoke.texi (foffload-options): Update example.
26037 2023-06-14 liuhongt <hongtao.liu@intel.com>
26040 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
26041 for alternative 2 since there's no evex version for vpcmpeqd
26044 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
26046 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
26048 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
26050 * config/sh/divtab.cc: Remove.
26052 2023-06-13 Jakub Jelinek <jakub@redhat.com>
26054 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
26055 superfluous spaces around \t for vpcmpeqd.
26057 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
26059 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
26060 clearing vectors with only a single element. Set CLEARED if the
26061 vector was initialized to zero.
26063 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
26065 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
26068 (TUPLE_ENTRY): Undef.
26070 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26072 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
26073 (shuffle_generic_patterns): Ditto.
26074 (expand_vec_perm_const_1): Ditto.
26076 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26078 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
26079 (shuffle_decompress_patterns): Ditto.
26081 2023-06-13 Richard Biener <rguenther@suse.de>
26083 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
26085 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
26086 Kito Cheng <kito.cheng@sifive.com>
26088 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
26089 warning flag if func is not builtin
26090 * config/riscv/riscv.cc
26091 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
26092 (riscv_arg_has_vector): Determine whether the arg is vector type.
26093 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
26094 (riscv_init_cumulative_args): The same as header.
26095 (riscv_get_arg_info): Add the checking.
26096 (riscv_function_value): Check the func return and set warning flag
26097 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
26098 determine whether warning psabi or not.
26100 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26102 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
26103 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
26104 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
26105 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
26107 (arm_output_load_tpidr): Define.
26108 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
26109 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
26111 (reload_tp_hard): Likewise.
26112 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
26114 * doc/invoke.texi (Arm Options, mtp): Document new values.
26116 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26119 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
26120 AARCH64_TPIDRRO_EL0 value.
26121 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
26122 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
26123 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
26124 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
26126 2023-06-13 Alexandre Oliva <oliva@adacore.com>
26128 * range-op-float.cc (frange_nextafter): Drop inline.
26129 (frelop_early_resolve): Add static.
26130 (frange_float): Likewise.
26132 2023-06-13 Richard Biener <rguenther@suse.de>
26134 PR middle-end/110232
26135 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
26136 to check whether the buffer covers the whole vector.
26138 2023-06-13 Richard Biener <rguenther@suse.de>
26140 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
26141 .MASK_LOAD and friends set the size of the access to unknown.
26143 2023-06-13 Tejas Belagod <tbelagod@arm.com>
26146 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
26147 calls that have a constant input predicate vector.
26148 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
26149 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
26150 (svlast_impl::vect_all_same): Check if all vector elements are equal.
26152 2023-06-13 Andi Kleen <ak@linux.intel.com>
26154 * config/i386/gcc-auto-profile: Regenerate.
26156 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26158 * config/riscv/vector-iterators.md: Fix requirement.
26160 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26162 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
26163 (shuffle_decompress_patterns): New function.
26164 (expand_vec_perm_const_1): Add decompress optimization.
26166 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
26168 PR rtl-optimization/101188
26169 * postreload.cc (reload_cse_move2add_invalidate): New function,
26171 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
26173 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
26175 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
26176 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
26177 and if maxv == 1, use constant element for duplicating into register.
26179 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
26181 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
26182 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
26183 (gimplify_adjust_omp_clauses): Change
26184 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
26185 GOMP_MAP_FORCE_PRESENT.
26186 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
26187 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
26188 to/from clauses with present modifier.
26190 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26192 PR tree-optimization/110205
26193 * range-op-float.cc (range_operator::fold_range): Add default FII
26195 * range-op-mixed.h (class operator_gt): Add missing final overrides.
26196 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
26197 (operator_lshift ::update_bitmask): Add final override.
26198 (operator_rshift ::update_bitmask): Add final override.
26199 * range-op.h (range_operator::fold_range): Add FII prototype.
26201 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26203 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
26204 Use range_op_handler directly.
26205 * range-op.cc (range_op_handler::range_op_handler): Unsigned
26206 param instead of tree-code.
26207 (ptr_op_widen_plus_signed): Delete.
26208 (ptr_op_widen_plus_unsigned): Delete.
26209 (ptr_op_widen_mult_signed): Delete.
26210 (ptr_op_widen_mult_unsigned): Delete.
26211 (range_op_table::initialize_integral_ops): Add new opcodes.
26212 * range-op.h (range_op_handler): Use unsigned.
26213 (OP_WIDEN_MULT_SIGNED): New.
26214 (OP_WIDEN_MULT_UNSIGNED): New.
26215 (OP_WIDEN_PLUS_SIGNED): New.
26216 (OP_WIDEN_PLUS_UNSIGNED): New.
26217 (RANGE_OP_TABLE_SIZE): New.
26218 (range_op_table::operator []): Use unsigned.
26219 (range_op_table::set): Use unsigned.
26220 (m_range_tree): Make unsigned.
26221 (ptr_op_widen_mult_signed): Remove.
26222 (ptr_op_widen_mult_unsigned): Remove.
26223 (ptr_op_widen_plus_signed): Remove.
26224 (ptr_op_widen_plus_unsigned): Remove.
26226 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26228 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
26229 manually as there is no access to the default operator.
26230 (cfn_copysign::fold_range): Don't check for validity.
26231 (cfn_ubsan::fold_range): Ditto.
26232 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
26233 * range-op.cc (default_operator): New.
26234 (range_op_handler::range_op_handler): Use default_operator
26236 (range_op_handler::operator bool): Move from header, compare
26237 against default operator.
26238 (range_op_handler::range_op): New.
26239 * range-op.h (range_op_handler::operator bool): Move.
26241 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26243 * range-op.cc (unified_table): Delete.
26244 (range_op_table operator_table): Instantiate.
26245 (range_op_table::range_op_table): Rename from unified_table.
26246 (range_op_handler::range_op_handler): Use range_op_table.
26247 * range-op.h (range_op_table::operator []): Inline.
26248 (range_op_table::set): Inline.
26250 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26252 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
26254 * gimple-range-op.cc (get_code): Rename from get_code_and_type
26256 (gimple_range_op_handler::supported_p): No need for type.
26257 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
26258 (cfn_copysign::fold_range): Ditto.
26259 (cfn_ubsan::fold_range): Ditto.
26260 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
26261 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
26262 * range-op-float.cc (operator_plus::op1_range): Ditto.
26263 (operator_mult::op1_range): Ditto.
26264 (range_op_float_tests): Ditto.
26265 * range-op.cc (get_op_handler): Remove.
26266 (range_op_handler::set_op_handler): Remove.
26267 (operator_plus::op1_range): No need for type.
26268 (operator_minus::op1_range): Ditto.
26269 (operator_mult::op1_range): Ditto.
26270 (operator_exact_divide::op1_range): Ditto.
26271 (operator_cast::op1_range): Ditto.
26272 (perator_bitwise_not::fold_range): Ditto.
26273 (operator_negate::fold_range): Ditto.
26274 * range-op.h (range_op_handler::range_op_handler): Remove type param.
26275 (range_cast): No need for type.
26276 (range_op_table::operator[]): Check for enum_code >= 0.
26277 * tree-data-ref.cc (compute_distributive_range): No need for type.
26278 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
26279 * value-query.cc (range_query::get_tree_range): Ditto.
26280 * value-relation.cc (relation_oracle::validate_relation): Ditto.
26281 * vr-values.cc (range_of_var_in_loop): Ditto.
26282 (simplify_using_ranges::fold_cond_with_ops): Ditto.
26284 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26286 * range-op-mixed.h (operator_max): Remove final.
26287 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
26288 (pointer_table::pointer_table): Remove.
26289 (class hybrid_max_operator): New.
26290 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
26291 * range-op.cc (pointer_tree_table): Remove.
26292 (unified_table::unified_table): Comment out MAX_EXPR.
26293 (get_op_handler): Remove check of pointer table.
26294 * range-op.h (class pointer_table): Remove.
26296 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26298 * range-op-mixed.h (operator_min): Remove final.
26299 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
26300 (class hybrid_min_operator): New.
26301 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
26302 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
26304 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26306 * range-op-mixed.h (operator_bitwise_or): Remove final.
26307 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
26308 (class hybrid_or_operator): New.
26309 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
26310 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
26312 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26314 * range-op-mixed.h (operator_bitwise_and): Remove final.
26315 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
26316 (class hybrid_and_operator): New.
26317 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
26318 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
26320 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26322 * Makefile.in (OBJS): Add range-op-ptr.o.
26323 * range-op-mixed.h (update_known_bitmask): Move prototype here.
26324 (minus_op1_op2_relation_effect): Move prototype here.
26325 (wi_includes_zero_p): Move function to here.
26326 (wi_zero_p): Ditto.
26327 * range-op.cc (update_known_bitmask): Remove static.
26328 (wi_includes_zero_p): Move to header.
26329 (wi_zero_p): Move to header.
26330 (minus_op1_op2_relation_effect): Remove static.
26331 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
26332 (pointer_plus_operator): Ditto.
26333 (pointer_min_max_operator): Ditto.
26334 (pointer_and_operator): Ditto.
26335 (pointer_or_operator): Ditto.
26336 (pointer_table): Ditto.
26337 (range_op_table::initialize_pointer_ops): Ditto.
26338 * range-op-ptr.cc: New.
26340 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26342 * range-op-mixed.h (class operator_max): Move from...
26343 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
26344 (get_op_handler): Remove the integral table.
26345 (class operator_max): Move from here.
26346 (integral_table::integral_table): Delete.
26347 * range-op.h (class integral_table): Delete.
26349 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26351 * range-op-mixed.h (class operator_min): Move from...
26352 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
26353 (class operator_min): Move from here.
26354 (integral_table::integral_table): Remove MIN_EXPR.
26356 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26358 * range-op-mixed.h (class operator_bitwise_or): Move from...
26359 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
26360 (class operator_bitwise_or): Move from here.
26361 (integral_table::integral_table): Remove BIT_IOR_EXPR.
26363 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26365 * range-op-mixed.h (class operator_bitwise_and): Move from...
26366 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
26367 (get_op_handler): Check for a pointer table entry first.
26368 (class operator_bitwise_and): Move from here.
26369 (integral_table::integral_table): Remove BIT_AND_EXPR.
26371 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26373 * range-op-mixed.h (class operator_bitwise_xor): Move from...
26374 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
26375 (class operator_bitwise_xor): Move from here.
26376 (integral_table::integral_table): Remove BIT_XOR_EXPR.
26377 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
26379 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26381 * range-op-mixed.h (class operator_bitwise_not): Move from...
26382 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
26383 (class operator_bitwise_not): Move from here.
26384 (integral_table::integral_table): Remove BIT_NOT_EXPR.
26385 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
26387 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
26389 * range-op-mixed.h (class operator_addr_expr): Move from...
26390 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
26391 (class operator_addr_expr): Move from here.
26392 (integral_table::integral_table): Remove ADDR_EXPR.
26393 (pointer_table::pointer_table): Remove ADDR_EXPR.
26395 2023-06-12 Pan Li <pan2.li@intel.com>
26397 * config/riscv/riscv-vector-builtins-types.def
26398 (vfloat16m1_t): Add type to lmul1 ops.
26399 (vfloat16m2_t): Likewise.
26400 (vfloat16m4_t): Likewise.
26402 2023-06-12 Richard Biener <rguenther@suse.de>
26404 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
26405 .MASK_STORE and friend set the size of the access to
26408 2023-06-12 Tamar Christina <tamar.christina@arm.com>
26410 * config.in: Regenerate.
26411 * configure: Regenerate.
26412 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
26414 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26416 * config/riscv/autovec-opt.md
26417 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
26418 (*<any_shiftrt:optab>trunc<mode>): Ditto.
26419 * config/riscv/autovec.md (<optab><mode>3): Change to
26420 define_insn_and_split.
26421 (v<optab><mode>3): Ditto.
26422 (trunc<mode><v_double_trunc>2): Ditto.
26424 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26426 * simplify-rtx.cc (simplify_const_unary_operation):
26427 Handle US_TRUNCATE, SS_TRUNCATE.
26429 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
26432 * doc/gm2.texi (Standard procedures): Fix Next link.
26434 2023-06-12 Tamar Christina <tamar.christina@arm.com>
26436 * config.in: Regenerate.
26438 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
26440 PR middle-end/110142
26441 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
26442 subtype to vect_widened_op_tree and remove subtype parameter, also
26443 remove superfluous overloaded function definition.
26444 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
26445 to call to vect_recog_widen_op_pattern.
26446 (vect_recog_widen_minus_pattern): Likewise.
26448 2023-06-12 liuhongt <hongtao.liu@intel.com>
26450 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
26451 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
26452 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
26453 (vec_unpacks_lo_<mode>): Ditto.
26454 (vec_unpacks_hi_<mode>): Ditto.
26455 (sse_movlhps_<mode>): New define_insn.
26456 (ssse3_palignr<mode>_perm): Extend to V_128H.
26457 (V_128H): New mode iterator.
26458 (ssepackPHmode): New mode attribute.
26459 (vunpck_extract_mode): Ditto.
26460 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
26461 (vpckfloat_temp_mode): Ditto.
26462 (vpckfloat_op_mode): Ditto.
26463 (vunpckfixt_mode): Extend to VxHF.
26464 (vunpckfixt_model): Ditto.
26465 (vunpckfixt_extract_mode): Ditto.
26467 2023-06-12 Richard Biener <rguenther@suse.de>
26469 PR middle-end/110200
26470 * genmatch.cc (expr::gen_transform): Put braces around
26471 the if arm for the (convert ...) short-cut.
26473 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
26476 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
26477 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
26479 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
26482 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
26483 floating constant itself for real_to_target call.
26485 2023-06-12 Pan Li <pan2.li@intel.com>
26487 * config/riscv/riscv-vector-builtins-types.def
26488 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
26489 (vfloat16mf2_t): Ditto.
26490 (vfloat16m1_t): Ditto.
26491 (vfloat16m2_t): Ditto.
26492 (vfloat16m4_t): Ditto.
26494 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
26496 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
26497 Do not require a stack frame when debugging is enabled for AIX.
26499 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
26501 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
26502 Remove attribute values.
26503 (insv_notbit): New post-reload insn.
26504 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
26505 (*insv.not-bit.0_split, *insv.not-bit.7_split)
26506 (*insv.xor-extract_split): Split to insv_notbit.
26507 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
26508 (*insv.xor-extract): Remove post-reload insns.
26509 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
26510 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
26511 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
26512 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
26514 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
26517 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
26518 (MSB, SIZE): New mode attributes.
26519 (any_shift): New code iterator.
26520 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
26521 (*lshr<mode>3_const_split): Add constraint alternative for
26522 the case of shift-offset = MSB. Ditch "length" attribute.
26523 (extzv<mode): New. replaces extzv. Adjust following patterns.
26524 Use avr_out_extr, avr_out_extr_not to print asm.
26525 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
26526 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
26527 * config/avr/constraints.md (C15, C23, C31, Yil): New
26528 * config/avr/predicates.md (reg_or_low_io_operand)
26529 (const7_operand, reg_or_low_io_operand)
26530 (const15_operand, const_0_to_15_operand)
26531 (const23_operand, const_0_to_23_operand)
26532 (const31_operand, const_0_to_31_operand): New.
26533 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
26534 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
26535 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
26536 MSB case to new insn constraint "r" for operands[1].
26537 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
26538 Handle these cases.
26539 (avr_rtx_costs_1): Adjust cost for a new pattern.
26541 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26543 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
26544 (vector_insn_info::parse_insn): Add rtx_insn parse.
26545 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
26546 (get_first_vsetvl): New function.
26547 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
26548 (pass_vsetvl::cleanup_insns): Remove it.
26549 (pass_vsetvl::ssa_post_optimization): New function.
26550 (has_no_uses): Ditto.
26551 (pass_vsetvl::propagate_avl): Remove it.
26552 (pass_vsetvl::df_post_optimization): New function.
26553 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
26554 * config/riscv/riscv-vsetvl.h: Adapt declaration.
26556 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
26558 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
26559 (ipcp_vr_lattice::print): Call dump method.
26560 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
26562 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
26563 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
26565 (initialize_node_lattices): Pass type when appropriate.
26566 (ipa_vr_operation_and_type_effects): Make type agnostic.
26567 (ipa_value_range_from_jfunc): Same.
26568 (propagate_vr_across_jump_function): Same.
26569 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
26570 (evaluate_properties_for_edge): Same.
26571 * ipa-prop.cc (ipa_vr::get_vrange): Same.
26572 (ipcp_update_vr): Same.
26573 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
26574 (ipa_range_set_and_normalize): Same.
26576 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
26580 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
26581 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
26582 (avr_pass_data_ifelse): New pass_data for it.
26583 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
26584 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
26585 (avr_out_cmp_ext): New functions.
26586 (compare_condtition): Make sure REG_CC dies in the branch insn.
26587 (avr_rtx_costs_1): Add computation of cbranch costs.
26588 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
26589 [ADJUST_LEN_CMP_SEXT]Handle them.
26590 (TARGET_CANONICALIZE_COMPARISON): New define.
26591 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
26592 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
26593 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
26594 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
26595 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
26596 (avr_out_cmp_zext): New Protos
26597 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
26598 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
26599 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
26600 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
26601 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
26602 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
26603 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
26604 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
26605 (adjust_len) [add_set_ZN, cmp_zext]: New.
26606 (QIPSI): New mode iterator.
26607 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
26608 (gelt): New code iterator.
26609 (gelt_eqne): New code attribute.
26610 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
26611 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
26612 (*cmpqi_sign_extend): Remove insns.
26613 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
26614 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
26615 * config/avr/predicates.md (scratch_or_d_register_operand): New.
26616 * config/avr/constraints.md (Yxx): New constraint.
26618 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26620 * config/riscv/autovec.md (select_vl<mode>): New pattern.
26621 * config/riscv/riscv-protos.h (expand_select_vl): New function.
26622 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
26624 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26626 * range-op-float.cc (foperator_mult_div_base): Delete.
26627 (foperator_mult_div_base::find_range): Make static local function.
26628 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
26629 (operator_mult::op1_range): Rename from foperator_mult.
26630 (operator_mult::op2_range): Ditto.
26631 (operator_mult::rv_fold): Ditto.
26632 (float_table::float_table): Remove MULT_EXPR.
26633 (class foperator_div): Inherit from range_operator.
26634 (float_table::float_table): Delete.
26635 * range-op-mixed.h (class operator_mult): Combined from integer
26637 * range-op.cc (float_tree_table): Delete.
26638 (op_mult): New object.
26639 (unified_table::unified_table): Add MULT_EXPR.
26640 (get_op_handler): Do not check float table any longer.
26641 (class cross_product_operator): Move to range-op-mixed.h.
26642 (class operator_mult): Move to range-op-mixed.h.
26643 (integral_table::integral_table): Remove MULT_EXPR.
26644 (pointer_table::pointer_table): Remove MULT_EXPR.
26645 * range-op.h (float_table): Remove.
26647 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26649 * range-op-float.cc (foperator_negate): Remove. Move prototypes
26650 to range-op-mixed.h
26651 (operator_negate::fold_range): Rename from foperator_negate.
26652 (operator_negate::op1_range): Ditto.
26653 (float_table::float_table): Remove NEGATE_EXPR.
26654 * range-op-mixed.h (class operator_negate): Combined from integer
26656 * range-op.cc (op_negate): New object.
26657 (unified_table::unified_table): Add NEGATE_EXPR.
26658 (class operator_negate): Move to range-op-mixed.h.
26659 (integral_table::integral_table): Remove NEGATE_EXPR.
26660 (pointer_table::pointer_table): Remove NEGATE_EXPR.
26662 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26664 * range-op-float.cc (foperator_minus): Remove. Move prototypes
26665 to range-op-mixed.h
26666 (operator_minus::fold_range): Rename from foperator_minus.
26667 (operator_minus::op1_range): Ditto.
26668 (operator_minus::op2_range): Ditto.
26669 (operator_minus::rv_fold): Ditto.
26670 (float_table::float_table): Remove MINUS_EXPR.
26671 * range-op-mixed.h (class operator_minus): Combined from integer
26673 * range-op.cc (op_minus): New object.
26674 (unified_table::unified_table): Add MINUS_EXPR.
26675 (class operator_minus): Move to range-op-mixed.h.
26676 (integral_table::integral_table): Remove MINUS_EXPR.
26677 (pointer_table::pointer_table): Remove MINUS_EXPR.
26679 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26681 * range-op-float.cc (foperator_abs): Remove. Move prototypes
26682 to range-op-mixed.h
26683 (operator_abs::fold_range): Rename from foperator_abs.
26684 (operator_abs::op1_range): Ditto.
26685 (float_table::float_table): Remove ABS_EXPR.
26686 * range-op-mixed.h (class operator_abs): Combined from integer
26688 * range-op.cc (op_abs): New object.
26689 (unified_table::unified_table): Add ABS_EXPR.
26690 (class operator_abs): Move to range-op-mixed.h.
26691 (integral_table::integral_table): Remove ABS_EXPR.
26692 (pointer_table::pointer_table): Remove ABS_EXPR.
26694 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26696 * range-op-float.cc (foperator_plus): Remove. Move prototypes
26697 to range-op-mixed.h
26698 (operator_plus::fold_range): Rename from foperator_plus.
26699 (operator_plus::op1_range): Ditto.
26700 (operator_plus::op2_range): Ditto.
26701 (operator_plus::rv_fold): Ditto.
26702 (float_table::float_table): Remove PLUS_EXPR.
26703 * range-op-mixed.h (class operator_plus): Combined from integer
26705 * range-op.cc (op_plus): New object.
26706 (unified_table::unified_table): Add PLUS_EXPR.
26707 (class operator_plus): Move to range-op-mixed.h.
26708 (integral_table::integral_table): Remove PLUS_EXPR.
26709 (pointer_table::pointer_table): Remove PLUS_EXPR.
26711 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26713 * range-op-mixed.h (class operator_cast): Combined from integer
26715 * range-op.cc (op_cast): New object.
26716 (unified_table::unified_table): Add op_cast
26717 (class operator_cast): Move to range-op-mixed.h.
26718 (integral_table::integral_table): Remove op_cast
26719 (pointer_table::pointer_table): Remove op_cast.
26721 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26723 * range-op-float.cc (operator_cst::fold_range): New.
26724 * range-op-mixed.h (class operator_cst): Move from integer file.
26725 * range-op.cc (op_cst): New object.
26726 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
26727 (class operator_cst): Move to range-op-mixed.h.
26728 (integral_table::integral_table): Remove op_cst.
26729 (pointer_table::pointer_table): Remove op_cst.
26731 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26733 * range-op-float.cc (foperator_identity): Remove. Move prototypes
26734 to range-op-mixed.h
26735 (operator_identity::fold_range): Rename from foperator_identity.
26736 (operator_identity::op1_range): Ditto.
26737 (float_table::float_table): Remove fop_identity.
26738 * range-op-mixed.h (class operator_identity): Combined from integer
26740 * range-op.cc (op_identity): New object.
26741 (unified_table::unified_table): Add op_identity.
26742 (class operator_identity): Move to range-op-mixed.h.
26743 (integral_table::integral_table): Remove identity.
26744 (pointer_table::pointer_table): Remove identity.
26746 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26748 * range-op-float.cc (foperator_ge): Remove. Move prototypes
26749 to range-op-mixed.h
26750 (operator_ge::fold_range): Rename from foperator_ge.
26751 (operator_ge::op1_range): Ditto.
26752 (float_table::float_table): Remove GE_EXPR.
26753 * range-op-mixed.h (class operator_ge): Combined from integer
26755 * range-op.cc (op_ge): New object.
26756 (unified_table::unified_table): Add GE_EXPR.
26757 (class operator_ge): Move to range-op-mixed.h.
26758 (ge_op1_op2_relation): Fold into
26759 operator_ge::op1_op2_relation.
26760 (integral_table::integral_table): Remove GE_EXPR.
26761 (pointer_table::pointer_table): Remove GE_EXPR.
26762 * range-op.h (ge_op1_op2_relation): Delete.
26764 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26766 * range-op-float.cc (foperator_gt): Remove. Move prototypes
26767 to range-op-mixed.h
26768 (operator_gt::fold_range): Rename from foperator_gt.
26769 (operator_gt::op1_range): Ditto.
26770 (float_table::float_table): Remove GT_EXPR.
26771 * range-op-mixed.h (class operator_gt): Combined from integer
26773 * range-op.cc (op_gt): New object.
26774 (unified_table::unified_table): Add GT_EXPR.
26775 (class operator_gt): Move to range-op-mixed.h.
26776 (gt_op1_op2_relation): Fold into
26777 operator_gt::op1_op2_relation.
26778 (integral_table::integral_table): Remove GT_EXPR.
26779 (pointer_table::pointer_table): Remove GT_EXPR.
26780 * range-op.h (gt_op1_op2_relation): Delete.
26782 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26784 * range-op-float.cc (foperator_le): Remove. Move prototypes
26785 to range-op-mixed.h
26786 (operator_le::fold_range): Rename from foperator_le.
26787 (operator_le::op1_range): Ditto.
26788 (float_table::float_table): Remove LE_EXPR.
26789 * range-op-mixed.h (class operator_le): Combined from integer
26791 * range-op.cc (op_le): New object.
26792 (unified_table::unified_table): Add LE_EXPR.
26793 (class operator_le): Move to range-op-mixed.h.
26794 (le_op1_op2_relation): Fold into
26795 operator_le::op1_op2_relation.
26796 (integral_table::integral_table): Remove LE_EXPR.
26797 (pointer_table::pointer_table): Remove LE_EXPR.
26798 * range-op.h (le_op1_op2_relation): Delete.
26800 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26802 * range-op-float.cc (foperator_lt): Remove. Move prototypes
26803 to range-op-mixed.h
26804 (operator_lt::fold_range): Rename from foperator_lt.
26805 (operator_lt::op1_range): Ditto.
26806 (float_table::float_table): Remove LT_EXPR.
26807 * range-op-mixed.h (class operator_lt): Combined from integer
26809 * range-op.cc (op_lt): New object.
26810 (unified_table::unified_table): Add LT_EXPR.
26811 (class operator_lt): Move to range-op-mixed.h.
26812 (lt_op1_op2_relation): Fold into
26813 operator_lt::op1_op2_relation.
26814 (integral_table::integral_table): Remove LT_EXPR.
26815 (pointer_table::pointer_table): Remove LT_EXPR.
26816 * range-op.h (lt_op1_op2_relation): Delete.
26818 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26820 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
26821 to range-op-mixed.h
26822 (operator_equal::fold_range): Rename from foperator_not_equal.
26823 (operator_equal::op1_range): Ditto.
26824 (float_table::float_table): Remove NE_EXPR.
26825 * range-op-mixed.h (class operator_not_equal): Combined from integer
26827 * range-op.cc (op_equal): New object.
26828 (unified_table::unified_table): Add NE_EXPR.
26829 (class operator_not_equal): Move to range-op-mixed.h.
26830 (not_equal_op1_op2_relation): Fold into
26831 operator_not_equal::op1_op2_relation.
26832 (integral_table::integral_table): Remove NE_EXPR.
26833 (pointer_table::pointer_table): Remove NE_EXPR.
26834 * range-op.h (not_equal_op1_op2_relation): Delete.
26836 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26838 * range-op-float.cc (foperator_equal): Remove. Move prototypes
26839 to range-op-mixed.h
26840 (operator_equal::fold_range): Rename from foperator_equal.
26841 (operator_equal::op1_range): Ditto.
26842 (float_table::float_table): Remove EQ_EXPR.
26843 * range-op-mixed.h (class operator_equal): Combined from integer
26845 * range-op.cc (op_equal): New object.
26846 (unified_table::unified_table): Add EQ_EXPR.
26847 (class operator_equal): Move to range-op-mixed.h.
26848 (equal_op1_op2_relation): Fold into
26849 operator_equal::op1_op2_relation.
26850 (integral_table::integral_table): Remove EQ_EXPR.
26851 (pointer_table::pointer_table): Remove EQ_EXPR.
26852 * range-op.h (equal_op1_op2_relation): Delete.
26854 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26856 * range-op-float.cc (class float_table): Move to header.
26857 (float_table::float_table): Move float only operators to...
26858 (range_op_table::initialize_float_ops): Here.
26859 * range-op-mixed.h: New.
26860 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
26862 (float_tree_table): Moved from range-op-float.cc.
26863 (unified_tree_table): New.
26864 (unified_table::unified_table): New. Call initialize routines.
26865 (get_op_handler): Check unified table first.
26866 (range_op_handler::range_op_handler): Handle no type constructor.
26867 (integral_table::integral_table): Move integral only operators to...
26868 (range_op_table::initialize_integral_ops): Here.
26869 (pointer_table::pointer_table): Move pointer only operators to...
26870 (range_op_table::initialize_pointer_ops): Here.
26871 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
26872 (get_bool_state): Ditto.
26873 (empty_range_varying): Ditto.
26874 (relop_early_resolve): Ditto.
26875 (class range_op_table): Add new init methods for range types.
26876 (class integral_table): Move declaration to here.
26877 (class pointer_table): Move declaration to here.
26878 (class float_table): Move declaration to here.
26880 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26881 Richard Sandiford <richard.sandiford@arm.com>
26882 Richard Biener <rguenther@suse.de>
26884 * doc/md.texi: Add SELECT_VL support.
26885 * internal-fn.def (SELECT_VL): Ditto.
26886 * optabs.def (OPTAB_D): Ditto.
26887 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
26888 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
26889 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
26890 (vectorizable_store): Ditto.
26891 (vectorizable_load): Ditto.
26892 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
26894 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
26897 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
26900 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
26902 * range-op.cc (range_cast): Move to...
26903 * range-op.h (range_cast): Here and add generic a version.
26905 2023-06-09 Marek Polacek <polacek@redhat.com>
26909 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
26910 warn about designated initializers in C only.
26912 2023-06-09 Andrew Pinski <apinski@marvell.com>
26914 PR tree-optimization/97711
26915 PR tree-optimization/110155
26916 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
26917 ((zero_one != 0) ? z <op> y : y): Likewise.
26919 2023-06-09 Andrew Pinski <apinski@marvell.com>
26921 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
26922 multiply rather than negation/bit_and.
26924 2023-06-09 Andrew Pinski <apinski@marvell.com>
26926 * match.pd (`X & -Y -> X * Y`): Allow for truncation
26927 and the same type for unsigned types.
26929 2023-06-09 Andrew Pinski <apinski@marvell.com>
26931 PR tree-optimization/110165
26932 PR tree-optimization/110166
26933 * match.pd (zero_one_valued_p): Don't accept
26934 signed 1-bit integers.
26936 2023-06-09 Richard Biener <rguenther@suse.de>
26938 * match.pd (two conversions in a row): Use element_precision
26939 to DTRT for VECTOR_TYPE.
26941 2023-06-09 Pan Li <pan2.li@intel.com>
26943 * config/riscv/riscv.md (enabled): Move to another place, and
26944 add fp_vector_disabled to the cond.
26945 (fp_vector_disabled): New attr defined for disabling fp.
26946 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
26948 2023-06-09 Pan Li <pan2.li@intel.com>
26950 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
26953 2023-06-09 liuhongt <hongtao.liu@intel.com>
26956 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
26957 view_convert_expr mask to signed type when folding pblendvb
26960 2023-06-09 liuhongt <hongtao.liu@intel.com>
26963 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
26964 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
26965 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
26967 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
26968 real codename for __builtin_ia32_pabs{b,w,d}.
26970 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
26972 * gimple-range-op.cc
26973 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
26974 (gimple_range_op_handler::maybe_builtin_call): Adjust.
26975 * gimple-range-op.h (operand1, operand2): Use m_operator.
26976 * range-op.cc (integral_table, pointer_table): Relocate.
26977 (get_op_handler): Rename from get_handler and handle all types.
26978 (range_op_handler::range_op_handler): Relocate.
26979 (range_op_handler::set_op_handler): Relocate and adjust.
26980 (range_op_handler::range_op_handler): Relocate.
26981 (dispatch_trio): New.
26982 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
26983 (range_op_handler::dispatch_kind): New.
26984 (range_op_handler::fold_range): Relocate and Use new dispatch value.
26985 (range_op_handler::op1_range): Ditto.
26986 (range_op_handler::op2_range): Ditto.
26987 (range_op_handler::lhs_op1_relation): Ditto.
26988 (range_op_handler::lhs_op2_relation): Ditto.
26989 (range_op_handler::op1_op2_relation): Ditto.
26990 (range_op_handler::set_op_handler): Use m_operator member.
26991 * range-op.h (range_op_handler::operator bool): Use m_operator.
26992 (range_op_handler::dispatch_kind): New.
26993 (range_op_handler::m_valid): Delete.
26994 (range_op_handler::m_int): Delete
26995 (range_op_handler::m_float): Delete
26996 (range_op_handler::m_operator): New.
26997 (range_op_table::operator[]): Relocate from .cc file.
26998 (range_op_table::set): Ditto.
26999 * value-range.h (class vrange): Make range_op_handler a friend.
27001 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
27003 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
27004 (cfn_pass_through_arg1): Adjust using statemenmt.
27005 (cfn_signbit): Change base class, adjust using statement.
27006 (cfn_copysign): Ditto.
27008 (cfn_sincos): Ditto.
27009 * range-op-float.cc (fold_range): Change class to range_operator.
27013 (lhs_op1_relation): Ditto.
27014 (lhs_op2_relation): Ditto.
27015 (op1_op2_relation): Ditto.
27016 (foperator_*): Ditto.
27017 (class float_table): New. Inherit from range_op_table.
27018 (floating_tree_table) Change to range_op_table pointer.
27019 (class floating_op_table): Delete.
27020 * range-op.cc (operator_equal): Adjust using statement.
27021 (operator_not_equal): Ditto.
27022 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
27023 (operator_minus, operator_cast): Ditto.
27024 (operator_bitwise_and, pointer_plus_operator): Ditto.
27025 (get_float_handle): Change return type.
27026 * range-op.h (range_operator_float): Delete. Relocate all methods
27027 into class range_operator.
27028 (range_op_handler::m_float): Change type to range_operator.
27029 (floating_op_table): Delete.
27030 (floating_tree_table): Change type.
27032 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
27034 * range-op.cc (range_operator::fold_range): Call virtual routine.
27035 (range_operator::update_bitmask): New.
27036 (operator_equal::update_bitmask): New.
27037 (operator_not_equal::update_bitmask): New.
27038 (operator_lt::update_bitmask): New.
27039 (operator_le::update_bitmask): New.
27040 (operator_gt::update_bitmask): New.
27041 (operator_ge::update_bitmask): New.
27042 (operator_ge::update_bitmask): New.
27043 (operator_plus::update_bitmask): New.
27044 (operator_minus::update_bitmask): New.
27045 (operator_pointer_diff::update_bitmask): New.
27046 (operator_min::update_bitmask): New.
27047 (operator_max::update_bitmask): New.
27048 (operator_mult::update_bitmask): New.
27049 (operator_div:operator_div):New.
27050 (operator_div::update_bitmask): New.
27051 (operator_div::m_code): New member.
27052 (operator_exact_divide::operator_exact_divide): New constructor.
27053 (operator_lshift::update_bitmask): New.
27054 (operator_rshift::update_bitmask): New.
27055 (operator_bitwise_and::update_bitmask): New.
27056 (operator_bitwise_or::update_bitmask): New.
27057 (operator_bitwise_xor::update_bitmask): New.
27058 (operator_trunc_mod::update_bitmask): New.
27059 (op_ident, op_unknown, op_ptr_min_max): New.
27060 (op_nop, op_convert): Delete.
27061 (op_ssa, op_paren, op_obj_type): Delete.
27062 (op_realpart, op_imagpart): Delete.
27063 (op_ptr_min, op_ptr_max): Delete.
27064 (pointer_plus_operator:update_bitmask): New.
27065 (range_op_table::set): Do not use m_code.
27066 (integral_table::integral_table): Adjust to single instances.
27067 * range-op.h (range_operator::range_operator): Delete.
27068 (range_operator::m_code): Delete.
27069 (range_operator::update_bitmask): New.
27071 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
27073 * range-op-float.cc (range_operator_float::fold_range): Return
27074 NAN of the result type.
27076 2023-06-08 Jakub Jelinek <jakub@redhat.com>
27078 * optabs.cc (expand_ffs): Add forward declaration.
27079 (expand_doubleword_clz): Rename to ...
27080 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
27081 handle also doubleword CTZ and FFS in addition to CLZ.
27082 (expand_unop): Adjust caller. Also call it for doubleword
27083 ctz_optab and ffs_optab.
27085 2023-06-08 Jakub Jelinek <jakub@redhat.com>
27088 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
27089 n_words == 2 recurse with mmx_ok as first argument rather than false.
27091 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
27093 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
27094 avoid sign extension/undefined behaviour when setting each bit.
27096 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
27097 Uros Bizjak <ubizjak@gmail.com>
27099 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
27100 Use new x86_stc instruction when the carry flag must be set.
27101 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
27102 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
27103 * config/i386/i386.h (TARGET_SLOW_STC): New define.
27104 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
27105 (x86_stc): New define_insn.
27106 (define_peephole2): Convert x86_stc into alternate implementation
27107 on pentium4 without -Os when a QImode register is available.
27108 (*x86_cmc): New define_insn.
27109 (define_peephole2): Convert *x86_cmc into alternate implementation
27110 on pentium4 without -Os when a QImode register is available.
27111 (*setccc): New define_insn_and_split for a no-op CCCmode move.
27112 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
27113 recognize (and eliminate) the carry flag being copied to itself.
27114 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
27115 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
27117 2023-06-07 Andrew Pinski <apinski@marvell.com>
27119 * match.pd: Fix comment for the
27120 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
27122 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
27123 Jeff Law <jlaw@ventanamicro.com>
27125 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
27126 (rotrsi3_sext): Expose generator.
27127 (rotlsi3 pattern): Hide generator.
27128 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
27130 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
27131 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
27132 (mulsi3, <optab>si3): Likewise.
27133 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
27134 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
27135 (<u>mulsidi3): Likewise.
27136 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
27137 (mulsi3_extended, <optab>si3_extended): Likewise.
27138 (splitter for shadd feeding divison): Update RTL pattern to account
27139 for changes in how 32 bit ops are expanded for TARGET_64BIT.
27140 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
27142 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
27145 * config/riscv/riscv.cc (riscv_print_operand): Calculate
27146 memmodel only when it is valid.
27148 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
27150 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
27151 for constant element of a vector.
27153 2023-06-07 Jakub Jelinek <jakub@redhat.com>
27155 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
27156 instead compare tree_nonzero_bits <= 1U rather than just == 1.
27158 2023-06-07 Alex Coplan <alex.coplan@arm.com>
27161 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
27163 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
27164 names for builtins.
27165 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
27166 setup if in_lto_p, just like we do for SVE.
27167 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
27168 (__arm_st64b): Delete.
27169 (__arm_st64bv): Delete.
27170 (__arm_st64bv0): Delete.
27172 2023-06-07 Alex Coplan <alex.coplan@arm.com>
27175 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
27176 Use input operand for the destination address.
27177 * config/aarch64/aarch64.md (st64b): Fix constraint on address
27180 2023-06-07 Alex Coplan <alex.coplan@arm.com>
27183 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
27184 Replace eight consecutive spaces with tabs.
27185 (aarch64_init_ls64_builtins): Likewise.
27186 (aarch64_expand_builtin_ls64): Likewise.
27187 * config/aarch64/aarch64.md (ld64b): Likewise.
27190 (st64bv0): Likewise.
27192 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
27194 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
27195 offset table pseudo to a general reg subset.
27197 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27199 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
27201 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
27203 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
27204 (aarch64_sqxtun2<mode>_le): Likewise.
27205 (aarch64_sqxtun2<mode>_be): Likewise.
27206 (aarch64_sqxtun2<mode>): Adjust for the above.
27207 (aarch64_sqmovun<mode>): New define_expand.
27208 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
27209 (half_mask): New mode attribute.
27210 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
27213 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27215 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
27217 (aarch64_addp<mode>_insn): ... This...
27218 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
27219 (aarch64_addp<mode>): New define_expand.
27221 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27223 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
27224 * config/riscv/riscv-v.cc
27225 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
27227 (rvv_builder::single_step_npatterns_p): New function.
27228 (rvv_builder::npatterns_all_equal_p): Ditto.
27229 (const_vec_all_in_range_p): Support POLY handling.
27230 (gen_const_vector_dup): Ditto.
27231 (emit_vlmax_gather_insn): Add vrgatherei16.
27232 (emit_vlmax_masked_gather_mu_insn): Ditto.
27233 (expand_const_vector): Add VLA SLP const vector support.
27234 (expand_vec_perm): Support POLY.
27235 (struct expand_vec_perm_d): New struct.
27236 (shuffle_generic_patterns): New function.
27237 (expand_vec_perm_const_1): Ditto.
27238 (expand_vec_perm_const): Ditto.
27239 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
27240 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
27242 2023-06-07 Andrew Pinski <apinski@marvell.com>
27244 PR middle-end/110117
27245 * expr.cc (expand_single_bit_test): Handle
27246 const_int from expand_expr.
27248 2023-06-07 Andrew Pinski <apinski@marvell.com>
27250 * expr.cc (do_store_flag): Rearrange the
27251 TER code so that it overrides the nonzero bits
27252 info if we had `a & POW2`.
27254 2023-06-07 Andrew Pinski <apinski@marvell.com>
27256 PR tree-optimization/110134
27257 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
27259 (-A CMP CST -> B CMP (-CST)): Likewise.
27261 2023-06-07 Andrew Pinski <apinski@marvell.com>
27263 PR tree-optimization/89263
27264 PR tree-optimization/99069
27265 PR tree-optimization/20083
27266 PR tree-optimization/94898
27267 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
27268 one of the operands are constant.
27270 2023-06-07 Andrew Pinski <apinski@marvell.com>
27272 * match.pd (zero_one_valued_p): Match 0 integer constant
27275 2023-06-07 Pan Li <pan2.li@intel.com>
27277 * config/riscv/riscv-vector-builtins-types.def
27278 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
27279 (vfloat32m1_t): Ditto.
27280 (vfloat32m2_t): Ditto.
27281 (vfloat32m4_t): Ditto.
27282 (vfloat32m8_t): Ditto.
27283 (vint16mf4_t): Ditto.
27284 (vint16mf2_t): Ditto.
27285 (vint16m1_t): Ditto.
27286 (vint16m2_t): Ditto.
27287 (vint16m4_t): Ditto.
27288 (vint16m8_t): Ditto.
27289 (vuint16mf4_t): Ditto.
27290 (vuint16mf2_t): Ditto.
27291 (vuint16m1_t): Ditto.
27292 (vuint16m2_t): Ditto.
27293 (vuint16m4_t): Ditto.
27294 (vuint16m8_t): Ditto.
27295 (vint32mf2_t): Ditto.
27296 (vint32m1_t): Ditto.
27297 (vint32m2_t): Ditto.
27298 (vint32m4_t): Ditto.
27299 (vint32m8_t): Ditto.
27300 (vuint32mf2_t): Ditto.
27301 (vuint32m1_t): Ditto.
27302 (vuint32m2_t): Ditto.
27303 (vuint32m4_t): Ditto.
27304 (vuint32m8_t): Ditto.
27306 2023-06-07 Jason Merrill <jason@redhat.com>
27309 * doc/invoke.texi: Document it.
27311 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
27313 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
27314 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
27315 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
27316 NOT (BITREVERSE x) as BITREVERSE (NOT x).
27317 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
27318 Optimize PARITY (BITREVERSE x) as PARITY x.
27319 Optimize BITREVERSE (BITREVERSE x) as x.
27320 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
27321 BITREVERSE of a constant integer at compile-time.
27322 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
27323 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
27324 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
27325 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
27326 Optimize COPYSIGN (x, ABS y) as ABS x.
27327 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
27328 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
27329 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
27330 arguments at compile-time.
27332 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
27334 * rtl.h (function_invariant_p): Change return type from int to bool.
27335 * reload1.cc (function_invariant_p): Change return type from
27336 int to bool and adjust function body accordingly.
27338 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27340 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
27341 (*single_<optab>mult_plus<mode>): Ditto.
27342 (*double_<optab>mult_plus<mode>): Ditto.
27343 (*sign_zero_extend_fma): Ditto.
27344 (*zero_sign_extend_fma): Ditto.
27345 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27347 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
27348 Tobias Burnus <tobias@codesourcery.com>
27350 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
27351 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
27353 (omp_get_attachment): Handle map clauses with 'present' modifier.
27354 (omp_group_base): Likewise.
27355 (gimplify_scan_omp_clauses): Reorder present maps to come first.
27356 Set GOVD flags for present defaultmaps.
27357 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
27358 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
27360 (lower_omp_target): Handle map clauses with 'present' modifier.
27361 Handle 'to' and 'from' clauses with 'present'.
27362 * tree-core.h (enum omp_clause_defaultmap_kind): Add
27363 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
27364 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
27365 'from' clauses with 'present' modifier. Handle present defaultmap.
27366 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
27368 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
27370 * config/rs6000/genfusion.pl: Delete some dead code.
27372 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
27374 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
27376 (gen_ld_cmpi_p10): ... this.
27378 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
27381 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
27382 duplicate expression.
27384 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27386 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
27387 Handle unsigned reduc_plus_scal_ builtins.
27388 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
27389 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
27390 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
27391 __builtin_aarch64_reduc_plus_scal_v2di.
27392 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
27394 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27396 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
27397 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
27398 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
27400 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27402 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
27403 (aarch64_shrn<mode>_insn_be): Delete.
27404 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
27405 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
27406 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
27407 (aarch64_rshrn<mode>_insn_le): Delete.
27408 (aarch64_rshrn<mode>_insn_be): Delete.
27409 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
27410 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
27412 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27414 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
27416 (aarch64_pars_overlap_p): Likewise.
27417 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
27418 Express in terms of UNSPEC_ADDV.
27419 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
27420 (*aarch64_<su>addlv<mode>_reduction): Define.
27421 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
27422 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
27423 (aarch64_pars_overlap_p): Likewise.
27424 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
27425 (VQUADW): New mode attribute.
27426 (VWIDE2X_S): Likewise.
27428 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
27429 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
27431 2023-06-06 Richard Biener <rguenther@suse.de>
27433 PR middle-end/110055
27434 * gimplify.cc (gimplify_target_expr): Do not emit
27435 CLOBBERs for variables which have static storage duration
27436 after gimplifying their initializers.
27438 2023-06-06 Richard Biener <rguenther@suse.de>
27440 PR tree-optimization/109143
27441 * tree-ssa-structalias.cc (solution_set_expand): Avoid
27442 one bitmap iteration and optimize bit range setting.
27444 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
27446 PR bootstrap/110120
27447 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
27448 XVECEXP, not XEXP, to access first item of a PARALLEL.
27450 2023-06-06 Pan Li <pan2.li@intel.com>
27452 * config/riscv/riscv-vector-builtins-types.def
27453 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
27454 (vfloat16mf2_t): Likewise.
27455 (vfloat16m1_t): Likewise.
27456 (vfloat16m2_t): Likewise.
27457 (vfloat16m4_t): Likewise.
27458 (vfloat16m8_t): Likewise.
27459 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
27460 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
27462 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
27464 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
27465 for cfi reg/mem machmode
27466 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
27468 2023-06-06 Li Xu <xuli1@eswincomputing.com>
27470 * config/riscv/vector-iterators.md:
27471 Fix 'REQUIREMENT' for machine_mode 'MODE'.
27472 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
27473 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
27474 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
27476 2023-06-06 Pan Li <pan2.li@intel.com>
27478 * config/riscv/vector-iterators.md: Fix typo in mode attr.
27480 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
27481 Joel Hutton <joel.hutton@arm.com>
27483 * doc/generic.texi: Remove old tree codes.
27484 * expr.cc (expand_expr_real_2): Remove old tree code cases.
27485 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
27486 * optabs-tree.cc (optab_for_tree_code): Likewise.
27487 (supportable_half_widening_operation): Likewise.
27488 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
27489 * tree-inline.cc (estimate_operator_cost): Likewise.
27490 (op_symbol_code): Likewise.
27491 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
27492 (vect_analyze_data_ref_accesses): Likewise.
27493 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
27494 * cfgexpand.cc (expand_debug_expr): Likewise.
27495 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
27496 (supportable_widening_operation): Likewise.
27497 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
27499 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
27500 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
27501 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
27502 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
27503 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
27504 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
27505 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
27506 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
27508 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
27509 Joel Hutton <joel.hutton@arm.com>
27510 Tamar Christina <tamar.christina@arm.com>
27512 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
27514 (vec_widen_<su>add_lo_<mode>): ... to this.
27515 (vec_widen_<su>addl_hi_<mode>): Rename this ...
27516 (vec_widen_<su>add_hi_<mode>): ... to this.
27517 (vec_widen_<su>subl_lo_<mode>): Rename this ...
27518 (vec_widen_<su>sub_lo_<mode>): ... to this.
27519 (vec_widen_<su>subl_hi_<mode>): Rename this ...
27520 (vec_widen_<su>sub_hi_<mode>): ...to this.
27521 * doc/generic.texi: Document new IFN codes.
27522 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
27523 (commutative_binary_fn_p): Add widen_plus fn's.
27524 (widening_fn_p): New function.
27525 (narrowing_fn_p): New function.
27526 (direct_internal_fn_optab): Change visibility.
27527 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
27528 internal_fn that expands into multiple internal_fns for widening.
27529 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
27530 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
27531 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
27532 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
27533 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
27534 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
27535 (lookup_hilo_internal_fn): Likewise.
27536 (widening_fn_p): Likewise.
27537 (Narrowing_fn_p): Likewise.
27538 * optabs.cc (commutative_optab_p): Add widening plus optabs.
27539 * optabs.def (OPTAB_D): Define widen add, sub optabs.
27540 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
27541 patterns with a hi/lo or even/odd split.
27542 (vect_recog_sad_pattern): Refactor to use new IFN codes.
27543 (vect_recog_widen_plus_pattern): Likewise.
27544 (vect_recog_widen_minus_pattern): Likewise.
27545 (vect_recog_average_pattern): Likewise.
27546 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
27548 (supportable_widening_operation): Likewise.
27549 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
27551 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
27552 Joel Hutton <joel.hutton@arm.com>
27554 * tree-vect-patterns.cc: Add include for gimple-iterator.
27555 (vect_recog_widen_op_pattern): Refactor to use code_helper.
27556 (vect_gimple_build): New function.
27557 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
27559 (vectorizable_call): Likewise.
27560 (vect_gen_widened_results_half): Likewise.
27561 (vect_create_vectorized_demotion_stmts): Likewise.
27562 (vect_create_vectorized_promotion_stmts): Likewise.
27563 (vect_create_half_widening_stmts): Likewise.
27564 (vectorizable_conversion): Likewise.
27565 (supportable_widening_operation): Likewise.
27566 (supportable_narrowing_operation): Likewise.
27567 * tree-vectorizer.h (supportable_widening_operation): Change
27568 prototype to use code_helper.
27569 (supportable_narrowing_operation): Likewise.
27570 (vect_gimple_build): New function prototype.
27571 * tree.h (code_helper::safe_as_tree_code): New function.
27572 (code_helper::safe_as_fn_code): New function.
27574 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
27576 * wide-int.cc (wi::bitreverse_large): New function implementing
27577 bit reversal of an integer.
27578 * wide-int.h (wi::bitreverse): New (template) function prototype.
27579 (bitreverse_large): Prototype helper function/implementation.
27580 (wi::bitreverse): New template wrapper around bitreverse_large.
27582 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
27584 * rtl.h (print_rtl_single): Change return type from int to void.
27585 (print_rtl_single_with_indent): Ditto.
27586 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
27587 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
27588 (rtx_writer::print_rtx_operand_code_0): Ditto.
27589 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
27590 (rtx_writer::print_rtx_operand_code_i): Ditto.
27591 (rtx_writer::print_rtx_operand_code_u): Ditto.
27592 (rtx_writer::print_rtx_operand): Ditto.
27593 (rtx_writer::print_rtx): Ditto.
27594 (rtx_writer::finish_directive): Ditto.
27595 (print_rtl_single): Change return type from int to void
27596 and adjust function body accordingly.
27597 (rtx_writer::print_rtl_single_with_indent): Ditto.
27599 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
27601 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
27602 (reg_class_subset_p): Ditto.
27603 * reginfo.cc (reg_classes_intersect_p): Ditto.
27604 (reg_class_subset_p): Ditto.
27606 2023-06-05 Pan Li <pan2.li@intel.com>
27608 * config/riscv/riscv-vector-builtins-types.def
27609 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
27610 (vfloat32m1_t): Ditto.
27611 (vfloat32m2_t): Ditto.
27612 (vfloat32m4_t): Ditto.
27613 (vfloat32m8_t): Ditto.
27614 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
27615 (vint16mf2_t): Ditto.
27616 (vint16m1_t): Ditto.
27617 (vint16m2_t): Ditto.
27618 (vint16m4_t): Ditto.
27619 (vint16m8_t): Ditto.
27620 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
27621 (vuint16mf2_t): Ditto.
27622 (vuint16m1_t): Ditto.
27623 (vuint16m2_t): Ditto.
27624 (vuint16m4_t): Ditto.
27625 (vuint16m8_t): Ditto.
27626 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
27627 (vint32m1_t): Ditto.
27628 (vint32m2_t): Ditto.
27629 (vint32m4_t): Ditto.
27630 (vint32m8_t): Ditto.
27631 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
27632 (vuint32m1_t): Ditto.
27633 (vuint32m2_t): Ditto.
27634 (vuint32m4_t): Ditto.
27635 (vuint32m8_t): Ditto.
27636 * config/riscv/vector-iterators.md: Add FP=16 support for V,
27637 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
27639 2023-06-05 Andrew Pinski <apinski@marvell.com>
27641 PR bootstrap/110085
27642 * Makefile.in (clean): Remove the removing of
27643 MULTILIB_DIR/MULTILIB_OPTIONS directories.
27645 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
27647 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
27649 * config/mips/mips.cc (speculation_barrier_libfunc): New static
27651 (mips_init_libfuncs): Initialize it.
27652 (mips_emit_speculation_barrier): New function.
27653 * config/mips/mips.md (speculation_barrier): Call
27654 mips_emit_speculation_barrier.
27656 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27658 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
27659 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
27660 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
27661 (rvv_builder::get_merged_repeating_sequence): Ditto.
27662 (rvv_builder::get_merge_scalar_mask): Ditto.
27663 (emit_scalar_move_insn): Ditto.
27664 (emit_vlmax_integer_move_insn): Ditto.
27665 (emit_nonvlmax_integer_move_insn): Ditto.
27666 (emit_vlmax_gather_insn): Ditto.
27667 (emit_vlmax_masked_gather_mu_insn): Ditto.
27668 (get_repeating_sequence_dup_machine_mode): Ditto.
27670 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27672 * config/riscv/autovec.md: Split arguments.
27673 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
27674 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
27676 2023-06-04 Andrew Pinski <apinski@marvell.com>
27678 * expr.cc (do_store_flag): Improve for single bit testing
27679 not against zero but against that single bit.
27681 2023-06-04 Andrew Pinski <apinski@marvell.com>
27683 * expr.cc (do_store_flag): Extend the one bit checking case
27684 to handle the case where we don't have an and but rather still
27685 one bit is known to be non-zero.
27687 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
27689 * config/h8300/constraints.md (Zz): Make this a normal
27691 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
27692 * config/h8300/logical.md (H8/SX bit patterns): Remove.
27694 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27696 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
27697 New insn_and_split patterns.
27699 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27702 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
27703 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
27704 (@vlmul_extx4<mode>): Ditto.
27705 (@vlmul_extx8<mode>): Ditto.
27706 (@vlmul_extx16<mode>): Ditto.
27707 (@vlmul_extx32<mode>): Ditto.
27708 (@vlmul_extx64<mode>): Ditto.
27709 (*vlmul_extx2<mode>): Ditto.
27710 (*vlmul_extx4<mode>): Ditto.
27711 (*vlmul_extx8<mode>): Ditto.
27712 (*vlmul_extx16<mode>): Ditto.
27713 (*vlmul_extx32<mode>): Ditto.
27714 (*vlmul_extx64<mode>): Ditto.
27716 2023-06-04 Pan Li <pan2.li@intel.com>
27718 * config/riscv/riscv-vector-builtins-types.def
27719 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
27720 (vfloat32m1_t): Likewise.
27721 (vfloat32m2_t): Likewise.
27722 (vfloat32m4_t): Likewise.
27723 (vfloat32m8_t): Likewise.
27724 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
27725 * config/riscv/vector-iterators.md: Add single to half machine
27728 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27730 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
27731 (*n<optab><mode>): Ditto.
27732 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
27733 (*n<optab><mode>): Ditto.
27734 * config/riscv/vector.md: Ditto.
27736 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
27739 * config/i386/i386-features.cc (scalar_chain::convert_compare):
27740 Update or delete REG_EQUAL notes, converting CONST_INT and
27741 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
27743 2023-06-04 Jason Merrill <jason@redhat.com>
27746 * tree-eh.cc (lower_resx): Pass the exception pointer to the
27748 * except.h: Tweak comment.
27750 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
27752 * postreload.cc (move2add_use_add2_insn): Handle
27753 trivial single_sets. Rename variable PAT to SET.
27754 (move2add_use_add3_insn, reload_cse_move2add): Similar.
27756 2023-06-04 Pan Li <pan2.li@intel.com>
27758 * config/riscv/riscv-vector-builtins-types.def
27759 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
27760 (vfloat16mf2_t): Likewise.
27761 (vfloat16m1_t): Likewise.
27762 (vfloat16m2_t): Likewise.
27763 (vfloat16m4_t): Likewise.
27764 (vfloat16m8_t): Likewise.
27765 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
27766 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
27767 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
27768 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
27771 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
27773 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
27776 2023-06-03 Die Li <lidie@eswincomputing.com>
27778 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
27780 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27782 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
27784 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27786 * config/riscv/vector.md: Add vector-opt.md.
27787 * config/riscv/autovec-opt.md: New file.
27789 2023-06-03 liuhongt <hongtao.liu@intel.com>
27791 PR tree-optimization/110067
27792 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
27793 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
27795 2023-06-03 liuhongt <hongtao.liu@intel.com>
27798 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
27799 (truncv2si<mode>2): Ditto.
27801 2023-06-02 Andrew Pinski <apinski@marvell.com>
27803 PR rtl-optimization/102733
27804 * dse.cc (store_info): Add addrspace field.
27805 (record_store): Record the address space
27806 and check to make sure they are the same.
27808 2023-06-02 Andrew Pinski <apinski@marvell.com>
27810 PR rtl-optimization/110042
27811 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
27812 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
27814 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
27817 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
27818 Make sure that we do not have a cap on field alignment before altering
27819 the struct layout based on the type alignment of the first entry.
27821 2023-06-02 David Faust <david.faust@oracle.com>
27824 * btfout.cc (btf_absolute_func_id): New function.
27825 (btf_asm_func_type): Call it here. Change index parameter from
27826 size_t to ctf_id_t. Use PRIu64 formatter.
27828 2023-06-02 Alex Coplan <alex.coplan@arm.com>
27830 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
27831 (btf_asm_datasec_type): Likewise.
27833 2023-06-02 Carl Love <cel@us.ibm.com>
27835 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
27836 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
27838 2023-06-02 Jason Merrill <jason@redhat.com>
27842 * tree.h (DECL_MERGEABLE): New.
27843 * tree-core.h (struct tree_decl_common): Mention it.
27844 * gimplify.cc (gimplify_init_constructor): Check it.
27845 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
27846 * varasm.cc (categorize_decl_for_section): Likewise.
27848 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
27850 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
27851 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
27852 (stack_regs_mentioned_p): Change return type from int to bool
27853 and adjust function body accordingly.
27854 (stack_regs_mentioned): Ditto.
27855 (check_asm_stack_operands): Ditto. Change "malformed_asm"
27857 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
27858 (swap_rtx_condition_1): Change return type from int to bool
27859 and adjust function body accordingly. Change "r" variable to bool.
27860 (swap_rtx_condition): Change return type from int to bool
27861 and adjust function body accordingly.
27862 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
27863 (subst_stack_regs): Ditto.
27864 (convert_regs_entry): Change return type from int to bool and adjust
27865 function body accordingly. Change "inserted" variable to bool.
27866 (convert_regs_1): Recode handling of control_flow_insn_deleted.
27867 (convert_regs_2): Recode handling of cfg_altered.
27868 (convert_regs): Ditto. Change "inserted" variable to bool.
27870 2023-06-02 Jason Merrill <jason@redhat.com>
27873 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
27874 (initializer_constant_valid_p_1): Compare float precision.
27876 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
27878 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
27881 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27883 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
27884 (vect_set_loop_condition_partial_vectors): Ditto.
27886 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
27889 * config/avr/avr.md: Add an RTL peephole to optimize operations on
27890 non-LD_REGS after a move from LD_REGS.
27891 (piaop): New code iterator.
27893 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
27896 * doc/install.texi: Document (optional) Perl usage for parallel
27897 testing of libgomp.
27899 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
27902 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
27905 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27906 KuanLin Chen <best124612@gmail.com>
27908 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
27909 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
27911 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27913 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
27915 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27917 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
27919 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27921 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
27923 (DEF_RVV_FRM_ENUM): Ditto.
27925 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27927 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
27928 intrinsic API expander
27929 * config/riscv/vector.md
27930 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
27931 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
27932 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
27934 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27936 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
27937 * config/riscv/predicates.md (vector_perm_operand): New predicate.
27938 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27939 (expand_vec_perm): New function.
27940 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
27941 (gen_const_vector_dup): Ditto.
27942 (emit_vlmax_gather_insn): Ditto.
27943 (emit_vlmax_masked_gather_mu_insn): Ditto.
27944 (expand_vec_perm): Ditto.
27946 2023-06-01 Jason Merrill <jason@redhat.com>
27948 * doc/invoke.texi (-Wpedantic): Improve clarity.
27950 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
27952 * rtl.h (exp_equiv_p): Change return type from int to bool.
27953 * cse.cc (mention_regs): Change return type from int to bool
27954 and adjust function body accordingly.
27955 (exp_equiv_p): Ditto.
27956 (insert_regs): Ditto. Change "modified" function argument to bool
27957 and update usage accordingly.
27958 (record_jump_cond): Remove always zero "reversed_nonequality"
27959 function argument and update usage accordingly.
27960 (fold_rtx): Change "changed" variable to bool.
27961 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
27962 (is_dead_reg): Change return type from int to bool.
27964 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27966 * config/xtensa/xtensa.md (adddi3, subdi3):
27967 New RTL generation patterns implemented according to the instruc-
27968 tion idioms described in the Xtensa ISA reference manual (p. 600).
27970 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
27971 Uros Bizjak <ubizjak@gmail.com>
27974 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
27975 CODE_for_sse4_1_ptestzv2di.
27976 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
27977 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
27978 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
27979 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
27980 when expanding UNSPEC_PTEST to compare against zero.
27981 * config/i386/i386-features.cc (scalar_chain::convert_compare):
27982 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
27983 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
27984 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
27985 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
27986 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
27987 check for suitable matching modes for the UNSPEC_PTEST pattern.
27988 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
27989 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
27990 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
27991 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
27992 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
27993 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
27994 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
27996 (*ptest<mode>_and): Specify CCZ to only perform this optimization
27997 when only the Z flag is required.
27999 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
28002 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
28004 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28006 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
28007 Add =r,m and =r,m alternatives.
28008 (load_pair<DREG:mode><DREG2:mode>): Likewise.
28009 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
28011 2023-06-01 Pan Li <pan2.li@intel.com>
28013 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
28015 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
28016 (main): Disable FP16 tuple.
28017 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
28018 (TARGET_VECTOR_ELEN_FP_16): Ditto.
28019 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
28021 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
28022 (vfloat16mf2_t): Ditto.
28023 (vfloat16m1_t): Ditto.
28024 (vfloat16m2_t): Ditto.
28025 (vfloat16m4_t): Ditto.
28026 (vfloat16m8_t): Ditto.
28027 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
28029 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
28030 machine mode based on TARGET_VECTOR_ELEN_FP_16.
28032 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28034 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
28035 (DEF_RVV_FRM_ENUM): New macro.
28036 (handle_pragma_vector): Add FRM enum
28037 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
28044 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
28045 Richard Sandiford <richard.sandiford@arm.com>
28047 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
28048 Update call to wi::bswap.
28049 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
28050 Update call to wi::bswap.
28051 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
28052 Update calls to wi::bswap.
28053 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
28054 (wi::bswap_large): New function, with revised API.
28055 * wide-int.h (wi::bswap): New (template) function prototype.
28056 (wide_int_storage::bswap): Remove method.
28057 (sext_large, zext_large): Consistent indentation/line wrapping.
28058 (bswap_large): Prototype helper function containing implementation.
28059 (wi::bswap): New template wrapper around bswap_large.
28061 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28064 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
28065 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
28066 (usdot_prod<vsi2qi>): Rename to...
28067 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
28068 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
28069 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
28070 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
28071 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
28072 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
28073 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
28076 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28079 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
28080 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
28081 (aarch64_sq<r>dmulh_n<mode>): Rename to...
28082 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
28083 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
28084 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
28085 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
28086 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
28087 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
28088 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
28089 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
28090 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
28091 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
28092 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
28094 2023-05-31 David Faust <david.faust@oracle.com>
28096 * btfout.cc (btf_kind_names): New.
28097 (btf_kind_name): New.
28098 (btf_absolute_var_id): New utility function.
28099 (btf_relative_var_id): Likewise.
28100 (btf_relative_func_id): Likewise.
28101 (btf_absolute_datasec_id): Likewise.
28102 (btf_asm_type_ref): New.
28103 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
28104 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
28105 (btf_asm_varent): Likewise.
28106 (btf_asm_func_arg): Likewise.
28107 (btf_asm_datasec_entry): Likewise.
28108 (btf_asm_datasec_type): Likewise.
28109 (btf_asm_func_type): Likewise. Add index parameter.
28110 (btf_asm_enum_const): Likewise.
28111 (btf_asm_sou_member): Likewise.
28112 (output_btf_vars): Update btf_asm_* call accordingly.
28113 (output_asm_btf_sou_fields): Likewise.
28114 (output_asm_btf_enum_list): Likewise.
28115 (output_asm_btf_func_args_list): Likewise.
28116 (output_asm_btf_vlen_bytes): Likewise.
28117 (output_btf_func_types): Add ctf_container_ref parameter.
28118 Pass it to btf_asm_func_type.
28119 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
28120 (btf_output): Update output_btf_func_types call similarly.
28122 2023-05-31 David Faust <david.faust@oracle.com>
28124 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
28125 and BTF_KIND_FWD which do not use the size/type field at all.
28127 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
28129 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
28130 (active_insn_p): Ditto.
28131 (in_sequence_p): Ditto.
28132 (unshare_all_rtl): Change return type from int to void.
28133 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
28134 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
28135 and adjust function body accordingly.
28136 (mem_expr_equal_p): Ditto.
28137 (unshare_all_rtl): Change return type from int to void
28138 and adjust function body accordingly.
28139 (verify_rtx_sharing): Remove unneeded return.
28140 (active_insn_p): Change return type from int to bool
28141 and adjust function body accordingly.
28142 (in_sequence_p): Ditto.
28144 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
28146 * rtl.h (true_dependence): Change return type from int to bool.
28147 (canon_true_dependence): Ditto.
28148 (read_dependence): Ditto.
28149 (anti_dependence): Ditto.
28150 (canon_anti_dependence): Ditto.
28151 (output_dependence): Ditto.
28152 (canon_output_dependence): Ditto.
28153 (may_alias_p): Ditto.
28154 * alias.h (alias_sets_conflict_p): Ditto.
28155 (alias_sets_must_conflict_p): Ditto.
28156 (objects_must_conflict_p): Ditto.
28157 (nonoverlapping_memrefs_p): Ditto.
28158 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
28159 (record_set): Ditto.
28160 (base_alias_check): Ditto.
28161 (find_base_value): Ditto.
28162 (mems_in_disjoint_alias_sets_p): Ditto.
28163 (get_alias_set_entry): Ditto.
28164 (decl_for_component_ref): Ditto.
28165 (write_dependence_p): Ditto.
28166 (memory_modified_1): Ditto.
28167 (mems_in_disjoint_alias_set_p): Change return type from int to bool
28168 and adjust function body accordingly.
28169 (alias_sets_conflict_p): Ditto.
28170 (alias_sets_must_conflict_p): Ditto.
28171 (objects_must_conflict_p): Ditto.
28172 (rtx_equal_for_memref_p): Ditto.
28173 (base_alias_check): Ditto.
28174 (read_dependence): Ditto.
28175 (nonoverlapping_memrefs_p): Ditto.
28176 (true_dependence_1): Ditto.
28177 (true_dependence): Ditto.
28178 (canon_true_dependence): Ditto.
28179 (write_dependence_p): Ditto.
28180 (anti_dependence): Ditto.
28181 (canon_anti_dependence): Ditto.
28182 (output_dependence): Ditto.
28183 (canon_output_dependence): Ditto.
28184 (may_alias_p): Ditto.
28185 (init_alias_analysis): Change "changed" variable to bool.
28187 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28189 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
28190 expand into define_insn_and_split.
28192 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28194 * config/riscv/vector.md: Remove FRM.
28196 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28198 * config/riscv/vector.md: Remove FRM.
28200 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28202 * config/riscv/vector.md: Remove FRM.
28204 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
28207 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
28210 2023-05-31 Richard Biener <rguenther@suse.de>
28213 PR tree-optimization/109143
28214 * tree-ssa-structalias.cc (struct topo_info): Remove.
28215 (init_topo_info): Likewise.
28216 (free_topo_info): Likewise.
28217 (compute_topo_order): Simplify API, put the component
28218 with ESCAPED last so it's processed first.
28219 (topo_visit): Adjust.
28220 (solve_graph): Likewise.
28222 2023-05-31 Richard Biener <rguenther@suse.de>
28224 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
28226 (add_graph_edge): Count redundant edges we avoid to create.
28227 (dump_sa_stats): Dump them.
28228 (ipa_pta_execute): Do not dump generating constraints when
28229 we are not dumping them.
28231 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28233 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
28234 output template to avoid explicit switch on which_alternative.
28235 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
28236 (and<mode>3): Likewise.
28237 (ior<mode>3): Likewise.
28238 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
28240 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28242 * config/xtensa/predicates.md (xtensa_bit_join_operator):
28244 * config/xtensa/xtensa.md (ior_op): Remove.
28245 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
28246 insn_and_split pattern of the same name to express and capture
28247 the bit-combining operation with both sides swapped.
28248 In addition, replace use of code iterator with new operator
28250 (*shlrd_const, *shlrd_per_byte):
28251 Likewise regarding the code iterator.
28253 2023-05-31 Cui, Lili <lili.cui@intel.com>
28255 PR tree-optimization/110038
28256 * params.opt: Add a limit on tree-reassoc-width.
28257 * tree-ssa-reassoc.cc
28258 (rewrite_expr_tree_parallel): Add width limit.
28260 2023-05-31 Pan Li <pan2.li@intel.com>
28262 * common/config/riscv/riscv-common.cc:
28263 (riscv_implied_info): Add zvfh item.
28264 (riscv_ext_version_table): Ditto.
28265 (riscv_ext_flag_table): Ditto.
28266 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
28267 (TARGET_ZVFH): Ditto.
28269 2023-05-30 liuhongt <hongtao.liu@intel.com>
28271 PR tree-optimization/108804
28272 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
28273 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
28274 Add new parameter narrow_src_p.
28275 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
28276 vectorization by truncating to lower precision.
28277 * tree-vectorizer.h (vect_get_range_info): New declare.
28279 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
28281 * lra-int.h (lra_update_sp_offset): Add the prototype.
28282 * lra.cc (setup_sp_offset): Change the return type. Use
28283 lra_update_sp_offset.
28284 * lra-eliminations.cc (lra_update_sp_offset): New function.
28285 (lra_process_new_insns): Push the current insn to reprocess if the
28286 input reload changes sp offset.
28288 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
28291 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
28292 Fix misleading identation.
28294 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
28296 * rtl.h (comparison_dominates_p): Change return type from int to bool.
28297 (condjump_p): Ditto.
28298 (any_condjump_p): Ditto.
28299 (any_uncondjump_p): Ditto.
28300 (simplejump_p): Ditto.
28301 (returnjump_p): Ditto.
28302 (eh_returnjump_p): Ditto.
28303 (onlyjump_p): Ditto.
28304 (invert_jump_1): Ditto.
28305 (invert_jump): Ditto.
28306 (rtx_renumbered_equal_p): Ditto.
28307 (redirect_jump_1): Ditto.
28308 (redirect_jump): Ditto.
28309 (condjump_in_parallel_p): Ditto.
28310 * jump.cc (invert_exp_1): Adjust forward declaration.
28311 (comparison_dominates_p): Change return type from int to bool
28312 and adjust function body accordingly.
28313 (simplejump_p): Ditto.
28314 (condjump_p): Ditto.
28315 (condjump_in_parallel_p): Ditto.
28316 (any_uncondjump_p): Ditto.
28317 (any_condjump_p): Ditto.
28318 (returnjump_p): Ditto.
28319 (eh_returnjump_p): Ditto.
28320 (onlyjump_p): Ditto.
28321 (redirect_jump_1): Ditto.
28322 (redirect_jump): Ditto.
28323 (invert_exp_1): Ditto.
28324 (invert_jump_1): Ditto.
28325 (invert_jump): Ditto.
28326 (rtx_renumbered_equal_p): Ditto.
28328 2023-05-30 Andrew Pinski <apinski@marvell.com>
28330 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
28331 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
28332 Add ne as a possible cmp.
28333 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
28335 2023-05-30 Andrew Pinski <apinski@marvell.com>
28337 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
28340 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
28342 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
28343 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
28344 (and (extend X) C) as (zero_extend (and X C)), to also optimize
28345 modes wider than HOST_WIDE_INT.
28347 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
28350 * simplify-rtx.cc (simplify_const_relational_operation): Return
28351 early if we have a MODE_CC comparison that isn't a COMPARE against
28354 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
28356 * config/riscv/riscv.cc (riscv_const_insns): Allow
28357 const_vec_duplicates.
28359 2023-05-30 liuhongt <hongtao.liu@intel.com>
28361 PR middle-end/108938
28362 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
28363 function, cut from original find_bswap_or_nop function.
28364 (find_bswap_or_nop): Add a new parameter, detect bswap +
28365 rotate and save rotate result in the new parameter.
28366 (bswap_replace): Add a new parameter to indicate rotate and
28367 generate rotate stmt if needed.
28368 (maybe_optimize_vector_constructor): Adjust for new rotate
28369 parameter in the upper 2 functions.
28370 (pass_optimize_bswap::execute): Ditto.
28371 (imm_store_chain_info::output_merged_store): Ditto.
28373 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28375 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
28376 (aarch64_<su>adalp<mode>): New define_expand.
28377 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
28378 (aarch64_<su>addlp<mode>): Convert to define_expand.
28379 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
28380 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
28382 (USADDLP): Likewise.
28383 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
28385 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28387 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
28388 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
28389 srhadd, urhadd builtin codes for standard optab ones.
28390 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
28391 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
28393 (<u>avg<mode>3_ceil): Rename to...
28394 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
28396 (aarch64_<su>hsub<mode>): New define_expand.
28397 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
28398 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
28399 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
28401 2023-05-30 Andreas Schwab <schwab@suse.de>
28404 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
28405 match libsanitizer.
28407 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28409 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
28410 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
28412 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
28413 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
28414 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
28415 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
28416 (aarch64_<sra_op>sra_n<mode>): New define_expand.
28417 (aarch64_<sra_op>rsra_n<mode>): Likewise.
28418 (aarch64_<sur>sra_n<mode>): Rename to...
28419 (aarch64_<sur>sra_ndi): ... This.
28420 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
28421 any_target_p argument.
28422 (aarch64_extract_vec_duplicate_wide_int): Define.
28423 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
28424 (aarch64_const_vec_rnd_cst_p): Likewise.
28425 (aarch64_vector_mode_supported_any_target_p): Likewise.
28426 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
28427 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
28428 (VSRA): Adjust for the above.
28430 (V2XWIDE): New mode_attr.
28431 (vec_or_offset): Likewise.
28432 (SHIFTEXTEND): Likewise.
28433 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
28435 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
28436 clarify that it applies to current target options.
28437 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
28438 * doc/tm.texi.in: Regenerate.
28439 * stor-layout.cc (mode_for_vector): Check
28440 vector_mode_supported_any_target_p when iterating through vector modes.
28441 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
28442 clarify that it applies to current target options.
28443 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
28445 2023-05-30 Lili Cui <lili.cui@intel.com>
28447 PR tree-optimization/98350
28448 * tree-ssa-reassoc.cc
28449 (rewrite_expr_tree_parallel): Rewrite this function.
28450 (rank_ops_for_fma): New.
28451 (reassociate_bb): Handle new function.
28453 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
28455 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
28456 (rtx_unstable_p): Ditto.
28457 (reg_mentioned_p): Ditto.
28458 (reg_referenced_p): Ditto.
28459 (reg_used_between_p): Ditto.
28460 (reg_set_between_p): Ditto.
28461 (modified_between_p): Ditto.
28462 (no_labels_between_p): Ditto.
28463 (modified_in_p): Ditto.
28464 (reg_set_p): Ditto.
28465 (multiple_sets): Ditto.
28466 (set_noop_p): Ditto.
28467 (noop_move_p): Ditto.
28468 (reg_overlap_mentioned_p): Ditto.
28469 (dead_or_set_p): Ditto.
28470 (dead_or_set_regno_p): Ditto.
28471 (find_reg_fusage): Ditto.
28472 (find_regno_fusage): Ditto.
28473 (side_effects_p): Ditto.
28474 (volatile_refs_p): Ditto.
28475 (volatile_insn_p): Ditto.
28476 (may_trap_p_1): Ditto.
28477 (may_trap_p): Ditto.
28478 (may_trap_or_fault_p): Ditto.
28479 (computed_jump_p): Ditto.
28480 (auto_inc_p): Ditto.
28481 (loc_mentioned_in_p): Ditto.
28482 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
28483 (rtx_unstable_p): Change return type from int to bool
28484 and adjust function body accordingly.
28485 (rtx_addr_can_trap_p): Ditto.
28486 (reg_mentioned_p): Ditto.
28487 (no_labels_between_p): Ditto.
28488 (reg_used_between_p): Ditto.
28489 (reg_referenced_p): Ditto.
28490 (reg_set_between_p): Ditto.
28491 (reg_set_p): Ditto.
28492 (modified_between_p): Ditto.
28493 (modified_in_p): Ditto.
28494 (multiple_sets): Ditto.
28495 (set_noop_p): Ditto.
28496 (noop_move_p): Ditto.
28497 (reg_overlap_mentioned_p): Ditto.
28498 (dead_or_set_p): Ditto.
28499 (dead_or_set_regno_p): Ditto.
28500 (find_reg_fusage): Ditto.
28501 (find_regno_fusage): Ditto.
28502 (remove_node_from_insn_list): Ditto.
28503 (volatile_insn_p): Ditto.
28504 (volatile_refs_p): Ditto.
28505 (side_effects_p): Ditto.
28506 (may_trap_p_1): Ditto.
28507 (may_trap_p): Ditto.
28508 (may_trap_or_fault_p): Ditto.
28509 (computed_jump_p): Ditto.
28510 (auto_inc_p): Ditto.
28511 (loc_mentioned_in_p): Ditto.
28512 * combine.cc (can_combine_p): Update indirect function.
28514 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28516 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
28517 * config/riscv/iterators.md: New attribute.
28518 * config/riscv/vector-iterators.md: New attribute.
28520 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
28522 * config/riscv/riscv.md: Fix signed and unsigned comparison
28525 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28527 * config/riscv/autovec.md (fnma<mode>4): New pattern.
28528 (*fnma<mode>): Ditto.
28530 2023-05-29 Die Li <lidie@eswincomputing.com>
28532 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
28534 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
28535 process for TARGET_XTHEADCONDMOV
28537 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
28540 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
28541 TARGET_AVX512BW to generate truncv16hiv16qi2.
28543 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
28545 * config/riscv/riscv.md (and<mode>3): New expander.
28546 (*and<mode>3) New pattern.
28547 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
28550 2023-05-29 Pan Li <pan2.li@intel.com>
28552 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
28553 comments and rename local variables.
28554 (emit_nonvlmax_insn): Diito.
28555 (emit_vlmax_merge_insn): Ditto.
28556 (emit_vlmax_cmp_insn): Ditto.
28557 (emit_vlmax_cmp_mu_insn): Ditto.
28558 (emit_scalar_move_insn): Ditto.
28560 2023-05-29 Pan Li <pan2.li@intel.com>
28562 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
28564 (emit_nonvlmax_insn): Ditto.
28565 (emit_vlmax_merge_insn): Ditto.
28566 (emit_vlmax_cmp_insn): Ditto.
28567 (emit_vlmax_cmp_mu_insn): Ditto.
28568 (expand_vec_series): Ditto.
28570 2023-05-29 Pan Li <pan2.li@intel.com>
28572 * config/riscv/riscv-protos.h (enum insn_type): New type.
28573 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
28574 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
28576 (rvv_builder::get_merged_repeating_sequence): Ditto.
28577 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
28578 to evaluate the optimization cost.
28579 (rvv_builder::get_merge_scalar_mask): New function to get the merge
28581 (emit_scalar_move_insn): New function to emit vmv.s.x.
28582 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
28583 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
28585 (get_repeating_sequence_dup_machine_mode): New function to get the dup
28587 (expand_vector_init_merge_repeating_sequence): New function to perform
28589 (expand_vec_init): Add this vector init optimization.
28590 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
28592 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
28594 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
28595 put onto the increment when it is inserted after the position.
28597 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
28599 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
28602 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28604 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
28606 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28608 * config/riscv/autovec.md (fma<mode>4): New pattern.
28609 (*fma<mode>): Ditto.
28610 * config/riscv/riscv-protos.h (enum insn_type): New enum.
28611 (emit_vlmax_ternary_insn): New function.
28612 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
28614 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28616 * config/riscv/vector.md: Fix vimuladd instruction bug.
28618 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28620 * config/riscv/riscv.cc (global_state_unknown_p): New function.
28621 (riscv_mode_after): Fix incorrect VXM.
28623 2023-05-29 Pan Li <pan2.li@intel.com>
28625 * common/config/riscv/riscv-common.cc:
28626 (riscv_implied_info): Add zvfhmin item.
28627 (riscv_ext_version_table): Ditto.
28628 (riscv_ext_flag_table): Ditto.
28629 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
28630 (TARGET_ZFHMIN): Align indent.
28631 (TARGET_ZFH): Ditto.
28632 (TARGET_ZVFHMIN): New macro.
28634 2023-05-27 liuhongt <hongtao.liu@intel.com>
28637 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
28638 to VI_AVX2 to cover more modes.
28640 2023-05-27 liuhongt <hongtao.liu@intel.com>
28642 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
28643 Remove ATOM and ICELAKE(and later) core processors.
28645 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
28647 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
28649 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
28651 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
28654 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
28655 Juzhe Zhong <juzhe.zhong@rivai.ai>
28657 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
28659 (<optab><v_quad_trunc><mode>2): Dito.
28660 (<optab><v_oct_trunc><mode>2): Dito.
28661 (trunc<mode><v_double_trunc>2): Dito.
28662 (trunc<mode><v_quad_trunc>2): Dito.
28663 (trunc<mode><v_oct_trunc>2): Dito.
28664 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
28665 (autovectorize_vector_modes): Define.
28666 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
28668 (autovectorize_vector_modes): Implement hook.
28669 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
28670 Implement target hook.
28671 (riscv_vectorize_related_mode): Implement target hook.
28672 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
28673 (TARGET_VECTORIZE_RELATED_MODE): Define.
28674 * config/riscv/vector-iterators.md: Add lowercase versions of
28675 mode_attr iterators.
28677 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
28678 Tobias Burnus <tobias@codesourcery.com>
28680 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
28681 (ASM_SPEC): Use XNACKOPT.
28682 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
28683 (enum hsaco_attr_type): ... this, and generalize the names.
28684 (TARGET_XNACK): New macro.
28685 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
28687 (output_file_start): Update xnack handling.
28688 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
28689 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
28690 (sram_ecc_type): Rename to ...
28691 (hsaco_attr_type: ... this.)
28692 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
28693 (TEST_XNACK): Delete.
28694 (TEST_XNACK_ANY): New macro.
28695 (TEST_XNACK_ON): New macro.
28696 (main): Support the new -mxnack=on/off/any syntax.
28697 * doc/invoke.texi (-mxnack): Update for new syntax.
28699 2023-05-26 Andrew Pinski <apinski@marvell.com>
28701 * genmatch.cc (emit_debug_printf): New function.
28702 (dt_simplify::gen_1): Emit printf into the code
28703 before the `return true` or returning the folded result
28704 instead of emitting it always.
28706 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28708 * config/xtensa/xtensa-protos.h
28709 (xtensa_expand_block_set_unrolled_loop,
28710 xtensa_expand_block_set_small_loop): Remove.
28711 (xtensa_expand_block_set): New prototype.
28712 * config/xtensa/xtensa.cc
28713 (xtensa_expand_block_set_libcall): New subfunction.
28714 (xtensa_expand_block_set_unrolled_loop,
28715 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
28716 (xtensa_expand_block_set): New function that calls the above
28718 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
28719 xtensa_expand_block_set().
28721 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28723 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
28725 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
28727 * config/xtensa/constraints.md (O):
28728 Change to use the above function.
28729 * config/xtensa/xtensa.md (*subsi3_from_const):
28730 New insn_and_split pattern.
28732 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28734 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
28735 Retract excessive line folding, and correct the value of
28736 the "length" insn attribute related to TARGET_DENSITY.
28737 (*extzvsi-1bit_addsubx): Ditto.
28739 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
28741 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
28742 Do not disable call to ix86_expand_vecop_qihi2.
28744 2023-05-26 liuhongt <hongtao.liu@intel.com>
28748 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
28749 calculation when !hard_regno_mode_ok for GENERAL_REGS and
28750 mode, otherwise still use GENERAL_REGS.
28752 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28754 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
28755 explict VL and drop VL in ops.
28757 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
28759 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
28760 in different BB blocks.
28762 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
28764 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
28765 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
28766 instructions when available. Emulate truncation via
28767 ix86_expand_vec_perm_const_1 when native truncate insn
28769 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
28770 when available. Trivially rename some variables.
28771 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
28772 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
28773 calculation of V*QImode emulations to account for generation of
28774 2x-wider mode instructions.
28775 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
28776 emulations to account for generation of 2x-wider mode instructions.
28778 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
28781 * config/avr/avr.cc (avr_can_inline_p): New static function.
28782 (TARGET_CAN_INLINE_P): Define to that function.
28784 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
28787 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
28788 Handle any bit position and use mode QISI.
28789 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
28790 of 2 insns for bit-transfer of respective style.
28792 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
28794 * config/arm/iterators.md (MVE_6): Remove.
28795 * config/arm/mve.md: Replace MVE_6 with MVE_5.
28797 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28798 Richard Sandiford <richard.sandiford@arm.com>
28800 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
28802 (vect_set_loop_controls_directly): Add decrement IV support.
28803 (vect_set_loop_condition_partial_vectors): Ditto.
28804 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
28806 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
28809 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28812 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
28813 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
28814 Fix canonicalization of PLUS operands.
28815 (aarch64_fcmla<rot><mode>): Rename to...
28816 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
28817 Fix canonicalization of PLUS operands.
28818 (aarch64_fcmla_lane<rot><mode>): Rename to...
28819 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
28820 Fix canonicalization of PLUS operands.
28821 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
28822 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
28823 Fix canonicalization of PLUS operands.
28824 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
28826 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
28828 * config/arm/arm.md (rbitsi2): Rename to...
28829 (arm_rbit): ... This.
28830 (ctzsi2): Adjust for the above.
28831 (arm_rev16si2): Convert to define_expand.
28832 (arm_rev16si2_alt1): New pattern.
28833 (arm_rev16si2_alt): Rename to...
28834 (*arm_rev16si2_alt2): ... This.
28835 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
28836 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
28837 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
28838 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
28840 2023-05-25 Alex Coplan <alex.coplan@arm.com>
28843 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
28845 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
28846 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
28847 DFmode as an rvalue.
28849 2023-05-25 Richard Biener <rguenther@suse.de>
28852 * tree-vect-stmts.cc (vectorizable_condition): For
28853 embedded comparisons also handle the case when the target
28854 only provides vec_cmp and vcond_mask.
28856 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
28858 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
28861 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28863 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
28864 (seq_cost_ignoring_scalar_moves): Likewise.
28865 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
28867 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28869 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
28870 (vcage_f32): Likewise.
28871 (vcages_f32): Likewise.
28872 (vcageq_f32): Likewise.
28873 (vcaged_f64): Likewise.
28874 (vcageq_f64): Likewise.
28875 (vcagts_f32): Likewise.
28876 (vcagt_f32): Likewise.
28877 (vcagt_f64): Likewise.
28878 (vcagtq_f32): Likewise.
28879 (vcagtd_f64): Likewise.
28880 (vcagtq_f64): Likewise.
28881 (vcale_f32): Likewise.
28882 (vcale_f64): Likewise.
28883 (vcaled_f64): Likewise.
28884 (vcales_f32): Likewise.
28885 (vcaleq_f32): Likewise.
28886 (vcaleq_f64): Likewise.
28887 (vcalt_f32): Likewise.
28888 (vcalt_f64): Likewise.
28889 (vcaltd_f64): Likewise.
28890 (vcaltq_f32): Likewise.
28891 (vcaltq_f64): Likewise.
28892 (vcalts_f32): Likewise.
28894 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
28898 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
28899 int to const int or const int to const unsigned int.
28900 (_mm512_mask_srli_epi16): Ditto.
28901 (_mm512_slli_epi16): Ditto.
28902 (_mm512_mask_slli_epi16): Ditto.
28903 (_mm512_maskz_slli_epi16): Ditto.
28904 (_mm512_srai_epi16): Ditto.
28905 (_mm512_mask_srai_epi16): Ditto.
28906 (_mm512_maskz_srai_epi16): Ditto.
28907 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
28908 (_mm512_mask_slli_epi64): Ditto.
28909 (_mm512_maskz_slli_epi64): Ditto.
28910 (_mm512_srli_epi64): Ditto.
28911 (_mm512_mask_srli_epi64): Ditto.
28912 (_mm512_maskz_srli_epi64): Ditto.
28913 (_mm512_srai_epi64): Ditto.
28914 (_mm512_mask_srai_epi64): Ditto.
28915 (_mm512_maskz_srai_epi64): Ditto.
28916 (_mm512_slli_epi32): Ditto.
28917 (_mm512_mask_slli_epi32): Ditto.
28918 (_mm512_maskz_slli_epi32): Ditto.
28919 (_mm512_srli_epi32): Ditto.
28920 (_mm512_mask_srli_epi32): Ditto.
28921 (_mm512_maskz_srli_epi32): Ditto.
28922 (_mm512_srai_epi32): Ditto.
28923 (_mm512_mask_srai_epi32): Ditto.
28924 (_mm512_maskz_srai_epi32): Ditto.
28925 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
28926 (_mm256_maskz_srai_epi16): Ditto.
28927 (_mm_mask_srai_epi16): Ditto.
28928 (_mm_maskz_srai_epi16): Ditto.
28929 (_mm256_mask_slli_epi16): Ditto.
28930 (_mm256_maskz_slli_epi16): Ditto.
28931 (_mm_mask_slli_epi16): Ditto.
28932 (_mm_maskz_slli_epi16): Ditto.
28933 (_mm_maskz_srli_epi16): Ditto.
28934 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
28935 (_mm256_maskz_srli_epi32): Ditto.
28936 (_mm_mask_srli_epi32): Ditto.
28937 (_mm_maskz_srli_epi32): Ditto.
28938 (_mm256_mask_srli_epi64): Ditto.
28939 (_mm256_maskz_srli_epi64): Ditto.
28940 (_mm_mask_srli_epi64): Ditto.
28941 (_mm_maskz_srli_epi64): Ditto.
28942 (_mm256_mask_srai_epi32): Ditto.
28943 (_mm256_maskz_srai_epi32): Ditto.
28944 (_mm_mask_srai_epi32): Ditto.
28945 (_mm_maskz_srai_epi32): Ditto.
28946 (_mm256_srai_epi64): Ditto.
28947 (_mm256_mask_srai_epi64): Ditto.
28948 (_mm256_maskz_srai_epi64): Ditto.
28949 (_mm_srai_epi64): Ditto.
28950 (_mm_mask_srai_epi64): Ditto.
28951 (_mm_maskz_srai_epi64): Ditto.
28952 (_mm_mask_slli_epi32): Ditto.
28953 (_mm_maskz_slli_epi32): Ditto.
28954 (_mm_mask_slli_epi64): Ditto.
28955 (_mm_maskz_slli_epi64): Ditto.
28956 (_mm256_mask_slli_epi32): Ditto.
28957 (_mm256_maskz_slli_epi32): Ditto.
28958 (_mm256_mask_slli_epi64): Ditto.
28959 (_mm256_maskz_slli_epi64): Ditto.
28961 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28963 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
28966 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28968 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
28969 * data-streamer-out.cc (streamer_write_vrange): Same.
28970 * value-range.h (class vrange): Make streamer_write_vrange a friend.
28972 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28974 * value-query.cc (range_query::get_tree_range): Set NAN directly
28976 * value-range.cc (frange::set): Assert that bounds are not NAN.
28978 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28980 * value-range.cc (add_vrange): Handle known NANs.
28982 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28984 * value-range.h (frange::set_nan): New.
28986 2023-05-25 Alexandre Oliva <oliva@adacore.com>
28989 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
28990 requires stricter alignment than MEM's.
28992 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28994 PR tree-optimization/107822
28995 PR tree-optimization/107986
28996 * Makefile.in (OBJS): Add gimple-range-phi.o.
28997 * gimple-range-cache.h (ranger_cache::m_estimate): New
28998 phi_analyzer pointer member.
28999 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
29000 phi_analyzer if no loop info is available.
29001 * gimple-range-phi.cc: New file.
29002 * gimple-range-phi.h: New file.
29003 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
29005 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
29007 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
29009 (fold_range): Add range_query parameter.
29010 (fur_relation::fur_relation): New.
29011 (fur_relation::trio): New.
29012 (fur_relation::register_relation): New.
29013 (fold_relations): New.
29014 * gimple-range-fold.h (fold_range): Adjust prototypes.
29015 (fold_relations): New.
29017 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
29019 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
29020 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
29021 (ranger_cache::const_query): New.
29022 * gimple-range.cc (gimple_ranger::const_query): New.
29023 * gimple-range.h (gimple_ranger::const_query): New prototype.
29025 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
29027 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
29028 (ssa_cache::dump_range_query): Delete.
29029 (ssa_lazy_cache::dump_range_query): Delete.
29030 (ssa_lazy_cache::get_range): Move from header file.
29031 (ssa_lazy_cache::clear_range): ditto.
29032 (ssa_lazy_cache::clear): Ditto.
29033 * gimple-range-cache.h (class ssa_cache): Virtualize.
29034 (class ssa_lazy_cache): Inherit and virtualize.
29036 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
29038 * value-range.h (vrange::kind): Remove.
29040 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
29042 PR middle-end/109840
29043 * match.pd <popcount optimizations>: Preserve zero-extension when
29044 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
29045 popcount((T)x), so the popcount's argument keeps the same type.
29046 <parity optimizations>: Likewise preserve extensions when
29047 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
29048 parity((T)x), so that the parity's argument type is the same.
29050 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
29052 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
29053 (ipcp_store_vr_results): Same.
29054 * ipa-prop.cc (ipa_vr::ipa_vr): New.
29055 (ipa_vr::get_vrange): New.
29056 (ipa_vr::set_unknown): New.
29057 (ipa_vr::streamer_read): New.
29058 (ipa_vr::streamer_write): New.
29059 (write_ipcp_transformation_info): Use new ipa_vr API.
29060 (read_ipcp_transformation_info): Same.
29061 (ipa_vr::nonzero_p): Delete.
29062 (ipcp_update_vr): Use new ipa_vr API.
29063 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
29064 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
29066 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
29068 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
29069 silence overflow warnings later on.
29071 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
29073 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
29074 Remove handling of V8QImode.
29075 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
29076 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
29077 (v<insn>v4qi3): Ditto.
29078 * config/i386/sse.md (v<insn>v8qi3): Remove.
29080 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29083 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
29084 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
29085 (aarch64_simd_ashr<mode>): Rename to...
29086 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
29087 (aarch64_simd_imm_shl<mode>): Rename to...
29088 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
29089 (aarch64_simd_reg_sshl<mode>): Rename to...
29090 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
29091 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
29092 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
29093 (aarch64_simd_reg_shl<mode>_signed): Rename to...
29094 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
29095 (vec_shr_<mode>): Rename to...
29096 (vec_shr_<mode><vczle><vczbe>): ... This.
29097 (aarch64_<sur>shl<mode>): Rename to...
29098 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
29099 (aarch64_<sur>q<r>shl<mode>): Rename to...
29100 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
29102 2023-05-24 Richard Biener <rguenther@suse.de>
29105 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
29106 Perform final vector composition using
29107 ix86_expand_vector_init_general instead of setting
29108 the highpart and lowpart which causes spilling.
29110 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
29112 PR tree-optimization/109695
29113 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
29115 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
29116 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
29117 flag to set_global_range.
29118 (gimple_ranger::prefill_stmt_dependencies): Ditto.
29120 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
29122 PR tree-optimization/109695
29123 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
29125 (temporal_cache::current_p): Check always_current method.
29126 (temporal_cache::set_always_current): Add param and set value
29128 (temporal_cache::always_current_p): New.
29129 (ranger_cache::get_global_range): Adjust.
29130 (ranger_cache::set_global_range): set always current first.
29132 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
29134 PR tree-optimization/109695
29135 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
29136 fold_range with global query to choose an initial value.
29138 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29140 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
29143 2023-05-24 Richard Biener <rguenther@suse.de>
29145 PR tree-optimization/109849
29146 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
29147 expressions but take the first sets.
29149 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
29152 * doc/gm2.texi (High procedure function): New node.
29153 (Using): New menu entry for High procedure function.
29155 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
29157 PR rtl-optimization/109940
29158 * early-remat.cc (postorder_index): Rename to...
29159 (rpo_index): ...this.
29160 (compare_candidates): Sort by decreasing rpo_index rather than
29161 increasing postorder_index.
29162 (early_remat::sort_candidates): Calculate the forward RPO from
29164 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
29165 rather than DF_BACKWARD in reverse.
29167 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29170 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
29171 qualifier_none for the return operand.
29173 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29175 * config/riscv/autovec.md (<optab><mode>3): New pattern.
29176 (one_cmpl<mode>2): Ditto.
29177 (*<optab>not<mode>): Ditto.
29178 (*n<optab><mode>): Ditto.
29179 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
29182 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
29184 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
29185 calculation on n_perms by considering nvectors_per_build.
29187 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29188 Richard Sandiford <richard.sandiford@arm.com>
29190 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
29191 (vec_cmp<mode><vm>): New pattern.
29192 (vec_cmpu<mode><vm>): New pattern.
29193 (vcond<V:mode><VI:mode>): New pattern.
29194 (vcondu<V:mode><VI:mode>): New pattern.
29195 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
29196 (emit_vlmax_merge_insn): New function.
29197 (emit_vlmax_cmp_insn): Ditto.
29198 (emit_vlmax_cmp_mu_insn): Ditto.
29199 (expand_vec_cmp): Ditto.
29200 (expand_vec_cmp_float): Ditto.
29201 (expand_vcond): Ditto.
29202 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
29203 (emit_vlmax_cmp_insn): Ditto.
29204 (emit_vlmax_cmp_mu_insn): Ditto.
29205 (get_cmp_insn_code): Ditto.
29206 (expand_vec_cmp): Ditto.
29207 (expand_vec_cmp_float): Ditto.
29208 (expand_vcond): Ditto.
29210 2023-05-24 Pan Li <pan2.li@intel.com>
29212 * config/riscv/genrvv-type-indexer.cc (main): Add
29213 unsigned_eew*_lmul1_interpret for indexer.
29214 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
29215 Register vuint*m1_t interpret function.
29216 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
29217 New macro for vuint8m1_t.
29218 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
29219 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
29220 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
29221 (vbool1_t): Add to unsigned_eew*_interpret_ops.
29222 (vbool2_t): Likewise.
29223 (vbool4_t): Likewise.
29224 (vbool8_t): Likewise.
29225 (vbool16_t): Likewise.
29226 (vbool32_t): Likewise.
29227 (vbool64_t): Likewise.
29228 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
29229 New macro for vuint*m1_t.
29230 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
29231 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
29232 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
29233 (required_extensions_p): Add vuint*m1_t interpret case.
29234 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
29235 Add vuint*m1_t interpret to base type.
29236 (unsigned_eew16_lmul1_interpret): Likewise.
29237 (unsigned_eew32_lmul1_interpret): Likewise.
29238 (unsigned_eew64_lmul1_interpret): Likewise.
29240 2023-05-24 Pan Li <pan2.li@intel.com>
29242 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
29243 for the eew size list.
29244 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
29245 (main): Add signed_eew*_lmul1_interpret for indexer.
29246 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
29247 Register vint*m1_t interpret function.
29248 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
29249 New macro for vint8m1_t.
29250 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
29251 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
29252 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
29253 (vbool1_t): Add to signed_eew*_interpret_ops.
29254 (vbool2_t): Likewise.
29255 (vbool4_t): Likewise.
29256 (vbool8_t): Likewise.
29257 (vbool16_t): Likewise.
29258 (vbool32_t): Likewise.
29259 (vbool64_t): Likewise.
29260 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
29261 New macro for vint*m1_t.
29262 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
29263 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
29264 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
29265 (required_extensions_p): Add vint8m1_t interpret case.
29266 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
29267 Add vint*m1_t interpret to base type.
29268 (signed_eew16_lmul1_interpret): Likewise.
29269 (signed_eew32_lmul1_interpret): Likewise.
29270 (signed_eew64_lmul1_interpret): Likewise.
29272 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29274 * config/riscv/autovec.md: Adjust for new interface.
29275 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
29276 (emit_nonvlmax_insn): Add AVL operand.
29277 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
29278 (emit_nonvlmax_insn): Add AVL operand.
29279 (sew64_scalar_helper): Adjust for new interface.
29280 (expand_tuple_move): Ditto.
29281 * config/riscv/vector.md: Ditto.
29283 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29285 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
29286 (expand_const_vector): Ditto.
29287 (legitimize_move): Ditto.
29288 (sew64_scalar_helper): Ditto.
29289 (expand_tuple_move): Ditto.
29290 (expand_vector_init_insert_elems): Ditto.
29291 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
29293 2023-05-24 liuhongt <hongtao.liu@intel.com>
29296 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
29297 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
29298 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
29299 (ix86_masked_all_ones): Handle 64-bit mask.
29300 * config/i386/i386-builtin.def: Replace icode of related
29301 non-mask simd abs builtins with CODE_FOR_nothing.
29303 2023-05-23 Martin Uecker <uecker@tugraz.at>
29306 * function.cc (gimplify_parm_type): Remove function.
29307 (gimplify_parameters): Call gimplify_type_sizes.
29309 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29311 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
29312 and change to also accept '*subx' pattern.
29315 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29317 * config/xtensa/predicates.md (addsub_operator): New.
29318 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
29319 *extzvsi-1bit_addsubx): New insn_and_split patterns.
29320 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
29321 Add a special case about ifcvt 'noce_try_cmove()' to handle
29322 constant loads that do not fit into signed 12 bits in the
29323 patterns added above.
29325 2023-05-23 Richard Biener <rguenther@suse.de>
29327 PR tree-optimization/109747
29328 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
29329 the SLP node only once to the cost hook.
29331 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
29333 * config/avr/avr.cc (avr_insn_cost): New static function.
29334 (TARGET_INSN_COST): Define to that function.
29336 2023-05-23 Richard Biener <rguenther@suse.de>
29339 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
29340 For vector construction or splats apply GPR->XMM move
29341 costing. QImode memory can be handled directly only
29342 with SSE4.1 pinsrb.
29344 2023-05-23 Richard Biener <rguenther@suse.de>
29346 PR tree-optimization/108752
29347 * tree-vect-stmts.cc (vectorizable_operation): For bit
29348 operations with generic word_mode vectors do not cost
29349 an extra stmt. For plus, minus and negate also cost the
29350 constant materialization.
29352 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
29354 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
29355 Call ix86_expand_vec_shift_qihi_constant for shifts
29356 with constant count operand.
29357 * config/i386/i386.cc (ix86_shift_rotate_cost):
29358 Handle V4QImode and V8QImode.
29359 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
29360 (<insn>v4qi3): Ditto.
29362 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29364 * config/riscv/vector.md: Add mode.
29366 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
29368 PR tree-optimization/109934
29369 * value-range.cc (irange::invert): Remove buggy special case.
29371 2023-05-23 Richard Biener <rguenther@suse.de>
29373 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
29376 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
29379 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
29380 subregs between any scalars that are 64 bits or smaller.
29381 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
29382 (bits_etype): New int attribute.
29383 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
29384 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
29385 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
29387 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
29389 * doc/md.texi: Document that <FOO> can be used to refer to the
29390 numerical value of an int iterator FOO. Tweak other parts of
29391 the int iterator documentation.
29392 * read-rtl.cc (iterator_group::has_self_attr): New field.
29393 (map_attr_string): When has_self_attr is true, make <FOO>
29394 expand to the current value of iterator FOO.
29395 (initialize_iterators): Set has_self_attr for int iterators.
29397 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29399 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
29400 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
29401 (RVV_UNOP_NUM): New macro.
29402 (RVV_BINOP_NUM): Ditto.
29403 (legitimize_move): Refactor the framework of RVV auto-vectorization.
29404 (emit_vlmax_op): Ditto.
29405 (emit_vlmax_reg_op): Ditto.
29406 (emit_len_op): Ditto.
29407 (emit_len_binop): Ditto.
29408 (emit_vlmax_tany_many): Ditto.
29409 (emit_nonvlmax_tany_many): Ditto.
29410 (sew64_scalar_helper): Ditto.
29411 (expand_tuple_move): Ditto.
29412 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
29413 (emit_pred_binop): Ditto.
29414 (emit_vlmax_op): Ditto.
29415 (emit_vlmax_tany_many): New function.
29416 (emit_len_op): Remove.
29417 (emit_nonvlmax_tany_many): New function.
29418 (emit_vlmax_reg_op): Remove.
29419 (emit_len_binop): Ditto.
29420 (emit_index_op): Ditto.
29421 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
29422 (expand_const_vector): Ditto.
29423 (legitimize_move): Ditto.
29424 (sew64_scalar_helper): Ditto.
29425 (expand_tuple_move): Ditto.
29426 (expand_vector_init_insert_elems): Ditto.
29427 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
29428 * config/riscv/vector.md: Ditto.
29430 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29433 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
29434 and constraint for operand 0.
29435 (add_vec_concat_subst_be): Likewise.
29437 2023-05-23 Richard Biener <rguenther@suse.de>
29439 PR tree-optimization/109849
29440 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
29441 and use that to determine what to hoist.
29443 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
29445 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
29446 specific treatment for bit-fields only if they have an integral type
29447 and filter out non-integral bit-fields that do not start and end on
29450 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
29452 PR tree-optimization/109920
29453 * value-range.h (RESIZABLE>::~int_range): Use delete[].
29455 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
29457 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
29458 calcuation of integer vector mode costs to reflect generated
29459 instruction sequences of different integer vector modes and
29460 different target ABIs. Remove "speed" function argument.
29461 (ix86_rtx_costs): Update call for removed function argument.
29462 (ix86_vector_costs::add_stmt_cost): Ditto.
29464 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
29466 * value-range.h (class Value_Range): Implement set_zero,
29467 set_nonzero, and nonzero_p.
29469 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
29471 * config/i386/i386.cc (ix86_multiplication_cost): Add
29472 the cost of a memory read to the cost of V?QImode sequences.
29474 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29476 * config/riscv/riscv-v.cc: Add "m_" prefix.
29478 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29480 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
29481 multiple-rgroup of length.
29482 * tree-vect-stmts.cc (vectorizable_store): Ditto.
29483 (vectorizable_load): Ditto.
29484 * tree-vectorizer.h (vect_get_loop_len): Ditto.
29486 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29488 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
29491 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
29493 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
29494 handling for the case index == count.
29496 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
29499 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
29500 Don't fold to XOR / AND / XOR if just one bit is copied to the
29503 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
29505 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
29506 builtin for bit reversal using brev instruction.
29507 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
29508 NVPTX_BUILTIN_BREVLL.
29509 (nvptx_init_builtins): Define "brev" and "brevll".
29510 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
29511 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
29512 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
29513 section, document __builtin_nvptx_brev{,ll}.
29515 2023-05-21 Jakub Jelinek <jakub@redhat.com>
29517 PR tree-optimization/109505
29518 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
29519 Combine successive equal operations with constants,
29520 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
29521 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
29524 2023-05-21 Andrew Pinski <apinski@marvell.com>
29526 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
29528 2023-05-21 Pan Li <pan2.li@intel.com>
29530 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
29531 rest bool size, aka 2, 4, 8, 16, 32, 64.
29532 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
29533 Register vbool[2|4|8|16|32|64] interpret function.
29534 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
29535 New macro for vbool2_t.
29536 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
29537 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
29538 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
29539 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
29540 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
29541 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
29542 (vint16m1_t): Likewise.
29543 (vint32m1_t): Likewise.
29544 (vint64m1_t): Likewise.
29545 (vuint8m1_t): Likewise.
29546 (vuint16m1_t): Likewise.
29547 (vuint32m1_t): Likewise.
29548 (vuint64m1_t): Likewise.
29549 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
29550 New macro for vbool2_t.
29551 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
29552 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
29553 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
29554 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
29555 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
29556 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
29557 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
29558 vbool2_t interprect to base type.
29559 (bool4_interpret): Likewise.
29560 (bool8_interpret): Likewise.
29561 (bool16_interpret): Likewise.
29562 (bool32_interpret): Likewise.
29563 (bool64_interpret): Likewise.
29565 2023-05-21 Andrew Pinski <apinski@marvell.com>
29567 PR middle-end/109919
29568 * expr.cc (expand_single_bit_test): Don't use the
29569 target for expand_expr.
29571 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
29573 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
29576 2023-05-20 Pan Li <pan2.li@intel.com>
29578 * mode-switching.cc (entity_map): Initialize the array to zero.
29581 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
29584 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
29585 Remove superfluous "parallel" in insn pattern.
29586 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
29587 printing error text to assembly.
29589 2023-05-20 Andrew Pinski <apinski@marvell.com>
29591 * expr.cc (fold_single_bit_test): Rename to ...
29592 (expand_single_bit_test): This and expand directly.
29593 (do_store_flag): Update for the rename function.
29595 2023-05-20 Andrew Pinski <apinski@marvell.com>
29597 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
29598 instead of shift/and.
29600 2023-05-20 Andrew Pinski <apinski@marvell.com>
29602 * expr.cc (fold_single_bit_test): Add an assert
29603 and simplify based on code being NE_EXPR or EQ_EXPR.
29605 2023-05-20 Andrew Pinski <apinski@marvell.com>
29607 * expr.cc (fold_single_bit_test): Take inner and bitnum
29608 instead of arg0 and arg1. Update the code.
29609 (do_store_flag): Don't create a tree when calling
29610 fold_single_bit_test instead just call it with the bitnum
29611 and the inner tree.
29613 2023-05-20 Andrew Pinski <apinski@marvell.com>
29615 * expr.cc (fold_single_bit_test): Use get_def_for_expr
29616 instead of checking the inner's code.
29618 2023-05-20 Andrew Pinski <apinski@marvell.com>
29620 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
29621 (fold_single_bit_test): This and simplify.
29623 2023-05-20 Andrew Pinski <apinski@marvell.com>
29625 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
29627 (fold_single_bit_test): Likewise.
29628 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
29629 (fold_single_bit_test): Likewise and make static.
29630 * fold-const.h (fold_single_bit_test): Remove declaration.
29632 2023-05-20 Die Li <lidie@eswincomputing.com>
29634 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
29637 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
29639 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
29641 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
29644 * config/riscv/bitmanip.md
29645 (<bitmanip_optab>disi2): Match with any_extend.
29646 (<bitmanip_optab>disi2_sext): New pattern to match
29647 with sign extend using an ANDI instruction.
29649 2023-05-19 Nathan Sidwell <nathan@acm.org>
29652 * opts.h (handle_deferred_dump_options): Declare.
29653 * opts-global.cc (handle_common_deferred_options): Do not handle
29655 (handle_deferred_dump_options): New.
29656 * toplev.cc (toplev::main): Call it after plugin init.
29658 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
29660 * config/riscv/constraints.md (DsS, DsD): Restore agreement
29661 with shiftm1 mode attribute.
29663 2023-05-19 Andrew Pinski <apinski@marvell.com>
29666 * gcc.cc (default_compilers["@c-header"]): Add %w
29667 after the --output-pch.
29669 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
29671 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
29672 to hival, ASHIFT the corresponding regs.
29674 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
29676 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
29678 2023-05-19 Jakub Jelinek <jakub@redhat.com>
29680 PR tree-optimization/105776
29681 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
29682 non-NULL, allow division statement to have a cast as single imm use
29683 rather than comparison/condition.
29684 (match_arith_overflow): In that case remove the cast stmt in addition
29685 to the division statement.
29687 2023-05-19 Jakub Jelinek <jakub@redhat.com>
29689 PR tree-optimization/101856
29690 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
29691 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
29692 support it but umul_highpart_optab does.
29694 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
29696 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
29697 of tree_to_shwi on array indices. Minor tweaks.
29699 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
29701 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
29702 * attribs.cc (diag_attr_exclusions): Ditto.
29703 (decl_attributes): Ditto.
29704 (build_type_attribute_qual_variant): Ditto.
29705 * builtins.cc (fold_builtin_carg): Ditto.
29706 (fold_builtin_next_arg): Ditto.
29707 (do_mpc_arg2): Ditto.
29708 * cfgexpand.cc (expand_return): Ditto.
29709 * cgraph.h (decl_in_symtab_p): Ditto.
29710 (symtab_node::get_create): Ditto.
29711 * dwarf2out.cc (base_type_die): Ditto.
29712 (implicit_ptr_descriptor): Ditto.
29713 (gen_array_type_die): Ditto.
29714 (gen_type_die_with_usage): Ditto.
29715 (optimize_location_into_implicit_ptr): Ditto.
29716 * expr.cc (do_store_flag): Ditto.
29717 * fold-const.cc (negate_expr_p): Ditto.
29718 (fold_negate_expr_1): Ditto.
29719 (fold_convert_const): Ditto.
29720 (fold_convert_loc): Ditto.
29721 (constant_boolean_node): Ditto.
29722 (fold_binary_op_with_conditional_arg): Ditto.
29723 (build_fold_addr_expr_with_type_loc): Ditto.
29724 (fold_comparison): Ditto.
29725 (fold_checksum_tree): Ditto.
29726 (tree_unary_nonnegative_warnv_p): Ditto.
29727 (integer_valued_real_unary_p): Ditto.
29728 (fold_read_from_constant_string): Ditto.
29729 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
29730 * gimple-expr.cc (useless_type_conversion_p): Ditto.
29731 (is_gimple_reg): Ditto.
29732 (is_gimple_asm_val): Ditto.
29733 (mark_addressable): Ditto.
29734 * gimple-expr.h (is_gimple_variable): Ditto.
29735 (virtual_operand_p): Ditto.
29736 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
29737 * gimplify.cc (gimplify_bind_expr): Ditto.
29738 (gimplify_return_expr): Ditto.
29739 (gimple_add_padding_init_for_auto_var): Ditto.
29740 (gimplify_addr_expr): Ditto.
29741 (omp_add_variable): Ditto.
29742 (omp_notice_variable): Ditto.
29743 (omp_get_base_pointer): Ditto.
29744 (omp_strip_components_and_deref): Ditto.
29745 (omp_strip_indirections): Ditto.
29746 (omp_accumulate_sibling_list): Ditto.
29747 (omp_build_struct_sibling_lists): Ditto.
29748 (gimplify_adjust_omp_clauses_1): Ditto.
29749 (gimplify_adjust_omp_clauses): Ditto.
29750 (gimplify_omp_for): Ditto.
29751 (goa_lhs_expr_p): Ditto.
29752 (gimplify_one_sizepos): Ditto.
29753 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
29754 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
29755 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
29756 (propagate_controlled_uses): Ditto.
29757 * ipa-sra.cc (type_prevails_p): Ditto.
29758 (scan_expr_access): Ditto.
29759 * optabs-tree.cc (optab_for_tree_code): Ditto.
29760 * toplev.cc (wrapup_global_declaration_1): Ditto.
29761 * trans-mem.cc (transaction_invariant_address_p): Ditto.
29762 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
29763 (verify_gimple_comparison): Ditto.
29764 (verify_gimple_assign_binary): Ditto.
29765 (verify_gimple_assign_single): Ditto.
29766 * tree-complex.cc (get_component_ssa_name): Ditto.
29767 * tree-emutls.cc (lower_emutls_2): Ditto.
29768 * tree-inline.cc (copy_tree_body_r): Ditto.
29769 (estimate_move_cost): Ditto.
29770 (copy_decl_for_dup_finish): Ditto.
29771 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
29772 (note_nonlocal_vla_type): Ditto.
29773 (convert_local_omp_clauses): Ditto.
29774 (remap_vla_decls): Ditto.
29775 (fixup_vla_decls): Ditto.
29776 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
29777 * tree-pretty-print.cc (print_declaration): Ditto.
29778 (print_call_name): Ditto.
29779 * tree-sra.cc (compare_access_positions): Ditto.
29780 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
29781 * tree-ssa-ccp.cc (get_default_value): Ditto.
29782 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
29783 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
29784 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
29785 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
29786 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
29787 * tree-ssa-sink.cc (statement_sink_location): Ditto.
29788 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
29789 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
29790 * tree-ssa-uninit.cc (warn_uninit): Ditto.
29791 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
29792 (non_rewritable_mem_ref_base): Ditto.
29793 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
29794 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
29795 * tree-vect-generic.cc (do_binop): Ditto.
29797 * tree-vect-stmts.cc (vect_init_vector): Ditto.
29798 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
29799 * tree.cc (sign_mask_for): Ditto.
29800 (verify_type_variant): Ditto.
29801 (gimple_canonical_types_compatible_p): Ditto.
29802 (verify_type): Ditto.
29803 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
29804 * var-tracking.cc (prepare_call_arguments): Ditto.
29805 (vt_add_function_parameters): Ditto.
29806 * varasm.cc (decode_addr_const): Ditto.
29808 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
29810 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
29811 (lower_reduction_clauses): Ditto.
29812 (lower_send_clauses): Ditto.
29813 (lower_omp_task_reductions): Ditto.
29814 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
29815 (worker_single_copy): Ditto.
29816 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
29817 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
29819 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
29821 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
29823 (lto_read_body_or_constructor): Ditto.
29824 * lto-streamer-out.cc (tree_is_indexable): Ditto.
29825 (lto_output_var_decl_ref): Ditto.
29826 (DFS::DFS_write_tree_body): Ditto.
29827 (wrap_refs): Ditto.
29828 (write_symbol_extension_info): Ditto.
29830 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
29832 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
29833 defines from tree.h.
29834 (aarch64_mangle_type): Ditto.
29835 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
29836 (alpha_gimplify_va_arg_1): Ditto.
29837 * config/arc/arc.cc (arc_encode_section_info): Ditto.
29838 (arc_is_aux_reg_p): Ditto.
29839 (arc_is_uncached_mem_p): Ditto.
29840 (arc_handle_aux_attribute): Ditto.
29841 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
29842 (arm_handle_cmse_nonsecure_call): Ditto.
29843 (arm_set_default_type_attributes): Ditto.
29844 (arm_is_segment_info_known): Ditto.
29845 (arm_mangle_type): Ditto.
29846 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
29847 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
29848 (avr_decl_absdata_p): Ditto.
29849 (avr_insert_attributes): Ditto.
29850 (avr_section_type_flags): Ditto.
29851 (avr_encode_section_info): Ditto.
29852 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
29853 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
29854 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
29855 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
29856 (csky_mangle_type): Ditto.
29857 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
29858 * config/darwin.cc (is_objc_metadata): Ditto.
29859 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
29860 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
29861 * config/frv/frv.cc (frv_emit_movsi): Ditto.
29862 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
29863 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
29864 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
29865 * config/i386/i386-expand.cc: Ditto.
29866 * config/i386/i386.cc (type_natural_mode): Ditto.
29867 (ix86_function_arg): Ditto.
29868 (ix86_data_alignment): Ditto.
29869 (ix86_local_alignment): Ditto.
29870 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
29871 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
29872 (i386_pe_type_dllexport_p): Ditto.
29873 (i386_pe_adjust_class_at_definition): Ditto.
29874 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
29875 (i386_pe_binds_local_p): Ditto.
29876 (i386_pe_section_type_flags): Ditto.
29877 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
29878 (ia64_gimplify_va_arg): Ditto.
29879 (ia64_in_small_data_p): Ditto.
29880 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
29881 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
29882 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
29883 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
29884 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
29885 (mcore_encode_section_info): Ditto.
29886 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
29887 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
29888 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
29889 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
29890 (pass_in_memory): Ditto.
29891 (nvptx_generate_vector_shuffle): Ditto.
29892 (nvptx_lockless_update): Ditto.
29893 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
29894 (pa_function_value): Ditto.
29895 (pa_function_arg): Ditto.
29896 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
29897 (TEXT_SPACE_P): Ditto.
29898 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
29899 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
29900 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
29901 (riscv_mangle_type): Ditto.
29902 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
29903 (rl78_addsi3_internal): Ditto.
29904 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
29905 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
29906 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
29907 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
29908 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
29909 (rs6000_function_arg_advance_1): Ditto.
29910 (rs6000_function_arg): Ditto.
29911 (rs6000_pass_by_reference): Ditto.
29912 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
29913 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
29914 (rs6000_set_default_type_attributes): Ditto.
29915 (rs6000_elf_in_small_data_p): Ditto.
29916 (IN_NAMED_SECTION): Ditto.
29917 (rs6000_xcoff_encode_section_info): Ditto.
29918 (rs6000_function_value): Ditto.
29919 (invalid_arg_for_unprototyped_fn): Ditto.
29920 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
29921 (s390_vec_n_elem): Ditto.
29922 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
29923 (s390_function_arg_integer): Ditto.
29924 (s390_return_in_memory): Ditto.
29925 (s390_encode_section_info): Ditto.
29926 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
29927 (sh_function_value): Ditto.
29928 * config/sol2.cc (solaris_insert_attributes): Ditto.
29929 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
29930 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
29931 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
29932 (xstormy16_handle_below100_attribute): Ditto.
29933 * config/v850/v850.cc (v850_encode_section_info): Ditto.
29934 (v850_insert_attributes): Ditto.
29935 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
29936 (visium_return_in_memory): Ditto.
29937 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
29939 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
29941 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
29942 (ix86_expand_vecop_qihi): Add op2vec bool variable.
29943 Do not set REG_EQUAL note.
29944 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
29946 * config/i386/i386.cc (ix86_multiplication_cost): Handle
29947 V4QImode and V8QImode.
29948 * config/i386/mmx.md (mulv8qi3): New expander.
29950 * config/i386/sse.md (mulv8qi3): Remove.
29952 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
29954 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
29956 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
29958 PR bootstrap/105831
29959 * config.gcc: Use = operator instead of ==.
29961 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
29963 PR bootstrap/105831
29964 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
29965 * configure.ac: Likewise.
29966 * configure: Regenerate.
29968 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
29970 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
29971 (__ARM_mve_coerce1): Remove.
29972 (__ARM_mve_coerce2): Remove.
29973 (__ARM_mve_coerce3): Remove.
29974 (__ARM_mve_coerce_i_scalar): New.
29975 (__ARM_mve_coerce_s8_ptr): New.
29976 (__ARM_mve_coerce_u8_ptr): New.
29977 (__ARM_mve_coerce_s16_ptr): New.
29978 (__ARM_mve_coerce_u16_ptr): New.
29979 (__ARM_mve_coerce_s32_ptr): New.
29980 (__ARM_mve_coerce_u32_ptr): New.
29981 (__ARM_mve_coerce_s64_ptr): New.
29982 (__ARM_mve_coerce_u64_ptr): New.
29983 (__ARM_mve_coerce_f_scalar): New.
29984 (__ARM_mve_coerce_f16_ptr): New.
29985 (__ARM_mve_coerce_f32_ptr): New.
29986 (__arm_vst4q): Change _coerce_ overloads.
29987 (__arm_vbicq): Change _coerce_ overloads.
29988 (__arm_vld1q): Change _coerce_ overloads.
29989 (__arm_vld1q_z): Change _coerce_ overloads.
29990 (__arm_vld2q): Change _coerce_ overloads.
29991 (__arm_vld4q): Change _coerce_ overloads.
29992 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
29993 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
29994 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
29995 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
29996 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
29997 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
29998 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
29999 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
30000 (__arm_vst1q_p): Change _coerce_ overloads.
30001 (__arm_vst2q): Change _coerce_ overloads.
30002 (__arm_vst1q): Change _coerce_ overloads.
30003 (__arm_vstrhq): Change _coerce_ overloads.
30004 (__arm_vstrhq_p): Change _coerce_ overloads.
30005 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
30006 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
30007 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
30008 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
30009 (__arm_vstrwq_p): Change _coerce_ overloads.
30010 (__arm_vstrwq): Change _coerce_ overloads.
30011 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
30012 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
30013 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
30014 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
30015 (__arm_vsetq_lane): Change _coerce_ overloads.
30016 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
30017 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
30018 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
30019 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
30020 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
30021 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
30022 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
30023 (__arm_vidupq_x_u8): Change _coerce_ overloads.
30024 (__arm_vddupq_x_u8): Change _coerce_ overloads.
30025 (__arm_vidupq_x_u16): Change _coerce_ overloads.
30026 (__arm_vddupq_x_u16): Change _coerce_ overloads.
30027 (__arm_vidupq_x_u32): Change _coerce_ overloads.
30028 (__arm_vddupq_x_u32): Change _coerce_ overloads.
30029 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
30030 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
30031 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
30032 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
30033 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
30034 (__arm_vidupq_u16): Change _coerce_ overloads.
30035 (__arm_vidupq_u32): Change _coerce_ overloads.
30036 (__arm_vidupq_u8): Change _coerce_ overloads.
30037 (__arm_vddupq_u16): Change _coerce_ overloads.
30038 (__arm_vddupq_u32): Change _coerce_ overloads.
30039 (__arm_vddupq_u8): Change _coerce_ overloads.
30040 (__arm_viwdupq_m): Change _coerce_ overloads.
30041 (__arm_viwdupq_u16): Change _coerce_ overloads.
30042 (__arm_viwdupq_u32): Change _coerce_ overloads.
30043 (__arm_viwdupq_u8): Change _coerce_ overloads.
30044 (__arm_vdwdupq_m): Change _coerce_ overloads.
30045 (__arm_vdwdupq_u16): Change _coerce_ overloads.
30046 (__arm_vdwdupq_u32): Change _coerce_ overloads.
30047 (__arm_vdwdupq_u8): Change _coerce_ overloads.
30048 (__arm_vstrbq): Change _coerce_ overloads.
30049 (__arm_vstrbq_p): Change _coerce_ overloads.
30050 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
30051 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
30052 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
30053 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
30054 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
30056 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
30058 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
30061 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
30063 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
30064 (__arm_vadcq_u32): Likewise.
30065 (__arm_vadcq_m_s32): Likewise.
30066 (__arm_vadcq_m_u32): Likewise.
30067 (__arm_vsbcq_s32): Likewise.
30068 (__arm_vsbcq_u32): Likewise.
30069 (__arm_vsbcq_m_s32): Likewise.
30070 (__arm_vsbcq_m_u32): Likewise.
30071 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
30073 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
30075 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
30076 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
30077 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
30078 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
30079 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
30080 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
30081 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
30082 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
30083 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
30084 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
30085 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
30086 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
30087 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
30088 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
30089 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
30090 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
30091 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
30092 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
30093 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
30094 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
30095 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
30096 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
30097 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
30098 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
30099 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
30100 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
30101 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
30102 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
30103 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
30104 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
30105 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
30106 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
30107 (mve_vorrq_m_f<mode>)
30108 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
30109 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
30110 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
30111 capitalization in the emitted asm.
30113 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
30115 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
30117 (Ri): Move constraint definition from predicates.md.
30118 (Rl): Define new constraint.
30119 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
30120 missing constraint.
30121 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
30122 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
30123 op 2. Fix asm output spacing.
30124 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
30125 * config/arm/predicates.md (Ri) Move constraint to constraints.md
30126 (mve_vldrd_immediate): Move it from
30128 (mve_vstrw_immediate): New predicate.
30130 2023-05-18 Pan Li <pan2.li@intel.com>
30131 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30132 Kito Cheng <kito.cheng@sifive.com>
30133 Richard Biener <rguenther@suse.de>
30134 Richard Sandiford <richard.sandiford@arm.com>
30136 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
30137 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
30138 (struct table_elt): Extend machine_mode to 16 bits.
30139 (struct set): Ditto.
30140 * genmodes.cc (emit_mode_wider): Extend type from char to short.
30141 (emit_mode_complex): Ditto.
30142 (emit_mode_inner): Ditto.
30143 (emit_class_narrowest_mode): Ditto.
30144 * genopinit.cc (main): Extend the machine_mode limit.
30145 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
30146 re-ordered the struct fields for padding.
30147 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
30148 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
30149 (get_mode_alignment): Extend type from char to short.
30150 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
30151 removed the ATTRIBUTE_PACKED.
30152 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
30153 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
30154 m_kind to 2 bits and remove m_spare.
30155 * rtl.h (RTX_CODE_BITSIZE): New macro.
30156 (struct rtx_def): Swap both the bit size and location between the
30157 rtx_code and the machine_mode.
30158 (subreg_shape::unique_id): Extend the machine_mode limit.
30159 * rtlanal.h: Extend machine_mode to 16 bits.
30160 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
30161 bits and re-ordered the struct fields for padding.
30162 (struct tree_decl_common): Extend machine_mode to 16 bits.
30164 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
30166 * genrecog.cc (print_nonbool_test): Fix type error of
30167 switch (SUBREG_BYTE (op))'.
30169 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
30171 * common/config/riscv/riscv-common.cc: Remove
30172 trailing spaces on lines.
30173 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
30174 * config/riscv/riscv.h (enum reg_class): Likewise.
30175 * config/riscv/riscv.md: Likewise.
30177 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
30179 * config/pa/pa.md (clear_cache): New.
30181 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
30183 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
30184 parenthesis. Fix misnamed index entry.
30185 <concept>: Fix misnamed index entry.
30187 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
30189 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
30191 (*<optab>si3_mask, *<optab>di3_mask): Here.
30192 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
30193 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
30195 (*<bitmanip_optab>si3_sext_mask): Likewise.
30196 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
30197 and const_di_mask_operand.
30198 (bitmanip_rotate): New iterator.
30199 (bitmanip_optab): Add rotates.
30200 * config/riscv/predicates.md (const_si_mask_operand): Renamed
30201 from const31_operand. Generalize to handle more mask constants.
30202 (const_di_mask_operand): Similarly.
30204 2023-05-17 Jakub Jelinek <jakub@redhat.com>
30207 * config/i386/i386-builtin-types.def (FLOAT128): Use
30208 float128t_type_node rather than float128_type_node.
30210 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
30212 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
30213 FP_CONTRACT_FAST (no functional change).
30215 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
30217 * config/i386/i386.cc (ix86_multiplication_cost): Correct
30218 calcuation of integer vector mode costs to reflect generated
30219 instruction sequences of different integer vector modes and
30220 different target ABIs.
30222 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30224 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
30225 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
30226 (riscv_mode_needed): Ditto.
30227 (riscv_mode_after): Ditto.
30228 (riscv_mode_entry): Ditto.
30229 (riscv_mode_exit): Ditto.
30230 (riscv_mode_priority): Ditto.
30231 (TARGET_MODE_EMIT): New target hook.
30232 (TARGET_MODE_NEEDED): Ditto.
30233 (TARGET_MODE_AFTER): Ditto.
30234 (TARGET_MODE_ENTRY): Ditto.
30235 (TARGET_MODE_EXIT): Ditto.
30236 (TARGET_MODE_PRIORITY): Ditto.
30237 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
30238 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
30239 * config/riscv/riscv.md: Add csrwvxrm.
30240 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
30241 (vxrmsi): New pattern.
30243 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30245 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
30246 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
30247 (struct narrow_alu_def): Ditto.
30248 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
30249 (function_expander::use_exact_insn): Ditto.
30250 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
30251 (function_base::has_rounding_mode_operand_p): New function.
30253 2023-05-17 Andrew Pinski <apinski@marvell.com>
30255 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
30256 against 0 instead of calling integer_zerop.
30258 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30260 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
30261 (DEF_RVV_VXRM_ENUM): New macro.
30262 (handle_pragma_vector): Add vxrm enum register.
30263 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
30269 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
30271 * value-range.h (Value_Range::operator=): New.
30273 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
30275 * value-range.cc (vrange::operator=): Add a stub to copy
30276 unsupported ranges.
30277 * value-range.h (is_a <unsupported_range>): New.
30278 (Value_Range::operator=): Support copying unsupported ranges.
30280 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
30282 * data-streamer-in.cc (streamer_read_real_value): New.
30283 (streamer_read_value_range): New.
30284 * data-streamer-out.cc (streamer_write_real_value): New.
30285 (streamer_write_vrange): New.
30286 * data-streamer.h (streamer_write_vrange): New.
30287 (streamer_read_value_range): New.
30289 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
30292 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
30293 is ignored for a fixed underlying type.
30294 (C++ Dialect Options): Likewise for -fstrict-enums.
30296 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
30298 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
30301 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
30303 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
30305 (s390_atomic_align_for_mode): New.
30307 2023-05-17 Jakub Jelinek <jakub@redhat.com>
30309 * wide-int.cc (wi::from_array): Add missing closing paren in function
30312 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
30314 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
30315 suggested unroll factor once the previous analysis fails.
30317 2023-05-17 Pan Li <pan2.li@intel.com>
30319 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
30321 (main): Add bool1 to the type indexer.
30322 * config/riscv/riscv-vector-builtins-functions.def
30323 (vreinterpret): Register vbool1 interpret function.
30324 * config/riscv/riscv-vector-builtins-types.def
30325 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
30326 (vint8m1_t): Add the type to bool1_interpret_ops.
30327 (vint16m1_t): Ditto.
30328 (vint32m1_t): Ditto.
30329 (vint64m1_t): Ditto.
30330 (vuint8m1_t): Ditto.
30331 (vuint16m1_t): Ditto.
30332 (vuint32m1_t): Ditto.
30333 (vuint64m1_t): Ditto.
30334 * config/riscv/riscv-vector-builtins.cc
30335 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
30336 (required_extensions_p): Add bool1 interpret case.
30337 * config/riscv/riscv-vector-builtins.def
30338 (bool1_interpret): Add bool1 interpret to base type.
30339 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
30340 with VB dest for vreinterpret.
30342 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
30345 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
30346 constants through "lis; xoris".
30348 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
30350 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
30351 default rs6000 target pass for O2 and above.
30352 * doc/invoke.texi: Document -free
30354 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
30356 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
30357 Fix wrong select_kind...
30359 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
30361 * config/s390/s390-protos.h (s390_expand_setmem): Change
30362 function signature.
30363 * config/s390/s390.cc (s390_expand_setmem): For memset's less
30364 than or equal to 256 byte do not perform a libc call.
30365 * config/s390/s390.md: Change expander into a version which
30368 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
30370 * config/s390/s390-protos.h (s390_expand_movmem): New.
30371 * config/s390/s390.cc (s390_expand_movmem): New.
30372 * config/s390/s390.md (movmem<mode>): New.
30376 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
30378 * config/s390/s390-protos.h (s390_expand_cpymem): Change
30379 function signature.
30380 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
30381 than or equal to 256 byte do not perform a libc call.
30382 (s390_expand_insv): Adapt new function signature of
30383 s390_expand_cpymem.
30384 * config/s390/s390.md: Change expander into a version which
30387 2023-05-16 Andrew Pinski <apinski@marvell.com>
30389 PR tree-optimization/109424
30390 * match.pd: Add patterns for min/max of zero_one_valued
30393 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30395 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
30396 * config/riscv/riscv-vector-builtins.cc
30397 (function_expander::use_ternop_insn): Add default rounding mode.
30398 (function_expander::use_widen_ternop_insn): Ditto.
30399 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
30400 (riscv_hard_regno_mode_ok): Ditto.
30401 (riscv_conditional_register_usage): Ditto.
30402 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
30403 (FRM_REG_P): Ditto.
30404 (RISCV_DWARF_FRM): Ditto.
30405 * config/riscv/riscv.md: Ditto.
30406 * config/riscv/vector-iterators.md: split no frm and has frm operations.
30407 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
30408 (@pred_<optab><mode>): Ditto.
30410 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
30412 PR tree-optimization/109695
30413 * value-range.cc (irange::operator=): Resize range.
30414 (irange::union_): Same.
30415 (irange::intersect): Same.
30416 (irange::invert): Same.
30417 (int_range_max): Default to 3 sub-ranges and resize as needed.
30418 * value-range.h (irange::maybe_resize): New.
30420 (int_range::int_range): Adjust for resizing.
30421 (int_range::operator=): Same.
30423 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
30425 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
30427 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
30428 when range changed.
30430 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30432 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
30433 * config/riscv/riscv-vector-builtins.cc
30434 (function_expander::use_exact_insn): Add default rounding mode operand.
30435 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
30436 (riscv_hard_regno_mode_ok): Ditto.
30437 (riscv_conditional_register_usage): Ditto.
30438 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
30439 (VXRM_REG_P): Ditto.
30440 (RISCV_DWARF_VXRM): Ditto.
30441 * config/riscv/riscv.md: Ditto.
30442 * config/riscv/vector.md: Ditto
30444 2023-05-15 Pan Li <pan2.li@intel.com>
30446 * optabs.cc (maybe_gen_insn): Add case to generate instruction
30447 that has 11 operands.
30449 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30451 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
30452 logic for vector modes.
30454 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30457 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
30458 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
30459 (aarch64_cmtst<mode>): Rename to...
30460 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
30461 (*aarch64_cmtst_same_<mode>): Rename to...
30462 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
30463 (*aarch64_cmtstdi): Rename to...
30464 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
30465 (aarch64_fac<optab><mode>): Rename to...
30466 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
30468 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30471 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
30472 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
30474 2023-05-15 Pan Li <pan2.li@intel.com>
30475 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30476 kito-cheng <kito.cheng@sifive.com>
30478 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
30479 deciding the mode is constant or not.
30480 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
30482 2023-05-15 Richard Biener <rguenther@suse.de>
30484 PR tree-optimization/109848
30485 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
30486 TARGET_MEM_REF address preparation before the store, not
30489 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30491 * config/riscv/riscv.cc
30492 (riscv_vectorize_preferred_vector_alignment): New function.
30493 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
30495 2023-05-14 Andrew Pinski <apinski@marvell.com>
30497 PR tree-optimization/109829
30498 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
30500 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
30503 * config/i386/i386.cc: Revert the 2023-05-11 change.
30504 (ix86_widen_mult_cost): Return high value instead of
30505 ICEing for unsupported modes.
30507 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
30509 * config/i386/i386.cc (x86_function_profiler): Take
30510 ix86_direct_extern_access into account when generating calls
30513 2023-05-14 Pan Li <pan2.li@intel.com>
30515 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
30516 Refactor the or pattern to switch cases.
30518 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30520 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
30521 aarch64_expand_vector_init to this, and remove interleaving case.
30522 Recursively call aarch64_expand_vector_init_fallback, instead of
30523 aarch64_expand_vector_init.
30524 (aarch64_unzip_vector_init): New function.
30525 (aarch64_expand_vector_init): Likewise.
30527 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
30529 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
30530 Pull out function call from the gcc_assert.
30532 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
30534 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
30535 (policy_to_str): New.
30536 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
30538 2023-05-13 Andrew Pinski <apinski@marvell.com>
30540 PR tree-optimization/109834
30541 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
30542 (popcount(rotate(x,y))->popcount(x)): Likewise.
30544 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
30546 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
30547 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
30548 gen_extend_insn to generate zero/sign extension instructions.
30550 (ix86_expand_vecop_qihi): Initialize interleave functions
30551 for MULT code only. Fix comments.
30553 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
30556 * config/i386/mmx.md (mulv2si3): Remove expander.
30557 (mulv2si3): Rename insn pattern from *mulv2si.
30559 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
30561 PR libstdc++/109816
30562 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
30563 '!lto_stream_offload_p'.
30565 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
30566 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30569 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
30570 (local_avl_compatible_p): New.
30571 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
30572 for LCM, rewrite as a backward algorithm.
30573 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
30574 interface, handle a BB at once.
30576 2023-05-12 Richard Biener <rguenther@suse.de>
30578 PR tree-optimization/64731
30579 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
30580 handle TARGET_MEM_REF destinations of stores from vector
30583 2023-05-12 Richard Biener <rguenther@suse.de>
30585 PR tree-optimization/109791
30586 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
30588 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
30591 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30593 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
30594 * config/arm/arm-mve-builtins-base.def (vsriq): New.
30595 * config/arm/arm-mve-builtins-base.h (vsriq): New.
30596 * config/arm/arm-mve-builtins.cc
30597 (function_instance::has_inactive_argument): Handle vsriq.
30598 * config/arm/arm_mve.h (vsriq): Remove.
30600 (vsriq_n_u8): Remove.
30601 (vsriq_n_s8): Remove.
30602 (vsriq_n_u16): Remove.
30603 (vsriq_n_s16): Remove.
30604 (vsriq_n_u32): Remove.
30605 (vsriq_n_s32): Remove.
30606 (vsriq_m_n_s8): Remove.
30607 (vsriq_m_n_u8): Remove.
30608 (vsriq_m_n_s16): Remove.
30609 (vsriq_m_n_u16): Remove.
30610 (vsriq_m_n_s32): Remove.
30611 (vsriq_m_n_u32): Remove.
30612 (__arm_vsriq_n_u8): Remove.
30613 (__arm_vsriq_n_s8): Remove.
30614 (__arm_vsriq_n_u16): Remove.
30615 (__arm_vsriq_n_s16): Remove.
30616 (__arm_vsriq_n_u32): Remove.
30617 (__arm_vsriq_n_s32): Remove.
30618 (__arm_vsriq_m_n_s8): Remove.
30619 (__arm_vsriq_m_n_u8): Remove.
30620 (__arm_vsriq_m_n_s16): Remove.
30621 (__arm_vsriq_m_n_u16): Remove.
30622 (__arm_vsriq_m_n_s32): Remove.
30623 (__arm_vsriq_m_n_u32): Remove.
30624 (__arm_vsriq): Remove.
30625 (__arm_vsriq_m): Remove.
30627 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30629 * config/arm/iterators.md (mve_insn): Add vsri.
30630 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
30631 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
30632 (mve_vsriq_m_n_<supf><mode>): Rename into ...
30633 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30635 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30637 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
30638 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
30640 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30642 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
30643 * config/arm/arm-mve-builtins-base.def (vsliq): New.
30644 * config/arm/arm-mve-builtins-base.h (vsliq): New.
30645 * config/arm/arm-mve-builtins.cc
30646 (function_instance::has_inactive_argument): Handle vsliq.
30647 * config/arm/arm_mve.h (vsliq): Remove.
30649 (vsliq_n_u8): Remove.
30650 (vsliq_n_s8): Remove.
30651 (vsliq_n_u16): Remove.
30652 (vsliq_n_s16): Remove.
30653 (vsliq_n_u32): Remove.
30654 (vsliq_n_s32): Remove.
30655 (vsliq_m_n_s8): Remove.
30656 (vsliq_m_n_s32): Remove.
30657 (vsliq_m_n_s16): Remove.
30658 (vsliq_m_n_u8): Remove.
30659 (vsliq_m_n_u32): Remove.
30660 (vsliq_m_n_u16): Remove.
30661 (__arm_vsliq_n_u8): Remove.
30662 (__arm_vsliq_n_s8): Remove.
30663 (__arm_vsliq_n_u16): Remove.
30664 (__arm_vsliq_n_s16): Remove.
30665 (__arm_vsliq_n_u32): Remove.
30666 (__arm_vsliq_n_s32): Remove.
30667 (__arm_vsliq_m_n_s8): Remove.
30668 (__arm_vsliq_m_n_s32): Remove.
30669 (__arm_vsliq_m_n_s16): Remove.
30670 (__arm_vsliq_m_n_u8): Remove.
30671 (__arm_vsliq_m_n_u32): Remove.
30672 (__arm_vsliq_m_n_u16): Remove.
30673 (__arm_vsliq): Remove.
30674 (__arm_vsliq_m): Remove.
30676 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30678 * config/arm/iterators.md (mve_insn>): Add vsli.
30679 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
30680 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30681 (mve_vsliq_m_n_<supf><mode>): Rename into ...
30682 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30684 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30686 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
30687 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
30689 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30691 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
30692 * config/arm/arm-mve-builtins-base.def (vpselq): New.
30693 * config/arm/arm-mve-builtins-base.h (vpselq): New.
30694 * config/arm/arm_mve.h (vpselq): Remove.
30695 (vpselq_u8): Remove.
30696 (vpselq_s8): Remove.
30697 (vpselq_u16): Remove.
30698 (vpselq_s16): Remove.
30699 (vpselq_u32): Remove.
30700 (vpselq_s32): Remove.
30701 (vpselq_u64): Remove.
30702 (vpselq_s64): Remove.
30703 (vpselq_f16): Remove.
30704 (vpselq_f32): Remove.
30705 (__arm_vpselq_u8): Remove.
30706 (__arm_vpselq_s8): Remove.
30707 (__arm_vpselq_u16): Remove.
30708 (__arm_vpselq_s16): Remove.
30709 (__arm_vpselq_u32): Remove.
30710 (__arm_vpselq_s32): Remove.
30711 (__arm_vpselq_u64): Remove.
30712 (__arm_vpselq_s64): Remove.
30713 (__arm_vpselq_f16): Remove.
30714 (__arm_vpselq_f32): Remove.
30715 (__arm_vpselq): Remove.
30717 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30719 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
30720 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
30722 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30724 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
30726 * config/arm/iterators.md (MVE_VPSELQ_F): New.
30727 (mve_insn): Add vpsel.
30728 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
30729 (@mve_<mve_insn>q_<supf><mode>): ... this.
30730 (@mve_vpselq_f<mode>): Rename into ...
30731 (@mve_<mve_insn>q_f<mode>): ... this.
30733 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30735 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
30736 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
30737 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
30738 * config/arm/arm-mve-builtins.cc
30739 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
30741 * config/arm/arm_mve.h (vfmaq): Remove.
30745 (vfmasq_m): Remove.
30747 (vfmaq_f16): Remove.
30748 (vfmaq_n_f16): Remove.
30749 (vfmasq_n_f16): Remove.
30750 (vfmsq_f16): Remove.
30751 (vfmaq_f32): Remove.
30752 (vfmaq_n_f32): Remove.
30753 (vfmasq_n_f32): Remove.
30754 (vfmsq_f32): Remove.
30755 (vfmaq_m_f32): Remove.
30756 (vfmaq_m_f16): Remove.
30757 (vfmaq_m_n_f32): Remove.
30758 (vfmaq_m_n_f16): Remove.
30759 (vfmasq_m_n_f32): Remove.
30760 (vfmasq_m_n_f16): Remove.
30761 (vfmsq_m_f32): Remove.
30762 (vfmsq_m_f16): Remove.
30763 (__arm_vfmaq_f16): Remove.
30764 (__arm_vfmaq_n_f16): Remove.
30765 (__arm_vfmasq_n_f16): Remove.
30766 (__arm_vfmsq_f16): Remove.
30767 (__arm_vfmaq_f32): Remove.
30768 (__arm_vfmaq_n_f32): Remove.
30769 (__arm_vfmasq_n_f32): Remove.
30770 (__arm_vfmsq_f32): Remove.
30771 (__arm_vfmaq_m_f32): Remove.
30772 (__arm_vfmaq_m_f16): Remove.
30773 (__arm_vfmaq_m_n_f32): Remove.
30774 (__arm_vfmaq_m_n_f16): Remove.
30775 (__arm_vfmasq_m_n_f32): Remove.
30776 (__arm_vfmasq_m_n_f16): Remove.
30777 (__arm_vfmsq_m_f32): Remove.
30778 (__arm_vfmsq_m_f16): Remove.
30779 (__arm_vfmaq): Remove.
30780 (__arm_vfmasq): Remove.
30781 (__arm_vfmsq): Remove.
30782 (__arm_vfmaq_m): Remove.
30783 (__arm_vfmasq_m): Remove.
30784 (__arm_vfmsq_m): Remove.
30786 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30788 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
30790 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
30791 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
30792 (mve_insn): Add vfma, vfmas, vfms.
30793 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
30795 (@mve_<mve_insn>q_f<mode>): ... this.
30796 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
30797 (@mve_<mve_insn>q_n_f<mode>): ... this.
30798 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
30799 @mve_<mve_insn>q_m_f<mode>.
30800 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
30801 @mve_<mve_insn>q_m_n_f<mode>.
30803 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30805 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
30806 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
30808 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30810 * config/arm/arm-mve-builtins-base.cc
30811 (FUNCTION_WITH_RTX_M_N_NO_F): New.
30813 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
30814 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
30815 * config/arm/arm_mve.h (vmvnq): Remove.
30818 (vmvnq_s8): Remove.
30819 (vmvnq_s16): Remove.
30820 (vmvnq_s32): Remove.
30821 (vmvnq_n_s16): Remove.
30822 (vmvnq_n_s32): Remove.
30823 (vmvnq_u8): Remove.
30824 (vmvnq_u16): Remove.
30825 (vmvnq_u32): Remove.
30826 (vmvnq_n_u16): Remove.
30827 (vmvnq_n_u32): Remove.
30828 (vmvnq_m_u8): Remove.
30829 (vmvnq_m_s8): Remove.
30830 (vmvnq_m_u16): Remove.
30831 (vmvnq_m_s16): Remove.
30832 (vmvnq_m_u32): Remove.
30833 (vmvnq_m_s32): Remove.
30834 (vmvnq_m_n_s16): Remove.
30835 (vmvnq_m_n_u16): Remove.
30836 (vmvnq_m_n_s32): Remove.
30837 (vmvnq_m_n_u32): Remove.
30838 (vmvnq_x_s8): Remove.
30839 (vmvnq_x_s16): Remove.
30840 (vmvnq_x_s32): Remove.
30841 (vmvnq_x_u8): Remove.
30842 (vmvnq_x_u16): Remove.
30843 (vmvnq_x_u32): Remove.
30844 (vmvnq_x_n_s16): Remove.
30845 (vmvnq_x_n_s32): Remove.
30846 (vmvnq_x_n_u16): Remove.
30847 (vmvnq_x_n_u32): Remove.
30848 (__arm_vmvnq_s8): Remove.
30849 (__arm_vmvnq_s16): Remove.
30850 (__arm_vmvnq_s32): Remove.
30851 (__arm_vmvnq_n_s16): Remove.
30852 (__arm_vmvnq_n_s32): Remove.
30853 (__arm_vmvnq_u8): Remove.
30854 (__arm_vmvnq_u16): Remove.
30855 (__arm_vmvnq_u32): Remove.
30856 (__arm_vmvnq_n_u16): Remove.
30857 (__arm_vmvnq_n_u32): Remove.
30858 (__arm_vmvnq_m_u8): Remove.
30859 (__arm_vmvnq_m_s8): Remove.
30860 (__arm_vmvnq_m_u16): Remove.
30861 (__arm_vmvnq_m_s16): Remove.
30862 (__arm_vmvnq_m_u32): Remove.
30863 (__arm_vmvnq_m_s32): Remove.
30864 (__arm_vmvnq_m_n_s16): Remove.
30865 (__arm_vmvnq_m_n_u16): Remove.
30866 (__arm_vmvnq_m_n_s32): Remove.
30867 (__arm_vmvnq_m_n_u32): Remove.
30868 (__arm_vmvnq_x_s8): Remove.
30869 (__arm_vmvnq_x_s16): Remove.
30870 (__arm_vmvnq_x_s32): Remove.
30871 (__arm_vmvnq_x_u8): Remove.
30872 (__arm_vmvnq_x_u16): Remove.
30873 (__arm_vmvnq_x_u32): Remove.
30874 (__arm_vmvnq_x_n_s16): Remove.
30875 (__arm_vmvnq_x_n_s32): Remove.
30876 (__arm_vmvnq_x_n_u16): Remove.
30877 (__arm_vmvnq_x_n_u32): Remove.
30878 (__arm_vmvnq): Remove.
30879 (__arm_vmvnq_m): Remove.
30880 (__arm_vmvnq_x): Remove.
30882 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30884 * config/arm/iterators.md (mve_insn): Add vmvn.
30885 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
30886 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30887 (mve_vmvnq_m_<supf><mode>): Rename into ...
30888 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
30889 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
30890 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30892 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30894 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
30895 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
30897 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30899 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
30900 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
30901 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
30902 * config/arm/arm_mve.h (vbrsrq): Remove.
30903 (vbrsrq_m): Remove.
30904 (vbrsrq_x): Remove.
30905 (vbrsrq_n_f16): Remove.
30906 (vbrsrq_n_f32): Remove.
30907 (vbrsrq_n_u8): Remove.
30908 (vbrsrq_n_s8): Remove.
30909 (vbrsrq_n_u16): Remove.
30910 (vbrsrq_n_s16): Remove.
30911 (vbrsrq_n_u32): Remove.
30912 (vbrsrq_n_s32): Remove.
30913 (vbrsrq_m_n_s8): Remove.
30914 (vbrsrq_m_n_s32): Remove.
30915 (vbrsrq_m_n_s16): Remove.
30916 (vbrsrq_m_n_u8): Remove.
30917 (vbrsrq_m_n_u32): Remove.
30918 (vbrsrq_m_n_u16): Remove.
30919 (vbrsrq_m_n_f32): Remove.
30920 (vbrsrq_m_n_f16): Remove.
30921 (vbrsrq_x_n_s8): Remove.
30922 (vbrsrq_x_n_s16): Remove.
30923 (vbrsrq_x_n_s32): Remove.
30924 (vbrsrq_x_n_u8): Remove.
30925 (vbrsrq_x_n_u16): Remove.
30926 (vbrsrq_x_n_u32): Remove.
30927 (vbrsrq_x_n_f16): Remove.
30928 (vbrsrq_x_n_f32): Remove.
30929 (__arm_vbrsrq_n_u8): Remove.
30930 (__arm_vbrsrq_n_s8): Remove.
30931 (__arm_vbrsrq_n_u16): Remove.
30932 (__arm_vbrsrq_n_s16): Remove.
30933 (__arm_vbrsrq_n_u32): Remove.
30934 (__arm_vbrsrq_n_s32): Remove.
30935 (__arm_vbrsrq_m_n_s8): Remove.
30936 (__arm_vbrsrq_m_n_s32): Remove.
30937 (__arm_vbrsrq_m_n_s16): Remove.
30938 (__arm_vbrsrq_m_n_u8): Remove.
30939 (__arm_vbrsrq_m_n_u32): Remove.
30940 (__arm_vbrsrq_m_n_u16): Remove.
30941 (__arm_vbrsrq_x_n_s8): Remove.
30942 (__arm_vbrsrq_x_n_s16): Remove.
30943 (__arm_vbrsrq_x_n_s32): Remove.
30944 (__arm_vbrsrq_x_n_u8): Remove.
30945 (__arm_vbrsrq_x_n_u16): Remove.
30946 (__arm_vbrsrq_x_n_u32): Remove.
30947 (__arm_vbrsrq_n_f16): Remove.
30948 (__arm_vbrsrq_n_f32): Remove.
30949 (__arm_vbrsrq_m_n_f32): Remove.
30950 (__arm_vbrsrq_m_n_f16): Remove.
30951 (__arm_vbrsrq_x_n_f16): Remove.
30952 (__arm_vbrsrq_x_n_f32): Remove.
30953 (__arm_vbrsrq): Remove.
30954 (__arm_vbrsrq_m): Remove.
30955 (__arm_vbrsrq_x): Remove.
30957 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30959 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
30960 (mve_insn): Add vbrsr.
30961 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
30962 (@mve_<mve_insn>q_n_f<mode>): ... this.
30963 (mve_vbrsrq_n_<supf><mode>): Rename into ...
30964 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30965 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
30966 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30967 (mve_vbrsrq_m_n_f<mode>): Rename into ...
30968 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
30970 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30972 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
30973 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
30975 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30977 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
30978 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
30979 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
30980 * config/arm/arm_mve.h (vqshluq): Remove.
30981 (vqshluq_m): Remove.
30982 (vqshluq_n_s8): Remove.
30983 (vqshluq_n_s16): Remove.
30984 (vqshluq_n_s32): Remove.
30985 (vqshluq_m_n_s8): Remove.
30986 (vqshluq_m_n_s16): Remove.
30987 (vqshluq_m_n_s32): Remove.
30988 (__arm_vqshluq_n_s8): Remove.
30989 (__arm_vqshluq_n_s16): Remove.
30990 (__arm_vqshluq_n_s32): Remove.
30991 (__arm_vqshluq_m_n_s8): Remove.
30992 (__arm_vqshluq_m_n_s16): Remove.
30993 (__arm_vqshluq_m_n_s32): Remove.
30994 (__arm_vqshluq): Remove.
30995 (__arm_vqshluq_m): Remove.
30997 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30999 * config/arm/iterators.md (mve_insn): Add vqshlu.
31000 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
31001 (VQSHLUQ_M_N, VQSHLUQ_N): New.
31002 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
31003 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31004 (mve_vqshluq_m_n_s<mode>): Change name into ...
31005 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
31007 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
31009 * config/arm/arm-mve-builtins-shapes.cc
31010 (binary_lshift_unsigned): New.
31011 * config/arm/arm-mve-builtins-shapes.h
31012 (binary_lshift_unsigned): New.
31014 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
31016 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
31017 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
31018 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
31019 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
31020 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
31021 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
31022 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
31023 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
31024 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
31025 (vrmlaldavhaxq): Remove.
31026 (vrmlsldavhaq): Remove.
31027 (vrmlsldavhaxq): Remove.
31028 (vrmlaldavhaq_p): Remove.
31029 (vrmlaldavhaxq_p): Remove.
31030 (vrmlsldavhaq_p): Remove.
31031 (vrmlsldavhaxq_p): Remove.
31032 (vrmlaldavhaq_s32): Remove.
31033 (vrmlaldavhaq_u32): Remove.
31034 (vrmlaldavhaxq_s32): Remove.
31035 (vrmlsldavhaq_s32): Remove.
31036 (vrmlsldavhaxq_s32): Remove.
31037 (vrmlaldavhaq_p_s32): Remove.
31038 (vrmlaldavhaq_p_u32): Remove.
31039 (vrmlaldavhaxq_p_s32): Remove.
31040 (vrmlsldavhaq_p_s32): Remove.
31041 (vrmlsldavhaxq_p_s32): Remove.
31042 (__arm_vrmlaldavhaq_s32): Remove.
31043 (__arm_vrmlaldavhaq_u32): Remove.
31044 (__arm_vrmlaldavhaxq_s32): Remove.
31045 (__arm_vrmlsldavhaq_s32): Remove.
31046 (__arm_vrmlsldavhaxq_s32): Remove.
31047 (__arm_vrmlaldavhaq_p_s32): Remove.
31048 (__arm_vrmlaldavhaq_p_u32): Remove.
31049 (__arm_vrmlaldavhaxq_p_s32): Remove.
31050 (__arm_vrmlsldavhaq_p_s32): Remove.
31051 (__arm_vrmlsldavhaxq_p_s32): Remove.
31052 (__arm_vrmlaldavhaq): Remove.
31053 (__arm_vrmlaldavhaxq): Remove.
31054 (__arm_vrmlsldavhaq): Remove.
31055 (__arm_vrmlsldavhaxq): Remove.
31056 (__arm_vrmlaldavhaq_p): Remove.
31057 (__arm_vrmlaldavhaxq_p): Remove.
31058 (__arm_vrmlsldavhaq_p): Remove.
31059 (__arm_vrmlsldavhaxq_p): Remove.
31061 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
31063 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
31064 (MVE_VRMLxLDAVHAxQ_P): New.
31065 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
31067 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
31068 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
31070 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
31071 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
31072 (mve_vrmlsldavhaq_sv4si): Merge into ...
31073 (@mve_<mve_insn>q_<supf>v4si): ... this.
31074 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
31075 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
31076 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
31077 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
31079 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
31081 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
31082 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
31084 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
31085 * config/arm/arm_mve.h (vqdmulltq): Remove.
31086 (vqdmullbq): Remove.
31087 (vqdmullbq_m): Remove.
31088 (vqdmulltq_m): Remove.
31089 (vqdmulltq_s16): Remove.
31090 (vqdmulltq_n_s16): Remove.
31091 (vqdmullbq_s16): Remove.
31092 (vqdmullbq_n_s16): Remove.
31093 (vqdmulltq_s32): Remove.
31094 (vqdmulltq_n_s32): Remove.
31095 (vqdmullbq_s32): Remove.
31096 (vqdmullbq_n_s32): Remove.
31097 (vqdmullbq_m_n_s32): Remove.
31098 (vqdmullbq_m_n_s16): Remove.
31099 (vqdmullbq_m_s32): Remove.
31100 (vqdmullbq_m_s16): Remove.
31101 (vqdmulltq_m_n_s32): Remove.
31102 (vqdmulltq_m_n_s16): Remove.
31103 (vqdmulltq_m_s32): Remove.
31104 (vqdmulltq_m_s16): Remove.
31105 (__arm_vqdmulltq_s16): Remove.
31106 (__arm_vqdmulltq_n_s16): Remove.
31107 (__arm_vqdmullbq_s16): Remove.
31108 (__arm_vqdmullbq_n_s16): Remove.
31109 (__arm_vqdmulltq_s32): Remove.
31110 (__arm_vqdmulltq_n_s32): Remove.
31111 (__arm_vqdmullbq_s32): Remove.
31112 (__arm_vqdmullbq_n_s32): Remove.
31113 (__arm_vqdmullbq_m_n_s32): Remove.
31114 (__arm_vqdmullbq_m_n_s16): Remove.
31115 (__arm_vqdmullbq_m_s32): Remove.
31116 (__arm_vqdmullbq_m_s16): Remove.
31117 (__arm_vqdmulltq_m_n_s32): Remove.
31118 (__arm_vqdmulltq_m_n_s16): Remove.
31119 (__arm_vqdmulltq_m_s32): Remove.
31120 (__arm_vqdmulltq_m_s16): Remove.
31121 (__arm_vqdmulltq): Remove.
31122 (__arm_vqdmullbq): Remove.
31123 (__arm_vqdmullbq_m): Remove.
31124 (__arm_vqdmulltq_m): Remove.
31126 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
31128 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
31129 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
31130 (mve_insn): Add vqdmullb, vqdmullt.
31131 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
31132 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
31134 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
31135 (mve_vqdmulltq_n_s<mode>): Merge into ...
31136 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31137 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
31138 (@mve_<mve_insn>q_<supf><mode>): ... this.
31139 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
31141 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
31142 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
31143 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
31145 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
31147 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
31148 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
31150 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
31152 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
31153 Drop unused parameter.
31154 (riscv_select_multilib): Ditto.
31155 (riscv_compute_multilib): Update call site of
31156 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
31158 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
31160 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
31161 * config/riscv/riscv-protos.h (expand_vec_init): New function.
31162 * config/riscv/riscv-v.cc (class rvv_builder): New class.
31163 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
31164 (rvv_builder::get_merged_repeating_sequence): Ditto.
31165 (expand_vector_init_insert_elems): Ditto.
31166 (expand_vec_init): Ditto.
31167 * config/riscv/vector-iterators.md: New attribute.
31169 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
31171 * config/rs6000/rs6000-builtins.def
31172 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
31174 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
31175 xsiexpdpf to xsiexpdpf_di.
31176 * config/rs6000/vsx.md (xsiexpdp): Rename to...
31177 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
31178 replace TARGET_64BIT with TARGET_POWERPC64.
31179 (xsiexpdpf): Rename to...
31180 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
31181 replace TARGET_64BIT with TARGET_POWERPC64.
31183 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
31185 * config/rs6000/rs6000-builtins.def
31186 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
31188 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
31191 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
31193 * config/rs6000/rs6000-builtins.def
31194 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
31195 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
31197 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
31198 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
31199 TARGET_64BIT check.
31200 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
31201 requirement when it has a 64-bit argument.
31203 2023-05-12 Pan Li <pan2.li@intel.com>
31204 Richard Sandiford <richard.sandiford@arm.com>
31205 Richard Biener <rguenther@suse.de>
31206 Jakub Jelinek <jakub@redhat.com>
31208 * mux-utils.h: Add overload operator == and != for pointer_mux.
31209 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
31210 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
31211 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
31212 (dv_as_decl): Ditto.
31213 (dv_as_opaque): Removed due to unnecessary.
31214 (struct variable_hasher): Take decl_or_value as compare_type.
31215 (variable_hasher::equal): Diito.
31216 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
31217 (dv_from_value): Ditto.
31218 (attrs_list_member): Ditto.
31219 (vars_copy): Ditto.
31220 (var_reg_decl_set): Ditto.
31221 (var_reg_delete_and_set): Ditto.
31222 (find_loc_in_1pdv): Ditto.
31223 (canonicalize_values_star): Ditto.
31224 (variable_post_merge_new_vals): Ditto.
31225 (dump_onepart_variable_differences): Ditto.
31226 (variable_different_p): Ditto.
31227 (set_slot_part): Ditto.
31228 (clobber_slot_part): Ditto.
31229 (clobber_variable_part): Ditto.
31231 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
31233 * match.pd: simplify vector shift + bit_and + multiply.
31235 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31237 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
31238 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
31239 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
31240 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
31241 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
31242 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
31243 * config/arm/arm-mve-builtins.cc
31244 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
31245 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
31246 * config/arm/arm_mve.h (vqrdmlashq): Remove.
31247 (vqrdmlahq): Remove.
31248 (vqdmlashq): Remove.
31249 (vqdmlahq): Remove.
31253 (vmlasq_m): Remove.
31254 (vqdmlashq_m): Remove.
31255 (vqdmlahq_m): Remove.
31256 (vqrdmlahq_m): Remove.
31257 (vqrdmlashq_m): Remove.
31258 (vmlasq_n_u8): Remove.
31259 (vmlaq_n_u8): Remove.
31260 (vqrdmlashq_n_s8): Remove.
31261 (vqrdmlahq_n_s8): Remove.
31262 (vqdmlahq_n_s8): Remove.
31263 (vqdmlashq_n_s8): Remove.
31264 (vmlasq_n_s8): Remove.
31265 (vmlaq_n_s8): Remove.
31266 (vmlasq_n_u16): Remove.
31267 (vmlaq_n_u16): Remove.
31268 (vqrdmlashq_n_s16): Remove.
31269 (vqrdmlahq_n_s16): Remove.
31270 (vqdmlashq_n_s16): Remove.
31271 (vqdmlahq_n_s16): Remove.
31272 (vmlasq_n_s16): Remove.
31273 (vmlaq_n_s16): Remove.
31274 (vmlasq_n_u32): Remove.
31275 (vmlaq_n_u32): Remove.
31276 (vqrdmlashq_n_s32): Remove.
31277 (vqrdmlahq_n_s32): Remove.
31278 (vqdmlashq_n_s32): Remove.
31279 (vqdmlahq_n_s32): Remove.
31280 (vmlasq_n_s32): Remove.
31281 (vmlaq_n_s32): Remove.
31282 (vmlaq_m_n_s8): Remove.
31283 (vmlaq_m_n_s32): Remove.
31284 (vmlaq_m_n_s16): Remove.
31285 (vmlaq_m_n_u8): Remove.
31286 (vmlaq_m_n_u32): Remove.
31287 (vmlaq_m_n_u16): Remove.
31288 (vmlasq_m_n_s8): Remove.
31289 (vmlasq_m_n_s32): Remove.
31290 (vmlasq_m_n_s16): Remove.
31291 (vmlasq_m_n_u8): Remove.
31292 (vmlasq_m_n_u32): Remove.
31293 (vmlasq_m_n_u16): Remove.
31294 (vqdmlashq_m_n_s8): Remove.
31295 (vqdmlashq_m_n_s32): Remove.
31296 (vqdmlashq_m_n_s16): Remove.
31297 (vqdmlahq_m_n_s8): Remove.
31298 (vqdmlahq_m_n_s32): Remove.
31299 (vqdmlahq_m_n_s16): Remove.
31300 (vqrdmlahq_m_n_s8): Remove.
31301 (vqrdmlahq_m_n_s32): Remove.
31302 (vqrdmlahq_m_n_s16): Remove.
31303 (vqrdmlashq_m_n_s8): Remove.
31304 (vqrdmlashq_m_n_s32): Remove.
31305 (vqrdmlashq_m_n_s16): Remove.
31306 (__arm_vmlasq_n_u8): Remove.
31307 (__arm_vmlaq_n_u8): Remove.
31308 (__arm_vqrdmlashq_n_s8): Remove.
31309 (__arm_vqdmlashq_n_s8): Remove.
31310 (__arm_vqrdmlahq_n_s8): Remove.
31311 (__arm_vqdmlahq_n_s8): Remove.
31312 (__arm_vmlasq_n_s8): Remove.
31313 (__arm_vmlaq_n_s8): Remove.
31314 (__arm_vmlasq_n_u16): Remove.
31315 (__arm_vmlaq_n_u16): Remove.
31316 (__arm_vqrdmlashq_n_s16): Remove.
31317 (__arm_vqdmlashq_n_s16): Remove.
31318 (__arm_vqrdmlahq_n_s16): Remove.
31319 (__arm_vqdmlahq_n_s16): Remove.
31320 (__arm_vmlasq_n_s16): Remove.
31321 (__arm_vmlaq_n_s16): Remove.
31322 (__arm_vmlasq_n_u32): Remove.
31323 (__arm_vmlaq_n_u32): Remove.
31324 (__arm_vqrdmlashq_n_s32): Remove.
31325 (__arm_vqdmlashq_n_s32): Remove.
31326 (__arm_vqrdmlahq_n_s32): Remove.
31327 (__arm_vqdmlahq_n_s32): Remove.
31328 (__arm_vmlasq_n_s32): Remove.
31329 (__arm_vmlaq_n_s32): Remove.
31330 (__arm_vmlaq_m_n_s8): Remove.
31331 (__arm_vmlaq_m_n_s32): Remove.
31332 (__arm_vmlaq_m_n_s16): Remove.
31333 (__arm_vmlaq_m_n_u8): Remove.
31334 (__arm_vmlaq_m_n_u32): Remove.
31335 (__arm_vmlaq_m_n_u16): Remove.
31336 (__arm_vmlasq_m_n_s8): Remove.
31337 (__arm_vmlasq_m_n_s32): Remove.
31338 (__arm_vmlasq_m_n_s16): Remove.
31339 (__arm_vmlasq_m_n_u8): Remove.
31340 (__arm_vmlasq_m_n_u32): Remove.
31341 (__arm_vmlasq_m_n_u16): Remove.
31342 (__arm_vqdmlahq_m_n_s8): Remove.
31343 (__arm_vqdmlahq_m_n_s32): Remove.
31344 (__arm_vqdmlahq_m_n_s16): Remove.
31345 (__arm_vqrdmlahq_m_n_s8): Remove.
31346 (__arm_vqrdmlahq_m_n_s32): Remove.
31347 (__arm_vqrdmlahq_m_n_s16): Remove.
31348 (__arm_vqrdmlashq_m_n_s8): Remove.
31349 (__arm_vqrdmlashq_m_n_s32): Remove.
31350 (__arm_vqrdmlashq_m_n_s16): Remove.
31351 (__arm_vqdmlashq_m_n_s8): Remove.
31352 (__arm_vqdmlashq_m_n_s16): Remove.
31353 (__arm_vqdmlashq_m_n_s32): Remove.
31354 (__arm_vmlasq): Remove.
31355 (__arm_vmlaq): Remove.
31356 (__arm_vqrdmlashq): Remove.
31357 (__arm_vqdmlashq): Remove.
31358 (__arm_vqrdmlahq): Remove.
31359 (__arm_vqdmlahq): Remove.
31360 (__arm_vmlaq_m): Remove.
31361 (__arm_vmlasq_m): Remove.
31362 (__arm_vqdmlahq_m): Remove.
31363 (__arm_vqrdmlahq_m): Remove.
31364 (__arm_vqrdmlashq_m): Remove.
31365 (__arm_vqdmlashq_m): Remove.
31367 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31369 * config/arm/iterators.md (MVE_VMLxQ_N): New.
31370 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
31372 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
31374 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
31375 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
31376 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
31377 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
31378 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31380 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31382 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
31383 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
31385 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31387 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
31388 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
31389 (vqrdmlsdhxq): New.
31390 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
31391 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
31392 (vqrdmlsdhxq): New.
31393 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
31394 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
31395 (vqrdmlsdhxq): New.
31396 * config/arm/arm-mve-builtins.cc
31397 (function_instance::has_inactive_argument): Handle vqrdmladhq,
31398 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
31399 vqdmlsdhq, vqdmlsdhxq.
31400 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
31401 (vqrdmlsdhq): Remove.
31402 (vqrdmladhxq): Remove.
31403 (vqrdmladhq): Remove.
31404 (vqdmlsdhxq): Remove.
31405 (vqdmlsdhq): Remove.
31406 (vqdmladhxq): Remove.
31407 (vqdmladhq): Remove.
31408 (vqdmladhq_m): Remove.
31409 (vqdmladhxq_m): Remove.
31410 (vqdmlsdhq_m): Remove.
31411 (vqdmlsdhxq_m): Remove.
31412 (vqrdmladhq_m): Remove.
31413 (vqrdmladhxq_m): Remove.
31414 (vqrdmlsdhq_m): Remove.
31415 (vqrdmlsdhxq_m): Remove.
31416 (vqrdmlsdhxq_s8): Remove.
31417 (vqrdmlsdhq_s8): Remove.
31418 (vqrdmladhxq_s8): Remove.
31419 (vqrdmladhq_s8): Remove.
31420 (vqdmlsdhxq_s8): Remove.
31421 (vqdmlsdhq_s8): Remove.
31422 (vqdmladhxq_s8): Remove.
31423 (vqdmladhq_s8): Remove.
31424 (vqrdmlsdhxq_s16): Remove.
31425 (vqrdmlsdhq_s16): Remove.
31426 (vqrdmladhxq_s16): Remove.
31427 (vqrdmladhq_s16): Remove.
31428 (vqdmlsdhxq_s16): Remove.
31429 (vqdmlsdhq_s16): Remove.
31430 (vqdmladhxq_s16): Remove.
31431 (vqdmladhq_s16): Remove.
31432 (vqrdmlsdhxq_s32): Remove.
31433 (vqrdmlsdhq_s32): Remove.
31434 (vqrdmladhxq_s32): Remove.
31435 (vqrdmladhq_s32): Remove.
31436 (vqdmlsdhxq_s32): Remove.
31437 (vqdmlsdhq_s32): Remove.
31438 (vqdmladhxq_s32): Remove.
31439 (vqdmladhq_s32): Remove.
31440 (vqdmladhq_m_s8): Remove.
31441 (vqdmladhq_m_s32): Remove.
31442 (vqdmladhq_m_s16): Remove.
31443 (vqdmladhxq_m_s8): Remove.
31444 (vqdmladhxq_m_s32): Remove.
31445 (vqdmladhxq_m_s16): Remove.
31446 (vqdmlsdhq_m_s8): Remove.
31447 (vqdmlsdhq_m_s32): Remove.
31448 (vqdmlsdhq_m_s16): Remove.
31449 (vqdmlsdhxq_m_s8): Remove.
31450 (vqdmlsdhxq_m_s32): Remove.
31451 (vqdmlsdhxq_m_s16): Remove.
31452 (vqrdmladhq_m_s8): Remove.
31453 (vqrdmladhq_m_s32): Remove.
31454 (vqrdmladhq_m_s16): Remove.
31455 (vqrdmladhxq_m_s8): Remove.
31456 (vqrdmladhxq_m_s32): Remove.
31457 (vqrdmladhxq_m_s16): Remove.
31458 (vqrdmlsdhq_m_s8): Remove.
31459 (vqrdmlsdhq_m_s32): Remove.
31460 (vqrdmlsdhq_m_s16): Remove.
31461 (vqrdmlsdhxq_m_s8): Remove.
31462 (vqrdmlsdhxq_m_s32): Remove.
31463 (vqrdmlsdhxq_m_s16): Remove.
31464 (__arm_vqrdmlsdhxq_s8): Remove.
31465 (__arm_vqrdmlsdhq_s8): Remove.
31466 (__arm_vqrdmladhxq_s8): Remove.
31467 (__arm_vqrdmladhq_s8): Remove.
31468 (__arm_vqdmlsdhxq_s8): Remove.
31469 (__arm_vqdmlsdhq_s8): Remove.
31470 (__arm_vqdmladhxq_s8): Remove.
31471 (__arm_vqdmladhq_s8): Remove.
31472 (__arm_vqrdmlsdhxq_s16): Remove.
31473 (__arm_vqrdmlsdhq_s16): Remove.
31474 (__arm_vqrdmladhxq_s16): Remove.
31475 (__arm_vqrdmladhq_s16): Remove.
31476 (__arm_vqdmlsdhxq_s16): Remove.
31477 (__arm_vqdmlsdhq_s16): Remove.
31478 (__arm_vqdmladhxq_s16): Remove.
31479 (__arm_vqdmladhq_s16): Remove.
31480 (__arm_vqrdmlsdhxq_s32): Remove.
31481 (__arm_vqrdmlsdhq_s32): Remove.
31482 (__arm_vqrdmladhxq_s32): Remove.
31483 (__arm_vqrdmladhq_s32): Remove.
31484 (__arm_vqdmlsdhxq_s32): Remove.
31485 (__arm_vqdmlsdhq_s32): Remove.
31486 (__arm_vqdmladhxq_s32): Remove.
31487 (__arm_vqdmladhq_s32): Remove.
31488 (__arm_vqdmladhq_m_s8): Remove.
31489 (__arm_vqdmladhq_m_s32): Remove.
31490 (__arm_vqdmladhq_m_s16): Remove.
31491 (__arm_vqdmladhxq_m_s8): Remove.
31492 (__arm_vqdmladhxq_m_s32): Remove.
31493 (__arm_vqdmladhxq_m_s16): Remove.
31494 (__arm_vqdmlsdhq_m_s8): Remove.
31495 (__arm_vqdmlsdhq_m_s32): Remove.
31496 (__arm_vqdmlsdhq_m_s16): Remove.
31497 (__arm_vqdmlsdhxq_m_s8): Remove.
31498 (__arm_vqdmlsdhxq_m_s32): Remove.
31499 (__arm_vqdmlsdhxq_m_s16): Remove.
31500 (__arm_vqrdmladhq_m_s8): Remove.
31501 (__arm_vqrdmladhq_m_s32): Remove.
31502 (__arm_vqrdmladhq_m_s16): Remove.
31503 (__arm_vqrdmladhxq_m_s8): Remove.
31504 (__arm_vqrdmladhxq_m_s32): Remove.
31505 (__arm_vqrdmladhxq_m_s16): Remove.
31506 (__arm_vqrdmlsdhq_m_s8): Remove.
31507 (__arm_vqrdmlsdhq_m_s32): Remove.
31508 (__arm_vqrdmlsdhq_m_s16): Remove.
31509 (__arm_vqrdmlsdhxq_m_s8): Remove.
31510 (__arm_vqrdmlsdhxq_m_s32): Remove.
31511 (__arm_vqrdmlsdhxq_m_s16): Remove.
31512 (__arm_vqrdmlsdhxq): Remove.
31513 (__arm_vqrdmlsdhq): Remove.
31514 (__arm_vqrdmladhxq): Remove.
31515 (__arm_vqrdmladhq): Remove.
31516 (__arm_vqdmlsdhxq): Remove.
31517 (__arm_vqdmlsdhq): Remove.
31518 (__arm_vqdmladhxq): Remove.
31519 (__arm_vqdmladhq): Remove.
31520 (__arm_vqdmladhq_m): Remove.
31521 (__arm_vqdmladhxq_m): Remove.
31522 (__arm_vqdmlsdhq_m): Remove.
31523 (__arm_vqdmlsdhxq_m): Remove.
31524 (__arm_vqrdmladhq_m): Remove.
31525 (__arm_vqrdmladhxq_m): Remove.
31526 (__arm_vqrdmlsdhq_m): Remove.
31527 (__arm_vqrdmlsdhxq_m): Remove.
31529 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31531 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
31532 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
31533 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
31534 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
31535 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
31536 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
31537 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
31538 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
31539 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
31540 (mve_vqdmladhq_s<mode>): Merge into ...
31541 (@mve_<mve_insn>q_<supf><mode>): ... this.
31543 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31545 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
31546 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
31548 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31550 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
31551 (vmlsldavaq, vmlsldavaxq): New.
31552 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
31553 (vmlsldavaq, vmlsldavaxq): New.
31554 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
31555 (vmlsldavaq, vmlsldavaxq): New.
31556 * config/arm/arm_mve.h (vmlaldavaq): Remove.
31557 (vmlaldavaxq): Remove.
31558 (vmlsldavaq): Remove.
31559 (vmlsldavaxq): Remove.
31560 (vmlaldavaq_p): Remove.
31561 (vmlaldavaxq_p): Remove.
31562 (vmlsldavaq_p): Remove.
31563 (vmlsldavaxq_p): Remove.
31564 (vmlaldavaq_s16): Remove.
31565 (vmlaldavaxq_s16): Remove.
31566 (vmlsldavaq_s16): Remove.
31567 (vmlsldavaxq_s16): Remove.
31568 (vmlaldavaq_u16): Remove.
31569 (vmlaldavaq_s32): Remove.
31570 (vmlaldavaxq_s32): Remove.
31571 (vmlsldavaq_s32): Remove.
31572 (vmlsldavaxq_s32): Remove.
31573 (vmlaldavaq_u32): Remove.
31574 (vmlaldavaq_p_s32): Remove.
31575 (vmlaldavaq_p_s16): Remove.
31576 (vmlaldavaq_p_u32): Remove.
31577 (vmlaldavaq_p_u16): Remove.
31578 (vmlaldavaxq_p_s32): Remove.
31579 (vmlaldavaxq_p_s16): Remove.
31580 (vmlsldavaq_p_s32): Remove.
31581 (vmlsldavaq_p_s16): Remove.
31582 (vmlsldavaxq_p_s32): Remove.
31583 (vmlsldavaxq_p_s16): Remove.
31584 (__arm_vmlaldavaq_s16): Remove.
31585 (__arm_vmlaldavaxq_s16): Remove.
31586 (__arm_vmlsldavaq_s16): Remove.
31587 (__arm_vmlsldavaxq_s16): Remove.
31588 (__arm_vmlaldavaq_u16): Remove.
31589 (__arm_vmlaldavaq_s32): Remove.
31590 (__arm_vmlaldavaxq_s32): Remove.
31591 (__arm_vmlsldavaq_s32): Remove.
31592 (__arm_vmlsldavaxq_s32): Remove.
31593 (__arm_vmlaldavaq_u32): Remove.
31594 (__arm_vmlaldavaq_p_s32): Remove.
31595 (__arm_vmlaldavaq_p_s16): Remove.
31596 (__arm_vmlaldavaq_p_u32): Remove.
31597 (__arm_vmlaldavaq_p_u16): Remove.
31598 (__arm_vmlaldavaxq_p_s32): Remove.
31599 (__arm_vmlaldavaxq_p_s16): Remove.
31600 (__arm_vmlsldavaq_p_s32): Remove.
31601 (__arm_vmlsldavaq_p_s16): Remove.
31602 (__arm_vmlsldavaxq_p_s32): Remove.
31603 (__arm_vmlsldavaxq_p_s16): Remove.
31604 (__arm_vmlaldavaq): Remove.
31605 (__arm_vmlaldavaxq): Remove.
31606 (__arm_vmlsldavaq): Remove.
31607 (__arm_vmlsldavaxq): Remove.
31608 (__arm_vmlaldavaq_p): Remove.
31609 (__arm_vmlaldavaxq_p): Remove.
31610 (__arm_vmlsldavaq_p): Remove.
31611 (__arm_vmlsldavaxq_p): Remove.
31613 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31615 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
31617 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
31618 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
31619 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
31620 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
31621 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
31622 (mve_vmlaldavaxq_s<mode>): Merge into ...
31623 (@mve_<mve_insn>q_<supf><mode>): ... this.
31624 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
31625 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
31627 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31629 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31631 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
31632 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
31634 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31636 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
31637 (vrmlsldavhq, vrmlsldavhxq): New.
31638 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
31639 (vrmlsldavhq, vrmlsldavhxq): New.
31640 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
31641 (vrmlsldavhq, vrmlsldavhxq): New.
31642 * config/arm/arm-mve-builtins-functions.h
31643 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
31644 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
31645 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
31646 (vrmlsldavhxq): Remove.
31647 (vrmlsldavhq): Remove.
31648 (vrmlaldavhxq): Remove.
31649 (vrmlaldavhq_p): Remove.
31650 (vrmlaldavhxq_p): Remove.
31651 (vrmlsldavhq_p): Remove.
31652 (vrmlsldavhxq_p): Remove.
31653 (vrmlaldavhq_u32): Remove.
31654 (vrmlsldavhxq_s32): Remove.
31655 (vrmlsldavhq_s32): Remove.
31656 (vrmlaldavhxq_s32): Remove.
31657 (vrmlaldavhq_s32): Remove.
31658 (vrmlaldavhq_p_s32): Remove.
31659 (vrmlaldavhxq_p_s32): Remove.
31660 (vrmlsldavhq_p_s32): Remove.
31661 (vrmlsldavhxq_p_s32): Remove.
31662 (vrmlaldavhq_p_u32): Remove.
31663 (__arm_vrmlaldavhq_u32): Remove.
31664 (__arm_vrmlsldavhxq_s32): Remove.
31665 (__arm_vrmlsldavhq_s32): Remove.
31666 (__arm_vrmlaldavhxq_s32): Remove.
31667 (__arm_vrmlaldavhq_s32): Remove.
31668 (__arm_vrmlaldavhq_p_s32): Remove.
31669 (__arm_vrmlaldavhxq_p_s32): Remove.
31670 (__arm_vrmlsldavhq_p_s32): Remove.
31671 (__arm_vrmlsldavhxq_p_s32): Remove.
31672 (__arm_vrmlaldavhq_p_u32): Remove.
31673 (__arm_vrmlaldavhq): Remove.
31674 (__arm_vrmlsldavhxq): Remove.
31675 (__arm_vrmlsldavhq): Remove.
31676 (__arm_vrmlaldavhxq): Remove.
31677 (__arm_vrmlaldavhq_p): Remove.
31678 (__arm_vrmlaldavhxq_p): Remove.
31679 (__arm_vrmlsldavhq_p): Remove.
31680 (__arm_vrmlsldavhxq_p): Remove.
31682 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31684 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
31686 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
31687 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
31688 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
31689 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
31690 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
31691 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
31692 (@mve_<mve_insn>q_<supf>v4si): ... this.
31693 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
31694 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
31696 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
31698 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31700 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
31701 (vmlsldavq, vmlsldavxq): New.
31702 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
31703 (vmlsldavq, vmlsldavxq): New.
31704 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
31705 (vmlsldavq, vmlsldavxq): New.
31706 * config/arm/arm_mve.h (vmlaldavq): Remove.
31707 (vmlsldavxq): Remove.
31708 (vmlsldavq): Remove.
31709 (vmlaldavxq): Remove.
31710 (vmlaldavq_p): Remove.
31711 (vmlaldavxq_p): Remove.
31712 (vmlsldavq_p): Remove.
31713 (vmlsldavxq_p): Remove.
31714 (vmlaldavq_u16): Remove.
31715 (vmlsldavxq_s16): Remove.
31716 (vmlsldavq_s16): Remove.
31717 (vmlaldavxq_s16): Remove.
31718 (vmlaldavq_s16): Remove.
31719 (vmlaldavq_u32): Remove.
31720 (vmlsldavxq_s32): Remove.
31721 (vmlsldavq_s32): Remove.
31722 (vmlaldavxq_s32): Remove.
31723 (vmlaldavq_s32): Remove.
31724 (vmlaldavq_p_s16): Remove.
31725 (vmlaldavxq_p_s16): Remove.
31726 (vmlsldavq_p_s16): Remove.
31727 (vmlsldavxq_p_s16): Remove.
31728 (vmlaldavq_p_u16): Remove.
31729 (vmlaldavq_p_s32): Remove.
31730 (vmlaldavxq_p_s32): Remove.
31731 (vmlsldavq_p_s32): Remove.
31732 (vmlsldavxq_p_s32): Remove.
31733 (vmlaldavq_p_u32): Remove.
31734 (__arm_vmlaldavq_u16): Remove.
31735 (__arm_vmlsldavxq_s16): Remove.
31736 (__arm_vmlsldavq_s16): Remove.
31737 (__arm_vmlaldavxq_s16): Remove.
31738 (__arm_vmlaldavq_s16): Remove.
31739 (__arm_vmlaldavq_u32): Remove.
31740 (__arm_vmlsldavxq_s32): Remove.
31741 (__arm_vmlsldavq_s32): Remove.
31742 (__arm_vmlaldavxq_s32): Remove.
31743 (__arm_vmlaldavq_s32): Remove.
31744 (__arm_vmlaldavq_p_s16): Remove.
31745 (__arm_vmlaldavxq_p_s16): Remove.
31746 (__arm_vmlsldavq_p_s16): Remove.
31747 (__arm_vmlsldavxq_p_s16): Remove.
31748 (__arm_vmlaldavq_p_u16): Remove.
31749 (__arm_vmlaldavq_p_s32): Remove.
31750 (__arm_vmlaldavxq_p_s32): Remove.
31751 (__arm_vmlsldavq_p_s32): Remove.
31752 (__arm_vmlsldavxq_p_s32): Remove.
31753 (__arm_vmlaldavq_p_u32): Remove.
31754 (__arm_vmlaldavq): Remove.
31755 (__arm_vmlsldavxq): Remove.
31756 (__arm_vmlsldavq): Remove.
31757 (__arm_vmlaldavxq): Remove.
31758 (__arm_vmlaldavq_p): Remove.
31759 (__arm_vmlaldavxq_p): Remove.
31760 (__arm_vmlsldavq_p): Remove.
31761 (__arm_vmlsldavxq_p): Remove.
31763 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31765 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
31766 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
31767 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
31768 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
31769 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
31770 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
31771 (mve_vmlsldavxq_s<mode>): Merge into ...
31772 (@mve_<mve_insn>q_<supf><mode>): ... this.
31773 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
31774 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
31776 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31778 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31780 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
31781 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
31783 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31785 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
31786 * config/arm/arm-mve-builtins-base.def (vabavq): New.
31787 * config/arm/arm-mve-builtins-base.h (vabavq): New.
31788 * config/arm/arm_mve.h (vabavq): Remove.
31789 (vabavq_p): Remove.
31790 (vabavq_s8): Remove.
31791 (vabavq_s16): Remove.
31792 (vabavq_s32): Remove.
31793 (vabavq_u8): Remove.
31794 (vabavq_u16): Remove.
31795 (vabavq_u32): Remove.
31796 (vabavq_p_s8): Remove.
31797 (vabavq_p_u8): Remove.
31798 (vabavq_p_s16): Remove.
31799 (vabavq_p_u16): Remove.
31800 (vabavq_p_s32): Remove.
31801 (vabavq_p_u32): Remove.
31802 (__arm_vabavq_s8): Remove.
31803 (__arm_vabavq_s16): Remove.
31804 (__arm_vabavq_s32): Remove.
31805 (__arm_vabavq_u8): Remove.
31806 (__arm_vabavq_u16): Remove.
31807 (__arm_vabavq_u32): Remove.
31808 (__arm_vabavq_p_s8): Remove.
31809 (__arm_vabavq_p_u8): Remove.
31810 (__arm_vabavq_p_s16): Remove.
31811 (__arm_vabavq_p_u16): Remove.
31812 (__arm_vabavq_p_s32): Remove.
31813 (__arm_vabavq_p_u32): Remove.
31814 (__arm_vabavq): Remove.
31815 (__arm_vabavq_p): Remove.
31817 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31819 * config/arm/iterators.md (mve_insn): Add vabav.
31820 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
31821 (@mve_<mve_insn>q_<supf><mode>): ... this,.
31822 (mve_vabavq_p_<supf><mode>): Rename into ...
31823 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
31825 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31827 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
31828 (vmlsdavaq, vmlsdavaxq): New.
31829 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
31830 (vmlsdavaq, vmlsdavaxq): New.
31831 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
31832 (vmlsdavaq, vmlsdavaxq): New.
31833 * config/arm/arm_mve.h (vmladavaq): Remove.
31834 (vmlsdavaxq): Remove.
31835 (vmlsdavaq): Remove.
31836 (vmladavaxq): Remove.
31837 (vmladavaq_p): Remove.
31838 (vmladavaxq_p): Remove.
31839 (vmlsdavaq_p): Remove.
31840 (vmlsdavaxq_p): Remove.
31841 (vmladavaq_u8): Remove.
31842 (vmlsdavaxq_s8): Remove.
31843 (vmlsdavaq_s8): Remove.
31844 (vmladavaxq_s8): Remove.
31845 (vmladavaq_s8): Remove.
31846 (vmladavaq_u16): Remove.
31847 (vmlsdavaxq_s16): Remove.
31848 (vmlsdavaq_s16): Remove.
31849 (vmladavaxq_s16): Remove.
31850 (vmladavaq_s16): Remove.
31851 (vmladavaq_u32): Remove.
31852 (vmlsdavaxq_s32): Remove.
31853 (vmlsdavaq_s32): Remove.
31854 (vmladavaxq_s32): Remove.
31855 (vmladavaq_s32): Remove.
31856 (vmladavaq_p_s8): Remove.
31857 (vmladavaq_p_s32): Remove.
31858 (vmladavaq_p_s16): Remove.
31859 (vmladavaq_p_u8): Remove.
31860 (vmladavaq_p_u32): Remove.
31861 (vmladavaq_p_u16): Remove.
31862 (vmladavaxq_p_s8): Remove.
31863 (vmladavaxq_p_s32): Remove.
31864 (vmladavaxq_p_s16): Remove.
31865 (vmlsdavaq_p_s8): Remove.
31866 (vmlsdavaq_p_s32): Remove.
31867 (vmlsdavaq_p_s16): Remove.
31868 (vmlsdavaxq_p_s8): Remove.
31869 (vmlsdavaxq_p_s32): Remove.
31870 (vmlsdavaxq_p_s16): Remove.
31871 (__arm_vmladavaq_u8): Remove.
31872 (__arm_vmlsdavaxq_s8): Remove.
31873 (__arm_vmlsdavaq_s8): Remove.
31874 (__arm_vmladavaxq_s8): Remove.
31875 (__arm_vmladavaq_s8): Remove.
31876 (__arm_vmladavaq_u16): Remove.
31877 (__arm_vmlsdavaxq_s16): Remove.
31878 (__arm_vmlsdavaq_s16): Remove.
31879 (__arm_vmladavaxq_s16): Remove.
31880 (__arm_vmladavaq_s16): Remove.
31881 (__arm_vmladavaq_u32): Remove.
31882 (__arm_vmlsdavaxq_s32): Remove.
31883 (__arm_vmlsdavaq_s32): Remove.
31884 (__arm_vmladavaxq_s32): Remove.
31885 (__arm_vmladavaq_s32): Remove.
31886 (__arm_vmladavaq_p_s8): Remove.
31887 (__arm_vmladavaq_p_s32): Remove.
31888 (__arm_vmladavaq_p_s16): Remove.
31889 (__arm_vmladavaq_p_u8): Remove.
31890 (__arm_vmladavaq_p_u32): Remove.
31891 (__arm_vmladavaq_p_u16): Remove.
31892 (__arm_vmladavaxq_p_s8): Remove.
31893 (__arm_vmladavaxq_p_s32): Remove.
31894 (__arm_vmladavaxq_p_s16): Remove.
31895 (__arm_vmlsdavaq_p_s8): Remove.
31896 (__arm_vmlsdavaq_p_s32): Remove.
31897 (__arm_vmlsdavaq_p_s16): Remove.
31898 (__arm_vmlsdavaxq_p_s8): Remove.
31899 (__arm_vmlsdavaxq_p_s32): Remove.
31900 (__arm_vmlsdavaxq_p_s16): Remove.
31901 (__arm_vmladavaq): Remove.
31902 (__arm_vmlsdavaxq): Remove.
31903 (__arm_vmlsdavaq): Remove.
31904 (__arm_vmladavaxq): Remove.
31905 (__arm_vmladavaq_p): Remove.
31906 (__arm_vmladavaxq_p): Remove.
31907 (__arm_vmlsdavaq_p): Remove.
31908 (__arm_vmlsdavaxq_p): Remove.
31910 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31912 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
31913 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
31915 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31917 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
31918 (vmlsdavq, vmlsdavxq): New.
31919 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
31920 (vmlsdavq, vmlsdavxq): New.
31921 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
31922 (vmlsdavq, vmlsdavxq): New.
31923 * config/arm/arm_mve.h (vmladavq): Remove.
31924 (vmlsdavxq): Remove.
31925 (vmlsdavq): Remove.
31926 (vmladavxq): Remove.
31927 (vmladavq_p): Remove.
31928 (vmlsdavxq_p): Remove.
31929 (vmlsdavq_p): Remove.
31930 (vmladavxq_p): Remove.
31931 (vmladavq_u8): Remove.
31932 (vmlsdavxq_s8): Remove.
31933 (vmlsdavq_s8): Remove.
31934 (vmladavxq_s8): Remove.
31935 (vmladavq_s8): Remove.
31936 (vmladavq_u16): Remove.
31937 (vmlsdavxq_s16): Remove.
31938 (vmlsdavq_s16): Remove.
31939 (vmladavxq_s16): Remove.
31940 (vmladavq_s16): Remove.
31941 (vmladavq_u32): Remove.
31942 (vmlsdavxq_s32): Remove.
31943 (vmlsdavq_s32): Remove.
31944 (vmladavxq_s32): Remove.
31945 (vmladavq_s32): Remove.
31946 (vmladavq_p_u8): Remove.
31947 (vmlsdavxq_p_s8): Remove.
31948 (vmlsdavq_p_s8): Remove.
31949 (vmladavxq_p_s8): Remove.
31950 (vmladavq_p_s8): Remove.
31951 (vmladavq_p_u16): Remove.
31952 (vmlsdavxq_p_s16): Remove.
31953 (vmlsdavq_p_s16): Remove.
31954 (vmladavxq_p_s16): Remove.
31955 (vmladavq_p_s16): Remove.
31956 (vmladavq_p_u32): Remove.
31957 (vmlsdavxq_p_s32): Remove.
31958 (vmlsdavq_p_s32): Remove.
31959 (vmladavxq_p_s32): Remove.
31960 (vmladavq_p_s32): Remove.
31961 (__arm_vmladavq_u8): Remove.
31962 (__arm_vmlsdavxq_s8): Remove.
31963 (__arm_vmlsdavq_s8): Remove.
31964 (__arm_vmladavxq_s8): Remove.
31965 (__arm_vmladavq_s8): Remove.
31966 (__arm_vmladavq_u16): Remove.
31967 (__arm_vmlsdavxq_s16): Remove.
31968 (__arm_vmlsdavq_s16): Remove.
31969 (__arm_vmladavxq_s16): Remove.
31970 (__arm_vmladavq_s16): Remove.
31971 (__arm_vmladavq_u32): Remove.
31972 (__arm_vmlsdavxq_s32): Remove.
31973 (__arm_vmlsdavq_s32): Remove.
31974 (__arm_vmladavxq_s32): Remove.
31975 (__arm_vmladavq_s32): Remove.
31976 (__arm_vmladavq_p_u8): Remove.
31977 (__arm_vmlsdavxq_p_s8): Remove.
31978 (__arm_vmlsdavq_p_s8): Remove.
31979 (__arm_vmladavxq_p_s8): Remove.
31980 (__arm_vmladavq_p_s8): Remove.
31981 (__arm_vmladavq_p_u16): Remove.
31982 (__arm_vmlsdavxq_p_s16): Remove.
31983 (__arm_vmlsdavq_p_s16): Remove.
31984 (__arm_vmladavxq_p_s16): Remove.
31985 (__arm_vmladavq_p_s16): Remove.
31986 (__arm_vmladavq_p_u32): Remove.
31987 (__arm_vmlsdavxq_p_s32): Remove.
31988 (__arm_vmlsdavq_p_s32): Remove.
31989 (__arm_vmladavxq_p_s32): Remove.
31990 (__arm_vmladavq_p_s32): Remove.
31991 (__arm_vmladavq): Remove.
31992 (__arm_vmlsdavxq): Remove.
31993 (__arm_vmlsdavq): Remove.
31994 (__arm_vmladavxq): Remove.
31995 (__arm_vmladavq_p): Remove.
31996 (__arm_vmlsdavxq_p): Remove.
31997 (__arm_vmlsdavq_p): Remove.
31998 (__arm_vmladavxq_p): Remove.
32000 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32002 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
32003 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
32004 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
32005 vmlsdavax, vmlsdav, vmlsdavx.
32006 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
32007 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
32008 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
32010 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
32011 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
32012 (mve_vmlsdavxq_s<mode>): Merge into ...
32013 (@mve_<mve_insn>q_<supf><mode>): ... this.
32014 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
32015 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
32017 (@mve_<mve_insn>q_<supf><mode>): ... this.
32018 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
32019 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
32020 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
32021 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
32022 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
32024 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
32026 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32028 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
32029 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
32031 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32033 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
32034 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
32035 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
32036 * config/arm/arm_mve.h (vaddlvaq): Remove.
32037 (vaddlvaq_p): Remove.
32038 (vaddlvaq_u32): Remove.
32039 (vaddlvaq_s32): Remove.
32040 (vaddlvaq_p_s32): Remove.
32041 (vaddlvaq_p_u32): Remove.
32042 (__arm_vaddlvaq_u32): Remove.
32043 (__arm_vaddlvaq_s32): Remove.
32044 (__arm_vaddlvaq_p_s32): Remove.
32045 (__arm_vaddlvaq_p_u32): Remove.
32046 (__arm_vaddlvaq): Remove.
32047 (__arm_vaddlvaq_p): Remove.
32049 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32051 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
32052 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
32054 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32056 * config/arm/iterators.md (mve_insn): Add vaddlva.
32057 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
32058 (@mve_<mve_insn>q_<supf>v4si): ... this.
32059 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
32060 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
32062 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
32065 * config/i386/i386.cc (ix86_widen_mult_cost):
32066 Handle V4HImode and V2SImode.
32068 2023-05-11 Andrew Pinski <apinski@marvell.com>
32070 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
32071 defined by a phi node with more than one uses, allow for the
32072 only uses are in that same defining statement.
32074 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
32076 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
32079 2023-05-11 Pan Li <pan2.li@intel.com>
32081 * config/riscv/vector.md: Add comments for simplifying to vmset.
32083 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
32085 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
32087 (v<optab><mode>3): Add vector shift pattern.
32088 * config/riscv/vector-iterators.md: New iterator.
32090 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
32092 * config/riscv/autovec.md: Use renamed functions.
32093 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
32094 (emit_vlmax_reg_op): To this.
32095 (emit_nonvlmax_op): Rename.
32096 (emit_len_op): To this.
32097 (emit_nonvlmax_binop): Rename.
32098 (emit_len_binop): To this.
32099 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
32100 (emit_pred_binop): Remove vlmax_p.
32101 (emit_vlmax_op): Rename.
32102 (emit_vlmax_reg_op): To this.
32103 (emit_nonvlmax_op): Rename.
32104 (emit_len_op): To this.
32105 (emit_nonvlmax_binop): Rename.
32106 (emit_len_binop): To this.
32107 (sew64_scalar_helper): Use renamed functions.
32108 (expand_tuple_move): Use renamed functions.
32109 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
32111 * config/riscv/vector.md: Use renamed functions.
32113 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
32114 Michael Collison <collison@rivosinc.com>
32116 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
32117 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
32118 * config/riscv/riscv-v.cc (emit_pred_op): New function.
32119 (set_expander_dest_and_mask): New function.
32120 (emit_pred_binop): New function.
32121 (emit_nonvlmax_binop): New function.
32123 2023-05-11 Pan Li <pan2.li@intel.com>
32125 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
32126 * gimple-loop-interchange.cc
32127 (tree_loop_interchange::map_inductions_to_loop): Ditto.
32128 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
32129 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
32130 * tree-ssa-loop-manip.cc (create_iv): Ditto.
32131 (tree_transform_and_unroll_loop): Ditto.
32132 (canonicalize_loop_ivs): Ditto.
32133 * tree-ssa-loop-manip.h (create_iv): Ditto.
32134 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
32135 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
32137 (vect_set_loop_condition_normal): Ditto.
32138 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
32139 * tree-vect-stmts.cc (vectorizable_store): Ditto.
32140 (vectorizable_load): Ditto.
32142 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32144 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
32145 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
32146 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
32147 * config/arm/arm_mve.h (vmovlbq): Remove.
32149 (vmovlbq_m): Remove.
32150 (vmovltq_m): Remove.
32151 (vmovlbq_x): Remove.
32152 (vmovltq_x): Remove.
32153 (vmovlbq_s8): Remove.
32154 (vmovlbq_s16): Remove.
32155 (vmovltq_s8): Remove.
32156 (vmovltq_s16): Remove.
32157 (vmovltq_u8): Remove.
32158 (vmovltq_u16): Remove.
32159 (vmovlbq_u8): Remove.
32160 (vmovlbq_u16): Remove.
32161 (vmovlbq_m_s8): Remove.
32162 (vmovltq_m_s8): Remove.
32163 (vmovlbq_m_u8): Remove.
32164 (vmovltq_m_u8): Remove.
32165 (vmovlbq_m_s16): Remove.
32166 (vmovltq_m_s16): Remove.
32167 (vmovlbq_m_u16): Remove.
32168 (vmovltq_m_u16): Remove.
32169 (vmovlbq_x_s8): Remove.
32170 (vmovlbq_x_s16): Remove.
32171 (vmovlbq_x_u8): Remove.
32172 (vmovlbq_x_u16): Remove.
32173 (vmovltq_x_s8): Remove.
32174 (vmovltq_x_s16): Remove.
32175 (vmovltq_x_u8): Remove.
32176 (vmovltq_x_u16): Remove.
32177 (__arm_vmovlbq_s8): Remove.
32178 (__arm_vmovlbq_s16): Remove.
32179 (__arm_vmovltq_s8): Remove.
32180 (__arm_vmovltq_s16): Remove.
32181 (__arm_vmovltq_u8): Remove.
32182 (__arm_vmovltq_u16): Remove.
32183 (__arm_vmovlbq_u8): Remove.
32184 (__arm_vmovlbq_u16): Remove.
32185 (__arm_vmovlbq_m_s8): Remove.
32186 (__arm_vmovltq_m_s8): Remove.
32187 (__arm_vmovlbq_m_u8): Remove.
32188 (__arm_vmovltq_m_u8): Remove.
32189 (__arm_vmovlbq_m_s16): Remove.
32190 (__arm_vmovltq_m_s16): Remove.
32191 (__arm_vmovlbq_m_u16): Remove.
32192 (__arm_vmovltq_m_u16): Remove.
32193 (__arm_vmovlbq_x_s8): Remove.
32194 (__arm_vmovlbq_x_s16): Remove.
32195 (__arm_vmovlbq_x_u8): Remove.
32196 (__arm_vmovlbq_x_u16): Remove.
32197 (__arm_vmovltq_x_s8): Remove.
32198 (__arm_vmovltq_x_s16): Remove.
32199 (__arm_vmovltq_x_u8): Remove.
32200 (__arm_vmovltq_x_u16): Remove.
32201 (__arm_vmovlbq): Remove.
32202 (__arm_vmovltq): Remove.
32203 (__arm_vmovlbq_m): Remove.
32204 (__arm_vmovltq_m): Remove.
32205 (__arm_vmovlbq_x): Remove.
32206 (__arm_vmovltq_x): Remove.
32208 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32210 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
32211 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
32213 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32215 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
32216 (VMOVLBQ, VMOVLTQ): Merge into ...
32217 (VMOVLxQ): ... this.
32218 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
32219 (VMOVLxQ_M): ... this.
32220 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
32221 (mve_vmovlbq_<supf><mode>): Merge into ...
32222 (@mve_<mve_insn>q_<supf><mode>): ... this.
32223 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
32225 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
32227 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32229 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
32230 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
32231 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
32232 * config/arm/arm-mve-builtins-functions.h
32233 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
32234 * config/arm/arm_mve.h (vaddlvq): Remove.
32235 (vaddlvq_p): Remove.
32236 (vaddlvq_s32): Remove.
32237 (vaddlvq_u32): Remove.
32238 (vaddlvq_p_s32): Remove.
32239 (vaddlvq_p_u32): Remove.
32240 (__arm_vaddlvq_s32): Remove.
32241 (__arm_vaddlvq_u32): Remove.
32242 (__arm_vaddlvq_p_s32): Remove.
32243 (__arm_vaddlvq_p_u32): Remove.
32244 (__arm_vaddlvq): Remove.
32245 (__arm_vaddlvq_p): Remove.
32247 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32249 * config/arm/iterators.md (mve_insn): Add vaddlv.
32250 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
32251 (@mve_<mve_insn>q_<supf>v4si): ... this.
32252 (mve_vaddlvq_p_<supf>v4si): Rename into ...
32253 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
32255 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32257 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
32258 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
32260 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32262 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
32263 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
32264 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
32265 * config/arm/arm_mve.h (vaddvaq): Remove.
32266 (vaddvaq_p): Remove.
32267 (vaddvaq_u8): Remove.
32268 (vaddvaq_s8): Remove.
32269 (vaddvaq_u16): Remove.
32270 (vaddvaq_s16): Remove.
32271 (vaddvaq_u32): Remove.
32272 (vaddvaq_s32): Remove.
32273 (vaddvaq_p_u8): Remove.
32274 (vaddvaq_p_s8): Remove.
32275 (vaddvaq_p_u16): Remove.
32276 (vaddvaq_p_s16): Remove.
32277 (vaddvaq_p_u32): Remove.
32278 (vaddvaq_p_s32): Remove.
32279 (__arm_vaddvaq_u8): Remove.
32280 (__arm_vaddvaq_s8): Remove.
32281 (__arm_vaddvaq_u16): Remove.
32282 (__arm_vaddvaq_s16): Remove.
32283 (__arm_vaddvaq_u32): Remove.
32284 (__arm_vaddvaq_s32): Remove.
32285 (__arm_vaddvaq_p_u8): Remove.
32286 (__arm_vaddvaq_p_s8): Remove.
32287 (__arm_vaddvaq_p_u16): Remove.
32288 (__arm_vaddvaq_p_s16): Remove.
32289 (__arm_vaddvaq_p_u32): Remove.
32290 (__arm_vaddvaq_p_s32): Remove.
32291 (__arm_vaddvaq): Remove.
32292 (__arm_vaddvaq_p): Remove.
32294 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32296 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
32297 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
32299 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32301 * config/arm/iterators.md (mve_insn): Add vaddva.
32302 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
32303 (@mve_<mve_insn>q_<supf><mode>): ... this.
32304 (mve_vaddvaq_p_<supf><mode>): Rename into ...
32305 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
32307 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32309 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
32310 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
32311 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
32312 * config/arm/arm_mve.h (vaddvq): Remove.
32313 (vaddvq_p): Remove.
32314 (vaddvq_s8): Remove.
32315 (vaddvq_s16): Remove.
32316 (vaddvq_s32): Remove.
32317 (vaddvq_u8): Remove.
32318 (vaddvq_u16): Remove.
32319 (vaddvq_u32): Remove.
32320 (vaddvq_p_u8): Remove.
32321 (vaddvq_p_s8): Remove.
32322 (vaddvq_p_u16): Remove.
32323 (vaddvq_p_s16): Remove.
32324 (vaddvq_p_u32): Remove.
32325 (vaddvq_p_s32): Remove.
32326 (__arm_vaddvq_s8): Remove.
32327 (__arm_vaddvq_s16): Remove.
32328 (__arm_vaddvq_s32): Remove.
32329 (__arm_vaddvq_u8): Remove.
32330 (__arm_vaddvq_u16): Remove.
32331 (__arm_vaddvq_u32): Remove.
32332 (__arm_vaddvq_p_u8): Remove.
32333 (__arm_vaddvq_p_s8): Remove.
32334 (__arm_vaddvq_p_u16): Remove.
32335 (__arm_vaddvq_p_s16): Remove.
32336 (__arm_vaddvq_p_u32): Remove.
32337 (__arm_vaddvq_p_s32): Remove.
32338 (__arm_vaddvq): Remove.
32339 (__arm_vaddvq_p): Remove.
32341 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32343 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
32344 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
32346 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32348 * config/arm/iterators.md (mve_insn): Add vaddv.
32349 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
32350 (@mve_<mve_insn>q_<supf><mode>): ... this.
32351 (mve_vaddvq_p_<supf><mode>): Rename into ...
32352 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
32353 * config/arm/vec-common.md: Use gen_mve_q instead of
32356 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32358 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
32360 * config/arm/arm-mve-builtins-base.def (vdupq): New.
32361 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
32362 * config/arm/arm_mve.h (vdupq_n): Remove.
32364 (vdupq_n_f16): Remove.
32365 (vdupq_n_f32): Remove.
32366 (vdupq_n_s8): Remove.
32367 (vdupq_n_s16): Remove.
32368 (vdupq_n_s32): Remove.
32369 (vdupq_n_u8): Remove.
32370 (vdupq_n_u16): Remove.
32371 (vdupq_n_u32): Remove.
32372 (vdupq_m_n_u8): Remove.
32373 (vdupq_m_n_s8): Remove.
32374 (vdupq_m_n_u16): Remove.
32375 (vdupq_m_n_s16): Remove.
32376 (vdupq_m_n_u32): Remove.
32377 (vdupq_m_n_s32): Remove.
32378 (vdupq_m_n_f16): Remove.
32379 (vdupq_m_n_f32): Remove.
32380 (vdupq_x_n_s8): Remove.
32381 (vdupq_x_n_s16): Remove.
32382 (vdupq_x_n_s32): Remove.
32383 (vdupq_x_n_u8): Remove.
32384 (vdupq_x_n_u16): Remove.
32385 (vdupq_x_n_u32): Remove.
32386 (vdupq_x_n_f16): Remove.
32387 (vdupq_x_n_f32): Remove.
32388 (__arm_vdupq_n_s8): Remove.
32389 (__arm_vdupq_n_s16): Remove.
32390 (__arm_vdupq_n_s32): Remove.
32391 (__arm_vdupq_n_u8): Remove.
32392 (__arm_vdupq_n_u16): Remove.
32393 (__arm_vdupq_n_u32): Remove.
32394 (__arm_vdupq_m_n_u8): Remove.
32395 (__arm_vdupq_m_n_s8): Remove.
32396 (__arm_vdupq_m_n_u16): Remove.
32397 (__arm_vdupq_m_n_s16): Remove.
32398 (__arm_vdupq_m_n_u32): Remove.
32399 (__arm_vdupq_m_n_s32): Remove.
32400 (__arm_vdupq_x_n_s8): Remove.
32401 (__arm_vdupq_x_n_s16): Remove.
32402 (__arm_vdupq_x_n_s32): Remove.
32403 (__arm_vdupq_x_n_u8): Remove.
32404 (__arm_vdupq_x_n_u16): Remove.
32405 (__arm_vdupq_x_n_u32): Remove.
32406 (__arm_vdupq_n_f16): Remove.
32407 (__arm_vdupq_n_f32): Remove.
32408 (__arm_vdupq_m_n_f16): Remove.
32409 (__arm_vdupq_m_n_f32): Remove.
32410 (__arm_vdupq_x_n_f16): Remove.
32411 (__arm_vdupq_x_n_f32): Remove.
32412 (__arm_vdupq_n): Remove.
32413 (__arm_vdupq_m): Remove.
32415 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32417 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
32418 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
32420 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32422 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
32423 (MVE_FP_N_VDUPQ_ONLY): New.
32424 (mve_insn): Add vdupq.
32425 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
32426 (@mve_<mve_insn>q_n_f<mode>): ... this.
32427 (mve_vdupq_n_<supf><mode>): Rename into ...
32428 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32429 (mve_vdupq_m_n_<supf><mode>): Rename into ...
32430 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32431 (mve_vdupq_m_n_f<mode>): Rename into ...
32432 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
32434 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32436 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
32438 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
32440 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
32442 * config/arm/arm_mve.h (vrev16q): Remove.
32445 (vrev64q_m): Remove.
32446 (vrev16q_m): Remove.
32447 (vrev32q_m): Remove.
32448 (vrev16q_x): Remove.
32449 (vrev32q_x): Remove.
32450 (vrev64q_x): Remove.
32451 (vrev64q_f16): Remove.
32452 (vrev64q_f32): Remove.
32453 (vrev32q_f16): Remove.
32454 (vrev16q_s8): Remove.
32455 (vrev32q_s8): Remove.
32456 (vrev32q_s16): Remove.
32457 (vrev64q_s8): Remove.
32458 (vrev64q_s16): Remove.
32459 (vrev64q_s32): Remove.
32460 (vrev64q_u8): Remove.
32461 (vrev64q_u16): Remove.
32462 (vrev64q_u32): Remove.
32463 (vrev32q_u8): Remove.
32464 (vrev32q_u16): Remove.
32465 (vrev16q_u8): Remove.
32466 (vrev64q_m_u8): Remove.
32467 (vrev64q_m_s8): Remove.
32468 (vrev64q_m_u16): Remove.
32469 (vrev64q_m_s16): Remove.
32470 (vrev64q_m_u32): Remove.
32471 (vrev64q_m_s32): Remove.
32472 (vrev16q_m_s8): Remove.
32473 (vrev32q_m_f16): Remove.
32474 (vrev16q_m_u8): Remove.
32475 (vrev32q_m_s8): Remove.
32476 (vrev64q_m_f16): Remove.
32477 (vrev32q_m_u8): Remove.
32478 (vrev32q_m_s16): Remove.
32479 (vrev64q_m_f32): Remove.
32480 (vrev32q_m_u16): Remove.
32481 (vrev16q_x_s8): Remove.
32482 (vrev16q_x_u8): Remove.
32483 (vrev32q_x_s8): Remove.
32484 (vrev32q_x_s16): Remove.
32485 (vrev32q_x_u8): Remove.
32486 (vrev32q_x_u16): Remove.
32487 (vrev64q_x_s8): Remove.
32488 (vrev64q_x_s16): Remove.
32489 (vrev64q_x_s32): Remove.
32490 (vrev64q_x_u8): Remove.
32491 (vrev64q_x_u16): Remove.
32492 (vrev64q_x_u32): Remove.
32493 (vrev32q_x_f16): Remove.
32494 (vrev64q_x_f16): Remove.
32495 (vrev64q_x_f32): Remove.
32496 (__arm_vrev16q_s8): Remove.
32497 (__arm_vrev32q_s8): Remove.
32498 (__arm_vrev32q_s16): Remove.
32499 (__arm_vrev64q_s8): Remove.
32500 (__arm_vrev64q_s16): Remove.
32501 (__arm_vrev64q_s32): Remove.
32502 (__arm_vrev64q_u8): Remove.
32503 (__arm_vrev64q_u16): Remove.
32504 (__arm_vrev64q_u32): Remove.
32505 (__arm_vrev32q_u8): Remove.
32506 (__arm_vrev32q_u16): Remove.
32507 (__arm_vrev16q_u8): Remove.
32508 (__arm_vrev64q_m_u8): Remove.
32509 (__arm_vrev64q_m_s8): Remove.
32510 (__arm_vrev64q_m_u16): Remove.
32511 (__arm_vrev64q_m_s16): Remove.
32512 (__arm_vrev64q_m_u32): Remove.
32513 (__arm_vrev64q_m_s32): Remove.
32514 (__arm_vrev16q_m_s8): Remove.
32515 (__arm_vrev16q_m_u8): Remove.
32516 (__arm_vrev32q_m_s8): Remove.
32517 (__arm_vrev32q_m_u8): Remove.
32518 (__arm_vrev32q_m_s16): Remove.
32519 (__arm_vrev32q_m_u16): Remove.
32520 (__arm_vrev16q_x_s8): Remove.
32521 (__arm_vrev16q_x_u8): Remove.
32522 (__arm_vrev32q_x_s8): Remove.
32523 (__arm_vrev32q_x_s16): Remove.
32524 (__arm_vrev32q_x_u8): Remove.
32525 (__arm_vrev32q_x_u16): Remove.
32526 (__arm_vrev64q_x_s8): Remove.
32527 (__arm_vrev64q_x_s16): Remove.
32528 (__arm_vrev64q_x_s32): Remove.
32529 (__arm_vrev64q_x_u8): Remove.
32530 (__arm_vrev64q_x_u16): Remove.
32531 (__arm_vrev64q_x_u32): Remove.
32532 (__arm_vrev64q_f16): Remove.
32533 (__arm_vrev64q_f32): Remove.
32534 (__arm_vrev32q_f16): Remove.
32535 (__arm_vrev32q_m_f16): Remove.
32536 (__arm_vrev64q_m_f16): Remove.
32537 (__arm_vrev64q_m_f32): Remove.
32538 (__arm_vrev32q_x_f16): Remove.
32539 (__arm_vrev64q_x_f16): Remove.
32540 (__arm_vrev64q_x_f32): Remove.
32541 (__arm_vrev16q): Remove.
32542 (__arm_vrev32q): Remove.
32543 (__arm_vrev64q): Remove.
32544 (__arm_vrev64q_m): Remove.
32545 (__arm_vrev16q_m): Remove.
32546 (__arm_vrev32q_m): Remove.
32547 (__arm_vrev16q_x): Remove.
32548 (__arm_vrev32q_x): Remove.
32549 (__arm_vrev64q_x): Remove.
32551 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32553 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
32554 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
32555 (MVE_FP_M_VREV32Q_ONLY): New iterators.
32556 (mve_insn): Add vrev16q, vrev32q, vrev64q.
32557 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
32558 (@mve_<mve_insn>q_f<mode>): ... this
32559 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
32560 (mve_vrev64q_<supf><mode>): Rename into ...
32561 (@mve_<mve_insn>q_<supf><mode>): ... this.
32562 (mve_vrev32q_<supf><mode>): Rename into
32563 @mve_<mve_insn>q_<supf><mode>.
32564 (mve_vrev16q_<supf>v16qi): Rename into
32565 @mve_<mve_insn>q_<supf><mode>.
32566 (mve_vrev64q_m_<supf><mode>): Rename into
32567 @mve_<mve_insn>q_m_<supf><mode>.
32568 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
32569 (mve_vrev32q_m_<supf><mode>): Rename into
32570 @mve_<mve_insn>q_m_<supf><mode>.
32571 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
32572 (mve_vrev16q_m_<supf>v16qi): Rename into
32573 @mve_<mve_insn>q_m_<supf><mode>.
32575 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32577 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
32578 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
32579 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
32580 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
32581 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
32582 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
32583 * config/arm/arm-mve-builtins-functions.h (class
32584 unspec_based_mve_function_exact_insn_vcmp): New.
32585 * config/arm/arm-mve-builtins.cc
32586 (function_instance::has_inactive_argument): Handle vcmp.
32587 * config/arm/arm_mve.h (vcmpneq): Remove.
32595 (vcmpneq_m): Remove.
32596 (vcmphiq_m): Remove.
32597 (vcmpeqq_m): Remove.
32598 (vcmpcsq_m): Remove.
32599 (vcmpcsq_m_n): Remove.
32600 (vcmpltq_m): Remove.
32601 (vcmpleq_m): Remove.
32602 (vcmpgtq_m): Remove.
32603 (vcmpgeq_m): Remove.
32604 (vcmpneq_s8): Remove.
32605 (vcmpneq_s16): Remove.
32606 (vcmpneq_s32): Remove.
32607 (vcmpneq_u8): Remove.
32608 (vcmpneq_u16): Remove.
32609 (vcmpneq_u32): Remove.
32610 (vcmpneq_n_u8): Remove.
32611 (vcmphiq_u8): Remove.
32612 (vcmphiq_n_u8): Remove.
32613 (vcmpeqq_u8): Remove.
32614 (vcmpeqq_n_u8): Remove.
32615 (vcmpcsq_u8): Remove.
32616 (vcmpcsq_n_u8): Remove.
32617 (vcmpneq_n_s8): Remove.
32618 (vcmpltq_s8): Remove.
32619 (vcmpltq_n_s8): Remove.
32620 (vcmpleq_s8): Remove.
32621 (vcmpleq_n_s8): Remove.
32622 (vcmpgtq_s8): Remove.
32623 (vcmpgtq_n_s8): Remove.
32624 (vcmpgeq_s8): Remove.
32625 (vcmpgeq_n_s8): Remove.
32626 (vcmpeqq_s8): Remove.
32627 (vcmpeqq_n_s8): Remove.
32628 (vcmpneq_n_u16): Remove.
32629 (vcmphiq_u16): Remove.
32630 (vcmphiq_n_u16): Remove.
32631 (vcmpeqq_u16): Remove.
32632 (vcmpeqq_n_u16): Remove.
32633 (vcmpcsq_u16): Remove.
32634 (vcmpcsq_n_u16): Remove.
32635 (vcmpneq_n_s16): Remove.
32636 (vcmpltq_s16): Remove.
32637 (vcmpltq_n_s16): Remove.
32638 (vcmpleq_s16): Remove.
32639 (vcmpleq_n_s16): Remove.
32640 (vcmpgtq_s16): Remove.
32641 (vcmpgtq_n_s16): Remove.
32642 (vcmpgeq_s16): Remove.
32643 (vcmpgeq_n_s16): Remove.
32644 (vcmpeqq_s16): Remove.
32645 (vcmpeqq_n_s16): Remove.
32646 (vcmpneq_n_u32): Remove.
32647 (vcmphiq_u32): Remove.
32648 (vcmphiq_n_u32): Remove.
32649 (vcmpeqq_u32): Remove.
32650 (vcmpeqq_n_u32): Remove.
32651 (vcmpcsq_u32): Remove.
32652 (vcmpcsq_n_u32): Remove.
32653 (vcmpneq_n_s32): Remove.
32654 (vcmpltq_s32): Remove.
32655 (vcmpltq_n_s32): Remove.
32656 (vcmpleq_s32): Remove.
32657 (vcmpleq_n_s32): Remove.
32658 (vcmpgtq_s32): Remove.
32659 (vcmpgtq_n_s32): Remove.
32660 (vcmpgeq_s32): Remove.
32661 (vcmpgeq_n_s32): Remove.
32662 (vcmpeqq_s32): Remove.
32663 (vcmpeqq_n_s32): Remove.
32664 (vcmpneq_n_f16): Remove.
32665 (vcmpneq_f16): Remove.
32666 (vcmpltq_n_f16): Remove.
32667 (vcmpltq_f16): Remove.
32668 (vcmpleq_n_f16): Remove.
32669 (vcmpleq_f16): Remove.
32670 (vcmpgtq_n_f16): Remove.
32671 (vcmpgtq_f16): Remove.
32672 (vcmpgeq_n_f16): Remove.
32673 (vcmpgeq_f16): Remove.
32674 (vcmpeqq_n_f16): Remove.
32675 (vcmpeqq_f16): Remove.
32676 (vcmpneq_n_f32): Remove.
32677 (vcmpneq_f32): Remove.
32678 (vcmpltq_n_f32): Remove.
32679 (vcmpltq_f32): Remove.
32680 (vcmpleq_n_f32): Remove.
32681 (vcmpleq_f32): Remove.
32682 (vcmpgtq_n_f32): Remove.
32683 (vcmpgtq_f32): Remove.
32684 (vcmpgeq_n_f32): Remove.
32685 (vcmpgeq_f32): Remove.
32686 (vcmpeqq_n_f32): Remove.
32687 (vcmpeqq_f32): Remove.
32688 (vcmpeqq_m_f16): Remove.
32689 (vcmpeqq_m_f32): Remove.
32690 (vcmpneq_m_u8): Remove.
32691 (vcmpneq_m_n_u8): Remove.
32692 (vcmphiq_m_u8): Remove.
32693 (vcmphiq_m_n_u8): Remove.
32694 (vcmpeqq_m_u8): Remove.
32695 (vcmpeqq_m_n_u8): Remove.
32696 (vcmpcsq_m_u8): Remove.
32697 (vcmpcsq_m_n_u8): Remove.
32698 (vcmpneq_m_s8): Remove.
32699 (vcmpneq_m_n_s8): Remove.
32700 (vcmpltq_m_s8): Remove.
32701 (vcmpltq_m_n_s8): Remove.
32702 (vcmpleq_m_s8): Remove.
32703 (vcmpleq_m_n_s8): Remove.
32704 (vcmpgtq_m_s8): Remove.
32705 (vcmpgtq_m_n_s8): Remove.
32706 (vcmpgeq_m_s8): Remove.
32707 (vcmpgeq_m_n_s8): Remove.
32708 (vcmpeqq_m_s8): Remove.
32709 (vcmpeqq_m_n_s8): Remove.
32710 (vcmpneq_m_u16): Remove.
32711 (vcmpneq_m_n_u16): Remove.
32712 (vcmphiq_m_u16): Remove.
32713 (vcmphiq_m_n_u16): Remove.
32714 (vcmpeqq_m_u16): Remove.
32715 (vcmpeqq_m_n_u16): Remove.
32716 (vcmpcsq_m_u16): Remove.
32717 (vcmpcsq_m_n_u16): Remove.
32718 (vcmpneq_m_s16): Remove.
32719 (vcmpneq_m_n_s16): Remove.
32720 (vcmpltq_m_s16): Remove.
32721 (vcmpltq_m_n_s16): Remove.
32722 (vcmpleq_m_s16): Remove.
32723 (vcmpleq_m_n_s16): Remove.
32724 (vcmpgtq_m_s16): Remove.
32725 (vcmpgtq_m_n_s16): Remove.
32726 (vcmpgeq_m_s16): Remove.
32727 (vcmpgeq_m_n_s16): Remove.
32728 (vcmpeqq_m_s16): Remove.
32729 (vcmpeqq_m_n_s16): Remove.
32730 (vcmpneq_m_u32): Remove.
32731 (vcmpneq_m_n_u32): Remove.
32732 (vcmphiq_m_u32): Remove.
32733 (vcmphiq_m_n_u32): Remove.
32734 (vcmpeqq_m_u32): Remove.
32735 (vcmpeqq_m_n_u32): Remove.
32736 (vcmpcsq_m_u32): Remove.
32737 (vcmpcsq_m_n_u32): Remove.
32738 (vcmpneq_m_s32): Remove.
32739 (vcmpneq_m_n_s32): Remove.
32740 (vcmpltq_m_s32): Remove.
32741 (vcmpltq_m_n_s32): Remove.
32742 (vcmpleq_m_s32): Remove.
32743 (vcmpleq_m_n_s32): Remove.
32744 (vcmpgtq_m_s32): Remove.
32745 (vcmpgtq_m_n_s32): Remove.
32746 (vcmpgeq_m_s32): Remove.
32747 (vcmpgeq_m_n_s32): Remove.
32748 (vcmpeqq_m_s32): Remove.
32749 (vcmpeqq_m_n_s32): Remove.
32750 (vcmpeqq_m_n_f16): Remove.
32751 (vcmpgeq_m_f16): Remove.
32752 (vcmpgeq_m_n_f16): Remove.
32753 (vcmpgtq_m_f16): Remove.
32754 (vcmpgtq_m_n_f16): Remove.
32755 (vcmpleq_m_f16): Remove.
32756 (vcmpleq_m_n_f16): Remove.
32757 (vcmpltq_m_f16): Remove.
32758 (vcmpltq_m_n_f16): Remove.
32759 (vcmpneq_m_f16): Remove.
32760 (vcmpneq_m_n_f16): Remove.
32761 (vcmpeqq_m_n_f32): Remove.
32762 (vcmpgeq_m_f32): Remove.
32763 (vcmpgeq_m_n_f32): Remove.
32764 (vcmpgtq_m_f32): Remove.
32765 (vcmpgtq_m_n_f32): Remove.
32766 (vcmpleq_m_f32): Remove.
32767 (vcmpleq_m_n_f32): Remove.
32768 (vcmpltq_m_f32): Remove.
32769 (vcmpltq_m_n_f32): Remove.
32770 (vcmpneq_m_f32): Remove.
32771 (vcmpneq_m_n_f32): Remove.
32772 (__arm_vcmpneq_s8): Remove.
32773 (__arm_vcmpneq_s16): Remove.
32774 (__arm_vcmpneq_s32): Remove.
32775 (__arm_vcmpneq_u8): Remove.
32776 (__arm_vcmpneq_u16): Remove.
32777 (__arm_vcmpneq_u32): Remove.
32778 (__arm_vcmpneq_n_u8): Remove.
32779 (__arm_vcmphiq_u8): Remove.
32780 (__arm_vcmphiq_n_u8): Remove.
32781 (__arm_vcmpeqq_u8): Remove.
32782 (__arm_vcmpeqq_n_u8): Remove.
32783 (__arm_vcmpcsq_u8): Remove.
32784 (__arm_vcmpcsq_n_u8): Remove.
32785 (__arm_vcmpneq_n_s8): Remove.
32786 (__arm_vcmpltq_s8): Remove.
32787 (__arm_vcmpltq_n_s8): Remove.
32788 (__arm_vcmpleq_s8): Remove.
32789 (__arm_vcmpleq_n_s8): Remove.
32790 (__arm_vcmpgtq_s8): Remove.
32791 (__arm_vcmpgtq_n_s8): Remove.
32792 (__arm_vcmpgeq_s8): Remove.
32793 (__arm_vcmpgeq_n_s8): Remove.
32794 (__arm_vcmpeqq_s8): Remove.
32795 (__arm_vcmpeqq_n_s8): Remove.
32796 (__arm_vcmpneq_n_u16): Remove.
32797 (__arm_vcmphiq_u16): Remove.
32798 (__arm_vcmphiq_n_u16): Remove.
32799 (__arm_vcmpeqq_u16): Remove.
32800 (__arm_vcmpeqq_n_u16): Remove.
32801 (__arm_vcmpcsq_u16): Remove.
32802 (__arm_vcmpcsq_n_u16): Remove.
32803 (__arm_vcmpneq_n_s16): Remove.
32804 (__arm_vcmpltq_s16): Remove.
32805 (__arm_vcmpltq_n_s16): Remove.
32806 (__arm_vcmpleq_s16): Remove.
32807 (__arm_vcmpleq_n_s16): Remove.
32808 (__arm_vcmpgtq_s16): Remove.
32809 (__arm_vcmpgtq_n_s16): Remove.
32810 (__arm_vcmpgeq_s16): Remove.
32811 (__arm_vcmpgeq_n_s16): Remove.
32812 (__arm_vcmpeqq_s16): Remove.
32813 (__arm_vcmpeqq_n_s16): Remove.
32814 (__arm_vcmpneq_n_u32): Remove.
32815 (__arm_vcmphiq_u32): Remove.
32816 (__arm_vcmphiq_n_u32): Remove.
32817 (__arm_vcmpeqq_u32): Remove.
32818 (__arm_vcmpeqq_n_u32): Remove.
32819 (__arm_vcmpcsq_u32): Remove.
32820 (__arm_vcmpcsq_n_u32): Remove.
32821 (__arm_vcmpneq_n_s32): Remove.
32822 (__arm_vcmpltq_s32): Remove.
32823 (__arm_vcmpltq_n_s32): Remove.
32824 (__arm_vcmpleq_s32): Remove.
32825 (__arm_vcmpleq_n_s32): Remove.
32826 (__arm_vcmpgtq_s32): Remove.
32827 (__arm_vcmpgtq_n_s32): Remove.
32828 (__arm_vcmpgeq_s32): Remove.
32829 (__arm_vcmpgeq_n_s32): Remove.
32830 (__arm_vcmpeqq_s32): Remove.
32831 (__arm_vcmpeqq_n_s32): Remove.
32832 (__arm_vcmpneq_m_u8): Remove.
32833 (__arm_vcmpneq_m_n_u8): Remove.
32834 (__arm_vcmphiq_m_u8): Remove.
32835 (__arm_vcmphiq_m_n_u8): Remove.
32836 (__arm_vcmpeqq_m_u8): Remove.
32837 (__arm_vcmpeqq_m_n_u8): Remove.
32838 (__arm_vcmpcsq_m_u8): Remove.
32839 (__arm_vcmpcsq_m_n_u8): Remove.
32840 (__arm_vcmpneq_m_s8): Remove.
32841 (__arm_vcmpneq_m_n_s8): Remove.
32842 (__arm_vcmpltq_m_s8): Remove.
32843 (__arm_vcmpltq_m_n_s8): Remove.
32844 (__arm_vcmpleq_m_s8): Remove.
32845 (__arm_vcmpleq_m_n_s8): Remove.
32846 (__arm_vcmpgtq_m_s8): Remove.
32847 (__arm_vcmpgtq_m_n_s8): Remove.
32848 (__arm_vcmpgeq_m_s8): Remove.
32849 (__arm_vcmpgeq_m_n_s8): Remove.
32850 (__arm_vcmpeqq_m_s8): Remove.
32851 (__arm_vcmpeqq_m_n_s8): Remove.
32852 (__arm_vcmpneq_m_u16): Remove.
32853 (__arm_vcmpneq_m_n_u16): Remove.
32854 (__arm_vcmphiq_m_u16): Remove.
32855 (__arm_vcmphiq_m_n_u16): Remove.
32856 (__arm_vcmpeqq_m_u16): Remove.
32857 (__arm_vcmpeqq_m_n_u16): Remove.
32858 (__arm_vcmpcsq_m_u16): Remove.
32859 (__arm_vcmpcsq_m_n_u16): Remove.
32860 (__arm_vcmpneq_m_s16): Remove.
32861 (__arm_vcmpneq_m_n_s16): Remove.
32862 (__arm_vcmpltq_m_s16): Remove.
32863 (__arm_vcmpltq_m_n_s16): Remove.
32864 (__arm_vcmpleq_m_s16): Remove.
32865 (__arm_vcmpleq_m_n_s16): Remove.
32866 (__arm_vcmpgtq_m_s16): Remove.
32867 (__arm_vcmpgtq_m_n_s16): Remove.
32868 (__arm_vcmpgeq_m_s16): Remove.
32869 (__arm_vcmpgeq_m_n_s16): Remove.
32870 (__arm_vcmpeqq_m_s16): Remove.
32871 (__arm_vcmpeqq_m_n_s16): Remove.
32872 (__arm_vcmpneq_m_u32): Remove.
32873 (__arm_vcmpneq_m_n_u32): Remove.
32874 (__arm_vcmphiq_m_u32): Remove.
32875 (__arm_vcmphiq_m_n_u32): Remove.
32876 (__arm_vcmpeqq_m_u32): Remove.
32877 (__arm_vcmpeqq_m_n_u32): Remove.
32878 (__arm_vcmpcsq_m_u32): Remove.
32879 (__arm_vcmpcsq_m_n_u32): Remove.
32880 (__arm_vcmpneq_m_s32): Remove.
32881 (__arm_vcmpneq_m_n_s32): Remove.
32882 (__arm_vcmpltq_m_s32): Remove.
32883 (__arm_vcmpltq_m_n_s32): Remove.
32884 (__arm_vcmpleq_m_s32): Remove.
32885 (__arm_vcmpleq_m_n_s32): Remove.
32886 (__arm_vcmpgtq_m_s32): Remove.
32887 (__arm_vcmpgtq_m_n_s32): Remove.
32888 (__arm_vcmpgeq_m_s32): Remove.
32889 (__arm_vcmpgeq_m_n_s32): Remove.
32890 (__arm_vcmpeqq_m_s32): Remove.
32891 (__arm_vcmpeqq_m_n_s32): Remove.
32892 (__arm_vcmpneq_n_f16): Remove.
32893 (__arm_vcmpneq_f16): Remove.
32894 (__arm_vcmpltq_n_f16): Remove.
32895 (__arm_vcmpltq_f16): Remove.
32896 (__arm_vcmpleq_n_f16): Remove.
32897 (__arm_vcmpleq_f16): Remove.
32898 (__arm_vcmpgtq_n_f16): Remove.
32899 (__arm_vcmpgtq_f16): Remove.
32900 (__arm_vcmpgeq_n_f16): Remove.
32901 (__arm_vcmpgeq_f16): Remove.
32902 (__arm_vcmpeqq_n_f16): Remove.
32903 (__arm_vcmpeqq_f16): Remove.
32904 (__arm_vcmpneq_n_f32): Remove.
32905 (__arm_vcmpneq_f32): Remove.
32906 (__arm_vcmpltq_n_f32): Remove.
32907 (__arm_vcmpltq_f32): Remove.
32908 (__arm_vcmpleq_n_f32): Remove.
32909 (__arm_vcmpleq_f32): Remove.
32910 (__arm_vcmpgtq_n_f32): Remove.
32911 (__arm_vcmpgtq_f32): Remove.
32912 (__arm_vcmpgeq_n_f32): Remove.
32913 (__arm_vcmpgeq_f32): Remove.
32914 (__arm_vcmpeqq_n_f32): Remove.
32915 (__arm_vcmpeqq_f32): Remove.
32916 (__arm_vcmpeqq_m_f16): Remove.
32917 (__arm_vcmpeqq_m_f32): Remove.
32918 (__arm_vcmpeqq_m_n_f16): Remove.
32919 (__arm_vcmpgeq_m_f16): Remove.
32920 (__arm_vcmpgeq_m_n_f16): Remove.
32921 (__arm_vcmpgtq_m_f16): Remove.
32922 (__arm_vcmpgtq_m_n_f16): Remove.
32923 (__arm_vcmpleq_m_f16): Remove.
32924 (__arm_vcmpleq_m_n_f16): Remove.
32925 (__arm_vcmpltq_m_f16): Remove.
32926 (__arm_vcmpltq_m_n_f16): Remove.
32927 (__arm_vcmpneq_m_f16): Remove.
32928 (__arm_vcmpneq_m_n_f16): Remove.
32929 (__arm_vcmpeqq_m_n_f32): Remove.
32930 (__arm_vcmpgeq_m_f32): Remove.
32931 (__arm_vcmpgeq_m_n_f32): Remove.
32932 (__arm_vcmpgtq_m_f32): Remove.
32933 (__arm_vcmpgtq_m_n_f32): Remove.
32934 (__arm_vcmpleq_m_f32): Remove.
32935 (__arm_vcmpleq_m_n_f32): Remove.
32936 (__arm_vcmpltq_m_f32): Remove.
32937 (__arm_vcmpltq_m_n_f32): Remove.
32938 (__arm_vcmpneq_m_f32): Remove.
32939 (__arm_vcmpneq_m_n_f32): Remove.
32940 (__arm_vcmpneq): Remove.
32941 (__arm_vcmphiq): Remove.
32942 (__arm_vcmpeqq): Remove.
32943 (__arm_vcmpcsq): Remove.
32944 (__arm_vcmpltq): Remove.
32945 (__arm_vcmpleq): Remove.
32946 (__arm_vcmpgtq): Remove.
32947 (__arm_vcmpgeq): Remove.
32948 (__arm_vcmpneq_m): Remove.
32949 (__arm_vcmphiq_m): Remove.
32950 (__arm_vcmpeqq_m): Remove.
32951 (__arm_vcmpcsq_m): Remove.
32952 (__arm_vcmpltq_m): Remove.
32953 (__arm_vcmpleq_m): Remove.
32954 (__arm_vcmpgtq_m): Remove.
32955 (__arm_vcmpgeq_m): Remove.
32957 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32959 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
32960 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
32962 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32964 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
32965 (MVE_CMP_M_N_F, mve_cmp_op1): New.
32968 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
32969 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
32970 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
32971 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
32972 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
32973 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
32974 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
32975 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
32976 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
32977 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
32979 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
32980 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
32981 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
32982 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
32983 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
32985 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
32986 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
32987 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
32988 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
32989 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
32991 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
32993 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
32994 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
32995 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
32998 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
33000 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
33001 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
33002 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
33003 Simplify parity(rotate(x,y)) as parity(x).
33005 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33007 * config/riscv/autovec.md (@vec_series<mode>): New pattern
33008 * config/riscv/riscv-protos.h (expand_vec_series): New function.
33009 * config/riscv/riscv-v.cc (emit_binop): Ditto.
33010 (emit_index_op): Ditto.
33011 (expand_vec_series): Ditto.
33012 (expand_const_vector): Add series vector handling.
33013 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
33015 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
33017 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
33018 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
33019 (*concat<mode><dwi>3_2): Likewise.
33020 (*concat<mode><dwi>3_3): Likewise.
33021 (*concat<mode><dwi>3_4): Likewise.
33022 (*concat<mode><dwi>3_5): Likewise.
33023 (*concat<mode><dwi>3_6): Likewise.
33024 (*concat<mode><dwi>3_7): Likewise.
33026 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
33029 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
33030 (<insn>v4qiv4hi2): New expander.
33031 (<insn>v2hiv2si2): Ditto.
33032 (<insn>v2qiv2si2): Ditto.
33033 (<insn>v2qiv2hi2): Ditto.
33035 2023-05-10 Jeff Law <jlaw@ventanamicro>
33037 * config/h8300/constraints.md (Q): Make this a special memory
33041 2023-05-10 Jakub Jelinek <jakub@redhat.com>
33044 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
33045 if t is void_list_node.
33047 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33049 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
33050 (aarch64_sqmovun<mode>_insn_be): Delete.
33051 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
33052 (aarch64_sqmovun<mode>): Delete expander.
33054 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33057 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
33059 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
33060 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
33061 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
33063 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33066 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
33068 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
33069 (aarch64_<sur>qadd<mode>): Rename to...
33070 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
33072 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33074 * config/aarch64/aarch64-simd.md
33075 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
33076 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
33077 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
33078 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
33080 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33083 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
33084 (aarch64_xtn<mode>_insn_be): Likewise.
33085 (trunc<mode><Vnarrowq>2): Rename to...
33086 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
33087 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
33088 (aarch64_<su>qmovn<mode>): Likewise.
33089 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
33090 (aarch64_<su>qmovn<mode>_insn_le): Delete.
33091 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
33093 2023-05-10 Li Xu <xuli1@eswincomputing.com>
33095 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
33096 intruction replace null avl with (const_int 0).
33098 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33100 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
33103 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33106 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
33107 (source_equal_p): Fix dead loop in vsetvl avl checking.
33109 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
33111 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
33112 of modeadjusted_dccr.
33114 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33116 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
33117 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
33118 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
33119 * config/arm/arm-mve-builtins.cc
33120 (function_instance::has_inactive_argument): Handle vmaxaq and
33122 * config/arm/arm_mve.h (vminaq): Remove.
33124 (vminaq_m): Remove.
33125 (vmaxaq_m): Remove.
33126 (vminaq_s8): Remove.
33127 (vmaxaq_s8): Remove.
33128 (vminaq_s16): Remove.
33129 (vmaxaq_s16): Remove.
33130 (vminaq_s32): Remove.
33131 (vmaxaq_s32): Remove.
33132 (vminaq_m_s8): Remove.
33133 (vmaxaq_m_s8): Remove.
33134 (vminaq_m_s16): Remove.
33135 (vmaxaq_m_s16): Remove.
33136 (vminaq_m_s32): Remove.
33137 (vmaxaq_m_s32): Remove.
33138 (__arm_vminaq_s8): Remove.
33139 (__arm_vmaxaq_s8): Remove.
33140 (__arm_vminaq_s16): Remove.
33141 (__arm_vmaxaq_s16): Remove.
33142 (__arm_vminaq_s32): Remove.
33143 (__arm_vmaxaq_s32): Remove.
33144 (__arm_vminaq_m_s8): Remove.
33145 (__arm_vmaxaq_m_s8): Remove.
33146 (__arm_vminaq_m_s16): Remove.
33147 (__arm_vmaxaq_m_s16): Remove.
33148 (__arm_vminaq_m_s32): Remove.
33149 (__arm_vmaxaq_m_s32): Remove.
33150 (__arm_vminaq): Remove.
33151 (__arm_vmaxaq): Remove.
33152 (__arm_vminaq_m): Remove.
33153 (__arm_vmaxaq_m): Remove.
33155 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33157 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
33159 (mve_insn): Add vmaxa, vmina.
33160 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
33161 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
33163 (@mve_<mve_insn>q_<supf><mode>): ... this.
33164 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
33165 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
33167 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33169 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
33170 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
33172 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33174 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
33175 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
33176 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
33177 * config/arm/arm-mve-builtins.cc
33178 (function_instance::has_inactive_argument): Handle vmaxnmaq and
33180 * config/arm/arm_mve.h (vminnmaq): Remove.
33181 (vmaxnmaq): Remove.
33182 (vmaxnmaq_m): Remove.
33183 (vminnmaq_m): Remove.
33184 (vminnmaq_f16): Remove.
33185 (vmaxnmaq_f16): Remove.
33186 (vminnmaq_f32): Remove.
33187 (vmaxnmaq_f32): Remove.
33188 (vmaxnmaq_m_f16): Remove.
33189 (vminnmaq_m_f16): Remove.
33190 (vmaxnmaq_m_f32): Remove.
33191 (vminnmaq_m_f32): Remove.
33192 (__arm_vminnmaq_f16): Remove.
33193 (__arm_vmaxnmaq_f16): Remove.
33194 (__arm_vminnmaq_f32): Remove.
33195 (__arm_vmaxnmaq_f32): Remove.
33196 (__arm_vmaxnmaq_m_f16): Remove.
33197 (__arm_vminnmaq_m_f16): Remove.
33198 (__arm_vmaxnmaq_m_f32): Remove.
33199 (__arm_vminnmaq_m_f32): Remove.
33200 (__arm_vminnmaq): Remove.
33201 (__arm_vmaxnmaq): Remove.
33202 (__arm_vmaxnmaq_m): Remove.
33203 (__arm_vminnmaq_m): Remove.
33205 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33207 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
33208 (MVE_VMAXNMA_VMINNMAQ_M): New.
33209 (mve_insn): Add vmaxnma, vminnma.
33210 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
33212 (@mve_<mve_insn>q_f<mode>): ... this.
33213 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
33214 (@mve_<mve_insn>q_m_f<mode>): ... this.
33216 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33218 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
33219 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
33220 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
33221 (vminnmavq, vminnmvq): New.
33222 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
33223 (vminnmavq, vminnmvq): New.
33224 * config/arm/arm_mve.h (vminnmvq): Remove.
33225 (vminnmavq): Remove.
33226 (vmaxnmvq): Remove.
33227 (vmaxnmavq): Remove.
33228 (vmaxnmavq_p): Remove.
33229 (vmaxnmvq_p): Remove.
33230 (vminnmavq_p): Remove.
33231 (vminnmvq_p): Remove.
33232 (vminnmvq_f16): Remove.
33233 (vminnmavq_f16): Remove.
33234 (vmaxnmvq_f16): Remove.
33235 (vmaxnmavq_f16): Remove.
33236 (vminnmvq_f32): Remove.
33237 (vminnmavq_f32): Remove.
33238 (vmaxnmvq_f32): Remove.
33239 (vmaxnmavq_f32): Remove.
33240 (vmaxnmavq_p_f16): Remove.
33241 (vmaxnmvq_p_f16): Remove.
33242 (vminnmavq_p_f16): Remove.
33243 (vminnmvq_p_f16): Remove.
33244 (vmaxnmavq_p_f32): Remove.
33245 (vmaxnmvq_p_f32): Remove.
33246 (vminnmavq_p_f32): Remove.
33247 (vminnmvq_p_f32): Remove.
33248 (__arm_vminnmvq_f16): Remove.
33249 (__arm_vminnmavq_f16): Remove.
33250 (__arm_vmaxnmvq_f16): Remove.
33251 (__arm_vmaxnmavq_f16): Remove.
33252 (__arm_vminnmvq_f32): Remove.
33253 (__arm_vminnmavq_f32): Remove.
33254 (__arm_vmaxnmvq_f32): Remove.
33255 (__arm_vmaxnmavq_f32): Remove.
33256 (__arm_vmaxnmavq_p_f16): Remove.
33257 (__arm_vmaxnmvq_p_f16): Remove.
33258 (__arm_vminnmavq_p_f16): Remove.
33259 (__arm_vminnmvq_p_f16): Remove.
33260 (__arm_vmaxnmavq_p_f32): Remove.
33261 (__arm_vmaxnmvq_p_f32): Remove.
33262 (__arm_vminnmavq_p_f32): Remove.
33263 (__arm_vminnmvq_p_f32): Remove.
33264 (__arm_vminnmvq): Remove.
33265 (__arm_vminnmavq): Remove.
33266 (__arm_vmaxnmvq): Remove.
33267 (__arm_vmaxnmavq): Remove.
33268 (__arm_vmaxnmavq_p): Remove.
33269 (__arm_vmaxnmvq_p): Remove.
33270 (__arm_vminnmavq_p): Remove.
33271 (__arm_vminnmvq_p): Remove.
33272 (__arm_vmaxnmavq_m): Remove.
33273 (__arm_vmaxnmvq_m): Remove.
33275 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33277 * config/arm/arm-mve-builtins-functions.h
33278 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
33280 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33282 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
33283 (MVE_VMAXNMxV_MINNMxVQ_P): New.
33284 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
33285 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
33286 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
33287 (@mve_<mve_insn>q_f<mode>): ... this.
33288 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
33289 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
33290 (@mve_<mve_insn>q_p_f<mode>): ... this.
33292 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33294 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
33295 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
33296 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
33297 * config/arm/arm_mve.h (vminnmq): Remove.
33299 (vmaxnmq_m): Remove.
33300 (vminnmq_m): Remove.
33301 (vminnmq_x): Remove.
33302 (vmaxnmq_x): Remove.
33303 (vminnmq_f16): Remove.
33304 (vmaxnmq_f16): Remove.
33305 (vminnmq_f32): Remove.
33306 (vmaxnmq_f32): Remove.
33307 (vmaxnmq_m_f32): Remove.
33308 (vmaxnmq_m_f16): Remove.
33309 (vminnmq_m_f32): Remove.
33310 (vminnmq_m_f16): Remove.
33311 (vminnmq_x_f16): Remove.
33312 (vminnmq_x_f32): Remove.
33313 (vmaxnmq_x_f16): Remove.
33314 (vmaxnmq_x_f32): Remove.
33315 (__arm_vminnmq_f16): Remove.
33316 (__arm_vmaxnmq_f16): Remove.
33317 (__arm_vminnmq_f32): Remove.
33318 (__arm_vmaxnmq_f32): Remove.
33319 (__arm_vmaxnmq_m_f32): Remove.
33320 (__arm_vmaxnmq_m_f16): Remove.
33321 (__arm_vminnmq_m_f32): Remove.
33322 (__arm_vminnmq_m_f16): Remove.
33323 (__arm_vminnmq_x_f16): Remove.
33324 (__arm_vminnmq_x_f32): Remove.
33325 (__arm_vmaxnmq_x_f16): Remove.
33326 (__arm_vmaxnmq_x_f32): Remove.
33327 (__arm_vminnmq): Remove.
33328 (__arm_vmaxnmq): Remove.
33329 (__arm_vmaxnmq_m): Remove.
33330 (__arm_vminnmq_m): Remove.
33331 (__arm_vminnmq_x): Remove.
33332 (__arm_vmaxnmq_x): Remove.
33334 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33336 * config/arm/iterators.md (MAX_MIN_F): New.
33337 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
33338 (mve_insn): Add vmaxnm, vminnm.
33339 (max_min_f_str): New.
33340 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
33342 (@mve_<max_min_f_str>q_f<mode>): ... this.
33343 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
33344 (@mve_<mve_insn>q_m_f<mode>): ... this.
33346 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33348 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
33349 (smax<mode>3): Likewise.
33351 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33353 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
33354 (FUNCTION_PRED_P_S): New.
33355 (vmaxavq, vminavq, vmaxvq, vminvq): New.
33356 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
33358 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
33360 * config/arm/arm_mve.h (vminvq): Remove.
33362 (vminvq_p): Remove.
33363 (vmaxvq_p): Remove.
33364 (vminvq_u8): Remove.
33365 (vmaxvq_u8): Remove.
33366 (vminvq_s8): Remove.
33367 (vmaxvq_s8): Remove.
33368 (vminvq_u16): Remove.
33369 (vmaxvq_u16): Remove.
33370 (vminvq_s16): Remove.
33371 (vmaxvq_s16): Remove.
33372 (vminvq_u32): Remove.
33373 (vmaxvq_u32): Remove.
33374 (vminvq_s32): Remove.
33375 (vmaxvq_s32): Remove.
33376 (vminvq_p_u8): Remove.
33377 (vmaxvq_p_u8): Remove.
33378 (vminvq_p_s8): Remove.
33379 (vmaxvq_p_s8): Remove.
33380 (vminvq_p_u16): Remove.
33381 (vmaxvq_p_u16): Remove.
33382 (vminvq_p_s16): Remove.
33383 (vmaxvq_p_s16): Remove.
33384 (vminvq_p_u32): Remove.
33385 (vmaxvq_p_u32): Remove.
33386 (vminvq_p_s32): Remove.
33387 (vmaxvq_p_s32): Remove.
33388 (__arm_vminvq_u8): Remove.
33389 (__arm_vmaxvq_u8): Remove.
33390 (__arm_vminvq_s8): Remove.
33391 (__arm_vmaxvq_s8): Remove.
33392 (__arm_vminvq_u16): Remove.
33393 (__arm_vmaxvq_u16): Remove.
33394 (__arm_vminvq_s16): Remove.
33395 (__arm_vmaxvq_s16): Remove.
33396 (__arm_vminvq_u32): Remove.
33397 (__arm_vmaxvq_u32): Remove.
33398 (__arm_vminvq_s32): Remove.
33399 (__arm_vmaxvq_s32): Remove.
33400 (__arm_vminvq_p_u8): Remove.
33401 (__arm_vmaxvq_p_u8): Remove.
33402 (__arm_vminvq_p_s8): Remove.
33403 (__arm_vmaxvq_p_s8): Remove.
33404 (__arm_vminvq_p_u16): Remove.
33405 (__arm_vmaxvq_p_u16): Remove.
33406 (__arm_vminvq_p_s16): Remove.
33407 (__arm_vmaxvq_p_s16): Remove.
33408 (__arm_vminvq_p_u32): Remove.
33409 (__arm_vmaxvq_p_u32): Remove.
33410 (__arm_vminvq_p_s32): Remove.
33411 (__arm_vmaxvq_p_s32): Remove.
33412 (__arm_vminvq): Remove.
33413 (__arm_vmaxvq): Remove.
33414 (__arm_vminvq_p): Remove.
33415 (__arm_vmaxvq_p): Remove.
33418 (vminavq_p): Remove.
33419 (vmaxavq_p): Remove.
33420 (vminavq_s8): Remove.
33421 (vmaxavq_s8): Remove.
33422 (vminavq_s16): Remove.
33423 (vmaxavq_s16): Remove.
33424 (vminavq_s32): Remove.
33425 (vmaxavq_s32): Remove.
33426 (vminavq_p_s8): Remove.
33427 (vmaxavq_p_s8): Remove.
33428 (vminavq_p_s16): Remove.
33429 (vmaxavq_p_s16): Remove.
33430 (vminavq_p_s32): Remove.
33431 (vmaxavq_p_s32): Remove.
33432 (__arm_vminavq_s8): Remove.
33433 (__arm_vmaxavq_s8): Remove.
33434 (__arm_vminavq_s16): Remove.
33435 (__arm_vmaxavq_s16): Remove.
33436 (__arm_vminavq_s32): Remove.
33437 (__arm_vmaxavq_s32): Remove.
33438 (__arm_vminavq_p_s8): Remove.
33439 (__arm_vmaxavq_p_s8): Remove.
33440 (__arm_vminavq_p_s16): Remove.
33441 (__arm_vmaxavq_p_s16): Remove.
33442 (__arm_vminavq_p_s32): Remove.
33443 (__arm_vmaxavq_p_s32): Remove.
33444 (__arm_vminavq): Remove.
33445 (__arm_vmaxavq): Remove.
33446 (__arm_vminavq_p): Remove.
33447 (__arm_vmaxavq_p): Remove.
33449 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33451 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
33452 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
33453 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
33454 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
33455 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
33456 (@mve_<mve_insn>q_<supf><mode>): ... this.
33457 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
33458 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
33459 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
33461 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33463 * config/arm/arm-mve-builtins-functions.h (class
33464 unspec_mve_function_exact_insn_pred_p): New.
33466 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33468 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
33469 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
33471 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33473 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
33474 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
33476 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
33478 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
33480 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
33481 (ADJUST_REG_ALLOC_ORDER): Likewise.
33482 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
33484 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
33485 Upa rather than Upl for unpredicated movprfx alternatives.
33487 2023-05-09 Jeff Law <jlaw@ventanamicro>
33489 * config/h8300/testcompare.md: Add peephole2 which uses a memory
33490 load to set flags, thus eliminating a compare against zero.
33492 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33494 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
33495 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
33496 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
33497 * config/arm/arm_mve.h (vshlltq): Remove.
33499 (vshllbq_m): Remove.
33500 (vshlltq_m): Remove.
33501 (vshllbq_x): Remove.
33502 (vshlltq_x): Remove.
33503 (vshlltq_n_u8): Remove.
33504 (vshllbq_n_u8): Remove.
33505 (vshlltq_n_s8): Remove.
33506 (vshllbq_n_s8): Remove.
33507 (vshlltq_n_u16): Remove.
33508 (vshllbq_n_u16): Remove.
33509 (vshlltq_n_s16): Remove.
33510 (vshllbq_n_s16): Remove.
33511 (vshllbq_m_n_s8): Remove.
33512 (vshllbq_m_n_s16): Remove.
33513 (vshllbq_m_n_u8): Remove.
33514 (vshllbq_m_n_u16): Remove.
33515 (vshlltq_m_n_s8): Remove.
33516 (vshlltq_m_n_s16): Remove.
33517 (vshlltq_m_n_u8): Remove.
33518 (vshlltq_m_n_u16): Remove.
33519 (vshllbq_x_n_s8): Remove.
33520 (vshllbq_x_n_s16): Remove.
33521 (vshllbq_x_n_u8): Remove.
33522 (vshllbq_x_n_u16): Remove.
33523 (vshlltq_x_n_s8): Remove.
33524 (vshlltq_x_n_s16): Remove.
33525 (vshlltq_x_n_u8): Remove.
33526 (vshlltq_x_n_u16): Remove.
33527 (__arm_vshlltq_n_u8): Remove.
33528 (__arm_vshllbq_n_u8): Remove.
33529 (__arm_vshlltq_n_s8): Remove.
33530 (__arm_vshllbq_n_s8): Remove.
33531 (__arm_vshlltq_n_u16): Remove.
33532 (__arm_vshllbq_n_u16): Remove.
33533 (__arm_vshlltq_n_s16): Remove.
33534 (__arm_vshllbq_n_s16): Remove.
33535 (__arm_vshllbq_m_n_s8): Remove.
33536 (__arm_vshllbq_m_n_s16): Remove.
33537 (__arm_vshllbq_m_n_u8): Remove.
33538 (__arm_vshllbq_m_n_u16): Remove.
33539 (__arm_vshlltq_m_n_s8): Remove.
33540 (__arm_vshlltq_m_n_s16): Remove.
33541 (__arm_vshlltq_m_n_u8): Remove.
33542 (__arm_vshlltq_m_n_u16): Remove.
33543 (__arm_vshllbq_x_n_s8): Remove.
33544 (__arm_vshllbq_x_n_s16): Remove.
33545 (__arm_vshllbq_x_n_u8): Remove.
33546 (__arm_vshllbq_x_n_u16): Remove.
33547 (__arm_vshlltq_x_n_s8): Remove.
33548 (__arm_vshlltq_x_n_s16): Remove.
33549 (__arm_vshlltq_x_n_u8): Remove.
33550 (__arm_vshlltq_x_n_u16): Remove.
33551 (__arm_vshlltq): Remove.
33552 (__arm_vshllbq): Remove.
33553 (__arm_vshllbq_m): Remove.
33554 (__arm_vshlltq_m): Remove.
33555 (__arm_vshllbq_x): Remove.
33556 (__arm_vshlltq_x): Remove.
33558 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33560 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
33561 (VSHLLBQ_N, VSHLLTQ_N): Remove.
33563 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
33564 (VSHLLxQ_M_N): New.
33565 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
33566 (mve_vshlltq_n_<supf><mode>): Merge into ...
33567 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
33568 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
33570 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
33572 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33574 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
33575 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
33577 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33579 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
33580 (vqmovntq, vqmovunbq, vqmovuntq): New.
33581 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
33582 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
33583 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
33584 (vqmovntq, vqmovunbq, vqmovuntq): New.
33585 * config/arm/arm-mve-builtins.cc
33586 (function_instance::has_inactive_argument): Handle vmovnbq,
33587 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
33588 * config/arm/arm_mve.h (vqmovntq): Remove.
33589 (vqmovnbq): Remove.
33590 (vqmovnbq_m): Remove.
33591 (vqmovntq_m): Remove.
33592 (vqmovntq_u16): Remove.
33593 (vqmovnbq_u16): Remove.
33594 (vqmovntq_s16): Remove.
33595 (vqmovnbq_s16): Remove.
33596 (vqmovntq_u32): Remove.
33597 (vqmovnbq_u32): Remove.
33598 (vqmovntq_s32): Remove.
33599 (vqmovnbq_s32): Remove.
33600 (vqmovnbq_m_s16): Remove.
33601 (vqmovntq_m_s16): Remove.
33602 (vqmovnbq_m_u16): Remove.
33603 (vqmovntq_m_u16): Remove.
33604 (vqmovnbq_m_s32): Remove.
33605 (vqmovntq_m_s32): Remove.
33606 (vqmovnbq_m_u32): Remove.
33607 (vqmovntq_m_u32): Remove.
33608 (__arm_vqmovntq_u16): Remove.
33609 (__arm_vqmovnbq_u16): Remove.
33610 (__arm_vqmovntq_s16): Remove.
33611 (__arm_vqmovnbq_s16): Remove.
33612 (__arm_vqmovntq_u32): Remove.
33613 (__arm_vqmovnbq_u32): Remove.
33614 (__arm_vqmovntq_s32): Remove.
33615 (__arm_vqmovnbq_s32): Remove.
33616 (__arm_vqmovnbq_m_s16): Remove.
33617 (__arm_vqmovntq_m_s16): Remove.
33618 (__arm_vqmovnbq_m_u16): Remove.
33619 (__arm_vqmovntq_m_u16): Remove.
33620 (__arm_vqmovnbq_m_s32): Remove.
33621 (__arm_vqmovntq_m_s32): Remove.
33622 (__arm_vqmovnbq_m_u32): Remove.
33623 (__arm_vqmovntq_m_u32): Remove.
33624 (__arm_vqmovntq): Remove.
33625 (__arm_vqmovnbq): Remove.
33626 (__arm_vqmovnbq_m): Remove.
33627 (__arm_vqmovntq_m): Remove.
33630 (vmovnbq_m): Remove.
33631 (vmovntq_m): Remove.
33632 (vmovntq_u16): Remove.
33633 (vmovnbq_u16): Remove.
33634 (vmovntq_s16): Remove.
33635 (vmovnbq_s16): Remove.
33636 (vmovntq_u32): Remove.
33637 (vmovnbq_u32): Remove.
33638 (vmovntq_s32): Remove.
33639 (vmovnbq_s32): Remove.
33640 (vmovnbq_m_s16): Remove.
33641 (vmovntq_m_s16): Remove.
33642 (vmovnbq_m_u16): Remove.
33643 (vmovntq_m_u16): Remove.
33644 (vmovnbq_m_s32): Remove.
33645 (vmovntq_m_s32): Remove.
33646 (vmovnbq_m_u32): Remove.
33647 (vmovntq_m_u32): Remove.
33648 (__arm_vmovntq_u16): Remove.
33649 (__arm_vmovnbq_u16): Remove.
33650 (__arm_vmovntq_s16): Remove.
33651 (__arm_vmovnbq_s16): Remove.
33652 (__arm_vmovntq_u32): Remove.
33653 (__arm_vmovnbq_u32): Remove.
33654 (__arm_vmovntq_s32): Remove.
33655 (__arm_vmovnbq_s32): Remove.
33656 (__arm_vmovnbq_m_s16): Remove.
33657 (__arm_vmovntq_m_s16): Remove.
33658 (__arm_vmovnbq_m_u16): Remove.
33659 (__arm_vmovntq_m_u16): Remove.
33660 (__arm_vmovnbq_m_s32): Remove.
33661 (__arm_vmovntq_m_s32): Remove.
33662 (__arm_vmovnbq_m_u32): Remove.
33663 (__arm_vmovntq_m_u32): Remove.
33664 (__arm_vmovntq): Remove.
33665 (__arm_vmovnbq): Remove.
33666 (__arm_vmovnbq_m): Remove.
33667 (__arm_vmovntq_m): Remove.
33668 (vqmovuntq): Remove.
33669 (vqmovunbq): Remove.
33670 (vqmovunbq_m): Remove.
33671 (vqmovuntq_m): Remove.
33672 (vqmovuntq_s16): Remove.
33673 (vqmovunbq_s16): Remove.
33674 (vqmovuntq_s32): Remove.
33675 (vqmovunbq_s32): Remove.
33676 (vqmovunbq_m_s16): Remove.
33677 (vqmovuntq_m_s16): Remove.
33678 (vqmovunbq_m_s32): Remove.
33679 (vqmovuntq_m_s32): Remove.
33680 (__arm_vqmovuntq_s16): Remove.
33681 (__arm_vqmovunbq_s16): Remove.
33682 (__arm_vqmovuntq_s32): Remove.
33683 (__arm_vqmovunbq_s32): Remove.
33684 (__arm_vqmovunbq_m_s16): Remove.
33685 (__arm_vqmovuntq_m_s16): Remove.
33686 (__arm_vqmovunbq_m_s32): Remove.
33687 (__arm_vqmovuntq_m_s32): Remove.
33688 (__arm_vqmovuntq): Remove.
33689 (__arm_vqmovunbq): Remove.
33690 (__arm_vqmovunbq_m): Remove.
33691 (__arm_vqmovuntq_m): Remove.
33693 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33695 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
33696 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
33699 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
33701 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
33702 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
33703 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
33704 (mve_vqmovuntq_s<mode>): Merge into ...
33705 (@mve_<mve_insn>q_<supf><mode>): ... this.
33706 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
33707 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
33708 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
33709 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
33711 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33713 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
33714 (binary_move_narrow_unsigned): New.
33715 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
33716 (binary_move_narrow_unsigned): New.
33718 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33720 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
33721 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
33722 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
33723 (vrndpq, vrndq, vrndxq): New.
33724 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
33725 (vrndpq, vrndq, vrndxq): New.
33726 * config/arm/arm_mve.h (vrndxq): Remove.
33732 (vrndaq_m): Remove.
33733 (vrndmq_m): Remove.
33734 (vrndnq_m): Remove.
33735 (vrndpq_m): Remove.
33737 (vrndxq_m): Remove.
33739 (vrndnq_x): Remove.
33740 (vrndmq_x): Remove.
33741 (vrndpq_x): Remove.
33742 (vrndaq_x): Remove.
33743 (vrndxq_x): Remove.
33744 (vrndxq_f16): Remove.
33745 (vrndxq_f32): Remove.
33746 (vrndq_f16): Remove.
33747 (vrndq_f32): Remove.
33748 (vrndpq_f16): Remove.
33749 (vrndpq_f32): Remove.
33750 (vrndnq_f16): Remove.
33751 (vrndnq_f32): Remove.
33752 (vrndmq_f16): Remove.
33753 (vrndmq_f32): Remove.
33754 (vrndaq_f16): Remove.
33755 (vrndaq_f32): Remove.
33756 (vrndaq_m_f16): Remove.
33757 (vrndmq_m_f16): Remove.
33758 (vrndnq_m_f16): Remove.
33759 (vrndpq_m_f16): Remove.
33760 (vrndq_m_f16): Remove.
33761 (vrndxq_m_f16): Remove.
33762 (vrndaq_m_f32): Remove.
33763 (vrndmq_m_f32): Remove.
33764 (vrndnq_m_f32): Remove.
33765 (vrndpq_m_f32): Remove.
33766 (vrndq_m_f32): Remove.
33767 (vrndxq_m_f32): Remove.
33768 (vrndq_x_f16): Remove.
33769 (vrndq_x_f32): Remove.
33770 (vrndnq_x_f16): Remove.
33771 (vrndnq_x_f32): Remove.
33772 (vrndmq_x_f16): Remove.
33773 (vrndmq_x_f32): Remove.
33774 (vrndpq_x_f16): Remove.
33775 (vrndpq_x_f32): Remove.
33776 (vrndaq_x_f16): Remove.
33777 (vrndaq_x_f32): Remove.
33778 (vrndxq_x_f16): Remove.
33779 (vrndxq_x_f32): Remove.
33780 (__arm_vrndxq_f16): Remove.
33781 (__arm_vrndxq_f32): Remove.
33782 (__arm_vrndq_f16): Remove.
33783 (__arm_vrndq_f32): Remove.
33784 (__arm_vrndpq_f16): Remove.
33785 (__arm_vrndpq_f32): Remove.
33786 (__arm_vrndnq_f16): Remove.
33787 (__arm_vrndnq_f32): Remove.
33788 (__arm_vrndmq_f16): Remove.
33789 (__arm_vrndmq_f32): Remove.
33790 (__arm_vrndaq_f16): Remove.
33791 (__arm_vrndaq_f32): Remove.
33792 (__arm_vrndaq_m_f16): Remove.
33793 (__arm_vrndmq_m_f16): Remove.
33794 (__arm_vrndnq_m_f16): Remove.
33795 (__arm_vrndpq_m_f16): Remove.
33796 (__arm_vrndq_m_f16): Remove.
33797 (__arm_vrndxq_m_f16): Remove.
33798 (__arm_vrndaq_m_f32): Remove.
33799 (__arm_vrndmq_m_f32): Remove.
33800 (__arm_vrndnq_m_f32): Remove.
33801 (__arm_vrndpq_m_f32): Remove.
33802 (__arm_vrndq_m_f32): Remove.
33803 (__arm_vrndxq_m_f32): Remove.
33804 (__arm_vrndq_x_f16): Remove.
33805 (__arm_vrndq_x_f32): Remove.
33806 (__arm_vrndnq_x_f16): Remove.
33807 (__arm_vrndnq_x_f32): Remove.
33808 (__arm_vrndmq_x_f16): Remove.
33809 (__arm_vrndmq_x_f32): Remove.
33810 (__arm_vrndpq_x_f16): Remove.
33811 (__arm_vrndpq_x_f32): Remove.
33812 (__arm_vrndaq_x_f16): Remove.
33813 (__arm_vrndaq_x_f32): Remove.
33814 (__arm_vrndxq_x_f16): Remove.
33815 (__arm_vrndxq_x_f32): Remove.
33816 (__arm_vrndxq): Remove.
33817 (__arm_vrndq): Remove.
33818 (__arm_vrndpq): Remove.
33819 (__arm_vrndnq): Remove.
33820 (__arm_vrndmq): Remove.
33821 (__arm_vrndaq): Remove.
33822 (__arm_vrndaq_m): Remove.
33823 (__arm_vrndmq_m): Remove.
33824 (__arm_vrndnq_m): Remove.
33825 (__arm_vrndpq_m): Remove.
33826 (__arm_vrndq_m): Remove.
33827 (__arm_vrndxq_m): Remove.
33828 (__arm_vrndq_x): Remove.
33829 (__arm_vrndnq_x): Remove.
33830 (__arm_vrndmq_x): Remove.
33831 (__arm_vrndpq_x): Remove.
33832 (__arm_vrndaq_x): Remove.
33833 (__arm_vrndxq_x): Remove.
33835 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33837 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
33838 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
33839 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
33840 (vclzq, vqabsq, vqnegq): New.
33841 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
33842 (vqabsq, vqnegq): New.
33843 * config/arm/arm_mve.h (vabsq): Remove.
33846 (vabsq_f16): Remove.
33847 (vabsq_f32): Remove.
33848 (vabsq_s8): Remove.
33849 (vabsq_s16): Remove.
33850 (vabsq_s32): Remove.
33851 (vabsq_m_s8): Remove.
33852 (vabsq_m_s16): Remove.
33853 (vabsq_m_s32): Remove.
33854 (vabsq_m_f16): Remove.
33855 (vabsq_m_f32): Remove.
33856 (vabsq_x_s8): Remove.
33857 (vabsq_x_s16): Remove.
33858 (vabsq_x_s32): Remove.
33859 (vabsq_x_f16): Remove.
33860 (vabsq_x_f32): Remove.
33861 (__arm_vabsq_s8): Remove.
33862 (__arm_vabsq_s16): Remove.
33863 (__arm_vabsq_s32): Remove.
33864 (__arm_vabsq_m_s8): Remove.
33865 (__arm_vabsq_m_s16): Remove.
33866 (__arm_vabsq_m_s32): Remove.
33867 (__arm_vabsq_x_s8): Remove.
33868 (__arm_vabsq_x_s16): Remove.
33869 (__arm_vabsq_x_s32): Remove.
33870 (__arm_vabsq_f16): Remove.
33871 (__arm_vabsq_f32): Remove.
33872 (__arm_vabsq_m_f16): Remove.
33873 (__arm_vabsq_m_f32): Remove.
33874 (__arm_vabsq_x_f16): Remove.
33875 (__arm_vabsq_x_f32): Remove.
33876 (__arm_vabsq): Remove.
33877 (__arm_vabsq_m): Remove.
33878 (__arm_vabsq_x): Remove.
33882 (vnegq_f16): Remove.
33883 (vnegq_f32): Remove.
33884 (vnegq_s8): Remove.
33885 (vnegq_s16): Remove.
33886 (vnegq_s32): Remove.
33887 (vnegq_m_s8): Remove.
33888 (vnegq_m_s16): Remove.
33889 (vnegq_m_s32): Remove.
33890 (vnegq_m_f16): Remove.
33891 (vnegq_m_f32): Remove.
33892 (vnegq_x_s8): Remove.
33893 (vnegq_x_s16): Remove.
33894 (vnegq_x_s32): Remove.
33895 (vnegq_x_f16): Remove.
33896 (vnegq_x_f32): Remove.
33897 (__arm_vnegq_s8): Remove.
33898 (__arm_vnegq_s16): Remove.
33899 (__arm_vnegq_s32): Remove.
33900 (__arm_vnegq_m_s8): Remove.
33901 (__arm_vnegq_m_s16): Remove.
33902 (__arm_vnegq_m_s32): Remove.
33903 (__arm_vnegq_x_s8): Remove.
33904 (__arm_vnegq_x_s16): Remove.
33905 (__arm_vnegq_x_s32): Remove.
33906 (__arm_vnegq_f16): Remove.
33907 (__arm_vnegq_f32): Remove.
33908 (__arm_vnegq_m_f16): Remove.
33909 (__arm_vnegq_m_f32): Remove.
33910 (__arm_vnegq_x_f16): Remove.
33911 (__arm_vnegq_x_f32): Remove.
33912 (__arm_vnegq): Remove.
33913 (__arm_vnegq_m): Remove.
33914 (__arm_vnegq_x): Remove.
33918 (vclsq_s8): Remove.
33919 (vclsq_s16): Remove.
33920 (vclsq_s32): Remove.
33921 (vclsq_m_s8): Remove.
33922 (vclsq_m_s16): Remove.
33923 (vclsq_m_s32): Remove.
33924 (vclsq_x_s8): Remove.
33925 (vclsq_x_s16): Remove.
33926 (vclsq_x_s32): Remove.
33927 (__arm_vclsq_s8): Remove.
33928 (__arm_vclsq_s16): Remove.
33929 (__arm_vclsq_s32): Remove.
33930 (__arm_vclsq_m_s8): Remove.
33931 (__arm_vclsq_m_s16): Remove.
33932 (__arm_vclsq_m_s32): Remove.
33933 (__arm_vclsq_x_s8): Remove.
33934 (__arm_vclsq_x_s16): Remove.
33935 (__arm_vclsq_x_s32): Remove.
33936 (__arm_vclsq): Remove.
33937 (__arm_vclsq_m): Remove.
33938 (__arm_vclsq_x): Remove.
33942 (vclzq_s8): Remove.
33943 (vclzq_s16): Remove.
33944 (vclzq_s32): Remove.
33945 (vclzq_u8): Remove.
33946 (vclzq_u16): Remove.
33947 (vclzq_u32): Remove.
33948 (vclzq_m_u8): Remove.
33949 (vclzq_m_s8): Remove.
33950 (vclzq_m_u16): Remove.
33951 (vclzq_m_s16): Remove.
33952 (vclzq_m_u32): Remove.
33953 (vclzq_m_s32): Remove.
33954 (vclzq_x_s8): Remove.
33955 (vclzq_x_s16): Remove.
33956 (vclzq_x_s32): Remove.
33957 (vclzq_x_u8): Remove.
33958 (vclzq_x_u16): Remove.
33959 (vclzq_x_u32): Remove.
33960 (__arm_vclzq_s8): Remove.
33961 (__arm_vclzq_s16): Remove.
33962 (__arm_vclzq_s32): Remove.
33963 (__arm_vclzq_u8): Remove.
33964 (__arm_vclzq_u16): Remove.
33965 (__arm_vclzq_u32): Remove.
33966 (__arm_vclzq_m_u8): Remove.
33967 (__arm_vclzq_m_s8): Remove.
33968 (__arm_vclzq_m_u16): Remove.
33969 (__arm_vclzq_m_s16): Remove.
33970 (__arm_vclzq_m_u32): Remove.
33971 (__arm_vclzq_m_s32): Remove.
33972 (__arm_vclzq_x_s8): Remove.
33973 (__arm_vclzq_x_s16): Remove.
33974 (__arm_vclzq_x_s32): Remove.
33975 (__arm_vclzq_x_u8): Remove.
33976 (__arm_vclzq_x_u16): Remove.
33977 (__arm_vclzq_x_u32): Remove.
33978 (__arm_vclzq): Remove.
33979 (__arm_vclzq_m): Remove.
33980 (__arm_vclzq_x): Remove.
33983 (vqnegq_m): Remove.
33984 (vqabsq_m): Remove.
33985 (vqabsq_s8): Remove.
33986 (vqabsq_s16): Remove.
33987 (vqabsq_s32): Remove.
33988 (vqnegq_s8): Remove.
33989 (vqnegq_s16): Remove.
33990 (vqnegq_s32): Remove.
33991 (vqnegq_m_s8): Remove.
33992 (vqabsq_m_s8): Remove.
33993 (vqnegq_m_s16): Remove.
33994 (vqabsq_m_s16): Remove.
33995 (vqnegq_m_s32): Remove.
33996 (vqabsq_m_s32): Remove.
33997 (__arm_vqabsq_s8): Remove.
33998 (__arm_vqabsq_s16): Remove.
33999 (__arm_vqabsq_s32): Remove.
34000 (__arm_vqnegq_s8): Remove.
34001 (__arm_vqnegq_s16): Remove.
34002 (__arm_vqnegq_s32): Remove.
34003 (__arm_vqnegq_m_s8): Remove.
34004 (__arm_vqabsq_m_s8): Remove.
34005 (__arm_vqnegq_m_s16): Remove.
34006 (__arm_vqabsq_m_s16): Remove.
34007 (__arm_vqnegq_m_s32): Remove.
34008 (__arm_vqabsq_m_s32): Remove.
34009 (__arm_vqabsq): Remove.
34010 (__arm_vqnegq): Remove.
34011 (__arm_vqnegq_m): Remove.
34012 (__arm_vqabsq_m): Remove.
34014 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
34016 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
34017 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
34018 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
34019 vrndm, vrndn, vrndp, vrnd, vrndx.
34020 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
34021 VQABSQ_M_S, VQNEGQ_M_S.
34023 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
34024 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
34025 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
34026 (@mve_<mve_insn>q_f<mode>): ... this.
34027 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
34028 (mve_v<absneg_str>q_f<mode>): ... this.
34029 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
34030 (mve_v<absneg_str>q_s<mode>): ... this.
34031 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
34032 (@mve_<mve_insn>q_<supf><mode>): ... this.
34033 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
34034 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
34035 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
34036 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
34037 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
34038 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
34039 (mve_vrndxq_m_f<mode>): Merge into ...
34040 (@mve_<mve_insn>q_m_f<mode>): ... this.
34042 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
34044 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
34045 * config/arm/arm-mve-builtins-shapes.h (unary): New.
34047 2023-05-09 Jakub Jelinek <jakub@redhat.com>
34049 * mux-utils.h: Fix comment typo, avoides -> avoids.
34051 2023-05-09 Jakub Jelinek <jakub@redhat.com>
34053 PR tree-optimization/109778
34054 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
34055 wi::zext (x, width) rather than x if width != precision, rather
34056 than using wi::zext (right, width) after the shift.
34057 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
34058 of wi::lrotate or wi::rrotate.
34060 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
34062 * genmatch.cc (get_out_file): Make static and rename to ...
34063 (choose_output): ... this. Reimplement. Update all uses ...
34064 (decision_tree::gen): ... here and ...
34067 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
34069 * genmatch.cc (showUsage): Reimplement as ...
34070 (usage): ...this. Adjust all uses.
34071 (main): Print usage when no arguments. Add missing 'return 1'.
34073 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
34075 * genmatch.cc (header_file): Make static.
34076 (emit_func): Rename to...
34077 (fp_decl): ... this. Adjust all uses.
34078 (fp_decl_done): New function. Use it...
34079 (decision_tree::gen): ... here and...
34080 (write_predicate): ... here.
34083 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
34085 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
34088 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
34089 Uros Bizjak <ubizjak@gmail.com>
34091 * config/i386/i386.md (any_or_plus): Move definition earlier.
34092 (*insvti_highpart_1): New define_insn_and_split to overwrite
34093 (insv) the highpart of a TImode register/memory.
34095 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
34097 * auto-profile.cc (auto_profile): Check todo from early_inline
34098 to see if cleanup_tree_vfg needs to be called.
34099 (early_inline): Return todo from early_inliner.
34101 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
34103 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
34105 (pass_vsetvl::get_block_info): New.
34106 (pass_vsetvl::update_vector_info): New.
34107 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
34108 (pass_vsetvl::compute_local_backward_infos): Ditto.
34109 (pass_vsetvl::transfer_before): Ditto.
34110 (pass_vsetvl::transfer_after): Ditto.
34111 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
34112 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
34113 (pass_vsetvl::cleanup_insns): Ditto.
34114 (pass_vsetvl::compute_local_backward_infos): Use
34115 update_vector_info.
34117 2023-05-08 Jeff Law <jlaw@ventanamicro>
34119 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
34121 2023-05-08 Richard Biener <rguenther@suse.de>
34122 Michael Meissner <meissner@linux.ibm.com>
34124 PR middle-end/108623
34125 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
34126 Align bit fields > 1 bit to at least an 8-bit boundary.
34128 2023-05-08 Andrew Pinski <apinski@marvell.com>
34130 PR tree-optimization/109424
34131 PR tree-optimization/59424
34132 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
34133 (factor_out_conditional_operation): This and add support for all unary
34135 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
34136 to call factor_out_conditional_operation instead.
34138 2023-05-08 Andrew Pinski <apinski@marvell.com>
34140 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
34141 over factor_out_conditional_conversion.
34143 2023-05-08 Andrew Pinski <apinski@marvell.com>
34145 PR tree-optimization/49959
34146 PR tree-optimization/103771
34147 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
34148 Diamond shapped bb form for factor_out_conditional_conversion.
34150 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34152 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
34153 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
34154 (riscv_vector_get_mask_mode): Ditto.
34155 (get_mask_policy_no_pred): Ditto.
34156 (get_tail_policy_no_pred): Ditto.
34157 (get_mask_mode): New function.
34158 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
34159 (get_tail_policy_no_pred): Ditto.
34160 (riscv_vector_mask_mode_p): Ditto.
34161 (riscv_vector_get_mask_mode): Ditto.
34162 (get_mask_mode): New function.
34163 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
34165 (get_tail_policy_for_pred): Ditto.
34166 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
34167 (get_mask_policy_for_pred): Ditto
34168 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
34170 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
34172 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
34173 (riscv_select_multilib): New.
34174 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
34175 also handle select_by_abi.
34176 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
34177 to select_by_abi_arch_cmodel from 1.
34178 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
34179 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
34181 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
34183 * Makefile.in: (gimple-match-head.o-warn): Remove.
34184 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
34185 gimple-match-exports.cc.
34186 (gimple-match-auto.h): Only depend on s-gimple-match.
34187 (generic-match-auto.h): Likewise.
34189 2023-05-08 Andrew Pinski <apinski@marvell.com>
34191 PR tree-optimization/109691
34192 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
34194 If the removed statement can throw, have need_eh_cleanup
34195 include the bb of that statement.
34196 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
34197 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
34199 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
34200 Initialize dceworklist instead of stmts_to_remove.
34201 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
34202 Destore dceworklist instead of stmts_to_remove.
34203 (substitute_and_fold_dom_walker::before_dom_children):
34204 Set dceworklist instead of adding to stmts_to_remove.
34205 (substitute_and_fold_engine::substitute_and_fold):
34206 Call simple_dce_from_worklist instead of poping
34208 Don't update the stat on removal statements.
34210 2023-05-07 Andrew Pinski <apinski@marvell.com>
34213 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
34214 Change argument type to aarch64_feature_flags.
34215 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
34216 constructor argument type to aarch64_feature_flags.
34217 Change m_old_asm_isa_flags to be aarch64_feature_flags.
34219 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
34221 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
34222 more parallel code if can_create_pseudo_p.
34224 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
34227 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
34228 immediately before moving a multi-word register by parts.
34230 2023-05-06 Jeff Law <jlaw@ventanamicro>
34232 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
34234 2023-05-06 Michael Collison <collison@rivosinc.com>
34236 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
34237 Check that GET_MODE_NUNITS is a multiple of 2.
34239 2023-05-06 Michael Collison <collison@rivosinc.com>
34241 * config/riscv/riscv.cc
34242 (riscv_estimated_poly_value): Implement
34243 TARGET_ESTIMATED_POLY_VALUE.
34244 (riscv_preferred_simd_mode): Implement
34245 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
34246 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
34247 (riscv_empty_mask_is_expensive): Implement
34248 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
34249 (riscv_vectorize_create_costs): Implement
34250 TARGET_VECTORIZE_CREATE_COSTS.
34251 (riscv_support_vector_misalignment): Implement
34252 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
34253 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
34254 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
34255 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
34256 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
34258 2023-05-06 Jeff Law <jlaw@ventanamicro>
34260 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
34261 duplicate definition.
34263 2023-05-06 Michael Collison <collison@rivosinc.com>
34265 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
34266 (riscv_vector_preferred_simd_mode): Ditto.
34267 (get_mask_policy_no_pred): Ditto.
34268 (get_tail_policy_no_pred): Ditto.
34269 (riscv_vector_mask_mode_p): Ditto.
34270 (riscv_vector_get_mask_mode): Ditto.
34272 2023-05-06 Michael Collison <collison@rivosinc.com>
34274 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
34275 Remove static declaration to to make externally visible.
34276 (get_mask_policy_for_pred): Ditto.
34277 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
34278 New external declaration.
34279 (get_mask_policy_for_pred): Ditto.
34281 2023-05-06 Michael Collison <collison@rivosinc.com>
34283 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
34284 (riscv_vector_get_mask_mode): Ditto.
34285 (get_mask_policy_no_pred): Ditto.
34286 (get_tail_policy_no_pred): Ditto.
34288 2023-05-06 Xi Ruoyao <xry111@xry111.site>
34290 * config/loongarch/loongarch.h (struct machine_function): Add
34291 reg_is_wrapped_separately array for register wrapping
34293 * config/loongarch/loongarch.cc
34294 (loongarch_get_separate_components): New function.
34295 (loongarch_components_for_bb): Likewise.
34296 (loongarch_disqualify_components): Likewise.
34297 (loongarch_process_components): Likewise.
34298 (loongarch_emit_prologue_components): Likewise.
34299 (loongarch_emit_epilogue_components): Likewise.
34300 (loongarch_set_handled_components): Likewise.
34301 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
34302 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
34303 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
34304 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
34305 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
34306 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
34307 (loongarch_for_each_saved_reg): Skip registers that are wrapped
34310 2023-05-06 Xi Ruoyao <xry111@xry111.site>
34313 * Makefile.in (s-macro_list): Pass -nostdinc to
34316 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34318 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
34319 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
34320 (preferred_simd_mode): Ditto.
34321 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
34322 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
34323 (riscv_preferred_simd_mode): New function.
34324 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
34325 * config/riscv/vector.md: Add autovec.md.
34326 * config/riscv/autovec.md: New file.
34328 2023-05-06 Jakub Jelinek <jakub@redhat.com>
34330 * real.h (dconst_pi): Define.
34331 (dconst_e_ptr): Formatting fix.
34332 (dconst_pi_ptr): Declare.
34333 * real.cc (dconst_pi_ptr): New function.
34334 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
34335 boundaries range with range computed from sin/cos of the particular
34336 bounds if the argument range is shorter than 2*pi.
34337 (cfn_sincos::op1_range): Take bulps into account when determining
34338 which result ranges are always invalid or behave like known NAN.
34340 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
34342 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
34343 pass type to vrange_storage::equal_p.
34344 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
34345 (irange_storage::equal_p): Same.
34346 (frange_storage::equal_p): Same.
34347 * value-range-storage.h (class frange_storage): Same.
34349 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34352 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
34353 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
34355 2023-05-06 liuhongt <hongtao.liu@intel.com>
34357 * combine.cc (maybe_swap_commutative_operands): Canonicalize
34358 vec_merge when mask is constant.
34359 * doc/md.texi: Document vec_merge canonicalization.
34361 2023-05-06 Jakub Jelinek <jakub@redhat.com>
34363 * value-range.h (frange_arithmetic): Declare.
34364 * range-op-float.cc (frange_arithmetic): No longer static.
34365 * gimple-range-op.cc (frange_mpfr_arg1): New function.
34366 (cfn_sqrt::fold_range): Intersect the generic boundaries range
34367 with range computed from sqrt of the particular bounds.
34368 (cfn_sqrt::op1_range): Intersect the generic boundaries range
34369 with range computed from squared particular bounds.
34371 2023-05-06 Jakub Jelinek <jakub@redhat.com>
34373 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
34374 earlier with helper variables also renamed.
34375 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
34376 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
34377 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
34379 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
34381 * config/cris/cris.md (splitop): Add PLUS.
34382 * config/cris/cris.cc (cris_split_constant): Also handle
34383 PLUS when a split into two insns may be useful.
34385 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
34387 * config/cris/cris.md (movandsplit1): New define_peephole2.
34389 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
34391 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
34393 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
34395 * doc/md.texi (define_peephole2): Document order of scanning.
34397 2023-05-05 Pan Li <pan2.li@intel.com>
34398 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34400 * config/riscv/vector.md: Allow const as the operand of RVV
34401 indexed load/store.
34403 2023-05-05 Pan Li <pan2.li@intel.com>
34405 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
34406 consumed by simplify_rtx.
34408 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34410 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
34411 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
34412 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
34413 * config/arm/arm_mve.h (vshrq): Remove.
34415 (vrshrq_m): Remove.
34417 (vrshrq_x): Remove.
34419 (vshrq_n_s8): Remove.
34420 (vshrq_n_s16): Remove.
34421 (vshrq_n_s32): Remove.
34422 (vshrq_n_u8): Remove.
34423 (vshrq_n_u16): Remove.
34424 (vshrq_n_u32): Remove.
34425 (vrshrq_n_u8): Remove.
34426 (vrshrq_n_s8): Remove.
34427 (vrshrq_n_u16): Remove.
34428 (vrshrq_n_s16): Remove.
34429 (vrshrq_n_u32): Remove.
34430 (vrshrq_n_s32): Remove.
34431 (vrshrq_m_n_s8): Remove.
34432 (vrshrq_m_n_s32): Remove.
34433 (vrshrq_m_n_s16): Remove.
34434 (vrshrq_m_n_u8): Remove.
34435 (vrshrq_m_n_u32): Remove.
34436 (vrshrq_m_n_u16): Remove.
34437 (vshrq_m_n_s8): Remove.
34438 (vshrq_m_n_s32): Remove.
34439 (vshrq_m_n_s16): Remove.
34440 (vshrq_m_n_u8): Remove.
34441 (vshrq_m_n_u32): Remove.
34442 (vshrq_m_n_u16): Remove.
34443 (vrshrq_x_n_s8): Remove.
34444 (vrshrq_x_n_s16): Remove.
34445 (vrshrq_x_n_s32): Remove.
34446 (vrshrq_x_n_u8): Remove.
34447 (vrshrq_x_n_u16): Remove.
34448 (vrshrq_x_n_u32): Remove.
34449 (vshrq_x_n_s8): Remove.
34450 (vshrq_x_n_s16): Remove.
34451 (vshrq_x_n_s32): Remove.
34452 (vshrq_x_n_u8): Remove.
34453 (vshrq_x_n_u16): Remove.
34454 (vshrq_x_n_u32): Remove.
34455 (__arm_vshrq_n_s8): Remove.
34456 (__arm_vshrq_n_s16): Remove.
34457 (__arm_vshrq_n_s32): Remove.
34458 (__arm_vshrq_n_u8): Remove.
34459 (__arm_vshrq_n_u16): Remove.
34460 (__arm_vshrq_n_u32): Remove.
34461 (__arm_vrshrq_n_u8): Remove.
34462 (__arm_vrshrq_n_s8): Remove.
34463 (__arm_vrshrq_n_u16): Remove.
34464 (__arm_vrshrq_n_s16): Remove.
34465 (__arm_vrshrq_n_u32): Remove.
34466 (__arm_vrshrq_n_s32): Remove.
34467 (__arm_vrshrq_m_n_s8): Remove.
34468 (__arm_vrshrq_m_n_s32): Remove.
34469 (__arm_vrshrq_m_n_s16): Remove.
34470 (__arm_vrshrq_m_n_u8): Remove.
34471 (__arm_vrshrq_m_n_u32): Remove.
34472 (__arm_vrshrq_m_n_u16): Remove.
34473 (__arm_vshrq_m_n_s8): Remove.
34474 (__arm_vshrq_m_n_s32): Remove.
34475 (__arm_vshrq_m_n_s16): Remove.
34476 (__arm_vshrq_m_n_u8): Remove.
34477 (__arm_vshrq_m_n_u32): Remove.
34478 (__arm_vshrq_m_n_u16): Remove.
34479 (__arm_vrshrq_x_n_s8): Remove.
34480 (__arm_vrshrq_x_n_s16): Remove.
34481 (__arm_vrshrq_x_n_s32): Remove.
34482 (__arm_vrshrq_x_n_u8): Remove.
34483 (__arm_vrshrq_x_n_u16): Remove.
34484 (__arm_vrshrq_x_n_u32): Remove.
34485 (__arm_vshrq_x_n_s8): Remove.
34486 (__arm_vshrq_x_n_s16): Remove.
34487 (__arm_vshrq_x_n_s32): Remove.
34488 (__arm_vshrq_x_n_u8): Remove.
34489 (__arm_vshrq_x_n_u16): Remove.
34490 (__arm_vshrq_x_n_u32): Remove.
34491 (__arm_vshrq): Remove.
34492 (__arm_vrshrq): Remove.
34493 (__arm_vrshrq_m): Remove.
34494 (__arm_vshrq_m): Remove.
34495 (__arm_vrshrq_x): Remove.
34496 (__arm_vshrq_x): Remove.
34498 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34500 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
34501 (mve_insn): Add vrshr, vshr.
34502 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
34503 (mve_vrshrq_n_<supf><mode>): Merge into ...
34504 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34505 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
34507 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34509 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34511 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
34512 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
34514 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34516 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
34517 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
34518 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
34519 (vqrshrunbq, vqrshruntq): New.
34520 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
34521 (vqrshrunbq, vqrshruntq): New.
34522 * config/arm/arm-mve-builtins.cc
34523 (function_instance::has_inactive_argument): Handle vqshrunbq,
34524 vqshruntq, vqrshrunbq, vqrshruntq.
34525 * config/arm/arm_mve.h (vqrshrunbq): Remove.
34526 (vqrshruntq): Remove.
34527 (vqrshrunbq_m): Remove.
34528 (vqrshruntq_m): Remove.
34529 (vqrshrunbq_n_s16): Remove.
34530 (vqrshrunbq_n_s32): Remove.
34531 (vqrshruntq_n_s16): Remove.
34532 (vqrshruntq_n_s32): Remove.
34533 (vqrshrunbq_m_n_s32): Remove.
34534 (vqrshrunbq_m_n_s16): Remove.
34535 (vqrshruntq_m_n_s32): Remove.
34536 (vqrshruntq_m_n_s16): Remove.
34537 (__arm_vqrshrunbq_n_s16): Remove.
34538 (__arm_vqrshrunbq_n_s32): Remove.
34539 (__arm_vqrshruntq_n_s16): Remove.
34540 (__arm_vqrshruntq_n_s32): Remove.
34541 (__arm_vqrshrunbq_m_n_s32): Remove.
34542 (__arm_vqrshrunbq_m_n_s16): Remove.
34543 (__arm_vqrshruntq_m_n_s32): Remove.
34544 (__arm_vqrshruntq_m_n_s16): Remove.
34545 (__arm_vqrshrunbq): Remove.
34546 (__arm_vqrshruntq): Remove.
34547 (__arm_vqrshrunbq_m): Remove.
34548 (__arm_vqrshruntq_m): Remove.
34549 (vqshrunbq): Remove.
34550 (vqshruntq): Remove.
34551 (vqshrunbq_m): Remove.
34552 (vqshruntq_m): Remove.
34553 (vqshrunbq_n_s16): Remove.
34554 (vqshruntq_n_s16): Remove.
34555 (vqshrunbq_n_s32): Remove.
34556 (vqshruntq_n_s32): Remove.
34557 (vqshrunbq_m_n_s32): Remove.
34558 (vqshrunbq_m_n_s16): Remove.
34559 (vqshruntq_m_n_s32): Remove.
34560 (vqshruntq_m_n_s16): Remove.
34561 (__arm_vqshrunbq_n_s16): Remove.
34562 (__arm_vqshruntq_n_s16): Remove.
34563 (__arm_vqshrunbq_n_s32): Remove.
34564 (__arm_vqshruntq_n_s32): Remove.
34565 (__arm_vqshrunbq_m_n_s32): Remove.
34566 (__arm_vqshrunbq_m_n_s16): Remove.
34567 (__arm_vqshruntq_m_n_s32): Remove.
34568 (__arm_vqshruntq_m_n_s16): Remove.
34569 (__arm_vqshrunbq): Remove.
34570 (__arm_vqshruntq): Remove.
34571 (__arm_vqshrunbq_m): Remove.
34572 (__arm_vqshruntq_m): Remove.
34574 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34576 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
34577 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
34578 (MVE_SHRN_M_N): Likewise.
34579 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
34580 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
34582 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
34583 (mve_vqrshruntq_n_s<mode>): Remove.
34584 (mve_vqshrunbq_n_s<mode>): Remove.
34585 (mve_vqshruntq_n_s<mode>): Remove.
34586 (mve_vqrshrunbq_m_n_s<mode>): Remove.
34587 (mve_vqrshruntq_m_n_s<mode>): Remove.
34588 (mve_vqshrunbq_m_n_s<mode>): Remove.
34589 (mve_vqshruntq_m_n_s<mode>): Remove.
34591 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34593 * config/arm/arm-mve-builtins-shapes.cc
34594 (binary_rshift_narrow_unsigned): New.
34595 * config/arm/arm-mve-builtins-shapes.h
34596 (binary_rshift_narrow_unsigned): New.
34598 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34600 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
34601 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
34602 (vqrshrnbq, vqrshrntq): New.
34603 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
34604 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
34606 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
34607 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
34608 * config/arm/arm-mve-builtins.cc
34609 (function_instance::has_inactive_argument): Handle vshrnbq,
34610 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
34612 * config/arm/arm_mve.h (vshrnbq): Remove.
34614 (vshrnbq_m): Remove.
34615 (vshrntq_m): Remove.
34616 (vshrnbq_n_s16): Remove.
34617 (vshrntq_n_s16): Remove.
34618 (vshrnbq_n_u16): Remove.
34619 (vshrntq_n_u16): Remove.
34620 (vshrnbq_n_s32): Remove.
34621 (vshrntq_n_s32): Remove.
34622 (vshrnbq_n_u32): Remove.
34623 (vshrntq_n_u32): Remove.
34624 (vshrnbq_m_n_s32): Remove.
34625 (vshrnbq_m_n_s16): Remove.
34626 (vshrnbq_m_n_u32): Remove.
34627 (vshrnbq_m_n_u16): Remove.
34628 (vshrntq_m_n_s32): Remove.
34629 (vshrntq_m_n_s16): Remove.
34630 (vshrntq_m_n_u32): Remove.
34631 (vshrntq_m_n_u16): Remove.
34632 (__arm_vshrnbq_n_s16): Remove.
34633 (__arm_vshrntq_n_s16): Remove.
34634 (__arm_vshrnbq_n_u16): Remove.
34635 (__arm_vshrntq_n_u16): Remove.
34636 (__arm_vshrnbq_n_s32): Remove.
34637 (__arm_vshrntq_n_s32): Remove.
34638 (__arm_vshrnbq_n_u32): Remove.
34639 (__arm_vshrntq_n_u32): Remove.
34640 (__arm_vshrnbq_m_n_s32): Remove.
34641 (__arm_vshrnbq_m_n_s16): Remove.
34642 (__arm_vshrnbq_m_n_u32): Remove.
34643 (__arm_vshrnbq_m_n_u16): Remove.
34644 (__arm_vshrntq_m_n_s32): Remove.
34645 (__arm_vshrntq_m_n_s16): Remove.
34646 (__arm_vshrntq_m_n_u32): Remove.
34647 (__arm_vshrntq_m_n_u16): Remove.
34648 (__arm_vshrnbq): Remove.
34649 (__arm_vshrntq): Remove.
34650 (__arm_vshrnbq_m): Remove.
34651 (__arm_vshrntq_m): Remove.
34652 (vrshrnbq): Remove.
34653 (vrshrntq): Remove.
34654 (vrshrnbq_m): Remove.
34655 (vrshrntq_m): Remove.
34656 (vrshrnbq_n_s16): Remove.
34657 (vrshrntq_n_s16): Remove.
34658 (vrshrnbq_n_u16): Remove.
34659 (vrshrntq_n_u16): Remove.
34660 (vrshrnbq_n_s32): Remove.
34661 (vrshrntq_n_s32): Remove.
34662 (vrshrnbq_n_u32): Remove.
34663 (vrshrntq_n_u32): Remove.
34664 (vrshrnbq_m_n_s32): Remove.
34665 (vrshrnbq_m_n_s16): Remove.
34666 (vrshrnbq_m_n_u32): Remove.
34667 (vrshrnbq_m_n_u16): Remove.
34668 (vrshrntq_m_n_s32): Remove.
34669 (vrshrntq_m_n_s16): Remove.
34670 (vrshrntq_m_n_u32): Remove.
34671 (vrshrntq_m_n_u16): Remove.
34672 (__arm_vrshrnbq_n_s16): Remove.
34673 (__arm_vrshrntq_n_s16): Remove.
34674 (__arm_vrshrnbq_n_u16): Remove.
34675 (__arm_vrshrntq_n_u16): Remove.
34676 (__arm_vrshrnbq_n_s32): Remove.
34677 (__arm_vrshrntq_n_s32): Remove.
34678 (__arm_vrshrnbq_n_u32): Remove.
34679 (__arm_vrshrntq_n_u32): Remove.
34680 (__arm_vrshrnbq_m_n_s32): Remove.
34681 (__arm_vrshrnbq_m_n_s16): Remove.
34682 (__arm_vrshrnbq_m_n_u32): Remove.
34683 (__arm_vrshrnbq_m_n_u16): Remove.
34684 (__arm_vrshrntq_m_n_s32): Remove.
34685 (__arm_vrshrntq_m_n_s16): Remove.
34686 (__arm_vrshrntq_m_n_u32): Remove.
34687 (__arm_vrshrntq_m_n_u16): Remove.
34688 (__arm_vrshrnbq): Remove.
34689 (__arm_vrshrntq): Remove.
34690 (__arm_vrshrnbq_m): Remove.
34691 (__arm_vrshrntq_m): Remove.
34692 (vqshrnbq): Remove.
34693 (vqshrntq): Remove.
34694 (vqshrnbq_m): Remove.
34695 (vqshrntq_m): Remove.
34696 (vqshrnbq_n_s16): Remove.
34697 (vqshrntq_n_s16): Remove.
34698 (vqshrnbq_n_u16): Remove.
34699 (vqshrntq_n_u16): Remove.
34700 (vqshrnbq_n_s32): Remove.
34701 (vqshrntq_n_s32): Remove.
34702 (vqshrnbq_n_u32): Remove.
34703 (vqshrntq_n_u32): Remove.
34704 (vqshrnbq_m_n_s32): Remove.
34705 (vqshrnbq_m_n_s16): Remove.
34706 (vqshrnbq_m_n_u32): Remove.
34707 (vqshrnbq_m_n_u16): Remove.
34708 (vqshrntq_m_n_s32): Remove.
34709 (vqshrntq_m_n_s16): Remove.
34710 (vqshrntq_m_n_u32): Remove.
34711 (vqshrntq_m_n_u16): Remove.
34712 (__arm_vqshrnbq_n_s16): Remove.
34713 (__arm_vqshrntq_n_s16): Remove.
34714 (__arm_vqshrnbq_n_u16): Remove.
34715 (__arm_vqshrntq_n_u16): Remove.
34716 (__arm_vqshrnbq_n_s32): Remove.
34717 (__arm_vqshrntq_n_s32): Remove.
34718 (__arm_vqshrnbq_n_u32): Remove.
34719 (__arm_vqshrntq_n_u32): Remove.
34720 (__arm_vqshrnbq_m_n_s32): Remove.
34721 (__arm_vqshrnbq_m_n_s16): Remove.
34722 (__arm_vqshrnbq_m_n_u32): Remove.
34723 (__arm_vqshrnbq_m_n_u16): Remove.
34724 (__arm_vqshrntq_m_n_s32): Remove.
34725 (__arm_vqshrntq_m_n_s16): Remove.
34726 (__arm_vqshrntq_m_n_u32): Remove.
34727 (__arm_vqshrntq_m_n_u16): Remove.
34728 (__arm_vqshrnbq): Remove.
34729 (__arm_vqshrntq): Remove.
34730 (__arm_vqshrnbq_m): Remove.
34731 (__arm_vqshrntq_m): Remove.
34732 (vqrshrnbq): Remove.
34733 (vqrshrntq): Remove.
34734 (vqrshrnbq_m): Remove.
34735 (vqrshrntq_m): Remove.
34736 (vqrshrnbq_n_s16): Remove.
34737 (vqrshrnbq_n_u16): Remove.
34738 (vqrshrnbq_n_s32): Remove.
34739 (vqrshrnbq_n_u32): Remove.
34740 (vqrshrntq_n_s16): Remove.
34741 (vqrshrntq_n_u16): Remove.
34742 (vqrshrntq_n_s32): Remove.
34743 (vqrshrntq_n_u32): Remove.
34744 (vqrshrnbq_m_n_s32): Remove.
34745 (vqrshrnbq_m_n_s16): Remove.
34746 (vqrshrnbq_m_n_u32): Remove.
34747 (vqrshrnbq_m_n_u16): Remove.
34748 (vqrshrntq_m_n_s32): Remove.
34749 (vqrshrntq_m_n_s16): Remove.
34750 (vqrshrntq_m_n_u32): Remove.
34751 (vqrshrntq_m_n_u16): Remove.
34752 (__arm_vqrshrnbq_n_s16): Remove.
34753 (__arm_vqrshrnbq_n_u16): Remove.
34754 (__arm_vqrshrnbq_n_s32): Remove.
34755 (__arm_vqrshrnbq_n_u32): Remove.
34756 (__arm_vqrshrntq_n_s16): Remove.
34757 (__arm_vqrshrntq_n_u16): Remove.
34758 (__arm_vqrshrntq_n_s32): Remove.
34759 (__arm_vqrshrntq_n_u32): Remove.
34760 (__arm_vqrshrnbq_m_n_s32): Remove.
34761 (__arm_vqrshrnbq_m_n_s16): Remove.
34762 (__arm_vqrshrnbq_m_n_u32): Remove.
34763 (__arm_vqrshrnbq_m_n_u16): Remove.
34764 (__arm_vqrshrntq_m_n_s32): Remove.
34765 (__arm_vqrshrntq_m_n_s16): Remove.
34766 (__arm_vqrshrntq_m_n_u32): Remove.
34767 (__arm_vqrshrntq_m_n_u16): Remove.
34768 (__arm_vqrshrnbq): Remove.
34769 (__arm_vqrshrntq): Remove.
34770 (__arm_vqrshrnbq_m): Remove.
34771 (__arm_vqrshrntq_m): Remove.
34773 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34775 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
34776 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
34777 vrshrnt, vshrnb, vshrnt.
34779 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
34780 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
34781 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
34782 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
34783 (mve_vshrntq_n_<supf><mode>): Merge into ...
34784 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34785 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
34786 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
34787 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
34788 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
34790 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34792 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34794 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
34796 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
34798 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34800 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
34801 (vmaxq, vminq): New.
34802 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
34803 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
34804 * config/arm/arm_mve.h (vminq): Remove.
34810 (vminq_u8): Remove.
34811 (vmaxq_u8): Remove.
34812 (vminq_s8): Remove.
34813 (vmaxq_s8): Remove.
34814 (vminq_u16): Remove.
34815 (vmaxq_u16): Remove.
34816 (vminq_s16): Remove.
34817 (vmaxq_s16): Remove.
34818 (vminq_u32): Remove.
34819 (vmaxq_u32): Remove.
34820 (vminq_s32): Remove.
34821 (vmaxq_s32): Remove.
34822 (vmaxq_m_s8): Remove.
34823 (vmaxq_m_s32): Remove.
34824 (vmaxq_m_s16): Remove.
34825 (vmaxq_m_u8): Remove.
34826 (vmaxq_m_u32): Remove.
34827 (vmaxq_m_u16): Remove.
34828 (vminq_m_s8): Remove.
34829 (vminq_m_s32): Remove.
34830 (vminq_m_s16): Remove.
34831 (vminq_m_u8): Remove.
34832 (vminq_m_u32): Remove.
34833 (vminq_m_u16): Remove.
34834 (vminq_x_s8): Remove.
34835 (vminq_x_s16): Remove.
34836 (vminq_x_s32): Remove.
34837 (vminq_x_u8): Remove.
34838 (vminq_x_u16): Remove.
34839 (vminq_x_u32): Remove.
34840 (vmaxq_x_s8): Remove.
34841 (vmaxq_x_s16): Remove.
34842 (vmaxq_x_s32): Remove.
34843 (vmaxq_x_u8): Remove.
34844 (vmaxq_x_u16): Remove.
34845 (vmaxq_x_u32): Remove.
34846 (__arm_vminq_u8): Remove.
34847 (__arm_vmaxq_u8): Remove.
34848 (__arm_vminq_s8): Remove.
34849 (__arm_vmaxq_s8): Remove.
34850 (__arm_vminq_u16): Remove.
34851 (__arm_vmaxq_u16): Remove.
34852 (__arm_vminq_s16): Remove.
34853 (__arm_vmaxq_s16): Remove.
34854 (__arm_vminq_u32): Remove.
34855 (__arm_vmaxq_u32): Remove.
34856 (__arm_vminq_s32): Remove.
34857 (__arm_vmaxq_s32): Remove.
34858 (__arm_vmaxq_m_s8): Remove.
34859 (__arm_vmaxq_m_s32): Remove.
34860 (__arm_vmaxq_m_s16): Remove.
34861 (__arm_vmaxq_m_u8): Remove.
34862 (__arm_vmaxq_m_u32): Remove.
34863 (__arm_vmaxq_m_u16): Remove.
34864 (__arm_vminq_m_s8): Remove.
34865 (__arm_vminq_m_s32): Remove.
34866 (__arm_vminq_m_s16): Remove.
34867 (__arm_vminq_m_u8): Remove.
34868 (__arm_vminq_m_u32): Remove.
34869 (__arm_vminq_m_u16): Remove.
34870 (__arm_vminq_x_s8): Remove.
34871 (__arm_vminq_x_s16): Remove.
34872 (__arm_vminq_x_s32): Remove.
34873 (__arm_vminq_x_u8): Remove.
34874 (__arm_vminq_x_u16): Remove.
34875 (__arm_vminq_x_u32): Remove.
34876 (__arm_vmaxq_x_s8): Remove.
34877 (__arm_vmaxq_x_s16): Remove.
34878 (__arm_vmaxq_x_s32): Remove.
34879 (__arm_vmaxq_x_u8): Remove.
34880 (__arm_vmaxq_x_u16): Remove.
34881 (__arm_vmaxq_x_u32): Remove.
34882 (__arm_vminq): Remove.
34883 (__arm_vmaxq): Remove.
34884 (__arm_vmaxq_m): Remove.
34885 (__arm_vminq_m): Remove.
34886 (__arm_vminq_x): Remove.
34887 (__arm_vmaxq_x): Remove.
34889 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34891 * config/arm/iterators.md (MAX_MIN_SU): New.
34892 (max_min_su_str): New.
34893 (max_min_supf): New.
34894 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
34895 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
34896 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
34898 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34900 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
34901 (vqshlq, vshlq): New.
34902 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
34903 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
34904 * config/arm/arm_mve.h (vshlq): Remove.
34907 (vshlq_m_r): Remove.
34909 (vshlq_m_n): Remove.
34911 (vshlq_x_n): Remove.
34912 (vshlq_s8): Remove.
34913 (vshlq_s16): Remove.
34914 (vshlq_s32): Remove.
34915 (vshlq_u8): Remove.
34916 (vshlq_u16): Remove.
34917 (vshlq_u32): Remove.
34918 (vshlq_r_u8): Remove.
34919 (vshlq_n_u8): Remove.
34920 (vshlq_r_s8): Remove.
34921 (vshlq_n_s8): Remove.
34922 (vshlq_r_u16): Remove.
34923 (vshlq_n_u16): Remove.
34924 (vshlq_r_s16): Remove.
34925 (vshlq_n_s16): Remove.
34926 (vshlq_r_u32): Remove.
34927 (vshlq_n_u32): Remove.
34928 (vshlq_r_s32): Remove.
34929 (vshlq_n_s32): Remove.
34930 (vshlq_m_r_u8): Remove.
34931 (vshlq_m_r_s8): Remove.
34932 (vshlq_m_r_u16): Remove.
34933 (vshlq_m_r_s16): Remove.
34934 (vshlq_m_r_u32): Remove.
34935 (vshlq_m_r_s32): Remove.
34936 (vshlq_m_u8): Remove.
34937 (vshlq_m_s8): Remove.
34938 (vshlq_m_u16): Remove.
34939 (vshlq_m_s16): Remove.
34940 (vshlq_m_u32): Remove.
34941 (vshlq_m_s32): Remove.
34942 (vshlq_m_n_s8): Remove.
34943 (vshlq_m_n_s32): Remove.
34944 (vshlq_m_n_s16): Remove.
34945 (vshlq_m_n_u8): Remove.
34946 (vshlq_m_n_u32): Remove.
34947 (vshlq_m_n_u16): Remove.
34948 (vshlq_x_s8): Remove.
34949 (vshlq_x_s16): Remove.
34950 (vshlq_x_s32): Remove.
34951 (vshlq_x_u8): Remove.
34952 (vshlq_x_u16): Remove.
34953 (vshlq_x_u32): Remove.
34954 (vshlq_x_n_s8): Remove.
34955 (vshlq_x_n_s16): Remove.
34956 (vshlq_x_n_s32): Remove.
34957 (vshlq_x_n_u8): Remove.
34958 (vshlq_x_n_u16): Remove.
34959 (vshlq_x_n_u32): Remove.
34960 (__arm_vshlq_s8): Remove.
34961 (__arm_vshlq_s16): Remove.
34962 (__arm_vshlq_s32): Remove.
34963 (__arm_vshlq_u8): Remove.
34964 (__arm_vshlq_u16): Remove.
34965 (__arm_vshlq_u32): Remove.
34966 (__arm_vshlq_r_u8): Remove.
34967 (__arm_vshlq_n_u8): Remove.
34968 (__arm_vshlq_r_s8): Remove.
34969 (__arm_vshlq_n_s8): Remove.
34970 (__arm_vshlq_r_u16): Remove.
34971 (__arm_vshlq_n_u16): Remove.
34972 (__arm_vshlq_r_s16): Remove.
34973 (__arm_vshlq_n_s16): Remove.
34974 (__arm_vshlq_r_u32): Remove.
34975 (__arm_vshlq_n_u32): Remove.
34976 (__arm_vshlq_r_s32): Remove.
34977 (__arm_vshlq_n_s32): Remove.
34978 (__arm_vshlq_m_r_u8): Remove.
34979 (__arm_vshlq_m_r_s8): Remove.
34980 (__arm_vshlq_m_r_u16): Remove.
34981 (__arm_vshlq_m_r_s16): Remove.
34982 (__arm_vshlq_m_r_u32): Remove.
34983 (__arm_vshlq_m_r_s32): Remove.
34984 (__arm_vshlq_m_u8): Remove.
34985 (__arm_vshlq_m_s8): Remove.
34986 (__arm_vshlq_m_u16): Remove.
34987 (__arm_vshlq_m_s16): Remove.
34988 (__arm_vshlq_m_u32): Remove.
34989 (__arm_vshlq_m_s32): Remove.
34990 (__arm_vshlq_m_n_s8): Remove.
34991 (__arm_vshlq_m_n_s32): Remove.
34992 (__arm_vshlq_m_n_s16): Remove.
34993 (__arm_vshlq_m_n_u8): Remove.
34994 (__arm_vshlq_m_n_u32): Remove.
34995 (__arm_vshlq_m_n_u16): Remove.
34996 (__arm_vshlq_x_s8): Remove.
34997 (__arm_vshlq_x_s16): Remove.
34998 (__arm_vshlq_x_s32): Remove.
34999 (__arm_vshlq_x_u8): Remove.
35000 (__arm_vshlq_x_u16): Remove.
35001 (__arm_vshlq_x_u32): Remove.
35002 (__arm_vshlq_x_n_s8): Remove.
35003 (__arm_vshlq_x_n_s16): Remove.
35004 (__arm_vshlq_x_n_s32): Remove.
35005 (__arm_vshlq_x_n_u8): Remove.
35006 (__arm_vshlq_x_n_u16): Remove.
35007 (__arm_vshlq_x_n_u32): Remove.
35008 (__arm_vshlq): Remove.
35009 (__arm_vshlq_r): Remove.
35010 (__arm_vshlq_n): Remove.
35011 (__arm_vshlq_m_r): Remove.
35012 (__arm_vshlq_m): Remove.
35013 (__arm_vshlq_m_n): Remove.
35014 (__arm_vshlq_x): Remove.
35015 (__arm_vshlq_x_n): Remove.
35017 (vqshlq_r): Remove.
35018 (vqshlq_n): Remove.
35019 (vqshlq_m_r): Remove.
35020 (vqshlq_m_n): Remove.
35021 (vqshlq_m): Remove.
35022 (vqshlq_u8): Remove.
35023 (vqshlq_r_u8): Remove.
35024 (vqshlq_n_u8): Remove.
35025 (vqshlq_s8): Remove.
35026 (vqshlq_r_s8): Remove.
35027 (vqshlq_n_s8): Remove.
35028 (vqshlq_u16): Remove.
35029 (vqshlq_r_u16): Remove.
35030 (vqshlq_n_u16): Remove.
35031 (vqshlq_s16): Remove.
35032 (vqshlq_r_s16): Remove.
35033 (vqshlq_n_s16): Remove.
35034 (vqshlq_u32): Remove.
35035 (vqshlq_r_u32): Remove.
35036 (vqshlq_n_u32): Remove.
35037 (vqshlq_s32): Remove.
35038 (vqshlq_r_s32): Remove.
35039 (vqshlq_n_s32): Remove.
35040 (vqshlq_m_r_u8): Remove.
35041 (vqshlq_m_r_s8): Remove.
35042 (vqshlq_m_r_u16): Remove.
35043 (vqshlq_m_r_s16): Remove.
35044 (vqshlq_m_r_u32): Remove.
35045 (vqshlq_m_r_s32): Remove.
35046 (vqshlq_m_n_s8): Remove.
35047 (vqshlq_m_n_s32): Remove.
35048 (vqshlq_m_n_s16): Remove.
35049 (vqshlq_m_n_u8): Remove.
35050 (vqshlq_m_n_u32): Remove.
35051 (vqshlq_m_n_u16): Remove.
35052 (vqshlq_m_s8): Remove.
35053 (vqshlq_m_s32): Remove.
35054 (vqshlq_m_s16): Remove.
35055 (vqshlq_m_u8): Remove.
35056 (vqshlq_m_u32): Remove.
35057 (vqshlq_m_u16): Remove.
35058 (__arm_vqshlq_u8): Remove.
35059 (__arm_vqshlq_r_u8): Remove.
35060 (__arm_vqshlq_n_u8): Remove.
35061 (__arm_vqshlq_s8): Remove.
35062 (__arm_vqshlq_r_s8): Remove.
35063 (__arm_vqshlq_n_s8): Remove.
35064 (__arm_vqshlq_u16): Remove.
35065 (__arm_vqshlq_r_u16): Remove.
35066 (__arm_vqshlq_n_u16): Remove.
35067 (__arm_vqshlq_s16): Remove.
35068 (__arm_vqshlq_r_s16): Remove.
35069 (__arm_vqshlq_n_s16): Remove.
35070 (__arm_vqshlq_u32): Remove.
35071 (__arm_vqshlq_r_u32): Remove.
35072 (__arm_vqshlq_n_u32): Remove.
35073 (__arm_vqshlq_s32): Remove.
35074 (__arm_vqshlq_r_s32): Remove.
35075 (__arm_vqshlq_n_s32): Remove.
35076 (__arm_vqshlq_m_r_u8): Remove.
35077 (__arm_vqshlq_m_r_s8): Remove.
35078 (__arm_vqshlq_m_r_u16): Remove.
35079 (__arm_vqshlq_m_r_s16): Remove.
35080 (__arm_vqshlq_m_r_u32): Remove.
35081 (__arm_vqshlq_m_r_s32): Remove.
35082 (__arm_vqshlq_m_n_s8): Remove.
35083 (__arm_vqshlq_m_n_s32): Remove.
35084 (__arm_vqshlq_m_n_s16): Remove.
35085 (__arm_vqshlq_m_n_u8): Remove.
35086 (__arm_vqshlq_m_n_u32): Remove.
35087 (__arm_vqshlq_m_n_u16): Remove.
35088 (__arm_vqshlq_m_s8): Remove.
35089 (__arm_vqshlq_m_s32): Remove.
35090 (__arm_vqshlq_m_s16): Remove.
35091 (__arm_vqshlq_m_u8): Remove.
35092 (__arm_vqshlq_m_u32): Remove.
35093 (__arm_vqshlq_m_u16): Remove.
35094 (__arm_vqshlq): Remove.
35095 (__arm_vqshlq_r): Remove.
35096 (__arm_vqshlq_n): Remove.
35097 (__arm_vqshlq_m_r): Remove.
35098 (__arm_vqshlq_m_n): Remove.
35099 (__arm_vqshlq_m): Remove.
35101 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35103 * config/arm/arm-mve-builtins-functions.h (class
35104 unspec_mve_function_exact_insn_vshl): New.
35106 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35108 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
35109 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
35111 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35113 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
35114 (finish_opt_n_resolution): Handle MODE_r.
35115 * config/arm/arm-mve-builtins.def (r): New mode.
35117 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35119 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
35120 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
35122 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35124 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
35126 * config/arm/arm-mve-builtins-base.def (vabdq): New.
35127 * config/arm/arm-mve-builtins-base.h (vabdq): New.
35128 * config/arm/arm_mve.h (vabdq): Remove.
35131 (vabdq_u8): Remove.
35132 (vabdq_s8): Remove.
35133 (vabdq_u16): Remove.
35134 (vabdq_s16): Remove.
35135 (vabdq_u32): Remove.
35136 (vabdq_s32): Remove.
35137 (vabdq_f16): Remove.
35138 (vabdq_f32): Remove.
35139 (vabdq_m_s8): Remove.
35140 (vabdq_m_s32): Remove.
35141 (vabdq_m_s16): Remove.
35142 (vabdq_m_u8): Remove.
35143 (vabdq_m_u32): Remove.
35144 (vabdq_m_u16): Remove.
35145 (vabdq_m_f32): Remove.
35146 (vabdq_m_f16): Remove.
35147 (vabdq_x_s8): Remove.
35148 (vabdq_x_s16): Remove.
35149 (vabdq_x_s32): Remove.
35150 (vabdq_x_u8): Remove.
35151 (vabdq_x_u16): Remove.
35152 (vabdq_x_u32): Remove.
35153 (vabdq_x_f16): Remove.
35154 (vabdq_x_f32): Remove.
35155 (__arm_vabdq_u8): Remove.
35156 (__arm_vabdq_s8): Remove.
35157 (__arm_vabdq_u16): Remove.
35158 (__arm_vabdq_s16): Remove.
35159 (__arm_vabdq_u32): Remove.
35160 (__arm_vabdq_s32): Remove.
35161 (__arm_vabdq_m_s8): Remove.
35162 (__arm_vabdq_m_s32): Remove.
35163 (__arm_vabdq_m_s16): Remove.
35164 (__arm_vabdq_m_u8): Remove.
35165 (__arm_vabdq_m_u32): Remove.
35166 (__arm_vabdq_m_u16): Remove.
35167 (__arm_vabdq_x_s8): Remove.
35168 (__arm_vabdq_x_s16): Remove.
35169 (__arm_vabdq_x_s32): Remove.
35170 (__arm_vabdq_x_u8): Remove.
35171 (__arm_vabdq_x_u16): Remove.
35172 (__arm_vabdq_x_u32): Remove.
35173 (__arm_vabdq_f16): Remove.
35174 (__arm_vabdq_f32): Remove.
35175 (__arm_vabdq_m_f32): Remove.
35176 (__arm_vabdq_m_f16): Remove.
35177 (__arm_vabdq_x_f16): Remove.
35178 (__arm_vabdq_x_f32): Remove.
35179 (__arm_vabdq): Remove.
35180 (__arm_vabdq_m): Remove.
35181 (__arm_vabdq_x): Remove.
35183 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35185 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
35186 (MVE_FP_VABDQ_ONLY): New.
35187 (mve_insn): Add vabd.
35188 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
35189 (@mve_<mve_insn>q_f<mode>): ... this.
35190 (mve_vabdq_m_f<mode>): Remove.
35192 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35194 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
35195 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
35196 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
35197 * config/arm/arm_mve.h (vqrdmulhq): Remove.
35198 (vqrdmulhq_m): Remove.
35199 (vqrdmulhq_s8): Remove.
35200 (vqrdmulhq_n_s8): Remove.
35201 (vqrdmulhq_s16): Remove.
35202 (vqrdmulhq_n_s16): Remove.
35203 (vqrdmulhq_s32): Remove.
35204 (vqrdmulhq_n_s32): Remove.
35205 (vqrdmulhq_m_n_s8): Remove.
35206 (vqrdmulhq_m_n_s32): Remove.
35207 (vqrdmulhq_m_n_s16): Remove.
35208 (vqrdmulhq_m_s8): Remove.
35209 (vqrdmulhq_m_s32): Remove.
35210 (vqrdmulhq_m_s16): Remove.
35211 (__arm_vqrdmulhq_s8): Remove.
35212 (__arm_vqrdmulhq_n_s8): Remove.
35213 (__arm_vqrdmulhq_s16): Remove.
35214 (__arm_vqrdmulhq_n_s16): Remove.
35215 (__arm_vqrdmulhq_s32): Remove.
35216 (__arm_vqrdmulhq_n_s32): Remove.
35217 (__arm_vqrdmulhq_m_n_s8): Remove.
35218 (__arm_vqrdmulhq_m_n_s32): Remove.
35219 (__arm_vqrdmulhq_m_n_s16): Remove.
35220 (__arm_vqrdmulhq_m_s8): Remove.
35221 (__arm_vqrdmulhq_m_s32): Remove.
35222 (__arm_vqrdmulhq_m_s16): Remove.
35223 (__arm_vqrdmulhq): Remove.
35224 (__arm_vqrdmulhq_m): Remove.
35226 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35228 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
35229 (MVE_SHIFT_N, MVE_SHIFT_R): New.
35230 (mve_insn): Add vqshl, vshl.
35231 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
35232 (mve_vshlq_n_<supf><mode>): Merge into ...
35233 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35234 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
35236 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
35237 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
35239 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
35240 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
35242 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35243 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
35245 (@mve_<mve_insn>q_<supf><mode>): ... this.
35247 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35249 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
35250 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
35251 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
35252 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
35254 * config/arm/arm_mve.h (vrshlq): Remove.
35255 (vrshlq_m_n): Remove.
35256 (vrshlq_m): Remove.
35257 (vrshlq_x): Remove.
35258 (vrshlq_u8): Remove.
35259 (vrshlq_n_u8): Remove.
35260 (vrshlq_s8): Remove.
35261 (vrshlq_n_s8): Remove.
35262 (vrshlq_u16): Remove.
35263 (vrshlq_n_u16): Remove.
35264 (vrshlq_s16): Remove.
35265 (vrshlq_n_s16): Remove.
35266 (vrshlq_u32): Remove.
35267 (vrshlq_n_u32): Remove.
35268 (vrshlq_s32): Remove.
35269 (vrshlq_n_s32): Remove.
35270 (vrshlq_m_n_u8): Remove.
35271 (vrshlq_m_n_s8): Remove.
35272 (vrshlq_m_n_u16): Remove.
35273 (vrshlq_m_n_s16): Remove.
35274 (vrshlq_m_n_u32): Remove.
35275 (vrshlq_m_n_s32): Remove.
35276 (vrshlq_m_s8): Remove.
35277 (vrshlq_m_s32): Remove.
35278 (vrshlq_m_s16): Remove.
35279 (vrshlq_m_u8): Remove.
35280 (vrshlq_m_u32): Remove.
35281 (vrshlq_m_u16): Remove.
35282 (vrshlq_x_s8): Remove.
35283 (vrshlq_x_s16): Remove.
35284 (vrshlq_x_s32): Remove.
35285 (vrshlq_x_u8): Remove.
35286 (vrshlq_x_u16): Remove.
35287 (vrshlq_x_u32): Remove.
35288 (__arm_vrshlq_u8): Remove.
35289 (__arm_vrshlq_n_u8): Remove.
35290 (__arm_vrshlq_s8): Remove.
35291 (__arm_vrshlq_n_s8): Remove.
35292 (__arm_vrshlq_u16): Remove.
35293 (__arm_vrshlq_n_u16): Remove.
35294 (__arm_vrshlq_s16): Remove.
35295 (__arm_vrshlq_n_s16): Remove.
35296 (__arm_vrshlq_u32): Remove.
35297 (__arm_vrshlq_n_u32): Remove.
35298 (__arm_vrshlq_s32): Remove.
35299 (__arm_vrshlq_n_s32): Remove.
35300 (__arm_vrshlq_m_n_u8): Remove.
35301 (__arm_vrshlq_m_n_s8): Remove.
35302 (__arm_vrshlq_m_n_u16): Remove.
35303 (__arm_vrshlq_m_n_s16): Remove.
35304 (__arm_vrshlq_m_n_u32): Remove.
35305 (__arm_vrshlq_m_n_s32): Remove.
35306 (__arm_vrshlq_m_s8): Remove.
35307 (__arm_vrshlq_m_s32): Remove.
35308 (__arm_vrshlq_m_s16): Remove.
35309 (__arm_vrshlq_m_u8): Remove.
35310 (__arm_vrshlq_m_u32): Remove.
35311 (__arm_vrshlq_m_u16): Remove.
35312 (__arm_vrshlq_x_s8): Remove.
35313 (__arm_vrshlq_x_s16): Remove.
35314 (__arm_vrshlq_x_s32): Remove.
35315 (__arm_vrshlq_x_u8): Remove.
35316 (__arm_vrshlq_x_u16): Remove.
35317 (__arm_vrshlq_x_u32): Remove.
35318 (__arm_vrshlq): Remove.
35319 (__arm_vrshlq_m_n): Remove.
35320 (__arm_vrshlq_m): Remove.
35321 (__arm_vrshlq_x): Remove.
35323 (vqrshlq_m_n): Remove.
35324 (vqrshlq_m): Remove.
35325 (vqrshlq_u8): Remove.
35326 (vqrshlq_n_u8): Remove.
35327 (vqrshlq_s8): Remove.
35328 (vqrshlq_n_s8): Remove.
35329 (vqrshlq_u16): Remove.
35330 (vqrshlq_n_u16): Remove.
35331 (vqrshlq_s16): Remove.
35332 (vqrshlq_n_s16): Remove.
35333 (vqrshlq_u32): Remove.
35334 (vqrshlq_n_u32): Remove.
35335 (vqrshlq_s32): Remove.
35336 (vqrshlq_n_s32): Remove.
35337 (vqrshlq_m_n_u8): Remove.
35338 (vqrshlq_m_n_s8): Remove.
35339 (vqrshlq_m_n_u16): Remove.
35340 (vqrshlq_m_n_s16): Remove.
35341 (vqrshlq_m_n_u32): Remove.
35342 (vqrshlq_m_n_s32): Remove.
35343 (vqrshlq_m_s8): Remove.
35344 (vqrshlq_m_s32): Remove.
35345 (vqrshlq_m_s16): Remove.
35346 (vqrshlq_m_u8): Remove.
35347 (vqrshlq_m_u32): Remove.
35348 (vqrshlq_m_u16): Remove.
35349 (__arm_vqrshlq_u8): Remove.
35350 (__arm_vqrshlq_n_u8): Remove.
35351 (__arm_vqrshlq_s8): Remove.
35352 (__arm_vqrshlq_n_s8): Remove.
35353 (__arm_vqrshlq_u16): Remove.
35354 (__arm_vqrshlq_n_u16): Remove.
35355 (__arm_vqrshlq_s16): Remove.
35356 (__arm_vqrshlq_n_s16): Remove.
35357 (__arm_vqrshlq_u32): Remove.
35358 (__arm_vqrshlq_n_u32): Remove.
35359 (__arm_vqrshlq_s32): Remove.
35360 (__arm_vqrshlq_n_s32): Remove.
35361 (__arm_vqrshlq_m_n_u8): Remove.
35362 (__arm_vqrshlq_m_n_s8): Remove.
35363 (__arm_vqrshlq_m_n_u16): Remove.
35364 (__arm_vqrshlq_m_n_s16): Remove.
35365 (__arm_vqrshlq_m_n_u32): Remove.
35366 (__arm_vqrshlq_m_n_s32): Remove.
35367 (__arm_vqrshlq_m_s8): Remove.
35368 (__arm_vqrshlq_m_s32): Remove.
35369 (__arm_vqrshlq_m_s16): Remove.
35370 (__arm_vqrshlq_m_u8): Remove.
35371 (__arm_vqrshlq_m_u32): Remove.
35372 (__arm_vqrshlq_m_u16): Remove.
35373 (__arm_vqrshlq): Remove.
35374 (__arm_vqrshlq_m_n): Remove.
35375 (__arm_vqrshlq_m): Remove.
35377 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35379 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
35380 (mve_insn): Add vqrshl, vrshl.
35381 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
35382 (mve_vrshlq_n_<supf><mode>): Merge into ...
35383 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35384 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
35386 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35388 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
35390 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
35391 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
35393 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35396 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
35397 denegrate PHI optmization.
35399 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
35401 * config/i386/predicates.md (register_no_SP_operand):
35402 Rename from index_register_operand.
35403 (call_register_operand): Update for rename.
35404 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
35406 2023-05-05 Tamar Christina <tamar.christina@arm.com>
35409 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
35410 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
35411 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
35412 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
35413 (s-match): Split into s-generic-match and s-gimple-match.
35414 * configure.ac (with-matchpd-partitions,
35415 DEFAULT_MATCHPD_PARTITIONS): New.
35416 * configure: Regenerate.
35418 2023-05-05 Tamar Christina <tamar.christina@arm.com>
35421 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
35422 (decision_tree::gen): Accept list of files instead of single and update
35423 to write function definition to header and main file.
35424 (write_predicate): Likewise.
35425 (write_header): Emit pragmas and new includes.
35426 (main): Create file buffers and cleanup.
35427 (showUsage, write_header_includes): New.
35429 2023-05-05 Tamar Christina <tamar.christina@arm.com>
35432 * Makefile.in (OBJS): Add gimple-match-exports.o.
35433 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
35434 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
35435 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
35436 gimple_resimplify5, constant_for_folding, convert_conditional_op,
35437 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
35438 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
35439 do_valueize, try_conditional_simplification, gimple_extract,
35440 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
35441 commutative_ternary_op_p, first_commutative_argument,
35442 associative_binary_op_p, directly_supported_p,
35443 get_conditional_internal_fn): Moved to gimple-match-exports.cc
35444 * gimple-match-exports.cc: New file.
35446 2023-05-05 Tamar Christina <tamar.christina@arm.com>
35449 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
35451 (dt_simplify::gen_1): Use it.
35453 2023-05-05 Tamar Christina <tamar.christina@arm.com>
35456 * genmatch.cc (output_line_directive): Only emit commented directive
35459 2023-05-05 Tamar Christina <tamar.christina@arm.com>
35462 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
35464 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
35466 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
35467 unused in_mode/in_n variables.
35469 2023-05-05 Richard Biener <rguenther@suse.de>
35471 PR tree-optimization/109735
35472 * tree-vect-stmts.cc (vectorizable_operation): Perform
35473 conversion for POINTER_DIFF_EXPR unconditionally.
35475 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
35477 * config/i386/mmx.md (mulv2si3): New expander.
35478 (*mulv2si3): New insn pattern.
35480 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
35481 Thomas Schwinge <thomas@codesourcery.com>
35484 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
35485 alongside reverse-offload function table to prevent NULL values
35486 of the function addresses.
35488 2023-05-05 Jakub Jelinek <jakub@redhat.com>
35490 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
35492 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
35494 2023-05-05 Andrew Pinski <apinski@marvell.com>
35496 PR tree-optimization/109732
35497 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
35498 of the argtrue/argfalse.
35500 2023-05-05 Andrew Pinski <apinski@marvell.com>
35502 PR tree-optimization/109722
35503 * match.pd: Extend the `ABS<a> == 0` pattern
35504 to cover `ABSU<a> == 0` too.
35506 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
35509 * config/i386/predicates.md (index_reg_operand): New predicate.
35510 * config/i386/i386.md (ashift to lea spliter): Use
35511 general_reg_operand and index_reg_operand predicates.
35513 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35515 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
35516 Rename and reimplement with RTL codes to...
35517 (aarch64_<optab>hn2<mode>_insn_le): .. This.
35518 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
35519 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
35521 (aarch64_<optab>hn2<mode>_insn_be): ... This.
35522 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
35523 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
35524 (aarch64_<optab>hn2<mode>): ... This.
35525 (aarch64_r<optab>hn2<mode>): New expander.
35526 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
35527 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
35528 (ADDSUBHN): Delete.
35529 (sur): Remove handling of the above.
35530 (addsub): Likewise.
35532 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35534 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
35536 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
35537 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
35538 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
35539 (aarch64_<sur><addsub>hn<mode>): Delete.
35540 (aarch64_<optab>hn<mode>): New define_expand.
35541 (aarch64_r<optab>hn<mode>): Likewise.
35542 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
35545 2023-05-04 Andrew Pinski <apinski@marvell.com>
35547 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
35548 diamond form bb with forwarder only empty blocks better.
35550 2023-05-04 Andrew Pinski <apinski@marvell.com>
35552 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
35553 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
35554 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
35555 of an inline version of it.
35556 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
35557 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
35559 2023-05-04 Andrew Pinski <apinski@marvell.com>
35561 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
35562 the default argument value for dce_ssa_names to nullptr.
35563 Check to make sure dce_ssa_names is a non-nullptr before
35564 calling simple_dce_from_worklist.
35566 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
35568 * config/i386/predicates.md (index_register_operand): Reject
35569 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
35570 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
35571 (call_register_no_elim_operand): Rewrite as ...
35572 (call_register_operand): ... this.
35573 (call_insn_operand): Use call_register_operand predicate.
35575 2023-05-04 Richard Biener <rguenther@suse.de>
35577 PR tree-optimization/109721
35578 * tree-vect-stmts.cc (vectorizable_operation): Make sure
35579 to test word_mode for all !target_support_p operations.
35581 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35584 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
35585 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
35586 (aarch64_mla<mode>): Rename to...
35587 (aarch64_mla<mode><vczle><vczbe>): ... This.
35588 (*aarch64_mla_elt<mode>): Rename to...
35589 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
35590 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
35591 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
35592 (aarch64_mla_n<mode>): Rename to...
35593 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
35594 (aarch64_mls<mode>): Rename to...
35595 (aarch64_mls<mode><vczle><vczbe>): ... This.
35596 (*aarch64_mls_elt<mode>): Rename to...
35597 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
35598 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
35599 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
35600 (aarch64_mls_n<mode>): Rename to...
35601 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
35602 (fma<mode>4): Rename to...
35603 (fma<mode>4<vczle><vczbe>): ... This.
35604 (*aarch64_fma4_elt<mode>): Rename to...
35605 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
35606 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
35607 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
35608 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
35609 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
35610 (fnma<mode>4): Rename to...
35611 (fnma<mode>4<vczle><vczbe>): ... This.
35612 (*aarch64_fnma4_elt<mode>): Rename to...
35613 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
35614 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
35615 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
35616 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
35617 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
35618 (aarch64_simd_bsl<mode>_internal): Rename to...
35619 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
35620 (*aarch64_simd_bsl<mode>_alt): Rename to...
35621 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
35623 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35626 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
35627 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
35628 (fabd<mode>3): Rename to...
35629 (fabd<mode>3<vczle><vczbe>): ... This.
35630 (aarch64_<optab>p<mode>): Rename to...
35631 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
35632 (aarch64_faddp<mode>): Rename to...
35633 (aarch64_faddp<mode><vczle><vczbe>): ... This.
35635 2023-05-04 Martin Liska <mliska@suse.cz>
35637 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
35638 (print_version): Use it.
35639 (generate_results): Likewise.
35641 2023-05-04 Richard Biener <rguenther@suse.de>
35643 * tree-cfg.h (last_stmt): Rename to ...
35644 (last_nondebug_stmt): ... this.
35645 * tree-cfg.cc (last_stmt): Rename to ...
35646 (last_nondebug_stmt): ... this.
35647 (assign_discriminators): Adjust.
35648 (group_case_labels_stmt): Likewise.
35649 (gimple_can_duplicate_bb_p): Likewise.
35650 (execute_fixup_cfg): Likewise.
35651 * auto-profile.cc (afdo_propagate_circuit): Likewise.
35652 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
35653 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
35654 (determine_parallel_type): Likewise.
35655 (adjust_context_and_scope): Likewise.
35656 (expand_task_call): Likewise.
35657 (remove_exit_barrier): Likewise.
35658 (expand_omp_taskreg): Likewise.
35659 (expand_omp_for_init_counts): Likewise.
35660 (expand_omp_for_init_vars): Likewise.
35661 (expand_omp_for_static_chunk): Likewise.
35662 (expand_omp_simd): Likewise.
35663 (expand_oacc_for): Likewise.
35664 (expand_omp_for): Likewise.
35665 (expand_omp_sections): Likewise.
35666 (expand_omp_atomic_fetch_op): Likewise.
35667 (expand_omp_atomic_cas): Likewise.
35668 (expand_omp_atomic): Likewise.
35669 (expand_omp_target): Likewise.
35670 (expand_omp): Likewise.
35671 (omp_make_gimple_edges): Likewise.
35672 * trans-mem.cc (tm_region_init): Likewise.
35673 * tree-inline.cc (redirect_all_calls): Likewise.
35674 * tree-parloops.cc (gen_parallel_loop): Likewise.
35675 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
35676 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
35678 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
35679 (may_eliminate_iv): Likewise.
35680 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
35681 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
35683 (estimate_numbers_of_iterations): Likewise.
35684 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
35685 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
35686 (set_predicates_for_bb): Likewise.
35687 (init_loop_unswitch_info): Likewise.
35688 (hoist_guard): Likewise.
35689 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
35690 (minmax_replacement): Likewise.
35691 * tree-ssa-reassoc.cc (update_range_test): Likewise.
35692 (optimize_range_tests_to_bit_test): Likewise.
35693 (optimize_range_tests_var_bound): Likewise.
35694 (optimize_range_tests): Likewise.
35695 (no_side_effect_bb): Likewise.
35696 (suitable_cond_bb): Likewise.
35697 (maybe_optimize_range_tests): Likewise.
35698 (reassociate_bb): Likewise.
35699 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
35701 2023-05-04 Jakub Jelinek <jakub@redhat.com>
35704 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
35705 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
35706 for it only if it still has TImode. Don't decide whether to call
35707 fix_debug_reg_uses based on whether SRC is ever set or not.
35709 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
35711 * config/cris/cris.cc (cris_split_constant): New function.
35712 * config/cris/cris.md (splitop): New iterator.
35713 (opsplit1): New define_peephole2.
35714 * config/cris/cris-protos.h (cris_split_constant): Declare.
35715 (cris_splittable_constant_p): New macro.
35717 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
35719 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
35722 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
35724 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
35725 lra_in_progress, not reload_in_progress.
35726 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
35727 * config/cris/constraints.md ("Q"): Ditto.
35729 2023-05-03 Andrew Pinski <apinski@marvell.com>
35731 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
35732 stats on removed number of statements and phis.
35734 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
35736 PR tree-optimization/109711
35737 * value-range.cc (irange::verify_range): Allow types of
35740 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
35743 * calls.cc (can_implement_as_sibling_call_p): Reject calls
35744 to __sanitizer_cov_trace_pc.
35746 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
35749 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
35750 a new ABI break parameter for GCC 14. Set it to the alignment
35751 of enums that have an underlying type. Take the true alignment
35752 of such enums from the TYPE_ALIGN of the underlying type's
35754 (aarch64_function_arg_boundary): Update accordingly.
35755 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
35756 Warn about ABI differences.
35758 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
35761 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
35762 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
35763 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
35764 (aarch64_gimplify_va_arg_expr): Likewise.
35766 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35768 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
35769 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
35770 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
35772 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
35773 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
35774 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
35775 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
35776 * config/arm/arm_mve.h (vhsubq): Remove.
35778 (vhaddq_m): Remove.
35779 (vhsubq_m): Remove.
35780 (vhaddq_x): Remove.
35781 (vhsubq_x): Remove.
35782 (vhsubq_u8): Remove.
35783 (vhsubq_n_u8): Remove.
35784 (vhaddq_u8): Remove.
35785 (vhaddq_n_u8): Remove.
35786 (vhsubq_s8): Remove.
35787 (vhsubq_n_s8): Remove.
35788 (vhaddq_s8): Remove.
35789 (vhaddq_n_s8): Remove.
35790 (vhsubq_u16): Remove.
35791 (vhsubq_n_u16): Remove.
35792 (vhaddq_u16): Remove.
35793 (vhaddq_n_u16): Remove.
35794 (vhsubq_s16): Remove.
35795 (vhsubq_n_s16): Remove.
35796 (vhaddq_s16): Remove.
35797 (vhaddq_n_s16): Remove.
35798 (vhsubq_u32): Remove.
35799 (vhsubq_n_u32): Remove.
35800 (vhaddq_u32): Remove.
35801 (vhaddq_n_u32): Remove.
35802 (vhsubq_s32): Remove.
35803 (vhsubq_n_s32): Remove.
35804 (vhaddq_s32): Remove.
35805 (vhaddq_n_s32): Remove.
35806 (vhaddq_m_n_s8): Remove.
35807 (vhaddq_m_n_s32): Remove.
35808 (vhaddq_m_n_s16): Remove.
35809 (vhaddq_m_n_u8): Remove.
35810 (vhaddq_m_n_u32): Remove.
35811 (vhaddq_m_n_u16): Remove.
35812 (vhaddq_m_s8): Remove.
35813 (vhaddq_m_s32): Remove.
35814 (vhaddq_m_s16): Remove.
35815 (vhaddq_m_u8): Remove.
35816 (vhaddq_m_u32): Remove.
35817 (vhaddq_m_u16): Remove.
35818 (vhsubq_m_n_s8): Remove.
35819 (vhsubq_m_n_s32): Remove.
35820 (vhsubq_m_n_s16): Remove.
35821 (vhsubq_m_n_u8): Remove.
35822 (vhsubq_m_n_u32): Remove.
35823 (vhsubq_m_n_u16): Remove.
35824 (vhsubq_m_s8): Remove.
35825 (vhsubq_m_s32): Remove.
35826 (vhsubq_m_s16): Remove.
35827 (vhsubq_m_u8): Remove.
35828 (vhsubq_m_u32): Remove.
35829 (vhsubq_m_u16): Remove.
35830 (vhaddq_x_n_s8): Remove.
35831 (vhaddq_x_n_s16): Remove.
35832 (vhaddq_x_n_s32): Remove.
35833 (vhaddq_x_n_u8): Remove.
35834 (vhaddq_x_n_u16): Remove.
35835 (vhaddq_x_n_u32): Remove.
35836 (vhaddq_x_s8): Remove.
35837 (vhaddq_x_s16): Remove.
35838 (vhaddq_x_s32): Remove.
35839 (vhaddq_x_u8): Remove.
35840 (vhaddq_x_u16): Remove.
35841 (vhaddq_x_u32): Remove.
35842 (vhsubq_x_n_s8): Remove.
35843 (vhsubq_x_n_s16): Remove.
35844 (vhsubq_x_n_s32): Remove.
35845 (vhsubq_x_n_u8): Remove.
35846 (vhsubq_x_n_u16): Remove.
35847 (vhsubq_x_n_u32): Remove.
35848 (vhsubq_x_s8): Remove.
35849 (vhsubq_x_s16): Remove.
35850 (vhsubq_x_s32): Remove.
35851 (vhsubq_x_u8): Remove.
35852 (vhsubq_x_u16): Remove.
35853 (vhsubq_x_u32): Remove.
35854 (__arm_vhsubq_u8): Remove.
35855 (__arm_vhsubq_n_u8): Remove.
35856 (__arm_vhaddq_u8): Remove.
35857 (__arm_vhaddq_n_u8): Remove.
35858 (__arm_vhsubq_s8): Remove.
35859 (__arm_vhsubq_n_s8): Remove.
35860 (__arm_vhaddq_s8): Remove.
35861 (__arm_vhaddq_n_s8): Remove.
35862 (__arm_vhsubq_u16): Remove.
35863 (__arm_vhsubq_n_u16): Remove.
35864 (__arm_vhaddq_u16): Remove.
35865 (__arm_vhaddq_n_u16): Remove.
35866 (__arm_vhsubq_s16): Remove.
35867 (__arm_vhsubq_n_s16): Remove.
35868 (__arm_vhaddq_s16): Remove.
35869 (__arm_vhaddq_n_s16): Remove.
35870 (__arm_vhsubq_u32): Remove.
35871 (__arm_vhsubq_n_u32): Remove.
35872 (__arm_vhaddq_u32): Remove.
35873 (__arm_vhaddq_n_u32): Remove.
35874 (__arm_vhsubq_s32): Remove.
35875 (__arm_vhsubq_n_s32): Remove.
35876 (__arm_vhaddq_s32): Remove.
35877 (__arm_vhaddq_n_s32): Remove.
35878 (__arm_vhaddq_m_n_s8): Remove.
35879 (__arm_vhaddq_m_n_s32): Remove.
35880 (__arm_vhaddq_m_n_s16): Remove.
35881 (__arm_vhaddq_m_n_u8): Remove.
35882 (__arm_vhaddq_m_n_u32): Remove.
35883 (__arm_vhaddq_m_n_u16): Remove.
35884 (__arm_vhaddq_m_s8): Remove.
35885 (__arm_vhaddq_m_s32): Remove.
35886 (__arm_vhaddq_m_s16): Remove.
35887 (__arm_vhaddq_m_u8): Remove.
35888 (__arm_vhaddq_m_u32): Remove.
35889 (__arm_vhaddq_m_u16): Remove.
35890 (__arm_vhsubq_m_n_s8): Remove.
35891 (__arm_vhsubq_m_n_s32): Remove.
35892 (__arm_vhsubq_m_n_s16): Remove.
35893 (__arm_vhsubq_m_n_u8): Remove.
35894 (__arm_vhsubq_m_n_u32): Remove.
35895 (__arm_vhsubq_m_n_u16): Remove.
35896 (__arm_vhsubq_m_s8): Remove.
35897 (__arm_vhsubq_m_s32): Remove.
35898 (__arm_vhsubq_m_s16): Remove.
35899 (__arm_vhsubq_m_u8): Remove.
35900 (__arm_vhsubq_m_u32): Remove.
35901 (__arm_vhsubq_m_u16): Remove.
35902 (__arm_vhaddq_x_n_s8): Remove.
35903 (__arm_vhaddq_x_n_s16): Remove.
35904 (__arm_vhaddq_x_n_s32): Remove.
35905 (__arm_vhaddq_x_n_u8): Remove.
35906 (__arm_vhaddq_x_n_u16): Remove.
35907 (__arm_vhaddq_x_n_u32): Remove.
35908 (__arm_vhaddq_x_s8): Remove.
35909 (__arm_vhaddq_x_s16): Remove.
35910 (__arm_vhaddq_x_s32): Remove.
35911 (__arm_vhaddq_x_u8): Remove.
35912 (__arm_vhaddq_x_u16): Remove.
35913 (__arm_vhaddq_x_u32): Remove.
35914 (__arm_vhsubq_x_n_s8): Remove.
35915 (__arm_vhsubq_x_n_s16): Remove.
35916 (__arm_vhsubq_x_n_s32): Remove.
35917 (__arm_vhsubq_x_n_u8): Remove.
35918 (__arm_vhsubq_x_n_u16): Remove.
35919 (__arm_vhsubq_x_n_u32): Remove.
35920 (__arm_vhsubq_x_s8): Remove.
35921 (__arm_vhsubq_x_s16): Remove.
35922 (__arm_vhsubq_x_s32): Remove.
35923 (__arm_vhsubq_x_u8): Remove.
35924 (__arm_vhsubq_x_u16): Remove.
35925 (__arm_vhsubq_x_u32): Remove.
35926 (__arm_vhsubq): Remove.
35927 (__arm_vhaddq): Remove.
35928 (__arm_vhaddq_m): Remove.
35929 (__arm_vhsubq_m): Remove.
35930 (__arm_vhaddq_x): Remove.
35931 (__arm_vhsubq_x): Remove.
35933 (vmulhq_m): Remove.
35934 (vmulhq_x): Remove.
35935 (vmulhq_u8): Remove.
35936 (vmulhq_s8): Remove.
35937 (vmulhq_u16): Remove.
35938 (vmulhq_s16): Remove.
35939 (vmulhq_u32): Remove.
35940 (vmulhq_s32): Remove.
35941 (vmulhq_m_s8): Remove.
35942 (vmulhq_m_s32): Remove.
35943 (vmulhq_m_s16): Remove.
35944 (vmulhq_m_u8): Remove.
35945 (vmulhq_m_u32): Remove.
35946 (vmulhq_m_u16): Remove.
35947 (vmulhq_x_s8): Remove.
35948 (vmulhq_x_s16): Remove.
35949 (vmulhq_x_s32): Remove.
35950 (vmulhq_x_u8): Remove.
35951 (vmulhq_x_u16): Remove.
35952 (vmulhq_x_u32): Remove.
35953 (__arm_vmulhq_u8): Remove.
35954 (__arm_vmulhq_s8): Remove.
35955 (__arm_vmulhq_u16): Remove.
35956 (__arm_vmulhq_s16): Remove.
35957 (__arm_vmulhq_u32): Remove.
35958 (__arm_vmulhq_s32): Remove.
35959 (__arm_vmulhq_m_s8): Remove.
35960 (__arm_vmulhq_m_s32): Remove.
35961 (__arm_vmulhq_m_s16): Remove.
35962 (__arm_vmulhq_m_u8): Remove.
35963 (__arm_vmulhq_m_u32): Remove.
35964 (__arm_vmulhq_m_u16): Remove.
35965 (__arm_vmulhq_x_s8): Remove.
35966 (__arm_vmulhq_x_s16): Remove.
35967 (__arm_vmulhq_x_s32): Remove.
35968 (__arm_vmulhq_x_u8): Remove.
35969 (__arm_vmulhq_x_u16): Remove.
35970 (__arm_vmulhq_x_u32): Remove.
35971 (__arm_vmulhq): Remove.
35972 (__arm_vmulhq_m): Remove.
35973 (__arm_vmulhq_x): Remove.
35976 (vqaddq_m): Remove.
35977 (vqsubq_m): Remove.
35978 (vqsubq_u8): Remove.
35979 (vqsubq_n_u8): Remove.
35980 (vqaddq_u8): Remove.
35981 (vqaddq_n_u8): Remove.
35982 (vqsubq_s8): Remove.
35983 (vqsubq_n_s8): Remove.
35984 (vqaddq_s8): Remove.
35985 (vqaddq_n_s8): Remove.
35986 (vqsubq_u16): Remove.
35987 (vqsubq_n_u16): Remove.
35988 (vqaddq_u16): Remove.
35989 (vqaddq_n_u16): Remove.
35990 (vqsubq_s16): Remove.
35991 (vqsubq_n_s16): Remove.
35992 (vqaddq_s16): Remove.
35993 (vqaddq_n_s16): Remove.
35994 (vqsubq_u32): Remove.
35995 (vqsubq_n_u32): Remove.
35996 (vqaddq_u32): Remove.
35997 (vqaddq_n_u32): Remove.
35998 (vqsubq_s32): Remove.
35999 (vqsubq_n_s32): Remove.
36000 (vqaddq_s32): Remove.
36001 (vqaddq_n_s32): Remove.
36002 (vqaddq_m_n_s8): Remove.
36003 (vqaddq_m_n_s32): Remove.
36004 (vqaddq_m_n_s16): Remove.
36005 (vqaddq_m_n_u8): Remove.
36006 (vqaddq_m_n_u32): Remove.
36007 (vqaddq_m_n_u16): Remove.
36008 (vqaddq_m_s8): Remove.
36009 (vqaddq_m_s32): Remove.
36010 (vqaddq_m_s16): Remove.
36011 (vqaddq_m_u8): Remove.
36012 (vqaddq_m_u32): Remove.
36013 (vqaddq_m_u16): Remove.
36014 (vqsubq_m_n_s8): Remove.
36015 (vqsubq_m_n_s32): Remove.
36016 (vqsubq_m_n_s16): Remove.
36017 (vqsubq_m_n_u8): Remove.
36018 (vqsubq_m_n_u32): Remove.
36019 (vqsubq_m_n_u16): Remove.
36020 (vqsubq_m_s8): Remove.
36021 (vqsubq_m_s32): Remove.
36022 (vqsubq_m_s16): Remove.
36023 (vqsubq_m_u8): Remove.
36024 (vqsubq_m_u32): Remove.
36025 (vqsubq_m_u16): Remove.
36026 (__arm_vqsubq_u8): Remove.
36027 (__arm_vqsubq_n_u8): Remove.
36028 (__arm_vqaddq_u8): Remove.
36029 (__arm_vqaddq_n_u8): Remove.
36030 (__arm_vqsubq_s8): Remove.
36031 (__arm_vqsubq_n_s8): Remove.
36032 (__arm_vqaddq_s8): Remove.
36033 (__arm_vqaddq_n_s8): Remove.
36034 (__arm_vqsubq_u16): Remove.
36035 (__arm_vqsubq_n_u16): Remove.
36036 (__arm_vqaddq_u16): Remove.
36037 (__arm_vqaddq_n_u16): Remove.
36038 (__arm_vqsubq_s16): Remove.
36039 (__arm_vqsubq_n_s16): Remove.
36040 (__arm_vqaddq_s16): Remove.
36041 (__arm_vqaddq_n_s16): Remove.
36042 (__arm_vqsubq_u32): Remove.
36043 (__arm_vqsubq_n_u32): Remove.
36044 (__arm_vqaddq_u32): Remove.
36045 (__arm_vqaddq_n_u32): Remove.
36046 (__arm_vqsubq_s32): Remove.
36047 (__arm_vqsubq_n_s32): Remove.
36048 (__arm_vqaddq_s32): Remove.
36049 (__arm_vqaddq_n_s32): Remove.
36050 (__arm_vqaddq_m_n_s8): Remove.
36051 (__arm_vqaddq_m_n_s32): Remove.
36052 (__arm_vqaddq_m_n_s16): Remove.
36053 (__arm_vqaddq_m_n_u8): Remove.
36054 (__arm_vqaddq_m_n_u32): Remove.
36055 (__arm_vqaddq_m_n_u16): Remove.
36056 (__arm_vqaddq_m_s8): Remove.
36057 (__arm_vqaddq_m_s32): Remove.
36058 (__arm_vqaddq_m_s16): Remove.
36059 (__arm_vqaddq_m_u8): Remove.
36060 (__arm_vqaddq_m_u32): Remove.
36061 (__arm_vqaddq_m_u16): Remove.
36062 (__arm_vqsubq_m_n_s8): Remove.
36063 (__arm_vqsubq_m_n_s32): Remove.
36064 (__arm_vqsubq_m_n_s16): Remove.
36065 (__arm_vqsubq_m_n_u8): Remove.
36066 (__arm_vqsubq_m_n_u32): Remove.
36067 (__arm_vqsubq_m_n_u16): Remove.
36068 (__arm_vqsubq_m_s8): Remove.
36069 (__arm_vqsubq_m_s32): Remove.
36070 (__arm_vqsubq_m_s16): Remove.
36071 (__arm_vqsubq_m_u8): Remove.
36072 (__arm_vqsubq_m_u32): Remove.
36073 (__arm_vqsubq_m_u16): Remove.
36074 (__arm_vqsubq): Remove.
36075 (__arm_vqaddq): Remove.
36076 (__arm_vqaddq_m): Remove.
36077 (__arm_vqsubq_m): Remove.
36078 (vqdmulhq): Remove.
36079 (vqdmulhq_m): Remove.
36080 (vqdmulhq_s8): Remove.
36081 (vqdmulhq_n_s8): Remove.
36082 (vqdmulhq_s16): Remove.
36083 (vqdmulhq_n_s16): Remove.
36084 (vqdmulhq_s32): Remove.
36085 (vqdmulhq_n_s32): Remove.
36086 (vqdmulhq_m_n_s8): Remove.
36087 (vqdmulhq_m_n_s32): Remove.
36088 (vqdmulhq_m_n_s16): Remove.
36089 (vqdmulhq_m_s8): Remove.
36090 (vqdmulhq_m_s32): Remove.
36091 (vqdmulhq_m_s16): Remove.
36092 (__arm_vqdmulhq_s8): Remove.
36093 (__arm_vqdmulhq_n_s8): Remove.
36094 (__arm_vqdmulhq_s16): Remove.
36095 (__arm_vqdmulhq_n_s16): Remove.
36096 (__arm_vqdmulhq_s32): Remove.
36097 (__arm_vqdmulhq_n_s32): Remove.
36098 (__arm_vqdmulhq_m_n_s8): Remove.
36099 (__arm_vqdmulhq_m_n_s32): Remove.
36100 (__arm_vqdmulhq_m_n_s16): Remove.
36101 (__arm_vqdmulhq_m_s8): Remove.
36102 (__arm_vqdmulhq_m_s32): Remove.
36103 (__arm_vqdmulhq_m_s16): Remove.
36104 (__arm_vqdmulhq): Remove.
36105 (__arm_vqdmulhq_m): Remove.
36107 (vrhaddq_m): Remove.
36108 (vrhaddq_x): Remove.
36109 (vrhaddq_u8): Remove.
36110 (vrhaddq_s8): Remove.
36111 (vrhaddq_u16): Remove.
36112 (vrhaddq_s16): Remove.
36113 (vrhaddq_u32): Remove.
36114 (vrhaddq_s32): Remove.
36115 (vrhaddq_m_s8): Remove.
36116 (vrhaddq_m_s32): Remove.
36117 (vrhaddq_m_s16): Remove.
36118 (vrhaddq_m_u8): Remove.
36119 (vrhaddq_m_u32): Remove.
36120 (vrhaddq_m_u16): Remove.
36121 (vrhaddq_x_s8): Remove.
36122 (vrhaddq_x_s16): Remove.
36123 (vrhaddq_x_s32): Remove.
36124 (vrhaddq_x_u8): Remove.
36125 (vrhaddq_x_u16): Remove.
36126 (vrhaddq_x_u32): Remove.
36127 (__arm_vrhaddq_u8): Remove.
36128 (__arm_vrhaddq_s8): Remove.
36129 (__arm_vrhaddq_u16): Remove.
36130 (__arm_vrhaddq_s16): Remove.
36131 (__arm_vrhaddq_u32): Remove.
36132 (__arm_vrhaddq_s32): Remove.
36133 (__arm_vrhaddq_m_s8): Remove.
36134 (__arm_vrhaddq_m_s32): Remove.
36135 (__arm_vrhaddq_m_s16): Remove.
36136 (__arm_vrhaddq_m_u8): Remove.
36137 (__arm_vrhaddq_m_u32): Remove.
36138 (__arm_vrhaddq_m_u16): Remove.
36139 (__arm_vrhaddq_x_s8): Remove.
36140 (__arm_vrhaddq_x_s16): Remove.
36141 (__arm_vrhaddq_x_s32): Remove.
36142 (__arm_vrhaddq_x_u8): Remove.
36143 (__arm_vrhaddq_x_u16): Remove.
36144 (__arm_vrhaddq_x_u32): Remove.
36145 (__arm_vrhaddq): Remove.
36146 (__arm_vrhaddq_m): Remove.
36147 (__arm_vrhaddq_x): Remove.
36149 (vrmulhq_m): Remove.
36150 (vrmulhq_x): Remove.
36151 (vrmulhq_u8): Remove.
36152 (vrmulhq_s8): Remove.
36153 (vrmulhq_u16): Remove.
36154 (vrmulhq_s16): Remove.
36155 (vrmulhq_u32): Remove.
36156 (vrmulhq_s32): Remove.
36157 (vrmulhq_m_s8): Remove.
36158 (vrmulhq_m_s32): Remove.
36159 (vrmulhq_m_s16): Remove.
36160 (vrmulhq_m_u8): Remove.
36161 (vrmulhq_m_u32): Remove.
36162 (vrmulhq_m_u16): Remove.
36163 (vrmulhq_x_s8): Remove.
36164 (vrmulhq_x_s16): Remove.
36165 (vrmulhq_x_s32): Remove.
36166 (vrmulhq_x_u8): Remove.
36167 (vrmulhq_x_u16): Remove.
36168 (vrmulhq_x_u32): Remove.
36169 (__arm_vrmulhq_u8): Remove.
36170 (__arm_vrmulhq_s8): Remove.
36171 (__arm_vrmulhq_u16): Remove.
36172 (__arm_vrmulhq_s16): Remove.
36173 (__arm_vrmulhq_u32): Remove.
36174 (__arm_vrmulhq_s32): Remove.
36175 (__arm_vrmulhq_m_s8): Remove.
36176 (__arm_vrmulhq_m_s32): Remove.
36177 (__arm_vrmulhq_m_s16): Remove.
36178 (__arm_vrmulhq_m_u8): Remove.
36179 (__arm_vrmulhq_m_u32): Remove.
36180 (__arm_vrmulhq_m_u16): Remove.
36181 (__arm_vrmulhq_x_s8): Remove.
36182 (__arm_vrmulhq_x_s16): Remove.
36183 (__arm_vrmulhq_x_s32): Remove.
36184 (__arm_vrmulhq_x_u8): Remove.
36185 (__arm_vrmulhq_x_u16): Remove.
36186 (__arm_vrmulhq_x_u32): Remove.
36187 (__arm_vrmulhq): Remove.
36188 (__arm_vrmulhq_m): Remove.
36189 (__arm_vrmulhq_x): Remove.
36191 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36193 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
36194 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
36195 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
36196 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
36197 * config/arm/mve.md (mve_vabdq_<supf><mode>)
36198 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
36199 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
36200 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
36201 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
36202 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
36203 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
36205 (@mve_<mve_insn>q_<supf><mode>): ... this.
36206 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
36207 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
36208 gen_mve_vhaddq / gen_mve_vrhaddq.
36210 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36212 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
36213 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
36214 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
36215 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
36216 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
36217 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
36218 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
36219 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
36220 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
36221 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
36222 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
36223 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
36224 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36226 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36228 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
36229 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
36231 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
36232 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
36233 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
36234 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
36235 (mve_vqsubq_n_<supf><mode>): Merge into ...
36236 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36238 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36240 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
36241 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
36242 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
36243 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
36244 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
36245 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
36246 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
36247 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
36248 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
36249 (mve_vshlq_m_<supf><mode>): Merged into
36250 @mve_<mve_insn>q_m_<supf><mode>.
36251 (mve_vabdq_m_<supf><mode>): Likewise.
36252 (mve_vhaddq_m_<supf><mode>): Likewise.
36253 (mve_vhsubq_m_<supf><mode>): Likewise.
36254 (mve_vmaxq_m_<supf><mode>): Likewise.
36255 (mve_vminq_m_<supf><mode>): Likewise.
36256 (mve_vmulhq_m_<supf><mode>): Likewise.
36257 (mve_vqaddq_m_<supf><mode>): Likewise.
36258 (mve_vqrshlq_m_<supf><mode>): Likewise.
36259 (mve_vqshlq_m_<supf><mode>): Likewise.
36260 (mve_vqsubq_m_<supf><mode>): Likewise.
36261 (mve_vrhaddq_m_<supf><mode>): Likewise.
36262 (mve_vrmulhq_m_<supf><mode>): Likewise.
36263 (mve_vrshlq_m_<supf><mode>): Likewise.
36264 (mve_vqdmladhq_m_s<mode>): Likewise.
36265 (mve_vqdmladhxq_m_s<mode>): Likewise.
36266 (mve_vqdmlsdhq_m_s<mode>): Likewise.
36267 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
36268 (mve_vqdmulhq_m_s<mode>): Likewise.
36269 (mve_vqrdmladhq_m_s<mode>): Likewise.
36270 (mve_vqrdmladhxq_m_s<mode>): Likewise.
36271 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
36272 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
36273 (mve_vqrdmulhq_m_s<mode>): Likewise.
36275 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36277 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
36278 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
36279 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
36280 * config/arm/arm_mve.h (vcreateq_f16): Remove.
36281 (vcreateq_f32): Remove.
36282 (vcreateq_u8): Remove.
36283 (vcreateq_u16): Remove.
36284 (vcreateq_u32): Remove.
36285 (vcreateq_u64): Remove.
36286 (vcreateq_s8): Remove.
36287 (vcreateq_s16): Remove.
36288 (vcreateq_s32): Remove.
36289 (vcreateq_s64): Remove.
36290 (__arm_vcreateq_u8): Remove.
36291 (__arm_vcreateq_u16): Remove.
36292 (__arm_vcreateq_u32): Remove.
36293 (__arm_vcreateq_u64): Remove.
36294 (__arm_vcreateq_s8): Remove.
36295 (__arm_vcreateq_s16): Remove.
36296 (__arm_vcreateq_s32): Remove.
36297 (__arm_vcreateq_s64): Remove.
36298 (__arm_vcreateq_f16): Remove.
36299 (__arm_vcreateq_f32): Remove.
36301 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36303 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
36304 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
36305 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
36306 (@mve_<mve_insn>q_f<mode>): ... this.
36307 (mve_vcreateq_<supf><mode>): Rename into ...
36308 (@mve_<mve_insn>q_<supf><mode>): ... this.
36310 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36312 * config/arm/arm-mve-builtins-shapes.cc (create): New.
36313 * config/arm/arm-mve-builtins-shapes.h: (create): New.
36315 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36317 * config/arm/arm-mve-builtins-functions.h (class
36318 unspec_mve_function_exact_insn): New.
36320 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36322 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
36324 * config/arm/arm-mve-builtins-base.def (vorrq): New.
36325 * config/arm/arm-mve-builtins-base.h (vorrq): New.
36326 * config/arm/arm-mve-builtins.cc
36327 (function_instance::has_inactive_argument): Handle vorrq.
36328 * config/arm/arm_mve.h (vorrq): Remove.
36329 (vorrq_m_n): Remove.
36332 (vorrq_u8): Remove.
36333 (vorrq_s8): Remove.
36334 (vorrq_u16): Remove.
36335 (vorrq_s16): Remove.
36336 (vorrq_u32): Remove.
36337 (vorrq_s32): Remove.
36338 (vorrq_n_u16): Remove.
36339 (vorrq_f16): Remove.
36340 (vorrq_n_s16): Remove.
36341 (vorrq_n_u32): Remove.
36342 (vorrq_f32): Remove.
36343 (vorrq_n_s32): Remove.
36344 (vorrq_m_n_s16): Remove.
36345 (vorrq_m_n_u16): Remove.
36346 (vorrq_m_n_s32): Remove.
36347 (vorrq_m_n_u32): Remove.
36348 (vorrq_m_s8): Remove.
36349 (vorrq_m_s32): Remove.
36350 (vorrq_m_s16): Remove.
36351 (vorrq_m_u8): Remove.
36352 (vorrq_m_u32): Remove.
36353 (vorrq_m_u16): Remove.
36354 (vorrq_m_f32): Remove.
36355 (vorrq_m_f16): Remove.
36356 (vorrq_x_s8): Remove.
36357 (vorrq_x_s16): Remove.
36358 (vorrq_x_s32): Remove.
36359 (vorrq_x_u8): Remove.
36360 (vorrq_x_u16): Remove.
36361 (vorrq_x_u32): Remove.
36362 (vorrq_x_f16): Remove.
36363 (vorrq_x_f32): Remove.
36364 (__arm_vorrq_u8): Remove.
36365 (__arm_vorrq_s8): Remove.
36366 (__arm_vorrq_u16): Remove.
36367 (__arm_vorrq_s16): Remove.
36368 (__arm_vorrq_u32): Remove.
36369 (__arm_vorrq_s32): Remove.
36370 (__arm_vorrq_n_u16): Remove.
36371 (__arm_vorrq_n_s16): Remove.
36372 (__arm_vorrq_n_u32): Remove.
36373 (__arm_vorrq_n_s32): Remove.
36374 (__arm_vorrq_m_n_s16): Remove.
36375 (__arm_vorrq_m_n_u16): Remove.
36376 (__arm_vorrq_m_n_s32): Remove.
36377 (__arm_vorrq_m_n_u32): Remove.
36378 (__arm_vorrq_m_s8): Remove.
36379 (__arm_vorrq_m_s32): Remove.
36380 (__arm_vorrq_m_s16): Remove.
36381 (__arm_vorrq_m_u8): Remove.
36382 (__arm_vorrq_m_u32): Remove.
36383 (__arm_vorrq_m_u16): Remove.
36384 (__arm_vorrq_x_s8): Remove.
36385 (__arm_vorrq_x_s16): Remove.
36386 (__arm_vorrq_x_s32): Remove.
36387 (__arm_vorrq_x_u8): Remove.
36388 (__arm_vorrq_x_u16): Remove.
36389 (__arm_vorrq_x_u32): Remove.
36390 (__arm_vorrq_f16): Remove.
36391 (__arm_vorrq_f32): Remove.
36392 (__arm_vorrq_m_f32): Remove.
36393 (__arm_vorrq_m_f16): Remove.
36394 (__arm_vorrq_x_f16): Remove.
36395 (__arm_vorrq_x_f32): Remove.
36396 (__arm_vorrq): Remove.
36397 (__arm_vorrq_m_n): Remove.
36398 (__arm_vorrq_m): Remove.
36399 (__arm_vorrq_x): Remove.
36401 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36403 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
36404 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
36405 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
36406 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
36408 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36410 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
36411 (vandq,veorq): New.
36412 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
36413 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
36414 * config/arm/arm_mve.h (vandq): Remove.
36417 (vandq_u8): Remove.
36418 (vandq_s8): Remove.
36419 (vandq_u16): Remove.
36420 (vandq_s16): Remove.
36421 (vandq_u32): Remove.
36422 (vandq_s32): Remove.
36423 (vandq_f16): Remove.
36424 (vandq_f32): Remove.
36425 (vandq_m_s8): Remove.
36426 (vandq_m_s32): Remove.
36427 (vandq_m_s16): Remove.
36428 (vandq_m_u8): Remove.
36429 (vandq_m_u32): Remove.
36430 (vandq_m_u16): Remove.
36431 (vandq_m_f32): Remove.
36432 (vandq_m_f16): Remove.
36433 (vandq_x_s8): Remove.
36434 (vandq_x_s16): Remove.
36435 (vandq_x_s32): Remove.
36436 (vandq_x_u8): Remove.
36437 (vandq_x_u16): Remove.
36438 (vandq_x_u32): Remove.
36439 (vandq_x_f16): Remove.
36440 (vandq_x_f32): Remove.
36441 (__arm_vandq_u8): Remove.
36442 (__arm_vandq_s8): Remove.
36443 (__arm_vandq_u16): Remove.
36444 (__arm_vandq_s16): Remove.
36445 (__arm_vandq_u32): Remove.
36446 (__arm_vandq_s32): Remove.
36447 (__arm_vandq_m_s8): Remove.
36448 (__arm_vandq_m_s32): Remove.
36449 (__arm_vandq_m_s16): Remove.
36450 (__arm_vandq_m_u8): Remove.
36451 (__arm_vandq_m_u32): Remove.
36452 (__arm_vandq_m_u16): Remove.
36453 (__arm_vandq_x_s8): Remove.
36454 (__arm_vandq_x_s16): Remove.
36455 (__arm_vandq_x_s32): Remove.
36456 (__arm_vandq_x_u8): Remove.
36457 (__arm_vandq_x_u16): Remove.
36458 (__arm_vandq_x_u32): Remove.
36459 (__arm_vandq_f16): Remove.
36460 (__arm_vandq_f32): Remove.
36461 (__arm_vandq_m_f32): Remove.
36462 (__arm_vandq_m_f16): Remove.
36463 (__arm_vandq_x_f16): Remove.
36464 (__arm_vandq_x_f32): Remove.
36465 (__arm_vandq): Remove.
36466 (__arm_vandq_m): Remove.
36467 (__arm_vandq_x): Remove.
36470 (veorq_u8): Remove.
36471 (veorq_s8): Remove.
36472 (veorq_u16): Remove.
36473 (veorq_s16): Remove.
36474 (veorq_u32): Remove.
36475 (veorq_s32): Remove.
36476 (veorq_f16): Remove.
36477 (veorq_f32): Remove.
36478 (veorq_m_s8): Remove.
36479 (veorq_m_s32): Remove.
36480 (veorq_m_s16): Remove.
36481 (veorq_m_u8): Remove.
36482 (veorq_m_u32): Remove.
36483 (veorq_m_u16): Remove.
36484 (veorq_m_f32): Remove.
36485 (veorq_m_f16): Remove.
36486 (veorq_x_s8): Remove.
36487 (veorq_x_s16): Remove.
36488 (veorq_x_s32): Remove.
36489 (veorq_x_u8): Remove.
36490 (veorq_x_u16): Remove.
36491 (veorq_x_u32): Remove.
36492 (veorq_x_f16): Remove.
36493 (veorq_x_f32): Remove.
36494 (__arm_veorq_u8): Remove.
36495 (__arm_veorq_s8): Remove.
36496 (__arm_veorq_u16): Remove.
36497 (__arm_veorq_s16): Remove.
36498 (__arm_veorq_u32): Remove.
36499 (__arm_veorq_s32): Remove.
36500 (__arm_veorq_m_s8): Remove.
36501 (__arm_veorq_m_s32): Remove.
36502 (__arm_veorq_m_s16): Remove.
36503 (__arm_veorq_m_u8): Remove.
36504 (__arm_veorq_m_u32): Remove.
36505 (__arm_veorq_m_u16): Remove.
36506 (__arm_veorq_x_s8): Remove.
36507 (__arm_veorq_x_s16): Remove.
36508 (__arm_veorq_x_s32): Remove.
36509 (__arm_veorq_x_u8): Remove.
36510 (__arm_veorq_x_u16): Remove.
36511 (__arm_veorq_x_u32): Remove.
36512 (__arm_veorq_f16): Remove.
36513 (__arm_veorq_f32): Remove.
36514 (__arm_veorq_m_f32): Remove.
36515 (__arm_veorq_m_f16): Remove.
36516 (__arm_veorq_x_f16): Remove.
36517 (__arm_veorq_x_f32): Remove.
36518 (__arm_veorq): Remove.
36519 (__arm_veorq_m): Remove.
36520 (__arm_veorq_x): Remove.
36522 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36524 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
36525 (MVE_FP_M_BINARY_LOGIC): New.
36526 (MVE_INT_M_N_BINARY_LOGIC): New.
36527 (MVE_INT_N_BINARY_LOGIC): New.
36528 (mve_insn): Add vand, veor, vorr, vbic.
36529 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
36530 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
36531 (mve_vbicq_m_<supf><mode>): Merge into ...
36532 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
36533 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
36534 (mve_vbicq_m_f<mode>): Merge into ...
36535 (@mve_<mve_insn>q_m_f<mode>): ... this.
36536 (mve_vorrq_n_<supf><mode>)
36537 (mve_vbicq_n_<supf><mode>): Merge into ...
36538 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36539 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
36541 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36543 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36545 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
36546 * config/arm/arm-mve-builtins-shapes.h (binary): New.
36548 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36550 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
36552 (vaddq, vmulq, vsubq): New.
36553 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
36554 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
36555 * config/arm/arm_mve.h (vaddq): Remove.
36558 (vaddq_n_u8): Remove.
36559 (vaddq_n_s8): Remove.
36560 (vaddq_n_u16): Remove.
36561 (vaddq_n_s16): Remove.
36562 (vaddq_n_u32): Remove.
36563 (vaddq_n_s32): Remove.
36564 (vaddq_n_f16): Remove.
36565 (vaddq_n_f32): Remove.
36566 (vaddq_m_n_s8): Remove.
36567 (vaddq_m_n_s32): Remove.
36568 (vaddq_m_n_s16): Remove.
36569 (vaddq_m_n_u8): Remove.
36570 (vaddq_m_n_u32): Remove.
36571 (vaddq_m_n_u16): Remove.
36572 (vaddq_m_s8): Remove.
36573 (vaddq_m_s32): Remove.
36574 (vaddq_m_s16): Remove.
36575 (vaddq_m_u8): Remove.
36576 (vaddq_m_u32): Remove.
36577 (vaddq_m_u16): Remove.
36578 (vaddq_m_f32): Remove.
36579 (vaddq_m_f16): Remove.
36580 (vaddq_m_n_f32): Remove.
36581 (vaddq_m_n_f16): Remove.
36582 (vaddq_s8): Remove.
36583 (vaddq_s16): Remove.
36584 (vaddq_s32): Remove.
36585 (vaddq_u8): Remove.
36586 (vaddq_u16): Remove.
36587 (vaddq_u32): Remove.
36588 (vaddq_f16): Remove.
36589 (vaddq_f32): Remove.
36590 (vaddq_x_s8): Remove.
36591 (vaddq_x_s16): Remove.
36592 (vaddq_x_s32): Remove.
36593 (vaddq_x_n_s8): Remove.
36594 (vaddq_x_n_s16): Remove.
36595 (vaddq_x_n_s32): Remove.
36596 (vaddq_x_u8): Remove.
36597 (vaddq_x_u16): Remove.
36598 (vaddq_x_u32): Remove.
36599 (vaddq_x_n_u8): Remove.
36600 (vaddq_x_n_u16): Remove.
36601 (vaddq_x_n_u32): Remove.
36602 (vaddq_x_f16): Remove.
36603 (vaddq_x_f32): Remove.
36604 (vaddq_x_n_f16): Remove.
36605 (vaddq_x_n_f32): Remove.
36606 (__arm_vaddq_n_u8): Remove.
36607 (__arm_vaddq_n_s8): Remove.
36608 (__arm_vaddq_n_u16): Remove.
36609 (__arm_vaddq_n_s16): Remove.
36610 (__arm_vaddq_n_u32): Remove.
36611 (__arm_vaddq_n_s32): Remove.
36612 (__arm_vaddq_m_n_s8): Remove.
36613 (__arm_vaddq_m_n_s32): Remove.
36614 (__arm_vaddq_m_n_s16): Remove.
36615 (__arm_vaddq_m_n_u8): Remove.
36616 (__arm_vaddq_m_n_u32): Remove.
36617 (__arm_vaddq_m_n_u16): Remove.
36618 (__arm_vaddq_m_s8): Remove.
36619 (__arm_vaddq_m_s32): Remove.
36620 (__arm_vaddq_m_s16): Remove.
36621 (__arm_vaddq_m_u8): Remove.
36622 (__arm_vaddq_m_u32): Remove.
36623 (__arm_vaddq_m_u16): Remove.
36624 (__arm_vaddq_s8): Remove.
36625 (__arm_vaddq_s16): Remove.
36626 (__arm_vaddq_s32): Remove.
36627 (__arm_vaddq_u8): Remove.
36628 (__arm_vaddq_u16): Remove.
36629 (__arm_vaddq_u32): Remove.
36630 (__arm_vaddq_x_s8): Remove.
36631 (__arm_vaddq_x_s16): Remove.
36632 (__arm_vaddq_x_s32): Remove.
36633 (__arm_vaddq_x_n_s8): Remove.
36634 (__arm_vaddq_x_n_s16): Remove.
36635 (__arm_vaddq_x_n_s32): Remove.
36636 (__arm_vaddq_x_u8): Remove.
36637 (__arm_vaddq_x_u16): Remove.
36638 (__arm_vaddq_x_u32): Remove.
36639 (__arm_vaddq_x_n_u8): Remove.
36640 (__arm_vaddq_x_n_u16): Remove.
36641 (__arm_vaddq_x_n_u32): Remove.
36642 (__arm_vaddq_n_f16): Remove.
36643 (__arm_vaddq_n_f32): Remove.
36644 (__arm_vaddq_m_f32): Remove.
36645 (__arm_vaddq_m_f16): Remove.
36646 (__arm_vaddq_m_n_f32): Remove.
36647 (__arm_vaddq_m_n_f16): Remove.
36648 (__arm_vaddq_f16): Remove.
36649 (__arm_vaddq_f32): Remove.
36650 (__arm_vaddq_x_f16): Remove.
36651 (__arm_vaddq_x_f32): Remove.
36652 (__arm_vaddq_x_n_f16): Remove.
36653 (__arm_vaddq_x_n_f32): Remove.
36654 (__arm_vaddq): Remove.
36655 (__arm_vaddq_m): Remove.
36656 (__arm_vaddq_x): Remove.
36660 (vmulq_u8): Remove.
36661 (vmulq_n_u8): Remove.
36662 (vmulq_s8): Remove.
36663 (vmulq_n_s8): Remove.
36664 (vmulq_u16): Remove.
36665 (vmulq_n_u16): Remove.
36666 (vmulq_s16): Remove.
36667 (vmulq_n_s16): Remove.
36668 (vmulq_u32): Remove.
36669 (vmulq_n_u32): Remove.
36670 (vmulq_s32): Remove.
36671 (vmulq_n_s32): Remove.
36672 (vmulq_n_f16): Remove.
36673 (vmulq_f16): Remove.
36674 (vmulq_n_f32): Remove.
36675 (vmulq_f32): Remove.
36676 (vmulq_m_n_s8): Remove.
36677 (vmulq_m_n_s32): Remove.
36678 (vmulq_m_n_s16): Remove.
36679 (vmulq_m_n_u8): Remove.
36680 (vmulq_m_n_u32): Remove.
36681 (vmulq_m_n_u16): Remove.
36682 (vmulq_m_s8): Remove.
36683 (vmulq_m_s32): Remove.
36684 (vmulq_m_s16): Remove.
36685 (vmulq_m_u8): Remove.
36686 (vmulq_m_u32): Remove.
36687 (vmulq_m_u16): Remove.
36688 (vmulq_m_f32): Remove.
36689 (vmulq_m_f16): Remove.
36690 (vmulq_m_n_f32): Remove.
36691 (vmulq_m_n_f16): Remove.
36692 (vmulq_x_s8): Remove.
36693 (vmulq_x_s16): Remove.
36694 (vmulq_x_s32): Remove.
36695 (vmulq_x_n_s8): Remove.
36696 (vmulq_x_n_s16): Remove.
36697 (vmulq_x_n_s32): Remove.
36698 (vmulq_x_u8): Remove.
36699 (vmulq_x_u16): Remove.
36700 (vmulq_x_u32): Remove.
36701 (vmulq_x_n_u8): Remove.
36702 (vmulq_x_n_u16): Remove.
36703 (vmulq_x_n_u32): Remove.
36704 (vmulq_x_f16): Remove.
36705 (vmulq_x_f32): Remove.
36706 (vmulq_x_n_f16): Remove.
36707 (vmulq_x_n_f32): Remove.
36708 (__arm_vmulq_u8): Remove.
36709 (__arm_vmulq_n_u8): Remove.
36710 (__arm_vmulq_s8): Remove.
36711 (__arm_vmulq_n_s8): Remove.
36712 (__arm_vmulq_u16): Remove.
36713 (__arm_vmulq_n_u16): Remove.
36714 (__arm_vmulq_s16): Remove.
36715 (__arm_vmulq_n_s16): Remove.
36716 (__arm_vmulq_u32): Remove.
36717 (__arm_vmulq_n_u32): Remove.
36718 (__arm_vmulq_s32): Remove.
36719 (__arm_vmulq_n_s32): Remove.
36720 (__arm_vmulq_m_n_s8): Remove.
36721 (__arm_vmulq_m_n_s32): Remove.
36722 (__arm_vmulq_m_n_s16): Remove.
36723 (__arm_vmulq_m_n_u8): Remove.
36724 (__arm_vmulq_m_n_u32): Remove.
36725 (__arm_vmulq_m_n_u16): Remove.
36726 (__arm_vmulq_m_s8): Remove.
36727 (__arm_vmulq_m_s32): Remove.
36728 (__arm_vmulq_m_s16): Remove.
36729 (__arm_vmulq_m_u8): Remove.
36730 (__arm_vmulq_m_u32): Remove.
36731 (__arm_vmulq_m_u16): Remove.
36732 (__arm_vmulq_x_s8): Remove.
36733 (__arm_vmulq_x_s16): Remove.
36734 (__arm_vmulq_x_s32): Remove.
36735 (__arm_vmulq_x_n_s8): Remove.
36736 (__arm_vmulq_x_n_s16): Remove.
36737 (__arm_vmulq_x_n_s32): Remove.
36738 (__arm_vmulq_x_u8): Remove.
36739 (__arm_vmulq_x_u16): Remove.
36740 (__arm_vmulq_x_u32): Remove.
36741 (__arm_vmulq_x_n_u8): Remove.
36742 (__arm_vmulq_x_n_u16): Remove.
36743 (__arm_vmulq_x_n_u32): Remove.
36744 (__arm_vmulq_n_f16): Remove.
36745 (__arm_vmulq_f16): Remove.
36746 (__arm_vmulq_n_f32): Remove.
36747 (__arm_vmulq_f32): Remove.
36748 (__arm_vmulq_m_f32): Remove.
36749 (__arm_vmulq_m_f16): Remove.
36750 (__arm_vmulq_m_n_f32): Remove.
36751 (__arm_vmulq_m_n_f16): Remove.
36752 (__arm_vmulq_x_f16): Remove.
36753 (__arm_vmulq_x_f32): Remove.
36754 (__arm_vmulq_x_n_f16): Remove.
36755 (__arm_vmulq_x_n_f32): Remove.
36756 (__arm_vmulq): Remove.
36757 (__arm_vmulq_m): Remove.
36758 (__arm_vmulq_x): Remove.
36762 (vsubq_n_f16): Remove.
36763 (vsubq_n_f32): Remove.
36764 (vsubq_u8): Remove.
36765 (vsubq_n_u8): Remove.
36766 (vsubq_s8): Remove.
36767 (vsubq_n_s8): Remove.
36768 (vsubq_u16): Remove.
36769 (vsubq_n_u16): Remove.
36770 (vsubq_s16): Remove.
36771 (vsubq_n_s16): Remove.
36772 (vsubq_u32): Remove.
36773 (vsubq_n_u32): Remove.
36774 (vsubq_s32): Remove.
36775 (vsubq_n_s32): Remove.
36776 (vsubq_f16): Remove.
36777 (vsubq_f32): Remove.
36778 (vsubq_m_s8): Remove.
36779 (vsubq_m_u8): Remove.
36780 (vsubq_m_s16): Remove.
36781 (vsubq_m_u16): Remove.
36782 (vsubq_m_s32): Remove.
36783 (vsubq_m_u32): Remove.
36784 (vsubq_m_n_s8): Remove.
36785 (vsubq_m_n_s32): Remove.
36786 (vsubq_m_n_s16): Remove.
36787 (vsubq_m_n_u8): Remove.
36788 (vsubq_m_n_u32): Remove.
36789 (vsubq_m_n_u16): Remove.
36790 (vsubq_m_f32): Remove.
36791 (vsubq_m_f16): Remove.
36792 (vsubq_m_n_f32): Remove.
36793 (vsubq_m_n_f16): Remove.
36794 (vsubq_x_s8): Remove.
36795 (vsubq_x_s16): Remove.
36796 (vsubq_x_s32): Remove.
36797 (vsubq_x_n_s8): Remove.
36798 (vsubq_x_n_s16): Remove.
36799 (vsubq_x_n_s32): Remove.
36800 (vsubq_x_u8): Remove.
36801 (vsubq_x_u16): Remove.
36802 (vsubq_x_u32): Remove.
36803 (vsubq_x_n_u8): Remove.
36804 (vsubq_x_n_u16): Remove.
36805 (vsubq_x_n_u32): Remove.
36806 (vsubq_x_f16): Remove.
36807 (vsubq_x_f32): Remove.
36808 (vsubq_x_n_f16): Remove.
36809 (vsubq_x_n_f32): Remove.
36810 (__arm_vsubq_u8): Remove.
36811 (__arm_vsubq_n_u8): Remove.
36812 (__arm_vsubq_s8): Remove.
36813 (__arm_vsubq_n_s8): Remove.
36814 (__arm_vsubq_u16): Remove.
36815 (__arm_vsubq_n_u16): Remove.
36816 (__arm_vsubq_s16): Remove.
36817 (__arm_vsubq_n_s16): Remove.
36818 (__arm_vsubq_u32): Remove.
36819 (__arm_vsubq_n_u32): Remove.
36820 (__arm_vsubq_s32): Remove.
36821 (__arm_vsubq_n_s32): Remove.
36822 (__arm_vsubq_m_s8): Remove.
36823 (__arm_vsubq_m_u8): Remove.
36824 (__arm_vsubq_m_s16): Remove.
36825 (__arm_vsubq_m_u16): Remove.
36826 (__arm_vsubq_m_s32): Remove.
36827 (__arm_vsubq_m_u32): Remove.
36828 (__arm_vsubq_m_n_s8): Remove.
36829 (__arm_vsubq_m_n_s32): Remove.
36830 (__arm_vsubq_m_n_s16): Remove.
36831 (__arm_vsubq_m_n_u8): Remove.
36832 (__arm_vsubq_m_n_u32): Remove.
36833 (__arm_vsubq_m_n_u16): Remove.
36834 (__arm_vsubq_x_s8): Remove.
36835 (__arm_vsubq_x_s16): Remove.
36836 (__arm_vsubq_x_s32): Remove.
36837 (__arm_vsubq_x_n_s8): Remove.
36838 (__arm_vsubq_x_n_s16): Remove.
36839 (__arm_vsubq_x_n_s32): Remove.
36840 (__arm_vsubq_x_u8): Remove.
36841 (__arm_vsubq_x_u16): Remove.
36842 (__arm_vsubq_x_u32): Remove.
36843 (__arm_vsubq_x_n_u8): Remove.
36844 (__arm_vsubq_x_n_u16): Remove.
36845 (__arm_vsubq_x_n_u32): Remove.
36846 (__arm_vsubq_n_f16): Remove.
36847 (__arm_vsubq_n_f32): Remove.
36848 (__arm_vsubq_f16): Remove.
36849 (__arm_vsubq_f32): Remove.
36850 (__arm_vsubq_m_f32): Remove.
36851 (__arm_vsubq_m_f16): Remove.
36852 (__arm_vsubq_m_n_f32): Remove.
36853 (__arm_vsubq_m_n_f16): Remove.
36854 (__arm_vsubq_x_f16): Remove.
36855 (__arm_vsubq_x_f32): Remove.
36856 (__arm_vsubq_x_n_f16): Remove.
36857 (__arm_vsubq_x_n_f32): Remove.
36858 (__arm_vsubq): Remove.
36859 (__arm_vsubq_m): Remove.
36860 (__arm_vsubq_x): Remove.
36861 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
36863 (vmulq_u, vmulq_s, vmulq_f): Remove.
36864 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
36865 (mve_vmulq_<supf><mode>): Remove.
36867 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36869 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
36870 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
36871 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
36873 * config/arm/mve.md
36874 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
36876 (@mve_<mve_insn>q_n_f<mode>): ... this.
36877 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
36878 (mve_vsubq_n_<supf><mode>): Factorize into ...
36879 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36880 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
36882 (mve_<mve_addsubmul>q<mode>): ... this.
36883 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
36885 (mve_<mve_addsubmul>q_f<mode>): ... this.
36886 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
36887 (mve_vsubq_m_<supf><mode>): Factorize into ...
36888 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
36889 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
36890 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
36891 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36892 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
36894 (@mve_<mve_insn>q_m_f<mode>): ... this.
36895 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
36896 (mve_vsubq_m_n_f<mode>): Factorize into ...
36897 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
36899 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36901 * config/arm/arm-mve-builtins-functions.h (class
36902 unspec_based_mve_function_base): New.
36903 (class unspec_based_mve_function_exact_insn): New.
36905 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36907 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
36908 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
36910 2023-05-03 Murray Steele <murray.steele@arm.com>
36911 Christophe Lyon <christophe.lyon@arm.com>
36913 * config/arm/arm-mve-builtins-base.cc (class
36914 vuninitializedq_impl): New.
36915 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
36916 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
36918 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
36919 * config/arm/arm-mve-builtins-shapes.h (inherent): New
36921 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
36922 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
36923 (__arm_vuninitializedq_u8): Remove.
36924 (__arm_vuninitializedq_u16): Remove.
36925 (__arm_vuninitializedq_u32): Remove.
36926 (__arm_vuninitializedq_u64): Remove.
36927 (__arm_vuninitializedq_s8): Remove.
36928 (__arm_vuninitializedq_s16): Remove.
36929 (__arm_vuninitializedq_s32): Remove.
36930 (__arm_vuninitializedq_s64): Remove.
36931 (__arm_vuninitializedq_f16): Remove.
36932 (__arm_vuninitializedq_f32): Remove.
36934 2023-05-03 Murray Steele <murray.steele@arm.com>
36935 Christophe Lyon <christophe.lyon@arm.com>
36937 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
36938 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
36939 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
36940 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
36941 (parse_type): Likewise.
36942 (parse_signature): Likewise.
36943 (build_one): Likewise.
36944 (build_all): Likewise.
36945 (overloaded_base): New struct.
36946 (unary_convert_def): Likewise.
36947 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
36948 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
36950 (TYPES_reinterpret_unsigned1): Likewise.
36951 (TYPES_reinterpret_integer): Likewise.
36952 (TYPES_reinterpret_integer1): Likewise.
36953 (TYPES_reinterpret_float1): Likewise.
36954 (TYPES_reinterpret_float): Likewise.
36955 (reinterpret_integer): New.
36956 (reinterpret_float): New.
36957 (handle_arm_mve_h): Register builtins.
36958 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
36959 (vreinterpretq_s32): Likewise.
36960 (vreinterpretq_s64): Likewise.
36961 (vreinterpretq_s8): Likewise.
36962 (vreinterpretq_u16): Likewise.
36963 (vreinterpretq_u32): Likewise.
36964 (vreinterpretq_u64): Likewise.
36965 (vreinterpretq_u8): Likewise.
36966 (vreinterpretq_f16): Likewise.
36967 (vreinterpretq_f32): Likewise.
36968 (vreinterpretq_s16_s32): Likewise.
36969 (vreinterpretq_s16_s64): Likewise.
36970 (vreinterpretq_s16_s8): Likewise.
36971 (vreinterpretq_s16_u16): Likewise.
36972 (vreinterpretq_s16_u32): Likewise.
36973 (vreinterpretq_s16_u64): Likewise.
36974 (vreinterpretq_s16_u8): Likewise.
36975 (vreinterpretq_s32_s16): Likewise.
36976 (vreinterpretq_s32_s64): Likewise.
36977 (vreinterpretq_s32_s8): Likewise.
36978 (vreinterpretq_s32_u16): Likewise.
36979 (vreinterpretq_s32_u32): Likewise.
36980 (vreinterpretq_s32_u64): Likewise.
36981 (vreinterpretq_s32_u8): Likewise.
36982 (vreinterpretq_s64_s16): Likewise.
36983 (vreinterpretq_s64_s32): Likewise.
36984 (vreinterpretq_s64_s8): Likewise.
36985 (vreinterpretq_s64_u16): Likewise.
36986 (vreinterpretq_s64_u32): Likewise.
36987 (vreinterpretq_s64_u64): Likewise.
36988 (vreinterpretq_s64_u8): Likewise.
36989 (vreinterpretq_s8_s16): Likewise.
36990 (vreinterpretq_s8_s32): Likewise.
36991 (vreinterpretq_s8_s64): Likewise.
36992 (vreinterpretq_s8_u16): Likewise.
36993 (vreinterpretq_s8_u32): Likewise.
36994 (vreinterpretq_s8_u64): Likewise.
36995 (vreinterpretq_s8_u8): Likewise.
36996 (vreinterpretq_u16_s16): Likewise.
36997 (vreinterpretq_u16_s32): Likewise.
36998 (vreinterpretq_u16_s64): Likewise.
36999 (vreinterpretq_u16_s8): Likewise.
37000 (vreinterpretq_u16_u32): Likewise.
37001 (vreinterpretq_u16_u64): Likewise.
37002 (vreinterpretq_u16_u8): Likewise.
37003 (vreinterpretq_u32_s16): Likewise.
37004 (vreinterpretq_u32_s32): Likewise.
37005 (vreinterpretq_u32_s64): Likewise.
37006 (vreinterpretq_u32_s8): Likewise.
37007 (vreinterpretq_u32_u16): Likewise.
37008 (vreinterpretq_u32_u64): Likewise.
37009 (vreinterpretq_u32_u8): Likewise.
37010 (vreinterpretq_u64_s16): Likewise.
37011 (vreinterpretq_u64_s32): Likewise.
37012 (vreinterpretq_u64_s64): Likewise.
37013 (vreinterpretq_u64_s8): Likewise.
37014 (vreinterpretq_u64_u16): Likewise.
37015 (vreinterpretq_u64_u32): Likewise.
37016 (vreinterpretq_u64_u8): Likewise.
37017 (vreinterpretq_u8_s16): Likewise.
37018 (vreinterpretq_u8_s32): Likewise.
37019 (vreinterpretq_u8_s64): Likewise.
37020 (vreinterpretq_u8_s8): Likewise.
37021 (vreinterpretq_u8_u16): Likewise.
37022 (vreinterpretq_u8_u32): Likewise.
37023 (vreinterpretq_u8_u64): Likewise.
37024 (vreinterpretq_s32_f16): Likewise.
37025 (vreinterpretq_s32_f32): Likewise.
37026 (vreinterpretq_u16_f16): Likewise.
37027 (vreinterpretq_u16_f32): Likewise.
37028 (vreinterpretq_u32_f16): Likewise.
37029 (vreinterpretq_u32_f32): Likewise.
37030 (vreinterpretq_u64_f16): Likewise.
37031 (vreinterpretq_u64_f32): Likewise.
37032 (vreinterpretq_u8_f16): Likewise.
37033 (vreinterpretq_u8_f32): Likewise.
37034 (vreinterpretq_f16_f32): Likewise.
37035 (vreinterpretq_f16_s16): Likewise.
37036 (vreinterpretq_f16_s32): Likewise.
37037 (vreinterpretq_f16_s64): Likewise.
37038 (vreinterpretq_f16_s8): Likewise.
37039 (vreinterpretq_f16_u16): Likewise.
37040 (vreinterpretq_f16_u32): Likewise.
37041 (vreinterpretq_f16_u64): Likewise.
37042 (vreinterpretq_f16_u8): Likewise.
37043 (vreinterpretq_f32_f16): Likewise.
37044 (vreinterpretq_f32_s16): Likewise.
37045 (vreinterpretq_f32_s32): Likewise.
37046 (vreinterpretq_f32_s64): Likewise.
37047 (vreinterpretq_f32_s8): Likewise.
37048 (vreinterpretq_f32_u16): Likewise.
37049 (vreinterpretq_f32_u32): Likewise.
37050 (vreinterpretq_f32_u64): Likewise.
37051 (vreinterpretq_f32_u8): Likewise.
37052 (vreinterpretq_s16_f16): Likewise.
37053 (vreinterpretq_s16_f32): Likewise.
37054 (vreinterpretq_s64_f16): Likewise.
37055 (vreinterpretq_s64_f32): Likewise.
37056 (vreinterpretq_s8_f16): Likewise.
37057 (vreinterpretq_s8_f32): Likewise.
37058 (__arm_vreinterpretq_f16): Likewise.
37059 (__arm_vreinterpretq_f32): Likewise.
37060 (__arm_vreinterpretq_s16): Likewise.
37061 (__arm_vreinterpretq_s32): Likewise.
37062 (__arm_vreinterpretq_s64): Likewise.
37063 (__arm_vreinterpretq_s8): Likewise.
37064 (__arm_vreinterpretq_u16): Likewise.
37065 (__arm_vreinterpretq_u32): Likewise.
37066 (__arm_vreinterpretq_u64): Likewise.
37067 (__arm_vreinterpretq_u8): Likewise.
37068 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
37069 (__arm_vreinterpretq_s16_s64): Likewise.
37070 (__arm_vreinterpretq_s16_s8): Likewise.
37071 (__arm_vreinterpretq_s16_u16): Likewise.
37072 (__arm_vreinterpretq_s16_u32): Likewise.
37073 (__arm_vreinterpretq_s16_u64): Likewise.
37074 (__arm_vreinterpretq_s16_u8): Likewise.
37075 (__arm_vreinterpretq_s32_s16): Likewise.
37076 (__arm_vreinterpretq_s32_s64): Likewise.
37077 (__arm_vreinterpretq_s32_s8): Likewise.
37078 (__arm_vreinterpretq_s32_u16): Likewise.
37079 (__arm_vreinterpretq_s32_u32): Likewise.
37080 (__arm_vreinterpretq_s32_u64): Likewise.
37081 (__arm_vreinterpretq_s32_u8): Likewise.
37082 (__arm_vreinterpretq_s64_s16): Likewise.
37083 (__arm_vreinterpretq_s64_s32): Likewise.
37084 (__arm_vreinterpretq_s64_s8): Likewise.
37085 (__arm_vreinterpretq_s64_u16): Likewise.
37086 (__arm_vreinterpretq_s64_u32): Likewise.
37087 (__arm_vreinterpretq_s64_u64): Likewise.
37088 (__arm_vreinterpretq_s64_u8): Likewise.
37089 (__arm_vreinterpretq_s8_s16): Likewise.
37090 (__arm_vreinterpretq_s8_s32): Likewise.
37091 (__arm_vreinterpretq_s8_s64): Likewise.
37092 (__arm_vreinterpretq_s8_u16): Likewise.
37093 (__arm_vreinterpretq_s8_u32): Likewise.
37094 (__arm_vreinterpretq_s8_u64): Likewise.
37095 (__arm_vreinterpretq_s8_u8): Likewise.
37096 (__arm_vreinterpretq_u16_s16): Likewise.
37097 (__arm_vreinterpretq_u16_s32): Likewise.
37098 (__arm_vreinterpretq_u16_s64): Likewise.
37099 (__arm_vreinterpretq_u16_s8): Likewise.
37100 (__arm_vreinterpretq_u16_u32): Likewise.
37101 (__arm_vreinterpretq_u16_u64): Likewise.
37102 (__arm_vreinterpretq_u16_u8): Likewise.
37103 (__arm_vreinterpretq_u32_s16): Likewise.
37104 (__arm_vreinterpretq_u32_s32): Likewise.
37105 (__arm_vreinterpretq_u32_s64): Likewise.
37106 (__arm_vreinterpretq_u32_s8): Likewise.
37107 (__arm_vreinterpretq_u32_u16): Likewise.
37108 (__arm_vreinterpretq_u32_u64): Likewise.
37109 (__arm_vreinterpretq_u32_u8): Likewise.
37110 (__arm_vreinterpretq_u64_s16): Likewise.
37111 (__arm_vreinterpretq_u64_s32): Likewise.
37112 (__arm_vreinterpretq_u64_s64): Likewise.
37113 (__arm_vreinterpretq_u64_s8): Likewise.
37114 (__arm_vreinterpretq_u64_u16): Likewise.
37115 (__arm_vreinterpretq_u64_u32): Likewise.
37116 (__arm_vreinterpretq_u64_u8): Likewise.
37117 (__arm_vreinterpretq_u8_s16): Likewise.
37118 (__arm_vreinterpretq_u8_s32): Likewise.
37119 (__arm_vreinterpretq_u8_s64): Likewise.
37120 (__arm_vreinterpretq_u8_s8): Likewise.
37121 (__arm_vreinterpretq_u8_u16): Likewise.
37122 (__arm_vreinterpretq_u8_u32): Likewise.
37123 (__arm_vreinterpretq_u8_u64): Likewise.
37124 (__arm_vreinterpretq_s32_f16): Likewise.
37125 (__arm_vreinterpretq_s32_f32): Likewise.
37126 (__arm_vreinterpretq_s16_f16): Likewise.
37127 (__arm_vreinterpretq_s16_f32): Likewise.
37128 (__arm_vreinterpretq_s64_f16): Likewise.
37129 (__arm_vreinterpretq_s64_f32): Likewise.
37130 (__arm_vreinterpretq_s8_f16): Likewise.
37131 (__arm_vreinterpretq_s8_f32): Likewise.
37132 (__arm_vreinterpretq_u16_f16): Likewise.
37133 (__arm_vreinterpretq_u16_f32): Likewise.
37134 (__arm_vreinterpretq_u32_f16): Likewise.
37135 (__arm_vreinterpretq_u32_f32): Likewise.
37136 (__arm_vreinterpretq_u64_f16): Likewise.
37137 (__arm_vreinterpretq_u64_f32): Likewise.
37138 (__arm_vreinterpretq_u8_f16): Likewise.
37139 (__arm_vreinterpretq_u8_f32): Likewise.
37140 (__arm_vreinterpretq_f16_f32): Likewise.
37141 (__arm_vreinterpretq_f16_s16): Likewise.
37142 (__arm_vreinterpretq_f16_s32): Likewise.
37143 (__arm_vreinterpretq_f16_s64): Likewise.
37144 (__arm_vreinterpretq_f16_s8): Likewise.
37145 (__arm_vreinterpretq_f16_u16): Likewise.
37146 (__arm_vreinterpretq_f16_u32): Likewise.
37147 (__arm_vreinterpretq_f16_u64): Likewise.
37148 (__arm_vreinterpretq_f16_u8): Likewise.
37149 (__arm_vreinterpretq_f32_f16): Likewise.
37150 (__arm_vreinterpretq_f32_s16): Likewise.
37151 (__arm_vreinterpretq_f32_s32): Likewise.
37152 (__arm_vreinterpretq_f32_s64): Likewise.
37153 (__arm_vreinterpretq_f32_s8): Likewise.
37154 (__arm_vreinterpretq_f32_u16): Likewise.
37155 (__arm_vreinterpretq_f32_u32): Likewise.
37156 (__arm_vreinterpretq_f32_u64): Likewise.
37157 (__arm_vreinterpretq_f32_u8): Likewise.
37158 (__arm_vreinterpretq_s16): Likewise.
37159 (__arm_vreinterpretq_s32): Likewise.
37160 (__arm_vreinterpretq_s64): Likewise.
37161 (__arm_vreinterpretq_s8): Likewise.
37162 (__arm_vreinterpretq_u16): Likewise.
37163 (__arm_vreinterpretq_u32): Likewise.
37164 (__arm_vreinterpretq_u64): Likewise.
37165 (__arm_vreinterpretq_u8): Likewise.
37166 (__arm_vreinterpretq_f16): Likewise.
37167 (__arm_vreinterpretq_f32): Likewise.
37168 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
37169 * config/arm/unspecs.md: (REINTERPRET): New unspec.
37171 2023-05-03 Murray Steele <murray.steele@arm.com>
37172 Christophe Lyon <christophe.lyon@arm.com>
37173 Christophe Lyon <christophe.lyon@arm.com
37175 * config.gcc: Add arm-mve-builtins-base.o and
37176 arm-mve-builtins-shapes.o to extra_objs.
37177 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
37179 (arm_expand_builtin): Likewise
37180 (arm_check_builtin_call): Likewise
37181 (arm_describe_resolver): Likewise.
37182 * config/arm/arm-builtins.h (enum resolver_ident): Add
37184 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
37185 (arm_resolve_overloaded_builtin): Handle MVE builtins.
37186 (arm_register_target_pragmas): Register arm_check_builtin_call.
37187 * config/arm/arm-mve-builtins.cc (class registered_function): New
37189 (struct registered_function_hasher): New struct.
37190 (pred_suffixes): New table.
37191 (mode_suffixes): New table.
37192 (type_suffix_info): New table.
37193 (TYPES_float16): New.
37194 (TYPES_all_float): New.
37195 (TYPES_integer_8): New.
37196 (TYPES_integer_8_16): New.
37197 (TYPES_integer_16_32): New.
37198 (TYPES_integer_32): New.
37199 (TYPES_signed_16_32): New.
37200 (TYPES_signed_32): New.
37201 (TYPES_all_signed): New.
37202 (TYPES_all_unsigned): New.
37203 (TYPES_all_integer): New.
37204 (TYPES_all_integer_with_64): New.
37205 (DEF_VECTOR_TYPE): New.
37206 (DEF_DOUBLE_TYPE): New.
37207 (DEF_MVE_TYPES_ARRAY): New.
37208 (all_integer): New.
37209 (all_integer_with_64): New.
37213 (all_unsigned): New.
37215 (integer_8_16): New.
37216 (integer_16_32): New.
37218 (signed_16_32): New.
37220 (register_vector_type): Use void_type_node for mve.fp-only types when
37221 mve.fp is not enabled.
37222 (register_builtin_tuple_types): Likewise.
37223 (handle_arm_mve_h): New function..
37224 (matches_type_p): Likewise..
37225 (report_out_of_range): Likewise.
37226 (report_not_enum): Likewise.
37227 (report_missing_float): Likewise.
37228 (report_non_ice): Likewise.
37229 (check_requires_float): Likewise.
37230 (function_instance::hash): Likewise
37231 (function_instance::call_properties): Likewise.
37232 (function_instance::reads_global_state_p): Likewise.
37233 (function_instance::modifies_global_state_p): Likewise.
37234 (function_instance::could_trap_p): Likewise.
37235 (function_instance::has_inactive_argument): Likewise.
37236 (registered_function_hasher::hash): Likewise.
37237 (registered_function_hasher::equal): Likewise.
37238 (function_builder::function_builder): Likewise.
37239 (function_builder::~function_builder): Likewise.
37240 (function_builder::append_name): Likewise.
37241 (function_builder::finish_name): Likewise.
37242 (function_builder::get_name): Likewise.
37243 (add_attribute): Likewise.
37244 (function_builder::get_attributes): Likewise.
37245 (function_builder::add_function): Likewise.
37246 (function_builder::add_unique_function): Likewise.
37247 (function_builder::add_overloaded_function): Likewise.
37248 (function_builder::add_overloaded_functions): Likewise.
37249 (function_builder::register_function_group): Likewise.
37250 (function_call_info::function_call_info): Likewise.
37251 (function_resolver::function_resolver): Likewise.
37252 (function_resolver::get_vector_type): Likewise.
37253 (function_resolver::get_scalar_type_name): Likewise.
37254 (function_resolver::get_argument_type): Likewise.
37255 (function_resolver::scalar_argument_p): Likewise.
37256 (function_resolver::report_no_such_form): Likewise.
37257 (function_resolver::lookup_form): Likewise.
37258 (function_resolver::resolve_to): Likewise.
37259 (function_resolver::infer_vector_or_tuple_type): Likewise.
37260 (function_resolver::infer_vector_type): Likewise.
37261 (function_resolver::require_vector_or_scalar_type): Likewise.
37262 (function_resolver::require_vector_type): Likewise.
37263 (function_resolver::require_matching_vector_type): Likewise.
37264 (function_resolver::require_derived_vector_type): Likewise.
37265 (function_resolver::require_derived_scalar_type): Likewise.
37266 (function_resolver::require_integer_immediate): Likewise.
37267 (function_resolver::require_scalar_type): Likewise.
37268 (function_resolver::check_num_arguments): Likewise.
37269 (function_resolver::check_gp_argument): Likewise.
37270 (function_resolver::finish_opt_n_resolution): Likewise.
37271 (function_resolver::resolve_unary): Likewise.
37272 (function_resolver::resolve_unary_n): Likewise.
37273 (function_resolver::resolve_uniform): Likewise.
37274 (function_resolver::resolve_uniform_opt_n): Likewise.
37275 (function_resolver::resolve): Likewise.
37276 (function_checker::function_checker): Likewise.
37277 (function_checker::argument_exists_p): Likewise.
37278 (function_checker::require_immediate): Likewise.
37279 (function_checker::require_immediate_enum): Likewise.
37280 (function_checker::require_immediate_range): Likewise.
37281 (function_checker::check): Likewise.
37282 (gimple_folder::gimple_folder): Likewise.
37283 (gimple_folder::fold): Likewise.
37284 (function_expander::function_expander): Likewise.
37285 (function_expander::direct_optab_handler): Likewise.
37286 (function_expander::get_fallback_value): Likewise.
37287 (function_expander::get_reg_target): Likewise.
37288 (function_expander::add_output_operand): Likewise.
37289 (function_expander::add_input_operand): Likewise.
37290 (function_expander::add_integer_operand): Likewise.
37291 (function_expander::generate_insn): Likewise.
37292 (function_expander::use_exact_insn): Likewise.
37293 (function_expander::use_unpred_insn): Likewise.
37294 (function_expander::use_pred_x_insn): Likewise.
37295 (function_expander::use_cond_insn): Likewise.
37296 (function_expander::map_to_rtx_codes): Likewise.
37297 (function_expander::expand): Likewise.
37298 (resolve_overloaded_builtin): Likewise.
37299 (check_builtin_call): Likewise.
37300 (gimple_fold_builtin): Likewise.
37301 (expand_builtin): Likewise.
37302 (gt_ggc_mx): Likewise.
37303 (gt_pch_nx): Likewise.
37304 (gt_pch_nx): Likewise.
37305 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
37316 (offset): New mode.
37317 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
37318 (CP_READ_FPCR): Likewise.
37319 (CP_RAISE_FP_EXCEPTIONS): Likewise.
37320 (CP_READ_MEMORY): Likewise.
37321 (CP_WRITE_MEMORY): Likewise.
37322 (enum units_index): New enum.
37323 (enum predication_index): New.
37324 (enum type_class_index): New.
37325 (enum mode_suffix_index): New enum.
37326 (enum type_suffix_index): New.
37327 (struct mode_suffix_info): New struct.
37328 (struct type_suffix_info): New.
37329 (struct function_group_info): Likewise.
37330 (class function_instance): Likewise.
37331 (class registered_function): Likewise.
37332 (class function_builder): Likewise.
37333 (class function_call_info): Likewise.
37334 (class function_resolver): Likewise.
37335 (class function_checker): Likewise.
37336 (class gimple_folder): Likewise.
37337 (class function_expander): Likewise.
37338 (get_mve_pred16_t): Likewise.
37339 (find_mode_suffix): New function.
37340 (class function_base): Likewise.
37341 (class function_shape): Likewise.
37342 (function_instance::operator==): New function.
37343 (function_instance::operator!=): Likewise.
37344 (function_instance::vectors_per_tuple): Likewise.
37345 (function_instance::mode_suffix): Likewise.
37346 (function_instance::type_suffix): Likewise.
37347 (function_instance::scalar_type): Likewise.
37348 (function_instance::vector_type): Likewise.
37349 (function_instance::tuple_type): Likewise.
37350 (function_instance::vector_mode): Likewise.
37351 (function_call_info::function_returns_void_p): Likewise.
37352 (function_base::call_properties): Likewise.
37353 * config/arm/arm-protos.h (enum arm_builtin_class): Add
37355 (handle_arm_mve_h): New.
37356 (resolve_overloaded_builtin): New.
37357 (check_builtin_call): New.
37358 (gimple_fold_builtin): New.
37359 (expand_builtin): New.
37360 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
37361 arm_gimple_fold_builtin.
37362 (arm_gimple_fold_builtin): New function.
37363 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
37364 * config/arm/predicates.md (arm_any_register_operand): New predicate.
37365 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
37366 (arm-mve-builtins-shapes.o): New target.
37367 (arm-mve-builtins-base.o): New target.
37368 * config/arm/arm-mve-builtins-base.cc: New file.
37369 * config/arm/arm-mve-builtins-base.def: New file.
37370 * config/arm/arm-mve-builtins-base.h: New file.
37371 * config/arm/arm-mve-builtins-functions.h: New file.
37372 * config/arm/arm-mve-builtins-shapes.cc: New file.
37373 * config/arm/arm-mve-builtins-shapes.h: New file.
37375 2023-05-03 Murray Steele <murray.steele@arm.com>
37376 Christophe Lyon <christophe.lyon@arm.com>
37377 Christophe Lyon <christophe.lyon@arm.com>
37379 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
37381 (arm_init_builtin): Use arm_general_add_builtin_function instead
37382 of arm_add_builtin_function.
37383 (arm_init_acle_builtins): Likewise.
37384 (arm_init_mve_builtins): Likewise.
37385 (arm_init_crypto_builtins): Likewise.
37386 (arm_init_builtins): Likewise.
37387 (arm_general_builtin_decl): New function.
37388 (arm_builtin_decl): Defer to numberspace-specialized functions.
37389 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
37390 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
37391 (arm_general_expand_builtin_1): ... specialize for general builtins.
37392 (arm_expand_acle_builtin): Use arm_general_expand_builtin
37393 instead of arm_expand_builtin.
37394 (arm_expand_mve_builtin): Likewise.
37395 (arm_expand_neon_builtin): Likewise.
37396 (arm_expand_vfp_builtin): Likewise.
37397 (arm_general_expand_builtin): New function.
37398 (arm_expand_builtin): Specialize for general builtins.
37399 (arm_general_check_builtin_call): New function.
37400 (arm_check_builtin_call): Specialize for general builtins.
37401 (arm_describe_resolver): Validate numberspace.
37402 (arm_cde_end_args): Likewise.
37403 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
37404 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
37406 2023-05-03 Martin Liska <mliska@suse.cz>
37409 * config/riscv/sync.md: Add gcc_unreachable to a switch.
37411 2023-05-03 Richard Biener <rguenther@suse.de>
37413 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
37414 (patch_loop_exit): Likewise.
37415 (connect_loops): Likewise.
37416 (split_loop): Likewise.
37417 (control_dep_semi_invariant_p): Likewise.
37418 (do_split_loop_on_cond): Likewise.
37419 (split_loop_on_cond): Likewise.
37420 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
37422 (simplify_loop_version): Likewise.
37423 (evaluate_bbs): Likewise.
37424 (find_loop_guard): Likewise.
37425 (clean_up_after_unswitching): Likewise.
37426 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
37428 (optimize_spaceship): Take a gcond * argument, avoid
37430 (math_opts_dom_walker::after_dom_children): Adjust call to
37431 optimize_spaceship.
37432 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
37433 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
37436 2023-05-03 Andreas Schwab <schwab@suse.de>
37438 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
37440 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37442 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
37444 (class vlseg): New class.
37445 (class vsseg): Ditto.
37446 (class vlsseg): Ditto.
37447 (class vssseg): Ditto.
37448 (class seg_indexed_load): Ditto.
37449 (class seg_indexed_store): Ditto.
37450 (class vlsegff): Ditto.
37452 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37453 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
37463 * config/riscv/riscv-vector-builtins-shapes.cc (struct
37464 seg_loadstore_def): Ditto.
37465 (struct seg_indexed_loadstore_def): Ditto.
37466 (struct seg_fault_load_def): Ditto.
37468 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37469 * config/riscv/riscv-vector-builtins.cc
37470 (function_builder::append_nf): New function.
37471 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
37472 Change ptr from double into float.
37473 (vfloat32m1x3_t): Ditto.
37474 (vfloat32m1x4_t): Ditto.
37475 (vfloat32m1x5_t): Ditto.
37476 (vfloat32m1x6_t): Ditto.
37477 (vfloat32m1x7_t): Ditto.
37478 (vfloat32m1x8_t): Ditto.
37479 (vfloat32m2x2_t): Ditto.
37480 (vfloat32m2x3_t): Ditto.
37481 (vfloat32m2x4_t): Ditto.
37482 (vfloat32m4x2_t): Ditto.
37483 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
37484 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
37486 * config/riscv/riscv.md: Add segment instructions.
37487 * config/riscv/vector-iterators.md: Support segment intrinsics.
37488 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
37490 (@pred_unit_strided_store<mode>): Ditto.
37491 (@pred_strided_load<mode>): Ditto.
37492 (@pred_strided_store<mode>): Ditto.
37493 (@pred_fault_load<mode>): Ditto.
37494 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
37495 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
37496 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
37497 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
37498 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
37499 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
37500 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
37501 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
37502 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
37503 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
37504 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
37505 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
37506 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
37507 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
37509 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37511 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
37512 tuple type support.
37514 (floattype): Ditto.
37516 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
37517 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
37519 (vget): Add tuple type vget.
37520 * config/riscv/riscv-vector-builtins-types.def
37521 (DEF_RVV_TUPLE_OPS): New macro.
37522 (vint8mf8x2_t): Ditto.
37523 (vuint8mf8x2_t): Ditto.
37524 (vint8mf8x3_t): Ditto.
37525 (vuint8mf8x3_t): Ditto.
37526 (vint8mf8x4_t): Ditto.
37527 (vuint8mf8x4_t): Ditto.
37528 (vint8mf8x5_t): Ditto.
37529 (vuint8mf8x5_t): Ditto.
37530 (vint8mf8x6_t): Ditto.
37531 (vuint8mf8x6_t): Ditto.
37532 (vint8mf8x7_t): Ditto.
37533 (vuint8mf8x7_t): Ditto.
37534 (vint8mf8x8_t): Ditto.
37535 (vuint8mf8x8_t): Ditto.
37536 (vint8mf4x2_t): Ditto.
37537 (vuint8mf4x2_t): Ditto.
37538 (vint8mf4x3_t): Ditto.
37539 (vuint8mf4x3_t): Ditto.
37540 (vint8mf4x4_t): Ditto.
37541 (vuint8mf4x4_t): Ditto.
37542 (vint8mf4x5_t): Ditto.
37543 (vuint8mf4x5_t): Ditto.
37544 (vint8mf4x6_t): Ditto.
37545 (vuint8mf4x6_t): Ditto.
37546 (vint8mf4x7_t): Ditto.
37547 (vuint8mf4x7_t): Ditto.
37548 (vint8mf4x8_t): Ditto.
37549 (vuint8mf4x8_t): Ditto.
37550 (vint8mf2x2_t): Ditto.
37551 (vuint8mf2x2_t): Ditto.
37552 (vint8mf2x3_t): Ditto.
37553 (vuint8mf2x3_t): Ditto.
37554 (vint8mf2x4_t): Ditto.
37555 (vuint8mf2x4_t): Ditto.
37556 (vint8mf2x5_t): Ditto.
37557 (vuint8mf2x5_t): Ditto.
37558 (vint8mf2x6_t): Ditto.
37559 (vuint8mf2x6_t): Ditto.
37560 (vint8mf2x7_t): Ditto.
37561 (vuint8mf2x7_t): Ditto.
37562 (vint8mf2x8_t): Ditto.
37563 (vuint8mf2x8_t): Ditto.
37564 (vint8m1x2_t): Ditto.
37565 (vuint8m1x2_t): Ditto.
37566 (vint8m1x3_t): Ditto.
37567 (vuint8m1x3_t): Ditto.
37568 (vint8m1x4_t): Ditto.
37569 (vuint8m1x4_t): Ditto.
37570 (vint8m1x5_t): Ditto.
37571 (vuint8m1x5_t): Ditto.
37572 (vint8m1x6_t): Ditto.
37573 (vuint8m1x6_t): Ditto.
37574 (vint8m1x7_t): Ditto.
37575 (vuint8m1x7_t): Ditto.
37576 (vint8m1x8_t): Ditto.
37577 (vuint8m1x8_t): Ditto.
37578 (vint8m2x2_t): Ditto.
37579 (vuint8m2x2_t): Ditto.
37580 (vint8m2x3_t): Ditto.
37581 (vuint8m2x3_t): Ditto.
37582 (vint8m2x4_t): Ditto.
37583 (vuint8m2x4_t): Ditto.
37584 (vint8m4x2_t): Ditto.
37585 (vuint8m4x2_t): Ditto.
37586 (vint16mf4x2_t): Ditto.
37587 (vuint16mf4x2_t): Ditto.
37588 (vint16mf4x3_t): Ditto.
37589 (vuint16mf4x3_t): Ditto.
37590 (vint16mf4x4_t): Ditto.
37591 (vuint16mf4x4_t): Ditto.
37592 (vint16mf4x5_t): Ditto.
37593 (vuint16mf4x5_t): Ditto.
37594 (vint16mf4x6_t): Ditto.
37595 (vuint16mf4x6_t): Ditto.
37596 (vint16mf4x7_t): Ditto.
37597 (vuint16mf4x7_t): Ditto.
37598 (vint16mf4x8_t): Ditto.
37599 (vuint16mf4x8_t): Ditto.
37600 (vint16mf2x2_t): Ditto.
37601 (vuint16mf2x2_t): Ditto.
37602 (vint16mf2x3_t): Ditto.
37603 (vuint16mf2x3_t): Ditto.
37604 (vint16mf2x4_t): Ditto.
37605 (vuint16mf2x4_t): Ditto.
37606 (vint16mf2x5_t): Ditto.
37607 (vuint16mf2x5_t): Ditto.
37608 (vint16mf2x6_t): Ditto.
37609 (vuint16mf2x6_t): Ditto.
37610 (vint16mf2x7_t): Ditto.
37611 (vuint16mf2x7_t): Ditto.
37612 (vint16mf2x8_t): Ditto.
37613 (vuint16mf2x8_t): Ditto.
37614 (vint16m1x2_t): Ditto.
37615 (vuint16m1x2_t): Ditto.
37616 (vint16m1x3_t): Ditto.
37617 (vuint16m1x3_t): Ditto.
37618 (vint16m1x4_t): Ditto.
37619 (vuint16m1x4_t): Ditto.
37620 (vint16m1x5_t): Ditto.
37621 (vuint16m1x5_t): Ditto.
37622 (vint16m1x6_t): Ditto.
37623 (vuint16m1x6_t): Ditto.
37624 (vint16m1x7_t): Ditto.
37625 (vuint16m1x7_t): Ditto.
37626 (vint16m1x8_t): Ditto.
37627 (vuint16m1x8_t): Ditto.
37628 (vint16m2x2_t): Ditto.
37629 (vuint16m2x2_t): Ditto.
37630 (vint16m2x3_t): Ditto.
37631 (vuint16m2x3_t): Ditto.
37632 (vint16m2x4_t): Ditto.
37633 (vuint16m2x4_t): Ditto.
37634 (vint16m4x2_t): Ditto.
37635 (vuint16m4x2_t): Ditto.
37636 (vint32mf2x2_t): Ditto.
37637 (vuint32mf2x2_t): Ditto.
37638 (vint32mf2x3_t): Ditto.
37639 (vuint32mf2x3_t): Ditto.
37640 (vint32mf2x4_t): Ditto.
37641 (vuint32mf2x4_t): Ditto.
37642 (vint32mf2x5_t): Ditto.
37643 (vuint32mf2x5_t): Ditto.
37644 (vint32mf2x6_t): Ditto.
37645 (vuint32mf2x6_t): Ditto.
37646 (vint32mf2x7_t): Ditto.
37647 (vuint32mf2x7_t): Ditto.
37648 (vint32mf2x8_t): Ditto.
37649 (vuint32mf2x8_t): Ditto.
37650 (vint32m1x2_t): Ditto.
37651 (vuint32m1x2_t): Ditto.
37652 (vint32m1x3_t): Ditto.
37653 (vuint32m1x3_t): Ditto.
37654 (vint32m1x4_t): Ditto.
37655 (vuint32m1x4_t): Ditto.
37656 (vint32m1x5_t): Ditto.
37657 (vuint32m1x5_t): Ditto.
37658 (vint32m1x6_t): Ditto.
37659 (vuint32m1x6_t): Ditto.
37660 (vint32m1x7_t): Ditto.
37661 (vuint32m1x7_t): Ditto.
37662 (vint32m1x8_t): Ditto.
37663 (vuint32m1x8_t): Ditto.
37664 (vint32m2x2_t): Ditto.
37665 (vuint32m2x2_t): Ditto.
37666 (vint32m2x3_t): Ditto.
37667 (vuint32m2x3_t): Ditto.
37668 (vint32m2x4_t): Ditto.
37669 (vuint32m2x4_t): Ditto.
37670 (vint32m4x2_t): Ditto.
37671 (vuint32m4x2_t): Ditto.
37672 (vint64m1x2_t): Ditto.
37673 (vuint64m1x2_t): Ditto.
37674 (vint64m1x3_t): Ditto.
37675 (vuint64m1x3_t): Ditto.
37676 (vint64m1x4_t): Ditto.
37677 (vuint64m1x4_t): Ditto.
37678 (vint64m1x5_t): Ditto.
37679 (vuint64m1x5_t): Ditto.
37680 (vint64m1x6_t): Ditto.
37681 (vuint64m1x6_t): Ditto.
37682 (vint64m1x7_t): Ditto.
37683 (vuint64m1x7_t): Ditto.
37684 (vint64m1x8_t): Ditto.
37685 (vuint64m1x8_t): Ditto.
37686 (vint64m2x2_t): Ditto.
37687 (vuint64m2x2_t): Ditto.
37688 (vint64m2x3_t): Ditto.
37689 (vuint64m2x3_t): Ditto.
37690 (vint64m2x4_t): Ditto.
37691 (vuint64m2x4_t): Ditto.
37692 (vint64m4x2_t): Ditto.
37693 (vuint64m4x2_t): Ditto.
37694 (vfloat32mf2x2_t): Ditto.
37695 (vfloat32mf2x3_t): Ditto.
37696 (vfloat32mf2x4_t): Ditto.
37697 (vfloat32mf2x5_t): Ditto.
37698 (vfloat32mf2x6_t): Ditto.
37699 (vfloat32mf2x7_t): Ditto.
37700 (vfloat32mf2x8_t): Ditto.
37701 (vfloat32m1x2_t): Ditto.
37702 (vfloat32m1x3_t): Ditto.
37703 (vfloat32m1x4_t): Ditto.
37704 (vfloat32m1x5_t): Ditto.
37705 (vfloat32m1x6_t): Ditto.
37706 (vfloat32m1x7_t): Ditto.
37707 (vfloat32m1x8_t): Ditto.
37708 (vfloat32m2x2_t): Ditto.
37709 (vfloat32m2x3_t): Ditto.
37710 (vfloat32m2x4_t): Ditto.
37711 (vfloat32m4x2_t): Ditto.
37712 (vfloat64m1x2_t): Ditto.
37713 (vfloat64m1x3_t): Ditto.
37714 (vfloat64m1x4_t): Ditto.
37715 (vfloat64m1x5_t): Ditto.
37716 (vfloat64m1x6_t): Ditto.
37717 (vfloat64m1x7_t): Ditto.
37718 (vfloat64m1x8_t): Ditto.
37719 (vfloat64m2x2_t): Ditto.
37720 (vfloat64m2x3_t): Ditto.
37721 (vfloat64m2x4_t): Ditto.
37722 (vfloat64m4x2_t): Ditto.
37723 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
37725 (DEF_RVV_TYPE_INDEX): Ditto.
37726 (rvv_arg_type_info::get_tuple_subpart_type): New function.
37727 (DEF_RVV_TUPLE_TYPE): New macro.
37728 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
37729 Adapt for tuple vget/vset support.
37730 (vint8mf4_t): Ditto.
37731 (vuint8mf4_t): Ditto.
37732 (vint8mf2_t): Ditto.
37733 (vuint8mf2_t): Ditto.
37734 (vint8m1_t): Ditto.
37735 (vuint8m1_t): Ditto.
37736 (vint8m2_t): Ditto.
37737 (vuint8m2_t): Ditto.
37738 (vint8m4_t): Ditto.
37739 (vuint8m4_t): Ditto.
37740 (vint8m8_t): Ditto.
37741 (vuint8m8_t): Ditto.
37742 (vint16mf4_t): Ditto.
37743 (vuint16mf4_t): Ditto.
37744 (vint16mf2_t): Ditto.
37745 (vuint16mf2_t): Ditto.
37746 (vint16m1_t): Ditto.
37747 (vuint16m1_t): Ditto.
37748 (vint16m2_t): Ditto.
37749 (vuint16m2_t): Ditto.
37750 (vint16m4_t): Ditto.
37751 (vuint16m4_t): Ditto.
37752 (vint16m8_t): Ditto.
37753 (vuint16m8_t): Ditto.
37754 (vint32mf2_t): Ditto.
37755 (vuint32mf2_t): Ditto.
37756 (vint32m1_t): Ditto.
37757 (vuint32m1_t): Ditto.
37758 (vint32m2_t): Ditto.
37759 (vuint32m2_t): Ditto.
37760 (vint32m4_t): Ditto.
37761 (vuint32m4_t): Ditto.
37762 (vint32m8_t): Ditto.
37763 (vuint32m8_t): Ditto.
37764 (vint64m1_t): Ditto.
37765 (vuint64m1_t): Ditto.
37766 (vint64m2_t): Ditto.
37767 (vuint64m2_t): Ditto.
37768 (vint64m4_t): Ditto.
37769 (vuint64m4_t): Ditto.
37770 (vint64m8_t): Ditto.
37771 (vuint64m8_t): Ditto.
37772 (vfloat32mf2_t): Ditto.
37773 (vfloat32m1_t): Ditto.
37774 (vfloat32m2_t): Ditto.
37775 (vfloat32m4_t): Ditto.
37776 (vfloat32m8_t): Ditto.
37777 (vfloat64m1_t): Ditto.
37778 (vfloat64m2_t): Ditto.
37779 (vfloat64m4_t): Ditto.
37780 (vfloat64m8_t): Ditto.
37781 (tuple_subpart): Add tuple subpart base type.
37782 * config/riscv/riscv-vector-builtins.h (struct
37783 rvv_arg_type_info): Ditto.
37784 (tuple_type_field): New function.
37786 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37788 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
37789 (RVV_TUPLE_PARTIAL_MODES): Ditto.
37790 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
37793 (get_subpart_mode): Ditto.
37794 (get_tuple_mode): Ditto.
37795 (expand_tuple_move): Ditto.
37796 * config/riscv/riscv-v.cc (ENTRY): New macro.
37797 (TUPLE_ENTRY): Ditto.
37798 (get_nf): New function.
37799 (get_subpart_mode): Ditto.
37800 (get_tuple_mode): Ditto.
37801 (expand_tuple_move): Ditto.
37802 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
37804 (register_tuple_type): New function
37805 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
37807 (vint8mf8x2_t): New macro.
37808 (vuint8mf8x2_t): Ditto.
37809 (vint8mf8x3_t): Ditto.
37810 (vuint8mf8x3_t): Ditto.
37811 (vint8mf8x4_t): Ditto.
37812 (vuint8mf8x4_t): Ditto.
37813 (vint8mf8x5_t): Ditto.
37814 (vuint8mf8x5_t): Ditto.
37815 (vint8mf8x6_t): Ditto.
37816 (vuint8mf8x6_t): Ditto.
37817 (vint8mf8x7_t): Ditto.
37818 (vuint8mf8x7_t): Ditto.
37819 (vint8mf8x8_t): Ditto.
37820 (vuint8mf8x8_t): Ditto.
37821 (vint8mf4x2_t): Ditto.
37822 (vuint8mf4x2_t): Ditto.
37823 (vint8mf4x3_t): Ditto.
37824 (vuint8mf4x3_t): Ditto.
37825 (vint8mf4x4_t): Ditto.
37826 (vuint8mf4x4_t): Ditto.
37827 (vint8mf4x5_t): Ditto.
37828 (vuint8mf4x5_t): Ditto.
37829 (vint8mf4x6_t): Ditto.
37830 (vuint8mf4x6_t): Ditto.
37831 (vint8mf4x7_t): Ditto.
37832 (vuint8mf4x7_t): Ditto.
37833 (vint8mf4x8_t): Ditto.
37834 (vuint8mf4x8_t): Ditto.
37835 (vint8mf2x2_t): Ditto.
37836 (vuint8mf2x2_t): Ditto.
37837 (vint8mf2x3_t): Ditto.
37838 (vuint8mf2x3_t): Ditto.
37839 (vint8mf2x4_t): Ditto.
37840 (vuint8mf2x4_t): Ditto.
37841 (vint8mf2x5_t): Ditto.
37842 (vuint8mf2x5_t): Ditto.
37843 (vint8mf2x6_t): Ditto.
37844 (vuint8mf2x6_t): Ditto.
37845 (vint8mf2x7_t): Ditto.
37846 (vuint8mf2x7_t): Ditto.
37847 (vint8mf2x8_t): Ditto.
37848 (vuint8mf2x8_t): Ditto.
37849 (vint8m1x2_t): Ditto.
37850 (vuint8m1x2_t): Ditto.
37851 (vint8m1x3_t): Ditto.
37852 (vuint8m1x3_t): Ditto.
37853 (vint8m1x4_t): Ditto.
37854 (vuint8m1x4_t): Ditto.
37855 (vint8m1x5_t): Ditto.
37856 (vuint8m1x5_t): Ditto.
37857 (vint8m1x6_t): Ditto.
37858 (vuint8m1x6_t): Ditto.
37859 (vint8m1x7_t): Ditto.
37860 (vuint8m1x7_t): Ditto.
37861 (vint8m1x8_t): Ditto.
37862 (vuint8m1x8_t): Ditto.
37863 (vint8m2x2_t): Ditto.
37864 (vuint8m2x2_t): Ditto.
37865 (vint8m2x3_t): Ditto.
37866 (vuint8m2x3_t): Ditto.
37867 (vint8m2x4_t): Ditto.
37868 (vuint8m2x4_t): Ditto.
37869 (vint8m4x2_t): Ditto.
37870 (vuint8m4x2_t): Ditto.
37871 (vint16mf4x2_t): Ditto.
37872 (vuint16mf4x2_t): Ditto.
37873 (vint16mf4x3_t): Ditto.
37874 (vuint16mf4x3_t): Ditto.
37875 (vint16mf4x4_t): Ditto.
37876 (vuint16mf4x4_t): Ditto.
37877 (vint16mf4x5_t): Ditto.
37878 (vuint16mf4x5_t): Ditto.
37879 (vint16mf4x6_t): Ditto.
37880 (vuint16mf4x6_t): Ditto.
37881 (vint16mf4x7_t): Ditto.
37882 (vuint16mf4x7_t): Ditto.
37883 (vint16mf4x8_t): Ditto.
37884 (vuint16mf4x8_t): Ditto.
37885 (vint16mf2x2_t): Ditto.
37886 (vuint16mf2x2_t): Ditto.
37887 (vint16mf2x3_t): Ditto.
37888 (vuint16mf2x3_t): Ditto.
37889 (vint16mf2x4_t): Ditto.
37890 (vuint16mf2x4_t): Ditto.
37891 (vint16mf2x5_t): Ditto.
37892 (vuint16mf2x5_t): Ditto.
37893 (vint16mf2x6_t): Ditto.
37894 (vuint16mf2x6_t): Ditto.
37895 (vint16mf2x7_t): Ditto.
37896 (vuint16mf2x7_t): Ditto.
37897 (vint16mf2x8_t): Ditto.
37898 (vuint16mf2x8_t): Ditto.
37899 (vint16m1x2_t): Ditto.
37900 (vuint16m1x2_t): Ditto.
37901 (vint16m1x3_t): Ditto.
37902 (vuint16m1x3_t): Ditto.
37903 (vint16m1x4_t): Ditto.
37904 (vuint16m1x4_t): Ditto.
37905 (vint16m1x5_t): Ditto.
37906 (vuint16m1x5_t): Ditto.
37907 (vint16m1x6_t): Ditto.
37908 (vuint16m1x6_t): Ditto.
37909 (vint16m1x7_t): Ditto.
37910 (vuint16m1x7_t): Ditto.
37911 (vint16m1x8_t): Ditto.
37912 (vuint16m1x8_t): Ditto.
37913 (vint16m2x2_t): Ditto.
37914 (vuint16m2x2_t): Ditto.
37915 (vint16m2x3_t): Ditto.
37916 (vuint16m2x3_t): Ditto.
37917 (vint16m2x4_t): Ditto.
37918 (vuint16m2x4_t): Ditto.
37919 (vint16m4x2_t): Ditto.
37920 (vuint16m4x2_t): Ditto.
37921 (vint32mf2x2_t): Ditto.
37922 (vuint32mf2x2_t): Ditto.
37923 (vint32mf2x3_t): Ditto.
37924 (vuint32mf2x3_t): Ditto.
37925 (vint32mf2x4_t): Ditto.
37926 (vuint32mf2x4_t): Ditto.
37927 (vint32mf2x5_t): Ditto.
37928 (vuint32mf2x5_t): Ditto.
37929 (vint32mf2x6_t): Ditto.
37930 (vuint32mf2x6_t): Ditto.
37931 (vint32mf2x7_t): Ditto.
37932 (vuint32mf2x7_t): Ditto.
37933 (vint32mf2x8_t): Ditto.
37934 (vuint32mf2x8_t): Ditto.
37935 (vint32m1x2_t): Ditto.
37936 (vuint32m1x2_t): Ditto.
37937 (vint32m1x3_t): Ditto.
37938 (vuint32m1x3_t): Ditto.
37939 (vint32m1x4_t): Ditto.
37940 (vuint32m1x4_t): Ditto.
37941 (vint32m1x5_t): Ditto.
37942 (vuint32m1x5_t): Ditto.
37943 (vint32m1x6_t): Ditto.
37944 (vuint32m1x6_t): Ditto.
37945 (vint32m1x7_t): Ditto.
37946 (vuint32m1x7_t): Ditto.
37947 (vint32m1x8_t): Ditto.
37948 (vuint32m1x8_t): Ditto.
37949 (vint32m2x2_t): Ditto.
37950 (vuint32m2x2_t): Ditto.
37951 (vint32m2x3_t): Ditto.
37952 (vuint32m2x3_t): Ditto.
37953 (vint32m2x4_t): Ditto.
37954 (vuint32m2x4_t): Ditto.
37955 (vint32m4x2_t): Ditto.
37956 (vuint32m4x2_t): Ditto.
37957 (vint64m1x2_t): Ditto.
37958 (vuint64m1x2_t): Ditto.
37959 (vint64m1x3_t): Ditto.
37960 (vuint64m1x3_t): Ditto.
37961 (vint64m1x4_t): Ditto.
37962 (vuint64m1x4_t): Ditto.
37963 (vint64m1x5_t): Ditto.
37964 (vuint64m1x5_t): Ditto.
37965 (vint64m1x6_t): Ditto.
37966 (vuint64m1x6_t): Ditto.
37967 (vint64m1x7_t): Ditto.
37968 (vuint64m1x7_t): Ditto.
37969 (vint64m1x8_t): Ditto.
37970 (vuint64m1x8_t): Ditto.
37971 (vint64m2x2_t): Ditto.
37972 (vuint64m2x2_t): Ditto.
37973 (vint64m2x3_t): Ditto.
37974 (vuint64m2x3_t): Ditto.
37975 (vint64m2x4_t): Ditto.
37976 (vuint64m2x4_t): Ditto.
37977 (vint64m4x2_t): Ditto.
37978 (vuint64m4x2_t): Ditto.
37979 (vfloat32mf2x2_t): Ditto.
37980 (vfloat32mf2x3_t): Ditto.
37981 (vfloat32mf2x4_t): Ditto.
37982 (vfloat32mf2x5_t): Ditto.
37983 (vfloat32mf2x6_t): Ditto.
37984 (vfloat32mf2x7_t): Ditto.
37985 (vfloat32mf2x8_t): Ditto.
37986 (vfloat32m1x2_t): Ditto.
37987 (vfloat32m1x3_t): Ditto.
37988 (vfloat32m1x4_t): Ditto.
37989 (vfloat32m1x5_t): Ditto.
37990 (vfloat32m1x6_t): Ditto.
37991 (vfloat32m1x7_t): Ditto.
37992 (vfloat32m1x8_t): Ditto.
37993 (vfloat32m2x2_t): Ditto.
37994 (vfloat32m2x3_t): Ditto.
37995 (vfloat32m2x4_t): Ditto.
37996 (vfloat32m4x2_t): Ditto.
37997 (vfloat64m1x2_t): Ditto.
37998 (vfloat64m1x3_t): Ditto.
37999 (vfloat64m1x4_t): Ditto.
38000 (vfloat64m1x5_t): Ditto.
38001 (vfloat64m1x6_t): Ditto.
38002 (vfloat64m1x7_t): Ditto.
38003 (vfloat64m1x8_t): Ditto.
38004 (vfloat64m2x2_t): Ditto.
38005 (vfloat64m2x3_t): Ditto.
38006 (vfloat64m2x4_t): Ditto.
38007 (vfloat64m4x2_t): Ditto.
38008 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
38010 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
38011 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
38013 (TUPLE_ENTRY): Ditto.
38014 (riscv_v_ext_mode_p): New function.
38015 (riscv_v_adjust_nunits): Add tuple mode adjustment.
38016 (riscv_classify_address): Ditto.
38017 (riscv_binary_cost): Ditto.
38018 (riscv_rtx_costs): Ditto.
38019 (riscv_secondary_memory_needed): Ditto.
38020 (riscv_hard_regno_nregs): Ditto.
38021 (riscv_hard_regno_mode_ok): Ditto.
38022 (riscv_vector_mode_supported_p): Ditto.
38023 (riscv_regmode_natural_size): Ditto.
38024 (riscv_array_mode): New function.
38025 (TARGET_ARRAY_MODE): New target hook.
38026 * config/riscv/riscv.md: Add tuple modes.
38027 * config/riscv/vector-iterators.md: Ditto.
38028 * config/riscv/vector.md (mov<mode>): Add tuple modes data
38030 (*mov<VT:mode>_<P:mode>): Ditto.
38032 2023-05-03 Richard Biener <rguenther@suse.de>
38034 * cse.cc (cse_insn): Track an equivalence to the destination
38035 separately and delay using src_related for it.
38037 2023-05-03 Richard Biener <rguenther@suse.de>
38039 * cse.cc (HASH): Turn into inline function and mix
38040 in another HASH_SHIFT bits.
38041 (SAFE_HASH): Likewise.
38043 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38046 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
38047 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
38049 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38052 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
38053 (add<mode>3<vczle><vczbe>): ... This.
38054 (sub<mode>3): Rename to...
38055 (sub<mode>3<vczle><vczbe>): ... This.
38056 (mul<mode>3): Rename to...
38057 (mul<mode>3<vczle><vczbe>): ... This.
38058 (*div<mode>3): Rename to...
38059 (*div<mode>3<vczle><vczbe>): ... This.
38060 (neg<mode>2): Rename to...
38061 (neg<mode>2<vczle><vczbe>): ... This.
38062 (abs<mode>2): Rename to...
38063 (abs<mode>2<vczle><vczbe>): ... This.
38064 (<frint_pattern><mode>2): Rename to...
38065 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
38066 (<fmaxmin><mode>3): Rename to...
38067 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
38068 (*sqrt<mode>2): Rename to...
38069 (*sqrt<mode>2<vczle><vczbe>): ... This.
38071 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
38073 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
38075 2023-05-03 Martin Liska <mliska@suse.cz>
38077 PR tree-optimization/109693
38078 * value-range-storage.cc (vrange_allocator::vrange_allocator):
38079 Remove unused field.
38080 * value-range-storage.h: Likewise.
38082 2023-05-02 Andrew Pinski <apinski@marvell.com>
38084 * tree-ssa-phiopt.cc (move_stmt): New function.
38085 (match_simplify_replacement): Use move_stmt instead
38086 of the inlined version.
38088 2023-05-02 Andrew Pinski <apinski@marvell.com>
38090 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
38093 2023-05-02 Andrew Pinski <apinski@marvell.com>
38095 PR tree-optimization/109702
38096 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
38097 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
38099 2023-05-02 Andrew Pinski <apinski@marvell.com>
38102 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
38103 insn_and_split pattern.
38105 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38107 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
38110 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38112 * config/riscv/sync.md (mem_thread_fence_1): Change fence
38113 depending on the given memory model.
38115 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38117 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
38118 riscv_union_memmodels function to sync.md.
38119 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
38120 get the union of two memmodels in sync.md.
38121 (riscv_print_operand): Add %I and %J flags that output the
38122 optimal LR/SC flag bits for a given memory model.
38123 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
38124 bits on SC op and replace with optimized %I, %J flags.
38126 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38128 * config/riscv/riscv.cc
38129 (riscv_memmodel_needs_amo_release): Change function name.
38130 (riscv_print_operand): Remove unneeded %F case.
38131 * config/riscv/sync.md: Remove unneeded fences.
38133 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38136 * config/riscv/sync.md (atomic_store<mode>): Use simple store
38137 instruction in combination with fence(s).
38139 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38141 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
38142 of %A to include release bits.
38144 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38146 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
38147 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
38150 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38152 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
38153 sequentially consistent LR.aqrl/SC.rl pairs.
38155 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
38157 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
38158 sanitize memmodel input with memmodel_base.
38160 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
38161 Pan Li <pan2.li@intel.com>
38164 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
38166 2023-05-02 Romain Naour <romain.naour@gmail.com>
38168 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
38171 2023-05-02 Martin Liska <mliska@suse.cz>
38173 * doc/invoke.texi: Update documentation based on param.opt file.
38175 2023-05-02 Richard Biener <rguenther@suse.de>
38177 PR tree-optimization/109672
38178 * tree-vect-stmts.cc (vectorizable_operation): For plus,
38179 minus and negate always check the vector mode is word mode.
38181 2023-05-01 Andrew Pinski <apinski@marvell.com>
38183 * tree-ssa-phiopt.cc: Update comment about
38184 how the transformation are implemented.
38186 2023-05-01 Jeff Law <jlaw@ventanamicro>
38188 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
38190 2023-05-01 Jeff Law <jlaw@ventanamicro>
38192 * config/cris/cris.cc (TARGET_LRA_P): Remove.
38193 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
38194 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
38195 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
38196 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
38197 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
38199 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
38201 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
38202 * print-tree.cc (print_decl_identifier): Implement it.
38203 * toplev.cc (output_stack_usage_1): Use it.
38205 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38207 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
38210 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38212 * value-range.h (irange::set_nonzero): Inline.
38214 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38216 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
38218 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
38219 invalid_range, as it is an inverse range.
38220 * tree-vrp.cc (find_case_label_range): Avoid trees.
38221 * value-range.cc (irange::irange_set): Delete.
38222 (irange::irange_set_1bit_anti_range): Delete.
38223 (irange::irange_set_anti_range): Delete.
38224 (irange::set): Cleanup.
38225 * value-range.h (class irange): Remove irange_set,
38226 irange_set_anti_range, irange_set_1bit_anti_range.
38227 (irange::set_undefined): Remove set to m_type.
38229 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38231 * range-op.cc (update_known_bitmask): Adjust for irange containing
38232 wide_ints internally.
38233 * tree-ssanames.cc (set_nonzero_bits): Same.
38234 * tree-ssanames.h (set_nonzero_bits): Same.
38235 * value-range-storage.cc (irange_storage::set_irange): Same.
38236 (irange_storage::get_irange): Same.
38237 * value-range.cc (irange::operator=): Same.
38238 (irange::irange_set): Same.
38239 (irange::irange_set_1bit_anti_range): Same.
38240 (irange::irange_set_anti_range): Same.
38241 (irange::set): Same.
38242 (irange::verify_range): Same.
38243 (irange::contains_p): Same.
38244 (irange::irange_single_pair_union): Same.
38245 (irange::union_): Same.
38246 (irange::irange_contains_p): Same.
38247 (irange::intersect): Same.
38248 (irange::invert): Same.
38249 (irange::set_range_from_nonzero_bits): Same.
38250 (irange::set_nonzero_bits): Same.
38251 (mask_to_wi): Same.
38252 (irange::intersect_nonzero_bits): Same.
38253 (irange::union_nonzero_bits): Same.
38256 (tree_range): Same.
38257 (range_tests_strict_enum): Same.
38258 (range_tests_misc): Same.
38259 (range_tests_nonzero_bits): Same.
38260 * value-range.h (irange::type): Same.
38261 (irange::varying_compatible_p): Same.
38262 (irange::irange): Same.
38263 (int_range::int_range): Same.
38264 (irange::set_undefined): Same.
38265 (irange::set_varying): Same.
38266 (irange::lower_bound): Same.
38267 (irange::upper_bound): Same.
38269 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38271 * gimple-range-fold.cc (tree_lower_bound): Delete.
38272 (tree_upper_bound): Delete.
38273 (vrp_val_max): Delete.
38274 (vrp_val_min): Delete.
38275 (fold_using_range::range_of_ssa_name_with_loop_info): Call
38276 range_of_var_in_loop.
38277 * vr-values.cc (valid_value_p): Delete.
38278 (fix_overflow): Delete.
38279 (get_scev_info): New.
38280 (bounds_of_var_in_loop): Refactor into...
38281 (induction_variable_may_overflow_p): ...this,
38282 (range_from_loop_direction): ...and this,
38283 (range_of_var_in_loop): ...and this.
38284 * vr-values.h (bounds_of_var_in_loop): Delete.
38285 (range_of_var_in_loop): New.
38287 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38289 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
38291 (vrp_val_max): New.
38292 (vrp_val_min): New.
38293 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
38294 * range-op.cc (max_limit): Same.
38296 (plus_minus_ranges): Same.
38297 (operator_rshift::op1_range): Same.
38298 (operator_cast::inside_domain_p): Same.
38299 * value-range.cc (vrp_val_is_max): Delete.
38300 (vrp_val_is_min): Delete.
38301 (range_tests_misc): Use irange_val_*.
38302 * value-range.h (vrp_val_is_min): Delete.
38303 (vrp_val_is_max): Delete.
38304 (vrp_val_max): Delete.
38305 (irange_val_min): New.
38306 (vrp_val_min): Delete.
38307 (irange_val_max): New.
38308 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
38310 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38312 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
38313 * gimple-fold.cc (size_must_be_zero_p): Same.
38314 * gimple-loop-versioning.cc
38315 (loop_versioning::prune_loop_conditions): Same.
38316 * gimple-range-edge.cc (gcond_edge_range): Same.
38317 (gimple_outgoing_range::calc_switch_ranges): Same.
38318 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
38319 (adjust_realpart_expr): Same.
38320 (fold_using_range::range_of_address): Same.
38321 (fold_using_range::relation_fold_and_or): Same.
38322 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
38323 (range_is_either_true_or_false): Same.
38324 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
38325 (cfn_clz::fold_range): Same.
38326 (cfn_ctz::fold_range): Same.
38327 * gimple-range-tests.cc (class test_expr_eval): Same.
38328 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
38329 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
38330 (propagate_vr_across_jump_function): Same.
38331 (decide_whether_version_node): Same.
38332 * ipa-prop.cc (ipa_get_value_range): Same.
38333 * ipa-prop.h (ipa_range_set_and_normalize): Same.
38334 * range-op.cc (get_shift_range): Same.
38335 (value_range_from_overflowed_bounds): Same.
38336 (value_range_with_overflow): Same.
38337 (create_possibly_reversed_range): Same.
38338 (equal_op1_op2_relation): Same.
38339 (not_equal_op1_op2_relation): Same.
38340 (lt_op1_op2_relation): Same.
38341 (le_op1_op2_relation): Same.
38342 (gt_op1_op2_relation): Same.
38343 (ge_op1_op2_relation): Same.
38344 (operator_mult::op1_range): Same.
38345 (operator_exact_divide::op1_range): Same.
38346 (operator_lshift::op1_range): Same.
38347 (operator_rshift::op1_range): Same.
38348 (operator_cast::op1_range): Same.
38349 (operator_logical_and::fold_range): Same.
38350 (set_nonzero_range_from_mask): Same.
38351 (operator_bitwise_or::op1_range): Same.
38352 (operator_bitwise_xor::op1_range): Same.
38353 (operator_addr_expr::fold_range): Same.
38354 (pointer_plus_operator::wi_fold): Same.
38355 (pointer_or_operator::op1_range): Same.
38362 (range_op_cast_tests): Same.
38363 (range_op_lshift_tests): Same.
38364 (range_op_rshift_tests): Same.
38365 (range_op_bitwise_and_tests): Same.
38366 (range_relational_tests): Same.
38367 * range.cc (range_zero): Same.
38368 (range_nonzero): Same.
38369 * range.h (range_true): Same.
38370 (range_false): Same.
38371 (range_true_and_false): Same.
38372 * tree-data-ref.cc (split_constant_offset_1): Same.
38373 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
38374 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
38375 (find_unswitching_predicates_for_bb): Same.
38376 * tree-ssa-phiopt.cc (value_replacement): Same.
38377 * tree-ssa-threadbackward.cc
38378 (back_threader::find_taken_edge_cond): Same.
38379 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
38380 * tree-vrp.cc (find_case_label_range): Same.
38381 * value-query.cc (range_query::get_tree_range): Same.
38382 * value-range.cc (irange::set_nonnegative): Same.
38383 (frange::contains_p): Same.
38384 (frange::singleton_p): Same.
38385 (frange::internal_singleton_p): Same.
38386 (irange::irange_set): Same.
38387 (irange::irange_set_1bit_anti_range): Same.
38388 (irange::irange_set_anti_range): Same.
38389 (irange::set): Same.
38390 (irange::operator==): Same.
38391 (irange::singleton_p): Same.
38392 (irange::contains_p): Same.
38393 (irange::set_range_from_nonzero_bits): Same.
38394 (DEFINE_INT_RANGE_INSTANCE): Same.
38404 (range_uint128): New.
38405 (range_uchar): New.
38407 (build_range3): Convert to irange wide_int API.
38408 (range_tests_irange3): Same.
38409 (range_tests_int_range_max): Same.
38410 (range_tests_strict_enum): Same.
38411 (range_tests_misc): Same.
38412 (range_tests_nonzero_bits): Same.
38413 (range_tests_nan): Same.
38414 (range_tests_signed_zeros): Same.
38415 * value-range.h (Value_Range::Value_Range): Same.
38416 (irange::set): Same.
38417 (irange::nonzero_p): Same.
38418 (irange::contains_p): Same.
38419 (range_includes_zero_p): Same.
38420 (irange::set_nonzero): Same.
38421 (irange::set_zero): Same.
38422 (contains_zero_p): Same.
38423 (frange::contains_p): Same.
38425 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
38426 (bounds_of_var_in_loop): Same.
38427 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
38429 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38431 * value-range.cc (irange::irange_union): Rename to...
38432 (irange::union_): ...this.
38433 (irange::irange_intersect): Rename to...
38434 (irange::intersect): ...this.
38435 * value-range.h (irange::union_): Delete.
38436 (irange::intersect): Delete.
38438 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38440 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
38442 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38444 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
38446 (compare_ranges): Delete.
38447 (compare_range_with_value): Delete.
38448 (bounds_of_var_in_loop): Tidy up by using ranger API.
38449 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
38450 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
38451 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
38452 strict_overflow_p and only_ranges.
38453 (simplify_using_ranges::legacy_fold_cond): Adjust call to
38454 legacy_fold_cond_overflow.
38455 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
38457 (range_fits_type_p): Rename value_range to irange.
38458 * vr-values.h (range_fits_type_p): Adjust prototype.
38460 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38462 * value-range.cc (irange::irange_set_anti_range): Remove uses of
38463 tree_lower_bound and tree_upper_bound.
38464 (irange::verify_range): Same.
38465 (irange::operator==): Same.
38466 (irange::singleton_p): Same.
38467 * value-range.h (irange::tree_lower_bound): Delete.
38468 (irange::tree_upper_bound): Delete.
38469 (irange::lower_bound): Delete.
38470 (irange::upper_bound): Delete.
38471 (irange::zero_p): Remove uses of tree_lower_bound and
38474 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38476 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
38478 (determine_value_range): Same.
38479 (record_nonwrapping_iv): Same.
38480 (infer_loop_bounds_from_signedness): Same.
38481 (scev_var_range_cant_overflow): Same.
38482 * tree-vrp.cc (operand_less_p): Delete.
38483 * tree-vrp.h (operand_less_p): Delete.
38484 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
38485 (irange::value_inside_range): Delete.
38486 * value-range.h (vrange::kind): Delete.
38487 (irange::num_pairs): Remove check of m_kind.
38488 (irange::min): Delete.
38489 (irange::max): Delete.
38491 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
38493 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
38494 for vrange_storage.
38495 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
38496 (sbr_vector::grow): Same.
38497 (sbr_vector::set_bb_range): Same.
38498 (sbr_vector::get_bb_range): Same.
38499 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
38500 (sbr_sparse_bitmap::set_bb_range): Same.
38501 (sbr_sparse_bitmap::get_bb_range): Same.
38502 (block_range_cache::block_range_cache): Same.
38503 (ssa_global_cache::ssa_global_cache): Same.
38504 (ssa_global_cache::get_global_range): Same.
38505 (ssa_global_cache::set_global_range): Same.
38506 * gimple-range-cache.h: Same.
38507 * gimple-range-edge.cc
38508 (gimple_outgoing_range::gimple_outgoing_range): Same.
38509 (gimple_outgoing_range::switch_edge_range): Same.
38510 (gimple_outgoing_range::calc_switch_ranges): Same.
38511 * gimple-range-edge.h: Same.
38512 * gimple-range-infer.cc
38513 (infer_range_manager::infer_range_manager): Same.
38514 (infer_range_manager::get_nonzero): Same.
38515 (infer_range_manager::maybe_adjust_range): Same.
38516 (infer_range_manager::add_range): Same.
38517 * gimple-range-infer.h: Rename obstack_vrange_allocator to
38519 * tree-core.h (struct irange_storage_slot): Remove.
38520 (struct tree_ssa_name): Remove irange_info and frange_info. Make
38521 range_info a pointer to vrange_storage.
38522 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
38523 (range_info_alloc): Same.
38524 (range_info_free): Same.
38525 (range_info_get_range): Same.
38526 (range_info_set_range): Same.
38527 (get_nonzero_bits): Same.
38528 * value-query.cc (get_ssa_name_range_info): Same.
38529 * value-range-storage.cc (class vrange_internal_alloc): New.
38530 (class vrange_obstack_alloc): New.
38531 (class vrange_ggc_alloc): New.
38532 (vrange_allocator::vrange_allocator): New.
38533 (vrange_allocator::~vrange_allocator): New.
38534 (vrange_storage::alloc_slot): New.
38535 (vrange_allocator::alloc): New.
38536 (vrange_allocator::free): New.
38537 (vrange_allocator::clone): New.
38538 (vrange_allocator::clone_varying): New.
38539 (vrange_allocator::clone_undefined): New.
38540 (vrange_storage::alloc): New.
38541 (vrange_storage::set_vrange): Remove slot argument.
38542 (vrange_storage::get_vrange): Same.
38543 (vrange_storage::fits_p): Same.
38544 (vrange_storage::equal_p): New.
38545 (irange_storage::write_lengths_address): New.
38546 (irange_storage::lengths_address): New.
38547 (irange_storage_slot::alloc_slot): Remove.
38548 (irange_storage::alloc): New.
38549 (irange_storage_slot::irange_storage_slot): Remove.
38550 (irange_storage::irange_storage): New.
38551 (write_wide_int): New.
38552 (irange_storage_slot::set_irange): Remove.
38553 (irange_storage::set_irange): New.
38554 (read_wide_int): New.
38555 (irange_storage_slot::get_irange): Remove.
38556 (irange_storage::get_irange): New.
38557 (irange_storage_slot::size): Remove.
38558 (irange_storage::equal_p): New.
38559 (irange_storage_slot::num_wide_ints_needed): Remove.
38560 (irange_storage::size): New.
38561 (irange_storage_slot::fits_p): Remove.
38562 (irange_storage::fits_p): New.
38563 (irange_storage_slot::dump): Remove.
38564 (irange_storage::dump): New.
38565 (frange_storage_slot::alloc_slot): Remove.
38566 (frange_storage::alloc): New.
38567 (frange_storage_slot::set_frange): Remove.
38568 (frange_storage::set_frange): New.
38569 (frange_storage_slot::get_frange): Remove.
38570 (frange_storage::get_frange): New.
38571 (frange_storage_slot::fits_p): Remove.
38572 (frange_storage::equal_p): New.
38573 (frange_storage::fits_p): New.
38574 (ggc_vrange_allocator): New.
38575 (ggc_alloc_vrange_storage): New.
38576 * value-range-storage.h (class vrange_storage): Rewrite.
38577 (class irange_storage): Rewrite.
38578 (class frange_storage): Rewrite.
38579 (class obstack_vrange_allocator): Remove.
38580 (class ggc_vrange_allocator): Remove.
38581 (vrange_allocator::alloc_vrange): Remove.
38582 (vrange_allocator::alloc_irange): Remove.
38583 (vrange_allocator::alloc_frange): Remove.
38584 (ggc_alloc_vrange_storage): New.
38585 * value-range.h (class irange): Rename vrange_allocator to
38587 (class frange): Same.
38589 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
38591 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
38592 inc to avoid clobbering the carry flag.
38594 2023-04-30 Andrew Pinski <apinski@marvell.com>
38596 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
38597 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
38599 2023-04-30 Andrew Pinski <apinski@marvell.com>
38601 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
38602 Allow some builtin/internal function calls which
38603 are known not to trap/throw.
38604 (phiopt_worker::match_simplify_replacement):
38605 Use name instead of getting the lhs again.
38607 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
38609 * configure: Regenerate.
38610 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
38612 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
38614 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
38615 emit_insn_if_valid_for_reload.
38616 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
38617 to be recognized, also try emitting a parallel that clobbers
38618 TARGET_FLAGS_REGNUM, as applicable.
38620 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
38622 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
38624 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
38625 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
38627 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
38629 * config/stormy16/stormy16.md (any_lshift): New code iterator.
38630 (any_or_plus): Likewise.
38631 (any_rotate): Likewise.
38632 (*<any_lshift>_and_internal): New define_insn_and_split to
38633 recognize a logical shift followed by an AND, and split it
38634 again after reload.
38635 (*swpn): New define_insn matching xstormy16's swpn.
38636 (*swpn_zext): New define_insn recognizing swpn followed by
38637 zero_extendqihi2, i.e. with the high byte set to zero.
38638 (*swpn_sext): Likewise, for swpn followed by cbw.
38639 (*swpn_sext_2): Likewise, for an alternate RTL form.
38640 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
38641 sequence is split in the correct place to recognize the *swpn_zext
38642 followed by any_or_plus (ior, xor or plus) instruction.
38644 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
38647 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
38648 (lm32-*-uclinux*): Likewise.
38650 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
38652 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
38653 for riscv_use_save_libcall.
38654 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
38655 (riscv_compute_frame_info): restructure to decouple stack allocation
38656 for rv32e w/o save-restore.
38658 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
38660 * doc/install.texi: Fix documentation typo
38662 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
38664 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
38665 (u): Add div/udiv cases.
38666 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
38667 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
38669 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
38670 (thead_c906_tune_info): Likewise.
38671 (optimize_size_tune_info): Likewise.
38672 (riscv_use_divmod_expander): New function.
38673 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
38675 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
38677 * config/riscv/bitmanip.md: Added clmulr instruction.
38678 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
38679 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
38681 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
38682 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
38683 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
38684 functions to riscv-cmo.def.
38685 * config/riscv/generic.md: Add clmul to list of instructions
38686 using the generic_imul reservation.
38688 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
38690 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
38692 2023-04-28 Andrew Pinski <apinski@marvell.com>
38694 PR tree-optimization/100958
38695 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
38696 (pass_phiopt::execute): Don't call two_value_replacement.
38697 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
38698 handle what two_value_replacement did.
38700 2023-04-28 Andrew Pinski <apinski@marvell.com>
38702 * match.pd: Add patterns for
38703 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
38705 2023-04-28 Andrew Pinski <apinski@marvell.com>
38707 * match.pd: Factor out the deciding the min/max from
38708 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
38710 * fold-const.cc (minmax_from_comparison): this new function.
38711 * fold-const.h (minmax_from_comparison): New prototype.
38713 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
38715 PR rtl-optimization/109476
38716 * lower-subreg.cc: Include explow.h for force_reg.
38717 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
38718 If decomposing a suitable LSHIFTRT and we're not splitting
38719 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
38720 instead of setting a high part SUBREG to zero, which helps combine.
38721 (decompose_multiword_subregs): Update call to resolve_shift_zext.
38723 2023-04-28 Richard Biener <rguenther@suse.de>
38725 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
38727 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
38728 gather-scatter info and cost emulated scatters accordingly.
38729 (get_load_store_type): Support emulated scatters.
38730 (vectorizable_store): Likewise. Emulate them by extracting
38731 scalar offsets and data, doing scalar stores.
38733 2023-04-28 Richard Biener <rguenther@suse.de>
38735 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
38736 Tame down element extracts and scalar loads for gather/scatter
38737 similar to elementwise strided accesses.
38739 2023-04-28 Pan Li <pan2.li@intel.com>
38740 kito-cheng <kito.cheng@sifive.com>
38742 * config/riscv/vector.md: Add new define split to perform
38743 the simplification.
38745 2023-04-28 Richard Biener <rguenther@suse.de>
38748 * ipa-param-manipulation.cc
38749 (ipa_param_body_adjustments::modify_expression): Allow
38750 conversion of a register to a non-register type. Elide
38751 conversions inside BIT_FIELD_REFs.
38753 2023-04-28 Richard Biener <rguenther@suse.de>
38755 PR tree-optimization/109644
38756 * tree-cfg.cc (verify_types_in_gimple_reference): Check
38757 register constraints on the outermost VIEW_CONVERT_EXPR
38758 only. Do not allow register or invariant bases on
38759 multi-level or possibly variable index handled components.
38761 2023-04-28 Richard Biener <rguenther@suse.de>
38763 * gimplify.cc (gimplify_compound_lval): When there's a
38764 non-register type produced by one of the handled component
38765 operations make sure we get a non-register base.
38767 2023-04-28 Richard Biener <rguenther@suse.de>
38769 PR tree-optimization/108752
38770 * tree-vect-generic.cc (build_replicated_const): Rename
38771 to build_replicated_int_cst and move to tree.{h,cc}.
38772 (do_plus_minus): Adjust.
38773 (do_negate): Likewise.
38774 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
38775 arithmetic vector operations in lowered form.
38776 * tree.h (build_replicated_int_cst): Declare.
38777 * tree.cc (build_replicated_int_cst): Moved from
38778 tree-vect-generic.cc build_replicated_const.
38780 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38783 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
38784 (aarch64_rbit<mode><vczle><vczbe>): ... This.
38785 (neg<mode>2): Rename to...
38786 (neg<mode>2<vczle><vczbe>): ... This.
38787 (abs<mode>2): Rename to...
38788 (abs<mode>2<vczle><vczbe>): ... This.
38789 (aarch64_abs<mode>): Rename to...
38790 (aarch64_abs<mode><vczle><vczbe>): ... This.
38791 (one_cmpl<mode>2): Rename to...
38792 (one_cmpl<mode>2<vczle><vczbe>): ... This.
38793 (clrsb<mode>2): Rename to...
38794 (clrsb<mode>2<vczle><vczbe>): ... This.
38795 (clz<mode>2): Rename to...
38796 (clz<mode>2<vczle><vczbe>): ... This.
38797 (popcount<mode>2): Rename to...
38798 (popcount<mode>2<vczle><vczbe>): ... This.
38800 2023-04-28 Jakub Jelinek <jakub@redhat.com>
38802 * gimple-range-op.cc (class cfn_sqrt): New type.
38803 (op_cfn_sqrt): New variable.
38804 (gimple_range_op_handler::maybe_builtin_call): Handle
38805 CASE_CFN_SQRT{,_FN}.
38807 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
38808 Jakub Jelinek <jakub@redhat.com>
38810 * value-range.h (frange_nextafter): Declare.
38811 * gimple-range-op.cc (class cfn_sincos): New.
38812 (op_cfn_sin, op_cfn_cos): New variables.
38813 (gimple_range_op_handler::maybe_builtin_call): Handle
38814 CASE_CFN_{SIN,COS}{,_FN}.
38816 2023-04-28 Jakub Jelinek <jakub@redhat.com>
38818 * target.def (libm_function_max_error): New target hook.
38819 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
38820 * doc/tm.texi: Regenerated.
38821 * targhooks.h (default_libm_function_max_error,
38822 glibc_linux_libm_function_max_error): Declare.
38823 * targhooks.cc: Include case-cfn-macros.h.
38824 (default_libm_function_max_error,
38825 glibc_linux_libm_function_max_error): New functions.
38826 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38827 * config/linux-protos.h (linux_libm_function_max_error): Declare.
38828 * config/linux.cc: Include target.h and targhooks.h.
38829 (linux_libm_function_max_error): New function.
38830 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
38831 (arc_libm_function_max_error): New function.
38832 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38833 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
38834 (ix86_libm_function_max_error): New function.
38835 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38836 * config/rs6000/rs6000-protos.h
38837 (rs6000_linux_libm_function_max_error): Declare.
38838 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
38839 and case-cfn-macros.h.
38840 (rs6000_linux_libm_function_max_error): New function.
38841 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38842 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38843 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
38844 (or1k_libm_function_max_error): New function.
38845 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38847 2023-04-28 Alexandre Oliva <oliva@adacore.com>
38849 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
38850 Move detach value calls...
38851 (pass_harden_conditional_branches::execute): ... here.
38852 (pass_harden_compares::execute): Detach values before
38855 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
38857 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
38858 (cml<addsub_as><mode>4): Likewise.
38859 (vec_addsub<mode>3): Likewise.
38860 (cadd<rot><mode>3): Likewise.
38861 (vec_fmaddsub<mode>4): Likewise.
38862 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
38864 2023-04-27 Andrew Pinski <apinski@marvell.com>
38866 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
38867 up to 2 min/max expressions in the sequence/match code.
38869 2023-04-27 Andrew Pinski <apinski@marvell.com>
38871 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
38873 * tree-eh.cc (operation_could_trap_helper_p): Treate
38874 MIN_EXPR/MAX_EXPR similar as other comparisons.
38876 2023-04-27 Andrew Pinski <apinski@marvell.com>
38878 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
38880 (cond_if_else_store_replacement): Likewise.
38881 (get_non_trapping): Likewise.
38882 (store_elim_worker): Move into ...
38883 (pass_cselim::execute): This.
38885 2023-04-27 Andrew Pinski <apinski@marvell.com>
38887 * tree-ssa-phiopt.cc (two_value_replacement): Remove
38889 (match_simplify_replacement): Likewise.
38890 (factor_out_conditional_conversion): Likewise.
38891 (value_replacement): Likewise.
38892 (minmax_replacement): Likewise.
38893 (spaceship_replacement): Likewise.
38894 (cond_removal_in_builtin_zero_pattern): Likewise.
38895 (hoist_adjacent_loads): Likewise.
38896 (tree_ssa_phiopt_worker): Move into ...
38897 (pass_phiopt::execute): this.
38899 2023-04-27 Andrew Pinski <apinski@marvell.com>
38901 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
38902 do_store_elim argument and split that part out to ...
38903 (store_elim_worker): This new function.
38904 (pass_cselim::execute): Call store_elim_worker.
38905 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
38907 2023-04-27 Jan Hubicka <jh@suse.cz>
38909 * cfgloopmanip.h (unloop_loops): Export.
38910 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
38911 that no longer loop.
38912 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
38913 vectors of loops to unloop.
38914 (canonicalize_induction_variables): Free vectors here.
38915 (tree_unroll_loops_completely): Free vectors here.
38917 2023-04-27 Richard Biener <rguenther@suse.de>
38919 PR tree-optimization/109170
38920 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
38921 Handle __builtin_expect and similar via cfn_pass_through_arg1
38922 and inspecting the calls fnspec.
38923 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
38924 and BUILT_IN_EXPECT_WITH_PROBABILITY.
38926 2023-04-27 Alexandre Oliva <oliva@adacore.com>
38928 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
38930 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
38932 PR tree-optimization/109639
38933 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
38934 (propagate_vr_across_jump_function): Same.
38935 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
38936 * ipa-prop.h (ipa_range_set_and_normalize): New.
38937 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
38939 2023-04-27 Richard Biener <rguenther@suse.de>
38941 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
38942 create a CTOR operand in the result when simplifying GIMPLE.
38944 2023-04-27 Richard Biener <rguenther@suse.de>
38946 * gimplify.cc (gimplify_compound_lval): When the base
38947 gimplified to a register make sure to split up chains
38950 2023-04-27 Richard Biener <rguenther@suse.de>
38953 * ipa-param-manipulation.h
38954 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
38956 * ipa-param-manipulation.cc
38957 (ipa_param_body_adjustments::modify_expression): Likewise.
38958 When we need a conversion and the replacement is a register
38959 split the conversion out.
38960 (ipa_param_body_adjustments::modify_assignment): Pass
38961 extra_stmts to RHS modify_expression.
38963 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
38965 * doc/extend.texi (Zero Length): Describe example.
38967 2023-04-27 Richard Biener <rguenther@suse.de>
38969 PR tree-optimization/109594
38970 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
38971 what we rewrite to a register based on the above.
38973 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
38975 * config/riscv/riscv.cc: Fix whitespace.
38976 * config/riscv/sync.md: Fix whitespace.
38978 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
38980 PR tree-optimization/108697
38981 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
38982 not clear the vector on an out of range query.
38983 (ssa_cache::dump): Use dump_range_query instead of get_range.
38984 (ssa_cache::dump_range_query): New.
38985 (ssa_lazy_cache::dump_range_query): New.
38986 (ssa_lazy_cache::set_range): New.
38987 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
38988 (class ssa_lazy_cache): New.
38989 (ssa_lazy_cache::ssa_lazy_cache): New.
38990 (ssa_lazy_cache::~ssa_lazy_cache): New.
38991 (ssa_lazy_cache::get_range): New.
38992 (ssa_lazy_cache::clear_range): New.
38993 (ssa_lazy_cache::clear): New.
38994 (ssa_lazy_cache::dump): New.
38995 * gimple-range-path.cc (path_range_query::path_range_query): Do
38996 not allocate a ssa_cache object nor has_cache bitmap.
38997 (path_range_query::~path_range_query): Do not free objects.
38998 (path_range_query::clear_cache): Remove.
38999 (path_range_query::get_cache): Adjust.
39000 (path_range_query::set_cache): Remove.
39001 (path_range_query::dump): Don't call through a pointer.
39002 (path_range_query::internal_range_of_expr): Set cache directly.
39003 (path_range_query::reset_path): Clear cache directly.
39004 (path_range_query::ssa_range_in_phi): Fold with globals only.
39005 (path_range_query::compute_ranges_in_phis): Simply set range.
39006 (path_range_query::compute_ranges_in_block): Call cache directly.
39007 * gimple-range-path.h (class path_range_query): Replace bitmap
39008 and cache pointer with lazy cache object.
39009 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
39011 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
39013 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
39014 (ssa_cache::~ssa_cache): Rename.
39015 (ssa_cache::has_range): New.
39016 (ssa_cache::get_range): Rename.
39017 (ssa_cache::set_range): Rename.
39018 (ssa_cache::clear_range): Rename.
39019 (ssa_cache::clear): Rename.
39020 (ssa_cache::dump): Rename and use get_range.
39021 (ranger_cache::get_global_range): Use get_range and set_range.
39022 (ranger_cache::range_of_def): Use get_range.
39023 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
39024 (class ranger_cache): Use ssa_cache.
39025 * gimple-range-path.cc (path_range_query::path_range_query): Use
39027 (path_range_query::get_cache): Use get_range.
39028 (path_range_query::set_cache): Use set_range.
39029 * gimple-range-path.h (class path_range_query): Use ssa_cache.
39030 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
39031 (assume_query::range_of_expr): Use get_range.
39032 (assume_query::assume_query): Use set_range.
39033 (assume_query::calculate_op): Use get_range and set_range.
39034 * gimple-range.h (class assume_query): Use ssa_cache.
39036 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
39038 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
39039 and local to optionally zero memory.
39040 (br_vector::grow): Only zero memory if flag is set.
39041 (class sbr_lazy_vector): New.
39042 (sbr_lazy_vector::sbr_lazy_vector): New.
39043 (sbr_lazy_vector::set_bb_range): New.
39044 (sbr_lazy_vector::get_bb_range): New.
39045 (sbr_lazy_vector::bb_range_p): New.
39046 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
39047 * gimple-range-gori.cc (gori_map::calculate_gori): Use
39048 param_vrp_switch_limit.
39049 (gori_compute::gori_compute): Use param_vrp_switch_limit.
39050 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
39051 (vrp_switch_limit): Rename from evrp_switch_limit.
39052 (vrp_vector_threshold): New.
39054 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
39056 * value-relation.cc (dom_oracle::query_relation): Check early for lack
39058 * value-relation.h (equiv_oracle::has_equiv_p): New.
39060 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
39062 PR tree-optimization/109417
39063 * gimple-range-gori.cc (range_def_chain::register_dependency):
39064 Save the ssa version number, not the pointer.
39065 (gori_compute::may_recompute_p): No need to check if a dependency
39066 is in the free list.
39067 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
39068 fields to be unsigned int instead of trees.
39069 (ange_def_chain::depend1): Adjust.
39070 (ange_def_chain::depend2): Adjust.
39071 * gimple-range.h: Include "ssa.h" to inline ssa_name().
39073 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
39075 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
39076 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
39077 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
39079 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
39082 * config/riscv/riscv-protos.h: Add helper function stubs.
39083 * config/riscv/riscv.cc: Add helper functions for subword masking.
39084 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
39085 -mno-inline-atomics.
39086 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
39087 fetch_and_nand, CAS, and exchange ops.
39088 * doc/invoke.texi: Add blurb regarding new command-line flags
39089 -minline-atomics and -mno-inline-atomics.
39091 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39093 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
39094 Reimplement using standard RTL codes instead of unspec.
39095 (aarch64_rshrn2<mode>_insn_be): Likewise.
39096 (aarch64_rshrn2<mode>): Adjust for the above.
39097 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
39099 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39101 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
39102 with standard RTL codes instead of an UNSPEC.
39103 (aarch64_rshrn<mode>_insn_be): Likewise.
39104 (aarch64_rshrn<mode>): Adjust for the above.
39105 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
39107 2023-04-26 Pan Li <pan2.li@intel.com>
39108 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39110 * config/riscv/riscv.cc (riscv_classify_address): Allow
39111 const0_rtx for the RVV load/store.
39113 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39115 * range-op.cc (range_op_cast_tests): Remove legacy support.
39116 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
39117 * value-range.cc (irange::operator=): Same.
39118 (get_legacy_range): Same.
39119 (irange::copy_legacy_to_multi_range): Delete.
39120 (irange::copy_to_legacy): Delete.
39121 (irange::irange_set_anti_range): Delete.
39122 (irange::set): Remove legacy support.
39123 (irange::verify_range): Same.
39124 (irange::legacy_lower_bound): Delete.
39125 (irange::legacy_upper_bound): Delete.
39126 (irange::legacy_equal_p): Delete.
39127 (irange::operator==): Remove legacy support.
39128 (irange::singleton_p): Same.
39129 (irange::value_inside_range): Same.
39130 (irange::contains_p): Same.
39131 (intersect_ranges): Delete.
39132 (irange::legacy_intersect): Delete.
39133 (union_ranges): Delete.
39134 (irange::legacy_union): Delete.
39135 (irange::legacy_verbose_union_): Delete.
39136 (irange::legacy_verbose_intersect): Delete.
39137 (irange::irange_union): Remove legacy support.
39138 (irange::irange_intersect): Same.
39139 (irange::intersect): Same.
39140 (irange::invert): Same.
39141 (ranges_from_anti_range): Delete.
39142 (gt_pch_nx): Adjust for legacy removal.
39144 (range_tests_legacy): Delete.
39145 (range_tests_misc): Adjust for legacy removal.
39146 (range_tests): Same.
39147 * value-range.h (class irange): Same.
39148 (irange::legacy_mode_p): Delete.
39149 (ranges_from_anti_range): Delete.
39150 (irange::nonzero_p): Adjust for legacy removal.
39151 (irange::lower_bound): Same.
39152 (irange::upper_bound): Same.
39153 (irange::union_): Same.
39154 (irange::intersect): Same.
39155 (irange::set_nonzero): Same.
39156 (irange::set_zero): Same.
39157 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
39159 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39161 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
39162 of range_has_numeric_bounds_p with irange API.
39163 (range_has_numeric_bounds_p): Delete.
39164 * value-range.h (range_has_numeric_bounds_p): Delete.
39166 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39168 * tree-data-ref.cc (compute_distributive_range): Replace uses of
39169 range_int_cst_p with irange API.
39170 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
39171 * tree-vrp.h (range_int_cst_p): Delete.
39172 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
39173 range_int_cst_p with irange API.
39174 (vr_set_zero_nonzero_bits): Same.
39175 (range_fits_type_p): Same.
39176 (simplify_using_ranges::simplify_casted_cond): Same.
39177 * tree-vrp.cc (range_int_cst_p): Remove.
39179 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39181 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
39183 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39185 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
39186 API uses to new API.
39187 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
39188 * internal-fn.cc (get_min_precision): Same.
39190 * tree-affine.cc (expr_to_aff_combination): Same.
39191 * tree-data-ref.cc (dr_step_indicator): Same.
39192 * tree-dfa.cc (get_ref_base_and_extent): Same.
39193 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
39194 * tree-ssa-phiopt.cc (two_value_replacement): Same.
39195 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
39196 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
39197 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
39198 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
39199 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
39200 * tree.cc (get_range_pos_neg): Same.
39202 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39204 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
39205 vrange::dump instead of ad-hoc dumper.
39206 * tree-ssa-strlen.cc (dump_strlen_info): Same.
39207 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
39210 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39212 * range-op.cc (operator_cast::op1_range): Use
39213 create_possibly_reversed_range.
39214 (operator_bitwise_and::simple_op1_range_solver): Same.
39215 * value-range.cc (swap_out_of_order_endpoints): Delete.
39216 (irange::set): Remove call to swap_out_of_order_endpoints.
39218 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39220 * builtins.cc (determine_block_size): Convert use of legacy API to
39222 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
39223 (array_bounds_checker::check_array_ref): Same.
39224 * gimple-ssa-warn-restrict.cc
39225 (builtin_memref::extend_offset_range): Same.
39226 * ipa-cp.cc (ipcp_store_vr_results): Same.
39227 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
39228 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
39229 (ipa_write_jump_function): Same.
39230 * pointer-query.cc (get_size_range): Same.
39231 * tree-data-ref.cc (split_constant_offset): Same.
39232 * tree-ssa-strlen.cc (get_range): Same.
39233 (maybe_diag_stxncpy_trunc): Same.
39234 (strlen_pass::get_len_or_size): Same.
39235 (strlen_pass::count_nonzero_bytes_addr): Same.
39236 * tree-vect-patterns.cc (vect_get_range_info): Same.
39237 * value-range.cc (irange::maybe_anti_range): Remove.
39238 (get_legacy_range): New.
39239 (irange::copy_to_legacy): Use get_legacy_range.
39240 (ranges_from_anti_range): Same.
39241 * value-range.h (class irange): Remove maybe_anti_range.
39242 (get_legacy_range): New.
39243 * vr-values.cc (check_for_binary_op_overflow): Convert use of
39244 legacy API to get_legacy_range.
39245 (compare_ranges): Same.
39246 (compare_range_with_value): Same.
39247 (bounds_of_var_in_loop): Same.
39248 (find_case_label_ranges): Same.
39249 (simplify_using_ranges::simplify_switch_using_ranges): Same.
39251 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39253 * value-range-pretty-print.cc (vrange_printer::visit): Remove
39255 * value-range.cc (irange::constant_p): Remove.
39256 (irange::get_nonzero_bits_from_range): Remove constant_p use.
39257 * value-range.h (class irange): Remove constant_p.
39258 (irange::num_pairs): Remove constant_p use.
39260 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39262 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
39264 (irange::set): Same.
39265 (irange::legacy_lower_bound): Same.
39266 (irange::legacy_upper_bound): Same.
39267 (irange::contains_p): Same.
39268 (range_tests_legacy): Same.
39269 (irange::normalize_addresses): Remove.
39270 (irange::normalize_symbolics): Remove.
39271 (irange::symbolic_p): Remove.
39272 * value-range.h (class irange): Remove symbolic_p,
39273 normalize_symbolics, and normalize_addresses.
39274 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
39275 Remove symbolics support.
39277 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39279 * value-range.cc (irange::may_contain_p): Remove.
39280 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
39281 usage with contains_p.
39282 * vr-values.cc (compare_range_with_value): Same.
39284 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39286 * tree-vrp.cc (supported_types_p): Remove.
39287 (defined_ranges_p): Remove.
39288 (range_fold_binary_expr): Remove.
39289 (range_fold_unary_expr): Remove.
39290 * tree-vrp.h (range_fold_unary_expr): Remove.
39291 (range_fold_binary_expr): Remove.
39293 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39295 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
39296 (ipa_value_range_from_jfunc): Same.
39297 (propagate_vr_across_jump_function): Same.
39298 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
39299 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
39300 * vr-values.cc (bounds_of_var_in_loop): Same.
39302 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39304 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
39305 Add irange argument.
39306 (check_out_of_bounds_and_warn): Remove check for vr.
39307 (array_bounds_checker::check_array_ref): Remove pointer qualifier
39308 for vr and adjust accordingly.
39309 * gimple-array-bounds.h (get_value_range): Add irange argument.
39310 * value-query.cc (class equiv_allocator): Delete.
39311 (range_query::get_value_range): Delete.
39312 (range_query::range_query): Remove allocator access.
39313 (range_query::~range_query): Same.
39314 * value-query.h (get_value_range): Delete.
39316 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
39317 call to get_value_range.
39318 (check_for_binary_op_overflow): Same.
39319 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
39320 (simplify_using_ranges::simplify_abs_using_ranges): Same.
39321 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
39322 (simplify_using_ranges::simplify_casted_cond): Same.
39323 (simplify_using_ranges::simplify_switch_using_ranges): Same.
39324 (simplify_using_ranges::two_valued_val_range_p): Same.
39326 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39329 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
39331 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
39332 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
39333 (simplify_using_ranges::legacy_fold_cond): ...this.
39334 (simplify_using_ranges::fold_cond): Rename
39335 vrp_evaluate_conditional_warnv_with_ops to
39336 legacy_fold_cond_overflow.
39337 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
39338 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
39339 legacy_fold_cond_overflow respectively.
39341 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
39343 * vr-values.cc (get_vr_for_comparison): Remove.
39344 (compare_name_with_value): Same.
39345 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
39346 compare_name_with_value.
39347 * vr-values.h: Remove compare_name_with_value.
39348 Remove get_vr_for_comparison.
39350 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
39352 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
39353 (bswapsi2): New define_insn.
39354 (swaphi): New define_insn to exchange two registers (swpw).
39355 (define_peephole2): Recognize exchange of registers as swaphi.
39357 2023-04-26 Richard Biener <rguenther@suse.de>
39359 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
39361 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
39362 * predict.cc (apply_return_prediction): Likewise.
39363 * sese.cc (set_ifsese_condition): Likewise. Simplify.
39364 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
39365 (make_edges_bb): Likewise.
39366 (make_cond_expr_edges): Likewise.
39367 (end_recording_case_labels): Likewise.
39368 (make_gimple_asm_edges): Likewise.
39369 (cleanup_dead_labels): Likewise.
39370 (group_case_labels): Likewise.
39371 (gimple_can_merge_blocks_p): Likewise.
39372 (gimple_merge_blocks): Likewise.
39373 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
39374 (gimple_duplicate_sese_tail): Avoid last_stmt.
39375 (find_loop_dist_alias): Likewise.
39376 (gimple_block_ends_with_condjump_p): Likewise.
39377 (gimple_purge_dead_eh_edges): Likewise.
39378 (gimple_purge_dead_abnormal_call_edges): Likewise.
39379 (pass_warn_function_return::execute): Likewise.
39380 (execute_fixup_cfg): Likewise.
39381 * tree-eh.cc (redirect_eh_edge_1): Likewise.
39382 (pass_lower_resx::execute): Likewise.
39383 (pass_lower_eh_dispatch::execute): Likewise.
39384 (cleanup_empty_eh): Likewise.
39385 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
39386 (predicate_bbs): Likewise.
39387 (ifcvt_split_critical_edges): Likewise.
39388 * tree-loop-distribution.cc (create_edge_for_control_dependence):
39390 (loop_distribution::transform_reduction_loop): Likewise.
39391 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
39392 (try_transform_to_exit_first_loop_alt): Likewise.
39393 (transform_to_exit_first_loop): Likewise.
39394 (create_parallel_loop): Likewise.
39395 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
39396 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
39397 (eliminate_unnecessary_stmts): Likewise.
39399 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
39401 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
39402 (pass_tree_ifcombine::execute): Likewise.
39403 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
39404 (should_duplicate_loop_header_p): Likewise.
39405 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
39406 (tree_estimate_loop_size): Likewise.
39407 (try_unroll_loop_completely): Likewise.
39408 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
39409 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
39410 (canonicalize_loop_ivs): Likewise.
39411 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
39412 (bound_difference): Likewise.
39413 (number_of_iterations_popcount): Likewise.
39414 (number_of_iterations_cltz): Likewise.
39415 (number_of_iterations_cltz_complement): Likewise.
39416 (simplify_using_initial_conditions): Likewise.
39417 (number_of_iterations_exit_assumptions): Likewise.
39418 (loop_niter_by_eval): Likewise.
39419 (estimate_numbers_of_iterations): Likewise.
39421 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39423 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
39425 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
39428 * config/rs6000/rs6000-builtins.def
39429 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
39430 __builtin_vsx_scalar_cmp_exp_qp_lt,
39431 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
39434 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
39437 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
39438 easy_vector_constant with const_vector_each_byte_same, add
39439 handlings in preparation for !easy_vector_constant, and update
39440 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
39441 * config/rs6000/predicates.md (const_vector_each_byte_same): New
39444 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39446 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
39447 (*pred_ltge<mode>_merge_tie_mask): Ditto.
39448 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
39449 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
39450 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
39451 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
39452 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
39454 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39456 * config/riscv/vector.md: Fix redundant vmv1r.v.
39458 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39460 * config/riscv/vector.md: Fix RA constraint.
39462 2023-04-26 Pan Li <pan2.li@intel.com>
39465 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
39466 check for vn_reference equal.
39468 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39470 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
39471 auto-vectorization preference.
39472 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
39473 auto-vectorization.
39474 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
39476 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
39478 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
39479 and bclridisi_nottwobits patterns.
39480 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
39481 predicate to avoid splitting arith constants.
39482 (const_nottwobits_not_arith_operand): New predicate.
39484 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
39486 * recog.cc (peep2_attempt, peep2_update_life): Correct
39487 head-comment description of parameter match_len.
39489 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
39491 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
39492 riscv_split_symbol() drop in_splitter arg.
39493 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
39494 riscv_split_symbol() drop in_splitter arg.
39495 riscv_force_temporary() drop in_splitter arg.
39496 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
39497 riscv_split_symbol() drop in_splitter arg.
39499 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
39501 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
39502 superfluous debug temporaries for single GIMPLE assignments.
39504 2023-04-25 Richard Biener <rguenther@suse.de>
39506 PR tree-optimization/109609
39507 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
39509 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
39510 the size given by arg_max_access_size_given_by_arg_p as
39511 maximum, not exact, size.
39513 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39516 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
39517 (orn<mode>3<vczle><vczbe>): ... This.
39518 (bic<mode>3): Rename to...
39519 (bic<mode>3<vczle><vczbe>): ... This.
39520 (<su><maxmin><mode>3): Rename to...
39521 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
39523 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39525 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
39526 * config/aarch64/iterators.md (VQDIV): New mode iterator.
39527 (vnx2di): New mode attribute.
39529 2023-04-25 Richard Biener <rguenther@suse.de>
39531 PR rtl-optimization/109585
39532 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
39534 2023-04-25 Jakub Jelinek <jakub@redhat.com>
39537 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
39538 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
39539 is larger than signed int maximum.
39541 2023-04-25 Martin Liska <mliska@suse.cz>
39543 * doc/gcov.texi: Document the new "calls" field and document
39544 the API bump. Mention also "block_ids" for lines.
39545 * gcov.cc (output_intermediate_json_line): Output info about
39546 calls and extend branches as well.
39547 (generate_results): Bump version to 2.
39548 (output_line_details): Use block ID instead of a non-sensual
39551 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
39553 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
39554 length attribute for the first (memory operand) alternative.
39556 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
39558 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
39559 * config/aarch64/constraints.md: Make "Umn" relaxed memory
39561 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
39563 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
39565 * value-range.cc (frange::set): Adjust constructor.
39566 * value-range.h (nan_state::nan_state): Replace default
39567 constructor with one taking an argument.
39569 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
39571 * ipa-cp.cc (ipa_range_contains_p): New.
39572 (decide_whether_version_node): Use it.
39574 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39576 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
39577 simplify two successive VEC_PERM_EXPRs with same VLA mask,
39578 where mask chooses elements in reverse order.
39580 2023-04-24 Andrew Pinski <apinski@marvell.com>
39582 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
39583 and support diamond shaped basic block form.
39584 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
39586 2023-04-24 Andrew Pinski <apinski@marvell.com>
39588 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
39589 Instead of calling last_and_only_stmt, look for the last statement
39592 2023-04-24 Andrew Pinski <apinski@marvell.com>
39594 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
39596 (match_simplify_replacement): Call
39597 empty_bb_or_one_feeding_into_p instead of doing it inline.
39599 2023-04-24 Andrew Pinski <apinski@marvell.com>
39601 PR tree-optimization/68894
39602 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
39603 continue for the do_hoist_loads diamond case.
39605 2023-04-24 Andrew Pinski <apinski@marvell.com>
39607 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
39608 code for better code readability.
39610 2023-04-24 Andrew Pinski <apinski@marvell.com>
39612 PR tree-optimization/109604
39613 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
39614 diamond form check from ...
39615 (minmax_replacement): Here.
39617 2023-04-24 Patrick Palka <ppalka@redhat.com>
39619 * tree.cc (strip_array_types): Don't define here.
39620 (is_typedef_decl): Don't define here.
39621 (typedef_variant_p): Don't define here.
39622 * tree.h (strip_array_types): Define here.
39623 (is_typedef_decl): Define here.
39624 (typedef_variant_p): Define here.
39626 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
39628 * doc/generic.texi (OpenMP): Add != to allowed
39629 conditions and state that vars can be unsigned.
39630 * tree.def (OMP_FOR): Likewise.
39632 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39634 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
39636 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
39638 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
39639 Remove explicit Solaris 11 references.
39641 (Options specification, --with-gnu-as): as and gas always differ
39643 Remove /usr/ccs/bin reference.
39644 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
39645 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
39646 (*-*-solaris2*): ... here.
39647 Update bundled GCC versions.
39648 Don't refer to pre-built binaries.
39649 Remove /bin/sh warning.
39650 Update assembler, linker recommendations.
39651 Document GNAT bootstrap compiler.
39652 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
39653 (sparc64-*-solaris2*): Move content...
39654 (sparcv9-*-solaris2*): ...here.
39655 Add GDC for 64-bit bootstrap compilers.
39657 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39660 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
39662 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
39665 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39667 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
39668 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
39669 (aarch64_<su>abal2<mode>): New define_expand.
39670 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
39671 (aarch64_rtx_costs): Handle ABD rtxes.
39672 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
39673 * config/aarch64/iterators.md (ABAL2): Delete.
39674 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
39676 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39678 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
39679 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
39680 (<sur>sadv16qi): Rename to...
39681 (<su>sadv16qi): ... This. Adjust for the above.
39682 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
39683 (<su>sad<vsi2qi>): ... This. Adjust for the above.
39684 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
39685 * config/aarch64/iterators.md (ABAL): Delete.
39686 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
39688 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39690 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
39691 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
39692 (aarch64_<su>abdl2<mode>): New define_expand.
39693 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
39694 * config/aarch64/iterators.md (ABDL2): Delete.
39695 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
39697 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39699 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
39700 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
39702 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
39703 * config/aarch64/iterators.md (ABDL): Delete.
39704 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
39706 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39708 * config/aarch64/aarch64-simd.md
39709 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
39711 2023-04-24 Richard Biener <rguenther@suse.de>
39713 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
39715 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
39717 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
39718 (set_switch_stmt_execution_predicate): Likewise.
39719 (phi_result_unknown_predicate): Likewise.
39720 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
39721 (ipa_analyze_indirect_call_uses): Likewise.
39722 * predict.cc (predict_iv_comparison): Likewise.
39723 (predict_extra_loop_exits): Likewise.
39724 (predict_loops): Likewise.
39725 (tree_predict_by_opcode): Likewise.
39726 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
39728 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
39729 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
39730 (replace_phi_edge_with_variable): Likewise.
39731 (two_value_replacement): Likewise.
39732 (value_replacement): Likewise.
39733 (minmax_replacement): Likewise.
39734 (spaceship_replacement): Likewise.
39735 (cond_removal_in_builtin_zero_pattern): Likewise.
39736 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
39737 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
39738 (vn_phi_lookup): Likewise.
39739 (vn_phi_insert): Likewise.
39740 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
39741 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
39743 (back_threader_profitability::possibly_profitable_path_p):
39745 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
39747 * tree-switch-conversion.cc (pass_convert_switch::execute):
39749 (pass_lower_switch<O0>::execute): Likewise.
39750 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
39751 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
39752 * tree-vect-slp.cc (vect_slp_function): Likewise.
39753 * tree-vect-stmts.cc (cfun_returns): Likewise.
39754 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
39755 (vect_loop_dist_alias_call): Likewise.
39757 2023-04-24 Richard Biener <rguenther@suse.de>
39759 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
39761 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39763 * config/riscv/riscv-vsetvl.cc
39764 (vector_infos_manager::all_avail_in_compatible_p): New function.
39765 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
39766 * config/riscv/riscv-vsetvl.h: New function.
39768 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39770 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
39771 comment for cleanup_insns.
39773 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39775 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
39776 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
39777 with the fault first load property.
39779 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39781 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
39782 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
39784 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39787 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
39788 (aarch64_addp<mode><vczle><vczbe>): ... This.
39790 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
39792 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
39793 provide reasonable values for common arithmetic operations and
39794 immediate operands (in several machine modes).
39796 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
39798 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
39799 format specifier to output high_part register name of SImode reg.
39800 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
39801 (zero_extendqihi2): Fix lengths, consistent formatting and add
39802 "and Rx,#255" alternative, for documentation purposes.
39803 (zero_extendhisi2): New define_insn.
39805 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
39807 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
39808 SImode shifts by two by performing a single bit SImode shift twice.
39810 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
39812 PR tree-optimization/109593
39813 * value-range.cc (frange::operator==): Handle NANs.
39815 2023-04-23 liuhongt <hongtao.liu@intel.com>
39817 PR rtl-optimization/108707
39818 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
39819 GENERAL_REGS when preferred reg_class is not known.
39821 2023-04-22 Andrew Pinski <apinski@marvell.com>
39823 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
39824 Change the code around slightly to move diamond
39825 handling for do_store_elim/do_hoist_loads out of
39828 2023-04-22 Andrew Pinski <apinski@marvell.com>
39830 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
39831 Remove check on empty_block_p.
39833 2023-04-22 Jakub Jelinek <jakub@redhat.com>
39835 PR bootstrap/109589
39836 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
39837 * realmpfr.h (class auto_mpfr): Likewise.
39839 2023-04-22 Jakub Jelinek <jakub@redhat.com>
39841 PR tree-optimization/109583
39842 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
39843 if vec_mode is not VECTOR_MODE_P.
39845 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
39846 Ondrej Kubanek <kubanek0ondrej@gmail.com>
39848 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
39849 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
39850 loop profile and bounds after header duplication.
39851 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
39852 Break out from try_peel_loop; fix handling of 0 iterations.
39853 (try_peel_loop): Use adjust_loop_info_after_peeling.
39855 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
39857 PR tree-optimization/109546
39858 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
39859 not fold conditions with ADDR_EXPR early.
39861 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39863 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
39864 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
39866 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
39867 (*aarch64_<optab><mode>3_zero): Define.
39868 (*aarch64_<optab><mode>3_cssc): Likewise.
39869 * config/aarch64/iterators.md (maxminand): New code attribute.
39871 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39874 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
39875 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
39877 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
39878 (aarch64_override_options_internal): Handle the above.
39879 (aarch64_output_load_tp): New function.
39880 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
39881 aarch64_output_load_tp.
39882 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
39883 (mtp=): New option.
39884 * doc/invoke.texi (AArch64 Options): Document -mtp=.
39886 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39889 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
39890 (add_vec_concat_subst_be): Likewise.
39893 (add<mode>3): Rename to...
39894 (add<mode>3<vczle><vczbe>): ... This.
39895 (sub<mode>3): Rename to...
39896 (sub<mode>3<vczle><vczbe>): ... This.
39897 (mul<mode>3): Rename to...
39898 (mul<mode>3<vczle><vczbe>): ... This.
39899 (and<mode>3): Rename to...
39900 (and<mode>3<vczle><vczbe>): ... This.
39901 (ior<mode>3): Rename to...
39902 (ior<mode>3<vczle><vczbe>): ... This.
39903 (xor<mode>3): Rename to...
39904 (xor<mode>3<vczle><vczbe>): ... This.
39905 * config/aarch64/iterators.md (VDZ): Define.
39907 2023-04-21 Patrick Palka <ppalka@redhat.com>
39909 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
39912 2023-04-21 Jan Hubicka <jh@suse.cz>
39914 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
39917 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
39919 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
39920 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
39922 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39924 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
39925 force_reg instead of copy_to_mode_reg.
39926 (aarch64_expand_vector_init): Likewise.
39928 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
39930 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
39931 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
39932 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
39933 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
39934 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
39935 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
39936 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
39937 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
39938 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
39939 * config/i386/predicates.md (index_register_operand):
39940 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
39941 * config/i386/i386.cc (ix86_legitimate_address_p): Use
39942 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
39943 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
39945 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
39946 Ondrej Kubanek <kubanek0ondrej@gmail.com>
39948 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
39951 2023-04-21 Richard Biener <rguenther@suse.de>
39953 * is-a.h (safe_is_a): New.
39955 2023-04-21 Richard Biener <rguenther@suse.de>
39957 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
39958 (gphi_iterator::operator*): Likewise.
39960 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
39961 Michal Jires <michal@jires.eu>
39963 * ipa-inline.cc (class inline_badness): New class.
39964 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
39966 (update_edge_key): Update.
39967 (lookup_recursive_calls): Likewise.
39968 (recursive_inlining): Likewise.
39969 (add_new_edges_to_heap): Likewise.
39970 (inline_small_functions): Likewise.
39972 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
39974 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
39976 2023-04-21 Richard Biener <rguenther@suse.de>
39978 PR tree-optimization/109573
39979 * tree-vect-loop.cc (vectorizable_live_operation): Allow
39980 unhandled SSA copy as well. Demote assert to checking only.
39982 2023-04-21 Richard Biener <rguenther@suse.de>
39984 * df-core.cc (df_analyze): Compute RPO on the reverse graph
39985 for DF_BACKWARD problems.
39986 (loop_post_order_compute): Rename to ...
39987 (loop_rev_post_order_compute): ... this, compute a RPO.
39988 (loop_inverted_post_order_compute): Rename to ...
39989 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
39990 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
39991 problems, RPO on the inverted graph for DF_BACKWARD.
39993 2023-04-21 Richard Biener <rguenther@suse.de>
39995 * cfganal.h (inverted_rev_post_order_compute): Rename
39997 (inverted_post_order_compute): ... this. Add struct function
39998 argument, change allocation to a C array.
39999 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
40000 * lcm.cc (compute_antinout_edge): Adjust.
40001 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
40002 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
40003 * tree-ssa-pre.cc (compute_antic): Likewise.
40005 2023-04-21 Richard Biener <rguenther@suse.de>
40007 * df.h (df_d::postorder_inverted): Change back to int *,
40009 * df-core.cc (rest_of_handle_df_finish): Adjust.
40010 (df_analyze_1): Likewise.
40011 (df_analyze): For DF_FORWARD problems use RPO on the forward
40013 (loop_inverted_post_order_compute): Adjust API.
40014 (df_analyze_loop): Adjust.
40015 (df_get_n_blocks): Likewise.
40016 (df_get_postorder): Likewise.
40018 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40021 * config/riscv/riscv-vsetvl.cc
40022 (vector_infos_manager::all_empty_predecessor_p): New function.
40023 (pass_vsetvl::backward_demand_fusion): Ditto.
40024 * config/riscv/riscv-vsetvl.h: Ditto.
40026 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
40029 * config/riscv/generic.md: Change standard names to insn names.
40031 2023-04-21 Richard Biener <rguenther@suse.de>
40033 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
40034 (compute_laterin): Use RPO.
40035 (compute_available): Likewise.
40037 2023-04-21 Peng Fan <fanpeng@loongson.cn>
40039 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
40041 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40044 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
40045 (vector_insn_info::skip_avl_compatible_p): Ditto.
40046 (vector_insn_info::merge): Remove default value.
40047 (pass_vsetvl::compute_local_backward_infos): Ditto.
40048 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
40049 * config/riscv/riscv-vsetvl.h: Ditto.
40051 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
40053 * doc/extend.texi (Common Function Attributes): Remove duplicate
40056 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
40058 PR tree-optimization/109564
40059 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
40060 UNDEFINED range names when deciding if all PHI arguments are the same,
40062 2023-04-20 Jakub Jelinek <jakub@redhat.com>
40064 PR tree-optimization/109011
40065 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
40066 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
40067 .CTZ (X) = PREC - .POPCOUNT (X | -X).
40069 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
40071 * lra-constraints.cc (match_reload): Exclude some hard regs for
40072 multi-reg inout reload pseudos used in asm in different mode.
40074 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
40076 * config/arm/arm.cc (thumb1_legitimate_address_p):
40077 Use VIRTUAL_REGISTER_P predicate.
40078 (arm_eliminable_register): Ditto.
40079 * config/avr/avr.md (push<mode>_1): Ditto.
40080 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
40081 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
40082 * config/i386/predicates.md (register_no_elim_operand): Ditto.
40083 * config/iq2000/predicates.md (call_insn_operand): Ditto.
40084 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
40086 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
40089 * config/i386/predicates.md (extract_operator): New predicate.
40090 * config/i386/i386.md (any_extract): Remove code iterator.
40091 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
40092 (*cmpqi_ext<mode>_1): Ditto.
40093 (*cmpqi_ext<mode>_2): Ditto.
40094 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
40095 (*cmpqi_ext<mode>_3): Ditto.
40096 (*cmpqi_ext<mode>_4): Ditto.
40097 (*extzvqi_mem_rex64): Ditto.
40099 (*insvqi_2): Ditto.
40100 (*extendqi<SWI24:mode>_ext_1): Ditto.
40101 (*addqi_ext<mode>_0): Ditto.
40102 (*addqi_ext<mode>_1): Ditto.
40103 (*addqi_ext<mode>_2): Ditto.
40104 (*subqi_ext<mode>_0): Ditto.
40105 (*subqi_ext<mode>_2): Ditto.
40106 (*testqi_ext<mode>_1): Ditto.
40107 (*testqi_ext<mode>_2): Ditto.
40108 (*andqi_ext<mode>_0): Ditto.
40109 (*andqi_ext<mode>_1): Ditto.
40110 (*andqi_ext<mode>_1_cc): Ditto.
40111 (*andqi_ext<mode>_2): Ditto.
40112 (*<any_or:code>qi_ext<mode>_0): Ditto.
40113 (*<any_or:code>qi_ext<mode>_1): Ditto.
40114 (*<any_or:code>qi_ext<mode>_2): Ditto.
40115 (*xorqi_ext<mode>_1_cc): Ditto.
40116 (*negqi_ext<mode>_2): Ditto.
40117 (*ashlqi_ext<mode>_2): Ditto.
40118 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
40120 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
40123 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
40124 <bitmanip_insn> as the type to allow for fine grained control of
40125 scheduling these insns.
40126 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
40128 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
40129 pcnt, signed and unsigned min/max.
40131 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40132 kito-cheng <kito.cheng@sifive.com>
40134 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
40136 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40137 kito-cheng <kito.cheng@sifive.com>
40140 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
40141 (pass_vsetvl::cleanup_insns): Fix bug.
40143 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
40145 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
40146 (ldexp<mode>3): Delete.
40147 (ldexp<mode>3<exec>): Change "B" to "A".
40149 2023-04-20 Jakub Jelinek <jakub@redhat.com>
40150 Jonathan Wakely <jwakely@redhat.com>
40152 * tree.h (built_in_function_equal_p): New helper function.
40153 (fndecl_built_in_p): Turn into variadic template to support
40154 1 or more built_in_function arguments.
40155 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
40156 * gimplify.cc (goa_stabilize_expr): Likewise.
40157 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
40158 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
40159 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
40160 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
40161 cgraph_update_edges_for_call_stmt_node,
40162 cgraph_edge::verify_corresponds_to_fndecl,
40163 cgraph_node::verify_node): Likewise.
40164 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
40165 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
40166 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
40168 2023-04-20 Jakub Jelinek <jakub@redhat.com>
40170 PR tree-optimization/109011
40171 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
40172 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
40173 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
40174 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
40175 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
40177 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
40179 2023-04-20 Richard Biener <rguenther@suse.de>
40181 * df-core.cc (rest_of_handle_df_initialize): Remove
40182 computation of df->postorder, df->postorder_inverted and
40185 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
40187 * common/config/i386/i386-common.cc
40188 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
40189 (ix86_handle_option): Set AVX flag for VAES.
40190 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
40191 Add OPTION_MASK_ISA2_VAES_UNSET.
40192 (def_builtin): Share builtin between AES and VAES.
40193 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
40195 * config/i386/i386.md (aes): New isa attribute.
40196 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
40197 (aesenclast): Ditto.
40199 (aesdeclast): Ditto.
40200 * config/i386/vaesintrin.h: Remove redundant avx target push.
40201 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
40202 (_mm_aesdeclast_si128): Ditto.
40203 (_mm_aesenc_si128): Ditto.
40204 (_mm_aesenclast_si128): Ditto.
40206 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
40208 * config/i386/avx2intrin.h
40209 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
40210 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
40211 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
40212 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
40213 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
40214 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
40215 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
40216 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
40217 (_mm_reduce_add_epi16): New instrinsics.
40218 (_mm_reduce_mul_epi16): Ditto.
40219 (_mm_reduce_and_epi16): Ditto.
40220 (_mm_reduce_or_epi16): Ditto.
40221 (_mm_reduce_max_epi16): Ditto.
40222 (_mm_reduce_max_epu16): Ditto.
40223 (_mm_reduce_min_epi16): Ditto.
40224 (_mm_reduce_min_epu16): Ditto.
40225 (_mm256_reduce_add_epi16): Ditto.
40226 (_mm256_reduce_mul_epi16): Ditto.
40227 (_mm256_reduce_and_epi16): Ditto.
40228 (_mm256_reduce_or_epi16): Ditto.
40229 (_mm256_reduce_max_epi16): Ditto.
40230 (_mm256_reduce_max_epu16): Ditto.
40231 (_mm256_reduce_min_epi16): Ditto.
40232 (_mm256_reduce_min_epu16): Ditto.
40233 (_mm_reduce_add_epi8): Ditto.
40234 (_mm_reduce_mul_epi8): Ditto.
40235 (_mm_reduce_and_epi8): Ditto.
40236 (_mm_reduce_or_epi8): Ditto.
40237 (_mm_reduce_max_epi8): Ditto.
40238 (_mm_reduce_max_epu8): Ditto.
40239 (_mm_reduce_min_epi8): Ditto.
40240 (_mm_reduce_min_epu8): Ditto.
40241 (_mm256_reduce_add_epi8): Ditto.
40242 (_mm256_reduce_mul_epi8): Ditto.
40243 (_mm256_reduce_and_epi8): Ditto.
40244 (_mm256_reduce_or_epi8): Ditto.
40245 (_mm256_reduce_max_epi8): Ditto.
40246 (_mm256_reduce_max_epu8): Ditto.
40247 (_mm256_reduce_min_epi8): Ditto.
40248 (_mm256_reduce_min_epu8): Ditto.
40249 * config/i386/avx512vlbwintrin.h:
40250 (_mm_mask_reduce_add_epi16): Ditto.
40251 (_mm_mask_reduce_mul_epi16): Ditto.
40252 (_mm_mask_reduce_and_epi16): Ditto.
40253 (_mm_mask_reduce_or_epi16): Ditto.
40254 (_mm_mask_reduce_max_epi16): Ditto.
40255 (_mm_mask_reduce_max_epu16): Ditto.
40256 (_mm_mask_reduce_min_epi16): Ditto.
40257 (_mm_mask_reduce_min_epu16): Ditto.
40258 (_mm256_mask_reduce_add_epi16): Ditto.
40259 (_mm256_mask_reduce_mul_epi16): Ditto.
40260 (_mm256_mask_reduce_and_epi16): Ditto.
40261 (_mm256_mask_reduce_or_epi16): Ditto.
40262 (_mm256_mask_reduce_max_epi16): Ditto.
40263 (_mm256_mask_reduce_max_epu16): Ditto.
40264 (_mm256_mask_reduce_min_epi16): Ditto.
40265 (_mm256_mask_reduce_min_epu16): Ditto.
40266 (_mm_mask_reduce_add_epi8): Ditto.
40267 (_mm_mask_reduce_mul_epi8): Ditto.
40268 (_mm_mask_reduce_and_epi8): Ditto.
40269 (_mm_mask_reduce_or_epi8): Ditto.
40270 (_mm_mask_reduce_max_epi8): Ditto.
40271 (_mm_mask_reduce_max_epu8): Ditto.
40272 (_mm_mask_reduce_min_epi8): Ditto.
40273 (_mm_mask_reduce_min_epu8): Ditto.
40274 (_mm256_mask_reduce_add_epi8): Ditto.
40275 (_mm256_mask_reduce_mul_epi8): Ditto.
40276 (_mm256_mask_reduce_and_epi8): Ditto.
40277 (_mm256_mask_reduce_or_epi8): Ditto.
40278 (_mm256_mask_reduce_max_epi8): Ditto.
40279 (_mm256_mask_reduce_max_epu8): Ditto.
40280 (_mm256_mask_reduce_min_epi8): Ditto.
40281 (_mm256_mask_reduce_min_epu8): Ditto.
40283 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
40285 * common/config/i386/i386-common.cc
40286 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
40287 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
40288 (OPTION_MASK_ISA_AVX_UNSET):
40289 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
40290 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
40291 * config/i386/i386.md (vpclmulqdqvl): New.
40292 * config/i386/sse.md (pclmulqdq): Add evex encoding.
40293 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
40296 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
40298 * config/i386/avx512vlbwintrin.h
40299 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
40300 (_mm_mask_blend_epi8): Ditto.
40301 (_mm256_mask_blend_epi16): Ditto.
40302 (_mm256_mask_blend_epi8): Ditto.
40303 * config/i386/avx512vlintrin.h
40304 (_mm256_mask_blend_pd): Ditto.
40305 (_mm256_mask_blend_ps): Ditto.
40306 (_mm256_mask_blend_epi64): Ditto.
40307 (_mm256_mask_blend_epi32): Ditto.
40308 (_mm_mask_blend_pd): Ditto.
40309 (_mm_mask_blend_ps): Ditto.
40310 (_mm_mask_blend_epi64): Ditto.
40311 (_mm_mask_blend_epi32): Ditto.
40312 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
40313 (VF_AVX512HFBFVL): Move it before the first usage.
40314 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
40315 to VF_AVX512HFBFVL.
40317 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
40319 * common/config/i386/i386-common.cc
40320 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
40321 to OPTION_MASK_ISA_AVX512BW_SET.
40322 (OPTION_MASK_ISA_AVX512F_UNSET):
40323 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
40324 (OPTION_MASK_ISA_AVX512BW_UNSET):
40325 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
40326 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
40327 * config/i386/avx512vbmi2vlintrin.h: Ditto.
40328 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
40329 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
40330 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
40331 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
40333 (compressstore<mode>_mask): Ditto.
40334 (expand<mode>_mask): Ditto.
40335 (expand<mode>_maskz): Ditto.
40336 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
40337 VI12_VI48F_AVX512VL.
40339 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
40341 * common/config/i386/i386-common.cc
40342 (OPTION_MASK_ISA_AVX512BITALG_SET):
40343 Change OPTION_MASK_ISA_AVX512F_SET
40344 to OPTION_MASK_ISA_AVX512BW_SET.
40345 (OPTION_MASK_ISA_AVX512F_UNSET):
40346 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
40347 (OPTION_MASK_ISA_AVX512BW_UNSET):
40348 Add OPTION_MASK_ISA_AVX512BITALG_SET.
40349 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
40350 * config/i386/i386-builtin.def:
40351 Remove redundant OPTION_MASK_ISA_AVX512BW.
40352 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
40353 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
40354 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
40356 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
40358 * config/i386/i386-expand.cc
40359 (ix86_check_builtin_isa_match): Correct wrong comments.
40360 Add a new macro SHARE_BUILTIN and refactor the current if
40363 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
40365 * config/i386/cpuid.h: Open a new section for Extended Features
40366 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
40369 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
40371 * config/i386/sse.md: Modify insn vperm{i,f}
40374 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
40376 * config/xtensa/xtensa-opts.h: New header.
40377 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
40378 xtensa_strict_align.
40379 * config/xtensa/xtensa.cc (xtensa_option_override): When
40380 -m[no-]strict-align is not specified in the command line set
40381 xtensa_strict_align to 0 if the hardware supports both unaligned
40382 loads and stores or to 1 otherwise.
40383 * config/xtensa/xtensa.opt (mstrict-align): New option.
40384 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
40386 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
40388 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
40391 2023-04-19 Andrew Pinski <apinski@marvell.com>
40393 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
40395 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40397 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
40398 (VECTOR_BOOL_MODE): Ditto.
40399 (ADJUST_NUNITS): Ditto.
40400 (ADJUST_ALIGNMENT): Ditto.
40401 (ADJUST_BYTESIZE): Ditto.
40402 (ADJUST_PRECISION): Ditto.
40403 (RVV_MODES): Ditto.
40404 (VECTOR_MODE_WITH_PREFIX): Ditto.
40405 * config/riscv/riscv-v.cc (ENTRY): Ditto.
40406 (get_vlmul): Ditto.
40407 (get_ratio): Ditto.
40408 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
40409 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
40410 (vbool64_t): Ditto.
40411 (vbool32_t): Ditto.
40412 (vbool16_t): Ditto.
40417 (vint8mf8_t): Ditto.
40418 (vuint8mf8_t): Ditto.
40419 (vint8mf4_t): Ditto.
40420 (vuint8mf4_t): Ditto.
40421 (vint8mf2_t): Ditto.
40422 (vuint8mf2_t): Ditto.
40423 (vint8m1_t): Ditto.
40424 (vuint8m1_t): Ditto.
40425 (vint8m2_t): Ditto.
40426 (vuint8m2_t): Ditto.
40427 (vint8m4_t): Ditto.
40428 (vuint8m4_t): Ditto.
40429 (vint8m8_t): Ditto.
40430 (vuint8m8_t): Ditto.
40431 (vint16mf4_t): Ditto.
40432 (vuint16mf4_t): Ditto.
40433 (vint16mf2_t): Ditto.
40434 (vuint16mf2_t): Ditto.
40435 (vint16m1_t): Ditto.
40436 (vuint16m1_t): Ditto.
40437 (vint16m2_t): Ditto.
40438 (vuint16m2_t): Ditto.
40439 (vint16m4_t): Ditto.
40440 (vuint16m4_t): Ditto.
40441 (vint16m8_t): Ditto.
40442 (vuint16m8_t): Ditto.
40443 (vint32mf2_t): Ditto.
40444 (vuint32mf2_t): Ditto.
40445 (vint32m1_t): Ditto.
40446 (vuint32m1_t): Ditto.
40447 (vint32m2_t): Ditto.
40448 (vuint32m2_t): Ditto.
40449 (vint32m4_t): Ditto.
40450 (vuint32m4_t): Ditto.
40451 (vint32m8_t): Ditto.
40452 (vuint32m8_t): Ditto.
40453 (vint64m1_t): Ditto.
40454 (vuint64m1_t): Ditto.
40455 (vint64m2_t): Ditto.
40456 (vuint64m2_t): Ditto.
40457 (vint64m4_t): Ditto.
40458 (vuint64m4_t): Ditto.
40459 (vint64m8_t): Ditto.
40460 (vuint64m8_t): Ditto.
40461 (vfloat32mf2_t): Ditto.
40462 (vfloat32m1_t): Ditto.
40463 (vfloat32m2_t): Ditto.
40464 (vfloat32m4_t): Ditto.
40465 (vfloat32m8_t): Ditto.
40466 (vfloat64m1_t): Ditto.
40467 (vfloat64m2_t): Ditto.
40468 (vfloat64m4_t): Ditto.
40469 (vfloat64m8_t): Ditto.
40470 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
40471 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
40472 (riscv_convert_vector_bits): Ditto.
40473 * config/riscv/riscv.md:
40474 * config/riscv/vector-iterators.md:
40475 * config/riscv/vector.md
40476 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
40477 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
40478 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
40479 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
40480 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
40481 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
40482 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
40483 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
40484 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
40486 2023-04-19 Pan Li <pan2.li@intel.com>
40488 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
40489 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
40491 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
40495 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
40496 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
40497 for operand 0. Use any_extract code iterator.
40498 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
40499 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
40500 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
40501 (*cmpqi_ext<mode>_1): Use general_operand predicate
40502 for operand 1. Use any_extract code iterator.
40503 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
40504 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
40506 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40508 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
40509 (aarch64_uaddw2<mode>): Delete.
40510 (aarch64_ssubw2<mode>): Delete.
40511 (aarch64_usubw2<mode>): Delete.
40512 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
40514 2023-04-19 Richard Biener <rguenther@suse.de>
40516 * tree-ssa-structalias.cc (do_ds_constraint): Use
40517 solve_add_graph_edge.
40519 2023-04-19 Richard Biener <rguenther@suse.de>
40521 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
40523 (do_sd_constraint): ... here.
40525 2023-04-19 Richard Biener <rguenther@suse.de>
40527 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
40528 rejecting the merge when A contains only a non-local label.
40530 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
40532 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
40533 (VIRTUAL_REGISTER_NUM_P): Ditto.
40534 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
40535 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
40536 * function.cc (instantiate_decl_rtl): Ditto.
40537 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
40538 (nonzero_address_p): Ditto.
40539 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
40541 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
40543 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
40545 2023-04-19 Richard Biener <rguenther@suse.de>
40547 * system.h (auto_mpz::operator->()): New.
40548 * realmpfr.h (auto_mpfr::operator->()): New.
40549 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
40550 * real.cc (real_from_string): Likewise.
40551 (dconst_e_ptr): Likewise.
40552 (dconst_sqrt2_ptr): Likewise.
40553 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
40555 (bound_difference_of_offsetted_base): Likewise.
40556 (number_of_iterations_ne): Likewise.
40557 (number_of_iterations_lt_to_ne): Likewise.
40558 * ubsan.cc: Include realmpfr.h.
40559 (ubsan_instrument_float_cast): Use auto_mpfr.
40561 2023-04-19 Richard Biener <rguenther@suse.de>
40563 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
40564 edges, remove edges from escaped after special-casing them.
40566 2023-04-19 Richard Biener <rguenther@suse.de>
40568 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
40571 2023-04-19 Richard Biener <rguenther@suse.de>
40573 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
40574 to the LHS varinfo solution member.
40576 2023-04-19 Richard Biener <rguenther@suse.de>
40578 * tree-ssa-structalias.cc (topo_visit): Look at the real
40579 destination of edges.
40581 2023-04-19 Richard Biener <rguenther@suse.de>
40583 PR tree-optimization/44794
40584 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
40585 If an epilogue loop is required set its iteration upper bound.
40587 2023-04-19 Xi Ruoyao <xry111@xry111.site>
40590 * config/loongarch/loongarch-protos.h
40591 (loongarch_expand_block_move): Add a parameter as alignment RTX.
40592 * config/loongarch/loongarch.h:
40593 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
40594 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
40595 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
40596 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
40597 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
40598 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
40599 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
40600 Take the alignment from the parameter, but set it to
40601 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
40602 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
40603 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
40604 (loongarch_block_move_straight): When there are left-over bytes,
40605 half the mode size instead of falling back to byte mode at once.
40606 (loongarch_block_move_loop): Limit the length of loop body with
40607 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
40608 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
40609 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
40610 to loongarch_expand_block_move.
40612 2023-04-19 Xi Ruoyao <xry111@xry111.site>
40614 * config/loongarch/loongarch.cc
40615 (loongarch_setup_incoming_varargs): Don't save more GARs than
40616 cfun->va_list_gpr_size / UNITS_PER_WORD.
40618 2023-04-19 Richard Biener <rguenther@suse.de>
40620 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
40621 no epilogue condition.
40623 2023-04-19 Richard Biener <rguenther@suse.de>
40625 * gimple.h (gimple_assign_load): Outline...
40626 * gimple.cc (gimple_assign_load): ... here. Avoid
40627 get_base_address and instead just strip the outermost
40628 handled component, treating a remaining handled component
40631 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40633 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
40635 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
40637 2023-04-19 Jakub Jelinek <jakub@redhat.com>
40639 PR tree-optimization/109011
40640 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
40641 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
40642 CLZ, CTZ and FFS. Remove vargs variable, use
40643 gimple_build_call_internal rather than gimple_build_call_internal_vec.
40644 (vect_vect_recog_func_ptrs): Adjust popcount entry.
40646 2023-04-19 Jakub Jelinek <jakub@redhat.com>
40649 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
40650 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
40651 a new REG rather than the SUBREG.
40653 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
40655 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
40658 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40661 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
40662 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
40664 2023-04-19 Richard Biener <rguenther@suse.de>
40666 PR rtl-optimization/109237
40667 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
40668 TREE_VISITED on INSN_VAR_LOCATION_DECL.
40669 (delete_trivially_dead_insns): Maintain TREE_VISITED on
40670 active debug bind INSN_VAR_LOCATION_DECL.
40672 2023-04-19 Richard Biener <rguenther@suse.de>
40674 PR rtl-optimization/109237
40675 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
40677 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
40679 * doc/install.texi (enable-decimal-float): Add AArch64.
40681 2023-04-19 liuhongt <hongtao.liu@intel.com>
40683 PR rtl-optimization/109351
40684 * ira.cc (setup_class_subset_and_memory_move_costs): Check
40685 hard_regno_mode_ok before setting lowest memory move cost for
40686 the mode with different reg classes.
40688 2023-04-18 Jason Merrill <jason@redhat.com>
40690 * doc/invoke.texi: Remove stray @gol.
40692 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40694 * ifcvt.cc (cond_move_process_if_block): Consider the result of
40695 targetm.noce_conversion_profitable_p() when replacing the original
40696 sequence with the converted one.
40698 2023-04-18 Mark Harmstone <mark@harmstone.com>
40700 * common.opt (gcodeview): Add new option.
40701 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
40702 * opts.cc (command_handle_option): Similarly.
40703 * doc/invoke.texi: Add documentation for -gcodeview.
40705 2023-04-18 Andrew Pinski <apinski@marvell.com>
40707 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
40708 (make_pass_phiopt): Make execute out of line.
40709 (tree_ssa_cs_elim): Move code into ...
40710 (pass_cselim::execute): here.
40712 2023-04-18 Sam James <sam@gentoo.org>
40714 * system.h: Drop unused INCLUDE_PTHREAD_H.
40716 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
40718 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
40721 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
40723 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
40724 (bswapdi2, bswapsi2): Similarly.
40726 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
40729 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
40730 Use CODE_FOR_sse4_1_insertps_v4sf.
40731 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
40732 (expand_vec_perm_1): Call expand_vec_per_insertps.
40733 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
40734 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
40735 (@sse4_1_insertps_<mode>): New insn pattern.
40736 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
40737 pattern from sse4_1_insertps using VI4F_128 mode iterator.
40739 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40741 * value-range.cc (gt_ggc_mx): New.
40743 * value-range.h (class vrange): Add GTY marker.
40744 (class frange): Same.
40745 (gt_ggc_mx): Remove.
40746 (gt_pch_nx): Remove.
40748 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
40750 * lra-constraints.cc (constraint_unique): New.
40751 (process_address_1): Apply constraint_unique test.
40752 * recog.cc (constrain_operands): Allow relaxed memory
40755 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
40757 * doc/extend.texi (Target Builtins): Add RISC-V Vector
40759 (RISC-V Vector Intrinsics): Document GCC implemented which
40760 version of RISC-V vector intrinsics and its reference.
40762 2023-04-18 Richard Biener <rguenther@suse.de>
40764 PR middle-end/108786
40765 * bitmap.h (bitmap_clear_first_set_bit): New.
40766 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
40767 bitmap_first_set_bit and add optional clearing of the bit.
40768 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
40769 (bitmap_clear_first_set_bit): Likewise.
40770 * df-core.cc (df_worklist_dataflow_doublequeue): Use
40771 bitmap_clear_first_set_bit.
40772 * graphite-scop-detection.cc (scop_detection::merge_sese):
40774 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
40775 (sanitize_asan_mark_poison): Likewise.
40776 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
40777 * tree-into-ssa.cc (rewrite_blocks): Likewise.
40778 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
40779 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
40781 2023-04-18 Richard Biener <rguenther@suse.de>
40783 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
40784 (dump_sa_points_to_info): ... this function.
40785 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
40786 and call dump_sa_stats guarded with TDF_STATS.
40787 (ipa_pta_execute): Likewise.
40788 (compute_may_aliases): Guard dump_alias_info with
40789 TDF_DETAILS|TDF_ALIAS.
40791 2023-04-18 Andrew Pinski <apinski@marvell.com>
40793 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
40794 the expression that is being tried when TDF_FOLDING
40796 (phiopt_worker::match_simplify_replacement): Dump
40797 the sequence which was created by gimple_simplify_phiopt
40798 when TDF_FOLDING is true.
40800 2023-04-18 Andrew Pinski <apinski@marvell.com>
40802 * tree-ssa-phiopt.cc (match_simplify_replacement):
40803 Simplify code that does the movement slightly.
40805 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40807 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
40809 (rev16<mode>2): Rename to...
40810 (aarch64_rev16<mode>2_alt1): ... This.
40811 (rev16<mode>2_alt): Rename to...
40812 (*aarch64_rev16<mode>2_alt2): ... This.
40814 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40816 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
40817 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
40819 * range-op-float.cc (zero_range): Use dconstm0.
40820 (zero_to_inf_range): Same.
40821 * real.h (dconstm0): New.
40822 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
40823 (frange::set_zero): Do not declare dconstm0.
40825 2023-04-18 Richard Biener <rguenther@suse.de>
40827 * system.h (class auto_mpz): New,
40828 * realmpfr.h (class auto_mpfr): Likewise.
40829 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
40830 (do_mpfr_arg2): Likewise.
40831 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
40833 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40835 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
40836 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
40838 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40840 * value-range.cc (frange::operator==): Adjust for NAN.
40841 (range_tests_nan): Remove some NAN tests.
40843 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40845 * inchash.cc (hash::add_real_value): New.
40846 * inchash.h (class hash): Add add_real_value.
40847 * value-range.cc (add_vrange): New.
40848 * value-range.h (inchash::add_vrange): New.
40850 2023-04-18 Richard Biener <rguenther@suse.de>
40852 PR tree-optimization/109539
40853 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
40854 Re-implement pointer relatedness for PHIs.
40856 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
40858 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
40859 (SV_FP): New iterator.
40860 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
40861 (recip<mode>2): Unify the two patterns using SV_FP.
40862 (div_scale<mode><exec_vcc>): New insn.
40863 (div_fmas<mode><exec>): New insn.
40864 (div_fixup<mode><exec>): New insn.
40865 (div<mode>3): Unify the two expanders and rewrite using hardfp.
40866 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
40867 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
40868 and UNSPEC_DIV_FIXUP.
40869 (vccwait): New attribute.
40871 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40873 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
40874 if the argument matches that.
40876 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40878 * config/aarch64/atomics.md
40879 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
40880 Use SD_HSDI for destination mode iterator.
40882 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
40884 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
40885 of z-extensions and s-extensions.
40886 (riscv_subset_list::parse): Likewise.
40888 2023-04-18 Jakub Jelinek <jakub@redhat.com>
40890 PR tree-optimization/109240
40891 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
40892 first vec_perm operand and minus as second using fneg/fadd and
40893 minus as first vec_perm operand and plus as second using fneg/fsub.
40895 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40897 * data-streamer.cc (bp_pack_real_value): New.
40898 (bp_unpack_real_value): New.
40899 * data-streamer.h (bp_pack_real_value): New.
40900 (bp_unpack_real_value): New.
40901 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
40902 bp_unpack_real_value.
40903 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
40904 bp_pack_real_value.
40906 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40908 * wide-int.h (WIDE_INT_MAX_HWIS): New.
40909 (class fixed_wide_int_storage): Use it.
40910 (trailing_wide_ints <N>::set_precision): Use it.
40911 (trailing_wide_ints <N>::extra_size): Use it.
40913 2023-04-18 Xi Ruoyao <xry111@xry111.site>
40915 * config/loongarch/loongarch-protos.h
40916 (loongarch_addu16i_imm12_operand_p): New function prototype.
40917 (loongarch_split_plus_constant): Likewise.
40918 * config/loongarch/loongarch.cc
40919 (loongarch_addu16i_imm12_operand_p): New function.
40920 (loongarch_split_plus_constant): Likewise.
40921 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
40922 (DUAL_IMM12_OPERAND): Likewise.
40923 (DUAL_ADDU16I_OPERAND): Likewise.
40924 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
40926 * config/loongarch/predicates.md (const_dual_imm12_operand): New
40928 (const_addu16i_operand): Likewise.
40929 (const_addu16i_imm12_di_operand): Likewise.
40930 (const_addu16i_imm12_si_operand): Likewise.
40931 (plus_di_operand): Likewise.
40932 (plus_si_operand): Likewise.
40933 (plus_si_extend_operand): Likewise.
40934 * config/loongarch/loongarch.md (add<mode>3): Convert to
40935 define_insn_and_split. Use plus_<mode>_operand predicate
40936 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
40937 and Le constraints.
40938 (*addsi3_extended): Convert to define_insn_and_split. Use
40939 plus_si_extend_operand instead of arith_operand. Add
40940 alternatives for La and Le alternatives.
40942 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40944 * value-range.h (Value_Range::Value_Range): New.
40945 (Value_Range::contains_p): New.
40947 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40949 * value-range.h (class vrange): Make m_discriminator const.
40950 (class irange): Make m_max_ranges const. Adjust constructors
40952 (class unsupported_range): Construct vrange appropriately.
40953 (class frange): Same.
40955 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
40957 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
40960 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
40962 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
40964 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
40966 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
40968 (riscv_expand_epilogue): Likewise.
40970 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
40972 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
40974 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
40976 2023-04-17 Andrew Pinski <apinski@marvell.com>
40978 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
40981 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
40983 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
40986 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
40988 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
40989 parameter remaining_size.
40990 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
40991 (riscv_expand_prologue): Likewise.
40992 (riscv_expand_epilogue): Likewise.
40994 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
40996 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
40997 roriw for constant counts.
40998 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
40999 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
41000 (simplify_context::simplify_binary_operation_1): Use it.
41001 * expmed.cc (expand_shift_1): Likewise.
41003 2023-04-17 Martin Jambor <mjambor@suse.cz>
41007 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
41008 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
41009 (ipa_zap_jf_refdesc): New function.
41010 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
41011 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
41012 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
41013 the new parameter of find_reference.
41014 (adjust_references_in_caller): Likewise. Make sure the constant jump
41015 function is not used to decrement a refdec counter again. Only
41016 decrement refdesc counters when the pass_through jump function allows
41017 it. Added a detailed dump when decrementing refdesc counters.
41018 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
41019 (ipa_set_jf_simple_pass_through): Initialize the new flag.
41020 (ipa_set_jf_unary_pass_through): Likewise.
41021 (ipa_set_jf_arith_pass_through): Likewise.
41022 (remove_described_reference): Provide a value for the new parameter of
41024 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
41025 the previous pass_through had a flag mandating that we do so.
41026 (propagate_controlled_uses): Likewise. Only decrement refdesc
41027 counters when the pass_through jump function allows it.
41028 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
41029 parameter of find_reference.
41030 (ipa_write_jump_function): Assert the new flag does not have to be
41032 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
41035 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
41036 Di Zhao <di.zhao@amperecomputing.com>
41038 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
41039 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
41040 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
41041 Check for the above tuning option when processing loads.
41043 2023-04-17 Richard Biener <rguenther@suse.de>
41045 PR tree-optimization/109524
41046 * tree-vrp.cc (remove_unreachable::m_list): Change to a
41047 vector of pairs of block indices.
41048 (remove_unreachable::maybe_register_block): Adjust.
41049 (remove_unreachable::remove_and_update_globals): Likewise.
41050 Deal with removed blocks.
41052 2023-04-16 Jeff Law <jlaw@ventanamicro>
41055 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
41056 TARGET_SFB_ALU, force the true arm into a register.
41058 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
41061 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
41062 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
41064 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
41065 (pa_function_arg_size): Change return type to int. Return zero
41066 for arguments larger than 1 GB. Update comments.
41068 2023-04-15 Jakub Jelinek <jakub@redhat.com>
41070 PR tree-optimization/109154
41071 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
41072 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
41074 2023-04-15 Jason Merrill <jason@redhat.com>
41077 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
41078 Overhaul lhs_ref.ref analysis.
41080 2023-04-14 Richard Biener <rguenther@suse.de>
41082 PR tree-optimization/109502
41083 * tree-vect-stmts.cc (vectorizable_assignment): Fix
41084 check for conversion between mask and non-mask types.
41086 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
41087 Jakub Jelinek <jakub@redhat.com>
41091 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
41092 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
41093 smaller than word_mode.
41094 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
41095 <case AND>: Likewise.
41097 2023-04-14 Jakub Jelinek <jakub@redhat.com>
41099 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
41102 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
41104 PR tree-optimization/108139
41105 PR tree-optimization/109462
41106 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
41107 equivalency check for PHI nodes.
41108 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
41109 does not dominate single-arg equivalency edges.
41111 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
41114 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
41115 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
41117 2023-04-13 Richard Biener <rguenther@suse.de>
41119 PR tree-optimization/109491
41120 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
41121 NULL operands test.
41123 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41126 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
41127 (vint16mf4_t): Ditto.
41128 (vint32mf2_t): Ditto.
41129 (vint64m1_t): Ditto.
41130 (vint64m2_t): Ditto.
41131 (vint64m4_t): Ditto.
41132 (vint64m8_t): Ditto.
41133 (vuint8mf8_t): Ditto.
41134 (vuint16mf4_t): Ditto.
41135 (vuint32mf2_t): Ditto.
41136 (vuint64m1_t): Ditto.
41137 (vuint64m2_t): Ditto.
41138 (vuint64m4_t): Ditto.
41139 (vuint64m8_t): Ditto.
41140 (vfloat32mf2_t): Ditto.
41141 (vbool64_t): Ditto.
41142 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
41143 (register_vector_type): Ditto.
41144 (check_required_extensions): Fix condition.
41145 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
41146 (RVV_REQUIRE_ELEN_64): New define.
41147 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
41148 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
41149 (TARGET_VECTOR_FP64): Ditto.
41150 (ENTRY): Fix predicate.
41151 * config/riscv/vector-iterators.md: Fix predicate.
41153 2023-04-12 Jakub Jelinek <jakub@redhat.com>
41155 PR tree-optimization/109410
41156 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
41157 block if first statement of the function is a call to returns_twice
41160 2023-04-12 Jakub Jelinek <jakub@redhat.com>
41163 * config/i386/i386.cc: Include rtl-error.h.
41164 (ix86_print_operand): For z modifier warning, use warning_for_asm
41165 if this_is_asm_operands. For Z modifier errors, use %c and code
41166 instead of hardcoded Z.
41168 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
41170 * config/i386/x-mingw32-utf8: Remove extrataneous $@
41172 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
41174 PR tree-optimization/109462
41175 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
41176 check for equivalences if NAME is a phi node.
41178 2023-04-12 Richard Biener <rguenther@suse.de>
41180 PR tree-optimization/109473
41181 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
41182 Convert scalar result to the computation type before performing
41183 the reduction adjustment.
41185 2023-04-12 Richard Biener <rguenther@suse.de>
41187 PR tree-optimization/109469
41188 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
41189 a returns-twice call.
41191 2023-04-12 Richard Biener <rguenther@suse.de>
41193 PR tree-optimization/109434
41194 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
41195 handle possibly throwing calls when processing the LHS
41196 and may-defs are not OK.
41198 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
41200 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
41201 predicate to avoid splitting arith constants.
41203 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
41204 Pan Li <pan2.li@intel.com>
41205 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41206 Kito Cheng <kito.cheng@sifive.com>
41209 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
41210 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
41211 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
41212 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
41213 (riscv_zero_call_used_regs): New.
41214 (TARGET_ZERO_CALL_USED_REGS): New.
41216 2023-04-11 Martin Liska <mliska@suse.cz>
41219 * opts.cc (finish_options): Drop also
41220 x_flag_var_tracking_assignments.
41222 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
41224 PR tree-optimization/108888
41225 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
41227 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
41230 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
41231 (vsx_sign_extend_v16qi_<mode>): ... this.
41232 (vsx_sign_extend_hi_<mode>): Rename to...
41233 (vsx_sign_extend_v8hi_<mode>): ... this.
41234 (vsx_sign_extend_si_v2di): Rename to...
41235 (vsx_sign_extend_v4si_v2di): ... this.
41236 (vsignextend_qi_<mode>): Remove.
41237 (vsignextend_hi_<mode>): Remove.
41238 (vsignextend_si_v2di): Remove.
41239 (vsignextend_v2di_v1ti): Remove.
41240 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
41241 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
41242 with gen_vsx_sign_extend_v16qi_v4si.
41243 * config/rs6000/rs6000.md (split for DI constant generation):
41244 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
41245 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
41246 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
41247 with gen_vsx_sign_extend_v16qi_si.
41248 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
41249 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
41250 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
41251 vsx_sign_extend_v16qi_v4si.
41252 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
41253 vsx_sign_extend_v8hi_v2di.
41254 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
41255 vsx_sign_extend_v8hi_v4si.
41256 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
41257 vsx_sign_extend_si_v2di.
41258 (__builtin_altivec_vsignext): Set bif-pattern to
41259 vsx_sign_extend_v2di_v1ti.
41260 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
41261 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
41262 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
41263 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
41265 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
41268 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
41269 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
41271 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
41273 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
41275 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
41277 * common/config/i386/cpuinfo.h (get_available_features):
41278 Detect AMX-COMPLEX.
41279 * common/config/i386/i386-common.cc
41280 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
41281 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
41282 (ix86_handle_option): Handle -mamx-complex.
41283 * common/config/i386/i386-cpuinfo.h (enum processor_features):
41284 Add FEATURE_AMX_COMPLEX.
41285 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
41287 * config.gcc: Add amxcomplexintrin.h.
41288 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
41289 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
41291 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
41292 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
41293 Handle amx-complex.
41294 * config/i386/i386.opt: Add option -mamx-complex.
41295 * config/i386/immintrin.h: Include amxcomplexintrin.h.
41296 * doc/extend.texi: Document amx-complex.
41297 * doc/invoke.texi: Document -mamx-complex.
41298 * doc/sourcebuild.texi: Document target amx-complex.
41299 * config/i386/amxcomplexintrin.h: New file.
41301 2023-04-08 Jakub Jelinek <jakub@redhat.com>
41303 PR tree-optimization/109392
41304 * tree-vect-generic.cc (tree_vec_extract): Handle failure
41305 of maybe_push_res_to_seq better.
41307 2023-04-08 Jakub Jelinek <jakub@redhat.com>
41309 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
41311 (SYSTEM_H): Depend on $(HASHTAB_H).
41312 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
41313 dependency on $(RTL_BASE_H), remove redundant dependency on
41316 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
41319 * config/arm/arm.cc (arm_effective_regno): New function.
41320 (mve_vector_mem_operand): Use it.
41322 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
41324 PR tree-optimization/109417
41325 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
41326 dependency is in SSA_NAME_FREE_LIST.
41328 2023-04-06 Andrew Pinski <apinski@marvell.com>
41330 PR tree-optimization/109427
41331 * params.opt (-param=vect-induction-float=):
41332 Fix option attribute typo for IntegerRange.
41334 2023-04-05 Jeff Law <jlaw@ventanamicro>
41337 * combine.cc (combine_instructions): Force re-recognition when
41338 after restoring the body of an insn to its original form.
41340 2023-04-05 Martin Jambor <mjambor@suse.cz>
41343 * ipa-sra.cc (zap_useless_ipcp_results): New function.
41344 (process_isra_node_results): Call it.
41346 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41348 * config/riscv/vector.md: Fix incorrect operand order.
41350 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
41352 * config/riscv/riscv-vsetvl.cc
41353 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
41356 2023-04-05 Li Xu <xuli1@eswincomputing.com>
41358 * config/riscv/riscv-vector-builtins.def: Fix typo.
41359 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
41360 * config/riscv/vector-iterators.md: Ditto.
41362 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
41364 * doc/md.texi (Including Patterns): Fix page break.
41366 2023-04-04 Jakub Jelinek <jakub@redhat.com>
41368 PR tree-optimization/109386
41369 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
41370 foperator_le::op1_range, foperator_le::op2_range,
41371 foperator_gt::op1_range, foperator_gt::op2_range,
41372 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
41373 BRS_FALSE case even if the other op is maybe_isnan, not just
41375 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
41376 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
41377 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
41378 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
41379 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
41380 not just known_isnan.
41382 2023-04-04 Marek Polacek <polacek@redhat.com>
41384 PR sanitizer/109107
41385 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
41387 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
41389 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
41391 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
41392 (mve_vcreateq_f<mode>): Swap operands.
41394 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
41396 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
41398 2023-04-04 Jakub Jelinek <jakub@redhat.com>
41401 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
41402 Reword diagnostics about zfinx conflict with f, formatting fixes.
41404 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
41406 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
41408 2023-04-04 Richard Biener <rguenther@suse.de>
41410 PR tree-optimization/109304
41411 * tree-profile.cc (tree_profiling): Use symtab node
41412 availability to decide whether to skip adjusting calls.
41413 Do not adjust calls to internal functions.
41415 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
41418 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
41419 function for permutation control vector by considering big endianness.
41421 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
41424 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
41425 (rs6000_vprtyb<mode>2): ... this.
41426 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
41427 rs6000_vprtybv2di2.
41428 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
41429 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
41430 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
41431 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
41433 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
41434 Sandra Loosemore <sandra@codesourcery.com>
41436 * doc/md.texi (Insn Splitting): Tweak wording for readability.
41438 2023-04-03 Martin Jambor <mjambor@suse.cz>
41441 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
41442 offset + size will be representable in unsigned int.
41444 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
41446 * configure.ac (ZSTD_LIB): Move before zstd.h check.
41447 Unset gcc_cv_header_zstd_h without libzstd.
41448 * configure: Regenerate.
41450 2023-04-03 Martin Liska <mliska@suse.cz>
41452 * doc/invoke.texi: Document new param.
41454 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
41456 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
41457 new check_effective_target function.
41459 2023-04-03 Li Xu <xuli1@eswincomputing.com>
41461 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
41462 (vfloat32m8_t): Likewise
41464 2023-04-03 liuhongt <hongtao.liu@intel.com>
41466 * doc/md.texi: Document signbitm2.
41468 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
41469 kito-cheng <kito.cheng@sifive.com>
41471 * config/riscv/vector.md: Fix RA constraint.
41473 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
41475 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
41476 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
41477 * config/riscv/vector.md: Fix scalar move bug.
41479 2023-04-01 Jakub Jelinek <jakub@redhat.com>
41481 * range-op-float.cc (foperator_equal::fold_range): If at least
41482 one of the op ranges is not singleton and neither is NaN and all
41483 4 bounds are zero, return [1, 1].
41484 (foperator_not_equal::fold_range): In the same case return [0, 0].
41486 2023-04-01 Jakub Jelinek <jakub@redhat.com>
41488 * range-op-float.cc (foperator_equal::fold_range): Perform the
41489 non-singleton handling regardless of maybe_isnan (op1, op2).
41490 (foperator_not_equal::fold_range): Likewise.
41491 (foperator_lt::fold_range, foperator_le::fold_range,
41492 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
41493 real_* comparison check which results in range_false (type)
41494 even if maybe_isnan (op1, op2). Simplify.
41495 (foperator_ltgt): New class.
41496 (fop_ltgt): New variable.
41497 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
41500 2023-04-01 Jakub Jelinek <jakub@redhat.com>
41503 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
41504 returns VOIDmode, handle it like if the register isn't used for
41505 passing arguments at all.
41506 (apply_result_size): If targetm.calls.get_raw_result_mode returns
41507 VOIDmode, handle it like if the register isn't used for returning
41509 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
41510 means to return VOIDmode.
41511 * doc/tm.texi: Regenerated.
41512 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
41513 TARGET_SVE for P0_REGNUM.
41514 (aarch64_function_arg_regno_p): Also return true for p0-p3.
41515 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
41517 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
41519 * lra-constraints.cc: (combine_reload_insn): New function.
41521 2023-03-31 Jakub Jelinek <jakub@redhat.com>
41523 PR tree-optimization/91645
41524 * range-op-float.cc (foperator_unordered_lt::fold_range,
41525 foperator_unordered_le::fold_range,
41526 foperator_unordered_gt::fold_range,
41527 foperator_unordered_ge::fold_range,
41528 foperator_unordered_equal::fold_range): Call the ordered
41529 fold_range on ranges with cleared NaNs.
41530 * value-query.cc (range_query::get_tree_range): Handle also
41531 COMPARISON_CLASS_P trees.
41533 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
41534 Andrew Pinski <pinskia@gmail.com>
41537 * config/riscv/t-riscv: Add missing dependencies.
41539 2023-03-31 liuhongt <hongtao.liu@intel.com>
41541 * config/i386/i386.cc (inline_memory_move_cost): Return 100
41542 for MASK_REGS when MODE_SIZE > 8.
41544 2023-03-31 liuhongt <hongtao.liu@intel.com>
41547 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
41548 ufloat/ufix to floatuns/fixuns.
41549 * config/i386/i386-expand.cc
41550 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
41551 * config/i386/sse.md
41552 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
41554 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
41555 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
41557 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
41559 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
41561 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
41562 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
41563 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
41564 (ufloatv2siv2df2<mask_name>): Renamed to ..
41565 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
41566 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
41568 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
41570 (ufix_notruncv2dfv2si2): Renamed to ..
41571 (fixuns_notruncv2dfv2si2):.. this.
41572 (ufix_notruncv2dfv2si2_mask): Renamed to ..
41573 (fixuns_notruncv2dfv2si2_mask): .. this.
41574 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
41575 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
41576 (ufix_truncv2dfv2si2): Renamed to ..
41577 (*fixuns_truncv2dfv2si2): .. this.
41578 (ufix_truncv2dfv2si2_mask): Renamed to ..
41579 (fixuns_truncv2dfv2si2_mask): .. this.
41580 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
41581 (*fixuns_truncv2dfv2si2_mask_1): .. this.
41582 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
41583 (fixuns_truncv4dfv4si2<mask_name>): .. this.
41584 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
41586 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
41588 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
41589 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
41592 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
41594 PR tree-optimization/109154
41595 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
41596 * gimple-range-gori.h (may_recompute_p): Add depth param.
41597 * params.opt (ranger-recompute-depth): New param.
41599 2023-03-30 Jason Merrill <jason@redhat.com>
41603 * cgraph.h: Move reset() from cgraph_node to symtab_node.
41604 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
41605 remove_from_same_comdat_group.
41607 2023-03-30 Richard Biener <rguenther@suse.de>
41609 PR tree-optimization/107561
41610 * gimple-ssa-warn-access.cc (get_size_range): Add flags
41611 argument and pass it on.
41612 (check_access): When querying for the size range pass
41613 SR_ALLOW_ZERO when the known destination size is zero.
41615 2023-03-30 Richard Biener <rguenther@suse.de>
41617 PR tree-optimization/109342
41618 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
41619 overload for edge. When that edge is a backedge use
41620 dominated_by_p directly.
41622 2023-03-30 liuhongt <hongtao.liu@intel.com>
41624 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
41625 vpblendd instead of vpblendw for V4SI under avx2.
41627 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
41629 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
41630 for many quick operands, for register-sized modes.
41632 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
41634 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
41637 2023-03-29 Martin Liska <mliska@suse.cz>
41639 PR bootstrap/109310
41640 * configure.ac: Emit a warning for deprecated option
41641 --enable-link-mutex.
41642 * configure: Regenerate.
41644 2023-03-29 Richard Biener <rguenther@suse.de>
41646 PR tree-optimization/109331
41647 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
41648 discover a taken edge make sure to cleanup the CFG.
41650 2023-03-29 Richard Biener <rguenther@suse.de>
41652 PR tree-optimization/109327
41653 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
41654 already removed stmts when draining to_remove.
41656 2023-03-29 Richard Biener <rguenther@suse.de>
41659 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
41660 so we can re-create the DIE for the type if required.
41662 2023-03-29 Jakub Jelinek <jakub@redhat.com>
41663 Richard Biener <rguenther@suse.de>
41665 PR tree-optimization/109301
41666 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
41667 properties_provided from PROP_gimple_opt_math to 0.
41668 (pass_data_expand_powcabs): Change properties_provided from 0 to
41669 PROP_gimple_opt_math.
41671 2023-03-29 Richard Biener <rguenther@suse.de>
41673 PR tree-optimization/109154
41674 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
41675 inverted condition specially by inverting at the caller.
41676 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
41678 2023-03-28 David Malcolm <dmalcolm@redhat.com>
41681 * diagnostic-show-locus.cc (column_range::column_range): Factor
41682 out assertion conditional into...
41683 (column_range::valid_p): ...this new function.
41684 (line_corrections::add_hint): Don't attempt to consolidate hints
41685 if it would lead to invalid column_range instances.
41687 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
41690 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
41691 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
41694 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
41696 PR rtl-optimization/109187
41697 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
41698 subtraction in three-way comparison.
41700 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
41702 PR tree-optimization/109265
41703 PR tree-optimization/109274
41704 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
41705 not create a relation record is op1 and op2 are the same symbol.
41706 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
41707 handler for this stmt, but create a new record only if this statement
41708 generates a relation based on the ranges.
41709 (gori_compute::compute_operand2_range): Ditto.
41710 * value-relation.h (value_relation::set_relation): Always create the
41711 record that is requested.
41713 2023-03-28 Richard Biener <rguenther@suse.de>
41715 PR tree-optimization/107087
41716 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
41717 executable regions to avoid useless work and to better
41718 propagate degenerate PHIs.
41720 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
41722 * config/i386/x-mingw32-utf8: update comments.
41724 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
41727 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
41728 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
41730 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
41732 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
41733 after inlining. Record which decls are loaded from. Fix handling
41734 of vops for loads and stores.
41735 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
41736 (aarch64_accesses_vector_load_decl_p): Likewise.
41737 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
41739 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
41740 that loads from a decl, treat vector stores to those decls as
41742 (aarch64_vector_costs::finish_cost): ...and in that case,
41743 if the vector code does nothing more than a store, give the
41744 prologue a zero cost as well.
41746 2023-03-28 Richard Biener <rguenther@suse.de>
41749 PR tree-optimization/108129
41750 * genmatch.cc (lower_for): For (match ...) delay
41751 substituting into the match operator if possible.
41752 (dt_operand::gen_gimple_expr): For user_id look at the
41753 first substitute for determining how to access operands.
41754 (dt_operand::gen_generic_expr): Likewise.
41755 (dt_node::gen_kids): Properly sort user_ids according
41756 to their substitutes.
41757 (dt_node::gen_kids_1): Code-generate user_id matching.
41759 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41760 Jonathan Wakely <jwakely@redhat.com>
41762 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
41763 Use subcommand rather than sub-command in function comments.
41765 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41767 PR tree-optimization/109154
41768 * value-range.h (frange::flush_denormals_to_zero): Make it public
41769 rather than private.
41770 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
41772 * range-op-float.cc (range_operator_float::fold_range): Call
41773 flush_denormals_to_zero.
41775 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41777 PR middle-end/106190
41778 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
41779 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
41781 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41783 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
41784 as 4th argument to set to avoid clear_nan and union_ calls.
41786 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41789 * config/i386/i386.cc (assign_386_stack_local): For DImode
41790 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
41791 align 32 rather than 0 to assign_stack_local.
41793 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
41796 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
41797 on operand #3 to get the final condition code. Use std::swap.
41798 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
41799 (fucmp<gcond:code>8<P:mode>_vis): Move around.
41800 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
41801 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
41803 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
41805 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
41806 top-level sections.
41808 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
41810 * config.host: Pull in i386/x-mingw32-utf8 Makefile
41811 fragment and reference utf8rc-mingw32.o explicitly
41813 * config/i386/sym-mingw32.cc: prevent name mangling of
41815 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
41816 depend on manifest file explicitly.
41818 2023-03-28 Richard Biener <rguenther@suse.de>
41821 2023-03-27 Richard Biener <rguenther@suse.de>
41823 PR rtl-optimization/109237
41824 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
41826 2023-03-28 Richard Biener <rguenther@suse.de>
41828 * common.opt (gdwarf): Remove Negative(gdwarf-).
41830 2023-03-28 Richard Biener <rguenther@suse.de>
41832 * common.opt (gdwarf): Add RejectNegative.
41833 (gdwarf-): Likewise.
41837 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41839 * config/cris/constraints.md ("T"): Correct to
41840 define_memory_constraint.
41842 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41844 * config/cris/cris.md (BW2): New mode-iterator.
41845 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
41848 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41850 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
41851 for possible eliminable compares.
41853 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41855 * config/cris/constraints.md ("R"): Remove unused constraint.
41857 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
41859 PR gcov-profile/109297
41860 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
41861 (merge_stream_usage): Likewise.
41862 (overlap_usage): Likewise.
41864 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
41867 * config/riscv/thead.md: Add missing mode specifiers.
41869 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
41870 Jiangning Liu <jiangning.liu@amperecomputing.com>
41871 Manolis Tsamis <manolis.tsamis@vrull.eu>
41873 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
41875 2023-03-27 Richard Biener <rguenther@suse.de>
41877 PR rtl-optimization/109237
41878 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
41880 2023-03-27 Richard Biener <rguenther@suse.de>
41883 * lto-wrapper.cc (run_gcc): Parse alternate debug options
41884 as well, they always enable debug.
41886 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
41889 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
41891 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
41893 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
41896 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
41897 than zero when calling vec_sld.
41898 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
41899 zero when calling vec_sld.
41900 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
41901 than zero when calling vec_sld.
41903 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
41905 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
41906 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
41907 loops are represented and which fields are vectors. Add
41908 documentation for OMP_FOR_PRE_BODY field. Document internal
41909 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
41910 * tree.def (OMP_FOR): Make documentation consistent with the
41911 Texinfo manual, to fill some gaps and correct errors.
41913 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
41916 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
41917 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
41918 (handle_move_double): Call it before handle_movsi.
41919 * config/m68k/m68k-protos.h: Declare it.
41921 2023-03-26 Jakub Jelinek <jakub@redhat.com>
41923 PR tree-optimization/109230
41924 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
41926 2023-03-26 Jakub Jelinek <jakub@redhat.com>
41929 * predict.cc (compute_function_frequency): Don't call
41930 warn_function_cold if function already has cold attribute.
41932 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
41934 * doc/install.texi: Remove anachronistic note
41935 related to languages built and separate source tarballs.
41937 2023-03-25 David Malcolm <dmalcolm@redhat.com>
41940 * diagnostic-format-sarif.cc (read_until_eof): Delete.
41941 (maybe_read_file): Delete.
41942 (sarif_builder::maybe_make_artifact_content_object): Use
41943 get_source_file_content rather than maybe_read_file.
41944 Reject it if it's not valid UTF-8.
41945 * input.cc (file_cache_slot::get_full_file_content): New.
41946 (get_source_file_content): New.
41947 (selftest::check_cpp_valid_utf8_p): New.
41948 (selftest::test_cpp_valid_utf8_p): New.
41949 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
41950 * input.h (get_source_file_content): New prototype.
41952 2023-03-24 David Malcolm <dmalcolm@redhat.com>
41954 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
41956 (Special Functions for Debugging the Analyzer): Convert to a
41957 table, and rewrite in places.
41958 (Other Debugging Techniques): Add notes on how to compare two
41959 different exploded graphs.
41961 2023-03-24 David Malcolm <dmalcolm@redhat.com>
41964 * json.cc: Update comments to indicate that we now preserve
41965 insertion order of keys within objects.
41966 (object::print): Traverse keys in insertion order.
41967 (object::set): Preserve insertion order of keys.
41968 (selftest::test_writing_objects): Add an additional key to verify
41969 that we preserve insertion order.
41970 * json.h (object::m_keys): New field.
41972 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
41974 PR tree-optimization/109238
41975 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
41976 predecessors which this block dominates.
41978 2023-03-24 Richard Biener <rguenther@suse.de>
41980 PR tree-optimization/106912
41981 * tree-profile.cc (tree_profiling): Update stmts only when
41982 profiling or testing coverage. Make sure to update calls
41983 fntype, stripping 'const' there.
41985 2023-03-24 Jakub Jelinek <jakub@redhat.com>
41987 PR middle-end/109258
41988 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
41989 if target == const0_rtx.
41991 2023-03-24 Alexandre Oliva <oliva@adacore.com>
41993 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
41994 Document options and effective targets.
41996 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
41998 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
42001 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
42003 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
42004 non-earlyclobber alternative.
42006 2023-03-23 Andrew Pinski <apinski@marvell.com>
42009 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
42012 2023-03-23 Richard Biener <rguenther@suse.de>
42014 PR tree-optimization/107569
42015 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
42016 Do not push SSA names with zero uses as available leader.
42017 (process_bb): Likewise.
42019 2023-03-23 Richard Biener <rguenther@suse.de>
42021 PR tree-optimization/109262
42022 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
42023 combining a piecewise complex load avoid touching loads
42024 that throw internally. Use fun, not cfun throughout.
42026 2023-03-23 Jakub Jelinek <jakub@redhat.com>
42028 * value-range.cc (irange::irange_union, irange::intersect): Fix
42029 comment spelling bugs.
42030 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
42031 * gimple-range-trace.h: Likewise.
42032 * gimple-range-edge.cc: Likewise.
42033 (gimple_outgoing_range_stmt_p,
42034 gimple_outgoing_range::switch_edge_range,
42035 gimple_outgoing_range::edge_range_p): Likewise.
42036 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
42037 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
42038 assume_query::assume_query, assume_query::calculate_phi): Likewise.
42039 * gimple-range-edge.h: Likewise.
42040 * value-range.h (Value_Range::set, Value_Range::lower_bound,
42041 Value_Range::upper_bound, frange::set_undefined): Likewise.
42042 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
42043 gori_compute): Likewise.
42044 * gimple-range-fold.h (fold_using_range): Likewise.
42045 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
42047 * gimple-range-gori.cc (range_def_chain::in_chain_p,
42048 range_def_chain::dump, gori_map::calculate_gori,
42049 gori_compute::compute_operand_range_switch,
42050 gori_compute::logical_combine, gori_compute::refine_using_relation,
42051 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
42053 * gimple-range.h: Likewise.
42054 (enable_ranger): Likewise.
42055 * range-op.h (empty_range_varying): Likewise.
42056 * value-query.h (value_query): Likewise.
42057 * gimple-range-cache.cc (block_range_cache::set_bb_range,
42058 block_range_cache::dump, ssa_global_cache::clear_global_range,
42059 temporal_cache::temporal_value, temporal_cache::current_p,
42060 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
42061 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
42063 * gimple-range-fold.cc (fur_edge::get_phi_operand,
42064 fur_stmt::get_operand, gimple_range_adjustment,
42065 fold_using_range::range_of_phi,
42066 fold_using_range::relation_fold_and_or): Likewise.
42067 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
42068 * value-query.cc (range_query::value_of_expr,
42069 range_query::value_on_edge, range_query::query_relation): Likewise.
42070 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
42071 intersect_range_with_nonzero_bits): Likewise.
42072 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
42073 exit_range): Likewise.
42074 * value-relation.h: Likewise.
42075 (equiv_oracle, relation_trio::relation_trio, value_relation,
42076 value_relation::value_relation, pe_min): Likewise.
42077 * range-op-float.cc (range_operator_float::rv_fold,
42078 frange_arithmetic, foperator_unordered_equal::op1_range,
42079 foperator_div::rv_fold): Likewise.
42080 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
42081 * value-relation.cc (equiv_oracle::query_relation,
42082 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
42083 value_relation::apply_transitive, relation_chain_head::find_relation,
42084 dom_oracle::query_relation, dom_oracle::find_relation_block,
42085 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
42086 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
42087 create_possibly_reversed_range, adjust_op1_for_overflow,
42088 operator_mult::wi_fold, operator_exact_divide::op1_range,
42089 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
42090 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
42091 range_op_lshift_tests): Likewise.
42093 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
42095 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
42096 (move_callee_saved_registers): Detect the bug condition early.
42098 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
42100 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
42101 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
42103 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
42104 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
42105 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
42106 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
42107 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
42109 2023-03-23 Jakub Jelinek <jakub@redhat.com>
42111 PR tree-optimization/109176
42112 * tree-vect-generic.cc (expand_vector_condition): If a has
42113 vector boolean type and is a comparison, also check if both
42114 the comparison and VEC_COND_EXPR could be successfully expanded
42117 2023-03-23 Pan Li <pan2.li@intel.com>
42118 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42122 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
42123 for vector mask modes.
42124 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
42125 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
42127 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
42129 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
42131 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42134 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
42135 (emit_vlmax_op): Ditto.
42136 * config/riscv/riscv-v.cc (get_sew): New function.
42137 (emit_vlmax_vsetvl): Adapt function.
42138 (emit_pred_op): Ditto.
42139 (emit_vlmax_op): Ditto.
42140 (emit_nonvlmax_op): Ditto.
42141 (legitimize_move): Fix LRA ICE.
42142 (gen_no_side_effects_vsetvl_rtx): Adapt function.
42143 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
42144 (@mov<VB:mode><P:mode>_lra): Ditto.
42145 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
42146 (*mov<VB:mode><P:mode>_lra): Ditto.
42148 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42151 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
42152 __riscv_vlenb support.
42154 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42155 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
42156 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
42158 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42159 * config/riscv/riscv-vector-builtins.cc: Ditto.
42161 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42162 kito-cheng <kito.cheng@sifive.com>
42164 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
42165 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
42166 (pass_vsetvl::need_vsetvl): Fix bugs.
42167 (pass_vsetvl::backward_demand_fusion): Fix bugs.
42168 (pass_vsetvl::demand_fusion): Fix bugs.
42169 (eliminate_insn): Fix bugs.
42170 (insert_vsetvl): Ditto.
42171 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
42172 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
42173 * config/riscv/vector.md: Ditto.
42175 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42176 kito-cheng <kito.cheng@sifive.com>
42178 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
42179 * config/riscv/vector-iterators.md (nmsac): Ditto.
42185 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
42186 (@pred_mul_plus<mode>): Ditto.
42187 (*pred_madd<mode>): Ditto.
42188 (*pred_macc<mode>): Ditto.
42189 (*pred_mul_plus<mode>): Ditto.
42190 (@pred_mul_plus<mode>_scalar): Ditto.
42191 (*pred_madd<mode>_scalar): Ditto.
42192 (*pred_macc<mode>_scalar): Ditto.
42193 (*pred_mul_plus<mode>_scalar): Ditto.
42194 (*pred_madd<mode>_extended_scalar): Ditto.
42195 (*pred_macc<mode>_extended_scalar): Ditto.
42196 (*pred_mul_plus<mode>_extended_scalar): Ditto.
42197 (@pred_minus_mul<mode>): Ditto.
42198 (*pred_<madd_nmsub><mode>): Ditto.
42199 (*pred_nmsub<mode>): Ditto.
42200 (*pred_<macc_nmsac><mode>): Ditto.
42201 (*pred_nmsac<mode>): Ditto.
42202 (*pred_mul_<optab><mode>): Ditto.
42203 (*pred_minus_mul<mode>): Ditto.
42204 (@pred_mul_<optab><mode>_scalar): Ditto.
42205 (@pred_minus_mul<mode>_scalar): Ditto.
42206 (*pred_<madd_nmsub><mode>_scalar): Ditto.
42207 (*pred_nmsub<mode>_scalar): Ditto.
42208 (*pred_<macc_nmsac><mode>_scalar): Ditto.
42209 (*pred_nmsac<mode>_scalar): Ditto.
42210 (*pred_mul_<optab><mode>_scalar): Ditto.
42211 (*pred_minus_mul<mode>_scalar): Ditto.
42212 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
42213 (*pred_nmsub<mode>_extended_scalar): Ditto.
42214 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
42215 (*pred_nmsac<mode>_extended_scalar): Ditto.
42216 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
42217 (*pred_minus_mul<mode>_extended_scalar): Ditto.
42218 (*pred_<madd_msub><mode>): Ditto.
42219 (*pred_<macc_msac><mode>): Ditto.
42220 (*pred_<madd_msub><mode>_scalar): Ditto.
42221 (*pred_<macc_msac><mode>_scalar): Ditto.
42222 (@pred_neg_mul_<optab><mode>): Ditto.
42223 (@pred_mul_neg_<optab><mode>): Ditto.
42224 (*pred_<nmadd_msub><mode>): Ditto.
42225 (*pred_<nmsub_nmadd><mode>): Ditto.
42226 (*pred_<nmacc_msac><mode>): Ditto.
42227 (*pred_<nmsac_nmacc><mode>): Ditto.
42228 (*pred_neg_mul_<optab><mode>): Ditto.
42229 (*pred_mul_neg_<optab><mode>): Ditto.
42230 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
42231 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
42232 (*pred_<nmadd_msub><mode>_scalar): Ditto.
42233 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
42234 (*pred_<nmacc_msac><mode>_scalar): Ditto.
42235 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
42236 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
42237 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
42238 (@pred_widen_neg_mul_<optab><mode>): Ditto.
42239 (@pred_widen_mul_neg_<optab><mode>): Ditto.
42240 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
42241 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
42243 2023-03-23 liuhongt <hongtao.liu@intel.com>
42245 * builtins.cc (builtin_memset_read_str): Replace
42246 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
42247 (builtin_memset_gen_str): Ditto.
42248 * config/i386/i386-expand.cc
42249 (ix86_convert_const_wide_int_to_broadcast): Replace
42250 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
42251 (ix86_expand_vector_move): Ditto.
42252 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
42254 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
42255 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
42256 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
42257 * doc/tm.texi.in: Ditto.
42258 * target.def: Ditto.
42260 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
42262 * lra.cc (lra): Do not repeat inheritance and live range splitting
42263 when asm error is found.
42265 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
42267 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
42268 (gcn_expand_dpp_distribute_even_insn)
42269 (gcn_expand_dpp_distribute_odd_insn): Declare.
42270 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
42271 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
42272 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
42273 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
42274 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
42275 (fms<mode>4_negop2): New patterns.
42276 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
42277 (gcn_expand_dpp_distribute_even_insn)
42278 (gcn_expand_dpp_distribute_odd_insn): New functions.
42279 * config/gcn/gcn.md: Add entries to unspec enum.
42281 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
42283 PR tree-optimization/109008
42284 * value-range.cc (frange::set): Add nan_state argument.
42285 * value-range.h (class nan_state): New.
42286 (frange::get_nan_state): New.
42288 2023-03-22 Martin Liska <mliska@suse.cz>
42290 * configure: Regenerate.
42292 2023-03-21 Joseph Myers <joseph@codesourcery.com>
42294 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
42297 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
42299 PR tree-optimization/109192
42300 * gimple-range-gori.cc (gori_compute::compute_operand_range):
42301 Terminate gori calculations if a relation is not relevant.
42302 * value-relation.h (value_relation::set_relation): Allow
42303 equality between op1 and op2 if they are the same.
42305 2023-03-21 Richard Biener <rguenther@suse.de>
42307 PR tree-optimization/109219
42308 * tree-vect-loop.cc (vectorizable_reduction): Check
42309 slp_node, not STMT_SLP_TYPE.
42310 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
42311 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
42312 Remove assertion on STMT_SLP_TYPE.
42314 2023-03-21 Jakub Jelinek <jakub@redhat.com>
42316 PR tree-optimization/109215
42317 * tree.h (enum special_array_member): Adjust comments for int_0
42319 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
42320 has zero sized element type and the array has variable number of
42321 elements or constant one or more elements.
42322 (component_ref_size): Adjust comments, formatting fix.
42324 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
42326 * configure.ac: Add check for the Texinfo 6.8
42327 CONTENTS_OUTPUT_LOCATION customization variable and set it if
42329 * configure: Regenerate.
42330 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
42331 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
42332 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
42333 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
42335 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
42337 * doc/extend.texi: Associate use_hazard_barrier_return index
42338 entry with its attribute.
42339 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
42342 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
42344 * doc/implement-c.texi: Remove usage of @gol.
42345 * doc/invoke.texi: Ditto.
42346 * doc/sourcebuild.texi: Ditto.
42347 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
42348 texinfo.tex versions, the bug it was working around appears to
42351 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
42353 * doc/include/texinfo.tex: Update to 2023-01-17.19.
42355 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
42357 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
42358 @enddefbuiltin for defining built-in functions.
42359 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
42360 places where it should be used.
42362 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
42364 * doc/extend.texi (Formatted Output Function Checking): New
42365 subsection for grouping together printf et al.
42366 (Exception handling) Fix missing @ sign before copyright
42367 header, which lead to the copyright line leaking into
42368 '(gcc)Exception handling'.
42369 * doc/gcc.texi: Set document language to en_US.
42370 (@copying): Wrap front cover texts in quotations, move in manual
42373 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
42375 * doc/gcc.texi: Add the Indices appendix, to make texinfo
42376 generate nice indices overview page.
42378 2023-03-21 Richard Biener <rguenther@suse.de>
42380 PR tree-optimization/109170
42381 * gimple-range-op.cc (cfn_pass_through_arg1): New.
42382 (gimple_range_op_handler::maybe_builtin_call): Handle
42383 __builtin_expect via cfn_pass_through_arg1.
42385 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
42388 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
42389 (init_float128_ieee): Delete code to switch complex multiply and divide
42391 (complex_multiply_builtin_code): New helper function.
42392 (complex_divide_builtin_code): Likewise.
42393 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
42394 of complex 128-bit multiply and divide built-in functions.
42396 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
42399 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
42401 2023-03-19 Jonny Grant <jg@jguk.org>
42403 * doc/extend.texi (Common Function Attributes) <nonnull>:
42406 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
42408 PR rtl-optimization/109179
42409 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
42410 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
42412 2023-03-17 Jakub Jelinek <jakub@redhat.com>
42415 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
42417 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
42418 to allocate_struct_function instead of false.
42419 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
42420 nor DECL_RESULT here. Pass true as ABSTRACT_P to
42421 push_struct_function. Call targetm.target_option.relayout_function
42423 (tree_function_versioning): Formatting fix.
42425 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
42427 * lra-constraints.cc: Include hooks.h.
42428 (combine_reload_insn): New function.
42429 (lra_constraints): Call it.
42431 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42432 kito-cheng <kito.cheng@sifive.com>
42434 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
42435 as legitimate value.
42436 * config/riscv/riscv-vector-builtins.cc
42437 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
42438 (function_expander::use_widen_ternop_insn): Ditto.
42439 * config/riscv/vector.md (@vundefined<mode>): New pattern.
42440 (pred_mul_<optab><mode>_undef_merge): Remove.
42441 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
42442 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
42443 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
42444 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
42446 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42449 * config/riscv/riscv.md: Fix subreg bug.
42451 2023-03-17 Jakub Jelinek <jakub@redhat.com>
42453 PR middle-end/108685
42454 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
42455 use its loop_father rather than BODY_BB's loop_father.
42456 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
42457 If broken_loop with ordered > collapse and at least one of those
42458 extra loops aren't guaranteed to have at least one iteration, change
42459 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
42460 loop_father to l0_bb's loop_father rather than l1_bb's.
42462 2023-03-17 Jakub Jelinek <jakub@redhat.com>
42465 * gdbhooks.py (TreePrinter.to_string): Wrap
42466 gdb.parse_and_eval('tree_code_type') in a try block, parse
42467 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
42468 raises exception. Update comments for the recent tree_code_type
42471 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
42473 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
42474 issues. Add more line breaks to example so it doesn't overflow
42477 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
42479 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
42480 line breaks in examples.
42481 <malloc>: Fix bad line breaks in running text, also copy-edit
42483 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
42484 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
42486 (C++ Dialect Options) <-fcontracts>: Add line break in example.
42487 <-Wctad-maybe-unsupported>: Likewise.
42488 <-Winvalid-constexpr>: Likewise.
42489 (Warning Options) <-Wdangling-pointer>: Likewise.
42490 <-Winterference-size>: Likewise.
42491 <-Wvla-parameter>: Likewise.
42492 (Static Analyzer Options): Fix bad line breaks in running text,
42493 plus add some missing markup.
42494 (Optimize Options) <openacc-privatization>: Fix more bad line
42495 breaks in running text.
42497 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
42499 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
42500 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
42501 (expand_vec_perm_2perm_pblendv): Ditto.
42503 2023-03-16 Martin Liska <mliska@suse.cz>
42505 PR middle-end/106133
42506 * gcc.cc (driver_handle_option): Use x_main_input_basename
42507 if x_dump_base_name is null.
42508 * opts.cc (common_handle_option): Likewise.
42510 2023-03-16 Richard Biener <rguenther@suse.de>
42512 PR tree-optimization/109123
42513 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
42514 Do not emit -Wuse-after-free late.
42515 (pass_waccess::check_call): Always check call pointer uses.
42517 2023-03-16 Richard Biener <rguenther@suse.de>
42519 PR tree-optimization/109141
42520 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
42521 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
42523 (renumber_gimple_stmt_uids): ... here and
42524 (renumber_gimple_stmt_uids_in_blocks): ... here.
42525 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
42526 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
42528 (pass_waccess::check_pointer_uses): Process all PHIs.
42530 2023-03-15 David Malcolm <dmalcolm@redhat.com>
42533 * diagnostic-format-sarif.cc (class sarif_invocation): New.
42534 (class sarif_ice_notification): New.
42535 (sarif_builder::m_invocation_obj): New field.
42536 (sarif_invocation::add_notification_for_ice): New.
42537 (sarif_invocation::prepare_to_flush): New.
42538 (sarif_ice_notification::sarif_ice_notification): New.
42539 (sarif_builder::sarif_builder): Add m_invocation_obj.
42540 (sarif_builder::end_diagnostic): Special-case DK_ICE and
42542 (sarif_builder::flush_to_file): Call prepare_to_flush on
42543 m_invocation_obj. Pass the latter to make_top_level_object.
42544 (sarif_builder::make_result_object): Move creation of "locations"
42546 (sarif_builder::make_locations_arr): ...this new function.
42547 (sarif_builder::make_top_level_object): Add "invocation_obj" param
42548 and pass it to make_run_object.
42549 (sarif_builder::make_run_object): Add "invocation_obj" param and
42551 (sarif_ice_handler): New callback.
42552 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
42553 * diagnostic.cc (diagnostic_initialize): Initialize new field
42555 (diagnostic_action_after_output): If it is set, make one attempt
42556 to call ice_handler_cb.
42557 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
42559 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
42561 * config/i386/i386-expand.cc (expand_vec_perm_blend):
42562 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
42563 and fix V2HImode handling.
42564 (expand_vec_perm_1): Try to emit BLEND instruction
42565 before MOVSS/MOVSD.
42566 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
42568 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
42570 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
42572 2023-03-15 Richard Biener <rguenther@suse.de>
42574 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
42575 Do not diagnose clobbers.
42577 2023-03-15 Richard Biener <rguenther@suse.de>
42579 PR tree-optimization/109139
42580 * tree-ssa-live.cc (remove_unused_locals): Look at the
42581 base address for unused decls on the LHS of .DEFERRED_INIT.
42583 2023-03-15 Xi Ruoyao <xry111@xry111.site>
42586 * builtins.cc (inline_string_cmp): Force the character
42587 difference into "result" pseudo-register, instead of reassign
42588 the pseudo-register.
42590 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42592 * config.gcc: Add thead.o to RISC-V extra_objs.
42593 * config/riscv/peephole.md: Add mempair peephole passes.
42594 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
42596 (th_mempair_operands_p): Likewise.
42597 (th_mempair_order_operands): Likewise.
42598 (th_mempair_prepare_save_restore_operands): Likewise.
42599 (th_mempair_save_restore_regs): Likewise.
42600 (th_mempair_output_move): Likewise.
42601 * config/riscv/riscv.cc (riscv_save_reg): Move code.
42602 (riscv_restore_reg): Move code.
42603 (riscv_for_each_saved_reg): Add code to emit mempair insns.
42604 * config/riscv/t-riscv: Add thead.cc.
42605 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
42607 (*th_mempair_store_<GPR:mode>2): Likewise.
42608 (*th_mempair_load_extendsidi2): Likewise.
42609 (*th_mempair_load_zero_extendsidi2): Likewise.
42610 * config/riscv/thead.cc: New file.
42612 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42614 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
42615 New constraint "th_f_fmv".
42616 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
42618 * config/riscv/riscv.cc (riscv_split_doubleword_move):
42619 Add split code for XTheadFmv.
42620 (riscv_secondary_memory_needed): XTheadFmv does not need
42622 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
42623 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
42624 movdf_hardfloat_rv32.
42625 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
42626 (th_fmv_x_w): New INSN.
42627 (th_fmv_x_hw): New INSN.
42629 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42631 * config/riscv/riscv.md (maddhisi4): New expand.
42632 (msubhisi4): New expand.
42633 * config/riscv/thead.md (*th_mula<mode>): New pattern.
42634 (*th_mulawsi): New pattern.
42635 (*th_mulawsi2): New pattern.
42636 (*th_maddhisi4): New pattern.
42637 (*th_sextw_maddhisi4): New pattern.
42638 (*th_muls<mode>): New pattern.
42639 (*th_mulswsi): New pattern.
42640 (*th_mulswsi2): New pattern.
42641 (*th_msubhisi4): New pattern.
42642 (*th_sextw_msubhisi4): New pattern.
42644 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42646 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
42647 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
42649 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
42651 (riscv_expand_conditional_move): New function.
42652 (riscv_expand_conditional_move_onesided): New function.
42653 * config/riscv/riscv.md: Add support for XTheadCondMov.
42654 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
42655 support for XTheadCondMov.
42656 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
42658 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42660 * config/riscv/bitmanip.md (clzdi2): New expand.
42661 (clzsi2): New expand.
42662 (ctz<mode>2): New expand.
42663 (popcount<mode>2): New expand.
42664 (<bitmanip_optab>si2): Rename INSN.
42665 (*<bitmanip_optab>si2): Hide INSN name.
42666 (<bitmanip_optab>di2): Rename INSN.
42667 (*<bitmanip_optab>di2): Hide INSN name.
42668 (rotrsi3): Remove INSN.
42669 (rotr<mode>3): Add expand.
42670 (*rotrsi3): New INSN.
42671 (rotrdi3): Rename INSN.
42672 (*rotrdi3): Hide INSN name.
42673 (rotrsi3_sext): Rename INSN.
42674 (*rotrsi3_sext): Hide INSN name.
42675 (bswap<mode>2): Remove INSN.
42676 (bswapdi2): Add expand.
42677 (bswapsi2): Add expand.
42678 (*bswap<mode>2): Hide INSN name.
42679 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
42681 * config/riscv/riscv.md (extv<mode>): New expand.
42682 (extzv<mode>): New expand.
42683 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
42684 (*th_ext<mode>): New INSN.
42685 (*th_extu<mode>): New INSN.
42686 (*th_clz<mode>2): New INSN.
42687 (*th_rev<mode>2): New INSN.
42689 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42691 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
42692 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
42694 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42696 * config/riscv/riscv.md: Include thead.md
42697 * config/riscv/thead.md: New file.
42699 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42701 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
42703 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
42705 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
42706 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
42707 (MASK_XTHEADBB): New.
42708 (MASK_XTHEADBS): New.
42709 (MASK_XTHEADCMO): New.
42710 (MASK_XTHEADCONDMOV): New.
42711 (MASK_XTHEADFMEMIDX): New.
42712 (MASK_XTHEADFMV): New.
42713 (MASK_XTHEADINT): New.
42714 (MASK_XTHEADMAC): New.
42715 (MASK_XTHEADMEMIDX): New.
42716 (MASK_XTHEADMEMPAIR): New.
42717 (MASK_XTHEADSYNC): New.
42718 (TARGET_XTHEADBA): New.
42719 (TARGET_XTHEADBB): New.
42720 (TARGET_XTHEADBS): New.
42721 (TARGET_XTHEADCMO): New.
42722 (TARGET_XTHEADCONDMOV): New.
42723 (TARGET_XTHEADFMEMIDX): New.
42724 (TARGET_XTHEADFMV): New.
42725 (TARGET_XTHEADINT): New.
42726 (TARGET_XTHEADMAC): New.
42727 (TARGET_XTHEADMEMIDX): New.
42728 (TARGET_XTHEADMEMPAIR): new.
42729 (TARGET_XTHEADSYNC): New.
42730 * config/riscv/riscv.opt: Add riscv_xthead_subext.
42732 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
42735 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
42736 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
42737 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
42739 2023-03-14 Jakub Jelinek <jakub@redhat.com>
42742 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
42743 when lo is equal to dhi and hi is a MEM which uses dlo register.
42745 2023-03-14 Martin Jambor <mjambor@suse.cz>
42748 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
42749 global0 instead of zeroing when it does not have as many counts as
42752 2023-03-14 Martin Jambor <mjambor@suse.cz>
42755 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
42756 ipa count, remove assert, lenient_count_portion_handling, dump
42757 also orig_node_count.
42759 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
42761 * config/i386/i386-expand.cc (expand_vec_perm_movs):
42762 Handle V2SImode for TARGET_MMX_WITH_SSE.
42763 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
42764 using V2FI mode iterator to handle both V2SI and V2SF modes.
42766 2023-03-14 Sam James <sam@gentoo.org>
42768 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
42769 including <sstream> earlier.
42770 * system.h: Add INCLUDE_SSTREAM.
42772 2023-03-14 Richard Biener <rguenther@suse.de>
42774 * tree-ssa-live.cc (remove_unused_locals): Do not treat
42775 the .DEFERRED_INIT of a variable as use, instead remove
42776 that if it is the only use.
42778 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
42780 PR rtl-optimization/107762
42781 * expr.cc (emit_group_store): Revert latest change.
42783 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
42785 PR tree-optimization/109005
42786 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
42787 aggregate type check.
42789 2023-03-14 Jakub Jelinek <jakub@redhat.com>
42791 PR tree-optimization/109115
42792 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
42793 r.upper_bound () on r.undefined_p () range.
42795 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
42797 PR tree-optimization/106896
42798 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
42799 implementatoin with probability_in; avoid some asserts.
42801 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
42803 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
42805 2023-03-13 Sean Bright <sean@seanbright.com>
42807 * doc/invoke.texi (Warning Options): Remove errant 'See'
42810 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
42812 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
42813 REG_OK_FOR_BASE_P): Remove.
42815 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42817 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
42818 (=vd,vd,vr,vr): Ditto.
42819 * config/riscv/vector.md: Ditto.
42821 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42823 * config/riscv/riscv-vector-builtins.cc
42824 (function_expander::use_compare_insn): Add operand predicate check.
42826 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42828 * config/riscv/vector.md: Fine tune RA constraints.
42830 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
42832 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
42833 hsaco assemble/link.
42835 2023-03-13 Richard Biener <rguenther@suse.de>
42837 PR tree-optimization/109046
42838 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
42839 piecewise complex loads.
42841 2023-03-12 Jakub Jelinek <jakub@redhat.com>
42843 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
42844 (aarch64_bf16_ptr_type_node): Adjust comment.
42845 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
42846 bfloat16_type_node rather than aarch64_bf16_type_node.
42847 (aarch64_libgcc_floating_mode_supported_p,
42848 aarch64_scalar_mode_supported_p): Also support BFmode.
42849 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
42850 (aarch64_invalid_binary_op): Remove BFmode related rejections.
42851 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
42852 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
42853 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
42854 aarch64_bf16_type_node.
42855 (aarch64_init_simd_builtin_types): Likewise.
42856 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
42857 which is created in tree.cc already.
42858 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
42860 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
42862 PR middle-end/109031
42863 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
42864 ensure that the type of x is as wide or wider than the type of a.
42866 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42869 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
42870 (*bitmask_shift_plus<mode>): New.
42871 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
42872 (@aarch64_bitmask_udiv<mode>3): Remove.
42873 * config/aarch64/aarch64.cc
42874 (aarch64_vectorize_can_special_div_by_constant,
42875 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
42876 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
42877 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
42879 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42882 * target.def (preferred_div_as_shifts_over_mult): New.
42883 * doc/tm.texi.in: Document it.
42884 * doc/tm.texi: Regenerate.
42885 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
42886 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
42887 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
42889 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42890 Richard Sandiford <richard.sandiford@arm.com>
42893 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
42896 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42897 Andrew MacLeod <amacleod@redhat.com>
42900 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
42901 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
42903 (gimple_range_op_handler::maybe_non_standard): New.
42904 * range-op.cc (class operator_widen_plus_signed,
42905 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
42906 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
42907 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
42908 operator_widen_mult_unsigned::wi_fold,
42909 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
42910 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
42911 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
42912 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
42914 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42917 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
42918 * doc/tm.texi.in: Likewise.
42919 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
42920 * expmed.cc (expand_divmod): Likewise.
42921 * expmed.h (expand_divmod): Likewise.
42922 * expr.cc (force_operand, expand_expr_divmod): Likewise.
42923 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
42924 * target.def (can_special_div_by_const): Remove.
42925 * target.h: Remove tree-core.h include
42926 * targhooks.cc (default_can_special_div_by_const): Remove.
42927 * targhooks.h (default_can_special_div_by_const): Remove.
42928 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
42929 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
42930 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
42932 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
42934 * doc/install.texi2html: Fix issue number typo in comment.
42936 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
42938 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
42941 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
42943 * doc/invoke.texi (Optimize Options): Add markup to
42944 description of asan-kernel-mem-intrinsic-prefix, and clarify
42947 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
42949 * doc/extend.texi (Named Address Spaces): Drop a redundant link
42952 2023-03-11 Jeff Law <jlaw@ventanamicro>
42955 * doc/extend.texi: Clarify Attribute Syntax a bit.
42957 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
42959 * doc/install.texi (Prerequisites): Suggest using newer versions
42961 (Final install): Clean up and modernize discussion of how to
42962 build or obtain the GCC manuals.
42963 * doc/install.texi2html: Update comment to point to the PR instead
42964 of "makeinfo 4.7 brokenness" (it's not specific to that version).
42966 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42969 * optabs.cc (expand_fix): For conversions from BFmode to integral,
42970 use shifts to convert it to SFmode first and then convert SFmode
42973 2023-03-10 Andrew Pinski <apinski@marvell.com>
42975 * config/aarch64/aarch64.md: Add a new define_split
42978 2023-03-10 Richard Biener <rguenther@suse.de>
42980 * tree-ssa-structalias.cc (solve_graph): Immediately
42981 iterate self-cycles.
42983 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42985 PR tree-optimization/109008
42986 * range-op-float.cc (float_widen_lhs_range): If not
42987 -frounding-math and not IBM double double format, extend lhs
42988 range just by 0.5ulp rather than 1ulp in each direction.
42990 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42993 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
42995 * config/i386/t-cygwin-w64: Remove.
42997 2023-03-10 Jakub Jelinek <jakub@redhat.com>
43000 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
43001 C++14, don't declare as extern const arrays.
43002 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
43003 static constexpr member arrays for C++11 or C++14.
43004 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
43005 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
43006 (TREE_CODE_LENGTH): For C++11 or C++14 use
43007 tree_code_length_tmpl <0>::tree_code_length instead of
43009 * tree.cc (tree_code_type, tree_code_length): Remove.
43011 2023-03-10 Jakub Jelinek <jakub@redhat.com>
43014 * common.opt (fcanon-prefix-map): New option.
43015 * opts.cc: Include file-prefix-map.h.
43016 (flag_canon_prefix_map): New variable.
43017 (common_handle_option): Handle OPT_fcanon_prefix_map.
43018 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
43019 * file-prefix-map.h (flag_canon_prefix_map): Declare.
43020 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
43022 (add_prefix_map): Initialize canonicalize member from
43023 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
43024 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
43025 use lrealpath result only for map->canonicalize map entries.
43026 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
43027 * opts-global.cc (handle_common_deferred_options): Clear
43028 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
43029 * doc/invoke.texi (-fcanon-prefix-map): Document.
43030 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
43031 see also for -fcanon-prefix-map.
43032 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
43034 2023-03-10 Jakub Jelinek <jakub@redhat.com>
43037 * cgraphunit.cc (check_global_declaration): Don't warn for unused
43038 variables which have OPT_Wunused_variable warning suppressed.
43040 2023-03-10 Jakub Jelinek <jakub@redhat.com>
43042 PR tree-optimization/109008
43043 * range-op-float.cc (float_widen_lhs_range): If lb is
43044 minimum representable finite number or ub is maximum
43045 representable finite number, instead of widening it to
43046 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
43047 Temporarily clear flag_finite_math_only when canonicalizing
43050 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43052 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
43053 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
43054 (gimple_fold_builtin): Ditto.
43055 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
43056 (class vleff): Ditto.
43058 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43059 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
43061 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
43062 (struct fault_load_def): Ditto.
43064 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43065 * config/riscv/riscv-vector-builtins.cc
43066 (rvv_arg_type_info::get_tree_type): Add size_ptr.
43067 (gimple_folder::gimple_folder): New class.
43068 (gimple_folder::fold): Ditto.
43069 (gimple_fold_builtin): New function.
43070 (get_read_vl_instance): Ditto.
43071 (get_read_vl_decl): Ditto.
43072 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
43073 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
43074 (get_read_vl_instance): New function.
43075 (get_read_vl_decl): Ditto.
43076 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
43077 (read_vl_insn_p): Ditto.
43078 (available_occurrence_p): Ditto.
43079 (backward_propagate_worthwhile_p): Ditto.
43080 (gen_vsetvl_pat): Adapt for vleff support.
43081 (get_forward_read_vl_insn): New function.
43082 (get_backward_fault_first_load_insn): Ditto.
43083 (source_equal_p): Adapt for vleff support.
43084 (first_ratio_invalid_for_second_sew_p): Remove.
43085 (first_ratio_invalid_for_second_lmul_p): Ditto.
43086 (first_lmul_less_than_second_lmul_p): Ditto.
43087 (first_ratio_less_than_second_ratio_p): Ditto.
43088 (support_relaxed_compatible_p): New function.
43089 (vector_insn_info::operator>): Remove.
43090 (vector_insn_info::operator>=): Refine.
43091 (vector_insn_info::parse_insn): Adapt for vleff support.
43092 (vector_insn_info::compatible_p): Ditto.
43093 (vector_insn_info::update_fault_first_load_avl): New function.
43094 (pass_vsetvl::transfer_after): Adapt for vleff support.
43095 (pass_vsetvl::demand_fusion): Ditto.
43096 (pass_vsetvl::cleanup_insns): Ditto.
43097 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
43098 redundant condtions.
43099 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
43100 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
43101 * config/riscv/riscv.md: Adapt for vleff support.
43102 * config/riscv/t-riscv: Ditto.
43103 * config/riscv/vector-iterators.md: New iterator.
43104 * config/riscv/vector.md (read_vlsi): New pattern.
43105 (read_vldi_zero_extend): Ditto.
43106 (@pred_fault_load<mode>): Ditto.
43108 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43110 * config/riscv/riscv-vector-builtins.cc
43111 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
43112 (function_expander::use_widen_ternop_insn): Ditto.
43113 * optabs.cc (maybe_gen_insn): Extend nops handling.
43115 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43117 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
43118 patterns according to RVV ISA.
43119 * config/riscv/vector-iterators.md: New iterators.
43120 * config/riscv/vector.md
43121 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
43122 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
43123 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
43124 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
43125 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
43126 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
43127 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
43128 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
43129 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
43130 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
43131 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
43132 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
43133 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
43134 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
43136 2023-03-10 Michael Collison <collison@rivosinc.com>
43138 * tree-vect-loop-manip.cc (vect_do_peeling): Use
43139 result of constant_lower_bound instead of vf for the lower
43140 bound of the epilog loop trip count.
43142 2023-03-09 Tamar Christina <tamar.christina@arm.com>
43144 * passes.cc (emergency_dump_function): Finish graph generation.
43146 2023-03-09 Tamar Christina <tamar.christina@arm.com>
43148 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
43149 and bottom bit only.
43151 2023-03-09 Andrew Pinski <apinski@marvell.com>
43153 PR tree-optimization/108980
43154 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
43155 Reorgnize the call to warning for not strict flexible arrays
43156 to be before the check of warned.
43158 2023-03-09 Jason Merrill <jason@redhat.com>
43160 * doc/extend.texi: Comment out __is_deducible docs.
43162 2023-03-09 Jason Merrill <jason@redhat.com>
43165 * doc/extend.texi (Type Traits):: Document __is_deducible.
43167 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
43170 * config.host: add object for x86_64-*-mingw*.
43171 * config/i386/sym-mingw32.cc: dummy file to attach
43173 * config/i386/utf8-mingw32.rc: windres resource file.
43174 * config/i386/winnt-utf8.manifest: XML manifest to
43176 * config/i386/x-mingw32: reference to x-mingw32-utf8.
43177 * config/i386/x-mingw32-utf8: Makefile fragment to
43178 embed UTF-8 manifest.
43180 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
43182 * lra-constraints.cc (process_alt_operands): Use operand modes for
43183 clobbered regs instead of the biggest access mode.
43185 2023-03-09 Richard Biener <rguenther@suse.de>
43187 PR middle-end/108995
43188 * fold-const.cc (extract_muldiv_1): Avoid folding
43189 (CST * b) / CST2 when sanitizing overflow and we rely on
43190 overflow being undefined.
43192 2023-03-09 Jakub Jelinek <jakub@redhat.com>
43193 Richard Biener <rguenther@suse.de>
43195 PR tree-optimization/109008
43196 * range-op-float.cc (float_widen_lhs_range): New function.
43197 (foperator_plus::op1_range, foperator_minus::op1_range,
43198 foperator_minus::op2_range, foperator_mult::op1_range,
43199 foperator_div::op1_range, foperator_div::op2_range): Use it.
43201 2023-03-07 Jonathan Grant <jg@jguk.org>
43204 * doc/invoke.texi (Instrumentation Options): Clarify
43205 LeakSanitizer behavior.
43207 2023-03-07 Benson Muite <benson_muite@emailplus.org>
43209 * doc/install.texi (Prerequisites): Add link to gmplib.org.
43211 2023-03-07 Pan Li <pan2.li@intel.com>
43212 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43216 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
43218 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
43219 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
43220 * genmodes.cc (adj_precision): New.
43221 (ADJUST_PRECISION): New.
43222 (emit_mode_adjustments): Handle ADJUST_PRECISION.
43224 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
43226 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
43228 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
43230 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
43231 {s|u}{max|min} in QI, HI and DI modes.
43232 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
43233 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
43234 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
43235 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
43238 2023-03-06 Richard Biener <rguenther@suse.de>
43240 PR tree-optimization/109025
43241 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
43242 the inner LC PHI use is the inner loop PHI latch definition
43243 before classifying an outer PHI as double reduction.
43245 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
43248 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
43250 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
43251 (X86_TUNE_USE_SCATTER): Likewise.
43253 2023-03-06 Xi Ruoyao <xry111@xry111.site>
43256 * config/loongarch/loongarch.h (FP_RETURN): Use
43257 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
43258 (UNITS_PER_FP_ARG): Likewise.
43260 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43262 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
43263 (pass_vsetvl::backward_demand_fusion): Ditto.
43265 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
43266 SiYu Wu <siyu@isrc.iscas.ac.cn>
43268 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
43270 (riscv_sm3p1_<mode>): New.
43271 (riscv_sm4ed_<mode>): New.
43272 (riscv_sm4ks_<mode>): New.
43273 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
43274 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
43275 ZKSH's built-in functions.
43277 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
43278 SiYu Wu <siyu@isrc.iscas.ac.cn>
43280 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
43281 (riscv_sha256sig1_<mode>): New.
43282 (riscv_sha256sum0_<mode>): New.
43283 (riscv_sha256sum1_<mode>): New.
43284 (riscv_sha512sig0h): New.
43285 (riscv_sha512sig0l): New.
43286 (riscv_sha512sig1h): New.
43287 (riscv_sha512sig1l): New.
43288 (riscv_sha512sum0r): New.
43289 (riscv_sha512sum1r): New.
43290 (riscv_sha512sig0): New.
43291 (riscv_sha512sig1): New.
43292 (riscv_sha512sum0): New.
43293 (riscv_sha512sum1): New.
43294 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
43295 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
43296 built-in functions.
43297 (DIRECT_BUILTIN): Add new.
43299 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
43300 SiYu Wu <siyu@isrc.iscas.ac.cn>
43302 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
43304 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
43305 (riscv_aes32dsmi): New.
43306 (riscv_aes64ds): New.
43307 (riscv_aes64dsm): New.
43308 (riscv_aes64im): New.
43309 (riscv_aes64ks1i): New.
43310 (riscv_aes64ks2): New.
43311 (riscv_aes32esi): New.
43312 (riscv_aes32esmi): New.
43313 (riscv_aes64es): New.
43314 (riscv_aes64esm): New.
43315 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
43316 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
43317 ZKNE's built-in functions.
43319 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
43320 SiYu Wu <siyu@isrc.iscas.ac.cn>
43322 * config/riscv/bitmanip.md: Add ZBKB's instructions.
43323 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
43324 * config/riscv/riscv.md: Add new type for crypto instructions.
43325 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
43327 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
43328 extension's built-in function file.
43330 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
43331 SiYu Wu <siyu@isrc.iscas.ac.cn>
43333 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
43334 (RISCV_FTYPE_NAME3): New.
43335 (RISCV_ATYPE_QI): New.
43336 (RISCV_ATYPE_HI): New.
43337 (RISCV_FTYPE_ATYPES2): New.
43338 (RISCV_FTYPE_ATYPES3): New.
43339 * config/riscv/riscv-ftypes.def (2): New.
43342 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
43344 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
43347 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43348 kito-cheng <kito.cheng@sifive.com>
43350 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
43351 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
43352 (riscv_register_pragmas): Add builtin function check call.
43353 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
43354 (check_builtin_call): New function.
43355 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
43356 (class vreinterpret): Ditto.
43357 (class vlmul_ext): Ditto.
43358 (class vlmul_trunc): Ditto.
43359 (class vset): Ditto.
43360 (class vget): Ditto.
43362 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43363 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
43379 (vundefined): Add new intrinsic.
43380 (vreinterpret): Ditto.
43381 (vlmul_ext): Ditto.
43382 (vlmul_trunc): Ditto.
43385 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
43386 (struct narrow_alu_def): Ditto.
43387 (struct reduc_alu_def): Ditto.
43388 (struct vundefined_def): Ditto.
43389 (struct misc_def): Ditto.
43390 (struct vset_def): Ditto.
43391 (struct vget_def): Ditto.
43393 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43394 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
43395 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
43396 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
43397 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
43398 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
43399 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
43400 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
43401 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
43402 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
43403 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
43404 (DEF_RVV_LMUL1_OPS): Ditto.
43405 (DEF_RVV_LMUL2_OPS): Ditto.
43406 (DEF_RVV_LMUL4_OPS): Ditto.
43407 (vint16mf4_t): Ditto.
43408 (vint16mf2_t): Ditto.
43409 (vint16m1_t): Ditto.
43410 (vint16m2_t): Ditto.
43411 (vint16m4_t): Ditto.
43412 (vint16m8_t): Ditto.
43413 (vint32mf2_t): Ditto.
43414 (vint32m1_t): Ditto.
43415 (vint32m2_t): Ditto.
43416 (vint32m4_t): Ditto.
43417 (vint32m8_t): Ditto.
43418 (vint64m1_t): Ditto.
43419 (vint64m2_t): Ditto.
43420 (vint64m4_t): Ditto.
43421 (vint64m8_t): Ditto.
43422 (vuint16mf4_t): Ditto.
43423 (vuint16mf2_t): Ditto.
43424 (vuint16m1_t): Ditto.
43425 (vuint16m2_t): Ditto.
43426 (vuint16m4_t): Ditto.
43427 (vuint16m8_t): Ditto.
43428 (vuint32mf2_t): Ditto.
43429 (vuint32m1_t): Ditto.
43430 (vuint32m2_t): Ditto.
43431 (vuint32m4_t): Ditto.
43432 (vuint32m8_t): Ditto.
43433 (vuint64m1_t): Ditto.
43434 (vuint64m2_t): Ditto.
43435 (vuint64m4_t): Ditto.
43436 (vuint64m8_t): Ditto.
43437 (vint8mf4_t): Ditto.
43438 (vint8mf2_t): Ditto.
43439 (vint8m1_t): Ditto.
43440 (vint8m2_t): Ditto.
43441 (vint8m4_t): Ditto.
43442 (vint8m8_t): Ditto.
43443 (vuint8mf4_t): Ditto.
43444 (vuint8mf2_t): Ditto.
43445 (vuint8m1_t): Ditto.
43446 (vuint8m2_t): Ditto.
43447 (vuint8m4_t): Ditto.
43448 (vuint8m8_t): Ditto.
43449 (vint8mf8_t): Ditto.
43450 (vuint8mf8_t): Ditto.
43451 (vfloat32mf2_t): Ditto.
43452 (vfloat32m1_t): Ditto.
43453 (vfloat32m2_t): Ditto.
43454 (vfloat32m4_t): Ditto.
43455 (vfloat64m1_t): Ditto.
43456 (vfloat64m2_t): Ditto.
43457 (vfloat64m4_t): Ditto.
43458 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
43459 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
43460 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
43461 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
43462 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
43463 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
43464 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
43465 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
43466 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
43467 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
43468 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
43469 (DEF_RVV_LMUL1_OPS): Ditto.
43470 (DEF_RVV_LMUL2_OPS): Ditto.
43471 (DEF_RVV_LMUL4_OPS): Ditto.
43472 (DEF_RVV_TYPE_INDEX): Ditto.
43473 (required_extensions_p): Adapt for new intrinsic support/
43474 (get_required_extensions): New function.
43475 (check_required_extensions): Ditto.
43476 (unsigned_base_type_p): Remove.
43477 (rvv_arg_type_info::get_scalar_ptr_type): New function.
43478 (get_mode_for_bitsize): Remove.
43479 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
43480 (rvv_arg_type_info::get_base_vector_type): Ditto.
43481 (rvv_arg_type_info::get_function_type_index): Ditto.
43482 (DEF_RVV_BASE_TYPE): New def.
43483 (function_builder::apply_predication): New class.
43484 (function_expander::mask_mode): Ditto.
43485 (function_checker::function_checker): Ditto.
43486 (function_checker::report_non_ice): Ditto.
43487 (function_checker::report_out_of_range): Ditto.
43488 (function_checker::require_immediate): Ditto.
43489 (function_checker::require_immediate_range): Ditto.
43490 (function_checker::check): Ditto.
43491 (check_builtin_call): Ditto.
43492 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
43493 (DEF_RVV_BASE_TYPE): Ditto.
43494 (DEF_RVV_TYPE_INDEX): Ditto.
43495 (vbool64_t): Ditto.
43496 (vbool32_t): Ditto.
43497 (vbool16_t): Ditto.
43502 (vuint8mf8_t): Ditto.
43503 (vuint8mf4_t): Ditto.
43504 (vuint8mf2_t): Ditto.
43505 (vuint8m1_t): Ditto.
43506 (vuint8m2_t): Ditto.
43507 (vint8m4_t): Ditto.
43508 (vuint8m4_t): Ditto.
43509 (vint8m8_t): Ditto.
43510 (vuint8m8_t): Ditto.
43511 (vint16mf4_t): Ditto.
43512 (vuint16mf2_t): Ditto.
43513 (vuint16m1_t): Ditto.
43514 (vuint16m2_t): Ditto.
43515 (vuint16m4_t): Ditto.
43516 (vuint16m8_t): Ditto.
43517 (vint32mf2_t): Ditto.
43518 (vuint32m1_t): Ditto.
43519 (vuint32m2_t): Ditto.
43520 (vuint32m4_t): Ditto.
43521 (vuint32m8_t): Ditto.
43522 (vuint64m1_t): Ditto.
43523 (vuint64m2_t): Ditto.
43524 (vuint64m4_t): Ditto.
43525 (vuint64m8_t): Ditto.
43526 (vfloat32mf2_t): Ditto.
43527 (vfloat32m1_t): Ditto.
43528 (vfloat32m2_t): Ditto.
43529 (vfloat32m4_t): Ditto.
43530 (vfloat32m8_t): Ditto.
43531 (vfloat64m1_t): Ditto.
43532 (vfloat64m4_t): Ditto.
43533 (vector): Move it def.
43536 (signed_vector): Ditto.
43537 (unsigned_vector): Ditto.
43538 (unsigned_scalar): Ditto.
43539 (vector_ptr): Ditto.
43540 (scalar_ptr): Ditto.
43541 (scalar_const_ptr): Ditto.
43545 (unsigned_long): Ditto.
43547 (eew8_index): Ditto.
43548 (eew16_index): Ditto.
43549 (eew32_index): Ditto.
43550 (eew64_index): Ditto.
43551 (shift_vector): Ditto.
43552 (double_trunc_vector): Ditto.
43553 (quad_trunc_vector): Ditto.
43554 (oct_trunc_vector): Ditto.
43555 (double_trunc_scalar): Ditto.
43556 (double_trunc_signed_vector): Ditto.
43557 (double_trunc_unsigned_vector): Ditto.
43558 (double_trunc_unsigned_scalar): Ditto.
43559 (double_trunc_float_vector): Ditto.
43560 (float_vector): Ditto.
43561 (lmul1_vector): Ditto.
43562 (widen_lmul1_vector): Ditto.
43563 (eew8_interpret): Ditto.
43564 (eew16_interpret): Ditto.
43565 (eew32_interpret): Ditto.
43566 (eew64_interpret): Ditto.
43567 (vlmul_ext_x2): Ditto.
43568 (vlmul_ext_x4): Ditto.
43569 (vlmul_ext_x8): Ditto.
43570 (vlmul_ext_x16): Ditto.
43571 (vlmul_ext_x32): Ditto.
43572 (vlmul_ext_x64): Ditto.
43573 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
43574 (struct function_type_info): New function.
43575 (struct rvv_arg_type_info): Ditto.
43576 (class function_checker): New class.
43577 (rvv_arg_type_info::get_scalar_type): New function.
43578 (rvv_arg_type_info::get_vector_type): Ditto.
43579 (function_expander::ret_mode): New function.
43580 (function_checker::arg_mode): Ditto.
43581 (function_checker::ret_mode): Ditto.
43582 * config/riscv/t-riscv: Add generator.
43583 * config/riscv/vector-iterators.md: New iterators.
43584 * config/riscv/vector.md (vundefined<mode>): New pattern.
43585 (@vundefined<mode>): Ditto.
43586 (@vreinterpret<mode>): Ditto.
43587 (@vlmul_extx2<mode>): Ditto.
43588 (@vlmul_extx4<mode>): Ditto.
43589 (@vlmul_extx8<mode>): Ditto.
43590 (@vlmul_extx16<mode>): Ditto.
43591 (@vlmul_extx32<mode>): Ditto.
43592 (@vlmul_extx64<mode>): Ditto.
43593 (*vlmul_extx2<mode>): Ditto.
43594 (*vlmul_extx4<mode>): Ditto.
43595 (*vlmul_extx8<mode>): Ditto.
43596 (*vlmul_extx16<mode>): Ditto.
43597 (*vlmul_extx32<mode>): Ditto.
43598 (*vlmul_extx64<mode>): Ditto.
43599 * config/riscv/genrvv-type-indexer.cc: New file.
43601 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43603 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
43604 (slide1_sew64_helper): New function.
43605 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
43606 (get_unknown_min_value): Ditto.
43607 (force_vector_length_operand): Ditto.
43608 (gen_no_side_effects_vsetvl_rtx): Ditto.
43609 (get_vl_x2_rtx): Ditto.
43610 (slide1_sew64_helper): Ditto.
43611 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
43612 (class vrgather): Ditto.
43613 (class vrgatherei16): Ditto.
43614 (class vcompress): Ditto.
43616 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43617 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
43618 (vslidedown): Ditto.
43619 (vslide1up): Ditto.
43620 (vslide1down): Ditto.
43621 (vfslide1up): Ditto.
43622 (vfslide1down): Ditto.
43624 (vrgatherei16): Ditto.
43625 (vcompress): Ditto.
43626 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
43627 (vint8mf8_t): Ditto.
43628 (vint8mf4_t): Ditto.
43629 (vint8mf2_t): Ditto.
43630 (vint8m1_t): Ditto.
43631 (vint8m2_t): Ditto.
43632 (vint8m4_t): Ditto.
43633 (vint16mf4_t): Ditto.
43634 (vint16mf2_t): Ditto.
43635 (vint16m1_t): Ditto.
43636 (vint16m2_t): Ditto.
43637 (vint16m4_t): Ditto.
43638 (vint16m8_t): Ditto.
43639 (vint32mf2_t): Ditto.
43640 (vint32m1_t): Ditto.
43641 (vint32m2_t): Ditto.
43642 (vint32m4_t): Ditto.
43643 (vint32m8_t): Ditto.
43644 (vint64m1_t): Ditto.
43645 (vint64m2_t): Ditto.
43646 (vint64m4_t): Ditto.
43647 (vint64m8_t): Ditto.
43648 (vuint8mf8_t): Ditto.
43649 (vuint8mf4_t): Ditto.
43650 (vuint8mf2_t): Ditto.
43651 (vuint8m1_t): Ditto.
43652 (vuint8m2_t): Ditto.
43653 (vuint8m4_t): Ditto.
43654 (vuint16mf4_t): Ditto.
43655 (vuint16mf2_t): Ditto.
43656 (vuint16m1_t): Ditto.
43657 (vuint16m2_t): Ditto.
43658 (vuint16m4_t): Ditto.
43659 (vuint16m8_t): Ditto.
43660 (vuint32mf2_t): Ditto.
43661 (vuint32m1_t): Ditto.
43662 (vuint32m2_t): Ditto.
43663 (vuint32m4_t): Ditto.
43664 (vuint32m8_t): Ditto.
43665 (vuint64m1_t): Ditto.
43666 (vuint64m2_t): Ditto.
43667 (vuint64m4_t): Ditto.
43668 (vuint64m8_t): Ditto.
43669 (vfloat32mf2_t): Ditto.
43670 (vfloat32m1_t): Ditto.
43671 (vfloat32m2_t): Ditto.
43672 (vfloat32m4_t): Ditto.
43673 (vfloat32m8_t): Ditto.
43674 (vfloat64m1_t): Ditto.
43675 (vfloat64m2_t): Ditto.
43676 (vfloat64m4_t): Ditto.
43677 (vfloat64m8_t): Ditto.
43678 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
43679 * config/riscv/riscv.md: Adjust RVV instruction types.
43680 * config/riscv/vector-iterators.md (down): New iterator.
43681 (=vd,vr): New attribute.
43682 (UNSPEC_VSLIDE1UP): New unspec.
43683 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
43684 (*pred_slide<ud><mode>): Ditto.
43685 (*pred_slide<ud><mode>_extended): Ditto.
43686 (@pred_gather<mode>): Ditto.
43687 (@pred_gather<mode>_scalar): Ditto.
43688 (@pred_gatherei16<mode>): Ditto.
43689 (@pred_compress<mode>): Ditto.
43691 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43693 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
43695 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43697 * config/riscv/constraints.md (Wb1): New constraint.
43698 * config/riscv/predicates.md
43699 (vector_least_significant_set_mask_operand): New predicate.
43700 (vector_broadcast_mask_operand): Ditto.
43701 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
43702 (gen_scalar_move_mask): New function.
43703 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
43704 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
43705 (class vmv_s): Ditto.
43707 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43708 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
43712 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
43714 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43715 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
43716 (function_expander::use_exact_insn): New function.
43717 (function_expander::use_contiguous_load_insn): New function.
43718 (function_expander::use_contiguous_store_insn): New function.
43719 (function_expander::use_ternop_insn): New function.
43720 (function_expander::use_widen_ternop_insn): New function.
43721 (function_expander::use_scalar_move_insn): New function.
43722 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
43723 * config/riscv/riscv-vector-builtins.h
43724 (function_expander::add_scalar_move_mask_operand): New class.
43725 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
43726 (scalar_move_insn_p): Ditto.
43727 (has_vsetvl_killed_avl_p): Ditto.
43728 (anticipatable_occurrence_p): Ditto.
43729 (insert_vsetvl): Ditto.
43730 (get_vl_vtype_info): Ditto.
43731 (calculate_sew): Ditto.
43732 (calculate_vlmul): Ditto.
43733 (incompatible_avl_p): Ditto.
43734 (different_sew_p): Ditto.
43735 (different_lmul_p): Ditto.
43736 (different_ratio_p): Ditto.
43737 (different_tail_policy_p): Ditto.
43738 (different_mask_policy_p): Ditto.
43739 (possible_zero_avl_p): Ditto.
43740 (first_ratio_invalid_for_second_sew_p): Ditto.
43741 (first_ratio_invalid_for_second_lmul_p): Ditto.
43742 (second_ratio_invalid_for_first_sew_p): Ditto.
43743 (second_ratio_invalid_for_first_lmul_p): Ditto.
43744 (second_sew_less_than_first_sew_p): Ditto.
43745 (first_sew_less_than_second_sew_p): Ditto.
43746 (compare_lmul): Ditto.
43747 (second_lmul_less_than_first_lmul_p): Ditto.
43748 (first_lmul_less_than_second_lmul_p): Ditto.
43749 (first_ratio_less_than_second_ratio_p): Ditto.
43750 (second_ratio_less_than_first_ratio_p): Ditto.
43751 (DEF_INCOMPATIBLE_COND): Ditto.
43752 (greatest_sew): Ditto.
43753 (first_sew): Ditto.
43754 (second_sew): Ditto.
43755 (first_vlmul): Ditto.
43756 (second_vlmul): Ditto.
43757 (first_ratio): Ditto.
43758 (second_ratio): Ditto.
43759 (vlmul_for_first_sew_second_ratio): Ditto.
43760 (ratio_for_second_sew_first_vlmul): Ditto.
43761 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
43762 (always_unavailable): Ditto.
43763 (avl_unavailable_p): Ditto.
43764 (sew_unavailable_p): Ditto.
43765 (lmul_unavailable_p): Ditto.
43766 (ge_sew_unavailable_p): Ditto.
43767 (ge_sew_lmul_unavailable_p): Ditto.
43768 (ge_sew_ratio_unavailable_p): Ditto.
43769 (DEF_UNAVAILABLE_COND): Ditto.
43770 (same_sew_lmul_demand_p): Ditto.
43771 (propagate_avl_across_demands_p): Ditto.
43772 (reg_available_p): Ditto.
43773 (avl_info::has_non_zero_avl): Ditto.
43774 (vl_vtype_info::has_non_zero_avl): Ditto.
43775 (vector_insn_info::operator>=): Refactor.
43776 (vector_insn_info::parse_insn): Adjust for scalar move.
43777 (vector_insn_info::demand_vl_vtype): Remove.
43778 (vector_insn_info::compatible_p): New function.
43779 (vector_insn_info::compatible_avl_p): Ditto.
43780 (vector_insn_info::compatible_vtype_p): Ditto.
43781 (vector_insn_info::available_p): Ditto.
43782 (vector_insn_info::merge): Ditto.
43783 (vector_insn_info::fuse_avl): Ditto.
43784 (vector_insn_info::fuse_sew_lmul): Ditto.
43785 (vector_insn_info::fuse_tail_policy): Ditto.
43786 (vector_insn_info::fuse_mask_policy): Ditto.
43787 (vector_insn_info::dump): Ditto.
43788 (vector_infos_manager::release): Ditto.
43789 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
43790 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
43791 (pass_vsetvl::hard_empty_block_p): Ditto.
43792 (pass_vsetvl::backward_demand_fusion): Ditto.
43793 (pass_vsetvl::forward_demand_fusion): Ditto.
43794 (pass_vsetvl::refine_vsetvls): Ditto.
43795 (pass_vsetvl::cleanup_vsetvls): Ditto.
43796 (pass_vsetvl::commit_vsetvls): Ditto.
43797 (pass_vsetvl::propagate_avl): Ditto.
43798 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
43799 (struct demands_pair): Ditto.
43800 (struct demands_cond): Ditto.
43801 (struct demands_fuse_rule): Ditto.
43802 * config/riscv/vector-iterators.md: New iterator.
43803 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
43804 (*pred_broadcast<mode>): Ditto.
43805 (*pred_broadcast<mode>_extended_scalar): Ditto.
43806 (@pred_extract_first<mode>): Ditto.
43807 (*pred_extract_first<mode>): Ditto.
43808 (@pred_extract_first_trunc<mode>): Ditto.
43809 * config/riscv/riscv-vsetvl.def: New file.
43811 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
43813 * config/riscv/bitmanip.md: allow 0 constant in max/min
43816 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
43818 * config/riscv/bitmanip.md: Fix wrong index in the check.
43820 2023-03-04 Jakub Jelinek <jakub@redhat.com>
43822 PR middle-end/109006
43823 * vec.cc (test_auto_alias): Adjust comment for removal of
43825 * read-rtl-function.cc (function_reader::parse_block): Likewise.
43826 * gdbhooks.py: Likewise.
43828 2023-03-04 Jakub Jelinek <jakub@redhat.com>
43830 PR testsuite/108973
43831 * selftest-diagnostic.cc
43832 (test_diagnostic_context::test_diagnostic_context): Set
43833 caret_max_width to 80.
43835 2023-03-03 Alexandre Oliva <oliva@adacore.com>
43837 * gimple-ssa-warn-access.cc
43838 (pass_waccess::check_dangling_stores): Skip non-stores.
43840 2023-03-03 Alexandre Oliva <oliva@adacore.com>
43842 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
43843 after vmsr and vmrs, and lower the case of P0.
43845 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
43847 PR middle-end/109006
43848 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
43850 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
43852 PR middle-end/109006
43853 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
43855 2023-03-03 Jakub Jelinek <jakub@redhat.com>
43858 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
43859 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
43860 suppressed on stmt. For [static %E] warning, print access_nelts
43861 rather than access_size. Fix up comment wording.
43863 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
43865 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
43866 arch14 instead of z16.
43868 2023-03-03 Anthony Green <green@moxielogic.com>
43870 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
43872 2023-03-03 Anthony Green <green@moxielogic.com>
43874 * config/moxie/constraints.md (A, B, W): Change
43875 define_constraint to define_memory_constraint.
43877 2023-03-03 Xi Ruoyao <xry111@xry111.site>
43879 * toplev.cc (process_options): Fix the spelling of
43880 "-fstack-clash-protection".
43882 2023-03-03 Richard Biener <rguenther@suse.de>
43884 PR tree-optimization/109002
43885 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
43886 PHI-translate ANTIC_IN.
43888 2023-03-03 Jakub Jelinek <jakub@redhat.com>
43890 PR tree-optimization/108988
43891 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
43892 size_type_node before passing it as argument to fwrite. Formatting
43895 2023-03-03 Richard Biener <rguenther@suse.de>
43898 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
43899 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
43900 * config/i386/i386-features.h (scalar_chain::max_visits): New.
43901 (scalar_chain::build): Add bitmap parameter, return boolean.
43902 (scalar_chain::add_insn): Likewise.
43903 (scalar_chain::analyze_register_chain): Likewise.
43904 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
43905 Initialize max_visits.
43906 (scalar_chain::analyze_register_chain): When we exhaust
43907 max_visits, abort. Also abort when running into any
43909 (scalar_chain::add_insn): Propagate abort.
43910 (scalar_chain::build): Likewise. When aborting amend
43911 the set of disallowed insn with the insns set.
43912 (convert_scalars_to_vector): Adjust. Do not convert aborted
43915 2023-03-03 Richard Biener <rguenther@suse.de>
43918 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
43919 generate a DIE for a function scope static.
43921 2023-03-03 Alexandre Oliva <oliva@adacore.com>
43923 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
43925 2023-03-02 Jakub Jelinek <jakub@redhat.com>
43928 * target.h (emit_support_tinfos_callback): New typedef.
43929 * targhooks.h (default_emit_support_tinfos): Declare.
43930 * targhooks.cc (default_emit_support_tinfos): New function.
43931 * target.def (emit_support_tinfos): New target hook.
43932 * doc/tm.texi.in (emit_support_tinfos): Document it.
43933 * doc/tm.texi: Regenerated.
43934 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
43935 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
43937 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
43939 * ira-costs.cc: Include print-rtl.h.
43940 (record_reg_classes, scan_one_insn): Add code to print debug info.
43941 (record_operand_costs): Find and use smaller cost for hard reg
43944 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
43945 Paul-Antoine Arras <pa@codesourcery.com>
43947 * builtins.cc (mathfn_built_in_explicit): New.
43948 * config/gcn/gcn.cc: Include case-cfn-macros.h.
43949 (mathfn_built_in_explicit): Add prototype.
43950 (gcn_vectorize_builtin_vectorized_function): New.
43951 (gcn_libc_has_function): New.
43952 (TARGET_LIBC_HAS_FUNCTION): Define.
43953 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
43955 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
43957 PR tree-optimization/108979
43958 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
43959 operations on invariants.
43961 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
43963 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
43964 * config/s390/s390.cc (s390_option_override_internal): Make
43965 partial vector usage the default from z13 on.
43966 * config/s390/vector.md (len_load_v16qi): Add.
43967 (len_store_v16qi): Add.
43969 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
43971 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
43972 of constant 0 offset.
43974 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
43976 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
43978 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
43980 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
43982 * config.gcc: add -with-{no-}msa build option.
43983 * config/mips/mips.h: Likewise.
43984 * doc/install.texi: Likewise.
43986 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
43988 PR tree-optimization/108603
43989 * explow.cc (convert_memory_address_addr_space_1): Only wrap
43990 the result of a recursive call in a CONST if no instructions
43993 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
43995 PR tree-optimization/108430
43996 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
43997 of inverted condition.
43999 2023-03-02 Jakub Jelinek <jakub@redhat.com>
44002 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
44003 comparison copy the bytes from ptr to a temporary buffer and clearing
44004 padding bits in there.
44006 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
44008 PR middle-end/108545
44009 * gimplify.cc (struct tree_operand_hash_no_se): New.
44010 (omp_index_mapping_groups_1, omp_index_mapping_groups,
44011 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
44012 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
44013 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
44014 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
44015 of tree_operand_hash.
44017 2023-03-01 LIU Hao <lh_mouse@126.com>
44020 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
44021 Remove the size limit `pch_VA_max_size`
44023 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
44025 PR middle-end/108546
44026 * omp-low.cc (lower_omp_target): Remove optional handling
44027 on the receiver side, i.e. inside target (data), for
44030 2023-03-01 Jakub Jelinek <jakub@redhat.com>
44033 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
44034 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
44036 2023-03-01 Richard Biener <rguenther@suse.de>
44038 PR tree-optimization/108970
44039 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
44040 Check we can copy the BBs.
44041 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
44043 (vect_do_peeling): Streamline error handling.
44045 2023-03-01 Richard Biener <rguenther@suse.de>
44047 PR tree-optimization/108950
44048 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
44049 Check oprnd0 is defined in the loop.
44050 * tree-vect-loop.cc (vectorizable_reduction): Record all
44051 operands vector types, compute that of invariants and
44052 properly update their SLP nodes.
44054 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
44057 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
44058 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
44060 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
44062 PR middle-end/107411
44063 PR middle-end/107411
44064 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
44066 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
44067 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
44069 2023-02-28 Jakub Jelinek <jakub@redhat.com>
44071 PR sanitizer/108894
44072 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
44073 comparison rather than index > bound.
44074 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
44075 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
44076 * doc/invoke.texi (-fsanitize=bounds): Document that whether
44077 flexible array member-like arrays are instrumented or not depends
44078 on -fstrict-flex-arrays* options of strict_flex_array attributes.
44079 (-fsanitize=bounds-strict): Document that flexible array members
44080 are not instrumented.
44082 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
44086 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
44087 (fmod<mode>3): Ditto.
44088 (fpremxf4_i387): Ditto.
44089 (reminderxf3): Ditto.
44090 (reminder<mode>3): Ditto.
44091 (fprem1xf4_i387): Ditto.
44093 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
44095 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
44096 generating FFS with mismatched operand and result modes, by using
44097 an explicit SIGN_EXTEND/ZERO_EXTEND.
44098 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
44099 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
44101 2023-02-27 Patrick Palka <ppalka@redhat.com>
44103 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
44104 * lra-int.h (lra_change_class): Likewise.
44105 * recog.h (which_op_alt): Likewise.
44106 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
44109 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44111 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
44113 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
44115 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
44116 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
44118 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
44120 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
44121 (xtensa_get_config_v3): New functions.
44123 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44125 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
44127 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
44129 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
44130 the macro to 0x1000000000.
44132 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
44135 * doc/gm2.texi (-fm2-pathname): New option documented.
44136 (-fm2-pathnameI): New option documented.
44137 (-fm2-prefix=): New option documented.
44138 (-fruntime-modules=): Update default module list.
44140 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
44143 * config/xtensa/xtensa-protos.h
44144 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
44145 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
44146 to xtensa_expand_call.
44147 (xtensa_expand_call): Emit the call and add a clobber expression
44148 for the static chain to it in case of windowed ABI.
44149 * config/xtensa/xtensa.md (call, call_value, sibcall)
44150 (sibcall_value): Call xtensa_expand_call and complete expansion
44151 right after that call.
44153 2023-02-24 Richard Biener <rguenther@suse.de>
44155 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
44156 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
44157 changing alignment of vec<T, A, vl_embed> and simplifying
44159 (vec<T, A, vl_embed>::address): Compute as this + 1.
44160 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
44161 vector instead of the offset of the m_vecdata member.
44162 (auto_vec<T, N>::m_data): Turn storage into
44163 uninitialized unsigned char.
44164 (auto_vec<T, N>::auto_vec): Allow allocation of one
44165 stack member. Initialize m_vec in a special way to
44166 avoid later stringop overflow diagnostics.
44167 * vec.cc (test_auto_alias): New.
44168 (vec_cc_tests): Call it.
44170 2023-02-24 Richard Biener <rguenther@suse.de>
44172 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
44173 take a const reference to the object, use address to
44175 (vec<T, A, vl_embed>::contains): Use address to access data.
44176 (vec<T, A, vl_embed>::operator[]): Use address instead of
44177 m_vecdata to access data.
44178 (vec<T, A, vl_embed>::iterate): Likewise.
44179 (vec<T, A, vl_embed>::copy): Likewise.
44180 (vec<T, A, vl_embed>::quick_push): Likewise.
44181 (vec<T, A, vl_embed>::pop): Likewise.
44182 (vec<T, A, vl_embed>::quick_insert): Likewise.
44183 (vec<T, A, vl_embed>::ordered_remove): Likewise.
44184 (vec<T, A, vl_embed>::unordered_remove): Likewise.
44185 (vec<T, A, vl_embed>::block_remove): Likewise.
44186 (vec<T, A, vl_heap>::address): Likewise.
44188 2023-02-24 Martin Liska <mliska@suse.cz>
44190 PR sanitizer/108834
44191 * asan.cc (asan_add_global): Use proper TU name for normal
44192 global variables (and aux_base_name for the artificial one).
44194 2023-02-24 Jakub Jelinek <jakub@redhat.com>
44196 * config/i386/i386-builtin.def: Update description of BDESC
44197 and BDESC_FIRST in file comment to include mask2.
44199 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44201 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
44203 2023-02-24 Jakub Jelinek <jakub@redhat.com>
44205 PR middle-end/108854
44206 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
44207 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
44208 nodes and adjust their DECL_CONTEXT.
44210 2023-02-24 Jakub Jelinek <jakub@redhat.com>
44213 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
44214 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
44215 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
44216 __builtin_ia32_cvtne2ps2bf16_v8bf,
44217 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
44218 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
44219 __builtin_ia32_cvtneps2bf16_v8sf_mask,
44220 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
44221 __builtin_ia32_cvtneps2bf16_v4sf_mask,
44222 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
44223 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
44224 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
44225 __builtin_ia32_dpbf16ps_v4sf_mask,
44226 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
44227 OPTION_MASK_ISA_AVX512VL.
44229 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
44231 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
44232 Add non-compact 32-bit multilibs.
44234 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
44236 * config/mips/mips.md (*clo<mode>2): New pattern.
44238 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
44240 * config/mips/mips.h (machine_function): New variable
44241 use_hazard_barrier_return_p.
44242 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
44243 (mips_hb_return_internal): New insn pattern.
44244 * config/mips/mips.cc (mips_attribute_table): Add attribute
44245 use_hazard_barrier_return.
44246 (mips_use_hazard_barrier_return_p): New static function.
44247 (mips_function_attr_inlinable_p): Likewise.
44248 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
44249 Emit error for unsupported architecture choice.
44250 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
44251 Return false for use_hazard_barrier_return.
44252 (mips_expand_epilogue): Emit hazard barrier return.
44253 * doc/extend.texi: Document use_hazard_barrier_return.
44255 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
44257 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
44258 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
44259 for the gcc-internal headers.
44261 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
44263 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
44264 and $(POSTCOMPILE) instead of manual dependency listing.
44265 * config/xtensa/xtensa-dynconfig.c: Rename to ...
44266 * config/xtensa/xtensa-dynconfig.cc: ... this.
44268 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
44270 * doc/cfg.texi: Reorder index entries around @items.
44271 * doc/cpp.texi: Ditto.
44272 * doc/cppenv.texi: Ditto.
44273 * doc/cppopts.texi: Ditto.
44274 * doc/generic.texi: Ditto.
44275 * doc/install.texi: Ditto.
44276 * doc/extend.texi: Ditto.
44277 * doc/invoke.texi: Ditto.
44278 * doc/md.texi: Ditto.
44279 * doc/rtl.texi: Ditto.
44280 * doc/tm.texi.in: Ditto.
44281 * doc/trouble.texi: Ditto.
44282 * doc/tm.texi: Regenerate.
44284 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44286 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
44287 the occurrence of general-purpose register used only once and for
44288 transferring intermediate value.
44290 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44292 * config/xtensa/xtensa.cc (machine_function): Add new member
44293 'eliminated_callee_saved_bmp'.
44294 (xtensa_can_eliminate_callee_saved_reg_p): New function to
44295 determine whether the register can be eliminated or not.
44296 (xtensa_expand_prologue): Add invoking the above function and
44297 elimination the use of callee-saved register by using its stack
44298 slot through the stack pointer (or the frame pointer if needed)
44300 (xtensa_expand_prologue): Modify to not emit register restoration
44301 insn from its stack slot if the register is already eliminated.
44303 2023-02-23 Jakub Jelinek <jakub@redhat.com>
44305 PR translation/108890
44306 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
44307 around fatal_error format strings.
44309 2023-02-23 Richard Biener <rguenther@suse.de>
44311 * tree-ssa-structalias.cc (handle_lhs_call): Do not
44312 re-create rhsc, only truncate it.
44314 2023-02-23 Jakub Jelinek <jakub@redhat.com>
44316 PR middle-end/106258
44317 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
44318 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
44320 2023-02-23 Richard Biener <rguenther@suse.de>
44322 * tree-if-conv.cc (tree_if_conversion): Properly manage
44323 memory of refs and the contained data references.
44325 2023-02-23 Richard Biener <rguenther@suse.de>
44327 PR tree-optimization/108888
44328 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
44329 calls to predicate.
44330 (predicate_statements): Only predicate calls with PLF_2.
44332 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44334 * config/xtensa/xtensa.md
44335 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
44336 Add missing "SI:" to PLUS RTXes.
44338 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
44341 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
44342 Emit (use (reg:SI A0_REG)) at the end in the sibling call
44343 (i.e. the same place as (return) in the normal call).
44345 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
44348 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
44351 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
44353 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
44354 (sibcall_value, sibcall_value_internal): Add 'use' expression
44357 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
44359 * doc/cppdiropts.texi: Reorder @opindex commands to precede
44360 @items they relate to.
44361 * doc/cppopts.texi: Ditto.
44362 * doc/cppwarnopts.texi: Ditto.
44363 * doc/invoke.texi: Ditto.
44364 * doc/lto.texi: Ditto.
44366 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
44368 * internal-fn.cc (expand_MASK_CALL): New.
44369 * internal-fn.def (MASK_CALL): New.
44370 * internal-fn.h (expand_MASK_CALL): New prototype.
44371 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
44372 for mask arguments also.
44373 * tree-if-conv.cc: Include cgraph.h.
44374 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
44375 (predicate_statements): Convert functions to IFN_MASK_CALL.
44376 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
44377 IFN_MASK_CALL as a SIMD function call.
44378 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
44379 IFN_MASK_CALL as an inbranch SIMD function call.
44380 Generate the mask vector arguments.
44382 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44384 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
44385 (class widen_reducop): Ditto.
44386 (class freducop): Ditto.
44387 (class widen_freducop): Ditto.
44389 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44390 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
44399 (vwredsumu): Ditto.
44400 (vfredusum): Ditto.
44401 (vfredosum): Ditto.
44404 (vfwredosum): Ditto.
44405 (vfwredusum): Ditto.
44406 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
44408 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44409 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
44410 (DEF_RVV_WU_OPS): Ditto.
44411 (DEF_RVV_WF_OPS): Ditto.
44412 (vint8mf8_t): Ditto.
44413 (vint8mf4_t): Ditto.
44414 (vint8mf2_t): Ditto.
44415 (vint8m1_t): Ditto.
44416 (vint8m2_t): Ditto.
44417 (vint8m4_t): Ditto.
44418 (vint8m8_t): Ditto.
44419 (vint16mf4_t): Ditto.
44420 (vint16mf2_t): Ditto.
44421 (vint16m1_t): Ditto.
44422 (vint16m2_t): Ditto.
44423 (vint16m4_t): Ditto.
44424 (vint16m8_t): Ditto.
44425 (vint32mf2_t): Ditto.
44426 (vint32m1_t): Ditto.
44427 (vint32m2_t): Ditto.
44428 (vint32m4_t): Ditto.
44429 (vint32m8_t): Ditto.
44430 (vuint8mf8_t): Ditto.
44431 (vuint8mf4_t): Ditto.
44432 (vuint8mf2_t): Ditto.
44433 (vuint8m1_t): Ditto.
44434 (vuint8m2_t): Ditto.
44435 (vuint8m4_t): Ditto.
44436 (vuint8m8_t): Ditto.
44437 (vuint16mf4_t): Ditto.
44438 (vuint16mf2_t): Ditto.
44439 (vuint16m1_t): Ditto.
44440 (vuint16m2_t): Ditto.
44441 (vuint16m4_t): Ditto.
44442 (vuint16m8_t): Ditto.
44443 (vuint32mf2_t): Ditto.
44444 (vuint32m1_t): Ditto.
44445 (vuint32m2_t): Ditto.
44446 (vuint32m4_t): Ditto.
44447 (vuint32m8_t): Ditto.
44448 (vfloat32mf2_t): Ditto.
44449 (vfloat32m1_t): Ditto.
44450 (vfloat32m2_t): Ditto.
44451 (vfloat32m4_t): Ditto.
44452 (vfloat32m8_t): Ditto.
44453 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
44454 (DEF_RVV_WU_OPS): Ditto.
44455 (DEF_RVV_WF_OPS): Ditto.
44456 (required_extensions_p): Add reduction support.
44457 (rvv_arg_type_info::get_base_vector_type): Ditto.
44458 (rvv_arg_type_info::get_tree_type): Ditto.
44459 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
44460 * config/riscv/riscv.md: Ditto.
44461 * config/riscv/vector-iterators.md (minu): Ditto.
44462 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
44463 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
44464 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
44465 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
44466 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
44467 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
44468 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
44470 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44472 * config/riscv/iterators.md: New iterator.
44473 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
44474 (enum ternop_type): New enum.
44475 (class vmacc): New class.
44476 (class imac): Ditto.
44477 (class vnmsac): Ditto.
44478 (enum widen_ternop_type): New enum.
44479 (class vmadd): Ditto.
44480 (class vnmsub): Ditto.
44481 (class iwmac): Ditto.
44482 (class vwmacc): Ditto.
44483 (class vwmaccu): Ditto.
44484 (class vwmaccsu): Ditto.
44485 (class vwmaccus): Ditto.
44486 (class reverse_binop): Ditto.
44487 (class vfmacc): Ditto.
44488 (class vfnmsac): Ditto.
44489 (class vfmadd): Ditto.
44490 (class vfnmsub): Ditto.
44491 (class vfnmacc): Ditto.
44492 (class vfmsac): Ditto.
44493 (class vfnmadd): Ditto.
44494 (class vfmsub): Ditto.
44495 (class vfwmacc): Ditto.
44496 (class vfwnmacc): Ditto.
44497 (class vfwmsac): Ditto.
44498 (class vfwnmsac): Ditto.
44499 (class float_misc): Ditto.
44500 (class fcmp): Ditto.
44501 (class vfclass): Ditto.
44502 (class vfcvt_x): Ditto.
44503 (class vfcvt_rtz_x): Ditto.
44504 (class vfcvt_f): Ditto.
44505 (class vfwcvt_x): Ditto.
44506 (class vfwcvt_rtz_x): Ditto.
44507 (class vfwcvt_f): Ditto.
44508 (class vfncvt_x): Ditto.
44509 (class vfncvt_rtz_x): Ditto.
44510 (class vfncvt_f): Ditto.
44511 (class vfncvt_rod_f): Ditto.
44513 * config/riscv/riscv-vector-builtins-bases.h:
44514 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
44558 (vfcvt_rtz_x): Ditto.
44559 (vfcvt_rtz_xu): Ditto.
44562 (vfwcvt_xu): Ditto.
44563 (vfwcvt_rtz_x): Ditto.
44564 (vfwcvt_rtz_xu): Ditto.
44567 (vfncvt_xu): Ditto.
44568 (vfncvt_rtz_x): Ditto.
44569 (vfncvt_rtz_xu): Ditto.
44571 (vfncvt_rod_f): Ditto.
44572 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
44573 (struct move_def): Ditto.
44574 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
44575 (DEF_RVV_CONVERT_I_OPS): Ditto.
44576 (DEF_RVV_CONVERT_U_OPS): Ditto.
44577 (DEF_RVV_WCONVERT_I_OPS): Ditto.
44578 (DEF_RVV_WCONVERT_U_OPS): Ditto.
44579 (DEF_RVV_WCONVERT_F_OPS): Ditto.
44580 (vfloat64m1_t): Ditto.
44581 (vfloat64m2_t): Ditto.
44582 (vfloat64m4_t): Ditto.
44583 (vfloat64m8_t): Ditto.
44584 (vint32mf2_t): Ditto.
44585 (vint32m1_t): Ditto.
44586 (vint32m2_t): Ditto.
44587 (vint32m4_t): Ditto.
44588 (vint32m8_t): Ditto.
44589 (vint64m1_t): Ditto.
44590 (vint64m2_t): Ditto.
44591 (vint64m4_t): Ditto.
44592 (vint64m8_t): Ditto.
44593 (vuint32mf2_t): Ditto.
44594 (vuint32m1_t): Ditto.
44595 (vuint32m2_t): Ditto.
44596 (vuint32m4_t): Ditto.
44597 (vuint32m8_t): Ditto.
44598 (vuint64m1_t): Ditto.
44599 (vuint64m2_t): Ditto.
44600 (vuint64m4_t): Ditto.
44601 (vuint64m8_t): Ditto.
44602 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
44603 (DEF_RVV_CONVERT_U_OPS): Ditto.
44604 (DEF_RVV_WCONVERT_I_OPS): Ditto.
44605 (DEF_RVV_WCONVERT_U_OPS): Ditto.
44606 (DEF_RVV_WCONVERT_F_OPS): Ditto.
44607 (DEF_RVV_F_OPS): Ditto.
44608 (DEF_RVV_WEXTF_OPS): Ditto.
44609 (required_extensions_p): Adjust for floating-point support.
44610 (check_required_extensions): Ditto.
44611 (unsigned_base_type_p): Ditto.
44612 (get_mode_for_bitsize): Ditto.
44613 (rvv_arg_type_info::get_base_vector_type): Ditto.
44614 (rvv_arg_type_info::get_tree_type): Ditto.
44615 * config/riscv/riscv-vector-builtins.def (v_f): New define.
44618 (xu_v): New define.
44620 (xu_w): New define.
44621 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
44622 (function_expander::arg_mode): New function.
44623 * config/riscv/vector-iterators.md (sof): New iterator.
44629 (fixuns_trunc): Ditto.
44631 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
44632 (@pred_<optab><mode>): Ditto.
44633 (@pred_<optab><mode>_scalar): Ditto.
44634 (@pred_<optab><mode>_reverse_scalar): Ditto.
44635 (@pred_<copysign><mode>): Ditto.
44636 (@pred_<copysign><mode>_scalar): Ditto.
44637 (@pred_mul_<optab><mode>): Ditto.
44638 (pred_mul_<optab><mode>_undef_merge): Ditto.
44639 (*pred_<madd_nmsub><mode>): Ditto.
44640 (*pred_<macc_nmsac><mode>): Ditto.
44641 (*pred_mul_<optab><mode>): Ditto.
44642 (@pred_mul_<optab><mode>_scalar): Ditto.
44643 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
44644 (*pred_<madd_nmsub><mode>_scalar): Ditto.
44645 (*pred_<macc_nmsac><mode>_scalar): Ditto.
44646 (*pred_mul_<optab><mode>_scalar): Ditto.
44647 (@pred_neg_mul_<optab><mode>): Ditto.
44648 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
44649 (*pred_<nmadd_msub><mode>): Ditto.
44650 (*pred_<nmacc_msac><mode>): Ditto.
44651 (*pred_neg_mul_<optab><mode>): Ditto.
44652 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
44653 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
44654 (*pred_<nmadd_msub><mode>_scalar): Ditto.
44655 (*pred_<nmacc_msac><mode>_scalar): Ditto.
44656 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
44657 (@pred_<misc_op><mode>): Ditto.
44658 (@pred_class<mode>): Ditto.
44659 (@pred_dual_widen_<optab><mode>): Ditto.
44660 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
44661 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
44662 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
44663 (@pred_widen_mul_<optab><mode>): Ditto.
44664 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
44665 (@pred_widen_neg_mul_<optab><mode>): Ditto.
44666 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
44667 (@pred_cmp<mode>): Ditto.
44668 (*pred_cmp<mode>): Ditto.
44669 (*pred_cmp<mode>_narrow): Ditto.
44670 (@pred_cmp<mode>_scalar): Ditto.
44671 (*pred_cmp<mode>_scalar): Ditto.
44672 (*pred_cmp<mode>_scalar_narrow): Ditto.
44673 (@pred_eqne<mode>_scalar): Ditto.
44674 (*pred_eqne<mode>_scalar): Ditto.
44675 (*pred_eqne<mode>_scalar_narrow): Ditto.
44676 (@pred_merge<mode>_scalar): Ditto.
44677 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
44678 (@pred_<fix_cvt><mode>): Ditto.
44679 (@pred_<float_cvt><mode>): Ditto.
44680 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
44681 (@pred_widen_<fix_cvt><mode>): Ditto.
44682 (@pred_widen_<float_cvt><mode>): Ditto.
44683 (@pred_extend<mode>): Ditto.
44684 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
44685 (@pred_narrow_<fix_cvt><mode>): Ditto.
44686 (@pred_narrow_<float_cvt><mode>): Ditto.
44687 (@pred_trunc<mode>): Ditto.
44688 (@pred_rod_trunc<mode>): Ditto.
44690 2023-02-22 Jakub Jelinek <jakub@redhat.com>
44692 PR middle-end/106258
44693 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
44694 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
44695 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
44696 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
44698 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
44700 * common.opt (-Wcomplain-wrong-lang): New.
44701 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
44702 * opts-common.cc (prune_options): Handle it.
44703 * opts-global.cc (complain_wrong_lang): Use it.
44705 2023-02-21 David Malcolm <dmalcolm@redhat.com>
44708 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
44710 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
44713 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
44715 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
44716 (sibcall_value, sibcall_value_internal): Add 'use' expression
44719 2023-02-21 Richard Biener <rguenther@suse.de>
44721 PR tree-optimization/108691
44722 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
44723 assert about calls_setjmp not becoming true when it was false.
44725 2023-02-21 Richard Biener <rguenther@suse.de>
44727 PR tree-optimization/108793
44728 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
44729 Use convert operands to niter_type when computing num.
44731 2023-02-21 Richard Biener <rguenther@suse.de>
44734 2023-02-13 Richard Biener <rguenther@suse.de>
44736 PR tree-optimization/108691
44737 * tree-cfg.cc (notice_special_calls): When the CFG is built
44738 honor gimple_call_ctrl_altering_p.
44739 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
44740 temporarily if the call is not control-altering.
44741 * calls.cc (emit_call_1): Do not add REG_SETJMP if
44742 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
44744 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44746 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
44747 true if register A0 (return address register) when -Og is specified.
44749 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
44751 * config/i386/predicates.md
44752 (general_x64constmem_operand): New predicate.
44753 * config/i386/i386.md (*cmpqi_ext<mode>_1):
44754 Use nonimm_x64constmem_operand.
44755 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
44756 (*addqi_ext<mode>_1): Ditto.
44757 (*testqi_ext<mode>_1): Ditto.
44758 (*andqi_ext<mode>_1): Ditto.
44759 (*andqi_ext<mode>_1_cc): Ditto.
44760 (*<any_or:code>qi_ext<mode>_1): Ditto.
44761 (*xorqi_ext<mode>_1_cc): Ditto.
44763 2023-02-20 Jakub Jelinek <jakub2redhat.com>
44766 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
44767 gen_umadddi4_highpart{,_le}.
44769 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
44771 * config/riscv/riscv.md (prefetch): Use r instead of p for the
44773 (riscv_prefetchi_<mode>): Ditto.
44775 2023-02-20 Richard Biener <rguenther@suse.de>
44777 PR tree-optimization/108816
44778 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
44779 versioning condition split prerequesite, assert required
44782 2023-02-20 Richard Biener <rguenther@suse.de>
44784 PR tree-optimization/108825
44785 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
44786 loop-local verfication only verify there's no pending SSA
44789 2023-02-20 Richard Biener <rguenther@suse.de>
44791 PR tree-optimization/108819
44792 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
44793 we have an SSA name as iv_2 as expected.
44795 2023-02-18 Jakub Jelinek <jakub@redhat.com>
44797 PR tree-optimization/108819
44798 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
44800 2023-02-18 Jakub Jelinek <jakub@redhat.com>
44803 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
44804 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
44806 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
44807 with ix86_replace_reg_with_reg.
44809 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
44811 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
44813 2023-02-18 Xi Ruoyao <xry111@xry111.site>
44815 * config.gcc (triplet_abi): Set its value based on $with_abi,
44816 instead of $target.
44817 (la_canonical_triplet): Set it after $triplet_abi is set
44819 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
44820 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
44823 2023-02-18 Andrew Pinski <apinski@marvell.com>
44825 * match.pd: Remove #if GIMPLE around the
44828 2023-02-18 Andrew Pinski <apinski@marvell.com>
44830 * value-query.h (get_range_query): Return the global ranges
44831 for a nullptr func.
44833 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
44835 * doc/invoke.texi (@item -Wall): Fix typo in
44838 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
44841 * config/i386/predicates.md
44842 (nonimm_x64constmem_operand): New predicate.
44843 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
44844 (*subqi_ext<mode>_0): Ditto.
44845 (*andqi_ext<mode>_0): Ditto.
44846 (*<any_or:code>qi_ext<mode>_0): Ditto.
44848 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
44851 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
44852 int_outermode instead of GET_MODE (tem) to prevent
44853 VOIDmode from entering simplify_gen_subreg.
44855 2023-02-17 Richard Biener <rguenther@suse.de>
44857 PR tree-optimization/108821
44858 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
44859 move volatile accesses.
44861 2023-02-17 Richard Biener <rguenther@suse.de>
44863 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
44864 called on virtual operands.
44865 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
44866 ssa_undefined_value_p calls.
44867 (vn_phi_insert): Likewise.
44868 (set_ssa_val_to): Likewise.
44869 (visit_phi): Avoid extra work with equivalences for
44870 virtual operand PHIs.
44872 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44874 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
44876 (class mask_nlogic): Ditto.
44877 (class mask_notlogic): Ditto.
44878 (class vmmv): Ditto.
44879 (class vmclr): Ditto.
44880 (class vmset): Ditto.
44881 (class vmnot): Ditto.
44882 (class vcpop): Ditto.
44883 (class vfirst): Ditto.
44884 (class mask_misc): Ditto.
44885 (class viota): Ditto.
44886 (class vid): Ditto.
44888 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44889 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
44908 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
44909 (struct mask_alu_def): Ditto.
44911 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44912 * config/riscv/riscv-vector-builtins.cc: Ditto.
44913 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
44914 for dest it scalar RVV intrinsics.
44915 * config/riscv/vector-iterators.md (sof): New iterator.
44916 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
44917 (@pred_<optab>not<mode>): New pattern.
44918 (@pred_popcount<VB:mode><P:mode>): New pattern.
44919 (@pred_ffs<VB:mode><P:mode>): New pattern.
44920 (@pred_<misc_op><mode>): New pattern.
44921 (@pred_iota<mode>): New pattern.
44922 (@pred_series<mode>): New pattern.
44924 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44926 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
44930 * config/riscv/riscv-vector-builtins.cc: Ditto.
44932 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44933 kito-cheng <kito.cheng@sifive.com>
44935 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
44936 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
44937 (sew64_scalar_helper): New function.
44938 * config/riscv/vector.md: Normalization.
44940 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44942 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
45004 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45006 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
45007 (@pred_<optab><mode>_scalar): Ditto.
45008 (*pred_<optab><mode>_scalar): Ditto.
45009 (*pred_<optab><mode>_extended_scalar): Ditto.
45011 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45013 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
45014 (init_builtins): Ditto.
45015 (mangle_builtin_type): Ditto.
45016 (verify_type_context): Ditto.
45017 (handle_pragma_vector): Ditto.
45018 (builtin_decl): Ditto.
45019 (expand_builtin): Ditto.
45020 (const_vec_all_same_in_range_p): Ditto.
45021 (legitimize_move): Ditto.
45022 (emit_vlmax_op): Ditto.
45023 (emit_nonvlmax_op): Ditto.
45024 (get_vlmul): Ditto.
45025 (get_ratio): Ditto.
45028 (get_avl_type): Ditto.
45029 (calculate_ratio): Ditto.
45030 (enum vlmul_type): Ditto.
45032 (neg_simm5_p): Ditto.
45033 (has_vi_variant_p): Ditto.
45035 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45037 * config/riscv/riscv-protos.h (simm32_p): Remove.
45038 * config/riscv/riscv-v.cc (simm32_p): Ditto.
45039 * config/riscv/vector.md: Use immediate_operand
45040 instead of riscv_vector::simm32_p.
45042 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
45044 * doc/invoke.texi (Optimize Options): Reword the explanation
45045 getting minimal, maximal and default values of a parameter.
45047 2023-02-16 Patrick Palka <ppalka@redhat.com>
45049 * addresses.h: Mechanically drop 'static' from 'static inline'
45050 functions via s/^static inline/inline/g.
45051 * asan.h: Likewise.
45052 * attribs.h: Likewise.
45053 * basic-block.h: Likewise.
45054 * bitmap.h: Likewise.
45055 * cfghooks.h: Likewise.
45056 * cfgloop.h: Likewise.
45057 * cgraph.h: Likewise.
45058 * cselib.h: Likewise.
45059 * data-streamer.h: Likewise.
45060 * debug.h: Likewise.
45062 * diagnostic.h: Likewise.
45063 * dominance.h: Likewise.
45064 * dumpfile.h: Likewise.
45065 * emit-rtl.h: Likewise.
45066 * except.h: Likewise.
45067 * expmed.h: Likewise.
45068 * expr.h: Likewise.
45069 * fixed-value.h: Likewise.
45070 * gengtype.h: Likewise.
45071 * gimple-expr.h: Likewise.
45072 * gimple-iterator.h: Likewise.
45073 * gimple-predict.h: Likewise.
45074 * gimple-range-fold.h: Likewise.
45075 * gimple-ssa.h: Likewise.
45076 * gimple.h: Likewise.
45077 * graphite.h: Likewise.
45078 * hard-reg-set.h: Likewise.
45079 * hash-map.h: Likewise.
45080 * hash-set.h: Likewise.
45081 * hash-table.h: Likewise.
45082 * hwint.h: Likewise.
45083 * input.h: Likewise.
45084 * insn-addr.h: Likewise.
45085 * internal-fn.h: Likewise.
45086 * ipa-fnsummary.h: Likewise.
45087 * ipa-icf-gimple.h: Likewise.
45088 * ipa-inline.h: Likewise.
45089 * ipa-modref.h: Likewise.
45090 * ipa-prop.h: Likewise.
45091 * ira-int.h: Likewise.
45093 * lra-int.h: Likewise.
45095 * lto-streamer.h: Likewise.
45096 * memmodel.h: Likewise.
45097 * omp-general.h: Likewise.
45098 * optabs-query.h: Likewise.
45099 * optabs.h: Likewise.
45100 * plugin.h: Likewise.
45101 * pretty-print.h: Likewise.
45102 * range.h: Likewise.
45103 * read-md.h: Likewise.
45104 * recog.h: Likewise.
45105 * regs.h: Likewise.
45106 * rtl-iter.h: Likewise.
45108 * sbitmap.h: Likewise.
45109 * sched-int.h: Likewise.
45110 * sel-sched-ir.h: Likewise.
45111 * sese.h: Likewise.
45112 * sparseset.h: Likewise.
45113 * ssa-iterators.h: Likewise.
45114 * system.h: Likewise.
45115 * target-globals.h: Likewise.
45116 * target.h: Likewise.
45117 * timevar.h: Likewise.
45118 * tree-chrec.h: Likewise.
45119 * tree-data-ref.h: Likewise.
45120 * tree-iterator.h: Likewise.
45121 * tree-outof-ssa.h: Likewise.
45122 * tree-phinodes.h: Likewise.
45123 * tree-scalar-evolution.h: Likewise.
45124 * tree-sra.h: Likewise.
45125 * tree-ssa-alias.h: Likewise.
45126 * tree-ssa-live.h: Likewise.
45127 * tree-ssa-loop-manip.h: Likewise.
45128 * tree-ssa-loop.h: Likewise.
45129 * tree-ssa-operands.h: Likewise.
45130 * tree-ssa-propagate.h: Likewise.
45131 * tree-ssa-sccvn.h: Likewise.
45132 * tree-ssa.h: Likewise.
45133 * tree-ssanames.h: Likewise.
45134 * tree-streamer.h: Likewise.
45135 * tree-switch-conversion.h: Likewise.
45136 * tree-vectorizer.h: Likewise.
45137 * tree.h: Likewise.
45138 * wide-int.h: Likewise.
45140 2023-02-16 Jakub Jelinek <jakub@redhat.com>
45142 PR tree-optimization/108657
45143 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
45144 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
45145 is a call to internal or builtin function.
45147 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
45149 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
45150 using-declaration to unhide functions.
45152 2023-02-16 Jakub Jelinek <jakub@redhat.com>
45154 PR tree-optimization/108783
45155 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
45156 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
45157 t to curr->op. Otherwise, punt if either newop1 or newop2 are
45158 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
45160 2023-02-16 Richard Biener <rguenther@suse.de>
45162 PR tree-optimization/108791
45163 * tree-ssa-forwprop.cc (optimize_vector_load): Build
45164 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
45167 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
45170 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
45171 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
45172 (ix86_expand_prologue): Likewise.
45174 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
45176 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
45178 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
45180 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
45181 int248_register_operand predicate in zero_extract sub-RTX.
45182 (*cmpqi_ext<mode>_2): Ditto.
45183 (*cmpqi_ext<mode>_3): Ditto.
45184 (*cmpqi_ext<mode>_4): Ditto.
45185 (*extzvqi_mem_rex64): Ditto.
45187 (*insvqi_1_mem_rex64): Ditto.
45188 (@insv<mode>_1): Ditto.
45189 (*insvqi_1): Ditto.
45190 (*insvqi_2): Ditto.
45191 (*insvqi_3): Ditto.
45192 (*extendqi<SWI24:mode>_ext_1): Ditto.
45193 (*addqi_ext<mode>_1): Ditto.
45194 (*addqi_ext<mode>_2): Ditto.
45195 (*subqi_ext<mode>_2): Ditto.
45196 (*testqi_ext<mode>_1): Ditto.
45197 (*testqi_ext<mode>_2): Ditto.
45198 (*andqi_ext<mode>_1): Ditto.
45199 (*andqi_ext<mode>_1_cc): Ditto.
45200 (*andqi_ext<mode>_2): Ditto.
45201 (*<any_or:code>qi_ext<mode>_1): Ditto.
45202 (*<any_or:code>qi_ext<mode>_2): Ditto.
45203 (*xorqi_ext<mode>_1_cc): Ditto.
45204 (*negqi_ext<mode>_2): Ditto.
45205 (*ashlqi_ext<mode>_2): Ditto.
45206 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
45208 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
45210 * config/i386/predicates.md (int248_register_operand):
45211 Rename from extr_register_operand.
45212 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
45213 (*extzx<mode>): Ditto.
45214 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
45215 (*ashl<mode>3_mask): Ditto.
45216 (*<any_shiftrt:insn><mode>3_mask): Ditto.
45217 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
45218 (*<any_rotate:insn><mode>3_mask): Ditto.
45219 (*<btsc><mode>_mask): Ditto.
45220 (*btr<mode>_mask): Ditto.
45221 (*jcc_bt<mode>_mask_1): Ditto.
45223 2023-02-15 Richard Biener <rguenther@suse.de>
45225 PR middle-end/26854
45226 * df-core.cc (df_worklist_propagate_forward): Put later
45227 blocks on worklist and only earlier blocks on pending.
45228 (df_worklist_propagate_backward): Likewise.
45229 (df_worklist_dataflow_doublequeue): Change the iteration
45230 to process new blocks in the same iteration if that
45231 maintains the iteration order.
45233 2023-02-15 Marek Polacek <polacek@redhat.com>
45235 PR middle-end/106080
45236 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
45239 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45241 * config/riscv/predicates.md: Refine codes.
45242 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
45243 * config/riscv/riscv-v.cc: Refine codes.
45244 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
45246 (class imac): New class.
45247 (enum widen_ternop_type): New enum.
45248 (class iwmac): New class.
45250 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45251 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
45259 * config/riscv/riscv-vector-builtins.cc
45260 (function_builder::apply_predication): Adjust for multiply-add support.
45261 (function_expander::add_vundef_operand): Refine codes.
45262 (function_expander::use_ternop_insn): New function.
45263 (function_expander::use_widen_ternop_insn): Ditto.
45264 * config/riscv/riscv-vector-builtins.h: New function.
45265 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
45266 (pred_mul_<optab><mode>_undef_merge): Ditto.
45267 (*pred_<madd_nmsub><mode>): Ditto.
45268 (*pred_<macc_nmsac><mode>): Ditto.
45269 (*pred_mul_<optab><mode>): Ditto.
45270 (@pred_mul_<optab><mode>_scalar): Ditto.
45271 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
45272 (*pred_<madd_nmsub><mode>_scalar): Ditto.
45273 (*pred_<macc_nmsac><mode>_scalar): Ditto.
45274 (*pred_mul_<optab><mode>_scalar): Ditto.
45275 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
45276 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
45277 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
45278 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
45279 (@pred_widen_mul_plus<su><mode>): Ditto.
45280 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
45281 (@pred_widen_mul_plussu<mode>): Ditto.
45282 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
45283 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
45285 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45287 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
45288 (vector_all_trues_mask_operand): New predicate.
45289 (vector_undef_operand): New predicate.
45290 (ltge_operator): New predicate.
45291 (comparison_except_ltge_operator): New predicate.
45292 (comparison_except_eqge_operator): New predicate.
45293 (ge_operator): New predicate.
45294 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
45295 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
45297 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45298 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
45308 * config/riscv/riscv-vector-builtins-shapes.cc
45309 (struct return_mask_def): Adjust for compare support.
45310 * config/riscv/riscv-vector-builtins.cc
45311 (function_expander::use_compare_insn): New function.
45312 * config/riscv/riscv-vector-builtins.h
45313 (function_expander::add_integer_operand): Ditto.
45314 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
45315 * config/riscv/riscv.md: Add vector min/max attributes.
45316 * config/riscv/vector-iterators.md (xnor): New iterator.
45317 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
45318 (*pred_cmp<mode>): Ditto.
45319 (*pred_cmp<mode>_narrow): Ditto.
45320 (@pred_ltge<mode>): Ditto.
45321 (*pred_ltge<mode>): Ditto.
45322 (*pred_ltge<mode>_narrow): Ditto.
45323 (@pred_cmp<mode>_scalar): Ditto.
45324 (*pred_cmp<mode>_scalar): Ditto.
45325 (*pred_cmp<mode>_scalar_narrow): Ditto.
45326 (@pred_eqne<mode>_scalar): Ditto.
45327 (*pred_eqne<mode>_scalar): Ditto.
45328 (*pred_eqne<mode>_scalar_narrow): Ditto.
45329 (*pred_cmp<mode>_extended_scalar): Ditto.
45330 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
45331 (*pred_eqne<mode>_extended_scalar): Ditto.
45332 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
45333 (@pred_ge<mode>_scalar): Ditto.
45334 (@pred_<optab><mode>): Ditto.
45335 (@pred_n<optab><mode>): Ditto.
45336 (@pred_<optab>n<mode>): Ditto.
45337 (@pred_not<mode>): Ditto.
45339 2023-02-15 Martin Jambor <mjambor@suse.cz>
45342 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
45343 creation of non-scalar replacements even if IPA-CP knows their
45346 2023-02-15 Jakub Jelinek <jakub@redhat.com>
45350 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
45351 expander, change operand 3 to be TImode, emit maddlddi4 and
45352 umadddi4_highpart{,_le} with its low half and finally add the high
45353 half to the result.
45355 2023-02-15 Martin Liska <mliska@suse.cz>
45357 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
45359 2023-02-15 Richard Biener <rguenther@suse.de>
45361 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
45362 for with_poison and alias worklist to it.
45363 (sanitize_asan_mark_poison): Likewise.
45365 2023-02-15 Richard Biener <rguenther@suse.de>
45368 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
45369 Combine bitmap test and set.
45370 (scalar_chain::add_insn): Likewise.
45371 (scalar_chain::analyze_register_chain): Remove redundant
45372 attempt to add to queue and instead strengthen assert.
45373 Sink common attempts to mark the def dual-mode.
45374 (scalar_chain::add_to_queue): Remove redundant insn bitmap
45377 2023-02-15 Richard Biener <rguenther@suse.de>
45380 * config/i386/i386-features.cc (convert_scalars_to_vector):
45381 Switch candidates bitmaps to tree view before building the chains.
45383 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
45385 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
45386 "failure trying to reload" call.
45388 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
45390 * gdbinit.in (phrs): New command.
45391 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
45392 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
45394 2023-02-14 David Faust <david.faust@oracle.com>
45397 * config/bpf/constraints.md (q): New memory constraint.
45398 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
45399 (zero_extendqidi2): Likewise.
45400 (zero_extendsidi2): Likewise.
45401 (*mov<MM:mode>): Likewise.
45403 2023-02-14 Andrew Pinski <apinski@marvell.com>
45405 PR tree-optimization/108355
45406 PR tree-optimization/96921
45407 * match.pd: Add pattern for "1 - bool_val".
45409 2023-02-14 Richard Biener <rguenther@suse.de>
45411 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
45412 basic block index hashing on the availability of ->cclhs.
45413 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
45414 rely on ->cclhs availability.
45415 (vn_phi_lookup): Set ->cclhs only when we are eventually
45416 going to CSE the PHI.
45417 (vn_phi_insert): Likewise.
45419 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
45421 * gimplify.cc (gimplify_save_expr): Add missing guard.
45423 2023-02-14 Richard Biener <rguenther@suse.de>
45425 PR tree-optimization/108782
45426 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
45427 Make sure we're not vectorizing an inner loop.
45429 2023-02-14 Jakub Jelinek <jakub@redhat.com>
45431 PR sanitizer/108777
45432 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
45433 * asan.h (asan_memfn_rtl): Declare.
45434 * asan.cc (asan_memfn_rtls): New variable.
45435 (asan_memfn_rtl): New function.
45436 * builtins.cc (expand_builtin): If
45437 param_asan_kernel_mem_intrinsic_prefix and function is
45438 kernel-{,hw}address sanitized, emit calls to
45439 __{,hw}asan_{memcpy,memmove,memset} rather than
45440 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
45441 instead of flag_sanitize & SANITIZE_ADDRESS to check if
45442 asan_intercepted_p functions shouldn't be expanded inline.
45444 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
45446 PR tree-optimization/96373
45447 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
45448 operations on the loop mask. Reject partial vectors if this isn't
45451 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
45453 PR rtl-optimization/108681
45454 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
45455 code to handle bare uses and clobbers.
45457 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
45459 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
45460 caller_save_p flag when clearing defined_p flag.
45461 (setup_reg_equiv): Ditto.
45462 * lra-constraints.cc (lra_constraints): Ditto.
45464 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
45467 * config/i386/predicates.md (extr_register_operand):
45468 New special predicate.
45469 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
45470 as operand 1 predicate.
45471 (*exzv<mode>): Ditto.
45472 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
45474 2023-02-13 Richard Biener <rguenther@suse.de>
45476 PR tree-optimization/28614
45477 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
45478 walking all edges in most cases.
45479 (vn_nary_op_insert_pieces_predicated): Avoid repeated
45480 calls to can_track_predicate_on_edge unless checking is
45482 (process_bb): Instead call it once here for each edge
45483 we register possibly multiple predicates on.
45485 2023-02-13 Richard Biener <rguenther@suse.de>
45487 PR tree-optimization/108691
45488 * tree-cfg.cc (notice_special_calls): When the CFG is built
45489 honor gimple_call_ctrl_altering_p.
45490 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
45491 temporarily if the call is not control-altering.
45492 * calls.cc (emit_call_1): Do not add REG_SETJMP if
45493 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
45495 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
45498 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
45499 (struct s390_sched_state): Initialise to zero.
45500 (s390_sched_variable_issue): For better debuggability also emit
45502 (s390_sched_init): Unconditionally reset scheduler state.
45504 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
45506 * ifcvt.h (noce_if_info::cond_inverted): New field.
45507 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
45508 values when cond_inverted is true.
45509 (noce_find_if_block): Allow the condition to be inverted when
45510 handling conditional moves.
45512 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
45514 * config/s390/predicates.md (execute_operation): Use
45515 constrain_operands instead of extract_constrain_insn in order to
45516 determine wheter there exists a valid alternative.
45518 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
45520 * common/config/arc/arc-common.cc (arc_option_optimization_table):
45521 Remove millicode from list.
45523 2023-02-13 Martin Liska <mliska@suse.cz>
45525 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
45527 2023-02-13 Richard Biener <rguenther@suse.de>
45529 PR tree-optimization/106722
45530 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
45531 whether we marked a stmt.
45532 (mark_control_dependent_edges_necessary): When
45533 mark_last_stmt_necessary didn't mark any stmt make sure
45534 to mark its control dependent edges.
45535 (propagate_necessity): Likewise.
45537 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
45539 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
45540 (DWARF_FRAME_REGISTERS): New.
45541 (DWARF_REG_TO_UNWIND_COLUMN): New.
45543 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
45545 * doc/sourcebuild.texi: Remove (broken) direct reference to
45546 "The GNU configure and build system".
45548 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
45550 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
45551 gen_add3_insn to gen_rtx_SET.
45552 (riscv_adjust_libcall_cfi_epilogue): Likewise.
45554 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45556 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
45557 (class vnclip): Ditto.
45559 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45560 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
45569 * config/riscv/vector-iterators.md (su): Add instruction.
45572 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
45573 (@pred_<sat_op><mode>_scalar): Ditto.
45574 (*pred_<sat_op><mode>_scalar): Ditto.
45575 (*pred_<sat_op><mode>_extended_scalar): Ditto.
45576 (@pred_narrow_clip<v_su><mode>): Ditto.
45577 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
45579 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45581 * config/riscv/constraints.md (Wbr): Remove unused constraint.
45582 * config/riscv/predicates.md: Fix move operand predicate.
45583 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
45584 (class vncvt_x): Ditto.
45585 (class vmerge): Ditto.
45586 (class vmv_v): Ditto.
45588 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45589 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
45596 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
45597 (struct move_def): Ditto.
45599 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
45600 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
45601 (DEF_RVV_WEXTU_OPS): Ditto
45602 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
45607 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
45608 * config/riscv/vector-iterators.md (nmsac):New iterator.
45609 (nmsub): New iterator.
45610 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
45611 (@pred_merge<mode>_scalar): New pattern.
45612 (*pred_merge<mode>_scalar): New pattern.
45613 (*pred_merge<mode>_extended_scalar): New pattern.
45614 (@pred_narrow_<optab><mode>): New pattern.
45615 (@pred_narrow_<optab><mode>_scalar): New pattern.
45616 (@pred_trunc<mode>): New pattern.
45618 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45620 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
45621 (class vmsbc): Ditto.
45622 (BASE): Define new class.
45623 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45624 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
45626 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
45629 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
45630 * config/riscv/riscv-vector-builtins.cc
45631 (function_expander::use_exact_insn): Adjust for new support
45632 * config/riscv/riscv-vector-builtins.h
45633 (function_base::has_merge_operand_p): New function.
45634 * config/riscv/vector-iterators.md: New iterator.
45635 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
45636 (@pred_msbc<mode>): Ditto.
45637 (@pred_madc<mode>_scalar): Ditto.
45638 (@pred_msbc<mode>_scalar): Ditto.
45639 (*pred_madc<mode>_scalar): Ditto.
45640 (*pred_madc<mode>_extended_scalar): Ditto.
45641 (*pred_msbc<mode>_scalar): Ditto.
45642 (*pred_msbc<mode>_extended_scalar): Ditto.
45643 (@pred_madc<mode>_overflow): Ditto.
45644 (@pred_msbc<mode>_overflow): Ditto.
45645 (@pred_madc<mode>_overflow_scalar): Ditto.
45646 (@pred_msbc<mode>_overflow_scalar): Ditto.
45647 (*pred_madc<mode>_overflow_scalar): Ditto.
45648 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
45649 (*pred_msbc<mode>_overflow_scalar): Ditto.
45650 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
45652 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45654 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
45655 * config/riscv/riscv-v.cc (simm32_p): Ditto.
45656 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
45657 (class vsbc): Ditto.
45659 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45660 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
45662 * config/riscv/riscv-vector-builtins-shapes.cc
45663 (struct no_mask_policy_def): Ditto.
45665 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
45666 * config/riscv/riscv-vector-builtins.cc
45667 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
45668 (rvv_arg_type_info::get_tree_type): Ditto.
45669 (function_expander::use_exact_insn): Ditto.
45670 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
45671 (function_base::use_mask_predication_p): New function.
45672 * config/riscv/vector-iterators.md: New iterator.
45673 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
45674 (@pred_sbc<mode>): Ditto.
45675 (@pred_adc<mode>_scalar): Ditto.
45676 (@pred_sbc<mode>_scalar): Ditto.
45677 (*pred_adc<mode>_scalar): Ditto.
45678 (*pred_adc<mode>_extended_scalar): Ditto.
45679 (*pred_sbc<mode>_scalar): Ditto.
45680 (*pred_sbc<mode>_extended_scalar): Ditto.
45682 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45684 * config/riscv/vector.md: use "zero" reg.
45686 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45688 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
45690 (class vwmulsu): Ditto.
45691 (class vwcvt): Ditto.
45692 (BASE): Add integer widening support.
45693 * config/riscv/riscv-vector-builtins-bases.h: Ditto
45694 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
45695 (vwsub): New class.
45696 (vwmul): New class.
45697 (vwmulu): New class.
45698 (vwmulsu): New class.
45699 (vwaddu): New class.
45700 (vwsubu): New class.
45701 (vwcvt_x): New class.
45702 (vwcvtu_x): New class.
45703 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
45705 (struct widen_alu_def): New class.
45706 (SHAPE): New class.
45707 * config/riscv/riscv-vector-builtins-shapes.h: New class.
45708 * config/riscv/riscv-vector-builtins.cc
45709 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
45710 (rvv_arg_type_info::get_tree_type): Ditto.
45711 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
45713 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
45715 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
45716 * config/riscv/riscv.h (X0_REGNUM): New constant.
45717 * config/riscv/vector-iterators.md: New iterators.
45718 * config/riscv/vector.md
45719 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
45721 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
45723 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
45724 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
45726 (@pred_widen_mulsu<mode>): Ditto.
45727 (@pred_widen_mulsu<mode>_scalar): Ditto.
45728 (@pred_<optab><mode>): Ditto.
45730 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45731 kito-cheng <kito.cheng@sifive.com>
45733 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
45734 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
45736 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45737 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
45741 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
45743 (DEF_RVV_FULL_V_U_OPS): Ditto.
45744 (vint8mf8_t): Ditto.
45745 (vint8mf4_t): Ditto.
45746 (vint8mf2_t): Ditto.
45747 (vint8m1_t): Ditto.
45748 (vint8m2_t): Ditto.
45749 (vint8m4_t): Ditto.
45750 (vint8m8_t): Ditto.
45751 (vint16mf4_t): Ditto.
45752 (vint16mf2_t): Ditto.
45753 (vint16m1_t): Ditto.
45754 (vint16m2_t): Ditto.
45755 (vint16m4_t): Ditto.
45756 (vint16m8_t): Ditto.
45757 (vint32mf2_t): Ditto.
45758 (vint32m1_t): Ditto.
45759 (vint32m2_t): Ditto.
45760 (vint32m4_t): Ditto.
45761 (vint32m8_t): Ditto.
45762 (vint64m1_t): Ditto.
45763 (vint64m2_t): Ditto.
45764 (vint64m4_t): Ditto.
45765 (vint64m8_t): Ditto.
45766 (vuint8mf8_t): Ditto.
45767 (vuint8mf4_t): Ditto.
45768 (vuint8mf2_t): Ditto.
45769 (vuint8m1_t): Ditto.
45770 (vuint8m2_t): Ditto.
45771 (vuint8m4_t): Ditto.
45772 (vuint8m8_t): Ditto.
45773 (vuint16mf4_t): Ditto.
45774 (vuint16mf2_t): Ditto.
45775 (vuint16m1_t): Ditto.
45776 (vuint16m2_t): Ditto.
45777 (vuint16m4_t): Ditto.
45778 (vuint16m8_t): Ditto.
45779 (vuint32mf2_t): Ditto.
45780 (vuint32m1_t): Ditto.
45781 (vuint32m2_t): Ditto.
45782 (vuint32m4_t): Ditto.
45783 (vuint32m8_t): Ditto.
45784 (vuint64m1_t): Ditto.
45785 (vuint64m2_t): Ditto.
45786 (vuint64m4_t): Ditto.
45787 (vuint64m8_t): Ditto.
45788 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
45789 (DEF_RVV_FULL_V_U_OPS): Ditto.
45790 (check_required_extensions): Add vmulh support.
45791 (rvv_arg_type_info::get_tree_type): Ditto.
45792 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
45793 (enum rvv_base_type): Ditto.
45794 * config/riscv/riscv.opt: Add 'V' extension flag.
45795 * config/riscv/vector-iterators.md (su): New iterator.
45796 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
45797 (@pred_mulh<v_su><mode>_scalar): Ditto.
45798 (*pred_mulh<v_su><mode>_scalar): Ditto.
45799 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
45801 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45803 * config/riscv/iterators.md: Add sign_extend/zero_extend.
45804 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
45806 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
45807 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
45810 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
45811 for vsext/vzext support.
45812 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
45814 (DEF_RVV_QEXTI_OPS): Ditto.
45815 (DEF_RVV_OEXTI_OPS): Ditto.
45816 (DEF_RVV_WEXTU_OPS): Ditto.
45817 (DEF_RVV_QEXTU_OPS): Ditto.
45818 (DEF_RVV_OEXTU_OPS): Ditto.
45819 (vint16mf4_t): Ditto.
45820 (vint16mf2_t): Ditto.
45821 (vint16m1_t): Ditto.
45822 (vint16m2_t): Ditto.
45823 (vint16m4_t): Ditto.
45824 (vint16m8_t): Ditto.
45825 (vint32mf2_t): Ditto.
45826 (vint32m1_t): Ditto.
45827 (vint32m2_t): Ditto.
45828 (vint32m4_t): Ditto.
45829 (vint32m8_t): Ditto.
45830 (vint64m1_t): Ditto.
45831 (vint64m2_t): Ditto.
45832 (vint64m4_t): Ditto.
45833 (vint64m8_t): Ditto.
45834 (vuint16mf4_t): Ditto.
45835 (vuint16mf2_t): Ditto.
45836 (vuint16m1_t): Ditto.
45837 (vuint16m2_t): Ditto.
45838 (vuint16m4_t): Ditto.
45839 (vuint16m8_t): Ditto.
45840 (vuint32mf2_t): Ditto.
45841 (vuint32m1_t): Ditto.
45842 (vuint32m2_t): Ditto.
45843 (vuint32m4_t): Ditto.
45844 (vuint32m8_t): Ditto.
45845 (vuint64m1_t): Ditto.
45846 (vuint64m2_t): Ditto.
45847 (vuint64m4_t): Ditto.
45848 (vuint64m8_t): Ditto.
45849 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
45850 (DEF_RVV_QEXTI_OPS): Ditto.
45851 (DEF_RVV_OEXTI_OPS): Ditto.
45852 (DEF_RVV_WEXTU_OPS): Ditto.
45853 (DEF_RVV_QEXTU_OPS): Ditto.
45854 (DEF_RVV_OEXTU_OPS): Ditto.
45855 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
45857 (rvv_arg_type_info::get_tree_type): Ditto.
45858 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
45859 * config/riscv/vector-iterators.md (z): New attribute.
45860 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
45861 (@pred_<optab><mode>_vf4): Ditto.
45862 (@pred_<optab><mode>_vf8): Ditto.
45864 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45866 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
45867 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
45868 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
45869 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45870 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
45874 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
45879 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
45880 (@pred_<optab><mode>_scalar): New pattern.
45881 (*pred_<optab><mode>_scalar): New pattern.
45882 (*pred_<optab><mode>_extended_scalar): New pattern.
45884 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45886 * config/riscv/iterators.md: Add neg and not.
45887 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
45889 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45890 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
45911 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
45912 (struct alu_def): Ditto.
45914 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
45915 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
45916 * config/riscv/vector-iterators.md: New iterator.
45917 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
45919 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45921 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
45923 2023-02-11 Jakub Jelinek <jakub@redhat.com>
45926 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
45927 item->offset bit position is too large to be representable as
45928 unsigned int byte position.
45930 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
45932 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
45934 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
45936 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
45937 valid_combine only when ira_use_lra_p is true.
45939 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
45941 * params.opt (ira-simple-lra-insn-threshold): Add new param.
45942 * ira.cc (ira): Use the param to switch on simple LRA.
45944 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
45946 PR tree-optimization/108687
45947 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
45948 back to RFD_NONE mode for calculations.
45949 (ranger_cache::propagate_cache): Call the internal edge range API
45950 with RFD_READ_ONLY instead of changing the external routine.
45952 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
45954 PR tree-optimization/108520
45955 * gimple-range-infer.cc (check_assume_func): Invoke
45956 gimple_range_global directly instead using global_range_query.
45957 * value-query.cc (get_range_global): Add function context and
45958 avoid calling nonnull_arg_p if not cfun.
45959 (gimple_range_global): Add function context pointer.
45960 * value-query.h (imple_range_global): Add function context.
45962 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45964 * config/riscv/constraints.md (Wdm): Adjust constraint.
45965 (Wbr): New constraint.
45966 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
45967 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
45968 (emit_vlmax_op): New function.
45969 (emit_nonvlmax_op): Ditto.
45971 (neg_simm5_p): Ditto.
45972 (has_vi_variant_p): Ditto.
45973 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
45974 (emit_vlmax_op): New function.
45975 (emit_nonvlmax_op): Ditto.
45976 (expand_const_vector): Adjust function.
45977 (legitimize_move): Ditto.
45978 (simm32_p): New function.
45980 (neg_simm5_p): Ditto.
45981 (has_vi_variant_p): Ditto.
45982 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
45984 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45985 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
45988 (vminu): Remove signed cases.
45990 (vdiv): Remove unsigned cases.
45992 (vdivu): Remove signed cases.
45996 (vrsub): New class.
46001 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
46002 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
46003 * config/riscv/vector-iterators.md: New iterators.
46004 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
46006 (@pred_<optab><mode>_scalar): New pattern.
46007 (@pred_sub<mode>_reverse_scalar): Ditto.
46008 (*pred_<optab><mode>_scalar): Ditto.
46009 (*pred_<optab><mode>_extended_scalar): Ditto.
46010 (*pred_sub<mode>_reverse_scalar): Ditto.
46011 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
46013 2023-02-10 Richard Biener <rguenther@suse.de>
46015 PR tree-optimization/108724
46016 * tree-vect-stmts.cc (vectorizable_operation): Avoid
46017 using word_mode vectors when vector lowering will
46018 decompose them to elementwise operations.
46020 2023-02-10 Jakub Jelinek <jakub@redhat.com>
46023 2023-02-09 Martin Liska <mliska@suse.cz>
46026 * doc/extend.texi: Document that the function
46027 does not work correctly for old VIA processors.
46029 2023-02-10 Andrew Pinski <apinski@marvell.com>
46030 Andrew Macleod <amacleod@redhat.com>
46032 PR tree-optimization/108684
46033 * tree-ssa-dce.cc (simple_dce_from_worklist):
46034 Check all ssa names and not just non-vdef ones
46035 before accepting the inline-asm.
46036 Call unlink_stmt_vdef on the statement before
46039 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
46041 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
46042 * ira.cc (validate_equiv_mem): Check memref address variance.
46043 (no_equiv): Clear caller_save_p flag.
46044 (update_equiv_regs): Define caller save equivalence for
46046 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
46047 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
46048 call_save_p. Use caller save equivalence depending on the arg.
46049 (split_reg): Adjust the call.
46051 2023-02-09 Jakub Jelinek <jakub@redhat.com>
46054 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
46055 (cpu_indicator_init): Call get_available_features for all CPUs with
46056 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
46059 2023-02-09 Jakub Jelinek <jakub@redhat.com>
46061 PR tree-optimization/108688
46062 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
46063 of BIT_INSERT_EXPR extracting exactly all inserted bits even
46064 when without mode precision. Formatting fixes.
46066 2023-02-09 Andrew Pinski <apinski@marvell.com>
46068 PR tree-optimization/108688
46069 * match.pd (bit_field_ref [bit_insert]): Avoid generating
46070 BIT_FIELD_REFs of non-mode-precision integral operands.
46072 2023-02-09 Martin Liska <mliska@suse.cz>
46075 * doc/extend.texi: Document that the function
46076 does not work correctly for old VIA processors.
46078 2023-02-09 Andreas Schwab <schwab@suse.de>
46080 * lto-wrapper.cc (merge_and_complain): Handle
46081 -funwind-tables and -fasynchronous-unwind-tables.
46082 (append_compiler_options): Likewise.
46084 2023-02-09 Richard Biener <rguenther@suse.de>
46086 PR tree-optimization/26854
46087 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
46088 view around insert_updated_phi_nodes_for.
46089 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
46091 (walk_aliased_vdefs_1): Likewise.
46093 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
46095 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
46097 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46100 * config.gcc (tm_mlib_file): Define new variable.
46102 2023-02-08 Jakub Jelinek <jakub@redhat.com>
46104 PR tree-optimization/108692
46105 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
46106 widened_code which is different from code, don't call
46107 vect_look_through_possible_promotion but instead just check op is
46108 SSA_NAME with integral type for which vect_is_simple_use is true
46109 and call set_op on this_unprom.
46111 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
46113 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
46115 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
46117 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
46118 to 'aarch_ra_sign_key'.
46119 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
46121 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
46122 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
46123 * config/arm/arm.opt: Define.
46125 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
46127 PR tree-optimization/108316
46128 * tree-vect-stmts.cc (get_load_store_type): When using
46129 internal functions for gather/scatter, make sure that the type
46130 of the offset argument is consistent with the offset vector type.
46132 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
46135 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
46137 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
46138 * ira.cc (validate_equiv_mem): Check memref address variance.
46139 (update_equiv_regs): Define caller save equivalence for
46141 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
46142 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
46143 call_save_p. Use caller save equivalence depending on the arg.
46144 (split_reg): Adjust the call.
46146 2023-02-08 Jakub Jelinek <jakub@redhat.com>
46148 * tree.def (SAD_EXPR): Remove outdated comment about missing
46151 2023-02-07 Marek Polacek <polacek@redhat.com>
46153 * doc/invoke.texi: Update -fchar8_t documentation.
46155 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
46157 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
46158 * ira.cc (validate_equiv_mem): Check memref address variance.
46159 (update_equiv_regs): Define caller save equivalence for
46161 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
46162 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
46163 call_save_p. Use caller save equivalence depending on the arg.
46164 (split_reg): Adjust the call.
46166 2023-02-07 Richard Biener <rguenther@suse.de>
46168 PR tree-optimization/26854
46169 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
46170 instead of immediate uses.
46172 2023-02-07 Jakub Jelinek <jakub@redhat.com>
46174 PR tree-optimization/106923
46175 * ipa-split.cc (execute_split_functions): Don't split returns_twice
46178 2023-02-07 Jakub Jelinek <jakub@redhat.com>
46180 PR tree-optimization/106433
46181 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
46182 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
46184 2023-02-07 Jan Hubicka <jh@suse.cz>
46186 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
46189 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
46191 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
46192 (process_asm): Create a constructor for GCN_STACK_SIZE.
46193 (main): Parse the -mstack-size option.
46195 2023-02-06 Alex Coplan <alex.coplan@arm.com>
46198 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
46199 Use correct constraint for operand 3.
46201 2023-02-06 Martin Jambor <mjambor@suse.cz>
46203 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
46205 2023-02-06 Xi Ruoyao <xry111@xry111.site>
46207 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
46208 New define_int_iterator.
46209 (bytepick_d_ashift_amount): Likewise.
46210 (bytepick_imm): New define_int_attr.
46211 (bytepick_w_lshiftrt_amount): Likewise.
46212 (bytepick_d_lshiftrt_amount): Likewise.
46213 (bytepick_w_<bytepick_imm>): New define_insn template.
46214 (bytepick_w_<bytepick_imm>_extend): Likewise.
46215 (bytepick_d_<bytepick_imm>): Likewise.
46216 (bytepick_w): Remove unused define_insn.
46217 (bytepick_d): Likewise.
46218 (UNSPEC_BYTEPICK_W): Remove unused unspec.
46219 (UNSPEC_BYTEPICK_D): Likewise.
46220 * config/loongarch/predicates.md (const_0_to_3_operand):
46221 Remove unused define_predicate.
46222 (const_0_to_7_operand): Likewise.
46224 2023-02-06 Jakub Jelinek <jakub@redhat.com>
46226 PR tree-optimization/108655
46227 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
46228 or -fsanitize=unreachable -fsanitize-trap=unreachable return
46229 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
46231 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
46233 * doc/install.texi (Specific): Remove PW32.
46235 2023-02-03 Jakub Jelinek <jakub@redhat.com>
46237 PR tree-optimization/108647
46238 * range-op.cc (operator_equal::op1_range,
46239 operator_not_equal::op1_range): Don't test op2 bound
46240 equality if op2.undefined_p (), instead set_varying.
46241 (operator_lt::op1_range, operator_le::op1_range,
46242 operator_gt::op1_range, operator_ge::op1_range): Return false if
46243 op2.undefined_p ().
46244 (operator_lt::op2_range, operator_le::op2_range,
46245 operator_gt::op2_range, operator_ge::op2_range): Return false if
46246 op1.undefined_p ().
46248 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
46250 PR tree-optimization/108639
46251 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
46253 (irange::operator==): Same.
46255 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
46257 PR tree-optimization/108647
46258 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
46259 (foperator_lt::op2_range): Same.
46260 (foperator_le::op1_range): Same.
46261 (foperator_le::op2_range): Same.
46262 (foperator_gt::op1_range): Same.
46263 (foperator_gt::op2_range): Same.
46264 (foperator_ge::op1_range): Same.
46265 (foperator_ge::op2_range): Same.
46266 (foperator_unordered_lt::op1_range): Same.
46267 (foperator_unordered_lt::op2_range): Same.
46268 (foperator_unordered_le::op1_range): Same.
46269 (foperator_unordered_le::op2_range): Same.
46270 (foperator_unordered_gt::op1_range): Same.
46271 (foperator_unordered_gt::op2_range): Same.
46272 (foperator_unordered_ge::op1_range): Same.
46273 (foperator_unordered_ge::op2_range): Same.
46275 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
46277 PR tree-optimization/107570
46278 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
46280 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
46282 * doc/gm2.texi (Internals): Remove from menu.
46283 (Using): Comment out ifnohtml conditional.
46284 (Documentation): Use gcc url.
46285 (License): Node simplified.
46286 (Copying): New node. Include gpl_v3_without_node.
46287 (Contributing): Node simplified.
46288 (Internals): Commented out.
46289 (Libraries): Node simplified.
46292 (Functions): Ditto.
46294 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
46296 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
46298 (mve_vqshluq_m_n_s<mode>): Likewise.
46299 (mve_vshlq_m_<supf><mode>): Likewise.
46300 (mve_vsriq_m_n_<supf><mode>): Likewise.
46301 (mve_vsubq_m_<supf><mode>): Likewise.
46303 2023-02-03 Martin Jambor <mjambor@suse.cz>
46306 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
46307 when comparing to an IPA-CP value.
46308 (dump_list_of_param_indices): New function.
46309 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
46310 Dump removed candidates using dump_list_of_param_indices.
46311 * ipa-param-manipulation.cc
46312 (ipa_param_body_adjustments::modify_expression): Add assert checking
46313 sizes of a VIEW_CONVERT_EXPR will match.
46314 (ipa_param_body_adjustments::modify_assignment): Likewise.
46316 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
46318 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
46319 * config/riscv/riscv.cc: Ditto.
46321 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46323 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
46327 * config/riscv/vector.md: Ditto.
46329 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46331 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
46332 * config/riscv/riscv-vector-builtins-bases.cc: New class.
46333 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
46336 * config/riscv/riscv-vector-builtins.cc: Ditto.
46337 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
46339 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
46341 * toplev.cc (toplev::main): Only print the version information header
46342 from toplevel main().
46344 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
46346 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
46347 cond_{ashl|ashr|lshr}
46349 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
46351 PR rtl-optimization/108086
46352 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
46353 Adjust size-related commentary accordingly.
46355 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
46357 PR rtl-optimization/108508
46358 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
46359 the splay tree search gives the first clobber in the second group,
46360 make sure that the root of the first clobber group is updated
46361 correctly. Enter the new clobber group into the definition splay
46364 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
46366 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
46367 Fix finding best match score.
46369 2023-02-02 Jakub Jelinek <jakub@redhat.com>
46372 PR rtl-optimization/108463
46374 * cselib.cc (cselib_current_insn): Move declaration earlier.
46375 (cselib_hasher::equal): For debug only locs, temporarily override
46376 cselib_current_insn to their l->setting_insn for the
46377 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
46378 promote some debug locs.
46379 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
46380 when using cselib call cselib_lookup_from_insn on the address but
46381 don't substitute it.
46383 2023-02-02 Richard Biener <rguenther@suse.de>
46385 PR middle-end/108625
46386 * genmatch.cc (expr::gen_transform): Also disallow resimplification
46387 from pushing to lseq with force_leaf.
46388 (dt_simplify::gen_1): Likewise.
46390 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
46392 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
46393 (struct kernargs): Replace the common content with kernargs_abi.
46394 (struct heap): Delete.
46395 (main): Read GCN_STACK_SIZE envvar.
46396 Allocate space for the device stacks.
46397 Write the new kernargs fields.
46398 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
46399 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
46400 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
46401 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
46402 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
46403 Set up the stacks from the values in the kernargs, not private.
46404 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
46405 (gcn_hsa_declare_function_name): Turn off the private segment.
46406 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
46407 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
46408 * config/gcn/gcn.opt (mstack-size): Change the description.
46410 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
46413 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
46414 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
46415 addressing MVE predicate modes.
46416 (mve_bool_vec_to_const): Change to represent correct MVE predicate
46418 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
46420 (arm_vector_mode_supported_p): Likewise.
46421 (arm_mode_to_pred_mode): Add V2QI.
46422 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
46424 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
46425 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
46426 (v2qi_UP): New macro.
46427 (v4bi_UP): New macro.
46428 (v8bi_UP): New macro.
46429 (v16bi_UP): New macro.
46430 (arm_expand_builtin_args): Make it able to expand the new predicate
46432 * config/arm/arm-modes.def (V2QI): New mode.
46433 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
46434 Pred4x4_t): Remove unused predicate builtin types.
46435 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
46436 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
46437 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
46438 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
46439 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
46440 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
46441 of MODE_VECTOR_BOOL.
46442 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
46443 (MVE_VPRED): Likewise.
46444 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
46445 (MVE_vctp): New mode attribute.
46449 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
46450 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
46452 (mve_vpnothi): Rename this...
46453 (mve_vpnotv16bi): ... to this.
46454 (mve_vctp<mode1>q_mhi): Rename this...
46455 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
46456 (mve_vldrdq_gather_base_z_<supf>v2di,
46457 mve_vldrdq_gather_offset_z_<supf>v2di,
46458 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
46459 mve_vstrdq_scatter_base_p_<supf>v2di,
46460 mve_vstrdq_scatter_offset_p_<supf>v2di,
46461 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
46462 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
46463 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
46464 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
46465 mve_vldrdq_gather_base_wb_z_<supf>v2di,
46466 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
46467 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
46469 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
46471 (VCTP): ... with this.
46472 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
46473 (VCTP_M): ... with this.
46474 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
46475 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
46477 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
46480 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
46481 (arm_modes_tieable_p): Make MVE predicate modes tieable.
46482 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
46483 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
46484 simplify_subreg to simplify subregs where the outermode is not scalar.
46486 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
46489 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
46490 new qualifiers parameter and use unsigned short type for MVE predicate.
46491 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
46493 (arm_init_crypto_builtins): Likewise.
46495 2023-02-02 Jakub Jelinek <jakub@redhat.com>
46498 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
46499 * internal-fn.def (TRAP): Remove.
46500 * internal-fn.cc (expand_TRAP): Remove.
46501 * tree.cc (build_common_builtin_nodes): Define
46502 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
46503 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
46504 instead of BUILT_IN_TRAP.
46505 * gimple.cc (gimple_build_builtin_unreachable): Remove
46506 emitting internal function for BUILT_IN_TRAP.
46507 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
46508 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
46509 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
46510 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
46511 BUILT_IN_UNREACHABLE_TRAP.
46512 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
46513 * tree-cfg.cc (verify_gimple_call,
46514 pass_warn_function_return::execute): Likewise.
46515 * attribs.cc (decl_attributes): Don't report exclusions on
46516 BUILT_IN_UNREACHABLE_TRAP either.
46518 2023-02-02 liuhongt <hongtao.liu@intel.com>
46520 PR tree-optimization/108601
46521 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
46522 * tree-vect-loop.cc
46523 (vectorizable_nonlinear_induction): Remove
46524 vect_can_peel_nonlinear_iv_p.
46525 (vect_can_peel_nonlinear_iv_p): Don't peel
46526 nonlinear iv(mult or shift) for epilog when vf is not
46527 constant and moved the defination to ..
46528 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
46531 2023-02-02 Jakub Jelinek <jakub@redhat.com>
46533 PR middle-end/108435
46534 * tree-nested.cc (convert_nonlocal_omp_clauses)
46535 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
46536 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
46537 before calling declare_vars.
46538 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
46539 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
46540 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
46541 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
46543 2023-02-01 Tamar Christina <tamar.christina@arm.com>
46545 * common/config/aarch64/aarch64-common.cc
46546 (struct aarch64_option_extension): Add native_detect and document struct
46548 (all_extensions): Set new field native_detect.
46549 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
46552 2023-02-01 Martin Liska <mliska@suse.cz>
46554 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
46557 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
46559 PR tree-optimization/108356
46560 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
46561 do a search of the DOM tree for a range.
46563 2023-02-01 Martin Liska <mliska@suse.cz>
46566 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
46567 ony non-null values.
46568 * ipa.cc (walk_polymorphic_call_targets): Likewise.
46570 2023-02-01 Martin Liska <mliska@suse.cz>
46573 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
46576 2023-02-01 Jakub Jelinek <jakub@redhat.com>
46579 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
46580 subregs in DEBUG_INSNs.
46582 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
46584 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
46586 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
46588 * config/s390/s390.cc (s390_restore_gpr_p): New function.
46589 (s390_preserve_gpr_arg_in_range_p): New function.
46590 (s390_preserve_gpr_arg_p): New function.
46591 (s390_preserve_fpr_arg_p): New function.
46592 (s390_register_info_stdarg_fpr): Rename to ...
46593 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
46594 (s390_register_info_stdarg_gpr): Rename to ...
46595 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
46596 (s390_register_info): Use the renamed functions above.
46597 (s390_optimize_register_info): Likewise.
46598 (save_fpr): Generate CFI for -mpreserve-args.
46599 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
46600 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
46601 (s390_optimize_prologue): Likewise.
46602 * config/s390/s390.opt: New option -mpreserve-args
46604 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
46606 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
46607 (restore_gprs): Likewise.
46608 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
46609 frame pointer if a frame-pointer is used.
46610 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
46611 * config/s390/s390.md (stack_tie): Add a register operand and
46613 (@stack_tie<mode>): ... this.
46615 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
46617 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
46618 EMIT_CFI parameter.
46619 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
46620 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
46622 2023-02-01 Richard Biener <rguenther@suse.de>
46624 PR middle-end/108500
46625 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
46626 with tree traversal algorithm.
46628 2023-02-01 Jason Merrill <jason@redhat.com>
46630 * doc/invoke.texi: Document -Wno-changes-meaning.
46632 2023-02-01 David Malcolm <dmalcolm@redhat.com>
46634 * doc/invoke.texi (Static Analyzer Options): Add notes about
46635 limitations of -fanalyzer.
46637 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46639 * config/riscv/constraints.md (vj): New.
46641 * config/riscv/iterators.md: Add more opcode.
46642 * config/riscv/predicates.md (vector_arith_operand): New.
46643 (vector_neg_arith_operand): New.
46644 (vector_shift_operand): New.
46645 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
46646 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
46663 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
46680 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
46681 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
46682 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
46683 (DEF_RVV_U_OPS): New.
46684 (rvv_arg_type_info::get_base_vector_type): Handle
46685 RVV_BASE_shift_vector.
46686 (rvv_arg_type_info::get_tree_type): Ditto.
46687 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
46688 RVV_BASE_shift_vector.
46689 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
46690 * config/riscv/vector-iterators.md: Handle more opcode.
46691 * config/riscv/vector.md (@pred_<optab><mode>): New.
46693 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
46696 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
46699 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
46701 PR tree-optimization/108608
46702 * tree-vect-loop.cc (vect_transform_reduction): Handle single
46703 def-use cycles that involve function calls rather than tree codes.
46705 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
46707 PR tree-optimization/108385
46708 * gimple-range-gori.cc (gori_compute::compute_operand_range):
46709 Allow VARYING computations to continue if there is a relation.
46710 * range-op.cc (pointer_plus_operator::op2_range): New.
46712 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
46714 PR tree-optimization/108359
46715 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
46716 (range_operator::fold_range): If op1 is equivalent to op2 then
46717 invoke new fold_in_parts_equiv to operate on sub-components.
46718 * range-op.h (wi_fold_in_parts_equiv): New prototype.
46720 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
46722 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
46723 not abort calculations if there is a valid relation available.
46724 (gori_compute::refine_using_relation): Pass correct relation trio.
46725 (gori_compute::compute_operand1_range): Create trio and use it.
46726 (gori_compute::compute_operand2_range): Ditto.
46727 * range-op.cc (operator_plus::op1_range): Use correct trio member.
46728 (operator_minus::op1_range): Use correct trio member.
46729 * value-relation.cc (value_relation::create_trio): New.
46730 * value-relation.h (value_relation::create_trio): New prototype.
46732 2023-01-31 Jakub Jelinek <jakub@redhat.com>
46735 * config/i386/i386-expand.cc
46736 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
46737 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
46738 equal to bitsize of mode.
46740 2023-01-31 Jakub Jelinek <jakub@redhat.com>
46742 PR rtl-optimization/108596
46743 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
46744 ends with asm goto and has a crossing fallthrough edge to the same bb
46745 that contains at least one of its labels by restoring EDGE_CROSSING
46746 flag even on possible edge from cur_bb to new_bb successor.
46748 2023-01-31 Jakub Jelinek <jakub@redhat.com>
46751 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
46752 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
46753 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
46754 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
46755 uninitialized automatic variable __W.
46757 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
46759 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
46761 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46763 * config/riscv/riscv-protos.h (get_vector_mode): New function.
46764 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
46765 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
46766 (class loadstore): Adjust for indexed loads/stores support.
46768 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
46769 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
46785 * config/riscv/riscv-vector-builtins-shapes.cc
46786 (struct indexed_loadstore_def): New class.
46788 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
46789 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
46790 for indexed loads/stores support.
46791 (check_required_extensions): Ditto.
46792 (rvv_arg_type_info::get_base_vector_type): New function.
46793 (rvv_arg_type_info::get_tree_type): Ditto.
46794 (function_builder::add_unique_function): Adjust for indexed loads/stores
46796 (function_expander::use_exact_insn): New function.
46797 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
46798 indexed loads/stores support.
46799 (struct rvv_arg_type_info): Ditto.
46800 (function_expander::index_mode): New function.
46801 (function_base::apply_tail_policy_p): Ditto.
46802 (function_base::apply_mask_policy_p): Ditto.
46803 * config/riscv/vector-iterators.md (unspec): New unspec.
46804 * config/riscv/vector.md (unspec): Ditto.
46805 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
46807 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
46808 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
46809 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
46810 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
46811 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
46812 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
46813 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
46814 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
46815 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
46816 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
46817 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
46818 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
46819 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
46821 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
46823 * config.gcc: Recognize x86_64-*-gnu* targets and include
46825 * config/i386/gnu64.h: Define configuration for new target
46826 including ld.so location.
46828 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
46830 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
46831 ampere1a to include SM4.
46833 2023-01-30 Andrew Pinski <apinski@marvell.com>
46835 PR tree-optimization/108582
46836 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
46837 for middlebb to have no phi nodes.
46839 2023-01-30 Richard Biener <rguenther@suse.de>
46841 PR tree-optimization/108574
46842 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
46843 sameval and def, ignore the equivalence if there's the
46844 danger of oscillating between two values.
46846 2023-01-30 Andreas Schwab <schwab@suse.de>
46848 * common/config/riscv/riscv-common.cc
46849 (riscv_option_optimization_table)
46850 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
46851 -fasynchronous-unwind-tables and -funwind-tables.
46852 * config.gcc (riscv*-*-linux*): Define
46853 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
46855 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
46857 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
46858 value of includedir.
46860 2023-01-30 Richard Biener <rguenther@suse.de>
46863 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
46866 2023-01-30 liuhongt <hongtao.liu@intel.com>
46868 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
46869 * doc/invoke.texi: Ditto.
46871 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
46873 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
46874 (stmt_may_terminate_function_p): If assuming return or EH
46875 volatile asm is safe.
46876 (find_always_executed_bbs): Fix handling of terminating BBS and
46877 infinite loops; add debug output.
46878 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
46880 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
46882 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
46883 off-by-one in checking the permissible shift-amount.
46885 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46887 * doc/extend.texi (Named Address Spaces): Update link to the
46890 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46892 * doc/standards.texi (Standards): Fix markup.
46894 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46896 * doc/standards.texi (Standards): Update link to Objective-C book.
46898 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46900 * doc/invoke.texi (Instrumentation Options): Update reference to
46903 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46905 * doc/standards.texi: Update Go1 link.
46907 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46909 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
46910 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
46913 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
46914 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
46916 * config/riscv/riscv-vector-builtins.cc
46917 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
46918 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
46919 (@pred_strided_store<mode>): Ditto.
46921 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46923 * config/riscv/vector.md (tail_policy_op_idx): Remove.
46924 (mask_policy_op_idx): Remove.
46925 (avl_type_op_idx): Remove.
46927 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
46929 PR tree-optimization/96373
46930 * tree.h (sign_mask_for): Declare.
46931 * tree.cc (sign_mask_for): New function.
46932 (signed_or_unsigned_type_for): For vector types, try to use the
46933 related_int_vector_mode.
46934 * genmatch.cc (commutative_op): Handle conditional internal functions.
46935 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
46937 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
46939 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
46940 Use the likely minimum VF when bounding the denominators to
46941 the estimated number of iterations.
46943 2023-01-27 Richard Biener <rguenther@suse.de>
46946 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
46947 and -Ofast FP environment side-effects.
46949 2023-01-27 Richard Biener <rguenther@suse.de>
46952 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
46953 Don't add crtfastmath.o for -shared.
46955 2023-01-27 Richard Biener <rguenther@suse.de>
46958 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
46961 2023-01-27 Richard Biener <rguenther@suse.de>
46964 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
46965 crtfastmath.o for -shared.
46967 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
46969 PR tree-optimization/108306
46970 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
46971 varying for shifts that are always out of void range.
46972 (operator_rshift::fold_range): Return [0, 0] not
46973 varying for shifts that are always out of void range.
46975 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
46977 PR tree-optimization/108447
46978 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
46979 Do not attempt to fold HONOR_NAN types.
46981 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46983 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
46984 Remove _m suffix for "vop_m" C++ overloaded API name.
46986 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46988 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
46989 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
46990 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
46992 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
46993 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
46994 (vbool64_t): Ditto.
46995 (vbool32_t): Ditto.
46996 (vbool16_t): Ditto.
47001 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
47002 (rvv_arg_type_info::get_tree_type): Ditto.
47003 (function_expander::use_contiguous_load_insn): Ditto.
47004 * config/riscv/vector.md (@pred_store<mode>): Ditto.
47006 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47008 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
47009 (vsetvl_discard_result_insn_p): New function.
47010 (reg_killed_by_bb_p): rename to find_reg_killed_by.
47011 (find_reg_killed_by): New name.
47012 (get_vl): allow it to be called by more functions.
47013 (has_vsetvl_killed_avl_p): Add condition.
47014 (get_avl): allow it to be called by more functions.
47015 (insn_should_be_added_p): New function.
47016 (get_all_nonphi_defs): Refine function.
47017 (get_all_sets): Ditto.
47018 (get_same_bb_set): New function.
47019 (any_insn_in_bb_p): Ditto.
47020 (any_set_in_bb_p): Ditto.
47021 (get_vl_vtype_info): Add VLMAX forward optimization.
47022 (source_equal_p): Fix issues.
47023 (extract_single_source): Refine.
47024 (avl_info::multiple_source_equal_p): New function.
47025 (avl_info::operator==): Adjust for final version.
47026 (vl_vtype_info::operator==): Ditto.
47027 (vl_vtype_info::same_avl_p): Ditto.
47028 (vector_insn_info::parse_insn): Ditto.
47029 (vector_insn_info::available_p): New function.
47030 (vector_insn_info::merge): Adjust for final version.
47031 (vector_insn_info::dump): Add hard_empty.
47032 (pass_vsetvl::hard_empty_block_p): New function.
47033 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
47034 (pass_vsetvl::forward_demand_fusion): Ditto.
47035 (pass_vsetvl::demand_fusion): Ditto.
47036 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
47037 (pass_vsetvl::compute_local_properties): Adjust for final version.
47038 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
47039 (pass_vsetvl::refine_vsetvls): Ditto.
47040 (pass_vsetvl::commit_vsetvls): Ditto.
47041 (pass_vsetvl::propagate_avl): New function.
47042 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
47043 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
47045 2023-01-27 Jakub Jelinek <jakub@redhat.com>
47048 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
47049 from size_t to int.
47051 2023-01-27 Jakub Jelinek <jakub@redhat.com>
47054 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
47055 redirection of calls to __builtin_trap in addition to redirection
47056 to __builtin_unreachable.
47058 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47060 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
47062 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47064 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
47065 (emit_vsetvl_insn): Ditto.
47067 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47069 * config/riscv/vector.md: Fix constraints.
47071 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47073 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
47075 2023-01-27 Patrick Palka <ppalka@redhat.com>
47076 Jakub Jelinek <jakub@redhat.com>
47078 * tree-core.h (tree_code_type, tree_code_length): For
47079 C++17 and later, add inline keyword, otherwise don't define
47080 the arrays, but declare extern arrays.
47081 * tree.cc (tree_code_type, tree_code_length): Define these
47082 arrays for C++14 and older.
47084 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47086 * config/riscv/riscv-vsetvl.h: Change it into public.
47088 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47090 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
47093 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47095 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
47097 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47099 * config/riscv/vector.md: Fix incorrect attributes.
47101 2023-01-27 Richard Biener <rguenther@suse.de>
47104 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
47105 Don't add crtfastmath.o for -shared.
47107 2023-01-27 Alexandre Oliva <oliva@gnu.org>
47109 * doc/options.texi (option, RejectNegative): Mention that
47110 -g-started options are also implicitly negatable.
47112 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
47114 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
47115 Use get_typenode_from_name to get fixed-width integer type
47117 * config/riscv/riscv-vector-builtins.def: Update define with
47118 fixed-width integer type nodes.
47120 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47122 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
47123 (real_insn_and_same_bb_p): New function.
47124 (same_bb_and_after_or_equal_p): Remove it.
47125 (before_p): New function.
47126 (reg_killed_by_bb_p): Ditto.
47127 (has_vsetvl_killed_avl_p): Ditto.
47128 (get_vl): Move location so that we can call it.
47129 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
47130 (available_occurrence_p): Ditto.
47131 (dominate_probability_p): Remove it.
47132 (can_backward_propagate_p): Remove it.
47133 (get_all_nonphi_defs): New function.
47134 (get_all_predecessors): Ditto.
47135 (any_insn_in_bb_p): Ditto.
47136 (insert_vsetvl): Adjust AVL REG.
47137 (source_equal_p): New function.
47138 (extract_single_source): Ditto.
47139 (avl_info::single_source_equal_p): Ditto.
47140 (avl_info::operator==): Adjust for AVL=REG.
47141 (vl_vtype_info::same_avl_p): Ditto.
47142 (vector_insn_info::set_demand_info): Remove it.
47143 (vector_insn_info::compatible_p): Adjust for AVL=REG.
47144 (vector_insn_info::compatible_avl_p): New function.
47145 (vector_insn_info::merge): Adjust AVL=REG.
47146 (vector_insn_info::dump): Ditto.
47147 (pass_vsetvl::merge_successors): Remove it.
47148 (enum fusion_type): New enum.
47149 (pass_vsetvl::get_backward_fusion_type): New function.
47150 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
47151 (pass_vsetvl::forward_demand_fusion): Ditto.
47152 (pass_vsetvl::demand_fusion): Ditto.
47153 (pass_vsetvl::prune_expressions): Ditto.
47154 (pass_vsetvl::compute_local_properties): Ditto.
47155 (pass_vsetvl::cleanup_vsetvls): Ditto.
47156 (pass_vsetvl::commit_vsetvls): Ditto.
47157 (pass_vsetvl::init): Ditto.
47158 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
47159 (enum merge_type): New enum.
47161 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47163 * config/riscv/riscv-vsetvl.cc
47164 (vector_infos_manager::vector_infos_manager): Add probability.
47165 (vector_infos_manager::dump): Ditto.
47166 (pass_vsetvl::compute_probabilities): Ditto.
47167 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
47169 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47171 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
47172 (vector_insn_info::merge): Ditto.
47173 (vector_insn_info::dump): Ditto.
47174 (pass_vsetvl::merge_successors): Ditto.
47175 (pass_vsetvl::backward_demand_fusion): Ditto.
47176 (pass_vsetvl::forward_demand_fusion): Ditto.
47177 (pass_vsetvl::commit_vsetvls): Ditto.
47178 * config/riscv/riscv-vsetvl.h: Ditto.
47180 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47182 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
47185 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47187 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
47189 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47191 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
47192 Add pre-check for redundant flow.
47194 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47196 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
47197 (vector_infos_manager::free_bitmap_vectors): Ditto.
47198 (pass_vsetvl::pre_vsetvl): Adjust codes.
47199 * config/riscv/riscv-vsetvl.h: New function declaration.
47201 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47203 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
47204 (vector_insn_info::set_demand_info): New function.
47205 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
47206 (pass_vsetvl::merge_successors): Ditto.
47207 (pass_vsetvl::compute_global_backward_infos): Ditto.
47208 (pass_vsetvl::backward_demand_fusion): Ditto.
47209 (pass_vsetvl::forward_demand_fusion): Ditto.
47210 (pass_vsetvl::demand_fusion): New function.
47211 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
47212 * config/riscv/riscv-vsetvl.h: New function declaration.
47214 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47216 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
47218 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47220 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
47221 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
47223 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47225 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
47226 (backward_propagate_worthwhile_p): Fix non-worthwhile.
47228 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47230 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
47232 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47234 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
47235 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
47236 (pass_vsetvl::commit_vsetvls): Ditto.
47237 * config/riscv/riscv-vsetvl.h: New function declaration.
47239 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47241 * config/riscv/vector.md:
47243 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47245 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
47246 pred_store for vse.
47247 * config/riscv/riscv-vector-builtins.cc
47248 (function_expander::add_mem_operand): Refine function.
47249 (function_expander::use_contiguous_load_insn): Adjust new
47251 (function_expander::use_contiguous_store_insn): Ditto.
47252 * config/riscv/riscv-vector-builtins.h: Refine function.
47253 * config/riscv/vector.md (@pred_store<mode>): New pattern.
47255 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47257 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
47259 2023-01-26 Marek Polacek <polacek@redhat.com>
47261 PR middle-end/108543
47262 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
47263 if it was previously set.
47265 2023-01-26 Jakub Jelinek <jakub@redhat.com>
47267 PR tree-optimization/108540
47268 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
47269 are singletons, use range_true even if op1 != op2
47270 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
47271 even if intersection of the ranges is empty and one has
47272 zero low bound and another zero high bound, use range_true_and_false
47273 rather than range_false.
47274 (foperator_not_equal::fold_range): If both op1 and op2
47275 are singletons, use range_false even if op1 != op2
47276 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
47277 even if intersection of the ranges is empty and one has
47278 zero low bound and another zero high bound, use range_true_and_false
47279 rather than range_true.
47281 2023-01-26 Jakub Jelinek <jakub@redhat.com>
47283 * value-relation.cc (kind_string): Add const.
47284 (rr_negate_table, rr_swap_table, rr_intersect_table,
47285 rr_union_table, rr_transitive_table): Add static const, change
47286 element type from relation_kind to unsigned char.
47287 (relation_negate, relation_swap, relation_intersect, relation_union,
47288 relation_transitive): Cast rr_*_table element to relation_kind.
47289 (relation_to_code): Add static const.
47290 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
47292 2023-01-26 Richard Biener <rguenther@suse.de>
47294 PR tree-optimization/108547
47295 * gimple-predicate-analysis.cc (value_sat_pred_p):
47298 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
47300 PR tree-optimization/108522
47301 * tree-object-size.cc (compute_object_offset): Make EXPR
47302 argument non-const. Call component_ref_field_offset.
47304 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
47306 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
47307 FEATURE_STRING field.
47309 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
47311 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
47313 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
47317 * gcc.cc: Provide default specs for Modula-2 so that when the
47318 language is not built-in better diagnostics are emitted for
47319 attempts to use .mod or .m2i file extensions.
47321 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
47323 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
47325 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
47327 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
47329 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
47331 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
47334 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
47336 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
47338 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
47340 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
47342 2023-01-25 Richard Biener <rguenther@suse.de>
47344 PR tree-optimization/108523
47345 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
47346 backedge value for the result when using predication to
47349 2023-01-25 Richard Biener <rguenther@suse.de>
47351 * doc/lto.texi (Command line options): Reword and update reference
47352 to removed lto_read_all_file_options.
47354 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
47356 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
47359 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
47361 * doc/contrib.texi: Add Jose E. Marchesi.
47363 2023-01-25 Jakub Jelinek <jakub@redhat.com>
47365 PR tree-optimization/108498
47366 * gimple-ssa-store-merging.cc (class store_operand_info):
47367 End coment with full stop rather than comma.
47368 (split_group): Likewise.
47369 (merged_store_group::apply_stores): Clear string_concatenation if
47370 start or end aren't on a byte boundary.
47372 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
47373 Jakub Jelinek <jakub@redhat.com>
47375 PR tree-optimization/108522
47376 * tree-object-size.cc (compute_object_offset): Use
47377 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
47379 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47381 * config/xtensa/xtensa.md:
47382 Fix exit from loops detecting references before overwriting in the
47385 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
47387 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
47388 do elimination but only for hard register.
47389 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
47390 calls of get_hard_regno.
47392 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
47394 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
47397 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
47400 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
47401 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
47404 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47406 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
47407 and only include 'csky/t-csky-linux' when enable multilib.
47408 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
47409 define it when disable multilib.
47411 2023-01-24 Richard Biener <rguenther@suse.de>
47413 PR tree-optimization/108500
47414 * dominance.h (calculate_dominance_info): Add parameter
47415 to indicate fast-query compute, defaulted to true.
47416 * dominance.cc (calculate_dominance_info): Honor
47417 fast-query compute parameter.
47418 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
47419 not compute the dominator fast-query DFS numbers.
47421 2023-01-24 Eric Biggers <ebiggers@google.com>
47424 * optc-save-gen.awk: Fix copy-and-paste error.
47426 2023-01-24 Jakub Jelinek <jakub@redhat.com>
47429 * cgraphbuild.cc: Include gimplify.h.
47430 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
47431 their corresponding DECL_VALUE_EXPR expressions after unsharing.
47433 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47436 * config.gcc (tm_file): Move the variable out of loop.
47438 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
47439 Yang Yujie <yangyujie@loongson.cn>
47442 * config/loongarch/loongarch.cc (loongarch_classify_address):
47443 Add precessint for CONST_INT.
47444 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
47445 (loongarch_print_operand): Increase the processing of '%c'.
47446 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
47447 And port the public operand modifiers information to this document.
47449 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47451 * doc/invoke.texi (-mbranch-protection): Update documentation.
47453 2023-01-23 Richard Biener <rguenther@suse.de>
47456 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
47458 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
47459 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
47460 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
47461 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
47463 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47465 * config/arm/aout.h (ra_auth_code): Add entry in enum.
47466 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
47467 to dwarf frame expression.
47468 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
47469 (arm_expand_prologue): Update frame related information and reg notes
47470 for pac/pacbit insn.
47471 (arm_regno_class): Check for pac pseudo reigster.
47472 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
47473 (arm_init_machine_status): Set pacspval_needed to zero.
47474 (arm_debugger_regno): Check for PAC register.
47475 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
47477 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
47478 (arm_unwind_emit): Update REG_CFA_REGISTER case._
47479 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
47480 (DWARF_PAC_REGNUM): Define.
47481 (IS_PAC_REGNUM): Likewise.
47482 (enum reg_class): Add PAC_REG entry.
47483 (machine_function): Add pacbti_needed state to structure.
47484 * config/arm/arm.md (RA_AUTH_CODE): Define.
47486 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47488 * config.gcc ($tm_file): Update variable.
47489 * config/arm/arm-mlib.h: Create new header file.
47490 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
47491 multilib arch directory.
47492 (MULTILIB_REUSE): Add multilib reuse rules.
47493 (MULTILIB_MATCHES): Add multilib match rules.
47495 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47497 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
47498 * config/arm/arm-tables.opt: Regenerate.
47499 * config/arm/arm-tune.md: Likewise.
47500 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
47501 * (-mfix-cmse-cve-2021-35465): Likewise.
47503 2023-01-23 Richard Biener <rguenther@suse.de>
47505 PR tree-optimization/108482
47506 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
47507 .LOOP_DIST_ALIAS calls.
47509 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47511 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
47512 * config/arm/arm-protos.h: Update.
47513 * config/arm/aarch-common-protos.h: Declare
47514 'aarch_bti_arch_check'.
47515 * config/arm/arm.cc (aarch_bti_enabled) Update.
47516 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
47517 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
47518 * config/arm/arm.md (bti_nop): New insn.
47519 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
47520 (aarch-bti-insert.o): New target.
47521 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
47522 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
47524 (gate): Make use of 'aarch_bti_arch_check'.
47525 * config/arm/arm-passes.def: New file.
47526 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
47528 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47530 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
47531 'aarch-bti-insert.o'.
47532 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
47534 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
47535 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
47536 (aarch64_output_mi_thunk)
47537 (aarch64_print_patchable_function_entry)
47538 (aarch64_file_end_indicate_exec_stack): Update renamed function
47539 calls to renamed functions.
47540 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
47541 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
47543 * config/aarch64/aarch64-bti-insert.cc: Delete.
47544 * config/arm/aarch-bti-insert.cc: New file including and
47545 generalizing code from aarch64-bti-insert.cc.
47546 * config/arm/aarch-common-protos.h: Update.
47548 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47550 * config/arm/arm.h (arm_arch8m_main): Declare it.
47551 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
47553 * config/arm/arm.cc (arm_arch8m_main): Define it.
47554 (arm_option_reconfigure_globals): Set arm_arch8m_main.
47555 (arm_compute_frame_layout, arm_expand_prologue)
47556 (thumb2_expand_return, arm_expand_epilogue)
47557 (arm_conditional_register_usage): Update for pac codegen.
47558 (arm_current_function_pac_enabled_p): New function.
47559 (aarch_bti_enabled) New function.
47560 (use_return_insn): Return zero when pac is enabled.
47561 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
47563 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
47564 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
47566 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47568 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
47569 mbranch-protection.
47571 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47572 Tejas Belagod <tbelagod@arm.com>
47574 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
47575 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
47577 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47578 Tejas Belagod <tbelagod@arm.com>
47579 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47581 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
47582 new pseudo register class _UVRSC_PAC.
47584 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47585 Tejas Belagod <tbelagod@arm.com>
47587 * config/arm/arm-c.cc (arm_cpu_builtins): Define
47588 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
47589 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
47591 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47592 Tejas Belagod <tbelagod@arm.com>
47594 * doc/sourcebuild.texi: Document arm_pacbti_hw.
47596 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47597 Tejas Belagod <tbelagod@arm.com>
47598 Richard Earnshaw <Richard.Earnshaw@arm.com>
47600 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
47601 -mbranch-protection option and initialize appropriate data structures.
47602 * config/arm/arm.opt (-mbranch-protection): New option.
47603 * doc/invoke.texi (Arm Options): Document it.
47605 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47606 Tejas Belagod <tbelagod@arm.com>
47608 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
47609 * config/arm/arm-cpus.in (pacbti): New feature.
47610 * doc/invoke.texi (Arm Options): Document it.
47612 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
47613 Tejas Belagod <tbelagod@arm.com>
47615 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
47616 (all_architectures): Fix comment.
47617 (aarch64_parse_extension): Rename return type, enum value names.
47618 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
47619 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
47620 Also rename corresponding enum values.
47621 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
47622 out aarch64_function_type and move it to common code as
47623 aarch_function_type in aarch-common.h.
47624 * config/aarch64/aarch64-protos.h: Include common types header,
47625 move out types aarch64_parse_opt_result and aarch64_key_type to
47627 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
47628 and functions out into aarch-common.h and aarch-common.cc. Fix up
47629 all the name changes resulting from the move.
47630 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
47632 * config/aarch64/aarch64.opt: Include aarch-common.h to import
47633 type move. Fix up name changes from factoring out common code and
47635 * config/arm/aarch-common-protos.h: Export factored out routines to both
47637 * config/arm/aarch-common.cc: Include newly factored out types.
47638 Move all mbranch-protection code and data structures from
47640 * config/arm/aarch-common.h: New header that declares types shared
47641 between aarch32 and aarch64 backends.
47642 * config/arm/arm-protos.h: Declare types and variables that are
47643 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
47644 aarch_ra_sign_scope and aarch_enable_bti.
47645 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
47646 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
47647 * config/arm/arm.cc: Add missing includes.
47649 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
47651 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
47653 2023-01-23 Richard Biener <rguenther@suse.de>
47655 PR tree-optimization/108449
47656 * cgraphunit.cc (check_global_declaration): Do not turn
47657 undefined statics into externs.
47659 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
47661 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
47662 and HI input modes.
47663 * config/pru/pru.md (clz): Fix generated code for QI and HI
47666 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
47668 * config/v850/v850.cc (v850_select_section): Put const volatile
47669 objects into read-only sections.
47671 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
47673 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
47674 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
47675 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
47677 2023-01-20 Jakub Jelinek <jakub@redhat.com>
47679 PR tree-optimization/108457
47680 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
47681 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
47682 argument instead of a temporary. Formatting fixes.
47684 2023-01-19 Jakub Jelinek <jakub@redhat.com>
47686 PR tree-optimization/108447
47687 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
47688 (relation_tests): Add self-tests for relation_{intersect,union}
47690 * selftest.h (relation_tests): Declare.
47691 * function-tests.cc (test_ranges): Call it.
47693 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
47696 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
47697 invalid third argument to __builtin_ia32_prefetch.
47699 2023-01-19 Jakub Jelinek <jakub@redhat.com>
47701 PR middle-end/108459
47702 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
47703 than fold_unary for NEGATE_EXPR.
47705 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
47708 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
47709 comment. Move assert about alignment a bit later.
47711 2023-01-19 Jakub Jelinek <jakub@redhat.com>
47713 PR tree-optimization/108440
47714 * tree-ssa-forwprop.cc: Include gimple-range.h.
47715 (simplify_rotate): For the forms with T2 wider than T and shift counts of
47716 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
47717 to B. For the forms with T2 wider than T and shift counts of
47718 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
47719 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
47720 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
47721 pass specific ranger instead of get_global_range_query.
47722 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
47725 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
47727 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
47728 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
47730 (aarch64_simd_vec_copy_lane<mode>): Likewise.
47731 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
47733 2023-01-19 Alexandre Oliva <oliva@adacore.com>
47736 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
47737 within debug insns.
47739 2023-01-18 Martin Jambor <mjambor@suse.cz>
47742 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
47743 lcone_of chain also do not need the body.
47745 2023-01-18 Richard Biener <rguenther@suse.de>
47748 2022-12-16 Richard Biener <rguenther@suse.de>
47750 PR middle-end/108086
47751 * tree-inline.cc (remap_ssa_name): Do not unshare the
47752 result from the decl_map.
47754 2023-01-18 Murray Steele <murray.steele@arm.com>
47757 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
47759 (__arm_vst1q_p_s8): Likewise.
47760 (__arm_vld1q_z_u8): Likewise.
47761 (__arm_vld1q_z_s8): Likewise.
47762 (__arm_vst1q_p_u16): Likewise.
47763 (__arm_vst1q_p_s16): Likewise.
47764 (__arm_vld1q_z_u16): Likewise.
47765 (__arm_vld1q_z_s16): Likewise.
47766 (__arm_vst1q_p_u32): Likewise.
47767 (__arm_vst1q_p_s32): Likewise.
47768 (__arm_vld1q_z_u32): Likewise.
47769 (__arm_vld1q_z_s32): Likewise.
47770 (__arm_vld1q_z_f16): Likewise.
47771 (__arm_vst1q_p_f16): Likewise.
47772 (__arm_vld1q_z_f32): Likewise.
47773 (__arm_vst1q_p_f32): Likewise.
47775 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47777 * config/xtensa/xtensa.md (xorsi3_internal):
47778 Rename from the original of "xorsi3".
47779 (xorsi3): New expansion pattern that emits addition rather than
47780 bitwise-XOR when the second source is a constant of -2147483648
47783 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
47784 Andrew Pinski <apinski@marvell.com>
47787 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
47788 vec_vsubcuqP with vec_vsubcuq.
47790 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
47793 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
47794 support for invalid uses of MMA opaque type in function arguments.
47796 2023-01-18 liuhongt <hongtao.liu@intel.com>
47799 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
47800 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
47801 -share or -mno-daz-ftz is specified.
47802 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
47803 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
47805 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
47807 * config/bpf/bpf.cc (bpf_option_override): Disable
47810 2023-01-17 Jakub Jelinek <jakub@redhat.com>
47812 PR tree-optimization/106523
47813 * tree-ssa-forwprop.cc (simplify_rotate): For the
47814 patterns with (-Y) & (B - 1) in one operand's shift
47815 count and Y in another, if T2 has wider precision than T,
47816 punt if Y could have a value in [B, B2 - 1] range.
47818 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
47821 * config/i386/i386.cc (x86_output_mi_thunk): Disable
47822 -mforce-indirect-call for PIC in 32-bit mode.
47824 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
47827 * ipa-modref.cc (modref_access_analysis::analyze): Use
47828 find_always_executed_bbs.
47829 * ipa-sra.cc (process_scan_results): Likewise.
47830 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
47831 (find_always_executed_bbs): New function.
47832 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
47833 (find_always_executed_bbs): Declare.
47835 2023-01-16 Jan Hubicka <jh@suse.cz>
47837 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
47838 by TARGET_USE_SCATTER.
47839 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
47840 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
47841 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
47842 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
47843 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
47844 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
47846 2023-01-16 Richard Biener <rguenther@suse.de>
47849 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
47851 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
47855 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
47856 (__ARM_mve_coerce3): Likewise.
47858 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47860 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
47862 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47864 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
47865 (number_of_iterations_bitcount): Add call to the above.
47866 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
47867 c[lt]z idiom recognition.
47869 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47871 * doc/sourcebuild.texi: Add missing target attributes.
47873 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47875 PR tree-optimization/94793
47876 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
47878 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
47879 (number_of_iterations_cltz_complement): New.
47880 (number_of_iterations_bitcount): Add call to the above.
47882 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
47884 * doc/extend.texi (Common Function Attributes): Fix grammar.
47886 2023-01-16 Jakub Jelinek <jakub@redhat.com>
47889 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
47890 * config/riscv/riscv-vsetvl.cc: Likewise.
47892 2023-01-16 Jakub Jelinek <jakub@redhat.com>
47895 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
47896 disable -Winit-self using pragma GCC diagnostic ignored.
47897 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
47899 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
47900 _mm256_undefined_si256): Likewise.
47901 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
47902 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
47903 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
47904 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
47906 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
47909 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
47910 support for invalid uses in inline asm, factor out the checking and
47911 erroring to lambda function check_and_error_invalid_use.
47913 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
47915 PR tree-optimization/107608
47916 * range-op-float.cc (range_operator_float::fold_range): Avoid
47917 folding into INF when flag_trapping_math.
47918 * value-range.h (frange::known_isinf): Return false for possible NANs.
47920 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47922 * config.gcc (csky-*-*): Support --with-float=softfp.
47924 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47926 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
47927 Rename to xtensa_adjust_reg_alloc_order.
47928 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
47929 Ditto. And also remove code to reorder register numbers for
47930 leaf functions, rename the tables, and adjust the allocation
47931 order for the call0 ABI to use register A0 more.
47932 (xtensa_leaf_regs): Remove.
47933 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
47934 (order_regs_for_local_alloc): Rename as the above.
47935 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
47937 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
47939 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
47940 Change to define_insn_and_split to fold ldr+dup to ld1rq.
47941 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
47943 2023-01-14 Alexandre Oliva <oliva@adacore.com>
47945 * hash-table.h (is_deleted): Precheck !is_empty.
47946 (mark_deleted): Postcheck !is_empty.
47947 (copy constructor): Test is_empty before is_deleted.
47949 2023-01-14 Alexandre Oliva <oliva@adacore.com>
47952 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
47955 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
47957 PR rtl-optimization/108274
47958 * function.cc (thread_prologue_and_epilogue_insns): Also update the
47959 DF information for calls in a few more cases.
47961 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
47963 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
47964 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
47966 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
47967 (MAX_SYNC_LIBFUNC_SIZE): Define.
47968 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
47970 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
47971 libcall when sync libcalls are disabled.
47972 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
47973 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
47974 are disabled on 32-bit target.
47975 * config/pa/pa.opt (matomic-libcalls): New option.
47976 * doc/invoke.texi (HPPA Options): Update.
47978 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
47980 PR rtl-optimization/108117
47981 PR rtl-optimization/108132
47982 * sched-deps.cc (deps_analyze_insn): Do not schedule across
47983 calls before reload.
47985 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47987 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
47988 options for -mlibarch.
47989 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
47990 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
47992 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
47994 * attribs.cc (strict_flex_array_level_of): Move this function to ...
47995 * attribs.h (strict_flex_array_level_of): Remove the declaration.
47996 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
47997 replace the referece to strict_flex_array_level_of with
47998 DECL_NOT_FLEXARRAY.
47999 * tree.cc (component_ref_size): Likewise.
48001 2023-01-13 Richard Biener <rguenther@suse.de>
48004 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
48005 crtfastmath.o for -shared.
48006 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
48008 2023-01-13 Richard Biener <rguenther@suse.de>
48011 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
48012 crtfastmath.o for -shared.
48013 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
48015 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
48018 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
48020 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
48022 (TARGET_DWARF_FRAME_REG_MODE): Define.
48024 2023-01-13 Richard Biener <rguenther@suse.de>
48027 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
48028 update EH info on the fly.
48030 2023-01-13 Richard Biener <rguenther@suse.de>
48032 PR tree-optimization/108387
48033 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
48034 value before inserting expression into the tables.
48036 2023-01-12 Andrew Pinski <apinski@marvell.com>
48037 Roger Sayle <roger@nextmovesoftware.com>
48039 PR tree-optimization/92342
48040 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
48041 Use tcc_comparison and :c for the multiply.
48042 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
48044 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
48045 Richard Sandiford <richard.sandiford@arm.com>
48048 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
48049 Check DECL_PACKED for bitfield.
48050 (aarch64_layout_arg): Warn when parameter passing ABI changes.
48051 (aarch64_function_arg_boundary): Do not warn here.
48052 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
48055 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
48056 Richard Sandiford <richard.sandiford@arm.com>
48058 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
48060 (aarch64_layout_arg): Factorize warning conditions.
48061 (aarch64_function_arg_boundary): Fix typo.
48062 * function.cc (currently_expanding_function_start): New variable.
48063 (expand_function_start): Handle
48064 currently_expanding_function_start.
48065 * function.h (currently_expanding_function_start): Declare.
48067 2023-01-12 Richard Biener <rguenther@suse.de>
48069 PR tree-optimization/99412
48070 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
48071 (swap_ops_for_binary_stmt): Remove reduction handling.
48072 (rewrite_expr_tree_parallel): Adjust.
48073 (reassociate_bb): Likewise.
48074 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
48076 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
48078 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
48079 Rearrange the emitting codes.
48081 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
48083 * config/xtensa/xtensa.md (*btrue):
48084 Correct value of the attribute "length" that depends on
48085 TARGET_DENSITY and operands, and add '?' character to the register
48086 constraint of the compared operand.
48088 2023-01-12 Alexandre Oliva <oliva@adacore.com>
48090 * hash-table.h (expand): Check elements and deleted counts.
48091 (verify): Likewise.
48093 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
48095 PR tree-optimization/71343
48096 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
48097 the value number of the expression X << C the same as the value
48098 number for the multiplication X * (1<<C).
48100 2023-01-11 David Faust <david.faust@oracle.com>
48103 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
48104 floating point modes.
48106 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
48108 PR tree-optimization/108199
48109 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
48110 for bit-field references.
48112 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
48114 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
48115 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
48116 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
48117 OPTION_MASK_P10_FUSION.
48119 2023-01-11 Richard Biener <rguenther@suse.de>
48121 PR tree-optimization/107767
48122 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
48123 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
48124 * tree-switch-conversion.cc (switch_conversion::collect):
48125 Count unique non-default targets accounting for later
48126 merging opportunities.
48128 2023-01-11 Martin Liska <mliska@suse.cz>
48130 PR middle-end/107976
48131 * params.opt: Limit JT params.
48132 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
48134 2023-01-11 Richard Biener <rguenther@suse.de>
48136 PR tree-optimization/108352
48137 * tree-ssa-threadbackward.cc
48138 (back_threader_profitability::profitable_path_p): Adjust
48139 heuristic that allows non-multi-way branch threads creating
48141 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
48142 (--param fsm-scale-path-stmts): Adjust.
48143 * params.opt (--param=fsm-scale-path-blocks=): Remove.
48144 (-param=fsm-scale-path-stmts=): Adjust description.
48146 2023-01-11 Richard Biener <rguenther@suse.de>
48148 PR tree-optimization/108353
48149 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
48151 (add_ssa_edge): Simplify.
48152 (add_control_edge): Likewise.
48153 (ssa_prop_init): Likewise.
48154 (ssa_prop_fini): Likewise.
48155 (ssa_propagation_engine::ssa_propagate): Likewise.
48157 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
48159 * config/s390/s390.md (*not<mode>): New pattern.
48161 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
48163 * config/xtensa/xtensa.cc (xtensa_insn_cost):
48164 Let insn cost for size be obtained by applying COSTS_N_INSNS()
48165 to instruction length and then dividing by 3.
48167 2023-01-10 Richard Biener <rguenther@suse.de>
48169 PR tree-optimization/106293
48170 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
48171 process degenerate PHI defs.
48173 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
48175 PR rtl-optimization/106421
48176 * cprop.cc (bypass_block): Check that DEST is local to this
48177 function (non-NULL) before calling find_edge.
48179 2023-01-10 Martin Jambor <mjambor@suse.cz>
48182 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
48183 sort_replacements, lookup_first_base_replacement and
48184 m_sorted_replacements_p.
48185 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
48186 (ipa_param_body_adjustments::register_replacement): Set
48187 m_sorted_replacements_p to false.
48188 (compare_param_body_replacement): New function.
48189 (ipa_param_body_adjustments::sort_replacements): Likewise.
48190 (ipa_param_body_adjustments::common_initialization): Call
48192 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
48193 m_sorted_replacements_p.
48194 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
48196 (ipa_param_body_adjustments::lookup_first_base_replacement): New
48198 (ipa_param_body_adjustments::modify_call_stmt): Use
48199 lookup_first_base_replacement.
48200 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
48201 adjustments->sort_replacements.
48203 2023-01-10 Richard Biener <rguenther@suse.de>
48205 PR tree-optimization/108314
48206 * tree-vect-stmts.cc (vectorizable_condition): Do not
48207 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
48209 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
48211 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
48213 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
48215 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
48217 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
48219 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
48220 defines for soft float abi.
48222 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
48224 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
48225 (smart_bclri): Likewise.
48226 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
48227 (fast_bclri): Likewise.
48228 (fast_cmpnesi_i): Likewise.
48229 (*fast_cmpltsi_i): Likewise.
48230 (*fast_cmpgeusi_i): Likewise.
48232 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
48234 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
48235 flag_fp_int_builtin_inexact || !flag_trapping_math.
48236 (<frm_pattern><mode>2): Likewise.
48238 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
48240 * config/s390/s390.cc (s390_register_info): Check call_used_regs
48241 instead of hard-coding the register numbers for call saved
48243 (s390_optimize_register_info): Likewise.
48245 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
48247 * doc/gm2.texi (Overview): Fix @node markers.
48248 (Using): Likewise. Remove subsections that were moved to Overview
48249 from the menu and move others around.
48251 2023-01-09 Richard Biener <rguenther@suse.de>
48253 PR middle-end/108209
48254 * genmatch.cc (commutative_op): Fix return value for
48255 user-id with non-commutative first replacement.
48257 2023-01-09 Jakub Jelinek <jakub@redhat.com>
48260 * calls.cc (expand_call): For calls with
48261 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
48264 2023-01-09 Richard Biener <rguenther@suse.de>
48266 PR middle-end/69482
48267 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
48268 qualified accesses also force objects to memory.
48270 2023-01-09 Martin Liska <mliska@suse.cz>
48273 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
48274 NULL (deleleted value) to a hash_set.
48276 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
48278 * config/xtensa/xtensa.md (*splice_bits):
48279 New insn_and_split pattern.
48281 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
48283 * config/xtensa/xtensa.cc
48284 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
48285 New helper functions.
48286 (xtensa_set_return_address, xtensa_output_mi_thunk):
48287 Change to use the helper function.
48288 (xtensa_emit_adjust_stack_ptr): Ditto.
48289 And also change to try reusing the content of scratch register
48290 A9 if the register is not modified in the function body.
48292 2023-01-07 LIU Hao <lh_mouse@126.com>
48294 PR middle-end/108300
48295 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
48296 before <windows.h>.
48297 * diagnostic-color.cc: Likewise.
48298 * plugin.cc: Likewise.
48299 * prefix.cc: Likewise.
48301 2023-01-06 Joseph Myers <joseph@codesourcery.com>
48303 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
48304 for handling real integer types.
48306 2023-01-06 Tamar Christina <tamar.christina@arm.com>
48309 2022-12-12 Tamar Christina <tamar.christina@arm.com>
48311 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
48312 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
48313 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
48314 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
48315 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
48316 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
48317 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
48318 (aarch64_simd_dupv2hf): New.
48319 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
48321 * config/aarch64/iterators.md (VHSDF_P): New.
48322 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
48323 Vel, q, vp): Add V2HF.
48324 * config/arm/types.md (neon_fp_reduc_add_h): New.
48326 2023-01-06 Martin Liska <mliska@suse.cz>
48328 PR middle-end/107966
48329 * doc/options.texi: Fix Var documentation in internal manual.
48331 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
48334 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
48336 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
48337 RTL expansion to allow condition (mask) to be shared/reused,
48338 by avoiding overwriting pseudos and adding REG_EQUAL notes.
48340 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
48342 * common.opt: Add -static-libgm2.
48343 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
48344 * doc/gm2.texi: Document static-libgm2.
48345 * gcc.cc (driver_handle_option): Allow static-libgm2.
48347 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
48349 * common/config/i386/i386-common.cc (processor_alias_table):
48350 Use CPU_ZNVER4 for znver4.
48351 * config/i386/i386.md: Add znver4.md.
48352 * config/i386/znver4.md: New.
48354 2023-01-04 Jakub Jelinek <jakub@redhat.com>
48356 PR tree-optimization/108253
48357 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
48360 2023-01-04 Jakub Jelinek <jakub@redhat.com>
48362 PR middle-end/108237
48363 * generic-match-head.cc: Include tree-pass.h.
48364 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
48365 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
48366 resp. PROP_gimple_lvec property set.
48368 2023-01-04 Jakub Jelinek <jakub@redhat.com>
48370 PR sanitizer/108256
48371 * convert.cc (do_narrow): Punt for MULT_EXPR if original
48372 type doesn't wrap around and -fsanitize=signed-integer-overflow
48374 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
48376 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
48378 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
48379 * common/config/i386/i386-common.cc: Add Emeraldrapids.
48381 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
48383 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
48386 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
48388 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
48389 default constructor to initialize it.
48390 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
48391 for last and iterate to handle recursive calls. Delete leftover
48392 candidates at the end.
48393 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
48395 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
48396 gc_candidate bit when a clone is used.
48398 2023-01-03 Florian Weimer <fweimer@redhat.com>
48401 2023-01-02 Florian Weimer <fweimer@redhat.com>
48403 * dwarf2cfi.cc (init_return_column_size): Remove.
48404 (init_one_dwarf_reg_size): Adjust.
48405 (generate_dwarf_reg_sizes): New function. Extracted
48406 from expand_builtin_init_dwarf_reg_sizes.
48407 (expand_builtin_init_dwarf_reg_sizes): Call
48408 generate_dwarf_reg_sizes.
48409 * target.def (init_dwarf_reg_sizes_extra): Adjust
48411 * config/msp430/msp430.cc
48412 (msp430_init_dwarf_reg_sizes_extra): Adjust.
48413 * config/rs6000/rs6000.cc
48414 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
48415 * doc/tm.texi: Update.
48417 2023-01-03 Florian Weimer <fweimer@redhat.com>
48420 2023-01-02 Florian Weimer <fweimer@redhat.com>
48422 * debug.h (dwarf_reg_sizes_constant): Declare.
48423 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
48425 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
48427 PR tree-optimization/105043
48428 * doc/extend.texi (Object Size Checking): Split out into two
48429 subsections and mention _FORTIFY_SOURCE.
48431 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
48433 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
48434 RTL expansion to allow condition (mask) to be shared/reused,
48435 by avoiding overwriting pseudos and adding REG_EQUAL notes.
48437 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
48440 * config/i386/i386-features.cc
48441 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
48442 the gain/cost of converting a MEM operand.
48444 2023-01-03 Jakub Jelinek <jakub@redhat.com>
48446 PR middle-end/108264
48447 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
48448 from source which doesn't have scalar integral mode first convert
48451 2023-01-03 Jakub Jelinek <jakub@redhat.com>
48453 PR rtl-optimization/108263
48454 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
48457 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
48460 * config/i386/lujiazui.md (lujiazui_div): New automaton.
48461 (lua_div): New unit.
48462 (lua_idiv_qi): Correct unit in the reservation.
48463 (lua_idiv_qi_load): Ditto.
48464 (lua_idiv_hi): Ditto.
48465 (lua_idiv_hi_load): Ditto.
48466 (lua_idiv_si): Ditto.
48467 (lua_idiv_si_load): Ditto.
48468 (lua_idiv_di): Ditto.
48469 (lua_idiv_di_load): Ditto.
48470 (lua_fdiv_SF): Ditto.
48471 (lua_fdiv_SF_load): Ditto.
48472 (lua_fdiv_DF): Ditto.
48473 (lua_fdiv_DF_load): Ditto.
48474 (lua_fdiv_XF): Ditto.
48475 (lua_fdiv_XF_load): Ditto.
48476 (lua_ssediv_SF): Ditto.
48477 (lua_ssediv_load_SF): Ditto.
48478 (lua_ssediv_V4SF): Ditto.
48479 (lua_ssediv_load_V4SF): Ditto.
48480 (lua_ssediv_V8SF): Ditto.
48481 (lua_ssediv_load_V8SF): Ditto.
48482 (lua_ssediv_SD): Ditto.
48483 (lua_ssediv_load_SD): Ditto.
48484 (lua_ssediv_V2DF): Ditto.
48485 (lua_ssediv_load_V2DF): Ditto.
48486 (lua_ssediv_V4DF): Ditto.
48487 (lua_ssediv_load_V4DF): Ditto.
48489 2023-01-02 Florian Weimer <fweimer@redhat.com>
48491 * debug.h (dwarf_reg_sizes_constant): Declare.
48492 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
48494 2023-01-02 Florian Weimer <fweimer@redhat.com>
48496 * dwarf2cfi.cc (init_return_column_size): Remove.
48497 (init_one_dwarf_reg_size): Adjust.
48498 (generate_dwarf_reg_sizes): New function. Extracted
48499 from expand_builtin_init_dwarf_reg_sizes.
48500 (expand_builtin_init_dwarf_reg_sizes): Call
48501 generate_dwarf_reg_sizes.
48502 * target.def (init_dwarf_reg_sizes_extra): Adjust
48504 * config/msp430/msp430.cc
48505 (msp430_init_dwarf_reg_sizes_extra): Adjust.
48506 * config/rs6000/rs6000.cc
48507 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
48508 * doc/tm.texi: Update.
48510 2023-01-02 Jakub Jelinek <jakub@redhat.com>
48512 * gcc.cc (process_command): Update copyright notice dates.
48513 * gcov-dump.cc (print_version): Ditto.
48514 * gcov.cc (print_version): Ditto.
48515 * gcov-tool.cc (print_version): Ditto.
48516 * gengtype.cc (create_file): Ditto.
48517 * doc/cpp.texi: Bump @copying's copyright year.
48518 * doc/cppinternals.texi: Ditto.
48519 * doc/gcc.texi: Ditto.
48520 * doc/gccint.texi: Ditto.
48521 * doc/gcov.texi: Ditto.
48522 * doc/install.texi: Ditto.
48523 * doc/invoke.texi: Ditto.
48525 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
48526 Uroš Bizjak <ubizjak@gmail.com>
48528 * config/i386/i386.md (extendditi2): New define_insn.
48529 (define_split): Use DWIH mode iterator to treat new extendditi2
48530 identically to existing extendsidi2_1.
48531 (define_peephole2): Likewise.
48532 (define_peephole2): Likewise.
48533 (define_Split): Likewise.
48536 Copyright (C) 2023 Free Software Foundation, Inc.
48538 Copying and distribution of this file, with or without modification,
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