1 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
3 * config/arc/arc-protos.h (emit_shift): Delete prototype.
4 (arc_pre_reload_split): New function prototype.
5 * config/arc/arc.cc (emit_shift): Delete function.
6 (arc_pre_reload_split): New predicate function, copied from i386,
7 to schedule define_insn_and_split splitters to the split1 pass.
8 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
11 (shift_si3): Move after other shift patterns, and disable when
12 operands[2] is one (which is handled by its own define_insn).
13 Use shiftr4_operator, instead of shift4_operator, as this is no
14 longer used for left shifts.
15 (shift_si3_loop): Likewise. Additionally remove match_scratch.
16 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
17 (*ashrsi3_nobs): Likewise.
18 (*lshrsi3_nobs): Likewise.
19 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
20 (add_shift): Rename define_insn from *add_shift.
21 * config/arc/predicates.md (shiftl4_operator): Delete.
22 (shift4_operator): Delete.
24 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
26 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
27 Change type attribute to "unary", as this doesn't have operands[2].
28 Change length attribute to "*,4" to allow compact representation.
29 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
30 insn type attribute to "unary", as this doesn't have operands[2].
31 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
32 insn type attribute to "unary", as this doesn't have operands[2].
34 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
36 PR rtl-optimization/110701
37 * combine.cc (record_dead_and_set_regs_1): Split comment into
38 pieces placed before the relevant clauses. When the SET_DEST
39 is a partial_subreg_p, mark the bits outside of the updated
40 portion of the destination as undefined.
42 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
45 * opt-read.awk: Drop multidimensional arrays.
46 * opth-gen.awk: Ditto.
48 2023-10-04 Xi Ruoyao <xry111@xry111.site>
50 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
51 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
53 2023-10-04 Jakub Jelinek <jakub@redhat.com>
56 * match.pd (x == cstN ? cst4 : cst3): Use
57 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
58 Fix comment typo. Formatting fix.
59 (a?~t:t -> (-(a))^t): Always convert to type rather
60 than using build_nonstandard_integer_type. Perform negation
61 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
63 2023-10-04 Jakub Jelinek <jakub@redhat.com>
65 PR tree-optimization/111668
66 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
67 a ? 0 : -1 cases before the powerof2cst cases and differentiate
68 between 1-bit precision types, larger precision boolean types
69 and other integral types. Fix comment pastos and formatting.
71 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
73 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
74 pointers rather than range_info_get_range.
76 2023-10-03 Martin Jambor <mjambor@suse.cz>
78 * ipa-modref.h (modref_summary::dump): Make const.
79 * ipa-modref.cc (modref_summary::dump): Likewise.
80 (dump_lto_records): Dump to out instead of dump_file.
82 2023-10-03 Martin Jambor <mjambor@suse.cz>
85 * ipa-param-manipulation.cc
86 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
87 return uses of PARAM will be removed.
88 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
89 * ipa-sra.cc (isra_param_desc): New fields
90 remove_only_when_retval_removed and split_only_when_retval_removed.
91 (struct gensum_param_desc): Likewise. Fix comment long line.
92 (ipa_sra_function_summaries::duplicate): Copy the new flags.
93 (dump_gensum_param_descriptor): Dump the new flags.
94 (dump_isra_param_descriptor): Likewise.
95 (isra_track_scalar_value_uses): New parameter desc. Set its flag
96 remove_only_when_retval_removed when encountering a simple return.
97 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
98 with desc. Pass it to isra_track_scalar_value_uses and set its
100 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
101 parameter. If there is a direct return use, mark any..
102 (create_parameter_descriptors): Pass the whole parameter descriptor to
103 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
104 (process_scan_results): Copy the new flags.
105 (isra_write_node_summary): Stream the new flags.
106 (isra_read_node_info): Likewise.
107 (adjust_parameter_descriptions): Check that transformations
108 requring return removal only happen when return value is removed.
109 Restructure main loop. Adjust dump message.
111 2023-10-03 Martin Jambor <mjambor@suse.cz>
114 * cgraph.h (cgraph_edge): Add a parameter to
115 redirect_call_stmt_to_callee.
116 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
117 parameter to modify_call.
118 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
119 parameter killed_ssas, pass it to padjs->modify_call.
120 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
121 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
122 Instead of substituting uses, invoke purge_transitive_uses. If
123 hash of killed SSAs has not been provided, create a temporary one
124 and release SSAs that have been added to it.
125 * tree-inline.cc (redirect_all_calls): Create
126 id->killed_new_ssa_names earlier, pass it to edge redirection,
128 (copy_body): Release SSAs in id->killed_new_ssa_names.
130 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
132 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
133 * tree-vrp.cc (vrp_pass_num): Remove.
134 (pass_vrp::my_pass): Remove.
135 (pass_vrp::pass_vrp): Add warn_p as a parameter.
136 (pass_vrp::final_p): New.
137 (pass_vrp::set_pass_param): Set final_p param.
138 (pass_vrp::execute): Call execute_range_vrp with no conditions.
139 (make_pass_vrp): Pass additional parameter.
140 (make_pass_early_vrp): Ditto.
142 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
144 * tree-ssanames.cc (set_range_info): Return true only if the
145 current value changes.
147 2023-10-03 David Malcolm <dmalcolm@redhat.com>
149 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
150 prefixes to text_info fields.
151 (diagnostic_report_diagnostic): Likewise.
152 (verbatim): Use text_info ctor.
153 (simple_diagnostic_path::add_event): Likewise.
154 (simple_diagnostic_path::add_thread_event): Likewise.
155 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
156 "m_" prefixes to text_info fields.
157 (dump_context::dump_printf_va): Use text_info ctor.
158 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
159 (graphviz_out::print): Likewise.
160 * opt-problem.cc (opt_problem::opt_problem): Likewise.
161 * pretty-print.cc (pp_format): Update for "m_" prefixes to
163 (pp_printf): Use text_info ctor.
164 (pp_verbatim): Likewise.
165 (assert_pp_format_va): Likewise.
166 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
168 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
170 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
171 prefixes to text_info fields.
172 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
174 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
176 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
177 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
178 (*scc_insn): Don't split to a conditional move sequence for LTU.
180 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
182 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
183 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
184 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
185 (load_pair_dw_<DX:mode><DX2:mode>)
186 (store_pair_sw_<SX:mode><SX2:mode>)
187 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
188 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
189 (*extend<SHORT:mode><GPI:mode>2_aarch64)
190 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
191 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
192 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
193 (add<mode>3_compare0, *addsi3_compare0_uxtw)
194 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
195 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
196 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
197 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
198 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
199 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
200 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
201 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
202 (*aarch64_ashl_sisd_or_int_<mode>3)
203 (*aarch64_lshr_sisd_or_int_<mode>3)
204 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
205 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
206 (<optab><fcvt_target><GPF:mode>2)
207 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
208 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
209 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
211 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
212 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
213 (*aarch64_mul_unpredicated_<mode>)
214 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
215 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
216 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
217 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
218 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
219 (@aarch64_sve_<sve_int_op>_lane_<mode>)
220 (@aarch64_sve_add_mul_lane_<mode>)
221 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
222 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
223 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
224 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
225 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
226 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
227 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
228 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
229 (@aarch64_sve_qadd_<sve_int_op><mode>)
230 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
231 (@aarch64_sve_sub_<sve_int_op><mode>)
232 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
233 (@aarch64_sve_qsub_<sve_int_op><mode>)
234 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
235 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
236 (@aarch64_pred_<sve_int_op><mode>)
237 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
238 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
239 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
240 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
241 (*cond_<sve_fp_op><mode>_any_relaxed)
242 (*cond_<sve_fp_op><mode>_any_strict)
243 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
244 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
245 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
246 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
247 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
248 (*aarch64_sve_mov<mode>, aarch64_wrffr)
249 (mask_scatter_store<mode><v_int_container>)
250 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
251 (*mask_scatter_store<mode><v_int_container>_sxtw)
252 (*mask_scatter_store<mode><v_int_container>_uxtw)
253 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
254 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
255 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
256 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
257 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
258 (vec_series<mode>, @extract_<last_op>_<mode>)
259 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
260 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
261 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
262 (@cond_<optab><mode>)
263 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
264 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
265 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
266 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
267 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
268 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
269 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
270 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
271 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
272 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
273 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
274 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
275 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
276 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
277 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
278 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
279 (*cond_bic<mode>_2, *cond_bic<mode>_any)
280 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
281 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
282 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
283 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
284 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
285 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
286 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
287 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
288 (*cond_<optab><mode>_2_const_relaxed)
289 (*cond_<optab><mode>_2_const_strict)
290 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
291 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
292 (*cond_<optab><mode>_any_const_relaxed)
293 (*cond_<optab><mode>_any_const_strict)
294 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
295 (*cond_add<mode>_2_const_strict)
296 (*cond_add<mode>_any_const_relaxed)
297 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
298 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
299 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
300 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
301 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
302 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
303 (*aarch64_pred_abd<mode>_strict)
304 (*aarch64_cond_abd<mode>_2_relaxed)
305 (*aarch64_cond_abd<mode>_2_strict)
306 (*aarch64_cond_abd<mode>_3_relaxed)
307 (*aarch64_cond_abd<mode>_3_strict)
308 (*aarch64_cond_abd<mode>_any_relaxed)
309 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
310 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
311 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
312 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
313 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
314 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
315 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
316 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
317 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
318 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
319 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
320 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
321 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
322 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
323 (@aarch64_sve_<sve_fp_op>vnx4sf)
324 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
325 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
326 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
327 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
328 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
329 (@aarch64_fold_extract_vector_<last_op>_<mode>)
330 (@aarch64_sve_splice<mode>)
331 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
332 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
333 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
334 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
335 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
336 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
337 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
338 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
339 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
340 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
341 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
342 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
343 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
344 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
345 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
346 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
347 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
349 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
350 (load_pair<DREG:mode><DREG2:mode>)
351 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
352 (aarch64_simd_mov_from_<mode>low)
353 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
354 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
355 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
356 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
357 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
358 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
359 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
360 (*aarch64_combinez_be<mode>)
361 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
362 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
363 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
365 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
367 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
368 in new compact pattern syntax.
370 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
372 * gensupport.cc (convert_syntax): Updated to support unordered
373 constraints in compact syntax.
375 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
377 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
378 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
379 (copysign<mode>3_hard): Likewise.
380 (copysign<mode>3_soft): Likewise.
381 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
383 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
386 2023-10-02 David Malcolm <dmalcolm@redhat.com>
388 * diagnostic-format-json.cc (toplevel_array): Remove global in
389 favor of json_output_format::m_top_level_array.
390 (cur_group): Likewise, for json_output_format::m_cur_group.
391 (cur_children_array): Likewise, for
392 json_output_format::m_cur_children_array.
393 (class json_output_format): New.
394 (json_begin_diagnostic): Remove, in favor of
395 json_output_format::on_begin_diagnostic.
396 (json_end_diagnostic): Convert to...
397 (json_output_format::on_end_diagnostic): ...this.
398 (json_begin_group): Remove, in favor of
399 json_output_format::on_begin_group.
400 (json_end_group): Remove, in favor of
401 json_output_format::on_end_group.
402 (json_flush_to_file): Remove, in favor of
403 json_output_format::flush_to_file.
404 (json_stderr_final_cb): Remove, in favor of json_output_format
406 (json_output_base_file_name): Remove global.
407 (class json_stderr_output_format): New.
408 (json_file_final_cb): Remove.
409 (class json_file_output_format): New.
410 (json_emit_diagram): Remove.
411 (diagnostic_output_format_init_json): Update.
412 (diagnostic_output_format_init_json_file): Update.
413 * diagnostic-format-sarif.cc (the_builder): Remove this global,
414 moving to a field of the sarif_output_format.
415 (sarif_builder::maybe_make_artifact_content_object): Use the
416 context's m_file_cache.
417 (get_source_lines): Convert to...
418 (sarif_builder::get_source_lines): ...this, using context's
420 (sarif_begin_diagnostic): Remove, in favor of
421 sarif_output_format::on_begin_diagnostic.
422 (sarif_end_diagnostic): Remove, in favor of
423 sarif_output_format::on_end_diagnostic.
424 (sarif_begin_group): Remove, in favor of
425 sarif_output_format::on_begin_group.
426 (sarif_end_group): Remove, in favor of
427 sarif_output_format::on_end_group.
428 (sarif_flush_to_file): Delete.
429 (sarif_stderr_final_cb): Delete.
430 (sarif_output_base_file_name): Delete.
431 (sarif_file_final_cb): Delete.
432 (class sarif_output_format): New.
433 (sarif_emit_diagram): Delete.
434 (class sarif_stream_output_format): New.
435 (class sarif_file_output_format): New.
436 (diagnostic_output_format_init_sarif): Update.
437 (diagnostic_output_format_init_sarif_stderr): Update.
438 (diagnostic_output_format_init_sarif_file): Update.
439 (diagnostic_output_format_init_sarif_stream): Update.
440 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
441 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
442 diagnostic_text_output_format's dtor.
443 (diagnostic_initialize): Update, making a new instance of
444 diagnostic_text_output_format.
445 (diagnostic_finish): Delete m_output_format, rather than calling
447 (diagnostic_report_diagnostic): Assert that m_output_format is
448 non-NULL. Replace call to begin_group_cb with call to
449 m_output_format->on_begin_group. Replace call to
450 diagnostic_starter with call to
451 m_output_format->on_begin_diagnostic. Replace call to
452 diagnostic_finalizer with call to
453 m_output_format->on_end_diagnostic.
454 (diagnostic_emit_diagram): Replace both optional call to
455 m_diagrams.m_emission_cb and default implementation with call to
456 m_output_format->on_diagram. Move default implementation to
457 diagnostic_text_output_format::on_diagram.
458 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
459 end_group_cb with call to m_output_format->on_end_group.
460 (diagnostic_text_output_format::~diagnostic_text_output_format):
461 New, based on default_diagnostic_final_cb.
462 (diagnostic_text_output_format::on_begin_diagnostic): New, based
463 on code from diagnostic_report_diagnostic.
464 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
465 (diagnostic_text_output_format::on_diagram): New, based on code
466 from diagnostic_emit_diagram.
467 * diagnostic.h (class diagnostic_output_format): New.
468 (class diagnostic_text_output_format): New.
469 (diagnostic_context::begin_diagnostic): Move to...
470 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
471 (diagnostic_context::start_span): Move to...
472 (diagnostic_context::m_text_callbacks::start_span): ...here.
473 (diagnostic_context::end_diagnostic): Move to...
474 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
475 (diagnostic_context::begin_group_cb): Remove, in favor of
476 m_output_format->on_begin_group.
477 (diagnostic_context::end_group_cb): Remove, in favor of
478 m_output_format->on_end_group.
479 (diagnostic_context::final_cb): Remove, in favor of
480 m_output_format's dtor.
481 (diagnostic_context::m_output_format): New field.
482 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
483 of m_output_format->on_diagram.
484 (diagnostic_starter): Update.
485 (diagnostic_finalizer): Update.
486 (diagnostic_output_format_init_sarif_stream): New.
487 * input.cc (location_get_source_line): Move implementation apart from
488 call to diagnostic_file_cache_init to...
489 (file_cache::get_source_line): ...this new function...
490 (location_get_source_line): ...and reintroduce, rewritten in terms of
491 file_cache::get_source_line.
492 (get_source_file_content): Likewise, refactor into...
493 (file_cache::get_source_file_content): ...this new function.
494 * input.h (file_cache::get_source_line): New decl.
495 (file_cache::get_source_file_content): New decl.
496 * selftest-diagnostic.cc
497 (test_diagnostic_context::test_diagnostic_context): Update.
498 * tree-diagnostic-path.cc (event_range::print): Update for
499 change to diagnostic_context's start_span callback.
501 2023-10-02 David Malcolm <dmalcolm@redhat.com>
503 * diagnostic-show-locus.cc: Update for reorganization of
504 source-printing fields of diagnostic_context.
505 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
506 (diagnostic_initialize): Likewise.
507 * diagnostic.h (diagnostic_context::show_caret): Move to...
508 (diagnostic_context::m_source_printing::enabled): ...here.
509 (diagnostic_context::caret_max_width): Move to...
510 (diagnostic_context::m_source_printing::max_width): ...here.
511 (diagnostic_context::caret_chars): Move to...
512 (diagnostic_context::m_source_printing::caret_chars): ...here.
513 (diagnostic_context::colorize_source_p): Move to...
514 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
515 (diagnostic_context::show_labels_p): Move to...
516 (diagnostic_context::m_source_printing::show_labels_p): ...here.
517 (diagnostic_context::show_line_numbers_p): Move to...
518 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
519 (diagnostic_context::min_margin_width): Move to...
520 (diagnostic_context::m_source_printing::min_margin_width): ...here.
521 (diagnostic_context::show_ruler_p): Move to...
522 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
523 (diagnostic_same_line): Update for above changes.
524 * opts.cc (common_handle_option): Update for reorganization of
525 source-printing fields of diagnostic_context.
526 * selftest-diagnostic.cc
527 (test_diagnostic_context::test_diagnostic_context): Likewise.
528 * toplev.cc (general_init): Likewise.
529 * tree-diagnostic-path.cc (struct event_range): Likewise.
531 2023-10-02 David Malcolm <dmalcolm@redhat.com>
533 * diagnostic.cc (diagnostic_initialize): Initialize
534 set_locations_cb to nullptr.
536 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
539 * config/arm/constraints.md: Remove Pf constraint.
540 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
541 (arm_atomic_load_acquire<mode>): Likewise.
542 (arm_atomic_store<mode>): Likewise.
543 (arm_atomic_store_release<mode>): Likewise.
544 (atomic_load<mode>): Switch patterns to define_expand.
545 (atomic_store<mode>): Likewise.
546 (arm_atomic_loaddi2_ldrd): Remove predication.
547 (arm_load_exclusive<mode>): Likewise.
548 (arm_load_acquire_exclusive<mode>): Likewise.
549 (arm_load_exclusivesi): Likewise.
550 (arm_load_acquire_exclusivesi): Likewise.
551 (arm_load_exclusivedi): Likewise.
552 (arm_load_acquire_exclusivedi): Likewise.
553 (arm_store_exclusive<mode>): Likewise.
554 (arm_store_release_exclusivedi): Likewise.
555 (arm_store_release_exclusive<mode>): Likewise.
556 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
558 2023-10-02 Tamar Christina <tamar.christina@arm.com>
561 2023-10-02 Tamar Christina <tamar.christina@arm.com>
563 PR tree-optimization/109154
564 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
565 (cmp_arg_entry): New.
566 (predicate_scalar_phi): Use it.
568 2023-10-02 Tamar Christina <tamar.christina@arm.com>
570 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
571 (@xorsign<mode>3): ...This.
572 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
573 (@xorsign<mode>3): ..This and emit vectors directly
574 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
576 2023-10-02 Tamar Christina <tamar.christina@arm.com>
578 * emit-rtl.cc (validate_subreg): Relax subreg rule.
580 2023-10-02 Tamar Christina <tamar.christina@arm.com>
582 PR tree-optimization/109154
583 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
584 (cmp_arg_entry): New.
585 (predicate_scalar_phi): Use it.
587 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
590 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
592 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
594 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
595 Juzhe-Zhong <juzhe.zhong@rivai.ai>
597 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
599 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
601 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
603 (cpymem<P:mode>) .. this.
605 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
607 * combine.cc (simplify_compare_const): Properly handle unsigned
608 constants while narrowing comparison of memory and constants.
610 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
612 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
613 (MASK_ZIFENCEI): Delete;
614 (MASK_ZIHINTNTL): Ditto.
615 (MASK_ZIHINTPAUSE): Ditto.
616 (TARGET_ZICSR): Ditto.
617 (TARGET_ZIFENCEI): Ditto.
618 (TARGET_ZIHINTNTL): Ditto.
619 (TARGET_ZIHINTPAUSE): Ditto.
621 (TARGET_ZAWRS): Ditto.
633 (MASK_ZHINXMIN): Ditto.
634 (TARGET_ZFINX): Ditto.
635 (TARGET_ZDINX): Ditto.
636 (TARGET_ZHINX): Ditto.
637 (TARGET_ZHINXMIN): Ditto.
648 (TARGET_ZBKB): Ditto.
649 (TARGET_ZBKC): Ditto.
650 (TARGET_ZBKX): Ditto.
651 (TARGET_ZKNE): Ditto.
652 (TARGET_ZKND): Ditto.
653 (TARGET_ZKNH): Ditto.
655 (TARGET_ZKSED): Ditto.
656 (TARGET_ZKSH): Ditto.
659 (TARGET_ZTSO): Ditto.
660 (MASK_VECTOR_ELEN_32): Ditto.
661 (MASK_VECTOR_ELEN_64): Ditto.
662 (MASK_VECTOR_ELEN_FP_32): Ditto.
663 (MASK_VECTOR_ELEN_FP_64): Ditto.
664 (MASK_VECTOR_ELEN_FP_16): Ditto.
665 (TARGET_VECTOR_ELEN_32): Ditto.
666 (TARGET_VECTOR_ELEN_64): Ditto.
667 (TARGET_VECTOR_ELEN_FP_32): Ditto.
668 (TARGET_VECTOR_ELEN_FP_64): Ditto.
669 (TARGET_VECTOR_ELEN_FP_16): Ditto.
672 (TARGET_ZVBB): Ditto.
673 (TARGET_ZVBC): Ditto.
675 (MASK_ZVKNED): Ditto.
676 (MASK_ZVKNHA): Ditto.
677 (MASK_ZVKNHB): Ditto.
678 (MASK_ZVKSED): Ditto.
687 (TARGET_ZVKG): Ditto.
688 (TARGET_ZVKNED): Ditto.
689 (TARGET_ZVKNHA): Ditto.
690 (TARGET_ZVKNHB): Ditto.
691 (TARGET_ZVKSED): Ditto.
692 (TARGET_ZVKSH): Ditto.
693 (TARGET_ZVKN): Ditto.
694 (TARGET_ZVKNC): Ditto.
695 (TARGET_ZVKNG): Ditto.
696 (TARGET_ZVKS): Ditto.
697 (TARGET_ZVKSC): Ditto.
698 (TARGET_ZVKSG): Ditto.
699 (TARGET_ZVKT): Ditto.
700 (MASK_ZVL32B): Ditto.
701 (MASK_ZVL64B): Ditto.
702 (MASK_ZVL128B): Ditto.
703 (MASK_ZVL256B): Ditto.
704 (MASK_ZVL512B): Ditto.
705 (MASK_ZVL1024B): Ditto.
706 (MASK_ZVL2048B): Ditto.
707 (MASK_ZVL4096B): Ditto.
708 (MASK_ZVL8192B): Ditto.
709 (MASK_ZVL16384B): Ditto.
710 (MASK_ZVL32768B): Ditto.
711 (MASK_ZVL65536B): Ditto.
712 (TARGET_ZVL32B): Ditto.
713 (TARGET_ZVL64B): Ditto.
714 (TARGET_ZVL128B): Ditto.
715 (TARGET_ZVL256B): Ditto.
716 (TARGET_ZVL512B): Ditto.
717 (TARGET_ZVL1024B): Ditto.
718 (TARGET_ZVL2048B): Ditto.
719 (TARGET_ZVL4096B): Ditto.
720 (TARGET_ZVL8192B): Ditto.
721 (TARGET_ZVL16384B): Ditto.
722 (TARGET_ZVL32768B): Ditto.
723 (TARGET_ZVL65536B): Ditto.
724 (MASK_ZICBOZ): Ditto.
725 (MASK_ZICBOM): Ditto.
726 (MASK_ZICBOP): Ditto.
727 (TARGET_ZICBOZ): Ditto.
728 (TARGET_ZICBOM): Ditto.
729 (TARGET_ZICBOP): Ditto.
730 (MASK_ZICOND): Ditto.
731 (TARGET_ZICOND): Ditto.
734 (MASK_ZFHMIN): Ditto.
736 (MASK_ZVFHMIN): Ditto.
738 (TARGET_ZFHMIN): Ditto.
740 (TARGET_ZVFHMIN): Ditto.
741 (TARGET_ZVFH): Ditto.
743 (TARGET_ZMMUL): Ditto.
756 (TARGET_ZCMP): Ditto.
757 (TARGET_ZCMT): Ditto.
758 (MASK_SVINVAL): Ditto.
759 (MASK_SVNAPOT): Ditto.
760 (TARGET_SVINVAL): Ditto.
761 (TARGET_SVNAPOT): Ditto.
762 (MASK_XTHEADBA): Ditto.
763 (MASK_XTHEADBB): Ditto.
764 (MASK_XTHEADBS): Ditto.
765 (MASK_XTHEADCMO): Ditto.
766 (MASK_XTHEADCONDMOV): Ditto.
767 (MASK_XTHEADFMEMIDX): Ditto.
768 (MASK_XTHEADFMV): Ditto.
769 (MASK_XTHEADINT): Ditto.
770 (MASK_XTHEADMAC): Ditto.
771 (MASK_XTHEADMEMIDX): Ditto.
772 (MASK_XTHEADMEMPAIR): Ditto.
773 (MASK_XTHEADSYNC): Ditto.
774 (TARGET_XTHEADBA): Ditto.
775 (TARGET_XTHEADBB): Ditto.
776 (TARGET_XTHEADBS): Ditto.
777 (TARGET_XTHEADCMO): Ditto.
778 (TARGET_XTHEADCONDMOV): Ditto.
779 (TARGET_XTHEADFMEMIDX): Ditto.
780 (TARGET_XTHEADFMV): Ditto.
781 (TARGET_XTHEADINT): Ditto.
782 (TARGET_XTHEADMAC): Ditto.
783 (TARGET_XTHEADMEMIDX): Ditto.
784 (TARGET_XTHEADMEMPAIR): Ditto.
785 (TARGET_XTHEADSYNC): Ditto.
786 (MASK_XVENTANACONDOPS): Ditto.
787 (TARGET_XVENTANACONDOPS): Ditto.
788 * config/riscv/riscv.opt: Add new Mask defination.
789 * doc/options.texi: Add explanation for this new usage.
790 * opt-functions.awk: Add new function to find the index
791 of target variable from extra_target_vars.
792 * opt-read.awk: Add new function to store the Mask flags.
793 * opth-gen.awk: Add new function to output the defination of
794 Mask Macro and Target Macro.
796 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
797 Juzhe-Zhong <juzhe.zhong@rivai.ai>
798 Juzhe-Zhong <juzhe.zhong@rivai.ai>
801 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
802 Change second parameter to rtx *.
803 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
804 * config/riscv/vector.md: Changed callers of
805 riscv_vector::legitimize_move.
806 (*mov<mode>_mem_to_mem): Remove.
808 2023-09-30 Jakub Jelinek <jakub@redhat.com>
811 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
812 Replace safe_grow with safe_grow_cleared.
814 2023-09-30 Jakub Jelinek <jakub@redhat.com>
816 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
819 2023-09-30 Jakub Jelinek <jakub@redhat.com>
823 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
825 (bitint_large_huge::handle_operand_addr): For uninitialized operands
826 use limb_prec or -limb_prec precision.
828 2023-09-30 Jakub Jelinek <jakub@redhat.com>
830 * vec.h (quick_grow): Uncomment static_assert.
832 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
834 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
836 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
838 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
839 SETs when the outer code is INSN.
841 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
843 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
846 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
848 * poly-int.h (poly_int_pod): Delete.
849 (poly_coeff_traits::init_cast): New type.
850 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
851 (poly_int): Replace constructors that take 1 and 2 coefficients with
852 a general one that takes an arbitrary number of coefficients.
853 Delegate initialization to two new private constructors, one of
854 which uses the coefficients as-is and one of which adds an extra
855 zero of the appropriate type (and precision, where applicable).
856 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
857 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
858 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
859 * gengtype.cc (main): Don't register poly_int64_pod.
860 * calls.cc (initialize_argument_information): Use poly_int rather
862 (combine_pending_stack_adjustment_and_call): Likewise.
863 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
864 * data-streamer.h (bp_unpack_poly_value): Likewise.
865 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
866 (struct queued_reg_save): Likewise.
867 * dwarf2out.h (struct dw_cfa_location): Likewise.
868 * emit-rtl.h (struct incoming_args): Likewise.
869 (struct rtl_data): Likewise.
870 * expr.cc (get_bit_range): Likewise.
871 (get_inner_reference): Likewise.
872 * expr.h (get_bit_range): Likewise.
873 * fold-const.cc (split_address_to_core_and_offset): Likewise.
874 (ptr_difference_const): Likewise.
875 * fold-const.h (ptr_difference_const): Likewise.
876 * function.cc (try_fit_stack_local): Likewise.
877 (instantiate_new_reg): Likewise.
878 * function.h (struct expr_status): Likewise.
879 (struct args_size): Likewise.
880 * genmodes.cc (ZERO_COEFFS): Likewise.
881 (mode_size_inline): Likewise.
882 (mode_nunits_inline): Likewise.
883 (emit_mode_precision): Likewise.
884 (emit_mode_size): Likewise.
885 (emit_mode_nunits): Likewise.
886 * gimple-fold.cc (get_base_constructor): Likewise.
887 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
888 * inchash.h (class hash): Likewise.
889 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
890 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
892 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
893 * lra-eliminations.cc (self_elim_offsets): Likewise.
894 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
895 * omp-low.cc (omplow_simd_context): Likewise.
896 * pretty-print.cc (pp_wide_integer): Likewise.
897 * pretty-print.h (pp_wide_integer): Likewise.
898 * reload.cc (struct decomposition): Likewise.
899 * reload.h (struct reload): Likewise.
900 * reload1.cc (spill_stack_slot_width): Likewise.
901 (struct elim_table): Likewise.
902 (offsets_at): Likewise.
903 (init_eliminable_invariants): Likewise.
904 * rtl.h (union rtunion): Likewise.
905 (poly_int_rtx_p): Likewise.
906 (strip_offset): Likewise.
907 (strip_offset_and_add): Likewise.
908 * rtlanal.cc (strip_offset): Likewise.
909 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
910 (get_addr_base_and_unit_offset_1): Likewise.
911 (get_addr_base_and_unit_offset): Likewise.
912 * tree-dfa.h (get_ref_base_and_extent): Likewise.
913 (get_addr_base_and_unit_offset_1): Likewise.
914 (get_addr_base_and_unit_offset): Likewise.
915 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
916 (strip_offset): Likewise.
917 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
918 * tree.cc (ptrdiff_tree_p): Likewise.
919 * tree.h (poly_int_tree_p): Likewise.
920 (ptrdiff_tree_p): Likewise.
921 (get_inner_reference): Likewise.
923 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
925 * config/pa/pa.md (memory_barrier): Revise comment.
926 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
927 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
929 2023-09-29 Jakub Jelinek <jakub@redhat.com>
931 * vec.h (quick_insert, ordered_remove, unordered_remove,
932 block_remove, qsort, sort, stablesort, quick_grow): Guard
933 std::is_trivially_{copyable,default_constructible} and
934 vec_detail::is_trivially_copyable_or_pair static assertions
935 with GCC_VERSION >= 5000.
936 (vec_detail::is_trivially_copyable_or_pair): Guard definition
937 with GCC_VERSION >= 5000.
939 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
941 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
942 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
943 and aarch64_stp_policy to aarch64_ldp_stp_policy.
944 (enum aarch64_stp_policy): Removed.
945 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
946 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
947 and left only the definitions to the aarch64-opts one.
948 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
949 (aarch64_parse_stp_policy): Removed.
950 (aarch64_override_options_internal): Removed calls to parsing
951 functions and added obvious direct assignments.
952 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
953 code quality based on the new changes.
954 * config/aarch64/aarch64.opt: Use single enum type
955 aarch64_ldp_stp_policy for both ldp and stp options.
957 2023-09-29 Richard Biener <rguenther@suse.de>
959 PR tree-optimization/111583
960 * tree-loop-distribution.cc (find_single_drs): Ensure the
961 load/store are always executed.
963 2023-09-29 Jakub Jelinek <jakub@redhat.com>
965 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
966 quick_grow_cleared method on unprom rather than quick_grow.
968 2023-09-29 Sergei Trofimovich <siarheit@google.com>
971 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
972 Add new helper. Use helper instead of memset() to wipe out pointers.
974 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
976 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
978 * builtins.cc (c_readstr): Likewise. Build a local array of
979 bytes and use native_decode_rtx to get the rtx image.
980 (builtin_memcpy_read_str): Simplify accordingly.
981 (builtin_strncpy_read_str): Likewise.
982 (builtin_memset_read_str): Likewise.
983 (builtin_memset_gen_str): Likewise.
984 * expr.cc (string_cst_read_str): Likewise.
986 2023-09-29 Jakub Jelinek <jakub@redhat.com>
988 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
989 instead of quick_grow on vec<bitmap_head> members.
990 * cfganal.cc (control_dependences::control_dependences): Likewise.
991 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
992 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
993 on auto_vec<bitmap_head> vars.
994 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
995 of quick_grow on vec<bitmap_head> var.
997 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
1000 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
1002 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
1005 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
1008 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
1009 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
1010 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
1012 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
1015 2023-09-28 Pan Li <pan2.li@intel.com>
1018 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
1020 * config/riscv/vector-iterators.md: New iterator.
1022 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
1024 * rtl.h (lra_in_progress): Change type to bool.
1025 (ira_in_progress): Add new extern.
1026 * ira.cc (ira_in_progress): New global.
1027 (pass_ira::execute): Set up ira_in_progress.
1028 * lra.cc: (lra_in_progress): Change type to bool and initialize.
1029 (lra): Use bool values for lra_in_progress.
1030 * lra-eliminations.cc (init_elim_table): Ditto.
1032 2023-09-28 Richard Biener <rguenther@suse.de>
1035 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
1036 Use a heap allocated worklist for CFG traversal instead of
1039 2023-09-28 Jakub Jelinek <jakub@redhat.com>
1040 Jonathan Wakely <jwakely@redhat.com>
1042 * vec.h: Mention in file comment limited support for non-POD types
1044 (vec_destruct): New function template.
1045 (release): Use it for non-trivially destructible T.
1046 (truncate): Likewise.
1047 (quick_push): Perform a placement new into slot
1048 instead of assignment.
1049 (pop): For non-trivially destructible T return void
1050 rather than T & and destruct the popped element.
1051 (quick_insert, ordered_remove): Note that they aren't suitable
1052 for non-trivially copyable types. Add static_asserts for that.
1053 (block_remove): Assert T is trivially copyable.
1054 (vec_detail::is_trivially_copyable_or_pair): New trait.
1055 (qsort, sort, stablesort): Assert T is trivially copyable or
1056 std::pair with both trivally copyable types.
1057 (quick_grow): Add assert T is trivially default constructible,
1058 for now commented out.
1059 (quick_grow_cleared): Don't call quick_grow, instead inline it
1060 by hand except for the new static_assert.
1061 (gt_ggc_mx): Assert T is trivially destructable.
1062 (auto_vec::operator=): Formatting fixes.
1063 (auto_vec::auto_vec): Likewise.
1064 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
1065 it manually and call quick_grow_cleared method rather than quick_grow.
1066 (safe_grow_cleared): Likewise.
1067 * edit-context.cc (class line_event): Move definition earlier.
1068 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
1070 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
1071 safe_grow_cleared instead of safe_grow followed by placement new
1072 constructing the elements.
1074 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
1076 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
1077 * tree-affine.cc (expr_to_aff_combination): Likewise.
1079 2023-09-28 Richard Biener <rguenther@suse.de>
1081 PR tree-optimization/111614
1082 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
1083 convert the first vector when required.
1085 2023-09-28 xuli <xuli1@eswincomputing.com>
1088 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
1089 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
1091 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
1093 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
1095 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
1098 * configure: Regenerate.
1099 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
1101 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
1102 Philipp Tomsich <philipp.tomsich@vrull.eu>
1103 Manolis Tsamis <manolis.tsamis@vrull.eu>
1105 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
1107 (enum aarch64_stp_policy): New enum type.
1108 * config/aarch64/aarch64-protos.h (struct tune_params): Add
1109 appropriate enums for the policies.
1110 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
1111 * config/aarch64/aarch64-tuning-flags.def
1112 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
1114 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
1115 function to parse ldp-policy parameter.
1116 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
1117 (aarch64_override_options_internal): Call parsing functions.
1118 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
1119 (aarch64_operands_ok_for_ldpstp): Add call to
1120 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
1121 check and alignment check and remove superseded ones.
1122 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
1123 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
1124 check and alignment check and remove superseded ones.
1125 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
1126 (aarch64-stp-policy): New param.
1127 * doc/invoke.texi: Document the parameters accordingly.
1129 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
1131 * tree-data-ref.cc (include calls.h): Add new include.
1132 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
1134 2023-09-27 Richard Biener <rguenther@suse.de>
1136 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
1138 2023-09-27 Jakub Jelinek <jakub@redhat.com>
1141 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
1142 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
1144 * function.cc (assign_parm_find_data_types): Likewise.
1146 2023-09-27 Pan Li <pan2.li@intel.com>
1148 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
1149 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
1150 (enum insn_type): Ditto.
1151 (expand_vec_roundeven): New func decl.
1152 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
1154 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1157 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
1159 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1161 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
1163 2023-09-27 Pan Li <pan2.li@intel.com>
1165 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
1166 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
1167 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
1168 (expand_vec_trunc): Ditto.
1170 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
1174 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
1175 Handle failure from expand_builtin_atomic_test_and_set.
1176 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
1177 generate atomic code through target support, return NULL
1178 instead of emitting non-atomic code. Also, for code handling
1179 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
1180 from calling emit_store_flag_force instead of returning NULL.
1182 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
1184 PR tree-optimization/111599
1185 * value-relation.cc (relation_oracle::valid_equivs): Ensure
1188 2023-09-26 Andrew Pinski <apinski@marvell.com>
1190 PR tree-optimization/106164
1191 PR tree-optimization/111456
1192 * match.pd (`(A ==/!= B) & (A CMP C)`):
1193 Support an optional cast on the second A.
1194 (`(A ==/!= B) | (A CMP C)`): Likewise.
1196 2023-09-26 Andrew Pinski <apinski@marvell.com>
1198 PR tree-optimization/111469
1199 * tree-ssa-phiopt.cc (minmax_replacement): Fix
1200 the assumption for the `non-diamond` handling cases
1203 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1205 * match.pd: Optimize COND_ADD reduction pattern.
1207 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1209 PR tree-optimization/111594
1210 PR tree-optimization/110660
1211 * match.pd: Optimize COND_LEN_ADD reduction.
1213 2023-09-26 Pan Li <pan2.li@intel.com>
1215 * config/riscv/autovec.md (round<mode>2): New pattern.
1216 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
1217 (enum insn_type): Ditto.
1218 (expand_vec_round): New function decl.
1219 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
1221 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
1223 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
1225 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
1227 PR middle-end/111547
1228 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
1229 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
1231 2023-09-26 Pan Li <pan2.li@intel.com>
1233 * config/riscv/autovec.md (rint<mode>2): New pattern.
1234 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
1235 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
1237 2023-09-26 Pan Li <pan2.li@intel.com>
1239 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
1240 * config/riscv/riscv-protos.h (enum insn_type): New enum.
1241 (expand_vec_nearbyint): New function decl.
1242 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
1244 2023-09-26 Pan Li <pan2.li@intel.com>
1246 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
1247 (get_fp_rounding_coefficient): Rename.
1248 (gen_floor_const_fp): Remove.
1249 (expand_vec_ceil): Take renamed func.
1250 (expand_vec_floor): Ditto.
1252 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
1254 PR middle-end/111497
1255 * lra-constraints.cc (lra_constraints): Copy substituted
1257 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
1259 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
1261 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
1262 return statement in the varying case.
1264 2023-09-25 Xi Ruoyao <xry111@xry111.site>
1266 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
1268 2023-09-25 Andrew Pinski <apinski@marvell.com>
1270 PR tree-optimization/110386
1271 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
1273 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1276 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
1278 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
1281 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
1284 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
1287 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
1288 target_option_default_node when the callee has no option
1289 attributes, also simplify the existing code accordingly.
1291 2023-09-25 Guo Jie <guojie@loongson.cn>
1293 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
1294 pattern for vector construction.
1295 (vec_set<mode>_internal): Ditto.
1296 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
1297 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
1298 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
1299 Optimized the implementation of vector construction.
1300 (loongarch_expand_vector_init_same): New function.
1301 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
1302 pattern for vector construction.
1303 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
1305 (vec_concatv2df): Ditto.
1306 (vec_concatv4sf): Ditto.
1308 2023-09-24 Pan Li <pan2.li@intel.com>
1311 * config/riscv/riscv-v.cc
1312 (expand_vector_init_merge_repeating_sequence): Bugfix
1314 2023-09-24 Andrew Pinski <apinski@marvell.com>
1316 PR tree-optimization/111543
1317 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
1319 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1321 * config/riscv/autovec-opt.md: Extend VLS modes
1322 * config/riscv/vector-iterators.md: Ditto.
1324 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1326 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
1328 2023-09-23 Pan Li <pan2.li@intel.com>
1330 * config/riscv/autovec.md (floor<mode>2): New pattern.
1331 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
1332 (enum insn_type): Ditto.
1333 (expand_vec_floor): New function decl.
1334 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
1335 (expand_vec_floor): Ditto.
1337 2023-09-22 Pan Li <pan2.li@intel.com>
1339 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
1340 (emit_vec_float_cmp_mask): Rename.
1341 (expand_vec_copysign): Ditto.
1342 (emit_vec_copysign): Ditto.
1343 (emit_vec_abs): New function impl.
1344 (emit_vec_cvt_x_f): Ditto.
1345 (emit_vec_cvt_f_x): Ditto.
1346 (expand_vec_ceil): Ditto.
1348 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1350 * config/riscv/vector-iterators.md: Extend VLS modes.
1352 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1354 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
1355 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
1356 (vec_duplicate<mode>): Ditto.
1358 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1360 * config/riscv/autovec.md: Add VLS conditional patterns.
1361 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
1362 (expand_cond_binop): Ditto.
1363 (expand_cond_ternop): Ditto.
1364 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
1365 (expand_cond_binop): Ditto.
1366 (expand_cond_ternop): Ditto.
1368 2023-09-22 xuli <xuli1@eswincomputing.com>
1371 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
1372 into vrgatherei16.vv.
1374 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
1376 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
1377 New combine patterns.
1378 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
1380 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
1382 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
1383 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
1385 2023-09-22 Pan Li <pan2.li@intel.com>
1387 * config/riscv/autovec.md (ceil<mode>2): New pattern.
1388 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
1389 (enum insn_type): Ditto.
1390 (expand_vec_ceil): New function decl.
1391 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
1392 (expand_vec_float_cmp_mask): Ditto.
1393 (expand_vec_copysign): Ditto.
1394 (expand_vec_ceil): Ditto.
1395 * config/riscv/vector.md: Add VLS mode support.
1397 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1399 * config/riscv/autovec.md: Extend VLS modes.
1401 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1403 * config/riscv/vector-iterators.md: Extend VLS modes.
1405 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
1406 Robin Dapp <rdapp.gcc@gmail.com>
1408 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
1409 (emit_nonvlmax_insn): Adjust comments.
1410 (emit_vlmax_insn_lra): Adjust comments.
1412 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1414 * config.gcc (*linux*): Set rust target_objs, and
1415 target_has_targetrustm,
1416 * config/t-linux (linux-rust.o): New rule.
1417 * config/linux-rust.cc: New file.
1419 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1421 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
1422 rust_target_objs and target_has_targetrustm.
1423 * config/t-winnt (winnt-rust.o): New rule.
1424 * config/winnt-rust.cc: New file.
1426 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1428 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
1429 and target_has_targetrustm.
1430 * config/fuchsia-rust.cc: New file.
1431 * config/t-fuchsia: New file.
1433 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1435 * config.gcc (*-*-vxworks*): Set rust_target_objs and
1436 target_has_targetrustm.
1437 * config/t-vxworks (vxworks-rust.o): New rule.
1438 * config/vxworks-rust.cc: New file.
1440 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1442 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
1443 target_has_targetrustm.
1444 * config/t-dragonfly (dragonfly-rust.o): New rule.
1445 * config/dragonfly-rust.cc: New file.
1447 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1449 * config.gcc (*-*-solaris2*): Set rust_target_objs and
1450 target_has_targetrustm.
1451 * config/t-sol2 (sol2-rust.o): New rule.
1452 * config/sol2-rust.cc: New file.
1454 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1456 * config.gcc (*-*-openbsd*): Set rust_target_objs and
1457 target_has_targetrustm.
1458 * config/t-openbsd (openbsd-rust.o): New rule.
1459 * config/openbsd-rust.cc: New file.
1461 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1463 * config.gcc (*-*-netbsd*): Set rust_target_objs and
1464 target_has_targetrustm.
1465 * config/t-netbsd (netbsd-rust.o): New rule.
1466 * config/netbsd-rust.cc: New file.
1468 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1470 * config.gcc (*-*-freebsd*): Set rust_target_objs and
1471 target_has_targetrustm.
1472 * config/t-freebsd (freebsd-rust.o): New rule.
1473 * config/freebsd-rust.cc: New file.
1475 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1477 * config.gcc (*-*-darwin*): Set rust_target_objs and
1478 target_has_targetrustm.
1479 * config/t-darwin (darwin-rust.o): New rule.
1480 * config/darwin-rust.cc: New file.
1482 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1484 * config/i386/t-i386 (i386-rust.o): New rule.
1485 * config/i386/i386-rust.cc: New file.
1486 * config/i386/i386-rust.h: New file.
1488 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1490 * doc/tm.texi: Regenerate.
1491 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
1493 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1495 * doc/tm.texi: Regenerate.
1496 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
1497 TARGET_RUST_CPU_INFO.
1499 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
1501 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
1502 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
1503 (tm_rust.h, cs-tm_rust.h, default-rust.o,
1504 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
1505 (s-tm-texi): Also check timestamp on rust-target.def.
1506 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
1507 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
1508 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
1510 * configure: Regenerate.
1511 * configure.ac (tm_rust_file_list, tm_rust_include_list,
1512 rust_target_objs): Add substitutes.
1513 * doc/tm.texi: Regenerate.
1514 * doc/tm.texi.in (targetrustm): Document.
1515 (target_has_targetrustm): Document.
1516 * genhooks.cc: Include rust/rust-target.def.
1517 * config/default-rust.cc: New file.
1519 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1522 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
1523 * config/riscv/predicates.md (autovec_else_operand): New predicate.
1524 * config/riscv/riscv-v.cc (get_else_operand): New function.
1525 (expand_cond_len_unop): Adapt ELSE value.
1526 (expand_cond_len_binop): Ditto.
1527 (expand_cond_len_ternop): Ditto.
1528 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
1529 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
1531 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1534 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
1536 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
1538 PR tree-optimization/111355
1539 * match.pd ((X + C) / N): Update pattern.
1541 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
1543 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
1545 2023-09-21 xuli <xuli1@eswincomputing.com>
1548 * config/riscv/constraints.md (c01): const_int 1.
1552 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
1553 (vector_eew16_stride_operand): Ditto.
1554 (vector_eew32_stride_operand): Ditto.
1555 (vector_eew64_stride_operand): Ditto.
1556 * config/riscv/vector-iterators.md: New iterator for stride operand.
1557 * config/riscv/vector.md: Add stride = element width constraint.
1559 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
1561 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
1562 (const_1_or_4_operand): Ditto.
1563 (vector_gs_scale_operand_16): Ditto.
1564 (vector_gs_scale_operand_32): Ditto.
1565 * config/riscv/vector-iterators.md: Adjust.
1567 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1569 * config/riscv/autovec.md: Extend VLS modes.
1570 * config/riscv/vector-iterators.md: Ditto.
1571 * config/riscv/vector.md: Ditto.
1573 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
1575 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
1576 of the return value.
1577 (ssa_cache::dump): Don't print GLOBAL RANGE header.
1578 (ssa_lazy_cache::merge_range): Adjust return value meaning.
1579 (ranger_cache::dump): Print GLOBAL RANGE header.
1581 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
1583 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
1585 (foperator_unordered_gt::fold_range): Same.
1586 (foperator_unordered_lt::fold_range): Same.
1587 (foperator_unordered_le::fold_range): Same.
1589 2023-09-20 Jakub Jelinek <jakub@redhat.com>
1591 * builtins.h (type_to_class): Declare.
1592 * builtins.cc (type_to_class): No longer static. Return
1593 int rather than enum.
1594 * doc/extend.texi (__builtin_classify_type): Document.
1596 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1599 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
1600 * optabs.cc (maybe_legitimize_operand): Ditto.
1601 (can_reuse_operands_p): Ditto.
1602 * optabs.h (enum expand_operand_type): Ditto.
1603 (create_undefined_input_operand): Ditto.
1605 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
1607 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
1608 'omp allocate' variables; move stack cleanup after other
1610 (omp_notice_variable): Process original decl when decl
1611 of the value-expression for a 'omp allocate' variable is passed.
1612 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
1614 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
1616 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
1617 support simplifying vector int not only scalar int.
1619 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1621 * config/riscv/vector-iterators.md: Extend VLS floating-point.
1623 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1625 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
1627 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
1630 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
1631 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
1633 2023-09-20 Richard Biener <rguenther@suse.de>
1635 PR tree-optimization/111489
1636 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
1638 2023-09-20 Richard Biener <rguenther@suse.de>
1640 PR tree-optimization/111489
1641 * doc/invoke.texi (--param uninit-max-chain-len): Document.
1642 (--param uninit-max-num-chains): Likewise.
1643 * params.opt (-param=uninit-max-chain-len=): New.
1644 (-param=uninit-max-num-chains=): Likewise.
1645 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
1646 param_uninit_max_num_chains.
1647 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
1648 (uninit_analysis::init_use_preds): Avoid VLA.
1649 (uninit_analysis::init_from_phi_def): Likewise.
1650 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
1653 2023-09-20 Jakub Jelinek <jakub@redhat.com>
1655 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
1656 GET_MODE_PRECISION of TImode or DImode depending on whether
1657 TImode is supported scalar mode.
1658 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
1659 * expr.cc (expand_expr_real_1): Likewise.
1660 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
1661 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
1663 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
1665 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
1666 (*n<optab><mode>): Ditto.
1667 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
1668 (*<any_shiftrt:optab>trunc<mode>): Ditto.
1669 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
1670 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
1671 (*single_widen_mult<any_extend:su><mode>): Ditto.
1672 (*single_widen_mul<any_extend:su><mode>): Ditto.
1673 (*single_widen_mult<mode>): Ditto.
1674 (*single_widen_mul<mode>): Ditto.
1675 (*dual_widen_fma<mode>): Ditto.
1676 (*dual_widen_fma<su><mode>): Ditto.
1677 (*single_widen_fma<mode>): Ditto.
1678 (*single_widen_fma<su><mode>): Ditto.
1679 (*dual_fma<mode>): Ditto.
1680 (*single_fma<mode>): Ditto.
1681 (*dual_fnma<mode>): Ditto.
1682 (*dual_widen_fnma<mode>): Ditto.
1683 (*single_fnma<mode>): Ditto.
1684 (*single_widen_fnma<mode>): Ditto.
1685 (*dual_fms<mode>): Ditto.
1686 (*dual_widen_fms<mode>): Ditto.
1687 (*single_fms<mode>): Ditto.
1688 (*single_widen_fms<mode>): Ditto.
1689 (*dual_fnms<mode>): Ditto.
1690 (*dual_widen_fnms<mode>): Ditto.
1691 (*single_fnms<mode>): Ditto.
1692 (*single_widen_fnms<mode>): Ditto.
1694 2023-09-20 Jakub Jelinek <jakub@redhat.com>
1697 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
1698 on vars or function decls if -fopenmp or -fopenmp-simd.
1700 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
1703 * config/riscv/autovec-opt.md: Add missed operand.
1705 2023-09-20 Omar Sandoval <osandov@osandov.com>
1708 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
1709 dwarf_split_debug_info.
1711 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1713 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
1714 (vectorize_related_mode): Add VLS related modes.
1715 * config/riscv/vector-iterators.md: Extend VLS modes.
1717 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
1719 PR rtl-optimization/110071
1720 * ira-color.cc (improve_allocation): Consider cost of callee
1723 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
1724 Xi Ruoyao <xry111@xry111.site>
1726 * configure: Regenerate.
1727 * configure.ac: Checking assembler for -mno-relax support.
1728 Disable relaxation when probing leb128 support.
1730 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
1732 * config.in: Regenerate.
1733 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
1734 mrelax. And set the initial value of explicit-relocs according to the
1736 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
1737 --no-relax option to the linker.
1738 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
1739 -mno-relax, pass the -mno-relax option to the assembler.
1740 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
1741 * config/loongarch/loongarch.opt: Regenerate.
1742 * configure: Regenerate.
1743 * configure.ac: Add detection of support for binutils relax function.
1745 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
1747 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
1748 -fdeps-target= flags.
1749 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
1750 only -fdeps-format= is specified.
1751 * json.h: Add a TODO item to refactor out to share with
1754 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
1755 Jason Merrill <jason@redhat.com>
1757 * gcc.cc (join_spec_func): Add a spec function to join all
1760 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
1762 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
1763 src_op_0 var to avoid rtl check error.
1765 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1767 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
1769 (operator_not_equal::fold_range): Handle VREL_EQ.
1770 (operator_lt::fold_range): Remove special casing for VREL_EQ.
1771 (operator_gt::fold_range): Same.
1772 (foperator_unordered_equal::fold_range): Same.
1774 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
1776 * doc/extend.texi: Document attributes hot, cold on C++ types.
1778 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
1780 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
1781 modulo instruction is disabled.
1782 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
1783 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
1784 (define_expand umod<mode>3): New.
1785 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
1786 instruction is disabled.
1787 (umodti3, modti3): Check if the modulo instruction is disabled.
1789 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
1791 * doc/gm2.texi (fdebug-builtins): Correct description.
1793 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
1795 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
1796 * config/iq2000/iq2000.md (rotrsi3): Use it.
1798 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1800 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
1801 (operator_lt::op2_range): Same.
1802 (operator_le::op1_range): Same.
1803 (operator_le::op2_range): Same.
1804 (operator_gt::op1_range): Same.
1805 (operator_gt::op2_range): Same.
1806 (operator_ge::op1_range): Same.
1807 (operator_ge::op2_range): Same.
1808 (foperator_unordered_lt::op1_range): Same.
1809 (foperator_unordered_lt::op2_range): Same.
1810 (foperator_unordered_le::op1_range): Same.
1811 (foperator_unordered_le::op2_range): Same.
1812 (foperator_unordered_gt::op1_range): Same.
1813 (foperator_unordered_gt::op2_range): Same.
1814 (foperator_unordered_ge::op1_range): Same.
1815 (foperator_unordered_ge::op2_range): Same.
1817 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1819 * value-range.h (frange::update_nan): New.
1821 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1823 * range-op-float.cc (operator_not_equal::op2_range): New.
1824 * range-op-mixed.h: Add operator_not_equal::op2_range.
1826 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
1828 PR tree-optimization/110080
1829 PR tree-optimization/110249
1830 * tree-vrp.cc (remove_unreachable::final_p): New.
1831 (remove_unreachable::maybe_register): Rename from
1832 maybe_register_block and call early or final routine.
1833 (fully_replaceable): New.
1834 (remove_unreachable::handle_early): New.
1835 (remove_unreachable::remove_and_update_globals): Remove
1836 non-final processing.
1837 (rvrp_folder::rvrp_folder): Add final flag to constructor.
1838 (rvrp_folder::post_fold_bb): Remove unreachable registration.
1839 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
1840 (execute_ranger_vrp): Adjust some call parameters.
1842 2023-09-19 Richard Biener <rguenther@suse.de>
1845 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
1847 * tree-pretty-print.cc (op_symbol): Likewise.
1848 (op_symbol_code): Print TDF_GIMPLE variant if requested.
1849 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
1851 (dump_gimple_cond): Likewise.
1853 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
1854 Pan Li <pan2.li@intel.com>
1856 * tree-streamer.h (bp_unpack_machine_mode): If
1857 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
1859 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1861 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
1863 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1865 * config/riscv/autovec.md: Extend VLS modes.
1866 * config/riscv/vector.md: Ditto.
1868 2023-09-19 Richard Biener <rguenther@suse.de>
1870 PR tree-optimization/111465
1871 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
1872 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
1874 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1876 * config/riscv/autovec.md: Extend VLS floating-point modes.
1877 * config/riscv/vector.md: Ditto.
1879 2023-09-19 Jakub Jelinek <jakub@redhat.com>
1881 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
1882 nor check type_has_mode_precision_p for width larger than [TD]Imode
1884 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
1885 to type. Use boolean_true_node instead of
1886 constant_boolean_node (true, boolean_type_node). Formatting fixes.
1888 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1890 * config/riscv/autovec.md: Add VLS modes.
1891 * config/riscv/vector.md: Ditto.
1893 2023-09-19 Jakub Jelinek <jakub@redhat.com>
1895 * tree.cc (build_bitint_type): Assert precision is not 0, or
1897 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
1898 of unsigned _BitInt(1).
1900 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
1902 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
1903 Removed old combine patterns.
1904 (*single_<optab>mult_plus<mode>): Ditto.
1905 (*double_<optab>mult_plus<mode>): Ditto.
1906 (*sign_zero_extend_fma): Ditto.
1907 (*zero_sign_extend_fma): Ditto.
1908 (*double_widen_fma<mode>): Ditto.
1909 (*single_widen_fma<mode>): Ditto.
1910 (*double_widen_fnma<mode>): Ditto.
1911 (*single_widen_fnma<mode>): Ditto.
1912 (*double_widen_fms<mode>): Ditto.
1913 (*single_widen_fms<mode>): Ditto.
1914 (*double_widen_fnms<mode>): Ditto.
1915 (*single_widen_fnms<mode>): Ditto.
1916 (*reduc_plus_scal_<mode>): Adjust name.
1917 (*widen_reduc_plus_scal_<mode>): Adjust name.
1918 (*dual_widen_fma<mode>): New combine pattern.
1919 (*dual_widen_fmasu<mode>): Ditto.
1920 (*dual_widen_fmaus<mode>): Ditto.
1921 (*dual_fma<mode>): Ditto.
1922 (*single_fma<mode>): Ditto.
1923 (*dual_fnma<mode>): Ditto.
1924 (*single_fnma<mode>): Ditto.
1925 (*dual_fms<mode>): Ditto.
1926 (*single_fms<mode>): Ditto.
1927 (*dual_fnms<mode>): Ditto.
1928 (*single_fnms<mode>): Ditto.
1929 * config/riscv/autovec.md (fma<mode>4):
1930 Reafctor fma pattern.
1931 (*fma<VI:mode><P:mode>): Removed.
1932 (fnma<mode>4): Reafctor.
1933 (*fnma<VI:mode><P:mode>): Removed.
1934 (*fma<VF:mode><P:mode>): Removed.
1935 (*fnma<VF:mode><P:mode>): Removed.
1936 (fms<mode>4): Reafctor.
1937 (*fms<VF:mode><P:mode>): Removed.
1938 (fnms<mode>4): Reafctor.
1939 (*fnms<VF:mode><P:mode>): Removed.
1940 * config/riscv/riscv-protos.h (prepare_ternary_operands):
1942 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
1943 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
1944 (*pred_mul_plus<mode>): Removed.
1945 (*pred_mul_plus<mode>_scalar): Removed.
1946 (*pred_mul_plus<mode>_extended_scalar): Removed.
1947 (*pred_minus_mul<mode>_undef): New pattern.
1948 (*pred_minus_mul<mode>): Removed.
1949 (*pred_minus_mul<mode>_scalar): Removed.
1950 (*pred_minus_mul<mode>_extended_scalar): Removed.
1951 (*pred_mul_<optab><mode>_undef): New pattern.
1952 (*pred_mul_<optab><mode>): Removed.
1953 (*pred_mul_<optab><mode>_scalar): Removed.
1954 (*pred_mul_neg_<optab><mode>_undef): New pattern.
1955 (*pred_mul_neg_<optab><mode>): Removed.
1956 (*pred_mul_neg_<optab><mode>_scalar): Removed.
1958 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
1960 * config/riscv/riscv-vector-builtins.cc
1961 (builtin_decl, expand_builtin): Replace SVE with RVV.
1963 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
1965 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
1966 riscv-cmo.def and riscv-scalar-crypto.def.
1968 2023-09-18 Pan Li <pan2.li@intel.com>
1970 * config/riscv/autovec.md: Extend to vls mode.
1972 2023-09-18 Pan Li <pan2.li@intel.com>
1974 * config/riscv/autovec.md: Bugfix.
1975 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
1977 2023-09-18 Andrew Pinski <apinski@marvell.com>
1979 PR tree-optimization/111442
1980 * match.pd (zero_one_valued_p): Have the bit_and match not be
1983 2023-09-18 Andrew Pinski <apinski@marvell.com>
1985 PR tree-optimization/111435
1986 * match.pd (zero_one_valued_p): Don't do recursion
1989 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
1991 * config/darwin-protos.h (enum darwin_external_toolchain): New.
1992 * config/darwin.cc (DSYMUTIL_VERSION): New.
1993 (darwin_override_options): Choose the default debug DWARF version
1994 depending on the configured dsymutil version.
1996 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
1998 * configure: Regenerate.
1999 * configure.ac: Handle explict disable of stdlib option, set
2000 defaults for Darwin.
2002 2023-09-18 Andrew Pinski <apinski@marvell.com>
2004 PR tree-optimization/111431
2005 * match.pd (`(a == CST) & a`): New pattern.
2007 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2009 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
2010 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
2012 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
2015 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
2016 Add support for immediates using shifted ORR/BIC.
2017 (aarch64_split_dimode_const_store): Apply if we save one instruction.
2018 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
2019 Make pattern global.
2021 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
2023 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
2024 (neoverse-v1): Place before zeus.
2025 (neoverse-v2): Place before demeter.
2026 * config/aarch64/aarch64-tune.md: Regenerate.
2028 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2030 * config/riscv/autovec.md: Add VLS modes.
2031 * config/riscv/vector-iterators.md: Ditto.
2032 * config/riscv/vector.md: Ditto.
2034 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2036 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
2037 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
2039 2023-09-18 Richard Biener <rguenther@suse.de>
2041 PR tree-optimization/111294
2042 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
2044 (back_threader::find_paths_to_names): Adjust.
2045 (back_threader::maybe_thread_block): Likewise.
2046 (back_threader_profitability::possibly_profitable_path_p): Remove
2047 code applying extra costs to copies PHIs.
2049 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2051 * config/riscv/autovec.md: Extend VLS modes.
2052 * config/riscv/vector.md: Ditto.
2054 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2056 * config/riscv/vector.md (mov<mode>): New pattern.
2057 (*mov<mode>_mem_to_mem): Ditto.
2058 (*mov<mode>): Ditto.
2059 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
2060 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
2061 (*mov<mode>_vls): Ditto.
2062 (movmisalign<mode>): Ditto.
2063 (@vec_duplicate<mode>): Ditto.
2064 * config/riscv/autovec-vls.md: Removed.
2066 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2069 * config/riscv/autovec.md: Add VLS modes.
2071 2023-09-18 Jason Merrill <jason@redhat.com>
2073 * doc/gty.texi: Add discussion of cache vs. deletable.
2075 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2077 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
2078 (copysign<mode>3): Ditto.
2079 (xorsign<mode>3): Ditto.
2080 (<optab><mode>2): Ditto.
2081 * config/riscv/autovec.md: Extend VLS modes.
2083 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
2085 PR middle-end/111303
2086 * match.pd ((t * 2) / 2): Update pattern.
2088 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
2090 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
2092 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2095 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
2096 (vec_extract<mode><vel>): Ditto.
2097 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
2098 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
2099 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
2101 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
2103 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
2104 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
2105 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
2106 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
2107 new insn/expansions.
2108 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
2109 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
2110 (*riscv_<sha256_op>_si): New raw instruction for RV32.
2111 (*riscv_<sm3_op>_si): Ditto.
2112 (*riscv_<sm4_op>_si): Ditto.
2113 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
2114 (riscv_<sm3_op>_di_extended): Ditto.
2115 (riscv_<sm4_op>_di_extended): Ditto.
2116 (riscv_<sha256_op>_si): New common instruction expansion.
2117 (riscv_<sm3_op>_si): Ditto.
2118 (riscv_<sm4_op>_si): Ditto.
2119 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
2120 "crypto_zksh" and "crypto_zksed". Remove availability
2121 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
2122 * config/riscv/riscv-ftypes.def: Remove unused function type.
2123 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
2124 intrinsics to operate on uint32_t.
2126 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
2128 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
2129 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
2130 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
2131 Removed as no longer used.
2132 (RISCV_ATYPE_UDI): New for uint64_t.
2133 * config/riscv/riscv-cmo.def: Make types unsigned for not working
2134 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
2135 argument/return types.
2136 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
2137 number and shift amount types unsigned.
2138 * config/riscv/riscv-scalar-crypto.def: Ditto.
2140 2023-09-16 Pan Li <pan2.li@intel.com>
2142 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
2144 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
2146 * config/riscv/predicates.md: Restrict predicate
2147 to allow 'reg' only.
2149 2023-09-15 Andrew Pinski <apinski@marvell.com>
2151 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
2152 Also match `a & zero_one_valued_p` too.
2154 2023-09-15 Andrew Pinski <apinski@marvell.com>
2156 PR tree-optimization/111414
2157 * match.pd (`(1 >> X) != 0`): Check to see if
2158 the integer_onep was an integral type (not a vector type).
2160 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
2162 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
2163 run phi analysis, and do it before loop analysis.
2165 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
2167 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
2170 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
2172 PR tree-optimization/111407
2173 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
2174 when one of the operands is subject to abnormal coalescing.
2176 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
2178 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
2179 (enum insn_type): Ditto.
2180 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
2181 (emit_vlmax_insn): Adjust.
2182 (emit_nonvlmax_insn): Adjust.
2183 (emit_vlmax_insn_lra): Adjust.
2185 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
2187 * config/riscv/autovec-opt.md: Adjust.
2188 * config/riscv/autovec.md: Ditto.
2189 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
2190 (expand_reduction): Adjust expand_reduction prototype.
2191 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
2192 (expand_reduction): Refactor expand_reduction.
2194 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
2197 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
2198 the lower memory access to a mem-pair operand.
2200 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
2202 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
2203 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
2204 before the driver canonicalization routines.
2205 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
2206 to loongarch-driver.h
2207 * config/loongarch/t-linux: Move multilib-related definitions to
2209 * config/loongarch/t-multilib: New file. Inject library build
2210 options obtained from --with-multilib-list.
2211 * config/loongarch/t-loongarch: Same.
2213 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
2216 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
2217 New combine pattern.
2218 (*fold_left_widen_plus_<mode>): Ditto.
2219 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
2220 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
2221 Change from define_expand to define_insn_and_split.
2222 (fold_left_plus_<mode>): Ditto.
2223 (mask_len_fold_left_plus_<mode>): Ditto.
2224 * config/riscv/riscv-v.cc (expand_reduction):
2225 Support widen reduction.
2226 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
2227 Add new iterators and attrs.
2229 2023-09-14 David Malcolm <dmalcolm@redhat.com>
2231 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
2232 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
2233 (sarif_thread_flow::sarif_thread_flow): New.
2234 (sarif_builder::make_code_flow_object): Reimplement, creating
2235 per-thread threadFlow objects, populating them with the relevant
2237 (sarif_builder::make_thread_flow_object): Delete, moving the
2238 code into sarif_builder::make_code_flow_object.
2239 (sarif_builder::make_thread_flow_location_object): Add
2240 "path_event_idx" param. Use it to set "executionOrder"
2242 * diagnostic-path.h (diagnostic_event::get_thread_id): New
2244 (class diagnostic_thread): New.
2245 (diagnostic_path::num_threads): New pure-virtual vfunc.
2246 (diagnostic_path::get_thread): New pure-virtual vfunc.
2247 (diagnostic_path::multithreaded_p): New decl.
2248 (simple_diagnostic_event::simple_diagnostic_event): Add optional
2250 (simple_diagnostic_event::get_thread_id): New accessor.
2251 (simple_diagnostic_event::m_thread_id): New.
2252 (class simple_diagnostic_thread): New.
2253 (simple_diagnostic_path::simple_diagnostic_path): Move definition
2255 (simple_diagnostic_path::num_threads): New.
2256 (simple_diagnostic_path::get_thread): New.
2257 (simple_diagnostic_path::add_thread): New.
2258 (simple_diagnostic_path::add_thread_event): New.
2259 (simple_diagnostic_path::m_threads): New.
2260 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
2261 param for overriding the context's printer.
2262 (diagnostic_show_locus): Likwise.
2263 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
2264 Move here from diagnostic-path.h. Add main thread.
2265 (simple_diagnostic_path::num_threads): New.
2266 (simple_diagnostic_path::get_thread): New.
2267 (simple_diagnostic_path::add_thread): New.
2268 (simple_diagnostic_path::add_thread_event): New.
2269 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
2270 param and use it to initialize m_thread_id. Reformat.
2271 * diagnostic.h: Add pretty_printer param for overriding the
2273 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
2274 (can_consolidate_events): Compare thread ids.
2275 (class per_thread_summary): New.
2276 (event_range::event_range): Add per_thread_summary arg.
2277 (event_range::print): Add "pp" param and use it rather than dc's
2279 (event_range::m_thread_id): New field.
2280 (event_range::m_per_thread_summary): New field.
2281 (path_summary::multithreaded_p): New.
2282 (path_summary::get_events_for_thread_id): New.
2283 (path_summary::m_per_thread_summary): New field.
2284 (path_summary::m_thread_id_to_events): New field.
2285 (path_summary::get_or_create_events_for_thread_id): New.
2286 (path_summary::path_summary): Create per_thread_summary instances
2287 as needed and associate the event_range instances with them.
2288 (base_indent): Move here from print_path_summary_as_text.
2289 (per_frame_indent): Likewise.
2290 (class thread_event_printer): New, adapted from parts of
2291 print_path_summary_as_text.
2292 (print_path_summary_as_text): Make static. Reimplement to
2293 moving most of existing code to class thread_event_printer,
2294 capturing state as per-thread as appropriate.
2295 (default_tree_diagnostic_path_printer): Add missing 'break' on
2298 2023-09-14 David Malcolm <dmalcolm@redhat.com>
2300 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
2301 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
2302 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
2303 clearing the deletable gcc_root_tab_t.
2304 (ggc_common_finalize): New.
2305 * ggc.h (ggc_common_finalize): New decl.
2306 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
2307 ggc_common_finalize.
2309 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
2311 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
2312 unsigned comparisons.
2313 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
2314 generation of salt/saltu instructions.
2315 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
2316 * config/xtensa/xtensa.md (salt, saltu): New instruction
2319 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
2321 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
2324 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
2326 * config/riscv/autovec.md: Change rtx code to unspec.
2327 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
2328 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
2329 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
2331 (class widen_freducop): Removed.
2332 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
2333 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
2334 (@pred_<reduc_op><mode>): New name.
2335 (@pred_widen_reduc_plus<v_su><mode>): Change name.
2336 (@pred_reduc_plus<order><mode>): Change name.
2337 (@pred_widen_reduc_plus<order><mode>): Change name.
2339 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
2341 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
2342 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
2343 * config/riscv/vector-iterators.md: New iterators and attrs.
2344 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
2346 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
2347 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
2348 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
2349 (@pred_reduc_<reduc><mode>): Added.
2350 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
2351 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
2352 (@pred_widen_reduc_plus<v_su><mode>): Added.
2353 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
2354 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
2355 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
2356 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
2357 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
2358 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
2359 (@pred_reduc_plus<order><mode>): Added.
2360 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
2361 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
2362 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
2363 (@pred_widen_reduc_plus<order><mode>): Added.
2365 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
2367 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
2368 Move WHILELO handling to...
2369 (aarch64_vector_costs::finish_cost): ...here. Check whether the
2370 vectorizer has decided to use a predicated loop.
2372 2023-09-14 Andrew Pinski <apinski@marvell.com>
2374 PR tree-optimization/106164
2375 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
2376 Expand to support constants that are off by one.
2378 2023-09-14 Andrew Pinski <apinski@marvell.com>
2380 * genmatch.cc (parser::parse_result): For an else clause
2381 of an if statement inside a switch, error out explictly.
2383 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2385 * config/riscv/autovec-opt.md: Add VLS mask modes.
2386 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
2387 (vcond_mask_<mode><vm>): Add VLS mask modes.
2388 * config/riscv/vector.md: Ditto.
2390 2023-09-14 Richard Biener <rguenther@suse.de>
2392 PR tree-optimization/111294
2393 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
2394 operands that eventually become dead and use simple_dce_from_worklist
2395 to remove their definitions if they did so.
2397 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
2399 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
2400 Accept all nonimmediate_operands, but keep the existing constraints.
2401 If the instruction is split before RA, load invalid addresses into
2402 a temporary register.
2403 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
2405 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2408 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
2409 (vector_insn_info::global_merge): Ditto.
2410 (vector_insn_info::get_avl_or_vl_reg): Ditto.
2412 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2414 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
2416 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
2418 * config/loongarch/loongarch-def.c: Modify the default value of
2421 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
2423 * config/xtensa/xtensa.cc (xtensa_expand_scc):
2424 Revert the changes from the last patch, as the work in the RTL
2425 expansion pass is too far to determine the physical registers.
2426 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
2427 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
2429 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
2432 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
2434 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2436 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
2437 (@vec_extract<mode><vel>): Ditto.
2438 * config/riscv/vector.md: Ditto
2440 2023-09-13 Andrew Pinski <apinski@marvell.com>
2442 * match.pd (`X <= MAX(X, Y)`):
2443 Move before `MIN (X, C1) < C2` pattern.
2445 2023-09-13 Andrew Pinski <apinski@marvell.com>
2447 PR tree-optimization/111364
2448 * match.pd (`MIN (X, Y) == X`): Extend
2449 to min/lt, min/ge, max/gt, max/le.
2451 2023-09-13 Andrew Pinski <apinski@marvell.com>
2453 PR tree-optimization/111345
2454 * match.pd (`Y > (X % Y)`): Merge
2456 (`(X % Y) < Y`): Pattern by adding `:c`
2459 2023-09-13 Richard Biener <rguenther@suse.de>
2461 PR tree-optimization/111387
2462 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
2463 EDGE_DFS_BACK when doing BB vectorization.
2464 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
2465 to compute RPO and mark backedges.
2467 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
2469 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
2470 New combine pattern.
2471 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
2472 (<mulh_table><mode>3_highpart): Merged pattern.
2473 (umul<mode>3_highpart): Mrege smul and umul.
2474 * config/riscv/vector-iterators.md (umul): New iterators.
2475 (UNSPEC_VMULHU): New iterators.
2477 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
2479 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
2480 New combine pattern.
2481 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
2483 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
2485 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
2486 (*cond_copysign<mode>): New combine pattern.
2487 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
2489 2023-09-13 Richard Biener <rguenther@suse.de>
2491 PR tree-optimization/111397
2492 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
2493 argument to specify whether the PHI destination doesn't flow in
2494 from an abnormal PHI.
2495 (propagate_value): Adjust.
2496 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
2498 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
2500 (process_bb): Likewise.
2502 2023-09-13 Pan Li <pan2.li@intel.com>
2505 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
2507 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
2509 PR tree-optimization/111303
2510 * match.pd ((X - N * M) / N): Add undefined_p checking.
2511 ((X + N * M) / N): Likewise.
2512 ((X + C) div_rshift N): Likewise.
2514 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2517 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
2519 2023-09-12 Martin Jambor <mjambor@suse.cz>
2521 * dbgcnt.def (form_fma): New.
2522 * tree-ssa-math-opts.cc: Include dbgcnt.h.
2523 (convert_mult_to_fma): Bail out if the debug counter say so.
2525 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
2527 * config/riscv/autovec-opt.md: Update type
2528 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
2530 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2532 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
2534 (aarch64_layout_frame): Use it to decide whether locals should
2535 go above or below the saved registers.
2536 (aarch64_expand_prologue): Update stack layout comment.
2537 Emit a stack tie after the final adjustment.
2539 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2541 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
2542 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
2543 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
2545 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2547 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
2548 (aarch64_frame::hard_fp_save_and_probe): New fields.
2549 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
2550 Rather than asserting that a leaf function saves LR, instead assert
2551 that a leaf function saves something.
2552 (aarch64_get_separate_components): Prevent the chosen probe
2553 registers from being individually shrink-wrapped.
2554 (aarch64_allocate_and_probe_stack_space): Remove workaround for
2555 probe registers that aren't at the bottom of the previous allocation.
2557 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2559 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
2560 Always probe the residual allocation at offset 1024, asserting
2561 that that is in range.
2563 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2565 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
2566 the LR save slot is in the first 16 bytes of the register save area.
2567 Only form STP/LDP push/pop candidates if both registers are valid.
2568 (aarch64_allocate_and_probe_stack_space): Remove workaround for
2569 when LR was not in the first 16 bytes.
2571 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2573 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
2574 Don't probe final allocations that are exactly 1KiB in size (after
2575 unprobed space above the final allocation has been deducted).
2577 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2579 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
2580 calculation of initial_adjust for frames in which all saves
2583 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2585 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
2586 the allocation of the top of the frame.
2588 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2590 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
2592 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
2593 from the bottom of the frame, rather than the bottom of the saved
2594 register area. Measure reg_offset from the bottom of the frame
2595 rather than the bottom of the saved register area.
2596 (aarch64_save_callee_saves): Update accordingly.
2597 (aarch64_restore_callee_saves): Likewise.
2598 (aarch64_get_separate_components): Likewise.
2599 (aarch64_process_components): Likewise.
2601 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2603 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
2605 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2607 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
2609 (aarch64_frame::bytes_above_hard_fp): ...this.
2610 * config/aarch64/aarch64.cc (aarch64_layout_frame)
2611 (aarch64_expand_prologue): Update accordingly.
2612 (aarch64_initial_elimination_offset): Likewise.
2614 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2616 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
2617 (aarch64_frame::bytes_above_locals): ...this.
2618 * config/aarch64/aarch64.cc (aarch64_layout_frame)
2619 (aarch64_initial_elimination_offset): Update accordingly.
2621 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2623 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
2624 calculation of chain_offset into the emit_frame_chain block.
2626 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2628 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
2629 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
2630 callee_offset handling.
2631 (aarch64_save_callee_saves): Replace the start_offset parameter
2632 with a bytes_below_sp parameter.
2633 (aarch64_restore_callee_saves): Likewise.
2634 (aarch64_expand_prologue): Update accordingly.
2635 (aarch64_expand_epilogue): Likewise.
2637 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2639 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
2641 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
2642 (aarch64_expand_epilogue): Use it instead of
2643 below_hard_fp_saved_regs_size.
2645 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2647 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
2649 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
2650 and use it instead of crtl->outgoing_args_size.
2651 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
2652 of outgoing_args_size.
2653 (aarch64_process_components): Likewise.
2655 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2657 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
2658 allocate the frame in one go if there are no saved registers.
2660 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2662 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
2663 chain_offset rather than callee_offset.
2665 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2667 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
2668 a local shorthand for cfun->machine->frame.
2669 (aarch64_restore_callee_saves, aarch64_get_separate_components):
2670 (aarch64_process_components): Likewise.
2671 (aarch64_allocate_and_probe_stack_space): Likewise.
2672 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
2673 (aarch64_layout_frame): Use existing shorthand for one more case.
2675 2023-09-12 Andrew Pinski <apinski@marvell.com>
2677 PR tree-optimization/107881
2678 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
2679 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
2681 2023-09-12 Pan Li <pan2.li@intel.com>
2683 * config/riscv/riscv-vector-costs.h (struct range): Removed.
2685 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2687 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
2688 (compute_nregs_for_mode): Ditto.
2689 (live_range_conflict_p): Ditto.
2690 (max_number_of_live_regs): Ditto.
2691 (compute_lmul): Ditto.
2692 (costs::prefer_new_lmul_p): Ditto.
2693 (costs::better_main_loop_than_p): Ditto.
2694 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
2695 (struct var_live_range): Ditto.
2696 (struct autovec_info): Ditto.
2697 * config/riscv/t-riscv: Update makefile for COST model.
2699 2023-09-12 Jakub Jelinek <jakub@redhat.com>
2701 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
2704 2023-09-12 Jakub Jelinek <jakub@redhat.com>
2706 PR middle-end/111338
2707 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
2709 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
2710 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
2711 optimization if type's precision is too large for
2712 vn_walk_cb_data::bufsize.
2714 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
2716 * doc/gm2.texi (Compiler options): Document new option
2719 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
2721 * doc/sourcebuild.texi (stack_size): Update.
2723 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
2725 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
2726 (<optab>_not<mode>3): Likewise.
2727 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
2729 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
2731 (GEN_EMIT_HELPER2): Likewise.
2732 (emit_strcmp_scalar_compare_byte): New function.
2733 (emit_strcmp_scalar_compare_subword): Likewise.
2734 (emit_strcmp_scalar_compare_word): Likewise.
2735 (emit_strcmp_scalar_load_and_compare): Likewise.
2736 (emit_strcmp_scalar_call_to_libc): Likewise.
2737 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
2738 (emit_strcmp_scalar_result_calculation): Likewise.
2739 (riscv_expand_strcmp_scalar): Likewise.
2740 (riscv_expand_strcmp): Likewise.
2741 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
2743 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
2744 (cmpstrnsi): Invoke expansion function for str(n)cmp.
2745 (cmpstrsi): Likewise.
2746 * config/riscv/riscv.opt: Add new parameter
2747 '-mstring-compare-inline-limit'.
2748 * doc/invoke.texi: Document new parameter
2749 '-mstring-compare-inline-limit'.
2751 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
2753 * config.gcc: Add new object riscv-string.o.
2755 * config/riscv/riscv-protos.h (riscv_expand_strlen):
2757 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
2758 * config/riscv/riscv.opt: New flag 'minline-strlen'.
2759 * config/riscv/t-riscv: Add new object riscv-string.o.
2760 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
2761 (th_rev<mode>2): Likewise.
2762 (th_tstnbz<mode>2): New INSN.
2763 * doc/invoke.texi: Document '-minline-strlen'.
2764 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
2765 (emit_unlikely_jump_insn): Likewise.
2766 * rtl.h (emit_likely_jump_insn): New prototype.
2767 (emit_unlikely_jump_insn): Likewise.
2768 * config/riscv/riscv-string.cc: New file.
2770 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
2772 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
2773 (TARGET_SUPPORTS_ALIASES): Define.
2775 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
2777 * doc/sourcebuild.texi (check-function-bodies): Update.
2779 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
2781 * gimplify.cc (gimplify_bind_expr): Check for
2782 insertion after variable cleanup. Convert 'omp allocate'
2783 var-decl attribute to GOMP_alloc/GOMP_free calls.
2785 2023-09-12 xuli <xuli1@eswincomputing.com>
2787 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
2788 parameter e and replace NULL_RTX with gcc_unreachable.
2790 2023-09-12 xuli <xuli1@eswincomputing.com>
2792 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
2794 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2795 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
2796 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
2798 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
2799 * config/riscv/riscv-vector-builtins.cc: Add args type.
2801 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
2803 * config/riscv/riscv.cc
2804 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
2805 riscv_avoid_shrink_wrapping_separate.
2806 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
2808 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
2810 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
2812 * shrink-wrap.cc (try_shrink_wrapping_separate):call
2813 use_shrink_wrapping_separate.
2814 (use_shrink_wrapping_separate): wrap the condition
2815 check in use_shrink_wrapping_separate.
2816 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
2818 2023-09-11 Andrew Pinski <apinski@marvell.com>
2820 PR tree-optimization/111348
2821 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
2822 the cmp part of the pattern.
2824 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
2827 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
2828 Call output_addr_const for CASE_CONST_SCALAR_INT.
2830 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2832 * config/riscv/thead.md: Update types
2834 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2836 * config/riscv/riscv.md: Update types
2838 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2840 * config/riscv/riscv.md: Add "zicond" type
2841 * config/riscv/zicond.md: Update types
2843 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2845 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
2846 * config/riscv/zc.md: Update types
2848 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2850 * config/riscv/autovec-opt.md: Update types
2851 * config/riscv/autovec.md: likewise
2853 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2855 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
2857 (s390_vec_unsigned_flt): Ditto.
2858 (s390_vec_revb_flt): Ditto.
2859 (s390_vec_reve_flt): Ditto.
2860 (s390_vclfnhs): Fix operand flags.
2861 (s390_vclfnls): Ditto.
2862 (s390_vcrnfs): Ditto.
2866 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2868 * config/s390/s390-builtins.def (O_U64): New.
2873 (O_M12): Change bit position.
2884 (OB_DEF_VAR): Add operand constraints.
2886 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
2889 2023-09-11 Andrew Pinski <apinski@marvell.com>
2891 PR tree-optimization/111349
2892 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
2893 the cmp part of the pattern.
2895 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2898 * config/riscv/riscv.opt: Set default as scalable vectorization.
2900 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2902 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
2903 (get_all_successors): Ditto.
2904 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
2905 (get_all_successors): Ditto.
2907 2023-09-11 Jakub Jelinek <jakub@redhat.com>
2909 PR middle-end/111329
2910 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
2911 function. For printing values which don't fit into digit_buffer
2912 use out-of-line function.
2913 * wide-int-print.h (pp_wide_int_large): Declare.
2914 * wide-int-print.cc: Include pretty-print.h.
2915 (pp_wide_int_large): Define.
2917 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2919 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
2920 Use dominance analysis.
2921 (pass_vsetvl::init): Ditto.
2922 (pass_vsetvl::done): Ditto.
2924 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2927 * config/riscv/autovec.md: Add VLS modes.
2928 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
2929 (cmp_lmul_gt_one): Ditto.
2930 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
2931 (cmp_lmul_gt_one): Ditto.
2932 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
2933 (riscv_vectorize_vec_perm_const): Ditto.
2934 * config/riscv/vector-iterators.md: Ditto.
2935 * config/riscv/vector.md: Ditto.
2937 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2939 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
2940 * config/riscv/vector-iterators.md: New iterator
2942 2023-09-11 Andrew Pinski <apinski@marvell.com>
2944 PR tree-optimization/111346
2945 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
2948 2023-09-11 liuhongt <hongtao.liu@intel.com>
2952 * config/i386/sse.md (int_comm): New int_attr.
2953 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
2954 Remove % for Complex conjugate operations since they're not
2956 (fma_<complexpairopname>_<mode>_pair): Ditto.
2957 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
2958 (cmul<conj_op><mode>3): Ditto.
2960 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2962 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
2963 fixed-vlmax/vls vector permutation.
2965 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2967 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
2969 2023-09-10 Andrew Pinski <apinski@marvell.com>
2971 PR tree-optimization/111331
2972 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
2973 Fix the LE/GE comparison to the correct value.
2974 * tree-ssa-phiopt.cc (minmax_replacement):
2975 Fix the LE/GE comparison for the
2976 `(a CMP CST1) ? max<a,CST2> : a` optimization.
2978 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
2980 * config/darwin.cc (darwin_function_section): Place unlikely
2981 executed global init code into the standard cold section.
2983 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2986 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
2987 (pass_vsetvl::pre_vsetvl): Ditto.
2988 (pass_vsetvl::init): Ditto.
2989 (pass_vsetvl::lazy_vsetvl): Ditto.
2991 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
2993 * config/loongarch/loongarch.md (mulsidi3_64bit):
2994 Field unsigned extension support.
2995 (<u>muldi3_highpart): Modify template name.
2996 (<u>mulsi3_highpart): Likewise.
2997 (<u>mulsidi3_64bit): Field unsigned extension support.
2998 (<su>muldi3_highpart): Modify muldi3_highpart to
3000 (<su>mulsi3_highpart): Modify mulsi3_highpart to
3003 2023-09-09 Xi Ruoyao <xry111@xry111.site>
3005 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
3006 Check precondition (delta must be a power of 2) and use
3007 popcount_hwi instead of a homebrew loop.
3009 2023-09-09 Xi Ruoyao <xry111@xry111.site>
3011 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
3012 Define to the maximum amount of bytes able to be loaded or
3013 stored with one machine instruction.
3014 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
3015 New static function.
3016 (loongarch_block_move_straight): Call
3017 loongarch_mode_for_move_size for machine_mode to be moved.
3018 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
3019 instead of UNITS_PER_WORD.
3021 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3023 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
3025 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
3027 * fold-const.cc (can_min_p): New function.
3028 (poly_int_binop): Try fold MIN_EXPR.
3030 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
3032 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
3033 case VREL_EQ nor call frelop_early_resolve.
3035 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
3037 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
3039 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
3040 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
3042 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
3044 * config/riscv/thead.md: Use more appropriate mode attributes
3047 2023-09-08 Guo Jie <guojie@loongson.cn>
3049 * common/config/loongarch/loongarch-common.cc:
3050 (default_options loongarch_option_optimization_table):
3051 Default to -fsched-pressure.
3053 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
3055 * config.gcc: remove non-POSIX syntax "<<<".
3057 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
3059 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
3060 Rename postfix to _bitmanip.
3061 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
3062 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
3064 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3066 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
3068 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3070 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
3072 2023-09-07 liuhongt <hongtao.liu@intel.com>
3074 * config/i386/sse.md
3075 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
3076 (VHFBF_AVX512VL): New mode iterator.
3077 (VI2HFBF_AVX512VL): New mode iterator.
3079 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
3081 * value-range.h (contains_zero_p): Return false for undefined ranges.
3082 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
3083 contains_zero_p change above.
3084 (operator_ge::op1_op2_relation): Same.
3085 (operator_equal::op1_op2_relation): Same.
3086 (operator_not_equal::op1_op2_relation): Same.
3087 (operator_lt::op1_op2_relation): Same.
3088 (operator_le::op1_op2_relation): Same.
3089 (operator_ge::op1_op2_relation): Same.
3090 * range-op.cc (operator_equal::op1_op2_relation): Same.
3091 (operator_not_equal::op1_op2_relation): Same.
3092 (operator_lt::op1_op2_relation): Same.
3093 (operator_le::op1_op2_relation): Same.
3094 (operator_cast::op1_range): Same.
3095 (set_nonzero_range_from_mask): Same.
3096 (operator_bitwise_xor::op1_range): Same.
3097 (operator_addr_expr::fold_range): Same.
3098 (operator_addr_expr::op1_range): Same.
3100 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
3102 PR tree-optimization/110875
3103 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
3104 cache-prefilling routine when the ssa-name has no global value.
3106 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
3109 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
3110 (process_alt_operands): Set up the flag. Clear flag for chosen
3111 alternative with special memory constraints.
3112 (process_alt_operands): Set up used insn alternative depending on the flag.
3114 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3116 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
3117 * config/riscv/riscv.md: Ditto.
3118 * config/riscv/vector-iterators.md: Ditto.
3119 * config/riscv/vector.md: Ditto.
3121 2023-09-07 David Malcolm <dmalcolm@redhat.com>
3123 * diagnostic-core.h (error_meta): New decl.
3124 * diagnostic.cc (error_meta): New.
3126 2023-09-07 Jakub Jelinek <jakub@redhat.com>
3129 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
3130 inside gcc_assert, as later code relies on it filling info variable.
3131 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
3132 clear_padding_type): Likewise.
3133 * varasm.cc (output_constant): Likewise.
3134 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
3135 * stor-layout.cc (finish_bitfield_representative, layout_type):
3137 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
3139 2023-09-07 Xi Ruoyao <xry111@xry111.site>
3142 * config/loongarch/loongarch-protos.h
3143 (loongarch_pre_reload_split): Declare new function.
3144 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
3145 * config/loongarch/loongarch.cc
3146 (loongarch_pre_reload_split): Implement.
3147 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
3148 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
3150 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
3151 New define_insn_and_split.
3152 (bstrins_<mode>_for_ior_mask): Likewise.
3153 (define_peephole2): Further optimize code sequence produced by
3154 bstrins_<mode>_for_ior_mask if possible.
3156 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
3158 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
3159 rather than gen_rtx_PLUS.
3161 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3164 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
3165 (pass_vsetvl::df_post_optimization): Remove incorrect function.
3167 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
3169 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
3170 Parse 'XVentanaCondOps' extension.
3171 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
3172 (TARGET_XVENTANACONDOPS): Ditto.
3173 (TARGET_ZICOND_LIKE): New to represent targets with conditional
3174 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
3175 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
3176 with TARGET_ZICOND_LIKE.
3177 (riscv_expand_conditional_move): Ditto.
3178 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
3180 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
3181 * config/riscv/zicond.md: Modify description.
3182 (eqz_ventana): New to match corresponding czero instructions.
3183 (nez_ventana): Ditto.
3184 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
3185 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
3186 (*czero.<eqz>.<GPR><X>): Ditto.
3187 (*czero.eqz.<GPR><X>.opt1): Ditto.
3188 (*czero.nez.<GPR><X>.opt2): Ditto.
3190 2023-09-06 Ian Lance Taylor <iant@golang.org>
3193 * godump.cc (go_format_type): Handle BITINT_TYPE.
3195 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3198 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
3201 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3204 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
3205 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
3206 rather than make_edge, initialize bb->count.
3208 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3211 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
3212 Document general rules for _BitInt support library functions
3213 and document __mulbitint3 and __divmodbitint4.
3214 (Conversion functions): Document __fix{s,d,x,t}fbitint,
3215 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
3216 __bid_floatbitint{s,d,t}d.
3218 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3221 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
3224 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3227 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
3228 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
3229 check if all padding bits up to mode precision are zeros or sign
3230 bit copies and if not, jump to DO_ERROR.
3231 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
3232 Adjust expand_ubsan_result_store callers.
3233 * ubsan.cc: Include target.h and langhooks.h.
3234 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
3235 size converted to pointer sized integer, pass BITINT_TYPE values
3236 which fit into TImode (if supported) or DImode as those integer types
3237 or otherwise for now punt (pass 0).
3238 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
3239 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
3240 TImode/DImode precision rather than TK_Unknown used otherwise for
3241 large/huge BITINT_TYPEs.
3242 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
3243 they don't have mode precision.
3244 * ubsan.h (enum ubsan_print_style): New enumerator.
3246 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3249 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
3250 (ix86_bitint_type_info): New function.
3251 (TARGET_C_BITINT_TYPE_INFO): Redefine.
3253 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3256 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
3257 * passes.def: Add pass_lower_bitint after pass_lower_complex and
3258 pass_lower_bitint_O0 after pass_lower_complex_O0.
3259 * tree-pass.h (PROP_gimple_lbitint): Define.
3260 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
3261 * gimple-lower-bitint.h: New file.
3262 * tree-ssa-live.h (struct _var_map): Add bitint member.
3263 (init_var_map): Adjust declaration.
3264 (region_contains_p): Handle map->bitint like map->outofssa_p.
3265 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
3266 map->bitint and set map->outofssa_p to false if it is non-NULL.
3267 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
3268 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
3270 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
3271 not in that bitmap, and allow res without default def.
3272 (compute_optimized_partition_bases): In map->bitint mode try hard to
3273 coalesce any SSA_NAMEs with the same size.
3274 (coalesce_bitint): New function.
3275 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
3276 used_in_copies and call coalesce_bitint.
3277 * gimple-lower-bitint.cc: New file.
3279 2023-09-06 Jakub Jelinek <jakub@redhat.com>
3282 * tree.def (BITINT_TYPE): New type.
3283 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
3284 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
3286 (BITINT_TYPE_P): Define.
3287 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
3288 they have BITINT_TYPE type.
3289 (tree_check6, tree_not_check6): New inline functions.
3290 (any_integral_type_check): Include BITINT_TYPE.
3291 (build_bitint_type): Declare.
3292 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
3293 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
3294 type_hash_canon): Handle BITINT_TYPE.
3295 (bitint_type_cache): New variable.
3296 (build_bitint_type): New function.
3297 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
3299 (tree_cc_finalize): Free bitint_type_cache.
3300 * builtins.cc (type_to_class): Handle BITINT_TYPE.
3301 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
3302 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
3304 * convert.cc (convert_to_pointer_1, convert_to_real_1,
3305 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
3306 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
3307 GET_MODE_PRECISION (TYPE_MODE (type)).
3308 * doc/generic.texi (BITINT_TYPE): Document.
3309 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
3310 * doc/tm.texi: Regenerated.
3311 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
3312 gen_type_die_with_usage): Handle BITINT_TYPE.
3313 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
3314 handle those which fit into shwi.
3315 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
3316 to bitfield precision reads from BITINT_TYPE vars, parameters or
3317 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
3319 * fold-const.cc (fold_convert_loc, make_range_step): Handle
3321 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
3322 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
3323 (native_encode_int, native_interpret_int, native_interpret_expr):
3325 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
3326 to some other integral type or vice versa conversions non-useless.
3327 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
3328 (clear_padding_unit): Mention in comment that _BitInt types don't need
3330 (clear_padding_bitint_needs_padding_p): New function.
3331 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
3332 (clear_padding_type): Likewise.
3333 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
3334 precision operands force pos_neg? to 1.
3335 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
3336 expand_BITINTTOFLOAT): New functions.
3337 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
3338 BITINTTOFLOAT): New internal functions.
3339 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
3340 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
3341 * match.pd (non-equality compare simplifications from fold_binary):
3342 Punt if TYPE_MODE (arg1_type) is BLKmode.
3343 * pretty-print.h (pp_wide_int): Handle printing of large precision
3344 wide_ints which would buffer overflow digit_buffer.
3345 * stor-layout.cc (finish_bitfield_representative): For bit-fields
3346 with BITINT_TYPE, prefer representatives with precisions in
3347 multiple of limb precision.
3348 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
3349 element type and assert it is BITINT_TYPE.
3350 * target.def (bitint_type_info): New C target hook.
3351 * target.h (struct bitint_info): New type.
3352 * targhooks.cc (default_bitint_type_info): New function.
3353 * targhooks.h (default_bitint_type_info): Declare.
3354 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
3355 Handle printing large wide_ints which would buffer overflow
3357 * tree-ssa-sccvn.cc: Include target.h.
3358 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
3360 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
3361 64-bit BITINT_TYPE subtract low bound from expression and cast to
3362 64-bit integer type both the controlling expression and case labels.
3363 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
3364 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
3365 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
3367 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
3368 unsigned_type_for rather than build_nonstandard_integer_type.
3370 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3373 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
3374 tieable for RVV modes.
3376 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3379 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
3381 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3383 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
3385 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
3387 * config/xtensa/xtensa.cc (xtensa_expand_scc):
3388 Add code for particular constants (only 0 and INT_MIN for now)
3389 for EQ/NE boolean evaluation in SImode.
3390 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
3391 implementation has been integrated into the above.
3393 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
3396 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
3398 (*pred_widen_mulsu<mode>): Delete.
3399 (*pred_single_widen_mul<mode>): Delete.
3400 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
3401 Add new combine patterns.
3402 (*single_widen_sub<any_extend:su><mode>): Ditto.
3403 (*single_widen_add<any_extend:su><mode>): Ditto.
3404 (*single_widen_mult<any_extend:su><mode>): Ditto.
3405 (*dual_widen_mulsu<mode>): Ditto.
3406 (*dual_widen_mulus<mode>): Ditto.
3407 (*dual_widen_<optab><mode>): Ditto.
3408 (*single_widen_add<mode>): Ditto.
3409 (*single_widen_sub<mode>): Ditto.
3410 (*single_widen_mult<mode>): Ditto.
3411 * config/riscv/autovec.md (<optab><mode>3):
3412 Change define_expand to define_insn_and_split.
3413 (<optab><mode>2): Ditto.
3414 (abs<mode>2): Ditto.
3415 (smul<mode>3_highpart): Ditto.
3416 (umul<mode>3_highpart): Ditto.
3418 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
3420 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
3421 (riscv_asm_output_alias): Ditto.
3422 (riscv_asm_output_external): Ditto.
3423 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
3424 Output .variant_cc directive for vector function.
3425 (riscv_declare_function_name): Ditto.
3426 (riscv_asm_output_alias): Ditto.
3427 (riscv_asm_output_external): Ditto.
3428 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
3429 Implement ASM_DECLARE_FUNCTION_NAME.
3430 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
3431 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
3433 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
3435 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
3436 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
3437 (riscv_frame_info::reset): Reset new fileds.
3438 (riscv_call_tls_get_addr): Pass riscv_cc.
3439 (riscv_function_arg): Return riscv_cc for call patterm.
3440 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
3441 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
3442 (riscv_save_reg_p): Add vector callee-saved check.
3443 (riscv_stack_align): Add vector save area comment.
3444 (riscv_compute_frame_info): Ditto.
3445 (riscv_restore_reg): Update for type change.
3446 (riscv_for_each_saved_v_reg): New function save vector registers.
3447 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
3448 (riscv_expand_prologue): Ditto.
3449 (riscv_expand_epilogue): Ditto.
3450 (riscv_output_mi_thunk): Pass riscv_cc.
3451 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
3452 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
3453 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
3455 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
3457 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
3458 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
3459 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
3460 (riscv_init_cumulative_args): Setup variant_cc field.
3461 (riscv_vector_type_p): New function for checking vector type.
3462 (riscv_hard_regno_nregs): Hoist declare.
3463 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
3464 (riscv_get_arg_info): Support vector cc.
3465 (riscv_function_arg_advance): Update cum.
3466 (riscv_pass_by_reference): Handle vector args.
3467 (riscv_v_abi): New function return vector abi.
3468 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
3469 (riscv_arguments_is_vector_type_p): New function for check vector returns.
3470 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
3471 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
3472 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
3473 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
3474 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
3475 (V_ARG_FIRST): Ditto.
3476 (V_ARG_LAST): Ditto.
3477 (enum riscv_cc): Define all RISCV_CC variants.
3478 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
3480 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
3482 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
3483 Add sqrt + vcond_mask combine pattern.
3484 * config/riscv/autovec.md (<optab><mode>2):
3485 Change define_expand to define_insn_and_split.
3487 2023-09-06 Jason Merrill <jason@redhat.com>
3489 * common.opt: Update -fabi-version=19.
3491 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
3493 * config/riscv/zicond.md: Add closing parent to a comment.
3495 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
3497 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
3498 large constant cons/alt into a register.
3500 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
3502 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
3503 require one zero bit in the upper 32 bits for LI+RORI synthesis.
3505 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
3507 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
3509 2023-09-05 Andrew Pinski <apinski@marvell.com>
3511 PR tree-optimization/98710
3512 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
3513 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
3515 2023-09-05 Andrew Pinski <apinski@marvell.com>
3517 PR tree-optimization/103536
3518 * match.pd (`(x | y) & (x & z)`,
3519 `(x & y) | (x | z)`): New patterns.
3521 2023-09-05 Andrew Pinski <apinski@marvell.com>
3523 PR tree-optimization/107137
3524 * match.pd (`(nop_convert)-(convert)a`): New pattern.
3526 2023-09-05 Andrew Pinski <apinski@marvell.com>
3528 PR tree-optimization/96694
3529 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
3531 2023-09-05 Andrew Pinski <apinski@marvell.com>
3533 PR tree-optimization/105832
3534 * match.pd (`(1 >> X) != 0`): New pattern
3536 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
3538 * config/riscv/riscv.md: Update/Add types
3540 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
3542 * config/riscv/pic.md: Update types
3544 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
3546 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
3547 synthesis with rotate-right for XTheadBb.
3549 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
3551 * config/riscv/zicond.md: Fix op2 pattern.
3553 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
3555 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
3557 2023-09-05 Xi Ruoyao <xry111@xry111.site>
3559 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
3560 Define to 0 if not defined yet.
3562 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
3564 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
3565 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
3567 2023-09-05 Pan Li <pan2.li@intel.com>
3569 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
3570 * config/riscv/vector.md: Extend iterator for VLS.
3572 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3574 * config.gcc: Export the header file lasxintrin.h.
3575 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
3576 Add Loongson ASX builtin functions support.
3578 (LASX_BUILTIN): Ditto.
3579 (LASX_NO_TARGET_BUILTIN): Ditto.
3580 (LASX_BUILTIN_TEST_BRANCH): Ditto.
3581 (CODE_FOR_lasx_xvsadd_b): Ditto.
3582 (CODE_FOR_lasx_xvsadd_h): Ditto.
3583 (CODE_FOR_lasx_xvsadd_w): Ditto.
3584 (CODE_FOR_lasx_xvsadd_d): Ditto.
3585 (CODE_FOR_lasx_xvsadd_bu): Ditto.
3586 (CODE_FOR_lasx_xvsadd_hu): Ditto.
3587 (CODE_FOR_lasx_xvsadd_wu): Ditto.
3588 (CODE_FOR_lasx_xvsadd_du): Ditto.
3589 (CODE_FOR_lasx_xvadd_b): Ditto.
3590 (CODE_FOR_lasx_xvadd_h): Ditto.
3591 (CODE_FOR_lasx_xvadd_w): Ditto.
3592 (CODE_FOR_lasx_xvadd_d): Ditto.
3593 (CODE_FOR_lasx_xvaddi_bu): Ditto.
3594 (CODE_FOR_lasx_xvaddi_hu): Ditto.
3595 (CODE_FOR_lasx_xvaddi_wu): Ditto.
3596 (CODE_FOR_lasx_xvaddi_du): Ditto.
3597 (CODE_FOR_lasx_xvand_v): Ditto.
3598 (CODE_FOR_lasx_xvandi_b): Ditto.
3599 (CODE_FOR_lasx_xvbitsel_v): Ditto.
3600 (CODE_FOR_lasx_xvseqi_b): Ditto.
3601 (CODE_FOR_lasx_xvseqi_h): Ditto.
3602 (CODE_FOR_lasx_xvseqi_w): Ditto.
3603 (CODE_FOR_lasx_xvseqi_d): Ditto.
3604 (CODE_FOR_lasx_xvslti_b): Ditto.
3605 (CODE_FOR_lasx_xvslti_h): Ditto.
3606 (CODE_FOR_lasx_xvslti_w): Ditto.
3607 (CODE_FOR_lasx_xvslti_d): Ditto.
3608 (CODE_FOR_lasx_xvslti_bu): Ditto.
3609 (CODE_FOR_lasx_xvslti_hu): Ditto.
3610 (CODE_FOR_lasx_xvslti_wu): Ditto.
3611 (CODE_FOR_lasx_xvslti_du): Ditto.
3612 (CODE_FOR_lasx_xvslei_b): Ditto.
3613 (CODE_FOR_lasx_xvslei_h): Ditto.
3614 (CODE_FOR_lasx_xvslei_w): Ditto.
3615 (CODE_FOR_lasx_xvslei_d): Ditto.
3616 (CODE_FOR_lasx_xvslei_bu): Ditto.
3617 (CODE_FOR_lasx_xvslei_hu): Ditto.
3618 (CODE_FOR_lasx_xvslei_wu): Ditto.
3619 (CODE_FOR_lasx_xvslei_du): Ditto.
3620 (CODE_FOR_lasx_xvdiv_b): Ditto.
3621 (CODE_FOR_lasx_xvdiv_h): Ditto.
3622 (CODE_FOR_lasx_xvdiv_w): Ditto.
3623 (CODE_FOR_lasx_xvdiv_d): Ditto.
3624 (CODE_FOR_lasx_xvdiv_bu): Ditto.
3625 (CODE_FOR_lasx_xvdiv_hu): Ditto.
3626 (CODE_FOR_lasx_xvdiv_wu): Ditto.
3627 (CODE_FOR_lasx_xvdiv_du): Ditto.
3628 (CODE_FOR_lasx_xvfadd_s): Ditto.
3629 (CODE_FOR_lasx_xvfadd_d): Ditto.
3630 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
3631 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
3632 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
3633 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
3634 (CODE_FOR_lasx_xvffint_s_w): Ditto.
3635 (CODE_FOR_lasx_xvffint_d_l): Ditto.
3636 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
3637 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
3638 (CODE_FOR_lasx_xvfsub_s): Ditto.
3639 (CODE_FOR_lasx_xvfsub_d): Ditto.
3640 (CODE_FOR_lasx_xvfmul_s): Ditto.
3641 (CODE_FOR_lasx_xvfmul_d): Ditto.
3642 (CODE_FOR_lasx_xvfdiv_s): Ditto.
3643 (CODE_FOR_lasx_xvfdiv_d): Ditto.
3644 (CODE_FOR_lasx_xvfmax_s): Ditto.
3645 (CODE_FOR_lasx_xvfmax_d): Ditto.
3646 (CODE_FOR_lasx_xvfmin_s): Ditto.
3647 (CODE_FOR_lasx_xvfmin_d): Ditto.
3648 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
3649 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
3650 (CODE_FOR_lasx_xvflogb_s): Ditto.
3651 (CODE_FOR_lasx_xvflogb_d): Ditto.
3652 (CODE_FOR_lasx_xvmax_b): Ditto.
3653 (CODE_FOR_lasx_xvmax_h): Ditto.
3654 (CODE_FOR_lasx_xvmax_w): Ditto.
3655 (CODE_FOR_lasx_xvmax_d): Ditto.
3656 (CODE_FOR_lasx_xvmaxi_b): Ditto.
3657 (CODE_FOR_lasx_xvmaxi_h): Ditto.
3658 (CODE_FOR_lasx_xvmaxi_w): Ditto.
3659 (CODE_FOR_lasx_xvmaxi_d): Ditto.
3660 (CODE_FOR_lasx_xvmax_bu): Ditto.
3661 (CODE_FOR_lasx_xvmax_hu): Ditto.
3662 (CODE_FOR_lasx_xvmax_wu): Ditto.
3663 (CODE_FOR_lasx_xvmax_du): Ditto.
3664 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
3665 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
3666 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
3667 (CODE_FOR_lasx_xvmaxi_du): Ditto.
3668 (CODE_FOR_lasx_xvmin_b): Ditto.
3669 (CODE_FOR_lasx_xvmin_h): Ditto.
3670 (CODE_FOR_lasx_xvmin_w): Ditto.
3671 (CODE_FOR_lasx_xvmin_d): Ditto.
3672 (CODE_FOR_lasx_xvmini_b): Ditto.
3673 (CODE_FOR_lasx_xvmini_h): Ditto.
3674 (CODE_FOR_lasx_xvmini_w): Ditto.
3675 (CODE_FOR_lasx_xvmini_d): Ditto.
3676 (CODE_FOR_lasx_xvmin_bu): Ditto.
3677 (CODE_FOR_lasx_xvmin_hu): Ditto.
3678 (CODE_FOR_lasx_xvmin_wu): Ditto.
3679 (CODE_FOR_lasx_xvmin_du): Ditto.
3680 (CODE_FOR_lasx_xvmini_bu): Ditto.
3681 (CODE_FOR_lasx_xvmini_hu): Ditto.
3682 (CODE_FOR_lasx_xvmini_wu): Ditto.
3683 (CODE_FOR_lasx_xvmini_du): Ditto.
3684 (CODE_FOR_lasx_xvmod_b): Ditto.
3685 (CODE_FOR_lasx_xvmod_h): Ditto.
3686 (CODE_FOR_lasx_xvmod_w): Ditto.
3687 (CODE_FOR_lasx_xvmod_d): Ditto.
3688 (CODE_FOR_lasx_xvmod_bu): Ditto.
3689 (CODE_FOR_lasx_xvmod_hu): Ditto.
3690 (CODE_FOR_lasx_xvmod_wu): Ditto.
3691 (CODE_FOR_lasx_xvmod_du): Ditto.
3692 (CODE_FOR_lasx_xvmul_b): Ditto.
3693 (CODE_FOR_lasx_xvmul_h): Ditto.
3694 (CODE_FOR_lasx_xvmul_w): Ditto.
3695 (CODE_FOR_lasx_xvmul_d): Ditto.
3696 (CODE_FOR_lasx_xvclz_b): Ditto.
3697 (CODE_FOR_lasx_xvclz_h): Ditto.
3698 (CODE_FOR_lasx_xvclz_w): Ditto.
3699 (CODE_FOR_lasx_xvclz_d): Ditto.
3700 (CODE_FOR_lasx_xvnor_v): Ditto.
3701 (CODE_FOR_lasx_xvor_v): Ditto.
3702 (CODE_FOR_lasx_xvori_b): Ditto.
3703 (CODE_FOR_lasx_xvnori_b): Ditto.
3704 (CODE_FOR_lasx_xvpcnt_b): Ditto.
3705 (CODE_FOR_lasx_xvpcnt_h): Ditto.
3706 (CODE_FOR_lasx_xvpcnt_w): Ditto.
3707 (CODE_FOR_lasx_xvpcnt_d): Ditto.
3708 (CODE_FOR_lasx_xvxor_v): Ditto.
3709 (CODE_FOR_lasx_xvxori_b): Ditto.
3710 (CODE_FOR_lasx_xvsll_b): Ditto.
3711 (CODE_FOR_lasx_xvsll_h): Ditto.
3712 (CODE_FOR_lasx_xvsll_w): Ditto.
3713 (CODE_FOR_lasx_xvsll_d): Ditto.
3714 (CODE_FOR_lasx_xvslli_b): Ditto.
3715 (CODE_FOR_lasx_xvslli_h): Ditto.
3716 (CODE_FOR_lasx_xvslli_w): Ditto.
3717 (CODE_FOR_lasx_xvslli_d): Ditto.
3718 (CODE_FOR_lasx_xvsra_b): Ditto.
3719 (CODE_FOR_lasx_xvsra_h): Ditto.
3720 (CODE_FOR_lasx_xvsra_w): Ditto.
3721 (CODE_FOR_lasx_xvsra_d): Ditto.
3722 (CODE_FOR_lasx_xvsrai_b): Ditto.
3723 (CODE_FOR_lasx_xvsrai_h): Ditto.
3724 (CODE_FOR_lasx_xvsrai_w): Ditto.
3725 (CODE_FOR_lasx_xvsrai_d): Ditto.
3726 (CODE_FOR_lasx_xvsrl_b): Ditto.
3727 (CODE_FOR_lasx_xvsrl_h): Ditto.
3728 (CODE_FOR_lasx_xvsrl_w): Ditto.
3729 (CODE_FOR_lasx_xvsrl_d): Ditto.
3730 (CODE_FOR_lasx_xvsrli_b): Ditto.
3731 (CODE_FOR_lasx_xvsrli_h): Ditto.
3732 (CODE_FOR_lasx_xvsrli_w): Ditto.
3733 (CODE_FOR_lasx_xvsrli_d): Ditto.
3734 (CODE_FOR_lasx_xvsub_b): Ditto.
3735 (CODE_FOR_lasx_xvsub_h): Ditto.
3736 (CODE_FOR_lasx_xvsub_w): Ditto.
3737 (CODE_FOR_lasx_xvsub_d): Ditto.
3738 (CODE_FOR_lasx_xvsubi_bu): Ditto.
3739 (CODE_FOR_lasx_xvsubi_hu): Ditto.
3740 (CODE_FOR_lasx_xvsubi_wu): Ditto.
3741 (CODE_FOR_lasx_xvsubi_du): Ditto.
3742 (CODE_FOR_lasx_xvpackod_d): Ditto.
3743 (CODE_FOR_lasx_xvpackev_d): Ditto.
3744 (CODE_FOR_lasx_xvpickod_d): Ditto.
3745 (CODE_FOR_lasx_xvpickev_d): Ditto.
3746 (CODE_FOR_lasx_xvrepli_b): Ditto.
3747 (CODE_FOR_lasx_xvrepli_h): Ditto.
3748 (CODE_FOR_lasx_xvrepli_w): Ditto.
3749 (CODE_FOR_lasx_xvrepli_d): Ditto.
3750 (CODE_FOR_lasx_xvandn_v): Ditto.
3751 (CODE_FOR_lasx_xvorn_v): Ditto.
3752 (CODE_FOR_lasx_xvneg_b): Ditto.
3753 (CODE_FOR_lasx_xvneg_h): Ditto.
3754 (CODE_FOR_lasx_xvneg_w): Ditto.
3755 (CODE_FOR_lasx_xvneg_d): Ditto.
3756 (CODE_FOR_lasx_xvbsrl_v): Ditto.
3757 (CODE_FOR_lasx_xvbsll_v): Ditto.
3758 (CODE_FOR_lasx_xvfmadd_s): Ditto.
3759 (CODE_FOR_lasx_xvfmadd_d): Ditto.
3760 (CODE_FOR_lasx_xvfmsub_s): Ditto.
3761 (CODE_FOR_lasx_xvfmsub_d): Ditto.
3762 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
3763 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
3764 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
3765 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
3766 (CODE_FOR_lasx_xvpermi_q): Ditto.
3767 (CODE_FOR_lasx_xvpermi_d): Ditto.
3768 (CODE_FOR_lasx_xbnz_v): Ditto.
3769 (CODE_FOR_lasx_xbz_v): Ditto.
3770 (CODE_FOR_lasx_xvssub_b): Ditto.
3771 (CODE_FOR_lasx_xvssub_h): Ditto.
3772 (CODE_FOR_lasx_xvssub_w): Ditto.
3773 (CODE_FOR_lasx_xvssub_d): Ditto.
3774 (CODE_FOR_lasx_xvssub_bu): Ditto.
3775 (CODE_FOR_lasx_xvssub_hu): Ditto.
3776 (CODE_FOR_lasx_xvssub_wu): Ditto.
3777 (CODE_FOR_lasx_xvssub_du): Ditto.
3778 (CODE_FOR_lasx_xvabsd_b): Ditto.
3779 (CODE_FOR_lasx_xvabsd_h): Ditto.
3780 (CODE_FOR_lasx_xvabsd_w): Ditto.
3781 (CODE_FOR_lasx_xvabsd_d): Ditto.
3782 (CODE_FOR_lasx_xvabsd_bu): Ditto.
3783 (CODE_FOR_lasx_xvabsd_hu): Ditto.
3784 (CODE_FOR_lasx_xvabsd_wu): Ditto.
3785 (CODE_FOR_lasx_xvabsd_du): Ditto.
3786 (CODE_FOR_lasx_xvavg_b): Ditto.
3787 (CODE_FOR_lasx_xvavg_h): Ditto.
3788 (CODE_FOR_lasx_xvavg_w): Ditto.
3789 (CODE_FOR_lasx_xvavg_d): Ditto.
3790 (CODE_FOR_lasx_xvavg_bu): Ditto.
3791 (CODE_FOR_lasx_xvavg_hu): Ditto.
3792 (CODE_FOR_lasx_xvavg_wu): Ditto.
3793 (CODE_FOR_lasx_xvavg_du): Ditto.
3794 (CODE_FOR_lasx_xvavgr_b): Ditto.
3795 (CODE_FOR_lasx_xvavgr_h): Ditto.
3796 (CODE_FOR_lasx_xvavgr_w): Ditto.
3797 (CODE_FOR_lasx_xvavgr_d): Ditto.
3798 (CODE_FOR_lasx_xvavgr_bu): Ditto.
3799 (CODE_FOR_lasx_xvavgr_hu): Ditto.
3800 (CODE_FOR_lasx_xvavgr_wu): Ditto.
3801 (CODE_FOR_lasx_xvavgr_du): Ditto.
3802 (CODE_FOR_lasx_xvmuh_b): Ditto.
3803 (CODE_FOR_lasx_xvmuh_h): Ditto.
3804 (CODE_FOR_lasx_xvmuh_w): Ditto.
3805 (CODE_FOR_lasx_xvmuh_d): Ditto.
3806 (CODE_FOR_lasx_xvmuh_bu): Ditto.
3807 (CODE_FOR_lasx_xvmuh_hu): Ditto.
3808 (CODE_FOR_lasx_xvmuh_wu): Ditto.
3809 (CODE_FOR_lasx_xvmuh_du): Ditto.
3810 (CODE_FOR_lasx_xvssran_b_h): Ditto.
3811 (CODE_FOR_lasx_xvssran_h_w): Ditto.
3812 (CODE_FOR_lasx_xvssran_w_d): Ditto.
3813 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
3814 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
3815 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
3816 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
3817 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
3818 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
3819 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
3820 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
3821 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
3822 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
3823 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
3824 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
3825 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
3826 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
3827 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
3828 (CODE_FOR_lasx_xvftint_w_s): Ditto.
3829 (CODE_FOR_lasx_xvftint_l_d): Ditto.
3830 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
3831 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
3832 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
3833 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
3834 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
3835 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
3836 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
3837 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
3838 (CODE_FOR_lasx_xvsat_b): Ditto.
3839 (CODE_FOR_lasx_xvsat_h): Ditto.
3840 (CODE_FOR_lasx_xvsat_w): Ditto.
3841 (CODE_FOR_lasx_xvsat_d): Ditto.
3842 (CODE_FOR_lasx_xvsat_bu): Ditto.
3843 (CODE_FOR_lasx_xvsat_hu): Ditto.
3844 (CODE_FOR_lasx_xvsat_wu): Ditto.
3845 (CODE_FOR_lasx_xvsat_du): Ditto.
3846 (loongarch_builtin_vectorized_function): Ditto.
3847 (loongarch_expand_builtin_insn): Ditto.
3848 (loongarch_expand_builtin): Ditto.
3849 * config/loongarch/loongarch-ftypes.def (1): Ditto.
3853 * config/loongarch/lasxintrin.h: New file.
3855 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3857 * config/loongarch/loongarch-modes.def
3858 (VECTOR_MODES): Add Loongson ASX instruction support.
3859 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
3860 (loongarch_split_256bit_move_p): Ditto.
3861 (loongarch_expand_vector_group_init): Ditto.
3862 (loongarch_expand_vec_perm_1): Ditto.
3863 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
3864 (loongarch_valid_offset_p): Ditto.
3865 (loongarch_address_insns): Ditto.
3866 (loongarch_const_insns): Ditto.
3867 (loongarch_legitimize_move): Ditto.
3868 (loongarch_builtin_vectorization_cost): Ditto.
3869 (loongarch_split_move_p): Ditto.
3870 (loongarch_split_move): Ditto.
3871 (loongarch_output_move_index_float): Ditto.
3872 (loongarch_split_256bit_move_p): Ditto.
3873 (loongarch_split_256bit_move): Ditto.
3874 (loongarch_output_move): Ditto.
3875 (loongarch_print_operand_reloc): Ditto.
3876 (loongarch_print_operand): Ditto.
3877 (loongarch_hard_regno_mode_ok_uncached): Ditto.
3878 (loongarch_hard_regno_nregs): Ditto.
3879 (loongarch_class_max_nregs): Ditto.
3880 (loongarch_can_change_mode_class): Ditto.
3881 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
3882 (loongarch_vector_mode_supported_p): Ditto.
3883 (loongarch_preferred_simd_mode): Ditto.
3884 (loongarch_autovectorize_vector_modes): Ditto.
3885 (loongarch_lsx_output_division): Ditto.
3886 (loongarch_expand_lsx_shuffle): Ditto.
3887 (loongarch_expand_vec_perm): Ditto.
3888 (loongarch_expand_vec_perm_interleave): Ditto.
3889 (loongarch_try_expand_lsx_vshuf_const): Ditto.
3890 (loongarch_expand_vec_perm_even_odd_1): Ditto.
3891 (loongarch_expand_vec_perm_even_odd): Ditto.
3892 (loongarch_expand_vec_perm_1): Ditto.
3893 (loongarch_expand_vec_perm_const_2): Ditto.
3894 (loongarch_is_quad_duplicate): Ditto.
3895 (loongarch_is_double_duplicate): Ditto.
3896 (loongarch_is_odd_extraction): Ditto.
3897 (loongarch_is_even_extraction): Ditto.
3898 (loongarch_is_extraction_permutation): Ditto.
3899 (loongarch_is_center_extraction): Ditto.
3900 (loongarch_is_reversing_permutation): Ditto.
3901 (loongarch_is_di_misalign_extract): Ditto.
3902 (loongarch_is_si_misalign_extract): Ditto.
3903 (loongarch_is_lasx_lowpart_interleave): Ditto.
3904 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
3905 (COMPARE_SELECTOR): Ditto.
3906 (loongarch_is_lasx_lowpart_extract): Ditto.
3907 (loongarch_is_lasx_highpart_interleave): Ditto.
3908 (loongarch_is_lasx_highpart_interleave_2): Ditto.
3909 (loongarch_is_elem_duplicate): Ditto.
3910 (loongarch_is_op_reverse_perm): Ditto.
3911 (loongarch_is_single_op_perm): Ditto.
3912 (loongarch_is_divisible_perm): Ditto.
3913 (loongarch_is_triple_stride_extract): Ditto.
3914 (loongarch_vectorize_vec_perm_const): Ditto.
3915 (loongarch_cpu_sched_reassociation_width): Ditto.
3916 (loongarch_expand_vector_extract): Ditto.
3917 (emit_reduc_half): Ditto.
3918 (loongarch_expand_vec_unpack): Ditto.
3919 (loongarch_expand_vector_group_init): Ditto.
3920 (loongarch_expand_vector_init): Ditto.
3921 (loongarch_expand_lsx_cmp): Ditto.
3922 (loongarch_builtin_support_vector_misalignment): Ditto.
3923 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
3924 (BITS_PER_LASX_REG): Ditto.
3925 (STRUCTURE_SIZE_BOUNDARY): Ditto.
3926 (LASX_REG_FIRST): Ditto.
3927 (LASX_REG_LAST): Ditto.
3928 (LASX_REG_NUM): Ditto.
3929 (LASX_REG_P): Ditto.
3930 (LASX_REG_RTX_P): Ditto.
3931 (LASX_SUPPORTED_MODE_P): Ditto.
3932 * config/loongarch/loongarch.md: Ditto.
3933 * config/loongarch/lasx.md: New file.
3935 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3937 * config.gcc: Export the header file lsxintrin.h.
3938 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
3939 (enum loongarch_builtin_type): Ditto.
3941 (LARCH_BUILTIN): Ditto.
3942 (LSX_BUILTIN): Ditto.
3943 (LSX_BUILTIN_TEST_BRANCH): Ditto.
3944 (LSX_NO_TARGET_BUILTIN): Ditto.
3945 (CODE_FOR_lsx_vsadd_b): Ditto.
3946 (CODE_FOR_lsx_vsadd_h): Ditto.
3947 (CODE_FOR_lsx_vsadd_w): Ditto.
3948 (CODE_FOR_lsx_vsadd_d): Ditto.
3949 (CODE_FOR_lsx_vsadd_bu): Ditto.
3950 (CODE_FOR_lsx_vsadd_hu): Ditto.
3951 (CODE_FOR_lsx_vsadd_wu): Ditto.
3952 (CODE_FOR_lsx_vsadd_du): Ditto.
3953 (CODE_FOR_lsx_vadd_b): Ditto.
3954 (CODE_FOR_lsx_vadd_h): Ditto.
3955 (CODE_FOR_lsx_vadd_w): Ditto.
3956 (CODE_FOR_lsx_vadd_d): Ditto.
3957 (CODE_FOR_lsx_vaddi_bu): Ditto.
3958 (CODE_FOR_lsx_vaddi_hu): Ditto.
3959 (CODE_FOR_lsx_vaddi_wu): Ditto.
3960 (CODE_FOR_lsx_vaddi_du): Ditto.
3961 (CODE_FOR_lsx_vand_v): Ditto.
3962 (CODE_FOR_lsx_vandi_b): Ditto.
3963 (CODE_FOR_lsx_bnz_v): Ditto.
3964 (CODE_FOR_lsx_bz_v): Ditto.
3965 (CODE_FOR_lsx_vbitsel_v): Ditto.
3966 (CODE_FOR_lsx_vseqi_b): Ditto.
3967 (CODE_FOR_lsx_vseqi_h): Ditto.
3968 (CODE_FOR_lsx_vseqi_w): Ditto.
3969 (CODE_FOR_lsx_vseqi_d): Ditto.
3970 (CODE_FOR_lsx_vslti_b): Ditto.
3971 (CODE_FOR_lsx_vslti_h): Ditto.
3972 (CODE_FOR_lsx_vslti_w): Ditto.
3973 (CODE_FOR_lsx_vslti_d): Ditto.
3974 (CODE_FOR_lsx_vslti_bu): Ditto.
3975 (CODE_FOR_lsx_vslti_hu): Ditto.
3976 (CODE_FOR_lsx_vslti_wu): Ditto.
3977 (CODE_FOR_lsx_vslti_du): Ditto.
3978 (CODE_FOR_lsx_vslei_b): Ditto.
3979 (CODE_FOR_lsx_vslei_h): Ditto.
3980 (CODE_FOR_lsx_vslei_w): Ditto.
3981 (CODE_FOR_lsx_vslei_d): Ditto.
3982 (CODE_FOR_lsx_vslei_bu): Ditto.
3983 (CODE_FOR_lsx_vslei_hu): Ditto.
3984 (CODE_FOR_lsx_vslei_wu): Ditto.
3985 (CODE_FOR_lsx_vslei_du): Ditto.
3986 (CODE_FOR_lsx_vdiv_b): Ditto.
3987 (CODE_FOR_lsx_vdiv_h): Ditto.
3988 (CODE_FOR_lsx_vdiv_w): Ditto.
3989 (CODE_FOR_lsx_vdiv_d): Ditto.
3990 (CODE_FOR_lsx_vdiv_bu): Ditto.
3991 (CODE_FOR_lsx_vdiv_hu): Ditto.
3992 (CODE_FOR_lsx_vdiv_wu): Ditto.
3993 (CODE_FOR_lsx_vdiv_du): Ditto.
3994 (CODE_FOR_lsx_vfadd_s): Ditto.
3995 (CODE_FOR_lsx_vfadd_d): Ditto.
3996 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
3997 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
3998 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
3999 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
4000 (CODE_FOR_lsx_vffint_s_w): Ditto.
4001 (CODE_FOR_lsx_vffint_d_l): Ditto.
4002 (CODE_FOR_lsx_vffint_s_wu): Ditto.
4003 (CODE_FOR_lsx_vffint_d_lu): Ditto.
4004 (CODE_FOR_lsx_vfsub_s): Ditto.
4005 (CODE_FOR_lsx_vfsub_d): Ditto.
4006 (CODE_FOR_lsx_vfmul_s): Ditto.
4007 (CODE_FOR_lsx_vfmul_d): Ditto.
4008 (CODE_FOR_lsx_vfdiv_s): Ditto.
4009 (CODE_FOR_lsx_vfdiv_d): Ditto.
4010 (CODE_FOR_lsx_vfmax_s): Ditto.
4011 (CODE_FOR_lsx_vfmax_d): Ditto.
4012 (CODE_FOR_lsx_vfmin_s): Ditto.
4013 (CODE_FOR_lsx_vfmin_d): Ditto.
4014 (CODE_FOR_lsx_vfsqrt_s): Ditto.
4015 (CODE_FOR_lsx_vfsqrt_d): Ditto.
4016 (CODE_FOR_lsx_vflogb_s): Ditto.
4017 (CODE_FOR_lsx_vflogb_d): Ditto.
4018 (CODE_FOR_lsx_vmax_b): Ditto.
4019 (CODE_FOR_lsx_vmax_h): Ditto.
4020 (CODE_FOR_lsx_vmax_w): Ditto.
4021 (CODE_FOR_lsx_vmax_d): Ditto.
4022 (CODE_FOR_lsx_vmaxi_b): Ditto.
4023 (CODE_FOR_lsx_vmaxi_h): Ditto.
4024 (CODE_FOR_lsx_vmaxi_w): Ditto.
4025 (CODE_FOR_lsx_vmaxi_d): Ditto.
4026 (CODE_FOR_lsx_vmax_bu): Ditto.
4027 (CODE_FOR_lsx_vmax_hu): Ditto.
4028 (CODE_FOR_lsx_vmax_wu): Ditto.
4029 (CODE_FOR_lsx_vmax_du): Ditto.
4030 (CODE_FOR_lsx_vmaxi_bu): Ditto.
4031 (CODE_FOR_lsx_vmaxi_hu): Ditto.
4032 (CODE_FOR_lsx_vmaxi_wu): Ditto.
4033 (CODE_FOR_lsx_vmaxi_du): Ditto.
4034 (CODE_FOR_lsx_vmin_b): Ditto.
4035 (CODE_FOR_lsx_vmin_h): Ditto.
4036 (CODE_FOR_lsx_vmin_w): Ditto.
4037 (CODE_FOR_lsx_vmin_d): Ditto.
4038 (CODE_FOR_lsx_vmini_b): Ditto.
4039 (CODE_FOR_lsx_vmini_h): Ditto.
4040 (CODE_FOR_lsx_vmini_w): Ditto.
4041 (CODE_FOR_lsx_vmini_d): Ditto.
4042 (CODE_FOR_lsx_vmin_bu): Ditto.
4043 (CODE_FOR_lsx_vmin_hu): Ditto.
4044 (CODE_FOR_lsx_vmin_wu): Ditto.
4045 (CODE_FOR_lsx_vmin_du): Ditto.
4046 (CODE_FOR_lsx_vmini_bu): Ditto.
4047 (CODE_FOR_lsx_vmini_hu): Ditto.
4048 (CODE_FOR_lsx_vmini_wu): Ditto.
4049 (CODE_FOR_lsx_vmini_du): Ditto.
4050 (CODE_FOR_lsx_vmod_b): Ditto.
4051 (CODE_FOR_lsx_vmod_h): Ditto.
4052 (CODE_FOR_lsx_vmod_w): Ditto.
4053 (CODE_FOR_lsx_vmod_d): Ditto.
4054 (CODE_FOR_lsx_vmod_bu): Ditto.
4055 (CODE_FOR_lsx_vmod_hu): Ditto.
4056 (CODE_FOR_lsx_vmod_wu): Ditto.
4057 (CODE_FOR_lsx_vmod_du): Ditto.
4058 (CODE_FOR_lsx_vmul_b): Ditto.
4059 (CODE_FOR_lsx_vmul_h): Ditto.
4060 (CODE_FOR_lsx_vmul_w): Ditto.
4061 (CODE_FOR_lsx_vmul_d): Ditto.
4062 (CODE_FOR_lsx_vclz_b): Ditto.
4063 (CODE_FOR_lsx_vclz_h): Ditto.
4064 (CODE_FOR_lsx_vclz_w): Ditto.
4065 (CODE_FOR_lsx_vclz_d): Ditto.
4066 (CODE_FOR_lsx_vnor_v): Ditto.
4067 (CODE_FOR_lsx_vor_v): Ditto.
4068 (CODE_FOR_lsx_vori_b): Ditto.
4069 (CODE_FOR_lsx_vnori_b): Ditto.
4070 (CODE_FOR_lsx_vpcnt_b): Ditto.
4071 (CODE_FOR_lsx_vpcnt_h): Ditto.
4072 (CODE_FOR_lsx_vpcnt_w): Ditto.
4073 (CODE_FOR_lsx_vpcnt_d): Ditto.
4074 (CODE_FOR_lsx_vxor_v): Ditto.
4075 (CODE_FOR_lsx_vxori_b): Ditto.
4076 (CODE_FOR_lsx_vsll_b): Ditto.
4077 (CODE_FOR_lsx_vsll_h): Ditto.
4078 (CODE_FOR_lsx_vsll_w): Ditto.
4079 (CODE_FOR_lsx_vsll_d): Ditto.
4080 (CODE_FOR_lsx_vslli_b): Ditto.
4081 (CODE_FOR_lsx_vslli_h): Ditto.
4082 (CODE_FOR_lsx_vslli_w): Ditto.
4083 (CODE_FOR_lsx_vslli_d): Ditto.
4084 (CODE_FOR_lsx_vsra_b): Ditto.
4085 (CODE_FOR_lsx_vsra_h): Ditto.
4086 (CODE_FOR_lsx_vsra_w): Ditto.
4087 (CODE_FOR_lsx_vsra_d): Ditto.
4088 (CODE_FOR_lsx_vsrai_b): Ditto.
4089 (CODE_FOR_lsx_vsrai_h): Ditto.
4090 (CODE_FOR_lsx_vsrai_w): Ditto.
4091 (CODE_FOR_lsx_vsrai_d): Ditto.
4092 (CODE_FOR_lsx_vsrl_b): Ditto.
4093 (CODE_FOR_lsx_vsrl_h): Ditto.
4094 (CODE_FOR_lsx_vsrl_w): Ditto.
4095 (CODE_FOR_lsx_vsrl_d): Ditto.
4096 (CODE_FOR_lsx_vsrli_b): Ditto.
4097 (CODE_FOR_lsx_vsrli_h): Ditto.
4098 (CODE_FOR_lsx_vsrli_w): Ditto.
4099 (CODE_FOR_lsx_vsrli_d): Ditto.
4100 (CODE_FOR_lsx_vsub_b): Ditto.
4101 (CODE_FOR_lsx_vsub_h): Ditto.
4102 (CODE_FOR_lsx_vsub_w): Ditto.
4103 (CODE_FOR_lsx_vsub_d): Ditto.
4104 (CODE_FOR_lsx_vsubi_bu): Ditto.
4105 (CODE_FOR_lsx_vsubi_hu): Ditto.
4106 (CODE_FOR_lsx_vsubi_wu): Ditto.
4107 (CODE_FOR_lsx_vsubi_du): Ditto.
4108 (CODE_FOR_lsx_vpackod_d): Ditto.
4109 (CODE_FOR_lsx_vpackev_d): Ditto.
4110 (CODE_FOR_lsx_vpickod_d): Ditto.
4111 (CODE_FOR_lsx_vpickev_d): Ditto.
4112 (CODE_FOR_lsx_vrepli_b): Ditto.
4113 (CODE_FOR_lsx_vrepli_h): Ditto.
4114 (CODE_FOR_lsx_vrepli_w): Ditto.
4115 (CODE_FOR_lsx_vrepli_d): Ditto.
4116 (CODE_FOR_lsx_vsat_b): Ditto.
4117 (CODE_FOR_lsx_vsat_h): Ditto.
4118 (CODE_FOR_lsx_vsat_w): Ditto.
4119 (CODE_FOR_lsx_vsat_d): Ditto.
4120 (CODE_FOR_lsx_vsat_bu): Ditto.
4121 (CODE_FOR_lsx_vsat_hu): Ditto.
4122 (CODE_FOR_lsx_vsat_wu): Ditto.
4123 (CODE_FOR_lsx_vsat_du): Ditto.
4124 (CODE_FOR_lsx_vavg_b): Ditto.
4125 (CODE_FOR_lsx_vavg_h): Ditto.
4126 (CODE_FOR_lsx_vavg_w): Ditto.
4127 (CODE_FOR_lsx_vavg_d): Ditto.
4128 (CODE_FOR_lsx_vavg_bu): Ditto.
4129 (CODE_FOR_lsx_vavg_hu): Ditto.
4130 (CODE_FOR_lsx_vavg_wu): Ditto.
4131 (CODE_FOR_lsx_vavg_du): Ditto.
4132 (CODE_FOR_lsx_vavgr_b): Ditto.
4133 (CODE_FOR_lsx_vavgr_h): Ditto.
4134 (CODE_FOR_lsx_vavgr_w): Ditto.
4135 (CODE_FOR_lsx_vavgr_d): Ditto.
4136 (CODE_FOR_lsx_vavgr_bu): Ditto.
4137 (CODE_FOR_lsx_vavgr_hu): Ditto.
4138 (CODE_FOR_lsx_vavgr_wu): Ditto.
4139 (CODE_FOR_lsx_vavgr_du): Ditto.
4140 (CODE_FOR_lsx_vssub_b): Ditto.
4141 (CODE_FOR_lsx_vssub_h): Ditto.
4142 (CODE_FOR_lsx_vssub_w): Ditto.
4143 (CODE_FOR_lsx_vssub_d): Ditto.
4144 (CODE_FOR_lsx_vssub_bu): Ditto.
4145 (CODE_FOR_lsx_vssub_hu): Ditto.
4146 (CODE_FOR_lsx_vssub_wu): Ditto.
4147 (CODE_FOR_lsx_vssub_du): Ditto.
4148 (CODE_FOR_lsx_vabsd_b): Ditto.
4149 (CODE_FOR_lsx_vabsd_h): Ditto.
4150 (CODE_FOR_lsx_vabsd_w): Ditto.
4151 (CODE_FOR_lsx_vabsd_d): Ditto.
4152 (CODE_FOR_lsx_vabsd_bu): Ditto.
4153 (CODE_FOR_lsx_vabsd_hu): Ditto.
4154 (CODE_FOR_lsx_vabsd_wu): Ditto.
4155 (CODE_FOR_lsx_vabsd_du): Ditto.
4156 (CODE_FOR_lsx_vftint_w_s): Ditto.
4157 (CODE_FOR_lsx_vftint_l_d): Ditto.
4158 (CODE_FOR_lsx_vftint_wu_s): Ditto.
4159 (CODE_FOR_lsx_vftint_lu_d): Ditto.
4160 (CODE_FOR_lsx_vandn_v): Ditto.
4161 (CODE_FOR_lsx_vorn_v): Ditto.
4162 (CODE_FOR_lsx_vneg_b): Ditto.
4163 (CODE_FOR_lsx_vneg_h): Ditto.
4164 (CODE_FOR_lsx_vneg_w): Ditto.
4165 (CODE_FOR_lsx_vneg_d): Ditto.
4166 (CODE_FOR_lsx_vshuf4i_d): Ditto.
4167 (CODE_FOR_lsx_vbsrl_v): Ditto.
4168 (CODE_FOR_lsx_vbsll_v): Ditto.
4169 (CODE_FOR_lsx_vfmadd_s): Ditto.
4170 (CODE_FOR_lsx_vfmadd_d): Ditto.
4171 (CODE_FOR_lsx_vfmsub_s): Ditto.
4172 (CODE_FOR_lsx_vfmsub_d): Ditto.
4173 (CODE_FOR_lsx_vfnmadd_s): Ditto.
4174 (CODE_FOR_lsx_vfnmadd_d): Ditto.
4175 (CODE_FOR_lsx_vfnmsub_s): Ditto.
4176 (CODE_FOR_lsx_vfnmsub_d): Ditto.
4177 (CODE_FOR_lsx_vmuh_b): Ditto.
4178 (CODE_FOR_lsx_vmuh_h): Ditto.
4179 (CODE_FOR_lsx_vmuh_w): Ditto.
4180 (CODE_FOR_lsx_vmuh_d): Ditto.
4181 (CODE_FOR_lsx_vmuh_bu): Ditto.
4182 (CODE_FOR_lsx_vmuh_hu): Ditto.
4183 (CODE_FOR_lsx_vmuh_wu): Ditto.
4184 (CODE_FOR_lsx_vmuh_du): Ditto.
4185 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
4186 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
4187 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
4188 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
4189 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
4190 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
4191 (CODE_FOR_lsx_vssran_b_h): Ditto.
4192 (CODE_FOR_lsx_vssran_h_w): Ditto.
4193 (CODE_FOR_lsx_vssran_w_d): Ditto.
4194 (CODE_FOR_lsx_vssran_bu_h): Ditto.
4195 (CODE_FOR_lsx_vssran_hu_w): Ditto.
4196 (CODE_FOR_lsx_vssran_wu_d): Ditto.
4197 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
4198 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
4199 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
4200 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
4201 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
4202 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
4203 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
4204 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
4205 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
4206 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
4207 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
4208 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
4209 (loongarch_builtin_vector_type): Ditto.
4210 (loongarch_build_cvpointer_type): Ditto.
4211 (LARCH_ATYPE_CVPOINTER): Ditto.
4212 (LARCH_ATYPE_BOOLEAN): Ditto.
4213 (LARCH_ATYPE_V2SF): Ditto.
4214 (LARCH_ATYPE_V2HI): Ditto.
4215 (LARCH_ATYPE_V2SI): Ditto.
4216 (LARCH_ATYPE_V4QI): Ditto.
4217 (LARCH_ATYPE_V4HI): Ditto.
4218 (LARCH_ATYPE_V8QI): Ditto.
4219 (LARCH_ATYPE_V2DI): Ditto.
4220 (LARCH_ATYPE_V4SI): Ditto.
4221 (LARCH_ATYPE_V8HI): Ditto.
4222 (LARCH_ATYPE_V16QI): Ditto.
4223 (LARCH_ATYPE_V2DF): Ditto.
4224 (LARCH_ATYPE_V4SF): Ditto.
4225 (LARCH_ATYPE_V4DI): Ditto.
4226 (LARCH_ATYPE_V8SI): Ditto.
4227 (LARCH_ATYPE_V16HI): Ditto.
4228 (LARCH_ATYPE_V32QI): Ditto.
4229 (LARCH_ATYPE_V4DF): Ditto.
4230 (LARCH_ATYPE_V8SF): Ditto.
4231 (LARCH_ATYPE_UV2DI): Ditto.
4232 (LARCH_ATYPE_UV4SI): Ditto.
4233 (LARCH_ATYPE_UV8HI): Ditto.
4234 (LARCH_ATYPE_UV16QI): Ditto.
4235 (LARCH_ATYPE_UV4DI): Ditto.
4236 (LARCH_ATYPE_UV8SI): Ditto.
4237 (LARCH_ATYPE_UV16HI): Ditto.
4238 (LARCH_ATYPE_UV32QI): Ditto.
4239 (LARCH_ATYPE_UV2SI): Ditto.
4240 (LARCH_ATYPE_UV4HI): Ditto.
4241 (LARCH_ATYPE_UV8QI): Ditto.
4242 (loongarch_builtin_vectorized_function): Ditto.
4243 (LARCH_GET_BUILTIN): Ditto.
4244 (loongarch_expand_builtin_insn): Ditto.
4245 (loongarch_expand_builtin_lsx_test_branch): Ditto.
4246 (loongarch_expand_builtin): Ditto.
4247 * config/loongarch/loongarch-ftypes.def (1): Ditto.
4251 * config/loongarch/lsxintrin.h: New file.
4253 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
4255 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
4275 * config/loongarch/genopts/loongarch.opt.in: Ditto.
4276 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
4277 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
4278 (VECTOR_MODE): Ditto.
4280 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
4281 (loongarch_split_move_insn): Ditto.
4282 (loongarch_split_128bit_move): Ditto.
4283 (loongarch_split_128bit_move_p): Ditto.
4284 (loongarch_split_lsx_copy_d): Ditto.
4285 (loongarch_split_lsx_insert_d): Ditto.
4286 (loongarch_split_lsx_fill_d): Ditto.
4287 (loongarch_expand_vec_cmp): Ditto.
4288 (loongarch_const_vector_same_val_p): Ditto.
4289 (loongarch_const_vector_same_bytes_p): Ditto.
4290 (loongarch_const_vector_same_int_p): Ditto.
4291 (loongarch_const_vector_shuffle_set_p): Ditto.
4292 (loongarch_const_vector_bitimm_set_p): Ditto.
4293 (loongarch_const_vector_bitimm_clr_p): Ditto.
4294 (loongarch_lsx_vec_parallel_const_half): Ditto.
4295 (loongarch_gen_const_int_vector): Ditto.
4296 (loongarch_lsx_output_division): Ditto.
4297 (loongarch_expand_vector_init): Ditto.
4298 (loongarch_expand_vec_unpack): Ditto.
4299 (loongarch_expand_vec_perm): Ditto.
4300 (loongarch_expand_vector_extract): Ditto.
4301 (loongarch_expand_vector_reduc): Ditto.
4302 (loongarch_ldst_scaled_shift): Ditto.
4303 (loongarch_expand_vec_cond_expr): Ditto.
4304 (loongarch_expand_vec_cond_mask_expr): Ditto.
4305 (loongarch_builtin_vectorized_function): Ditto.
4306 (loongarch_gen_const_int_vector_shuffle): Ditto.
4307 (loongarch_build_signbit_mask): Ditto.
4308 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
4309 (loongarch_setup_incoming_varargs): Ditto.
4310 (loongarch_emit_move): Ditto.
4311 (loongarch_const_vector_bitimm_set_p): Ditto.
4312 (loongarch_const_vector_bitimm_clr_p): Ditto.
4313 (loongarch_const_vector_same_val_p): Ditto.
4314 (loongarch_const_vector_same_bytes_p): Ditto.
4315 (loongarch_const_vector_same_int_p): Ditto.
4316 (loongarch_const_vector_shuffle_set_p): Ditto.
4317 (loongarch_symbol_insns): Ditto.
4318 (loongarch_cannot_force_const_mem): Ditto.
4319 (loongarch_valid_offset_p): Ditto.
4320 (loongarch_valid_index_p): Ditto.
4321 (loongarch_classify_address): Ditto.
4322 (loongarch_address_insns): Ditto.
4323 (loongarch_ldst_scaled_shift): Ditto.
4324 (loongarch_const_insns): Ditto.
4325 (loongarch_split_move_insn_p): Ditto.
4326 (loongarch_subword_at_byte): Ditto.
4327 (loongarch_legitimize_move): Ditto.
4328 (loongarch_builtin_vectorization_cost): Ditto.
4329 (loongarch_split_move_p): Ditto.
4330 (loongarch_split_move): Ditto.
4331 (loongarch_split_move_insn): Ditto.
4332 (loongarch_output_move_index_float): Ditto.
4333 (loongarch_split_128bit_move_p): Ditto.
4334 (loongarch_split_128bit_move): Ditto.
4335 (loongarch_split_lsx_copy_d): Ditto.
4336 (loongarch_split_lsx_insert_d): Ditto.
4337 (loongarch_split_lsx_fill_d): Ditto.
4338 (loongarch_output_move): Ditto.
4339 (loongarch_extend_comparands): Ditto.
4340 (loongarch_print_operand_reloc): Ditto.
4341 (loongarch_print_operand): Ditto.
4342 (loongarch_hard_regno_mode_ok_uncached): Ditto.
4343 (loongarch_hard_regno_call_part_clobbered): Ditto.
4344 (loongarch_hard_regno_nregs): Ditto.
4345 (loongarch_class_max_nregs): Ditto.
4346 (loongarch_can_change_mode_class): Ditto.
4347 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
4348 (loongarch_secondary_reload): Ditto.
4349 (loongarch_vector_mode_supported_p): Ditto.
4350 (loongarch_preferred_simd_mode): Ditto.
4351 (loongarch_autovectorize_vector_modes): Ditto.
4352 (loongarch_lsx_output_division): Ditto.
4353 (loongarch_option_override_internal): Ditto.
4354 (loongarch_hard_regno_caller_save_mode): Ditto.
4355 (MAX_VECT_LEN): Ditto.
4356 (loongarch_spill_class): Ditto.
4357 (struct expand_vec_perm_d): Ditto.
4358 (loongarch_promote_function_mode): Ditto.
4359 (loongarch_expand_vselect): Ditto.
4360 (loongarch_starting_frame_offset): Ditto.
4361 (loongarch_expand_vselect_vconcat): Ditto.
4362 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
4363 (TARGET_OPTION_OVERRIDE): Ditto.
4364 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
4365 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
4366 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
4367 (loongarch_expand_lsx_shuffle): Ditto.
4368 (TARGET_SCHED_INIT): Ditto.
4369 (TARGET_SCHED_REORDER): Ditto.
4370 (TARGET_SCHED_REORDER2): Ditto.
4371 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
4372 (TARGET_SCHED_ADJUST_COST): Ditto.
4373 (TARGET_SCHED_ISSUE_RATE): Ditto.
4374 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
4375 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
4376 (TARGET_VALID_POINTER_MODE): Ditto.
4377 (TARGET_REGISTER_MOVE_COST): Ditto.
4378 (TARGET_MEMORY_MOVE_COST): Ditto.
4379 (TARGET_RTX_COSTS): Ditto.
4380 (TARGET_ADDRESS_COST): Ditto.
4381 (TARGET_IN_SMALL_DATA_P): Ditto.
4382 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
4383 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
4384 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
4385 (loongarch_expand_vec_perm): Ditto.
4386 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
4387 (TARGET_RETURN_IN_MEMORY): Ditto.
4388 (TARGET_FUNCTION_VALUE): Ditto.
4389 (TARGET_LIBCALL_VALUE): Ditto.
4390 (loongarch_try_expand_lsx_vshuf_const): Ditto.
4391 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
4392 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
4393 (TARGET_PRINT_OPERAND): Ditto.
4394 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
4395 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
4396 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
4397 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
4398 (TARGET_MUST_PASS_IN_STACK): Ditto.
4399 (TARGET_PASS_BY_REFERENCE): Ditto.
4400 (TARGET_ARG_PARTIAL_BYTES): Ditto.
4401 (TARGET_FUNCTION_ARG): Ditto.
4402 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
4403 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
4404 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
4405 (TARGET_INIT_BUILTINS): Ditto.
4406 (loongarch_expand_vec_perm_const_1): Ditto.
4407 (loongarch_expand_vec_perm_const_2): Ditto.
4408 (loongarch_vectorize_vec_perm_const): Ditto.
4409 (loongarch_cpu_sched_reassociation_width): Ditto.
4410 (loongarch_sched_reassociation_width): Ditto.
4411 (loongarch_expand_vector_extract): Ditto.
4412 (emit_reduc_half): Ditto.
4413 (loongarch_expand_vector_reduc): Ditto.
4414 (loongarch_expand_vec_unpack): Ditto.
4415 (loongarch_lsx_vec_parallel_const_half): Ditto.
4416 (loongarch_constant_elt_p): Ditto.
4417 (loongarch_gen_const_int_vector_shuffle): Ditto.
4418 (loongarch_expand_vector_init): Ditto.
4419 (loongarch_expand_lsx_cmp): Ditto.
4420 (loongarch_expand_vec_cond_expr): Ditto.
4421 (loongarch_expand_vec_cond_mask_expr): Ditto.
4422 (loongarch_expand_vec_cmp): Ditto.
4423 (loongarch_case_values_threshold): Ditto.
4424 (loongarch_build_const_vector): Ditto.
4425 (loongarch_build_signbit_mask): Ditto.
4426 (loongarch_builtin_support_vector_misalignment): Ditto.
4427 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
4428 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
4429 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
4430 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
4431 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
4432 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
4433 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
4434 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
4435 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
4436 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
4437 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
4438 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
4439 (UNITS_PER_LSX_REG): Ditto.
4440 (BITS_PER_LSX_REG): Ditto.
4441 (BIGGEST_ALIGNMENT): Ditto.
4442 (LSX_REG_FIRST): Ditto.
4443 (LSX_REG_LAST): Ditto.
4444 (LSX_REG_NUM): Ditto.
4446 (LSX_REG_RTX_P): Ditto.
4447 (IMM13_OPERAND): Ditto.
4448 (LSX_SUPPORTED_MODE_P): Ditto.
4449 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
4450 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
4451 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
4458 * config/loongarch/loongarch.opt: Ditto.
4459 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
4460 (const_uimm3_operand): Ditto.
4461 (const_8_to_11_operand): Ditto.
4462 (const_12_to_15_operand): Ditto.
4463 (const_uimm4_operand): Ditto.
4464 (const_uimm6_operand): Ditto.
4465 (const_uimm7_operand): Ditto.
4466 (const_uimm8_operand): Ditto.
4467 (const_imm5_operand): Ditto.
4468 (const_imm10_operand): Ditto.
4469 (const_imm13_operand): Ditto.
4470 (reg_imm10_operand): Ditto.
4471 (aq8b_operand): Ditto.
4472 (aq8h_operand): Ditto.
4473 (aq8w_operand): Ditto.
4474 (aq8d_operand): Ditto.
4475 (aq10b_operand): Ditto.
4476 (aq10h_operand): Ditto.
4477 (aq10w_operand): Ditto.
4478 (aq10d_operand): Ditto.
4479 (aq12b_operand): Ditto.
4480 (aq12h_operand): Ditto.
4481 (aq12w_operand): Ditto.
4482 (aq12d_operand): Ditto.
4483 (const_m1_operand): Ditto.
4484 (reg_or_m1_operand): Ditto.
4485 (const_exp_2_operand): Ditto.
4486 (const_exp_4_operand): Ditto.
4487 (const_exp_8_operand): Ditto.
4488 (const_exp_16_operand): Ditto.
4489 (const_exp_32_operand): Ditto.
4490 (const_0_or_1_operand): Ditto.
4491 (const_0_to_3_operand): Ditto.
4492 (const_0_to_7_operand): Ditto.
4493 (const_2_or_3_operand): Ditto.
4494 (const_4_to_7_operand): Ditto.
4495 (const_8_to_15_operand): Ditto.
4496 (const_16_to_31_operand): Ditto.
4497 (qi_mask_operand): Ditto.
4498 (hi_mask_operand): Ditto.
4499 (si_mask_operand): Ditto.
4501 (db4_operand): Ditto.
4502 (db7_operand): Ditto.
4503 (db8_operand): Ditto.
4504 (ib3_operand): Ditto.
4505 (sb4_operand): Ditto.
4506 (sb5_operand): Ditto.
4507 (sb8_operand): Ditto.
4508 (sd8_operand): Ditto.
4509 (ub4_operand): Ditto.
4510 (ub8_operand): Ditto.
4511 (uh4_operand): Ditto.
4512 (uw4_operand): Ditto.
4513 (uw5_operand): Ditto.
4514 (uw6_operand): Ditto.
4515 (uw8_operand): Ditto.
4516 (addiur2_operand): Ditto.
4517 (addiusp_operand): Ditto.
4518 (andi16_operand): Ditto.
4519 (movep_src_register): Ditto.
4520 (movep_src_operand): Ditto.
4521 (fcc_reload_operand): Ditto.
4522 (muldiv_target_operand): Ditto.
4523 (const_vector_same_val_operand): Ditto.
4524 (const_vector_same_simm5_operand): Ditto.
4525 (const_vector_same_uimm5_operand): Ditto.
4526 (const_vector_same_ximm5_operand): Ditto.
4527 (const_vector_same_uimm6_operand): Ditto.
4528 (par_const_vector_shf_set_operand): Ditto.
4529 (reg_or_vector_same_val_operand): Ditto.
4530 (reg_or_vector_same_simm5_operand): Ditto.
4531 (reg_or_vector_same_uimm5_operand): Ditto.
4532 (reg_or_vector_same_ximm5_operand): Ditto.
4533 (reg_or_vector_same_uimm6_operand): Ditto.
4534 * doc/md.texi: Ditto.
4535 * config/loongarch/lsx.md: New file.
4537 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4539 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
4540 (get_all_predecessors): New function.
4541 (get_all_successors): Ditto.
4542 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
4543 (get_all_successors): Ditto.
4544 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
4545 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
4547 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
4549 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
4550 (split_addsi): Likewise.
4551 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
4552 'N', 'x', and 'J' code letters.
4553 (arc_output_addsi): Make it static.
4554 (split_addsi): Remove it.
4555 * config/arc/arc.h (UNSIGNED_INT*): New defines.
4556 (SINNED_INT*): Likewise.
4557 * config/arc/arc.md (type): Add add, sub, bxor types.
4558 (tst_movb): Change code letter from 's' to 'x'.
4559 (andsi3_i): Likewise.
4560 (addsi3_mixed): Refurbish the pattern.
4561 (call_i): Change code letter from 'S' to 'J'.
4562 * config/arc/arc700.md: Add newly introduced types.
4563 * config/arc/arcHS.md: Likewsie.
4564 * config/arc/arcHS4x.md: Likewise.
4565 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
4566 (CM4): Update description.
4567 (CP4, C6u, C6n, CIs, C4p): New constraint.
4569 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
4571 * common/config/arc/arc-common.cc (arc_option_optimization_table):
4572 Remove mbbit_peephole.
4573 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
4574 (store_direct): Likewise.
4575 (BBIT peephole2): Likewise.
4576 * config/arc/arc.opt (mbbit-peephole): Ignore option.
4577 * doc/invoke.texi (mbbit-peephole): Update document.
4579 2023-09-05 Jakub Jelinek <jakub@redhat.com>
4581 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
4584 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
4586 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
4587 options passed from driver to gnat1 as explicit for multilib.
4589 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
4591 * config.gcc: add loongarch*-elf target.
4592 * config/loongarch/elf.h: New file.
4593 Link against newlib by default.
4595 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
4597 * config.gcc: use -mstrict-align for building libraries
4598 if --with-strict-align-lib is given.
4599 * doc/install.texi: likewise.
4601 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
4603 * config/loongarch/loongarch-c.cc: Export macros
4604 "__loongarch_{arch,tune}" in the preprocessor.
4606 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
4608 * config.gcc: Make --with-abi= obsolete, decide the default ABI
4609 with target triplet. Allow specifying multilib library build
4610 options with --with-multilib-list and --with-multilib-default.
4611 * config/loongarch/t-linux: Likewise.
4612 * config/loongarch/genopts/loongarch-strings: Likewise.
4613 * config/loongarch/loongarch-str.h: Likewise.
4614 * doc/install.texi: Likewise.
4615 * config/loongarch/genopts/loongarch.opt.in: Introduce
4616 -m[no-]l[a]sx options. Only process -m*-float and
4617 -m[no-]l[a]sx in the GCC driver.
4618 * config/loongarch/loongarch.opt: Likewise.
4619 * config/loongarch/la464.md: Likewise.
4620 * config/loongarch/loongarch-c.cc: Likewise.
4621 * config/loongarch/loongarch-cpu.cc: Likewise.
4622 * config/loongarch/loongarch-cpu.h: Likewise.
4623 * config/loongarch/loongarch-def.c: Likewise.
4624 * config/loongarch/loongarch-def.h: Likewise.
4625 * config/loongarch/loongarch-driver.cc: Likewise.
4626 * config/loongarch/loongarch-driver.h: Likewise.
4627 * config/loongarch/loongarch-opts.cc: Likewise.
4628 * config/loongarch/loongarch-opts.h: Likewise.
4629 * config/loongarch/loongarch.cc: Likewise.
4630 * doc/invoke.texi: Likewise.
4632 2023-09-05 liuhongt <hongtao.liu@intel.com>
4634 * config/i386/sse.md: (V8BFH_128): Renamed to ..
4635 (VHFBF_128): .. this.
4636 (V16BFH_256): Renamed to ..
4637 (VHFBF_256): .. this.
4638 (avx512f_mov<mode>): Extend to V_128.
4639 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
4640 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
4641 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
4642 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
4643 * config/i386/i386-expand.cc (expand_vec_perm_blend):
4644 Canonicalize vec_merge.
4646 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4648 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
4649 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
4650 (autovectorize_vector_modes): Ditto.
4651 (vectorize_related_mode): Ditto.
4653 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4655 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
4656 all 32b Darwin PowerPC cases.
4658 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4660 * config/darwin-sections.def (static_init_section): Add the
4661 __TEXT,__StaticInit section.
4662 * config/darwin.cc (darwin_function_section): Use the static init
4663 section for global initializers, to match other platform toolchains.
4665 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4667 * config/darwin-sections.def (darwin_exception_section): Move to
4669 * config/darwin.cc (darwin_emit_except_table_label): Align before
4670 the exception table label.
4671 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
4672 relative 4byte relocs.
4674 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4676 * config/darwin.cc (dump_machopic_symref_flags): New.
4677 (debug_machopic_symref_flags): New.
4679 2023-09-04 Pan Li <pan2.li@intel.com>
4681 * config/riscv/riscv-vector-builtins-types.def
4682 (vfloat16mf4_t): Add FP16 intrinsic def.
4683 (vfloat16mf2_t): Ditto.
4684 (vfloat16m1_t): Ditto.
4685 (vfloat16m2_t): Ditto.
4686 (vfloat16m4_t): Ditto.
4687 (vfloat16m8_t): Ditto.
4689 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
4691 PR tree-optimization/108757
4692 * match.pd ((X - N * M) / N): New pattern.
4693 ((X + N * M) / N): New pattern.
4694 ((X + C) div_rshift N): New pattern.
4696 2023-09-04 Guo Jie <guojie@loongson.cn>
4698 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
4699 movsf_hardfloat and movdf_hardfloat.
4701 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
4703 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
4704 In unsigned QImode test, check for sign extended subreg and/or
4705 constant operands, and do a sign extension in that case.
4706 * config/loongarch/loongarch.md (TARGET_64BIT): Define
4707 template cbranchqi4.
4709 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
4711 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
4712 from memory into floating-point registers.
4714 2023-09-03 Pan Li <pan2.li@intel.com>
4716 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
4718 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
4720 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
4722 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
4723 pointer before overwriting it.
4725 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
4727 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
4728 Associate the __float128 type to float128_type_node so that it can
4729 be recognized by the compiler.
4730 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
4731 Add the flag "FLOAT128_TYPE" to gcc and associate a function
4732 with the suffix "q" to "f128".
4733 * doc/extend.texi:Added support for 128-bit floating-point functions on
4734 the LoongArch architecture.
4736 2023-09-01 Jakub Jelinek <jakub@redhat.com>
4739 * common.opt (fabi-version=): Document version 19.
4740 * doc/invoke.texi (-fabi-version=): Likewise.
4742 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4744 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
4745 New combine pattern.
4746 (*cond_<float_cvt><vconvert><mode>): Ditto.
4747 (*cond_<optab><vnconvert><mode>): Ditto.
4748 (*cond_<float_cvt><vnconvert><mode>): Ditto.
4749 (*cond_<optab><mode><vnconvert>): Ditto.
4750 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
4751 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
4752 (<float_cvt><vconvert><mode>2): Adjust.
4753 (<optab><vnconvert><mode>2): Adjust.
4754 (<float_cvt><vnconvert><mode>2): Adjust.
4755 (<optab><mode><vnconvert>2): Adjust.
4756 (<float_cvt><mode><vnconvert>2): Adjust.
4757 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
4759 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4761 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
4762 New combine pattern.
4763 (*cond_trunc<mode><v_double_trunc>): Ditto.
4764 * config/riscv/autovec.md: Adjust.
4765 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
4767 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4769 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
4770 New combine pattern.
4771 (*cond_<optab><v_quad_trunc><mode>): Ditto.
4772 (*cond_<optab><v_oct_trunc><mode>): Ditto.
4773 (*cond_trunc<mode><v_double_trunc>): Ditto.
4774 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
4775 (<optab><v_oct_trunc><mode>2): Ditto.
4777 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4779 * config/riscv/autovec.md: Adjust.
4780 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
4781 (expand_cond_len_binop): Ditto.
4782 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
4783 (expand_cond_len_op): Ditto.
4784 (expand_cond_len_unop): Ditto.
4785 (expand_cond_len_binop): Ditto.
4786 (expand_cond_len_ternop): Ditto.
4788 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4790 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
4791 VECT_COMPARE_COSTS by default.
4793 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
4795 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
4797 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4799 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
4801 * config/riscv/riscv.opt: Add dynamic compile option.
4803 2023-09-01 Pan Li <pan2.li@intel.com>
4805 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
4806 vls floating-point autovec.
4807 * config/riscv/vector-iterators.md: New iterator for
4808 floating-point V and VLS.
4809 * config/riscv/vector.md: Add VLS to floating-point binop.
4811 2023-09-01 Andrew Pinski <apinski@marvell.com>
4813 PR tree-optimization/19832
4814 * match.pd: Add pattern to optimize
4815 `(a != b) ? a OP b : c`.
4817 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
4818 Guo Jie <guojie@loongson.cn>
4821 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
4822 frame_pointer_needed to determine whether to use the $fp register.
4824 2023-08-31 Andrew Pinski <apinski@marvell.com>
4826 PR tree-optimization/110915
4827 * match.pd (min_value, max_value): Extend to vector constants.
4829 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
4831 * config.in: Regenerate.
4832 * config/darwin-c.cc: Change spelling to macOS.
4833 * config/darwin-driver.cc: Likewise.
4834 * config/darwin.h: Likewise.
4835 * configure.ac: Likewise.
4836 * doc/contrib.texi: Likewise.
4837 * doc/extend.texi: Likewise.
4838 * doc/invoke.texi: Likewise.
4839 * doc/plugins.texi: Likewise.
4840 * doc/tm.texi: Regenerate.
4841 * doc/tm.texi.in: Change spelling to macOS.
4842 * plugin.cc: Likewise.
4844 2023-08-31 Pan Li <pan2.li@intel.com>
4846 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
4847 * config/riscv/autovec.md: Ditto.
4849 2023-08-31 Pan Li <pan2.li@intel.com>
4851 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
4852 * config/riscv/autovec.md: Ditto.
4854 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
4856 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
4857 rather than a call. List each possible destination register
4858 in the call pattern.
4860 2023-08-31 Pan Li <pan2.li@intel.com>
4862 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
4863 * config/riscv/autovec.md: Ditto.
4865 2023-08-31 Pan Li <pan2.li@intel.com>
4866 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4868 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
4869 * config/riscv/autovec.md: Ditto.
4870 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
4872 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
4874 * config/riscv/autovec.md (shifts): Use
4875 vector_scalar_shift_operand.
4876 * config/riscv/predicates.md (vector_scalar_shift_operand): New
4879 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4881 * config.gcc: Add vector cost model framework for RVV.
4882 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
4883 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
4884 * config/riscv/t-riscv: Ditto.
4885 * config/riscv/riscv-vector-costs.cc: New file.
4886 * config/riscv/riscv-vector-costs.h: New file.
4888 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
4891 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
4892 AltiVec address operands.
4893 (define_insn_and_split movxo): Likewise.
4894 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
4895 redundant mode size check.
4897 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
4899 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
4900 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
4901 Change to default policy.
4902 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
4903 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
4904 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
4906 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
4908 * config/riscv/autovec-opt.md: Adjust.
4909 * config/riscv/autovec-vls.md: Ditto.
4910 * config/riscv/autovec.md: Ditto.
4911 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
4912 (enum insn_flags): Add insn flags.
4913 (emit_vlmax_insn): Adjust.
4914 (emit_vlmax_fp_insn): Delete.
4915 (emit_vlmax_ternary_insn): Delete.
4916 (emit_vlmax_fp_ternary_insn): Delete.
4917 (emit_nonvlmax_insn): Adjust.
4918 (emit_vlmax_slide_insn): Delete.
4919 (emit_nonvlmax_slide_tu_insn): Delete.
4920 (emit_vlmax_merge_insn): Delete.
4921 (emit_vlmax_cmp_insn): Delete.
4922 (emit_vlmax_cmp_mu_insn): Delete.
4923 (emit_vlmax_masked_mu_insn): Delete.
4924 (emit_scalar_move_insn): Delete.
4925 (emit_nonvlmax_integer_move_insn): Delete.
4926 (emit_vlmax_insn_lra): Add.
4927 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
4928 (emit_vlmax_insn): Adjust.
4929 (emit_nonvlmax_insn): Adjust.
4930 (emit_vlmax_insn_lra): Add.
4931 (emit_vlmax_fp_insn): Delete.
4932 (emit_vlmax_ternary_insn): Delete.
4933 (emit_vlmax_fp_ternary_insn): Delete.
4934 (emit_vlmax_slide_insn): Delete.
4935 (emit_nonvlmax_slide_tu_insn): Delete.
4936 (emit_nonvlmax_slide_insn): Delete.
4937 (emit_vlmax_merge_insn): Delete.
4938 (emit_vlmax_cmp_insn): Delete.
4939 (emit_vlmax_cmp_mu_insn): Delete.
4940 (emit_vlmax_masked_insn): Delete.
4941 (emit_nonvlmax_masked_insn): Delete.
4942 (emit_vlmax_masked_store_insn): Delete.
4943 (emit_nonvlmax_masked_store_insn): Delete.
4944 (emit_vlmax_masked_mu_insn): Delete.
4945 (emit_vlmax_masked_fp_mu_insn): Delete.
4946 (emit_nonvlmax_tu_insn): Delete.
4947 (emit_nonvlmax_fp_tu_insn): Delete.
4948 (emit_nonvlmax_tumu_insn): Delete.
4949 (emit_nonvlmax_fp_tumu_insn): Delete.
4950 (emit_scalar_move_insn): Delete.
4951 (emit_cpop_insn): Delete.
4952 (emit_vlmax_integer_move_insn): Delete.
4953 (emit_nonvlmax_integer_move_insn): Delete.
4954 (emit_vlmax_gather_insn): Delete.
4955 (emit_vlmax_masked_gather_mu_insn): Delete.
4956 (emit_vlmax_compress_insn): Delete.
4957 (emit_nonvlmax_compress_insn): Delete.
4958 (emit_vlmax_reduction_insn): Delete.
4959 (emit_vlmax_fp_reduction_insn): Delete.
4960 (emit_nonvlmax_fp_reduction_insn): Delete.
4961 (expand_vec_series): Adjust.
4962 (expand_const_vector): Adjust.
4963 (legitimize_move): Adjust.
4964 (sew64_scalar_helper): Adjust.
4965 (expand_tuple_move): Adjust.
4966 (expand_vector_init_insert_elems): Adjust.
4967 (expand_vector_init_merge_repeating_sequence): Adjust.
4968 (expand_vec_cmp): Adjust.
4969 (expand_vec_cmp_float): Adjust.
4970 (expand_vec_perm): Adjust.
4971 (shuffle_merge_patterns): Adjust.
4972 (shuffle_compress_patterns): Adjust.
4973 (shuffle_decompress_patterns): Adjust.
4974 (expand_load_store): Adjust.
4975 (expand_cond_len_op): Adjust.
4976 (expand_cond_len_unop): Adjust.
4977 (expand_cond_len_binop): Adjust.
4978 (expand_gather_scatter): Adjust.
4979 (expand_cond_len_ternop): Adjust.
4980 (expand_reduction): Adjust.
4981 (expand_lanes_load_store): Adjust.
4982 (expand_fold_extract_last): Adjust.
4983 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
4984 * config/riscv/vector.md: Adjust.
4986 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
4989 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
4990 load/store with length only on 64-bit Power10.
4992 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
4994 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
4995 SWAP option is enabled.
4996 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
4998 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
5000 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
5001 Use common insn for signed and unsigned front-end definitions.
5002 * config/arm/arm_mve_builtins.def
5003 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
5004 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
5005 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
5008 (mve_rot): Likewise.
5010 (VxCADDQ_M): Likewise.
5011 * config/arm/unspecs.md (unspec): Likewise.
5012 * config/arm/mve.md: Fix minor typo.
5014 2023-08-31 liuhongt <hongtao.liu@intel.com>
5016 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
5017 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
5018 (VF_AVX512HFBF16): Renamed to VHFBF.
5019 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
5020 (VF_AVX512FP16): Removed.
5021 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
5022 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
5023 (rsqrt<mode>2): Ditto.
5024 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
5025 (vcond<mode><code>): Ditto.
5026 (vcond<sseintvecmodelower><mode>): Ditto.
5027 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
5028 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
5029 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
5030 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
5031 (cmla<conj_op><mode>4): Ditto.
5032 (fma_<mode>_fadd_fmul): Ditto.
5033 (fma_<mode>_fadd_fcmul): Ditto.
5034 (fma_<complexopname>_<mode>_fma_zero): Ditto.
5035 (fma_<mode>_fmaddc_bcst): Ditto.
5036 (fma_<mode>_fcmaddc_bcst): Ditto.
5037 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
5038 (cmul<conj_op><mode>3): Ditto.
5039 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
5041 (vec_unpacks_lo_<mode>): Ditto.
5042 (vec_unpacks_hi_<mode>): Ditto.
5043 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
5044 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
5045 (*vec_extract<mode>_0): Ditto.
5046 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
5048 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
5051 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
5053 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
5055 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
5056 (operator_minus::overflow_free_p): New declare.
5057 (operator_mult::overflow_free_p): New declare.
5058 * range-op.cc (range_op_handler::overflow_free_p): New function.
5059 (range_operator::overflow_free_p): New default function.
5060 (operator_plus::overflow_free_p): New function.
5061 (operator_minus::overflow_free_p): New function.
5062 (operator_mult::overflow_free_p): New function.
5063 * range-op.h (range_op_handler::overflow_free_p): New declare.
5064 (range_operator::overflow_free_p): New declare.
5065 * value-range.cc (irange::nonnegative_p): New function.
5066 (irange::nonpositive_p): New function.
5067 * value-range.h (irange::nonnegative_p): New declare.
5068 (irange::nonpositive_p): New declare.
5070 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
5073 * config/pru/predicates.md (const_0_operand): New predicate.
5074 (pru_cstore_comparison_operator): Ditto.
5075 * config/pru/pru.md (cstore<mode>4): New pattern.
5078 2023-08-30 Richard Biener <rguenther@suse.de>
5080 PR tree-optimization/111228
5081 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
5082 New simplifications.
5084 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5086 * config/riscv/autovec.md (movmisalign<mode>): Delete.
5088 2023-08-30 Die Li <lidie@eswincomputing.com>
5089 Fei Gao <gaofei@eswincomputing.com>
5091 * config/riscv/peephole.md: New pattern.
5092 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
5093 (zcmp_mv_sreg_operand): New predicate.
5094 * config/riscv/riscv.md: New predicate.
5095 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
5096 (*mvsa01<X:mode>): New pattern.
5098 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
5100 * config/riscv/riscv.cc
5101 (riscv_zcmp_can_use_popretz): true if popretz can be used
5102 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
5103 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
5104 * config/riscv/riscv.md: define A0_REGNUM
5105 * config/riscv/zc.md
5106 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
5107 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
5108 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
5109 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
5110 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
5111 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
5112 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
5113 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
5114 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
5115 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
5116 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
5117 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
5119 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
5121 * config/riscv/iterators.md
5122 (slot0_offset): slot 0 offset in stack GPRs area in bytes
5123 (slot1_offset): slot 1 offset in stack GPRs area in bytes
5124 (slot2_offset): likewise
5125 (slot3_offset): likewise
5126 (slot4_offset): likewise
5127 (slot5_offset): likewise
5128 (slot6_offset): likewise
5129 (slot7_offset): likewise
5130 (slot8_offset): likewise
5131 (slot9_offset): likewise
5132 (slot10_offset): likewise
5133 (slot11_offset): likewise
5134 (slot12_offset): likewise
5135 * config/riscv/predicates.md
5136 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
5137 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
5138 (stack_push_up_to_s1_operand): likewise
5139 (stack_push_up_to_s2_operand): likewise
5140 (stack_push_up_to_s3_operand): likewise
5141 (stack_push_up_to_s4_operand): likewise
5142 (stack_push_up_to_s5_operand): likewise
5143 (stack_push_up_to_s6_operand): likewise
5144 (stack_push_up_to_s7_operand): likewise
5145 (stack_push_up_to_s8_operand): likewise
5146 (stack_push_up_to_s9_operand): likewise
5147 (stack_push_up_to_s11_operand): likewise
5148 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
5149 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
5150 (stack_pop_up_to_s1_operand): likewise
5151 (stack_pop_up_to_s2_operand): likewise
5152 (stack_pop_up_to_s3_operand): likewise
5153 (stack_pop_up_to_s4_operand): likewise
5154 (stack_pop_up_to_s5_operand): likewise
5155 (stack_pop_up_to_s6_operand): likewise
5156 (stack_pop_up_to_s7_operand): likewise
5157 (stack_pop_up_to_s8_operand): likewise
5158 (stack_pop_up_to_s9_operand): likewise
5159 (stack_pop_up_to_s11_operand): likewise
5160 * config/riscv/riscv-protos.h
5161 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
5162 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
5163 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
5164 (riscv_use_multi_push): true if multi push is used
5165 (riscv_multi_push_sregs_count): num of sregs in multi-push
5166 (riscv_multi_push_regs_count): num of regs in multi-push
5167 (riscv_16bytes_align): align to 16 bytes
5168 (riscv_stack_align): moved to a better place
5169 (riscv_save_libcall_count): no functional change
5170 (riscv_compute_frame_info): add zcmp frame info
5171 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
5172 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
5173 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
5174 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
5175 (riscv_expand_prologue): allocate stack by cm.push
5176 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
5177 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
5178 (zcmp_base_adj): calculate stack adjustment base size
5179 (zcmp_additional_adj): calculate stack adjustment additional size
5180 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
5181 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
5192 (S10_MASK): likewise
5193 (S11_MASK): likewise
5194 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
5195 (ZCMP_MAX_SPIMM): max spimm value
5196 (ZCMP_SP_INC_STEP): zcmp sp increment step
5197 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
5198 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
5199 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
5200 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
5201 * config/riscv/riscv.md: include zc.md
5202 * config/riscv/zc.md: New file. machine description for zcmp
5204 2023-08-30 Jakub Jelinek <jakub@redhat.com>
5206 PR tree-optimization/110914
5207 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
5208 adjust_last_stmt unless len is known constant.
5210 2023-08-30 Jakub Jelinek <jakub@redhat.com>
5212 PR tree-optimization/111015
5213 * gimple-ssa-store-merging.cc
5214 (imm_store_chain_info::output_merged_store): Use wi::mask and
5215 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
5216 build_int_cst to build BIT_AND_EXPR mask.
5218 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5220 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
5221 (call_may_clobber_ref_p_1): Ditto.
5222 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
5223 (get_alias_ptr_type_for_ptr_address): Ditto.
5225 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5227 * config/riscv/riscv-vsetvl.cc
5228 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
5230 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5232 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
5233 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
5236 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
5238 * config/riscv/zicond.md: New splitters to rewrite single bit
5239 sign extension as the condition to a czero in the desired form.
5241 2023-08-29 David Malcolm <dmalcolm@redhat.com>
5244 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
5246 2023-08-29 David Malcolm <dmalcolm@redhat.com>
5249 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
5251 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
5253 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
5254 zvfh can generate zfa extended instruction fli.h, just like zfh.
5256 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
5257 Vineet Gupta <vineetg@rivosinc.com>
5259 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
5260 __riscv_unaligned_avoid with value 1 or
5261 __riscv_unaligned_slow with value 1 or
5262 __riscv_unaligned_fast with value 1
5263 * config/riscv/riscv.cc (riscv_option_override): Define
5264 riscv_user_wants_strict_align. Set
5265 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
5266 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
5268 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
5270 * config/riscv/autovec-vls.md: Update types
5271 * config/riscv/riscv.md: Add vector placeholder type
5272 * config/riscv/vector.md: Update types
5274 2023-08-29 Carl Love <cel@us.ibm.com>
5276 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
5277 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
5278 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
5279 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
5280 New buit-in definitions.
5281 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
5282 overloaded definition.
5283 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
5285 2023-08-29 Pan Li <pan2.li@intel.com>
5286 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
5288 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
5289 (riscv_legitimize_const_move): Handle ref plus const poly.
5291 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
5293 * common/config/riscv/riscv-common.cc
5294 (riscv_implied_info): Add implications from unprivileged extensions.
5295 (riscv_ext_version_table): Add stub support for all unprivileged
5296 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
5298 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
5300 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
5301 Add stub support for all vendor extensions supported by Binutils.
5303 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
5305 * common/config/riscv/riscv-common.cc
5306 (riscv_implied_info): Add implications from privileged extensions.
5307 (riscv_ext_version_table): Add stub support for all privileged
5308 extensions supported by Binutils.
5310 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
5312 * config/riscv/autovec.md: Adjust
5313 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
5314 (get_vlmax_rtx): Exported.
5315 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
5316 (emit_vlmax_masked_gather_mu_insn): Adjust.
5317 (get_vlmax_rtx): New func.
5318 (expand_load_store): Adjust.
5319 (expand_cond_len_unop): Call expand_cond_len_op.
5320 (expand_cond_len_op): New subroutine.
5321 (expand_cond_len_binop): Call expand_cond_len_op.
5322 (expand_cond_len_ternop): Call expand_cond_len_op.
5323 (expand_lanes_load_store): Adjust.
5325 2023-08-29 Jakub Jelinek <jakub@redhat.com>
5328 PR middle-end/111209
5329 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
5330 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
5331 carry-out on higher limb. Don't match it though if it could be
5332 matched later on 4 argument addition/subtraction.
5334 2023-08-29 Andrew Pinski <apinski@marvell.com>
5336 PR tree-optimization/111147
5337 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
5338 instead of matching bit_not.
5340 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
5342 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
5345 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5347 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
5348 (pass_vsetvl::compute_local_properties): Fix bug.
5349 (pass_vsetvl::commit_vsetvls): Ditto.
5350 * config/riscv/riscv-vsetvl.h: New function.
5352 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
5355 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
5357 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
5358 force_reg mem target operand.
5359 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
5360 (*pred_mov<mode>): Remove imm -> reg pattern.
5361 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
5363 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
5365 * common/config/loongarch/loongarch-common.cc:
5366 Enable '-free' on O2 and above.
5367 * doc/invoke.texi: Modify the description information
5368 of the '-free' compilation option and add the LoongArch
5371 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
5373 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
5375 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
5377 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
5378 Implement the 'Zihintpause' extension, version 2.0.
5379 (riscv_ext_flag_table) Add 'Zihintpause' handling.
5380 * config/riscv/riscv-builtins.cc: Remove availability predicate
5381 "always" and add "hint_pause".
5382 (riscv_builtins) : Add "pause" extension.
5383 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
5384 * config/riscv/riscv.md (riscv_pause): Adjust output based on
5387 2023-08-28 Andrew Pinski <apinski@marvell.com>
5389 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
5390 instead of specifically checking for ~X.
5392 2023-08-28 Andrew Pinski <apinski@marvell.com>
5394 PR tree-optimization/111146
5395 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
5398 2023-08-28 Andrew Pinski <apinski@marvell.com>
5400 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
5401 when resimplify returns true.
5402 (match_simplify_replacement): Print only if accepted the match-and-simplify
5403 result rather than the full sequence.
5405 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5407 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
5409 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
5411 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5413 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
5415 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5417 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
5418 (vmulltq_poly): New.
5419 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
5420 (vmulltq_poly): New.
5421 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
5422 (vmulltq_poly): New.
5423 * config/arm/arm_mve.h (vmulltq_poly): Remove.
5424 (vmullbq_poly): Remove.
5425 (vmullbq_poly_m): Remove.
5426 (vmulltq_poly_m): Remove.
5427 (vmullbq_poly_x): Remove.
5428 (vmulltq_poly_x): Remove.
5429 (vmulltq_poly_p8): Remove.
5430 (vmullbq_poly_p8): Remove.
5431 (vmulltq_poly_p16): Remove.
5432 (vmullbq_poly_p16): Remove.
5433 (vmullbq_poly_m_p8): Remove.
5434 (vmullbq_poly_m_p16): Remove.
5435 (vmulltq_poly_m_p8): Remove.
5436 (vmulltq_poly_m_p16): Remove.
5437 (vmullbq_poly_x_p8): Remove.
5438 (vmullbq_poly_x_p16): Remove.
5439 (vmulltq_poly_x_p8): Remove.
5440 (vmulltq_poly_x_p16): Remove.
5441 (__arm_vmulltq_poly_p8): Remove.
5442 (__arm_vmullbq_poly_p8): Remove.
5443 (__arm_vmulltq_poly_p16): Remove.
5444 (__arm_vmullbq_poly_p16): Remove.
5445 (__arm_vmullbq_poly_m_p8): Remove.
5446 (__arm_vmullbq_poly_m_p16): Remove.
5447 (__arm_vmulltq_poly_m_p8): Remove.
5448 (__arm_vmulltq_poly_m_p16): Remove.
5449 (__arm_vmullbq_poly_x_p8): Remove.
5450 (__arm_vmullbq_poly_x_p16): Remove.
5451 (__arm_vmulltq_poly_x_p8): Remove.
5452 (__arm_vmulltq_poly_x_p16): Remove.
5453 (__arm_vmulltq_poly): Remove.
5454 (__arm_vmullbq_poly): Remove.
5455 (__arm_vmullbq_poly_m): Remove.
5456 (__arm_vmulltq_poly_m): Remove.
5457 (__arm_vmullbq_poly_x): Remove.
5458 (__arm_vmulltq_poly_x): Remove.
5460 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5462 * config/arm/arm-mve-builtins-functions.h (class
5463 unspec_mve_function_exact_insn_vmull_poly): New.
5465 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5467 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
5468 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
5470 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5472 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
5473 support for 'U' and 'p' format specifiers.
5475 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5477 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
5479 (TYPES_poly_8_16): New.
5481 * config/arm/arm-mve-builtins.def (p8): New type suffix.
5483 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
5485 (struct type_suffix_info): Add poly_p field.
5487 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5489 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
5491 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
5493 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
5495 * config/arm/arm_mve.h (vmulltq_int): Remove.
5496 (vmullbq_int): Remove.
5497 (vmullbq_int_m): Remove.
5498 (vmulltq_int_m): Remove.
5499 (vmullbq_int_x): Remove.
5500 (vmulltq_int_x): Remove.
5501 (vmulltq_int_u8): Remove.
5502 (vmullbq_int_u8): Remove.
5503 (vmulltq_int_s8): Remove.
5504 (vmullbq_int_s8): Remove.
5505 (vmulltq_int_u16): Remove.
5506 (vmullbq_int_u16): Remove.
5507 (vmulltq_int_s16): Remove.
5508 (vmullbq_int_s16): Remove.
5509 (vmulltq_int_u32): Remove.
5510 (vmullbq_int_u32): Remove.
5511 (vmulltq_int_s32): Remove.
5512 (vmullbq_int_s32): Remove.
5513 (vmullbq_int_m_s8): Remove.
5514 (vmullbq_int_m_s32): Remove.
5515 (vmullbq_int_m_s16): Remove.
5516 (vmullbq_int_m_u8): Remove.
5517 (vmullbq_int_m_u32): Remove.
5518 (vmullbq_int_m_u16): Remove.
5519 (vmulltq_int_m_s8): Remove.
5520 (vmulltq_int_m_s32): Remove.
5521 (vmulltq_int_m_s16): Remove.
5522 (vmulltq_int_m_u8): Remove.
5523 (vmulltq_int_m_u32): Remove.
5524 (vmulltq_int_m_u16): Remove.
5525 (vmullbq_int_x_s8): Remove.
5526 (vmullbq_int_x_s16): Remove.
5527 (vmullbq_int_x_s32): Remove.
5528 (vmullbq_int_x_u8): Remove.
5529 (vmullbq_int_x_u16): Remove.
5530 (vmullbq_int_x_u32): Remove.
5531 (vmulltq_int_x_s8): Remove.
5532 (vmulltq_int_x_s16): Remove.
5533 (vmulltq_int_x_s32): Remove.
5534 (vmulltq_int_x_u8): Remove.
5535 (vmulltq_int_x_u16): Remove.
5536 (vmulltq_int_x_u32): Remove.
5537 (__arm_vmulltq_int_u8): Remove.
5538 (__arm_vmullbq_int_u8): Remove.
5539 (__arm_vmulltq_int_s8): Remove.
5540 (__arm_vmullbq_int_s8): Remove.
5541 (__arm_vmulltq_int_u16): Remove.
5542 (__arm_vmullbq_int_u16): Remove.
5543 (__arm_vmulltq_int_s16): Remove.
5544 (__arm_vmullbq_int_s16): Remove.
5545 (__arm_vmulltq_int_u32): Remove.
5546 (__arm_vmullbq_int_u32): Remove.
5547 (__arm_vmulltq_int_s32): Remove.
5548 (__arm_vmullbq_int_s32): Remove.
5549 (__arm_vmullbq_int_m_s8): Remove.
5550 (__arm_vmullbq_int_m_s32): Remove.
5551 (__arm_vmullbq_int_m_s16): Remove.
5552 (__arm_vmullbq_int_m_u8): Remove.
5553 (__arm_vmullbq_int_m_u32): Remove.
5554 (__arm_vmullbq_int_m_u16): Remove.
5555 (__arm_vmulltq_int_m_s8): Remove.
5556 (__arm_vmulltq_int_m_s32): Remove.
5557 (__arm_vmulltq_int_m_s16): Remove.
5558 (__arm_vmulltq_int_m_u8): Remove.
5559 (__arm_vmulltq_int_m_u32): Remove.
5560 (__arm_vmulltq_int_m_u16): Remove.
5561 (__arm_vmullbq_int_x_s8): Remove.
5562 (__arm_vmullbq_int_x_s16): Remove.
5563 (__arm_vmullbq_int_x_s32): Remove.
5564 (__arm_vmullbq_int_x_u8): Remove.
5565 (__arm_vmullbq_int_x_u16): Remove.
5566 (__arm_vmullbq_int_x_u32): Remove.
5567 (__arm_vmulltq_int_x_s8): Remove.
5568 (__arm_vmulltq_int_x_s16): Remove.
5569 (__arm_vmulltq_int_x_s32): Remove.
5570 (__arm_vmulltq_int_x_u8): Remove.
5571 (__arm_vmulltq_int_x_u16): Remove.
5572 (__arm_vmulltq_int_x_u32): Remove.
5573 (__arm_vmulltq_int): Remove.
5574 (__arm_vmullbq_int): Remove.
5575 (__arm_vmullbq_int_m): Remove.
5576 (__arm_vmulltq_int_m): Remove.
5577 (__arm_vmullbq_int_x): Remove.
5578 (__arm_vmulltq_int_x): Remove.
5580 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5582 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
5583 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
5585 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5587 * config/arm/arm-mve-builtins-functions.h (class
5588 unspec_mve_function_exact_insn_vmull): New.
5590 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5592 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
5593 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
5595 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
5597 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
5598 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
5599 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
5600 (mve_vmulltq_int_<supf><mode>): Merge into ...
5601 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
5602 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
5603 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
5604 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
5605 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
5606 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
5607 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
5609 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5611 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
5614 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5616 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
5617 (binary_acca_int64): Likewise.
5619 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
5621 * range-op-float.cc (fold_range): Handle relations.
5623 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
5625 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
5626 Optimize the function implementation.
5628 2023-08-28 liuhongt <hongtao.liu@intel.com>
5631 * config/i386/sse.md (V48_AVX2): Rename to ..
5632 (V48_128_256): .. this.
5633 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
5634 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
5635 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
5636 integral modes when TARGET_AVX2 is not available.
5637 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
5638 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
5640 (maskstore<mode><sseintvecmodelower>): Ditto.
5642 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5644 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
5646 (after_or_same_p): Ditto.
5647 (find_reg_killed_by): Delete.
5648 (has_vsetvl_killed_avl_p): Ditto.
5649 (anticipatable_occurrence_p): Refactor.
5650 (any_set_in_bb_p): Delete.
5651 (count_regno_occurrences): Ditto.
5652 (backward_propagate_worthwhile_p): Ditto.
5653 (demands_can_be_fused_p): Ditto.
5654 (earliest_pred_can_be_fused_p): New function.
5655 (vsetvl_dominated_by_p): Ditto.
5656 (vector_insn_info::parse_insn): Refactor.
5657 (vector_insn_info::merge): Refactor.
5658 (vector_insn_info::dump): Refactor.
5659 (vector_infos_manager::vector_infos_manager): Refactor.
5660 (vector_infos_manager::all_empty_predecessor_p): Delete.
5661 (vector_infos_manager::all_same_avl_p): Ditto.
5662 (vector_infos_manager::create_bitmap_vectors): Refactor.
5663 (vector_infos_manager::free_bitmap_vectors): Refactor.
5664 (vector_infos_manager::dump): Refactor.
5665 (pass_vsetvl::update_block_info): New function.
5666 (enum fusion_type): Ditto.
5667 (pass_vsetvl::get_backward_fusion_type): Delete.
5668 (pass_vsetvl::hard_empty_block_p): Ditto.
5669 (pass_vsetvl::backward_demand_fusion): Ditto.
5670 (pass_vsetvl::forward_demand_fusion): Ditto.
5671 (pass_vsetvl::demand_fusion): Ditto.
5672 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
5673 (pass_vsetvl::compute_local_properties): Ditto.
5674 (pass_vsetvl::earliest_fusion): New function.
5675 (pass_vsetvl::vsetvl_fusion): Ditto.
5676 (pass_vsetvl::commit_vsetvls): Refactor.
5677 (get_first_vsetvl_before_rvv_insns): Ditto.
5678 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
5679 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
5680 (pass_vsetvl::df_post_optimization): Refactor.
5681 (pass_vsetvl::lazy_vsetvl): Ditto.
5682 * config/riscv/riscv-vsetvl.h: Ditto.
5684 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5686 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
5687 * config/riscv/riscv-protos.h (enum insn_type): New enum.
5688 (expand_fold_extract_last): New function.
5689 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
5690 (emit_cpop_insn): Ditto.
5691 (emit_nonvlmax_compress_insn): Ditto.
5692 (expand_fold_extract_last): Ditto.
5693 * config/riscv/vector.md: Fix vcpop.m ratio demand.
5695 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
5697 * config/riscv/sync-rvwmo.md: updated types to "multi" or
5698 "atomic" based on number of assembly lines generated
5699 * config/riscv/sync-ztso.md: likewise
5700 * config/riscv/sync.md: likewise
5702 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
5704 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
5706 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
5707 instructions FLI.H/S/D can load.
5708 * config/riscv/iterators.md (ceil): New.
5709 * config/riscv/riscv-opts.h (MASK_ZFA): New.
5711 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
5712 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
5713 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
5715 (riscv_const_insns): Likewise.
5716 (riscv_legitimize_const_move): Likewise.
5717 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
5719 (riscv_split_doubleword_move): Likewise.
5720 (riscv_output_move): Output the mov instructions in zfa extension.
5721 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
5723 (riscv_secondary_memory_needed): Likewise.
5724 * config/riscv/riscv.md (fminm<mode>3): New.
5725 (fmaxm<mode>3): New.
5726 (movsidf2_low_rv32): New.
5727 (movsidf2_high_rv32): New.
5728 (movdfsisi3_rv32): New.
5729 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
5730 * config/riscv/riscv.opt: New.
5732 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
5735 * omp-general.cc (omp_runtime_api_procname): New.
5736 (omp_runtime_api_call): Moved here from omp-low.cc, and make
5738 * omp-general.h: Include omp-api.h.
5739 * omp-low.cc (omp_runtime_api_call): Delete this copy.
5741 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
5743 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
5744 * doc/gimple.texi (GIMPLE instruction set): Add
5745 GIMPLE_OMP_STRUCTURED_BLOCK.
5746 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
5747 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
5748 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
5749 GIMPLE_OMP_STRUCTURED_BLOCK.
5750 (pp_gimple_stmt_1): Likewise.
5751 * gimple-walk.cc (walk_gimple_stmt): Likewise.
5752 * gimple.cc (gimple_build_omp_structured_block): New.
5753 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
5754 * gimple.h (gimple_build_omp_structured_block): Declare.
5755 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
5756 (CASE_GIMPLE_OMP): Likewise.
5757 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
5758 (gimplify_expr): Likewise.
5759 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
5760 GIMPLE_OMP_STRUCTURED_BLOCK.
5761 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
5762 (lower_omp_1): Likewise.
5763 (diagnose_sb_1): Likewise.
5764 (diagnose_sb_2): Likewise.
5765 * tree-inline.cc (remap_gimple_stmt): Handle
5766 GIMPLE_OMP_STRUCTURED_BLOCK.
5767 (estimate_num_insns): Likewise.
5768 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
5769 (convert_local_reference_stmt): Likewise.
5770 (convert_gimple_call): Likewise.
5771 * tree-pretty-print.cc (dump_generic_node): Handle
5772 OMP_STRUCTURED_BLOCK.
5773 * tree.def (OMP_STRUCTURED_BLOCK): New.
5774 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
5776 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
5778 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
5779 cost. Add some comments about different constants handling.
5781 2023-08-25 Andrew Pinski <apinski@marvell.com>
5783 * match.pd (`a ? one_zero : one_zero`): Move
5784 below detection of minmax.
5786 2023-08-25 Andrew Pinski <apinski@marvell.com>
5788 * match.pd (`a | C -> C`): New pattern.
5790 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
5792 * caller-save.cc (new_saved_hard_reg):
5793 Rename TRUE/FALSE to true/false.
5794 (setup_save_areas): Ditto.
5795 * gcc.cc (set_collect_gcc_options): Ditto.
5796 (driver::build_multilib_strings): Ditto.
5797 (print_multilib_info): Ditto.
5798 * genautomata.cc (gen_cpu_unit): Ditto.
5799 (gen_query_cpu_unit): Ditto.
5800 (gen_bypass): Ditto.
5801 (gen_excl_set): Ditto.
5802 (gen_presence_absence_set): Ditto.
5803 (gen_presence_set): Ditto.
5804 (gen_final_presence_set): Ditto.
5805 (gen_absence_set): Ditto.
5806 (gen_final_absence_set): Ditto.
5807 (gen_automaton): Ditto.
5808 (gen_regexp_repeat): Ditto.
5809 (gen_regexp_allof): Ditto.
5810 (gen_regexp_oneof): Ditto.
5811 (gen_regexp_sequence): Ditto.
5812 (process_decls): Ditto.
5813 (reserv_sets_are_intersected): Ditto.
5814 (initiate_excl_sets): Ditto.
5815 (form_reserv_sets_list): Ditto.
5816 (check_presence_pattern_sets): Ditto.
5817 (check_absence_pattern_sets): Ditto.
5818 (check_regexp_units_distribution): Ditto.
5819 (check_unit_distributions_to_automata): Ditto.
5820 (create_ainsns): Ditto.
5821 (output_insn_code_cases): Ditto.
5822 (output_internal_dead_lock_func): Ditto.
5823 (form_important_insn_automata_lists): Ditto.
5824 * gengtype-state.cc (read_state_files_list): Ditto.
5825 * gengtype.cc (main): Ditto.
5826 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
5828 * gimple.cc (gimple_build_call_from_tree): Ditto.
5829 (preprocess_case_label_vec_for_gimple): Ditto.
5830 * gimplify.cc (gimplify_call_expr): Ditto.
5831 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
5833 2023-08-25 Richard Biener <rguenther@suse.de>
5835 PR tree-optimization/111137
5836 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
5837 Properly handle grouped stores from other SLP instances.
5839 2023-08-25 Richard Biener <rguenther@suse.de>
5841 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
5842 Split out from vect_slp_analyze_node_dependences, remove
5844 (vect_slp_analyze_load_dependences): Split out from
5845 vect_slp_analyze_node_dependences, adjust comments. Process
5846 queued stores before any disambiguation.
5847 (vect_slp_analyze_node_dependences): Remove.
5848 (vect_slp_analyze_instance_dependence): Adjust.
5850 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
5852 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
5854 (operator_not_equal::fold_range): Adjust for relations.
5855 (operator_lt::fold_range): Same.
5856 (operator_gt::fold_range): Same.
5857 (foperator_unordered_equal::fold_range): Same.
5858 (foperator_unordered_lt::fold_range): Same.
5859 (foperator_unordered_le::fold_range): Same.
5860 (foperator_unordered_gt::fold_range): Same.
5861 (foperator_unordered_ge::fold_range): Same.
5863 2023-08-25 Richard Biener <rguenther@suse.de>
5865 PR tree-optimization/111136
5866 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
5867 stores force STMT_VINFO_STRIDED_P and also duplicate that
5870 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5872 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
5875 2023-08-25 liuhongt <hongtao.liu@intel.com>
5877 * config/i386/sse.md (vec_set<mode>): Removed.
5878 (V_128H): Merge into ..
5880 (V_256H): Merge into ..
5882 (V_512): Add V32HF, V32BF.
5883 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
5885 (vcond<mode><sseintvecmodelower>): Removed
5886 (vcondu<mode><sseintvecmodelower>): Removed.
5887 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
5889 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
5892 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
5893 Adjust paramter order.
5895 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
5898 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
5900 2023-08-24 David Malcolm <dmalcolm@redhat.com>
5903 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
5904 list of functions known to the analyzer.
5906 2023-08-24 Richard Biener <rguenther@suse.de>
5908 PR tree-optimization/111123
5909 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
5910 remove indirect clobbers here ...
5911 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
5912 (remove_indirect_clobbers): New function.
5914 2023-08-24 Jan Hubicka <jh@suse.cz>
5916 * cfg.h (struct control_flow_graph): New field full_profile.
5917 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
5918 * cfg.cc (init_flow): Set full_profile to false.
5919 * graphite.cc (graphite_transform_loops): Set full_profile to false.
5920 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
5921 * predict.cc (pass_profile::execute): Set full_profile to true.
5922 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
5923 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
5924 if full_profile is set.
5925 * tree-inline.cc (initialize_cfun): Initialize full_profile.
5926 (expand_call_inline): Combine full_profile.
5928 2023-08-24 Richard Biener <rguenther@suse.de>
5930 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
5931 load_p to ldst_p, fix mistakes and rely on
5932 STMT_VINFO_DATA_REF.
5934 2023-08-24 Jan Hubicka <jh@suse.cz>
5936 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
5937 of newly build trap bb.
5939 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5941 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
5942 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
5943 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
5945 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
5947 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
5948 * config/riscv/riscv.cc (riscv_option_override): Set sched
5951 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
5953 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
5955 2023-08-24 Richard Biener <rguenther@suse.de>
5957 PR tree-optimization/111125
5958 * tree-vect-slp.cc (vect_slp_function): Split at novector
5959 loop entry, do not push blocks in novector loops.
5961 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
5963 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
5965 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5967 * genmatch.cc (decision_tree::gen): Support
5968 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
5969 * gimple-match-exports.cc (gimple_simplify): Ditto.
5970 (gimple_resimplify6): New function.
5971 (gimple_resimplify7): New function.
5972 (gimple_match_op::resimplify): Support
5973 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
5974 (convert_conditional_op): Ditto.
5975 (build_call_internal): Ditto.
5976 (try_conditional_simplification): Ditto.
5977 (gimple_extract): Ditto.
5978 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
5979 * internal-fn.cc (CASE): Ditto.
5981 2023-08-24 Richard Biener <rguenther@suse.de>
5983 PR tree-optimization/111115
5984 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
5985 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
5987 * tree-vect-slp.cc (arg3_arg2_map): New.
5988 (vect_get_operand_map): Handle IFN_MASK_STORE.
5989 (vect_slp_child_index_for_operand): New function.
5990 (vect_build_slp_tree_1): Handle statements with no LHS,
5992 (vect_remove_slp_scalar_calls): Likewise.
5993 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
5994 SLP child corresponding to the ifn value index.
5995 (vectorizable_store): Likewise for the mask index. Support
5997 (vectorizable_load): Lookup the SLP child corresponding to the
6000 2023-08-24 Richard Biener <rguenther@suse.de>
6002 PR tree-optimization/111125
6003 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
6004 for the remain_defs processing.
6006 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
6008 * config/aarch64/aarch64.cc: Include ssa.h.
6009 (aarch64_multiply_add_p): Require the second operand of an
6010 Advanced SIMD subtraction to be a multiplication. Assume that
6011 such an operation won't be fused if the second operand is used
6012 multiple times and if the first operand is also a multiplication.
6014 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6016 * tree-vect-loop.cc (vectorizable_reduction): Apply
6017 LEN_FOLD_EXTRACT_LAST.
6018 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
6020 2023-08-24 Richard Biener <rguenther@suse.de>
6022 PR tree-optimization/111128
6023 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
6024 Emit external shift operand inline if we promoted it with
6025 another pattern stmt.
6027 2023-08-24 Pan Li <pan2.li@intel.com>
6029 * config/riscv/autovec.md: Fix typo.
6031 2023-08-24 Pan Li <pan2.li@intel.com>
6033 * config/riscv/riscv-vector-builtins-bases.cc
6034 (class binop_frm): Removed.
6035 (class reverse_binop_frm): Ditto.
6036 (class widen_binop_frm): Ditto.
6037 (class vfmacc_frm): Ditto.
6038 (class vfnmacc_frm): Ditto.
6039 (class vfmsac_frm): Ditto.
6040 (class vfnmsac_frm): Ditto.
6041 (class vfmadd_frm): Ditto.
6042 (class vfnmadd_frm): Ditto.
6043 (class vfmsub_frm): Ditto.
6044 (class vfnmsub_frm): Ditto.
6045 (class vfwmacc_frm): Ditto.
6046 (class vfwnmacc_frm): Ditto.
6047 (class vfwmsac_frm): Ditto.
6048 (class vfwnmsac_frm): Ditto.
6049 (class unop_frm): Ditto.
6050 (class vfrec7_frm): Ditto.
6051 (class binop): Add frm_op_type template arg.
6052 (class unop): Ditto.
6053 (class widen_binop): Ditto.
6054 (class widen_binop_fp): Ditto.
6055 (class reverse_binop): Ditto.
6056 (class vfmacc): Ditto.
6057 (class vfnmsac): Ditto.
6058 (class vfmadd): Ditto.
6059 (class vfnmsub): Ditto.
6060 (class vfnmacc): Ditto.
6061 (class vfmsac): Ditto.
6062 (class vfnmadd): Ditto.
6063 (class vfmsub): Ditto.
6064 (class vfwmacc): Ditto.
6065 (class vfwnmacc): Ditto.
6066 (class vfwmsac): Ditto.
6067 (class vfwnmsac): Ditto.
6068 (class float_misc): Ditto.
6070 2023-08-24 Andrew Pinski <apinski@marvell.com>
6072 PR tree-optimization/111109
6073 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
6074 Add check to make sure cmp and icmp are inverse.
6076 2023-08-24 Andrew Pinski <apinski@marvell.com>
6078 PR tree-optimization/95929
6079 * match.pd (convert?(-a)): New pattern
6080 for 1bit integer types.
6082 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
6085 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6087 * common/config/i386/cpuinfo.h (get_available_features):
6088 Add avx10_set and version and detect avx10.1.
6089 (cpu_indicator_init): Handle avx10.1-512.
6090 * common/config/i386/i386-common.cc
6091 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
6092 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
6093 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
6094 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
6095 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
6096 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
6098 * common/config/i386/i386-cpuinfo.h (enum processor_features):
6099 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
6100 FEATURE_AVX10_512BIT.
6101 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
6102 AVX10_512BIT, AVX10_1 and AVX10_1_512.
6103 * config/i386/constraints.md (Yk): Add AVX10_1.
6106 * config/i386/cpuid.h (bit_AVX10): New.
6107 (bit_AVX10_256): Ditto.
6108 (bit_AVX10_512): Ditto.
6109 * config/i386/i386-c.cc (ix86_target_macros_internal):
6110 Define AVX10_512BIT and AVX10_1.
6111 * config/i386/i386-isa.def
6112 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
6113 (AVX10_1): Add DEF_PTA(AVX10_1).
6114 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
6115 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
6117 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
6118 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
6119 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
6120 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
6121 (ix86_conditional_register_usage): Ditto.
6122 (ix86_hard_regno_mode_ok): Ditto.
6123 (ix86_rtx_costs): Ditto.
6124 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
6125 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
6127 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
6128 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
6129 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
6132 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
6135 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6137 * common/config/i386/i386-common.cc
6138 (ix86_check_avx10): New function to check isa_flags and
6139 isa_flags_explicit to emit warning when AVX10 is enabled
6141 (ix86_check_avx512): New function to check isa_flags and
6142 isa_flags_explicit to emit warning when AVX512 is enabled
6144 (ix86_handle_option): Do not change the flags when warning
6146 * config/i386/driver-i386.cc (host_detect_local_cpu):
6147 Do not append -mno-avx10.1 for -march=native.
6149 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
6152 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6154 * common/config/i386/i386-common.cc
6155 (ix86_check_avx10_vector_width): New function to check isa_flags
6156 to emit a warning when there is a conflict in AVX10 options for
6158 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
6159 * config/i386/driver-i386.cc (host_detect_local_cpu):
6160 Do not append -mno-avx10-max-512bit for -march=native.
6162 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
6165 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6167 * config/i386/avx512vldqintrin.h: Remove target attribute.
6168 * config/i386/i386-builtin.def (BDESC):
6169 Add OPTION_MASK_ISA2_AVX10_1.
6170 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
6171 * config/i386/i386-expand.cc
6172 (ix86_check_builtin_isa_match): Ditto.
6173 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
6174 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
6175 and avx10_1_or_avx512vl.
6176 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
6177 (VF1_128_256VLDQ_AVX10_1): Ditto.
6178 (VI8_AVX512VLDQ_AVX10_1): Ditto.
6179 (<sse>_andnot<mode>3<mask_name>):
6180 Add TARGET_AVX10_1 and change isa attr from avx512dq to
6181 avx10_1_or_avx512dq.
6182 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
6183 avx512vl to avx10_1_or_avx512vl.
6184 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
6185 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
6186 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
6188 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
6190 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
6191 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
6192 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
6194 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
6195 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
6196 Remove target check.
6197 (avx512dq_mul<mode>3<mask_name>): Ditto.
6198 (*avx512dq_mul<mode>3<mask_name>): Ditto.
6199 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
6200 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
6201 Remove target check.
6202 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
6203 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
6204 Remove target check.
6205 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
6206 (mask_avx512vl_condition): Ditto.
6209 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
6212 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6214 * config/i386/avx512vldqintrin.h: Remove target attribute.
6215 * config/i386/i386-builtin.def (BDESC):
6216 Add OPTION_MASK_ISA2_AVX10_1.
6217 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
6218 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
6219 (VI48_AVX512VLDQ_AVX10_1): Ditto.
6220 (VF2_AVX512VL): Remove.
6221 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
6223 (*<code><mode>3<mask_name>): Change isa attribute to
6224 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
6225 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
6226 to avx10_1_or_avx512vl.
6227 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
6228 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
6229 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
6231 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
6232 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
6233 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
6235 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
6236 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
6237 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
6238 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
6239 (float<floatunssuffix>v4div4sf2<mask_name>):
6241 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
6242 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
6243 (float<floatunssuffix>v2div2sf2): Ditto.
6244 (float<floatunssuffix>v2div2sf2_mask): Ditto.
6245 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
6246 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
6247 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
6248 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
6249 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
6250 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
6251 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
6252 Change when constraint is enabled.
6254 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
6257 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6259 * config/i386/avx512vldqintrin.h: Remove target attribute.
6260 * config/i386/i386-builtin.def (BDESC):
6261 Add OPTION_MASK_ISA2_AVX10_1.
6262 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
6263 (VFH_AVX512VLDQ_AVX10_1): Ditto.
6264 (VF1_AVX512VLDQ_AVX10_1): Ditto.
6265 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
6266 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
6267 (vec_pack<floatprefix>_float_<mode>): Change iterator to
6268 VI8_AVX512VLDQ_AVX10_1. Remove target check.
6269 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
6270 VF1_AVX512VLDQ_AVX10_1. Remove target check.
6271 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
6272 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
6273 (avx512vl_vextractf128<mode>): Change iterator to
6274 VI48F_256_DQVL_AVX10_1. Remove target check.
6275 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
6276 (vec_extract_hi_<mode>): Ditto.
6277 (avx512vl_vinsert<mode>): Ditto.
6278 (vec_set_lo_<mode><mask_name>): Ditto.
6279 (vec_set_hi_<mode><mask_name>): Ditto.
6280 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
6281 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
6282 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
6283 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
6284 * config/i386/subst.md (mask_avx512dq_condition): Add
6286 (mask_scalar_merge): Ditto.
6288 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
6291 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
6294 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
6297 2023-08-24 Richard Biener <rguenther@suse.de>
6300 * dwarf2out.cc (prune_unused_types_walk): Handle
6301 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
6302 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
6303 and DW_TAG_dynamic_type as to only output them when referenced.
6305 2023-08-24 liuhongt <hongtao.liu@intel.com>
6307 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
6310 2023-08-24 liuhongt <hongtao.liu@intel.com>
6312 * common/config/i386/i386-common.cc (processor_names): Add new
6313 member graniterapids-s and arrowlake-s.
6314 * config/i386/i386-options.cc (processor_alias_table): Update
6315 table with PROCESSOR_ARROWLAKE_S and
6316 PROCESSOR_GRANITERAPIDS_D.
6317 (m_GRANITERAPID_D): New macro.
6318 (m_ARROWLAKE_S): Ditto.
6319 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
6320 (processor_cost_table): Add icelake_cost for
6321 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
6322 PROCESSOR_ARROWLAKE_S.
6323 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
6325 * config/i386/i386.h (enum processor_type): Add new member
6326 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
6327 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
6328 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
6330 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
6332 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
6333 to help simplify code further.
6335 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
6337 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
6338 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
6339 Initialize using a range instead of value and edge.
6340 (phi_group::calculate_using_modifier): Use initializer value and
6341 process for relations after trying for iteration convergence.
6342 (phi_group::refine_using_relation): Use initializer range.
6343 (phi_group::dump): Rework the dump output.
6344 (phi_analyzer::process_phi): Allow multiple constant initilizers.
6345 Dump groups immediately as created.
6346 (phi_analyzer::dump): Tweak output.
6347 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
6348 (phi_group::initial_value): Delete.
6349 (phi_group::refine_using_relation): Adjust prototype.
6350 (phi_group::m_initial_value): Delete.
6351 (phi_group::m_initial_edge): Delete.
6352 (phi_group::m_vr): Use int_range_max.
6353 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
6355 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
6357 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
6358 no group was created.
6359 (phi_analyzer::process_phi): Do not create groups of one phi node.
6361 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
6363 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
6364 CODE, CMP_CODE and BIT_CODE arguments.
6365 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
6366 (aarch64_gen_ccmp_next): Likewise.
6367 * doc/tm.texi: Regenerated.
6369 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
6371 * coretypes.h (rtx_code): Add forward declaration.
6372 * rtl.h (rtx_code): Make compatible with forward declaration.
6374 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
6377 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
6378 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
6379 DWIH mode iterator. Disable (=&r,m,m) alternative for
6381 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
6382 alternative for 32-bit targets.
6384 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
6386 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
6387 appropriate type attribute.
6389 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
6391 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
6392 (*copysign<mode>_neg): Ditto.
6393 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
6394 (<optab><mode>2): Ditto.
6395 (cond_<optab><mode>): New.
6396 (cond_len_<optab><mode>): Ditto.
6397 * config/riscv/riscv-protos.h (enum insn_type): New.
6398 (expand_cond_len_unop): New helper func.
6399 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
6400 (expand_cond_len_unop): New helper func.
6402 2023-08-23 Jan Hubicka <jh@suse.cz>
6404 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
6405 (should_duplicate_loop_header_p): Fix return value for static exits.
6406 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
6408 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
6410 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
6411 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
6412 and update the final nest accordingly.
6414 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
6416 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
6417 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
6418 and update the final nest accordingly.
6420 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
6422 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
6423 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
6424 gvec_oprnds with auto_delete_vec.
6426 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6428 * config/riscv/riscv-vsetvl.cc
6429 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
6431 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6433 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
6435 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
6437 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6439 * config/riscv/vector.md: Add attribute.
6441 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6443 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
6444 (vector_infos_manager::all_same_ratio_p): Ditto.
6445 (vector_infos_manager::all_same_avl_p): Ditto.
6446 (pass_vsetvl::refine_vsetvls): Ditto.
6447 (pass_vsetvl::cleanup_vsetvls): Ditto.
6448 (pass_vsetvl::commit_vsetvls): Ditto.
6449 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
6450 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
6451 (pass_vsetvl::compute_probabilities): Ditto.
6453 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6455 * config/riscv/t-riscv: Add riscv-vsetvl.def
6457 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
6459 * config/riscv/riscv.opt: Add --param names
6460 riscv-autovec-preference and riscv-autovec-lmul
6462 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
6464 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
6466 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
6468 * tree-core.h (enum omp_clause_defaultmap_kind): Add
6469 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
6470 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
6471 * tree-pretty-print.cc (dump_omp_clause): Likewise.
6473 2023-08-22 Jakub Jelinek <jakub@redhat.com>
6476 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
6477 types aren't supported in C++.
6479 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6481 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
6482 * internal-fn.cc (fold_len_extract_direct): Ditto.
6483 (expand_fold_len_extract_optab_fn): Ditto.
6484 (direct_fold_len_extract_optab_supported_p): Ditto.
6485 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
6486 * optabs.def (OPTAB_D): Ditto.
6488 2023-08-22 Richard Biener <rguenther@suse.de>
6490 * tree-vect-stmts.cc (vectorizable_store): Do not bump
6491 DR_GROUP_STORE_COUNT here. Remove early out.
6492 (vect_transform_stmt): Only call vectorizable_store on
6493 the last element of an interleaving chain.
6495 2023-08-22 Richard Biener <rguenther@suse.de>
6497 PR tree-optimization/94864
6498 PR tree-optimization/94865
6499 PR tree-optimization/93080
6500 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
6501 for vector insertion from vector extraction.
6503 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6504 Kewen.Lin <linkw@linux.ibm.com>
6506 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
6507 (vectorizable_live_operation): Add live vectorization for length loop
6510 2023-08-22 David Malcolm <dmalcolm@redhat.com>
6513 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
6515 2023-08-22 Pan Li <pan2.li@intel.com>
6517 * config/riscv/riscv-vector-builtins-bases.cc
6518 (vfwredusum_frm_obj): New declaration.
6520 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6521 * config/riscv/riscv-vector-builtins-functions.def
6522 (vfwredusum_frm): New intrinsic function def.
6524 2023-08-21 David Faust <david.faust@oracle.com>
6526 * config/bpf/bpf.md (neg): Second operand must be a register.
6528 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
6530 * config/riscv/bitmanip.md: Added bitmanip type to insns
6531 that are missing types.
6533 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
6535 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
6538 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
6540 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
6541 Fix format specifier.
6543 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
6545 * value-range.cc (frange::union_nans): Return false if nothing
6547 (range_tests_floats): New test.
6549 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
6551 PR tree-optimization/111048
6552 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
6554 (fold_vec_perm_cst): Remove workaround and again call
6555 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
6556 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
6558 2023-08-21 Richard Biener <rguenther@suse.de>
6560 PR tree-optimization/111082
6561 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
6562 pun operations that can overflow.
6564 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6566 * lcm.cc (compute_antinout_edge): Export as global use.
6567 (compute_earliest): Ditto.
6568 (compute_rev_insert_delete): Ditto.
6569 * lcm.h (compute_antinout_edge): Ditto.
6570 (compute_earliest): Ditto.
6572 2023-08-21 Richard Biener <rguenther@suse.de>
6574 PR tree-optimization/111070
6575 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
6576 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
6578 2023-08-21 Andrew Pinski <apinski@marvell.com>
6580 PR tree-optimization/111002
6581 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
6583 2023-08-21 liuhongt <hongtao.liu@intel.com>
6585 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
6587 * common/config/i386/i386-common.cc (alias_table): Support
6588 -march=gracemont as an alias of -march=alderlake.
6590 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
6592 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
6593 instead of src in the call to ix86_expand_sse_cmp.
6594 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
6595 force operands[1] to a register.
6596 (<any_extend:insn>v4hiv4si2): Ditto.
6597 (<any_extend:insn>v2siv2di2): Ditto.
6599 2023-08-20 Andrew Pinski <apinski@marvell.com>
6601 PR tree-optimization/111006
6602 PR tree-optimization/110986
6603 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
6605 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
6608 * Makefile.in: improve error message when /usr/include is
6611 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
6613 PR middle-end/111017
6614 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
6615 to expand_omp_build_cond for 'factor != 0' condition, resulting
6616 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
6618 2023-08-19 Guo Jie <guojie@loongson.cn>
6619 Lulu Cheng <chenglulu@loongson.cn>
6621 * config/loongarch/t-loongarch: Add loongarch-driver.h into
6622 TM_H. Add loongarch-def.h and loongarch-tune.h into
6625 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
6628 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
6629 Also handle V2QImode.
6630 (ix86_expand_sse_extend): New function.
6631 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
6632 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
6633 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
6634 (<any_extend:insn>v2hiv2si2): Ditto.
6635 (<any_extend:insn>v2qiv2hi2): Ditto.
6636 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
6637 (<any_extend:insn>v4hiv4si2): Ditto.
6638 (<any_extend:insn>v2siv2di2): Ditto.
6640 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
6643 * value-range.cc (irange::union_bitmask): Return FALSE if updated
6644 bitmask is semantically equivalent to the original mask.
6645 (irange::intersect_bitmask): Same.
6646 (irange::get_bitmask): Add comment.
6648 2023-08-18 Richard Biener <rguenther@suse.de>
6650 PR tree-optimization/111019
6651 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
6652 also scrap base and offset in case the ref is indirect.
6654 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
6656 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
6658 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
6661 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
6663 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
6665 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
6667 (vectorizable_store): ... here.
6669 2023-08-18 Richard Biener <rguenther@suse.de>
6671 PR tree-optimization/111048
6672 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
6675 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
6678 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
6681 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
6683 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
6684 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
6685 and update the final nest accordingly.
6687 2023-08-18 Andrew Pinski <apinski@marvell.com>
6689 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
6690 cond_len_neg and cond_len_one_cmpl.
6692 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
6694 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
6695 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
6696 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
6697 (*local_pic_load_32d<ANYF:mode>): Ditto.
6698 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
6699 (*local_pic_store<ANYF:mode>): Ditto.
6700 (*local_pic_store<ANYLSF:mode>): Ditto.
6701 (*local_pic_store_32d<ANYF:mode>): Ditto.
6702 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
6704 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
6705 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6707 * config/riscv/predicates.md (vector_const_0_operand): New.
6708 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
6710 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
6712 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
6715 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
6717 PR tree-optimization/111009
6718 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
6720 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
6722 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
6723 slots_num initialization from here ...
6724 (lra_spill): ... to here before the 1st call of
6725 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
6728 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
6731 * doc/invoke.texi (Option Summary): Mention
6732 -Wcompare-distinct-pointer-types under `Warning Options'.
6733 (Warning Options): Document -Wcompare-distinct-pointer-types.
6735 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
6737 * recog.cc (memory_address_addr_space_p): Mark possibly unused
6740 2023-08-17 Richard Biener <rguenther@suse.de>
6742 PR tree-optimization/111039
6743 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
6744 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
6746 2023-08-17 Alex Coplan <alex.coplan@arm.com>
6748 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
6750 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
6753 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
6754 `naked' function attribute.
6755 (bpf_warn_func_return): New function.
6756 (TARGET_WARN_FUNC_RETURN): Define.
6757 (bpf_expand_prologue): Add preventive comment.
6758 (bpf_expand_epilogue): Likewise.
6759 * doc/extend.texi (BPF Function Attributes): Document the `naked'
6762 2023-08-17 Richard Biener <rguenther@suse.de>
6764 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
6765 !needs_fold_left_reduction_p to decide whether we can
6766 handle the reduction with association.
6767 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
6768 reductions perform all arithmetic in an unsigned type.
6770 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6772 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
6774 * configure: Regenerate.
6776 2023-08-17 Pan Li <pan2.li@intel.com>
6778 * config/riscv/riscv-vector-builtins-bases.cc
6779 (widen_freducop): Add frm_opt_type template arg.
6780 (vfwredosum_frm_obj): New declaration.
6782 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6783 * config/riscv/riscv-vector-builtins-functions.def
6784 (vfwredosum_frm): New intrinsic function def.
6786 2023-08-17 Pan Li <pan2.li@intel.com>
6788 * config/riscv/riscv-vector-builtins-bases.cc
6789 (vfredosum_frm_obj): New declaration.
6791 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6792 * config/riscv/riscv-vector-builtins-functions.def
6793 (vfredosum_frm): New intrinsic function def.
6795 2023-08-17 Pan Li <pan2.li@intel.com>
6797 * config/riscv/riscv-vector-builtins-bases.cc
6798 (class freducop): Add frm_op_type template arg.
6799 (vfredusum_frm_obj): New declaration.
6801 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6802 * config/riscv/riscv-vector-builtins-functions.def
6803 (vfredusum_frm): New intrinsic function def.
6804 * config/riscv/riscv-vector-builtins-shapes.cc
6805 (struct reduc_alu_frm_def): New class for frm shape.
6806 (SHAPE): New declaration.
6807 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
6809 2023-08-17 Pan Li <pan2.li@intel.com>
6811 * config/riscv/riscv-vector-builtins-bases.cc
6812 (class vfncvt_f): Add frm_op_type template arg.
6813 (vfncvt_f_frm_obj): New declaration.
6815 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6816 * config/riscv/riscv-vector-builtins-functions.def
6817 (vfncvt_f_frm): New intrinsic function def.
6819 2023-08-17 Pan Li <pan2.li@intel.com>
6821 * config/riscv/riscv-vector-builtins-bases.cc
6822 (vfncvt_xu_frm_obj): New declaration.
6824 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6825 * config/riscv/riscv-vector-builtins-functions.def
6826 (vfncvt_xu_frm): New intrinsic function def.
6828 2023-08-17 Pan Li <pan2.li@intel.com>
6830 * config/riscv/riscv-vector-builtins-bases.cc
6831 (class vfncvt_x): Add frm_op_type template arg.
6832 (BASE): New declaration.
6833 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6834 * config/riscv/riscv-vector-builtins-functions.def
6835 (vfncvt_x_frm): New intrinsic function def.
6836 * config/riscv/riscv-vector-builtins-shapes.cc
6837 (struct narrow_alu_frm_def): New shape function for frm.
6838 (SHAPE): New declaration.
6839 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
6841 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6843 * config/i386/avx512vldqintrin.h: Remove target attribute.
6844 * config/i386/i386-builtin.def (BDESC):
6845 Add OPTION_MASK_ISA2_AVX10_1.
6846 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
6847 (VFH_AVX512VLDQ_AVX10_1): Ditto.
6848 (VF1_AVX512VLDQ_AVX10_1): Ditto.
6849 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
6850 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
6851 (vec_pack<floatprefix>_float_<mode>): Change iterator to
6852 VI8_AVX512VLDQ_AVX10_1. Remove target check.
6853 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
6854 VF1_AVX512VLDQ_AVX10_1. Remove target check.
6855 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
6856 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
6857 (avx512vl_vextractf128<mode>): Change iterator to
6858 VI48F_256_DQVL_AVX10_1. Remove target check.
6859 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
6860 (vec_extract_hi_<mode>): Ditto.
6861 (avx512vl_vinsert<mode>): Ditto.
6862 (vec_set_lo_<mode><mask_name>): Ditto.
6863 (vec_set_hi_<mode><mask_name>): Ditto.
6864 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
6865 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
6866 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
6867 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
6868 * config/i386/subst.md (mask_avx512dq_condition): Add
6870 (mask_scalar_merge): Ditto.
6872 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6874 * config/i386/avx512vldqintrin.h: Remove target attribute.
6875 * config/i386/i386-builtin.def (BDESC):
6876 Add OPTION_MASK_ISA2_AVX10_1.
6877 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
6878 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
6879 (VI48_AVX512VLDQ_AVX10_1): Ditto.
6880 (VF2_AVX512VL): Remove.
6881 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
6883 (*<code><mode>3<mask_name>): Change isa attribute to
6884 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
6885 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
6886 to avx10_1_or_avx512vl.
6887 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
6888 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
6889 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
6891 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
6892 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
6893 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
6895 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
6896 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
6897 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
6898 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
6899 (float<floatunssuffix>v4div4sf2<mask_name>):
6901 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
6902 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
6903 (float<floatunssuffix>v2div2sf2): Ditto.
6904 (float<floatunssuffix>v2div2sf2_mask): Ditto.
6905 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
6906 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
6907 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
6908 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
6909 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
6910 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
6911 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
6912 Change when constraint is enabled.
6914 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6917 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
6918 (second_sew_less_than_first_sew_p): Fix bug.
6919 (first_sew_less_than_second_sew_p): Ditto.
6921 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6923 * config/i386/avx512vldqintrin.h: Remove target attribute.
6924 * config/i386/i386-builtin.def (BDESC):
6925 Add OPTION_MASK_ISA2_AVX10_1.
6926 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
6927 * config/i386/i386-expand.cc
6928 (ix86_check_builtin_isa_match): Ditto.
6929 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
6930 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
6931 and avx10_1_or_avx512vl.
6932 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
6933 (VF1_128_256VLDQ_AVX10_1): Ditto.
6934 (VI8_AVX512VLDQ_AVX10_1): Ditto.
6935 (<sse>_andnot<mode>3<mask_name>):
6936 Add TARGET_AVX10_1 and change isa attr from avx512dq to
6937 avx10_1_or_avx512dq.
6938 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
6939 avx512vl to avx10_1_or_avx512vl.
6940 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
6941 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
6942 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
6944 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
6946 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
6947 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
6948 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
6950 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
6951 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
6952 Remove target check.
6953 (avx512dq_mul<mode>3<mask_name>): Ditto.
6954 (*avx512dq_mul<mode>3<mask_name>): Ditto.
6955 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
6956 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
6957 Remove target check.
6958 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
6959 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
6960 Remove target check.
6961 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
6962 (mask_avx512vl_condition): Ditto.
6965 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6967 * common/config/i386/i386-common.cc
6968 (ix86_check_avx10_vector_width): New function to check isa_flags
6969 to emit a warning when there is a conflict in AVX10 options for
6971 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
6972 * config/i386/driver-i386.cc (host_detect_local_cpu):
6973 Do not append -mno-avx10-max-512bit for -march=native.
6975 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6977 * common/config/i386/i386-common.cc
6978 (ix86_check_avx10): New function to check isa_flags and
6979 isa_flags_explicit to emit warning when AVX10 is enabled
6981 (ix86_check_avx512): New function to check isa_flags and
6982 isa_flags_explicit to emit warning when AVX512 is enabled
6984 (ix86_handle_option): Do not change the flags when warning
6986 * config/i386/driver-i386.cc (host_detect_local_cpu):
6987 Do not append -mno-avx10.1 for -march=native.
6989 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6991 * common/config/i386/cpuinfo.h (get_available_features):
6992 Add avx10_set and version and detect avx10.1.
6993 (cpu_indicator_init): Handle avx10.1-512.
6994 * common/config/i386/i386-common.cc
6995 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
6996 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
6997 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
6998 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
6999 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
7000 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
7002 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7003 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
7004 FEATURE_AVX10_512BIT.
7005 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7006 AVX10_512BIT, AVX10_1 and AVX10_1_512.
7007 * config/i386/constraints.md (Yk): Add AVX10_1.
7010 * config/i386/cpuid.h (bit_AVX10): New.
7011 (bit_AVX10_256): Ditto.
7012 (bit_AVX10_512): Ditto.
7013 * config/i386/i386-c.cc (ix86_target_macros_internal):
7014 Define AVX10_512BIT and AVX10_1.
7015 * config/i386/i386-isa.def
7016 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
7017 (AVX10_1): Add DEF_PTA(AVX10_1).
7018 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
7019 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
7021 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
7022 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
7023 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
7024 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
7025 (ix86_conditional_register_usage): Ditto.
7026 (ix86_hard_regno_mode_ok): Ditto.
7027 (ix86_rtx_costs): Ditto.
7028 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
7029 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
7031 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
7032 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
7033 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
7036 2023-08-17 Sergei Trofimovich <siarheit@google.com>
7038 * flag-types.h (vrp_mode): Remove unused.
7040 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
7042 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
7045 2023-08-17 Andrew Pinski <apinski@marvell.com>
7047 * internal-fn.def (COND_NOT): New internal function.
7048 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
7050 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
7051 into conditional not.
7052 * optabs.def (cond_one_cmpl): New optab.
7053 (cond_len_one_cmpl): Likewise.
7055 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
7057 PR rtl-optimization/110254
7058 * ira-color.cc (improve_allocation): Update array
7059 allocated_hard_reg_p.
7061 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
7063 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
7064 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
7065 (lra_update_fp2sp_elimination): Ditto.
7066 (update_reg_eliminate): Adjust spill_pseudos call.
7067 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
7068 in lra_update_fp2sp_elimination.
7070 2023-08-16 Richard Ball <richard.ball@arm.com>
7072 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
7073 * config/aarch64/aarch64-tune.md: Regenerate.
7074 * doc/invoke.texi: Document Cortex-A720 CPU.
7076 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
7078 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
7080 (<u>avg<v_double_trunc>3_ceil): Ditto.
7081 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
7084 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
7086 * internal-fn.cc (vec_extract_direct): Change type argument
7088 (expand_vec_extract_optab_fn): Call convert_optab_fn.
7089 (direct_vec_extract_optab_supported_p): Use
7090 convert_optab_supported_p.
7092 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
7093 Richard Sandiford <richard.sandiford@arm.com>
7095 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
7096 (valid_mask_for_fold_vec_perm_cst_p): New function.
7097 (fold_vec_perm_cst): Likewise.
7098 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
7099 (test_fold_vec_perm_cst): New namespace.
7100 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
7101 (test_fold_vec_perm_cst::validate_res): Likewise.
7102 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
7103 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
7104 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
7105 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
7106 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
7107 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
7108 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
7109 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
7110 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
7111 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
7112 (test_fold_vec_perm_cst::test): Likewise.
7113 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
7115 2023-08-16 Pan Li <pan2.li@intel.com>
7117 * config/riscv/riscv-vector-builtins-bases.cc
7118 (BASE): New declaration.
7119 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7120 * config/riscv/riscv-vector-builtins-functions.def
7121 (vfwcvt_xu_frm): New intrinsic function def.
7123 2023-08-16 Pan Li <pan2.li@intel.com>
7125 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
7127 2023-08-16 Pan Li <pan2.li@intel.com>
7129 * config/riscv/riscv-vector-builtins-bases.cc
7130 (BASE): New declaration.
7131 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7132 * config/riscv/riscv-vector-builtins-functions.def
7133 (vfwcvt_x_frm): New intrinsic function def.
7135 2023-08-16 Pan Li <pan2.li@intel.com>
7137 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
7138 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7139 * config/riscv/riscv-vector-builtins-functions.def
7140 (vfcvt_f_frm): New intrinsic function def.
7142 2023-08-16 Pan Li <pan2.li@intel.com>
7144 * config/riscv/riscv-vector-builtins-bases.cc
7145 (BASE): New declaration.
7146 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7147 * config/riscv/riscv-vector-builtins-functions.def
7148 (vfcvt_xu_frm): New intrinsic function def..
7150 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
7153 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
7154 extract when the element is 7 on BE while 8 on LE for byte or 3 on
7155 BE while 4 on LE for halfword.
7157 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
7160 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
7162 (vsx_extract_v4si): New expand for V4SI extraction.
7163 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
7164 word 1 from BE order.
7165 (*mfvsrwz): New insn pattern for mfvsrwz.
7166 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
7167 word 1 from BE order.
7168 (*vsx_extract_si): Remove.
7169 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
7172 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7174 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
7176 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
7177 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
7178 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
7179 (expand_lanes_load_store): New function.
7180 * config/riscv/vector-iterators.md: New iterator.
7182 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7184 * internal-fn.cc (internal_load_fn_p): Apply
7185 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
7186 (internal_store_fn_p): Ditto.
7187 (internal_fn_len_index): Ditto.
7188 (internal_fn_mask_index): Ditto.
7189 (internal_fn_stored_value_index): Ditto.
7190 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
7191 (vect_load_lanes_supported): Ditto.
7192 * tree-vect-loop.cc: Ditto.
7193 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
7194 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
7195 (get_group_load_store_type): Ditto.
7196 (vectorizable_store): Ditto.
7197 (vectorizable_load): Ditto.
7198 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
7199 (vect_load_lanes_supported): Ditto.
7201 2023-08-16 Pan Li <pan2.li@intel.com>
7203 * config/riscv/riscv-vector-builtins-bases.cc
7204 (enum frm_op_type): New type for frm.
7205 (BASE): New declaration.
7206 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7207 * config/riscv/riscv-vector-builtins-functions.def
7208 (vfcvt_x_frm): New intrinsic function def.
7210 2023-08-16 liuhongt <hongtao.liu@intel.com>
7212 * config/i386/i386-builtins.cc
7213 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
7214 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
7215 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
7216 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
7217 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
7218 for use_scatter_8parts
7219 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
7220 (TARGET_USE_GATHER_8PARTS): .. this.
7221 (TARGET_USE_SCATTER): Rename to ..
7222 (TARGET_USE_SCATTER_8PARTS): .. this.
7223 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
7224 (X86_TUNE_USE_GATHER_8PARTS): .. this.
7225 (X86_TUNE_USE_SCATTER): Rename to
7226 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
7227 * config/i386/i386.opt: Add new options mgather, mscatter.
7229 2023-08-16 liuhongt <hongtao.liu@intel.com>
7231 * config/i386/i386-options.cc (m_GDS): New macro.
7232 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
7234 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
7235 (X86_TUNE_USE_GATHER): Ditto.
7237 2023-08-16 liuhongt <hongtao.liu@intel.com>
7239 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
7240 vmovsd when moving DFmode between SSE_REGS.
7241 (movhi_internal): Generate vmovdqa instead of vmovsh when
7242 moving HImode between SSE_REGS.
7243 (mov<mode>_internal): Use vmovaps instead of vmovsh when
7244 moving HF/BFmode between SSE_REGS.
7246 2023-08-15 David Faust <david.faust@oracle.com>
7248 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
7250 2023-08-15 David Faust <david.faust@oracle.com>
7253 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
7254 for any mode 32-bits or smaller, not just SImode.
7256 2023-08-15 Martin Jambor <mjambor@suse.cz>
7260 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
7261 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
7262 (ipcp_transform_function): Do not deallocate transformation info.
7263 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
7265 (vn_reference_lookup_2): When hitting default-def vuse, query
7266 IPA-CP transformation info for any known constants.
7268 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
7269 Thomas Schwinge <thomas@codesourcery.com>
7271 * gimplify.cc (oacc_region_type_name): New function.
7272 (oacc_default_clause): If no 'default' clause appears on this
7273 compute construct, see if one appears on a lexically containing
7275 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
7276 ctx->oacc_default_clause_ctx to current context.
7278 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7281 * config/riscv/predicates.md: Fix predicate.
7283 2023-08-15 Richard Biener <rguenther@suse.de>
7285 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
7286 slp_inst_kind_ctor handling.
7287 (vect_analyze_slp): Simplify.
7288 (vect_build_slp_instance): Dump when we analyze a CTOR.
7289 (vect_slp_check_for_constructors): Rename to ...
7290 (vect_slp_check_for_roots): ... this. Register a
7291 slp_root for CONSTRUCTORs instead of shoving them to
7292 the set of grouped stores.
7293 (vect_slp_analyze_bb_1): Adjust.
7295 2023-08-15 Richard Biener <rguenther@suse.de>
7297 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
7299 (_slp_instance::remain_defs): ... this.
7300 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
7301 (SLP_INSTANCE_REMAIN_DEFS): ... this.
7302 (slp_root::remain): New.
7303 (slp_root::slp_root): Adjust.
7304 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
7305 (vect_build_slp_instance): Get extra remain parameter,
7306 adjust former handling of a cut off stmt.
7307 (vect_analyze_slp_instance): Adjust.
7308 (vect_analyze_slp): Likewise.
7309 (_bb_vec_info::~_bb_vec_info): Likewise.
7310 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
7311 (vect_slp_check_for_constructors): Handle non-internal
7312 defs as remain defs of a reduction.
7313 (vectorize_slp_instance_root_stmt): Adjust.
7315 2023-08-15 Richard Biener <rguenther@suse.de>
7317 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
7318 (canonicalize_loop_induction_variables): Use find_loop_location.
7320 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
7323 * config/cris/cris-protos.h: Revert recent change.
7324 * config/cris/cris.cc (cris_legitimate_address_p): Remove
7325 code_helper unused parameter.
7326 (cris_legitimate_address_p_hook): New wrapper function.
7327 (TARGET_LEGITIMATE_ADDRESS_P): Change to
7328 cris_legitimate_address_p_hook.
7330 2023-08-15 Richard Biener <rguenther@suse.de>
7332 PR tree-optimization/110963
7333 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
7334 a PHI node when the expression is available on all edges
7335 and we insert at most one copy from a constant.
7337 2023-08-15 Richard Biener <rguenther@suse.de>
7339 PR tree-optimization/110991
7340 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
7341 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
7342 that will end up constant.
7344 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
7347 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
7349 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
7351 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
7352 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
7353 and update the final nest accordingly.
7355 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
7357 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
7360 2023-08-15 Pan Li <pan2.li@intel.com>
7362 * mode-switching.cc (create_pre_exit): Add SET insn check.
7364 2023-08-15 Pan Li <pan2.li@intel.com>
7366 * config/riscv/riscv-vector-builtins-bases.cc
7367 (class vfrec7_frm): New class for frm.
7368 (vfrec7_frm_obj): New declaration.
7370 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7371 * config/riscv/riscv-vector-builtins-functions.def
7372 (vfrec7_frm): New intrinsic function definition.
7373 * config/riscv/vector-iterators.md
7374 (VFMISC): Remove VFREC7.
7376 (float_insn_type): Ditto.
7377 (VFMISC_FRM): New int iterator.
7378 (misc_frm_op): New op for frm.
7379 (float_frm_insn_type): New type for frm.
7380 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
7381 New pattern for misc frm.
7383 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
7385 * lra-constraints.cc (curr_insn_transform): Process output stack
7386 pointer reloads before emitting reload insns.
7388 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
7391 * doc/invoke.texi: Add documentation of
7392 fanalyzer-show-events-in-system-headers
7394 2023-08-14 Jan Hubicka <jh@suse.cz>
7396 PR gcov-profile/110988
7397 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
7399 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
7401 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
7402 Enable compressed builtins when ZC* extensions enabled.
7403 * config/riscv/riscv-shorten-memrefs.cc:
7404 Enable shorten_memrefs pass when ZC* extensions enabled.
7405 * config/riscv/riscv.cc (riscv_compressed_reg_p):
7406 Enable compressible registers when ZC* extensions enabled.
7407 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
7408 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
7409 (riscv_first_stack_step): Allow compression of the register saves
7410 without adding extra instructions.
7411 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
7412 to 16 bits when ZC* extensions enabled.
7414 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
7416 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
7417 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
7424 (TARGET_ZCA): New target.
7425 (TARGET_ZCB): Ditto.
7426 (TARGET_ZCE): Ditto.
7427 (TARGET_ZCF): Ditto.
7428 (TARGET_ZCD): Ditto.
7429 (TARGET_ZCMP): Ditto.
7430 (TARGET_ZCMT): Ditto.
7431 * config/riscv/riscv.opt: New target variable.
7433 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7436 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
7438 * genrecog.cc (print_nonbool_test): Fix type error of
7439 switch (SUBREG_BYTE (op))'.
7441 2023-08-14 Richard Biener <rguenther@suse.de>
7443 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
7445 2023-08-14 Pan Li <pan2.li@intel.com>
7447 * config/riscv/riscv-vector-builtins-bases.cc
7448 (class unop_frm): New class for frm.
7449 (vfsqrt_frm_obj): New declaration.
7451 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7452 * config/riscv/riscv-vector-builtins-functions.def
7453 (vfsqrt_frm): New intrinsic function definition.
7455 2023-08-14 Pan Li <pan2.li@intel.com>
7457 * config/riscv/riscv-vector-builtins-bases.cc
7458 (class vfwnmsac_frm): New class for frm.
7459 (vfwnmsac_frm_obj): New declaration.
7461 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7462 * config/riscv/riscv-vector-builtins-functions.def
7463 (vfwnmsac_frm): New intrinsic function definition.
7465 2023-08-14 Pan Li <pan2.li@intel.com>
7467 * config/riscv/riscv-vector-builtins-bases.cc
7468 (class vfwmsac_frm): New class for frm.
7469 (vfwmsac_frm_obj): New declaration.
7471 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7472 * config/riscv/riscv-vector-builtins-functions.def
7473 (vfwmsac_frm): New intrinsic function definition.
7475 2023-08-14 Pan Li <pan2.li@intel.com>
7477 * config/riscv/riscv-vector-builtins-bases.cc
7478 (class vfwnmacc_frm): New class for frm.
7479 (vfwnmacc_frm_obj): New declaration.
7481 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7482 * config/riscv/riscv-vector-builtins-functions.def
7483 (vfwnmacc_frm): New intrinsic function definition.
7485 2023-08-14 Cui, Lili <lili.cui@intel.com>
7487 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
7490 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
7492 * config/mmix/predicates.md (mmix_address_operand): Use
7493 lra_in_progress, not reload_in_progress.
7495 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
7497 * config/mmix/mmix.cc: Re-enable LRA.
7499 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
7501 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
7502 when lra_in_progress.
7504 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
7506 * config/mmix/mmix.cc: Disable LRA for MMIX.
7508 2023-08-14 Pan Li <pan2.li@intel.com>
7510 * config/riscv/riscv-vector-builtins-bases.cc
7511 (class vfwmacc_frm): New class for vfwmacc frm.
7512 (vfwmacc_frm_obj): New declaration.
7514 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7515 * config/riscv/riscv-vector-builtins-functions.def
7516 (vfwmacc_frm): Function definition for vfwmacc.
7517 * config/riscv/riscv-vector-builtins.cc
7518 (function_expander::use_widen_ternop_insn): Add frm support.
7520 2023-08-14 Pan Li <pan2.li@intel.com>
7522 * config/riscv/riscv-vector-builtins-bases.cc
7523 (class vfnmsub_frm): New class for vfnmsub frm.
7524 (vfnmsub_frm): New declaration.
7526 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7527 * config/riscv/riscv-vector-builtins-functions.def
7528 (vfnmsub_frm): New function declaration.
7530 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
7532 * lra-constraints.cc (curr_insn_transform): Set done_p up and
7533 check it on true after processing output stack pointer reload.
7535 2023-08-12 Jakub Jelinek <jakub@redhat.com>
7537 * Makefile.in (USER_H): Add stdckdint.h.
7538 * ginclude/stdckdint.h: New file.
7540 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7543 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
7545 2023-08-12 Patrick Palka <ppalka@redhat.com>
7547 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
7548 Delimit output with braces.
7550 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7553 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
7555 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7557 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
7558 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
7559 * config/riscv/vector.md: Ditto.
7561 2023-08-11 David Malcolm <dmalcolm@redhat.com>
7564 * doc/analyzer.texi (__analyzer_get_strlen): New.
7565 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
7567 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
7569 * config/rx/rx.md (subdi3): Fix test for borrow.
7571 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7573 PR middle-end/110989
7574 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
7575 (vectorizable_load): Ditto.
7577 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
7579 * config/bpf/bpf.md (allocate_stack): Define.
7580 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
7581 stack pointer register.
7582 (FIXED_REGISTERS): Adjust accordingly.
7583 (CALL_USED_REGISTERS): Likewise.
7584 (REG_CLASS_CONTENTS): Likewise.
7585 (REGISTER_NAMES): Likewise.
7586 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
7587 space for callee-saved registers.
7588 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
7589 (bpf_expand_epilogue): Do not restore callee-saved registers in
7592 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
7594 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
7595 about too many arguments if function is always inlined.
7597 2023-08-11 Patrick Palka <ppalka@redhat.com>
7599 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
7600 Don't call component_ref_field_offset if the RHS isn't a decl.
7602 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
7605 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
7607 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
7609 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
7610 (process_alt_operands): Set the flag.
7611 (curr_insn_transform): Modify stack pointer offsets if output
7612 stack pointer reload is generated.
7614 2023-08-11 Joseph Myers <joseph@codesourcery.com>
7616 * configure: Regenerate.
7618 2023-08-11 Richard Biener <rguenther@suse.de>
7620 PR tree-optimization/110979
7621 * tree-vect-loop.cc (vectorizable_reduction): For
7622 FOLD_LEFT_REDUCTION without target support make sure
7623 we don't need to honor signed zeros and sign dependent rounding.
7625 2023-08-11 Richard Biener <rguenther@suse.de>
7627 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
7628 subgraph entries. Dump the used vector size based on the
7629 SLP subgraph entry root vector type.
7631 2023-08-11 Pan Li <pan2.li@intel.com>
7633 * config/riscv/riscv-vector-builtins-bases.cc
7634 (class vfmsub_frm): New class for vfmsub frm.
7635 (vfmsub_frm): New declaration.
7637 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7638 * config/riscv/riscv-vector-builtins-functions.def
7639 (vfmsub_frm): New function declaration.
7641 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7643 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
7644 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
7645 (expand_partial_store_optab_fn): Ditto.
7646 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
7647 (MASK_LEN_STORE_LANES): Ditto.
7648 * optabs.def (OPTAB_CD): Ditto.
7650 2023-08-11 Pan Li <pan2.li@intel.com>
7652 * config/riscv/riscv-vector-builtins-bases.cc
7653 (class vfnmadd_frm): New class for vfnmadd frm.
7654 (vfnmadd_frm): New declaration.
7656 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7657 * config/riscv/riscv-vector-builtins-functions.def
7658 (vfnmadd_frm): New function declaration.
7660 2023-08-11 Drew Ross <drross@redhat.com>
7661 Jakub Jelinek <jakub@redhat.com>
7663 PR tree-optimization/109938
7664 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
7666 2023-08-11 Pan Li <pan2.li@intel.com>
7668 * config/riscv/riscv-vector-builtins-bases.cc
7669 (class vfmadd_frm): New class for vfmadd frm.
7670 (vfmadd_frm_obj): New declaration.
7672 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7673 * config/riscv/riscv-vector-builtins-functions.def
7674 (vfmadd_frm): New function definition.
7676 2023-08-11 Pan Li <pan2.li@intel.com>
7678 * config/riscv/riscv-vector-builtins-bases.cc
7679 (class vfnmsac_frm): New class for vfnmsac frm.
7680 (vfnmsac_frm_obj): New declaration.
7682 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7683 * config/riscv/riscv-vector-builtins-functions.def
7684 (vfnmsac_frm): New function definition.
7686 2023-08-11 Jakub Jelinek <jakub@redhat.com>
7688 * doc/extend.texi (Typeof): Document typeof_unqual
7689 and __typeof_unqual__.
7691 2023-08-11 Andrew Pinski <apinski@marvell.com>
7693 PR tree-optimization/110954
7694 * generic-match-head.cc (bitwise_inverted_equal_p): Add
7695 wascmp argument and set it accordingly.
7696 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
7697 wascmp argument to the macro.
7698 (gimple_bitwise_inverted_equal_p): Add
7699 wascmp argument and set it accordingly.
7700 * match.pd (`a & ~a`, `a ^| ~a`): Update call
7701 to bitwise_inverted_equal_p and handle wascmp case.
7702 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
7703 call to bitwise_inverted_equal_p and check to see
7704 if was !wascmp or if precision was 1.
7706 2023-08-11 Martin Uecker <uecker@tugraz.at>
7709 * doc/invoke.texi: Update.
7711 2023-08-11 Pan Li <pan2.li@intel.com>
7713 * config/riscv/riscv-vector-builtins-bases.cc
7714 (class vfmsac_frm): New class for vfmsac frm.
7715 (vfmsac_frm_obj): New declaration.
7717 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7718 * config/riscv/riscv-vector-builtins-functions.def
7719 (vfmsac_frm): New function definition
7721 2023-08-10 Jan Hubicka <jh@suse.cz>
7723 PR middle-end/110923
7724 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
7726 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
7728 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
7729 dependent on 'a' extension.
7730 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
7731 (TARGET_ZTSO): New target.
7732 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
7734 (riscv_memmodel_needs_amo_release): Add Ztso case.
7735 (riscv_print_operand): Add Ztso case for LR/SC annotations.
7736 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
7737 * config/riscv/riscv.opt: Add Ztso target variable.
7738 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
7740 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
7741 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
7742 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
7743 specific load/store/fence mappings.
7744 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
7745 specific load/store/fence mappings.
7747 2023-08-10 Jan Hubicka <jh@suse.cz>
7749 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
7752 2023-08-10 Jan Hubicka <jh@suse.cz>
7754 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
7756 2023-08-10 Jan Hubicka <jh@suse.cz>
7758 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
7759 handling of undefined values.
7761 2023-08-10 Jakub Jelinek <jakub@redhat.com>
7764 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
7765 return virtual phis and return NULL if there is a virtual phi
7766 where the arguments from E0 and E1 edges aren't equal.
7768 2023-08-10 Richard Biener <rguenther@suse.de>
7770 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
7771 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
7773 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7776 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
7778 2023-08-10 Pan Li <pan2.li@intel.com>
7780 * config/riscv/riscv-vector-builtins-bases.cc
7781 (class vfnmacc_frm): New class for vfnmacc.
7782 (vfnmacc_frm_obj): New declaration.
7784 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7785 * config/riscv/riscv-vector-builtins-functions.def
7786 (vfnmacc_frm): New function definition.
7788 2023-08-10 Pan Li <pan2.li@intel.com>
7790 * config/riscv/riscv-vector-builtins-bases.cc
7791 (class vfmacc_frm): New class for vfmacc frm.
7792 (vfmacc_frm_obj): New declaration.
7794 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7795 * config/riscv/riscv-vector-builtins-functions.def
7796 (vfmacc_frm): New function definition.
7798 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7801 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
7803 2023-08-10 Richard Biener <rguenther@suse.de>
7805 * tree-vectorizer.h (vectorizable_live_operation): Remove
7806 gimple_stmt_iterator * argument.
7807 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
7808 Adjust plumbing around vect_get_loop_mask.
7809 (vect_analyze_loop_operations): Adjust.
7810 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
7811 (vect_bb_slp_mark_live_stmts): Likewise.
7812 (vect_schedule_slp_node): Likewise.
7813 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
7814 Remove gimple_stmt_iterator * argument.
7815 (vect_transform_stmt): Adjust.
7817 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7819 * config/riscv/vector-iterators.md: Add missing modes.
7821 2023-08-10 Jakub Jelinek <jakub@redhat.com>
7824 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
7825 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
7827 2023-08-10 Jakub Jelinek <jakub@redhat.com>
7830 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
7831 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
7834 2023-08-10 liuhongt <hongtao.liu@intel.com>
7837 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
7838 sanitize upper part of V4HFmode register with
7840 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
7842 (<insn>v2hf3): Ditto.
7844 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
7845 register with -fno-trapping-math.
7847 2023-08-10 Pan Li <pan2.li@intel.com>
7848 Kito Cheng <kito.cheng@sifive.com>
7850 * config/riscv/riscv-protos.h
7851 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
7852 (get_frm_mode): New declaration.
7853 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
7854 * config/riscv/riscv-vector-builtins.cc
7855 (function_expander::use_ternop_insn): Take care of frm reg.
7856 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
7857 (riscv_emit_frm_mode_set): Ditto.
7858 (riscv_emit_mode_set): Ditto.
7859 (riscv_frm_adjust_mode_after_call): Ditto.
7860 (riscv_frm_mode_needed): Ditto.
7861 (riscv_frm_mode_after): Ditto.
7862 (riscv_mode_entry): Ditto.
7863 (riscv_mode_exit): Ditto.
7864 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
7865 * config/riscv/vector.md
7866 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
7867 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
7869 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7871 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
7872 incorrect anticipate info.
7874 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
7876 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
7877 Remove 'Zve32d' from the version list.
7879 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
7881 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
7882 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
7883 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
7884 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7886 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
7888 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
7889 (mem_shadd_or_shadd_rtx_p): New function.
7891 2023-08-09 Andrew Pinski <apinski@marvell.com>
7893 PR tree-optimization/110937
7894 PR tree-optimization/100798
7895 * match.pd (`a ? ~b : b`): Handle this
7898 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
7900 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
7902 2023-08-09 Richard Ball <richard.ball@arm.com>
7904 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
7905 * config/aarch64/aarch64-tune.md: Regenerate.
7906 * doc/invoke.texi: Document Cortex-A520 CPU.
7908 2023-08-09 Carl Love <cel@us.ibm.com>
7910 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
7911 Move definitions to Altivec stanza.
7912 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
7915 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7918 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
7919 stepped vector support.
7921 2023-08-09 liuhongt <hongtao.liu@intel.com>
7923 * common/config/i386/cpuinfo.h (get_available_features):
7924 Rename local variable subleaf_level to max_subleaf_level.
7926 2023-08-09 Richard Biener <rguenther@suse.de>
7928 PR rtl-optimization/110587
7929 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
7931 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
7933 PR tree-optimization/110248
7934 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
7935 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
7936 legitimate when outer code is PLUS.
7938 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
7940 PR tree-optimization/110248
7941 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
7942 type code_helper and pass it to targetm.addr_space.legitimate_address_p
7943 instead of ERROR_MARK.
7944 (offsettable_address_addr_space_p): Update one function pointer with
7945 one more argument of type code_helper as its assignees
7946 memory_address_addr_space_p and strict_memory_address_addr_space_p
7947 have been adjusted, and adjust some call sites with ERROR_MARK.
7948 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
7949 (memory_address_addr_space_p): Adjust with one more unnamed argument
7950 of type code_helper with default ERROR_MARK.
7951 (strict_memory_address_addr_space_p): Likewise.
7952 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
7953 argument of type code_helper.
7954 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
7955 type code_helper and pass it to memory_address_addr_space_p.
7956 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
7957 one more unnamed argument of type code_helper with default value
7959 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
7960 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
7961 pass it to all valid_mem_ref_p calls.
7963 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
7965 PR tree-optimization/110248
7966 * coretypes.h (class code_helper): Add forward declaration.
7967 * doc/tm.texi: Regenerate.
7968 * lra-constraints.cc (valid_address_p): Call target hook
7969 targetm.addr_space.legitimate_address_p with an extra parameter
7970 ERROR_MARK as its prototype changes.
7971 * recog.cc (memory_address_addr_space_p): Likewise.
7972 * reload.cc (strict_memory_address_addr_space_p): Likewise.
7973 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
7974 Extend with one more argument of type code_helper, update the
7975 documentation accordingly.
7976 * targhooks.cc (default_legitimate_address_p): Adjust for the
7977 new code_helper argument.
7978 (default_addr_space_legitimate_address_p): Likewise.
7979 * targhooks.h (default_legitimate_address_p): Likewise.
7980 (default_addr_space_legitimate_address_p): Likewise.
7981 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
7982 with extra unnamed code_helper argument with default ERROR_MARK.
7983 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
7984 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
7985 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
7986 (tree.h): New include for tree_code ERROR_MARK.
7987 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
7988 unnamed code_helper argument with default ERROR_MARK.
7989 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
7990 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
7991 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
7992 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
7993 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
7994 (tree.h): New include for tree_code ERROR_MARK.
7995 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
7996 unnamed code_helper argument with default ERROR_MARK.
7997 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
7998 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
8000 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
8001 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
8002 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
8003 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
8004 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
8005 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
8006 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
8007 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
8008 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
8010 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
8011 (m32c_addr_space_legitimate_address_p): Likewise.
8012 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
8013 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
8014 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
8015 * config/microblaze/microblaze-protos.h (tree.h): New include for
8016 tree_code ERROR_MARK.
8017 (microblaze_legitimate_address_p): Adjust with extra unnamed
8018 code_helper argument with default ERROR_MARK.
8019 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
8021 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
8022 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
8023 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
8024 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
8025 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
8026 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
8027 argument with default ERROR_MARK and adjust the call to function
8028 msp430_legitimate_address_p.
8029 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
8030 unnamed code_helper argument with default ERROR_MARK.
8031 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
8032 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
8033 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
8034 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
8035 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
8036 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
8037 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
8038 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
8039 (tree.h): New include for tree_code ERROR_MARK.
8040 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
8041 extra unnamed code_helper argument with default ERROR_MARK.
8042 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
8043 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
8044 argument and adjust the call to function rs6000_legitimate_address_p.
8045 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
8046 unnamed code_helper argument with default ERROR_MARK.
8047 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
8048 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
8049 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
8050 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
8051 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
8052 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
8053 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
8054 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
8056 (tree.h): New include for tree_code ERROR_MARK.
8057 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
8058 Adjust with extra unnamed code_helper argument with default
8061 2023-08-09 liuhongt <hongtao.liu@intel.com>
8063 * common/config/i386/cpuinfo.h (get_available_features): Check
8064 EAX for valid subleaf before use CPUID.
8066 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
8068 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
8069 for the temporary when canonicalizing the condition.
8071 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
8073 * config/bpf/core-builtins.cc: Cleaned include headers.
8074 (struct cr_builtins): Added GTY.
8075 (cr_builtins_ref): Created.
8076 (builtins_data) Changed to GC root.
8077 (allocate_builtin_data): Changed.
8078 Included gt-core-builtins.h.
8079 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
8080 (bpf_core_extra_ref): Created.
8081 (bpf_comment_info): Changed to GC root.
8082 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
8084 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
8087 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
8088 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
8089 upper part of V2SFmode register with -fno-trapping-math.
8090 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
8092 (<smaxmin:code>v2sf3): Ditto.
8094 (*mmx_haddv2sf3_low): Ditto.
8095 (*mmx_hsubv2sf3_low): Ditto.
8096 (vec_addsubv2sf3): Ditto.
8097 (vec_cmpv2sfv2si): Ditto.
8098 (vcond<V2FI:mode>v2sf): Ditto.
8103 (fix_truncv2sfv2si2): Ditto.
8104 (fixuns_truncv2sfv2si2): Ditto.
8105 (floatv2siv2sf2): Ditto.
8106 (floatunsv2siv2sf2): Ditto.
8107 (nearbyintv2sf2): Ditto.
8109 (lrintv2sfv2si2): Ditto.
8111 (lceilv2sfv2si2): Ditto.
8112 (floorv2sf2): Ditto.
8113 (lfloorv2sfv2si2): Ditto.
8114 (btruncv2sf2): Ditto.
8115 (roundv2sf2): Ditto.
8116 (lroundv2sfv2si2): Ditto.
8117 * doc/invoke.texi (x86 Options): Document
8118 -mpartial-vector-fp-math option.
8120 2023-08-08 Andrew Pinski <apinski@marvell.com>
8122 PR tree-optimization/103281
8123 PR tree-optimization/28794
8124 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
8126 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
8127 (simplify_using_ranges::simplify_casted_cond): Rename to ...
8128 (simplify_using_ranges::simplify_casted_compare): This
8129 and change arguments to take op0 and op1.
8130 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
8131 (simplify_using_ranges::simplify): For tcc_comparison assignments call
8132 simplify_compare_assign_using_ranges_1.
8133 * vr-values.h (simplify_using_ranges): Add
8134 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
8135 Rename simplify_casted_cond and simplify_casted_compare and
8136 update argument types.
8138 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
8140 * genmatch.cc: Log line numbers indirectly.
8142 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
8144 * genmatch.cc: Make sinfo map ordered.
8145 * Makefile.in: Require the ordered map header for genmatch.o.
8147 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
8149 * ordered-hash-map.h: Add get_or_insert.
8150 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
8152 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8154 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
8155 (cond_len_<optab><mode>): Ditto.
8156 (cond_fma<mode>): Ditto.
8157 (cond_len_fma<mode>): Ditto.
8158 (cond_fnma<mode>): Ditto.
8159 (cond_len_fnma<mode>): Ditto.
8160 (cond_fms<mode>): Ditto.
8161 (cond_len_fms<mode>): Ditto.
8162 (cond_fnms<mode>): Ditto.
8163 (cond_len_fnms<mode>): Ditto.
8164 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
8166 (enum insn_type): Add new enum type.
8167 (prepare_ternary_operands): New function.
8168 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
8169 (emit_nonvlmax_tumu_insn): Ditto.
8170 (emit_nonvlmax_fp_tumu_insn): Ditto.
8171 (expand_cond_len_binop): Add condtional operations.
8172 (expand_cond_len_ternop): Ditto.
8173 (prepare_ternary_operands): New function.
8174 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
8175 riscv_get_v_regno_alignment as global scope.
8176 * config/riscv/vector.md: Fix ternary bugs.
8178 2023-08-08 Richard Biener <rguenther@suse.de>
8180 PR tree-optimization/49955
8181 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
8182 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
8183 * tree-vect-slp.cc (vect_free_slp_instance): Release
8184 SLP_INSTANCE_REMAIN_STMTS.
8185 (vect_build_slp_instance): Make the number of lanes of
8186 a BB reduction even.
8187 (vectorize_slp_instance_root_stmt): Handle unvectorized
8188 defs of a BB reduction.
8190 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8192 * internal-fn.cc (get_len_internal_fn): New function.
8193 (DEF_INTERNAL_COND_FN): Ditto.
8194 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
8195 * internal-fn.h (get_len_internal_fn): Ditto.
8196 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
8198 2023-08-08 Richard Biener <rguenther@suse.de>
8200 PR tree-optimization/110924
8201 * tree-ssa-live.h (virtual_operand_live): Update comment.
8202 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
8203 optimization, look at each predecessor.
8204 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
8206 2023-08-08 yulong <shiyulong@iscas.ac.cn>
8208 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
8210 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8212 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
8213 * config/riscv/vector.md: Ditto.
8215 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8217 * config/riscv/autovec.md: Add VLS shift.
8219 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8221 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
8222 * config/riscv/vector-iterators.md: Ditto.
8223 * config/riscv/vector.md: Ditto.
8225 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
8227 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
8229 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
8231 * configure: Regenerate.
8233 2023-08-07 John Ericson <git@JohnEricson.me>
8235 * configure: Regenerate.
8237 2023-08-07 Alan Modra <amodra@gmail.com>
8239 * configure: Regenerate.
8241 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
8243 * configure: Regenerate.
8245 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
8247 * configure: Regenerate.
8249 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
8251 * configure: Regenerate.
8253 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
8255 * configure: Regenerate.
8257 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
8259 * configure: Regenerate.
8261 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
8263 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
8264 VOIDmode operands to conditional before canonicalization.
8266 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
8268 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
8269 (find_oldest_value_reg): Inline stack_pointer_rtx check.
8270 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
8272 2023-08-07 Martin Jambor <mjambor@suse.cz>
8275 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
8276 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
8277 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
8278 (ptr_parm_has_nonarg_uses): Likewise.
8279 * ipa-param-manipulation.cc
8280 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
8281 (ipa_param_body_adjustments::mark_dead_statements): Move initial
8282 checks to get_ddef_if_exists_and_is_used.
8283 (ipa_param_body_adjustments::mark_clobbers_dead): New.
8284 (ipa_param_body_adjustments::common_initialization): Call
8285 mark_clobbers_dead when splitting.
8287 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
8289 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
8290 as an argument and pass it to riscv_emit_int_order_test.
8291 (riscv_expand_conditional_move): Handle cases where the condition
8292 is not EQ/NE or the second argument to the conditional is not
8294 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
8295 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
8297 2023-08-07 Andrew Pinski <apinski@marvell.com>
8299 PR tree-optimization/109959
8300 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
8303 2023-08-07 Richard Biener <rguenther@suse.de>
8305 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
8306 calculate post-dominators. Calculate RPO on the inverted
8307 graph and process blocks in that order.
8309 2023-08-07 liuhongt <hongtao.liu@intel.com>
8312 * config/i386/i386-protos.h
8313 (vpternlog_redundant_operand_mask): Adjust parameter type.
8314 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
8315 INTVAL instead of XINT, also adjust parameter type from rtx*
8316 to rtx since the function only needs operands[4] in vpternlog
8318 (substitute_vpternlog_operands): Pass operands[4] instead of
8319 operands to vpternlog_redundant_operand_mask.
8320 * config/i386/sse.md: Ditto.
8322 2023-08-07 Richard Biener <rguenther@suse.de>
8324 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
8325 around dumping code.
8327 2023-08-07 liuhongt <hongtao.liu@intel.com>
8330 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
8331 to define_expand and break into ..
8332 (<insn>v4hf3): .. this.
8333 (divv4hf3): .. this.
8334 (<insn>v2hf3): .. this.
8335 (divv2hf3): .. this.
8336 (movd_v2hf_to_sse): New define_expand.
8337 (movq_<mode>_to_sse): Extend to V4HFmode.
8338 (mmxdoublevecmode): Ditto.
8339 (V2FI_V4HF): New mode iterator.
8340 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
8341 by using mode iterator V4SF_V8HF, renamed to ..
8342 (*vec_concat<mode>): .. this.
8343 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
8344 iterator V4SF_V8HF, renamed to ..
8345 (*vec_concat<mode>_0): .. this.
8346 (*vec_concatv8hf_movss): New define_insn.
8347 (V4SF_V8HF): New mode iterator.
8349 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8351 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
8353 2023-08-07 Jan Beulich <jbeulich@suse.com>
8355 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
8356 (*mmx_pinsrb): Likewise.
8357 (*mmx_pextrb): Likewise.
8358 (*mmx_pextrb_zext): Likewise.
8359 (mmx_pshufbv8qi3): Likewise.
8360 (mmx_pshufbv4qi3): Likewise.
8361 (mmx_pswapdv2si2): Likewise.
8362 (*pinsrb): Likewise.
8363 (*pextrb): Likewise.
8364 (*pextrb_zext): Likewise.
8365 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
8366 (*sse2_eq<mode>3): Likewise.
8367 (*sse2_gt<mode>3): Likewise.
8368 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
8369 (*vec_extract<mode>): Likewise.
8370 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
8371 (*vec_extractv16qi_zext): Likewise.
8372 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
8373 (ssse3_pmaddubsw128): Likewise.
8374 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
8375 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
8376 (<ssse3_avx2>_psign<mode>3): Likewise.
8377 (<ssse3_avx2>_palignr<mode>): Likewise.
8378 (*abs<mode>2): Likewise.
8379 (sse4_2_pcmpestr): Likewise.
8380 (sse4_2_pcmpestri): Likewise.
8381 (sse4_2_pcmpestrm): Likewise.
8382 (sse4_2_pcmpestr_cconly): Likewise.
8383 (sse4_2_pcmpistr): Likewise.
8384 (sse4_2_pcmpistri): Likewise.
8385 (sse4_2_pcmpistrm): Likewise.
8386 (sse4_2_pcmpistr_cconly): Likewise.
8387 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
8388 (vgf2p8affineqb_<mode><mask_name>): Likewise.
8389 (vgf2p8mulb_<mode><mask_name>): Likewise.
8390 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
8392 (*<code>v16qi3 [umaxmin]): Likewise.
8394 2023-08-07 Jan Beulich <jbeulich@suse.com>
8396 * config/i386/i386.md (sse4_1_round<mode>2): Make
8397 "length_immediate" uniformly 1.
8398 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
8399 (mmx_pblendvb_<mode>): Likewise.
8401 2023-08-07 Jan Beulich <jbeulich@suse.com>
8403 * config/i386/sse.md
8404 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
8406 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
8409 2023-08-07 Jan Beulich <jbeulich@suse.com>
8411 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
8412 "prefix_extra", and "mode" attributes.
8413 (xop_phadd<u>bd): Likewise.
8414 (xop_phadd<u>bq): Likewise.
8415 (xop_phadd<u>wd): Likewise.
8416 (xop_phadd<u>wq): Likewise.
8417 (xop_phadd<u>dq): Likewise.
8418 (xop_phsubbw): Likewise.
8419 (xop_phsubwd): Likewise.
8420 (xop_phsubdq): Likewise.
8421 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
8422 (xop_rotr<mode>3): Likewise.
8423 (xop_frcz<mode>2): Likewise.
8424 (*xop_vmfrcz<mode>2): Likewise.
8425 (xop_vrotl<mode>3): Add "prefix" attribute. Change
8426 "prefix_extra" to 1.
8427 (xop_sha<mode>3): Likewise.
8428 (xop_shl<mode>3): Likewise.
8430 2023-08-07 Jan Beulich <jbeulich@suse.com>
8432 * config/i386/sse.md
8433 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
8435 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
8436 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
8437 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
8438 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
8439 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
8440 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
8441 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
8442 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
8443 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
8444 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
8445 (vec_extract_lo_v64qi): Likewise.
8446 (vec_extract_hi_v64qi): Likewise.
8447 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
8448 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
8449 (*avx512f_<code><mode>3<mask_name>): Likewise.
8450 (*vec_extractv4ti): Likewise.
8451 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
8452 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
8453 Add "length_immediate".
8455 2023-08-07 Jan Beulich <jbeulich@suse.com>
8457 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
8459 (@rdseed<mode>): Likewise.
8460 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
8461 Adjust "prefix_extra".
8462 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
8463 (*sse4_1_<code><mode>3<mask_name>): Likewise.
8464 (*avx2_eq<mode>3): Likewise.
8465 (avx2_gt<mode>3): Likewise.
8466 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
8467 (*vec_extract<mode>): Likewise.
8468 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
8470 2023-08-07 Jan Beulich <jbeulich@suse.com>
8472 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
8473 "prefix_rep". Drop "prefix_extra".
8474 (wr<fsgs>base<mode>): Likewise.
8475 (ptwrite<mode>): Likewise.
8477 2023-08-07 Jan Beulich <jbeulich@suse.com>
8479 * config/i386/i386.md (isa): Move up.
8480 (length_immediate): Handle "fma4".
8481 (prefix): Handle "ssemuladd".
8482 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
8483 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
8485 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
8486 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
8487 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
8489 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
8490 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
8491 (*fma_fnmadd_<mode>): Likewise.
8492 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
8494 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
8495 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
8496 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
8498 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
8499 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
8500 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
8502 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
8503 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
8504 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
8506 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
8507 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
8508 (*fmai_fmadd_<mode>): Likewise.
8509 (*fmai_fmsub_<mode>): Likewise.
8510 (*fmai_fnmadd_<mode><round_name>): Likewise.
8511 (*fmai_fnmsub_<mode><round_name>): Likewise.
8512 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
8513 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
8514 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
8515 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
8516 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
8517 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
8518 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
8519 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
8520 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
8521 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
8522 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
8523 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
8524 (*fma4i_vmfmadd_<mode>): Likewise.
8525 (*fma4i_vmfmsub_<mode>): Likewise.
8526 (*fma4i_vmfnmadd_<mode>): Likewise.
8527 (*fma4i_vmfnmsub_<mode>): Likewise.
8528 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
8529 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
8530 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
8532 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
8533 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
8534 (xop_p<macs>dql): Likewise.
8535 (xop_p<macs>dqh): Likewise.
8536 (xop_p<macs>wd): Likewise.
8537 (xop_p<madcs>wd): Likewise.
8538 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
8540 2023-08-07 Jan Beulich <jbeulich@suse.com>
8542 * config/i386/i386.md (length_immediate): Handle "sse4arg".
8544 (*xop_pcmov_<mode>): Add "mode" attribute.
8545 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
8546 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
8547 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
8548 (*xop_pcmov_<mode>): Add "mode" attribute.
8549 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
8551 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
8552 "prefix_extra", and "length_immediate" attributes.
8553 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
8554 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
8555 and "length_immediate" attributes. Switch "type" to "sse4arg".
8556 (xop_pcom_tf<mode>3): Likewise.
8557 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
8559 2023-08-07 Jan Beulich <jbeulich@suse.com>
8561 * config/i386/i386.md (prefix_extra): Correct comment. Fold
8562 cases yielding 2 into ones yielding 1.
8564 2023-08-07 Jan Hubicka <jh@suse.cz>
8566 PR tree-optimization/106293
8567 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
8568 * tree-vect-loop.cc (vect_transform_loop): Likewise.
8570 2023-08-07 Andrew Pinski <apinski@marvell.com>
8572 PR tree-optimization/96695
8573 * match.pd (min_value, max_value): Extend to
8576 2023-08-06 Jan Hubicka <jh@suse.cz>
8578 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
8579 __builtin_expect that CPU likely supports cpuid.
8581 2023-08-06 Jan Hubicka <jh@suse.cz>
8583 * tree-loop-distribution.cc (loop_distribution::execute): Disable
8584 distribution for loops with estimated iterations 0.
8586 2023-08-06 Jan Hubicka <jh@suse.cz>
8588 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
8590 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
8592 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
8593 more Zicond patterns. Fix whitespace typo.
8594 (riscv_rtx_costs): Remove accidental code duplication.
8595 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
8597 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
8600 * config/i386/i386-protos.h
8601 (vpternlog_redundant_operand_mask): Declare.
8602 (substitute_vpternlog_operands): Declare.
8603 * config/i386/i386.cc
8604 (vpternlog_redundant_operand_mask): New helper.
8605 (substitute_vpternlog_operands): New function. Use them...
8606 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
8608 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
8610 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
8611 value of -1 is equivalent to don't care.
8612 (extract_integral_bit_field): Indicate that we don't require
8613 the most significant word to be zero extended, if we're about
8615 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
8616 of -1 is equivalent to don't care. Don't clear the most
8617 significant bits with AND mask when UNSIGNEDP is -1.
8619 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
8621 * config/i386/sse.md (define_split): Convert highpart:DF extract
8622 from V2DFmode register into a sse2_storehpd instruction.
8623 (define_split): Likewise, convert lowpart:DF extract from V2DF
8624 register into a sse2_storelpd instruction.
8626 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
8628 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
8631 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
8633 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
8634 against early clobber hard regs.
8636 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8638 * doc/extend.texi: Document it.
8640 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8643 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
8644 vec_widen_<sur>shiftl_hi_<mode>): Remove.
8645 (aarch64_<sur>shll<mode>_internal): Renamed to...
8646 (aarch64_<su>shll<mode>): .. This.
8647 (aarch64_<sur>shll2<mode>_internal): Renamed to...
8648 (aarch64_<su>shll2<mode>): .. This.
8649 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
8651 * config/aarch64/constraints.md (D2, DL): New.
8652 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
8654 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8656 * gensupport.cc (conlist): Support length 0 attribute.
8658 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8660 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
8661 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
8663 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8665 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
8667 (aarch64_adjust_stmt_cost): Use it.
8668 (aarch64_vector_costs::count_ops): Likewise.
8669 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
8670 aarch64_adjust_stmt_cost.
8672 2023-08-04 Richard Biener <rguenther@suse.de>
8674 PR tree-optimization/110838
8675 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
8676 Fix right-shift value sanitizing. Properly emit external
8677 def mangling in the preheader rather than in the pattern
8678 def sequence where it will fail vectorizing.
8680 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
8682 PR middle-end/110316
8684 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
8685 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
8686 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
8687 (timer::validate_phases): Use integral arithmetic to check
8689 (timer::print_row, timer::print): Convert from integral
8690 nanoseconds to floating point seconds before printing.
8691 (timer::all_zero): Change limit to nanosec count instead of
8692 fractional count of seconds.
8693 (make_json_for_timevar_time_def): Convert from integral
8694 nanoseconds to floating point seconds before recording.
8695 * timevar.h (struct timevar_time_def): Update all measurements
8696 to use uint64_t nanoseconds rather than seconds stored in a
8699 2023-08-04 Richard Biener <rguenther@suse.de>
8701 PR tree-optimization/110838
8702 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
8703 the arithmetic right-shift case to non-negative operands.
8705 2023-08-04 Pan Li <pan2.li@intel.com>
8708 2023-08-04 Pan Li <pan2.li@intel.com>
8710 * config/riscv/riscv-vector-builtins-bases.cc
8711 (class vfmacc_frm): New class for vfmacc frm.
8712 (vfmacc_frm_obj): New declaration.
8714 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8715 * config/riscv/riscv-vector-builtins-functions.def
8716 (vfmacc_frm): New function definition.
8717 * config/riscv/riscv-vector-builtins.cc
8718 (function_expander::use_ternop_insn): Add frm operand support.
8719 * config/riscv/vector.md: Add vfmuladd to frm_mode.
8721 2023-08-04 Pan Li <pan2.li@intel.com>
8724 2023-08-04 Pan Li <pan2.li@intel.com>
8726 * config/riscv/riscv-vector-builtins-bases.cc
8727 (class vfnmacc_frm): New class for vfnmacc.
8728 (vfnmacc_frm_obj): New declaration.
8730 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8731 * config/riscv/riscv-vector-builtins-functions.def
8732 (vfnmacc_frm): New function definition.
8734 2023-08-04 Pan Li <pan2.li@intel.com>
8737 2023-08-04 Pan Li <pan2.li@intel.com>
8739 * config/riscv/riscv-vector-builtins-bases.cc
8740 (class vfmsac_frm): New class for vfmsac frm.
8741 (vfmsac_frm_obj): New declaration.
8743 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8744 * config/riscv/riscv-vector-builtins-functions.def
8745 (vfmsac_frm): New function definition.
8747 2023-08-04 Pan Li <pan2.li@intel.com>
8750 2023-08-04 Pan Li <pan2.li@intel.com>
8752 * config/riscv/riscv-vector-builtins-bases.cc
8753 (class vfnmsac_frm): New class for vfnmsac frm.
8754 (vfnmsac_frm_obj): New declaration.
8756 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8757 * config/riscv/riscv-vector-builtins-functions.def
8758 (vfnmsac_frm): New function definition.
8760 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
8762 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
8763 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
8764 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
8765 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
8766 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
8767 (attiny102, attiny104): New devices.
8768 * doc/avr-mmcu.texi: Regenerate.
8770 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
8772 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
8773 and PM_OFFSET entries.
8775 2023-08-04 Andrew Pinski <apinski@marvell.com>
8777 PR tree-optimization/110874
8778 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
8779 (gimple_maybe_cmp): Likewise.
8780 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
8781 and gimple_maybe_cmp instead of being recursive.
8782 * match.pd (bit_not_with_nop): New match pattern.
8783 (maybe_cmp): Likewise.
8785 2023-08-04 Drew Ross <drross@redhat.com>
8787 PR middle-end/101955
8788 * match.pd ((signed x << c) >> c): New canonicalization.
8790 2023-08-04 Pan Li <pan2.li@intel.com>
8792 * config/riscv/riscv-vector-builtins-bases.cc
8793 (class vfnmsac_frm): New class for vfnmsac frm.
8794 (vfnmsac_frm_obj): New declaration.
8796 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8797 * config/riscv/riscv-vector-builtins-functions.def
8798 (vfnmsac_frm): New function definition.
8800 2023-08-04 Pan Li <pan2.li@intel.com>
8802 * config/riscv/riscv-vector-builtins-bases.cc
8803 (class vfmsac_frm): New class for vfmsac frm.
8804 (vfmsac_frm_obj): New declaration.
8806 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8807 * config/riscv/riscv-vector-builtins-functions.def
8808 (vfmsac_frm): New function definition.
8810 2023-08-04 Pan Li <pan2.li@intel.com>
8812 * config/riscv/riscv-vector-builtins-bases.cc
8813 (class vfnmacc_frm): New class for vfnmacc.
8814 (vfnmacc_frm_obj): New declaration.
8816 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8817 * config/riscv/riscv-vector-builtins-functions.def
8818 (vfnmacc_frm): New function definition.
8820 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
8823 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
8824 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
8826 2023-08-04 Pan Li <pan2.li@intel.com>
8828 * config/riscv/riscv-vector-builtins-bases.cc
8829 (class vfmacc_frm): New class for vfmacc frm.
8830 (vfmacc_frm_obj): New declaration.
8832 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8833 * config/riscv/riscv-vector-builtins-functions.def
8834 (vfmacc_frm): New function definition.
8835 * config/riscv/riscv-vector-builtins.cc
8836 (function_expander::use_ternop_insn): Add frm operand support.
8837 * config/riscv/vector.md: Add vfmuladd to frm_mode.
8839 2023-08-04 Pan Li <pan2.li@intel.com>
8841 * config/riscv/riscv-vector-builtins-bases.cc
8842 (vfwmul_frm_obj): New declaration.
8843 (vfwmul_frm): Ditto.
8844 * config/riscv/riscv-vector-builtins-bases.h:
8845 (vfwmul_frm): Ditto.
8846 * config/riscv/riscv-vector-builtins-functions.def
8847 (vfwmul_frm): New function definition.
8848 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
8850 2023-08-04 Pan Li <pan2.li@intel.com>
8852 * config/riscv/riscv-vector-builtins-bases.cc
8853 (binop_frm): New declaration.
8854 (reverse_binop_frm): Likewise.
8856 * config/riscv/riscv-vector-builtins-bases.h:
8857 (vfdiv_frm): New extern declaration.
8858 (vfrdiv_frm): Likewise.
8859 * config/riscv/riscv-vector-builtins-functions.def
8860 (vfdiv_frm): New function definition.
8861 (vfrdiv_frm): Likewise.
8862 * config/riscv/vector.md: Add vfdiv to frm_mode.
8864 2023-08-03 Jan Hubicka <jh@suse.cz>
8866 * tree-cfg.cc (print_loop_info): Print entry count.
8868 2023-08-03 Jan Hubicka <jh@suse.cz>
8870 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
8872 2023-08-03 Jan Hubicka <jh@suse.cz>
8875 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
8876 unadjusted_exit_count.
8878 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
8880 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
8883 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
8885 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
8886 various Zicond patterns.
8887 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
8888 sfb_alu_operand for both arms of the conditional move.
8889 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
8891 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
8897 * config.gcc: Added core-builtins.cc and .o files.
8898 * config/bpf/bpf-passes.def: Removed file.
8899 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
8900 bpf_replace_core_move_operands): New prototypes.
8901 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
8902 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
8903 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
8904 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
8905 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
8907 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
8908 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
8909 (mov_reloc_core<mode>): Added.
8910 * config/bpf/core-builtins.cc (struct cr_builtin, enum
8911 cr_decision struct cr_local, struct cr_final, struct
8912 core_builtin_helpers, enum bpf_plugin_states): Added types.
8913 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
8915 (allocate_builtin_data, get_builtin-data, search_builtin_data,
8916 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
8917 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
8918 bpf_core_get_index, compute_field_expr,
8919 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
8920 process_field_expr, pack_enum_value, process_enum_value, pack_type,
8921 process_type, bpf_require_core_support, make_core_relo, read_kind,
8922 kind_access_index, kind_preserve_field_info, kind_enum_value,
8923 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
8924 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
8925 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
8926 bpf_expand_core_builtin, bpf_add_core_reloc,
8927 bpf_replace_core_move_operands): Added functions.
8928 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
8929 (bpf_init_core_builtins, bpf_expand_core_builtin,
8930 bpf_resolve_overloaded_core_builtin): Added functions.
8931 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
8932 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
8933 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
8934 * config/bpf/t-bpf: Added core-builtins.o.
8935 * doc/extend.texi: Added documentation for new BPF builtins.
8937 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
8939 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
8940 ranges to the call to relation_fold_and_or.
8941 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
8942 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
8943 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
8944 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
8945 a varying op1 and op2 to call.
8946 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
8947 (operator_equal::op1_op2_relation): New float version.
8948 (operator_not_equal::op1_op2_relation): Ditto.
8949 (operator_lt::op1_op2_relation): Ditto.
8950 (operator_le::op1_op2_relation): Ditto.
8951 (operator_gt::op1_op2_relation): Ditto.
8952 (operator_ge::op1_op2_relation) Ditto.
8953 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
8955 (operator_not_equal::op1_op2_relation): Ditto.
8956 (operator_lt::op1_op2_relation): Ditto.
8957 (operator_le::op1_op2_relation): Ditto.
8958 (operator_gt::op1_op2_relation): Ditto.
8959 (operator_ge::op1_op2_relation): Ditto.
8960 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
8962 (range_operator::op1_op2_relation): Add extra params.
8963 (operator_equal::op1_op2_relation): Ditto.
8964 (operator_not_equal::op1_op2_relation): Ditto.
8965 (operator_lt::op1_op2_relation): Ditto.
8966 (operator_le::op1_op2_relation): Ditto.
8967 (operator_gt::op1_op2_relation): Ditto.
8968 (operator_ge::op1_op2_relation): Ditto.
8969 * range-op.h (range_operator): New prototypes.
8970 (range_op_handler): Ditto.
8972 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
8974 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
8975 Use identity relation.
8976 (gori_compute::compute_operand2_range): Ditto.
8977 * value-relation.cc (get_identity_relation): New.
8978 * value-relation.h (get_identity_relation): New prototype.
8980 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
8982 * value-range.h (Value_Range::set_varying): Set the type.
8983 (Value_Range::set_zero): Ditto.
8984 (Value_Range::set_nonzero): Ditto.
8986 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
8988 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
8991 2023-08-03 Pan Li <pan2.li@intel.com>
8993 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
8995 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
8997 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
8999 2023-08-03 Richard Biener <rguenther@suse.de>
9001 PR tree-optimization/110838
9002 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
9003 Adjust the shift operand of RSHIFT_EXPRs.
9005 2023-08-03 Richard Biener <rguenther@suse.de>
9007 PR tree-optimization/110702
9008 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
9009 we created a NULL pointer based access rewrite that to
9012 2023-08-03 Richard Biener <rguenther@suse.de>
9014 * tree-ssa-sink.cc: Include tree-ssa-live.h.
9015 (pass_sink_code::execute): Instantiate virtual_operand_live
9017 (sink_code_in_bb): Pass down virtual_operand_live.
9018 (statement_sink_location): Get virtual_operand_live and
9019 verify we are not sinking loads across stores by looking up
9020 the live virtual operand at the sink location.
9022 2023-08-03 Richard Biener <rguenther@suse.de>
9024 * tree-ssa-live.h (class virtual_operand_live): New.
9025 * tree-ssa-live.cc (virtual_operand_live::init): New.
9026 (virtual_operand_live::get_live_in): Likewise.
9027 (virtual_operand_live::get_live_out): Likewise.
9029 2023-08-03 Richard Biener <rguenther@suse.de>
9031 * passes.def: Exchange loop splitting and final value
9034 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9036 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
9037 New function which handles bswap patterns for vec_perm_const.
9038 (vectorize_vec_perm_const_1): Call new function.
9039 * config/s390/vector.md (*bswap<mode>): Fix operands in output
9041 (*vstbr<mode>): New insn.
9043 2023-08-03 Alexandre Oliva <oliva@adacore.com>
9045 * config/vxworks-smp.opt: New. Introduce -msmp.
9046 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
9047 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
9048 lib_smp when -msmp is present in the command line.
9049 * doc/invoke.texi: Document it.
9051 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
9053 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
9054 when enabling -mno-omit-leaf-frame-pointer
9055 (riscv_option_override): Override omit-frame-pointer.
9056 (riscv_frame_pointer_required): Save s0 for non-leaf function
9057 (TARGET_FRAME_POINTER_REQUIRED): Override defination
9058 * config/riscv/riscv.opt: Add option support.
9060 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
9063 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
9064 place operand in a register before gen_<insn>64ti2_doubleword.
9065 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
9066 operand in a register before gen_<insn>32di2_doubleword.
9067 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
9068 (<any_rotate>64ti2_doubleword): Likewise.
9070 2023-08-03 Pan Li <pan2.li@intel.com>
9072 * config/riscv/riscv-vector-builtins-bases.cc
9073 (vfmul_frm_obj): New declaration.
9075 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
9076 * config/riscv/riscv-vector-builtins-functions.def
9077 (vfmul_frm): New function definition.
9078 * config/riscv/vector.md: Add vfmul to frm_mode.
9080 2023-08-03 Andrew Pinski <apinski@marvell.com>
9082 * match.pd (`~X & X`): Check that the types match.
9083 (`~x | x`, `~x ^ x`): Likewise.
9085 2023-08-03 Pan Li <pan2.li@intel.com>
9087 * config/riscv/riscv-vector-builtins-bases.h: Remove
9088 redudant declaration.
9090 2023-08-03 Pan Li <pan2.li@intel.com>
9092 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
9094 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
9095 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
9096 Add vfwsub function definitions.
9098 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9100 PR rtl-optimization/110867
9101 * combine.cc (simplify_compare_const): Try the optimization only
9102 in case the constant fits into the comparison mode.
9104 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
9106 * config/riscv/zicond.md: Remove incorrect zicond patterns and
9107 renumber/rename them.
9108 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
9110 2023-08-02 Richard Biener <rguenther@suse.de>
9112 * tree-phinodes.h (add_phi_node_to_bb): Remove.
9113 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
9115 2023-08-02 Jan Beulich <jbeulich@suse.com>
9117 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
9118 two of the alternatives.
9120 2023-08-02 Richard Biener <rguenther@suse.de>
9122 PR tree-optimization/92335
9123 * tree-ssa-sink.cc (select_best_block): Before loop
9124 optimizations avoid sinking unconditional loads/stores
9125 in innermost loops to conditional executed places.
9127 2023-08-02 Andrew Pinski <apinski@marvell.com>
9129 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
9130 the comparison operands before comparing them.
9132 2023-08-02 Andrew Pinski <apinski@marvell.com>
9134 * match.pd (`~X & X`, `~X | X`): Move over to
9135 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
9136 handles that already.
9137 Remove range test simplifications to true/false as they
9138 are now handled by these patterns.
9140 2023-08-02 Andrew Pinski <apinski@marvell.com>
9142 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
9143 statement's lhs and rhs to check if trivial dead.
9144 Rename inserted_exprs to exprs_maybe_dce; also move it so
9145 bitmap is not allocated if not needed.
9147 2023-08-02 Pan Li <pan2.li@intel.com>
9149 * config/riscv/riscv-vector-builtins-bases.cc
9150 (class widen_binop_frm): New class for binop frm.
9151 (BASE): Add vfwadd_frm.
9152 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
9153 * config/riscv/riscv-vector-builtins-functions.def
9154 (vfwadd_frm): New function definition.
9155 * config/riscv/riscv-vector-builtins-shapes.cc
9156 (BASE_NAME_MAX_LEN): New macro.
9157 (struct alu_frm_def): Leverage new base class.
9158 (struct build_frm_base): New build base for frm.
9159 (struct widen_alu_frm_def): New struct for widen alu frm.
9160 (SHAPE): Add widen_alu_frm shape.
9161 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
9162 * config/riscv/vector.md (frm_mode): Add vfwalu type.
9164 2023-08-02 Jan Hubicka <jh@suse.cz>
9166 * cfgloop.h (loop_count_in): Declare.
9167 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
9168 (loop_count_in): Move here from ...
9169 * cfgloopmanip.cc (loop_count_in): ... here.
9170 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
9172 2023-08-02 Jan Hubicka <jh@suse.cz>
9174 * cfg.cc (scale_strictly_dominated_blocks): New function.
9175 * cfg.h (scale_strictly_dominated_blocks): Declare.
9176 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
9178 2023-08-02 Richard Biener <rguenther@suse.de>
9180 PR rtl-optimization/110587
9181 * lra-spills.cc (return_regno_p): Remove.
9182 (regno_in_use_p): Likewise.
9183 (lra_final_code_change): Do not remove noop moves
9184 between hard registers.
9186 2023-08-02 liuhongt <hongtao.liu@intel.com>
9189 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
9190 HFmode, use mode iterator VFH instead.
9191 (vec_fmsubadd<mode>4): Ditto.
9192 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
9193 Remove scalar mode from iterator, use VFH_AVX512VL instead.
9194 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
9197 2023-08-02 liuhongt <hongtao.liu@intel.com>
9199 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
9200 pre_reload define_insn_and_split.
9202 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
9204 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
9205 using Zicond to implement some conditional moves.
9207 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
9209 * config/riscv/zicond.md: Use the X iterator instead of ANYI
9210 on the comparison input operands.
9212 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
9214 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
9216 (case SET): For INSNs that just set a REG, take the cost from the
9218 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
9220 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
9222 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
9223 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
9224 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
9225 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
9226 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
9227 (OPTION_MASK_ISA_ABM_SET):
9228 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
9230 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
9232 * config/s390/s390.cc (s390_encode_section_info): Assume external
9233 symbols without explicit alignment to be unaligned if
9234 -munaligned-symbols has been specified.
9235 * config/s390/s390.opt (-munaligned-symbols): New option.
9237 2023-08-01 Richard Ball <richard.ball@arm.com>
9239 * gimple-fold.cc (fold_ctor_reference):
9240 Add support for poly_int.
9242 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
9245 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
9246 LABEL_NUSES of new conditional branch instruction.
9248 2023-08-01 Jan Hubicka <jh@suse.cz>
9250 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
9251 constant prologue peeling.
9253 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
9255 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
9257 2023-08-01 Pan Li <pan2.li@intel.com>
9258 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9260 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
9261 (STATIC_FRM_P): Ditto.
9262 (struct mode_switching_info): New struct for mode switching.
9263 (struct machine_function): Add new field mode switching.
9264 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
9265 (riscv_frm_adjust_mode_after_call): New function for call mode.
9266 (riscv_frm_emit_after_call_in_bb_end): New function for emit
9267 insn when call as the end of bb.
9268 (riscv_frm_mode_needed): New function for frm mode needed.
9269 (frm_unknown_dynamic_p): Remove call check.
9270 (riscv_mode_needed): Extrac function for frm.
9271 (riscv_frm_mode_after): Add DYN_CALL after.
9272 (riscv_mode_entry): Remove backup rtl initialization.
9273 * config/riscv/vector.md (frm_mode): Add dyn_call.
9274 (fsrmsi_restore_exit): Rename to _volatile.
9275 (fsrmsi_restore_volatile): Likewise.
9277 2023-08-01 Pan Li <pan2.li@intel.com>
9279 * config/riscv/riscv-vector-builtins-bases.cc
9280 (class reverse_binop_frm): Add new template for reversed frm.
9281 (vfsub_frm_obj): New obj.
9282 (vfrsub_frm_obj): Likewise.
9283 * config/riscv/riscv-vector-builtins-bases.h:
9284 (vfsub_frm): New declaration.
9285 (vfrsub_frm): Likewise.
9286 * config/riscv/riscv-vector-builtins-functions.def
9287 (vfsub_frm): New function define.
9288 (vfrsub_frm): Likewise.
9290 2023-08-01 Andrew Pinski <apinski@marvell.com>
9292 PR tree-optimization/93044
9293 * match.pd (nested int casts): A truncation (to the same size or smaller)
9294 can always remove the inner cast.
9296 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
9299 * doc/invoke.texi (-Wmissing-variable-declarations): Document
9302 2023-07-31 Andrew Pinski <apinski@marvell.com>
9304 PR tree-optimization/106164
9305 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
9306 `a == b | a < b`, `a == b | a > b`): Handle these cases
9309 2023-07-31 Andrew Pinski <apinski@marvell.com>
9311 PR tree-optimization/106164
9312 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
9313 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
9315 2023-07-31 Andrew Pinski <apinski@marvell.com>
9317 PR tree-optimization/100864
9318 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
9319 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
9320 (gimple_bitwise_inverted_equal_p): New function.
9321 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
9322 instead of direct matching bit_not.
9324 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
9327 * gcc-ar.cc (main): Expand argv and use
9328 temporary response file to call ar if any
9329 expansions were made.
9331 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
9333 PR tree-optimization/110582
9334 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
9335 range vector for non-ssa names.
9337 2023-07-31 David Malcolm <dmalcolm@redhat.com>
9340 * diagnostic-client-data-hooks.h (class sarif_object): New forward
9342 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
9344 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
9345 (class sarif_invocation): Inherit from sarif_object rather than
9347 (class sarif_result): Likewise.
9348 (class sarif_ice_notification): Likewise.
9349 (sarif_object::get_or_create_properties): New.
9350 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
9351 to call the context's add_sarif_invocation_properties hook.
9352 (sarif_builder::flush_to_file): Pass m_context to
9353 sarif_invocation::prepare_to_flush.
9354 * diagnostic-format-sarif.h: New header.
9355 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
9356 writes to stderr. Document that if SARIF diagnostic output is
9357 requested then any timing information is written in JSON form as
9358 part of the SARIF output, rather than to stderr.
9359 * timevar.cc: Include "json.h".
9360 (timer::named_items::m_hash_map): Split out type into...
9361 (timer::named_items::hash_map_t): ...this new typedef.
9362 (timer::named_items::make_json): New function.
9363 (timevar_diff): New function.
9364 (make_json_for_timevar_time_def): New function.
9365 (timer::timevar_def::make_json): New function.
9366 (timer::make_json): New function.
9367 * timevar.h (class json::value): New forward decl.
9368 (timer::make_json): New decl.
9369 (timer::timevar_def::make_json): New decl.
9370 * tree-diagnostic-client-data-hooks.cc: Include
9371 "diagnostic-format-sarif.h" and "timevar.h".
9372 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
9375 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9377 * combine.cc (simplify_compare_const): Narrow comparison of
9378 memory and constant.
9379 (try_combine): Adapt new function signature.
9380 (simplify_comparison): Adapt new function signature.
9382 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
9384 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
9386 (expand_vector_init_insert_elems): Ditto.
9388 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
9391 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
9392 single_defuse_cycle while counting reduction_latency.
9394 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9396 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
9397 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
9418 (COND_LEN_ADD): Ditto.
9419 (COND_LEN_SUB): Ditto.
9420 (COND_LEN_MUL): Ditto.
9421 (COND_LEN_DIV): Ditto.
9422 (COND_LEN_MOD): Ditto.
9423 (COND_LEN_RDIV): Ditto.
9424 (COND_LEN_MIN): Ditto.
9425 (COND_LEN_MAX): Ditto.
9426 (COND_LEN_FMIN): Ditto.
9427 (COND_LEN_FMAX): Ditto.
9428 (COND_LEN_AND): Ditto.
9429 (COND_LEN_IOR): Ditto.
9430 (COND_LEN_XOR): Ditto.
9431 (COND_LEN_SHL): Ditto.
9432 (COND_LEN_SHR): Ditto.
9433 (COND_LEN_FMA): Ditto.
9434 (COND_LEN_FMS): Ditto.
9435 (COND_LEN_FNMA): Ditto.
9436 (COND_LEN_FNMS): Ditto.
9437 (COND_LEN_NEG): Ditto.
9438 (ADD): New macro define.
9459 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
9462 * config/i386/i386-features.cc (compute_convert_gain): Check
9463 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
9464 and V4SImode rotates in STV.
9465 (general_scalar_chain::convert_rotate): Likewise.
9467 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
9469 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
9470 * config/riscv/riscv-protos.h (get_mask_mode): Update return
9472 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
9474 (emit_vlmax_insn): Ditto.
9475 (emit_vlmax_fp_insn): Ditto.
9476 (emit_vlmax_ternary_insn): Ditto.
9477 (emit_vlmax_fp_ternary_insn): Ditto.
9478 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
9479 (emit_nonvlmax_insn): Ditto.
9480 (emit_vlmax_slide_insn): Ditto.
9481 (emit_nonvlmax_slide_tu_insn): Ditto.
9482 (emit_vlmax_merge_insn): Ditto.
9483 (emit_vlmax_masked_insn): Ditto.
9484 (emit_nonvlmax_masked_insn): Ditto.
9485 (emit_vlmax_masked_store_insn): Ditto.
9486 (emit_nonvlmax_masked_store_insn): Ditto.
9487 (emit_vlmax_masked_mu_insn): Ditto.
9488 (emit_nonvlmax_tu_insn): Ditto.
9489 (emit_nonvlmax_fp_tu_insn): Ditto.
9490 (emit_scalar_move_insn): Ditto.
9491 (emit_vlmax_compress_insn): Ditto.
9492 (emit_vlmax_reduction_insn): Ditto.
9493 (emit_vlmax_fp_reduction_insn): Ditto.
9494 (emit_nonvlmax_fp_reduction_insn): Ditto.
9495 (expand_vec_series): Ditto.
9496 (expand_vector_init_merge_repeating_sequence): Ditto.
9497 (expand_vec_perm): Ditto.
9498 (shuffle_merge_patterns): Ditto.
9499 (shuffle_compress_patterns): Ditto.
9500 (shuffle_decompress_patterns): Ditto.
9501 (expand_reduction): Ditto.
9502 (get_mask_mode): Update return type.
9503 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
9504 is valid, and use new get_mask_mode interface.
9506 2023-07-31 Pan Li <pan2.li@intel.com>
9508 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
9509 Move rm suffix before mask.
9511 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9513 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
9514 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
9517 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
9520 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
9521 (extzv<mode>): Likewise.
9522 (insv<mode>): Likewise.
9523 (*testqi_ext_3): Likewise.
9524 (*btr<mode>_2): Likewise.
9525 (define_split): Likewise.
9526 (*btsq_imm): Likewise.
9527 (*btrq_imm): Likewise.
9528 (*btcq_imm): Likewise.
9529 (define_peephole2 x3): Likewise.
9530 (*bt<mode>): Likewise
9531 (*bt<mode>_mask): New define_insn_and_split.
9532 (*jcc_bt<mode>): Use QImode for offsets.
9533 (*jcc_bt<mode>_1): Delete obsolete pattern.
9534 (*jcc_bt<mode>_mask): Use QImode offsets.
9535 (*jcc_bt<mode>_mask_1): Likewise.
9536 (define_split): Likewise.
9537 (*bt<mode>_setcqi): Likewise.
9538 (*bt<mode>_setncqi): Likewise.
9539 (*bt<mode>_setnc<mode>): Likewise.
9540 (*bt<mode>_setncqi_2): Likewise.
9541 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
9542 (bmi2_bzhi_<mode>3): Use QImode offsets.
9543 (*bmi2_bzhi_<mode>3): Likewise.
9544 (*bmi2_bzhi_<mode>3_1): Likewise.
9545 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
9546 (@tbm_bextri_<mode>): Likewise.
9548 2023-07-29 Jan Hubicka <jh@suse.cz>
9550 * profile-count.cc (profile_probability::sqrt): New member function.
9551 (profile_probability::pow): Likewise.
9552 * profile-count.h: (profile_probability::sqrt): Declare
9553 (profile_probability::pow): Likewise.
9554 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
9556 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
9558 * gimple-range-cache.cc (ssa_cache::merge_range): New.
9559 (ssa_lazy_cache::merge_range): New.
9560 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
9561 (class ssa_lazy_cache): Ditto.
9562 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
9564 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
9566 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
9567 Move from value-query.cc.
9568 (substitute_and_fold_engine::value_of_stmt): Ditto.
9569 (substitute_and_fold_engine::range_of_expr): New.
9570 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
9571 range_query. New prototypes.
9572 * value-query.cc (value_query::value_on_edge): Relocate.
9573 (value_query::value_of_stmt): Ditto.
9574 * value-query.h (class value_query): Remove.
9575 (class range_query): Remove base class. Adjust prototypes.
9577 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
9579 PR tree-optimization/110205
9580 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
9581 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
9583 * range-op.cc (operator_lshift): Add missing final overrides.
9584 (operator_rshift): Ditto.
9586 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
9588 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
9589 optimizations in BPF target.
9591 2023-07-28 Honza <jh@ryzen4.suse.cz>
9593 * cfgloopmanip.cc (loop_count_in): Break out from ...
9594 (loop_exit_for_scaling): Break out from ...
9595 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
9596 add more sanity check and debug info.
9597 (scale_loop_profile): ... here.
9598 (create_empty_loop_on_edge): Fix whitespac.
9599 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
9600 * loop-unroll.cc (unroll_loop_constant_iterations): Use
9601 update_loop_exit_probability_scale_dom_bbs.
9602 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
9603 (tree_transform_and_unroll_loop): Use
9604 update_loop_exit_probability_scale_dom_bbs.
9605 * tree-ssa-loop-split.cc (split_loop): Use
9606 update_loop_exit_probability_scale_dom_bbs.
9608 2023-07-28 Jan Hubicka <jh@suse.cz>
9611 * tree-ssa-loop-split.cc: Include value-query.h.
9612 (split_at_bb_p): Analyze cases where EQ/NE can be turned
9613 into LT/LE/GT/GE; return updated guard code.
9614 (split_loop): Use guard code.
9616 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
9617 Richard Biener <rguenther@suse.de>
9620 PR rtl-optimization/110587
9621 * expr.cc (emit_group_load_1): Simplify logic for calling
9622 force_reg on ORIG_SRC, to avoid making a copy if the source
9623 is already in a pseudo register.
9625 2023-07-28 Jan Hubicka <jh@suse.cz>
9627 PR middle-end/106923
9628 * tree-ssa-loop-split.cc (connect_loops): Change probability
9629 of the test preconditioning second loop to very_likely.
9630 (fix_loop_bb_probability): Handle correctly case where
9631 on of the arms of the conditional is empty.
9632 (split_loop): Fold the test guarding first condition to
9633 see if it is constant true; Set correct entry block
9634 probabilities of the split loops; determine correct loop
9637 2023-07-28 xuli <xuli1@eswincomputing.com>
9639 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
9640 vsadd[u] and vssub[u].
9641 * config/riscv/vector.md: Ditto.
9643 2023-07-28 Jan Hubicka <jh@suse.cz>
9645 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
9646 loops when IV test is not overflowing.
9648 2023-07-28 liuhongt <hongtao.liu@intel.com>
9651 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
9653 (avx512cd_maskw_vec_dup<mode>): Ditto.
9655 2023-07-27 David Faust <david.faust@oracle.com>
9659 * config/bpf/bpf.opt (msmov): New option.
9660 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
9661 * config/bpf/bpf.md (*extendsidi2): New.
9667 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
9668 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
9669 also enables -msmov.
9671 2023-07-27 David Faust <david.faust@oracle.com>
9673 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
9674 Add -mbswap and -msdiv eBPF options.
9675 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
9676 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
9679 2023-07-27 David Faust <david.faust@oracle.com>
9681 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
9682 in pseudo-C dialect output template.
9683 (sub<AM:mode>3): Likewise.
9685 2023-07-27 Jan Hubicka <jh@suse.cz>
9687 * tree-vect-loop.cc (optimize_mask_stores): Make store
9690 2023-07-27 Jan Hubicka <jh@suse.cz>
9692 * cfgloop.h (single_dom_exit): Declare.
9693 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
9694 * cfgrtl.cc (struct cfg_hooks): Fix comment.
9695 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
9696 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
9697 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
9699 (tree_transform_and_unroll_loop): ... here;
9701 2023-07-27 Jan Hubicka <jh@suse.cz>
9703 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
9704 tree-ssa-loop-manip.cc and avoid recursion.
9705 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
9706 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
9708 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
9709 (scale_dominated_blocks_in_loop): Declare.
9710 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
9711 (change_edge_frequency): Remove.
9712 * predict.h (change_edge_frequency): Remove.
9713 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
9715 (niter_for_unrolled_loop): Remove.
9716 (tree_transform_and_unroll_loop): Fix profile update.
9718 2023-07-27 Jan Hubicka <jh@suse.cz>
9720 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
9721 to guessed; fix count of new_bb.
9723 2023-07-27 Jan Hubicka <jh@suse.cz>
9725 * profile-count.h (profile_count::apply_probability): Fix
9726 handling of uninitialized probabilities, optimize scaling
9729 2023-07-27 Richard Biener <rguenther@suse.de>
9731 PR tree-optimization/91838
9732 * gimple-match-head.cc: Include attribs.h and asan.h.
9733 * generic-match-head.cc: Likewise.
9734 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
9736 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9738 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
9739 (ADJUST_ALIGNMENT): Ditto.
9740 (ADJUST_PRECISION): Ditto.
9742 (VECTOR_MODE_WITH_PREFIX): Ditto.
9743 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
9744 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
9745 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
9746 (legitimize_move): Enable basic VLS modes support.
9749 (get_vector_mode): Ditto.
9750 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
9751 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
9752 (VLS_ENTRY): New macro.
9753 (riscv_v_ext_mode_p): Add vls modes.
9754 (riscv_get_v_regno_alignment): New function.
9755 (riscv_print_operand): Add vls modes.
9756 (riscv_hard_regno_nregs): Ditto.
9757 (riscv_hard_regno_mode_ok): Ditto.
9758 (riscv_regmode_natural_size): Ditto.
9759 (riscv_vectorize_preferred_vector_alignment): Ditto.
9760 * config/riscv/riscv.md: Ditto.
9761 * config/riscv/vector-iterators.md: Ditto.
9762 * config/riscv/vector.md: Ditto.
9763 * config/riscv/autovec-vls.md: New file.
9765 2023-07-27 Pan Li <pan2.li@intel.com>
9767 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
9769 (vwrite_csr): Ditto.
9771 2023-07-27 demin.han <demin.han@starfivetech.com>
9773 * config/riscv/autovec.md: Delete which_alternative use in split
9775 2023-07-27 Richard Biener <rguenther@suse.de>
9777 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
9779 (pass_sink_code::execute): ... in the caller.
9781 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
9782 Richard Biener <rguenther@suse.de>
9784 PR tree-optimization/110776
9785 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
9788 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
9790 * config/riscv/riscv.md: Include zicond.md
9791 * config/riscv/zicond.md: New file.
9793 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
9795 * common/config/riscv/riscv-common.cc: New extension.
9796 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
9797 (TARGET_ZICOND): New target.
9799 2023-07-26 Carl Love <cel@us.ibm.com>
9801 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
9802 specifies the number of built-in arguments to check.
9803 (altivec_resolve_overloaded_builtin): Update calls to find_instance
9804 to pass the number of built-in arguments to be checked.
9806 2023-07-26 David Faust <david.faust@oracle.com>
9808 * config/bpf/bpf.opt (mv3-atomics): New option.
9809 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
9810 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
9811 (REG_CLASS_NAMES): Likewise.
9812 (REG_CLASS_CONTENTS): Likewise.
9813 (REGNO_REG_CLASS): Handle R0.
9814 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
9815 (UNSPEC_AAND): New unspec.
9816 (UNSPEC_AOR): Likewise.
9817 (UNSPEC_AXOR): Likewise.
9818 (UNSPEC_AFADD): Likewise.
9819 (UNSPEC_AFAND): Likewise.
9820 (UNSPEC_AFOR): Likewise.
9821 (UNSPEC_AFXOR): Likewise.
9822 (UNSPEC_AXCHG): Likewise.
9823 (UNSPEC_ACMPX): Likewise.
9824 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
9826 * config/bpf/atomic.md: ...Here. New file.
9827 * config/bpf/constraints.md (t): New constraint for R0.
9828 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
9830 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
9832 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
9835 2023-07-26 Carl Love <cel@us.ibm.com>
9837 * config/rs6000/rs6000-builtins.def: Rename
9838 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
9839 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
9840 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
9841 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
9842 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
9843 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
9844 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
9845 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
9846 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
9847 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
9848 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
9849 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
9850 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
9851 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
9852 * config/rs6000/rs6000-c.cc (find_instance): Add case
9853 RS6000_OVLD_VEC_REPLACE_UN.
9854 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
9855 Fix first argument type. Rename VREPLACE_UN_UV4SI as
9856 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
9857 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
9858 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
9859 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
9860 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
9861 REPLACE_ELT_V for vector modes.
9862 (REPLACE_ELT): New scalar mode iterator.
9863 (REPLACE_ELT_char): Add scalar attributes.
9864 (vreplace_un_<mode>): Change iterator and mode attribute.
9866 2023-07-26 David Malcolm <dmalcolm@redhat.com>
9869 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
9871 2023-07-26 Richard Biener <rguenther@suse.de>
9873 PR tree-optimization/106081
9874 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
9875 Assign layout -1 to splats.
9877 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9879 * range-op-mixed.h (class operator_cast): Add update_bitmask.
9880 * range-op.cc (operator_cast::update_bitmask): New.
9881 (operator_cast::fold_range): Call update_bitmask.
9883 2023-07-26 Li Xu <xuli1@eswincomputing.com>
9885 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
9886 scalar type to float16, eliminate warning.
9887 (vfloat16mf4x3_t): Ditto.
9888 (vfloat16mf4x4_t): Ditto.
9889 (vfloat16mf4x5_t): Ditto.
9890 (vfloat16mf4x6_t): Ditto.
9891 (vfloat16mf4x7_t): Ditto.
9892 (vfloat16mf4x8_t): Ditto.
9893 (vfloat16mf2x2_t): Ditto.
9894 (vfloat16mf2x3_t): Ditto.
9895 (vfloat16mf2x4_t): Ditto.
9896 (vfloat16mf2x5_t): Ditto.
9897 (vfloat16mf2x6_t): Ditto.
9898 (vfloat16mf2x7_t): Ditto.
9899 (vfloat16mf2x8_t): Ditto.
9900 (vfloat16m1x2_t): Ditto.
9901 (vfloat16m1x3_t): Ditto.
9902 (vfloat16m1x4_t): Ditto.
9903 (vfloat16m1x5_t): Ditto.
9904 (vfloat16m1x6_t): Ditto.
9905 (vfloat16m1x7_t): Ditto.
9906 (vfloat16m1x8_t): Ditto.
9907 (vfloat16m2x2_t): Ditto.
9908 (vfloat16m2x3_t): Ditto.
9909 (vfloat16m2x4_t): Ditto.
9910 (vfloat16m4x2_t): Ditto.
9911 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
9912 * config/riscv/vector.md: add tuple mode in attr sew.
9914 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
9917 * config/i386/i386.md (plusminusmult): New code iterator.
9918 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
9919 (movq_<mode>_to_sse): New expander.
9920 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
9921 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
9922 as a wrapper around V4SFmode operation.
9923 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
9924 nonimmediate_operand.
9925 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
9926 operand 2 predicates to nonimmediate_operand.
9927 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
9928 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
9929 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
9930 operand 2 predicates to nonimmediate_operand.
9931 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
9932 nonimmediate_operand.
9933 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
9934 operand 2 predicates to nonimmediate_operand.
9935 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
9936 (<smaxmin:code>v2sf3): Ditto.
9937 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
9938 predicates to nonimmediate_operand.
9939 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
9940 operand 1 and operand 2 predicates to nonimmediate_operand.
9941 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9942 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
9943 (*mmx_haddv2sf3_low): Ditto.
9944 (*mmx_hsubv2sf3_low): Ditto.
9945 (vec_addsubv2sf3): Ditto.
9946 (*mmx_maskcmpv2sf3_comm): Remove.
9947 (*mmx_maskcmpv2sf3): Remove.
9948 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
9949 (vcond<V2FI:mode>v2sf): Ditto.
9954 (fix_truncv2sfv2si2): Ditto.
9955 (fixuns_truncv2sfv2si2): Ditto.
9956 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
9957 Change operand 1 predicate to nonimmediate_operand.
9958 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
9959 (floatunsv2siv2sf2): Ditto.
9960 (mmx_floatv2siv2sf2): Remove SSE alternatives.
9961 Change operand 1 predicate to nonimmediate_operand.
9962 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
9964 (lrintv2sfv2si2): Ditto.
9966 (lceilv2sfv2si2): Ditto.
9967 (floorv2sf2): Ditto.
9968 (lfloorv2sfv2si2): Ditto.
9969 (btruncv2sf2): Ditto.
9970 (roundv2sf2): Ditto.
9971 (lroundv2sfv2si2): Ditto.
9972 (*mmx_roundv2sf2): Remove.
9974 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
9976 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
9978 2023-07-26 Richard Biener <rguenther@suse.de>
9980 PR tree-optimization/110799
9981 * tree-ssa-pre.cc (compute_avail): More thoroughly match
9982 up TBAA behavior of redundant loads.
9984 2023-07-26 Jakub Jelinek <jakub@redhat.com>
9986 PR tree-optimization/110755
9987 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
9988 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
9989 it is exact op1 + (-op1) or op1 - op1.
9991 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
9994 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
9995 operands output with "x".
9997 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9999 * range-op.cc (class operator_absu): Add update_bitmask.
10000 (operator_absu::update_bitmask): New.
10002 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
10004 * range-op-mixed.h (class operator_abs): Add update_bitmask.
10005 * range-op.cc (operator_abs::update_bitmask): New.
10007 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
10009 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
10010 * range-op.cc (operator_bitwise_not::update_bitmask): New.
10012 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
10014 * range-op.cc (update_known_bitmask): Handle unary operators.
10016 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
10018 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
10020 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
10022 * config/riscv/riscv.md: Likewise.
10024 2023-07-26 Jan Hubicka <jh@suse.cz>
10026 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
10027 if we divide by zero.
10029 2023-07-25 David Faust <david.faust@oracle.com>
10031 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
10032 enclosing parentheses for pseudo-C dialect.
10033 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
10034 operands of pseudo-C dialect output templates where needed.
10035 (zero_extendqidi2): Likewise.
10036 (zero_extendsidi2): Likewise.
10037 (*mov<MM:mode>): Likewise.
10039 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
10041 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
10042 (bit_value_mult_const): Same.
10043 (get_individual_bits): Same.
10045 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
10048 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
10049 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
10050 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
10051 (minmax_op): New int attribute.
10052 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
10053 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
10054 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
10055 pattern to fmaxdf3.
10056 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
10058 2023-07-24 David Faust <david.faust@oracle.com>
10060 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
10062 2023-07-24 Drew Ross <drross@redhat.com>
10063 Jakub Jelinek <jakub@redhat.com>
10065 PR middle-end/109986
10066 * generic-match-head.cc (bitwise_equal_p): New macro.
10067 * gimple-match-head.cc (bitwise_equal_p): New macro.
10068 (gimple_nop_convert): Declare.
10069 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
10070 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
10072 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
10074 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
10075 single quote rather than backquote in diagnostic.
10077 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
10080 * config/bpf/bpf.opt: New command-line option -msdiv.
10081 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
10082 * config/bpf/bpf.cc (bpf_option_override): Initialize
10084 * doc/invoke.texi (eBPF Options): Document -msdiv.
10086 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
10088 * config/riscv/riscv.cc (riscv_option_override): Spell out
10089 greater than and use cannot in diagnostic string.
10091 2023-07-24 Richard Biener <rguenther@suse.de>
10093 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
10094 (_slp_tree::vec_stmts): Remove.
10095 (SLP_TREE_VEC_STMTS): Remove.
10096 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
10097 (_slp_tree::_slp_tree): Adjust.
10098 (_slp_tree::~_slp_tree): Likewise.
10099 (vect_get_slp_vect_def): Simplify.
10100 (vect_get_slp_defs): Likewise.
10101 (vect_transform_slp_perm_load_1): Adjust.
10102 (vect_add_slp_permutation): Likewise.
10103 (vect_schedule_slp_node): Likewise.
10104 (vectorize_slp_instance_root_stmt): Likewise.
10105 (vect_schedule_scc): Likewise.
10106 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
10107 (vectorizable_call): Likewise.
10108 (vectorizable_call): Likewise.
10109 (vect_create_vectorized_demotion_stmts): Likewise.
10110 (vectorizable_conversion): Likewise.
10111 (vectorizable_assignment): Likewise.
10112 (vectorizable_shift): Likewise.
10113 (vectorizable_operation): Likewise.
10114 (vectorizable_load): Likewise.
10115 (vectorizable_condition): Likewise.
10116 (vectorizable_comparison): Likewise.
10117 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
10118 (vectorize_fold_left_reduction): Use push_vec_def.
10119 (vect_transform_reduction): Likewise.
10120 (vect_transform_cycle_phi): Likewise.
10121 (vectorizable_lc_phi): Likewise.
10122 (vectorizable_phi): Likewise.
10123 (vectorizable_recurr): Likewise.
10124 (vectorizable_induction): Likewise.
10125 (vectorizable_live_operation): Likewise.
10127 2023-07-24 Richard Biener <rguenther@suse.de>
10129 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
10131 2023-07-24 Richard Biener <rguenther@suse.de>
10133 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
10134 * config/i386/i386-expand.cc: Likewise.
10135 * config/i386/i386-features.cc: Likewise.
10136 * config/i386/i386-options.cc: Likewise.
10138 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
10140 * tree-vect-stmts.cc (vectorizable_conversion): Handle
10141 more demotion/promotion for modifier == NONE.
10143 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
10148 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
10149 (extzv<mode>): Likewise.
10150 (insv<mode>): Likewise.
10151 (*testqi_ext_3): Likewise.
10152 (*btr<mode>_2): Likewise.
10153 (define_split): Likewise.
10154 (*btsq_imm): Likewise.
10155 (*btrq_imm): Likewise.
10156 (*btcq_imm): Likewise.
10157 (define_peephole2 x3): Likewise.
10158 (*bt<mode>): Likewise
10159 (*bt<mode>_mask): New define_insn_and_split.
10160 (*jcc_bt<mode>): Use QImode for offsets.
10161 (*jcc_bt<mode>_1): Delete obsolete pattern.
10162 (*jcc_bt<mode>_mask): Use QImode offsets.
10163 (*jcc_bt<mode>_mask_1): Likewise.
10164 (define_split): Likewise.
10165 (*bt<mode>_setcqi): Likewise.
10166 (*bt<mode>_setncqi): Likewise.
10167 (*bt<mode>_setnc<mode>): Likewise.
10168 (*bt<mode>_setncqi_2): Likewise.
10169 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
10170 (bmi2_bzhi_<mode>3): Use QImode offsets.
10171 (*bmi2_bzhi_<mode>3): Likewise.
10172 (*bmi2_bzhi_<mode>3_1): Likewise.
10173 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
10174 (@tbm_bextri_<mode>): Likewise.
10176 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
10178 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
10179 * config/bpf/bpf.opt (mkernel): Remove option.
10180 * config/bpf/bpf.cc (bpf_target_macros): Do not define
10181 BPF_KERNEL_VERSION_CODE.
10183 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
10186 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
10187 (mbswap): New option.
10188 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
10189 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
10190 * config/bpf/bpf.md: Use bswap instructions if available for
10191 bswap* insn, and fix constraint.
10192 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
10194 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10196 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
10197 (mask_len_fold_left_plus_<mode>): Ditto.
10198 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10199 (enum reduction_type): Ditto.
10200 (expand_reduction): Add in-order reduction.
10201 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
10202 (expand_reduction): Add in-order reduction.
10204 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10206 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
10207 (vectorize_fold_left_reduction): Ditto.
10208 (vectorizable_reduction): Ditto.
10209 (vect_transform_reduction): Ditto.
10211 2023-07-24 Richard Biener <rguenther@suse.de>
10213 PR tree-optimization/110777
10214 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
10215 Avoid propagating abnormals.
10217 2023-07-24 Richard Biener <rguenther@suse.de>
10219 PR tree-optimization/110766
10220 * tree-scalar-evolution.cc
10221 (analyze_and_compute_bitwise_induction_effect): Check the PHI
10222 is defined in the loop header.
10224 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
10226 PR tree-optimization/110740
10227 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
10228 loop with a single scalar iteration.
10230 2023-07-24 Pan Li <pan2.li@intel.com>
10232 * config/riscv/riscv-vector-builtins-shapes.cc
10233 (struct alu_frm_def): Take range check.
10235 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
10238 * config/riscv/predicates.md (const_0_operand): Add back
10241 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
10243 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
10244 64-bit insertions into TImode optimizations with -O0, unless
10245 the function has the "naked" attribute (for PR target/110533).
10247 2023-07-22 Andrew Pinski <apinski@marvell.com>
10250 * rtl.h (extended_count): Change last argument type
10253 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
10255 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
10256 (extzv<mode>): Likewise.
10257 (insv<mode>): Likewise.
10258 (*testqi_ext_3): Likewise.
10259 (*btr<mode>_2): Likewise.
10260 (define_split): Likewise.
10261 (*btsq_imm): Likewise.
10262 (*btrq_imm): Likewise.
10263 (*btcq_imm): Likewise.
10264 (define_peephole2 x3): Likewise.
10265 (*bt<mode>): Likewise
10266 (*bt<mode>_mask): New define_insn_and_split.
10267 (*jcc_bt<mode>): Use QImode for offsets.
10268 (*jcc_bt<mode>_1): Delete obsolete pattern.
10269 (*jcc_bt<mode>_mask): Use QImode offsets.
10270 (*jcc_bt<mode>_mask_1): Likewise.
10271 (define_split): Likewise.
10272 (*bt<mode>_setcqi): Likewise.
10273 (*bt<mode>_setncqi): Likewise.
10274 (*bt<mode>_setnc<mode>): Likewise.
10275 (*bt<mode>_setncqi_2): Likewise.
10276 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
10277 (bmi2_bzhi_<mode>3): Use QImode offsets.
10278 (*bmi2_bzhi_<mode>3): Likewise.
10279 (*bmi2_bzhi_<mode>3_1): Likewise.
10280 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
10281 (@tbm_bextri_<mode>): Likewise.
10283 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
10285 * config/bfin/bfin.md (ones): Fix length computation.
10287 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
10289 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
10290 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
10291 instead of FRAME_POINTER_REGNUM to spill pseudos.
10293 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
10294 Richard Biener <rguenther@suse.de>
10297 * gimplify.cc (gimplify_compound_lval): If the array's type
10298 is error_mark_node then return GS_ERROR.
10300 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
10303 * config/bpf/bpf.opt: Added option -masm=<dialect>.
10304 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
10305 * config/bpf/bpf.cc (bpf_print_register): New function.
10306 (bpf_print_register): Support pseudo-c syntax for registers.
10307 (bpf_print_operand_address): Likewise.
10308 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
10309 (ASSEMBLER_DIALECT): Define.
10310 * config/bpf/bpf.md: Added pseudo-c templates.
10311 * doc/invoke.texi (-masm=): New eBPF option item.
10313 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
10315 * config/bpf/bpf.md: fixed template for neg instruction.
10317 2023-07-21 Jan Hubicka <jh@suse.cz>
10320 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
10321 profiles by vectorization factor.
10322 (vect_transform_loop): Check for flat profiles.
10324 2023-07-21 Jan Hubicka <jh@suse.cz>
10326 * cfgloop.h (maybe_flat_loop_profile): Declare
10327 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
10328 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
10330 2023-07-21 Jan Hubicka <jh@suse.cz>
10332 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
10333 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
10334 * predict.cc (estimate_bb_frequencies): Likewise.
10335 * profile.cc (branch_prob): Likewise.
10336 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
10338 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
10340 * config.in: Regenerate.
10341 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
10342 (LINK_COMMAND_SPEC_A): Add demangle handling.
10343 * configure: Regenerate.
10344 * configure.ac: Detect linker support for '-demangle'.
10346 2023-07-21 Jan Hubicka <jh@suse.cz>
10348 * sreal.cc (sreal::to_nearest_int): New.
10349 (sreal_verify_basics): Verify also to_nearest_int.
10350 (verify_aritmetics): Likewise.
10351 (sreal_verify_conversions): New.
10352 (sreal_cc_tests): Call sreal_verify_conversions.
10353 * sreal.h: (sreal::to_nearest_int): Declare
10355 2023-07-21 Jan Hubicka <jh@suse.cz>
10357 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
10358 (should_duplicate_loop_header_p): Return info on profitability.
10359 (do_while_loop_p): Watch for constant conditionals.
10360 (update_profile_after_ch): Do not sanity check that all
10361 static exits are taken.
10362 (ch_base::copy_headers): Run on all loops.
10363 (pass_ch::process_loop_p): Improve heuristics by handling also
10364 do_while loop and duplicating shortest sequence containing all
10367 2023-07-21 Jan Hubicka <jh@suse.cz>
10369 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
10370 tests first; update finite_p flag.
10372 2023-07-21 Jan Hubicka <jh@suse.cz>
10374 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
10375 * cfgloop.h (print_loop_info): Declare.
10376 * tree-cfg.cc (print_loop_info): Break out from ...; add
10377 printing of missing fields and profile
10378 (print_loop): ... here.
10380 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10382 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
10384 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10386 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
10387 (vectorizable_operation): Ditto.
10389 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10391 * config/riscv/autovec.md: Align order of mask and len.
10392 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
10393 (expand_gather_scatter): Ditto.
10394 * doc/md.texi: Ditto.
10395 * internal-fn.cc (add_len_and_mask_args): Ditto.
10396 (add_mask_and_len_args): Ditto.
10397 (expand_partial_load_optab_fn): Ditto.
10398 (expand_partial_store_optab_fn): Ditto.
10399 (expand_scatter_store_optab_fn): Ditto.
10400 (expand_gather_load_optab_fn): Ditto.
10401 (internal_fn_len_index): Ditto.
10402 (internal_fn_mask_index): Ditto.
10403 (internal_len_load_store_bias): Ditto.
10404 * tree-vect-stmts.cc (vectorizable_store): Ditto.
10405 (vectorizable_load): Ditto.
10407 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10409 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
10410 (mask_len_load<mode><vm>): Ditto.
10411 (len_maskstore<mode><vm>): Ditto.
10412 (mask_len_store<mode><vm>): Ditto.
10413 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
10414 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
10415 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
10416 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
10417 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
10418 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
10419 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
10420 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
10421 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
10422 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
10423 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
10424 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
10425 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
10426 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
10427 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
10428 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
10429 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
10430 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
10431 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
10432 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
10433 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
10434 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
10435 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
10436 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
10437 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
10438 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
10439 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
10440 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
10441 * doc/md.texi: Ditto.
10442 * genopinit.cc (main): Ditto.
10443 (CMP_NAME): Ditto. Ditto.
10444 * gimple-fold.cc (arith_overflowed_p): Ditto.
10445 (gimple_fold_partial_load_store_mem_ref): Ditto.
10446 (gimple_fold_call): Ditto.
10447 * internal-fn.cc (len_maskload_direct): Ditto.
10448 (mask_len_load_direct): Ditto.
10449 (len_maskstore_direct): Ditto.
10450 (mask_len_store_direct): Ditto.
10451 (expand_call_mem_ref): Ditto.
10452 (expand_len_maskload_optab_fn): Ditto.
10453 (expand_mask_len_load_optab_fn): Ditto.
10454 (expand_len_maskstore_optab_fn): Ditto.
10455 (expand_mask_len_store_optab_fn): Ditto.
10456 (direct_len_maskload_optab_supported_p): Ditto.
10457 (direct_mask_len_load_optab_supported_p): Ditto.
10458 (direct_len_maskstore_optab_supported_p): Ditto.
10459 (direct_mask_len_store_optab_supported_p): Ditto.
10460 (internal_load_fn_p): Ditto.
10461 (internal_store_fn_p): Ditto.
10462 (internal_gather_scatter_fn_p): Ditto.
10463 (internal_fn_len_index): Ditto.
10464 (internal_fn_mask_index): Ditto.
10465 (internal_fn_stored_value_index): Ditto.
10466 (internal_len_load_store_bias): Ditto.
10467 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
10468 (MASK_LEN_GATHER_LOAD): Ditto.
10469 (LEN_MASK_LOAD): Ditto.
10470 (MASK_LEN_LOAD): Ditto.
10471 (LEN_MASK_SCATTER_STORE): Ditto.
10472 (MASK_LEN_SCATTER_STORE): Ditto.
10473 (LEN_MASK_STORE): Ditto.
10474 (MASK_LEN_STORE): Ditto.
10475 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
10476 (supports_vec_scatter_store_p): Ditto.
10477 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
10478 (target_supports_len_load_store_p): Ditto.
10479 * optabs.def (OPTAB_CD): Ditto.
10480 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
10481 (call_may_clobber_ref_p_1): Ditto.
10482 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
10483 (dse_optimize_stmt): Ditto.
10484 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
10485 (get_alias_ptr_type_for_ptr_address): Ditto.
10486 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
10487 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
10488 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
10489 (vect_get_strided_load_store_ops): Ditto.
10490 (vectorizable_store): Ditto.
10491 (vectorizable_load): Ditto.
10493 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
10495 * config/i386/i386.opt: Fix a typo.
10497 2023-07-21 Richard Biener <rguenther@suse.de>
10499 PR tree-optimization/88540
10500 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
10501 with NaNs but handle the simple case by if-converting to a
10504 2023-07-21 Andrew Pinski <apinski@marvell.com>
10506 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
10509 2023-07-21 Richard Biener <rguenther@suse.de>
10511 PR tree-optimization/110742
10512 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
10513 Do not materialize an edge permutation in an external node with
10515 (vect_slp_analyze_node_operations_1): Guard purely internal
10518 2023-07-21 Jan Hubicka <jh@suse.cz>
10520 * cfgloop.cc: Include sreal.h.
10521 (flow_loop_dump): Dump sreal iteration exsitmate.
10522 (get_estimated_loop_iterations): Update.
10523 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
10524 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
10525 (expected_loop_iterations_unbounded): Use new API.
10526 * cfgloopmanip.cc (scale_loop_profile): Use
10527 expected_loop_iterations_by_profile
10528 * predict.cc (pass_profile::execute): Likewise.
10529 * profile.cc (branch_prob): Likewise.
10530 * tree-ssa-loop-niter.cc: Include sreal.h.
10531 (estimate_numbers_of_iterations): Likewise
10533 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
10535 PR tree-optimization/110744
10536 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
10537 operand for ifn IFN_LEN_STORE.
10539 2023-07-21 liuhongt <hongtao.liu@intel.com>
10542 * common.opt: (fcf-protection=): Add EnumSet attribute to
10543 support combination of params.
10545 2023-07-21 David Malcolm <dmalcolm@redhat.com>
10547 PR middle-end/110612
10548 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
10550 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
10551 (table_geometry::table_y_to_canvas_y): Likewise.
10552 * text-art/table.h (table_geometry::m_table): Drop unused field.
10553 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
10556 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
10559 * config/i386/i386-features.cc
10560 (general_scalar_chain::compute_convert_gain): Calculate gain
10561 for extend higpart case.
10562 (general_scalar_chain::convert_op): Handle
10563 ASHIFTRT/ASHIFT combined RTX.
10564 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
10565 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
10566 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
10567 New define_insn_and_split pattern.
10568 (*extendv2di2_highpart_stv): Ditto.
10570 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
10572 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
10575 2023-07-20 Andrew Pinski <apinski@marvell.com>
10577 * combine.cc (dump_combine_stats): Remove.
10578 (dump_combine_total_stats): Remove.
10579 (total_attempts, total_merges, total_extras,
10580 total_successes): Remove.
10581 (combine_instructions): Don't increment total stats
10582 instead use statistics_counter_event.
10583 * dumpfile.cc (print_combine_total_stats): Remove.
10584 * dumpfile.h (print_combine_total_stats): Remove.
10585 (dump_combine_total_stats): Remove.
10586 * passes.cc (finish_optimization_passes):
10587 Don't call print_combine_total_stats.
10588 * rtl.h (dump_combine_total_stats): Remove.
10589 (dump_combine_stats): Remove.
10591 2023-07-20 Jan Hubicka <jh@suse.cz>
10593 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
10596 2023-07-20 Martin Jambor <mjambor@suse.cz>
10598 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
10599 (analyzer-text-art-ideal-canvas-width): Likewise.
10600 (analyzer-text-art-string-ellipsis-head-len): Likewise.
10601 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
10603 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10605 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
10606 Refine code structure.
10608 2023-07-20 Jan Hubicka <jh@suse.cz>
10610 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
10611 (get_range_query): ... this one; do
10612 (static_loop_exit): Add query parametr, turn ranger to reference.
10613 (loop_static_stmt_p): New function.
10614 (loop_static_op_p): New function.
10615 (loop_iv_derived_p): Remove.
10616 (loop_combined_static_and_iv_p): New function.
10617 (should_duplicate_loop_header_p): Discover combined onditionals;
10618 do not track iv derived; improve dumps.
10619 (pass_ch::execute): Fix whitespace.
10621 2023-07-20 Richard Biener <rguenther@suse.de>
10623 PR tree-optimization/110204
10624 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
10625 Look through copies generated by PRE.
10627 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
10629 * tree-vect-stmts.cc (get_group_load_store_type): Account for
10630 `gap` when checking if need to peel twice.
10632 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
10634 PR middle-end/77928
10635 * doc/extend.texi: Document iseqsig builtin.
10636 * builtins.cc (fold_builtin_iseqsig): New function.
10637 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
10638 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
10639 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
10641 2023-07-20 Pan Li <pan2.li@intel.com>
10643 * config/riscv/vector.md: Fix incorrect match_operand.
10645 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
10647 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
10648 force_reg, to use SUBREG rather than create a new pseudo when
10649 inserting DFmode fields into TImode with insvti_{high,low}part.
10650 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
10651 define_insn_and_split...
10652 (*concatditi3_3): 64-bit implementation. Provide alternative
10653 that allows register allocation to use SSE registers that is
10654 split into vec_concatv2di after reload.
10655 (*concatsidi3_3): 32-bit implementation.
10657 2023-07-20 Richard Biener <rguenther@suse.de>
10659 PR middle-end/61747
10660 * internal-fn.cc (expand_vec_cond_optab_fn): When the
10661 value operands are equal to the original comparison operands
10662 preserve that equality by re-using the comparison expansion.
10663 * optabs.cc (emit_conditional_move): When the value operands
10664 are equal to the comparison operands and would be forced to
10665 a register by prepare_cmp_insn do so earlier, preserving the
10668 2023-07-20 Pan Li <pan2.li@intel.com>
10670 * config/riscv/vector.md: Align pattern format.
10672 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
10674 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
10675 Granite Rapids{, D} from documentation.
10677 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10679 * config/riscv/autovec.md
10680 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
10681 Refactor RVV machine modes.
10682 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
10683 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10684 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
10685 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10686 (len_mask_gather_load<mode><mode>): Ditto.
10687 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
10688 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10689 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10690 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
10691 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10692 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
10693 (len_mask_scatter_store<mode><mode>): Ditto.
10694 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
10695 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
10696 (ADJUST_NUNITS): Ditto.
10697 (ADJUST_ALIGNMENT): Ditto.
10698 (ADJUST_BYTESIZE): Ditto.
10699 (ADJUST_PRECISION): Ditto.
10700 (RVV_MODES): Ditto.
10701 (RVV_WHOLE_MODES): Ditto.
10702 (RVV_FRACT_MODE): Ditto.
10703 (RVV_NF8_MODES): Ditto.
10704 (RVV_NF4_MODES): Ditto.
10705 (VECTOR_MODES_WITH_PREFIX): Ditto.
10706 (VECTOR_MODE_WITH_PREFIX): Ditto.
10707 (RVV_TUPLE_MODES): Ditto.
10708 (RVV_NF2_MODES): Ditto.
10709 (RVV_TUPLE_PARTIAL_MODES): Ditto.
10710 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
10712 (TUPLE_ENTRY): Ditto.
10713 (get_vlmul): Ditto.
10715 (get_ratio): Ditto.
10716 (preferred_simd_mode): Ditto.
10717 (autovectorize_vector_modes): Ditto.
10718 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
10719 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
10720 (vbool64_t): Ditto.
10721 (vbool32_t): Ditto.
10722 (vbool16_t): Ditto.
10727 (vint8mf8_t): Ditto.
10728 (vuint8mf8_t): Ditto.
10729 (vint8mf4_t): Ditto.
10730 (vuint8mf4_t): Ditto.
10731 (vint8mf2_t): Ditto.
10732 (vuint8mf2_t): Ditto.
10733 (vint8m1_t): Ditto.
10734 (vuint8m1_t): Ditto.
10735 (vint8m2_t): Ditto.
10736 (vuint8m2_t): Ditto.
10737 (vint8m4_t): Ditto.
10738 (vuint8m4_t): Ditto.
10739 (vint8m8_t): Ditto.
10740 (vuint8m8_t): Ditto.
10741 (vint16mf4_t): Ditto.
10742 (vuint16mf4_t): Ditto.
10743 (vint16mf2_t): Ditto.
10744 (vuint16mf2_t): Ditto.
10745 (vint16m1_t): Ditto.
10746 (vuint16m1_t): Ditto.
10747 (vint16m2_t): Ditto.
10748 (vuint16m2_t): Ditto.
10749 (vint16m4_t): Ditto.
10750 (vuint16m4_t): Ditto.
10751 (vint16m8_t): Ditto.
10752 (vuint16m8_t): Ditto.
10753 (vint32mf2_t): Ditto.
10754 (vuint32mf2_t): Ditto.
10755 (vint32m1_t): Ditto.
10756 (vuint32m1_t): Ditto.
10757 (vint32m2_t): Ditto.
10758 (vuint32m2_t): Ditto.
10759 (vint32m4_t): Ditto.
10760 (vuint32m4_t): Ditto.
10761 (vint32m8_t): Ditto.
10762 (vuint32m8_t): Ditto.
10763 (vint64m1_t): Ditto.
10764 (vuint64m1_t): Ditto.
10765 (vint64m2_t): Ditto.
10766 (vuint64m2_t): Ditto.
10767 (vint64m4_t): Ditto.
10768 (vuint64m4_t): Ditto.
10769 (vint64m8_t): Ditto.
10770 (vuint64m8_t): Ditto.
10771 (vfloat16mf4_t): Ditto.
10772 (vfloat16mf2_t): Ditto.
10773 (vfloat16m1_t): Ditto.
10774 (vfloat16m2_t): Ditto.
10775 (vfloat16m4_t): Ditto.
10776 (vfloat16m8_t): Ditto.
10777 (vfloat32mf2_t): Ditto.
10778 (vfloat32m1_t): Ditto.
10779 (vfloat32m2_t): Ditto.
10780 (vfloat32m4_t): Ditto.
10781 (vfloat32m8_t): Ditto.
10782 (vfloat64m1_t): Ditto.
10783 (vfloat64m2_t): Ditto.
10784 (vfloat64m4_t): Ditto.
10785 (vfloat64m8_t): Ditto.
10786 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
10787 (TUPLE_ENTRY): Ditto.
10788 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
10789 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
10790 (riscv_v_adjust_nunits): Ditto.
10791 (riscv_v_adjust_bytesize): Ditto.
10792 (riscv_v_adjust_precision): Ditto.
10793 (riscv_convert_vector_bits): Ditto.
10794 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
10795 * config/riscv/riscv.md: Ditto.
10796 * config/riscv/vector-iterators.md: Ditto.
10797 * config/riscv/vector.md
10798 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10799 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
10800 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10801 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
10802 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10803 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
10804 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
10805 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
10806 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
10807 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
10808 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
10809 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
10810 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
10811 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
10812 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
10813 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
10814 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
10815 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
10816 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
10817 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
10818 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
10819 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
10820 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
10821 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
10822 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
10823 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
10824 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
10825 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
10826 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
10827 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
10828 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
10829 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
10830 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
10832 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
10834 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
10835 (lra_asm_insn_error): New prototype.
10836 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
10838 (lra_spill): Call lra_update_fp2sp_elimination.
10839 * lra-eliminations.cc: Remove trailing spaces.
10840 (elimination_fp2sp_occured_p): New static flag.
10841 (lra_eliminate_regs_1): Set the flag up.
10842 (update_reg_eliminate): Modify the assert for stack to frame
10843 pointer elimination.
10844 (lra_update_fp2sp_elimination): New function.
10845 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
10847 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
10849 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
10851 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
10852 dependencies from target pragmas.
10853 * config/aarch64/arm_fp16.h (target): Likewise.
10854 * config/aarch64/arm_neon.h (target): Likewise.
10856 2023-07-19 Andrew Pinski <apinski@marvell.com>
10858 PR tree-optimization/110252
10859 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
10860 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
10861 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
10862 (match_simplify_replacement): Temporarily
10863 remove the flow sensitive info on the two statements that might
10866 2023-07-19 Andrew Pinski <apinski@marvell.com>
10868 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
10869 with flow_sensitive_info_storage.
10870 (follow_outer_ssa_edges): Update how to save off the flow
10872 (maybe_fold_comparisons_from_match_pd): Update restoring
10873 of flow sensitive info.
10874 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
10875 (flow_sensitive_info_storage::restore): New method.
10876 (flow_sensitive_info_storage::save_and_clear): New method.
10877 (flow_sensitive_info_storage::clear_storage): New method.
10878 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
10880 2023-07-19 Andrew Pinski <apinski@marvell.com>
10882 PR tree-optimization/110726
10883 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
10884 Add checks to make sure the type was one bit precision
10887 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10889 * doc/md.texi: Add mask_len_fold_left_plus.
10890 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
10891 (expand_mask_len_fold_left_optab_fn): Ditto.
10892 (direct_mask_len_fold_left_optab_supported_p): Ditto.
10893 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
10894 * optabs.def (OPTAB_D): Ditto.
10896 2023-07-19 Jakub Jelinek <jakub@redhat.com>
10898 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
10900 2023-07-19 Jakub Jelinek <jakub@redhat.com>
10902 PR tree-optimization/110731
10903 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
10904 divisor as UNSIGNED regardless of sgn.
10906 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
10908 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
10909 (standard_extensions_p): Add check.
10910 (riscv_subset_list::add): Just return NULL if it failed before.
10911 (riscv_subset_list::parse_std_ext): Continue parse when find a error
10912 (riscv_subset_list::parse): Just return NULL if it failed before.
10913 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
10915 2023-07-19 Jan Beulich <jbeulich@suse.com>
10917 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
10919 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
10920 gen_vec_extract_hi.
10921 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
10922 gen_vec_interleave_low. Rename local variable.
10924 2023-07-19 Jan Beulich <jbeulich@suse.com>
10926 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
10927 alternative. Move AVX512VL part of condition to new "enabled"
10930 2023-07-19 liuhongt <hongtao.liu@intel.com>
10933 * config/i386/i386-builtins.cc
10934 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
10935 (ix86_register_bf16_builtin_type): Ditto.
10936 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
10937 isn't available, undef the macros which are used to check the
10938 backend support of the _Float16/__bf16 types when building
10939 libstdc++ and libgcc.
10940 * config/i386/i386.cc (construct_container): Issue errors for
10941 HFmode/BFmode when TARGET_SSE2 is not available.
10942 (function_value_32): Ditto.
10943 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
10944 (ix86_libgcc_floating_mode_supported_p): Ditto.
10945 (ix86_emit_support_tinfos): Adjust codes.
10946 (ix86_invalid_conversion): Return diagnostic message string
10947 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
10948 (ix86_invalid_unary_op): New function.
10949 (ix86_invalid_binary_op): Ditto.
10950 (TARGET_INVALID_UNARY_OP): Define.
10951 (TARGET_INVALID_BINARY_OP): Define.
10952 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
10953 related instrinsics header files.
10954 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
10956 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
10958 * dwarf2asm.cc: Change FALSE to false.
10959 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
10960 * dwarf2out.cc (matches_main_base): Change return type from
10961 int to bool. Change "last_match" variable to bool.
10962 (dump_struct_debug): Change return type from int to bool.
10963 Change "matches" and "result" function arguments to bool.
10964 (is_pseudo_reg): Change return type from int to bool.
10965 (is_tagged_type): Ditto.
10966 (same_loc_p): Ditto.
10967 (same_dw_val_p): Change return type from int to bool and adjust
10968 function body accordingly.
10969 (same_attr_p): Ditto.
10970 (same_die_p): Ditto.
10971 (is_type_die): Ditto.
10972 (is_declaration_die): Ditto.
10973 (should_move_die_to_comdat): Ditto.
10974 (is_base_type): Ditto.
10975 (is_based_loc): Ditto.
10976 (local_scope_p): Ditto.
10977 (class_scope_p): Ditto.
10978 (class_or_namespace_scope_p): Ditto.
10979 (is_tagged_type): Ditto.
10980 (is_rust): Use void argument.
10981 (is_nested_in_subprogram): Change return type from int to bool.
10982 (contains_subprogram_definition): Ditto.
10983 (gen_struct_or_union_type_die): Change "nested", "complete"
10984 and "ns_decl" variables to bool.
10985 (is_naming_typedef_decl): Change FALSE to false.
10987 2023-07-18 Jan Hubicka <jh@suse.cz>
10989 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
10990 for queries not in headers.
10991 (static_loop_exit): Add basic blck parameter; update use of
10993 (should_duplicate_loop_header_p): Add ranger and static_exits
10994 parameter. Do not account statements that will be optimized
10995 out after duplicaiton in overall size. Add ranger query to
10997 (update_profile_after_ch): Take static_exits has set instead of
10998 single eliminated_edge.
10999 (ch_base::copy_headers): Do all analysis in the first pass;
11000 remember invariant_exits and static_exits.
11002 2023-07-18 Jason Merrill <jason@redhat.com>
11004 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
11006 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
11008 * doc/gm2.texi (Semantic checking): Change example testwithptr
11011 2023-07-18 Richard Biener <rguenther@suse.de>
11013 PR middle-end/105715
11014 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
11015 (pass_gimple_isel::execute): ... this. Duplicate
11016 comparison defs of COND_EXPRs.
11018 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11020 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
11021 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
11022 (riscv_convert_vector_bits): Ditto.
11024 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11026 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
11027 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
11029 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
11031 * config/s390/vx-builtins.md: New vsel pattern.
11033 2023-07-18 liuhongt <hongtao.liu@intel.com>
11036 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
11037 Remove # from assemble output.
11039 2023-07-18 liuhongt <hongtao.liu@intel.com>
11042 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
11043 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
11044 3 define_peephole2 after the pattern.
11046 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11048 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
11050 2023-07-18 Pan Li <pan2.li@intel.com>
11051 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11053 * config/riscv/riscv.cc (struct machine_function): Add new field.
11054 (riscv_static_frm_mode_p): New function.
11055 (riscv_emit_frm_mode_set): New function for emit FRM.
11056 (riscv_emit_mode_set): Extract function for FRM.
11057 (riscv_mode_needed): Fix the TODO.
11058 (riscv_mode_entry): Initial dynamic frm RTL.
11059 (riscv_mode_exit): Return DYN_EXIT.
11060 * config/riscv/riscv.md: Add rdfrm.
11061 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
11062 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
11064 (fsrmsi_backup): New pattern for swap.
11065 (fsrmsi_restore): New pattern for restore.
11066 (fsrmsi_restore_exit): New pattern for restore exit.
11067 (frrmsi): New pattern for backup.
11069 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
11071 * doc/extend.texi: Add @cindex on __auto_type.
11073 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
11075 * combine-stack-adj.cc (stack_memref_p): Change return type from
11076 int to bool and adjust function body accordingly.
11077 (rest_of_handle_stack_adjustments): Change return type to void.
11079 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
11081 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
11082 (cant_combine_insn_p): Change return type from int to bool and adjust
11083 function body accordingly.
11084 (can_combine_p): Ditto.
11085 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
11086 function arguments from int to bool.
11087 (contains_muldiv): Change return type from int to bool and adjust
11088 function body accordingly.
11089 (try_combine): Ditto. Change "new_direct_jump" pointer function
11090 argument from int to bool. Change "substed_i2", "substed_i1",
11091 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
11092 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
11093 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
11094 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
11095 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
11096 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
11098 (subst): Change "in_dest", "in_cond" and "unique_copy" function
11099 arguments from int to bool.
11100 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
11101 arguments from int to bool.
11102 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
11103 function argument from int to bool.
11104 (force_int_to_mode): Change "just_select" function argument
11105 from int to bool. Change "next_select" variable to bool.
11106 (rtx_equal_for_field_assignment_p): Change return type from
11107 int to bool and adjust function body accordingly.
11108 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
11109 argument from int to bool.
11110 (get_last_value_validate): Change return type from int to bool
11111 and adjust function body accordingly.
11112 (reg_dead_at_p): Ditto.
11113 (reg_bitfield_target_p): Ditto.
11114 (combine_instructions): Ditto. Change "new_direct_jump"
11116 (can_combine_p): Change return type from int to bool
11117 and adjust function body accordingly.
11118 (likely_spilled_retval_p): Ditto.
11119 (can_change_dest_mode): Change "added_sets" function argument
11121 (find_split_point): Change "unsignedp" variable to bool.
11122 (simplify_if_then_else): Change "comparison_p" and "swapped"
11124 (simplify_set): Change "other_changed" variable to bool.
11125 (expand_compound_operation): Change "unsignedp" variable to bool.
11126 (force_to_mode): Change "just_select" function argument
11127 from int to bool. Change "next_select" variable to bool.
11128 (extended_count): Change "unsignedp" function argument to bool.
11129 (simplify_shift_const_1): Change "complement_p" variable to bool.
11130 (simplify_comparison): Change "changed" variable to bool.
11131 (rest_of_handle_combine): Change return type to void.
11133 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11136 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
11138 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
11140 * ira.cc (setup_reg_class_relations): Continue
11141 if regclass cl3 is hard_reg_set_empty_p.
11143 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11145 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
11147 2023-07-17 Martin Jambor <mjambor@suse.cz>
11149 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
11152 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
11154 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
11156 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
11159 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
11160 recur add all implied extensions.
11161 (riscv_subset_list::check_implied_ext): Add new method.
11162 (riscv_subset_list::parse): Call checker check_implied_ext.
11163 * config/riscv/riscv-subset.h: Add new method.
11165 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11167 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
11168 (reduc_smax_scal_<mode>): Ditto.
11169 (reduc_umax_scal_<mode>): Ditto.
11170 (reduc_smin_scal_<mode>): Ditto.
11171 (reduc_umin_scal_<mode>): Ditto.
11172 (reduc_and_scal_<mode>): Ditto.
11173 (reduc_ior_scal_<mode>): Ditto.
11174 (reduc_xor_scal_<mode>): Ditto.
11175 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
11176 (expand_reduction): New function.
11177 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
11178 (emit_vlmax_fp_reduction_insn): Ditto.
11179 (get_m1_mode): Ditto.
11180 (expand_cond_len_binop): Fix name.
11181 (expand_reduction): New function
11182 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
11183 (validate_change_or_fail): New function.
11184 (change_insn): Fix VSETVL BUG.
11185 (change_vsetvl_insn): Ditto.
11186 (pass_vsetvl::backward_demand_fusion): Ditto.
11187 (pass_vsetvl::df_post_optimization): Ditto.
11189 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
11191 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
11193 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
11195 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
11196 Remove parameter name from declaration of unused parameter.
11198 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
11200 PR tree-optimization/110652
11201 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
11204 2023-07-17 Richard Biener <rguenther@suse.de>
11206 PR tree-optimization/110669
11207 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
11208 Check we matched a header PHI.
11210 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
11212 * tree-ssanames.cc (set_bitmask): New.
11213 * tree-ssanames.h (set_bitmask): New.
11215 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
11217 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
11219 * value-range.h (irange_bitmask::union_): Normalize beforehand.
11220 (irange_bitmask::intersect): Same.
11222 2023-07-17 Andrew Pinski <apinski@marvell.com>
11224 PR tree-optimization/95923
11225 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
11227 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
11229 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
11230 to the std::sort comparison lambda function const.
11232 2023-07-17 Andrew Pinski <apinski@marvell.com>
11234 PR tree-optimization/110666
11235 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
11237 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
11239 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
11240 Arrow Lake and Arrow Lake S.
11241 * common/config/i386/i386-common.cc:
11242 (processor_name): Add arrowlake.
11243 (processor_alias_table): Add arrow lake, arrow lake s and lunar
11245 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
11246 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
11247 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
11248 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
11250 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
11252 * config/i386/i386-options.cc (m_ARROWLAKE): New.
11253 (processor_cost_table): Add arrowlake.
11254 * config/i386/i386.h (enum processor_type):
11255 Add PROCESSOR_ARROWLAKE.
11256 * config/i386/x86-tune.def: Add m_ARROWLAKE.
11257 * doc/extend.texi: Add arrowlake and arrowlake-s.
11258 * doc/invoke.texi: Ditto.
11260 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
11262 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
11263 have the same iterator. Also renaming all the occurence to
11265 (usdot_prod<mode>): New define_expand.
11266 (udot_prod<mode>): Ditto.
11268 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
11270 * common/config/i386/cpuinfo.h (get_available_features):
11272 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
11273 OPTION_MASK_ISA2_SM4_UNSET): New.
11274 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
11275 (ix86_handle_option): Handle -msm4.
11276 * common/config/i386/i386-cpuinfo.h (enum processor_features):
11278 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
11280 * config.gcc: Add sm4intrin.h.
11281 * config/i386/cpuid.h (bit_SM4): New.
11282 * config/i386/i386-builtin.def (BDESC): Add new builtins.
11283 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
11285 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
11286 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
11287 (ix86_valid_target_attribute_inner_p): Handle sm4.
11288 * config/i386/i386.opt: Add option -msm4.
11289 * config/i386/immintrin.h: Include sm4intrin.h
11290 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
11291 (vsm4rnds4_<mode>): Ditto.
11292 * doc/extend.texi: Document sm4.
11293 * doc/invoke.texi: Document -msm4.
11294 * doc/sourcebuild.texi: Document target sm4.
11295 * config/i386/sm4intrin.h: New file.
11297 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
11299 * common/config/i386/cpuinfo.h (get_available_features):
11301 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
11302 OPTION_MASK_ISA2_SHA512_UNSET): New.
11303 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
11304 (ix86_handle_option): Handle -msha512.
11305 * common/config/i386/i386-cpuinfo.h (enum processor_features):
11306 Add FEATURE_SHA512.
11307 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
11309 * config.gcc: Add sha512intrin.h.
11310 * config/i386/cpuid.h (bit_SHA512): New.
11311 * config/i386/i386-builtin-types.def:
11312 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
11313 * config/i386/i386-builtin.def (BDESC): Add new builtins.
11314 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
11316 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
11317 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
11318 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
11319 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
11320 (ix86_valid_target_attribute_inner_p): Handle sha512.
11321 * config/i386/i386.opt: Add option -msha512.
11322 * config/i386/immintrin.h: Include sha512intrin.h.
11323 * config/i386/sse.md (vsha512msg1): New define insn.
11324 (vsha512msg2): Ditto.
11325 (vsha512rnds2): Ditto.
11326 * doc/extend.texi: Document sha512.
11327 * doc/invoke.texi: Document -msha512.
11328 * doc/sourcebuild.texi: Document target sha512.
11329 * config/i386/sha512intrin.h: New file.
11331 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
11333 * common/config/i386/cpuinfo.h (get_available_features):
11335 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
11336 OPTION_MASK_ISA2_SM3_UNSET): New.
11337 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
11338 (ix86_handle_option): Handle -msm3.
11339 * common/config/i386/i386-cpuinfo.h (enum processor_features):
11341 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
11343 * config.gcc: Add sm3intrin.h
11344 * config/i386/cpuid.h (bit_SM3): New.
11345 * config/i386/i386-builtin-types.def:
11346 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
11347 * config/i386/i386-builtin.def (BDESC): Add new builtins.
11348 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
11350 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
11351 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
11352 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
11353 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
11354 (ix86_valid_target_attribute_inner_p): Handle sm3.
11355 * config/i386/i386.opt: Add option -msm3.
11356 * config/i386/immintrin.h: Include sm3intrin.h.
11357 * config/i386/sse.md (vsm3msg1): New define insn.
11359 (vsm3rnds2): Ditto.
11360 * doc/extend.texi: Document sm3.
11361 * doc/invoke.texi: Document -msm3.
11362 * doc/sourcebuild.texi: Document target sm3.
11363 * config/i386/sm3intrin.h: New file.
11365 2023-07-17 Kong Lingling <lingling.kong@intel.com>
11366 Haochen Jiang <haochen.jiang@intel.com>
11368 * common/config/i386/cpuinfo.h (get_available_features): Detect
11370 * common/config/i386/i386-common.cc
11371 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
11372 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
11373 (ix86_handle_option): Handle -mavxvnniint16.
11374 * common/config/i386/i386-cpuinfo.h (enum processor_features):
11375 Add FEATURE_AVXVNNIINT16.
11376 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
11378 * config.gcc: Add avxvnniint16.h.
11379 * config/i386/avxvnniint16intrin.h: New file.
11380 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
11381 * config/i386/i386-builtin.def: Add new builtins.
11382 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
11384 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
11385 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
11386 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
11387 * config/i386/i386.opt: Add option -mavxvnniint16.
11388 * config/i386/immintrin.h: Include avxvnniint16.h.
11389 * config/i386/sse.md
11390 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
11391 * doc/extend.texi: Document avxvnniint16.
11392 * doc/invoke.texi: Document -mavxvnniint16.
11393 * doc/sourcebuild.texi: Document target avxvnniint16.
11395 2023-07-16 Jan Hubicka <jh@suse.cz>
11397 PR middle-end/110649
11398 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
11399 (vect_transform_loop): Move scale_profile_for_vect_loop after
11400 upper bound updates.
11402 2023-07-16 Jan Hubicka <jh@suse.cz>
11404 PR tree-optimization/110649
11405 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
11406 probability of the if-then-else construct.
11408 2023-07-16 Jan Hubicka <jh@suse.cz>
11410 PR middle-end/110649
11411 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
11413 2023-07-15 Andrew Pinski <apinski@marvell.com>
11415 * doc/contrib.texi: Update my entry.
11417 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
11419 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
11421 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
11422 (tld_load): Likewise.
11423 (tgd_load_pic): Change to expander.
11424 (tld_load_pic, tld_offset_load, tp_load): Likewise.
11425 (tie_load_pic, tle_load): Likewise.
11426 (tgd_load_picsi, tgd_load_picdi): New.
11427 (tld_load_picsi, tld_load_picdi): New.
11428 (tld_offset_load<P:mode>): New.
11429 (tp_load<P:mode>): New.
11430 (tie_load_picsi, tie_load_picdi): New.
11431 (tle_load<P:mode>): New.
11433 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11435 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
11436 (vcmlaq_rot180, vcmlaq_rot270): New.
11437 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
11438 (vcmlaq_rot180, vcmlaq_rot270): New.
11439 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
11440 (vcmlaq_rot180, vcmlaq_rot270): New.
11441 * config/arm/arm-mve-builtins.cc
11442 (function_instance::has_inactive_argument): Handle vcmlaq,
11443 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
11444 * config/arm/arm_mve.h (vcmlaq): Delete.
11445 (vcmlaq_rot180): Delete.
11446 (vcmlaq_rot270): Delete.
11447 (vcmlaq_rot90): Delete.
11448 (vcmlaq_m): Delete.
11449 (vcmlaq_rot180_m): Delete.
11450 (vcmlaq_rot270_m): Delete.
11451 (vcmlaq_rot90_m): Delete.
11452 (vcmlaq_f16): Delete.
11453 (vcmlaq_rot180_f16): Delete.
11454 (vcmlaq_rot270_f16): Delete.
11455 (vcmlaq_rot90_f16): Delete.
11456 (vcmlaq_f32): Delete.
11457 (vcmlaq_rot180_f32): Delete.
11458 (vcmlaq_rot270_f32): Delete.
11459 (vcmlaq_rot90_f32): Delete.
11460 (vcmlaq_m_f32): Delete.
11461 (vcmlaq_m_f16): Delete.
11462 (vcmlaq_rot180_m_f32): Delete.
11463 (vcmlaq_rot180_m_f16): Delete.
11464 (vcmlaq_rot270_m_f32): Delete.
11465 (vcmlaq_rot270_m_f16): Delete.
11466 (vcmlaq_rot90_m_f32): Delete.
11467 (vcmlaq_rot90_m_f16): Delete.
11468 (__arm_vcmlaq_f16): Delete.
11469 (__arm_vcmlaq_rot180_f16): Delete.
11470 (__arm_vcmlaq_rot270_f16): Delete.
11471 (__arm_vcmlaq_rot90_f16): Delete.
11472 (__arm_vcmlaq_f32): Delete.
11473 (__arm_vcmlaq_rot180_f32): Delete.
11474 (__arm_vcmlaq_rot270_f32): Delete.
11475 (__arm_vcmlaq_rot90_f32): Delete.
11476 (__arm_vcmlaq_m_f32): Delete.
11477 (__arm_vcmlaq_m_f16): Delete.
11478 (__arm_vcmlaq_rot180_m_f32): Delete.
11479 (__arm_vcmlaq_rot180_m_f16): Delete.
11480 (__arm_vcmlaq_rot270_m_f32): Delete.
11481 (__arm_vcmlaq_rot270_m_f16): Delete.
11482 (__arm_vcmlaq_rot90_m_f32): Delete.
11483 (__arm_vcmlaq_rot90_m_f16): Delete.
11484 (__arm_vcmlaq): Delete.
11485 (__arm_vcmlaq_rot180): Delete.
11486 (__arm_vcmlaq_rot270): Delete.
11487 (__arm_vcmlaq_rot90): Delete.
11488 (__arm_vcmlaq_m): Delete.
11489 (__arm_vcmlaq_rot180_m): Delete.
11490 (__arm_vcmlaq_rot270_m): Delete.
11491 (__arm_vcmlaq_rot90_m): Delete.
11493 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11495 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
11496 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
11497 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
11498 (mve_insn): Add vcmla.
11499 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
11501 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
11503 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
11504 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
11505 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
11506 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
11508 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
11510 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11512 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
11513 (vcmulq_rot180, vcmulq_rot270): New.
11514 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
11515 (vcmulq_rot180, vcmulq_rot270): New.
11516 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
11517 (vcmulq_rot180, vcmulq_rot270): New.
11518 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
11519 (vcmulq_rot270): Delete.
11520 (vcmulq_rot180): Delete.
11522 (vcmulq_m): Delete.
11523 (vcmulq_rot180_m): Delete.
11524 (vcmulq_rot270_m): Delete.
11525 (vcmulq_rot90_m): Delete.
11526 (vcmulq_x): Delete.
11527 (vcmulq_rot90_x): Delete.
11528 (vcmulq_rot180_x): Delete.
11529 (vcmulq_rot270_x): Delete.
11530 (vcmulq_rot90_f16): Delete.
11531 (vcmulq_rot270_f16): Delete.
11532 (vcmulq_rot180_f16): Delete.
11533 (vcmulq_f16): Delete.
11534 (vcmulq_rot90_f32): Delete.
11535 (vcmulq_rot270_f32): Delete.
11536 (vcmulq_rot180_f32): Delete.
11537 (vcmulq_f32): Delete.
11538 (vcmulq_m_f32): Delete.
11539 (vcmulq_m_f16): Delete.
11540 (vcmulq_rot180_m_f32): Delete.
11541 (vcmulq_rot180_m_f16): Delete.
11542 (vcmulq_rot270_m_f32): Delete.
11543 (vcmulq_rot270_m_f16): Delete.
11544 (vcmulq_rot90_m_f32): Delete.
11545 (vcmulq_rot90_m_f16): Delete.
11546 (vcmulq_x_f16): Delete.
11547 (vcmulq_x_f32): Delete.
11548 (vcmulq_rot90_x_f16): Delete.
11549 (vcmulq_rot90_x_f32): Delete.
11550 (vcmulq_rot180_x_f16): Delete.
11551 (vcmulq_rot180_x_f32): Delete.
11552 (vcmulq_rot270_x_f16): Delete.
11553 (vcmulq_rot270_x_f32): Delete.
11554 (__arm_vcmulq_rot90_f16): Delete.
11555 (__arm_vcmulq_rot270_f16): Delete.
11556 (__arm_vcmulq_rot180_f16): Delete.
11557 (__arm_vcmulq_f16): Delete.
11558 (__arm_vcmulq_rot90_f32): Delete.
11559 (__arm_vcmulq_rot270_f32): Delete.
11560 (__arm_vcmulq_rot180_f32): Delete.
11561 (__arm_vcmulq_f32): Delete.
11562 (__arm_vcmulq_m_f32): Delete.
11563 (__arm_vcmulq_m_f16): Delete.
11564 (__arm_vcmulq_rot180_m_f32): Delete.
11565 (__arm_vcmulq_rot180_m_f16): Delete.
11566 (__arm_vcmulq_rot270_m_f32): Delete.
11567 (__arm_vcmulq_rot270_m_f16): Delete.
11568 (__arm_vcmulq_rot90_m_f32): Delete.
11569 (__arm_vcmulq_rot90_m_f16): Delete.
11570 (__arm_vcmulq_x_f16): Delete.
11571 (__arm_vcmulq_x_f32): Delete.
11572 (__arm_vcmulq_rot90_x_f16): Delete.
11573 (__arm_vcmulq_rot90_x_f32): Delete.
11574 (__arm_vcmulq_rot180_x_f16): Delete.
11575 (__arm_vcmulq_rot180_x_f32): Delete.
11576 (__arm_vcmulq_rot270_x_f16): Delete.
11577 (__arm_vcmulq_rot270_x_f32): Delete.
11578 (__arm_vcmulq_rot90): Delete.
11579 (__arm_vcmulq_rot270): Delete.
11580 (__arm_vcmulq_rot180): Delete.
11581 (__arm_vcmulq): Delete.
11582 (__arm_vcmulq_m): Delete.
11583 (__arm_vcmulq_rot180_m): Delete.
11584 (__arm_vcmulq_rot270_m): Delete.
11585 (__arm_vcmulq_rot90_m): Delete.
11586 (__arm_vcmulq_x): Delete.
11587 (__arm_vcmulq_rot90_x): Delete.
11588 (__arm_vcmulq_rot180_x): Delete.
11589 (__arm_vcmulq_rot270_x): Delete.
11591 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11593 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
11594 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
11595 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
11596 (MVE_VCADDQ_VCMULQ_M): New.
11597 (mve_insn): Add vcmul.
11598 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
11601 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
11603 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
11604 @mve_<mve_insn>q<mve_rot>_f<mode>.
11605 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
11606 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
11607 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
11609 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11611 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
11612 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
11613 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
11614 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
11615 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
11616 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
11617 * config/arm/arm-mve-builtins-functions.h (class
11618 unspec_mve_function_exact_insn_rot): New.
11619 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
11620 (vcaddq_rot270): Delete.
11621 (vhcaddq_rot90): Delete.
11622 (vhcaddq_rot270): Delete.
11623 (vcaddq_rot270_m): Delete.
11624 (vcaddq_rot90_m): Delete.
11625 (vhcaddq_rot270_m): Delete.
11626 (vhcaddq_rot90_m): Delete.
11627 (vcaddq_rot90_x): Delete.
11628 (vcaddq_rot270_x): Delete.
11629 (vhcaddq_rot90_x): Delete.
11630 (vhcaddq_rot270_x): Delete.
11631 (vcaddq_rot90_u8): Delete.
11632 (vcaddq_rot270_u8): Delete.
11633 (vhcaddq_rot90_s8): Delete.
11634 (vhcaddq_rot270_s8): Delete.
11635 (vcaddq_rot90_s8): Delete.
11636 (vcaddq_rot270_s8): Delete.
11637 (vcaddq_rot90_u16): Delete.
11638 (vcaddq_rot270_u16): Delete.
11639 (vhcaddq_rot90_s16): Delete.
11640 (vhcaddq_rot270_s16): Delete.
11641 (vcaddq_rot90_s16): Delete.
11642 (vcaddq_rot270_s16): Delete.
11643 (vcaddq_rot90_u32): Delete.
11644 (vcaddq_rot270_u32): Delete.
11645 (vhcaddq_rot90_s32): Delete.
11646 (vhcaddq_rot270_s32): Delete.
11647 (vcaddq_rot90_s32): Delete.
11648 (vcaddq_rot270_s32): Delete.
11649 (vcaddq_rot90_f16): Delete.
11650 (vcaddq_rot270_f16): Delete.
11651 (vcaddq_rot90_f32): Delete.
11652 (vcaddq_rot270_f32): Delete.
11653 (vcaddq_rot270_m_s8): Delete.
11654 (vcaddq_rot270_m_s32): Delete.
11655 (vcaddq_rot270_m_s16): Delete.
11656 (vcaddq_rot270_m_u8): Delete.
11657 (vcaddq_rot270_m_u32): Delete.
11658 (vcaddq_rot270_m_u16): Delete.
11659 (vcaddq_rot90_m_s8): Delete.
11660 (vcaddq_rot90_m_s32): Delete.
11661 (vcaddq_rot90_m_s16): Delete.
11662 (vcaddq_rot90_m_u8): Delete.
11663 (vcaddq_rot90_m_u32): Delete.
11664 (vcaddq_rot90_m_u16): Delete.
11665 (vhcaddq_rot270_m_s8): Delete.
11666 (vhcaddq_rot270_m_s32): Delete.
11667 (vhcaddq_rot270_m_s16): Delete.
11668 (vhcaddq_rot90_m_s8): Delete.
11669 (vhcaddq_rot90_m_s32): Delete.
11670 (vhcaddq_rot90_m_s16): Delete.
11671 (vcaddq_rot270_m_f32): Delete.
11672 (vcaddq_rot270_m_f16): Delete.
11673 (vcaddq_rot90_m_f32): Delete.
11674 (vcaddq_rot90_m_f16): Delete.
11675 (vcaddq_rot90_x_s8): Delete.
11676 (vcaddq_rot90_x_s16): Delete.
11677 (vcaddq_rot90_x_s32): Delete.
11678 (vcaddq_rot90_x_u8): Delete.
11679 (vcaddq_rot90_x_u16): Delete.
11680 (vcaddq_rot90_x_u32): Delete.
11681 (vcaddq_rot270_x_s8): Delete.
11682 (vcaddq_rot270_x_s16): Delete.
11683 (vcaddq_rot270_x_s32): Delete.
11684 (vcaddq_rot270_x_u8): Delete.
11685 (vcaddq_rot270_x_u16): Delete.
11686 (vcaddq_rot270_x_u32): Delete.
11687 (vhcaddq_rot90_x_s8): Delete.
11688 (vhcaddq_rot90_x_s16): Delete.
11689 (vhcaddq_rot90_x_s32): Delete.
11690 (vhcaddq_rot270_x_s8): Delete.
11691 (vhcaddq_rot270_x_s16): Delete.
11692 (vhcaddq_rot270_x_s32): Delete.
11693 (vcaddq_rot90_x_f16): Delete.
11694 (vcaddq_rot90_x_f32): Delete.
11695 (vcaddq_rot270_x_f16): Delete.
11696 (vcaddq_rot270_x_f32): Delete.
11697 (__arm_vcaddq_rot90_u8): Delete.
11698 (__arm_vcaddq_rot270_u8): Delete.
11699 (__arm_vhcaddq_rot90_s8): Delete.
11700 (__arm_vhcaddq_rot270_s8): Delete.
11701 (__arm_vcaddq_rot90_s8): Delete.
11702 (__arm_vcaddq_rot270_s8): Delete.
11703 (__arm_vcaddq_rot90_u16): Delete.
11704 (__arm_vcaddq_rot270_u16): Delete.
11705 (__arm_vhcaddq_rot90_s16): Delete.
11706 (__arm_vhcaddq_rot270_s16): Delete.
11707 (__arm_vcaddq_rot90_s16): Delete.
11708 (__arm_vcaddq_rot270_s16): Delete.
11709 (__arm_vcaddq_rot90_u32): Delete.
11710 (__arm_vcaddq_rot270_u32): Delete.
11711 (__arm_vhcaddq_rot90_s32): Delete.
11712 (__arm_vhcaddq_rot270_s32): Delete.
11713 (__arm_vcaddq_rot90_s32): Delete.
11714 (__arm_vcaddq_rot270_s32): Delete.
11715 (__arm_vcaddq_rot270_m_s8): Delete.
11716 (__arm_vcaddq_rot270_m_s32): Delete.
11717 (__arm_vcaddq_rot270_m_s16): Delete.
11718 (__arm_vcaddq_rot270_m_u8): Delete.
11719 (__arm_vcaddq_rot270_m_u32): Delete.
11720 (__arm_vcaddq_rot270_m_u16): Delete.
11721 (__arm_vcaddq_rot90_m_s8): Delete.
11722 (__arm_vcaddq_rot90_m_s32): Delete.
11723 (__arm_vcaddq_rot90_m_s16): Delete.
11724 (__arm_vcaddq_rot90_m_u8): Delete.
11725 (__arm_vcaddq_rot90_m_u32): Delete.
11726 (__arm_vcaddq_rot90_m_u16): Delete.
11727 (__arm_vhcaddq_rot270_m_s8): Delete.
11728 (__arm_vhcaddq_rot270_m_s32): Delete.
11729 (__arm_vhcaddq_rot270_m_s16): Delete.
11730 (__arm_vhcaddq_rot90_m_s8): Delete.
11731 (__arm_vhcaddq_rot90_m_s32): Delete.
11732 (__arm_vhcaddq_rot90_m_s16): Delete.
11733 (__arm_vcaddq_rot90_x_s8): Delete.
11734 (__arm_vcaddq_rot90_x_s16): Delete.
11735 (__arm_vcaddq_rot90_x_s32): Delete.
11736 (__arm_vcaddq_rot90_x_u8): Delete.
11737 (__arm_vcaddq_rot90_x_u16): Delete.
11738 (__arm_vcaddq_rot90_x_u32): Delete.
11739 (__arm_vcaddq_rot270_x_s8): Delete.
11740 (__arm_vcaddq_rot270_x_s16): Delete.
11741 (__arm_vcaddq_rot270_x_s32): Delete.
11742 (__arm_vcaddq_rot270_x_u8): Delete.
11743 (__arm_vcaddq_rot270_x_u16): Delete.
11744 (__arm_vcaddq_rot270_x_u32): Delete.
11745 (__arm_vhcaddq_rot90_x_s8): Delete.
11746 (__arm_vhcaddq_rot90_x_s16): Delete.
11747 (__arm_vhcaddq_rot90_x_s32): Delete.
11748 (__arm_vhcaddq_rot270_x_s8): Delete.
11749 (__arm_vhcaddq_rot270_x_s16): Delete.
11750 (__arm_vhcaddq_rot270_x_s32): Delete.
11751 (__arm_vcaddq_rot90_f16): Delete.
11752 (__arm_vcaddq_rot270_f16): Delete.
11753 (__arm_vcaddq_rot90_f32): Delete.
11754 (__arm_vcaddq_rot270_f32): Delete.
11755 (__arm_vcaddq_rot270_m_f32): Delete.
11756 (__arm_vcaddq_rot270_m_f16): Delete.
11757 (__arm_vcaddq_rot90_m_f32): Delete.
11758 (__arm_vcaddq_rot90_m_f16): Delete.
11759 (__arm_vcaddq_rot90_x_f16): Delete.
11760 (__arm_vcaddq_rot90_x_f32): Delete.
11761 (__arm_vcaddq_rot270_x_f16): Delete.
11762 (__arm_vcaddq_rot270_x_f32): Delete.
11763 (__arm_vcaddq_rot90): Delete.
11764 (__arm_vcaddq_rot270): Delete.
11765 (__arm_vhcaddq_rot90): Delete.
11766 (__arm_vhcaddq_rot270): Delete.
11767 (__arm_vcaddq_rot270_m): Delete.
11768 (__arm_vcaddq_rot90_m): Delete.
11769 (__arm_vhcaddq_rot270_m): Delete.
11770 (__arm_vhcaddq_rot90_m): Delete.
11771 (__arm_vcaddq_rot90_x): Delete.
11772 (__arm_vcaddq_rot270_x): Delete.
11773 (__arm_vhcaddq_rot90_x): Delete.
11774 (__arm_vhcaddq_rot270_x): Delete.
11776 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11778 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
11779 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
11780 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
11781 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
11782 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
11783 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
11785 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
11786 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
11787 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
11788 VHCADDQ_ROT270_M_S.
11789 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
11790 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
11791 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
11792 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
11793 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
11794 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
11796 (VCADDQ_ROT270_M): Delete.
11797 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
11798 (VCADDQ_ROT90_M): Delete.
11799 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
11800 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
11802 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
11803 (mve_vcaddq<mve_rot><mode>): Rename into ...
11804 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
11805 (mve_vcaddq_rot270_m_<supf><mode>)
11806 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
11807 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
11808 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
11809 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
11811 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
11813 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
11816 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
11817 preparation statement over braces for a single statement.
11818 (*bt<mode>_setncqi): Likewise.
11819 (*bt<mode>_setncqi_2): New define_insn_and_split.
11821 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
11823 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
11824 case inserting of 64-bit values into a TImode register, to handle
11825 both DImode and DFmode using either *insvti_lowpart_1
11826 or *isnvti_highpart_1.
11828 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
11831 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
11832 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
11833 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
11834 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
11835 when the original source contains a paradoxical subreg.
11837 2023-07-14 Jan Hubicka <jh@suse.cz>
11839 * passes.cc (execute_function_todo): Remove
11840 TODO_rebuild_frequencies
11841 * passes.def: Add rebuild_frequencies pass.
11842 * predict.cc (estimate_bb_frequencies): Drop
11844 (tree_estimate_probability): Update call of
11845 estimate_bb_frequencies.
11846 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
11847 first and do not rebuild if not necessary.
11848 (class pass_rebuild_frequencies): New.
11849 (make_pass_rebuild_frequencies): New.
11850 * profile-count.h: Add profile_count::very_large_p.
11851 * tree-inline.cc (optimize_inline_calls): Do not return
11852 TODO_rebuild_frequencies
11853 * tree-pass.h (TODO_rebuild_frequencies): Remove.
11854 (make_pass_rebuild_frequencies): Declare.
11856 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11858 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
11859 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11860 (expand_cond_len_ternop): New function.
11861 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
11862 (expand_cond_len_ternop): Ditto.
11864 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
11867 * config/bpf/bpf.md: Enable instruction scheduling.
11869 2023-07-14 Tamar Christina <tamar.christina@arm.com>
11871 PR tree-optimization/109154
11872 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
11873 (struct bb_predicate): Add no_predicate_stmts.
11874 (set_bb_predicate): Increase predicate count.
11875 (set_bb_predicate_gimplified_stmts): Conditionally initialize
11876 no_predicate_stmts.
11877 (get_bb_num_predicate_stmts): New.
11878 (init_bb_predicate): Initialzie no_predicate_stmts.
11879 (release_bb_predicate): Cleanup no_predicate_stmts.
11880 (insert_gimplified_predicates): Preserve no_predicate_stmts.
11882 2023-07-14 Tamar Christina <tamar.christina@arm.com>
11884 PR tree-optimization/109154
11885 * tree-if-conv.cc (gen_simplified_condition,
11886 gen_phi_nest_statement): New.
11887 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
11889 2023-07-14 Richard Biener <rguenther@suse.de>
11891 * gimple.h (gimple_phi_arg): New const overload.
11892 (gimple_phi_arg_def): Make gimple arg const.
11893 (gimple_phi_arg_def_from_edge): New inline function.
11894 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
11896 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
11897 new inline function.
11898 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
11900 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
11902 * common/config/riscv/riscv-common.cc:
11903 (riscv_implied_info): Add zihintntl item.
11904 (riscv_ext_version_table): Ditto.
11905 (riscv_ext_flag_table): Ditto.
11906 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
11907 (TARGET_ZIHINTNTL): Ditto.
11909 2023-07-14 Die Li <lidie@eswincomputing.com>
11911 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
11913 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
11916 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
11917 used by the address of the following memory operand.
11919 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
11922 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
11923 deallocate alloca-only frame.
11925 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
11928 * config/darwin.h (DARWIN_PLATFORM_ID): New.
11929 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
11930 and SDK data to the static linker.
11932 2023-07-13 Carl Love <cel@us.ibm.com>
11934 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
11935 built-in definition return type.
11936 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
11937 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
11938 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
11939 argument to return FPSCR fields.
11940 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
11941 the return value. Add description for
11942 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
11944 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
11947 * config/alpha/alpha.cc (alpha_emit_set_long_const):
11948 Always use DImode when constructing long const.
11950 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
11952 * haifa-sched.cc: Change TRUE/FALSE to true/false.
11954 * lra-assigns.cc: Ditto.
11955 * lra-constraints.cc: Ditto.
11956 * sel-sched.cc: Ditto.
11958 2023-07-13 Andrew Pinski <apinski@marvell.com>
11960 PR tree-optimization/110293
11961 PR tree-optimization/110539
11962 * match.pd: Expand the `x != (typeof x)(x == 0)`
11963 pattern to handle where the inner and outer comparsions
11964 are either `!=` or `==` and handle other constants
11967 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
11969 PR middle-end/109520
11970 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
11971 (lra_asm_insn_error): New prototype.
11972 * lra.cc: Include rtl_error.h.
11973 (lra_set_insn_recog_data): Initialize asm_reloads_num.
11974 (lra_asm_insn_error): New func whose code is taken from ...
11975 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
11976 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
11978 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11980 * genmatch.cc (commutative_op): Add COND_LEN_*
11981 * internal-fn.cc (first_commutative_argument): Ditto.
11983 (get_unconditional_internal_fn): Ditto.
11984 (can_interpret_as_conditional_op_p): Ditto.
11985 (internal_fn_len_index): Ditto.
11986 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
11987 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
11988 (convert_mult_to_fma): Ditto.
11989 (math_opts_dom_walker::after_dom_children): Ditto.
11991 2023-07-13 Pan Li <pan2.li@intel.com>
11993 * config/riscv/riscv.cc (vxrm_rtx): New static var.
11995 (global_state_unknown_p): Removed.
11996 (riscv_entity_mode_after): Removed.
11997 (asm_insn_p): New function.
11998 (vxrm_unknown_p): New function for fixed-point.
11999 (riscv_vxrm_mode_after): Ditto.
12000 (frm_unknown_dynamic_p): New function for floating-point.
12001 (riscv_frm_mode_after): Ditto.
12002 (riscv_mode_after): Leverage new functions.
12004 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12006 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
12007 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
12008 calling vect_model_load_cost.
12010 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12012 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
12013 handle memory_access_type VMAT_CONTIGUOUS, remove some
12014 VMAT_CONTIGUOUS_PERMUTE related handlings.
12015 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
12016 without calling vect_model_load_cost.
12018 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12020 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
12021 VMAT_CONTIGUOUS_REVERSE any more.
12022 (vectorizable_load): Adjust the costing handling on
12023 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
12025 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12027 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
12028 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
12029 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
12030 assert it will never get VMAT_LOAD_STORE_LANES.
12032 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12034 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
12035 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
12036 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
12037 remove VMAT_GATHER_SCATTER related handlings and the related parameter
12040 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12042 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
12043 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
12044 vect_model_load_cost.
12045 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
12046 VMAT_STRIDED_SLP any more, and remove their related handlings.
12048 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12050 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
12051 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
12052 hoisting decision and without calling vect_model_load_cost.
12053 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
12054 and remove VMAT_INVARIANT related handlings.
12056 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12058 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
12059 on costing with one extra argument cost_vec.
12060 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
12061 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
12062 gs_info.decl set any more.
12064 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12066 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
12067 to vect_model_load_cost down to some different transform paths
12068 according to the handlings of different vect_memory_access_types.
12070 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
12072 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
12074 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12076 * config/riscv/autovec.md
12077 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
12078 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
12079 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
12080 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
12081 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12082 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12083 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12084 (len_mask_gather_load<mode><mode>): Ditto.
12085 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
12086 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
12087 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
12088 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
12089 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12090 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12091 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12092 (len_mask_scatter_store<mode><mode>): Ditto.
12093 * config/riscv/predicates.md (const_1_operand): New predicate.
12094 (vector_gs_scale_operand_16): Ditto.
12095 (vector_gs_scale_operand_32): Ditto.
12096 (vector_gs_scale_operand_64): Ditto.
12097 (vector_gs_extension_operand): Ditto.
12098 (vector_gs_scale_operand_16_rv32): Ditto.
12099 (vector_gs_scale_operand_32_rv32): Ditto.
12100 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
12101 (expand_gather_scatter): New function.
12102 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
12103 (emit_vlmax_masked_store_insn): New function.
12104 (emit_nonvlmax_masked_store_insn): Ditto.
12105 (modulo_sel_indices): Ditto.
12106 (expand_vec_perm): Fix SLP for gather/scatter.
12107 (prepare_gather_scatter): New function.
12108 (expand_gather_scatter): Ditto.
12109 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
12110 (subreg:SI (DI CONST_POLY_INT)).
12111 * config/riscv/vector-iterators.md: Add gather/scatter.
12112 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
12113 (@vec_duplicate<mode>): Ditto.
12114 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
12116 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12118 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12120 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
12121 * config/riscv/riscv-protos.h (enum insn_type): New enum.
12122 (expand_cond_len_binop): New function.
12123 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
12124 (emit_nonvlmax_fp_tu_insn): Ditto.
12125 (need_fp_rounding_p): Ditto.
12126 (expand_cond_len_binop): Ditto.
12127 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
12128 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
12130 2023-07-12 Jan Hubicka <jh@suse.cz>
12132 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
12133 (gimple_duplicate_seme_region): ... this; break out profile updating
12135 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
12136 (ch_base::copy_headers): Update.
12137 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
12138 (gimple_duplicate_seme_region): ... this.
12140 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
12142 PR tree-optimization/107043
12143 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
12145 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
12147 PR tree-optimization/107053
12148 * gimple-range-op.cc (cfn_popcount): Use known set bits.
12150 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
12152 * ira.cc (equiv_init_varies_p): Change return type from int to bool
12153 and adjust function body accordingly.
12154 (equiv_init_movable_p): Ditto.
12155 (memref_used_between_p): Ditto.
12156 * lra-constraints.cc (valid_address_p): Ditto.
12158 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
12160 * range-op.cc (irange_to_masked_value): Remove.
12161 (update_known_bitmask): Update irange value/mask pair instead of
12162 only updating nonzero bits.
12164 2023-07-12 Jan Hubicka <jh@suse.cz>
12166 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
12167 parameter and rewrite profile updating code to handle edges elimination.
12168 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
12169 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
12170 (loop_iv_derived_p): New function.
12171 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
12172 of PHIs and propagation of IV derived variables.
12173 (ch_base::copy_headers): Pass around the invariant edges hash set.
12175 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
12177 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
12178 (last_active_insn): Change "skip_use_p" function argument to bool.
12179 (noce_operand_ok): Change return type from int to bool.
12180 (find_cond_trap): Ditto.
12181 (block_jumps_and_fallthru_p): Change "fallthru_p" and
12182 "jump_p" variables to bool.
12183 (noce_find_if_block): Change return type from int to bool.
12184 (cond_exec_find_if_block): Ditto.
12185 (find_if_case_1): Ditto.
12186 (find_if_case_2): Ditto.
12187 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
12188 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
12189 (cond_exec_process_insns): Change return type from int to bool.
12190 Change "mod_ok" function arg to bool.
12191 (cond_exec_process_if_block): Change return type from int to bool.
12192 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
12194 (noce_emit_store_flag): Change return type from int to bool.
12195 Change "reversep" function arg to bool. Change "cond_complex"
12197 (noce_try_move): Change return type from int to bool.
12198 (noce_try_ifelse_collapse): Ditto.
12199 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
12200 (noce_try_addcc): Change return type from int to bool. Change
12201 "subtract" variable to bool.
12202 (noce_try_store_flag_constants): Change return type from int to bool.
12203 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
12204 (noce_try_cmove): Change return type from int to bool.
12205 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
12206 (noce_try_minmax): Change return type from int to bool. Change
12207 "unsignedp" variable to bool.
12208 (noce_try_abs): Change return type from int to bool. Change
12209 "negate" variable to bool.
12210 (noce_try_sign_mask): Change return type from int to bool.
12211 (noce_try_move): Ditto.
12212 (noce_try_store_flag_constants): Ditto.
12213 (noce_try_cmove): Ditto.
12214 (noce_try_cmove_arith): Ditto.
12215 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
12216 (noce_try_bitop): Change return type from int to bool.
12217 (noce_operand_ok): Ditto.
12218 (noce_convert_multiple_sets): Ditto.
12219 (noce_convert_multiple_sets_1): Ditto.
12220 (noce_process_if_block): Ditto.
12221 (check_cond_move_block): Ditto.
12222 (cond_move_process_if_block): Ditto. Change "success_p"
12224 (rest_of_handle_if_conversion): Change return type to void.
12226 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12228 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
12230 (get_conditional_len_internal_fn): New function.
12231 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
12232 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
12235 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
12238 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
12240 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
12243 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
12244 define_insn_and_split derived from *add<dwi>3_doubleword_concat
12245 and *add<dwi>3_doubleword_zext.
12247 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
12250 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
12251 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
12252 (peephole2): Simplify rega = 0; rega op= rega cases.
12254 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
12256 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
12257 testing a TImode SUBREG of a 128-bit vector register against
12258 zero, use a PTEST instruction instead of first moving it to
12259 a pair of scalar registers.
12261 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
12263 * genopinit.cc (main): Adjust maximal number of optabs and
12265 * gensupport.cc (find_optab): Shift optab by 20 and mode by
12267 * optabs-query.h (optab_handler): Ditto.
12268 (convert_optab_handler): Ditto.
12270 2023-07-12 Richard Biener <rguenther@suse.de>
12272 PR tree-optimization/110630
12273 * tree-vect-slp.cc (vect_add_slp_permutation): New
12274 offset parameter, honor that for the extract code generation.
12275 (vectorizable_slp_permutation_1): Handle offsetted identities.
12277 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12279 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
12280 (umul<mode>3_highpart): Ditto.
12282 2023-07-12 Jan Beulich <jbeulich@suse.com>
12284 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
12285 alternative. Adjust original last alternative's "prefix"
12286 attribute to maybe_evex.
12288 2023-07-12 Jan Beulich <jbeulich@suse.com>
12290 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
12291 vbroadcastss for AVX2. New AVX512F alternative.
12292 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
12293 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
12295 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12297 * config/riscv/peephole.md: Remove XThead* peephole passes.
12298 * config/riscv/thead.md: Include thead-peephole.md.
12299 * config/riscv/thead-peephole.md: New file.
12301 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12303 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
12305 (riscv_index_reg_class): Likewise.
12306 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
12307 (riscv_index_reg_class): New function.
12308 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
12309 riscv_index_reg_class().
12310 (REGNO_OK_FOR_INDEX_P): Call new function
12311 riscv_regno_ok_for_index_p().
12313 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12315 * config/riscv/riscv-protos.h (enum riscv_address_type):
12316 New location of type definition.
12317 (struct riscv_address_info): Likewise.
12318 * config/riscv/riscv.cc (enum riscv_address_type):
12319 Old location of type definition.
12320 (struct riscv_address_info): Likewise.
12322 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12324 * config/riscv/riscv.h (Xmode): New macro.
12326 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12328 * config/riscv/riscv.cc (riscv_print_operand_address): Use
12329 output_addr_const rather than riscv_print_operand.
12331 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12333 * config/riscv/thead.md: Adjust constraints of th_addsl.
12335 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12337 * config/riscv/thead.cc (th_mempair_operands_p):
12338 Fix documentation of th_mempair_order_operands().
12340 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12342 * config/riscv/thead.cc (th_mempair_save_regs):
12343 Emit REG_FRAME_RELATED_EXPR notes in prologue.
12345 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
12347 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
12348 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
12349 New XThead extension INSN.
12350 (*zero_extendsidi2_th_extu): New XThead extension INSN.
12351 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
12353 2023-07-12 liuhongt <hongtao.liu@intel.com>
12357 * config/i386/predicates.md
12358 (int_float_vector_all_ones_operand): New predicate.
12359 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
12361 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
12363 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
12365 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
12366 define_insn_and_split to avoid false dependence.
12367 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
12368 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
12369 of operands 1 to '0' to avoid false dependence.
12370 (*andnot<mode>3): Ditto.
12371 (iornot<mode>3): Ditto.
12372 (*<nlogic><mode>3): Ditto.
12374 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
12376 * common/config/i386/cpuinfo.h
12377 (get_intel_cpu): Handle Granite Rapids D.
12378 * common/config/i386/i386-common.cc:
12379 (processor_alias_table): Add graniterapids-d.
12380 * common/config/i386/i386-cpuinfo.h
12381 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
12382 * config.gcc: Add -march=graniterapids-d.
12383 * config/i386/driver-i386.cc (host_detect_local_cpu):
12384 Handle graniterapids-d.
12385 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
12386 * doc/extend.texi: Add graniterapids-d.
12387 * doc/invoke.texi: Ditto.
12389 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
12391 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
12392 Add OPTION_MASK_ISA_AVX512VL.
12393 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
12396 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12398 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
12399 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
12400 (shuffle_compress_patterns): Ditto.
12401 (expand_vec_perm_const_1): Ditto.
12403 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
12405 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
12406 * cfghooks.h (struct cfg_hooks): Change return type of
12407 verify_flow_info from integer to bool.
12408 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
12409 (can_delete_label_p): Ditto.
12410 (rtl_verify_flow_info): Change return type from int to bool
12411 and adjust function body accordingly. Change "err" variable to bool.
12412 (rtl_verify_flow_info_1): Ditto.
12413 (free_bb_for_insn): Change return type to void.
12414 (rtl_merge_blocks): Change "b_empty" variable to bool.
12415 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
12416 (verify_hot_cold_block_grouping): Change return type from int to bool.
12417 Change "err" variable to bool.
12418 (rtl_verify_edges): Ditto.
12419 (rtl_verify_bb_insns): Ditto.
12420 (rtl_verify_bb_pointers): Ditto.
12421 (rtl_verify_bb_insn_chain): Ditto.
12422 (rtl_verify_fallthru): Ditto.
12423 (rtl_verify_bb_layout): Ditto.
12424 (purge_all_dead_edges): Change "purged" variable to bool.
12425 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
12426 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
12427 (load_killed_in_block_p): Change return type from int to bool
12428 and adjust function body accordingly.
12429 (oprs_unchanged_p): Return true/false.
12430 (rest_of_handle_gcse2): Change return type to void.
12431 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
12432 int to bool. Change "err" variable to bool.
12434 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
12436 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
12438 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12440 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
12441 * internal-fn.cc (cond_len_unary_direct): Ditto.
12442 (cond_len_binary_direct): Ditto.
12443 (cond_len_ternary_direct): Ditto.
12444 (expand_cond_len_unary_optab_fn): Ditto.
12445 (expand_cond_len_binary_optab_fn): Ditto.
12446 (expand_cond_len_ternary_optab_fn): Ditto.
12447 (direct_cond_len_unary_optab_supported_p): Ditto.
12448 (direct_cond_len_binary_optab_supported_p): Ditto.
12449 (direct_cond_len_ternary_optab_supported_p): Ditto.
12450 * internal-fn.def (COND_LEN_ADD): Ditto.
12451 (COND_LEN_SUB): Ditto.
12452 (COND_LEN_MUL): Ditto.
12453 (COND_LEN_DIV): Ditto.
12454 (COND_LEN_MOD): Ditto.
12455 (COND_LEN_RDIV): Ditto.
12456 (COND_LEN_MIN): Ditto.
12457 (COND_LEN_MAX): Ditto.
12458 (COND_LEN_FMIN): Ditto.
12459 (COND_LEN_FMAX): Ditto.
12460 (COND_LEN_AND): Ditto.
12461 (COND_LEN_IOR): Ditto.
12462 (COND_LEN_XOR): Ditto.
12463 (COND_LEN_SHL): Ditto.
12464 (COND_LEN_SHR): Ditto.
12465 (COND_LEN_FMA): Ditto.
12466 (COND_LEN_FMS): Ditto.
12467 (COND_LEN_FNMA): Ditto.
12468 (COND_LEN_FNMS): Ditto.
12469 (COND_LEN_NEG): Ditto.
12470 * optabs.def (OPTAB_D): Ditto.
12472 2023-07-11 Richard Biener <rguenther@suse.de>
12474 PR tree-optimization/110614
12475 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
12476 SLP splats are not suitable for re-align ops.
12478 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
12480 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
12482 (vsx_quad_dform_memory_operand): Likewise.
12484 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
12486 * reorg.cc (stop_search_p): Change return type from int to bool
12487 and adjust function body accordingly.
12488 (resource_conflicts_p): Ditto.
12489 (insn_references_resource_p): Change return type from int to bool.
12490 (insn_sets_resource_p): Ditto.
12491 (redirect_with_delay_slots_safe_p): Ditto.
12492 (condition_dominates_p): Change return type from int to bool
12493 and adjust function body accordingly.
12494 (redirect_with_delay_list_safe_p): Ditto.
12495 (check_annul_list_true_false): Ditto. Change "annul_true_p"
12496 function argument to bool.
12497 (steal_delay_list_from_target): Change "pannul_p" function
12498 argument to bool pointer. Change "must_annul" and "used_annul"
12499 variables from int to bool.
12500 (steal_delay_list_from_fallthrough): Ditto.
12501 (own_thread_p): Change return type from int to bool and adjust
12502 function body accordingly. Change "allow_fallthrough" function
12504 (reorg_redirect_jump): Change return type from int to bool.
12505 (fill_simple_delay_slots): Change "non_jumps_p" function
12506 argument from int to bool. Change "maybe_never" varible to bool.
12507 (fill_slots_from_thread): Change "likely", "thread_if_true" and
12508 "own_thread" function arguments to bool. Change "lose" and
12509 "must_annul" variables to bool.
12510 (delete_from_delay_slot): Change "had_barrier" variable to bool.
12511 (try_merge_delay_insns): Change "annul_p" variable to bool.
12512 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
12514 (rest_of_handle_delay_slots): Change return type from int to void
12515 and adjust function body accordingly.
12517 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
12519 * doc/extend.texi (RISC-V Operand Modifiers): New.
12521 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12523 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
12524 (insert_insn_end_basic_block): Ditto.
12525 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
12526 * gcse.cc (insert_insn_end_basic_block): Export as global function.
12527 * gcse.h (insert_insn_end_basic_block): Ditto.
12529 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
12532 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
12533 (arm_builtin_decl): Hahndle MVE builtins.
12534 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
12535 (add_unique_function): Fix handling of
12536 __ARM_MVE_PRESERVE_USER_NAMESPACE.
12537 (add_overloaded_function): Likewise.
12538 * config/arm/arm-protos.h (builtin_decl): New declaration.
12540 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
12542 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
12544 2023-07-10 Xi Ruoyao <xry111@xry111.site>
12546 PR tree-optimization/110557
12547 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
12548 Ensure the output sign-extended if necessary.
12550 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
12552 * config/i386/i386.md (peephole2): Transform xchg insn with a
12553 REG_UNUSED note to a (simple) move.
12554 (*insvti_lowpart_1): New define_insn_and_split.
12555 (*insvdi_lowpart_1): Likewise.
12557 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
12559 * config/i386/i386-features.cc (compute_convert_gain): Tweak
12560 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
12561 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
12562 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
12564 2023-07-10 liuhongt <hongtao.liu@intel.com>
12567 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
12568 splitter to detect fp max pattern.
12569 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
12571 2023-07-09 Jan Hubicka <jh@suse.cz>
12573 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
12574 (dump_edge_info): Likewise.
12575 (dump_bb_info): Likewise.
12576 * profile-count.cc (profile_count::dump): Add comma between quality and
12579 2023-07-08 Jan Hubicka <jh@suse.cz>
12581 PR tree-optimization/110600
12582 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
12584 2023-07-08 Jan Hubicka <jh@suse.cz>
12586 PR middle-end/110590
12587 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
12588 inner loops and be more careful about inconsistent profiles.
12589 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
12590 exit is followed by other exit.
12592 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
12594 * cprop.cc (reg_available_p): Change return type from int to bool.
12595 (reg_not_set_p): Ditto.
12596 (try_replace_reg): Ditto. Change "success" variable to bool.
12597 (cprop_jump): Change return type from int to void
12598 and adjust function body accordingly.
12599 (constprop_register): Ditto.
12600 (cprop_insn): Ditto. Change "changed" variable to bool.
12601 (local_cprop_pass): Change return type from int to void
12602 and adjust function body accordingly.
12603 (bypass_block): Ditto. Change "change", "may_be_loop_header"
12604 and "removed_p" variables to bool.
12605 (bypass_conditional_jumps): Change return type from int to void
12606 and adjust function body accordingly. Change "changed"
12608 (one_cprop_pass): Ditto.
12610 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
12612 * gcse.cc (expr_equiv_p): Change return type from int to bool.
12613 (oprs_unchanged_p): Change return type from int to void
12614 and adjust function body accordingly.
12615 (oprs_anticipatable_p): Ditto.
12616 (oprs_available_p): Ditto.
12617 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
12618 arguments to bool. Change "found" variable to bool.
12619 (load_killed_in_block_p): Change return type from int to void and
12620 adjust function body accordingly. Change "avail_p" argument to bool.
12621 (pre_expr_reaches_here_p): Change return type from int to void
12622 and adjust function body accordingly.
12623 (pre_delete): Ditto. Change "changed" variable to bool.
12624 (pre_gcse): Change return type from int to void
12625 and adjust function body accordingly. Change "did_insert" and
12626 "changed" variables to bool.
12627 (one_pre_gcse_pass): Change return type from int to void
12628 and adjust function body accordingly. Change "changed" variable
12630 (should_hoist_expr_to_dom): Change return type from int to void
12631 and adjust function body accordingly. Change
12632 "visited_allocated_locally" variable to bool.
12633 (hoist_code): Change return type from int to void and adjust
12634 function body accordingly. Change "changed" variable to bool.
12635 (one_code_hoisting_pass): Ditto.
12636 (pre_edge_insert): Change return type from int to void and adjust
12637 function body accordingly. Change "did_insert" variable to bool.
12638 (pre_expr_reaches_here_p_work): Change return type from int to void
12639 and adjust function body accordingly.
12640 (simple_mem): Ditto.
12641 (want_to_gcse_p): Change return type from int to void
12642 and adjust function body accordingly.
12643 (can_assign_to_reg_without_clobbers_p): Update function body
12644 for bool return type.
12645 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
12646 (pre_insert_copies): Change "added_copy" variable to bool.
12648 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
12652 * doc/invoke.texi (Warning Options): Fix typos.
12654 2023-07-07 Jan Hubicka <jh@suse.cz>
12656 * profile-count.cc (profile_count::dump): Add FUN
12657 parameter; print relative frequency.
12658 (profile_count::debug): Update.
12659 * profile-count.h (profile_count::dump): Update
12662 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
12666 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
12667 TImode destinations from paradoxical SUBREGs (setting the lowpart)
12668 into explicit zero extensions. Use *insvti_highpart_1 instruction
12669 to set the highpart of a TImode destination.
12671 2023-07-07 Jan Hubicka <jh@suse.cz>
12673 * predict.cc (force_edge_cold): Use
12674 set_edge_probability_and_rescale_others; improve dumps.
12676 2023-07-07 Jan Hubicka <jh@suse.cz>
12678 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
12680 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
12683 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
12685 * config/s390/s390.cc (vec_init): Fix default case
12687 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
12689 * lra-assigns.cc (assign_by_spills): Add reload insns involving
12690 reload pseudos with non-refined class to be processed on the next
12692 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
12693 (in_class_p): Use it.
12694 (print_curr_insn_alt): New func.
12695 (process_alt_operands): Use it. Improve debug info.
12696 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
12697 pseudo class if it is not refined yet.
12699 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
12701 * value-range.cc (irange::get_bitmask_from_range): Return all the
12702 known bits for a singleton.
12703 (irange::set_range_from_bitmask): Set a range of a singleton when
12704 all bits are known.
12706 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
12708 * value-range.cc (irange::intersect): Leave normalization to
12711 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
12713 * data-streamer-in.cc (streamer_read_value_range): Adjust for
12715 * data-streamer-out.cc (streamer_write_vrange): Same.
12716 * range-op.cc (operator_cast::fold_range): Same.
12717 * value-range-pretty-print.cc
12718 (vrange_printer::print_irange_bitmasks): Same.
12719 * value-range-storage.cc (irange_storage::write_lengths_address):
12721 (irange_storage::set_irange): Same.
12722 (irange_storage::get_irange): Same.
12723 (irange_storage::size): Same.
12724 (irange_storage::dump): Same.
12725 * value-range-storage.h: Same.
12726 * value-range.cc (debug): New.
12727 (irange_bitmask::dump): New.
12728 (add_vrange): Adjust for value/mask.
12729 (irange::operator=): Same.
12730 (irange::set): Same.
12731 (irange::verify_range): Same.
12732 (irange::operator==): Same.
12733 (irange::contains_p): Same.
12734 (irange::irange_single_pair_union): Same.
12735 (irange::union_): Same.
12736 (irange::intersect): Same.
12737 (irange::invert): Same.
12738 (irange::get_nonzero_bits_from_range): Rename to...
12739 (irange::get_bitmask_from_range): ...this.
12740 (irange::set_range_from_nonzero_bits): Rename to...
12741 (irange::set_range_from_bitmask): ...this.
12742 (irange::set_nonzero_bits): Rename to...
12743 (irange::update_bitmask): ...this.
12744 (irange::get_nonzero_bits): Rename to...
12745 (irange::get_bitmask): ...this.
12746 (irange::intersect_nonzero_bits): Rename to...
12747 (irange::intersect_bitmask): ...this.
12748 (irange::union_nonzero_bits): Rename to...
12749 (irange::union_bitmask): ...this.
12750 (irange_bitmask::verify_mask): New.
12751 * value-range.h (class irange_bitmask): New.
12752 (irange_bitmask::set_unknown): New.
12753 (irange_bitmask::unknown_p): New.
12754 (irange_bitmask::irange_bitmask): New.
12755 (irange_bitmask::get_precision): New.
12756 (irange_bitmask::get_nonzero_bits): New.
12757 (irange_bitmask::set_nonzero_bits): New.
12758 (irange_bitmask::operator==): New.
12759 (irange_bitmask::union_): New.
12760 (irange_bitmask::intersect): New.
12761 (class irange): Friend vrange_printer.
12762 (irange::varying_compatible_p): Adjust for bitmask.
12763 (irange::set_varying): Same.
12764 (irange::set_nonzero): Same.
12766 2023-07-07 Jan Beulich <jbeulich@suse.com>
12768 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
12770 2023-07-07 Jan Beulich <jbeulich@suse.com>
12772 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
12773 alternative. Switch new last alternative's "isa" attribute to
12775 (vec_extract_hi_v32qi): Likewise.
12777 2023-07-07 Pan Li <pan2.li@intel.com>
12778 Robin Dapp <rdapp@ventanamicro.com>
12780 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
12782 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
12783 (riscv_mode_exit): Likewise for exit mode.
12784 (riscv_mode_needed): Likewise for needed mode.
12785 (riscv_mode_after): Likewise for after mode.
12787 2023-07-07 Pan Li <pan2.li@intel.com>
12789 * config/riscv/vector.md: Fix typo.
12791 2023-07-06 Jan Hubicka <jh@suse.cz>
12793 PR middle-end/25623
12794 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
12795 of iterations determined.
12796 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
12798 2023-07-06 Jan Hubicka <jh@suse.cz>
12800 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
12801 probability update to be safe on loops with subloops.
12802 Make bound parameter to be iteration bound.
12803 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
12804 of scale_loop_profile.
12805 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
12807 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
12809 PR tree-optimization/110449
12810 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
12811 vec_loop for the unrolled loop.
12813 2023-07-06 Jan Hubicka <jh@suse.cz>
12815 * cfg.cc (set_edge_probability_and_rescale_others): New function.
12816 (update_bb_profile_for_threading): Use it; simplify the rest.
12817 * cfg.h (set_edge_probability_and_rescale_others): Declare.
12818 * profile-count.h (profile_probability::apply_scale): New.
12820 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
12822 * doc/extend.texi (ARC Built-in Functions): Update documentation
12823 with missing builtins.
12825 2023-07-06 Richard Biener <rguenther@suse.de>
12827 PR tree-optimization/110556
12828 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
12829 assign code and all operands of non-stores.
12831 2023-07-06 Richard Biener <rguenther@suse.de>
12833 PR tree-optimization/110563
12834 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
12835 Remove second argument.
12836 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
12837 Remove for_epilogue_p argument. Merge assert ...
12838 (vect_analyze_loop_2): ... with check done before determining
12839 partial vectors by moving it after.
12840 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
12842 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12844 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
12845 few things re 'reorder' option and strings.
12846 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
12848 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12850 * gengtype-parse.cc: Clean up obsolete parametrized structs
12852 * gengtype.cc: Likewise.
12853 * gengtype.h: Likewise.
12855 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12857 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
12860 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12862 * gengtype-parse.cc (token_names): Add '"user"'.
12863 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
12864 'FIRST_TOKEN_WITH_VALUE'.
12866 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12868 * doc/gty.texi (GTY Options) <string_length>: Enhance.
12870 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12872 * gengtype.cc (write_root, write_roots): Explicitly reject
12873 'string_length' option.
12874 * doc/gty.texi (GTY Options) <string_length>: Document.
12876 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12878 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
12879 (ggc_pch_write_object): Remove 'bool is_string' argument.
12880 * ggc-common.cc: Adjust.
12881 * ggc-page.cc: Likewise.
12883 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
12885 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
12887 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
12889 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
12890 and add description for inling of function with arch and tune
12893 2023-07-06 Richard Biener <rguenther@suse.de>
12895 PR tree-optimization/110515
12896 * tree-ssa-pre.cc (compute_avail): Make code dealing
12897 with hoisting loads with different alias-sets more
12900 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12902 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
12904 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
12906 * config/i386/i386.cc (ix86_can_inline_p): If callee has
12907 default arch=x86-64 and tune=generic, do not block the
12908 inlining to its caller. Also allow callee with different
12909 arch= to be inlined if it has always_inline attribute and
12910 it's ISA is subset of caller's.
12912 2023-07-06 liuhongt <hongtao.liu@intel.com>
12914 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
12915 DF/SFmode AND/IOR/XOR/ANDN operations.
12917 2023-07-06 Andrew Pinski <apinski@marvell.com>
12919 PR middle-end/110554
12920 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
12921 just build using boolean_type_node instead of the cond_type.
12922 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
12923 that will feed into the COND_EXPR.
12925 2023-07-06 liuhongt <hongtao.liu@intel.com>
12928 * config/i386/i386.md (movdf_internal): Disparage slightly for
12929 2 alternatives (r,v) and (v,r) by adding constraint modifier
12932 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
12935 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
12936 initialization of new_addr.
12938 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
12940 PR tree-optimization/110474
12941 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
12942 unroll factor while selecting the epilog vect loop VF.
12944 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12946 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
12949 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12951 * gimple-range-gori.cc (compute_operand_range): After calling
12952 compute_operand2_range, recursively call self if needed.
12953 (compute_operand2_range): Turn into a leaf function.
12954 (gori_compute::compute_operand1_and_operand2_range): Finish
12955 operand2 calculation.
12956 * gimple-range-gori.h (compute_operand2_range): Remove name param.
12958 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12960 * gimple-range-gori.cc (compute_operand_range): After calling
12961 compute_operand1_range, recursively call self if needed.
12962 (compute_operand1_range): Turn into a leaf function.
12963 (gori_compute::compute_operand1_and_operand2_range): Finish
12964 operand1 calculation.
12965 * gimple-range-gori.h (compute_operand1_range): Remove name param.
12967 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12969 * gimple-range-gori.cc (compute_operand_range): Check for
12970 operand interdependence when both op1 and op2 are computed.
12971 (compute_operand1_and_operand2_range): No checks required now.
12973 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12975 * gimple-range-gori.cc (compute_operand_range): Check for
12976 a relation between op1 and op2 and use that instead.
12977 (compute_operand1_range): Don't look for a relation override.
12978 (compute_operand2_range): Ditto.
12980 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
12982 * doc/contrib.texi (Contributors): Update my entry.
12984 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
12986 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
12989 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
12991 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
12992 scehdule_more_p and contributes_to_priority indirect frunction
12993 type from int to bool.
12994 (no_real_insns_p): Change return type from int to bool.
12995 (contributes_to_priority): Ditto.
12996 * haifa-sched.cc (no_real_insns_p): Change return type from
12997 int to bool and adjust function body accordingly.
12998 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
12999 variable type from int to bool.
13000 (ps_insn_advance_column): Change return type from int to bool.
13001 (ps_has_conflicts): Ditto. Change "has_conflicts"
13002 variable type from int to bool.
13003 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
13004 (conditions_mutex_p): Ditto.
13005 * sched-ebb.cc (schedule_more_p): Ditto.
13006 (ebb_contributes_to_priority): Change return type from
13007 int to bool and adjust function body accordingly.
13008 * sched-rgn.cc (is_cfg_nonregular): Ditto.
13009 (check_live_1): Ditto.
13011 (find_conditional_protection): Ditto.
13012 (is_conditionally_protected): Ditto.
13013 (is_prisky): Ditto.
13014 (is_exception_free): Ditto.
13015 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
13016 variables from int to bool.
13017 (extend_rgns): Change "rescan" variable from int to bool.
13018 (check_live): Change return type from
13019 int to bool and adjust function body accordingly.
13020 (can_schedule_ready_p): Ditto.
13021 (schedule_more_p): Ditto.
13022 (contributes_to_priority): Ditto.
13024 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
13026 * doc/md.texi: Document that vec_set and vec_extract must not
13028 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
13029 (gimple_expand_vec_set_extract_expr): ...to this.
13030 (gimple_expand_vec_exprs): Call renamed function.
13031 * internal-fn.cc (vec_extract_direct): Add.
13032 (expand_vec_extract_optab_fn): New function to expand
13034 (direct_vec_extract_optab_supported_p): Add.
13035 * internal-fn.def (VEC_EXTRACT): Add.
13036 * optabs.cc (can_vec_extract_var_idx_p): New function.
13037 * optabs.h (can_vec_extract_var_idx_p): Declare.
13039 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
13041 * config/riscv/autovec.md: Add gen_lowpart.
13043 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
13045 * config/riscv/autovec.md: Allow register index operand.
13047 2023-07-05 Pan Li <pan2.li@intel.com>
13049 * config/riscv/riscv-vector-builtins.cc
13050 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
13052 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
13054 * config/riscv/autovec.md: Use float_truncate.
13056 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13058 * internal-fn.cc (internal_fn_len_index): Apply
13059 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
13060 (internal_fn_mask_index): Ditto.
13061 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
13062 (supports_vec_scatter_store_p): Ditto.
13063 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
13064 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
13065 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
13066 (vect_get_strided_load_store_ops): Ditto.
13067 (vectorizable_store): Ditto.
13068 (vectorizable_load): Ditto.
13070 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
13071 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13073 * simplify-rtx.cc (native_encode_rtx): Ditto.
13074 (native_decode_vector_rtx): Ditto.
13075 (simplify_const_vector_byte_offset): Ditto.
13076 (simplify_const_vector_subreg): Ditto.
13077 * tree.cc (build_truth_vector_type_for_mode): Ditto.
13078 * varasm.cc (output_constant_pool_2): Ditto.
13080 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
13082 * config/mips/mips.cc (mips_expand_block_move): don't expand for
13083 r6 with -mno-unaligned-access option if one or both of src and
13084 dest are unaligned. restruct: return directly if length is not const.
13085 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
13087 2023-07-05 Jan Beulich <jbeulich@suse.com>
13090 * config/i386/sse.md: New splitters to simplify
13091 not;vec_duplicate as a singular vpternlog.
13092 (one_cmpl<mode>2): Allow broadcast for operand 1.
13093 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
13095 2023-07-05 Jan Beulich <jbeulich@suse.com>
13098 * config/i386/sse.md: New splitters to simplify
13099 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
13101 2023-07-05 Jan Beulich <jbeulich@suse.com>
13104 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
13105 form of splitter for PR target/100711.
13107 2023-07-05 Richard Biener <rguenther@suse.de>
13109 PR middle-end/110541
13110 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
13113 2023-07-05 Jan Beulich <jbeulich@suse.com>
13116 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
13117 for memory form operand 1.
13119 2023-07-05 Jan Beulich <jbeulich@suse.com>
13122 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
13123 bitwise vector operations.
13124 * config/i386/sse.md (*iornot<mode>3): New insn.
13125 (*xnor<mode>3): Likewise.
13126 (*<nlogic><mode>3): Likewise.
13127 (andor): New code iterator.
13128 (nlogic): New code attribute.
13129 (ternlog_nlogic): Likewise.
13131 2023-07-05 Richard Biener <rguenther@suse.de>
13133 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
13135 2023-07-05 yulong <shiyulong@iscas.ac.cn>
13137 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
13139 2023-07-05 yulong <shiyulong@iscas.ac.cn>
13141 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
13142 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
13143 (ADJUST_ALIGNMENT): Ditto.
13144 (RVV_TUPLE_PARTIAL_MODES): Ditto.
13145 (ADJUST_NUNITS): Ditto.
13146 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
13148 (vfloat16mf4x3_t): Ditto.
13149 (vfloat16mf4x4_t): Ditto.
13150 (vfloat16mf4x5_t): Ditto.
13151 (vfloat16mf4x6_t): Ditto.
13152 (vfloat16mf4x7_t): Ditto.
13153 (vfloat16mf4x8_t): Ditto.
13154 (vfloat16mf2x2_t): Ditto.
13155 (vfloat16mf2x3_t): Ditto.
13156 (vfloat16mf2x4_t): Ditto.
13157 (vfloat16mf2x5_t): Ditto.
13158 (vfloat16mf2x6_t): Ditto.
13159 (vfloat16mf2x7_t): Ditto.
13160 (vfloat16mf2x8_t): Ditto.
13161 (vfloat16m1x2_t): Ditto.
13162 (vfloat16m1x3_t): Ditto.
13163 (vfloat16m1x4_t): Ditto.
13164 (vfloat16m1x5_t): Ditto.
13165 (vfloat16m1x6_t): Ditto.
13166 (vfloat16m1x7_t): Ditto.
13167 (vfloat16m1x8_t): Ditto.
13168 (vfloat16m2x2_t): Ditto.
13169 (vfloat16m2x3_t): Ditto.
13170 (vfloat16m2x4_t): Ditto.
13171 (vfloat16m4x2_t): Ditto.
13172 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
13173 (vfloat16mf4x3_t): Ditto.
13174 (vfloat16mf4x4_t): Ditto.
13175 (vfloat16mf4x5_t): Ditto.
13176 (vfloat16mf4x6_t): Ditto.
13177 (vfloat16mf4x7_t): Ditto.
13178 (vfloat16mf4x8_t): Ditto.
13179 (vfloat16mf2x2_t): Ditto.
13180 (vfloat16mf2x3_t): Ditto.
13181 (vfloat16mf2x4_t): Ditto.
13182 (vfloat16mf2x5_t): Ditto.
13183 (vfloat16mf2x6_t): Ditto.
13184 (vfloat16mf2x7_t): Ditto.
13185 (vfloat16mf2x8_t): Ditto.
13186 (vfloat16m1x2_t): Ditto.
13187 (vfloat16m1x3_t): Ditto.
13188 (vfloat16m1x4_t): Ditto.
13189 (vfloat16m1x5_t): Ditto.
13190 (vfloat16m1x6_t): Ditto.
13191 (vfloat16m1x7_t): Ditto.
13192 (vfloat16m1x8_t): Ditto.
13193 (vfloat16m2x2_t): Ditto.
13194 (vfloat16m2x3_t): Ditto.
13195 (vfloat16m2x4_t): Ditto.
13196 (vfloat16m4x2_t): Ditto.
13197 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
13198 * config/riscv/riscv.md: New.
13199 * config/riscv/vector-iterators.md: New.
13201 2023-07-04 Andrew Pinski <apinski@marvell.com>
13203 PR tree-optimization/110487
13204 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
13205 build a nonstandard integer and use that.
13207 2023-07-04 Andrew Pinski <apinski@marvell.com>
13209 * match.pd (a?-1:0): Cast type an integer type
13210 rather the type before the negative.
13211 (a?0:-1): Likewise.
13213 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13215 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
13216 Change to use HARD_REG_BIT and its macros.
13217 * config/xtensa/xtensa.md
13218 (peephole2: regmove elimination during DFmode input reload):
13221 2023-07-04 Richard Biener <rguenther@suse.de>
13223 PR tree-optimization/110491
13224 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
13225 whether the PHI args are possibly undefined before folding
13228 2023-07-04 Pan Li <pan2.li@intel.com>
13229 Thomas Schwinge <thomas@codesourcery.com>
13231 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
13232 bits for machine mode table.
13233 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
13234 HOST machine mode bits.
13235 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
13236 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
13238 * tree-streamer.h (streamer_mode_table): Ditto.
13239 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
13240 as the packing limit.
13241 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
13243 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
13245 * lto-streamer.h (class lto_input_block): Capture
13246 'lto_file_decl_data *file_data' instead of just
13247 'unsigned char *mode_table'.
13248 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
13249 * ipa-fnsummary.cc (inline_read_section): Likewise.
13250 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
13251 * ipa-modref.cc (read_section): Likewise.
13252 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
13254 * ipa-sra.cc (isra_read_summary_section): Likewise.
13255 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
13256 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
13257 * lto-streamer-in.cc (lto_read_body_or_constructor)
13258 (lto_input_toplevel_asms): Likewise.
13259 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
13261 2023-07-04 Richard Biener <rguenther@suse.de>
13263 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
13264 (empty_bb_or_one_feeding_into_p): Check for them.
13265 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
13266 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
13268 2023-07-04 Richard Biener <rguenther@suse.de>
13270 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
13271 check guarding scalar_niter underflow.
13273 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
13275 PR tree-optimization/110531
13276 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
13277 slp_done_for_suggested_uf to false.
13279 2023-07-04 Richard Biener <rguenther@suse.de>
13281 PR tree-optimization/110228
13282 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
13283 Mark SSA may-undefs.
13284 (bb_no_side_effects_p): Check stmt uses for undefs.
13286 2023-07-04 Richard Biener <rguenther@suse.de>
13288 PR tree-optimization/110436
13289 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
13290 force live but not relevant pattern stmts relevant.
13292 2023-07-04 Lili Cui <lili.cui@intel.com>
13294 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
13295 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
13297 2023-07-04 Richard Biener <rguenther@suse.de>
13299 PR middle-end/110495
13300 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
13301 since we do not set TREE_OVERFLOW on those since the
13302 introduction of VL vectors.
13303 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
13304 at TREE_OVERFLOW to determine validity of association.
13306 2023-07-04 Richard Biener <rguenther@suse.de>
13308 PR tree-optimization/110310
13309 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
13310 Move costing part ...
13311 (vect_analyze_loop_costing): ... here. Integrate better
13312 estimate for epilogues from ...
13313 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
13314 with actual epilogue status.
13315 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
13316 avoid cancelling epilogue vectorization.
13317 (vect_update_epilogue_niters): Remove. No longer update
13318 epilogue LOOP_VINFO_NITERS.
13320 2023-07-04 Pan Li <pan2.li@intel.com>
13323 2023-07-03 Pan Li <pan2.li@intel.com>
13325 * config/riscv/vector.md: Fix typo.
13327 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13329 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
13330 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
13331 (expand_gather_load_optab_fn): Ditto.
13332 (internal_load_fn_p): Ditto.
13333 (internal_store_fn_p): Ditto.
13334 (internal_gather_scatter_fn_p): Ditto.
13335 (internal_fn_len_index): Ditto.
13336 (internal_fn_mask_index): Ditto.
13337 (internal_fn_stored_value_index): Ditto.
13338 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
13339 (LEN_MASK_SCATTER_STORE): Ditto.
13340 * optabs.def (OPTAB_CD): Ditto.
13342 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13344 * config/riscv/riscv-vsetvl.cc
13345 (vector_insn_info::parse_insn): Add early break.
13347 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
13349 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
13350 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
13352 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
13354 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
13356 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
13358 * common/config/riscv/riscv-common.cc: Add support for zvbb,
13359 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
13360 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
13361 * config/riscv/arch-canonicalize: Add canonicalization info for
13362 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
13363 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
13364 (MASK_ZVBC): Likewise.
13365 (TARGET_ZVBB): Likewise.
13366 (TARGET_ZVBC): Likewise.
13367 (MASK_ZVKG): Likewise.
13368 (MASK_ZVKNED): Likewise.
13369 (MASK_ZVKNHA): Likewise.
13370 (MASK_ZVKNHB): Likewise.
13371 (MASK_ZVKSED): Likewise.
13372 (MASK_ZVKSH): Likewise.
13373 (MASK_ZVKN): Likewise.
13374 (MASK_ZVKNC): Likewise.
13375 (MASK_ZVKNG): Likewise.
13376 (MASK_ZVKS): Likewise.
13377 (MASK_ZVKSC): Likewise.
13378 (MASK_ZVKSG): Likewise.
13379 (MASK_ZVKT): Likewise.
13380 (TARGET_ZVKG): Likewise.
13381 (TARGET_ZVKNED): Likewise.
13382 (TARGET_ZVKNHA): Likewise.
13383 (TARGET_ZVKNHB): Likewise.
13384 (TARGET_ZVKSED): Likewise.
13385 (TARGET_ZVKSH): Likewise.
13386 (TARGET_ZVKN): Likewise.
13387 (TARGET_ZVKNC): Likewise.
13388 (TARGET_ZVKNG): Likewise.
13389 (TARGET_ZVKS): Likewise.
13390 (TARGET_ZVKSC): Likewise.
13391 (TARGET_ZVKSG): Likewise.
13392 (TARGET_ZVKT): Likewise.
13393 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
13395 2023-07-03 Andrew Pinski <apinski@marvell.com>
13397 PR middle-end/110510
13398 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
13400 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
13402 * config/darwin.h: Avoid duplicate multiply_defined specs on
13403 earlier Darwin versions with shared libgcc.
13405 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
13407 * tree.h (tree_int_cst_equal): Change return type from int to bool.
13408 (operand_equal_for_phi_arg_p): Ditto.
13409 (tree_map_base_marked_p): Ditto.
13410 * tree.cc (contains_placeholder_p): Update function body
13411 for bool return type.
13412 (type_cache_hasher::equal): Ditto.
13413 (tree_map_base_hash): Change return type
13414 from int to void and adjust function body accordingly.
13415 (tree_int_cst_equal): Ditto.
13416 (operand_equal_for_phi_arg_p): Ditto.
13417 (get_narrower): Change "first" variable to bool.
13418 (cl_option_hasher::equal): Update function body for bool return type.
13419 * ggc.h (ggc_set_mark): Change return type from int to bool.
13420 (ggc_marked_p): Ditto.
13421 * ggc-page.cc (gt_ggc_mx): Change return type
13422 from int to void and adjust function body accordingly.
13423 (ggc_set_mark): Ditto.
13425 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13427 * config/riscv/autovec.md: Change order of
13428 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
13429 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
13430 * doc/md.texi: Ditto.
13431 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
13432 * internal-fn.cc (len_maskload_direct): Ditto.
13433 (len_maskstore_direct): Ditto.
13434 (add_len_and_mask_args): New function.
13435 (expand_partial_load_optab_fn): Change order of
13436 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
13437 (expand_partial_store_optab_fn): Ditto.
13438 (internal_fn_len_index): New function.
13439 (internal_fn_mask_index): Change order of
13440 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
13441 (internal_fn_stored_value_index): Ditto.
13442 (internal_len_load_store_bias): Ditto.
13443 * internal-fn.h (internal_fn_len_index): New function.
13444 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
13445 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
13446 * tree-vect-stmts.cc (vectorizable_store): Ditto.
13447 (vectorizable_load): Ditto.
13449 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
13452 * doc/gm2.texi (Semantic checking): Include examples using
13453 -Wuninit-variable-checking.
13455 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13457 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
13458 (*single_widen_fnma<mode>): Ditto.
13459 (*double_widen_fms<mode>): Ditto.
13460 (*single_widen_fms<mode>): Ditto.
13461 (*double_widen_fnms<mode>): Ditto.
13462 (*single_widen_fnms<mode>): Ditto.
13464 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13466 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
13467 into "*" in pattern name which simplifies build files.
13468 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
13469 (*pred_single_widen_mul<mode>): New pattern.
13471 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
13473 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
13474 the index to be 0 or 1.
13476 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
13479 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13481 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
13482 (*single_widen_fnma<mode>): Ditto.
13483 (*double_widen_fms<mode>): Ditto.
13484 (*single_widen_fms<mode>): Ditto.
13485 (*double_widen_fnms<mode>): Ditto.
13486 (*single_widen_fnms<mode>): Ditto.
13488 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13490 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
13491 (*single_widen_fnma<mode>): Ditto.
13492 (*double_widen_fms<mode>): Ditto.
13493 (*single_widen_fms<mode>): Ditto.
13494 (*double_widen_fnms<mode>): Ditto.
13495 (*single_widen_fnms<mode>): Ditto.
13497 2023-07-03 Pan Li <pan2.li@intel.com>
13499 * config/riscv/vector.md: Fix typo.
13501 2023-07-03 Richard Biener <rguenther@suse.de>
13503 PR tree-optimization/110506
13504 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
13505 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
13507 2023-07-03 Richard Biener <rguenther@suse.de>
13509 PR tree-optimization/110506
13510 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
13511 type before relying on TYPE_PRECISION to produce a nonzero mask.
13513 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13515 * config/mips/mips.md(*and<mode>3_mips16): Generates
13516 ZEB/ZEH instructions.
13518 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13520 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
13521 address register to M16_REGS for MIPS16.
13522 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
13523 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
13524 (AVAIL_NON_MIPS16 (cache..)): Update to
13525 AVAIL_MIPS16E2_OR_NON_MIPS16.
13526 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
13527 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
13529 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13531 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
13532 for ISA_HAS_MIPS16E2.
13533 (ISA_HAS_SYNC): Same as above.
13534 (ISA_HAS_LL_SC): Same as above.
13536 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13538 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
13539 Add logics for generating instruction.
13540 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
13541 * config/mips/mips.md(mov_<load>l): Generates instructions.
13542 (mov_<load>r): Same as above.
13543 (mov_<store>l): Adjusted for the conditions above.
13544 (mov_<store>r): Same as above.
13545 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
13546 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
13548 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13550 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
13551 (mips_const_insns): Same as above.
13552 (mips_output_move): Same as above.
13553 (mips_output_function_prologue): Same as above.
13554 * config/mips/mips.md: Same as above
13556 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13558 * config/mips/constraints.md(Yz): New constraints for mips16e2.
13559 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
13560 (mips_bit_clear_info): Same as above.
13561 * config/mips/mips.cc(mips_bit_clear_info): New function for
13562 generating instructions.
13563 (mips_bit_clear_p): Same as above.
13564 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
13565 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
13566 (*and<mode>3): Generates INS instruction.
13567 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
13568 (ior<mode>3): Add logics for ORI instruction.
13569 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
13570 (*ior<mode>3_mips16): Add logics for XORI instruction.
13571 (*xor<mode>3_mips16): Generates XORI instrucion.
13572 (*extzv<mode>): Add logics for EXT instruction.
13573 (*insv<mode>): Add logics for INS instruction.
13574 * config/mips/predicates.md(bit_clear_operand): New predicate for
13575 generating bitwise instructions.
13576 (and_reg_operand): Add logics for generating bitwise instructions.
13578 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13580 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
13581 that uses global pointer register.
13582 (mips16_unextended_reference_p): Same as above.
13583 (mips_pic_base_register): Same as above.
13584 (mips_init_relocs): Same as above.
13585 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
13586 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
13587 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
13588 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
13590 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13592 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
13593 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
13594 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
13595 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
13596 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
13597 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
13599 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
13601 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
13603 * config/mips/mips.h(__mips_mips16e2): Defined a new
13605 (ISA_HAS_MIPS16E2): Defined a new macro.
13606 (ASM_SPEC): Pass mmips16e2 to the assembler.
13607 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
13608 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
13609 * doc/invoke.texi: Add -m(no-)mips16e2 option..
13611 2023-07-02 Jakub Jelinek <jakub@redhat.com>
13613 PR tree-optimization/110508
13614 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
13615 REALPART_EXPR opf nlhs if re2 is non-NULL.
13617 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13619 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
13621 * config/xtensa/xtensa.md (*xtensa_clamps):
13622 Add TARGET_MINMAX to the condition.
13624 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13626 * config/xtensa/xtensa.md (*eqne_INT_MIN):
13627 Add missing ":SI" to the match_operator.
13629 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
13632 * config/darwin.opt: Add fconstant-cfstrings alias to
13633 mconstant-cfstrings.
13634 * doc/invoke.texi: Amend invocation descriptions to reflect
13635 that the fconstant-cfstrings is a target-option alias and to
13636 add the missing mconstant-cfstrings option description to the
13639 2023-07-01 Jan Hubicka <jh@suse.cz>
13641 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
13642 parmaeter; update profile.
13643 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
13644 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
13645 (static_loop_exit): ... this; return the edge to be elliminated.
13646 (ch_base::copy_headers): Handle profile updating for eliminated exits.
13648 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
13650 * config/i386/i386-features.cc (compute_convert_gain): Provide
13651 gains/costs for ROTATE and ROTATERT (by an integer constant).
13652 (general_scalar_chain::convert_rotate): New helper function to
13653 convert a DImode or SImode rotation by an integer constant into
13655 (general_scalar_chain::convert_insn): Call the new convert_rotate
13656 for ROTATE and ROTATERT.
13657 (general_scalar_to_vector_candidate_p): Consider ROTATE and
13658 ROTATERT to be candidates if the second operand is an integer
13659 constant, valid for a rotation (or shift) in the given mode.
13660 * config/i386/i386-features.h (general_scalar_chain): Add new
13661 helper method convert_rotate.
13663 2023-07-01 Jan Hubicka <jh@suse.cz>
13665 PR tree-optimization/103680
13666 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
13667 make message clearer.
13669 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
13671 PR tree-optimization/101832
13672 * tree-object-size.cc (addr_object_size): Handle structure/union type
13673 when it has flexible size.
13675 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
13677 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
13678 (fold_nonarray_ctor_reference): Likewise. Specifically deal
13679 with integral bit-fields.
13680 (fold_ctor_reference): Make sure that the constructor uses the
13681 native storage order.
13683 2023-06-30 Jan Hubicka <jh@suse.cz>
13685 PR middle-end/109849
13686 * predict.cc (estimate_bb_frequencies): Turn to static function.
13687 (expr_expected_value_1): Fix handling of binary expressions with
13689 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
13690 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
13692 * predict.h (estimate_bb_frequencies): No longer declare it.
13694 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
13696 * fold-const.h (multiple_of_p): Change return type from int to bool.
13697 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
13698 neg_conp_p and neg_var_p variables to bool.
13699 (const_binop): Change sat_p variable to bool.
13700 (merge_ranges): Change no_overlap variable to bool.
13701 (extract_muldiv_1): Change same_p variable to bool.
13702 (tree_swap_operands_p): Update function body for bool return type.
13703 (fold_truth_andor): Change commutative variable to bool.
13704 (multiple_of_p): Change return type
13705 from int to void and adjust function body accordingly.
13706 * optabs.h (expand_twoval_unop): Change return type from int to bool.
13707 (expand_twoval_binop): Ditto.
13708 (can_compare_p): Ditto.
13709 (have_add2_insn): Ditto.
13710 (have_addptr3_insn): Ditto.
13711 (have_sub2_insn): Ditto.
13712 (have_insn_for): Ditto.
13713 * optabs.cc (add_equal_note): Ditto.
13714 (widen_operand): Change no_extend argument from int to bool.
13715 (expand_binop): Ditto.
13716 (expand_twoval_unop): Change return type
13717 from int to void and adjust function body accordingly.
13718 (expand_twoval_binop): Ditto.
13719 (can_compare_p): Ditto.
13720 (have_add2_insn): Ditto.
13721 (have_addptr3_insn): Ditto.
13722 (have_sub2_insn): Ditto.
13723 (have_insn_for): Ditto.
13725 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
13727 * config/aarch64/aarch64-simd.md
13728 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
13729 Expansions for abd vec widen optabs.
13730 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
13731 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
13732 that give the appropriate extend RTL for the max RTL.
13734 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
13736 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
13737 * optabs.def (vec_widen_sabd_optab,
13738 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
13739 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
13740 vec_widen_uabd_optab,
13741 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
13742 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
13744 * doc/md.texi: Document them.
13745 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
13746 to build a VEC_WIDEN_ABD call if the input precision is smaller
13747 than the precision of the output.
13748 (vect_recog_widen_abd_pattern): Should an ABD expression be
13749 found preceeding an extension, replace the two with a
13752 2023-06-30 Pan Li <pan2.li@intel.com>
13754 * config/riscv/vector.md: Refactor the common condition.
13756 2023-06-30 Richard Biener <rguenther@suse.de>
13758 PR tree-optimization/110496
13759 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
13760 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
13762 2023-06-30 Richard Biener <rguenther@suse.de>
13764 PR middle-end/110489
13765 * statistics.cc (curr_statistics_hash): Add argument
13766 indicating whether we should allocate the hash.
13767 (statistics_fini_pass): If the hash isn't allocated
13768 only print the summary header.
13770 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
13771 Thomas Schwinge <thomas@codesourcery.com>
13773 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
13775 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
13778 * config/mips/mips.cc (mips_function_arg_alignment): Returns
13779 the alignment of function argument. In case of typedef type,
13780 it returns the aligment of the aliased type.
13781 (mips_function_arg_boundary): Relocated calculation of the
13782 aligment of function arguments.
13784 2023-06-29 Jan Hubicka <jh@suse.cz>
13786 PR tree-optimization/109849
13787 * ipa-fnsummary.cc (decompose_param_expr): Skip
13788 functions returning its parameter.
13789 (set_cond_stmt_execution_predicate): Return early
13790 if predicate was constructed.
13792 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
13795 * doc/extend.texi: Document GCC extension on a structure containing
13796 a flexible array member to be a member of another structure.
13798 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
13800 * print-tree.cc (print_node): Print new bit type_include_flexarray.
13801 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
13802 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
13803 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
13804 in bit no_named_args_stdarg_p properly for its corresponding type.
13805 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
13806 out bit no_named_args_stdarg_p properly for its corresponding type.
13807 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
13809 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
13811 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
13812 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
13813 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
13815 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
13817 * value-range.cc (frange::set): Do not call verify_range.
13818 (frange::normalize_kind): Verify range.
13819 (frange::union_nans): Do not call verify_range.
13820 (frange::union_): Same.
13821 (frange::intersect): Same.
13822 (irange::irange_single_pair_union): Call normalize_kind if
13824 (irange::union_): Same.
13825 (irange::intersect): Same.
13826 (irange::set_range_from_nonzero_bits): Verify range.
13827 (irange::set_nonzero_bits): Call normalize_kind if necessary.
13828 (irange::get_nonzero_bits): Tweak comment.
13829 (irange::intersect_nonzero_bits): Call normalize_kind if
13831 (irange::union_nonzero_bits): Same.
13832 * value-range.h (irange::normalize_kind): Verify range.
13834 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
13836 * cselib.h (rtx_equal_for_cselib_1):
13837 Change return type from int to bool.
13838 (references_value_p): Ditto.
13839 (rtx_equal_for_cselib_p): Ditto.
13840 * expr.h (can_store_by_pieces): Ditto.
13841 (try_casesi): Ditto.
13842 (try_tablejump): Ditto.
13843 (safe_from_p): Ditto.
13844 * sbitmap.h (bitmap_equal_p): Ditto.
13845 * cselib.cc (references_value_p): Change return type
13846 from int to void and adjust function body accordingly.
13847 (rtx_equal_for_cselib_1): Ditto.
13848 * expr.cc (is_aligning_offset): Ditto.
13849 (can_store_by_pieces): Ditto.
13850 (mostly_zeros_p): Ditto.
13851 (all_zeros_p): Ditto.
13852 (safe_from_p): Ditto.
13853 (is_aligning_offset): Ditto.
13854 (try_casesi): Ditto.
13855 (try_tablejump): Ditto.
13856 (store_constructor): Change "need_to_clear" and
13857 "const_bounds_p" variables to bool.
13858 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
13860 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
13862 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
13865 2023-06-29 Richard Biener <rguenther@suse.de>
13867 PR tree-optimization/110460
13868 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
13869 Only allow integral, pointer and scalar float type scalar_type.
13871 2023-06-29 Lili Cui <lili.cui@intel.com>
13873 PR tree-optimization/110148
13874 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
13875 ops in this function.
13877 2023-06-29 Richard Biener <rguenther@suse.de>
13879 PR middle-end/110452
13880 * expr.cc (store_constructor): Handle uniform boolean
13881 vectors with integer mode specially.
13883 2023-06-29 Richard Biener <rguenther@suse.de>
13885 PR middle-end/110461
13886 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
13889 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
13891 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
13892 (array_slice): Relax va_gc constructor to handle all vectors
13893 with a vl_embed layout.
13895 2023-06-29 Pan Li <pan2.li@intel.com>
13897 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
13898 (riscv_mode_needed): Likewise.
13899 (riscv_entity_mode_after): Likewise.
13900 (riscv_mode_after): Likewise.
13901 (riscv_mode_entry): Likewise.
13902 (riscv_mode_exit): Likewise.
13903 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
13905 * config/riscv/riscv.md: Add FRM register.
13906 * config/riscv/vector-iterators.md: Add FRM type.
13907 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
13908 (fsrm): Define new insn for fsrm instruction.
13910 2023-06-29 Pan Li <pan2.li@intel.com>
13912 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
13913 Add macro for static frm min and max.
13914 * config/riscv/riscv-vector-builtins-bases.cc
13915 (class binop_frm): New class for floating-point with frm.
13916 (BASE): Add vfadd for frm.
13917 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
13918 * config/riscv/riscv-vector-builtins-functions.def
13919 (vfadd_frm): Likewise.
13920 * config/riscv/riscv-vector-builtins-shapes.cc
13921 (struct alu_frm_def): New struct for alu with frm.
13922 (SHAPE): Add alu with frm.
13923 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
13924 * config/riscv/riscv-vector-builtins.cc
13925 (function_checker::report_out_of_range_and_not): New function
13926 for report out of range and not val.
13927 (function_checker::require_immediate_range_or): New function
13928 for checking in range or one val.
13929 * config/riscv/riscv-vector-builtins.h: Add function decl.
13931 2023-06-29 Cui, Lili <lili.cui@intel.com>
13933 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
13934 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
13936 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
13939 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
13940 to insn before validating it.
13942 2023-06-28 Jan Hubicka <jh@suse.cz>
13944 PR middle-end/110334
13945 * ipa-fnsummary.h (ipa_fn_summary): Add
13946 safe_to_inline_to_always_inline.
13947 * ipa-inline.cc (can_early_inline_edge_p): ICE
13948 if SSA is not built; do cycle checking for
13949 always_inline functions.
13950 (inline_always_inline_functions): Be recrusive;
13951 watch for cycles; do not updat overall summary.
13952 (early_inliner): Do not give up on always_inlines.
13953 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
13956 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
13958 * output.h (leaf_function_p): Change return type from int to bool.
13959 (final_forward_branch_p): Ditto.
13960 (only_leaf_regs_used): Ditto.
13961 (maybe_assemble_visibility): Ditto.
13962 * varasm.h (supports_one_only): Ditto.
13963 * rtl.h (compute_alignments): Change return type from int to void.
13964 * final.cc (app_on): Change return type from int to bool.
13965 (compute_alignments): Change return type from int to void
13966 and adjust function body accordingly.
13967 (shorten_branches): Change "something_changed" variable
13968 type from int to bool.
13969 (leaf_function_p): Change return type from int to bool
13970 and adjust function body accordingly.
13971 (final_forward_branch_p): Ditto.
13972 (only_leaf_regs_used): Ditto.
13973 * varasm.cc (contains_pointers_p): Change return type from
13974 int to bool and adjust function body accordingly.
13975 (compare_constant): Ditto.
13976 (maybe_assemble_visibility): Ditto.
13977 (supports_one_only): Ditto.
13979 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
13982 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
13983 (maybe_copy_reg_attrs): New function.
13984 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
13985 (copyprop_hardreg_forward_1): Ditto.
13987 2023-06-28 Richard Biener <rguenther@suse.de>
13989 PR tree-optimization/110434
13990 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
13991 VAR we replace with <retval>.
13993 2023-06-28 Richard Biener <rguenther@suse.de>
13995 PR tree-optimization/110451
13996 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
13997 tcc_comparison are expensive.
13999 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
14001 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
14002 for TImode comparisons on 32-bit architectures.
14003 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
14004 SWIM1248x to exclude/avoid TImode being conditional on -m64.
14005 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
14006 and/or with TARGET_SSE4_1.
14007 * config/i386/predicates.md (ix86_timode_comparison_operator):
14008 New predicate that depends upon TARGET_64BIT.
14009 (ix86_timode_comparison_operand): Likewise.
14011 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
14014 * config/i386/i386-features.cc (compute_convert_gain): Provide
14015 more accurate gains for conversion of scalar comparisons to
14018 2023-06-28 Richard Biener <rguenther@suse.de>
14020 PR tree-optimization/110443
14021 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
14024 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
14026 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
14027 (peephole2 for move_and_compare): New.
14028 (mode_iterator WORD): New. Set the mode to SI/DImode by
14030 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
14031 (split pattern for compare_and_move): Likewise.
14033 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14035 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
14036 (*single_widen_fma<mode>): Ditto.
14038 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
14041 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
14043 (altivec_vupkhs<VU_char>_direct): ...this.
14044 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
14045 predicate to test if a constant can be loaded with vspltisw and
14047 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
14048 a vector constant can be synthesized with a vspltisw and a vupkhsw.
14049 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
14051 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
14052 function to return true if OP mode is V2DI and can be synthesized
14053 with vupkhsw and vspltisw.
14054 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
14055 constants with vspltisw and vupkhsw.
14057 2023-06-28 Jan Hubicka <jh@suse.cz>
14059 PR tree-optimization/110377
14060 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
14062 (ipa_analyze_node): Enable ranger.
14064 2023-06-28 Richard Biener <rguenther@suse.de>
14066 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
14067 (TYPE_PRECISION_RAW): Provide raw access to the precision
14069 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
14070 (gimple_canonical_types_compatible_p): Likewise.
14071 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
14072 Stream TYPE_PRECISION_RAW.
14073 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
14075 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
14077 2023-06-28 Alexandre Oliva <oliva@adacore.com>
14079 * doc/extend.texi (zero-call-used-regs): Document leafy and
14081 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
14082 LEAFY and variants.
14083 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
14084 functions in leafy mode.
14085 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
14087 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14089 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
14090 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
14092 (@pred_single_widen_add<mode>): New pattern.
14093 (@pred_single_widen_sub<mode>): New pattern.
14095 2023-06-28 liuhongt <hongtao.liu@intel.com>
14097 * config/i386/i386.cc (ix86_invalid_conversion): New function.
14098 (TARGET_INVALID_CONVERSION): Define as
14099 ix86_invalid_conversion.
14101 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
14103 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
14105 (<float_cvt><vnconvert><mode>2): Ditto.
14106 (<optab><mode><vnconvert>2): Ditto.
14107 (<float_cvt><mode><vnconvert>2): Ditto.
14108 * config/riscv/vector-iterators.md: Add vnconvert.
14110 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
14112 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
14114 (extend<v_quad_trunc><mode>2): Ditto.
14115 (trunc<mode><v_double_trunc>2): Ditto.
14116 (trunc<mode><v_quad_trunc>2): Ditto.
14117 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
14118 V_QUAD_TRUNC and v_quad_trunc.
14120 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
14122 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
14125 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
14127 * config/riscv/autovec.md (copysign<mode>3): Add expander.
14128 (xorsign<mode>3): Ditto.
14129 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
14131 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
14135 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
14136 (@pred_ncopysign<mode>_scalar): Ditto.
14138 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
14140 * config/riscv/autovec.md: VF_AUTO -> VF.
14141 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
14142 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
14144 * config/riscv/vector.md: Use new iterators.
14146 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
14148 * match.pd: Use element_mode and check if target supports
14149 operation with new type.
14151 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
14153 * config/aarch64/aarch64-sve-builtins-base.cc
14154 (svdupq_impl::fold_nonconst_dupq): New method.
14155 (svdupq_impl::fold): Call fold_nonconst_dupq.
14157 2023-06-27 Andrew Pinski <apinski@marvell.com>
14159 PR middle-end/110420
14160 PR middle-end/103979
14161 PR middle-end/98619
14162 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
14164 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
14166 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
14167 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
14169 (set_switch_stmt_execution_predicate): Same.
14170 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
14172 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
14174 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
14175 ipa_vr instead of value_range.
14178 (ipa_get_value_range): Same.
14179 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
14183 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
14185 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
14186 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
14187 (ipa_set_jfunc_vr): Take a range.
14188 (ipa_compute_jump_functions_for_edge): Pass range to
14190 (ipa_write_jump_function): Call streamer write helper.
14191 (ipa_read_jump_function): Call streamer read helper.
14192 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
14194 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
14196 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
14197 as a probable initializer rather than a probable complete statement.
14199 2023-06-27 Richard Biener <rguenther@suse.de>
14201 PR tree-optimization/96208
14202 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
14203 a non-grouped load if it is the same for all lanes.
14204 (vect_build_slp_tree_2): Handle not grouped loads.
14205 (vect_optimize_slp_pass::remove_redundant_permutations):
14207 (vect_transform_slp_perm_load_1): Likewise.
14208 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
14209 (get_group_load_store_type): Likewise. Handle
14210 invariant accesses.
14211 (vectorizable_load): Likewise.
14213 2023-06-27 liuhongt <hongtao.liu@intel.com>
14215 PR rtl-optimization/110237
14216 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
14218 (maskstore<mode><avx512fmaskmodelower): Ditto.
14219 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
14220 from original <avx512>_store<mode>_mask.
14222 2023-06-27 liuhongt <hongtao.liu@intel.com>
14224 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
14225 Move flag_expensive_optimizations && !optimize_size to ..
14226 * config/i386/i386-options.cc (ix86_option_override_internal):
14227 .. this, it makes -mvzeroupper independent of optimization
14228 level, but still keeps the behavior of architecture
14229 tuning(emit_vzeroupper) unchanged.
14231 2023-06-27 liuhongt <hongtao.liu@intel.com>
14234 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
14235 vzeroupper for vzeroupper call_insn.
14237 2023-06-27 Andrew Pinski <apinski@marvell.com>
14239 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
14242 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14244 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
14247 2023-06-26 Andrew Pinski <apinski@marvell.com>
14249 * doc/extend.texi (access attribute): Add
14251 (interrupt/interrupt_handler attribute):
14254 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14256 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
14257 Use <DWI> instead of <V2XWIDE>.
14258 (aarch64_sqrshrun_n<mode>): Likewise.
14260 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14262 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
14264 (aarch64_rnd_imm_p): ... This.
14265 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
14267 (aarch64_int_rnd_operand): ... This.
14268 (aarch64_simd_rshrn_imm_vec): Delete.
14269 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
14270 Adjust for the above.
14271 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
14272 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
14273 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
14274 (aarch64_sqrshrun_n<mode>_insn): Likewise.
14275 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
14276 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
14277 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
14278 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
14279 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
14281 (aarch64_rnd_imm_p): ... This.
14283 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
14285 * config/s390/s390.cc (s390_encode_section_info): Set
14286 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
14289 2023-06-26 Jan Hubicka <jh@suse.cz>
14291 PR tree-optimization/109849
14292 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
14293 count of newly constructed forwarder block.
14295 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
14297 * doc/optinfo.texi: Fix "steam" -> "stream".
14299 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14301 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
14303 (dse_optimize_stmt): Add LEN_MASK_STORE.
14305 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14307 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
14308 fold of LOAD/STORE with length.
14310 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
14312 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
14313 Check for interdependence between operands 1 and 2.
14315 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
14317 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
14318 into account when costing non-widening/truncating conversions.
14320 2023-06-26 Richard Biener <rguenther@suse.de>
14322 PR tree-optimization/110381
14323 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
14324 Materialize permutes before fold-left reductions.
14326 2023-06-26 Pan Li <pan2.li@intel.com>
14328 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
14330 2023-06-26 Richard Biener <rguenther@suse.de>
14332 * varasm.cc (initializer_constant_valid_p_1): Also
14333 constrain the type of value to be scalar integral
14334 before dispatching to narrowing_initializer_constant_valid_p.
14336 2023-06-26 Richard Biener <rguenther@suse.de>
14338 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
14339 Use element_precision.
14341 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14343 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
14345 (vcondu<V:mode><VI:mode>): Ditto.
14346 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
14347 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
14349 2023-06-26 Richard Biener <rguenther@suse.de>
14351 PR tree-optimization/110392
14352 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
14353 Do early exits on true/false predicate only after normalization.
14355 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14357 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
14360 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
14362 * config/i386/i386.md (peephole2): Simplify zeroing a register
14363 followed by an IOR, XOR or PLUS operation on it, into a move.
14364 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
14365 eliminate (and hide from reload) unnecessary word to doubleword
14366 extensions that are followed by left shifts by sufficiently large,
14367 but valid, bit counts.
14369 2023-06-26 liuhongt <hongtao.liu@intel.com>
14371 PR tree-optimization/110371
14372 PR tree-optimization/110018
14373 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
14374 save intermediate type operand instead of "subtle" vec_dest
14377 2023-06-26 liuhongt <hongtao.liu@intel.com>
14379 PR tree-optimization/110371
14380 PR tree-optimization/110018
14381 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
14382 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
14384 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
14386 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
14387 Override tune_string with arch_string if tune_string is not
14388 explicitly specified.
14390 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14392 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
14394 * config/riscv/riscv-vsetvl.h: New function.
14396 2023-06-25 Li Xu <xuli1@eswincomputing.com>
14398 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
14401 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14403 * config/riscv/autovec.md (len_load_<mode>): Remove.
14404 (len_maskload<mode><vm>): Remove.
14405 (len_store_<mode>): New pattern.
14406 (len_maskstore<mode><vm>): New pattern.
14407 * config/riscv/predicates.md (autovec_length_operand): New predicate.
14408 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14409 (expand_load_store): New function.
14410 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
14411 (emit_nonvlmax_masked_insn): Ditto.
14412 (expand_load_store): Ditto.
14413 * config/riscv/riscv-vector-builtins.cc
14414 (function_expander::use_contiguous_store_insn): Add avl_type operand
14416 * config/riscv/vector.md: Ditto.
14418 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14420 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
14423 2023-06-25 Pan Li <pan2.li@intel.com>
14425 * config/riscv/vector.md: Revert.
14427 2023-06-25 Pan Li <pan2.li@intel.com>
14429 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
14430 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
14431 (ADJUST_ALIGNMENT): Ditto.
14432 (RVV_TUPLE_PARTIAL_MODES): Ditto.
14433 (ADJUST_NUNITS): Ditto.
14434 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
14435 (vfloat16mf4x3_t): Ditto.
14436 (vfloat16mf4x4_t): Ditto.
14437 (vfloat16mf4x5_t): Ditto.
14438 (vfloat16mf4x6_t): Ditto.
14439 (vfloat16mf4x7_t): Ditto.
14440 (vfloat16mf4x8_t): Ditto.
14441 (vfloat16mf2x2_t): Ditto.
14442 (vfloat16mf2x3_t): Ditto.
14443 (vfloat16mf2x4_t): Ditto.
14444 (vfloat16mf2x5_t): Ditto.
14445 (vfloat16mf2x6_t): Ditto.
14446 (vfloat16mf2x7_t): Ditto.
14447 (vfloat16mf2x8_t): Ditto.
14448 (vfloat16m1x2_t): Ditto.
14449 (vfloat16m1x3_t): Ditto.
14450 (vfloat16m1x4_t): Ditto.
14451 (vfloat16m1x5_t): Ditto.
14452 (vfloat16m1x6_t): Ditto.
14453 (vfloat16m1x7_t): Ditto.
14454 (vfloat16m1x8_t): Ditto.
14455 (vfloat16m2x2_t): Ditto.
14456 (vfloat16m2x3_t): Diito.
14457 (vfloat16m2x4_t): Diito.
14458 (vfloat16m4x2_t): Diito.
14459 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
14460 (vfloat16mf4x3_t): Ditto.
14461 (vfloat16mf4x4_t): Ditto.
14462 (vfloat16mf4x5_t): Ditto.
14463 (vfloat16mf4x6_t): Ditto.
14464 (vfloat16mf4x7_t): Ditto.
14465 (vfloat16mf4x8_t): Ditto.
14466 (vfloat16mf2x2_t): Ditto.
14467 (vfloat16mf2x3_t): Ditto.
14468 (vfloat16mf2x4_t): Ditto.
14469 (vfloat16mf2x5_t): Ditto.
14470 (vfloat16mf2x6_t): Ditto.
14471 (vfloat16mf2x7_t): Ditto.
14472 (vfloat16mf2x8_t): Ditto.
14473 (vfloat16m1x2_t): Ditto.
14474 (vfloat16m1x3_t): Ditto.
14475 (vfloat16m1x4_t): Ditto.
14476 (vfloat16m1x5_t): Ditto.
14477 (vfloat16m1x6_t): Ditto.
14478 (vfloat16m1x7_t): Ditto.
14479 (vfloat16m1x8_t): Ditto.
14480 (vfloat16m2x2_t): Ditto.
14481 (vfloat16m2x3_t): Ditto.
14482 (vfloat16m2x4_t): Ditto.
14483 (vfloat16m4x2_t): Ditto.
14484 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
14485 * config/riscv/riscv.md: Ditto.
14486 * config/riscv/vector-iterators.md: Ditto.
14488 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14490 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
14491 (gimple_fold_partial_load_store_mem_ref): Ditto.
14492 (gimple_fold_partial_store): Ditto.
14493 (gimple_fold_call): Ditto.
14495 2023-06-25 liuhongt <hongtao.liu@intel.com>
14498 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
14499 Refine pattern with UNSPEC_MASKLOAD.
14500 (maskload<mode><avx512fmaskmodelower>): Ditto.
14501 (*<avx512>_load<mode>_mask): Extend mode iterator to
14503 (*<avx512>_load<mode>): Ditto.
14505 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14507 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
14509 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14511 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
14512 LEN_MASK_{LOAD,STORE}
14514 2023-06-25 yulong <shiyulong@iscas.ac.cn>
14516 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
14518 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
14520 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
14522 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14524 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
14525 (*fma<VI:mode><P:mode>): Ditto.
14526 (*fnma<mode>): Ditto.
14527 (*fnma<VI:mode><P:mode>): Ditto.
14529 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14531 * config/riscv/autovec.md (fma<mode>4): New pattern.
14532 (*fma<mode>): Ditto.
14533 (fnma<mode>4): Ditto.
14534 (*fnma<mode>): Ditto.
14535 (fms<mode>4): Ditto.
14536 (*fms<mode>): Ditto.
14537 (fnms<mode>4): Ditto.
14538 (*fnms<mode>): Ditto.
14539 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
14541 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
14542 * config/riscv/vector.md: Fix attribute bug.
14544 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14546 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
14547 Apply LEN_MASK_{LOAD,STORE}.
14549 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14551 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
14552 Add LEN_MASK_{LOAD,STORE}.
14554 2023-06-24 David Malcolm <dmalcolm@redhat.com>
14556 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
14557 * diagnostic.cc: Likewise.
14558 * text-art/box-drawing.cc: Likewise.
14559 * text-art/canvas.cc: Likewise.
14560 * text-art/ruler.cc: Likewise.
14561 * text-art/selftests.cc: Likewise.
14562 * text-art/selftests.h (text_art::canvas): New forward decl.
14563 * text-art/style.cc: Add #define INCLUDE_VECTOR.
14564 * text-art/styled-string.cc: Likewise.
14565 * text-art/table.cc: Likewise.
14566 * text-art/table.h: Remove #include <vector>.
14567 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
14568 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
14569 Remove #include of <vector> and <string>.
14570 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
14571 * text-art/widget.h: Remove #include <vector>.
14573 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14575 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
14576 (internal_load_fn_p): Add LEN_MASK_LOAD.
14577 (internal_store_fn_p): Add LEN_MASK_STORE.
14578 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
14579 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
14580 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
14581 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
14582 (get_len_load_store_mode): Ditto.
14583 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
14584 (get_len_load_store_mode): Ditto.
14585 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
14586 (get_all_ones_mask): New function.
14587 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
14588 (vectorizable_load): Ditto.
14590 2023-06-23 Marek Polacek <polacek@redhat.com>
14592 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
14593 -std=gnu++26. Document that for C++23, its value is 202302L.
14594 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
14595 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
14596 (gen_compile_unit_die): Likewise.
14598 2023-06-23 Jan Hubicka <jh@suse.cz>
14600 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
14602 (pass_phiprop::execute): Do not compute it here; return
14603 update_ssa_only_virtuals if something changed.
14604 (pass_data_phiprop): Remove TODO_update_ssa from todos.
14606 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
14607 Aaron Sawdey <acsawdey@linux.ibm.com>
14610 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
14611 allowed prefixed lwa to be generated.
14612 * config/rs6000/fusion.md: Regenerate.
14613 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
14614 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
14615 plus compare immediate fused insns.
14616 (maybe_prefixed): Likewise.
14618 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
14620 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
14621 of ASHIFT to const0_rtx with sufficiently large shift count.
14622 Optimize highpart SUBREGs of ASHIFT as the shift operand when
14623 the shift count is the correct offset. Optimize SUBREGs of
14624 multi-word logic operations if the SUBREGs of both operands
14627 2023-06-23 Richard Biener <rguenther@suse.de>
14629 * varasm.cc (initializer_constant_valid_p_1): Only
14630 allow conversions between scalar floating point types.
14632 2023-06-23 Richard Biener <rguenther@suse.de>
14634 * tree-vect-stmts.cc (vectorizable_assignment):
14635 Properly handle non-integral operands when analyzing
14638 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
14640 PR tree-optimization/110280
14641 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
14642 using build_vector_from_val with the element of input operand, and
14643 mask's type if operand and mask's types don't match.
14645 2023-06-23 Richard Biener <rguenther@suse.de>
14647 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
14648 the truth_value_p case with !VECTOR_TYPE_P.
14650 2023-06-23 Richard Biener <rguenther@suse.de>
14652 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
14653 Exit early when the type isn't scalar integral.
14655 2023-06-23 Richard Biener <rguenther@suse.de>
14657 * match.pd ((outertype)((innertype0)a+(innertype1)b)
14658 -> ((newtype)a+(newtype)b)): Use element_precision
14661 2023-06-23 Richard Biener <rguenther@suse.de>
14663 * fold-const.cc (fold_binary_loc): Use element_precision
14664 when trying (double)float1 CMP (double)float2 to
14665 float1 CMP float2 simplification.
14666 * match.pd: Likewise.
14668 2023-06-23 Richard Biener <rguenther@suse.de>
14670 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
14671 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
14673 2023-06-23 Richard Biener <rguenther@suse.de>
14675 * tree-vect-stmts.cc (vector_vector_composition_type):
14676 Handle composition of a vector from a number of elements that
14677 happens to match its number of lanes.
14679 2023-06-22 Marek Polacek <polacek@redhat.com>
14681 * configure.ac (--enable-host-bind-now): New check. Add
14682 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
14683 * configure: Regenerate.
14684 * doc/install.texi: Document --enable-host-bind-now.
14686 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
14688 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
14690 2023-06-22 Richard Biener <rguenther@suse.de>
14692 PR tree-optimization/110332
14693 * tree-ssa-phiprop.cc (propagate_with_phi): Always
14694 check aliasing with edge inserted loads.
14696 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
14697 Uros Bizjak <ubizjak@gmail.com>
14699 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
14700 expansion of ptestc with equal operands as producing const1_rtx.
14701 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
14702 estimates of UNSPEC_PTEST, where the ptest performs the PAND
14703 or PAND of its operands.
14704 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
14705 of reg_equal_p operands into an x86_stc instruction.
14706 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
14707 (define_split): Similar to above for strict_low_part destinations.
14708 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
14710 2023-06-22 David Malcolm <dmalcolm@redhat.com>
14713 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
14714 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
14716 (fanalyzer-debug-text-art): New.
14718 2023-06-22 David Malcolm <dmalcolm@redhat.com>
14720 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
14721 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
14722 text-art/style.o, text-art/styled-string.o, text-art/table.o,
14723 text-art/theme.o, and text-art/widget.o.
14724 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
14725 (COLOR_FG_BRIGHT_RED): New.
14726 (COLOR_FG_BRIGHT_GREEN): New.
14727 (COLOR_FG_BRIGHT_YELLOW): New.
14728 (COLOR_FG_BRIGHT_BLUE): New.
14729 (COLOR_FG_BRIGHT_MAGENTA): New.
14730 (COLOR_FG_BRIGHT_CYAN): New.
14731 (COLOR_FG_BRIGHT_WHITE): New.
14732 (COLOR_BG_BRIGHT_BLACK): New.
14733 (COLOR_BG_BRIGHT_RED): New.
14734 (COLOR_BG_BRIGHT_GREEN): New.
14735 (COLOR_BG_BRIGHT_YELLOW): New.
14736 (COLOR_BG_BRIGHT_BLUE): New.
14737 (COLOR_BG_BRIGHT_MAGENTA): New.
14738 (COLOR_BG_BRIGHT_CYAN): New.
14739 (COLOR_BG_BRIGHT_WHITE): New.
14740 * common.opt (fdiagnostics-text-art-charset=): New option.
14741 (diagnostic-text-art.h): New SourceInclude.
14742 (diagnostic_text_art_charset) New Enum and EnumValues.
14743 * configure: Regenerate.
14744 * configure.ac (gccdepdir): Add text-art to loop.
14745 * diagnostic-diagram.h: New file.
14746 * diagnostic-format-json.cc (json_emit_diagram): New.
14747 (diagnostic_output_format_init_json): Wire it up to
14748 context->m_diagrams.m_emission_cb.
14749 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
14750 "text-art/canvas.h".
14751 (sarif_result::on_nested_diagnostic): Move code to...
14752 (sarif_result::add_related_location): ...this new function.
14753 (sarif_result::on_diagram): New.
14754 (sarif_builder::emit_diagram): New.
14755 (sarif_builder::make_message_object_for_diagram): New.
14756 (sarif_emit_diagram): New.
14757 (diagnostic_output_format_init_sarif): Set
14758 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
14759 * diagnostic-text-art.h: New file.
14760 * diagnostic.cc: Include "diagnostic-text-art.h",
14761 "diagnostic-diagram.h", and "text-art/theme.h".
14762 (diagnostic_initialize): Initialize context->m_diagrams and
14763 call diagnostics_text_art_charset_init.
14764 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
14765 (diagnostic_emit_diagram): New.
14766 (diagnostics_text_art_charset_init): New.
14767 * diagnostic.h (text_art::theme): New forward decl.
14768 (class diagnostic_diagram): Likewise.
14769 (diagnostic_context::m_diagrams): New field.
14770 (diagnostic_emit_diagram): New decl.
14771 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
14772 -fdiagnostics-text-art-charset=.
14773 (-fdiagnostics-plain-output): Add
14774 -fdiagnostics-text-art-charset=none.
14775 * gcc.cc: Include "diagnostic-text-art.h".
14776 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
14777 * opts-common.cc (decode_cmdline_options_to_array): Add
14778 "-fdiagnostics-text-art-charset=none" to expanded_args for
14779 -fdiagnostics-plain-output.
14780 * opts.cc: Include "diagnostic-text-art.h".
14781 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
14782 * pretty-print.cc (pp_unicode_character): New.
14783 * pretty-print.h (pp_unicode_character): New decl.
14784 * selftest-run-tests.cc: Include "text-art/selftests.h".
14785 (selftest::run_tests): Call text_art_tests.
14786 * text-art/box-drawing-chars.inc: New file, generated by
14787 contrib/unicode/gen-box-drawing-chars.py.
14788 * text-art/box-drawing.cc: New file.
14789 * text-art/box-drawing.h: New file.
14790 * text-art/canvas.cc: New file.
14791 * text-art/canvas.h: New file.
14792 * text-art/ruler.cc: New file.
14793 * text-art/ruler.h: New file.
14794 * text-art/selftests.cc: New file.
14795 * text-art/selftests.h: New file.
14796 * text-art/style.cc: New file.
14797 * text-art/styled-string.cc: New file.
14798 * text-art/table.cc: New file.
14799 * text-art/table.h: New file.
14800 * text-art/theme.cc: New file.
14801 * text-art/theme.h: New file.
14802 * text-art/types.h: New file.
14803 * text-art/widget.cc: New file.
14804 * text-art/widget.h: New file.
14806 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
14808 * function.h (emit_initial_value_sets):
14809 Change return type from int to void.
14810 (aggregate_value_p): Change return type from int to bool.
14811 (prologue_contains): Ditto.
14812 (epilogue_contains): Ditto.
14813 (prologue_epilogue_contains): Ditto.
14814 * function.cc (temp_slot): Make "in_use" variable bool.
14815 (make_slot_available): Update for changed "in_use" variable.
14816 (assign_stack_temp_for_type): Ditto.
14817 (emit_initial_value_sets): Change return type from int to void
14818 and update function body accordingly.
14819 (instantiate_virtual_regs): Ditto.
14820 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
14821 (safe_insn_predicate): Change return type from int to bool.
14822 (aggregate_value_p): Change return type from int to bool
14823 and update function body accordingly.
14824 (prologue_contains): Change return type from int to bool.
14825 (prologue_epilogue_contains): Ditto.
14827 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
14829 * common.opt (fp_contract_mode) [on]: Remove fallback.
14830 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
14831 * doc/invoke.texi (-ffp-contract): Update.
14832 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
14834 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14836 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14837 Add alternatives to prefer to avoid same input and output Z register.
14838 (mask_gather_load<mode><v_int_container>): Likewise.
14839 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14840 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14841 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14842 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14844 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14846 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14847 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14848 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14849 <SVE_2BHSI:mode>_sxtw): Likewise.
14850 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14851 <SVE_2BHSI:mode>_uxtw): Likewise.
14852 (@aarch64_ldff1_gather<mode>): Likewise.
14853 (@aarch64_ldff1_gather<mode>): Likewise.
14854 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14855 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14856 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14857 <VNx4_NARROW:mode>): Likewise.
14858 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14859 <VNx2_NARROW:mode>): Likewise.
14860 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14861 <VNx2_NARROW:mode>_sxtw): Likewise.
14862 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14863 <VNx2_NARROW:mode>_uxtw): Likewise.
14864 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14865 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14866 <SVE_PARTIAL_I:mode>): Likewise.
14868 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14870 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14871 Convert to compact alternatives syntax.
14872 (mask_gather_load<mode><v_int_container>): Likewise.
14873 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14874 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14875 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14876 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14878 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14880 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14881 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14882 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14883 <SVE_2BHSI:mode>_sxtw): Likewise.
14884 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14885 <SVE_2BHSI:mode>_uxtw): Likewise.
14886 (@aarch64_ldff1_gather<mode>): Likewise.
14887 (@aarch64_ldff1_gather<mode>): Likewise.
14888 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14889 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14890 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14891 <VNx4_NARROW:mode>): Likewise.
14892 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14893 <VNx2_NARROW:mode>): Likewise.
14894 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14895 <VNx2_NARROW:mode>_sxtw): Likewise.
14896 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14897 <VNx2_NARROW:mode>_uxtw): Likewise.
14898 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14899 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14900 <SVE_PARTIAL_I:mode>): Likewise.
14902 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14905 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14907 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14908 Convert to compact alternatives syntax.
14909 (mask_gather_load<mode><v_int_container>): Likewise.
14910 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14911 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14912 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14913 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14915 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14917 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14918 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14919 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14920 <SVE_2BHSI:mode>_sxtw): Likewise.
14921 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14922 <SVE_2BHSI:mode>_uxtw): Likewise.
14923 (@aarch64_ldff1_gather<mode>): Likewise.
14924 (@aarch64_ldff1_gather<mode>): Likewise.
14925 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14926 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14927 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14928 <VNx4_NARROW:mode>): Likewise.
14929 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14930 <VNx2_NARROW:mode>): Likewise.
14931 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14932 <VNx2_NARROW:mode>_sxtw): Likewise.
14933 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14934 <VNx2_NARROW:mode>_uxtw): Likewise.
14935 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14936 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14937 <SVE_PARTIAL_I:mode>): Likewise.
14939 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14941 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
14942 (get_len_load_store_mode): Ditto.
14943 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
14944 (get_len_load_store_mode): Ditto.
14945 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
14946 (get_len_load_store_mode): Ditto.
14947 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
14948 (get_len_load_store_mode): Ditto.
14949 * tree-if-conv.cc: include optabs-tree instead of optabs-query
14951 2023-06-21 Richard Biener <rguenther@suse.de>
14953 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
14954 split_constant_offset for the POINTER_PLUS_EXPR case.
14956 2023-06-21 Richard Biener <rguenther@suse.de>
14958 * tree-ssa-loop-ivopts.cc (record_group_use): Use
14959 split_constant_offset.
14961 2023-06-21 Richard Biener <rguenther@suse.de>
14963 * tree-loop-distribution.cc (classify_builtin_st): Use
14964 split_constant_offset.
14965 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
14966 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
14968 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14970 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14971 Convert to compact alternatives syntax.
14972 (mask_gather_load<mode><v_int_container>): Likewise.
14973 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14974 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14975 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14976 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14978 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14980 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14981 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14982 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14983 <SVE_2BHSI:mode>_sxtw): Likewise.
14984 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14985 <SVE_2BHSI:mode>_uxtw): Likewise.
14986 (@aarch64_ldff1_gather<mode>): Likewise.
14987 (@aarch64_ldff1_gather<mode>): Likewise.
14988 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14989 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14990 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14991 <VNx4_NARROW:mode>): Likewise.
14992 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14993 <VNx2_NARROW:mode>): Likewise.
14994 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14995 <VNx2_NARROW:mode>_sxtw): Likewise.
14996 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14997 <VNx2_NARROW:mode>_uxtw): Likewise.
14998 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14999 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
15000 <SVE_PARTIAL_I:mode>): Likewise.
15002 2023-06-21 Tamar Christina <tamar.christina@arm.com>
15005 * doc/md.texi: Replace backslashchar.
15007 2023-06-21 Richard Biener <rguenther@suse.de>
15009 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
15010 Overload. For masked main loops make sure the vectorization
15011 factor isn't more than double the number of iterations.
15013 2023-06-21 Jan Beulich <jbeulich@suse.com>
15015 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
15016 value duplication by ix86_build_signbit_mask() when AVX512F and
15018 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
15019 2-alternative form. Adjust "mode" attribute. Add "enabled"
15021 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
15022 && !TARGET_PREFER_AVX256.
15023 (*<avx512>_vpternlog<mode>_2): Likewise.
15024 (*<avx512>_vpternlog<mode>_3): Likewise.
15026 2023-06-21 liuhongt <hongtao.liu@intel.com>
15029 * tree-vect-stmts.cc (vectorizable_conversion): Use
15030 intermiediate integer type for float_expr/fix_trunc_expr when
15031 direct optab is not existed.
15033 2023-06-20 Tamar Christina <tamar.christina@arm.com>
15035 PR bootstrap/110324
15036 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
15038 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
15040 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
15041 register operand to the stack pointer. Require the second register
15042 operand to have the number specified in a separate const_int operand.
15043 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
15044 (aarch64_allocate_and_probe_stack_space): Use it.
15045 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
15046 (aarch64_expand_epilogue): Likewise.
15048 2023-06-20 Jakub Jelinek <jakub@redhat.com>
15050 PR middle-end/79173
15051 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
15052 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
15055 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
15057 * calls.h (setjmp_call_p): Change return type from int to bool.
15058 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
15059 (store_one_arg): Change return type from int to bool
15060 and adjust function body accordingly. Change "sibcall_failure"
15062 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
15063 argument to bool. Change "partial_seen" variable to bool.
15064 (load_register_parameters): Change *sibcall_failure
15065 pointer argument to bool.
15066 (check_sibcall_argument_overlap_1): Change return type from int to bool
15067 and adjust function body accordingly.
15068 (check_sibcall_argument_overlap): Ditto. Change
15069 "mark_stored_args_map" argument to bool.
15070 (emit_call_1): Change "already_popped" variable to bool.
15071 (setjmp_call_p): Change return type from int to bool
15072 and adjust function body accordingly.
15073 (initialize_argument_information): Change *must_preallocate
15074 pointer argument to bool.
15075 (expand_call): Change "pcc_struct_value", "must_preallocate"
15076 and "sibcall_failure" variables to bool.
15077 (emit_library_call_value_1): Change "pcc_struct_value"
15080 2023-06-20 Martin Jambor <mjambor@suse.cz>
15083 * ipa-sra.cc (struct caller_issues): New field there_is_one.
15084 (check_for_caller_issues): Set it.
15085 (check_all_callers_for_issues): Check it.
15087 2023-06-20 Martin Jambor <mjambor@suse.cz>
15089 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
15090 (struct ipcp_transformation): Rearrange members according to
15091 C++ class coding convention, add m_uid_to_idx,
15092 get_param_index and maybe_create_parm_idx_map.
15093 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
15094 (compare_uids): Likewise.
15095 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
15096 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
15097 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
15098 (ipcp_update_vr): Likewise.
15099 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
15100 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
15102 2023-06-20 Carl Love <cel@us.ibm.com>
15104 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
15105 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
15106 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
15107 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
15108 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
15109 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
15110 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
15111 * config/rs6000/rs6000-builtins.def
15112 (__builtin_vsx_scalar_extract_exp_to_vec,
15113 __builtin_vsx_scalar_extract_sig_to_vec,
15114 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
15115 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
15116 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
15117 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
15118 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
15119 overloaded instance. Update comments.
15120 * config/rs6000/rs6000-overload.def
15121 (__builtin_vec_scalar_insert_exp): Add new overload definition with
15123 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
15124 overloaded definitions.
15125 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
15126 (DI_to_TI): New mode attribute.
15127 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
15128 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
15129 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
15130 * doc/extend.texi (scalar_extract_exp_to_vec,
15131 scalar_extract_sig_to_vec): Add documentation for new builtins.
15132 (scalar_insert_exp): Add new overloaded builtin definition.
15134 2023-06-20 Li Xu <xuli1@eswincomputing.com>
15136 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
15137 size of vector mask mode to one rvv register.
15139 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15141 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
15143 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
15145 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
15148 2023-06-20 Richard Biener <rguenther@suse.de>
15150 * tree-ssa-dse.cc (dse_classify_store): When we found
15151 no defs and the basic-block with the original definition
15152 ends in __builtin_unreachable[_trap] the store is dead.
15154 2023-06-20 Richard Biener <rguenther@suse.de>
15156 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
15157 keep the virtual SSA form up-to-date.
15159 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15161 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
15162 New define_insn_and_split.
15164 2023-06-20 Tamar Christina <tamar.christina@arm.com>
15166 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
15168 2023-06-20 Jan Beulich <jbeulich@suse.com>
15170 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
15171 constraint. Add new AVX512F alternative.
15173 2023-06-20 Richard Biener <rguenther@suse.de>
15176 * dwarf2out.cc (process_scope_var): Continue processing
15177 the decl after setting a parent in case the existing DIE
15180 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
15182 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
15183 (riscv_arg_has_vector): Simplify.
15184 (riscv_pass_in_vector_p): Adjust warning message.
15186 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
15188 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
15189 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
15190 * config/riscv/riscv.md (riscv_frcsr): New patterns.
15191 (riscv_fscsr): Likewise.
15193 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
15195 PR rtl-optimization/110305
15196 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
15197 Handle HONOR_SNANS for x + 0.0.
15199 2023-06-19 Jan Hubicka <jh@suse.cz>
15201 PR tree-optimization/109811
15202 PR tree-optimization/109849
15203 * passes.def: Add phiprop to early optimization passes.
15204 * tree-ssa-phiprop.cc: Allow clonning.
15206 2023-06-19 Tamar Christina <tamar.christina@arm.com>
15208 * config/aarch64/aarch64.md (arches): Add nosimd.
15209 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
15212 2023-06-19 Tamar Christina <tamar.christina@arm.com>
15213 Omar Tahir <Omar.Tahir2@arm.com>
15215 * gensupport.cc (class conlist, add_constraints, add_attributes,
15216 skip_spaces, expect_char, preprocess_compact_syntax,
15217 parse_section_layout, parse_section, convert_syntax): New.
15218 (process_rtx): Check for conversion.
15219 * genoutput.cc (process_template): Check for unresolved iterators.
15220 (class data): Add compact_syntax_p.
15221 (gen_insn): Use it.
15222 * gensupport.h (compact_syntax): New.
15223 (hash-set.h): Include.
15224 * doc/md.texi: Document it.
15226 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
15228 * recog.h (check_asm_operands): Change return type from int to bool.
15229 (insn_invalid_p): Ditto.
15230 (verify_changes): Ditto.
15231 (apply_change_group): Ditto.
15232 (constrain_operands): Ditto.
15233 (constrain_operands_cached): Ditto.
15234 (validate_replace_rtx_subexp): Ditto.
15235 (validate_replace_rtx): Ditto.
15236 (validate_replace_rtx_part): Ditto.
15237 (validate_replace_rtx_part_nosimplify): Ditto.
15238 (added_clobbers_hard_reg_p): Ditto.
15239 (peep2_regno_dead_p): Ditto.
15240 (peep2_reg_dead_p): Ditto.
15241 (store_data_bypass_p): Ditto.
15242 (if_test_bypass_p): Ditto.
15243 * rtl.h (split_all_insns_noflow): Change
15244 return type from unsigned int to void.
15245 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
15246 of generated added_clobbers_hard_reg_p from int to bool and adjust
15247 function body accordingly. Change "used" variable type from
15249 * recog.cc (check_asm_operands): Change return type
15250 from int to bool and adjust function body accordingly.
15251 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
15252 (verify_changes): Change return type from int to bool.
15253 (apply_change_group): Change return type from int to bool
15254 and adjust function body accordingly.
15255 (validate_replace_rtx_subexp): Change return type from int to bool.
15256 (validate_replace_rtx): Ditto.
15257 (validate_replace_rtx_part): Ditto.
15258 (validate_replace_rtx_part_nosimplify): Ditto.
15259 (constrain_operands_cached): Ditto.
15260 (constrain_operands): Ditto. Change "lose" and "win"
15261 variables type from int to bool.
15262 (split_all_insns_noflow): Change return type from unsigned int
15263 to void and adjust function body accordingly.
15264 (peep2_regno_dead_p): Change return type from int to bool.
15265 (peep2_reg_dead_p): Ditto.
15266 (peep2_find_free_register): Change "success"
15267 variable type from int to bool
15268 (store_data_bypass_p_1): Change return type from int to bool.
15269 (store_data_bypass_p): Ditto.
15271 2023-06-19 Li Xu <xuli1@eswincomputing.com>
15273 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
15276 2023-06-19 Pan Li <pan2.li@intel.com>
15279 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
15281 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
15282 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
15283 VF_ZVE63 and VF_ZVE32.
15284 * config/riscv/vector.md
15285 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
15286 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
15287 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
15288 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
15289 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
15290 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
15291 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
15292 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
15293 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
15294 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
15296 2023-06-19 Pan Li <pan2.li@intel.com>
15299 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
15301 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
15302 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
15303 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
15304 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
15305 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
15306 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
15307 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
15308 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
15309 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
15310 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
15311 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
15312 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
15313 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
15314 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
15316 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
15318 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
15319 (gcn_init_libfuncs): Add div and mod functions for all modes.
15320 Add placeholders for divmod functions.
15321 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
15323 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
15325 * tree-vect-generic.cc: Include optabs-libfuncs.h.
15326 (get_compute_type): Check optab_libfunc.
15327 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
15328 (vectorizable_operation): Check optab_libfunc.
15330 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
15332 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
15333 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
15334 (V_MOV, V_MOV_ALT): Likewise.
15335 (scalar_mode, SCALAR_MODE): Add TImode.
15336 (vnsi, VnSI, vndi, VnDI): Likewise.
15337 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
15338 (mov<mode>, mov<mode>_unspec): Use V_MOV.
15339 (*mov<mode>_4reg): New insn.
15340 (mov<mode>_exec): New 4reg variant.
15341 (mov<mode>_sgprbase): Likewise.
15342 (reload_in<mode>, reload_out<mode>): Use V_MOV.
15343 (vec_set<mode>): Likewise.
15344 (vec_duplicate<mode><exec>): New 4reg variant.
15345 (vec_extract<mode><scalar_mode>): Likewise.
15346 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
15347 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
15348 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
15349 (fold_extract_last_<mode>): Use V_MOV.
15350 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
15351 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
15352 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
15353 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
15354 gather<mode>_insn_2offsets<exec>): Use V_MOV.
15355 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
15356 scatter<mode>_insn_1offset<exec_scatter>,
15357 scatter<mode>_insn_1offset_ds<exec_scatter>,
15358 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
15359 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
15360 mask_scatter_store<mode><vnsi>): Likewise.
15361 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
15362 (gcn_hard_regno_mode_ok): Likewise.
15363 (GEN_VNM): Add TImode support.
15364 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
15365 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
15366 V8TImode, and V2TImode.
15367 (print_operand): Add 'J' and 'K' print codes.
15369 2023-06-19 Richard Biener <rguenther@suse.de>
15371 PR tree-optimization/110298
15372 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
15373 Clear number of iterations info before cleaning up the CFG.
15375 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15377 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
15378 Simplify vec_concat of lowpart subreg and high part vec_select.
15380 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
15382 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
15384 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
15386 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
15387 Handle null niters_skip.
15389 2023-06-19 Richard Biener <rguenther@suse.de>
15391 * config/aarch64/aarch64.cc
15392 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
15393 to LOOP_VINFO_MASKS.
15395 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
15398 * common/config/avr/avr-common.cc: Remove setting
15399 of OPT_fdelete_null_pointer_checks.
15400 * config/avr/avr.cc (avr_option_override): Clear
15401 flag_delete_null_pointer_checks if zero_address_valid.
15402 (avr_addr_space_zero_address_valid): New function.
15403 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
15406 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15407 Robin Dapp <rdapp.gcc@gmail.com>
15409 * doc/md.texi: Add len_mask{load,store}.
15410 * genopinit.cc (main): Ditto.
15412 * internal-fn.cc (len_maskload_direct): Ditto.
15413 (len_maskstore_direct): Ditto.
15414 (expand_call_mem_ref): Ditto.
15415 (expand_partial_load_optab_fn): Ditto.
15416 (expand_len_maskload_optab_fn): Ditto.
15417 (expand_partial_store_optab_fn): Ditto.
15418 (expand_len_maskstore_optab_fn): Ditto.
15419 (direct_len_maskload_optab_supported_p): Ditto.
15420 (direct_len_maskstore_optab_supported_p): Ditto.
15421 * internal-fn.def (LEN_MASK_LOAD): Ditto.
15422 (LEN_MASK_STORE): Ditto.
15423 * optabs.def (OPTAB_CD): Ditto.
15425 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
15427 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
15429 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
15431 * config/riscv/autovec.md (<optab><mode>3): Implement binop
15433 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
15434 (enum vxrm_field_enum): Rename this...
15435 (enum fixed_point_rounding_mode): ...to this.
15436 (enum frm_field_enum): Rename this...
15437 (enum floating_point_rounding_mode): ...to this.
15438 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
15439 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
15441 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
15442 (riscv_excess_precision): Do not convert to float for ZVFH.
15443 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
15445 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
15447 * config/riscv/vector-iterators.md: Add VI_QH iterator.
15448 * config/riscv/autovec-opt.md
15449 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
15450 that includes sign extension.
15451 (@pred_extract_first_sextsi<mode>): Dito for SImode.
15453 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
15455 * config/riscv/autovec.md (vec_set<mode>): Implement.
15456 (vec_extract<mode><vel>): Implement.
15457 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
15458 (emit_vlmax_slide_insn): Declare.
15459 (emit_nonvlmax_slide_tu_insn): Declare.
15460 (emit_scalar_move_insn): Export.
15461 (emit_nonvlmax_integer_move_insn): Export.
15462 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
15463 (emit_nonvlmax_slide_tu_insn): New function.
15464 (emit_vlmax_masked_mu_insn): No change.
15465 (emit_vlmax_integer_move_insn): Export.
15467 2023-06-19 Richard Biener <rguenther@suse.de>
15469 * tree-vectorizer.h (enum vect_partial_vector_style): New.
15470 (_loop_vec_info::partial_vector_style): Likewise.
15471 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
15472 (rgroup_controls::compare_type): Add.
15473 (vec_loop_masks): Change from a typedef to auto_vec<>
15475 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
15476 Adjust. Convert niters_skip to compare_type.
15477 (vect_set_loop_condition_partial_vectors_avx512): New function
15478 implementing the AVX512 partial vector codegen.
15479 (vect_set_loop_condition): Dispatch to the correct
15480 vect_set_loop_condition_partial_vectors_* function based on
15481 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
15482 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
15483 in the original niter type.
15484 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
15485 partial_vector_style.
15486 (can_produce_all_loop_masks_p): Adjust.
15487 (vect_verify_full_masking): Produce the rgroup_controls vector
15488 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
15489 (vect_verify_full_masking_avx512): New function implementing
15490 verification of AVX512 style masking.
15491 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
15492 (vect_analyze_loop_2): Also try AVX512 style masking.
15494 (vect_estimate_min_profitable_iters): Implement AVX512 style
15495 mask producing cost.
15496 (vect_record_loop_mask): Do not build the rgroup_controls
15497 vector here but record masks in a hash-set.
15498 (vect_get_loop_mask): Implement AVX512 style mask query,
15499 complementing the existing while_ult style.
15501 2023-06-19 Richard Biener <rguenther@suse.de>
15503 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
15505 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
15506 (vectorize_fold_left_reduction): Adjust.
15507 (vect_transform_reduction): Likewise.
15508 (vectorizable_live_operation): Likewise.
15509 * tree-vect-stmts.cc (vectorizable_call): Likewise.
15510 (vectorizable_operation): Likewise.
15511 (vectorizable_store): Likewise.
15512 (vectorizable_load): Likewise.
15513 (vectorizable_condition): Likewise.
15515 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
15518 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
15519 Add Optimization option property.
15521 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15523 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
15524 Add new pattern for the abovementioned case.
15526 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15528 * config/xtensa/xtensa.cc
15529 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
15531 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
15533 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
15535 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
15537 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
15539 2023-06-19 liuhongt <hongtao.liu@intel.com>
15542 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
15544 (sse2_packsswb<mask_name>): .. this, ..
15545 (avx2_packsswb<mask_name>): .. this and ..
15546 (avx512bw_packsswb<mask_name>): .. this.
15547 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
15548 (sse2_packssdw<mask_name>): .. this, ..
15549 (avx2_packssdw<mask_name>): .. this and ..
15550 (avx512bw_packssdw<mask_name>): .. this.
15552 2023-06-19 liuhongt <hongtao.liu@intel.com>
15555 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
15556 UNSPEC_US_TRUNCATE instead of original us_truncate for
15558 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
15560 (mmx_packsswb): .. this and ..
15561 (mmx_packuswb): .. this.
15562 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
15564 (s_trunsuffix): Removed code iterator.
15565 (any_s_truncate): Ditto.
15566 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
15567 UNSPEC_US_TRUNCATE instead of original us_truncate.
15568 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
15569 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
15571 2023-06-18 Pan Li <pan2.li@intel.com>
15573 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
15575 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
15577 * rtl.h (*rtx_equal_p_callback_function):
15578 Change return type from int to bool.
15579 (rtx_equal_p): Ditto.
15580 (*hash_rtx_callback_function): Ditto.
15581 * rtl.cc (rtx_equal_p): Change return type from int to bool
15582 and adjust function body accordingly.
15583 * early-remat.cc (scratch_equal): Ditto.
15584 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
15585 (hash_with_unspec_callback): Ditto.
15587 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
15589 * config/arc/arc.md (movqi_insn): Allow certain constants to
15590 be stored into memory in the pattern's condition.
15591 (movsf_insn): Similarly.
15593 2023-06-18 Honza <jh@ryzen3.suse.cz>
15595 PR tree-optimization/109849
15596 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
15597 ES; handle ipa_predicate::not_sra_candidate.
15598 (evaluate_properties_for_edge): Pass es to
15599 evaluate_conditions_for_known_args.
15600 (ipa_fn_summary_t::duplicate): Handle sra candidates.
15601 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
15602 (load_or_store_of_ptr_parameter): New function.
15603 (points_to_possible_sra_candidate_p): New function.
15604 (analyze_function_body): Initialize points_to_possible_sra_candidate;
15605 determine sra predicates.
15606 (estimate_ipcp_clone_size_and_time): Update call of
15607 evaluate_conditions_for_known_args.
15608 (remap_edge_params): Update points_to_possible_sra_candidate.
15609 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
15610 (write_ipa_call_summary): Likewise.
15611 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
15612 (dump_condition): Dump it.
15613 * ipa-predicate.h (struct inline_param_summary): Add
15614 points_to_possible_sra_candidate.
15616 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
15618 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
15619 function for setting the carry flag.
15620 (ix86_expand_builtin) <handlecarry>: Use it here.
15621 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
15622 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
15623 (usubc<mode>5): Likewise.
15625 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
15627 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
15628 for the immediate constant shift count.
15629 (*concat<mode><dwi>3_2): Likewise.
15630 (*concat<mode><dwi>3_3): Likewise.
15631 (*concat<mode><dwi>3_4): Likewise.
15632 (*concat<mode><dwi>3_5): Likewise.
15633 (*concat<mode><dwi>3_6): Likewise.
15635 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
15637 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
15638 (hash_rtx): Remove.
15639 * early-remat.cc (remat_candidate_hasher::equal): Update
15640 to call rtx_equal_p with rtx_equal_p_callback_function argument.
15641 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
15642 (rtx_equal_p): Remove.
15643 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
15644 argument with NULL default value.
15645 (rtx_equal_p_cb): Remove function declaration.
15646 (hash_rtx_cb): Ditto.
15647 (hash_rtx): Add hash_rtx_callback_function argument
15648 with NULL default value.
15649 * sel-sched-ir.cc (free_nop_pool): Update function comment.
15650 (skip_unspecs_callback): Ditto.
15651 (vinsn_init): Update to call hash_rtx with
15652 hash_rtx_callback_function argument.
15653 (vinsn_equal_p): Ditto.
15655 2023-06-18 yulong <shiyulong@iscas.ac.cn>
15657 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
15658 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
15659 (ADJUST_ALIGNMENT): Ditto.
15660 (RVV_TUPLE_PARTIAL_MODES): Ditto.
15661 (ADJUST_NUNITS): Ditto.
15662 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
15664 (vfloat16mf4x3_t): Ditto.
15665 (vfloat16mf4x4_t): Ditto.
15666 (vfloat16mf4x5_t): Ditto.
15667 (vfloat16mf4x6_t): Ditto.
15668 (vfloat16mf4x7_t): Ditto.
15669 (vfloat16mf4x8_t): Ditto.
15670 (vfloat16mf2x2_t): Ditto.
15671 (vfloat16mf2x3_t): Ditto.
15672 (vfloat16mf2x4_t): Ditto.
15673 (vfloat16mf2x5_t): Ditto.
15674 (vfloat16mf2x6_t): Ditto.
15675 (vfloat16mf2x7_t): Ditto.
15676 (vfloat16mf2x8_t): Ditto.
15677 (vfloat16m1x2_t): Ditto.
15678 (vfloat16m1x3_t): Ditto.
15679 (vfloat16m1x4_t): Ditto.
15680 (vfloat16m1x5_t): Ditto.
15681 (vfloat16m1x6_t): Ditto.
15682 (vfloat16m1x7_t): Ditto.
15683 (vfloat16m1x8_t): Ditto.
15684 (vfloat16m2x2_t): Ditto.
15685 (vfloat16m2x3_t): Ditto.
15686 (vfloat16m2x4_t): Ditto.
15687 (vfloat16m4x2_t): Ditto.
15688 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
15689 (vfloat16mf4x3_t): Ditto.
15690 (vfloat16mf4x4_t): Ditto.
15691 (vfloat16mf4x5_t): Ditto.
15692 (vfloat16mf4x6_t): Ditto.
15693 (vfloat16mf4x7_t): Ditto.
15694 (vfloat16mf4x8_t): Ditto.
15695 (vfloat16mf2x2_t): Ditto.
15696 (vfloat16mf2x3_t): Ditto.
15697 (vfloat16mf2x4_t): Ditto.
15698 (vfloat16mf2x5_t): Ditto.
15699 (vfloat16mf2x6_t): Ditto.
15700 (vfloat16mf2x7_t): Ditto.
15701 (vfloat16mf2x8_t): Ditto.
15702 (vfloat16m1x2_t): Ditto.
15703 (vfloat16m1x3_t): Ditto.
15704 (vfloat16m1x4_t): Ditto.
15705 (vfloat16m1x5_t): Ditto.
15706 (vfloat16m1x6_t): Ditto.
15707 (vfloat16m1x7_t): Ditto.
15708 (vfloat16m1x8_t): Ditto.
15709 (vfloat16m2x2_t): Ditto.
15710 (vfloat16m2x3_t): Ditto.
15711 (vfloat16m2x4_t): Ditto.
15712 (vfloat16m4x2_t): Ditto.
15713 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
15714 * config/riscv/riscv.md: New.
15715 * config/riscv/vector-iterators.md: New.
15717 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
15719 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
15720 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
15721 Generalize special case for converting TImode to V1TImode to handle
15722 all 128-bit vector conversions.
15724 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
15726 * gcc-ar.cc (main): Refactor to slightly reduce code
15727 duplication. Avoid unnecessary elements in nargv.
15729 2023-06-16 Pan Li <pan2.li@intel.com>
15732 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
15733 integer reduction expand.
15734 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
15735 and the LMUL1 attr respectively.
15736 * config/riscv/vector.md
15737 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
15738 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
15739 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
15740 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
15741 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
15742 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
15743 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
15745 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15748 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
15750 2023-06-16 Jakub Jelinek <jakub@redhat.com>
15752 PR middle-end/79173
15753 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
15754 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
15755 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
15757 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
15758 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
15759 * builtins.cc (fold_builtin_addc_subc): New function.
15760 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
15761 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
15763 2023-06-16 Jakub Jelinek <jakub@redhat.com>
15765 PR tree-optimization/110271
15766 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
15767 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
15768 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
15770 2023-06-16 Martin Jambor <mjambor@suse.cz>
15772 * configure: Regenerate.
15774 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
15775 Uros Bizjak <ubizjak@gmail.com>
15778 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
15779 define_insn_and_split combine *add<dwi>3_doubleword with
15780 a *concat<mode><dwi>3 for more efficient lowering after reload.
15782 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
15784 * ira-lives.cc: Include except.h.
15785 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
15786 when the pseudo does not live at the exception landing pad.
15788 2023-06-16 Alex Coplan <alex.coplan@arm.com>
15790 * doc/invoke.texi: Document -Welaborated-enum-base.
15792 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15794 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
15795 (ushrn2_n): ... This.
15796 (sqshrn2_n): Rename builtins to...
15797 (ssqshrn2_n): ... This.
15798 (uqshrn2_n): Rename builtins to...
15799 (uqushrn2_n): ... This.
15800 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
15801 (vqshrn_high_n_s32): Likewise.
15802 (vqshrn_high_n_s64): Likewise.
15803 (vqshrn_high_n_u16): Likewise.
15804 (vqshrn_high_n_u32): Likewise.
15805 (vqshrn_high_n_u64): Likewise.
15806 (vshrn_high_n_s16): Likewise.
15807 (vshrn_high_n_s32): Likewise.
15808 (vshrn_high_n_s64): Likewise.
15809 (vshrn_high_n_u16): Likewise.
15810 (vshrn_high_n_u32): Likewise.
15811 (vshrn_high_n_u64): Likewise.
15812 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
15814 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
15815 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
15816 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
15817 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
15818 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
15819 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
15820 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
15821 Update expander for the above.
15823 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15825 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
15826 (shrn2_n): ... This.
15827 (rshrn2): Rename builtins to...
15828 (rshrn2_n): ... This.
15829 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
15830 (vrshrn_high_n_s32): Likewise.
15831 (vrshrn_high_n_s64): Likewise.
15832 (vrshrn_high_n_u16): Likewise.
15833 (vrshrn_high_n_u32): Likewise.
15834 (vrshrn_high_n_u64): Likewise.
15835 (vshrn_high_n_s16): Likewise.
15836 (vshrn_high_n_s32): Likewise.
15837 (vshrn_high_n_s64): Likewise.
15838 (vshrn_high_n_u16): Likewise.
15839 (vshrn_high_n_u32): Likewise.
15840 (vshrn_high_n_u64): Likewise.
15841 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
15843 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
15844 (aarch64_shrn2<mode>_insn_le): Likewise.
15845 (aarch64_shrn2<mode>_insn_be): Likewise.
15846 (aarch64_shrn2<mode>): Likewise.
15847 (aarch64_rshrn2<mode>_insn_le): Likewise.
15848 (aarch64_rshrn2<mode>_insn_be): Likewise.
15849 (aarch64_rshrn2<mode>): Likewise.
15850 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
15851 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
15852 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
15853 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
15854 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
15855 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
15856 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
15857 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
15858 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
15859 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
15860 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
15861 (aarch64_sqshrun2_n<mode>): New define_expand.
15862 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
15863 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
15864 (aarch64_sqrshrun2_n<mode>): New define_expand.
15865 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
15866 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
15867 Delete unspec values.
15868 (VQSHRN_N): Delete int iterator.
15870 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15872 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
15873 * config/aarch64/aarch64-simd.md
15874 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
15875 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
15876 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
15877 * config/aarch64/iterators.md (shrn_s): New code attribute.
15879 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15881 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
15883 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
15884 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
15885 (aarch64_sqrshrun_n<mode>_insn): Likewise.
15886 (aarch64_sqshrun_n<mode>_insn): Likewise.
15887 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
15888 (aarch64_sqshrun_n<mode>): Likewise.
15889 (aarch64_sqrshrun_n<mode>): Likewise.
15890 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
15892 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15894 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
15895 (shrn_n): ... This.
15896 (rshrn): Rename builtins to...
15897 (rshrn_n): ... This.
15898 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
15899 (vshrn_n_s32): Likewise.
15900 (vshrn_n_s64): Likewise.
15901 (vshrn_n_u16): Likewise.
15902 (vshrn_n_u32): Likewise.
15903 (vshrn_n_u64): Likewise.
15904 (vrshrn_n_s16): Likewise.
15905 (vrshrn_n_s32): Likewise.
15906 (vrshrn_n_s64): Likewise.
15907 (vrshrn_n_u16): Likewise.
15908 (vrshrn_n_u32): Likewise.
15909 (vrshrn_n_u64): Likewise.
15910 * config/aarch64/aarch64-simd.md
15911 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
15912 (aarch64_shrn<mode>): Likewise.
15913 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
15914 (aarch64_rshrn<mode>): Likewise.
15915 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
15916 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
15917 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
15918 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
15919 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
15920 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
15921 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
15922 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
15923 (aarch64_sqshrun_n<mode>): Likewise.
15924 (aarch64_sqrshrun_n<mode>): Likewise.
15925 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
15926 (TRUNCEXTEND): New code attribute.
15927 (TRUNC_SHIFT): Likewise.
15928 (shrn_op): Likewise.
15929 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
15932 2023-06-16 Pan Li <pan2.li@intel.com>
15934 * config/riscv/riscv-vsetvl.cc
15935 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
15937 2023-06-16 Richard Biener <rguenther@suse.de>
15939 PR tree-optimization/110278
15940 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
15941 (x != (typeof x)(x == 0) -> true): Likewise.
15943 2023-06-16 Pali Rohár <pali@kernel.org>
15945 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
15946 (REAL_LIBGCC_SPEC): New define.
15947 * config/i386/mingw.opt: Add mcrtdll=
15948 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
15949 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
15950 (STARTFILE_SPEC): Adjust for -mcrtdll=.
15951 * doc/invoke.texi: Add mcrtdll= documentation.
15953 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
15955 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
15956 (mips_handle_code_readable_attr):New static function.
15957 (mips_get_code_readable_attr):New static enum function.
15958 (mips_set_current_function):Set the code_readable mode.
15959 (mips_option_override):Same as above.
15960 * doc/extend.texi:Document code_readable.
15962 2023-06-16 Richard Biener <rguenther@suse.de>
15964 PR tree-optimization/110269
15965 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
15966 with tree_expr_nonzero_p ...
15967 * match.pd (cmp (convert? addr@0) integer_zerop): With this
15970 2023-06-15 Marek Polacek <polacek@redhat.com>
15972 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
15973 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
15974 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
15975 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
15976 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
15978 * configure: Regenerate.
15979 * doc/install.texi: Document --enable-host-pie.
15981 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
15983 * regcprop.cc (maybe_mode_change): Enable stack pointer
15986 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
15988 PR tree-optimization/110266
15989 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
15991 (adjust_realpart_expr): Ditto.
15993 2023-06-15 Jan Beulich <jbeulich@suse.com>
15995 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
15998 2023-06-15 Jan Beulich <jbeulich@suse.com>
16000 * config/i386/constraints.md: Mention k and r for B.
16002 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
16003 Andrew Pinski <apinski@marvell.com>
16006 * config/loongarch/loongarch.md: Modify the register constraints for template
16007 "jumptable" and "indirect_jump" from "r" to "e".
16009 2023-06-15 Xi Ruoyao <xry111@xry111.site>
16011 * config/loongarch/loongarch-tune.h (loongarch_align): New
16013 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
16015 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
16017 * config/loongarch/loongarch.cc
16018 (loongarch_option_override_internal): Set the value of
16019 -falign-functions= if -falign-functions is enabled but no value
16020 is given. Likewise for -falign-labels=.
16022 2023-06-15 Jakub Jelinek <jakub@redhat.com>
16024 PR middle-end/79173
16025 * internal-fn.def (UADDC, USUBC): New internal functions.
16026 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
16027 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
16028 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
16029 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
16030 match_uaddc_usubc): New functions.
16031 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
16032 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
16033 other optimizations have been successful for those.
16034 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
16035 * fold-const-call.cc (fold_const_call): Likewise.
16036 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
16037 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
16038 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
16040 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
16041 define_expand patterns.
16042 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
16043 into NOTE_INSN_DELETED note rather than nop instruction.
16044 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
16047 2023-06-15 Jakub Jelinek <jakub@redhat.com>
16049 PR middle-end/79173
16050 * config/i386/i386.md (subborrow<mode>): Add alternative with
16051 memory destination and add for it define_peephole2
16052 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
16053 destination in these patterns.
16055 2023-06-15 Jakub Jelinek <jakub@redhat.com>
16057 PR middle-end/79173
16058 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
16059 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
16060 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
16061 using memory destination in these patterns.
16063 2023-06-15 Jakub Jelinek <jakub@redhat.com>
16065 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
16066 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
16067 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
16068 * fold-const-call.cc (fold_const_call): ... here.
16070 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
16072 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
16073 Rename to <su>abd<mode>3.
16074 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
16077 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
16079 * doc/md.texi (sabd, uabd): Document them.
16080 * internal-fn.def (ABD): Use new optab.
16081 * optabs.def (sabd_optab, uabd_optab): New optabs,
16082 * tree-vect-patterns.cc (vect_recog_absolute_difference):
16083 Recognize the following idiom abs (a - b).
16084 (vect_recog_sad_pattern): Refactor to use
16085 vect_recog_absolute_difference.
16086 (vect_recog_abd_pattern): Use patterns found by
16087 vect_recog_absolute_difference to build a new ABD
16090 2023-06-15 chenxiaolong <chenxl04200420@163.com>
16092 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
16093 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
16095 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16097 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
16098 (expand_vec_perm_const_1): Add merge optmization.
16100 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
16103 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
16104 (riscv_pass_by_reference): Return true for vector mode
16106 2023-06-15 Pan Li <pan2.li@intel.com>
16108 * config/riscv/autovec-opt.md: Align the predictor sytle.
16109 * config/riscv/autovec.md: Ditto.
16111 2023-06-15 Pan Li <pan2.li@intel.com>
16113 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
16114 Take elen instead of scalar BITS_PER_WORD.
16115 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
16116 instead of scaler BITS_PER_WORD.
16118 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16120 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
16122 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16124 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
16125 Fix signed comparison warning in loop from npats to enelts.
16127 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
16129 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
16130 to offloading compilation.
16131 * config/gcn/mkoffload.cc (main): Adjust.
16132 * config/nvptx/mkoffload.cc (main): Likewise.
16133 * doc/invoke.texi (foffload-options): Update example.
16135 2023-06-14 liuhongt <hongtao.liu@intel.com>
16138 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
16139 for alternative 2 since there's no evex version for vpcmpeqd
16142 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
16144 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
16146 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
16148 * config/sh/divtab.cc: Remove.
16150 2023-06-13 Jakub Jelinek <jakub@redhat.com>
16152 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
16153 superfluous spaces around \t for vpcmpeqd.
16155 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
16157 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
16158 clearing vectors with only a single element. Set CLEARED if the
16159 vector was initialized to zero.
16161 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
16163 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
16166 (TUPLE_ENTRY): Undef.
16168 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16170 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
16171 (shuffle_generic_patterns): Ditto.
16172 (expand_vec_perm_const_1): Ditto.
16174 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16176 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
16177 (shuffle_decompress_patterns): Ditto.
16179 2023-06-13 Richard Biener <rguenther@suse.de>
16181 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
16183 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
16184 Kito Cheng <kito.cheng@sifive.com>
16186 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
16187 warning flag if func is not builtin
16188 * config/riscv/riscv.cc
16189 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
16190 (riscv_arg_has_vector): Determine whether the arg is vector type.
16191 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
16192 (riscv_init_cumulative_args): The same as header.
16193 (riscv_get_arg_info): Add the checking.
16194 (riscv_function_value): Check the func return and set warning flag
16195 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
16196 determine whether warning psabi or not.
16198 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16200 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
16201 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
16202 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
16203 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
16205 (arm_output_load_tpidr): Define.
16206 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
16207 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
16209 (reload_tp_hard): Likewise.
16210 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
16212 * doc/invoke.texi (Arm Options, mtp): Document new values.
16214 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16217 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
16218 AARCH64_TPIDRRO_EL0 value.
16219 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
16220 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
16221 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
16222 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
16224 2023-06-13 Alexandre Oliva <oliva@adacore.com>
16226 * range-op-float.cc (frange_nextafter): Drop inline.
16227 (frelop_early_resolve): Add static.
16228 (frange_float): Likewise.
16230 2023-06-13 Richard Biener <rguenther@suse.de>
16232 PR middle-end/110232
16233 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
16234 to check whether the buffer covers the whole vector.
16236 2023-06-13 Richard Biener <rguenther@suse.de>
16238 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
16239 .MASK_LOAD and friends set the size of the access to unknown.
16241 2023-06-13 Tejas Belagod <tbelagod@arm.com>
16244 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
16245 calls that have a constant input predicate vector.
16246 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
16247 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
16248 (svlast_impl::vect_all_same): Check if all vector elements are equal.
16250 2023-06-13 Andi Kleen <ak@linux.intel.com>
16252 * config/i386/gcc-auto-profile: Regenerate.
16254 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16256 * config/riscv/vector-iterators.md: Fix requirement.
16258 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16260 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
16261 (shuffle_decompress_patterns): New function.
16262 (expand_vec_perm_const_1): Add decompress optimization.
16264 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
16266 PR rtl-optimization/101188
16267 * postreload.cc (reload_cse_move2add_invalidate): New function,
16269 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
16271 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16273 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
16274 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
16275 and if maxv == 1, use constant element for duplicating into register.
16277 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
16279 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
16280 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
16281 (gimplify_adjust_omp_clauses): Change
16282 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
16283 GOMP_MAP_FORCE_PRESENT.
16284 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
16285 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
16286 to/from clauses with present modifier.
16288 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16290 PR tree-optimization/110205
16291 * range-op-float.cc (range_operator::fold_range): Add default FII
16293 * range-op-mixed.h (class operator_gt): Add missing final overrides.
16294 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
16295 (operator_lshift ::update_bitmask): Add final override.
16296 (operator_rshift ::update_bitmask): Add final override.
16297 * range-op.h (range_operator::fold_range): Add FII prototype.
16299 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16301 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
16302 Use range_op_handler directly.
16303 * range-op.cc (range_op_handler::range_op_handler): Unsigned
16304 param instead of tree-code.
16305 (ptr_op_widen_plus_signed): Delete.
16306 (ptr_op_widen_plus_unsigned): Delete.
16307 (ptr_op_widen_mult_signed): Delete.
16308 (ptr_op_widen_mult_unsigned): Delete.
16309 (range_op_table::initialize_integral_ops): Add new opcodes.
16310 * range-op.h (range_op_handler): Use unsigned.
16311 (OP_WIDEN_MULT_SIGNED): New.
16312 (OP_WIDEN_MULT_UNSIGNED): New.
16313 (OP_WIDEN_PLUS_SIGNED): New.
16314 (OP_WIDEN_PLUS_UNSIGNED): New.
16315 (RANGE_OP_TABLE_SIZE): New.
16316 (range_op_table::operator []): Use unsigned.
16317 (range_op_table::set): Use unsigned.
16318 (m_range_tree): Make unsigned.
16319 (ptr_op_widen_mult_signed): Remove.
16320 (ptr_op_widen_mult_unsigned): Remove.
16321 (ptr_op_widen_plus_signed): Remove.
16322 (ptr_op_widen_plus_unsigned): Remove.
16324 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16326 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
16327 manually as there is no access to the default operator.
16328 (cfn_copysign::fold_range): Don't check for validity.
16329 (cfn_ubsan::fold_range): Ditto.
16330 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
16331 * range-op.cc (default_operator): New.
16332 (range_op_handler::range_op_handler): Use default_operator
16334 (range_op_handler::operator bool): Move from header, compare
16335 against default operator.
16336 (range_op_handler::range_op): New.
16337 * range-op.h (range_op_handler::operator bool): Move.
16339 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16341 * range-op.cc (unified_table): Delete.
16342 (range_op_table operator_table): Instantiate.
16343 (range_op_table::range_op_table): Rename from unified_table.
16344 (range_op_handler::range_op_handler): Use range_op_table.
16345 * range-op.h (range_op_table::operator []): Inline.
16346 (range_op_table::set): Inline.
16348 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16350 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
16352 * gimple-range-op.cc (get_code): Rename from get_code_and_type
16354 (gimple_range_op_handler::supported_p): No need for type.
16355 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
16356 (cfn_copysign::fold_range): Ditto.
16357 (cfn_ubsan::fold_range): Ditto.
16358 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
16359 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
16360 * range-op-float.cc (operator_plus::op1_range): Ditto.
16361 (operator_mult::op1_range): Ditto.
16362 (range_op_float_tests): Ditto.
16363 * range-op.cc (get_op_handler): Remove.
16364 (range_op_handler::set_op_handler): Remove.
16365 (operator_plus::op1_range): No need for type.
16366 (operator_minus::op1_range): Ditto.
16367 (operator_mult::op1_range): Ditto.
16368 (operator_exact_divide::op1_range): Ditto.
16369 (operator_cast::op1_range): Ditto.
16370 (perator_bitwise_not::fold_range): Ditto.
16371 (operator_negate::fold_range): Ditto.
16372 * range-op.h (range_op_handler::range_op_handler): Remove type param.
16373 (range_cast): No need for type.
16374 (range_op_table::operator[]): Check for enum_code >= 0.
16375 * tree-data-ref.cc (compute_distributive_range): No need for type.
16376 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
16377 * value-query.cc (range_query::get_tree_range): Ditto.
16378 * value-relation.cc (relation_oracle::validate_relation): Ditto.
16379 * vr-values.cc (range_of_var_in_loop): Ditto.
16380 (simplify_using_ranges::fold_cond_with_ops): Ditto.
16382 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16384 * range-op-mixed.h (operator_max): Remove final.
16385 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
16386 (pointer_table::pointer_table): Remove.
16387 (class hybrid_max_operator): New.
16388 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
16389 * range-op.cc (pointer_tree_table): Remove.
16390 (unified_table::unified_table): Comment out MAX_EXPR.
16391 (get_op_handler): Remove check of pointer table.
16392 * range-op.h (class pointer_table): Remove.
16394 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16396 * range-op-mixed.h (operator_min): Remove final.
16397 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
16398 (class hybrid_min_operator): New.
16399 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
16400 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
16402 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16404 * range-op-mixed.h (operator_bitwise_or): Remove final.
16405 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
16406 (class hybrid_or_operator): New.
16407 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
16408 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
16410 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16412 * range-op-mixed.h (operator_bitwise_and): Remove final.
16413 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
16414 (class hybrid_and_operator): New.
16415 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
16416 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
16418 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16420 * Makefile.in (OBJS): Add range-op-ptr.o.
16421 * range-op-mixed.h (update_known_bitmask): Move prototype here.
16422 (minus_op1_op2_relation_effect): Move prototype here.
16423 (wi_includes_zero_p): Move function to here.
16424 (wi_zero_p): Ditto.
16425 * range-op.cc (update_known_bitmask): Remove static.
16426 (wi_includes_zero_p): Move to header.
16427 (wi_zero_p): Move to header.
16428 (minus_op1_op2_relation_effect): Remove static.
16429 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
16430 (pointer_plus_operator): Ditto.
16431 (pointer_min_max_operator): Ditto.
16432 (pointer_and_operator): Ditto.
16433 (pointer_or_operator): Ditto.
16434 (pointer_table): Ditto.
16435 (range_op_table::initialize_pointer_ops): Ditto.
16436 * range-op-ptr.cc: New.
16438 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16440 * range-op-mixed.h (class operator_max): Move from...
16441 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
16442 (get_op_handler): Remove the integral table.
16443 (class operator_max): Move from here.
16444 (integral_table::integral_table): Delete.
16445 * range-op.h (class integral_table): Delete.
16447 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16449 * range-op-mixed.h (class operator_min): Move from...
16450 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
16451 (class operator_min): Move from here.
16452 (integral_table::integral_table): Remove MIN_EXPR.
16454 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16456 * range-op-mixed.h (class operator_bitwise_or): Move from...
16457 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
16458 (class operator_bitwise_or): Move from here.
16459 (integral_table::integral_table): Remove BIT_IOR_EXPR.
16461 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16463 * range-op-mixed.h (class operator_bitwise_and): Move from...
16464 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
16465 (get_op_handler): Check for a pointer table entry first.
16466 (class operator_bitwise_and): Move from here.
16467 (integral_table::integral_table): Remove BIT_AND_EXPR.
16469 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16471 * range-op-mixed.h (class operator_bitwise_xor): Move from...
16472 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
16473 (class operator_bitwise_xor): Move from here.
16474 (integral_table::integral_table): Remove BIT_XOR_EXPR.
16475 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
16477 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16479 * range-op-mixed.h (class operator_bitwise_not): Move from...
16480 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
16481 (class operator_bitwise_not): Move from here.
16482 (integral_table::integral_table): Remove BIT_NOT_EXPR.
16483 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
16485 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
16487 * range-op-mixed.h (class operator_addr_expr): Move from...
16488 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
16489 (class operator_addr_expr): Move from here.
16490 (integral_table::integral_table): Remove ADDR_EXPR.
16491 (pointer_table::pointer_table): Remove ADDR_EXPR.
16493 2023-06-12 Pan Li <pan2.li@intel.com>
16495 * config/riscv/riscv-vector-builtins-types.def
16496 (vfloat16m1_t): Add type to lmul1 ops.
16497 (vfloat16m2_t): Likewise.
16498 (vfloat16m4_t): Likewise.
16500 2023-06-12 Richard Biener <rguenther@suse.de>
16502 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
16503 .MASK_STORE and friend set the size of the access to
16506 2023-06-12 Tamar Christina <tamar.christina@arm.com>
16508 * config.in: Regenerate.
16509 * configure: Regenerate.
16510 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
16512 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16514 * config/riscv/autovec-opt.md
16515 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
16516 (*<any_shiftrt:optab>trunc<mode>): Ditto.
16517 * config/riscv/autovec.md (<optab><mode>3): Change to
16518 define_insn_and_split.
16519 (v<optab><mode>3): Ditto.
16520 (trunc<mode><v_double_trunc>2): Ditto.
16522 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16524 * simplify-rtx.cc (simplify_const_unary_operation):
16525 Handle US_TRUNCATE, SS_TRUNCATE.
16527 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
16530 * doc/gm2.texi (Standard procedures): Fix Next link.
16532 2023-06-12 Tamar Christina <tamar.christina@arm.com>
16534 * config.in: Regenerate.
16536 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
16538 PR middle-end/110142
16539 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
16540 subtype to vect_widened_op_tree and remove subtype parameter, also
16541 remove superfluous overloaded function definition.
16542 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
16543 to call to vect_recog_widen_op_pattern.
16544 (vect_recog_widen_minus_pattern): Likewise.
16546 2023-06-12 liuhongt <hongtao.liu@intel.com>
16548 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
16549 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
16550 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
16551 (vec_unpacks_lo_<mode>): Ditto.
16552 (vec_unpacks_hi_<mode>): Ditto.
16553 (sse_movlhps_<mode>): New define_insn.
16554 (ssse3_palignr<mode>_perm): Extend to V_128H.
16555 (V_128H): New mode iterator.
16556 (ssepackPHmode): New mode attribute.
16557 (vunpck_extract_mode): Ditto.
16558 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
16559 (vpckfloat_temp_mode): Ditto.
16560 (vpckfloat_op_mode): Ditto.
16561 (vunpckfixt_mode): Extend to VxHF.
16562 (vunpckfixt_model): Ditto.
16563 (vunpckfixt_extract_mode): Ditto.
16565 2023-06-12 Richard Biener <rguenther@suse.de>
16567 PR middle-end/110200
16568 * genmatch.cc (expr::gen_transform): Put braces around
16569 the if arm for the (convert ...) short-cut.
16571 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
16574 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
16575 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
16577 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
16580 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
16581 floating constant itself for real_to_target call.
16583 2023-06-12 Pan Li <pan2.li@intel.com>
16585 * config/riscv/riscv-vector-builtins-types.def
16586 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
16587 (vfloat16mf2_t): Ditto.
16588 (vfloat16m1_t): Ditto.
16589 (vfloat16m2_t): Ditto.
16590 (vfloat16m4_t): Ditto.
16592 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
16594 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
16595 Do not require a stack frame when debugging is enabled for AIX.
16597 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
16599 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
16600 Remove attribute values.
16601 (insv_notbit): New post-reload insn.
16602 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
16603 (*insv.not-bit.0_split, *insv.not-bit.7_split)
16604 (*insv.xor-extract_split): Split to insv_notbit.
16605 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
16606 (*insv.xor-extract): Remove post-reload insns.
16607 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
16608 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
16609 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
16610 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
16612 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
16615 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
16616 (MSB, SIZE): New mode attributes.
16617 (any_shift): New code iterator.
16618 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
16619 (*lshr<mode>3_const_split): Add constraint alternative for
16620 the case of shift-offset = MSB. Ditch "length" attribute.
16621 (extzv<mode): New. replaces extzv. Adjust following patterns.
16622 Use avr_out_extr, avr_out_extr_not to print asm.
16623 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
16624 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
16625 * config/avr/constraints.md (C15, C23, C31, Yil): New
16626 * config/avr/predicates.md (reg_or_low_io_operand)
16627 (const7_operand, reg_or_low_io_operand)
16628 (const15_operand, const_0_to_15_operand)
16629 (const23_operand, const_0_to_23_operand)
16630 (const31_operand, const_0_to_31_operand): New.
16631 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
16632 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
16633 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
16634 MSB case to new insn constraint "r" for operands[1].
16635 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
16636 Handle these cases.
16637 (avr_rtx_costs_1): Adjust cost for a new pattern.
16639 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16641 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
16642 (vector_insn_info::parse_insn): Add rtx_insn parse.
16643 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
16644 (get_first_vsetvl): New function.
16645 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
16646 (pass_vsetvl::cleanup_insns): Remove it.
16647 (pass_vsetvl::ssa_post_optimization): New function.
16648 (has_no_uses): Ditto.
16649 (pass_vsetvl::propagate_avl): Remove it.
16650 (pass_vsetvl::df_post_optimization): New function.
16651 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
16652 * config/riscv/riscv-vsetvl.h: Adapt declaration.
16654 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
16656 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
16657 (ipcp_vr_lattice::print): Call dump method.
16658 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
16660 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
16661 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
16663 (initialize_node_lattices): Pass type when appropriate.
16664 (ipa_vr_operation_and_type_effects): Make type agnostic.
16665 (ipa_value_range_from_jfunc): Same.
16666 (propagate_vr_across_jump_function): Same.
16667 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
16668 (evaluate_properties_for_edge): Same.
16669 * ipa-prop.cc (ipa_vr::get_vrange): Same.
16670 (ipcp_update_vr): Same.
16671 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
16672 (ipa_range_set_and_normalize): Same.
16674 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
16678 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
16679 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
16680 (avr_pass_data_ifelse): New pass_data for it.
16681 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
16682 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
16683 (avr_out_cmp_ext): New functions.
16684 (compare_condtition): Make sure REG_CC dies in the branch insn.
16685 (avr_rtx_costs_1): Add computation of cbranch costs.
16686 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
16687 [ADJUST_LEN_CMP_SEXT]Handle them.
16688 (TARGET_CANONICALIZE_COMPARISON): New define.
16689 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
16690 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
16691 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
16692 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
16693 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
16694 (avr_out_cmp_zext): New Protos
16695 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
16696 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
16697 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
16698 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
16699 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
16700 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
16701 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
16702 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
16703 (adjust_len) [add_set_ZN, cmp_zext]: New.
16704 (QIPSI): New mode iterator.
16705 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
16706 (gelt): New code iterator.
16707 (gelt_eqne): New code attribute.
16708 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
16709 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
16710 (*cmpqi_sign_extend): Remove insns.
16711 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
16712 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
16713 * config/avr/predicates.md (scratch_or_d_register_operand): New.
16714 * config/avr/constraints.md (Yxx): New constraint.
16716 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16718 * config/riscv/autovec.md (select_vl<mode>): New pattern.
16719 * config/riscv/riscv-protos.h (expand_select_vl): New function.
16720 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
16722 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16724 * range-op-float.cc (foperator_mult_div_base): Delete.
16725 (foperator_mult_div_base::find_range): Make static local function.
16726 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
16727 (operator_mult::op1_range): Rename from foperator_mult.
16728 (operator_mult::op2_range): Ditto.
16729 (operator_mult::rv_fold): Ditto.
16730 (float_table::float_table): Remove MULT_EXPR.
16731 (class foperator_div): Inherit from range_operator.
16732 (float_table::float_table): Delete.
16733 * range-op-mixed.h (class operator_mult): Combined from integer
16735 * range-op.cc (float_tree_table): Delete.
16736 (op_mult): New object.
16737 (unified_table::unified_table): Add MULT_EXPR.
16738 (get_op_handler): Do not check float table any longer.
16739 (class cross_product_operator): Move to range-op-mixed.h.
16740 (class operator_mult): Move to range-op-mixed.h.
16741 (integral_table::integral_table): Remove MULT_EXPR.
16742 (pointer_table::pointer_table): Remove MULT_EXPR.
16743 * range-op.h (float_table): Remove.
16745 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16747 * range-op-float.cc (foperator_negate): Remove. Move prototypes
16748 to range-op-mixed.h
16749 (operator_negate::fold_range): Rename from foperator_negate.
16750 (operator_negate::op1_range): Ditto.
16751 (float_table::float_table): Remove NEGATE_EXPR.
16752 * range-op-mixed.h (class operator_negate): Combined from integer
16754 * range-op.cc (op_negate): New object.
16755 (unified_table::unified_table): Add NEGATE_EXPR.
16756 (class operator_negate): Move to range-op-mixed.h.
16757 (integral_table::integral_table): Remove NEGATE_EXPR.
16758 (pointer_table::pointer_table): Remove NEGATE_EXPR.
16760 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16762 * range-op-float.cc (foperator_minus): Remove. Move prototypes
16763 to range-op-mixed.h
16764 (operator_minus::fold_range): Rename from foperator_minus.
16765 (operator_minus::op1_range): Ditto.
16766 (operator_minus::op2_range): Ditto.
16767 (operator_minus::rv_fold): Ditto.
16768 (float_table::float_table): Remove MINUS_EXPR.
16769 * range-op-mixed.h (class operator_minus): Combined from integer
16771 * range-op.cc (op_minus): New object.
16772 (unified_table::unified_table): Add MINUS_EXPR.
16773 (class operator_minus): Move to range-op-mixed.h.
16774 (integral_table::integral_table): Remove MINUS_EXPR.
16775 (pointer_table::pointer_table): Remove MINUS_EXPR.
16777 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16779 * range-op-float.cc (foperator_abs): Remove. Move prototypes
16780 to range-op-mixed.h
16781 (operator_abs::fold_range): Rename from foperator_abs.
16782 (operator_abs::op1_range): Ditto.
16783 (float_table::float_table): Remove ABS_EXPR.
16784 * range-op-mixed.h (class operator_abs): Combined from integer
16786 * range-op.cc (op_abs): New object.
16787 (unified_table::unified_table): Add ABS_EXPR.
16788 (class operator_abs): Move to range-op-mixed.h.
16789 (integral_table::integral_table): Remove ABS_EXPR.
16790 (pointer_table::pointer_table): Remove ABS_EXPR.
16792 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16794 * range-op-float.cc (foperator_plus): Remove. Move prototypes
16795 to range-op-mixed.h
16796 (operator_plus::fold_range): Rename from foperator_plus.
16797 (operator_plus::op1_range): Ditto.
16798 (operator_plus::op2_range): Ditto.
16799 (operator_plus::rv_fold): Ditto.
16800 (float_table::float_table): Remove PLUS_EXPR.
16801 * range-op-mixed.h (class operator_plus): Combined from integer
16803 * range-op.cc (op_plus): New object.
16804 (unified_table::unified_table): Add PLUS_EXPR.
16805 (class operator_plus): Move to range-op-mixed.h.
16806 (integral_table::integral_table): Remove PLUS_EXPR.
16807 (pointer_table::pointer_table): Remove PLUS_EXPR.
16809 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16811 * range-op-mixed.h (class operator_cast): Combined from integer
16813 * range-op.cc (op_cast): New object.
16814 (unified_table::unified_table): Add op_cast
16815 (class operator_cast): Move to range-op-mixed.h.
16816 (integral_table::integral_table): Remove op_cast
16817 (pointer_table::pointer_table): Remove op_cast.
16819 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16821 * range-op-float.cc (operator_cst::fold_range): New.
16822 * range-op-mixed.h (class operator_cst): Move from integer file.
16823 * range-op.cc (op_cst): New object.
16824 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
16825 (class operator_cst): Move to range-op-mixed.h.
16826 (integral_table::integral_table): Remove op_cst.
16827 (pointer_table::pointer_table): Remove op_cst.
16829 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16831 * range-op-float.cc (foperator_identity): Remove. Move prototypes
16832 to range-op-mixed.h
16833 (operator_identity::fold_range): Rename from foperator_identity.
16834 (operator_identity::op1_range): Ditto.
16835 (float_table::float_table): Remove fop_identity.
16836 * range-op-mixed.h (class operator_identity): Combined from integer
16838 * range-op.cc (op_identity): New object.
16839 (unified_table::unified_table): Add op_identity.
16840 (class operator_identity): Move to range-op-mixed.h.
16841 (integral_table::integral_table): Remove identity.
16842 (pointer_table::pointer_table): Remove identity.
16844 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16846 * range-op-float.cc (foperator_ge): Remove. Move prototypes
16847 to range-op-mixed.h
16848 (operator_ge::fold_range): Rename from foperator_ge.
16849 (operator_ge::op1_range): Ditto.
16850 (float_table::float_table): Remove GE_EXPR.
16851 * range-op-mixed.h (class operator_ge): Combined from integer
16853 * range-op.cc (op_ge): New object.
16854 (unified_table::unified_table): Add GE_EXPR.
16855 (class operator_ge): Move to range-op-mixed.h.
16856 (ge_op1_op2_relation): Fold into
16857 operator_ge::op1_op2_relation.
16858 (integral_table::integral_table): Remove GE_EXPR.
16859 (pointer_table::pointer_table): Remove GE_EXPR.
16860 * range-op.h (ge_op1_op2_relation): Delete.
16862 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16864 * range-op-float.cc (foperator_gt): Remove. Move prototypes
16865 to range-op-mixed.h
16866 (operator_gt::fold_range): Rename from foperator_gt.
16867 (operator_gt::op1_range): Ditto.
16868 (float_table::float_table): Remove GT_EXPR.
16869 * range-op-mixed.h (class operator_gt): Combined from integer
16871 * range-op.cc (op_gt): New object.
16872 (unified_table::unified_table): Add GT_EXPR.
16873 (class operator_gt): Move to range-op-mixed.h.
16874 (gt_op1_op2_relation): Fold into
16875 operator_gt::op1_op2_relation.
16876 (integral_table::integral_table): Remove GT_EXPR.
16877 (pointer_table::pointer_table): Remove GT_EXPR.
16878 * range-op.h (gt_op1_op2_relation): Delete.
16880 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16882 * range-op-float.cc (foperator_le): Remove. Move prototypes
16883 to range-op-mixed.h
16884 (operator_le::fold_range): Rename from foperator_le.
16885 (operator_le::op1_range): Ditto.
16886 (float_table::float_table): Remove LE_EXPR.
16887 * range-op-mixed.h (class operator_le): Combined from integer
16889 * range-op.cc (op_le): New object.
16890 (unified_table::unified_table): Add LE_EXPR.
16891 (class operator_le): Move to range-op-mixed.h.
16892 (le_op1_op2_relation): Fold into
16893 operator_le::op1_op2_relation.
16894 (integral_table::integral_table): Remove LE_EXPR.
16895 (pointer_table::pointer_table): Remove LE_EXPR.
16896 * range-op.h (le_op1_op2_relation): Delete.
16898 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16900 * range-op-float.cc (foperator_lt): Remove. Move prototypes
16901 to range-op-mixed.h
16902 (operator_lt::fold_range): Rename from foperator_lt.
16903 (operator_lt::op1_range): Ditto.
16904 (float_table::float_table): Remove LT_EXPR.
16905 * range-op-mixed.h (class operator_lt): Combined from integer
16907 * range-op.cc (op_lt): New object.
16908 (unified_table::unified_table): Add LT_EXPR.
16909 (class operator_lt): Move to range-op-mixed.h.
16910 (lt_op1_op2_relation): Fold into
16911 operator_lt::op1_op2_relation.
16912 (integral_table::integral_table): Remove LT_EXPR.
16913 (pointer_table::pointer_table): Remove LT_EXPR.
16914 * range-op.h (lt_op1_op2_relation): Delete.
16916 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16918 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
16919 to range-op-mixed.h
16920 (operator_equal::fold_range): Rename from foperator_not_equal.
16921 (operator_equal::op1_range): Ditto.
16922 (float_table::float_table): Remove NE_EXPR.
16923 * range-op-mixed.h (class operator_not_equal): Combined from integer
16925 * range-op.cc (op_equal): New object.
16926 (unified_table::unified_table): Add NE_EXPR.
16927 (class operator_not_equal): Move to range-op-mixed.h.
16928 (not_equal_op1_op2_relation): Fold into
16929 operator_not_equal::op1_op2_relation.
16930 (integral_table::integral_table): Remove NE_EXPR.
16931 (pointer_table::pointer_table): Remove NE_EXPR.
16932 * range-op.h (not_equal_op1_op2_relation): Delete.
16934 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16936 * range-op-float.cc (foperator_equal): Remove. Move prototypes
16937 to range-op-mixed.h
16938 (operator_equal::fold_range): Rename from foperator_equal.
16939 (operator_equal::op1_range): Ditto.
16940 (float_table::float_table): Remove EQ_EXPR.
16941 * range-op-mixed.h (class operator_equal): Combined from integer
16943 * range-op.cc (op_equal): New object.
16944 (unified_table::unified_table): Add EQ_EXPR.
16945 (class operator_equal): Move to range-op-mixed.h.
16946 (equal_op1_op2_relation): Fold into
16947 operator_equal::op1_op2_relation.
16948 (integral_table::integral_table): Remove EQ_EXPR.
16949 (pointer_table::pointer_table): Remove EQ_EXPR.
16950 * range-op.h (equal_op1_op2_relation): Delete.
16952 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16954 * range-op-float.cc (class float_table): Move to header.
16955 (float_table::float_table): Move float only operators to...
16956 (range_op_table::initialize_float_ops): Here.
16957 * range-op-mixed.h: New.
16958 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
16960 (float_tree_table): Moved from range-op-float.cc.
16961 (unified_tree_table): New.
16962 (unified_table::unified_table): New. Call initialize routines.
16963 (get_op_handler): Check unified table first.
16964 (range_op_handler::range_op_handler): Handle no type constructor.
16965 (integral_table::integral_table): Move integral only operators to...
16966 (range_op_table::initialize_integral_ops): Here.
16967 (pointer_table::pointer_table): Move pointer only operators to...
16968 (range_op_table::initialize_pointer_ops): Here.
16969 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
16970 (get_bool_state): Ditto.
16971 (empty_range_varying): Ditto.
16972 (relop_early_resolve): Ditto.
16973 (class range_op_table): Add new init methods for range types.
16974 (class integral_table): Move declaration to here.
16975 (class pointer_table): Move declaration to here.
16976 (class float_table): Move declaration to here.
16978 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16979 Richard Sandiford <richard.sandiford@arm.com>
16980 Richard Biener <rguenther@suse.de>
16982 * doc/md.texi: Add SELECT_VL support.
16983 * internal-fn.def (SELECT_VL): Ditto.
16984 * optabs.def (OPTAB_D): Ditto.
16985 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
16986 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
16987 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
16988 (vectorizable_store): Ditto.
16989 (vectorizable_load): Ditto.
16990 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
16992 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
16995 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
16998 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
17000 * range-op.cc (range_cast): Move to...
17001 * range-op.h (range_cast): Here and add generic a version.
17003 2023-06-09 Marek Polacek <polacek@redhat.com>
17007 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
17008 warn about designated initializers in C only.
17010 2023-06-09 Andrew Pinski <apinski@marvell.com>
17012 PR tree-optimization/97711
17013 PR tree-optimization/110155
17014 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
17015 ((zero_one != 0) ? z <op> y : y): Likewise.
17017 2023-06-09 Andrew Pinski <apinski@marvell.com>
17019 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
17020 multiply rather than negation/bit_and.
17022 2023-06-09 Andrew Pinski <apinski@marvell.com>
17024 * match.pd (`X & -Y -> X * Y`): Allow for truncation
17025 and the same type for unsigned types.
17027 2023-06-09 Andrew Pinski <apinski@marvell.com>
17029 PR tree-optimization/110165
17030 PR tree-optimization/110166
17031 * match.pd (zero_one_valued_p): Don't accept
17032 signed 1-bit integers.
17034 2023-06-09 Richard Biener <rguenther@suse.de>
17036 * match.pd (two conversions in a row): Use element_precision
17037 to DTRT for VECTOR_TYPE.
17039 2023-06-09 Pan Li <pan2.li@intel.com>
17041 * config/riscv/riscv.md (enabled): Move to another place, and
17042 add fp_vector_disabled to the cond.
17043 (fp_vector_disabled): New attr defined for disabling fp.
17044 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
17046 2023-06-09 Pan Li <pan2.li@intel.com>
17048 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
17051 2023-06-09 liuhongt <hongtao.liu@intel.com>
17054 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
17055 view_convert_expr mask to signed type when folding pblendvb
17058 2023-06-09 liuhongt <hongtao.liu@intel.com>
17061 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
17062 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
17063 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
17065 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
17066 real codename for __builtin_ia32_pabs{b,w,d}.
17068 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
17070 * gimple-range-op.cc
17071 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
17072 (gimple_range_op_handler::maybe_builtin_call): Adjust.
17073 * gimple-range-op.h (operand1, operand2): Use m_operator.
17074 * range-op.cc (integral_table, pointer_table): Relocate.
17075 (get_op_handler): Rename from get_handler and handle all types.
17076 (range_op_handler::range_op_handler): Relocate.
17077 (range_op_handler::set_op_handler): Relocate and adjust.
17078 (range_op_handler::range_op_handler): Relocate.
17079 (dispatch_trio): New.
17080 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
17081 (range_op_handler::dispatch_kind): New.
17082 (range_op_handler::fold_range): Relocate and Use new dispatch value.
17083 (range_op_handler::op1_range): Ditto.
17084 (range_op_handler::op2_range): Ditto.
17085 (range_op_handler::lhs_op1_relation): Ditto.
17086 (range_op_handler::lhs_op2_relation): Ditto.
17087 (range_op_handler::op1_op2_relation): Ditto.
17088 (range_op_handler::set_op_handler): Use m_operator member.
17089 * range-op.h (range_op_handler::operator bool): Use m_operator.
17090 (range_op_handler::dispatch_kind): New.
17091 (range_op_handler::m_valid): Delete.
17092 (range_op_handler::m_int): Delete
17093 (range_op_handler::m_float): Delete
17094 (range_op_handler::m_operator): New.
17095 (range_op_table::operator[]): Relocate from .cc file.
17096 (range_op_table::set): Ditto.
17097 * value-range.h (class vrange): Make range_op_handler a friend.
17099 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
17101 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
17102 (cfn_pass_through_arg1): Adjust using statemenmt.
17103 (cfn_signbit): Change base class, adjust using statement.
17104 (cfn_copysign): Ditto.
17106 (cfn_sincos): Ditto.
17107 * range-op-float.cc (fold_range): Change class to range_operator.
17111 (lhs_op1_relation): Ditto.
17112 (lhs_op2_relation): Ditto.
17113 (op1_op2_relation): Ditto.
17114 (foperator_*): Ditto.
17115 (class float_table): New. Inherit from range_op_table.
17116 (floating_tree_table) Change to range_op_table pointer.
17117 (class floating_op_table): Delete.
17118 * range-op.cc (operator_equal): Adjust using statement.
17119 (operator_not_equal): Ditto.
17120 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
17121 (operator_minus, operator_cast): Ditto.
17122 (operator_bitwise_and, pointer_plus_operator): Ditto.
17123 (get_float_handle): Change return type.
17124 * range-op.h (range_operator_float): Delete. Relocate all methods
17125 into class range_operator.
17126 (range_op_handler::m_float): Change type to range_operator.
17127 (floating_op_table): Delete.
17128 (floating_tree_table): Change type.
17130 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
17132 * range-op.cc (range_operator::fold_range): Call virtual routine.
17133 (range_operator::update_bitmask): New.
17134 (operator_equal::update_bitmask): New.
17135 (operator_not_equal::update_bitmask): New.
17136 (operator_lt::update_bitmask): New.
17137 (operator_le::update_bitmask): New.
17138 (operator_gt::update_bitmask): New.
17139 (operator_ge::update_bitmask): New.
17140 (operator_ge::update_bitmask): New.
17141 (operator_plus::update_bitmask): New.
17142 (operator_minus::update_bitmask): New.
17143 (operator_pointer_diff::update_bitmask): New.
17144 (operator_min::update_bitmask): New.
17145 (operator_max::update_bitmask): New.
17146 (operator_mult::update_bitmask): New.
17147 (operator_div:operator_div):New.
17148 (operator_div::update_bitmask): New.
17149 (operator_div::m_code): New member.
17150 (operator_exact_divide::operator_exact_divide): New constructor.
17151 (operator_lshift::update_bitmask): New.
17152 (operator_rshift::update_bitmask): New.
17153 (operator_bitwise_and::update_bitmask): New.
17154 (operator_bitwise_or::update_bitmask): New.
17155 (operator_bitwise_xor::update_bitmask): New.
17156 (operator_trunc_mod::update_bitmask): New.
17157 (op_ident, op_unknown, op_ptr_min_max): New.
17158 (op_nop, op_convert): Delete.
17159 (op_ssa, op_paren, op_obj_type): Delete.
17160 (op_realpart, op_imagpart): Delete.
17161 (op_ptr_min, op_ptr_max): Delete.
17162 (pointer_plus_operator:update_bitmask): New.
17163 (range_op_table::set): Do not use m_code.
17164 (integral_table::integral_table): Adjust to single instances.
17165 * range-op.h (range_operator::range_operator): Delete.
17166 (range_operator::m_code): Delete.
17167 (range_operator::update_bitmask): New.
17169 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
17171 * range-op-float.cc (range_operator_float::fold_range): Return
17172 NAN of the result type.
17174 2023-06-08 Jakub Jelinek <jakub@redhat.com>
17176 * optabs.cc (expand_ffs): Add forward declaration.
17177 (expand_doubleword_clz): Rename to ...
17178 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
17179 handle also doubleword CTZ and FFS in addition to CLZ.
17180 (expand_unop): Adjust caller. Also call it for doubleword
17181 ctz_optab and ffs_optab.
17183 2023-06-08 Jakub Jelinek <jakub@redhat.com>
17186 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
17187 n_words == 2 recurse with mmx_ok as first argument rather than false.
17189 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
17191 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
17192 avoid sign extension/undefined behaviour when setting each bit.
17194 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
17195 Uros Bizjak <ubizjak@gmail.com>
17197 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
17198 Use new x86_stc instruction when the carry flag must be set.
17199 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
17200 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
17201 * config/i386/i386.h (TARGET_SLOW_STC): New define.
17202 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
17203 (x86_stc): New define_insn.
17204 (define_peephole2): Convert x86_stc into alternate implementation
17205 on pentium4 without -Os when a QImode register is available.
17206 (*x86_cmc): New define_insn.
17207 (define_peephole2): Convert *x86_cmc into alternate implementation
17208 on pentium4 without -Os when a QImode register is available.
17209 (*setccc): New define_insn_and_split for a no-op CCCmode move.
17210 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
17211 recognize (and eliminate) the carry flag being copied to itself.
17212 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
17213 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
17215 2023-06-07 Andrew Pinski <apinski@marvell.com>
17217 * match.pd: Fix comment for the
17218 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
17220 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
17221 Jeff Law <jlaw@ventanamicro.com>
17223 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
17224 (rotrsi3_sext): Expose generator.
17225 (rotlsi3 pattern): Hide generator.
17226 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
17228 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
17229 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
17230 (mulsi3, <optab>si3): Likewise.
17231 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
17232 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
17233 (<u>mulsidi3): Likewise.
17234 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
17235 (mulsi3_extended, <optab>si3_extended): Likewise.
17236 (splitter for shadd feeding divison): Update RTL pattern to account
17237 for changes in how 32 bit ops are expanded for TARGET_64BIT.
17238 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
17240 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
17243 * config/riscv/riscv.cc (riscv_print_operand): Calculate
17244 memmodel only when it is valid.
17246 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
17248 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
17249 for constant element of a vector.
17251 2023-06-07 Jakub Jelinek <jakub@redhat.com>
17253 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
17254 instead compare tree_nonzero_bits <= 1U rather than just == 1.
17256 2023-06-07 Alex Coplan <alex.coplan@arm.com>
17259 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
17261 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
17262 names for builtins.
17263 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
17264 setup if in_lto_p, just like we do for SVE.
17265 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
17266 (__arm_st64b): Delete.
17267 (__arm_st64bv): Delete.
17268 (__arm_st64bv0): Delete.
17270 2023-06-07 Alex Coplan <alex.coplan@arm.com>
17273 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
17274 Use input operand for the destination address.
17275 * config/aarch64/aarch64.md (st64b): Fix constraint on address
17278 2023-06-07 Alex Coplan <alex.coplan@arm.com>
17281 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
17282 Replace eight consecutive spaces with tabs.
17283 (aarch64_init_ls64_builtins): Likewise.
17284 (aarch64_expand_builtin_ls64): Likewise.
17285 * config/aarch64/aarch64.md (ld64b): Likewise.
17288 (st64bv0): Likewise.
17290 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
17292 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
17293 offset table pseudo to a general reg subset.
17295 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17297 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
17299 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
17301 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
17302 (aarch64_sqxtun2<mode>_le): Likewise.
17303 (aarch64_sqxtun2<mode>_be): Likewise.
17304 (aarch64_sqxtun2<mode>): Adjust for the above.
17305 (aarch64_sqmovun<mode>): New define_expand.
17306 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
17307 (half_mask): New mode attribute.
17308 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
17311 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17313 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
17315 (aarch64_addp<mode>_insn): ... This...
17316 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
17317 (aarch64_addp<mode>): New define_expand.
17319 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17321 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
17322 * config/riscv/riscv-v.cc
17323 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
17325 (rvv_builder::single_step_npatterns_p): New function.
17326 (rvv_builder::npatterns_all_equal_p): Ditto.
17327 (const_vec_all_in_range_p): Support POLY handling.
17328 (gen_const_vector_dup): Ditto.
17329 (emit_vlmax_gather_insn): Add vrgatherei16.
17330 (emit_vlmax_masked_gather_mu_insn): Ditto.
17331 (expand_const_vector): Add VLA SLP const vector support.
17332 (expand_vec_perm): Support POLY.
17333 (struct expand_vec_perm_d): New struct.
17334 (shuffle_generic_patterns): New function.
17335 (expand_vec_perm_const_1): Ditto.
17336 (expand_vec_perm_const): Ditto.
17337 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
17338 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
17340 2023-06-07 Andrew Pinski <apinski@marvell.com>
17342 PR middle-end/110117
17343 * expr.cc (expand_single_bit_test): Handle
17344 const_int from expand_expr.
17346 2023-06-07 Andrew Pinski <apinski@marvell.com>
17348 * expr.cc (do_store_flag): Rearrange the
17349 TER code so that it overrides the nonzero bits
17350 info if we had `a & POW2`.
17352 2023-06-07 Andrew Pinski <apinski@marvell.com>
17354 PR tree-optimization/110134
17355 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
17357 (-A CMP CST -> B CMP (-CST)): Likewise.
17359 2023-06-07 Andrew Pinski <apinski@marvell.com>
17361 PR tree-optimization/89263
17362 PR tree-optimization/99069
17363 PR tree-optimization/20083
17364 PR tree-optimization/94898
17365 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
17366 one of the operands are constant.
17368 2023-06-07 Andrew Pinski <apinski@marvell.com>
17370 * match.pd (zero_one_valued_p): Match 0 integer constant
17373 2023-06-07 Pan Li <pan2.li@intel.com>
17375 * config/riscv/riscv-vector-builtins-types.def
17376 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
17377 (vfloat32m1_t): Ditto.
17378 (vfloat32m2_t): Ditto.
17379 (vfloat32m4_t): Ditto.
17380 (vfloat32m8_t): Ditto.
17381 (vint16mf4_t): Ditto.
17382 (vint16mf2_t): Ditto.
17383 (vint16m1_t): Ditto.
17384 (vint16m2_t): Ditto.
17385 (vint16m4_t): Ditto.
17386 (vint16m8_t): Ditto.
17387 (vuint16mf4_t): Ditto.
17388 (vuint16mf2_t): Ditto.
17389 (vuint16m1_t): Ditto.
17390 (vuint16m2_t): Ditto.
17391 (vuint16m4_t): Ditto.
17392 (vuint16m8_t): Ditto.
17393 (vint32mf2_t): Ditto.
17394 (vint32m1_t): Ditto.
17395 (vint32m2_t): Ditto.
17396 (vint32m4_t): Ditto.
17397 (vint32m8_t): Ditto.
17398 (vuint32mf2_t): Ditto.
17399 (vuint32m1_t): Ditto.
17400 (vuint32m2_t): Ditto.
17401 (vuint32m4_t): Ditto.
17402 (vuint32m8_t): Ditto.
17404 2023-06-07 Jason Merrill <jason@redhat.com>
17407 * doc/invoke.texi: Document it.
17409 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
17411 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
17412 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
17413 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
17414 NOT (BITREVERSE x) as BITREVERSE (NOT x).
17415 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
17416 Optimize PARITY (BITREVERSE x) as PARITY x.
17417 Optimize BITREVERSE (BITREVERSE x) as x.
17418 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
17419 BITREVERSE of a constant integer at compile-time.
17420 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
17421 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
17422 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
17423 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
17424 Optimize COPYSIGN (x, ABS y) as ABS x.
17425 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
17426 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
17427 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
17428 arguments at compile-time.
17430 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
17432 * rtl.h (function_invariant_p): Change return type from int to bool.
17433 * reload1.cc (function_invariant_p): Change return type from
17434 int to bool and adjust function body accordingly.
17436 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17438 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
17439 (*single_<optab>mult_plus<mode>): Ditto.
17440 (*double_<optab>mult_plus<mode>): Ditto.
17441 (*sign_zero_extend_fma): Ditto.
17442 (*zero_sign_extend_fma): Ditto.
17443 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17445 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
17446 Tobias Burnus <tobias@codesourcery.com>
17448 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
17449 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
17451 (omp_get_attachment): Handle map clauses with 'present' modifier.
17452 (omp_group_base): Likewise.
17453 (gimplify_scan_omp_clauses): Reorder present maps to come first.
17454 Set GOVD flags for present defaultmaps.
17455 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
17456 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
17458 (lower_omp_target): Handle map clauses with 'present' modifier.
17459 Handle 'to' and 'from' clauses with 'present'.
17460 * tree-core.h (enum omp_clause_defaultmap_kind): Add
17461 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
17462 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
17463 'from' clauses with 'present' modifier. Handle present defaultmap.
17464 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
17466 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
17468 * config/rs6000/genfusion.pl: Delete some dead code.
17470 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
17472 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
17474 (gen_ld_cmpi_p10): ... this.
17476 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
17479 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
17480 duplicate expression.
17482 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17484 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
17485 Handle unsigned reduc_plus_scal_ builtins.
17486 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
17487 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
17488 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
17489 __builtin_aarch64_reduc_plus_scal_v2di.
17490 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
17492 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17494 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
17495 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
17496 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
17498 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17500 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
17501 (aarch64_shrn<mode>_insn_be): Delete.
17502 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
17503 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
17504 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
17505 (aarch64_rshrn<mode>_insn_le): Delete.
17506 (aarch64_rshrn<mode>_insn_be): Delete.
17507 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
17508 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
17510 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17512 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
17514 (aarch64_pars_overlap_p): Likewise.
17515 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
17516 Express in terms of UNSPEC_ADDV.
17517 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
17518 (*aarch64_<su>addlv<mode>_reduction): Define.
17519 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
17520 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
17521 (aarch64_pars_overlap_p): Likewise.
17522 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
17523 (VQUADW): New mode attribute.
17524 (VWIDE2X_S): Likewise.
17526 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
17527 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
17529 2023-06-06 Richard Biener <rguenther@suse.de>
17531 PR middle-end/110055
17532 * gimplify.cc (gimplify_target_expr): Do not emit
17533 CLOBBERs for variables which have static storage duration
17534 after gimplifying their initializers.
17536 2023-06-06 Richard Biener <rguenther@suse.de>
17538 PR tree-optimization/109143
17539 * tree-ssa-structalias.cc (solution_set_expand): Avoid
17540 one bitmap iteration and optimize bit range setting.
17542 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
17544 PR bootstrap/110120
17545 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
17546 XVECEXP, not XEXP, to access first item of a PARALLEL.
17548 2023-06-06 Pan Li <pan2.li@intel.com>
17550 * config/riscv/riscv-vector-builtins-types.def
17551 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
17552 (vfloat16mf2_t): Likewise.
17553 (vfloat16m1_t): Likewise.
17554 (vfloat16m2_t): Likewise.
17555 (vfloat16m4_t): Likewise.
17556 (vfloat16m8_t): Likewise.
17557 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
17558 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
17560 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
17562 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
17563 for cfi reg/mem machmode
17564 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
17566 2023-06-06 Li Xu <xuli1@eswincomputing.com>
17568 * config/riscv/vector-iterators.md:
17569 Fix 'REQUIREMENT' for machine_mode 'MODE'.
17570 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
17571 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
17572 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
17574 2023-06-06 Pan Li <pan2.li@intel.com>
17576 * config/riscv/vector-iterators.md: Fix typo in mode attr.
17578 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
17579 Joel Hutton <joel.hutton@arm.com>
17581 * doc/generic.texi: Remove old tree codes.
17582 * expr.cc (expand_expr_real_2): Remove old tree code cases.
17583 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
17584 * optabs-tree.cc (optab_for_tree_code): Likewise.
17585 (supportable_half_widening_operation): Likewise.
17586 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
17587 * tree-inline.cc (estimate_operator_cost): Likewise.
17588 (op_symbol_code): Likewise.
17589 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
17590 (vect_analyze_data_ref_accesses): Likewise.
17591 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
17592 * cfgexpand.cc (expand_debug_expr): Likewise.
17593 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
17594 (supportable_widening_operation): Likewise.
17595 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
17597 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
17598 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
17599 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
17600 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
17601 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
17602 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
17603 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
17604 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
17606 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
17607 Joel Hutton <joel.hutton@arm.com>
17608 Tamar Christina <tamar.christina@arm.com>
17610 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
17612 (vec_widen_<su>add_lo_<mode>): ... to this.
17613 (vec_widen_<su>addl_hi_<mode>): Rename this ...
17614 (vec_widen_<su>add_hi_<mode>): ... to this.
17615 (vec_widen_<su>subl_lo_<mode>): Rename this ...
17616 (vec_widen_<su>sub_lo_<mode>): ... to this.
17617 (vec_widen_<su>subl_hi_<mode>): Rename this ...
17618 (vec_widen_<su>sub_hi_<mode>): ...to this.
17619 * doc/generic.texi: Document new IFN codes.
17620 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
17621 (commutative_binary_fn_p): Add widen_plus fn's.
17622 (widening_fn_p): New function.
17623 (narrowing_fn_p): New function.
17624 (direct_internal_fn_optab): Change visibility.
17625 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
17626 internal_fn that expands into multiple internal_fns for widening.
17627 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
17628 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
17629 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
17630 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
17631 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
17632 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
17633 (lookup_hilo_internal_fn): Likewise.
17634 (widening_fn_p): Likewise.
17635 (Narrowing_fn_p): Likewise.
17636 * optabs.cc (commutative_optab_p): Add widening plus optabs.
17637 * optabs.def (OPTAB_D): Define widen add, sub optabs.
17638 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
17639 patterns with a hi/lo or even/odd split.
17640 (vect_recog_sad_pattern): Refactor to use new IFN codes.
17641 (vect_recog_widen_plus_pattern): Likewise.
17642 (vect_recog_widen_minus_pattern): Likewise.
17643 (vect_recog_average_pattern): Likewise.
17644 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
17646 (supportable_widening_operation): Likewise.
17647 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
17649 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
17650 Joel Hutton <joel.hutton@arm.com>
17652 * tree-vect-patterns.cc: Add include for gimple-iterator.
17653 (vect_recog_widen_op_pattern): Refactor to use code_helper.
17654 (vect_gimple_build): New function.
17655 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
17657 (vectorizable_call): Likewise.
17658 (vect_gen_widened_results_half): Likewise.
17659 (vect_create_vectorized_demotion_stmts): Likewise.
17660 (vect_create_vectorized_promotion_stmts): Likewise.
17661 (vect_create_half_widening_stmts): Likewise.
17662 (vectorizable_conversion): Likewise.
17663 (supportable_widening_operation): Likewise.
17664 (supportable_narrowing_operation): Likewise.
17665 * tree-vectorizer.h (supportable_widening_operation): Change
17666 prototype to use code_helper.
17667 (supportable_narrowing_operation): Likewise.
17668 (vect_gimple_build): New function prototype.
17669 * tree.h (code_helper::safe_as_tree_code): New function.
17670 (code_helper::safe_as_fn_code): New function.
17672 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
17674 * wide-int.cc (wi::bitreverse_large): New function implementing
17675 bit reversal of an integer.
17676 * wide-int.h (wi::bitreverse): New (template) function prototype.
17677 (bitreverse_large): Prototype helper function/implementation.
17678 (wi::bitreverse): New template wrapper around bitreverse_large.
17680 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
17682 * rtl.h (print_rtl_single): Change return type from int to void.
17683 (print_rtl_single_with_indent): Ditto.
17684 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
17685 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
17686 (rtx_writer::print_rtx_operand_code_0): Ditto.
17687 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
17688 (rtx_writer::print_rtx_operand_code_i): Ditto.
17689 (rtx_writer::print_rtx_operand_code_u): Ditto.
17690 (rtx_writer::print_rtx_operand): Ditto.
17691 (rtx_writer::print_rtx): Ditto.
17692 (rtx_writer::finish_directive): Ditto.
17693 (print_rtl_single): Change return type from int to void
17694 and adjust function body accordingly.
17695 (rtx_writer::print_rtl_single_with_indent): Ditto.
17697 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
17699 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
17700 (reg_class_subset_p): Ditto.
17701 * reginfo.cc (reg_classes_intersect_p): Ditto.
17702 (reg_class_subset_p): Ditto.
17704 2023-06-05 Pan Li <pan2.li@intel.com>
17706 * config/riscv/riscv-vector-builtins-types.def
17707 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
17708 (vfloat32m1_t): Ditto.
17709 (vfloat32m2_t): Ditto.
17710 (vfloat32m4_t): Ditto.
17711 (vfloat32m8_t): Ditto.
17712 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
17713 (vint16mf2_t): Ditto.
17714 (vint16m1_t): Ditto.
17715 (vint16m2_t): Ditto.
17716 (vint16m4_t): Ditto.
17717 (vint16m8_t): Ditto.
17718 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
17719 (vuint16mf2_t): Ditto.
17720 (vuint16m1_t): Ditto.
17721 (vuint16m2_t): Ditto.
17722 (vuint16m4_t): Ditto.
17723 (vuint16m8_t): Ditto.
17724 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
17725 (vint32m1_t): Ditto.
17726 (vint32m2_t): Ditto.
17727 (vint32m4_t): Ditto.
17728 (vint32m8_t): Ditto.
17729 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
17730 (vuint32m1_t): Ditto.
17731 (vuint32m2_t): Ditto.
17732 (vuint32m4_t): Ditto.
17733 (vuint32m8_t): Ditto.
17734 * config/riscv/vector-iterators.md: Add FP=16 support for V,
17735 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
17737 2023-06-05 Andrew Pinski <apinski@marvell.com>
17739 PR bootstrap/110085
17740 * Makefile.in (clean): Remove the removing of
17741 MULTILIB_DIR/MULTILIB_OPTIONS directories.
17743 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
17745 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
17747 * config/mips/mips.cc (speculation_barrier_libfunc): New static
17749 (mips_init_libfuncs): Initialize it.
17750 (mips_emit_speculation_barrier): New function.
17751 * config/mips/mips.md (speculation_barrier): Call
17752 mips_emit_speculation_barrier.
17754 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17756 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
17757 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
17758 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
17759 (rvv_builder::get_merged_repeating_sequence): Ditto.
17760 (rvv_builder::get_merge_scalar_mask): Ditto.
17761 (emit_scalar_move_insn): Ditto.
17762 (emit_vlmax_integer_move_insn): Ditto.
17763 (emit_nonvlmax_integer_move_insn): Ditto.
17764 (emit_vlmax_gather_insn): Ditto.
17765 (emit_vlmax_masked_gather_mu_insn): Ditto.
17766 (get_repeating_sequence_dup_machine_mode): Ditto.
17768 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17770 * config/riscv/autovec.md: Split arguments.
17771 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
17772 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
17774 2023-06-04 Andrew Pinski <apinski@marvell.com>
17776 * expr.cc (do_store_flag): Improve for single bit testing
17777 not against zero but against that single bit.
17779 2023-06-04 Andrew Pinski <apinski@marvell.com>
17781 * expr.cc (do_store_flag): Extend the one bit checking case
17782 to handle the case where we don't have an and but rather still
17783 one bit is known to be non-zero.
17785 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
17787 * config/h8300/constraints.md (Zz): Make this a normal
17789 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
17790 * config/h8300/logical.md (H8/SX bit patterns): Remove.
17792 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17794 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
17795 New insn_and_split patterns.
17797 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17800 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
17801 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
17802 (@vlmul_extx4<mode>): Ditto.
17803 (@vlmul_extx8<mode>): Ditto.
17804 (@vlmul_extx16<mode>): Ditto.
17805 (@vlmul_extx32<mode>): Ditto.
17806 (@vlmul_extx64<mode>): Ditto.
17807 (*vlmul_extx2<mode>): Ditto.
17808 (*vlmul_extx4<mode>): Ditto.
17809 (*vlmul_extx8<mode>): Ditto.
17810 (*vlmul_extx16<mode>): Ditto.
17811 (*vlmul_extx32<mode>): Ditto.
17812 (*vlmul_extx64<mode>): Ditto.
17814 2023-06-04 Pan Li <pan2.li@intel.com>
17816 * config/riscv/riscv-vector-builtins-types.def
17817 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
17818 (vfloat32m1_t): Likewise.
17819 (vfloat32m2_t): Likewise.
17820 (vfloat32m4_t): Likewise.
17821 (vfloat32m8_t): Likewise.
17822 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
17823 * config/riscv/vector-iterators.md: Add single to half machine
17826 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17828 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
17829 (*n<optab><mode>): Ditto.
17830 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
17831 (*n<optab><mode>): Ditto.
17832 * config/riscv/vector.md: Ditto.
17834 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
17837 * config/i386/i386-features.cc (scalar_chain::convert_compare):
17838 Update or delete REG_EQUAL notes, converting CONST_INT and
17839 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
17841 2023-06-04 Jason Merrill <jason@redhat.com>
17844 * tree-eh.cc (lower_resx): Pass the exception pointer to the
17846 * except.h: Tweak comment.
17848 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
17850 * postreload.cc (move2add_use_add2_insn): Handle
17851 trivial single_sets. Rename variable PAT to SET.
17852 (move2add_use_add3_insn, reload_cse_move2add): Similar.
17854 2023-06-04 Pan Li <pan2.li@intel.com>
17856 * config/riscv/riscv-vector-builtins-types.def
17857 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
17858 (vfloat16mf2_t): Likewise.
17859 (vfloat16m1_t): Likewise.
17860 (vfloat16m2_t): Likewise.
17861 (vfloat16m4_t): Likewise.
17862 (vfloat16m8_t): Likewise.
17863 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
17864 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
17865 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
17866 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
17869 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
17871 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
17874 2023-06-03 Die Li <lidie@eswincomputing.com>
17876 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
17878 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17880 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
17882 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17884 * config/riscv/vector.md: Add vector-opt.md.
17885 * config/riscv/autovec-opt.md: New file.
17887 2023-06-03 liuhongt <hongtao.liu@intel.com>
17889 PR tree-optimization/110067
17890 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
17891 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
17893 2023-06-03 liuhongt <hongtao.liu@intel.com>
17896 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
17897 (truncv2si<mode>2): Ditto.
17899 2023-06-02 Andrew Pinski <apinski@marvell.com>
17901 PR rtl-optimization/102733
17902 * dse.cc (store_info): Add addrspace field.
17903 (record_store): Record the address space
17904 and check to make sure they are the same.
17906 2023-06-02 Andrew Pinski <apinski@marvell.com>
17908 PR rtl-optimization/110042
17909 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
17910 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
17912 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
17915 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
17916 Make sure that we do not have a cap on field alignment before altering
17917 the struct layout based on the type alignment of the first entry.
17919 2023-06-02 David Faust <david.faust@oracle.com>
17922 * btfout.cc (btf_absolute_func_id): New function.
17923 (btf_asm_func_type): Call it here. Change index parameter from
17924 size_t to ctf_id_t. Use PRIu64 formatter.
17926 2023-06-02 Alex Coplan <alex.coplan@arm.com>
17928 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
17929 (btf_asm_datasec_type): Likewise.
17931 2023-06-02 Carl Love <cel@us.ibm.com>
17933 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
17934 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
17936 2023-06-02 Jason Merrill <jason@redhat.com>
17940 * tree.h (DECL_MERGEABLE): New.
17941 * tree-core.h (struct tree_decl_common): Mention it.
17942 * gimplify.cc (gimplify_init_constructor): Check it.
17943 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
17944 * varasm.cc (categorize_decl_for_section): Likewise.
17946 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
17948 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
17949 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
17950 (stack_regs_mentioned_p): Change return type from int to bool
17951 and adjust function body accordingly.
17952 (stack_regs_mentioned): Ditto.
17953 (check_asm_stack_operands): Ditto. Change "malformed_asm"
17955 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
17956 (swap_rtx_condition_1): Change return type from int to bool
17957 and adjust function body accordingly. Change "r" variable to bool.
17958 (swap_rtx_condition): Change return type from int to bool
17959 and adjust function body accordingly.
17960 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
17961 (subst_stack_regs): Ditto.
17962 (convert_regs_entry): Change return type from int to bool and adjust
17963 function body accordingly. Change "inserted" variable to bool.
17964 (convert_regs_1): Recode handling of control_flow_insn_deleted.
17965 (convert_regs_2): Recode handling of cfg_altered.
17966 (convert_regs): Ditto. Change "inserted" variable to bool.
17968 2023-06-02 Jason Merrill <jason@redhat.com>
17971 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
17972 (initializer_constant_valid_p_1): Compare float precision.
17974 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
17976 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
17979 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17981 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
17982 (vect_set_loop_condition_partial_vectors): Ditto.
17984 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
17987 * config/avr/avr.md: Add an RTL peephole to optimize operations on
17988 non-LD_REGS after a move from LD_REGS.
17989 (piaop): New code iterator.
17991 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
17994 * doc/install.texi: Document (optional) Perl usage for parallel
17995 testing of libgomp.
17997 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
18000 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
18003 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18004 KuanLin Chen <best124612@gmail.com>
18006 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
18007 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
18009 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18011 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
18013 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18015 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
18017 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18019 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
18021 (DEF_RVV_FRM_ENUM): Ditto.
18023 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18025 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
18026 intrinsic API expander
18027 * config/riscv/vector.md
18028 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
18029 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
18030 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
18032 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18034 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
18035 * config/riscv/predicates.md (vector_perm_operand): New predicate.
18036 * config/riscv/riscv-protos.h (enum insn_type): New enum.
18037 (expand_vec_perm): New function.
18038 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
18039 (gen_const_vector_dup): Ditto.
18040 (emit_vlmax_gather_insn): Ditto.
18041 (emit_vlmax_masked_gather_mu_insn): Ditto.
18042 (expand_vec_perm): Ditto.
18044 2023-06-01 Jason Merrill <jason@redhat.com>
18046 * doc/invoke.texi (-Wpedantic): Improve clarity.
18048 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
18050 * rtl.h (exp_equiv_p): Change return type from int to bool.
18051 * cse.cc (mention_regs): Change return type from int to bool
18052 and adjust function body accordingly.
18053 (exp_equiv_p): Ditto.
18054 (insert_regs): Ditto. Change "modified" function argument to bool
18055 and update usage accordingly.
18056 (record_jump_cond): Remove always zero "reversed_nonequality"
18057 function argument and update usage accordingly.
18058 (fold_rtx): Change "changed" variable to bool.
18059 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
18060 (is_dead_reg): Change return type from int to bool.
18062 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18064 * config/xtensa/xtensa.md (adddi3, subdi3):
18065 New RTL generation patterns implemented according to the instruc-
18066 tion idioms described in the Xtensa ISA reference manual (p. 600).
18068 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
18069 Uros Bizjak <ubizjak@gmail.com>
18072 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
18073 CODE_for_sse4_1_ptestzv2di.
18074 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
18075 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
18076 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
18077 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
18078 when expanding UNSPEC_PTEST to compare against zero.
18079 * config/i386/i386-features.cc (scalar_chain::convert_compare):
18080 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
18081 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
18082 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
18083 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
18084 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
18085 check for suitable matching modes for the UNSPEC_PTEST pattern.
18086 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
18087 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
18088 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
18089 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
18090 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
18091 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
18092 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
18094 (*ptest<mode>_and): Specify CCZ to only perform this optimization
18095 when only the Z flag is required.
18097 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
18100 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
18102 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18104 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
18105 Add =r,m and =r,m alternatives.
18106 (load_pair<DREG:mode><DREG2:mode>): Likewise.
18107 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
18109 2023-06-01 Pan Li <pan2.li@intel.com>
18111 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
18113 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
18114 (main): Disable FP16 tuple.
18115 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
18116 (TARGET_VECTOR_ELEN_FP_16): Ditto.
18117 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
18119 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
18120 (vfloat16mf2_t): Ditto.
18121 (vfloat16m1_t): Ditto.
18122 (vfloat16m2_t): Ditto.
18123 (vfloat16m4_t): Ditto.
18124 (vfloat16m8_t): Ditto.
18125 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
18127 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
18128 machine mode based on TARGET_VECTOR_ELEN_FP_16.
18130 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18132 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
18133 (DEF_RVV_FRM_ENUM): New macro.
18134 (handle_pragma_vector): Add FRM enum
18135 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
18142 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
18143 Richard Sandiford <richard.sandiford@arm.com>
18145 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
18146 Update call to wi::bswap.
18147 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
18148 Update call to wi::bswap.
18149 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
18150 Update calls to wi::bswap.
18151 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
18152 (wi::bswap_large): New function, with revised API.
18153 * wide-int.h (wi::bswap): New (template) function prototype.
18154 (wide_int_storage::bswap): Remove method.
18155 (sext_large, zext_large): Consistent indentation/line wrapping.
18156 (bswap_large): Prototype helper function containing implementation.
18157 (wi::bswap): New template wrapper around bswap_large.
18159 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18162 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
18163 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
18164 (usdot_prod<vsi2qi>): Rename to...
18165 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
18166 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
18167 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
18168 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
18169 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
18170 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
18171 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
18174 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18177 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
18178 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
18179 (aarch64_sq<r>dmulh_n<mode>): Rename to...
18180 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
18181 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
18182 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
18183 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
18184 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
18185 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
18186 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
18187 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
18188 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
18189 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
18190 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
18192 2023-05-31 David Faust <david.faust@oracle.com>
18194 * btfout.cc (btf_kind_names): New.
18195 (btf_kind_name): New.
18196 (btf_absolute_var_id): New utility function.
18197 (btf_relative_var_id): Likewise.
18198 (btf_relative_func_id): Likewise.
18199 (btf_absolute_datasec_id): Likewise.
18200 (btf_asm_type_ref): New.
18201 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
18202 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
18203 (btf_asm_varent): Likewise.
18204 (btf_asm_func_arg): Likewise.
18205 (btf_asm_datasec_entry): Likewise.
18206 (btf_asm_datasec_type): Likewise.
18207 (btf_asm_func_type): Likewise. Add index parameter.
18208 (btf_asm_enum_const): Likewise.
18209 (btf_asm_sou_member): Likewise.
18210 (output_btf_vars): Update btf_asm_* call accordingly.
18211 (output_asm_btf_sou_fields): Likewise.
18212 (output_asm_btf_enum_list): Likewise.
18213 (output_asm_btf_func_args_list): Likewise.
18214 (output_asm_btf_vlen_bytes): Likewise.
18215 (output_btf_func_types): Add ctf_container_ref parameter.
18216 Pass it to btf_asm_func_type.
18217 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
18218 (btf_output): Update output_btf_func_types call similarly.
18220 2023-05-31 David Faust <david.faust@oracle.com>
18222 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
18223 and BTF_KIND_FWD which do not use the size/type field at all.
18225 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
18227 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
18228 (active_insn_p): Ditto.
18229 (in_sequence_p): Ditto.
18230 (unshare_all_rtl): Change return type from int to void.
18231 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
18232 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
18233 and adjust function body accordingly.
18234 (mem_expr_equal_p): Ditto.
18235 (unshare_all_rtl): Change return type from int to void
18236 and adjust function body accordingly.
18237 (verify_rtx_sharing): Remove unneeded return.
18238 (active_insn_p): Change return type from int to bool
18239 and adjust function body accordingly.
18240 (in_sequence_p): Ditto.
18242 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
18244 * rtl.h (true_dependence): Change return type from int to bool.
18245 (canon_true_dependence): Ditto.
18246 (read_dependence): Ditto.
18247 (anti_dependence): Ditto.
18248 (canon_anti_dependence): Ditto.
18249 (output_dependence): Ditto.
18250 (canon_output_dependence): Ditto.
18251 (may_alias_p): Ditto.
18252 * alias.h (alias_sets_conflict_p): Ditto.
18253 (alias_sets_must_conflict_p): Ditto.
18254 (objects_must_conflict_p): Ditto.
18255 (nonoverlapping_memrefs_p): Ditto.
18256 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
18257 (record_set): Ditto.
18258 (base_alias_check): Ditto.
18259 (find_base_value): Ditto.
18260 (mems_in_disjoint_alias_sets_p): Ditto.
18261 (get_alias_set_entry): Ditto.
18262 (decl_for_component_ref): Ditto.
18263 (write_dependence_p): Ditto.
18264 (memory_modified_1): Ditto.
18265 (mems_in_disjoint_alias_set_p): Change return type from int to bool
18266 and adjust function body accordingly.
18267 (alias_sets_conflict_p): Ditto.
18268 (alias_sets_must_conflict_p): Ditto.
18269 (objects_must_conflict_p): Ditto.
18270 (rtx_equal_for_memref_p): Ditto.
18271 (base_alias_check): Ditto.
18272 (read_dependence): Ditto.
18273 (nonoverlapping_memrefs_p): Ditto.
18274 (true_dependence_1): Ditto.
18275 (true_dependence): Ditto.
18276 (canon_true_dependence): Ditto.
18277 (write_dependence_p): Ditto.
18278 (anti_dependence): Ditto.
18279 (canon_anti_dependence): Ditto.
18280 (output_dependence): Ditto.
18281 (canon_output_dependence): Ditto.
18282 (may_alias_p): Ditto.
18283 (init_alias_analysis): Change "changed" variable to bool.
18285 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18287 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
18288 expand into define_insn_and_split.
18290 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18292 * config/riscv/vector.md: Remove FRM.
18294 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18296 * config/riscv/vector.md: Remove FRM.
18298 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18300 * config/riscv/vector.md: Remove FRM.
18302 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
18305 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
18308 2023-05-31 Richard Biener <rguenther@suse.de>
18311 PR tree-optimization/109143
18312 * tree-ssa-structalias.cc (struct topo_info): Remove.
18313 (init_topo_info): Likewise.
18314 (free_topo_info): Likewise.
18315 (compute_topo_order): Simplify API, put the component
18316 with ESCAPED last so it's processed first.
18317 (topo_visit): Adjust.
18318 (solve_graph): Likewise.
18320 2023-05-31 Richard Biener <rguenther@suse.de>
18322 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
18324 (add_graph_edge): Count redundant edges we avoid to create.
18325 (dump_sa_stats): Dump them.
18326 (ipa_pta_execute): Do not dump generating constraints when
18327 we are not dumping them.
18329 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18331 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
18332 output template to avoid explicit switch on which_alternative.
18333 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
18334 (and<mode>3): Likewise.
18335 (ior<mode>3): Likewise.
18336 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
18338 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18340 * config/xtensa/predicates.md (xtensa_bit_join_operator):
18342 * config/xtensa/xtensa.md (ior_op): Remove.
18343 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
18344 insn_and_split pattern of the same name to express and capture
18345 the bit-combining operation with both sides swapped.
18346 In addition, replace use of code iterator with new operator
18348 (*shlrd_const, *shlrd_per_byte):
18349 Likewise regarding the code iterator.
18351 2023-05-31 Cui, Lili <lili.cui@intel.com>
18353 PR tree-optimization/110038
18354 * params.opt: Add a limit on tree-reassoc-width.
18355 * tree-ssa-reassoc.cc
18356 (rewrite_expr_tree_parallel): Add width limit.
18358 2023-05-31 Pan Li <pan2.li@intel.com>
18360 * common/config/riscv/riscv-common.cc:
18361 (riscv_implied_info): Add zvfh item.
18362 (riscv_ext_version_table): Ditto.
18363 (riscv_ext_flag_table): Ditto.
18364 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
18365 (TARGET_ZVFH): Ditto.
18367 2023-05-30 liuhongt <hongtao.liu@intel.com>
18369 PR tree-optimization/108804
18370 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
18371 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
18372 Add new parameter narrow_src_p.
18373 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
18374 vectorization by truncating to lower precision.
18375 * tree-vectorizer.h (vect_get_range_info): New declare.
18377 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
18379 * lra-int.h (lra_update_sp_offset): Add the prototype.
18380 * lra.cc (setup_sp_offset): Change the return type. Use
18381 lra_update_sp_offset.
18382 * lra-eliminations.cc (lra_update_sp_offset): New function.
18383 (lra_process_new_insns): Push the current insn to reprocess if the
18384 input reload changes sp offset.
18386 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
18389 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
18390 Fix misleading identation.
18392 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
18394 * rtl.h (comparison_dominates_p): Change return type from int to bool.
18395 (condjump_p): Ditto.
18396 (any_condjump_p): Ditto.
18397 (any_uncondjump_p): Ditto.
18398 (simplejump_p): Ditto.
18399 (returnjump_p): Ditto.
18400 (eh_returnjump_p): Ditto.
18401 (onlyjump_p): Ditto.
18402 (invert_jump_1): Ditto.
18403 (invert_jump): Ditto.
18404 (rtx_renumbered_equal_p): Ditto.
18405 (redirect_jump_1): Ditto.
18406 (redirect_jump): Ditto.
18407 (condjump_in_parallel_p): Ditto.
18408 * jump.cc (invert_exp_1): Adjust forward declaration.
18409 (comparison_dominates_p): Change return type from int to bool
18410 and adjust function body accordingly.
18411 (simplejump_p): Ditto.
18412 (condjump_p): Ditto.
18413 (condjump_in_parallel_p): Ditto.
18414 (any_uncondjump_p): Ditto.
18415 (any_condjump_p): Ditto.
18416 (returnjump_p): Ditto.
18417 (eh_returnjump_p): Ditto.
18418 (onlyjump_p): Ditto.
18419 (redirect_jump_1): Ditto.
18420 (redirect_jump): Ditto.
18421 (invert_exp_1): Ditto.
18422 (invert_jump_1): Ditto.
18423 (invert_jump): Ditto.
18424 (rtx_renumbered_equal_p): Ditto.
18426 2023-05-30 Andrew Pinski <apinski@marvell.com>
18428 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
18429 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
18430 Add ne as a possible cmp.
18431 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
18433 2023-05-30 Andrew Pinski <apinski@marvell.com>
18435 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
18438 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
18440 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
18441 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
18442 (and (extend X) C) as (zero_extend (and X C)), to also optimize
18443 modes wider than HOST_WIDE_INT.
18445 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
18448 * simplify-rtx.cc (simplify_const_relational_operation): Return
18449 early if we have a MODE_CC comparison that isn't a COMPARE against
18452 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
18454 * config/riscv/riscv.cc (riscv_const_insns): Allow
18455 const_vec_duplicates.
18457 2023-05-30 liuhongt <hongtao.liu@intel.com>
18459 PR middle-end/108938
18460 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
18461 function, cut from original find_bswap_or_nop function.
18462 (find_bswap_or_nop): Add a new parameter, detect bswap +
18463 rotate and save rotate result in the new parameter.
18464 (bswap_replace): Add a new parameter to indicate rotate and
18465 generate rotate stmt if needed.
18466 (maybe_optimize_vector_constructor): Adjust for new rotate
18467 parameter in the upper 2 functions.
18468 (pass_optimize_bswap::execute): Ditto.
18469 (imm_store_chain_info::output_merged_store): Ditto.
18471 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18473 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
18474 (aarch64_<su>adalp<mode>): New define_expand.
18475 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
18476 (aarch64_<su>addlp<mode>): Convert to define_expand.
18477 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
18478 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
18480 (USADDLP): Likewise.
18481 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
18483 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18485 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
18486 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
18487 srhadd, urhadd builtin codes for standard optab ones.
18488 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
18489 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
18491 (<u>avg<mode>3_ceil): Rename to...
18492 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
18494 (aarch64_<su>hsub<mode>): New define_expand.
18495 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
18496 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
18497 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
18499 2023-05-30 Andreas Schwab <schwab@suse.de>
18502 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
18503 match libsanitizer.
18505 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18507 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
18508 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
18510 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
18511 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
18512 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
18513 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
18514 (aarch64_<sra_op>sra_n<mode>): New define_expand.
18515 (aarch64_<sra_op>rsra_n<mode>): Likewise.
18516 (aarch64_<sur>sra_n<mode>): Rename to...
18517 (aarch64_<sur>sra_ndi): ... This.
18518 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
18519 any_target_p argument.
18520 (aarch64_extract_vec_duplicate_wide_int): Define.
18521 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
18522 (aarch64_const_vec_rnd_cst_p): Likewise.
18523 (aarch64_vector_mode_supported_any_target_p): Likewise.
18524 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
18525 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
18526 (VSRA): Adjust for the above.
18528 (V2XWIDE): New mode_attr.
18529 (vec_or_offset): Likewise.
18530 (SHIFTEXTEND): Likewise.
18531 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
18533 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
18534 clarify that it applies to current target options.
18535 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
18536 * doc/tm.texi.in: Regenerate.
18537 * stor-layout.cc (mode_for_vector): Check
18538 vector_mode_supported_any_target_p when iterating through vector modes.
18539 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
18540 clarify that it applies to current target options.
18541 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
18543 2023-05-30 Lili Cui <lili.cui@intel.com>
18545 PR tree-optimization/98350
18546 * tree-ssa-reassoc.cc
18547 (rewrite_expr_tree_parallel): Rewrite this function.
18548 (rank_ops_for_fma): New.
18549 (reassociate_bb): Handle new function.
18551 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
18553 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
18554 (rtx_unstable_p): Ditto.
18555 (reg_mentioned_p): Ditto.
18556 (reg_referenced_p): Ditto.
18557 (reg_used_between_p): Ditto.
18558 (reg_set_between_p): Ditto.
18559 (modified_between_p): Ditto.
18560 (no_labels_between_p): Ditto.
18561 (modified_in_p): Ditto.
18562 (reg_set_p): Ditto.
18563 (multiple_sets): Ditto.
18564 (set_noop_p): Ditto.
18565 (noop_move_p): Ditto.
18566 (reg_overlap_mentioned_p): Ditto.
18567 (dead_or_set_p): Ditto.
18568 (dead_or_set_regno_p): Ditto.
18569 (find_reg_fusage): Ditto.
18570 (find_regno_fusage): Ditto.
18571 (side_effects_p): Ditto.
18572 (volatile_refs_p): Ditto.
18573 (volatile_insn_p): Ditto.
18574 (may_trap_p_1): Ditto.
18575 (may_trap_p): Ditto.
18576 (may_trap_or_fault_p): Ditto.
18577 (computed_jump_p): Ditto.
18578 (auto_inc_p): Ditto.
18579 (loc_mentioned_in_p): Ditto.
18580 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
18581 (rtx_unstable_p): Change return type from int to bool
18582 and adjust function body accordingly.
18583 (rtx_addr_can_trap_p): Ditto.
18584 (reg_mentioned_p): Ditto.
18585 (no_labels_between_p): Ditto.
18586 (reg_used_between_p): Ditto.
18587 (reg_referenced_p): Ditto.
18588 (reg_set_between_p): Ditto.
18589 (reg_set_p): Ditto.
18590 (modified_between_p): Ditto.
18591 (modified_in_p): Ditto.
18592 (multiple_sets): Ditto.
18593 (set_noop_p): Ditto.
18594 (noop_move_p): Ditto.
18595 (reg_overlap_mentioned_p): Ditto.
18596 (dead_or_set_p): Ditto.
18597 (dead_or_set_regno_p): Ditto.
18598 (find_reg_fusage): Ditto.
18599 (find_regno_fusage): Ditto.
18600 (remove_node_from_insn_list): Ditto.
18601 (volatile_insn_p): Ditto.
18602 (volatile_refs_p): Ditto.
18603 (side_effects_p): Ditto.
18604 (may_trap_p_1): Ditto.
18605 (may_trap_p): Ditto.
18606 (may_trap_or_fault_p): Ditto.
18607 (computed_jump_p): Ditto.
18608 (auto_inc_p): Ditto.
18609 (loc_mentioned_in_p): Ditto.
18610 * combine.cc (can_combine_p): Update indirect function.
18612 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18614 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
18615 * config/riscv/iterators.md: New attribute.
18616 * config/riscv/vector-iterators.md: New attribute.
18618 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
18620 * config/riscv/riscv.md: Fix signed and unsigned comparison
18623 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18625 * config/riscv/autovec.md (fnma<mode>4): New pattern.
18626 (*fnma<mode>): Ditto.
18628 2023-05-29 Die Li <lidie@eswincomputing.com>
18630 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
18632 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
18633 process for TARGET_XTHEADCONDMOV
18635 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
18638 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
18639 TARGET_AVX512BW to generate truncv16hiv16qi2.
18641 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
18643 * config/riscv/riscv.md (and<mode>3): New expander.
18644 (*and<mode>3) New pattern.
18645 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
18648 2023-05-29 Pan Li <pan2.li@intel.com>
18650 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
18651 comments and rename local variables.
18652 (emit_nonvlmax_insn): Diito.
18653 (emit_vlmax_merge_insn): Ditto.
18654 (emit_vlmax_cmp_insn): Ditto.
18655 (emit_vlmax_cmp_mu_insn): Ditto.
18656 (emit_scalar_move_insn): Ditto.
18658 2023-05-29 Pan Li <pan2.li@intel.com>
18660 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
18662 (emit_nonvlmax_insn): Ditto.
18663 (emit_vlmax_merge_insn): Ditto.
18664 (emit_vlmax_cmp_insn): Ditto.
18665 (emit_vlmax_cmp_mu_insn): Ditto.
18666 (expand_vec_series): Ditto.
18668 2023-05-29 Pan Li <pan2.li@intel.com>
18670 * config/riscv/riscv-protos.h (enum insn_type): New type.
18671 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
18672 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
18674 (rvv_builder::get_merged_repeating_sequence): Ditto.
18675 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
18676 to evaluate the optimization cost.
18677 (rvv_builder::get_merge_scalar_mask): New function to get the merge
18679 (emit_scalar_move_insn): New function to emit vmv.s.x.
18680 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
18681 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
18683 (get_repeating_sequence_dup_machine_mode): New function to get the dup
18685 (expand_vector_init_merge_repeating_sequence): New function to perform
18687 (expand_vec_init): Add this vector init optimization.
18688 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
18690 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
18692 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
18693 put onto the increment when it is inserted after the position.
18695 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
18697 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
18700 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18702 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
18704 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18706 * config/riscv/autovec.md (fma<mode>4): New pattern.
18707 (*fma<mode>): Ditto.
18708 * config/riscv/riscv-protos.h (enum insn_type): New enum.
18709 (emit_vlmax_ternary_insn): New function.
18710 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
18712 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18714 * config/riscv/vector.md: Fix vimuladd instruction bug.
18716 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18718 * config/riscv/riscv.cc (global_state_unknown_p): New function.
18719 (riscv_mode_after): Fix incorrect VXM.
18721 2023-05-29 Pan Li <pan2.li@intel.com>
18723 * common/config/riscv/riscv-common.cc:
18724 (riscv_implied_info): Add zvfhmin item.
18725 (riscv_ext_version_table): Ditto.
18726 (riscv_ext_flag_table): Ditto.
18727 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
18728 (TARGET_ZFHMIN): Align indent.
18729 (TARGET_ZFH): Ditto.
18730 (TARGET_ZVFHMIN): New macro.
18732 2023-05-27 liuhongt <hongtao.liu@intel.com>
18735 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
18736 to VI_AVX2 to cover more modes.
18738 2023-05-27 liuhongt <hongtao.liu@intel.com>
18740 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
18741 Remove ATOM and ICELAKE(and later) core processors.
18743 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
18745 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
18747 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
18749 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
18752 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
18753 Juzhe Zhong <juzhe.zhong@rivai.ai>
18755 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
18757 (<optab><v_quad_trunc><mode>2): Dito.
18758 (<optab><v_oct_trunc><mode>2): Dito.
18759 (trunc<mode><v_double_trunc>2): Dito.
18760 (trunc<mode><v_quad_trunc>2): Dito.
18761 (trunc<mode><v_oct_trunc>2): Dito.
18762 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
18763 (autovectorize_vector_modes): Define.
18764 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
18766 (autovectorize_vector_modes): Implement hook.
18767 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
18768 Implement target hook.
18769 (riscv_vectorize_related_mode): Implement target hook.
18770 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
18771 (TARGET_VECTORIZE_RELATED_MODE): Define.
18772 * config/riscv/vector-iterators.md: Add lowercase versions of
18773 mode_attr iterators.
18775 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
18776 Tobias Burnus <tobias@codesourcery.com>
18778 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
18779 (ASM_SPEC): Use XNACKOPT.
18780 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
18781 (enum hsaco_attr_type): ... this, and generalize the names.
18782 (TARGET_XNACK): New macro.
18783 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
18785 (output_file_start): Update xnack handling.
18786 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
18787 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
18788 (sram_ecc_type): Rename to ...
18789 (hsaco_attr_type: ... this.)
18790 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
18791 (TEST_XNACK): Delete.
18792 (TEST_XNACK_ANY): New macro.
18793 (TEST_XNACK_ON): New macro.
18794 (main): Support the new -mxnack=on/off/any syntax.
18795 * doc/invoke.texi (-mxnack): Update for new syntax.
18797 2023-05-26 Andrew Pinski <apinski@marvell.com>
18799 * genmatch.cc (emit_debug_printf): New function.
18800 (dt_simplify::gen_1): Emit printf into the code
18801 before the `return true` or returning the folded result
18802 instead of emitting it always.
18804 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18806 * config/xtensa/xtensa-protos.h
18807 (xtensa_expand_block_set_unrolled_loop,
18808 xtensa_expand_block_set_small_loop): Remove.
18809 (xtensa_expand_block_set): New prototype.
18810 * config/xtensa/xtensa.cc
18811 (xtensa_expand_block_set_libcall): New subfunction.
18812 (xtensa_expand_block_set_unrolled_loop,
18813 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
18814 (xtensa_expand_block_set): New function that calls the above
18816 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
18817 xtensa_expand_block_set().
18819 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18821 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
18823 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
18825 * config/xtensa/constraints.md (O):
18826 Change to use the above function.
18827 * config/xtensa/xtensa.md (*subsi3_from_const):
18828 New insn_and_split pattern.
18830 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18832 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
18833 Retract excessive line folding, and correct the value of
18834 the "length" insn attribute related to TARGET_DENSITY.
18835 (*extzvsi-1bit_addsubx): Ditto.
18837 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
18839 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
18840 Do not disable call to ix86_expand_vecop_qihi2.
18842 2023-05-26 liuhongt <hongtao.liu@intel.com>
18846 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
18847 calculation when !hard_regno_mode_ok for GENERAL_REGS and
18848 mode, otherwise still use GENERAL_REGS.
18850 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18852 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
18853 explict VL and drop VL in ops.
18855 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
18857 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
18858 in different BB blocks.
18860 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
18862 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
18863 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
18864 instructions when available. Emulate truncation via
18865 ix86_expand_vec_perm_const_1 when native truncate insn
18867 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
18868 when available. Trivially rename some variables.
18869 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
18870 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
18871 calculation of V*QImode emulations to account for generation of
18872 2x-wider mode instructions.
18873 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
18874 emulations to account for generation of 2x-wider mode instructions.
18876 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
18879 * config/avr/avr.cc (avr_can_inline_p): New static function.
18880 (TARGET_CAN_INLINE_P): Define to that function.
18882 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
18885 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
18886 Handle any bit position and use mode QISI.
18887 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
18888 of 2 insns for bit-transfer of respective style.
18890 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
18892 * config/arm/iterators.md (MVE_6): Remove.
18893 * config/arm/mve.md: Replace MVE_6 with MVE_5.
18895 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18896 Richard Sandiford <richard.sandiford@arm.com>
18898 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
18900 (vect_set_loop_controls_directly): Add decrement IV support.
18901 (vect_set_loop_condition_partial_vectors): Ditto.
18902 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
18904 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
18907 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18910 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
18911 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
18912 Fix canonicalization of PLUS operands.
18913 (aarch64_fcmla<rot><mode>): Rename to...
18914 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
18915 Fix canonicalization of PLUS operands.
18916 (aarch64_fcmla_lane<rot><mode>): Rename to...
18917 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
18918 Fix canonicalization of PLUS operands.
18919 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
18920 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
18921 Fix canonicalization of PLUS operands.
18922 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
18924 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
18926 * config/arm/arm.md (rbitsi2): Rename to...
18927 (arm_rbit): ... This.
18928 (ctzsi2): Adjust for the above.
18929 (arm_rev16si2): Convert to define_expand.
18930 (arm_rev16si2_alt1): New pattern.
18931 (arm_rev16si2_alt): Rename to...
18932 (*arm_rev16si2_alt2): ... This.
18933 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
18934 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
18935 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
18936 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
18938 2023-05-25 Alex Coplan <alex.coplan@arm.com>
18941 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
18943 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
18944 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
18945 DFmode as an rvalue.
18947 2023-05-25 Richard Biener <rguenther@suse.de>
18950 * tree-vect-stmts.cc (vectorizable_condition): For
18951 embedded comparisons also handle the case when the target
18952 only provides vec_cmp and vcond_mask.
18954 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
18956 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
18959 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18961 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
18962 (seq_cost_ignoring_scalar_moves): Likewise.
18963 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
18965 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18967 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
18968 (vcage_f32): Likewise.
18969 (vcages_f32): Likewise.
18970 (vcageq_f32): Likewise.
18971 (vcaged_f64): Likewise.
18972 (vcageq_f64): Likewise.
18973 (vcagts_f32): Likewise.
18974 (vcagt_f32): Likewise.
18975 (vcagt_f64): Likewise.
18976 (vcagtq_f32): Likewise.
18977 (vcagtd_f64): Likewise.
18978 (vcagtq_f64): Likewise.
18979 (vcale_f32): Likewise.
18980 (vcale_f64): Likewise.
18981 (vcaled_f64): Likewise.
18982 (vcales_f32): Likewise.
18983 (vcaleq_f32): Likewise.
18984 (vcaleq_f64): Likewise.
18985 (vcalt_f32): Likewise.
18986 (vcalt_f64): Likewise.
18987 (vcaltd_f64): Likewise.
18988 (vcaltq_f32): Likewise.
18989 (vcaltq_f64): Likewise.
18990 (vcalts_f32): Likewise.
18992 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
18996 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
18997 int to const int or const int to const unsigned int.
18998 (_mm512_mask_srli_epi16): Ditto.
18999 (_mm512_slli_epi16): Ditto.
19000 (_mm512_mask_slli_epi16): Ditto.
19001 (_mm512_maskz_slli_epi16): Ditto.
19002 (_mm512_srai_epi16): Ditto.
19003 (_mm512_mask_srai_epi16): Ditto.
19004 (_mm512_maskz_srai_epi16): Ditto.
19005 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
19006 (_mm512_mask_slli_epi64): Ditto.
19007 (_mm512_maskz_slli_epi64): Ditto.
19008 (_mm512_srli_epi64): Ditto.
19009 (_mm512_mask_srli_epi64): Ditto.
19010 (_mm512_maskz_srli_epi64): Ditto.
19011 (_mm512_srai_epi64): Ditto.
19012 (_mm512_mask_srai_epi64): Ditto.
19013 (_mm512_maskz_srai_epi64): Ditto.
19014 (_mm512_slli_epi32): Ditto.
19015 (_mm512_mask_slli_epi32): Ditto.
19016 (_mm512_maskz_slli_epi32): Ditto.
19017 (_mm512_srli_epi32): Ditto.
19018 (_mm512_mask_srli_epi32): Ditto.
19019 (_mm512_maskz_srli_epi32): Ditto.
19020 (_mm512_srai_epi32): Ditto.
19021 (_mm512_mask_srai_epi32): Ditto.
19022 (_mm512_maskz_srai_epi32): Ditto.
19023 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
19024 (_mm256_maskz_srai_epi16): Ditto.
19025 (_mm_mask_srai_epi16): Ditto.
19026 (_mm_maskz_srai_epi16): Ditto.
19027 (_mm256_mask_slli_epi16): Ditto.
19028 (_mm256_maskz_slli_epi16): Ditto.
19029 (_mm_mask_slli_epi16): Ditto.
19030 (_mm_maskz_slli_epi16): Ditto.
19031 (_mm_maskz_srli_epi16): Ditto.
19032 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
19033 (_mm256_maskz_srli_epi32): Ditto.
19034 (_mm_mask_srli_epi32): Ditto.
19035 (_mm_maskz_srli_epi32): Ditto.
19036 (_mm256_mask_srli_epi64): Ditto.
19037 (_mm256_maskz_srli_epi64): Ditto.
19038 (_mm_mask_srli_epi64): Ditto.
19039 (_mm_maskz_srli_epi64): Ditto.
19040 (_mm256_mask_srai_epi32): Ditto.
19041 (_mm256_maskz_srai_epi32): Ditto.
19042 (_mm_mask_srai_epi32): Ditto.
19043 (_mm_maskz_srai_epi32): Ditto.
19044 (_mm256_srai_epi64): Ditto.
19045 (_mm256_mask_srai_epi64): Ditto.
19046 (_mm256_maskz_srai_epi64): Ditto.
19047 (_mm_srai_epi64): Ditto.
19048 (_mm_mask_srai_epi64): Ditto.
19049 (_mm_maskz_srai_epi64): Ditto.
19050 (_mm_mask_slli_epi32): Ditto.
19051 (_mm_maskz_slli_epi32): Ditto.
19052 (_mm_mask_slli_epi64): Ditto.
19053 (_mm_maskz_slli_epi64): Ditto.
19054 (_mm256_mask_slli_epi32): Ditto.
19055 (_mm256_maskz_slli_epi32): Ditto.
19056 (_mm256_mask_slli_epi64): Ditto.
19057 (_mm256_maskz_slli_epi64): Ditto.
19059 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19061 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
19064 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
19066 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
19067 * data-streamer-out.cc (streamer_write_vrange): Same.
19068 * value-range.h (class vrange): Make streamer_write_vrange a friend.
19070 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
19072 * value-query.cc (range_query::get_tree_range): Set NAN directly
19074 * value-range.cc (frange::set): Assert that bounds are not NAN.
19076 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
19078 * value-range.cc (add_vrange): Handle known NANs.
19080 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
19082 * value-range.h (frange::set_nan): New.
19084 2023-05-25 Alexandre Oliva <oliva@adacore.com>
19087 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
19088 requires stricter alignment than MEM's.
19090 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
19092 PR tree-optimization/107822
19093 PR tree-optimization/107986
19094 * Makefile.in (OBJS): Add gimple-range-phi.o.
19095 * gimple-range-cache.h (ranger_cache::m_estimate): New
19096 phi_analyzer pointer member.
19097 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
19098 phi_analyzer if no loop info is available.
19099 * gimple-range-phi.cc: New file.
19100 * gimple-range-phi.h: New file.
19101 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
19103 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
19105 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
19107 (fold_range): Add range_query parameter.
19108 (fur_relation::fur_relation): New.
19109 (fur_relation::trio): New.
19110 (fur_relation::register_relation): New.
19111 (fold_relations): New.
19112 * gimple-range-fold.h (fold_range): Adjust prototypes.
19113 (fold_relations): New.
19115 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
19117 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
19118 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
19119 (ranger_cache::const_query): New.
19120 * gimple-range.cc (gimple_ranger::const_query): New.
19121 * gimple-range.h (gimple_ranger::const_query): New prototype.
19123 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
19125 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
19126 (ssa_cache::dump_range_query): Delete.
19127 (ssa_lazy_cache::dump_range_query): Delete.
19128 (ssa_lazy_cache::get_range): Move from header file.
19129 (ssa_lazy_cache::clear_range): ditto.
19130 (ssa_lazy_cache::clear): Ditto.
19131 * gimple-range-cache.h (class ssa_cache): Virtualize.
19132 (class ssa_lazy_cache): Inherit and virtualize.
19134 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
19136 * value-range.h (vrange::kind): Remove.
19138 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
19140 PR middle-end/109840
19141 * match.pd <popcount optimizations>: Preserve zero-extension when
19142 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
19143 popcount((T)x), so the popcount's argument keeps the same type.
19144 <parity optimizations>: Likewise preserve extensions when
19145 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
19146 parity((T)x), so that the parity's argument type is the same.
19148 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
19150 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
19151 (ipcp_store_vr_results): Same.
19152 * ipa-prop.cc (ipa_vr::ipa_vr): New.
19153 (ipa_vr::get_vrange): New.
19154 (ipa_vr::set_unknown): New.
19155 (ipa_vr::streamer_read): New.
19156 (ipa_vr::streamer_write): New.
19157 (write_ipcp_transformation_info): Use new ipa_vr API.
19158 (read_ipcp_transformation_info): Same.
19159 (ipa_vr::nonzero_p): Delete.
19160 (ipcp_update_vr): Use new ipa_vr API.
19161 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
19162 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
19164 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
19166 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
19167 silence overflow warnings later on.
19169 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
19171 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
19172 Remove handling of V8QImode.
19173 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
19174 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
19175 (v<insn>v4qi3): Ditto.
19176 * config/i386/sse.md (v<insn>v8qi3): Remove.
19178 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19181 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
19182 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
19183 (aarch64_simd_ashr<mode>): Rename to...
19184 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
19185 (aarch64_simd_imm_shl<mode>): Rename to...
19186 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
19187 (aarch64_simd_reg_sshl<mode>): Rename to...
19188 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
19189 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
19190 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
19191 (aarch64_simd_reg_shl<mode>_signed): Rename to...
19192 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
19193 (vec_shr_<mode>): Rename to...
19194 (vec_shr_<mode><vczle><vczbe>): ... This.
19195 (aarch64_<sur>shl<mode>): Rename to...
19196 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
19197 (aarch64_<sur>q<r>shl<mode>): Rename to...
19198 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
19200 2023-05-24 Richard Biener <rguenther@suse.de>
19203 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
19204 Perform final vector composition using
19205 ix86_expand_vector_init_general instead of setting
19206 the highpart and lowpart which causes spilling.
19208 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
19210 PR tree-optimization/109695
19211 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
19213 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
19214 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
19215 flag to set_global_range.
19216 (gimple_ranger::prefill_stmt_dependencies): Ditto.
19218 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
19220 PR tree-optimization/109695
19221 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
19223 (temporal_cache::current_p): Check always_current method.
19224 (temporal_cache::set_always_current): Add param and set value
19226 (temporal_cache::always_current_p): New.
19227 (ranger_cache::get_global_range): Adjust.
19228 (ranger_cache::set_global_range): set always current first.
19230 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
19232 PR tree-optimization/109695
19233 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
19234 fold_range with global query to choose an initial value.
19236 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19238 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
19241 2023-05-24 Richard Biener <rguenther@suse.de>
19243 PR tree-optimization/109849
19244 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
19245 expressions but take the first sets.
19247 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
19250 * doc/gm2.texi (High procedure function): New node.
19251 (Using): New menu entry for High procedure function.
19253 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
19255 PR rtl-optimization/109940
19256 * early-remat.cc (postorder_index): Rename to...
19257 (rpo_index): ...this.
19258 (compare_candidates): Sort by decreasing rpo_index rather than
19259 increasing postorder_index.
19260 (early_remat::sort_candidates): Calculate the forward RPO from
19262 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
19263 rather than DF_BACKWARD in reverse.
19265 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19268 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
19269 qualifier_none for the return operand.
19271 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19273 * config/riscv/autovec.md (<optab><mode>3): New pattern.
19274 (one_cmpl<mode>2): Ditto.
19275 (*<optab>not<mode>): Ditto.
19276 (*n<optab><mode>): Ditto.
19277 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
19280 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
19282 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
19283 calculation on n_perms by considering nvectors_per_build.
19285 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19286 Richard Sandiford <richard.sandiford@arm.com>
19288 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
19289 (vec_cmp<mode><vm>): New pattern.
19290 (vec_cmpu<mode><vm>): New pattern.
19291 (vcond<V:mode><VI:mode>): New pattern.
19292 (vcondu<V:mode><VI:mode>): New pattern.
19293 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
19294 (emit_vlmax_merge_insn): New function.
19295 (emit_vlmax_cmp_insn): Ditto.
19296 (emit_vlmax_cmp_mu_insn): Ditto.
19297 (expand_vec_cmp): Ditto.
19298 (expand_vec_cmp_float): Ditto.
19299 (expand_vcond): Ditto.
19300 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
19301 (emit_vlmax_cmp_insn): Ditto.
19302 (emit_vlmax_cmp_mu_insn): Ditto.
19303 (get_cmp_insn_code): Ditto.
19304 (expand_vec_cmp): Ditto.
19305 (expand_vec_cmp_float): Ditto.
19306 (expand_vcond): Ditto.
19308 2023-05-24 Pan Li <pan2.li@intel.com>
19310 * config/riscv/genrvv-type-indexer.cc (main): Add
19311 unsigned_eew*_lmul1_interpret for indexer.
19312 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
19313 Register vuint*m1_t interpret function.
19314 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
19315 New macro for vuint8m1_t.
19316 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
19317 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
19318 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
19319 (vbool1_t): Add to unsigned_eew*_interpret_ops.
19320 (vbool2_t): Likewise.
19321 (vbool4_t): Likewise.
19322 (vbool8_t): Likewise.
19323 (vbool16_t): Likewise.
19324 (vbool32_t): Likewise.
19325 (vbool64_t): Likewise.
19326 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
19327 New macro for vuint*m1_t.
19328 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
19329 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
19330 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
19331 (required_extensions_p): Add vuint*m1_t interpret case.
19332 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
19333 Add vuint*m1_t interpret to base type.
19334 (unsigned_eew16_lmul1_interpret): Likewise.
19335 (unsigned_eew32_lmul1_interpret): Likewise.
19336 (unsigned_eew64_lmul1_interpret): Likewise.
19338 2023-05-24 Pan Li <pan2.li@intel.com>
19340 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
19341 for the eew size list.
19342 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
19343 (main): Add signed_eew*_lmul1_interpret for indexer.
19344 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
19345 Register vint*m1_t interpret function.
19346 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
19347 New macro for vint8m1_t.
19348 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
19349 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
19350 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
19351 (vbool1_t): Add to signed_eew*_interpret_ops.
19352 (vbool2_t): Likewise.
19353 (vbool4_t): Likewise.
19354 (vbool8_t): Likewise.
19355 (vbool16_t): Likewise.
19356 (vbool32_t): Likewise.
19357 (vbool64_t): Likewise.
19358 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
19359 New macro for vint*m1_t.
19360 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
19361 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
19362 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
19363 (required_extensions_p): Add vint8m1_t interpret case.
19364 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
19365 Add vint*m1_t interpret to base type.
19366 (signed_eew16_lmul1_interpret): Likewise.
19367 (signed_eew32_lmul1_interpret): Likewise.
19368 (signed_eew64_lmul1_interpret): Likewise.
19370 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19372 * config/riscv/autovec.md: Adjust for new interface.
19373 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
19374 (emit_nonvlmax_insn): Add AVL operand.
19375 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
19376 (emit_nonvlmax_insn): Add AVL operand.
19377 (sew64_scalar_helper): Adjust for new interface.
19378 (expand_tuple_move): Ditto.
19379 * config/riscv/vector.md: Ditto.
19381 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19383 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
19384 (expand_const_vector): Ditto.
19385 (legitimize_move): Ditto.
19386 (sew64_scalar_helper): Ditto.
19387 (expand_tuple_move): Ditto.
19388 (expand_vector_init_insert_elems): Ditto.
19389 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
19391 2023-05-24 liuhongt <hongtao.liu@intel.com>
19394 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
19395 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
19396 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
19397 (ix86_masked_all_ones): Handle 64-bit mask.
19398 * config/i386/i386-builtin.def: Replace icode of related
19399 non-mask simd abs builtins with CODE_FOR_nothing.
19401 2023-05-23 Martin Uecker <uecker@tugraz.at>
19404 * function.cc (gimplify_parm_type): Remove function.
19405 (gimplify_parameters): Call gimplify_type_sizes.
19407 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19409 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
19410 and change to also accept '*subx' pattern.
19413 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19415 * config/xtensa/predicates.md (addsub_operator): New.
19416 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
19417 *extzvsi-1bit_addsubx): New insn_and_split patterns.
19418 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
19419 Add a special case about ifcvt 'noce_try_cmove()' to handle
19420 constant loads that do not fit into signed 12 bits in the
19421 patterns added above.
19423 2023-05-23 Richard Biener <rguenther@suse.de>
19425 PR tree-optimization/109747
19426 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
19427 the SLP node only once to the cost hook.
19429 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
19431 * config/avr/avr.cc (avr_insn_cost): New static function.
19432 (TARGET_INSN_COST): Define to that function.
19434 2023-05-23 Richard Biener <rguenther@suse.de>
19437 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
19438 For vector construction or splats apply GPR->XMM move
19439 costing. QImode memory can be handled directly only
19440 with SSE4.1 pinsrb.
19442 2023-05-23 Richard Biener <rguenther@suse.de>
19444 PR tree-optimization/108752
19445 * tree-vect-stmts.cc (vectorizable_operation): For bit
19446 operations with generic word_mode vectors do not cost
19447 an extra stmt. For plus, minus and negate also cost the
19448 constant materialization.
19450 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
19452 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
19453 Call ix86_expand_vec_shift_qihi_constant for shifts
19454 with constant count operand.
19455 * config/i386/i386.cc (ix86_shift_rotate_cost):
19456 Handle V4QImode and V8QImode.
19457 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
19458 (<insn>v4qi3): Ditto.
19460 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19462 * config/riscv/vector.md: Add mode.
19464 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
19466 PR tree-optimization/109934
19467 * value-range.cc (irange::invert): Remove buggy special case.
19469 2023-05-23 Richard Biener <rguenther@suse.de>
19471 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
19474 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
19477 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
19478 subregs between any scalars that are 64 bits or smaller.
19479 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
19480 (bits_etype): New int attribute.
19481 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
19482 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
19483 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
19485 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
19487 * doc/md.texi: Document that <FOO> can be used to refer to the
19488 numerical value of an int iterator FOO. Tweak other parts of
19489 the int iterator documentation.
19490 * read-rtl.cc (iterator_group::has_self_attr): New field.
19491 (map_attr_string): When has_self_attr is true, make <FOO>
19492 expand to the current value of iterator FOO.
19493 (initialize_iterators): Set has_self_attr for int iterators.
19495 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19497 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
19498 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
19499 (RVV_UNOP_NUM): New macro.
19500 (RVV_BINOP_NUM): Ditto.
19501 (legitimize_move): Refactor the framework of RVV auto-vectorization.
19502 (emit_vlmax_op): Ditto.
19503 (emit_vlmax_reg_op): Ditto.
19504 (emit_len_op): Ditto.
19505 (emit_len_binop): Ditto.
19506 (emit_vlmax_tany_many): Ditto.
19507 (emit_nonvlmax_tany_many): Ditto.
19508 (sew64_scalar_helper): Ditto.
19509 (expand_tuple_move): Ditto.
19510 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
19511 (emit_pred_binop): Ditto.
19512 (emit_vlmax_op): Ditto.
19513 (emit_vlmax_tany_many): New function.
19514 (emit_len_op): Remove.
19515 (emit_nonvlmax_tany_many): New function.
19516 (emit_vlmax_reg_op): Remove.
19517 (emit_len_binop): Ditto.
19518 (emit_index_op): Ditto.
19519 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
19520 (expand_const_vector): Ditto.
19521 (legitimize_move): Ditto.
19522 (sew64_scalar_helper): Ditto.
19523 (expand_tuple_move): Ditto.
19524 (expand_vector_init_insert_elems): Ditto.
19525 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
19526 * config/riscv/vector.md: Ditto.
19528 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19531 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
19532 and constraint for operand 0.
19533 (add_vec_concat_subst_be): Likewise.
19535 2023-05-23 Richard Biener <rguenther@suse.de>
19537 PR tree-optimization/109849
19538 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
19539 and use that to determine what to hoist.
19541 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
19543 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
19544 specific treatment for bit-fields only if they have an integral type
19545 and filter out non-integral bit-fields that do not start and end on
19548 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
19550 PR tree-optimization/109920
19551 * value-range.h (RESIZABLE>::~int_range): Use delete[].
19553 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
19555 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
19556 calcuation of integer vector mode costs to reflect generated
19557 instruction sequences of different integer vector modes and
19558 different target ABIs. Remove "speed" function argument.
19559 (ix86_rtx_costs): Update call for removed function argument.
19560 (ix86_vector_costs::add_stmt_cost): Ditto.
19562 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
19564 * value-range.h (class Value_Range): Implement set_zero,
19565 set_nonzero, and nonzero_p.
19567 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
19569 * config/i386/i386.cc (ix86_multiplication_cost): Add
19570 the cost of a memory read to the cost of V?QImode sequences.
19572 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19574 * config/riscv/riscv-v.cc: Add "m_" prefix.
19576 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19578 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
19579 multiple-rgroup of length.
19580 * tree-vect-stmts.cc (vectorizable_store): Ditto.
19581 (vectorizable_load): Ditto.
19582 * tree-vectorizer.h (vect_get_loop_len): Ditto.
19584 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19586 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
19589 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
19591 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
19592 handling for the case index == count.
19594 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
19597 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
19598 Don't fold to XOR / AND / XOR if just one bit is copied to the
19601 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
19603 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
19604 builtin for bit reversal using brev instruction.
19605 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
19606 NVPTX_BUILTIN_BREVLL.
19607 (nvptx_init_builtins): Define "brev" and "brevll".
19608 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
19609 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
19610 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
19611 section, document __builtin_nvptx_brev{,ll}.
19613 2023-05-21 Jakub Jelinek <jakub@redhat.com>
19615 PR tree-optimization/109505
19616 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
19617 Combine successive equal operations with constants,
19618 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
19619 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
19622 2023-05-21 Andrew Pinski <apinski@marvell.com>
19624 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
19626 2023-05-21 Pan Li <pan2.li@intel.com>
19628 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
19629 rest bool size, aka 2, 4, 8, 16, 32, 64.
19630 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
19631 Register vbool[2|4|8|16|32|64] interpret function.
19632 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
19633 New macro for vbool2_t.
19634 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
19635 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
19636 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
19637 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
19638 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
19639 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
19640 (vint16m1_t): Likewise.
19641 (vint32m1_t): Likewise.
19642 (vint64m1_t): Likewise.
19643 (vuint8m1_t): Likewise.
19644 (vuint16m1_t): Likewise.
19645 (vuint32m1_t): Likewise.
19646 (vuint64m1_t): Likewise.
19647 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
19648 New macro for vbool2_t.
19649 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
19650 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
19651 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
19652 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
19653 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
19654 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
19655 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
19656 vbool2_t interprect to base type.
19657 (bool4_interpret): Likewise.
19658 (bool8_interpret): Likewise.
19659 (bool16_interpret): Likewise.
19660 (bool32_interpret): Likewise.
19661 (bool64_interpret): Likewise.
19663 2023-05-21 Andrew Pinski <apinski@marvell.com>
19665 PR middle-end/109919
19666 * expr.cc (expand_single_bit_test): Don't use the
19667 target for expand_expr.
19669 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
19671 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
19674 2023-05-20 Pan Li <pan2.li@intel.com>
19676 * mode-switching.cc (entity_map): Initialize the array to zero.
19679 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
19682 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
19683 Remove superfluous "parallel" in insn pattern.
19684 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
19685 printing error text to assembly.
19687 2023-05-20 Andrew Pinski <apinski@marvell.com>
19689 * expr.cc (fold_single_bit_test): Rename to ...
19690 (expand_single_bit_test): This and expand directly.
19691 (do_store_flag): Update for the rename function.
19693 2023-05-20 Andrew Pinski <apinski@marvell.com>
19695 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
19696 instead of shift/and.
19698 2023-05-20 Andrew Pinski <apinski@marvell.com>
19700 * expr.cc (fold_single_bit_test): Add an assert
19701 and simplify based on code being NE_EXPR or EQ_EXPR.
19703 2023-05-20 Andrew Pinski <apinski@marvell.com>
19705 * expr.cc (fold_single_bit_test): Take inner and bitnum
19706 instead of arg0 and arg1. Update the code.
19707 (do_store_flag): Don't create a tree when calling
19708 fold_single_bit_test instead just call it with the bitnum
19709 and the inner tree.
19711 2023-05-20 Andrew Pinski <apinski@marvell.com>
19713 * expr.cc (fold_single_bit_test): Use get_def_for_expr
19714 instead of checking the inner's code.
19716 2023-05-20 Andrew Pinski <apinski@marvell.com>
19718 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
19719 (fold_single_bit_test): This and simplify.
19721 2023-05-20 Andrew Pinski <apinski@marvell.com>
19723 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
19725 (fold_single_bit_test): Likewise.
19726 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
19727 (fold_single_bit_test): Likewise and make static.
19728 * fold-const.h (fold_single_bit_test): Remove declaration.
19730 2023-05-20 Die Li <lidie@eswincomputing.com>
19732 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
19735 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
19737 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
19739 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
19742 * config/riscv/bitmanip.md
19743 (<bitmanip_optab>disi2): Match with any_extend.
19744 (<bitmanip_optab>disi2_sext): New pattern to match
19745 with sign extend using an ANDI instruction.
19747 2023-05-19 Nathan Sidwell <nathan@acm.org>
19750 * opts.h (handle_deferred_dump_options): Declare.
19751 * opts-global.cc (handle_common_deferred_options): Do not handle
19753 (handle_deferred_dump_options): New.
19754 * toplev.cc (toplev::main): Call it after plugin init.
19756 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
19758 * config/riscv/constraints.md (DsS, DsD): Restore agreement
19759 with shiftm1 mode attribute.
19761 2023-05-19 Andrew Pinski <apinski@marvell.com>
19764 * gcc.cc (default_compilers["@c-header"]): Add %w
19765 after the --output-pch.
19767 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
19769 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
19770 to hival, ASHIFT the corresponding regs.
19772 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
19774 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
19776 2023-05-19 Jakub Jelinek <jakub@redhat.com>
19778 PR tree-optimization/105776
19779 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
19780 non-NULL, allow division statement to have a cast as single imm use
19781 rather than comparison/condition.
19782 (match_arith_overflow): In that case remove the cast stmt in addition
19783 to the division statement.
19785 2023-05-19 Jakub Jelinek <jakub@redhat.com>
19787 PR tree-optimization/101856
19788 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
19789 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
19790 support it but umul_highpart_optab does.
19792 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
19794 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
19795 of tree_to_shwi on array indices. Minor tweaks.
19797 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19799 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
19800 * attribs.cc (diag_attr_exclusions): Ditto.
19801 (decl_attributes): Ditto.
19802 (build_type_attribute_qual_variant): Ditto.
19803 * builtins.cc (fold_builtin_carg): Ditto.
19804 (fold_builtin_next_arg): Ditto.
19805 (do_mpc_arg2): Ditto.
19806 * cfgexpand.cc (expand_return): Ditto.
19807 * cgraph.h (decl_in_symtab_p): Ditto.
19808 (symtab_node::get_create): Ditto.
19809 * dwarf2out.cc (base_type_die): Ditto.
19810 (implicit_ptr_descriptor): Ditto.
19811 (gen_array_type_die): Ditto.
19812 (gen_type_die_with_usage): Ditto.
19813 (optimize_location_into_implicit_ptr): Ditto.
19814 * expr.cc (do_store_flag): Ditto.
19815 * fold-const.cc (negate_expr_p): Ditto.
19816 (fold_negate_expr_1): Ditto.
19817 (fold_convert_const): Ditto.
19818 (fold_convert_loc): Ditto.
19819 (constant_boolean_node): Ditto.
19820 (fold_binary_op_with_conditional_arg): Ditto.
19821 (build_fold_addr_expr_with_type_loc): Ditto.
19822 (fold_comparison): Ditto.
19823 (fold_checksum_tree): Ditto.
19824 (tree_unary_nonnegative_warnv_p): Ditto.
19825 (integer_valued_real_unary_p): Ditto.
19826 (fold_read_from_constant_string): Ditto.
19827 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
19828 * gimple-expr.cc (useless_type_conversion_p): Ditto.
19829 (is_gimple_reg): Ditto.
19830 (is_gimple_asm_val): Ditto.
19831 (mark_addressable): Ditto.
19832 * gimple-expr.h (is_gimple_variable): Ditto.
19833 (virtual_operand_p): Ditto.
19834 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
19835 * gimplify.cc (gimplify_bind_expr): Ditto.
19836 (gimplify_return_expr): Ditto.
19837 (gimple_add_padding_init_for_auto_var): Ditto.
19838 (gimplify_addr_expr): Ditto.
19839 (omp_add_variable): Ditto.
19840 (omp_notice_variable): Ditto.
19841 (omp_get_base_pointer): Ditto.
19842 (omp_strip_components_and_deref): Ditto.
19843 (omp_strip_indirections): Ditto.
19844 (omp_accumulate_sibling_list): Ditto.
19845 (omp_build_struct_sibling_lists): Ditto.
19846 (gimplify_adjust_omp_clauses_1): Ditto.
19847 (gimplify_adjust_omp_clauses): Ditto.
19848 (gimplify_omp_for): Ditto.
19849 (goa_lhs_expr_p): Ditto.
19850 (gimplify_one_sizepos): Ditto.
19851 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
19852 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
19853 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
19854 (propagate_controlled_uses): Ditto.
19855 * ipa-sra.cc (type_prevails_p): Ditto.
19856 (scan_expr_access): Ditto.
19857 * optabs-tree.cc (optab_for_tree_code): Ditto.
19858 * toplev.cc (wrapup_global_declaration_1): Ditto.
19859 * trans-mem.cc (transaction_invariant_address_p): Ditto.
19860 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
19861 (verify_gimple_comparison): Ditto.
19862 (verify_gimple_assign_binary): Ditto.
19863 (verify_gimple_assign_single): Ditto.
19864 * tree-complex.cc (get_component_ssa_name): Ditto.
19865 * tree-emutls.cc (lower_emutls_2): Ditto.
19866 * tree-inline.cc (copy_tree_body_r): Ditto.
19867 (estimate_move_cost): Ditto.
19868 (copy_decl_for_dup_finish): Ditto.
19869 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
19870 (note_nonlocal_vla_type): Ditto.
19871 (convert_local_omp_clauses): Ditto.
19872 (remap_vla_decls): Ditto.
19873 (fixup_vla_decls): Ditto.
19874 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
19875 * tree-pretty-print.cc (print_declaration): Ditto.
19876 (print_call_name): Ditto.
19877 * tree-sra.cc (compare_access_positions): Ditto.
19878 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
19879 * tree-ssa-ccp.cc (get_default_value): Ditto.
19880 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
19881 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
19882 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
19883 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
19884 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
19885 * tree-ssa-sink.cc (statement_sink_location): Ditto.
19886 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
19887 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
19888 * tree-ssa-uninit.cc (warn_uninit): Ditto.
19889 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
19890 (non_rewritable_mem_ref_base): Ditto.
19891 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
19892 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
19893 * tree-vect-generic.cc (do_binop): Ditto.
19895 * tree-vect-stmts.cc (vect_init_vector): Ditto.
19896 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
19897 * tree.cc (sign_mask_for): Ditto.
19898 (verify_type_variant): Ditto.
19899 (gimple_canonical_types_compatible_p): Ditto.
19900 (verify_type): Ditto.
19901 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
19902 * var-tracking.cc (prepare_call_arguments): Ditto.
19903 (vt_add_function_parameters): Ditto.
19904 * varasm.cc (decode_addr_const): Ditto.
19906 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19908 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
19909 (lower_reduction_clauses): Ditto.
19910 (lower_send_clauses): Ditto.
19911 (lower_omp_task_reductions): Ditto.
19912 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
19913 (worker_single_copy): Ditto.
19914 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
19915 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
19917 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19919 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
19921 (lto_read_body_or_constructor): Ditto.
19922 * lto-streamer-out.cc (tree_is_indexable): Ditto.
19923 (lto_output_var_decl_ref): Ditto.
19924 (DFS::DFS_write_tree_body): Ditto.
19925 (wrap_refs): Ditto.
19926 (write_symbol_extension_info): Ditto.
19928 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19930 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
19931 defines from tree.h.
19932 (aarch64_mangle_type): Ditto.
19933 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
19934 (alpha_gimplify_va_arg_1): Ditto.
19935 * config/arc/arc.cc (arc_encode_section_info): Ditto.
19936 (arc_is_aux_reg_p): Ditto.
19937 (arc_is_uncached_mem_p): Ditto.
19938 (arc_handle_aux_attribute): Ditto.
19939 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
19940 (arm_handle_cmse_nonsecure_call): Ditto.
19941 (arm_set_default_type_attributes): Ditto.
19942 (arm_is_segment_info_known): Ditto.
19943 (arm_mangle_type): Ditto.
19944 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
19945 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
19946 (avr_decl_absdata_p): Ditto.
19947 (avr_insert_attributes): Ditto.
19948 (avr_section_type_flags): Ditto.
19949 (avr_encode_section_info): Ditto.
19950 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
19951 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
19952 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
19953 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
19954 (csky_mangle_type): Ditto.
19955 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
19956 * config/darwin.cc (is_objc_metadata): Ditto.
19957 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
19958 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
19959 * config/frv/frv.cc (frv_emit_movsi): Ditto.
19960 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
19961 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
19962 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
19963 * config/i386/i386-expand.cc: Ditto.
19964 * config/i386/i386.cc (type_natural_mode): Ditto.
19965 (ix86_function_arg): Ditto.
19966 (ix86_data_alignment): Ditto.
19967 (ix86_local_alignment): Ditto.
19968 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
19969 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
19970 (i386_pe_type_dllexport_p): Ditto.
19971 (i386_pe_adjust_class_at_definition): Ditto.
19972 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
19973 (i386_pe_binds_local_p): Ditto.
19974 (i386_pe_section_type_flags): Ditto.
19975 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
19976 (ia64_gimplify_va_arg): Ditto.
19977 (ia64_in_small_data_p): Ditto.
19978 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
19979 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
19980 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
19981 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
19982 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
19983 (mcore_encode_section_info): Ditto.
19984 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
19985 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
19986 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
19987 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
19988 (pass_in_memory): Ditto.
19989 (nvptx_generate_vector_shuffle): Ditto.
19990 (nvptx_lockless_update): Ditto.
19991 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
19992 (pa_function_value): Ditto.
19993 (pa_function_arg): Ditto.
19994 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
19995 (TEXT_SPACE_P): Ditto.
19996 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
19997 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
19998 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
19999 (riscv_mangle_type): Ditto.
20000 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
20001 (rl78_addsi3_internal): Ditto.
20002 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
20003 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
20004 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
20005 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
20006 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
20007 (rs6000_function_arg_advance_1): Ditto.
20008 (rs6000_function_arg): Ditto.
20009 (rs6000_pass_by_reference): Ditto.
20010 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
20011 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
20012 (rs6000_set_default_type_attributes): Ditto.
20013 (rs6000_elf_in_small_data_p): Ditto.
20014 (IN_NAMED_SECTION): Ditto.
20015 (rs6000_xcoff_encode_section_info): Ditto.
20016 (rs6000_function_value): Ditto.
20017 (invalid_arg_for_unprototyped_fn): Ditto.
20018 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
20019 (s390_vec_n_elem): Ditto.
20020 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
20021 (s390_function_arg_integer): Ditto.
20022 (s390_return_in_memory): Ditto.
20023 (s390_encode_section_info): Ditto.
20024 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
20025 (sh_function_value): Ditto.
20026 * config/sol2.cc (solaris_insert_attributes): Ditto.
20027 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
20028 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
20029 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
20030 (xstormy16_handle_below100_attribute): Ditto.
20031 * config/v850/v850.cc (v850_encode_section_info): Ditto.
20032 (v850_insert_attributes): Ditto.
20033 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
20034 (visium_return_in_memory): Ditto.
20035 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
20037 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
20039 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
20040 (ix86_expand_vecop_qihi): Add op2vec bool variable.
20041 Do not set REG_EQUAL note.
20042 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
20044 * config/i386/i386.cc (ix86_multiplication_cost): Handle
20045 V4QImode and V8QImode.
20046 * config/i386/mmx.md (mulv8qi3): New expander.
20048 * config/i386/sse.md (mulv8qi3): Remove.
20050 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
20052 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
20054 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
20056 PR bootstrap/105831
20057 * config.gcc: Use = operator instead of ==.
20059 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
20061 PR bootstrap/105831
20062 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
20063 * configure.ac: Likewise.
20064 * configure: Regenerate.
20066 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20068 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
20069 (__ARM_mve_coerce1): Remove.
20070 (__ARM_mve_coerce2): Remove.
20071 (__ARM_mve_coerce3): Remove.
20072 (__ARM_mve_coerce_i_scalar): New.
20073 (__ARM_mve_coerce_s8_ptr): New.
20074 (__ARM_mve_coerce_u8_ptr): New.
20075 (__ARM_mve_coerce_s16_ptr): New.
20076 (__ARM_mve_coerce_u16_ptr): New.
20077 (__ARM_mve_coerce_s32_ptr): New.
20078 (__ARM_mve_coerce_u32_ptr): New.
20079 (__ARM_mve_coerce_s64_ptr): New.
20080 (__ARM_mve_coerce_u64_ptr): New.
20081 (__ARM_mve_coerce_f_scalar): New.
20082 (__ARM_mve_coerce_f16_ptr): New.
20083 (__ARM_mve_coerce_f32_ptr): New.
20084 (__arm_vst4q): Change _coerce_ overloads.
20085 (__arm_vbicq): Change _coerce_ overloads.
20086 (__arm_vld1q): Change _coerce_ overloads.
20087 (__arm_vld1q_z): Change _coerce_ overloads.
20088 (__arm_vld2q): Change _coerce_ overloads.
20089 (__arm_vld4q): Change _coerce_ overloads.
20090 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
20091 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
20092 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
20093 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
20094 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
20095 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
20096 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
20097 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
20098 (__arm_vst1q_p): Change _coerce_ overloads.
20099 (__arm_vst2q): Change _coerce_ overloads.
20100 (__arm_vst1q): Change _coerce_ overloads.
20101 (__arm_vstrhq): Change _coerce_ overloads.
20102 (__arm_vstrhq_p): Change _coerce_ overloads.
20103 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
20104 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
20105 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
20106 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
20107 (__arm_vstrwq_p): Change _coerce_ overloads.
20108 (__arm_vstrwq): Change _coerce_ overloads.
20109 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
20110 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
20111 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
20112 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
20113 (__arm_vsetq_lane): Change _coerce_ overloads.
20114 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
20115 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
20116 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
20117 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
20118 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
20119 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
20120 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
20121 (__arm_vidupq_x_u8): Change _coerce_ overloads.
20122 (__arm_vddupq_x_u8): Change _coerce_ overloads.
20123 (__arm_vidupq_x_u16): Change _coerce_ overloads.
20124 (__arm_vddupq_x_u16): Change _coerce_ overloads.
20125 (__arm_vidupq_x_u32): Change _coerce_ overloads.
20126 (__arm_vddupq_x_u32): Change _coerce_ overloads.
20127 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
20128 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
20129 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
20130 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
20131 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
20132 (__arm_vidupq_u16): Change _coerce_ overloads.
20133 (__arm_vidupq_u32): Change _coerce_ overloads.
20134 (__arm_vidupq_u8): Change _coerce_ overloads.
20135 (__arm_vddupq_u16): Change _coerce_ overloads.
20136 (__arm_vddupq_u32): Change _coerce_ overloads.
20137 (__arm_vddupq_u8): Change _coerce_ overloads.
20138 (__arm_viwdupq_m): Change _coerce_ overloads.
20139 (__arm_viwdupq_u16): Change _coerce_ overloads.
20140 (__arm_viwdupq_u32): Change _coerce_ overloads.
20141 (__arm_viwdupq_u8): Change _coerce_ overloads.
20142 (__arm_vdwdupq_m): Change _coerce_ overloads.
20143 (__arm_vdwdupq_u16): Change _coerce_ overloads.
20144 (__arm_vdwdupq_u32): Change _coerce_ overloads.
20145 (__arm_vdwdupq_u8): Change _coerce_ overloads.
20146 (__arm_vstrbq): Change _coerce_ overloads.
20147 (__arm_vstrbq_p): Change _coerce_ overloads.
20148 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
20149 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
20150 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
20151 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
20152 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
20154 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20156 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
20159 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20161 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
20162 (__arm_vadcq_u32): Likewise.
20163 (__arm_vadcq_m_s32): Likewise.
20164 (__arm_vadcq_m_u32): Likewise.
20165 (__arm_vsbcq_s32): Likewise.
20166 (__arm_vsbcq_u32): Likewise.
20167 (__arm_vsbcq_m_s32): Likewise.
20168 (__arm_vsbcq_m_u32): Likewise.
20169 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
20171 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
20173 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
20174 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
20175 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
20176 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
20177 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
20178 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
20179 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
20180 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
20181 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
20182 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
20183 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
20184 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
20185 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
20186 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
20187 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
20188 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
20189 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
20190 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
20191 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
20192 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
20193 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
20194 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
20195 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
20196 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
20197 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
20198 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
20199 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
20200 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
20201 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
20202 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
20203 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
20204 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
20205 (mve_vorrq_m_f<mode>)
20206 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
20207 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
20208 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
20209 capitalization in the emitted asm.
20211 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
20213 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
20215 (Ri): Move constraint definition from predicates.md.
20216 (Rl): Define new constraint.
20217 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
20218 missing constraint.
20219 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
20220 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
20221 op 2. Fix asm output spacing.
20222 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
20223 * config/arm/predicates.md (Ri) Move constraint to constraints.md
20224 (mve_vldrd_immediate): Move it from
20226 (mve_vstrw_immediate): New predicate.
20228 2023-05-18 Pan Li <pan2.li@intel.com>
20229 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20230 Kito Cheng <kito.cheng@sifive.com>
20231 Richard Biener <rguenther@suse.de>
20232 Richard Sandiford <richard.sandiford@arm.com>
20234 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
20235 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
20236 (struct table_elt): Extend machine_mode to 16 bits.
20237 (struct set): Ditto.
20238 * genmodes.cc (emit_mode_wider): Extend type from char to short.
20239 (emit_mode_complex): Ditto.
20240 (emit_mode_inner): Ditto.
20241 (emit_class_narrowest_mode): Ditto.
20242 * genopinit.cc (main): Extend the machine_mode limit.
20243 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
20244 re-ordered the struct fields for padding.
20245 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
20246 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
20247 (get_mode_alignment): Extend type from char to short.
20248 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
20249 removed the ATTRIBUTE_PACKED.
20250 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
20251 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
20252 m_kind to 2 bits and remove m_spare.
20253 * rtl.h (RTX_CODE_BITSIZE): New macro.
20254 (struct rtx_def): Swap both the bit size and location between the
20255 rtx_code and the machine_mode.
20256 (subreg_shape::unique_id): Extend the machine_mode limit.
20257 * rtlanal.h: Extend machine_mode to 16 bits.
20258 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
20259 bits and re-ordered the struct fields for padding.
20260 (struct tree_decl_common): Extend machine_mode to 16 bits.
20262 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
20264 * genrecog.cc (print_nonbool_test): Fix type error of
20265 switch (SUBREG_BYTE (op))'.
20267 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
20269 * common/config/riscv/riscv-common.cc: Remove
20270 trailing spaces on lines.
20271 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
20272 * config/riscv/riscv.h (enum reg_class): Likewise.
20273 * config/riscv/riscv.md: Likewise.
20275 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
20277 * config/pa/pa.md (clear_cache): New.
20279 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
20281 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
20282 parenthesis. Fix misnamed index entry.
20283 <concept>: Fix misnamed index entry.
20285 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
20287 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
20289 (*<optab>si3_mask, *<optab>di3_mask): Here.
20290 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
20291 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
20293 (*<bitmanip_optab>si3_sext_mask): Likewise.
20294 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
20295 and const_di_mask_operand.
20296 (bitmanip_rotate): New iterator.
20297 (bitmanip_optab): Add rotates.
20298 * config/riscv/predicates.md (const_si_mask_operand): Renamed
20299 from const31_operand. Generalize to handle more mask constants.
20300 (const_di_mask_operand): Similarly.
20302 2023-05-17 Jakub Jelinek <jakub@redhat.com>
20305 * config/i386/i386-builtin-types.def (FLOAT128): Use
20306 float128t_type_node rather than float128_type_node.
20308 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
20310 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
20311 FP_CONTRACT_FAST (no functional change).
20313 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
20315 * config/i386/i386.cc (ix86_multiplication_cost): Correct
20316 calcuation of integer vector mode costs to reflect generated
20317 instruction sequences of different integer vector modes and
20318 different target ABIs.
20320 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20322 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
20323 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
20324 (riscv_mode_needed): Ditto.
20325 (riscv_mode_after): Ditto.
20326 (riscv_mode_entry): Ditto.
20327 (riscv_mode_exit): Ditto.
20328 (riscv_mode_priority): Ditto.
20329 (TARGET_MODE_EMIT): New target hook.
20330 (TARGET_MODE_NEEDED): Ditto.
20331 (TARGET_MODE_AFTER): Ditto.
20332 (TARGET_MODE_ENTRY): Ditto.
20333 (TARGET_MODE_EXIT): Ditto.
20334 (TARGET_MODE_PRIORITY): Ditto.
20335 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
20336 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
20337 * config/riscv/riscv.md: Add csrwvxrm.
20338 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
20339 (vxrmsi): New pattern.
20341 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20343 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
20344 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
20345 (struct narrow_alu_def): Ditto.
20346 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
20347 (function_expander::use_exact_insn): Ditto.
20348 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
20349 (function_base::has_rounding_mode_operand_p): New function.
20351 2023-05-17 Andrew Pinski <apinski@marvell.com>
20353 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
20354 against 0 instead of calling integer_zerop.
20356 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20358 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
20359 (DEF_RVV_VXRM_ENUM): New macro.
20360 (handle_pragma_vector): Add vxrm enum register.
20361 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
20367 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
20369 * value-range.h (Value_Range::operator=): New.
20371 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
20373 * value-range.cc (vrange::operator=): Add a stub to copy
20374 unsupported ranges.
20375 * value-range.h (is_a <unsupported_range>): New.
20376 (Value_Range::operator=): Support copying unsupported ranges.
20378 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
20380 * data-streamer-in.cc (streamer_read_real_value): New.
20381 (streamer_read_value_range): New.
20382 * data-streamer-out.cc (streamer_write_real_value): New.
20383 (streamer_write_vrange): New.
20384 * data-streamer.h (streamer_write_vrange): New.
20385 (streamer_read_value_range): New.
20387 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
20390 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
20391 is ignored for a fixed underlying type.
20392 (C++ Dialect Options): Likewise for -fstrict-enums.
20394 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
20396 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
20399 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
20401 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
20403 (s390_atomic_align_for_mode): New.
20405 2023-05-17 Jakub Jelinek <jakub@redhat.com>
20407 * wide-int.cc (wi::from_array): Add missing closing paren in function
20410 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
20412 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
20413 suggested unroll factor once the previous analysis fails.
20415 2023-05-17 Pan Li <pan2.li@intel.com>
20417 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
20419 (main): Add bool1 to the type indexer.
20420 * config/riscv/riscv-vector-builtins-functions.def
20421 (vreinterpret): Register vbool1 interpret function.
20422 * config/riscv/riscv-vector-builtins-types.def
20423 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
20424 (vint8m1_t): Add the type to bool1_interpret_ops.
20425 (vint16m1_t): Ditto.
20426 (vint32m1_t): Ditto.
20427 (vint64m1_t): Ditto.
20428 (vuint8m1_t): Ditto.
20429 (vuint16m1_t): Ditto.
20430 (vuint32m1_t): Ditto.
20431 (vuint64m1_t): Ditto.
20432 * config/riscv/riscv-vector-builtins.cc
20433 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
20434 (required_extensions_p): Add bool1 interpret case.
20435 * config/riscv/riscv-vector-builtins.def
20436 (bool1_interpret): Add bool1 interpret to base type.
20437 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
20438 with VB dest for vreinterpret.
20440 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
20443 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
20444 constants through "lis; xoris".
20446 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
20448 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
20449 default rs6000 target pass for O2 and above.
20450 * doc/invoke.texi: Document -free
20452 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
20454 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
20455 Fix wrong select_kind...
20457 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
20459 * config/s390/s390-protos.h (s390_expand_setmem): Change
20460 function signature.
20461 * config/s390/s390.cc (s390_expand_setmem): For memset's less
20462 than or equal to 256 byte do not perform a libc call.
20463 * config/s390/s390.md: Change expander into a version which
20466 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
20468 * config/s390/s390-protos.h (s390_expand_movmem): New.
20469 * config/s390/s390.cc (s390_expand_movmem): New.
20470 * config/s390/s390.md (movmem<mode>): New.
20474 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
20476 * config/s390/s390-protos.h (s390_expand_cpymem): Change
20477 function signature.
20478 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
20479 than or equal to 256 byte do not perform a libc call.
20480 (s390_expand_insv): Adapt new function signature of
20481 s390_expand_cpymem.
20482 * config/s390/s390.md: Change expander into a version which
20485 2023-05-16 Andrew Pinski <apinski@marvell.com>
20487 PR tree-optimization/109424
20488 * match.pd: Add patterns for min/max of zero_one_valued
20491 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20493 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
20494 * config/riscv/riscv-vector-builtins.cc
20495 (function_expander::use_ternop_insn): Add default rounding mode.
20496 (function_expander::use_widen_ternop_insn): Ditto.
20497 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
20498 (riscv_hard_regno_mode_ok): Ditto.
20499 (riscv_conditional_register_usage): Ditto.
20500 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
20501 (FRM_REG_P): Ditto.
20502 (RISCV_DWARF_FRM): Ditto.
20503 * config/riscv/riscv.md: Ditto.
20504 * config/riscv/vector-iterators.md: split no frm and has frm operations.
20505 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
20506 (@pred_<optab><mode>): Ditto.
20508 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
20510 PR tree-optimization/109695
20511 * value-range.cc (irange::operator=): Resize range.
20512 (irange::union_): Same.
20513 (irange::intersect): Same.
20514 (irange::invert): Same.
20515 (int_range_max): Default to 3 sub-ranges and resize as needed.
20516 * value-range.h (irange::maybe_resize): New.
20518 (int_range::int_range): Adjust for resizing.
20519 (int_range::operator=): Same.
20521 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
20523 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
20525 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
20526 when range changed.
20528 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20530 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
20531 * config/riscv/riscv-vector-builtins.cc
20532 (function_expander::use_exact_insn): Add default rounding mode operand.
20533 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
20534 (riscv_hard_regno_mode_ok): Ditto.
20535 (riscv_conditional_register_usage): Ditto.
20536 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
20537 (VXRM_REG_P): Ditto.
20538 (RISCV_DWARF_VXRM): Ditto.
20539 * config/riscv/riscv.md: Ditto.
20540 * config/riscv/vector.md: Ditto
20542 2023-05-15 Pan Li <pan2.li@intel.com>
20544 * optabs.cc (maybe_gen_insn): Add case to generate instruction
20545 that has 11 operands.
20547 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20549 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
20550 logic for vector modes.
20552 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20555 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
20556 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
20557 (aarch64_cmtst<mode>): Rename to...
20558 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
20559 (*aarch64_cmtst_same_<mode>): Rename to...
20560 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
20561 (*aarch64_cmtstdi): Rename to...
20562 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
20563 (aarch64_fac<optab><mode>): Rename to...
20564 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
20566 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20569 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
20570 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
20572 2023-05-15 Pan Li <pan2.li@intel.com>
20573 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20574 kito-cheng <kito.cheng@sifive.com>
20576 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
20577 deciding the mode is constant or not.
20578 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
20580 2023-05-15 Richard Biener <rguenther@suse.de>
20582 PR tree-optimization/109848
20583 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
20584 TARGET_MEM_REF address preparation before the store, not
20587 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20589 * config/riscv/riscv.cc
20590 (riscv_vectorize_preferred_vector_alignment): New function.
20591 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
20593 2023-05-14 Andrew Pinski <apinski@marvell.com>
20595 PR tree-optimization/109829
20596 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
20598 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
20601 * config/i386/i386.cc: Revert the 2023-05-11 change.
20602 (ix86_widen_mult_cost): Return high value instead of
20603 ICEing for unsupported modes.
20605 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
20607 * config/i386/i386.cc (x86_function_profiler): Take
20608 ix86_direct_extern_access into account when generating calls
20611 2023-05-14 Pan Li <pan2.li@intel.com>
20613 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
20614 Refactor the or pattern to switch cases.
20616 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20618 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
20619 aarch64_expand_vector_init to this, and remove interleaving case.
20620 Recursively call aarch64_expand_vector_init_fallback, instead of
20621 aarch64_expand_vector_init.
20622 (aarch64_unzip_vector_init): New function.
20623 (aarch64_expand_vector_init): Likewise.
20625 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
20627 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
20628 Pull out function call from the gcc_assert.
20630 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
20632 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
20633 (policy_to_str): New.
20634 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
20636 2023-05-13 Andrew Pinski <apinski@marvell.com>
20638 PR tree-optimization/109834
20639 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
20640 (popcount(rotate(x,y))->popcount(x)): Likewise.
20642 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
20644 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
20645 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
20646 gen_extend_insn to generate zero/sign extension instructions.
20648 (ix86_expand_vecop_qihi): Initialize interleave functions
20649 for MULT code only. Fix comments.
20651 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
20654 * config/i386/mmx.md (mulv2si3): Remove expander.
20655 (mulv2si3): Rename insn pattern from *mulv2si.
20657 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
20659 PR libstdc++/109816
20660 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
20661 '!lto_stream_offload_p'.
20663 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
20664 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20667 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
20668 (local_avl_compatible_p): New.
20669 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
20670 for LCM, rewrite as a backward algorithm.
20671 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
20672 interface, handle a BB at once.
20674 2023-05-12 Richard Biener <rguenther@suse.de>
20676 PR tree-optimization/64731
20677 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
20678 handle TARGET_MEM_REF destinations of stores from vector
20681 2023-05-12 Richard Biener <rguenther@suse.de>
20683 PR tree-optimization/109791
20684 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
20686 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
20689 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20691 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
20692 * config/arm/arm-mve-builtins-base.def (vsriq): New.
20693 * config/arm/arm-mve-builtins-base.h (vsriq): New.
20694 * config/arm/arm-mve-builtins.cc
20695 (function_instance::has_inactive_argument): Handle vsriq.
20696 * config/arm/arm_mve.h (vsriq): Remove.
20698 (vsriq_n_u8): Remove.
20699 (vsriq_n_s8): Remove.
20700 (vsriq_n_u16): Remove.
20701 (vsriq_n_s16): Remove.
20702 (vsriq_n_u32): Remove.
20703 (vsriq_n_s32): Remove.
20704 (vsriq_m_n_s8): Remove.
20705 (vsriq_m_n_u8): Remove.
20706 (vsriq_m_n_s16): Remove.
20707 (vsriq_m_n_u16): Remove.
20708 (vsriq_m_n_s32): Remove.
20709 (vsriq_m_n_u32): Remove.
20710 (__arm_vsriq_n_u8): Remove.
20711 (__arm_vsriq_n_s8): Remove.
20712 (__arm_vsriq_n_u16): Remove.
20713 (__arm_vsriq_n_s16): Remove.
20714 (__arm_vsriq_n_u32): Remove.
20715 (__arm_vsriq_n_s32): Remove.
20716 (__arm_vsriq_m_n_s8): Remove.
20717 (__arm_vsriq_m_n_u8): Remove.
20718 (__arm_vsriq_m_n_s16): Remove.
20719 (__arm_vsriq_m_n_u16): Remove.
20720 (__arm_vsriq_m_n_s32): Remove.
20721 (__arm_vsriq_m_n_u32): Remove.
20722 (__arm_vsriq): Remove.
20723 (__arm_vsriq_m): Remove.
20725 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20727 * config/arm/iterators.md (mve_insn): Add vsri.
20728 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
20729 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
20730 (mve_vsriq_m_n_<supf><mode>): Rename into ...
20731 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20733 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20735 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
20736 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
20738 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20740 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
20741 * config/arm/arm-mve-builtins-base.def (vsliq): New.
20742 * config/arm/arm-mve-builtins-base.h (vsliq): New.
20743 * config/arm/arm-mve-builtins.cc
20744 (function_instance::has_inactive_argument): Handle vsliq.
20745 * config/arm/arm_mve.h (vsliq): Remove.
20747 (vsliq_n_u8): Remove.
20748 (vsliq_n_s8): Remove.
20749 (vsliq_n_u16): Remove.
20750 (vsliq_n_s16): Remove.
20751 (vsliq_n_u32): Remove.
20752 (vsliq_n_s32): Remove.
20753 (vsliq_m_n_s8): Remove.
20754 (vsliq_m_n_s32): Remove.
20755 (vsliq_m_n_s16): Remove.
20756 (vsliq_m_n_u8): Remove.
20757 (vsliq_m_n_u32): Remove.
20758 (vsliq_m_n_u16): Remove.
20759 (__arm_vsliq_n_u8): Remove.
20760 (__arm_vsliq_n_s8): Remove.
20761 (__arm_vsliq_n_u16): Remove.
20762 (__arm_vsliq_n_s16): Remove.
20763 (__arm_vsliq_n_u32): Remove.
20764 (__arm_vsliq_n_s32): Remove.
20765 (__arm_vsliq_m_n_s8): Remove.
20766 (__arm_vsliq_m_n_s32): Remove.
20767 (__arm_vsliq_m_n_s16): Remove.
20768 (__arm_vsliq_m_n_u8): Remove.
20769 (__arm_vsliq_m_n_u32): Remove.
20770 (__arm_vsliq_m_n_u16): Remove.
20771 (__arm_vsliq): Remove.
20772 (__arm_vsliq_m): Remove.
20774 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20776 * config/arm/iterators.md (mve_insn>): Add vsli.
20777 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
20778 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20779 (mve_vsliq_m_n_<supf><mode>): Rename into ...
20780 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20782 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20784 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
20785 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
20787 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20789 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
20790 * config/arm/arm-mve-builtins-base.def (vpselq): New.
20791 * config/arm/arm-mve-builtins-base.h (vpselq): New.
20792 * config/arm/arm_mve.h (vpselq): Remove.
20793 (vpselq_u8): Remove.
20794 (vpselq_s8): Remove.
20795 (vpselq_u16): Remove.
20796 (vpselq_s16): Remove.
20797 (vpselq_u32): Remove.
20798 (vpselq_s32): Remove.
20799 (vpselq_u64): Remove.
20800 (vpselq_s64): Remove.
20801 (vpselq_f16): Remove.
20802 (vpselq_f32): Remove.
20803 (__arm_vpselq_u8): Remove.
20804 (__arm_vpselq_s8): Remove.
20805 (__arm_vpselq_u16): Remove.
20806 (__arm_vpselq_s16): Remove.
20807 (__arm_vpselq_u32): Remove.
20808 (__arm_vpselq_s32): Remove.
20809 (__arm_vpselq_u64): Remove.
20810 (__arm_vpselq_s64): Remove.
20811 (__arm_vpselq_f16): Remove.
20812 (__arm_vpselq_f32): Remove.
20813 (__arm_vpselq): Remove.
20815 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20817 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
20818 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
20820 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20822 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
20824 * config/arm/iterators.md (MVE_VPSELQ_F): New.
20825 (mve_insn): Add vpsel.
20826 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
20827 (@mve_<mve_insn>q_<supf><mode>): ... this.
20828 (@mve_vpselq_f<mode>): Rename into ...
20829 (@mve_<mve_insn>q_f<mode>): ... this.
20831 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20833 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
20834 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
20835 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
20836 * config/arm/arm-mve-builtins.cc
20837 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
20839 * config/arm/arm_mve.h (vfmaq): Remove.
20843 (vfmasq_m): Remove.
20845 (vfmaq_f16): Remove.
20846 (vfmaq_n_f16): Remove.
20847 (vfmasq_n_f16): Remove.
20848 (vfmsq_f16): Remove.
20849 (vfmaq_f32): Remove.
20850 (vfmaq_n_f32): Remove.
20851 (vfmasq_n_f32): Remove.
20852 (vfmsq_f32): Remove.
20853 (vfmaq_m_f32): Remove.
20854 (vfmaq_m_f16): Remove.
20855 (vfmaq_m_n_f32): Remove.
20856 (vfmaq_m_n_f16): Remove.
20857 (vfmasq_m_n_f32): Remove.
20858 (vfmasq_m_n_f16): Remove.
20859 (vfmsq_m_f32): Remove.
20860 (vfmsq_m_f16): Remove.
20861 (__arm_vfmaq_f16): Remove.
20862 (__arm_vfmaq_n_f16): Remove.
20863 (__arm_vfmasq_n_f16): Remove.
20864 (__arm_vfmsq_f16): Remove.
20865 (__arm_vfmaq_f32): Remove.
20866 (__arm_vfmaq_n_f32): Remove.
20867 (__arm_vfmasq_n_f32): Remove.
20868 (__arm_vfmsq_f32): Remove.
20869 (__arm_vfmaq_m_f32): Remove.
20870 (__arm_vfmaq_m_f16): Remove.
20871 (__arm_vfmaq_m_n_f32): Remove.
20872 (__arm_vfmaq_m_n_f16): Remove.
20873 (__arm_vfmasq_m_n_f32): Remove.
20874 (__arm_vfmasq_m_n_f16): Remove.
20875 (__arm_vfmsq_m_f32): Remove.
20876 (__arm_vfmsq_m_f16): Remove.
20877 (__arm_vfmaq): Remove.
20878 (__arm_vfmasq): Remove.
20879 (__arm_vfmsq): Remove.
20880 (__arm_vfmaq_m): Remove.
20881 (__arm_vfmasq_m): Remove.
20882 (__arm_vfmsq_m): Remove.
20884 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20886 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
20888 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
20889 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
20890 (mve_insn): Add vfma, vfmas, vfms.
20891 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
20893 (@mve_<mve_insn>q_f<mode>): ... this.
20894 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
20895 (@mve_<mve_insn>q_n_f<mode>): ... this.
20896 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
20897 @mve_<mve_insn>q_m_f<mode>.
20898 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
20899 @mve_<mve_insn>q_m_n_f<mode>.
20901 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20903 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
20904 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
20906 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20908 * config/arm/arm-mve-builtins-base.cc
20909 (FUNCTION_WITH_RTX_M_N_NO_F): New.
20911 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
20912 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
20913 * config/arm/arm_mve.h (vmvnq): Remove.
20916 (vmvnq_s8): Remove.
20917 (vmvnq_s16): Remove.
20918 (vmvnq_s32): Remove.
20919 (vmvnq_n_s16): Remove.
20920 (vmvnq_n_s32): Remove.
20921 (vmvnq_u8): Remove.
20922 (vmvnq_u16): Remove.
20923 (vmvnq_u32): Remove.
20924 (vmvnq_n_u16): Remove.
20925 (vmvnq_n_u32): Remove.
20926 (vmvnq_m_u8): Remove.
20927 (vmvnq_m_s8): Remove.
20928 (vmvnq_m_u16): Remove.
20929 (vmvnq_m_s16): Remove.
20930 (vmvnq_m_u32): Remove.
20931 (vmvnq_m_s32): Remove.
20932 (vmvnq_m_n_s16): Remove.
20933 (vmvnq_m_n_u16): Remove.
20934 (vmvnq_m_n_s32): Remove.
20935 (vmvnq_m_n_u32): Remove.
20936 (vmvnq_x_s8): Remove.
20937 (vmvnq_x_s16): Remove.
20938 (vmvnq_x_s32): Remove.
20939 (vmvnq_x_u8): Remove.
20940 (vmvnq_x_u16): Remove.
20941 (vmvnq_x_u32): Remove.
20942 (vmvnq_x_n_s16): Remove.
20943 (vmvnq_x_n_s32): Remove.
20944 (vmvnq_x_n_u16): Remove.
20945 (vmvnq_x_n_u32): Remove.
20946 (__arm_vmvnq_s8): Remove.
20947 (__arm_vmvnq_s16): Remove.
20948 (__arm_vmvnq_s32): Remove.
20949 (__arm_vmvnq_n_s16): Remove.
20950 (__arm_vmvnq_n_s32): Remove.
20951 (__arm_vmvnq_u8): Remove.
20952 (__arm_vmvnq_u16): Remove.
20953 (__arm_vmvnq_u32): Remove.
20954 (__arm_vmvnq_n_u16): Remove.
20955 (__arm_vmvnq_n_u32): Remove.
20956 (__arm_vmvnq_m_u8): Remove.
20957 (__arm_vmvnq_m_s8): Remove.
20958 (__arm_vmvnq_m_u16): Remove.
20959 (__arm_vmvnq_m_s16): Remove.
20960 (__arm_vmvnq_m_u32): Remove.
20961 (__arm_vmvnq_m_s32): Remove.
20962 (__arm_vmvnq_m_n_s16): Remove.
20963 (__arm_vmvnq_m_n_u16): Remove.
20964 (__arm_vmvnq_m_n_s32): Remove.
20965 (__arm_vmvnq_m_n_u32): Remove.
20966 (__arm_vmvnq_x_s8): Remove.
20967 (__arm_vmvnq_x_s16): Remove.
20968 (__arm_vmvnq_x_s32): Remove.
20969 (__arm_vmvnq_x_u8): Remove.
20970 (__arm_vmvnq_x_u16): Remove.
20971 (__arm_vmvnq_x_u32): Remove.
20972 (__arm_vmvnq_x_n_s16): Remove.
20973 (__arm_vmvnq_x_n_s32): Remove.
20974 (__arm_vmvnq_x_n_u16): Remove.
20975 (__arm_vmvnq_x_n_u32): Remove.
20976 (__arm_vmvnq): Remove.
20977 (__arm_vmvnq_m): Remove.
20978 (__arm_vmvnq_x): Remove.
20980 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20982 * config/arm/iterators.md (mve_insn): Add vmvn.
20983 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
20984 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20985 (mve_vmvnq_m_<supf><mode>): Rename into ...
20986 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20987 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
20988 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20990 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20992 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
20993 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
20995 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20997 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
20998 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
20999 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
21000 * config/arm/arm_mve.h (vbrsrq): Remove.
21001 (vbrsrq_m): Remove.
21002 (vbrsrq_x): Remove.
21003 (vbrsrq_n_f16): Remove.
21004 (vbrsrq_n_f32): Remove.
21005 (vbrsrq_n_u8): Remove.
21006 (vbrsrq_n_s8): Remove.
21007 (vbrsrq_n_u16): Remove.
21008 (vbrsrq_n_s16): Remove.
21009 (vbrsrq_n_u32): Remove.
21010 (vbrsrq_n_s32): Remove.
21011 (vbrsrq_m_n_s8): Remove.
21012 (vbrsrq_m_n_s32): Remove.
21013 (vbrsrq_m_n_s16): Remove.
21014 (vbrsrq_m_n_u8): Remove.
21015 (vbrsrq_m_n_u32): Remove.
21016 (vbrsrq_m_n_u16): Remove.
21017 (vbrsrq_m_n_f32): Remove.
21018 (vbrsrq_m_n_f16): Remove.
21019 (vbrsrq_x_n_s8): Remove.
21020 (vbrsrq_x_n_s16): Remove.
21021 (vbrsrq_x_n_s32): Remove.
21022 (vbrsrq_x_n_u8): Remove.
21023 (vbrsrq_x_n_u16): Remove.
21024 (vbrsrq_x_n_u32): Remove.
21025 (vbrsrq_x_n_f16): Remove.
21026 (vbrsrq_x_n_f32): Remove.
21027 (__arm_vbrsrq_n_u8): Remove.
21028 (__arm_vbrsrq_n_s8): Remove.
21029 (__arm_vbrsrq_n_u16): Remove.
21030 (__arm_vbrsrq_n_s16): Remove.
21031 (__arm_vbrsrq_n_u32): Remove.
21032 (__arm_vbrsrq_n_s32): Remove.
21033 (__arm_vbrsrq_m_n_s8): Remove.
21034 (__arm_vbrsrq_m_n_s32): Remove.
21035 (__arm_vbrsrq_m_n_s16): Remove.
21036 (__arm_vbrsrq_m_n_u8): Remove.
21037 (__arm_vbrsrq_m_n_u32): Remove.
21038 (__arm_vbrsrq_m_n_u16): Remove.
21039 (__arm_vbrsrq_x_n_s8): Remove.
21040 (__arm_vbrsrq_x_n_s16): Remove.
21041 (__arm_vbrsrq_x_n_s32): Remove.
21042 (__arm_vbrsrq_x_n_u8): Remove.
21043 (__arm_vbrsrq_x_n_u16): Remove.
21044 (__arm_vbrsrq_x_n_u32): Remove.
21045 (__arm_vbrsrq_n_f16): Remove.
21046 (__arm_vbrsrq_n_f32): Remove.
21047 (__arm_vbrsrq_m_n_f32): Remove.
21048 (__arm_vbrsrq_m_n_f16): Remove.
21049 (__arm_vbrsrq_x_n_f16): Remove.
21050 (__arm_vbrsrq_x_n_f32): Remove.
21051 (__arm_vbrsrq): Remove.
21052 (__arm_vbrsrq_m): Remove.
21053 (__arm_vbrsrq_x): Remove.
21055 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21057 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
21058 (mve_insn): Add vbrsr.
21059 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
21060 (@mve_<mve_insn>q_n_f<mode>): ... this.
21061 (mve_vbrsrq_n_<supf><mode>): Rename into ...
21062 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21063 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
21064 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21065 (mve_vbrsrq_m_n_f<mode>): Rename into ...
21066 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
21068 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21070 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
21071 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
21073 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21075 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
21076 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
21077 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
21078 * config/arm/arm_mve.h (vqshluq): Remove.
21079 (vqshluq_m): Remove.
21080 (vqshluq_n_s8): Remove.
21081 (vqshluq_n_s16): Remove.
21082 (vqshluq_n_s32): Remove.
21083 (vqshluq_m_n_s8): Remove.
21084 (vqshluq_m_n_s16): Remove.
21085 (vqshluq_m_n_s32): Remove.
21086 (__arm_vqshluq_n_s8): Remove.
21087 (__arm_vqshluq_n_s16): Remove.
21088 (__arm_vqshluq_n_s32): Remove.
21089 (__arm_vqshluq_m_n_s8): Remove.
21090 (__arm_vqshluq_m_n_s16): Remove.
21091 (__arm_vqshluq_m_n_s32): Remove.
21092 (__arm_vqshluq): Remove.
21093 (__arm_vqshluq_m): Remove.
21095 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21097 * config/arm/iterators.md (mve_insn): Add vqshlu.
21098 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
21099 (VQSHLUQ_M_N, VQSHLUQ_N): New.
21100 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
21101 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21102 (mve_vqshluq_m_n_s<mode>): Change name into ...
21103 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21105 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21107 * config/arm/arm-mve-builtins-shapes.cc
21108 (binary_lshift_unsigned): New.
21109 * config/arm/arm-mve-builtins-shapes.h
21110 (binary_lshift_unsigned): New.
21112 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21114 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
21115 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
21116 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
21117 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
21118 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
21119 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
21120 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
21121 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
21122 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
21123 (vrmlaldavhaxq): Remove.
21124 (vrmlsldavhaq): Remove.
21125 (vrmlsldavhaxq): Remove.
21126 (vrmlaldavhaq_p): Remove.
21127 (vrmlaldavhaxq_p): Remove.
21128 (vrmlsldavhaq_p): Remove.
21129 (vrmlsldavhaxq_p): Remove.
21130 (vrmlaldavhaq_s32): Remove.
21131 (vrmlaldavhaq_u32): Remove.
21132 (vrmlaldavhaxq_s32): Remove.
21133 (vrmlsldavhaq_s32): Remove.
21134 (vrmlsldavhaxq_s32): Remove.
21135 (vrmlaldavhaq_p_s32): Remove.
21136 (vrmlaldavhaq_p_u32): Remove.
21137 (vrmlaldavhaxq_p_s32): Remove.
21138 (vrmlsldavhaq_p_s32): Remove.
21139 (vrmlsldavhaxq_p_s32): Remove.
21140 (__arm_vrmlaldavhaq_s32): Remove.
21141 (__arm_vrmlaldavhaq_u32): Remove.
21142 (__arm_vrmlaldavhaxq_s32): Remove.
21143 (__arm_vrmlsldavhaq_s32): Remove.
21144 (__arm_vrmlsldavhaxq_s32): Remove.
21145 (__arm_vrmlaldavhaq_p_s32): Remove.
21146 (__arm_vrmlaldavhaq_p_u32): Remove.
21147 (__arm_vrmlaldavhaxq_p_s32): Remove.
21148 (__arm_vrmlsldavhaq_p_s32): Remove.
21149 (__arm_vrmlsldavhaxq_p_s32): Remove.
21150 (__arm_vrmlaldavhaq): Remove.
21151 (__arm_vrmlaldavhaxq): Remove.
21152 (__arm_vrmlsldavhaq): Remove.
21153 (__arm_vrmlsldavhaxq): Remove.
21154 (__arm_vrmlaldavhaq_p): Remove.
21155 (__arm_vrmlaldavhaxq_p): Remove.
21156 (__arm_vrmlsldavhaq_p): Remove.
21157 (__arm_vrmlsldavhaxq_p): Remove.
21159 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21161 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
21162 (MVE_VRMLxLDAVHAxQ_P): New.
21163 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
21165 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
21166 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
21168 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
21169 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
21170 (mve_vrmlsldavhaq_sv4si): Merge into ...
21171 (@mve_<mve_insn>q_<supf>v4si): ... this.
21172 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
21173 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
21174 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
21175 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21177 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21179 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
21180 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
21182 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
21183 * config/arm/arm_mve.h (vqdmulltq): Remove.
21184 (vqdmullbq): Remove.
21185 (vqdmullbq_m): Remove.
21186 (vqdmulltq_m): Remove.
21187 (vqdmulltq_s16): Remove.
21188 (vqdmulltq_n_s16): Remove.
21189 (vqdmullbq_s16): Remove.
21190 (vqdmullbq_n_s16): Remove.
21191 (vqdmulltq_s32): Remove.
21192 (vqdmulltq_n_s32): Remove.
21193 (vqdmullbq_s32): Remove.
21194 (vqdmullbq_n_s32): Remove.
21195 (vqdmullbq_m_n_s32): Remove.
21196 (vqdmullbq_m_n_s16): Remove.
21197 (vqdmullbq_m_s32): Remove.
21198 (vqdmullbq_m_s16): Remove.
21199 (vqdmulltq_m_n_s32): Remove.
21200 (vqdmulltq_m_n_s16): Remove.
21201 (vqdmulltq_m_s32): Remove.
21202 (vqdmulltq_m_s16): Remove.
21203 (__arm_vqdmulltq_s16): Remove.
21204 (__arm_vqdmulltq_n_s16): Remove.
21205 (__arm_vqdmullbq_s16): Remove.
21206 (__arm_vqdmullbq_n_s16): Remove.
21207 (__arm_vqdmulltq_s32): Remove.
21208 (__arm_vqdmulltq_n_s32): Remove.
21209 (__arm_vqdmullbq_s32): Remove.
21210 (__arm_vqdmullbq_n_s32): Remove.
21211 (__arm_vqdmullbq_m_n_s32): Remove.
21212 (__arm_vqdmullbq_m_n_s16): Remove.
21213 (__arm_vqdmullbq_m_s32): Remove.
21214 (__arm_vqdmullbq_m_s16): Remove.
21215 (__arm_vqdmulltq_m_n_s32): Remove.
21216 (__arm_vqdmulltq_m_n_s16): Remove.
21217 (__arm_vqdmulltq_m_s32): Remove.
21218 (__arm_vqdmulltq_m_s16): Remove.
21219 (__arm_vqdmulltq): Remove.
21220 (__arm_vqdmullbq): Remove.
21221 (__arm_vqdmullbq_m): Remove.
21222 (__arm_vqdmulltq_m): Remove.
21224 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21226 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
21227 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
21228 (mve_insn): Add vqdmullb, vqdmullt.
21229 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
21230 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
21232 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
21233 (mve_vqdmulltq_n_s<mode>): Merge into ...
21234 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21235 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
21236 (@mve_<mve_insn>q_<supf><mode>): ... this.
21237 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
21239 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21240 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
21241 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
21243 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
21245 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
21246 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
21248 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
21250 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
21251 Drop unused parameter.
21252 (riscv_select_multilib): Ditto.
21253 (riscv_compute_multilib): Update call site of
21254 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
21256 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
21258 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
21259 * config/riscv/riscv-protos.h (expand_vec_init): New function.
21260 * config/riscv/riscv-v.cc (class rvv_builder): New class.
21261 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
21262 (rvv_builder::get_merged_repeating_sequence): Ditto.
21263 (expand_vector_init_insert_elems): Ditto.
21264 (expand_vec_init): Ditto.
21265 * config/riscv/vector-iterators.md: New attribute.
21267 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
21269 * config/rs6000/rs6000-builtins.def
21270 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
21272 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
21273 xsiexpdpf to xsiexpdpf_di.
21274 * config/rs6000/vsx.md (xsiexpdp): Rename to...
21275 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
21276 replace TARGET_64BIT with TARGET_POWERPC64.
21277 (xsiexpdpf): Rename to...
21278 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
21279 replace TARGET_64BIT with TARGET_POWERPC64.
21281 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
21283 * config/rs6000/rs6000-builtins.def
21284 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
21286 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
21289 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
21291 * config/rs6000/rs6000-builtins.def
21292 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
21293 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
21295 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
21296 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
21297 TARGET_64BIT check.
21298 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
21299 requirement when it has a 64-bit argument.
21301 2023-05-12 Pan Li <pan2.li@intel.com>
21302 Richard Sandiford <richard.sandiford@arm.com>
21303 Richard Biener <rguenther@suse.de>
21304 Jakub Jelinek <jakub@redhat.com>
21306 * mux-utils.h: Add overload operator == and != for pointer_mux.
21307 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
21308 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
21309 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
21310 (dv_as_decl): Ditto.
21311 (dv_as_opaque): Removed due to unnecessary.
21312 (struct variable_hasher): Take decl_or_value as compare_type.
21313 (variable_hasher::equal): Diito.
21314 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
21315 (dv_from_value): Ditto.
21316 (attrs_list_member): Ditto.
21317 (vars_copy): Ditto.
21318 (var_reg_decl_set): Ditto.
21319 (var_reg_delete_and_set): Ditto.
21320 (find_loc_in_1pdv): Ditto.
21321 (canonicalize_values_star): Ditto.
21322 (variable_post_merge_new_vals): Ditto.
21323 (dump_onepart_variable_differences): Ditto.
21324 (variable_different_p): Ditto.
21325 (set_slot_part): Ditto.
21326 (clobber_slot_part): Ditto.
21327 (clobber_variable_part): Ditto.
21329 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
21331 * match.pd: simplify vector shift + bit_and + multiply.
21333 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21335 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
21336 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
21337 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
21338 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
21339 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
21340 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
21341 * config/arm/arm-mve-builtins.cc
21342 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
21343 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
21344 * config/arm/arm_mve.h (vqrdmlashq): Remove.
21345 (vqrdmlahq): Remove.
21346 (vqdmlashq): Remove.
21347 (vqdmlahq): Remove.
21351 (vmlasq_m): Remove.
21352 (vqdmlashq_m): Remove.
21353 (vqdmlahq_m): Remove.
21354 (vqrdmlahq_m): Remove.
21355 (vqrdmlashq_m): Remove.
21356 (vmlasq_n_u8): Remove.
21357 (vmlaq_n_u8): Remove.
21358 (vqrdmlashq_n_s8): Remove.
21359 (vqrdmlahq_n_s8): Remove.
21360 (vqdmlahq_n_s8): Remove.
21361 (vqdmlashq_n_s8): Remove.
21362 (vmlasq_n_s8): Remove.
21363 (vmlaq_n_s8): Remove.
21364 (vmlasq_n_u16): Remove.
21365 (vmlaq_n_u16): Remove.
21366 (vqrdmlashq_n_s16): Remove.
21367 (vqrdmlahq_n_s16): Remove.
21368 (vqdmlashq_n_s16): Remove.
21369 (vqdmlahq_n_s16): Remove.
21370 (vmlasq_n_s16): Remove.
21371 (vmlaq_n_s16): Remove.
21372 (vmlasq_n_u32): Remove.
21373 (vmlaq_n_u32): Remove.
21374 (vqrdmlashq_n_s32): Remove.
21375 (vqrdmlahq_n_s32): Remove.
21376 (vqdmlashq_n_s32): Remove.
21377 (vqdmlahq_n_s32): Remove.
21378 (vmlasq_n_s32): Remove.
21379 (vmlaq_n_s32): Remove.
21380 (vmlaq_m_n_s8): Remove.
21381 (vmlaq_m_n_s32): Remove.
21382 (vmlaq_m_n_s16): Remove.
21383 (vmlaq_m_n_u8): Remove.
21384 (vmlaq_m_n_u32): Remove.
21385 (vmlaq_m_n_u16): Remove.
21386 (vmlasq_m_n_s8): Remove.
21387 (vmlasq_m_n_s32): Remove.
21388 (vmlasq_m_n_s16): Remove.
21389 (vmlasq_m_n_u8): Remove.
21390 (vmlasq_m_n_u32): Remove.
21391 (vmlasq_m_n_u16): Remove.
21392 (vqdmlashq_m_n_s8): Remove.
21393 (vqdmlashq_m_n_s32): Remove.
21394 (vqdmlashq_m_n_s16): Remove.
21395 (vqdmlahq_m_n_s8): Remove.
21396 (vqdmlahq_m_n_s32): Remove.
21397 (vqdmlahq_m_n_s16): Remove.
21398 (vqrdmlahq_m_n_s8): Remove.
21399 (vqrdmlahq_m_n_s32): Remove.
21400 (vqrdmlahq_m_n_s16): Remove.
21401 (vqrdmlashq_m_n_s8): Remove.
21402 (vqrdmlashq_m_n_s32): Remove.
21403 (vqrdmlashq_m_n_s16): Remove.
21404 (__arm_vmlasq_n_u8): Remove.
21405 (__arm_vmlaq_n_u8): Remove.
21406 (__arm_vqrdmlashq_n_s8): Remove.
21407 (__arm_vqdmlashq_n_s8): Remove.
21408 (__arm_vqrdmlahq_n_s8): Remove.
21409 (__arm_vqdmlahq_n_s8): Remove.
21410 (__arm_vmlasq_n_s8): Remove.
21411 (__arm_vmlaq_n_s8): Remove.
21412 (__arm_vmlasq_n_u16): Remove.
21413 (__arm_vmlaq_n_u16): Remove.
21414 (__arm_vqrdmlashq_n_s16): Remove.
21415 (__arm_vqdmlashq_n_s16): Remove.
21416 (__arm_vqrdmlahq_n_s16): Remove.
21417 (__arm_vqdmlahq_n_s16): Remove.
21418 (__arm_vmlasq_n_s16): Remove.
21419 (__arm_vmlaq_n_s16): Remove.
21420 (__arm_vmlasq_n_u32): Remove.
21421 (__arm_vmlaq_n_u32): Remove.
21422 (__arm_vqrdmlashq_n_s32): Remove.
21423 (__arm_vqdmlashq_n_s32): Remove.
21424 (__arm_vqrdmlahq_n_s32): Remove.
21425 (__arm_vqdmlahq_n_s32): Remove.
21426 (__arm_vmlasq_n_s32): Remove.
21427 (__arm_vmlaq_n_s32): Remove.
21428 (__arm_vmlaq_m_n_s8): Remove.
21429 (__arm_vmlaq_m_n_s32): Remove.
21430 (__arm_vmlaq_m_n_s16): Remove.
21431 (__arm_vmlaq_m_n_u8): Remove.
21432 (__arm_vmlaq_m_n_u32): Remove.
21433 (__arm_vmlaq_m_n_u16): Remove.
21434 (__arm_vmlasq_m_n_s8): Remove.
21435 (__arm_vmlasq_m_n_s32): Remove.
21436 (__arm_vmlasq_m_n_s16): Remove.
21437 (__arm_vmlasq_m_n_u8): Remove.
21438 (__arm_vmlasq_m_n_u32): Remove.
21439 (__arm_vmlasq_m_n_u16): Remove.
21440 (__arm_vqdmlahq_m_n_s8): Remove.
21441 (__arm_vqdmlahq_m_n_s32): Remove.
21442 (__arm_vqdmlahq_m_n_s16): Remove.
21443 (__arm_vqrdmlahq_m_n_s8): Remove.
21444 (__arm_vqrdmlahq_m_n_s32): Remove.
21445 (__arm_vqrdmlahq_m_n_s16): Remove.
21446 (__arm_vqrdmlashq_m_n_s8): Remove.
21447 (__arm_vqrdmlashq_m_n_s32): Remove.
21448 (__arm_vqrdmlashq_m_n_s16): Remove.
21449 (__arm_vqdmlashq_m_n_s8): Remove.
21450 (__arm_vqdmlashq_m_n_s16): Remove.
21451 (__arm_vqdmlashq_m_n_s32): Remove.
21452 (__arm_vmlasq): Remove.
21453 (__arm_vmlaq): Remove.
21454 (__arm_vqrdmlashq): Remove.
21455 (__arm_vqdmlashq): Remove.
21456 (__arm_vqrdmlahq): Remove.
21457 (__arm_vqdmlahq): Remove.
21458 (__arm_vmlaq_m): Remove.
21459 (__arm_vmlasq_m): Remove.
21460 (__arm_vqdmlahq_m): Remove.
21461 (__arm_vqrdmlahq_m): Remove.
21462 (__arm_vqrdmlashq_m): Remove.
21463 (__arm_vqdmlashq_m): Remove.
21465 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21467 * config/arm/iterators.md (MVE_VMLxQ_N): New.
21468 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
21470 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
21472 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
21473 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
21474 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
21475 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
21476 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21478 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21480 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
21481 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
21483 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21485 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
21486 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
21487 (vqrdmlsdhxq): New.
21488 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
21489 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
21490 (vqrdmlsdhxq): New.
21491 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
21492 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
21493 (vqrdmlsdhxq): New.
21494 * config/arm/arm-mve-builtins.cc
21495 (function_instance::has_inactive_argument): Handle vqrdmladhq,
21496 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
21497 vqdmlsdhq, vqdmlsdhxq.
21498 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
21499 (vqrdmlsdhq): Remove.
21500 (vqrdmladhxq): Remove.
21501 (vqrdmladhq): Remove.
21502 (vqdmlsdhxq): Remove.
21503 (vqdmlsdhq): Remove.
21504 (vqdmladhxq): Remove.
21505 (vqdmladhq): Remove.
21506 (vqdmladhq_m): Remove.
21507 (vqdmladhxq_m): Remove.
21508 (vqdmlsdhq_m): Remove.
21509 (vqdmlsdhxq_m): Remove.
21510 (vqrdmladhq_m): Remove.
21511 (vqrdmladhxq_m): Remove.
21512 (vqrdmlsdhq_m): Remove.
21513 (vqrdmlsdhxq_m): Remove.
21514 (vqrdmlsdhxq_s8): Remove.
21515 (vqrdmlsdhq_s8): Remove.
21516 (vqrdmladhxq_s8): Remove.
21517 (vqrdmladhq_s8): Remove.
21518 (vqdmlsdhxq_s8): Remove.
21519 (vqdmlsdhq_s8): Remove.
21520 (vqdmladhxq_s8): Remove.
21521 (vqdmladhq_s8): Remove.
21522 (vqrdmlsdhxq_s16): Remove.
21523 (vqrdmlsdhq_s16): Remove.
21524 (vqrdmladhxq_s16): Remove.
21525 (vqrdmladhq_s16): Remove.
21526 (vqdmlsdhxq_s16): Remove.
21527 (vqdmlsdhq_s16): Remove.
21528 (vqdmladhxq_s16): Remove.
21529 (vqdmladhq_s16): Remove.
21530 (vqrdmlsdhxq_s32): Remove.
21531 (vqrdmlsdhq_s32): Remove.
21532 (vqrdmladhxq_s32): Remove.
21533 (vqrdmladhq_s32): Remove.
21534 (vqdmlsdhxq_s32): Remove.
21535 (vqdmlsdhq_s32): Remove.
21536 (vqdmladhxq_s32): Remove.
21537 (vqdmladhq_s32): Remove.
21538 (vqdmladhq_m_s8): Remove.
21539 (vqdmladhq_m_s32): Remove.
21540 (vqdmladhq_m_s16): Remove.
21541 (vqdmladhxq_m_s8): Remove.
21542 (vqdmladhxq_m_s32): Remove.
21543 (vqdmladhxq_m_s16): Remove.
21544 (vqdmlsdhq_m_s8): Remove.
21545 (vqdmlsdhq_m_s32): Remove.
21546 (vqdmlsdhq_m_s16): Remove.
21547 (vqdmlsdhxq_m_s8): Remove.
21548 (vqdmlsdhxq_m_s32): Remove.
21549 (vqdmlsdhxq_m_s16): Remove.
21550 (vqrdmladhq_m_s8): Remove.
21551 (vqrdmladhq_m_s32): Remove.
21552 (vqrdmladhq_m_s16): Remove.
21553 (vqrdmladhxq_m_s8): Remove.
21554 (vqrdmladhxq_m_s32): Remove.
21555 (vqrdmladhxq_m_s16): Remove.
21556 (vqrdmlsdhq_m_s8): Remove.
21557 (vqrdmlsdhq_m_s32): Remove.
21558 (vqrdmlsdhq_m_s16): Remove.
21559 (vqrdmlsdhxq_m_s8): Remove.
21560 (vqrdmlsdhxq_m_s32): Remove.
21561 (vqrdmlsdhxq_m_s16): Remove.
21562 (__arm_vqrdmlsdhxq_s8): Remove.
21563 (__arm_vqrdmlsdhq_s8): Remove.
21564 (__arm_vqrdmladhxq_s8): Remove.
21565 (__arm_vqrdmladhq_s8): Remove.
21566 (__arm_vqdmlsdhxq_s8): Remove.
21567 (__arm_vqdmlsdhq_s8): Remove.
21568 (__arm_vqdmladhxq_s8): Remove.
21569 (__arm_vqdmladhq_s8): Remove.
21570 (__arm_vqrdmlsdhxq_s16): Remove.
21571 (__arm_vqrdmlsdhq_s16): Remove.
21572 (__arm_vqrdmladhxq_s16): Remove.
21573 (__arm_vqrdmladhq_s16): Remove.
21574 (__arm_vqdmlsdhxq_s16): Remove.
21575 (__arm_vqdmlsdhq_s16): Remove.
21576 (__arm_vqdmladhxq_s16): Remove.
21577 (__arm_vqdmladhq_s16): Remove.
21578 (__arm_vqrdmlsdhxq_s32): Remove.
21579 (__arm_vqrdmlsdhq_s32): Remove.
21580 (__arm_vqrdmladhxq_s32): Remove.
21581 (__arm_vqrdmladhq_s32): Remove.
21582 (__arm_vqdmlsdhxq_s32): Remove.
21583 (__arm_vqdmlsdhq_s32): Remove.
21584 (__arm_vqdmladhxq_s32): Remove.
21585 (__arm_vqdmladhq_s32): Remove.
21586 (__arm_vqdmladhq_m_s8): Remove.
21587 (__arm_vqdmladhq_m_s32): Remove.
21588 (__arm_vqdmladhq_m_s16): Remove.
21589 (__arm_vqdmladhxq_m_s8): Remove.
21590 (__arm_vqdmladhxq_m_s32): Remove.
21591 (__arm_vqdmladhxq_m_s16): Remove.
21592 (__arm_vqdmlsdhq_m_s8): Remove.
21593 (__arm_vqdmlsdhq_m_s32): Remove.
21594 (__arm_vqdmlsdhq_m_s16): Remove.
21595 (__arm_vqdmlsdhxq_m_s8): Remove.
21596 (__arm_vqdmlsdhxq_m_s32): Remove.
21597 (__arm_vqdmlsdhxq_m_s16): Remove.
21598 (__arm_vqrdmladhq_m_s8): Remove.
21599 (__arm_vqrdmladhq_m_s32): Remove.
21600 (__arm_vqrdmladhq_m_s16): Remove.
21601 (__arm_vqrdmladhxq_m_s8): Remove.
21602 (__arm_vqrdmladhxq_m_s32): Remove.
21603 (__arm_vqrdmladhxq_m_s16): Remove.
21604 (__arm_vqrdmlsdhq_m_s8): Remove.
21605 (__arm_vqrdmlsdhq_m_s32): Remove.
21606 (__arm_vqrdmlsdhq_m_s16): Remove.
21607 (__arm_vqrdmlsdhxq_m_s8): Remove.
21608 (__arm_vqrdmlsdhxq_m_s32): Remove.
21609 (__arm_vqrdmlsdhxq_m_s16): Remove.
21610 (__arm_vqrdmlsdhxq): Remove.
21611 (__arm_vqrdmlsdhq): Remove.
21612 (__arm_vqrdmladhxq): Remove.
21613 (__arm_vqrdmladhq): Remove.
21614 (__arm_vqdmlsdhxq): Remove.
21615 (__arm_vqdmlsdhq): Remove.
21616 (__arm_vqdmladhxq): Remove.
21617 (__arm_vqdmladhq): Remove.
21618 (__arm_vqdmladhq_m): Remove.
21619 (__arm_vqdmladhxq_m): Remove.
21620 (__arm_vqdmlsdhq_m): Remove.
21621 (__arm_vqdmlsdhxq_m): Remove.
21622 (__arm_vqrdmladhq_m): Remove.
21623 (__arm_vqrdmladhxq_m): Remove.
21624 (__arm_vqrdmlsdhq_m): Remove.
21625 (__arm_vqrdmlsdhxq_m): Remove.
21627 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21629 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
21630 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
21631 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
21632 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
21633 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
21634 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
21635 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
21636 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
21637 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
21638 (mve_vqdmladhq_s<mode>): Merge into ...
21639 (@mve_<mve_insn>q_<supf><mode>): ... this.
21641 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21643 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
21644 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
21646 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21648 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
21649 (vmlsldavaq, vmlsldavaxq): New.
21650 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
21651 (vmlsldavaq, vmlsldavaxq): New.
21652 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
21653 (vmlsldavaq, vmlsldavaxq): New.
21654 * config/arm/arm_mve.h (vmlaldavaq): Remove.
21655 (vmlaldavaxq): Remove.
21656 (vmlsldavaq): Remove.
21657 (vmlsldavaxq): Remove.
21658 (vmlaldavaq_p): Remove.
21659 (vmlaldavaxq_p): Remove.
21660 (vmlsldavaq_p): Remove.
21661 (vmlsldavaxq_p): Remove.
21662 (vmlaldavaq_s16): Remove.
21663 (vmlaldavaxq_s16): Remove.
21664 (vmlsldavaq_s16): Remove.
21665 (vmlsldavaxq_s16): Remove.
21666 (vmlaldavaq_u16): Remove.
21667 (vmlaldavaq_s32): Remove.
21668 (vmlaldavaxq_s32): Remove.
21669 (vmlsldavaq_s32): Remove.
21670 (vmlsldavaxq_s32): Remove.
21671 (vmlaldavaq_u32): Remove.
21672 (vmlaldavaq_p_s32): Remove.
21673 (vmlaldavaq_p_s16): Remove.
21674 (vmlaldavaq_p_u32): Remove.
21675 (vmlaldavaq_p_u16): Remove.
21676 (vmlaldavaxq_p_s32): Remove.
21677 (vmlaldavaxq_p_s16): Remove.
21678 (vmlsldavaq_p_s32): Remove.
21679 (vmlsldavaq_p_s16): Remove.
21680 (vmlsldavaxq_p_s32): Remove.
21681 (vmlsldavaxq_p_s16): Remove.
21682 (__arm_vmlaldavaq_s16): Remove.
21683 (__arm_vmlaldavaxq_s16): Remove.
21684 (__arm_vmlsldavaq_s16): Remove.
21685 (__arm_vmlsldavaxq_s16): Remove.
21686 (__arm_vmlaldavaq_u16): Remove.
21687 (__arm_vmlaldavaq_s32): Remove.
21688 (__arm_vmlaldavaxq_s32): Remove.
21689 (__arm_vmlsldavaq_s32): Remove.
21690 (__arm_vmlsldavaxq_s32): Remove.
21691 (__arm_vmlaldavaq_u32): Remove.
21692 (__arm_vmlaldavaq_p_s32): Remove.
21693 (__arm_vmlaldavaq_p_s16): Remove.
21694 (__arm_vmlaldavaq_p_u32): Remove.
21695 (__arm_vmlaldavaq_p_u16): Remove.
21696 (__arm_vmlaldavaxq_p_s32): Remove.
21697 (__arm_vmlaldavaxq_p_s16): Remove.
21698 (__arm_vmlsldavaq_p_s32): Remove.
21699 (__arm_vmlsldavaq_p_s16): Remove.
21700 (__arm_vmlsldavaxq_p_s32): Remove.
21701 (__arm_vmlsldavaxq_p_s16): Remove.
21702 (__arm_vmlaldavaq): Remove.
21703 (__arm_vmlaldavaxq): Remove.
21704 (__arm_vmlsldavaq): Remove.
21705 (__arm_vmlsldavaxq): Remove.
21706 (__arm_vmlaldavaq_p): Remove.
21707 (__arm_vmlaldavaxq_p): Remove.
21708 (__arm_vmlsldavaq_p): Remove.
21709 (__arm_vmlsldavaxq_p): Remove.
21711 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21713 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
21715 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
21716 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
21717 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
21718 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
21719 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
21720 (mve_vmlaldavaxq_s<mode>): Merge into ...
21721 (@mve_<mve_insn>q_<supf><mode>): ... this.
21722 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
21723 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
21725 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21727 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21729 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
21730 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
21732 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21734 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
21735 (vrmlsldavhq, vrmlsldavhxq): New.
21736 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
21737 (vrmlsldavhq, vrmlsldavhxq): New.
21738 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
21739 (vrmlsldavhq, vrmlsldavhxq): New.
21740 * config/arm/arm-mve-builtins-functions.h
21741 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
21742 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
21743 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
21744 (vrmlsldavhxq): Remove.
21745 (vrmlsldavhq): Remove.
21746 (vrmlaldavhxq): Remove.
21747 (vrmlaldavhq_p): Remove.
21748 (vrmlaldavhxq_p): Remove.
21749 (vrmlsldavhq_p): Remove.
21750 (vrmlsldavhxq_p): Remove.
21751 (vrmlaldavhq_u32): Remove.
21752 (vrmlsldavhxq_s32): Remove.
21753 (vrmlsldavhq_s32): Remove.
21754 (vrmlaldavhxq_s32): Remove.
21755 (vrmlaldavhq_s32): Remove.
21756 (vrmlaldavhq_p_s32): Remove.
21757 (vrmlaldavhxq_p_s32): Remove.
21758 (vrmlsldavhq_p_s32): Remove.
21759 (vrmlsldavhxq_p_s32): Remove.
21760 (vrmlaldavhq_p_u32): Remove.
21761 (__arm_vrmlaldavhq_u32): Remove.
21762 (__arm_vrmlsldavhxq_s32): Remove.
21763 (__arm_vrmlsldavhq_s32): Remove.
21764 (__arm_vrmlaldavhxq_s32): Remove.
21765 (__arm_vrmlaldavhq_s32): Remove.
21766 (__arm_vrmlaldavhq_p_s32): Remove.
21767 (__arm_vrmlaldavhxq_p_s32): Remove.
21768 (__arm_vrmlsldavhq_p_s32): Remove.
21769 (__arm_vrmlsldavhxq_p_s32): Remove.
21770 (__arm_vrmlaldavhq_p_u32): Remove.
21771 (__arm_vrmlaldavhq): Remove.
21772 (__arm_vrmlsldavhxq): Remove.
21773 (__arm_vrmlsldavhq): Remove.
21774 (__arm_vrmlaldavhxq): Remove.
21775 (__arm_vrmlaldavhq_p): Remove.
21776 (__arm_vrmlaldavhxq_p): Remove.
21777 (__arm_vrmlsldavhq_p): Remove.
21778 (__arm_vrmlsldavhxq_p): Remove.
21780 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21782 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
21784 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
21785 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
21786 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
21787 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
21788 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
21789 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
21790 (@mve_<mve_insn>q_<supf>v4si): ... this.
21791 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
21792 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
21794 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21796 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21798 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
21799 (vmlsldavq, vmlsldavxq): New.
21800 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
21801 (vmlsldavq, vmlsldavxq): New.
21802 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
21803 (vmlsldavq, vmlsldavxq): New.
21804 * config/arm/arm_mve.h (vmlaldavq): Remove.
21805 (vmlsldavxq): Remove.
21806 (vmlsldavq): Remove.
21807 (vmlaldavxq): Remove.
21808 (vmlaldavq_p): Remove.
21809 (vmlaldavxq_p): Remove.
21810 (vmlsldavq_p): Remove.
21811 (vmlsldavxq_p): Remove.
21812 (vmlaldavq_u16): Remove.
21813 (vmlsldavxq_s16): Remove.
21814 (vmlsldavq_s16): Remove.
21815 (vmlaldavxq_s16): Remove.
21816 (vmlaldavq_s16): Remove.
21817 (vmlaldavq_u32): Remove.
21818 (vmlsldavxq_s32): Remove.
21819 (vmlsldavq_s32): Remove.
21820 (vmlaldavxq_s32): Remove.
21821 (vmlaldavq_s32): Remove.
21822 (vmlaldavq_p_s16): Remove.
21823 (vmlaldavxq_p_s16): Remove.
21824 (vmlsldavq_p_s16): Remove.
21825 (vmlsldavxq_p_s16): Remove.
21826 (vmlaldavq_p_u16): Remove.
21827 (vmlaldavq_p_s32): Remove.
21828 (vmlaldavxq_p_s32): Remove.
21829 (vmlsldavq_p_s32): Remove.
21830 (vmlsldavxq_p_s32): Remove.
21831 (vmlaldavq_p_u32): Remove.
21832 (__arm_vmlaldavq_u16): Remove.
21833 (__arm_vmlsldavxq_s16): Remove.
21834 (__arm_vmlsldavq_s16): Remove.
21835 (__arm_vmlaldavxq_s16): Remove.
21836 (__arm_vmlaldavq_s16): Remove.
21837 (__arm_vmlaldavq_u32): Remove.
21838 (__arm_vmlsldavxq_s32): Remove.
21839 (__arm_vmlsldavq_s32): Remove.
21840 (__arm_vmlaldavxq_s32): Remove.
21841 (__arm_vmlaldavq_s32): Remove.
21842 (__arm_vmlaldavq_p_s16): Remove.
21843 (__arm_vmlaldavxq_p_s16): Remove.
21844 (__arm_vmlsldavq_p_s16): Remove.
21845 (__arm_vmlsldavxq_p_s16): Remove.
21846 (__arm_vmlaldavq_p_u16): Remove.
21847 (__arm_vmlaldavq_p_s32): Remove.
21848 (__arm_vmlaldavxq_p_s32): Remove.
21849 (__arm_vmlsldavq_p_s32): Remove.
21850 (__arm_vmlsldavxq_p_s32): Remove.
21851 (__arm_vmlaldavq_p_u32): Remove.
21852 (__arm_vmlaldavq): Remove.
21853 (__arm_vmlsldavxq): Remove.
21854 (__arm_vmlsldavq): Remove.
21855 (__arm_vmlaldavxq): Remove.
21856 (__arm_vmlaldavq_p): Remove.
21857 (__arm_vmlaldavxq_p): Remove.
21858 (__arm_vmlsldavq_p): Remove.
21859 (__arm_vmlsldavxq_p): Remove.
21861 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21863 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
21864 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
21865 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
21866 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
21867 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
21868 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
21869 (mve_vmlsldavxq_s<mode>): Merge into ...
21870 (@mve_<mve_insn>q_<supf><mode>): ... this.
21871 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
21872 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
21874 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21876 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21878 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
21879 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
21881 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21883 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
21884 * config/arm/arm-mve-builtins-base.def (vabavq): New.
21885 * config/arm/arm-mve-builtins-base.h (vabavq): New.
21886 * config/arm/arm_mve.h (vabavq): Remove.
21887 (vabavq_p): Remove.
21888 (vabavq_s8): Remove.
21889 (vabavq_s16): Remove.
21890 (vabavq_s32): Remove.
21891 (vabavq_u8): Remove.
21892 (vabavq_u16): Remove.
21893 (vabavq_u32): Remove.
21894 (vabavq_p_s8): Remove.
21895 (vabavq_p_u8): Remove.
21896 (vabavq_p_s16): Remove.
21897 (vabavq_p_u16): Remove.
21898 (vabavq_p_s32): Remove.
21899 (vabavq_p_u32): Remove.
21900 (__arm_vabavq_s8): Remove.
21901 (__arm_vabavq_s16): Remove.
21902 (__arm_vabavq_s32): Remove.
21903 (__arm_vabavq_u8): Remove.
21904 (__arm_vabavq_u16): Remove.
21905 (__arm_vabavq_u32): Remove.
21906 (__arm_vabavq_p_s8): Remove.
21907 (__arm_vabavq_p_u8): Remove.
21908 (__arm_vabavq_p_s16): Remove.
21909 (__arm_vabavq_p_u16): Remove.
21910 (__arm_vabavq_p_s32): Remove.
21911 (__arm_vabavq_p_u32): Remove.
21912 (__arm_vabavq): Remove.
21913 (__arm_vabavq_p): Remove.
21915 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21917 * config/arm/iterators.md (mve_insn): Add vabav.
21918 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
21919 (@mve_<mve_insn>q_<supf><mode>): ... this,.
21920 (mve_vabavq_p_<supf><mode>): Rename into ...
21921 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
21923 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21925 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
21926 (vmlsdavaq, vmlsdavaxq): New.
21927 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
21928 (vmlsdavaq, vmlsdavaxq): New.
21929 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
21930 (vmlsdavaq, vmlsdavaxq): New.
21931 * config/arm/arm_mve.h (vmladavaq): Remove.
21932 (vmlsdavaxq): Remove.
21933 (vmlsdavaq): Remove.
21934 (vmladavaxq): Remove.
21935 (vmladavaq_p): Remove.
21936 (vmladavaxq_p): Remove.
21937 (vmlsdavaq_p): Remove.
21938 (vmlsdavaxq_p): Remove.
21939 (vmladavaq_u8): Remove.
21940 (vmlsdavaxq_s8): Remove.
21941 (vmlsdavaq_s8): Remove.
21942 (vmladavaxq_s8): Remove.
21943 (vmladavaq_s8): Remove.
21944 (vmladavaq_u16): Remove.
21945 (vmlsdavaxq_s16): Remove.
21946 (vmlsdavaq_s16): Remove.
21947 (vmladavaxq_s16): Remove.
21948 (vmladavaq_s16): Remove.
21949 (vmladavaq_u32): Remove.
21950 (vmlsdavaxq_s32): Remove.
21951 (vmlsdavaq_s32): Remove.
21952 (vmladavaxq_s32): Remove.
21953 (vmladavaq_s32): Remove.
21954 (vmladavaq_p_s8): Remove.
21955 (vmladavaq_p_s32): Remove.
21956 (vmladavaq_p_s16): Remove.
21957 (vmladavaq_p_u8): Remove.
21958 (vmladavaq_p_u32): Remove.
21959 (vmladavaq_p_u16): Remove.
21960 (vmladavaxq_p_s8): Remove.
21961 (vmladavaxq_p_s32): Remove.
21962 (vmladavaxq_p_s16): Remove.
21963 (vmlsdavaq_p_s8): Remove.
21964 (vmlsdavaq_p_s32): Remove.
21965 (vmlsdavaq_p_s16): Remove.
21966 (vmlsdavaxq_p_s8): Remove.
21967 (vmlsdavaxq_p_s32): Remove.
21968 (vmlsdavaxq_p_s16): Remove.
21969 (__arm_vmladavaq_u8): Remove.
21970 (__arm_vmlsdavaxq_s8): Remove.
21971 (__arm_vmlsdavaq_s8): Remove.
21972 (__arm_vmladavaxq_s8): Remove.
21973 (__arm_vmladavaq_s8): Remove.
21974 (__arm_vmladavaq_u16): Remove.
21975 (__arm_vmlsdavaxq_s16): Remove.
21976 (__arm_vmlsdavaq_s16): Remove.
21977 (__arm_vmladavaxq_s16): Remove.
21978 (__arm_vmladavaq_s16): Remove.
21979 (__arm_vmladavaq_u32): Remove.
21980 (__arm_vmlsdavaxq_s32): Remove.
21981 (__arm_vmlsdavaq_s32): Remove.
21982 (__arm_vmladavaxq_s32): Remove.
21983 (__arm_vmladavaq_s32): Remove.
21984 (__arm_vmladavaq_p_s8): Remove.
21985 (__arm_vmladavaq_p_s32): Remove.
21986 (__arm_vmladavaq_p_s16): Remove.
21987 (__arm_vmladavaq_p_u8): Remove.
21988 (__arm_vmladavaq_p_u32): Remove.
21989 (__arm_vmladavaq_p_u16): Remove.
21990 (__arm_vmladavaxq_p_s8): Remove.
21991 (__arm_vmladavaxq_p_s32): Remove.
21992 (__arm_vmladavaxq_p_s16): Remove.
21993 (__arm_vmlsdavaq_p_s8): Remove.
21994 (__arm_vmlsdavaq_p_s32): Remove.
21995 (__arm_vmlsdavaq_p_s16): Remove.
21996 (__arm_vmlsdavaxq_p_s8): Remove.
21997 (__arm_vmlsdavaxq_p_s32): Remove.
21998 (__arm_vmlsdavaxq_p_s16): Remove.
21999 (__arm_vmladavaq): Remove.
22000 (__arm_vmlsdavaxq): Remove.
22001 (__arm_vmlsdavaq): Remove.
22002 (__arm_vmladavaxq): Remove.
22003 (__arm_vmladavaq_p): Remove.
22004 (__arm_vmladavaxq_p): Remove.
22005 (__arm_vmlsdavaq_p): Remove.
22006 (__arm_vmlsdavaxq_p): Remove.
22008 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22010 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
22011 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
22013 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22015 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
22016 (vmlsdavq, vmlsdavxq): New.
22017 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
22018 (vmlsdavq, vmlsdavxq): New.
22019 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
22020 (vmlsdavq, vmlsdavxq): New.
22021 * config/arm/arm_mve.h (vmladavq): Remove.
22022 (vmlsdavxq): Remove.
22023 (vmlsdavq): Remove.
22024 (vmladavxq): Remove.
22025 (vmladavq_p): Remove.
22026 (vmlsdavxq_p): Remove.
22027 (vmlsdavq_p): Remove.
22028 (vmladavxq_p): Remove.
22029 (vmladavq_u8): Remove.
22030 (vmlsdavxq_s8): Remove.
22031 (vmlsdavq_s8): Remove.
22032 (vmladavxq_s8): Remove.
22033 (vmladavq_s8): Remove.
22034 (vmladavq_u16): Remove.
22035 (vmlsdavxq_s16): Remove.
22036 (vmlsdavq_s16): Remove.
22037 (vmladavxq_s16): Remove.
22038 (vmladavq_s16): Remove.
22039 (vmladavq_u32): Remove.
22040 (vmlsdavxq_s32): Remove.
22041 (vmlsdavq_s32): Remove.
22042 (vmladavxq_s32): Remove.
22043 (vmladavq_s32): Remove.
22044 (vmladavq_p_u8): Remove.
22045 (vmlsdavxq_p_s8): Remove.
22046 (vmlsdavq_p_s8): Remove.
22047 (vmladavxq_p_s8): Remove.
22048 (vmladavq_p_s8): Remove.
22049 (vmladavq_p_u16): Remove.
22050 (vmlsdavxq_p_s16): Remove.
22051 (vmlsdavq_p_s16): Remove.
22052 (vmladavxq_p_s16): Remove.
22053 (vmladavq_p_s16): Remove.
22054 (vmladavq_p_u32): Remove.
22055 (vmlsdavxq_p_s32): Remove.
22056 (vmlsdavq_p_s32): Remove.
22057 (vmladavxq_p_s32): Remove.
22058 (vmladavq_p_s32): Remove.
22059 (__arm_vmladavq_u8): Remove.
22060 (__arm_vmlsdavxq_s8): Remove.
22061 (__arm_vmlsdavq_s8): Remove.
22062 (__arm_vmladavxq_s8): Remove.
22063 (__arm_vmladavq_s8): Remove.
22064 (__arm_vmladavq_u16): Remove.
22065 (__arm_vmlsdavxq_s16): Remove.
22066 (__arm_vmlsdavq_s16): Remove.
22067 (__arm_vmladavxq_s16): Remove.
22068 (__arm_vmladavq_s16): Remove.
22069 (__arm_vmladavq_u32): Remove.
22070 (__arm_vmlsdavxq_s32): Remove.
22071 (__arm_vmlsdavq_s32): Remove.
22072 (__arm_vmladavxq_s32): Remove.
22073 (__arm_vmladavq_s32): Remove.
22074 (__arm_vmladavq_p_u8): Remove.
22075 (__arm_vmlsdavxq_p_s8): Remove.
22076 (__arm_vmlsdavq_p_s8): Remove.
22077 (__arm_vmladavxq_p_s8): Remove.
22078 (__arm_vmladavq_p_s8): Remove.
22079 (__arm_vmladavq_p_u16): Remove.
22080 (__arm_vmlsdavxq_p_s16): Remove.
22081 (__arm_vmlsdavq_p_s16): Remove.
22082 (__arm_vmladavxq_p_s16): Remove.
22083 (__arm_vmladavq_p_s16): Remove.
22084 (__arm_vmladavq_p_u32): Remove.
22085 (__arm_vmlsdavxq_p_s32): Remove.
22086 (__arm_vmlsdavq_p_s32): Remove.
22087 (__arm_vmladavxq_p_s32): Remove.
22088 (__arm_vmladavq_p_s32): Remove.
22089 (__arm_vmladavq): Remove.
22090 (__arm_vmlsdavxq): Remove.
22091 (__arm_vmlsdavq): Remove.
22092 (__arm_vmladavxq): Remove.
22093 (__arm_vmladavq_p): Remove.
22094 (__arm_vmlsdavxq_p): Remove.
22095 (__arm_vmlsdavq_p): Remove.
22096 (__arm_vmladavxq_p): Remove.
22098 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22100 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
22101 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
22102 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
22103 vmlsdavax, vmlsdav, vmlsdavx.
22104 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
22105 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
22106 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
22108 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
22109 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
22110 (mve_vmlsdavxq_s<mode>): Merge into ...
22111 (@mve_<mve_insn>q_<supf><mode>): ... this.
22112 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
22113 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
22115 (@mve_<mve_insn>q_<supf><mode>): ... this.
22116 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
22117 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
22118 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
22119 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
22120 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
22122 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
22124 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22126 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
22127 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
22129 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22131 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
22132 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
22133 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
22134 * config/arm/arm_mve.h (vaddlvaq): Remove.
22135 (vaddlvaq_p): Remove.
22136 (vaddlvaq_u32): Remove.
22137 (vaddlvaq_s32): Remove.
22138 (vaddlvaq_p_s32): Remove.
22139 (vaddlvaq_p_u32): Remove.
22140 (__arm_vaddlvaq_u32): Remove.
22141 (__arm_vaddlvaq_s32): Remove.
22142 (__arm_vaddlvaq_p_s32): Remove.
22143 (__arm_vaddlvaq_p_u32): Remove.
22144 (__arm_vaddlvaq): Remove.
22145 (__arm_vaddlvaq_p): Remove.
22147 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22149 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
22150 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
22152 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22154 * config/arm/iterators.md (mve_insn): Add vaddlva.
22155 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
22156 (@mve_<mve_insn>q_<supf>v4si): ... this.
22157 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
22158 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
22160 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
22163 * config/i386/i386.cc (ix86_widen_mult_cost):
22164 Handle V4HImode and V2SImode.
22166 2023-05-11 Andrew Pinski <apinski@marvell.com>
22168 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
22169 defined by a phi node with more than one uses, allow for the
22170 only uses are in that same defining statement.
22172 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
22174 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
22177 2023-05-11 Pan Li <pan2.li@intel.com>
22179 * config/riscv/vector.md: Add comments for simplifying to vmset.
22181 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
22183 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
22185 (v<optab><mode>3): Add vector shift pattern.
22186 * config/riscv/vector-iterators.md: New iterator.
22188 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
22190 * config/riscv/autovec.md: Use renamed functions.
22191 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
22192 (emit_vlmax_reg_op): To this.
22193 (emit_nonvlmax_op): Rename.
22194 (emit_len_op): To this.
22195 (emit_nonvlmax_binop): Rename.
22196 (emit_len_binop): To this.
22197 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
22198 (emit_pred_binop): Remove vlmax_p.
22199 (emit_vlmax_op): Rename.
22200 (emit_vlmax_reg_op): To this.
22201 (emit_nonvlmax_op): Rename.
22202 (emit_len_op): To this.
22203 (emit_nonvlmax_binop): Rename.
22204 (emit_len_binop): To this.
22205 (sew64_scalar_helper): Use renamed functions.
22206 (expand_tuple_move): Use renamed functions.
22207 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
22209 * config/riscv/vector.md: Use renamed functions.
22211 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
22212 Michael Collison <collison@rivosinc.com>
22214 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
22215 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
22216 * config/riscv/riscv-v.cc (emit_pred_op): New function.
22217 (set_expander_dest_and_mask): New function.
22218 (emit_pred_binop): New function.
22219 (emit_nonvlmax_binop): New function.
22221 2023-05-11 Pan Li <pan2.li@intel.com>
22223 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
22224 * gimple-loop-interchange.cc
22225 (tree_loop_interchange::map_inductions_to_loop): Ditto.
22226 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
22227 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
22228 * tree-ssa-loop-manip.cc (create_iv): Ditto.
22229 (tree_transform_and_unroll_loop): Ditto.
22230 (canonicalize_loop_ivs): Ditto.
22231 * tree-ssa-loop-manip.h (create_iv): Ditto.
22232 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
22233 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
22235 (vect_set_loop_condition_normal): Ditto.
22236 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
22237 * tree-vect-stmts.cc (vectorizable_store): Ditto.
22238 (vectorizable_load): Ditto.
22240 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22242 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
22243 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
22244 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
22245 * config/arm/arm_mve.h (vmovlbq): Remove.
22247 (vmovlbq_m): Remove.
22248 (vmovltq_m): Remove.
22249 (vmovlbq_x): Remove.
22250 (vmovltq_x): Remove.
22251 (vmovlbq_s8): Remove.
22252 (vmovlbq_s16): Remove.
22253 (vmovltq_s8): Remove.
22254 (vmovltq_s16): Remove.
22255 (vmovltq_u8): Remove.
22256 (vmovltq_u16): Remove.
22257 (vmovlbq_u8): Remove.
22258 (vmovlbq_u16): Remove.
22259 (vmovlbq_m_s8): Remove.
22260 (vmovltq_m_s8): Remove.
22261 (vmovlbq_m_u8): Remove.
22262 (vmovltq_m_u8): Remove.
22263 (vmovlbq_m_s16): Remove.
22264 (vmovltq_m_s16): Remove.
22265 (vmovlbq_m_u16): Remove.
22266 (vmovltq_m_u16): Remove.
22267 (vmovlbq_x_s8): Remove.
22268 (vmovlbq_x_s16): Remove.
22269 (vmovlbq_x_u8): Remove.
22270 (vmovlbq_x_u16): Remove.
22271 (vmovltq_x_s8): Remove.
22272 (vmovltq_x_s16): Remove.
22273 (vmovltq_x_u8): Remove.
22274 (vmovltq_x_u16): Remove.
22275 (__arm_vmovlbq_s8): Remove.
22276 (__arm_vmovlbq_s16): Remove.
22277 (__arm_vmovltq_s8): Remove.
22278 (__arm_vmovltq_s16): Remove.
22279 (__arm_vmovltq_u8): Remove.
22280 (__arm_vmovltq_u16): Remove.
22281 (__arm_vmovlbq_u8): Remove.
22282 (__arm_vmovlbq_u16): Remove.
22283 (__arm_vmovlbq_m_s8): Remove.
22284 (__arm_vmovltq_m_s8): Remove.
22285 (__arm_vmovlbq_m_u8): Remove.
22286 (__arm_vmovltq_m_u8): Remove.
22287 (__arm_vmovlbq_m_s16): Remove.
22288 (__arm_vmovltq_m_s16): Remove.
22289 (__arm_vmovlbq_m_u16): Remove.
22290 (__arm_vmovltq_m_u16): Remove.
22291 (__arm_vmovlbq_x_s8): Remove.
22292 (__arm_vmovlbq_x_s16): Remove.
22293 (__arm_vmovlbq_x_u8): Remove.
22294 (__arm_vmovlbq_x_u16): Remove.
22295 (__arm_vmovltq_x_s8): Remove.
22296 (__arm_vmovltq_x_s16): Remove.
22297 (__arm_vmovltq_x_u8): Remove.
22298 (__arm_vmovltq_x_u16): Remove.
22299 (__arm_vmovlbq): Remove.
22300 (__arm_vmovltq): Remove.
22301 (__arm_vmovlbq_m): Remove.
22302 (__arm_vmovltq_m): Remove.
22303 (__arm_vmovlbq_x): Remove.
22304 (__arm_vmovltq_x): Remove.
22306 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22308 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
22309 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
22311 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22313 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
22314 (VMOVLBQ, VMOVLTQ): Merge into ...
22315 (VMOVLxQ): ... this.
22316 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
22317 (VMOVLxQ_M): ... this.
22318 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
22319 (mve_vmovlbq_<supf><mode>): Merge into ...
22320 (@mve_<mve_insn>q_<supf><mode>): ... this.
22321 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
22323 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22325 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22327 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
22328 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
22329 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
22330 * config/arm/arm-mve-builtins-functions.h
22331 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
22332 * config/arm/arm_mve.h (vaddlvq): Remove.
22333 (vaddlvq_p): Remove.
22334 (vaddlvq_s32): Remove.
22335 (vaddlvq_u32): Remove.
22336 (vaddlvq_p_s32): Remove.
22337 (vaddlvq_p_u32): Remove.
22338 (__arm_vaddlvq_s32): Remove.
22339 (__arm_vaddlvq_u32): Remove.
22340 (__arm_vaddlvq_p_s32): Remove.
22341 (__arm_vaddlvq_p_u32): Remove.
22342 (__arm_vaddlvq): Remove.
22343 (__arm_vaddlvq_p): Remove.
22345 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22347 * config/arm/iterators.md (mve_insn): Add vaddlv.
22348 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
22349 (@mve_<mve_insn>q_<supf>v4si): ... this.
22350 (mve_vaddlvq_p_<supf>v4si): Rename into ...
22351 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
22353 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22355 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
22356 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
22358 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22360 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
22361 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
22362 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
22363 * config/arm/arm_mve.h (vaddvaq): Remove.
22364 (vaddvaq_p): Remove.
22365 (vaddvaq_u8): Remove.
22366 (vaddvaq_s8): Remove.
22367 (vaddvaq_u16): Remove.
22368 (vaddvaq_s16): Remove.
22369 (vaddvaq_u32): Remove.
22370 (vaddvaq_s32): Remove.
22371 (vaddvaq_p_u8): Remove.
22372 (vaddvaq_p_s8): Remove.
22373 (vaddvaq_p_u16): Remove.
22374 (vaddvaq_p_s16): Remove.
22375 (vaddvaq_p_u32): Remove.
22376 (vaddvaq_p_s32): Remove.
22377 (__arm_vaddvaq_u8): Remove.
22378 (__arm_vaddvaq_s8): Remove.
22379 (__arm_vaddvaq_u16): Remove.
22380 (__arm_vaddvaq_s16): Remove.
22381 (__arm_vaddvaq_u32): Remove.
22382 (__arm_vaddvaq_s32): Remove.
22383 (__arm_vaddvaq_p_u8): Remove.
22384 (__arm_vaddvaq_p_s8): Remove.
22385 (__arm_vaddvaq_p_u16): Remove.
22386 (__arm_vaddvaq_p_s16): Remove.
22387 (__arm_vaddvaq_p_u32): Remove.
22388 (__arm_vaddvaq_p_s32): Remove.
22389 (__arm_vaddvaq): Remove.
22390 (__arm_vaddvaq_p): Remove.
22392 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22394 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
22395 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
22397 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22399 * config/arm/iterators.md (mve_insn): Add vaddva.
22400 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
22401 (@mve_<mve_insn>q_<supf><mode>): ... this.
22402 (mve_vaddvaq_p_<supf><mode>): Rename into ...
22403 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
22405 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22407 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
22408 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
22409 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
22410 * config/arm/arm_mve.h (vaddvq): Remove.
22411 (vaddvq_p): Remove.
22412 (vaddvq_s8): Remove.
22413 (vaddvq_s16): Remove.
22414 (vaddvq_s32): Remove.
22415 (vaddvq_u8): Remove.
22416 (vaddvq_u16): Remove.
22417 (vaddvq_u32): Remove.
22418 (vaddvq_p_u8): Remove.
22419 (vaddvq_p_s8): Remove.
22420 (vaddvq_p_u16): Remove.
22421 (vaddvq_p_s16): Remove.
22422 (vaddvq_p_u32): Remove.
22423 (vaddvq_p_s32): Remove.
22424 (__arm_vaddvq_s8): Remove.
22425 (__arm_vaddvq_s16): Remove.
22426 (__arm_vaddvq_s32): Remove.
22427 (__arm_vaddvq_u8): Remove.
22428 (__arm_vaddvq_u16): Remove.
22429 (__arm_vaddvq_u32): Remove.
22430 (__arm_vaddvq_p_u8): Remove.
22431 (__arm_vaddvq_p_s8): Remove.
22432 (__arm_vaddvq_p_u16): Remove.
22433 (__arm_vaddvq_p_s16): Remove.
22434 (__arm_vaddvq_p_u32): Remove.
22435 (__arm_vaddvq_p_s32): Remove.
22436 (__arm_vaddvq): Remove.
22437 (__arm_vaddvq_p): Remove.
22439 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22441 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
22442 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
22444 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22446 * config/arm/iterators.md (mve_insn): Add vaddv.
22447 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
22448 (@mve_<mve_insn>q_<supf><mode>): ... this.
22449 (mve_vaddvq_p_<supf><mode>): Rename into ...
22450 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
22451 * config/arm/vec-common.md: Use gen_mve_q instead of
22454 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22456 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
22458 * config/arm/arm-mve-builtins-base.def (vdupq): New.
22459 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
22460 * config/arm/arm_mve.h (vdupq_n): Remove.
22462 (vdupq_n_f16): Remove.
22463 (vdupq_n_f32): Remove.
22464 (vdupq_n_s8): Remove.
22465 (vdupq_n_s16): Remove.
22466 (vdupq_n_s32): Remove.
22467 (vdupq_n_u8): Remove.
22468 (vdupq_n_u16): Remove.
22469 (vdupq_n_u32): Remove.
22470 (vdupq_m_n_u8): Remove.
22471 (vdupq_m_n_s8): Remove.
22472 (vdupq_m_n_u16): Remove.
22473 (vdupq_m_n_s16): Remove.
22474 (vdupq_m_n_u32): Remove.
22475 (vdupq_m_n_s32): Remove.
22476 (vdupq_m_n_f16): Remove.
22477 (vdupq_m_n_f32): Remove.
22478 (vdupq_x_n_s8): Remove.
22479 (vdupq_x_n_s16): Remove.
22480 (vdupq_x_n_s32): Remove.
22481 (vdupq_x_n_u8): Remove.
22482 (vdupq_x_n_u16): Remove.
22483 (vdupq_x_n_u32): Remove.
22484 (vdupq_x_n_f16): Remove.
22485 (vdupq_x_n_f32): Remove.
22486 (__arm_vdupq_n_s8): Remove.
22487 (__arm_vdupq_n_s16): Remove.
22488 (__arm_vdupq_n_s32): Remove.
22489 (__arm_vdupq_n_u8): Remove.
22490 (__arm_vdupq_n_u16): Remove.
22491 (__arm_vdupq_n_u32): Remove.
22492 (__arm_vdupq_m_n_u8): Remove.
22493 (__arm_vdupq_m_n_s8): Remove.
22494 (__arm_vdupq_m_n_u16): Remove.
22495 (__arm_vdupq_m_n_s16): Remove.
22496 (__arm_vdupq_m_n_u32): Remove.
22497 (__arm_vdupq_m_n_s32): Remove.
22498 (__arm_vdupq_x_n_s8): Remove.
22499 (__arm_vdupq_x_n_s16): Remove.
22500 (__arm_vdupq_x_n_s32): Remove.
22501 (__arm_vdupq_x_n_u8): Remove.
22502 (__arm_vdupq_x_n_u16): Remove.
22503 (__arm_vdupq_x_n_u32): Remove.
22504 (__arm_vdupq_n_f16): Remove.
22505 (__arm_vdupq_n_f32): Remove.
22506 (__arm_vdupq_m_n_f16): Remove.
22507 (__arm_vdupq_m_n_f32): Remove.
22508 (__arm_vdupq_x_n_f16): Remove.
22509 (__arm_vdupq_x_n_f32): Remove.
22510 (__arm_vdupq_n): Remove.
22511 (__arm_vdupq_m): Remove.
22513 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22515 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
22516 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
22518 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22520 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
22521 (MVE_FP_N_VDUPQ_ONLY): New.
22522 (mve_insn): Add vdupq.
22523 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
22524 (@mve_<mve_insn>q_n_f<mode>): ... this.
22525 (mve_vdupq_n_<supf><mode>): Rename into ...
22526 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22527 (mve_vdupq_m_n_<supf><mode>): Rename into ...
22528 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22529 (mve_vdupq_m_n_f<mode>): Rename into ...
22530 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
22532 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22534 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
22536 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
22538 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
22540 * config/arm/arm_mve.h (vrev16q): Remove.
22543 (vrev64q_m): Remove.
22544 (vrev16q_m): Remove.
22545 (vrev32q_m): Remove.
22546 (vrev16q_x): Remove.
22547 (vrev32q_x): Remove.
22548 (vrev64q_x): Remove.
22549 (vrev64q_f16): Remove.
22550 (vrev64q_f32): Remove.
22551 (vrev32q_f16): Remove.
22552 (vrev16q_s8): Remove.
22553 (vrev32q_s8): Remove.
22554 (vrev32q_s16): Remove.
22555 (vrev64q_s8): Remove.
22556 (vrev64q_s16): Remove.
22557 (vrev64q_s32): Remove.
22558 (vrev64q_u8): Remove.
22559 (vrev64q_u16): Remove.
22560 (vrev64q_u32): Remove.
22561 (vrev32q_u8): Remove.
22562 (vrev32q_u16): Remove.
22563 (vrev16q_u8): Remove.
22564 (vrev64q_m_u8): Remove.
22565 (vrev64q_m_s8): Remove.
22566 (vrev64q_m_u16): Remove.
22567 (vrev64q_m_s16): Remove.
22568 (vrev64q_m_u32): Remove.
22569 (vrev64q_m_s32): Remove.
22570 (vrev16q_m_s8): Remove.
22571 (vrev32q_m_f16): Remove.
22572 (vrev16q_m_u8): Remove.
22573 (vrev32q_m_s8): Remove.
22574 (vrev64q_m_f16): Remove.
22575 (vrev32q_m_u8): Remove.
22576 (vrev32q_m_s16): Remove.
22577 (vrev64q_m_f32): Remove.
22578 (vrev32q_m_u16): Remove.
22579 (vrev16q_x_s8): Remove.
22580 (vrev16q_x_u8): Remove.
22581 (vrev32q_x_s8): Remove.
22582 (vrev32q_x_s16): Remove.
22583 (vrev32q_x_u8): Remove.
22584 (vrev32q_x_u16): Remove.
22585 (vrev64q_x_s8): Remove.
22586 (vrev64q_x_s16): Remove.
22587 (vrev64q_x_s32): Remove.
22588 (vrev64q_x_u8): Remove.
22589 (vrev64q_x_u16): Remove.
22590 (vrev64q_x_u32): Remove.
22591 (vrev32q_x_f16): Remove.
22592 (vrev64q_x_f16): Remove.
22593 (vrev64q_x_f32): Remove.
22594 (__arm_vrev16q_s8): Remove.
22595 (__arm_vrev32q_s8): Remove.
22596 (__arm_vrev32q_s16): Remove.
22597 (__arm_vrev64q_s8): Remove.
22598 (__arm_vrev64q_s16): Remove.
22599 (__arm_vrev64q_s32): Remove.
22600 (__arm_vrev64q_u8): Remove.
22601 (__arm_vrev64q_u16): Remove.
22602 (__arm_vrev64q_u32): Remove.
22603 (__arm_vrev32q_u8): Remove.
22604 (__arm_vrev32q_u16): Remove.
22605 (__arm_vrev16q_u8): Remove.
22606 (__arm_vrev64q_m_u8): Remove.
22607 (__arm_vrev64q_m_s8): Remove.
22608 (__arm_vrev64q_m_u16): Remove.
22609 (__arm_vrev64q_m_s16): Remove.
22610 (__arm_vrev64q_m_u32): Remove.
22611 (__arm_vrev64q_m_s32): Remove.
22612 (__arm_vrev16q_m_s8): Remove.
22613 (__arm_vrev16q_m_u8): Remove.
22614 (__arm_vrev32q_m_s8): Remove.
22615 (__arm_vrev32q_m_u8): Remove.
22616 (__arm_vrev32q_m_s16): Remove.
22617 (__arm_vrev32q_m_u16): Remove.
22618 (__arm_vrev16q_x_s8): Remove.
22619 (__arm_vrev16q_x_u8): Remove.
22620 (__arm_vrev32q_x_s8): Remove.
22621 (__arm_vrev32q_x_s16): Remove.
22622 (__arm_vrev32q_x_u8): Remove.
22623 (__arm_vrev32q_x_u16): Remove.
22624 (__arm_vrev64q_x_s8): Remove.
22625 (__arm_vrev64q_x_s16): Remove.
22626 (__arm_vrev64q_x_s32): Remove.
22627 (__arm_vrev64q_x_u8): Remove.
22628 (__arm_vrev64q_x_u16): Remove.
22629 (__arm_vrev64q_x_u32): Remove.
22630 (__arm_vrev64q_f16): Remove.
22631 (__arm_vrev64q_f32): Remove.
22632 (__arm_vrev32q_f16): Remove.
22633 (__arm_vrev32q_m_f16): Remove.
22634 (__arm_vrev64q_m_f16): Remove.
22635 (__arm_vrev64q_m_f32): Remove.
22636 (__arm_vrev32q_x_f16): Remove.
22637 (__arm_vrev64q_x_f16): Remove.
22638 (__arm_vrev64q_x_f32): Remove.
22639 (__arm_vrev16q): Remove.
22640 (__arm_vrev32q): Remove.
22641 (__arm_vrev64q): Remove.
22642 (__arm_vrev64q_m): Remove.
22643 (__arm_vrev16q_m): Remove.
22644 (__arm_vrev32q_m): Remove.
22645 (__arm_vrev16q_x): Remove.
22646 (__arm_vrev32q_x): Remove.
22647 (__arm_vrev64q_x): Remove.
22649 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22651 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
22652 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
22653 (MVE_FP_M_VREV32Q_ONLY): New iterators.
22654 (mve_insn): Add vrev16q, vrev32q, vrev64q.
22655 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
22656 (@mve_<mve_insn>q_f<mode>): ... this
22657 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
22658 (mve_vrev64q_<supf><mode>): Rename into ...
22659 (@mve_<mve_insn>q_<supf><mode>): ... this.
22660 (mve_vrev32q_<supf><mode>): Rename into
22661 @mve_<mve_insn>q_<supf><mode>.
22662 (mve_vrev16q_<supf>v16qi): Rename into
22663 @mve_<mve_insn>q_<supf><mode>.
22664 (mve_vrev64q_m_<supf><mode>): Rename into
22665 @mve_<mve_insn>q_m_<supf><mode>.
22666 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
22667 (mve_vrev32q_m_<supf><mode>): Rename into
22668 @mve_<mve_insn>q_m_<supf><mode>.
22669 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
22670 (mve_vrev16q_m_<supf>v16qi): Rename into
22671 @mve_<mve_insn>q_m_<supf><mode>.
22673 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22675 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
22676 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
22677 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
22678 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
22679 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
22680 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
22681 * config/arm/arm-mve-builtins-functions.h (class
22682 unspec_based_mve_function_exact_insn_vcmp): New.
22683 * config/arm/arm-mve-builtins.cc
22684 (function_instance::has_inactive_argument): Handle vcmp.
22685 * config/arm/arm_mve.h (vcmpneq): Remove.
22693 (vcmpneq_m): Remove.
22694 (vcmphiq_m): Remove.
22695 (vcmpeqq_m): Remove.
22696 (vcmpcsq_m): Remove.
22697 (vcmpcsq_m_n): Remove.
22698 (vcmpltq_m): Remove.
22699 (vcmpleq_m): Remove.
22700 (vcmpgtq_m): Remove.
22701 (vcmpgeq_m): Remove.
22702 (vcmpneq_s8): Remove.
22703 (vcmpneq_s16): Remove.
22704 (vcmpneq_s32): Remove.
22705 (vcmpneq_u8): Remove.
22706 (vcmpneq_u16): Remove.
22707 (vcmpneq_u32): Remove.
22708 (vcmpneq_n_u8): Remove.
22709 (vcmphiq_u8): Remove.
22710 (vcmphiq_n_u8): Remove.
22711 (vcmpeqq_u8): Remove.
22712 (vcmpeqq_n_u8): Remove.
22713 (vcmpcsq_u8): Remove.
22714 (vcmpcsq_n_u8): Remove.
22715 (vcmpneq_n_s8): Remove.
22716 (vcmpltq_s8): Remove.
22717 (vcmpltq_n_s8): Remove.
22718 (vcmpleq_s8): Remove.
22719 (vcmpleq_n_s8): Remove.
22720 (vcmpgtq_s8): Remove.
22721 (vcmpgtq_n_s8): Remove.
22722 (vcmpgeq_s8): Remove.
22723 (vcmpgeq_n_s8): Remove.
22724 (vcmpeqq_s8): Remove.
22725 (vcmpeqq_n_s8): Remove.
22726 (vcmpneq_n_u16): Remove.
22727 (vcmphiq_u16): Remove.
22728 (vcmphiq_n_u16): Remove.
22729 (vcmpeqq_u16): Remove.
22730 (vcmpeqq_n_u16): Remove.
22731 (vcmpcsq_u16): Remove.
22732 (vcmpcsq_n_u16): Remove.
22733 (vcmpneq_n_s16): Remove.
22734 (vcmpltq_s16): Remove.
22735 (vcmpltq_n_s16): Remove.
22736 (vcmpleq_s16): Remove.
22737 (vcmpleq_n_s16): Remove.
22738 (vcmpgtq_s16): Remove.
22739 (vcmpgtq_n_s16): Remove.
22740 (vcmpgeq_s16): Remove.
22741 (vcmpgeq_n_s16): Remove.
22742 (vcmpeqq_s16): Remove.
22743 (vcmpeqq_n_s16): Remove.
22744 (vcmpneq_n_u32): Remove.
22745 (vcmphiq_u32): Remove.
22746 (vcmphiq_n_u32): Remove.
22747 (vcmpeqq_u32): Remove.
22748 (vcmpeqq_n_u32): Remove.
22749 (vcmpcsq_u32): Remove.
22750 (vcmpcsq_n_u32): Remove.
22751 (vcmpneq_n_s32): Remove.
22752 (vcmpltq_s32): Remove.
22753 (vcmpltq_n_s32): Remove.
22754 (vcmpleq_s32): Remove.
22755 (vcmpleq_n_s32): Remove.
22756 (vcmpgtq_s32): Remove.
22757 (vcmpgtq_n_s32): Remove.
22758 (vcmpgeq_s32): Remove.
22759 (vcmpgeq_n_s32): Remove.
22760 (vcmpeqq_s32): Remove.
22761 (vcmpeqq_n_s32): Remove.
22762 (vcmpneq_n_f16): Remove.
22763 (vcmpneq_f16): Remove.
22764 (vcmpltq_n_f16): Remove.
22765 (vcmpltq_f16): Remove.
22766 (vcmpleq_n_f16): Remove.
22767 (vcmpleq_f16): Remove.
22768 (vcmpgtq_n_f16): Remove.
22769 (vcmpgtq_f16): Remove.
22770 (vcmpgeq_n_f16): Remove.
22771 (vcmpgeq_f16): Remove.
22772 (vcmpeqq_n_f16): Remove.
22773 (vcmpeqq_f16): Remove.
22774 (vcmpneq_n_f32): Remove.
22775 (vcmpneq_f32): Remove.
22776 (vcmpltq_n_f32): Remove.
22777 (vcmpltq_f32): Remove.
22778 (vcmpleq_n_f32): Remove.
22779 (vcmpleq_f32): Remove.
22780 (vcmpgtq_n_f32): Remove.
22781 (vcmpgtq_f32): Remove.
22782 (vcmpgeq_n_f32): Remove.
22783 (vcmpgeq_f32): Remove.
22784 (vcmpeqq_n_f32): Remove.
22785 (vcmpeqq_f32): Remove.
22786 (vcmpeqq_m_f16): Remove.
22787 (vcmpeqq_m_f32): Remove.
22788 (vcmpneq_m_u8): Remove.
22789 (vcmpneq_m_n_u8): Remove.
22790 (vcmphiq_m_u8): Remove.
22791 (vcmphiq_m_n_u8): Remove.
22792 (vcmpeqq_m_u8): Remove.
22793 (vcmpeqq_m_n_u8): Remove.
22794 (vcmpcsq_m_u8): Remove.
22795 (vcmpcsq_m_n_u8): Remove.
22796 (vcmpneq_m_s8): Remove.
22797 (vcmpneq_m_n_s8): Remove.
22798 (vcmpltq_m_s8): Remove.
22799 (vcmpltq_m_n_s8): Remove.
22800 (vcmpleq_m_s8): Remove.
22801 (vcmpleq_m_n_s8): Remove.
22802 (vcmpgtq_m_s8): Remove.
22803 (vcmpgtq_m_n_s8): Remove.
22804 (vcmpgeq_m_s8): Remove.
22805 (vcmpgeq_m_n_s8): Remove.
22806 (vcmpeqq_m_s8): Remove.
22807 (vcmpeqq_m_n_s8): Remove.
22808 (vcmpneq_m_u16): Remove.
22809 (vcmpneq_m_n_u16): Remove.
22810 (vcmphiq_m_u16): Remove.
22811 (vcmphiq_m_n_u16): Remove.
22812 (vcmpeqq_m_u16): Remove.
22813 (vcmpeqq_m_n_u16): Remove.
22814 (vcmpcsq_m_u16): Remove.
22815 (vcmpcsq_m_n_u16): Remove.
22816 (vcmpneq_m_s16): Remove.
22817 (vcmpneq_m_n_s16): Remove.
22818 (vcmpltq_m_s16): Remove.
22819 (vcmpltq_m_n_s16): Remove.
22820 (vcmpleq_m_s16): Remove.
22821 (vcmpleq_m_n_s16): Remove.
22822 (vcmpgtq_m_s16): Remove.
22823 (vcmpgtq_m_n_s16): Remove.
22824 (vcmpgeq_m_s16): Remove.
22825 (vcmpgeq_m_n_s16): Remove.
22826 (vcmpeqq_m_s16): Remove.
22827 (vcmpeqq_m_n_s16): Remove.
22828 (vcmpneq_m_u32): Remove.
22829 (vcmpneq_m_n_u32): Remove.
22830 (vcmphiq_m_u32): Remove.
22831 (vcmphiq_m_n_u32): Remove.
22832 (vcmpeqq_m_u32): Remove.
22833 (vcmpeqq_m_n_u32): Remove.
22834 (vcmpcsq_m_u32): Remove.
22835 (vcmpcsq_m_n_u32): Remove.
22836 (vcmpneq_m_s32): Remove.
22837 (vcmpneq_m_n_s32): Remove.
22838 (vcmpltq_m_s32): Remove.
22839 (vcmpltq_m_n_s32): Remove.
22840 (vcmpleq_m_s32): Remove.
22841 (vcmpleq_m_n_s32): Remove.
22842 (vcmpgtq_m_s32): Remove.
22843 (vcmpgtq_m_n_s32): Remove.
22844 (vcmpgeq_m_s32): Remove.
22845 (vcmpgeq_m_n_s32): Remove.
22846 (vcmpeqq_m_s32): Remove.
22847 (vcmpeqq_m_n_s32): Remove.
22848 (vcmpeqq_m_n_f16): Remove.
22849 (vcmpgeq_m_f16): Remove.
22850 (vcmpgeq_m_n_f16): Remove.
22851 (vcmpgtq_m_f16): Remove.
22852 (vcmpgtq_m_n_f16): Remove.
22853 (vcmpleq_m_f16): Remove.
22854 (vcmpleq_m_n_f16): Remove.
22855 (vcmpltq_m_f16): Remove.
22856 (vcmpltq_m_n_f16): Remove.
22857 (vcmpneq_m_f16): Remove.
22858 (vcmpneq_m_n_f16): Remove.
22859 (vcmpeqq_m_n_f32): Remove.
22860 (vcmpgeq_m_f32): Remove.
22861 (vcmpgeq_m_n_f32): Remove.
22862 (vcmpgtq_m_f32): Remove.
22863 (vcmpgtq_m_n_f32): Remove.
22864 (vcmpleq_m_f32): Remove.
22865 (vcmpleq_m_n_f32): Remove.
22866 (vcmpltq_m_f32): Remove.
22867 (vcmpltq_m_n_f32): Remove.
22868 (vcmpneq_m_f32): Remove.
22869 (vcmpneq_m_n_f32): Remove.
22870 (__arm_vcmpneq_s8): Remove.
22871 (__arm_vcmpneq_s16): Remove.
22872 (__arm_vcmpneq_s32): Remove.
22873 (__arm_vcmpneq_u8): Remove.
22874 (__arm_vcmpneq_u16): Remove.
22875 (__arm_vcmpneq_u32): Remove.
22876 (__arm_vcmpneq_n_u8): Remove.
22877 (__arm_vcmphiq_u8): Remove.
22878 (__arm_vcmphiq_n_u8): Remove.
22879 (__arm_vcmpeqq_u8): Remove.
22880 (__arm_vcmpeqq_n_u8): Remove.
22881 (__arm_vcmpcsq_u8): Remove.
22882 (__arm_vcmpcsq_n_u8): Remove.
22883 (__arm_vcmpneq_n_s8): Remove.
22884 (__arm_vcmpltq_s8): Remove.
22885 (__arm_vcmpltq_n_s8): Remove.
22886 (__arm_vcmpleq_s8): Remove.
22887 (__arm_vcmpleq_n_s8): Remove.
22888 (__arm_vcmpgtq_s8): Remove.
22889 (__arm_vcmpgtq_n_s8): Remove.
22890 (__arm_vcmpgeq_s8): Remove.
22891 (__arm_vcmpgeq_n_s8): Remove.
22892 (__arm_vcmpeqq_s8): Remove.
22893 (__arm_vcmpeqq_n_s8): Remove.
22894 (__arm_vcmpneq_n_u16): Remove.
22895 (__arm_vcmphiq_u16): Remove.
22896 (__arm_vcmphiq_n_u16): Remove.
22897 (__arm_vcmpeqq_u16): Remove.
22898 (__arm_vcmpeqq_n_u16): Remove.
22899 (__arm_vcmpcsq_u16): Remove.
22900 (__arm_vcmpcsq_n_u16): Remove.
22901 (__arm_vcmpneq_n_s16): Remove.
22902 (__arm_vcmpltq_s16): Remove.
22903 (__arm_vcmpltq_n_s16): Remove.
22904 (__arm_vcmpleq_s16): Remove.
22905 (__arm_vcmpleq_n_s16): Remove.
22906 (__arm_vcmpgtq_s16): Remove.
22907 (__arm_vcmpgtq_n_s16): Remove.
22908 (__arm_vcmpgeq_s16): Remove.
22909 (__arm_vcmpgeq_n_s16): Remove.
22910 (__arm_vcmpeqq_s16): Remove.
22911 (__arm_vcmpeqq_n_s16): Remove.
22912 (__arm_vcmpneq_n_u32): Remove.
22913 (__arm_vcmphiq_u32): Remove.
22914 (__arm_vcmphiq_n_u32): Remove.
22915 (__arm_vcmpeqq_u32): Remove.
22916 (__arm_vcmpeqq_n_u32): Remove.
22917 (__arm_vcmpcsq_u32): Remove.
22918 (__arm_vcmpcsq_n_u32): Remove.
22919 (__arm_vcmpneq_n_s32): Remove.
22920 (__arm_vcmpltq_s32): Remove.
22921 (__arm_vcmpltq_n_s32): Remove.
22922 (__arm_vcmpleq_s32): Remove.
22923 (__arm_vcmpleq_n_s32): Remove.
22924 (__arm_vcmpgtq_s32): Remove.
22925 (__arm_vcmpgtq_n_s32): Remove.
22926 (__arm_vcmpgeq_s32): Remove.
22927 (__arm_vcmpgeq_n_s32): Remove.
22928 (__arm_vcmpeqq_s32): Remove.
22929 (__arm_vcmpeqq_n_s32): Remove.
22930 (__arm_vcmpneq_m_u8): Remove.
22931 (__arm_vcmpneq_m_n_u8): Remove.
22932 (__arm_vcmphiq_m_u8): Remove.
22933 (__arm_vcmphiq_m_n_u8): Remove.
22934 (__arm_vcmpeqq_m_u8): Remove.
22935 (__arm_vcmpeqq_m_n_u8): Remove.
22936 (__arm_vcmpcsq_m_u8): Remove.
22937 (__arm_vcmpcsq_m_n_u8): Remove.
22938 (__arm_vcmpneq_m_s8): Remove.
22939 (__arm_vcmpneq_m_n_s8): Remove.
22940 (__arm_vcmpltq_m_s8): Remove.
22941 (__arm_vcmpltq_m_n_s8): Remove.
22942 (__arm_vcmpleq_m_s8): Remove.
22943 (__arm_vcmpleq_m_n_s8): Remove.
22944 (__arm_vcmpgtq_m_s8): Remove.
22945 (__arm_vcmpgtq_m_n_s8): Remove.
22946 (__arm_vcmpgeq_m_s8): Remove.
22947 (__arm_vcmpgeq_m_n_s8): Remove.
22948 (__arm_vcmpeqq_m_s8): Remove.
22949 (__arm_vcmpeqq_m_n_s8): Remove.
22950 (__arm_vcmpneq_m_u16): Remove.
22951 (__arm_vcmpneq_m_n_u16): Remove.
22952 (__arm_vcmphiq_m_u16): Remove.
22953 (__arm_vcmphiq_m_n_u16): Remove.
22954 (__arm_vcmpeqq_m_u16): Remove.
22955 (__arm_vcmpeqq_m_n_u16): Remove.
22956 (__arm_vcmpcsq_m_u16): Remove.
22957 (__arm_vcmpcsq_m_n_u16): Remove.
22958 (__arm_vcmpneq_m_s16): Remove.
22959 (__arm_vcmpneq_m_n_s16): Remove.
22960 (__arm_vcmpltq_m_s16): Remove.
22961 (__arm_vcmpltq_m_n_s16): Remove.
22962 (__arm_vcmpleq_m_s16): Remove.
22963 (__arm_vcmpleq_m_n_s16): Remove.
22964 (__arm_vcmpgtq_m_s16): Remove.
22965 (__arm_vcmpgtq_m_n_s16): Remove.
22966 (__arm_vcmpgeq_m_s16): Remove.
22967 (__arm_vcmpgeq_m_n_s16): Remove.
22968 (__arm_vcmpeqq_m_s16): Remove.
22969 (__arm_vcmpeqq_m_n_s16): Remove.
22970 (__arm_vcmpneq_m_u32): Remove.
22971 (__arm_vcmpneq_m_n_u32): Remove.
22972 (__arm_vcmphiq_m_u32): Remove.
22973 (__arm_vcmphiq_m_n_u32): Remove.
22974 (__arm_vcmpeqq_m_u32): Remove.
22975 (__arm_vcmpeqq_m_n_u32): Remove.
22976 (__arm_vcmpcsq_m_u32): Remove.
22977 (__arm_vcmpcsq_m_n_u32): Remove.
22978 (__arm_vcmpneq_m_s32): Remove.
22979 (__arm_vcmpneq_m_n_s32): Remove.
22980 (__arm_vcmpltq_m_s32): Remove.
22981 (__arm_vcmpltq_m_n_s32): Remove.
22982 (__arm_vcmpleq_m_s32): Remove.
22983 (__arm_vcmpleq_m_n_s32): Remove.
22984 (__arm_vcmpgtq_m_s32): Remove.
22985 (__arm_vcmpgtq_m_n_s32): Remove.
22986 (__arm_vcmpgeq_m_s32): Remove.
22987 (__arm_vcmpgeq_m_n_s32): Remove.
22988 (__arm_vcmpeqq_m_s32): Remove.
22989 (__arm_vcmpeqq_m_n_s32): Remove.
22990 (__arm_vcmpneq_n_f16): Remove.
22991 (__arm_vcmpneq_f16): Remove.
22992 (__arm_vcmpltq_n_f16): Remove.
22993 (__arm_vcmpltq_f16): Remove.
22994 (__arm_vcmpleq_n_f16): Remove.
22995 (__arm_vcmpleq_f16): Remove.
22996 (__arm_vcmpgtq_n_f16): Remove.
22997 (__arm_vcmpgtq_f16): Remove.
22998 (__arm_vcmpgeq_n_f16): Remove.
22999 (__arm_vcmpgeq_f16): Remove.
23000 (__arm_vcmpeqq_n_f16): Remove.
23001 (__arm_vcmpeqq_f16): Remove.
23002 (__arm_vcmpneq_n_f32): Remove.
23003 (__arm_vcmpneq_f32): Remove.
23004 (__arm_vcmpltq_n_f32): Remove.
23005 (__arm_vcmpltq_f32): Remove.
23006 (__arm_vcmpleq_n_f32): Remove.
23007 (__arm_vcmpleq_f32): Remove.
23008 (__arm_vcmpgtq_n_f32): Remove.
23009 (__arm_vcmpgtq_f32): Remove.
23010 (__arm_vcmpgeq_n_f32): Remove.
23011 (__arm_vcmpgeq_f32): Remove.
23012 (__arm_vcmpeqq_n_f32): Remove.
23013 (__arm_vcmpeqq_f32): Remove.
23014 (__arm_vcmpeqq_m_f16): Remove.
23015 (__arm_vcmpeqq_m_f32): Remove.
23016 (__arm_vcmpeqq_m_n_f16): Remove.
23017 (__arm_vcmpgeq_m_f16): Remove.
23018 (__arm_vcmpgeq_m_n_f16): Remove.
23019 (__arm_vcmpgtq_m_f16): Remove.
23020 (__arm_vcmpgtq_m_n_f16): Remove.
23021 (__arm_vcmpleq_m_f16): Remove.
23022 (__arm_vcmpleq_m_n_f16): Remove.
23023 (__arm_vcmpltq_m_f16): Remove.
23024 (__arm_vcmpltq_m_n_f16): Remove.
23025 (__arm_vcmpneq_m_f16): Remove.
23026 (__arm_vcmpneq_m_n_f16): Remove.
23027 (__arm_vcmpeqq_m_n_f32): Remove.
23028 (__arm_vcmpgeq_m_f32): Remove.
23029 (__arm_vcmpgeq_m_n_f32): Remove.
23030 (__arm_vcmpgtq_m_f32): Remove.
23031 (__arm_vcmpgtq_m_n_f32): Remove.
23032 (__arm_vcmpleq_m_f32): Remove.
23033 (__arm_vcmpleq_m_n_f32): Remove.
23034 (__arm_vcmpltq_m_f32): Remove.
23035 (__arm_vcmpltq_m_n_f32): Remove.
23036 (__arm_vcmpneq_m_f32): Remove.
23037 (__arm_vcmpneq_m_n_f32): Remove.
23038 (__arm_vcmpneq): Remove.
23039 (__arm_vcmphiq): Remove.
23040 (__arm_vcmpeqq): Remove.
23041 (__arm_vcmpcsq): Remove.
23042 (__arm_vcmpltq): Remove.
23043 (__arm_vcmpleq): Remove.
23044 (__arm_vcmpgtq): Remove.
23045 (__arm_vcmpgeq): Remove.
23046 (__arm_vcmpneq_m): Remove.
23047 (__arm_vcmphiq_m): Remove.
23048 (__arm_vcmpeqq_m): Remove.
23049 (__arm_vcmpcsq_m): Remove.
23050 (__arm_vcmpltq_m): Remove.
23051 (__arm_vcmpleq_m): Remove.
23052 (__arm_vcmpgtq_m): Remove.
23053 (__arm_vcmpgeq_m): Remove.
23055 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23057 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
23058 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
23060 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23062 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
23063 (MVE_CMP_M_N_F, mve_cmp_op1): New.
23066 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
23067 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
23068 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
23069 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
23070 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
23071 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
23072 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
23073 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
23074 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
23075 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
23077 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
23078 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
23079 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
23080 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
23081 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
23083 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
23084 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
23085 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
23086 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
23087 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
23089 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
23091 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
23092 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
23093 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
23096 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
23098 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
23099 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
23100 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
23101 Simplify parity(rotate(x,y)) as parity(x).
23103 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23105 * config/riscv/autovec.md (@vec_series<mode>): New pattern
23106 * config/riscv/riscv-protos.h (expand_vec_series): New function.
23107 * config/riscv/riscv-v.cc (emit_binop): Ditto.
23108 (emit_index_op): Ditto.
23109 (expand_vec_series): Ditto.
23110 (expand_const_vector): Add series vector handling.
23111 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
23113 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
23115 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
23116 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
23117 (*concat<mode><dwi>3_2): Likewise.
23118 (*concat<mode><dwi>3_3): Likewise.
23119 (*concat<mode><dwi>3_4): Likewise.
23120 (*concat<mode><dwi>3_5): Likewise.
23121 (*concat<mode><dwi>3_6): Likewise.
23122 (*concat<mode><dwi>3_7): Likewise.
23124 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
23127 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
23128 (<insn>v4qiv4hi2): New expander.
23129 (<insn>v2hiv2si2): Ditto.
23130 (<insn>v2qiv2si2): Ditto.
23131 (<insn>v2qiv2hi2): Ditto.
23133 2023-05-10 Jeff Law <jlaw@ventanamicro>
23135 * config/h8300/constraints.md (Q): Make this a special memory
23139 2023-05-10 Jakub Jelinek <jakub@redhat.com>
23142 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
23143 if t is void_list_node.
23145 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23147 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
23148 (aarch64_sqmovun<mode>_insn_be): Delete.
23149 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
23150 (aarch64_sqmovun<mode>): Delete expander.
23152 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23155 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
23157 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
23158 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
23159 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
23161 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23164 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
23166 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
23167 (aarch64_<sur>qadd<mode>): Rename to...
23168 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
23170 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23172 * config/aarch64/aarch64-simd.md
23173 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
23174 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
23175 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
23176 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
23178 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23181 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
23182 (aarch64_xtn<mode>_insn_be): Likewise.
23183 (trunc<mode><Vnarrowq>2): Rename to...
23184 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
23185 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
23186 (aarch64_<su>qmovn<mode>): Likewise.
23187 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
23188 (aarch64_<su>qmovn<mode>_insn_le): Delete.
23189 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
23191 2023-05-10 Li Xu <xuli1@eswincomputing.com>
23193 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
23194 intruction replace null avl with (const_int 0).
23196 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23198 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
23201 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23204 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
23205 (source_equal_p): Fix dead loop in vsetvl avl checking.
23207 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
23209 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
23210 of modeadjusted_dccr.
23212 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23214 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
23215 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
23216 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
23217 * config/arm/arm-mve-builtins.cc
23218 (function_instance::has_inactive_argument): Handle vmaxaq and
23220 * config/arm/arm_mve.h (vminaq): Remove.
23222 (vminaq_m): Remove.
23223 (vmaxaq_m): Remove.
23224 (vminaq_s8): Remove.
23225 (vmaxaq_s8): Remove.
23226 (vminaq_s16): Remove.
23227 (vmaxaq_s16): Remove.
23228 (vminaq_s32): Remove.
23229 (vmaxaq_s32): Remove.
23230 (vminaq_m_s8): Remove.
23231 (vmaxaq_m_s8): Remove.
23232 (vminaq_m_s16): Remove.
23233 (vmaxaq_m_s16): Remove.
23234 (vminaq_m_s32): Remove.
23235 (vmaxaq_m_s32): Remove.
23236 (__arm_vminaq_s8): Remove.
23237 (__arm_vmaxaq_s8): Remove.
23238 (__arm_vminaq_s16): Remove.
23239 (__arm_vmaxaq_s16): Remove.
23240 (__arm_vminaq_s32): Remove.
23241 (__arm_vmaxaq_s32): Remove.
23242 (__arm_vminaq_m_s8): Remove.
23243 (__arm_vmaxaq_m_s8): Remove.
23244 (__arm_vminaq_m_s16): Remove.
23245 (__arm_vmaxaq_m_s16): Remove.
23246 (__arm_vminaq_m_s32): Remove.
23247 (__arm_vmaxaq_m_s32): Remove.
23248 (__arm_vminaq): Remove.
23249 (__arm_vmaxaq): Remove.
23250 (__arm_vminaq_m): Remove.
23251 (__arm_vmaxaq_m): Remove.
23253 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23255 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
23257 (mve_insn): Add vmaxa, vmina.
23258 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
23259 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
23261 (@mve_<mve_insn>q_<supf><mode>): ... this.
23262 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
23263 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23265 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23267 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
23268 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
23270 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23272 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
23273 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
23274 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
23275 * config/arm/arm-mve-builtins.cc
23276 (function_instance::has_inactive_argument): Handle vmaxnmaq and
23278 * config/arm/arm_mve.h (vminnmaq): Remove.
23279 (vmaxnmaq): Remove.
23280 (vmaxnmaq_m): Remove.
23281 (vminnmaq_m): Remove.
23282 (vminnmaq_f16): Remove.
23283 (vmaxnmaq_f16): Remove.
23284 (vminnmaq_f32): Remove.
23285 (vmaxnmaq_f32): Remove.
23286 (vmaxnmaq_m_f16): Remove.
23287 (vminnmaq_m_f16): Remove.
23288 (vmaxnmaq_m_f32): Remove.
23289 (vminnmaq_m_f32): Remove.
23290 (__arm_vminnmaq_f16): Remove.
23291 (__arm_vmaxnmaq_f16): Remove.
23292 (__arm_vminnmaq_f32): Remove.
23293 (__arm_vmaxnmaq_f32): Remove.
23294 (__arm_vmaxnmaq_m_f16): Remove.
23295 (__arm_vminnmaq_m_f16): Remove.
23296 (__arm_vmaxnmaq_m_f32): Remove.
23297 (__arm_vminnmaq_m_f32): Remove.
23298 (__arm_vminnmaq): Remove.
23299 (__arm_vmaxnmaq): Remove.
23300 (__arm_vmaxnmaq_m): Remove.
23301 (__arm_vminnmaq_m): Remove.
23303 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23305 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
23306 (MVE_VMAXNMA_VMINNMAQ_M): New.
23307 (mve_insn): Add vmaxnma, vminnma.
23308 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
23310 (@mve_<mve_insn>q_f<mode>): ... this.
23311 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
23312 (@mve_<mve_insn>q_m_f<mode>): ... this.
23314 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23316 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
23317 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
23318 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
23319 (vminnmavq, vminnmvq): New.
23320 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
23321 (vminnmavq, vminnmvq): New.
23322 * config/arm/arm_mve.h (vminnmvq): Remove.
23323 (vminnmavq): Remove.
23324 (vmaxnmvq): Remove.
23325 (vmaxnmavq): Remove.
23326 (vmaxnmavq_p): Remove.
23327 (vmaxnmvq_p): Remove.
23328 (vminnmavq_p): Remove.
23329 (vminnmvq_p): Remove.
23330 (vminnmvq_f16): Remove.
23331 (vminnmavq_f16): Remove.
23332 (vmaxnmvq_f16): Remove.
23333 (vmaxnmavq_f16): Remove.
23334 (vminnmvq_f32): Remove.
23335 (vminnmavq_f32): Remove.
23336 (vmaxnmvq_f32): Remove.
23337 (vmaxnmavq_f32): Remove.
23338 (vmaxnmavq_p_f16): Remove.
23339 (vmaxnmvq_p_f16): Remove.
23340 (vminnmavq_p_f16): Remove.
23341 (vminnmvq_p_f16): Remove.
23342 (vmaxnmavq_p_f32): Remove.
23343 (vmaxnmvq_p_f32): Remove.
23344 (vminnmavq_p_f32): Remove.
23345 (vminnmvq_p_f32): Remove.
23346 (__arm_vminnmvq_f16): Remove.
23347 (__arm_vminnmavq_f16): Remove.
23348 (__arm_vmaxnmvq_f16): Remove.
23349 (__arm_vmaxnmavq_f16): Remove.
23350 (__arm_vminnmvq_f32): Remove.
23351 (__arm_vminnmavq_f32): Remove.
23352 (__arm_vmaxnmvq_f32): Remove.
23353 (__arm_vmaxnmavq_f32): Remove.
23354 (__arm_vmaxnmavq_p_f16): Remove.
23355 (__arm_vmaxnmvq_p_f16): Remove.
23356 (__arm_vminnmavq_p_f16): Remove.
23357 (__arm_vminnmvq_p_f16): Remove.
23358 (__arm_vmaxnmavq_p_f32): Remove.
23359 (__arm_vmaxnmvq_p_f32): Remove.
23360 (__arm_vminnmavq_p_f32): Remove.
23361 (__arm_vminnmvq_p_f32): Remove.
23362 (__arm_vminnmvq): Remove.
23363 (__arm_vminnmavq): Remove.
23364 (__arm_vmaxnmvq): Remove.
23365 (__arm_vmaxnmavq): Remove.
23366 (__arm_vmaxnmavq_p): Remove.
23367 (__arm_vmaxnmvq_p): Remove.
23368 (__arm_vminnmavq_p): Remove.
23369 (__arm_vminnmvq_p): Remove.
23370 (__arm_vmaxnmavq_m): Remove.
23371 (__arm_vmaxnmvq_m): Remove.
23373 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23375 * config/arm/arm-mve-builtins-functions.h
23376 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
23378 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23380 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
23381 (MVE_VMAXNMxV_MINNMxVQ_P): New.
23382 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
23383 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
23384 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
23385 (@mve_<mve_insn>q_f<mode>): ... this.
23386 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
23387 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
23388 (@mve_<mve_insn>q_p_f<mode>): ... this.
23390 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23392 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
23393 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
23394 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
23395 * config/arm/arm_mve.h (vminnmq): Remove.
23397 (vmaxnmq_m): Remove.
23398 (vminnmq_m): Remove.
23399 (vminnmq_x): Remove.
23400 (vmaxnmq_x): Remove.
23401 (vminnmq_f16): Remove.
23402 (vmaxnmq_f16): Remove.
23403 (vminnmq_f32): Remove.
23404 (vmaxnmq_f32): Remove.
23405 (vmaxnmq_m_f32): Remove.
23406 (vmaxnmq_m_f16): Remove.
23407 (vminnmq_m_f32): Remove.
23408 (vminnmq_m_f16): Remove.
23409 (vminnmq_x_f16): Remove.
23410 (vminnmq_x_f32): Remove.
23411 (vmaxnmq_x_f16): Remove.
23412 (vmaxnmq_x_f32): Remove.
23413 (__arm_vminnmq_f16): Remove.
23414 (__arm_vmaxnmq_f16): Remove.
23415 (__arm_vminnmq_f32): Remove.
23416 (__arm_vmaxnmq_f32): Remove.
23417 (__arm_vmaxnmq_m_f32): Remove.
23418 (__arm_vmaxnmq_m_f16): Remove.
23419 (__arm_vminnmq_m_f32): Remove.
23420 (__arm_vminnmq_m_f16): Remove.
23421 (__arm_vminnmq_x_f16): Remove.
23422 (__arm_vminnmq_x_f32): Remove.
23423 (__arm_vmaxnmq_x_f16): Remove.
23424 (__arm_vmaxnmq_x_f32): Remove.
23425 (__arm_vminnmq): Remove.
23426 (__arm_vmaxnmq): Remove.
23427 (__arm_vmaxnmq_m): Remove.
23428 (__arm_vminnmq_m): Remove.
23429 (__arm_vminnmq_x): Remove.
23430 (__arm_vmaxnmq_x): Remove.
23432 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23434 * config/arm/iterators.md (MAX_MIN_F): New.
23435 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
23436 (mve_insn): Add vmaxnm, vminnm.
23437 (max_min_f_str): New.
23438 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
23440 (@mve_<max_min_f_str>q_f<mode>): ... this.
23441 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
23442 (@mve_<mve_insn>q_m_f<mode>): ... this.
23444 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23446 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
23447 (smax<mode>3): Likewise.
23449 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23451 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
23452 (FUNCTION_PRED_P_S): New.
23453 (vmaxavq, vminavq, vmaxvq, vminvq): New.
23454 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
23456 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
23458 * config/arm/arm_mve.h (vminvq): Remove.
23460 (vminvq_p): Remove.
23461 (vmaxvq_p): Remove.
23462 (vminvq_u8): Remove.
23463 (vmaxvq_u8): Remove.
23464 (vminvq_s8): Remove.
23465 (vmaxvq_s8): Remove.
23466 (vminvq_u16): Remove.
23467 (vmaxvq_u16): Remove.
23468 (vminvq_s16): Remove.
23469 (vmaxvq_s16): Remove.
23470 (vminvq_u32): Remove.
23471 (vmaxvq_u32): Remove.
23472 (vminvq_s32): Remove.
23473 (vmaxvq_s32): Remove.
23474 (vminvq_p_u8): Remove.
23475 (vmaxvq_p_u8): Remove.
23476 (vminvq_p_s8): Remove.
23477 (vmaxvq_p_s8): Remove.
23478 (vminvq_p_u16): Remove.
23479 (vmaxvq_p_u16): Remove.
23480 (vminvq_p_s16): Remove.
23481 (vmaxvq_p_s16): Remove.
23482 (vminvq_p_u32): Remove.
23483 (vmaxvq_p_u32): Remove.
23484 (vminvq_p_s32): Remove.
23485 (vmaxvq_p_s32): Remove.
23486 (__arm_vminvq_u8): Remove.
23487 (__arm_vmaxvq_u8): Remove.
23488 (__arm_vminvq_s8): Remove.
23489 (__arm_vmaxvq_s8): Remove.
23490 (__arm_vminvq_u16): Remove.
23491 (__arm_vmaxvq_u16): Remove.
23492 (__arm_vminvq_s16): Remove.
23493 (__arm_vmaxvq_s16): Remove.
23494 (__arm_vminvq_u32): Remove.
23495 (__arm_vmaxvq_u32): Remove.
23496 (__arm_vminvq_s32): Remove.
23497 (__arm_vmaxvq_s32): Remove.
23498 (__arm_vminvq_p_u8): Remove.
23499 (__arm_vmaxvq_p_u8): Remove.
23500 (__arm_vminvq_p_s8): Remove.
23501 (__arm_vmaxvq_p_s8): Remove.
23502 (__arm_vminvq_p_u16): Remove.
23503 (__arm_vmaxvq_p_u16): Remove.
23504 (__arm_vminvq_p_s16): Remove.
23505 (__arm_vmaxvq_p_s16): Remove.
23506 (__arm_vminvq_p_u32): Remove.
23507 (__arm_vmaxvq_p_u32): Remove.
23508 (__arm_vminvq_p_s32): Remove.
23509 (__arm_vmaxvq_p_s32): Remove.
23510 (__arm_vminvq): Remove.
23511 (__arm_vmaxvq): Remove.
23512 (__arm_vminvq_p): Remove.
23513 (__arm_vmaxvq_p): Remove.
23516 (vminavq_p): Remove.
23517 (vmaxavq_p): Remove.
23518 (vminavq_s8): Remove.
23519 (vmaxavq_s8): Remove.
23520 (vminavq_s16): Remove.
23521 (vmaxavq_s16): Remove.
23522 (vminavq_s32): Remove.
23523 (vmaxavq_s32): Remove.
23524 (vminavq_p_s8): Remove.
23525 (vmaxavq_p_s8): Remove.
23526 (vminavq_p_s16): Remove.
23527 (vmaxavq_p_s16): Remove.
23528 (vminavq_p_s32): Remove.
23529 (vmaxavq_p_s32): Remove.
23530 (__arm_vminavq_s8): Remove.
23531 (__arm_vmaxavq_s8): Remove.
23532 (__arm_vminavq_s16): Remove.
23533 (__arm_vmaxavq_s16): Remove.
23534 (__arm_vminavq_s32): Remove.
23535 (__arm_vmaxavq_s32): Remove.
23536 (__arm_vminavq_p_s8): Remove.
23537 (__arm_vmaxavq_p_s8): Remove.
23538 (__arm_vminavq_p_s16): Remove.
23539 (__arm_vmaxavq_p_s16): Remove.
23540 (__arm_vminavq_p_s32): Remove.
23541 (__arm_vmaxavq_p_s32): Remove.
23542 (__arm_vminavq): Remove.
23543 (__arm_vmaxavq): Remove.
23544 (__arm_vminavq_p): Remove.
23545 (__arm_vmaxavq_p): Remove.
23547 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23549 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
23550 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
23551 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
23552 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
23553 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
23554 (@mve_<mve_insn>q_<supf><mode>): ... this.
23555 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
23556 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
23557 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23559 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23561 * config/arm/arm-mve-builtins-functions.h (class
23562 unspec_mve_function_exact_insn_pred_p): New.
23564 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23566 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
23567 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
23569 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23571 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
23572 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
23574 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
23576 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
23578 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
23579 (ADJUST_REG_ALLOC_ORDER): Likewise.
23580 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
23582 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
23583 Upa rather than Upl for unpredicated movprfx alternatives.
23585 2023-05-09 Jeff Law <jlaw@ventanamicro>
23587 * config/h8300/testcompare.md: Add peephole2 which uses a memory
23588 load to set flags, thus eliminating a compare against zero.
23590 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23592 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
23593 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
23594 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
23595 * config/arm/arm_mve.h (vshlltq): Remove.
23597 (vshllbq_m): Remove.
23598 (vshlltq_m): Remove.
23599 (vshllbq_x): Remove.
23600 (vshlltq_x): Remove.
23601 (vshlltq_n_u8): Remove.
23602 (vshllbq_n_u8): Remove.
23603 (vshlltq_n_s8): Remove.
23604 (vshllbq_n_s8): Remove.
23605 (vshlltq_n_u16): Remove.
23606 (vshllbq_n_u16): Remove.
23607 (vshlltq_n_s16): Remove.
23608 (vshllbq_n_s16): Remove.
23609 (vshllbq_m_n_s8): Remove.
23610 (vshllbq_m_n_s16): Remove.
23611 (vshllbq_m_n_u8): Remove.
23612 (vshllbq_m_n_u16): Remove.
23613 (vshlltq_m_n_s8): Remove.
23614 (vshlltq_m_n_s16): Remove.
23615 (vshlltq_m_n_u8): Remove.
23616 (vshlltq_m_n_u16): Remove.
23617 (vshllbq_x_n_s8): Remove.
23618 (vshllbq_x_n_s16): Remove.
23619 (vshllbq_x_n_u8): Remove.
23620 (vshllbq_x_n_u16): Remove.
23621 (vshlltq_x_n_s8): Remove.
23622 (vshlltq_x_n_s16): Remove.
23623 (vshlltq_x_n_u8): Remove.
23624 (vshlltq_x_n_u16): Remove.
23625 (__arm_vshlltq_n_u8): Remove.
23626 (__arm_vshllbq_n_u8): Remove.
23627 (__arm_vshlltq_n_s8): Remove.
23628 (__arm_vshllbq_n_s8): Remove.
23629 (__arm_vshlltq_n_u16): Remove.
23630 (__arm_vshllbq_n_u16): Remove.
23631 (__arm_vshlltq_n_s16): Remove.
23632 (__arm_vshllbq_n_s16): Remove.
23633 (__arm_vshllbq_m_n_s8): Remove.
23634 (__arm_vshllbq_m_n_s16): Remove.
23635 (__arm_vshllbq_m_n_u8): Remove.
23636 (__arm_vshllbq_m_n_u16): Remove.
23637 (__arm_vshlltq_m_n_s8): Remove.
23638 (__arm_vshlltq_m_n_s16): Remove.
23639 (__arm_vshlltq_m_n_u8): Remove.
23640 (__arm_vshlltq_m_n_u16): Remove.
23641 (__arm_vshllbq_x_n_s8): Remove.
23642 (__arm_vshllbq_x_n_s16): Remove.
23643 (__arm_vshllbq_x_n_u8): Remove.
23644 (__arm_vshllbq_x_n_u16): Remove.
23645 (__arm_vshlltq_x_n_s8): Remove.
23646 (__arm_vshlltq_x_n_s16): Remove.
23647 (__arm_vshlltq_x_n_u8): Remove.
23648 (__arm_vshlltq_x_n_u16): Remove.
23649 (__arm_vshlltq): Remove.
23650 (__arm_vshllbq): Remove.
23651 (__arm_vshllbq_m): Remove.
23652 (__arm_vshlltq_m): Remove.
23653 (__arm_vshllbq_x): Remove.
23654 (__arm_vshlltq_x): Remove.
23656 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23658 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
23659 (VSHLLBQ_N, VSHLLTQ_N): Remove.
23661 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
23662 (VSHLLxQ_M_N): New.
23663 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
23664 (mve_vshlltq_n_<supf><mode>): Merge into ...
23665 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23666 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
23668 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23670 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23672 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
23673 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
23675 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23677 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
23678 (vqmovntq, vqmovunbq, vqmovuntq): New.
23679 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
23680 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
23681 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
23682 (vqmovntq, vqmovunbq, vqmovuntq): New.
23683 * config/arm/arm-mve-builtins.cc
23684 (function_instance::has_inactive_argument): Handle vmovnbq,
23685 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
23686 * config/arm/arm_mve.h (vqmovntq): Remove.
23687 (vqmovnbq): Remove.
23688 (vqmovnbq_m): Remove.
23689 (vqmovntq_m): Remove.
23690 (vqmovntq_u16): Remove.
23691 (vqmovnbq_u16): Remove.
23692 (vqmovntq_s16): Remove.
23693 (vqmovnbq_s16): Remove.
23694 (vqmovntq_u32): Remove.
23695 (vqmovnbq_u32): Remove.
23696 (vqmovntq_s32): Remove.
23697 (vqmovnbq_s32): Remove.
23698 (vqmovnbq_m_s16): Remove.
23699 (vqmovntq_m_s16): Remove.
23700 (vqmovnbq_m_u16): Remove.
23701 (vqmovntq_m_u16): Remove.
23702 (vqmovnbq_m_s32): Remove.
23703 (vqmovntq_m_s32): Remove.
23704 (vqmovnbq_m_u32): Remove.
23705 (vqmovntq_m_u32): Remove.
23706 (__arm_vqmovntq_u16): Remove.
23707 (__arm_vqmovnbq_u16): Remove.
23708 (__arm_vqmovntq_s16): Remove.
23709 (__arm_vqmovnbq_s16): Remove.
23710 (__arm_vqmovntq_u32): Remove.
23711 (__arm_vqmovnbq_u32): Remove.
23712 (__arm_vqmovntq_s32): Remove.
23713 (__arm_vqmovnbq_s32): Remove.
23714 (__arm_vqmovnbq_m_s16): Remove.
23715 (__arm_vqmovntq_m_s16): Remove.
23716 (__arm_vqmovnbq_m_u16): Remove.
23717 (__arm_vqmovntq_m_u16): Remove.
23718 (__arm_vqmovnbq_m_s32): Remove.
23719 (__arm_vqmovntq_m_s32): Remove.
23720 (__arm_vqmovnbq_m_u32): Remove.
23721 (__arm_vqmovntq_m_u32): Remove.
23722 (__arm_vqmovntq): Remove.
23723 (__arm_vqmovnbq): Remove.
23724 (__arm_vqmovnbq_m): Remove.
23725 (__arm_vqmovntq_m): Remove.
23728 (vmovnbq_m): Remove.
23729 (vmovntq_m): Remove.
23730 (vmovntq_u16): Remove.
23731 (vmovnbq_u16): Remove.
23732 (vmovntq_s16): Remove.
23733 (vmovnbq_s16): Remove.
23734 (vmovntq_u32): Remove.
23735 (vmovnbq_u32): Remove.
23736 (vmovntq_s32): Remove.
23737 (vmovnbq_s32): Remove.
23738 (vmovnbq_m_s16): Remove.
23739 (vmovntq_m_s16): Remove.
23740 (vmovnbq_m_u16): Remove.
23741 (vmovntq_m_u16): Remove.
23742 (vmovnbq_m_s32): Remove.
23743 (vmovntq_m_s32): Remove.
23744 (vmovnbq_m_u32): Remove.
23745 (vmovntq_m_u32): Remove.
23746 (__arm_vmovntq_u16): Remove.
23747 (__arm_vmovnbq_u16): Remove.
23748 (__arm_vmovntq_s16): Remove.
23749 (__arm_vmovnbq_s16): Remove.
23750 (__arm_vmovntq_u32): Remove.
23751 (__arm_vmovnbq_u32): Remove.
23752 (__arm_vmovntq_s32): Remove.
23753 (__arm_vmovnbq_s32): Remove.
23754 (__arm_vmovnbq_m_s16): Remove.
23755 (__arm_vmovntq_m_s16): Remove.
23756 (__arm_vmovnbq_m_u16): Remove.
23757 (__arm_vmovntq_m_u16): Remove.
23758 (__arm_vmovnbq_m_s32): Remove.
23759 (__arm_vmovntq_m_s32): Remove.
23760 (__arm_vmovnbq_m_u32): Remove.
23761 (__arm_vmovntq_m_u32): Remove.
23762 (__arm_vmovntq): Remove.
23763 (__arm_vmovnbq): Remove.
23764 (__arm_vmovnbq_m): Remove.
23765 (__arm_vmovntq_m): Remove.
23766 (vqmovuntq): Remove.
23767 (vqmovunbq): Remove.
23768 (vqmovunbq_m): Remove.
23769 (vqmovuntq_m): Remove.
23770 (vqmovuntq_s16): Remove.
23771 (vqmovunbq_s16): Remove.
23772 (vqmovuntq_s32): Remove.
23773 (vqmovunbq_s32): Remove.
23774 (vqmovunbq_m_s16): Remove.
23775 (vqmovuntq_m_s16): Remove.
23776 (vqmovunbq_m_s32): Remove.
23777 (vqmovuntq_m_s32): Remove.
23778 (__arm_vqmovuntq_s16): Remove.
23779 (__arm_vqmovunbq_s16): Remove.
23780 (__arm_vqmovuntq_s32): Remove.
23781 (__arm_vqmovunbq_s32): Remove.
23782 (__arm_vqmovunbq_m_s16): Remove.
23783 (__arm_vqmovuntq_m_s16): Remove.
23784 (__arm_vqmovunbq_m_s32): Remove.
23785 (__arm_vqmovuntq_m_s32): Remove.
23786 (__arm_vqmovuntq): Remove.
23787 (__arm_vqmovunbq): Remove.
23788 (__arm_vqmovunbq_m): Remove.
23789 (__arm_vqmovuntq_m): Remove.
23791 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23793 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
23794 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
23797 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
23799 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
23800 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
23801 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
23802 (mve_vqmovuntq_s<mode>): Merge into ...
23803 (@mve_<mve_insn>q_<supf><mode>): ... this.
23804 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
23805 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
23806 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
23807 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23809 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23811 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
23812 (binary_move_narrow_unsigned): New.
23813 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
23814 (binary_move_narrow_unsigned): New.
23816 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23818 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
23819 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
23820 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
23821 (vrndpq, vrndq, vrndxq): New.
23822 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
23823 (vrndpq, vrndq, vrndxq): New.
23824 * config/arm/arm_mve.h (vrndxq): Remove.
23830 (vrndaq_m): Remove.
23831 (vrndmq_m): Remove.
23832 (vrndnq_m): Remove.
23833 (vrndpq_m): Remove.
23835 (vrndxq_m): Remove.
23837 (vrndnq_x): Remove.
23838 (vrndmq_x): Remove.
23839 (vrndpq_x): Remove.
23840 (vrndaq_x): Remove.
23841 (vrndxq_x): Remove.
23842 (vrndxq_f16): Remove.
23843 (vrndxq_f32): Remove.
23844 (vrndq_f16): Remove.
23845 (vrndq_f32): Remove.
23846 (vrndpq_f16): Remove.
23847 (vrndpq_f32): Remove.
23848 (vrndnq_f16): Remove.
23849 (vrndnq_f32): Remove.
23850 (vrndmq_f16): Remove.
23851 (vrndmq_f32): Remove.
23852 (vrndaq_f16): Remove.
23853 (vrndaq_f32): Remove.
23854 (vrndaq_m_f16): Remove.
23855 (vrndmq_m_f16): Remove.
23856 (vrndnq_m_f16): Remove.
23857 (vrndpq_m_f16): Remove.
23858 (vrndq_m_f16): Remove.
23859 (vrndxq_m_f16): Remove.
23860 (vrndaq_m_f32): Remove.
23861 (vrndmq_m_f32): Remove.
23862 (vrndnq_m_f32): Remove.
23863 (vrndpq_m_f32): Remove.
23864 (vrndq_m_f32): Remove.
23865 (vrndxq_m_f32): Remove.
23866 (vrndq_x_f16): Remove.
23867 (vrndq_x_f32): Remove.
23868 (vrndnq_x_f16): Remove.
23869 (vrndnq_x_f32): Remove.
23870 (vrndmq_x_f16): Remove.
23871 (vrndmq_x_f32): Remove.
23872 (vrndpq_x_f16): Remove.
23873 (vrndpq_x_f32): Remove.
23874 (vrndaq_x_f16): Remove.
23875 (vrndaq_x_f32): Remove.
23876 (vrndxq_x_f16): Remove.
23877 (vrndxq_x_f32): Remove.
23878 (__arm_vrndxq_f16): Remove.
23879 (__arm_vrndxq_f32): Remove.
23880 (__arm_vrndq_f16): Remove.
23881 (__arm_vrndq_f32): Remove.
23882 (__arm_vrndpq_f16): Remove.
23883 (__arm_vrndpq_f32): Remove.
23884 (__arm_vrndnq_f16): Remove.
23885 (__arm_vrndnq_f32): Remove.
23886 (__arm_vrndmq_f16): Remove.
23887 (__arm_vrndmq_f32): Remove.
23888 (__arm_vrndaq_f16): Remove.
23889 (__arm_vrndaq_f32): Remove.
23890 (__arm_vrndaq_m_f16): Remove.
23891 (__arm_vrndmq_m_f16): Remove.
23892 (__arm_vrndnq_m_f16): Remove.
23893 (__arm_vrndpq_m_f16): Remove.
23894 (__arm_vrndq_m_f16): Remove.
23895 (__arm_vrndxq_m_f16): Remove.
23896 (__arm_vrndaq_m_f32): Remove.
23897 (__arm_vrndmq_m_f32): Remove.
23898 (__arm_vrndnq_m_f32): Remove.
23899 (__arm_vrndpq_m_f32): Remove.
23900 (__arm_vrndq_m_f32): Remove.
23901 (__arm_vrndxq_m_f32): Remove.
23902 (__arm_vrndq_x_f16): Remove.
23903 (__arm_vrndq_x_f32): Remove.
23904 (__arm_vrndnq_x_f16): Remove.
23905 (__arm_vrndnq_x_f32): Remove.
23906 (__arm_vrndmq_x_f16): Remove.
23907 (__arm_vrndmq_x_f32): Remove.
23908 (__arm_vrndpq_x_f16): Remove.
23909 (__arm_vrndpq_x_f32): Remove.
23910 (__arm_vrndaq_x_f16): Remove.
23911 (__arm_vrndaq_x_f32): Remove.
23912 (__arm_vrndxq_x_f16): Remove.
23913 (__arm_vrndxq_x_f32): Remove.
23914 (__arm_vrndxq): Remove.
23915 (__arm_vrndq): Remove.
23916 (__arm_vrndpq): Remove.
23917 (__arm_vrndnq): Remove.
23918 (__arm_vrndmq): Remove.
23919 (__arm_vrndaq): Remove.
23920 (__arm_vrndaq_m): Remove.
23921 (__arm_vrndmq_m): Remove.
23922 (__arm_vrndnq_m): Remove.
23923 (__arm_vrndpq_m): Remove.
23924 (__arm_vrndq_m): Remove.
23925 (__arm_vrndxq_m): Remove.
23926 (__arm_vrndq_x): Remove.
23927 (__arm_vrndnq_x): Remove.
23928 (__arm_vrndmq_x): Remove.
23929 (__arm_vrndpq_x): Remove.
23930 (__arm_vrndaq_x): Remove.
23931 (__arm_vrndxq_x): Remove.
23933 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23935 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
23936 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
23937 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
23938 (vclzq, vqabsq, vqnegq): New.
23939 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
23940 (vqabsq, vqnegq): New.
23941 * config/arm/arm_mve.h (vabsq): Remove.
23944 (vabsq_f16): Remove.
23945 (vabsq_f32): Remove.
23946 (vabsq_s8): Remove.
23947 (vabsq_s16): Remove.
23948 (vabsq_s32): Remove.
23949 (vabsq_m_s8): Remove.
23950 (vabsq_m_s16): Remove.
23951 (vabsq_m_s32): Remove.
23952 (vabsq_m_f16): Remove.
23953 (vabsq_m_f32): Remove.
23954 (vabsq_x_s8): Remove.
23955 (vabsq_x_s16): Remove.
23956 (vabsq_x_s32): Remove.
23957 (vabsq_x_f16): Remove.
23958 (vabsq_x_f32): Remove.
23959 (__arm_vabsq_s8): Remove.
23960 (__arm_vabsq_s16): Remove.
23961 (__arm_vabsq_s32): Remove.
23962 (__arm_vabsq_m_s8): Remove.
23963 (__arm_vabsq_m_s16): Remove.
23964 (__arm_vabsq_m_s32): Remove.
23965 (__arm_vabsq_x_s8): Remove.
23966 (__arm_vabsq_x_s16): Remove.
23967 (__arm_vabsq_x_s32): Remove.
23968 (__arm_vabsq_f16): Remove.
23969 (__arm_vabsq_f32): Remove.
23970 (__arm_vabsq_m_f16): Remove.
23971 (__arm_vabsq_m_f32): Remove.
23972 (__arm_vabsq_x_f16): Remove.
23973 (__arm_vabsq_x_f32): Remove.
23974 (__arm_vabsq): Remove.
23975 (__arm_vabsq_m): Remove.
23976 (__arm_vabsq_x): Remove.
23980 (vnegq_f16): Remove.
23981 (vnegq_f32): Remove.
23982 (vnegq_s8): Remove.
23983 (vnegq_s16): Remove.
23984 (vnegq_s32): Remove.
23985 (vnegq_m_s8): Remove.
23986 (vnegq_m_s16): Remove.
23987 (vnegq_m_s32): Remove.
23988 (vnegq_m_f16): Remove.
23989 (vnegq_m_f32): Remove.
23990 (vnegq_x_s8): Remove.
23991 (vnegq_x_s16): Remove.
23992 (vnegq_x_s32): Remove.
23993 (vnegq_x_f16): Remove.
23994 (vnegq_x_f32): Remove.
23995 (__arm_vnegq_s8): Remove.
23996 (__arm_vnegq_s16): Remove.
23997 (__arm_vnegq_s32): Remove.
23998 (__arm_vnegq_m_s8): Remove.
23999 (__arm_vnegq_m_s16): Remove.
24000 (__arm_vnegq_m_s32): Remove.
24001 (__arm_vnegq_x_s8): Remove.
24002 (__arm_vnegq_x_s16): Remove.
24003 (__arm_vnegq_x_s32): Remove.
24004 (__arm_vnegq_f16): Remove.
24005 (__arm_vnegq_f32): Remove.
24006 (__arm_vnegq_m_f16): Remove.
24007 (__arm_vnegq_m_f32): Remove.
24008 (__arm_vnegq_x_f16): Remove.
24009 (__arm_vnegq_x_f32): Remove.
24010 (__arm_vnegq): Remove.
24011 (__arm_vnegq_m): Remove.
24012 (__arm_vnegq_x): Remove.
24016 (vclsq_s8): Remove.
24017 (vclsq_s16): Remove.
24018 (vclsq_s32): Remove.
24019 (vclsq_m_s8): Remove.
24020 (vclsq_m_s16): Remove.
24021 (vclsq_m_s32): Remove.
24022 (vclsq_x_s8): Remove.
24023 (vclsq_x_s16): Remove.
24024 (vclsq_x_s32): Remove.
24025 (__arm_vclsq_s8): Remove.
24026 (__arm_vclsq_s16): Remove.
24027 (__arm_vclsq_s32): Remove.
24028 (__arm_vclsq_m_s8): Remove.
24029 (__arm_vclsq_m_s16): Remove.
24030 (__arm_vclsq_m_s32): Remove.
24031 (__arm_vclsq_x_s8): Remove.
24032 (__arm_vclsq_x_s16): Remove.
24033 (__arm_vclsq_x_s32): Remove.
24034 (__arm_vclsq): Remove.
24035 (__arm_vclsq_m): Remove.
24036 (__arm_vclsq_x): Remove.
24040 (vclzq_s8): Remove.
24041 (vclzq_s16): Remove.
24042 (vclzq_s32): Remove.
24043 (vclzq_u8): Remove.
24044 (vclzq_u16): Remove.
24045 (vclzq_u32): Remove.
24046 (vclzq_m_u8): Remove.
24047 (vclzq_m_s8): Remove.
24048 (vclzq_m_u16): Remove.
24049 (vclzq_m_s16): Remove.
24050 (vclzq_m_u32): Remove.
24051 (vclzq_m_s32): Remove.
24052 (vclzq_x_s8): Remove.
24053 (vclzq_x_s16): Remove.
24054 (vclzq_x_s32): Remove.
24055 (vclzq_x_u8): Remove.
24056 (vclzq_x_u16): Remove.
24057 (vclzq_x_u32): Remove.
24058 (__arm_vclzq_s8): Remove.
24059 (__arm_vclzq_s16): Remove.
24060 (__arm_vclzq_s32): Remove.
24061 (__arm_vclzq_u8): Remove.
24062 (__arm_vclzq_u16): Remove.
24063 (__arm_vclzq_u32): Remove.
24064 (__arm_vclzq_m_u8): Remove.
24065 (__arm_vclzq_m_s8): Remove.
24066 (__arm_vclzq_m_u16): Remove.
24067 (__arm_vclzq_m_s16): Remove.
24068 (__arm_vclzq_m_u32): Remove.
24069 (__arm_vclzq_m_s32): Remove.
24070 (__arm_vclzq_x_s8): Remove.
24071 (__arm_vclzq_x_s16): Remove.
24072 (__arm_vclzq_x_s32): Remove.
24073 (__arm_vclzq_x_u8): Remove.
24074 (__arm_vclzq_x_u16): Remove.
24075 (__arm_vclzq_x_u32): Remove.
24076 (__arm_vclzq): Remove.
24077 (__arm_vclzq_m): Remove.
24078 (__arm_vclzq_x): Remove.
24081 (vqnegq_m): Remove.
24082 (vqabsq_m): Remove.
24083 (vqabsq_s8): Remove.
24084 (vqabsq_s16): Remove.
24085 (vqabsq_s32): Remove.
24086 (vqnegq_s8): Remove.
24087 (vqnegq_s16): Remove.
24088 (vqnegq_s32): Remove.
24089 (vqnegq_m_s8): Remove.
24090 (vqabsq_m_s8): Remove.
24091 (vqnegq_m_s16): Remove.
24092 (vqabsq_m_s16): Remove.
24093 (vqnegq_m_s32): Remove.
24094 (vqabsq_m_s32): Remove.
24095 (__arm_vqabsq_s8): Remove.
24096 (__arm_vqabsq_s16): Remove.
24097 (__arm_vqabsq_s32): Remove.
24098 (__arm_vqnegq_s8): Remove.
24099 (__arm_vqnegq_s16): Remove.
24100 (__arm_vqnegq_s32): Remove.
24101 (__arm_vqnegq_m_s8): Remove.
24102 (__arm_vqabsq_m_s8): Remove.
24103 (__arm_vqnegq_m_s16): Remove.
24104 (__arm_vqabsq_m_s16): Remove.
24105 (__arm_vqnegq_m_s32): Remove.
24106 (__arm_vqabsq_m_s32): Remove.
24107 (__arm_vqabsq): Remove.
24108 (__arm_vqnegq): Remove.
24109 (__arm_vqnegq_m): Remove.
24110 (__arm_vqabsq_m): Remove.
24112 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24114 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
24115 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
24116 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
24117 vrndm, vrndn, vrndp, vrnd, vrndx.
24118 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
24119 VQABSQ_M_S, VQNEGQ_M_S.
24121 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
24122 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
24123 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
24124 (@mve_<mve_insn>q_f<mode>): ... this.
24125 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
24126 (mve_v<absneg_str>q_f<mode>): ... this.
24127 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
24128 (mve_v<absneg_str>q_s<mode>): ... this.
24129 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
24130 (@mve_<mve_insn>q_<supf><mode>): ... this.
24131 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
24132 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
24133 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
24134 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
24135 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
24136 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
24137 (mve_vrndxq_m_f<mode>): Merge into ...
24138 (@mve_<mve_insn>q_m_f<mode>): ... this.
24140 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
24142 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
24143 * config/arm/arm-mve-builtins-shapes.h (unary): New.
24145 2023-05-09 Jakub Jelinek <jakub@redhat.com>
24147 * mux-utils.h: Fix comment typo, avoides -> avoids.
24149 2023-05-09 Jakub Jelinek <jakub@redhat.com>
24151 PR tree-optimization/109778
24152 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
24153 wi::zext (x, width) rather than x if width != precision, rather
24154 than using wi::zext (right, width) after the shift.
24155 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
24156 of wi::lrotate or wi::rrotate.
24158 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
24160 * genmatch.cc (get_out_file): Make static and rename to ...
24161 (choose_output): ... this. Reimplement. Update all uses ...
24162 (decision_tree::gen): ... here and ...
24165 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
24167 * genmatch.cc (showUsage): Reimplement as ...
24168 (usage): ...this. Adjust all uses.
24169 (main): Print usage when no arguments. Add missing 'return 1'.
24171 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
24173 * genmatch.cc (header_file): Make static.
24174 (emit_func): Rename to...
24175 (fp_decl): ... this. Adjust all uses.
24176 (fp_decl_done): New function. Use it...
24177 (decision_tree::gen): ... here and...
24178 (write_predicate): ... here.
24181 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
24183 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
24186 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
24187 Uros Bizjak <ubizjak@gmail.com>
24189 * config/i386/i386.md (any_or_plus): Move definition earlier.
24190 (*insvti_highpart_1): New define_insn_and_split to overwrite
24191 (insv) the highpart of a TImode register/memory.
24193 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
24195 * auto-profile.cc (auto_profile): Check todo from early_inline
24196 to see if cleanup_tree_vfg needs to be called.
24197 (early_inline): Return todo from early_inliner.
24199 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
24201 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
24203 (pass_vsetvl::get_block_info): New.
24204 (pass_vsetvl::update_vector_info): New.
24205 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
24206 (pass_vsetvl::compute_local_backward_infos): Ditto.
24207 (pass_vsetvl::transfer_before): Ditto.
24208 (pass_vsetvl::transfer_after): Ditto.
24209 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
24210 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
24211 (pass_vsetvl::cleanup_insns): Ditto.
24212 (pass_vsetvl::compute_local_backward_infos): Use
24213 update_vector_info.
24215 2023-05-08 Jeff Law <jlaw@ventanamicro>
24217 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
24219 2023-05-08 Richard Biener <rguenther@suse.de>
24220 Michael Meissner <meissner@linux.ibm.com>
24222 PR middle-end/108623
24223 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
24224 Align bit fields > 1 bit to at least an 8-bit boundary.
24226 2023-05-08 Andrew Pinski <apinski@marvell.com>
24228 PR tree-optimization/109424
24229 PR tree-optimization/59424
24230 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
24231 (factor_out_conditional_operation): This and add support for all unary
24233 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
24234 to call factor_out_conditional_operation instead.
24236 2023-05-08 Andrew Pinski <apinski@marvell.com>
24238 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
24239 over factor_out_conditional_conversion.
24241 2023-05-08 Andrew Pinski <apinski@marvell.com>
24243 PR tree-optimization/49959
24244 PR tree-optimization/103771
24245 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
24246 Diamond shapped bb form for factor_out_conditional_conversion.
24248 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24250 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
24251 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
24252 (riscv_vector_get_mask_mode): Ditto.
24253 (get_mask_policy_no_pred): Ditto.
24254 (get_tail_policy_no_pred): Ditto.
24255 (get_mask_mode): New function.
24256 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
24257 (get_tail_policy_no_pred): Ditto.
24258 (riscv_vector_mask_mode_p): Ditto.
24259 (riscv_vector_get_mask_mode): Ditto.
24260 (get_mask_mode): New function.
24261 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
24263 (get_tail_policy_for_pred): Ditto.
24264 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
24265 (get_mask_policy_for_pred): Ditto
24266 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
24268 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
24270 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
24271 (riscv_select_multilib): New.
24272 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
24273 also handle select_by_abi.
24274 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
24275 to select_by_abi_arch_cmodel from 1.
24276 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
24277 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
24279 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
24281 * Makefile.in: (gimple-match-head.o-warn): Remove.
24282 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
24283 gimple-match-exports.cc.
24284 (gimple-match-auto.h): Only depend on s-gimple-match.
24285 (generic-match-auto.h): Likewise.
24287 2023-05-08 Andrew Pinski <apinski@marvell.com>
24289 PR tree-optimization/109691
24290 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
24292 If the removed statement can throw, have need_eh_cleanup
24293 include the bb of that statement.
24294 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
24295 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
24297 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
24298 Initialize dceworklist instead of stmts_to_remove.
24299 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
24300 Destore dceworklist instead of stmts_to_remove.
24301 (substitute_and_fold_dom_walker::before_dom_children):
24302 Set dceworklist instead of adding to stmts_to_remove.
24303 (substitute_and_fold_engine::substitute_and_fold):
24304 Call simple_dce_from_worklist instead of poping
24306 Don't update the stat on removal statements.
24308 2023-05-07 Andrew Pinski <apinski@marvell.com>
24311 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
24312 Change argument type to aarch64_feature_flags.
24313 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
24314 constructor argument type to aarch64_feature_flags.
24315 Change m_old_asm_isa_flags to be aarch64_feature_flags.
24317 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
24319 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
24320 more parallel code if can_create_pseudo_p.
24322 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
24325 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
24326 immediately before moving a multi-word register by parts.
24328 2023-05-06 Jeff Law <jlaw@ventanamicro>
24330 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
24332 2023-05-06 Michael Collison <collison@rivosinc.com>
24334 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
24335 Check that GET_MODE_NUNITS is a multiple of 2.
24337 2023-05-06 Michael Collison <collison@rivosinc.com>
24339 * config/riscv/riscv.cc
24340 (riscv_estimated_poly_value): Implement
24341 TARGET_ESTIMATED_POLY_VALUE.
24342 (riscv_preferred_simd_mode): Implement
24343 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
24344 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
24345 (riscv_empty_mask_is_expensive): Implement
24346 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
24347 (riscv_vectorize_create_costs): Implement
24348 TARGET_VECTORIZE_CREATE_COSTS.
24349 (riscv_support_vector_misalignment): Implement
24350 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
24351 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
24352 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
24353 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
24354 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
24356 2023-05-06 Jeff Law <jlaw@ventanamicro>
24358 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
24359 duplicate definition.
24361 2023-05-06 Michael Collison <collison@rivosinc.com>
24363 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
24364 (riscv_vector_preferred_simd_mode): Ditto.
24365 (get_mask_policy_no_pred): Ditto.
24366 (get_tail_policy_no_pred): Ditto.
24367 (riscv_vector_mask_mode_p): Ditto.
24368 (riscv_vector_get_mask_mode): Ditto.
24370 2023-05-06 Michael Collison <collison@rivosinc.com>
24372 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
24373 Remove static declaration to to make externally visible.
24374 (get_mask_policy_for_pred): Ditto.
24375 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
24376 New external declaration.
24377 (get_mask_policy_for_pred): Ditto.
24379 2023-05-06 Michael Collison <collison@rivosinc.com>
24381 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
24382 (riscv_vector_get_mask_mode): Ditto.
24383 (get_mask_policy_no_pred): Ditto.
24384 (get_tail_policy_no_pred): Ditto.
24386 2023-05-06 Xi Ruoyao <xry111@xry111.site>
24388 * config/loongarch/loongarch.h (struct machine_function): Add
24389 reg_is_wrapped_separately array for register wrapping
24391 * config/loongarch/loongarch.cc
24392 (loongarch_get_separate_components): New function.
24393 (loongarch_components_for_bb): Likewise.
24394 (loongarch_disqualify_components): Likewise.
24395 (loongarch_process_components): Likewise.
24396 (loongarch_emit_prologue_components): Likewise.
24397 (loongarch_emit_epilogue_components): Likewise.
24398 (loongarch_set_handled_components): Likewise.
24399 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
24400 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
24401 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
24402 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
24403 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
24404 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
24405 (loongarch_for_each_saved_reg): Skip registers that are wrapped
24408 2023-05-06 Xi Ruoyao <xry111@xry111.site>
24411 * Makefile.in (s-macro_list): Pass -nostdinc to
24414 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24416 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
24417 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
24418 (preferred_simd_mode): Ditto.
24419 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
24420 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
24421 (riscv_preferred_simd_mode): New function.
24422 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
24423 * config/riscv/vector.md: Add autovec.md.
24424 * config/riscv/autovec.md: New file.
24426 2023-05-06 Jakub Jelinek <jakub@redhat.com>
24428 * real.h (dconst_pi): Define.
24429 (dconst_e_ptr): Formatting fix.
24430 (dconst_pi_ptr): Declare.
24431 * real.cc (dconst_pi_ptr): New function.
24432 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
24433 boundaries range with range computed from sin/cos of the particular
24434 bounds if the argument range is shorter than 2*pi.
24435 (cfn_sincos::op1_range): Take bulps into account when determining
24436 which result ranges are always invalid or behave like known NAN.
24438 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
24440 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
24441 pass type to vrange_storage::equal_p.
24442 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
24443 (irange_storage::equal_p): Same.
24444 (frange_storage::equal_p): Same.
24445 * value-range-storage.h (class frange_storage): Same.
24447 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24450 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
24451 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
24453 2023-05-06 liuhongt <hongtao.liu@intel.com>
24455 * combine.cc (maybe_swap_commutative_operands): Canonicalize
24456 vec_merge when mask is constant.
24457 * doc/md.texi: Document vec_merge canonicalization.
24459 2023-05-06 Jakub Jelinek <jakub@redhat.com>
24461 * value-range.h (frange_arithmetic): Declare.
24462 * range-op-float.cc (frange_arithmetic): No longer static.
24463 * gimple-range-op.cc (frange_mpfr_arg1): New function.
24464 (cfn_sqrt::fold_range): Intersect the generic boundaries range
24465 with range computed from sqrt of the particular bounds.
24466 (cfn_sqrt::op1_range): Intersect the generic boundaries range
24467 with range computed from squared particular bounds.
24469 2023-05-06 Jakub Jelinek <jakub@redhat.com>
24471 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
24472 earlier with helper variables also renamed.
24473 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
24474 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
24475 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
24477 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
24479 * config/cris/cris.md (splitop): Add PLUS.
24480 * config/cris/cris.cc (cris_split_constant): Also handle
24481 PLUS when a split into two insns may be useful.
24483 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
24485 * config/cris/cris.md (movandsplit1): New define_peephole2.
24487 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
24489 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
24491 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
24493 * doc/md.texi (define_peephole2): Document order of scanning.
24495 2023-05-05 Pan Li <pan2.li@intel.com>
24496 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24498 * config/riscv/vector.md: Allow const as the operand of RVV
24499 indexed load/store.
24501 2023-05-05 Pan Li <pan2.li@intel.com>
24503 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
24504 consumed by simplify_rtx.
24506 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24508 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
24509 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
24510 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
24511 * config/arm/arm_mve.h (vshrq): Remove.
24513 (vrshrq_m): Remove.
24515 (vrshrq_x): Remove.
24517 (vshrq_n_s8): Remove.
24518 (vshrq_n_s16): Remove.
24519 (vshrq_n_s32): Remove.
24520 (vshrq_n_u8): Remove.
24521 (vshrq_n_u16): Remove.
24522 (vshrq_n_u32): Remove.
24523 (vrshrq_n_u8): Remove.
24524 (vrshrq_n_s8): Remove.
24525 (vrshrq_n_u16): Remove.
24526 (vrshrq_n_s16): Remove.
24527 (vrshrq_n_u32): Remove.
24528 (vrshrq_n_s32): Remove.
24529 (vrshrq_m_n_s8): Remove.
24530 (vrshrq_m_n_s32): Remove.
24531 (vrshrq_m_n_s16): Remove.
24532 (vrshrq_m_n_u8): Remove.
24533 (vrshrq_m_n_u32): Remove.
24534 (vrshrq_m_n_u16): Remove.
24535 (vshrq_m_n_s8): Remove.
24536 (vshrq_m_n_s32): Remove.
24537 (vshrq_m_n_s16): Remove.
24538 (vshrq_m_n_u8): Remove.
24539 (vshrq_m_n_u32): Remove.
24540 (vshrq_m_n_u16): Remove.
24541 (vrshrq_x_n_s8): Remove.
24542 (vrshrq_x_n_s16): Remove.
24543 (vrshrq_x_n_s32): Remove.
24544 (vrshrq_x_n_u8): Remove.
24545 (vrshrq_x_n_u16): Remove.
24546 (vrshrq_x_n_u32): Remove.
24547 (vshrq_x_n_s8): Remove.
24548 (vshrq_x_n_s16): Remove.
24549 (vshrq_x_n_s32): Remove.
24550 (vshrq_x_n_u8): Remove.
24551 (vshrq_x_n_u16): Remove.
24552 (vshrq_x_n_u32): Remove.
24553 (__arm_vshrq_n_s8): Remove.
24554 (__arm_vshrq_n_s16): Remove.
24555 (__arm_vshrq_n_s32): Remove.
24556 (__arm_vshrq_n_u8): Remove.
24557 (__arm_vshrq_n_u16): Remove.
24558 (__arm_vshrq_n_u32): Remove.
24559 (__arm_vrshrq_n_u8): Remove.
24560 (__arm_vrshrq_n_s8): Remove.
24561 (__arm_vrshrq_n_u16): Remove.
24562 (__arm_vrshrq_n_s16): Remove.
24563 (__arm_vrshrq_n_u32): Remove.
24564 (__arm_vrshrq_n_s32): Remove.
24565 (__arm_vrshrq_m_n_s8): Remove.
24566 (__arm_vrshrq_m_n_s32): Remove.
24567 (__arm_vrshrq_m_n_s16): Remove.
24568 (__arm_vrshrq_m_n_u8): Remove.
24569 (__arm_vrshrq_m_n_u32): Remove.
24570 (__arm_vrshrq_m_n_u16): Remove.
24571 (__arm_vshrq_m_n_s8): Remove.
24572 (__arm_vshrq_m_n_s32): Remove.
24573 (__arm_vshrq_m_n_s16): Remove.
24574 (__arm_vshrq_m_n_u8): Remove.
24575 (__arm_vshrq_m_n_u32): Remove.
24576 (__arm_vshrq_m_n_u16): Remove.
24577 (__arm_vrshrq_x_n_s8): Remove.
24578 (__arm_vrshrq_x_n_s16): Remove.
24579 (__arm_vrshrq_x_n_s32): Remove.
24580 (__arm_vrshrq_x_n_u8): Remove.
24581 (__arm_vrshrq_x_n_u16): Remove.
24582 (__arm_vrshrq_x_n_u32): Remove.
24583 (__arm_vshrq_x_n_s8): Remove.
24584 (__arm_vshrq_x_n_s16): Remove.
24585 (__arm_vshrq_x_n_s32): Remove.
24586 (__arm_vshrq_x_n_u8): Remove.
24587 (__arm_vshrq_x_n_u16): Remove.
24588 (__arm_vshrq_x_n_u32): Remove.
24589 (__arm_vshrq): Remove.
24590 (__arm_vrshrq): Remove.
24591 (__arm_vrshrq_m): Remove.
24592 (__arm_vshrq_m): Remove.
24593 (__arm_vrshrq_x): Remove.
24594 (__arm_vshrq_x): Remove.
24596 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24598 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
24599 (mve_insn): Add vrshr, vshr.
24600 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
24601 (mve_vrshrq_n_<supf><mode>): Merge into ...
24602 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24603 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
24605 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24607 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24609 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
24610 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
24612 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24614 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
24615 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
24616 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
24617 (vqrshrunbq, vqrshruntq): New.
24618 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
24619 (vqrshrunbq, vqrshruntq): New.
24620 * config/arm/arm-mve-builtins.cc
24621 (function_instance::has_inactive_argument): Handle vqshrunbq,
24622 vqshruntq, vqrshrunbq, vqrshruntq.
24623 * config/arm/arm_mve.h (vqrshrunbq): Remove.
24624 (vqrshruntq): Remove.
24625 (vqrshrunbq_m): Remove.
24626 (vqrshruntq_m): Remove.
24627 (vqrshrunbq_n_s16): Remove.
24628 (vqrshrunbq_n_s32): Remove.
24629 (vqrshruntq_n_s16): Remove.
24630 (vqrshruntq_n_s32): Remove.
24631 (vqrshrunbq_m_n_s32): Remove.
24632 (vqrshrunbq_m_n_s16): Remove.
24633 (vqrshruntq_m_n_s32): Remove.
24634 (vqrshruntq_m_n_s16): Remove.
24635 (__arm_vqrshrunbq_n_s16): Remove.
24636 (__arm_vqrshrunbq_n_s32): Remove.
24637 (__arm_vqrshruntq_n_s16): Remove.
24638 (__arm_vqrshruntq_n_s32): Remove.
24639 (__arm_vqrshrunbq_m_n_s32): Remove.
24640 (__arm_vqrshrunbq_m_n_s16): Remove.
24641 (__arm_vqrshruntq_m_n_s32): Remove.
24642 (__arm_vqrshruntq_m_n_s16): Remove.
24643 (__arm_vqrshrunbq): Remove.
24644 (__arm_vqrshruntq): Remove.
24645 (__arm_vqrshrunbq_m): Remove.
24646 (__arm_vqrshruntq_m): Remove.
24647 (vqshrunbq): Remove.
24648 (vqshruntq): Remove.
24649 (vqshrunbq_m): Remove.
24650 (vqshruntq_m): Remove.
24651 (vqshrunbq_n_s16): Remove.
24652 (vqshruntq_n_s16): Remove.
24653 (vqshrunbq_n_s32): Remove.
24654 (vqshruntq_n_s32): Remove.
24655 (vqshrunbq_m_n_s32): Remove.
24656 (vqshrunbq_m_n_s16): Remove.
24657 (vqshruntq_m_n_s32): Remove.
24658 (vqshruntq_m_n_s16): Remove.
24659 (__arm_vqshrunbq_n_s16): Remove.
24660 (__arm_vqshruntq_n_s16): Remove.
24661 (__arm_vqshrunbq_n_s32): Remove.
24662 (__arm_vqshruntq_n_s32): Remove.
24663 (__arm_vqshrunbq_m_n_s32): Remove.
24664 (__arm_vqshrunbq_m_n_s16): Remove.
24665 (__arm_vqshruntq_m_n_s32): Remove.
24666 (__arm_vqshruntq_m_n_s16): Remove.
24667 (__arm_vqshrunbq): Remove.
24668 (__arm_vqshruntq): Remove.
24669 (__arm_vqshrunbq_m): Remove.
24670 (__arm_vqshruntq_m): Remove.
24672 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24674 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
24675 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
24676 (MVE_SHRN_M_N): Likewise.
24677 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
24678 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
24680 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
24681 (mve_vqrshruntq_n_s<mode>): Remove.
24682 (mve_vqshrunbq_n_s<mode>): Remove.
24683 (mve_vqshruntq_n_s<mode>): Remove.
24684 (mve_vqrshrunbq_m_n_s<mode>): Remove.
24685 (mve_vqrshruntq_m_n_s<mode>): Remove.
24686 (mve_vqshrunbq_m_n_s<mode>): Remove.
24687 (mve_vqshruntq_m_n_s<mode>): Remove.
24689 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24691 * config/arm/arm-mve-builtins-shapes.cc
24692 (binary_rshift_narrow_unsigned): New.
24693 * config/arm/arm-mve-builtins-shapes.h
24694 (binary_rshift_narrow_unsigned): New.
24696 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24698 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
24699 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
24700 (vqrshrnbq, vqrshrntq): New.
24701 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
24702 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
24704 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
24705 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
24706 * config/arm/arm-mve-builtins.cc
24707 (function_instance::has_inactive_argument): Handle vshrnbq,
24708 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
24710 * config/arm/arm_mve.h (vshrnbq): Remove.
24712 (vshrnbq_m): Remove.
24713 (vshrntq_m): Remove.
24714 (vshrnbq_n_s16): Remove.
24715 (vshrntq_n_s16): Remove.
24716 (vshrnbq_n_u16): Remove.
24717 (vshrntq_n_u16): Remove.
24718 (vshrnbq_n_s32): Remove.
24719 (vshrntq_n_s32): Remove.
24720 (vshrnbq_n_u32): Remove.
24721 (vshrntq_n_u32): Remove.
24722 (vshrnbq_m_n_s32): Remove.
24723 (vshrnbq_m_n_s16): Remove.
24724 (vshrnbq_m_n_u32): Remove.
24725 (vshrnbq_m_n_u16): Remove.
24726 (vshrntq_m_n_s32): Remove.
24727 (vshrntq_m_n_s16): Remove.
24728 (vshrntq_m_n_u32): Remove.
24729 (vshrntq_m_n_u16): Remove.
24730 (__arm_vshrnbq_n_s16): Remove.
24731 (__arm_vshrntq_n_s16): Remove.
24732 (__arm_vshrnbq_n_u16): Remove.
24733 (__arm_vshrntq_n_u16): Remove.
24734 (__arm_vshrnbq_n_s32): Remove.
24735 (__arm_vshrntq_n_s32): Remove.
24736 (__arm_vshrnbq_n_u32): Remove.
24737 (__arm_vshrntq_n_u32): Remove.
24738 (__arm_vshrnbq_m_n_s32): Remove.
24739 (__arm_vshrnbq_m_n_s16): Remove.
24740 (__arm_vshrnbq_m_n_u32): Remove.
24741 (__arm_vshrnbq_m_n_u16): Remove.
24742 (__arm_vshrntq_m_n_s32): Remove.
24743 (__arm_vshrntq_m_n_s16): Remove.
24744 (__arm_vshrntq_m_n_u32): Remove.
24745 (__arm_vshrntq_m_n_u16): Remove.
24746 (__arm_vshrnbq): Remove.
24747 (__arm_vshrntq): Remove.
24748 (__arm_vshrnbq_m): Remove.
24749 (__arm_vshrntq_m): Remove.
24750 (vrshrnbq): Remove.
24751 (vrshrntq): Remove.
24752 (vrshrnbq_m): Remove.
24753 (vrshrntq_m): Remove.
24754 (vrshrnbq_n_s16): Remove.
24755 (vrshrntq_n_s16): Remove.
24756 (vrshrnbq_n_u16): Remove.
24757 (vrshrntq_n_u16): Remove.
24758 (vrshrnbq_n_s32): Remove.
24759 (vrshrntq_n_s32): Remove.
24760 (vrshrnbq_n_u32): Remove.
24761 (vrshrntq_n_u32): Remove.
24762 (vrshrnbq_m_n_s32): Remove.
24763 (vrshrnbq_m_n_s16): Remove.
24764 (vrshrnbq_m_n_u32): Remove.
24765 (vrshrnbq_m_n_u16): Remove.
24766 (vrshrntq_m_n_s32): Remove.
24767 (vrshrntq_m_n_s16): Remove.
24768 (vrshrntq_m_n_u32): Remove.
24769 (vrshrntq_m_n_u16): Remove.
24770 (__arm_vrshrnbq_n_s16): Remove.
24771 (__arm_vrshrntq_n_s16): Remove.
24772 (__arm_vrshrnbq_n_u16): Remove.
24773 (__arm_vrshrntq_n_u16): Remove.
24774 (__arm_vrshrnbq_n_s32): Remove.
24775 (__arm_vrshrntq_n_s32): Remove.
24776 (__arm_vrshrnbq_n_u32): Remove.
24777 (__arm_vrshrntq_n_u32): Remove.
24778 (__arm_vrshrnbq_m_n_s32): Remove.
24779 (__arm_vrshrnbq_m_n_s16): Remove.
24780 (__arm_vrshrnbq_m_n_u32): Remove.
24781 (__arm_vrshrnbq_m_n_u16): Remove.
24782 (__arm_vrshrntq_m_n_s32): Remove.
24783 (__arm_vrshrntq_m_n_s16): Remove.
24784 (__arm_vrshrntq_m_n_u32): Remove.
24785 (__arm_vrshrntq_m_n_u16): Remove.
24786 (__arm_vrshrnbq): Remove.
24787 (__arm_vrshrntq): Remove.
24788 (__arm_vrshrnbq_m): Remove.
24789 (__arm_vrshrntq_m): Remove.
24790 (vqshrnbq): Remove.
24791 (vqshrntq): Remove.
24792 (vqshrnbq_m): Remove.
24793 (vqshrntq_m): Remove.
24794 (vqshrnbq_n_s16): Remove.
24795 (vqshrntq_n_s16): Remove.
24796 (vqshrnbq_n_u16): Remove.
24797 (vqshrntq_n_u16): Remove.
24798 (vqshrnbq_n_s32): Remove.
24799 (vqshrntq_n_s32): Remove.
24800 (vqshrnbq_n_u32): Remove.
24801 (vqshrntq_n_u32): Remove.
24802 (vqshrnbq_m_n_s32): Remove.
24803 (vqshrnbq_m_n_s16): Remove.
24804 (vqshrnbq_m_n_u32): Remove.
24805 (vqshrnbq_m_n_u16): Remove.
24806 (vqshrntq_m_n_s32): Remove.
24807 (vqshrntq_m_n_s16): Remove.
24808 (vqshrntq_m_n_u32): Remove.
24809 (vqshrntq_m_n_u16): Remove.
24810 (__arm_vqshrnbq_n_s16): Remove.
24811 (__arm_vqshrntq_n_s16): Remove.
24812 (__arm_vqshrnbq_n_u16): Remove.
24813 (__arm_vqshrntq_n_u16): Remove.
24814 (__arm_vqshrnbq_n_s32): Remove.
24815 (__arm_vqshrntq_n_s32): Remove.
24816 (__arm_vqshrnbq_n_u32): Remove.
24817 (__arm_vqshrntq_n_u32): Remove.
24818 (__arm_vqshrnbq_m_n_s32): Remove.
24819 (__arm_vqshrnbq_m_n_s16): Remove.
24820 (__arm_vqshrnbq_m_n_u32): Remove.
24821 (__arm_vqshrnbq_m_n_u16): Remove.
24822 (__arm_vqshrntq_m_n_s32): Remove.
24823 (__arm_vqshrntq_m_n_s16): Remove.
24824 (__arm_vqshrntq_m_n_u32): Remove.
24825 (__arm_vqshrntq_m_n_u16): Remove.
24826 (__arm_vqshrnbq): Remove.
24827 (__arm_vqshrntq): Remove.
24828 (__arm_vqshrnbq_m): Remove.
24829 (__arm_vqshrntq_m): Remove.
24830 (vqrshrnbq): Remove.
24831 (vqrshrntq): Remove.
24832 (vqrshrnbq_m): Remove.
24833 (vqrshrntq_m): Remove.
24834 (vqrshrnbq_n_s16): Remove.
24835 (vqrshrnbq_n_u16): Remove.
24836 (vqrshrnbq_n_s32): Remove.
24837 (vqrshrnbq_n_u32): Remove.
24838 (vqrshrntq_n_s16): Remove.
24839 (vqrshrntq_n_u16): Remove.
24840 (vqrshrntq_n_s32): Remove.
24841 (vqrshrntq_n_u32): Remove.
24842 (vqrshrnbq_m_n_s32): Remove.
24843 (vqrshrnbq_m_n_s16): Remove.
24844 (vqrshrnbq_m_n_u32): Remove.
24845 (vqrshrnbq_m_n_u16): Remove.
24846 (vqrshrntq_m_n_s32): Remove.
24847 (vqrshrntq_m_n_s16): Remove.
24848 (vqrshrntq_m_n_u32): Remove.
24849 (vqrshrntq_m_n_u16): Remove.
24850 (__arm_vqrshrnbq_n_s16): Remove.
24851 (__arm_vqrshrnbq_n_u16): Remove.
24852 (__arm_vqrshrnbq_n_s32): Remove.
24853 (__arm_vqrshrnbq_n_u32): Remove.
24854 (__arm_vqrshrntq_n_s16): Remove.
24855 (__arm_vqrshrntq_n_u16): Remove.
24856 (__arm_vqrshrntq_n_s32): Remove.
24857 (__arm_vqrshrntq_n_u32): Remove.
24858 (__arm_vqrshrnbq_m_n_s32): Remove.
24859 (__arm_vqrshrnbq_m_n_s16): Remove.
24860 (__arm_vqrshrnbq_m_n_u32): Remove.
24861 (__arm_vqrshrnbq_m_n_u16): Remove.
24862 (__arm_vqrshrntq_m_n_s32): Remove.
24863 (__arm_vqrshrntq_m_n_s16): Remove.
24864 (__arm_vqrshrntq_m_n_u32): Remove.
24865 (__arm_vqrshrntq_m_n_u16): Remove.
24866 (__arm_vqrshrnbq): Remove.
24867 (__arm_vqrshrntq): Remove.
24868 (__arm_vqrshrnbq_m): Remove.
24869 (__arm_vqrshrntq_m): Remove.
24871 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24873 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
24874 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
24875 vrshrnt, vshrnb, vshrnt.
24877 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
24878 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
24879 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
24880 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
24881 (mve_vshrntq_n_<supf><mode>): Merge into ...
24882 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24883 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
24884 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
24885 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
24886 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
24888 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24890 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24892 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
24894 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
24896 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24898 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
24899 (vmaxq, vminq): New.
24900 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
24901 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
24902 * config/arm/arm_mve.h (vminq): Remove.
24908 (vminq_u8): Remove.
24909 (vmaxq_u8): Remove.
24910 (vminq_s8): Remove.
24911 (vmaxq_s8): Remove.
24912 (vminq_u16): Remove.
24913 (vmaxq_u16): Remove.
24914 (vminq_s16): Remove.
24915 (vmaxq_s16): Remove.
24916 (vminq_u32): Remove.
24917 (vmaxq_u32): Remove.
24918 (vminq_s32): Remove.
24919 (vmaxq_s32): Remove.
24920 (vmaxq_m_s8): Remove.
24921 (vmaxq_m_s32): Remove.
24922 (vmaxq_m_s16): Remove.
24923 (vmaxq_m_u8): Remove.
24924 (vmaxq_m_u32): Remove.
24925 (vmaxq_m_u16): Remove.
24926 (vminq_m_s8): Remove.
24927 (vminq_m_s32): Remove.
24928 (vminq_m_s16): Remove.
24929 (vminq_m_u8): Remove.
24930 (vminq_m_u32): Remove.
24931 (vminq_m_u16): Remove.
24932 (vminq_x_s8): Remove.
24933 (vminq_x_s16): Remove.
24934 (vminq_x_s32): Remove.
24935 (vminq_x_u8): Remove.
24936 (vminq_x_u16): Remove.
24937 (vminq_x_u32): Remove.
24938 (vmaxq_x_s8): Remove.
24939 (vmaxq_x_s16): Remove.
24940 (vmaxq_x_s32): Remove.
24941 (vmaxq_x_u8): Remove.
24942 (vmaxq_x_u16): Remove.
24943 (vmaxq_x_u32): Remove.
24944 (__arm_vminq_u8): Remove.
24945 (__arm_vmaxq_u8): Remove.
24946 (__arm_vminq_s8): Remove.
24947 (__arm_vmaxq_s8): Remove.
24948 (__arm_vminq_u16): Remove.
24949 (__arm_vmaxq_u16): Remove.
24950 (__arm_vminq_s16): Remove.
24951 (__arm_vmaxq_s16): Remove.
24952 (__arm_vminq_u32): Remove.
24953 (__arm_vmaxq_u32): Remove.
24954 (__arm_vminq_s32): Remove.
24955 (__arm_vmaxq_s32): Remove.
24956 (__arm_vmaxq_m_s8): Remove.
24957 (__arm_vmaxq_m_s32): Remove.
24958 (__arm_vmaxq_m_s16): Remove.
24959 (__arm_vmaxq_m_u8): Remove.
24960 (__arm_vmaxq_m_u32): Remove.
24961 (__arm_vmaxq_m_u16): Remove.
24962 (__arm_vminq_m_s8): Remove.
24963 (__arm_vminq_m_s32): Remove.
24964 (__arm_vminq_m_s16): Remove.
24965 (__arm_vminq_m_u8): Remove.
24966 (__arm_vminq_m_u32): Remove.
24967 (__arm_vminq_m_u16): Remove.
24968 (__arm_vminq_x_s8): Remove.
24969 (__arm_vminq_x_s16): Remove.
24970 (__arm_vminq_x_s32): Remove.
24971 (__arm_vminq_x_u8): Remove.
24972 (__arm_vminq_x_u16): Remove.
24973 (__arm_vminq_x_u32): Remove.
24974 (__arm_vmaxq_x_s8): Remove.
24975 (__arm_vmaxq_x_s16): Remove.
24976 (__arm_vmaxq_x_s32): Remove.
24977 (__arm_vmaxq_x_u8): Remove.
24978 (__arm_vmaxq_x_u16): Remove.
24979 (__arm_vmaxq_x_u32): Remove.
24980 (__arm_vminq): Remove.
24981 (__arm_vmaxq): Remove.
24982 (__arm_vmaxq_m): Remove.
24983 (__arm_vminq_m): Remove.
24984 (__arm_vminq_x): Remove.
24985 (__arm_vmaxq_x): Remove.
24987 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24989 * config/arm/iterators.md (MAX_MIN_SU): New.
24990 (max_min_su_str): New.
24991 (max_min_supf): New.
24992 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
24993 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
24994 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
24996 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24998 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
24999 (vqshlq, vshlq): New.
25000 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
25001 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
25002 * config/arm/arm_mve.h (vshlq): Remove.
25005 (vshlq_m_r): Remove.
25007 (vshlq_m_n): Remove.
25009 (vshlq_x_n): Remove.
25010 (vshlq_s8): Remove.
25011 (vshlq_s16): Remove.
25012 (vshlq_s32): Remove.
25013 (vshlq_u8): Remove.
25014 (vshlq_u16): Remove.
25015 (vshlq_u32): Remove.
25016 (vshlq_r_u8): Remove.
25017 (vshlq_n_u8): Remove.
25018 (vshlq_r_s8): Remove.
25019 (vshlq_n_s8): Remove.
25020 (vshlq_r_u16): Remove.
25021 (vshlq_n_u16): Remove.
25022 (vshlq_r_s16): Remove.
25023 (vshlq_n_s16): Remove.
25024 (vshlq_r_u32): Remove.
25025 (vshlq_n_u32): Remove.
25026 (vshlq_r_s32): Remove.
25027 (vshlq_n_s32): Remove.
25028 (vshlq_m_r_u8): Remove.
25029 (vshlq_m_r_s8): Remove.
25030 (vshlq_m_r_u16): Remove.
25031 (vshlq_m_r_s16): Remove.
25032 (vshlq_m_r_u32): Remove.
25033 (vshlq_m_r_s32): Remove.
25034 (vshlq_m_u8): Remove.
25035 (vshlq_m_s8): Remove.
25036 (vshlq_m_u16): Remove.
25037 (vshlq_m_s16): Remove.
25038 (vshlq_m_u32): Remove.
25039 (vshlq_m_s32): Remove.
25040 (vshlq_m_n_s8): Remove.
25041 (vshlq_m_n_s32): Remove.
25042 (vshlq_m_n_s16): Remove.
25043 (vshlq_m_n_u8): Remove.
25044 (vshlq_m_n_u32): Remove.
25045 (vshlq_m_n_u16): Remove.
25046 (vshlq_x_s8): Remove.
25047 (vshlq_x_s16): Remove.
25048 (vshlq_x_s32): Remove.
25049 (vshlq_x_u8): Remove.
25050 (vshlq_x_u16): Remove.
25051 (vshlq_x_u32): Remove.
25052 (vshlq_x_n_s8): Remove.
25053 (vshlq_x_n_s16): Remove.
25054 (vshlq_x_n_s32): Remove.
25055 (vshlq_x_n_u8): Remove.
25056 (vshlq_x_n_u16): Remove.
25057 (vshlq_x_n_u32): Remove.
25058 (__arm_vshlq_s8): Remove.
25059 (__arm_vshlq_s16): Remove.
25060 (__arm_vshlq_s32): Remove.
25061 (__arm_vshlq_u8): Remove.
25062 (__arm_vshlq_u16): Remove.
25063 (__arm_vshlq_u32): Remove.
25064 (__arm_vshlq_r_u8): Remove.
25065 (__arm_vshlq_n_u8): Remove.
25066 (__arm_vshlq_r_s8): Remove.
25067 (__arm_vshlq_n_s8): Remove.
25068 (__arm_vshlq_r_u16): Remove.
25069 (__arm_vshlq_n_u16): Remove.
25070 (__arm_vshlq_r_s16): Remove.
25071 (__arm_vshlq_n_s16): Remove.
25072 (__arm_vshlq_r_u32): Remove.
25073 (__arm_vshlq_n_u32): Remove.
25074 (__arm_vshlq_r_s32): Remove.
25075 (__arm_vshlq_n_s32): Remove.
25076 (__arm_vshlq_m_r_u8): Remove.
25077 (__arm_vshlq_m_r_s8): Remove.
25078 (__arm_vshlq_m_r_u16): Remove.
25079 (__arm_vshlq_m_r_s16): Remove.
25080 (__arm_vshlq_m_r_u32): Remove.
25081 (__arm_vshlq_m_r_s32): Remove.
25082 (__arm_vshlq_m_u8): Remove.
25083 (__arm_vshlq_m_s8): Remove.
25084 (__arm_vshlq_m_u16): Remove.
25085 (__arm_vshlq_m_s16): Remove.
25086 (__arm_vshlq_m_u32): Remove.
25087 (__arm_vshlq_m_s32): Remove.
25088 (__arm_vshlq_m_n_s8): Remove.
25089 (__arm_vshlq_m_n_s32): Remove.
25090 (__arm_vshlq_m_n_s16): Remove.
25091 (__arm_vshlq_m_n_u8): Remove.
25092 (__arm_vshlq_m_n_u32): Remove.
25093 (__arm_vshlq_m_n_u16): Remove.
25094 (__arm_vshlq_x_s8): Remove.
25095 (__arm_vshlq_x_s16): Remove.
25096 (__arm_vshlq_x_s32): Remove.
25097 (__arm_vshlq_x_u8): Remove.
25098 (__arm_vshlq_x_u16): Remove.
25099 (__arm_vshlq_x_u32): Remove.
25100 (__arm_vshlq_x_n_s8): Remove.
25101 (__arm_vshlq_x_n_s16): Remove.
25102 (__arm_vshlq_x_n_s32): Remove.
25103 (__arm_vshlq_x_n_u8): Remove.
25104 (__arm_vshlq_x_n_u16): Remove.
25105 (__arm_vshlq_x_n_u32): Remove.
25106 (__arm_vshlq): Remove.
25107 (__arm_vshlq_r): Remove.
25108 (__arm_vshlq_n): Remove.
25109 (__arm_vshlq_m_r): Remove.
25110 (__arm_vshlq_m): Remove.
25111 (__arm_vshlq_m_n): Remove.
25112 (__arm_vshlq_x): Remove.
25113 (__arm_vshlq_x_n): Remove.
25115 (vqshlq_r): Remove.
25116 (vqshlq_n): Remove.
25117 (vqshlq_m_r): Remove.
25118 (vqshlq_m_n): Remove.
25119 (vqshlq_m): Remove.
25120 (vqshlq_u8): Remove.
25121 (vqshlq_r_u8): Remove.
25122 (vqshlq_n_u8): Remove.
25123 (vqshlq_s8): Remove.
25124 (vqshlq_r_s8): Remove.
25125 (vqshlq_n_s8): Remove.
25126 (vqshlq_u16): Remove.
25127 (vqshlq_r_u16): Remove.
25128 (vqshlq_n_u16): Remove.
25129 (vqshlq_s16): Remove.
25130 (vqshlq_r_s16): Remove.
25131 (vqshlq_n_s16): Remove.
25132 (vqshlq_u32): Remove.
25133 (vqshlq_r_u32): Remove.
25134 (vqshlq_n_u32): Remove.
25135 (vqshlq_s32): Remove.
25136 (vqshlq_r_s32): Remove.
25137 (vqshlq_n_s32): Remove.
25138 (vqshlq_m_r_u8): Remove.
25139 (vqshlq_m_r_s8): Remove.
25140 (vqshlq_m_r_u16): Remove.
25141 (vqshlq_m_r_s16): Remove.
25142 (vqshlq_m_r_u32): Remove.
25143 (vqshlq_m_r_s32): Remove.
25144 (vqshlq_m_n_s8): Remove.
25145 (vqshlq_m_n_s32): Remove.
25146 (vqshlq_m_n_s16): Remove.
25147 (vqshlq_m_n_u8): Remove.
25148 (vqshlq_m_n_u32): Remove.
25149 (vqshlq_m_n_u16): Remove.
25150 (vqshlq_m_s8): Remove.
25151 (vqshlq_m_s32): Remove.
25152 (vqshlq_m_s16): Remove.
25153 (vqshlq_m_u8): Remove.
25154 (vqshlq_m_u32): Remove.
25155 (vqshlq_m_u16): Remove.
25156 (__arm_vqshlq_u8): Remove.
25157 (__arm_vqshlq_r_u8): Remove.
25158 (__arm_vqshlq_n_u8): Remove.
25159 (__arm_vqshlq_s8): Remove.
25160 (__arm_vqshlq_r_s8): Remove.
25161 (__arm_vqshlq_n_s8): Remove.
25162 (__arm_vqshlq_u16): Remove.
25163 (__arm_vqshlq_r_u16): Remove.
25164 (__arm_vqshlq_n_u16): Remove.
25165 (__arm_vqshlq_s16): Remove.
25166 (__arm_vqshlq_r_s16): Remove.
25167 (__arm_vqshlq_n_s16): Remove.
25168 (__arm_vqshlq_u32): Remove.
25169 (__arm_vqshlq_r_u32): Remove.
25170 (__arm_vqshlq_n_u32): Remove.
25171 (__arm_vqshlq_s32): Remove.
25172 (__arm_vqshlq_r_s32): Remove.
25173 (__arm_vqshlq_n_s32): Remove.
25174 (__arm_vqshlq_m_r_u8): Remove.
25175 (__arm_vqshlq_m_r_s8): Remove.
25176 (__arm_vqshlq_m_r_u16): Remove.
25177 (__arm_vqshlq_m_r_s16): Remove.
25178 (__arm_vqshlq_m_r_u32): Remove.
25179 (__arm_vqshlq_m_r_s32): Remove.
25180 (__arm_vqshlq_m_n_s8): Remove.
25181 (__arm_vqshlq_m_n_s32): Remove.
25182 (__arm_vqshlq_m_n_s16): Remove.
25183 (__arm_vqshlq_m_n_u8): Remove.
25184 (__arm_vqshlq_m_n_u32): Remove.
25185 (__arm_vqshlq_m_n_u16): Remove.
25186 (__arm_vqshlq_m_s8): Remove.
25187 (__arm_vqshlq_m_s32): Remove.
25188 (__arm_vqshlq_m_s16): Remove.
25189 (__arm_vqshlq_m_u8): Remove.
25190 (__arm_vqshlq_m_u32): Remove.
25191 (__arm_vqshlq_m_u16): Remove.
25192 (__arm_vqshlq): Remove.
25193 (__arm_vqshlq_r): Remove.
25194 (__arm_vqshlq_n): Remove.
25195 (__arm_vqshlq_m_r): Remove.
25196 (__arm_vqshlq_m_n): Remove.
25197 (__arm_vqshlq_m): Remove.
25199 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25201 * config/arm/arm-mve-builtins-functions.h (class
25202 unspec_mve_function_exact_insn_vshl): New.
25204 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25206 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
25207 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
25209 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25211 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
25212 (finish_opt_n_resolution): Handle MODE_r.
25213 * config/arm/arm-mve-builtins.def (r): New mode.
25215 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25217 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
25218 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
25220 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25222 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
25224 * config/arm/arm-mve-builtins-base.def (vabdq): New.
25225 * config/arm/arm-mve-builtins-base.h (vabdq): New.
25226 * config/arm/arm_mve.h (vabdq): Remove.
25229 (vabdq_u8): Remove.
25230 (vabdq_s8): Remove.
25231 (vabdq_u16): Remove.
25232 (vabdq_s16): Remove.
25233 (vabdq_u32): Remove.
25234 (vabdq_s32): Remove.
25235 (vabdq_f16): Remove.
25236 (vabdq_f32): Remove.
25237 (vabdq_m_s8): Remove.
25238 (vabdq_m_s32): Remove.
25239 (vabdq_m_s16): Remove.
25240 (vabdq_m_u8): Remove.
25241 (vabdq_m_u32): Remove.
25242 (vabdq_m_u16): Remove.
25243 (vabdq_m_f32): Remove.
25244 (vabdq_m_f16): Remove.
25245 (vabdq_x_s8): Remove.
25246 (vabdq_x_s16): Remove.
25247 (vabdq_x_s32): Remove.
25248 (vabdq_x_u8): Remove.
25249 (vabdq_x_u16): Remove.
25250 (vabdq_x_u32): Remove.
25251 (vabdq_x_f16): Remove.
25252 (vabdq_x_f32): Remove.
25253 (__arm_vabdq_u8): Remove.
25254 (__arm_vabdq_s8): Remove.
25255 (__arm_vabdq_u16): Remove.
25256 (__arm_vabdq_s16): Remove.
25257 (__arm_vabdq_u32): Remove.
25258 (__arm_vabdq_s32): Remove.
25259 (__arm_vabdq_m_s8): Remove.
25260 (__arm_vabdq_m_s32): Remove.
25261 (__arm_vabdq_m_s16): Remove.
25262 (__arm_vabdq_m_u8): Remove.
25263 (__arm_vabdq_m_u32): Remove.
25264 (__arm_vabdq_m_u16): Remove.
25265 (__arm_vabdq_x_s8): Remove.
25266 (__arm_vabdq_x_s16): Remove.
25267 (__arm_vabdq_x_s32): Remove.
25268 (__arm_vabdq_x_u8): Remove.
25269 (__arm_vabdq_x_u16): Remove.
25270 (__arm_vabdq_x_u32): Remove.
25271 (__arm_vabdq_f16): Remove.
25272 (__arm_vabdq_f32): Remove.
25273 (__arm_vabdq_m_f32): Remove.
25274 (__arm_vabdq_m_f16): Remove.
25275 (__arm_vabdq_x_f16): Remove.
25276 (__arm_vabdq_x_f32): Remove.
25277 (__arm_vabdq): Remove.
25278 (__arm_vabdq_m): Remove.
25279 (__arm_vabdq_x): Remove.
25281 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25283 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
25284 (MVE_FP_VABDQ_ONLY): New.
25285 (mve_insn): Add vabd.
25286 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
25287 (@mve_<mve_insn>q_f<mode>): ... this.
25288 (mve_vabdq_m_f<mode>): Remove.
25290 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25292 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
25293 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
25294 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
25295 * config/arm/arm_mve.h (vqrdmulhq): Remove.
25296 (vqrdmulhq_m): Remove.
25297 (vqrdmulhq_s8): Remove.
25298 (vqrdmulhq_n_s8): Remove.
25299 (vqrdmulhq_s16): Remove.
25300 (vqrdmulhq_n_s16): Remove.
25301 (vqrdmulhq_s32): Remove.
25302 (vqrdmulhq_n_s32): Remove.
25303 (vqrdmulhq_m_n_s8): Remove.
25304 (vqrdmulhq_m_n_s32): Remove.
25305 (vqrdmulhq_m_n_s16): Remove.
25306 (vqrdmulhq_m_s8): Remove.
25307 (vqrdmulhq_m_s32): Remove.
25308 (vqrdmulhq_m_s16): Remove.
25309 (__arm_vqrdmulhq_s8): Remove.
25310 (__arm_vqrdmulhq_n_s8): Remove.
25311 (__arm_vqrdmulhq_s16): Remove.
25312 (__arm_vqrdmulhq_n_s16): Remove.
25313 (__arm_vqrdmulhq_s32): Remove.
25314 (__arm_vqrdmulhq_n_s32): Remove.
25315 (__arm_vqrdmulhq_m_n_s8): Remove.
25316 (__arm_vqrdmulhq_m_n_s32): Remove.
25317 (__arm_vqrdmulhq_m_n_s16): Remove.
25318 (__arm_vqrdmulhq_m_s8): Remove.
25319 (__arm_vqrdmulhq_m_s32): Remove.
25320 (__arm_vqrdmulhq_m_s16): Remove.
25321 (__arm_vqrdmulhq): Remove.
25322 (__arm_vqrdmulhq_m): Remove.
25324 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25326 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
25327 (MVE_SHIFT_N, MVE_SHIFT_R): New.
25328 (mve_insn): Add vqshl, vshl.
25329 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
25330 (mve_vshlq_n_<supf><mode>): Merge into ...
25331 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25332 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
25334 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
25335 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
25337 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
25338 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
25340 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25341 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
25343 (@mve_<mve_insn>q_<supf><mode>): ... this.
25345 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25347 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
25348 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
25349 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
25350 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
25352 * config/arm/arm_mve.h (vrshlq): Remove.
25353 (vrshlq_m_n): Remove.
25354 (vrshlq_m): Remove.
25355 (vrshlq_x): Remove.
25356 (vrshlq_u8): Remove.
25357 (vrshlq_n_u8): Remove.
25358 (vrshlq_s8): Remove.
25359 (vrshlq_n_s8): Remove.
25360 (vrshlq_u16): Remove.
25361 (vrshlq_n_u16): Remove.
25362 (vrshlq_s16): Remove.
25363 (vrshlq_n_s16): Remove.
25364 (vrshlq_u32): Remove.
25365 (vrshlq_n_u32): Remove.
25366 (vrshlq_s32): Remove.
25367 (vrshlq_n_s32): Remove.
25368 (vrshlq_m_n_u8): Remove.
25369 (vrshlq_m_n_s8): Remove.
25370 (vrshlq_m_n_u16): Remove.
25371 (vrshlq_m_n_s16): Remove.
25372 (vrshlq_m_n_u32): Remove.
25373 (vrshlq_m_n_s32): Remove.
25374 (vrshlq_m_s8): Remove.
25375 (vrshlq_m_s32): Remove.
25376 (vrshlq_m_s16): Remove.
25377 (vrshlq_m_u8): Remove.
25378 (vrshlq_m_u32): Remove.
25379 (vrshlq_m_u16): Remove.
25380 (vrshlq_x_s8): Remove.
25381 (vrshlq_x_s16): Remove.
25382 (vrshlq_x_s32): Remove.
25383 (vrshlq_x_u8): Remove.
25384 (vrshlq_x_u16): Remove.
25385 (vrshlq_x_u32): Remove.
25386 (__arm_vrshlq_u8): Remove.
25387 (__arm_vrshlq_n_u8): Remove.
25388 (__arm_vrshlq_s8): Remove.
25389 (__arm_vrshlq_n_s8): Remove.
25390 (__arm_vrshlq_u16): Remove.
25391 (__arm_vrshlq_n_u16): Remove.
25392 (__arm_vrshlq_s16): Remove.
25393 (__arm_vrshlq_n_s16): Remove.
25394 (__arm_vrshlq_u32): Remove.
25395 (__arm_vrshlq_n_u32): Remove.
25396 (__arm_vrshlq_s32): Remove.
25397 (__arm_vrshlq_n_s32): Remove.
25398 (__arm_vrshlq_m_n_u8): Remove.
25399 (__arm_vrshlq_m_n_s8): Remove.
25400 (__arm_vrshlq_m_n_u16): Remove.
25401 (__arm_vrshlq_m_n_s16): Remove.
25402 (__arm_vrshlq_m_n_u32): Remove.
25403 (__arm_vrshlq_m_n_s32): Remove.
25404 (__arm_vrshlq_m_s8): Remove.
25405 (__arm_vrshlq_m_s32): Remove.
25406 (__arm_vrshlq_m_s16): Remove.
25407 (__arm_vrshlq_m_u8): Remove.
25408 (__arm_vrshlq_m_u32): Remove.
25409 (__arm_vrshlq_m_u16): Remove.
25410 (__arm_vrshlq_x_s8): Remove.
25411 (__arm_vrshlq_x_s16): Remove.
25412 (__arm_vrshlq_x_s32): Remove.
25413 (__arm_vrshlq_x_u8): Remove.
25414 (__arm_vrshlq_x_u16): Remove.
25415 (__arm_vrshlq_x_u32): Remove.
25416 (__arm_vrshlq): Remove.
25417 (__arm_vrshlq_m_n): Remove.
25418 (__arm_vrshlq_m): Remove.
25419 (__arm_vrshlq_x): Remove.
25421 (vqrshlq_m_n): Remove.
25422 (vqrshlq_m): Remove.
25423 (vqrshlq_u8): Remove.
25424 (vqrshlq_n_u8): Remove.
25425 (vqrshlq_s8): Remove.
25426 (vqrshlq_n_s8): Remove.
25427 (vqrshlq_u16): Remove.
25428 (vqrshlq_n_u16): Remove.
25429 (vqrshlq_s16): Remove.
25430 (vqrshlq_n_s16): Remove.
25431 (vqrshlq_u32): Remove.
25432 (vqrshlq_n_u32): Remove.
25433 (vqrshlq_s32): Remove.
25434 (vqrshlq_n_s32): Remove.
25435 (vqrshlq_m_n_u8): Remove.
25436 (vqrshlq_m_n_s8): Remove.
25437 (vqrshlq_m_n_u16): Remove.
25438 (vqrshlq_m_n_s16): Remove.
25439 (vqrshlq_m_n_u32): Remove.
25440 (vqrshlq_m_n_s32): Remove.
25441 (vqrshlq_m_s8): Remove.
25442 (vqrshlq_m_s32): Remove.
25443 (vqrshlq_m_s16): Remove.
25444 (vqrshlq_m_u8): Remove.
25445 (vqrshlq_m_u32): Remove.
25446 (vqrshlq_m_u16): Remove.
25447 (__arm_vqrshlq_u8): Remove.
25448 (__arm_vqrshlq_n_u8): Remove.
25449 (__arm_vqrshlq_s8): Remove.
25450 (__arm_vqrshlq_n_s8): Remove.
25451 (__arm_vqrshlq_u16): Remove.
25452 (__arm_vqrshlq_n_u16): Remove.
25453 (__arm_vqrshlq_s16): Remove.
25454 (__arm_vqrshlq_n_s16): Remove.
25455 (__arm_vqrshlq_u32): Remove.
25456 (__arm_vqrshlq_n_u32): Remove.
25457 (__arm_vqrshlq_s32): Remove.
25458 (__arm_vqrshlq_n_s32): Remove.
25459 (__arm_vqrshlq_m_n_u8): Remove.
25460 (__arm_vqrshlq_m_n_s8): Remove.
25461 (__arm_vqrshlq_m_n_u16): Remove.
25462 (__arm_vqrshlq_m_n_s16): Remove.
25463 (__arm_vqrshlq_m_n_u32): Remove.
25464 (__arm_vqrshlq_m_n_s32): Remove.
25465 (__arm_vqrshlq_m_s8): Remove.
25466 (__arm_vqrshlq_m_s32): Remove.
25467 (__arm_vqrshlq_m_s16): Remove.
25468 (__arm_vqrshlq_m_u8): Remove.
25469 (__arm_vqrshlq_m_u32): Remove.
25470 (__arm_vqrshlq_m_u16): Remove.
25471 (__arm_vqrshlq): Remove.
25472 (__arm_vqrshlq_m_n): Remove.
25473 (__arm_vqrshlq_m): Remove.
25475 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25477 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
25478 (mve_insn): Add vqrshl, vrshl.
25479 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
25480 (mve_vrshlq_n_<supf><mode>): Merge into ...
25481 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25482 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
25484 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25486 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
25488 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
25489 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
25491 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25494 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
25495 denegrate PHI optmization.
25497 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
25499 * config/i386/predicates.md (register_no_SP_operand):
25500 Rename from index_register_operand.
25501 (call_register_operand): Update for rename.
25502 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
25504 2023-05-05 Tamar Christina <tamar.christina@arm.com>
25507 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
25508 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
25509 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
25510 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
25511 (s-match): Split into s-generic-match and s-gimple-match.
25512 * configure.ac (with-matchpd-partitions,
25513 DEFAULT_MATCHPD_PARTITIONS): New.
25514 * configure: Regenerate.
25516 2023-05-05 Tamar Christina <tamar.christina@arm.com>
25519 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
25520 (decision_tree::gen): Accept list of files instead of single and update
25521 to write function definition to header and main file.
25522 (write_predicate): Likewise.
25523 (write_header): Emit pragmas and new includes.
25524 (main): Create file buffers and cleanup.
25525 (showUsage, write_header_includes): New.
25527 2023-05-05 Tamar Christina <tamar.christina@arm.com>
25530 * Makefile.in (OBJS): Add gimple-match-exports.o.
25531 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
25532 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
25533 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
25534 gimple_resimplify5, constant_for_folding, convert_conditional_op,
25535 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
25536 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
25537 do_valueize, try_conditional_simplification, gimple_extract,
25538 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
25539 commutative_ternary_op_p, first_commutative_argument,
25540 associative_binary_op_p, directly_supported_p,
25541 get_conditional_internal_fn): Moved to gimple-match-exports.cc
25542 * gimple-match-exports.cc: New file.
25544 2023-05-05 Tamar Christina <tamar.christina@arm.com>
25547 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
25549 (dt_simplify::gen_1): Use it.
25551 2023-05-05 Tamar Christina <tamar.christina@arm.com>
25554 * genmatch.cc (output_line_directive): Only emit commented directive
25557 2023-05-05 Tamar Christina <tamar.christina@arm.com>
25560 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
25562 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
25564 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
25565 unused in_mode/in_n variables.
25567 2023-05-05 Richard Biener <rguenther@suse.de>
25569 PR tree-optimization/109735
25570 * tree-vect-stmts.cc (vectorizable_operation): Perform
25571 conversion for POINTER_DIFF_EXPR unconditionally.
25573 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
25575 * config/i386/mmx.md (mulv2si3): New expander.
25576 (*mulv2si3): New insn pattern.
25578 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
25579 Thomas Schwinge <thomas@codesourcery.com>
25582 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
25583 alongside reverse-offload function table to prevent NULL values
25584 of the function addresses.
25586 2023-05-05 Jakub Jelinek <jakub@redhat.com>
25588 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
25590 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
25592 2023-05-05 Andrew Pinski <apinski@marvell.com>
25594 PR tree-optimization/109732
25595 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
25596 of the argtrue/argfalse.
25598 2023-05-05 Andrew Pinski <apinski@marvell.com>
25600 PR tree-optimization/109722
25601 * match.pd: Extend the `ABS<a> == 0` pattern
25602 to cover `ABSU<a> == 0` too.
25604 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
25607 * config/i386/predicates.md (index_reg_operand): New predicate.
25608 * config/i386/i386.md (ashift to lea spliter): Use
25609 general_reg_operand and index_reg_operand predicates.
25611 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25613 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
25614 Rename and reimplement with RTL codes to...
25615 (aarch64_<optab>hn2<mode>_insn_le): .. This.
25616 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
25617 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
25619 (aarch64_<optab>hn2<mode>_insn_be): ... This.
25620 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
25621 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
25622 (aarch64_<optab>hn2<mode>): ... This.
25623 (aarch64_r<optab>hn2<mode>): New expander.
25624 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
25625 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
25626 (ADDSUBHN): Delete.
25627 (sur): Remove handling of the above.
25628 (addsub): Likewise.
25630 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25632 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
25634 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
25635 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
25636 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
25637 (aarch64_<sur><addsub>hn<mode>): Delete.
25638 (aarch64_<optab>hn<mode>): New define_expand.
25639 (aarch64_r<optab>hn<mode>): Likewise.
25640 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
25643 2023-05-04 Andrew Pinski <apinski@marvell.com>
25645 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
25646 diamond form bb with forwarder only empty blocks better.
25648 2023-05-04 Andrew Pinski <apinski@marvell.com>
25650 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
25651 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
25652 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
25653 of an inline version of it.
25654 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
25655 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
25657 2023-05-04 Andrew Pinski <apinski@marvell.com>
25659 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
25660 the default argument value for dce_ssa_names to nullptr.
25661 Check to make sure dce_ssa_names is a non-nullptr before
25662 calling simple_dce_from_worklist.
25664 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
25666 * config/i386/predicates.md (index_register_operand): Reject
25667 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
25668 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
25669 (call_register_no_elim_operand): Rewrite as ...
25670 (call_register_operand): ... this.
25671 (call_insn_operand): Use call_register_operand predicate.
25673 2023-05-04 Richard Biener <rguenther@suse.de>
25675 PR tree-optimization/109721
25676 * tree-vect-stmts.cc (vectorizable_operation): Make sure
25677 to test word_mode for all !target_support_p operations.
25679 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25682 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
25683 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
25684 (aarch64_mla<mode>): Rename to...
25685 (aarch64_mla<mode><vczle><vczbe>): ... This.
25686 (*aarch64_mla_elt<mode>): Rename to...
25687 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
25688 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
25689 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25690 (aarch64_mla_n<mode>): Rename to...
25691 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
25692 (aarch64_mls<mode>): Rename to...
25693 (aarch64_mls<mode><vczle><vczbe>): ... This.
25694 (*aarch64_mls_elt<mode>): Rename to...
25695 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
25696 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
25697 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25698 (aarch64_mls_n<mode>): Rename to...
25699 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
25700 (fma<mode>4): Rename to...
25701 (fma<mode>4<vczle><vczbe>): ... This.
25702 (*aarch64_fma4_elt<mode>): Rename to...
25703 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
25704 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
25705 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25706 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
25707 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
25708 (fnma<mode>4): Rename to...
25709 (fnma<mode>4<vczle><vczbe>): ... This.
25710 (*aarch64_fnma4_elt<mode>): Rename to...
25711 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
25712 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
25713 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25714 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
25715 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
25716 (aarch64_simd_bsl<mode>_internal): Rename to...
25717 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
25718 (*aarch64_simd_bsl<mode>_alt): Rename to...
25719 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
25721 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25724 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
25725 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
25726 (fabd<mode>3): Rename to...
25727 (fabd<mode>3<vczle><vczbe>): ... This.
25728 (aarch64_<optab>p<mode>): Rename to...
25729 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
25730 (aarch64_faddp<mode>): Rename to...
25731 (aarch64_faddp<mode><vczle><vczbe>): ... This.
25733 2023-05-04 Martin Liska <mliska@suse.cz>
25735 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
25736 (print_version): Use it.
25737 (generate_results): Likewise.
25739 2023-05-04 Richard Biener <rguenther@suse.de>
25741 * tree-cfg.h (last_stmt): Rename to ...
25742 (last_nondebug_stmt): ... this.
25743 * tree-cfg.cc (last_stmt): Rename to ...
25744 (last_nondebug_stmt): ... this.
25745 (assign_discriminators): Adjust.
25746 (group_case_labels_stmt): Likewise.
25747 (gimple_can_duplicate_bb_p): Likewise.
25748 (execute_fixup_cfg): Likewise.
25749 * auto-profile.cc (afdo_propagate_circuit): Likewise.
25750 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
25751 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
25752 (determine_parallel_type): Likewise.
25753 (adjust_context_and_scope): Likewise.
25754 (expand_task_call): Likewise.
25755 (remove_exit_barrier): Likewise.
25756 (expand_omp_taskreg): Likewise.
25757 (expand_omp_for_init_counts): Likewise.
25758 (expand_omp_for_init_vars): Likewise.
25759 (expand_omp_for_static_chunk): Likewise.
25760 (expand_omp_simd): Likewise.
25761 (expand_oacc_for): Likewise.
25762 (expand_omp_for): Likewise.
25763 (expand_omp_sections): Likewise.
25764 (expand_omp_atomic_fetch_op): Likewise.
25765 (expand_omp_atomic_cas): Likewise.
25766 (expand_omp_atomic): Likewise.
25767 (expand_omp_target): Likewise.
25768 (expand_omp): Likewise.
25769 (omp_make_gimple_edges): Likewise.
25770 * trans-mem.cc (tm_region_init): Likewise.
25771 * tree-inline.cc (redirect_all_calls): Likewise.
25772 * tree-parloops.cc (gen_parallel_loop): Likewise.
25773 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
25774 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
25776 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
25777 (may_eliminate_iv): Likewise.
25778 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
25779 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
25781 (estimate_numbers_of_iterations): Likewise.
25782 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
25783 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
25784 (set_predicates_for_bb): Likewise.
25785 (init_loop_unswitch_info): Likewise.
25786 (hoist_guard): Likewise.
25787 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
25788 (minmax_replacement): Likewise.
25789 * tree-ssa-reassoc.cc (update_range_test): Likewise.
25790 (optimize_range_tests_to_bit_test): Likewise.
25791 (optimize_range_tests_var_bound): Likewise.
25792 (optimize_range_tests): Likewise.
25793 (no_side_effect_bb): Likewise.
25794 (suitable_cond_bb): Likewise.
25795 (maybe_optimize_range_tests): Likewise.
25796 (reassociate_bb): Likewise.
25797 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
25799 2023-05-04 Jakub Jelinek <jakub@redhat.com>
25802 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
25803 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
25804 for it only if it still has TImode. Don't decide whether to call
25805 fix_debug_reg_uses based on whether SRC is ever set or not.
25807 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
25809 * config/cris/cris.cc (cris_split_constant): New function.
25810 * config/cris/cris.md (splitop): New iterator.
25811 (opsplit1): New define_peephole2.
25812 * config/cris/cris-protos.h (cris_split_constant): Declare.
25813 (cris_splittable_constant_p): New macro.
25815 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
25817 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
25820 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
25822 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
25823 lra_in_progress, not reload_in_progress.
25824 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
25825 * config/cris/constraints.md ("Q"): Ditto.
25827 2023-05-03 Andrew Pinski <apinski@marvell.com>
25829 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
25830 stats on removed number of statements and phis.
25832 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
25834 PR tree-optimization/109711
25835 * value-range.cc (irange::verify_range): Allow types of
25838 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
25841 * calls.cc (can_implement_as_sibling_call_p): Reject calls
25842 to __sanitizer_cov_trace_pc.
25844 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
25847 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
25848 a new ABI break parameter for GCC 14. Set it to the alignment
25849 of enums that have an underlying type. Take the true alignment
25850 of such enums from the TYPE_ALIGN of the underlying type's
25852 (aarch64_function_arg_boundary): Update accordingly.
25853 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
25854 Warn about ABI differences.
25856 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
25859 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
25860 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
25861 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
25862 (aarch64_gimplify_va_arg_expr): Likewise.
25864 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25866 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
25867 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
25868 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
25870 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
25871 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
25872 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
25873 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
25874 * config/arm/arm_mve.h (vhsubq): Remove.
25876 (vhaddq_m): Remove.
25877 (vhsubq_m): Remove.
25878 (vhaddq_x): Remove.
25879 (vhsubq_x): Remove.
25880 (vhsubq_u8): Remove.
25881 (vhsubq_n_u8): Remove.
25882 (vhaddq_u8): Remove.
25883 (vhaddq_n_u8): Remove.
25884 (vhsubq_s8): Remove.
25885 (vhsubq_n_s8): Remove.
25886 (vhaddq_s8): Remove.
25887 (vhaddq_n_s8): Remove.
25888 (vhsubq_u16): Remove.
25889 (vhsubq_n_u16): Remove.
25890 (vhaddq_u16): Remove.
25891 (vhaddq_n_u16): Remove.
25892 (vhsubq_s16): Remove.
25893 (vhsubq_n_s16): Remove.
25894 (vhaddq_s16): Remove.
25895 (vhaddq_n_s16): Remove.
25896 (vhsubq_u32): Remove.
25897 (vhsubq_n_u32): Remove.
25898 (vhaddq_u32): Remove.
25899 (vhaddq_n_u32): Remove.
25900 (vhsubq_s32): Remove.
25901 (vhsubq_n_s32): Remove.
25902 (vhaddq_s32): Remove.
25903 (vhaddq_n_s32): Remove.
25904 (vhaddq_m_n_s8): Remove.
25905 (vhaddq_m_n_s32): Remove.
25906 (vhaddq_m_n_s16): Remove.
25907 (vhaddq_m_n_u8): Remove.
25908 (vhaddq_m_n_u32): Remove.
25909 (vhaddq_m_n_u16): Remove.
25910 (vhaddq_m_s8): Remove.
25911 (vhaddq_m_s32): Remove.
25912 (vhaddq_m_s16): Remove.
25913 (vhaddq_m_u8): Remove.
25914 (vhaddq_m_u32): Remove.
25915 (vhaddq_m_u16): Remove.
25916 (vhsubq_m_n_s8): Remove.
25917 (vhsubq_m_n_s32): Remove.
25918 (vhsubq_m_n_s16): Remove.
25919 (vhsubq_m_n_u8): Remove.
25920 (vhsubq_m_n_u32): Remove.
25921 (vhsubq_m_n_u16): Remove.
25922 (vhsubq_m_s8): Remove.
25923 (vhsubq_m_s32): Remove.
25924 (vhsubq_m_s16): Remove.
25925 (vhsubq_m_u8): Remove.
25926 (vhsubq_m_u32): Remove.
25927 (vhsubq_m_u16): Remove.
25928 (vhaddq_x_n_s8): Remove.
25929 (vhaddq_x_n_s16): Remove.
25930 (vhaddq_x_n_s32): Remove.
25931 (vhaddq_x_n_u8): Remove.
25932 (vhaddq_x_n_u16): Remove.
25933 (vhaddq_x_n_u32): Remove.
25934 (vhaddq_x_s8): Remove.
25935 (vhaddq_x_s16): Remove.
25936 (vhaddq_x_s32): Remove.
25937 (vhaddq_x_u8): Remove.
25938 (vhaddq_x_u16): Remove.
25939 (vhaddq_x_u32): Remove.
25940 (vhsubq_x_n_s8): Remove.
25941 (vhsubq_x_n_s16): Remove.
25942 (vhsubq_x_n_s32): Remove.
25943 (vhsubq_x_n_u8): Remove.
25944 (vhsubq_x_n_u16): Remove.
25945 (vhsubq_x_n_u32): Remove.
25946 (vhsubq_x_s8): Remove.
25947 (vhsubq_x_s16): Remove.
25948 (vhsubq_x_s32): Remove.
25949 (vhsubq_x_u8): Remove.
25950 (vhsubq_x_u16): Remove.
25951 (vhsubq_x_u32): Remove.
25952 (__arm_vhsubq_u8): Remove.
25953 (__arm_vhsubq_n_u8): Remove.
25954 (__arm_vhaddq_u8): Remove.
25955 (__arm_vhaddq_n_u8): Remove.
25956 (__arm_vhsubq_s8): Remove.
25957 (__arm_vhsubq_n_s8): Remove.
25958 (__arm_vhaddq_s8): Remove.
25959 (__arm_vhaddq_n_s8): Remove.
25960 (__arm_vhsubq_u16): Remove.
25961 (__arm_vhsubq_n_u16): Remove.
25962 (__arm_vhaddq_u16): Remove.
25963 (__arm_vhaddq_n_u16): Remove.
25964 (__arm_vhsubq_s16): Remove.
25965 (__arm_vhsubq_n_s16): Remove.
25966 (__arm_vhaddq_s16): Remove.
25967 (__arm_vhaddq_n_s16): Remove.
25968 (__arm_vhsubq_u32): Remove.
25969 (__arm_vhsubq_n_u32): Remove.
25970 (__arm_vhaddq_u32): Remove.
25971 (__arm_vhaddq_n_u32): Remove.
25972 (__arm_vhsubq_s32): Remove.
25973 (__arm_vhsubq_n_s32): Remove.
25974 (__arm_vhaddq_s32): Remove.
25975 (__arm_vhaddq_n_s32): Remove.
25976 (__arm_vhaddq_m_n_s8): Remove.
25977 (__arm_vhaddq_m_n_s32): Remove.
25978 (__arm_vhaddq_m_n_s16): Remove.
25979 (__arm_vhaddq_m_n_u8): Remove.
25980 (__arm_vhaddq_m_n_u32): Remove.
25981 (__arm_vhaddq_m_n_u16): Remove.
25982 (__arm_vhaddq_m_s8): Remove.
25983 (__arm_vhaddq_m_s32): Remove.
25984 (__arm_vhaddq_m_s16): Remove.
25985 (__arm_vhaddq_m_u8): Remove.
25986 (__arm_vhaddq_m_u32): Remove.
25987 (__arm_vhaddq_m_u16): Remove.
25988 (__arm_vhsubq_m_n_s8): Remove.
25989 (__arm_vhsubq_m_n_s32): Remove.
25990 (__arm_vhsubq_m_n_s16): Remove.
25991 (__arm_vhsubq_m_n_u8): Remove.
25992 (__arm_vhsubq_m_n_u32): Remove.
25993 (__arm_vhsubq_m_n_u16): Remove.
25994 (__arm_vhsubq_m_s8): Remove.
25995 (__arm_vhsubq_m_s32): Remove.
25996 (__arm_vhsubq_m_s16): Remove.
25997 (__arm_vhsubq_m_u8): Remove.
25998 (__arm_vhsubq_m_u32): Remove.
25999 (__arm_vhsubq_m_u16): Remove.
26000 (__arm_vhaddq_x_n_s8): Remove.
26001 (__arm_vhaddq_x_n_s16): Remove.
26002 (__arm_vhaddq_x_n_s32): Remove.
26003 (__arm_vhaddq_x_n_u8): Remove.
26004 (__arm_vhaddq_x_n_u16): Remove.
26005 (__arm_vhaddq_x_n_u32): Remove.
26006 (__arm_vhaddq_x_s8): Remove.
26007 (__arm_vhaddq_x_s16): Remove.
26008 (__arm_vhaddq_x_s32): Remove.
26009 (__arm_vhaddq_x_u8): Remove.
26010 (__arm_vhaddq_x_u16): Remove.
26011 (__arm_vhaddq_x_u32): Remove.
26012 (__arm_vhsubq_x_n_s8): Remove.
26013 (__arm_vhsubq_x_n_s16): Remove.
26014 (__arm_vhsubq_x_n_s32): Remove.
26015 (__arm_vhsubq_x_n_u8): Remove.
26016 (__arm_vhsubq_x_n_u16): Remove.
26017 (__arm_vhsubq_x_n_u32): Remove.
26018 (__arm_vhsubq_x_s8): Remove.
26019 (__arm_vhsubq_x_s16): Remove.
26020 (__arm_vhsubq_x_s32): Remove.
26021 (__arm_vhsubq_x_u8): Remove.
26022 (__arm_vhsubq_x_u16): Remove.
26023 (__arm_vhsubq_x_u32): Remove.
26024 (__arm_vhsubq): Remove.
26025 (__arm_vhaddq): Remove.
26026 (__arm_vhaddq_m): Remove.
26027 (__arm_vhsubq_m): Remove.
26028 (__arm_vhaddq_x): Remove.
26029 (__arm_vhsubq_x): Remove.
26031 (vmulhq_m): Remove.
26032 (vmulhq_x): Remove.
26033 (vmulhq_u8): Remove.
26034 (vmulhq_s8): Remove.
26035 (vmulhq_u16): Remove.
26036 (vmulhq_s16): Remove.
26037 (vmulhq_u32): Remove.
26038 (vmulhq_s32): Remove.
26039 (vmulhq_m_s8): Remove.
26040 (vmulhq_m_s32): Remove.
26041 (vmulhq_m_s16): Remove.
26042 (vmulhq_m_u8): Remove.
26043 (vmulhq_m_u32): Remove.
26044 (vmulhq_m_u16): Remove.
26045 (vmulhq_x_s8): Remove.
26046 (vmulhq_x_s16): Remove.
26047 (vmulhq_x_s32): Remove.
26048 (vmulhq_x_u8): Remove.
26049 (vmulhq_x_u16): Remove.
26050 (vmulhq_x_u32): Remove.
26051 (__arm_vmulhq_u8): Remove.
26052 (__arm_vmulhq_s8): Remove.
26053 (__arm_vmulhq_u16): Remove.
26054 (__arm_vmulhq_s16): Remove.
26055 (__arm_vmulhq_u32): Remove.
26056 (__arm_vmulhq_s32): Remove.
26057 (__arm_vmulhq_m_s8): Remove.
26058 (__arm_vmulhq_m_s32): Remove.
26059 (__arm_vmulhq_m_s16): Remove.
26060 (__arm_vmulhq_m_u8): Remove.
26061 (__arm_vmulhq_m_u32): Remove.
26062 (__arm_vmulhq_m_u16): Remove.
26063 (__arm_vmulhq_x_s8): Remove.
26064 (__arm_vmulhq_x_s16): Remove.
26065 (__arm_vmulhq_x_s32): Remove.
26066 (__arm_vmulhq_x_u8): Remove.
26067 (__arm_vmulhq_x_u16): Remove.
26068 (__arm_vmulhq_x_u32): Remove.
26069 (__arm_vmulhq): Remove.
26070 (__arm_vmulhq_m): Remove.
26071 (__arm_vmulhq_x): Remove.
26074 (vqaddq_m): Remove.
26075 (vqsubq_m): Remove.
26076 (vqsubq_u8): Remove.
26077 (vqsubq_n_u8): Remove.
26078 (vqaddq_u8): Remove.
26079 (vqaddq_n_u8): Remove.
26080 (vqsubq_s8): Remove.
26081 (vqsubq_n_s8): Remove.
26082 (vqaddq_s8): Remove.
26083 (vqaddq_n_s8): Remove.
26084 (vqsubq_u16): Remove.
26085 (vqsubq_n_u16): Remove.
26086 (vqaddq_u16): Remove.
26087 (vqaddq_n_u16): Remove.
26088 (vqsubq_s16): Remove.
26089 (vqsubq_n_s16): Remove.
26090 (vqaddq_s16): Remove.
26091 (vqaddq_n_s16): Remove.
26092 (vqsubq_u32): Remove.
26093 (vqsubq_n_u32): Remove.
26094 (vqaddq_u32): Remove.
26095 (vqaddq_n_u32): Remove.
26096 (vqsubq_s32): Remove.
26097 (vqsubq_n_s32): Remove.
26098 (vqaddq_s32): Remove.
26099 (vqaddq_n_s32): Remove.
26100 (vqaddq_m_n_s8): Remove.
26101 (vqaddq_m_n_s32): Remove.
26102 (vqaddq_m_n_s16): Remove.
26103 (vqaddq_m_n_u8): Remove.
26104 (vqaddq_m_n_u32): Remove.
26105 (vqaddq_m_n_u16): Remove.
26106 (vqaddq_m_s8): Remove.
26107 (vqaddq_m_s32): Remove.
26108 (vqaddq_m_s16): Remove.
26109 (vqaddq_m_u8): Remove.
26110 (vqaddq_m_u32): Remove.
26111 (vqaddq_m_u16): Remove.
26112 (vqsubq_m_n_s8): Remove.
26113 (vqsubq_m_n_s32): Remove.
26114 (vqsubq_m_n_s16): Remove.
26115 (vqsubq_m_n_u8): Remove.
26116 (vqsubq_m_n_u32): Remove.
26117 (vqsubq_m_n_u16): Remove.
26118 (vqsubq_m_s8): Remove.
26119 (vqsubq_m_s32): Remove.
26120 (vqsubq_m_s16): Remove.
26121 (vqsubq_m_u8): Remove.
26122 (vqsubq_m_u32): Remove.
26123 (vqsubq_m_u16): Remove.
26124 (__arm_vqsubq_u8): Remove.
26125 (__arm_vqsubq_n_u8): Remove.
26126 (__arm_vqaddq_u8): Remove.
26127 (__arm_vqaddq_n_u8): Remove.
26128 (__arm_vqsubq_s8): Remove.
26129 (__arm_vqsubq_n_s8): Remove.
26130 (__arm_vqaddq_s8): Remove.
26131 (__arm_vqaddq_n_s8): Remove.
26132 (__arm_vqsubq_u16): Remove.
26133 (__arm_vqsubq_n_u16): Remove.
26134 (__arm_vqaddq_u16): Remove.
26135 (__arm_vqaddq_n_u16): Remove.
26136 (__arm_vqsubq_s16): Remove.
26137 (__arm_vqsubq_n_s16): Remove.
26138 (__arm_vqaddq_s16): Remove.
26139 (__arm_vqaddq_n_s16): Remove.
26140 (__arm_vqsubq_u32): Remove.
26141 (__arm_vqsubq_n_u32): Remove.
26142 (__arm_vqaddq_u32): Remove.
26143 (__arm_vqaddq_n_u32): Remove.
26144 (__arm_vqsubq_s32): Remove.
26145 (__arm_vqsubq_n_s32): Remove.
26146 (__arm_vqaddq_s32): Remove.
26147 (__arm_vqaddq_n_s32): Remove.
26148 (__arm_vqaddq_m_n_s8): Remove.
26149 (__arm_vqaddq_m_n_s32): Remove.
26150 (__arm_vqaddq_m_n_s16): Remove.
26151 (__arm_vqaddq_m_n_u8): Remove.
26152 (__arm_vqaddq_m_n_u32): Remove.
26153 (__arm_vqaddq_m_n_u16): Remove.
26154 (__arm_vqaddq_m_s8): Remove.
26155 (__arm_vqaddq_m_s32): Remove.
26156 (__arm_vqaddq_m_s16): Remove.
26157 (__arm_vqaddq_m_u8): Remove.
26158 (__arm_vqaddq_m_u32): Remove.
26159 (__arm_vqaddq_m_u16): Remove.
26160 (__arm_vqsubq_m_n_s8): Remove.
26161 (__arm_vqsubq_m_n_s32): Remove.
26162 (__arm_vqsubq_m_n_s16): Remove.
26163 (__arm_vqsubq_m_n_u8): Remove.
26164 (__arm_vqsubq_m_n_u32): Remove.
26165 (__arm_vqsubq_m_n_u16): Remove.
26166 (__arm_vqsubq_m_s8): Remove.
26167 (__arm_vqsubq_m_s32): Remove.
26168 (__arm_vqsubq_m_s16): Remove.
26169 (__arm_vqsubq_m_u8): Remove.
26170 (__arm_vqsubq_m_u32): Remove.
26171 (__arm_vqsubq_m_u16): Remove.
26172 (__arm_vqsubq): Remove.
26173 (__arm_vqaddq): Remove.
26174 (__arm_vqaddq_m): Remove.
26175 (__arm_vqsubq_m): Remove.
26176 (vqdmulhq): Remove.
26177 (vqdmulhq_m): Remove.
26178 (vqdmulhq_s8): Remove.
26179 (vqdmulhq_n_s8): Remove.
26180 (vqdmulhq_s16): Remove.
26181 (vqdmulhq_n_s16): Remove.
26182 (vqdmulhq_s32): Remove.
26183 (vqdmulhq_n_s32): Remove.
26184 (vqdmulhq_m_n_s8): Remove.
26185 (vqdmulhq_m_n_s32): Remove.
26186 (vqdmulhq_m_n_s16): Remove.
26187 (vqdmulhq_m_s8): Remove.
26188 (vqdmulhq_m_s32): Remove.
26189 (vqdmulhq_m_s16): Remove.
26190 (__arm_vqdmulhq_s8): Remove.
26191 (__arm_vqdmulhq_n_s8): Remove.
26192 (__arm_vqdmulhq_s16): Remove.
26193 (__arm_vqdmulhq_n_s16): Remove.
26194 (__arm_vqdmulhq_s32): Remove.
26195 (__arm_vqdmulhq_n_s32): Remove.
26196 (__arm_vqdmulhq_m_n_s8): Remove.
26197 (__arm_vqdmulhq_m_n_s32): Remove.
26198 (__arm_vqdmulhq_m_n_s16): Remove.
26199 (__arm_vqdmulhq_m_s8): Remove.
26200 (__arm_vqdmulhq_m_s32): Remove.
26201 (__arm_vqdmulhq_m_s16): Remove.
26202 (__arm_vqdmulhq): Remove.
26203 (__arm_vqdmulhq_m): Remove.
26205 (vrhaddq_m): Remove.
26206 (vrhaddq_x): Remove.
26207 (vrhaddq_u8): Remove.
26208 (vrhaddq_s8): Remove.
26209 (vrhaddq_u16): Remove.
26210 (vrhaddq_s16): Remove.
26211 (vrhaddq_u32): Remove.
26212 (vrhaddq_s32): Remove.
26213 (vrhaddq_m_s8): Remove.
26214 (vrhaddq_m_s32): Remove.
26215 (vrhaddq_m_s16): Remove.
26216 (vrhaddq_m_u8): Remove.
26217 (vrhaddq_m_u32): Remove.
26218 (vrhaddq_m_u16): Remove.
26219 (vrhaddq_x_s8): Remove.
26220 (vrhaddq_x_s16): Remove.
26221 (vrhaddq_x_s32): Remove.
26222 (vrhaddq_x_u8): Remove.
26223 (vrhaddq_x_u16): Remove.
26224 (vrhaddq_x_u32): Remove.
26225 (__arm_vrhaddq_u8): Remove.
26226 (__arm_vrhaddq_s8): Remove.
26227 (__arm_vrhaddq_u16): Remove.
26228 (__arm_vrhaddq_s16): Remove.
26229 (__arm_vrhaddq_u32): Remove.
26230 (__arm_vrhaddq_s32): Remove.
26231 (__arm_vrhaddq_m_s8): Remove.
26232 (__arm_vrhaddq_m_s32): Remove.
26233 (__arm_vrhaddq_m_s16): Remove.
26234 (__arm_vrhaddq_m_u8): Remove.
26235 (__arm_vrhaddq_m_u32): Remove.
26236 (__arm_vrhaddq_m_u16): Remove.
26237 (__arm_vrhaddq_x_s8): Remove.
26238 (__arm_vrhaddq_x_s16): Remove.
26239 (__arm_vrhaddq_x_s32): Remove.
26240 (__arm_vrhaddq_x_u8): Remove.
26241 (__arm_vrhaddq_x_u16): Remove.
26242 (__arm_vrhaddq_x_u32): Remove.
26243 (__arm_vrhaddq): Remove.
26244 (__arm_vrhaddq_m): Remove.
26245 (__arm_vrhaddq_x): Remove.
26247 (vrmulhq_m): Remove.
26248 (vrmulhq_x): Remove.
26249 (vrmulhq_u8): Remove.
26250 (vrmulhq_s8): Remove.
26251 (vrmulhq_u16): Remove.
26252 (vrmulhq_s16): Remove.
26253 (vrmulhq_u32): Remove.
26254 (vrmulhq_s32): Remove.
26255 (vrmulhq_m_s8): Remove.
26256 (vrmulhq_m_s32): Remove.
26257 (vrmulhq_m_s16): Remove.
26258 (vrmulhq_m_u8): Remove.
26259 (vrmulhq_m_u32): Remove.
26260 (vrmulhq_m_u16): Remove.
26261 (vrmulhq_x_s8): Remove.
26262 (vrmulhq_x_s16): Remove.
26263 (vrmulhq_x_s32): Remove.
26264 (vrmulhq_x_u8): Remove.
26265 (vrmulhq_x_u16): Remove.
26266 (vrmulhq_x_u32): Remove.
26267 (__arm_vrmulhq_u8): Remove.
26268 (__arm_vrmulhq_s8): Remove.
26269 (__arm_vrmulhq_u16): Remove.
26270 (__arm_vrmulhq_s16): Remove.
26271 (__arm_vrmulhq_u32): Remove.
26272 (__arm_vrmulhq_s32): Remove.
26273 (__arm_vrmulhq_m_s8): Remove.
26274 (__arm_vrmulhq_m_s32): Remove.
26275 (__arm_vrmulhq_m_s16): Remove.
26276 (__arm_vrmulhq_m_u8): Remove.
26277 (__arm_vrmulhq_m_u32): Remove.
26278 (__arm_vrmulhq_m_u16): Remove.
26279 (__arm_vrmulhq_x_s8): Remove.
26280 (__arm_vrmulhq_x_s16): Remove.
26281 (__arm_vrmulhq_x_s32): Remove.
26282 (__arm_vrmulhq_x_u8): Remove.
26283 (__arm_vrmulhq_x_u16): Remove.
26284 (__arm_vrmulhq_x_u32): Remove.
26285 (__arm_vrmulhq): Remove.
26286 (__arm_vrmulhq_m): Remove.
26287 (__arm_vrmulhq_x): Remove.
26289 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26291 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
26292 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
26293 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
26294 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
26295 * config/arm/mve.md (mve_vabdq_<supf><mode>)
26296 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
26297 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
26298 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
26299 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
26300 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
26301 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
26303 (@mve_<mve_insn>q_<supf><mode>): ... this.
26304 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
26305 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
26306 gen_mve_vhaddq / gen_mve_vrhaddq.
26308 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26310 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
26311 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
26312 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
26313 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
26314 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
26315 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
26316 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
26317 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
26318 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
26319 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
26320 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
26321 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
26322 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26324 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26326 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
26327 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
26329 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
26330 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
26331 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
26332 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
26333 (mve_vqsubq_n_<supf><mode>): Merge into ...
26334 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26336 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26338 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
26339 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
26340 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
26341 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
26342 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
26343 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
26344 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
26345 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
26346 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
26347 (mve_vshlq_m_<supf><mode>): Merged into
26348 @mve_<mve_insn>q_m_<supf><mode>.
26349 (mve_vabdq_m_<supf><mode>): Likewise.
26350 (mve_vhaddq_m_<supf><mode>): Likewise.
26351 (mve_vhsubq_m_<supf><mode>): Likewise.
26352 (mve_vmaxq_m_<supf><mode>): Likewise.
26353 (mve_vminq_m_<supf><mode>): Likewise.
26354 (mve_vmulhq_m_<supf><mode>): Likewise.
26355 (mve_vqaddq_m_<supf><mode>): Likewise.
26356 (mve_vqrshlq_m_<supf><mode>): Likewise.
26357 (mve_vqshlq_m_<supf><mode>): Likewise.
26358 (mve_vqsubq_m_<supf><mode>): Likewise.
26359 (mve_vrhaddq_m_<supf><mode>): Likewise.
26360 (mve_vrmulhq_m_<supf><mode>): Likewise.
26361 (mve_vrshlq_m_<supf><mode>): Likewise.
26362 (mve_vqdmladhq_m_s<mode>): Likewise.
26363 (mve_vqdmladhxq_m_s<mode>): Likewise.
26364 (mve_vqdmlsdhq_m_s<mode>): Likewise.
26365 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
26366 (mve_vqdmulhq_m_s<mode>): Likewise.
26367 (mve_vqrdmladhq_m_s<mode>): Likewise.
26368 (mve_vqrdmladhxq_m_s<mode>): Likewise.
26369 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
26370 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
26371 (mve_vqrdmulhq_m_s<mode>): Likewise.
26373 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26375 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
26376 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
26377 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
26378 * config/arm/arm_mve.h (vcreateq_f16): Remove.
26379 (vcreateq_f32): Remove.
26380 (vcreateq_u8): Remove.
26381 (vcreateq_u16): Remove.
26382 (vcreateq_u32): Remove.
26383 (vcreateq_u64): Remove.
26384 (vcreateq_s8): Remove.
26385 (vcreateq_s16): Remove.
26386 (vcreateq_s32): Remove.
26387 (vcreateq_s64): Remove.
26388 (__arm_vcreateq_u8): Remove.
26389 (__arm_vcreateq_u16): Remove.
26390 (__arm_vcreateq_u32): Remove.
26391 (__arm_vcreateq_u64): Remove.
26392 (__arm_vcreateq_s8): Remove.
26393 (__arm_vcreateq_s16): Remove.
26394 (__arm_vcreateq_s32): Remove.
26395 (__arm_vcreateq_s64): Remove.
26396 (__arm_vcreateq_f16): Remove.
26397 (__arm_vcreateq_f32): Remove.
26399 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26401 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
26402 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
26403 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
26404 (@mve_<mve_insn>q_f<mode>): ... this.
26405 (mve_vcreateq_<supf><mode>): Rename into ...
26406 (@mve_<mve_insn>q_<supf><mode>): ... this.
26408 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26410 * config/arm/arm-mve-builtins-shapes.cc (create): New.
26411 * config/arm/arm-mve-builtins-shapes.h: (create): New.
26413 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26415 * config/arm/arm-mve-builtins-functions.h (class
26416 unspec_mve_function_exact_insn): New.
26418 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26420 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
26422 * config/arm/arm-mve-builtins-base.def (vorrq): New.
26423 * config/arm/arm-mve-builtins-base.h (vorrq): New.
26424 * config/arm/arm-mve-builtins.cc
26425 (function_instance::has_inactive_argument): Handle vorrq.
26426 * config/arm/arm_mve.h (vorrq): Remove.
26427 (vorrq_m_n): Remove.
26430 (vorrq_u8): Remove.
26431 (vorrq_s8): Remove.
26432 (vorrq_u16): Remove.
26433 (vorrq_s16): Remove.
26434 (vorrq_u32): Remove.
26435 (vorrq_s32): Remove.
26436 (vorrq_n_u16): Remove.
26437 (vorrq_f16): Remove.
26438 (vorrq_n_s16): Remove.
26439 (vorrq_n_u32): Remove.
26440 (vorrq_f32): Remove.
26441 (vorrq_n_s32): Remove.
26442 (vorrq_m_n_s16): Remove.
26443 (vorrq_m_n_u16): Remove.
26444 (vorrq_m_n_s32): Remove.
26445 (vorrq_m_n_u32): Remove.
26446 (vorrq_m_s8): Remove.
26447 (vorrq_m_s32): Remove.
26448 (vorrq_m_s16): Remove.
26449 (vorrq_m_u8): Remove.
26450 (vorrq_m_u32): Remove.
26451 (vorrq_m_u16): Remove.
26452 (vorrq_m_f32): Remove.
26453 (vorrq_m_f16): Remove.
26454 (vorrq_x_s8): Remove.
26455 (vorrq_x_s16): Remove.
26456 (vorrq_x_s32): Remove.
26457 (vorrq_x_u8): Remove.
26458 (vorrq_x_u16): Remove.
26459 (vorrq_x_u32): Remove.
26460 (vorrq_x_f16): Remove.
26461 (vorrq_x_f32): Remove.
26462 (__arm_vorrq_u8): Remove.
26463 (__arm_vorrq_s8): Remove.
26464 (__arm_vorrq_u16): Remove.
26465 (__arm_vorrq_s16): Remove.
26466 (__arm_vorrq_u32): Remove.
26467 (__arm_vorrq_s32): Remove.
26468 (__arm_vorrq_n_u16): Remove.
26469 (__arm_vorrq_n_s16): Remove.
26470 (__arm_vorrq_n_u32): Remove.
26471 (__arm_vorrq_n_s32): Remove.
26472 (__arm_vorrq_m_n_s16): Remove.
26473 (__arm_vorrq_m_n_u16): Remove.
26474 (__arm_vorrq_m_n_s32): Remove.
26475 (__arm_vorrq_m_n_u32): Remove.
26476 (__arm_vorrq_m_s8): Remove.
26477 (__arm_vorrq_m_s32): Remove.
26478 (__arm_vorrq_m_s16): Remove.
26479 (__arm_vorrq_m_u8): Remove.
26480 (__arm_vorrq_m_u32): Remove.
26481 (__arm_vorrq_m_u16): Remove.
26482 (__arm_vorrq_x_s8): Remove.
26483 (__arm_vorrq_x_s16): Remove.
26484 (__arm_vorrq_x_s32): Remove.
26485 (__arm_vorrq_x_u8): Remove.
26486 (__arm_vorrq_x_u16): Remove.
26487 (__arm_vorrq_x_u32): Remove.
26488 (__arm_vorrq_f16): Remove.
26489 (__arm_vorrq_f32): Remove.
26490 (__arm_vorrq_m_f32): Remove.
26491 (__arm_vorrq_m_f16): Remove.
26492 (__arm_vorrq_x_f16): Remove.
26493 (__arm_vorrq_x_f32): Remove.
26494 (__arm_vorrq): Remove.
26495 (__arm_vorrq_m_n): Remove.
26496 (__arm_vorrq_m): Remove.
26497 (__arm_vorrq_x): Remove.
26499 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26501 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
26502 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
26503 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
26504 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
26506 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26508 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
26509 (vandq,veorq): New.
26510 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
26511 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
26512 * config/arm/arm_mve.h (vandq): Remove.
26515 (vandq_u8): Remove.
26516 (vandq_s8): Remove.
26517 (vandq_u16): Remove.
26518 (vandq_s16): Remove.
26519 (vandq_u32): Remove.
26520 (vandq_s32): Remove.
26521 (vandq_f16): Remove.
26522 (vandq_f32): Remove.
26523 (vandq_m_s8): Remove.
26524 (vandq_m_s32): Remove.
26525 (vandq_m_s16): Remove.
26526 (vandq_m_u8): Remove.
26527 (vandq_m_u32): Remove.
26528 (vandq_m_u16): Remove.
26529 (vandq_m_f32): Remove.
26530 (vandq_m_f16): Remove.
26531 (vandq_x_s8): Remove.
26532 (vandq_x_s16): Remove.
26533 (vandq_x_s32): Remove.
26534 (vandq_x_u8): Remove.
26535 (vandq_x_u16): Remove.
26536 (vandq_x_u32): Remove.
26537 (vandq_x_f16): Remove.
26538 (vandq_x_f32): Remove.
26539 (__arm_vandq_u8): Remove.
26540 (__arm_vandq_s8): Remove.
26541 (__arm_vandq_u16): Remove.
26542 (__arm_vandq_s16): Remove.
26543 (__arm_vandq_u32): Remove.
26544 (__arm_vandq_s32): Remove.
26545 (__arm_vandq_m_s8): Remove.
26546 (__arm_vandq_m_s32): Remove.
26547 (__arm_vandq_m_s16): Remove.
26548 (__arm_vandq_m_u8): Remove.
26549 (__arm_vandq_m_u32): Remove.
26550 (__arm_vandq_m_u16): Remove.
26551 (__arm_vandq_x_s8): Remove.
26552 (__arm_vandq_x_s16): Remove.
26553 (__arm_vandq_x_s32): Remove.
26554 (__arm_vandq_x_u8): Remove.
26555 (__arm_vandq_x_u16): Remove.
26556 (__arm_vandq_x_u32): Remove.
26557 (__arm_vandq_f16): Remove.
26558 (__arm_vandq_f32): Remove.
26559 (__arm_vandq_m_f32): Remove.
26560 (__arm_vandq_m_f16): Remove.
26561 (__arm_vandq_x_f16): Remove.
26562 (__arm_vandq_x_f32): Remove.
26563 (__arm_vandq): Remove.
26564 (__arm_vandq_m): Remove.
26565 (__arm_vandq_x): Remove.
26568 (veorq_u8): Remove.
26569 (veorq_s8): Remove.
26570 (veorq_u16): Remove.
26571 (veorq_s16): Remove.
26572 (veorq_u32): Remove.
26573 (veorq_s32): Remove.
26574 (veorq_f16): Remove.
26575 (veorq_f32): Remove.
26576 (veorq_m_s8): Remove.
26577 (veorq_m_s32): Remove.
26578 (veorq_m_s16): Remove.
26579 (veorq_m_u8): Remove.
26580 (veorq_m_u32): Remove.
26581 (veorq_m_u16): Remove.
26582 (veorq_m_f32): Remove.
26583 (veorq_m_f16): Remove.
26584 (veorq_x_s8): Remove.
26585 (veorq_x_s16): Remove.
26586 (veorq_x_s32): Remove.
26587 (veorq_x_u8): Remove.
26588 (veorq_x_u16): Remove.
26589 (veorq_x_u32): Remove.
26590 (veorq_x_f16): Remove.
26591 (veorq_x_f32): Remove.
26592 (__arm_veorq_u8): Remove.
26593 (__arm_veorq_s8): Remove.
26594 (__arm_veorq_u16): Remove.
26595 (__arm_veorq_s16): Remove.
26596 (__arm_veorq_u32): Remove.
26597 (__arm_veorq_s32): Remove.
26598 (__arm_veorq_m_s8): Remove.
26599 (__arm_veorq_m_s32): Remove.
26600 (__arm_veorq_m_s16): Remove.
26601 (__arm_veorq_m_u8): Remove.
26602 (__arm_veorq_m_u32): Remove.
26603 (__arm_veorq_m_u16): Remove.
26604 (__arm_veorq_x_s8): Remove.
26605 (__arm_veorq_x_s16): Remove.
26606 (__arm_veorq_x_s32): Remove.
26607 (__arm_veorq_x_u8): Remove.
26608 (__arm_veorq_x_u16): Remove.
26609 (__arm_veorq_x_u32): Remove.
26610 (__arm_veorq_f16): Remove.
26611 (__arm_veorq_f32): Remove.
26612 (__arm_veorq_m_f32): Remove.
26613 (__arm_veorq_m_f16): Remove.
26614 (__arm_veorq_x_f16): Remove.
26615 (__arm_veorq_x_f32): Remove.
26616 (__arm_veorq): Remove.
26617 (__arm_veorq_m): Remove.
26618 (__arm_veorq_x): Remove.
26620 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26622 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
26623 (MVE_FP_M_BINARY_LOGIC): New.
26624 (MVE_INT_M_N_BINARY_LOGIC): New.
26625 (MVE_INT_N_BINARY_LOGIC): New.
26626 (mve_insn): Add vand, veor, vorr, vbic.
26627 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
26628 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
26629 (mve_vbicq_m_<supf><mode>): Merge into ...
26630 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
26631 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
26632 (mve_vbicq_m_f<mode>): Merge into ...
26633 (@mve_<mve_insn>q_m_f<mode>): ... this.
26634 (mve_vorrq_n_<supf><mode>)
26635 (mve_vbicq_n_<supf><mode>): Merge into ...
26636 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26637 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
26639 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26641 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26643 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
26644 * config/arm/arm-mve-builtins-shapes.h (binary): New.
26646 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26648 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
26650 (vaddq, vmulq, vsubq): New.
26651 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
26652 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
26653 * config/arm/arm_mve.h (vaddq): Remove.
26656 (vaddq_n_u8): Remove.
26657 (vaddq_n_s8): Remove.
26658 (vaddq_n_u16): Remove.
26659 (vaddq_n_s16): Remove.
26660 (vaddq_n_u32): Remove.
26661 (vaddq_n_s32): Remove.
26662 (vaddq_n_f16): Remove.
26663 (vaddq_n_f32): Remove.
26664 (vaddq_m_n_s8): Remove.
26665 (vaddq_m_n_s32): Remove.
26666 (vaddq_m_n_s16): Remove.
26667 (vaddq_m_n_u8): Remove.
26668 (vaddq_m_n_u32): Remove.
26669 (vaddq_m_n_u16): Remove.
26670 (vaddq_m_s8): Remove.
26671 (vaddq_m_s32): Remove.
26672 (vaddq_m_s16): Remove.
26673 (vaddq_m_u8): Remove.
26674 (vaddq_m_u32): Remove.
26675 (vaddq_m_u16): Remove.
26676 (vaddq_m_f32): Remove.
26677 (vaddq_m_f16): Remove.
26678 (vaddq_m_n_f32): Remove.
26679 (vaddq_m_n_f16): Remove.
26680 (vaddq_s8): Remove.
26681 (vaddq_s16): Remove.
26682 (vaddq_s32): Remove.
26683 (vaddq_u8): Remove.
26684 (vaddq_u16): Remove.
26685 (vaddq_u32): Remove.
26686 (vaddq_f16): Remove.
26687 (vaddq_f32): Remove.
26688 (vaddq_x_s8): Remove.
26689 (vaddq_x_s16): Remove.
26690 (vaddq_x_s32): Remove.
26691 (vaddq_x_n_s8): Remove.
26692 (vaddq_x_n_s16): Remove.
26693 (vaddq_x_n_s32): Remove.
26694 (vaddq_x_u8): Remove.
26695 (vaddq_x_u16): Remove.
26696 (vaddq_x_u32): Remove.
26697 (vaddq_x_n_u8): Remove.
26698 (vaddq_x_n_u16): Remove.
26699 (vaddq_x_n_u32): Remove.
26700 (vaddq_x_f16): Remove.
26701 (vaddq_x_f32): Remove.
26702 (vaddq_x_n_f16): Remove.
26703 (vaddq_x_n_f32): Remove.
26704 (__arm_vaddq_n_u8): Remove.
26705 (__arm_vaddq_n_s8): Remove.
26706 (__arm_vaddq_n_u16): Remove.
26707 (__arm_vaddq_n_s16): Remove.
26708 (__arm_vaddq_n_u32): Remove.
26709 (__arm_vaddq_n_s32): Remove.
26710 (__arm_vaddq_m_n_s8): Remove.
26711 (__arm_vaddq_m_n_s32): Remove.
26712 (__arm_vaddq_m_n_s16): Remove.
26713 (__arm_vaddq_m_n_u8): Remove.
26714 (__arm_vaddq_m_n_u32): Remove.
26715 (__arm_vaddq_m_n_u16): Remove.
26716 (__arm_vaddq_m_s8): Remove.
26717 (__arm_vaddq_m_s32): Remove.
26718 (__arm_vaddq_m_s16): Remove.
26719 (__arm_vaddq_m_u8): Remove.
26720 (__arm_vaddq_m_u32): Remove.
26721 (__arm_vaddq_m_u16): Remove.
26722 (__arm_vaddq_s8): Remove.
26723 (__arm_vaddq_s16): Remove.
26724 (__arm_vaddq_s32): Remove.
26725 (__arm_vaddq_u8): Remove.
26726 (__arm_vaddq_u16): Remove.
26727 (__arm_vaddq_u32): Remove.
26728 (__arm_vaddq_x_s8): Remove.
26729 (__arm_vaddq_x_s16): Remove.
26730 (__arm_vaddq_x_s32): Remove.
26731 (__arm_vaddq_x_n_s8): Remove.
26732 (__arm_vaddq_x_n_s16): Remove.
26733 (__arm_vaddq_x_n_s32): Remove.
26734 (__arm_vaddq_x_u8): Remove.
26735 (__arm_vaddq_x_u16): Remove.
26736 (__arm_vaddq_x_u32): Remove.
26737 (__arm_vaddq_x_n_u8): Remove.
26738 (__arm_vaddq_x_n_u16): Remove.
26739 (__arm_vaddq_x_n_u32): Remove.
26740 (__arm_vaddq_n_f16): Remove.
26741 (__arm_vaddq_n_f32): Remove.
26742 (__arm_vaddq_m_f32): Remove.
26743 (__arm_vaddq_m_f16): Remove.
26744 (__arm_vaddq_m_n_f32): Remove.
26745 (__arm_vaddq_m_n_f16): Remove.
26746 (__arm_vaddq_f16): Remove.
26747 (__arm_vaddq_f32): Remove.
26748 (__arm_vaddq_x_f16): Remove.
26749 (__arm_vaddq_x_f32): Remove.
26750 (__arm_vaddq_x_n_f16): Remove.
26751 (__arm_vaddq_x_n_f32): Remove.
26752 (__arm_vaddq): Remove.
26753 (__arm_vaddq_m): Remove.
26754 (__arm_vaddq_x): Remove.
26758 (vmulq_u8): Remove.
26759 (vmulq_n_u8): Remove.
26760 (vmulq_s8): Remove.
26761 (vmulq_n_s8): Remove.
26762 (vmulq_u16): Remove.
26763 (vmulq_n_u16): Remove.
26764 (vmulq_s16): Remove.
26765 (vmulq_n_s16): Remove.
26766 (vmulq_u32): Remove.
26767 (vmulq_n_u32): Remove.
26768 (vmulq_s32): Remove.
26769 (vmulq_n_s32): Remove.
26770 (vmulq_n_f16): Remove.
26771 (vmulq_f16): Remove.
26772 (vmulq_n_f32): Remove.
26773 (vmulq_f32): Remove.
26774 (vmulq_m_n_s8): Remove.
26775 (vmulq_m_n_s32): Remove.
26776 (vmulq_m_n_s16): Remove.
26777 (vmulq_m_n_u8): Remove.
26778 (vmulq_m_n_u32): Remove.
26779 (vmulq_m_n_u16): Remove.
26780 (vmulq_m_s8): Remove.
26781 (vmulq_m_s32): Remove.
26782 (vmulq_m_s16): Remove.
26783 (vmulq_m_u8): Remove.
26784 (vmulq_m_u32): Remove.
26785 (vmulq_m_u16): Remove.
26786 (vmulq_m_f32): Remove.
26787 (vmulq_m_f16): Remove.
26788 (vmulq_m_n_f32): Remove.
26789 (vmulq_m_n_f16): Remove.
26790 (vmulq_x_s8): Remove.
26791 (vmulq_x_s16): Remove.
26792 (vmulq_x_s32): Remove.
26793 (vmulq_x_n_s8): Remove.
26794 (vmulq_x_n_s16): Remove.
26795 (vmulq_x_n_s32): Remove.
26796 (vmulq_x_u8): Remove.
26797 (vmulq_x_u16): Remove.
26798 (vmulq_x_u32): Remove.
26799 (vmulq_x_n_u8): Remove.
26800 (vmulq_x_n_u16): Remove.
26801 (vmulq_x_n_u32): Remove.
26802 (vmulq_x_f16): Remove.
26803 (vmulq_x_f32): Remove.
26804 (vmulq_x_n_f16): Remove.
26805 (vmulq_x_n_f32): Remove.
26806 (__arm_vmulq_u8): Remove.
26807 (__arm_vmulq_n_u8): Remove.
26808 (__arm_vmulq_s8): Remove.
26809 (__arm_vmulq_n_s8): Remove.
26810 (__arm_vmulq_u16): Remove.
26811 (__arm_vmulq_n_u16): Remove.
26812 (__arm_vmulq_s16): Remove.
26813 (__arm_vmulq_n_s16): Remove.
26814 (__arm_vmulq_u32): Remove.
26815 (__arm_vmulq_n_u32): Remove.
26816 (__arm_vmulq_s32): Remove.
26817 (__arm_vmulq_n_s32): Remove.
26818 (__arm_vmulq_m_n_s8): Remove.
26819 (__arm_vmulq_m_n_s32): Remove.
26820 (__arm_vmulq_m_n_s16): Remove.
26821 (__arm_vmulq_m_n_u8): Remove.
26822 (__arm_vmulq_m_n_u32): Remove.
26823 (__arm_vmulq_m_n_u16): Remove.
26824 (__arm_vmulq_m_s8): Remove.
26825 (__arm_vmulq_m_s32): Remove.
26826 (__arm_vmulq_m_s16): Remove.
26827 (__arm_vmulq_m_u8): Remove.
26828 (__arm_vmulq_m_u32): Remove.
26829 (__arm_vmulq_m_u16): Remove.
26830 (__arm_vmulq_x_s8): Remove.
26831 (__arm_vmulq_x_s16): Remove.
26832 (__arm_vmulq_x_s32): Remove.
26833 (__arm_vmulq_x_n_s8): Remove.
26834 (__arm_vmulq_x_n_s16): Remove.
26835 (__arm_vmulq_x_n_s32): Remove.
26836 (__arm_vmulq_x_u8): Remove.
26837 (__arm_vmulq_x_u16): Remove.
26838 (__arm_vmulq_x_u32): Remove.
26839 (__arm_vmulq_x_n_u8): Remove.
26840 (__arm_vmulq_x_n_u16): Remove.
26841 (__arm_vmulq_x_n_u32): Remove.
26842 (__arm_vmulq_n_f16): Remove.
26843 (__arm_vmulq_f16): Remove.
26844 (__arm_vmulq_n_f32): Remove.
26845 (__arm_vmulq_f32): Remove.
26846 (__arm_vmulq_m_f32): Remove.
26847 (__arm_vmulq_m_f16): Remove.
26848 (__arm_vmulq_m_n_f32): Remove.
26849 (__arm_vmulq_m_n_f16): Remove.
26850 (__arm_vmulq_x_f16): Remove.
26851 (__arm_vmulq_x_f32): Remove.
26852 (__arm_vmulq_x_n_f16): Remove.
26853 (__arm_vmulq_x_n_f32): Remove.
26854 (__arm_vmulq): Remove.
26855 (__arm_vmulq_m): Remove.
26856 (__arm_vmulq_x): Remove.
26860 (vsubq_n_f16): Remove.
26861 (vsubq_n_f32): Remove.
26862 (vsubq_u8): Remove.
26863 (vsubq_n_u8): Remove.
26864 (vsubq_s8): Remove.
26865 (vsubq_n_s8): Remove.
26866 (vsubq_u16): Remove.
26867 (vsubq_n_u16): Remove.
26868 (vsubq_s16): Remove.
26869 (vsubq_n_s16): Remove.
26870 (vsubq_u32): Remove.
26871 (vsubq_n_u32): Remove.
26872 (vsubq_s32): Remove.
26873 (vsubq_n_s32): Remove.
26874 (vsubq_f16): Remove.
26875 (vsubq_f32): Remove.
26876 (vsubq_m_s8): Remove.
26877 (vsubq_m_u8): Remove.
26878 (vsubq_m_s16): Remove.
26879 (vsubq_m_u16): Remove.
26880 (vsubq_m_s32): Remove.
26881 (vsubq_m_u32): Remove.
26882 (vsubq_m_n_s8): Remove.
26883 (vsubq_m_n_s32): Remove.
26884 (vsubq_m_n_s16): Remove.
26885 (vsubq_m_n_u8): Remove.
26886 (vsubq_m_n_u32): Remove.
26887 (vsubq_m_n_u16): Remove.
26888 (vsubq_m_f32): Remove.
26889 (vsubq_m_f16): Remove.
26890 (vsubq_m_n_f32): Remove.
26891 (vsubq_m_n_f16): Remove.
26892 (vsubq_x_s8): Remove.
26893 (vsubq_x_s16): Remove.
26894 (vsubq_x_s32): Remove.
26895 (vsubq_x_n_s8): Remove.
26896 (vsubq_x_n_s16): Remove.
26897 (vsubq_x_n_s32): Remove.
26898 (vsubq_x_u8): Remove.
26899 (vsubq_x_u16): Remove.
26900 (vsubq_x_u32): Remove.
26901 (vsubq_x_n_u8): Remove.
26902 (vsubq_x_n_u16): Remove.
26903 (vsubq_x_n_u32): Remove.
26904 (vsubq_x_f16): Remove.
26905 (vsubq_x_f32): Remove.
26906 (vsubq_x_n_f16): Remove.
26907 (vsubq_x_n_f32): Remove.
26908 (__arm_vsubq_u8): Remove.
26909 (__arm_vsubq_n_u8): Remove.
26910 (__arm_vsubq_s8): Remove.
26911 (__arm_vsubq_n_s8): Remove.
26912 (__arm_vsubq_u16): Remove.
26913 (__arm_vsubq_n_u16): Remove.
26914 (__arm_vsubq_s16): Remove.
26915 (__arm_vsubq_n_s16): Remove.
26916 (__arm_vsubq_u32): Remove.
26917 (__arm_vsubq_n_u32): Remove.
26918 (__arm_vsubq_s32): Remove.
26919 (__arm_vsubq_n_s32): Remove.
26920 (__arm_vsubq_m_s8): Remove.
26921 (__arm_vsubq_m_u8): Remove.
26922 (__arm_vsubq_m_s16): Remove.
26923 (__arm_vsubq_m_u16): Remove.
26924 (__arm_vsubq_m_s32): Remove.
26925 (__arm_vsubq_m_u32): Remove.
26926 (__arm_vsubq_m_n_s8): Remove.
26927 (__arm_vsubq_m_n_s32): Remove.
26928 (__arm_vsubq_m_n_s16): Remove.
26929 (__arm_vsubq_m_n_u8): Remove.
26930 (__arm_vsubq_m_n_u32): Remove.
26931 (__arm_vsubq_m_n_u16): Remove.
26932 (__arm_vsubq_x_s8): Remove.
26933 (__arm_vsubq_x_s16): Remove.
26934 (__arm_vsubq_x_s32): Remove.
26935 (__arm_vsubq_x_n_s8): Remove.
26936 (__arm_vsubq_x_n_s16): Remove.
26937 (__arm_vsubq_x_n_s32): Remove.
26938 (__arm_vsubq_x_u8): Remove.
26939 (__arm_vsubq_x_u16): Remove.
26940 (__arm_vsubq_x_u32): Remove.
26941 (__arm_vsubq_x_n_u8): Remove.
26942 (__arm_vsubq_x_n_u16): Remove.
26943 (__arm_vsubq_x_n_u32): Remove.
26944 (__arm_vsubq_n_f16): Remove.
26945 (__arm_vsubq_n_f32): Remove.
26946 (__arm_vsubq_f16): Remove.
26947 (__arm_vsubq_f32): Remove.
26948 (__arm_vsubq_m_f32): Remove.
26949 (__arm_vsubq_m_f16): Remove.
26950 (__arm_vsubq_m_n_f32): Remove.
26951 (__arm_vsubq_m_n_f16): Remove.
26952 (__arm_vsubq_x_f16): Remove.
26953 (__arm_vsubq_x_f32): Remove.
26954 (__arm_vsubq_x_n_f16): Remove.
26955 (__arm_vsubq_x_n_f32): Remove.
26956 (__arm_vsubq): Remove.
26957 (__arm_vsubq_m): Remove.
26958 (__arm_vsubq_x): Remove.
26959 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
26961 (vmulq_u, vmulq_s, vmulq_f): Remove.
26962 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
26963 (mve_vmulq_<supf><mode>): Remove.
26965 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26967 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
26968 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
26969 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
26971 * config/arm/mve.md
26972 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
26974 (@mve_<mve_insn>q_n_f<mode>): ... this.
26975 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
26976 (mve_vsubq_n_<supf><mode>): Factorize into ...
26977 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26978 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
26980 (mve_<mve_addsubmul>q<mode>): ... this.
26981 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
26983 (mve_<mve_addsubmul>q_f<mode>): ... this.
26984 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
26985 (mve_vsubq_m_<supf><mode>): Factorize into ...
26986 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
26987 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
26988 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
26989 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26990 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
26992 (@mve_<mve_insn>q_m_f<mode>): ... this.
26993 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
26994 (mve_vsubq_m_n_f<mode>): Factorize into ...
26995 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
26997 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26999 * config/arm/arm-mve-builtins-functions.h (class
27000 unspec_based_mve_function_base): New.
27001 (class unspec_based_mve_function_exact_insn): New.
27003 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
27005 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
27006 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
27008 2023-05-03 Murray Steele <murray.steele@arm.com>
27009 Christophe Lyon <christophe.lyon@arm.com>
27011 * config/arm/arm-mve-builtins-base.cc (class
27012 vuninitializedq_impl): New.
27013 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
27014 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
27016 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
27017 * config/arm/arm-mve-builtins-shapes.h (inherent): New
27019 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
27020 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
27021 (__arm_vuninitializedq_u8): Remove.
27022 (__arm_vuninitializedq_u16): Remove.
27023 (__arm_vuninitializedq_u32): Remove.
27024 (__arm_vuninitializedq_u64): Remove.
27025 (__arm_vuninitializedq_s8): Remove.
27026 (__arm_vuninitializedq_s16): Remove.
27027 (__arm_vuninitializedq_s32): Remove.
27028 (__arm_vuninitializedq_s64): Remove.
27029 (__arm_vuninitializedq_f16): Remove.
27030 (__arm_vuninitializedq_f32): Remove.
27032 2023-05-03 Murray Steele <murray.steele@arm.com>
27033 Christophe Lyon <christophe.lyon@arm.com>
27035 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
27036 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
27037 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
27038 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
27039 (parse_type): Likewise.
27040 (parse_signature): Likewise.
27041 (build_one): Likewise.
27042 (build_all): Likewise.
27043 (overloaded_base): New struct.
27044 (unary_convert_def): Likewise.
27045 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
27046 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
27048 (TYPES_reinterpret_unsigned1): Likewise.
27049 (TYPES_reinterpret_integer): Likewise.
27050 (TYPES_reinterpret_integer1): Likewise.
27051 (TYPES_reinterpret_float1): Likewise.
27052 (TYPES_reinterpret_float): Likewise.
27053 (reinterpret_integer): New.
27054 (reinterpret_float): New.
27055 (handle_arm_mve_h): Register builtins.
27056 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
27057 (vreinterpretq_s32): Likewise.
27058 (vreinterpretq_s64): Likewise.
27059 (vreinterpretq_s8): Likewise.
27060 (vreinterpretq_u16): Likewise.
27061 (vreinterpretq_u32): Likewise.
27062 (vreinterpretq_u64): Likewise.
27063 (vreinterpretq_u8): Likewise.
27064 (vreinterpretq_f16): Likewise.
27065 (vreinterpretq_f32): Likewise.
27066 (vreinterpretq_s16_s32): Likewise.
27067 (vreinterpretq_s16_s64): Likewise.
27068 (vreinterpretq_s16_s8): Likewise.
27069 (vreinterpretq_s16_u16): Likewise.
27070 (vreinterpretq_s16_u32): Likewise.
27071 (vreinterpretq_s16_u64): Likewise.
27072 (vreinterpretq_s16_u8): Likewise.
27073 (vreinterpretq_s32_s16): Likewise.
27074 (vreinterpretq_s32_s64): Likewise.
27075 (vreinterpretq_s32_s8): Likewise.
27076 (vreinterpretq_s32_u16): Likewise.
27077 (vreinterpretq_s32_u32): Likewise.
27078 (vreinterpretq_s32_u64): Likewise.
27079 (vreinterpretq_s32_u8): Likewise.
27080 (vreinterpretq_s64_s16): Likewise.
27081 (vreinterpretq_s64_s32): Likewise.
27082 (vreinterpretq_s64_s8): Likewise.
27083 (vreinterpretq_s64_u16): Likewise.
27084 (vreinterpretq_s64_u32): Likewise.
27085 (vreinterpretq_s64_u64): Likewise.
27086 (vreinterpretq_s64_u8): Likewise.
27087 (vreinterpretq_s8_s16): Likewise.
27088 (vreinterpretq_s8_s32): Likewise.
27089 (vreinterpretq_s8_s64): Likewise.
27090 (vreinterpretq_s8_u16): Likewise.
27091 (vreinterpretq_s8_u32): Likewise.
27092 (vreinterpretq_s8_u64): Likewise.
27093 (vreinterpretq_s8_u8): Likewise.
27094 (vreinterpretq_u16_s16): Likewise.
27095 (vreinterpretq_u16_s32): Likewise.
27096 (vreinterpretq_u16_s64): Likewise.
27097 (vreinterpretq_u16_s8): Likewise.
27098 (vreinterpretq_u16_u32): Likewise.
27099 (vreinterpretq_u16_u64): Likewise.
27100 (vreinterpretq_u16_u8): Likewise.
27101 (vreinterpretq_u32_s16): Likewise.
27102 (vreinterpretq_u32_s32): Likewise.
27103 (vreinterpretq_u32_s64): Likewise.
27104 (vreinterpretq_u32_s8): Likewise.
27105 (vreinterpretq_u32_u16): Likewise.
27106 (vreinterpretq_u32_u64): Likewise.
27107 (vreinterpretq_u32_u8): Likewise.
27108 (vreinterpretq_u64_s16): Likewise.
27109 (vreinterpretq_u64_s32): Likewise.
27110 (vreinterpretq_u64_s64): Likewise.
27111 (vreinterpretq_u64_s8): Likewise.
27112 (vreinterpretq_u64_u16): Likewise.
27113 (vreinterpretq_u64_u32): Likewise.
27114 (vreinterpretq_u64_u8): Likewise.
27115 (vreinterpretq_u8_s16): Likewise.
27116 (vreinterpretq_u8_s32): Likewise.
27117 (vreinterpretq_u8_s64): Likewise.
27118 (vreinterpretq_u8_s8): Likewise.
27119 (vreinterpretq_u8_u16): Likewise.
27120 (vreinterpretq_u8_u32): Likewise.
27121 (vreinterpretq_u8_u64): Likewise.
27122 (vreinterpretq_s32_f16): Likewise.
27123 (vreinterpretq_s32_f32): Likewise.
27124 (vreinterpretq_u16_f16): Likewise.
27125 (vreinterpretq_u16_f32): Likewise.
27126 (vreinterpretq_u32_f16): Likewise.
27127 (vreinterpretq_u32_f32): Likewise.
27128 (vreinterpretq_u64_f16): Likewise.
27129 (vreinterpretq_u64_f32): Likewise.
27130 (vreinterpretq_u8_f16): Likewise.
27131 (vreinterpretq_u8_f32): Likewise.
27132 (vreinterpretq_f16_f32): Likewise.
27133 (vreinterpretq_f16_s16): Likewise.
27134 (vreinterpretq_f16_s32): Likewise.
27135 (vreinterpretq_f16_s64): Likewise.
27136 (vreinterpretq_f16_s8): Likewise.
27137 (vreinterpretq_f16_u16): Likewise.
27138 (vreinterpretq_f16_u32): Likewise.
27139 (vreinterpretq_f16_u64): Likewise.
27140 (vreinterpretq_f16_u8): Likewise.
27141 (vreinterpretq_f32_f16): Likewise.
27142 (vreinterpretq_f32_s16): Likewise.
27143 (vreinterpretq_f32_s32): Likewise.
27144 (vreinterpretq_f32_s64): Likewise.
27145 (vreinterpretq_f32_s8): Likewise.
27146 (vreinterpretq_f32_u16): Likewise.
27147 (vreinterpretq_f32_u32): Likewise.
27148 (vreinterpretq_f32_u64): Likewise.
27149 (vreinterpretq_f32_u8): Likewise.
27150 (vreinterpretq_s16_f16): Likewise.
27151 (vreinterpretq_s16_f32): Likewise.
27152 (vreinterpretq_s64_f16): Likewise.
27153 (vreinterpretq_s64_f32): Likewise.
27154 (vreinterpretq_s8_f16): Likewise.
27155 (vreinterpretq_s8_f32): Likewise.
27156 (__arm_vreinterpretq_f16): Likewise.
27157 (__arm_vreinterpretq_f32): Likewise.
27158 (__arm_vreinterpretq_s16): Likewise.
27159 (__arm_vreinterpretq_s32): Likewise.
27160 (__arm_vreinterpretq_s64): Likewise.
27161 (__arm_vreinterpretq_s8): Likewise.
27162 (__arm_vreinterpretq_u16): Likewise.
27163 (__arm_vreinterpretq_u32): Likewise.
27164 (__arm_vreinterpretq_u64): Likewise.
27165 (__arm_vreinterpretq_u8): Likewise.
27166 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
27167 (__arm_vreinterpretq_s16_s64): Likewise.
27168 (__arm_vreinterpretq_s16_s8): Likewise.
27169 (__arm_vreinterpretq_s16_u16): Likewise.
27170 (__arm_vreinterpretq_s16_u32): Likewise.
27171 (__arm_vreinterpretq_s16_u64): Likewise.
27172 (__arm_vreinterpretq_s16_u8): Likewise.
27173 (__arm_vreinterpretq_s32_s16): Likewise.
27174 (__arm_vreinterpretq_s32_s64): Likewise.
27175 (__arm_vreinterpretq_s32_s8): Likewise.
27176 (__arm_vreinterpretq_s32_u16): Likewise.
27177 (__arm_vreinterpretq_s32_u32): Likewise.
27178 (__arm_vreinterpretq_s32_u64): Likewise.
27179 (__arm_vreinterpretq_s32_u8): Likewise.
27180 (__arm_vreinterpretq_s64_s16): Likewise.
27181 (__arm_vreinterpretq_s64_s32): Likewise.
27182 (__arm_vreinterpretq_s64_s8): Likewise.
27183 (__arm_vreinterpretq_s64_u16): Likewise.
27184 (__arm_vreinterpretq_s64_u32): Likewise.
27185 (__arm_vreinterpretq_s64_u64): Likewise.
27186 (__arm_vreinterpretq_s64_u8): Likewise.
27187 (__arm_vreinterpretq_s8_s16): Likewise.
27188 (__arm_vreinterpretq_s8_s32): Likewise.
27189 (__arm_vreinterpretq_s8_s64): Likewise.
27190 (__arm_vreinterpretq_s8_u16): Likewise.
27191 (__arm_vreinterpretq_s8_u32): Likewise.
27192 (__arm_vreinterpretq_s8_u64): Likewise.
27193 (__arm_vreinterpretq_s8_u8): Likewise.
27194 (__arm_vreinterpretq_u16_s16): Likewise.
27195 (__arm_vreinterpretq_u16_s32): Likewise.
27196 (__arm_vreinterpretq_u16_s64): Likewise.
27197 (__arm_vreinterpretq_u16_s8): Likewise.
27198 (__arm_vreinterpretq_u16_u32): Likewise.
27199 (__arm_vreinterpretq_u16_u64): Likewise.
27200 (__arm_vreinterpretq_u16_u8): Likewise.
27201 (__arm_vreinterpretq_u32_s16): Likewise.
27202 (__arm_vreinterpretq_u32_s32): Likewise.
27203 (__arm_vreinterpretq_u32_s64): Likewise.
27204 (__arm_vreinterpretq_u32_s8): Likewise.
27205 (__arm_vreinterpretq_u32_u16): Likewise.
27206 (__arm_vreinterpretq_u32_u64): Likewise.
27207 (__arm_vreinterpretq_u32_u8): Likewise.
27208 (__arm_vreinterpretq_u64_s16): Likewise.
27209 (__arm_vreinterpretq_u64_s32): Likewise.
27210 (__arm_vreinterpretq_u64_s64): Likewise.
27211 (__arm_vreinterpretq_u64_s8): Likewise.
27212 (__arm_vreinterpretq_u64_u16): Likewise.
27213 (__arm_vreinterpretq_u64_u32): Likewise.
27214 (__arm_vreinterpretq_u64_u8): Likewise.
27215 (__arm_vreinterpretq_u8_s16): Likewise.
27216 (__arm_vreinterpretq_u8_s32): Likewise.
27217 (__arm_vreinterpretq_u8_s64): Likewise.
27218 (__arm_vreinterpretq_u8_s8): Likewise.
27219 (__arm_vreinterpretq_u8_u16): Likewise.
27220 (__arm_vreinterpretq_u8_u32): Likewise.
27221 (__arm_vreinterpretq_u8_u64): Likewise.
27222 (__arm_vreinterpretq_s32_f16): Likewise.
27223 (__arm_vreinterpretq_s32_f32): Likewise.
27224 (__arm_vreinterpretq_s16_f16): Likewise.
27225 (__arm_vreinterpretq_s16_f32): Likewise.
27226 (__arm_vreinterpretq_s64_f16): Likewise.
27227 (__arm_vreinterpretq_s64_f32): Likewise.
27228 (__arm_vreinterpretq_s8_f16): Likewise.
27229 (__arm_vreinterpretq_s8_f32): Likewise.
27230 (__arm_vreinterpretq_u16_f16): Likewise.
27231 (__arm_vreinterpretq_u16_f32): Likewise.
27232 (__arm_vreinterpretq_u32_f16): Likewise.
27233 (__arm_vreinterpretq_u32_f32): Likewise.
27234 (__arm_vreinterpretq_u64_f16): Likewise.
27235 (__arm_vreinterpretq_u64_f32): Likewise.
27236 (__arm_vreinterpretq_u8_f16): Likewise.
27237 (__arm_vreinterpretq_u8_f32): Likewise.
27238 (__arm_vreinterpretq_f16_f32): Likewise.
27239 (__arm_vreinterpretq_f16_s16): Likewise.
27240 (__arm_vreinterpretq_f16_s32): Likewise.
27241 (__arm_vreinterpretq_f16_s64): Likewise.
27242 (__arm_vreinterpretq_f16_s8): Likewise.
27243 (__arm_vreinterpretq_f16_u16): Likewise.
27244 (__arm_vreinterpretq_f16_u32): Likewise.
27245 (__arm_vreinterpretq_f16_u64): Likewise.
27246 (__arm_vreinterpretq_f16_u8): Likewise.
27247 (__arm_vreinterpretq_f32_f16): Likewise.
27248 (__arm_vreinterpretq_f32_s16): Likewise.
27249 (__arm_vreinterpretq_f32_s32): Likewise.
27250 (__arm_vreinterpretq_f32_s64): Likewise.
27251 (__arm_vreinterpretq_f32_s8): Likewise.
27252 (__arm_vreinterpretq_f32_u16): Likewise.
27253 (__arm_vreinterpretq_f32_u32): Likewise.
27254 (__arm_vreinterpretq_f32_u64): Likewise.
27255 (__arm_vreinterpretq_f32_u8): Likewise.
27256 (__arm_vreinterpretq_s16): Likewise.
27257 (__arm_vreinterpretq_s32): Likewise.
27258 (__arm_vreinterpretq_s64): Likewise.
27259 (__arm_vreinterpretq_s8): Likewise.
27260 (__arm_vreinterpretq_u16): Likewise.
27261 (__arm_vreinterpretq_u32): Likewise.
27262 (__arm_vreinterpretq_u64): Likewise.
27263 (__arm_vreinterpretq_u8): Likewise.
27264 (__arm_vreinterpretq_f16): Likewise.
27265 (__arm_vreinterpretq_f32): Likewise.
27266 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
27267 * config/arm/unspecs.md: (REINTERPRET): New unspec.
27269 2023-05-03 Murray Steele <murray.steele@arm.com>
27270 Christophe Lyon <christophe.lyon@arm.com>
27271 Christophe Lyon <christophe.lyon@arm.com
27273 * config.gcc: Add arm-mve-builtins-base.o and
27274 arm-mve-builtins-shapes.o to extra_objs.
27275 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
27277 (arm_expand_builtin): Likewise
27278 (arm_check_builtin_call): Likewise
27279 (arm_describe_resolver): Likewise.
27280 * config/arm/arm-builtins.h (enum resolver_ident): Add
27282 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
27283 (arm_resolve_overloaded_builtin): Handle MVE builtins.
27284 (arm_register_target_pragmas): Register arm_check_builtin_call.
27285 * config/arm/arm-mve-builtins.cc (class registered_function): New
27287 (struct registered_function_hasher): New struct.
27288 (pred_suffixes): New table.
27289 (mode_suffixes): New table.
27290 (type_suffix_info): New table.
27291 (TYPES_float16): New.
27292 (TYPES_all_float): New.
27293 (TYPES_integer_8): New.
27294 (TYPES_integer_8_16): New.
27295 (TYPES_integer_16_32): New.
27296 (TYPES_integer_32): New.
27297 (TYPES_signed_16_32): New.
27298 (TYPES_signed_32): New.
27299 (TYPES_all_signed): New.
27300 (TYPES_all_unsigned): New.
27301 (TYPES_all_integer): New.
27302 (TYPES_all_integer_with_64): New.
27303 (DEF_VECTOR_TYPE): New.
27304 (DEF_DOUBLE_TYPE): New.
27305 (DEF_MVE_TYPES_ARRAY): New.
27306 (all_integer): New.
27307 (all_integer_with_64): New.
27311 (all_unsigned): New.
27313 (integer_8_16): New.
27314 (integer_16_32): New.
27316 (signed_16_32): New.
27318 (register_vector_type): Use void_type_node for mve.fp-only types when
27319 mve.fp is not enabled.
27320 (register_builtin_tuple_types): Likewise.
27321 (handle_arm_mve_h): New function..
27322 (matches_type_p): Likewise..
27323 (report_out_of_range): Likewise.
27324 (report_not_enum): Likewise.
27325 (report_missing_float): Likewise.
27326 (report_non_ice): Likewise.
27327 (check_requires_float): Likewise.
27328 (function_instance::hash): Likewise
27329 (function_instance::call_properties): Likewise.
27330 (function_instance::reads_global_state_p): Likewise.
27331 (function_instance::modifies_global_state_p): Likewise.
27332 (function_instance::could_trap_p): Likewise.
27333 (function_instance::has_inactive_argument): Likewise.
27334 (registered_function_hasher::hash): Likewise.
27335 (registered_function_hasher::equal): Likewise.
27336 (function_builder::function_builder): Likewise.
27337 (function_builder::~function_builder): Likewise.
27338 (function_builder::append_name): Likewise.
27339 (function_builder::finish_name): Likewise.
27340 (function_builder::get_name): Likewise.
27341 (add_attribute): Likewise.
27342 (function_builder::get_attributes): Likewise.
27343 (function_builder::add_function): Likewise.
27344 (function_builder::add_unique_function): Likewise.
27345 (function_builder::add_overloaded_function): Likewise.
27346 (function_builder::add_overloaded_functions): Likewise.
27347 (function_builder::register_function_group): Likewise.
27348 (function_call_info::function_call_info): Likewise.
27349 (function_resolver::function_resolver): Likewise.
27350 (function_resolver::get_vector_type): Likewise.
27351 (function_resolver::get_scalar_type_name): Likewise.
27352 (function_resolver::get_argument_type): Likewise.
27353 (function_resolver::scalar_argument_p): Likewise.
27354 (function_resolver::report_no_such_form): Likewise.
27355 (function_resolver::lookup_form): Likewise.
27356 (function_resolver::resolve_to): Likewise.
27357 (function_resolver::infer_vector_or_tuple_type): Likewise.
27358 (function_resolver::infer_vector_type): Likewise.
27359 (function_resolver::require_vector_or_scalar_type): Likewise.
27360 (function_resolver::require_vector_type): Likewise.
27361 (function_resolver::require_matching_vector_type): Likewise.
27362 (function_resolver::require_derived_vector_type): Likewise.
27363 (function_resolver::require_derived_scalar_type): Likewise.
27364 (function_resolver::require_integer_immediate): Likewise.
27365 (function_resolver::require_scalar_type): Likewise.
27366 (function_resolver::check_num_arguments): Likewise.
27367 (function_resolver::check_gp_argument): Likewise.
27368 (function_resolver::finish_opt_n_resolution): Likewise.
27369 (function_resolver::resolve_unary): Likewise.
27370 (function_resolver::resolve_unary_n): Likewise.
27371 (function_resolver::resolve_uniform): Likewise.
27372 (function_resolver::resolve_uniform_opt_n): Likewise.
27373 (function_resolver::resolve): Likewise.
27374 (function_checker::function_checker): Likewise.
27375 (function_checker::argument_exists_p): Likewise.
27376 (function_checker::require_immediate): Likewise.
27377 (function_checker::require_immediate_enum): Likewise.
27378 (function_checker::require_immediate_range): Likewise.
27379 (function_checker::check): Likewise.
27380 (gimple_folder::gimple_folder): Likewise.
27381 (gimple_folder::fold): Likewise.
27382 (function_expander::function_expander): Likewise.
27383 (function_expander::direct_optab_handler): Likewise.
27384 (function_expander::get_fallback_value): Likewise.
27385 (function_expander::get_reg_target): Likewise.
27386 (function_expander::add_output_operand): Likewise.
27387 (function_expander::add_input_operand): Likewise.
27388 (function_expander::add_integer_operand): Likewise.
27389 (function_expander::generate_insn): Likewise.
27390 (function_expander::use_exact_insn): Likewise.
27391 (function_expander::use_unpred_insn): Likewise.
27392 (function_expander::use_pred_x_insn): Likewise.
27393 (function_expander::use_cond_insn): Likewise.
27394 (function_expander::map_to_rtx_codes): Likewise.
27395 (function_expander::expand): Likewise.
27396 (resolve_overloaded_builtin): Likewise.
27397 (check_builtin_call): Likewise.
27398 (gimple_fold_builtin): Likewise.
27399 (expand_builtin): Likewise.
27400 (gt_ggc_mx): Likewise.
27401 (gt_pch_nx): Likewise.
27402 (gt_pch_nx): Likewise.
27403 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
27414 (offset): New mode.
27415 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
27416 (CP_READ_FPCR): Likewise.
27417 (CP_RAISE_FP_EXCEPTIONS): Likewise.
27418 (CP_READ_MEMORY): Likewise.
27419 (CP_WRITE_MEMORY): Likewise.
27420 (enum units_index): New enum.
27421 (enum predication_index): New.
27422 (enum type_class_index): New.
27423 (enum mode_suffix_index): New enum.
27424 (enum type_suffix_index): New.
27425 (struct mode_suffix_info): New struct.
27426 (struct type_suffix_info): New.
27427 (struct function_group_info): Likewise.
27428 (class function_instance): Likewise.
27429 (class registered_function): Likewise.
27430 (class function_builder): Likewise.
27431 (class function_call_info): Likewise.
27432 (class function_resolver): Likewise.
27433 (class function_checker): Likewise.
27434 (class gimple_folder): Likewise.
27435 (class function_expander): Likewise.
27436 (get_mve_pred16_t): Likewise.
27437 (find_mode_suffix): New function.
27438 (class function_base): Likewise.
27439 (class function_shape): Likewise.
27440 (function_instance::operator==): New function.
27441 (function_instance::operator!=): Likewise.
27442 (function_instance::vectors_per_tuple): Likewise.
27443 (function_instance::mode_suffix): Likewise.
27444 (function_instance::type_suffix): Likewise.
27445 (function_instance::scalar_type): Likewise.
27446 (function_instance::vector_type): Likewise.
27447 (function_instance::tuple_type): Likewise.
27448 (function_instance::vector_mode): Likewise.
27449 (function_call_info::function_returns_void_p): Likewise.
27450 (function_base::call_properties): Likewise.
27451 * config/arm/arm-protos.h (enum arm_builtin_class): Add
27453 (handle_arm_mve_h): New.
27454 (resolve_overloaded_builtin): New.
27455 (check_builtin_call): New.
27456 (gimple_fold_builtin): New.
27457 (expand_builtin): New.
27458 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
27459 arm_gimple_fold_builtin.
27460 (arm_gimple_fold_builtin): New function.
27461 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
27462 * config/arm/predicates.md (arm_any_register_operand): New predicate.
27463 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
27464 (arm-mve-builtins-shapes.o): New target.
27465 (arm-mve-builtins-base.o): New target.
27466 * config/arm/arm-mve-builtins-base.cc: New file.
27467 * config/arm/arm-mve-builtins-base.def: New file.
27468 * config/arm/arm-mve-builtins-base.h: New file.
27469 * config/arm/arm-mve-builtins-functions.h: New file.
27470 * config/arm/arm-mve-builtins-shapes.cc: New file.
27471 * config/arm/arm-mve-builtins-shapes.h: New file.
27473 2023-05-03 Murray Steele <murray.steele@arm.com>
27474 Christophe Lyon <christophe.lyon@arm.com>
27475 Christophe Lyon <christophe.lyon@arm.com>
27477 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
27479 (arm_init_builtin): Use arm_general_add_builtin_function instead
27480 of arm_add_builtin_function.
27481 (arm_init_acle_builtins): Likewise.
27482 (arm_init_mve_builtins): Likewise.
27483 (arm_init_crypto_builtins): Likewise.
27484 (arm_init_builtins): Likewise.
27485 (arm_general_builtin_decl): New function.
27486 (arm_builtin_decl): Defer to numberspace-specialized functions.
27487 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
27488 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
27489 (arm_general_expand_builtin_1): ... specialize for general builtins.
27490 (arm_expand_acle_builtin): Use arm_general_expand_builtin
27491 instead of arm_expand_builtin.
27492 (arm_expand_mve_builtin): Likewise.
27493 (arm_expand_neon_builtin): Likewise.
27494 (arm_expand_vfp_builtin): Likewise.
27495 (arm_general_expand_builtin): New function.
27496 (arm_expand_builtin): Specialize for general builtins.
27497 (arm_general_check_builtin_call): New function.
27498 (arm_check_builtin_call): Specialize for general builtins.
27499 (arm_describe_resolver): Validate numberspace.
27500 (arm_cde_end_args): Likewise.
27501 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
27502 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
27504 2023-05-03 Martin Liska <mliska@suse.cz>
27507 * config/riscv/sync.md: Add gcc_unreachable to a switch.
27509 2023-05-03 Richard Biener <rguenther@suse.de>
27511 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
27512 (patch_loop_exit): Likewise.
27513 (connect_loops): Likewise.
27514 (split_loop): Likewise.
27515 (control_dep_semi_invariant_p): Likewise.
27516 (do_split_loop_on_cond): Likewise.
27517 (split_loop_on_cond): Likewise.
27518 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
27520 (simplify_loop_version): Likewise.
27521 (evaluate_bbs): Likewise.
27522 (find_loop_guard): Likewise.
27523 (clean_up_after_unswitching): Likewise.
27524 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
27526 (optimize_spaceship): Take a gcond * argument, avoid
27528 (math_opts_dom_walker::after_dom_children): Adjust call to
27529 optimize_spaceship.
27530 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
27531 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
27534 2023-05-03 Andreas Schwab <schwab@suse.de>
27536 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
27538 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27540 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
27542 (class vlseg): New class.
27543 (class vsseg): Ditto.
27544 (class vlsseg): Ditto.
27545 (class vssseg): Ditto.
27546 (class seg_indexed_load): Ditto.
27547 (class seg_indexed_store): Ditto.
27548 (class vlsegff): Ditto.
27550 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
27551 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
27561 * config/riscv/riscv-vector-builtins-shapes.cc (struct
27562 seg_loadstore_def): Ditto.
27563 (struct seg_indexed_loadstore_def): Ditto.
27564 (struct seg_fault_load_def): Ditto.
27566 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
27567 * config/riscv/riscv-vector-builtins.cc
27568 (function_builder::append_nf): New function.
27569 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
27570 Change ptr from double into float.
27571 (vfloat32m1x3_t): Ditto.
27572 (vfloat32m1x4_t): Ditto.
27573 (vfloat32m1x5_t): Ditto.
27574 (vfloat32m1x6_t): Ditto.
27575 (vfloat32m1x7_t): Ditto.
27576 (vfloat32m1x8_t): Ditto.
27577 (vfloat32m2x2_t): Ditto.
27578 (vfloat32m2x3_t): Ditto.
27579 (vfloat32m2x4_t): Ditto.
27580 (vfloat32m4x2_t): Ditto.
27581 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
27582 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
27584 * config/riscv/riscv.md: Add segment instructions.
27585 * config/riscv/vector-iterators.md: Support segment intrinsics.
27586 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
27588 (@pred_unit_strided_store<mode>): Ditto.
27589 (@pred_strided_load<mode>): Ditto.
27590 (@pred_strided_store<mode>): Ditto.
27591 (@pred_fault_load<mode>): Ditto.
27592 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
27593 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
27594 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
27595 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
27596 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
27597 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
27598 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
27599 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
27600 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
27601 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
27602 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
27603 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
27604 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
27605 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
27607 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27609 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
27610 tuple type support.
27612 (floattype): Ditto.
27614 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
27615 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
27617 (vget): Add tuple type vget.
27618 * config/riscv/riscv-vector-builtins-types.def
27619 (DEF_RVV_TUPLE_OPS): New macro.
27620 (vint8mf8x2_t): Ditto.
27621 (vuint8mf8x2_t): Ditto.
27622 (vint8mf8x3_t): Ditto.
27623 (vuint8mf8x3_t): Ditto.
27624 (vint8mf8x4_t): Ditto.
27625 (vuint8mf8x4_t): Ditto.
27626 (vint8mf8x5_t): Ditto.
27627 (vuint8mf8x5_t): Ditto.
27628 (vint8mf8x6_t): Ditto.
27629 (vuint8mf8x6_t): Ditto.
27630 (vint8mf8x7_t): Ditto.
27631 (vuint8mf8x7_t): Ditto.
27632 (vint8mf8x8_t): Ditto.
27633 (vuint8mf8x8_t): Ditto.
27634 (vint8mf4x2_t): Ditto.
27635 (vuint8mf4x2_t): Ditto.
27636 (vint8mf4x3_t): Ditto.
27637 (vuint8mf4x3_t): Ditto.
27638 (vint8mf4x4_t): Ditto.
27639 (vuint8mf4x4_t): Ditto.
27640 (vint8mf4x5_t): Ditto.
27641 (vuint8mf4x5_t): Ditto.
27642 (vint8mf4x6_t): Ditto.
27643 (vuint8mf4x6_t): Ditto.
27644 (vint8mf4x7_t): Ditto.
27645 (vuint8mf4x7_t): Ditto.
27646 (vint8mf4x8_t): Ditto.
27647 (vuint8mf4x8_t): Ditto.
27648 (vint8mf2x2_t): Ditto.
27649 (vuint8mf2x2_t): Ditto.
27650 (vint8mf2x3_t): Ditto.
27651 (vuint8mf2x3_t): Ditto.
27652 (vint8mf2x4_t): Ditto.
27653 (vuint8mf2x4_t): Ditto.
27654 (vint8mf2x5_t): Ditto.
27655 (vuint8mf2x5_t): Ditto.
27656 (vint8mf2x6_t): Ditto.
27657 (vuint8mf2x6_t): Ditto.
27658 (vint8mf2x7_t): Ditto.
27659 (vuint8mf2x7_t): Ditto.
27660 (vint8mf2x8_t): Ditto.
27661 (vuint8mf2x8_t): Ditto.
27662 (vint8m1x2_t): Ditto.
27663 (vuint8m1x2_t): Ditto.
27664 (vint8m1x3_t): Ditto.
27665 (vuint8m1x3_t): Ditto.
27666 (vint8m1x4_t): Ditto.
27667 (vuint8m1x4_t): Ditto.
27668 (vint8m1x5_t): Ditto.
27669 (vuint8m1x5_t): Ditto.
27670 (vint8m1x6_t): Ditto.
27671 (vuint8m1x6_t): Ditto.
27672 (vint8m1x7_t): Ditto.
27673 (vuint8m1x7_t): Ditto.
27674 (vint8m1x8_t): Ditto.
27675 (vuint8m1x8_t): Ditto.
27676 (vint8m2x2_t): Ditto.
27677 (vuint8m2x2_t): Ditto.
27678 (vint8m2x3_t): Ditto.
27679 (vuint8m2x3_t): Ditto.
27680 (vint8m2x4_t): Ditto.
27681 (vuint8m2x4_t): Ditto.
27682 (vint8m4x2_t): Ditto.
27683 (vuint8m4x2_t): Ditto.
27684 (vint16mf4x2_t): Ditto.
27685 (vuint16mf4x2_t): Ditto.
27686 (vint16mf4x3_t): Ditto.
27687 (vuint16mf4x3_t): Ditto.
27688 (vint16mf4x4_t): Ditto.
27689 (vuint16mf4x4_t): Ditto.
27690 (vint16mf4x5_t): Ditto.
27691 (vuint16mf4x5_t): Ditto.
27692 (vint16mf4x6_t): Ditto.
27693 (vuint16mf4x6_t): Ditto.
27694 (vint16mf4x7_t): Ditto.
27695 (vuint16mf4x7_t): Ditto.
27696 (vint16mf4x8_t): Ditto.
27697 (vuint16mf4x8_t): Ditto.
27698 (vint16mf2x2_t): Ditto.
27699 (vuint16mf2x2_t): Ditto.
27700 (vint16mf2x3_t): Ditto.
27701 (vuint16mf2x3_t): Ditto.
27702 (vint16mf2x4_t): Ditto.
27703 (vuint16mf2x4_t): Ditto.
27704 (vint16mf2x5_t): Ditto.
27705 (vuint16mf2x5_t): Ditto.
27706 (vint16mf2x6_t): Ditto.
27707 (vuint16mf2x6_t): Ditto.
27708 (vint16mf2x7_t): Ditto.
27709 (vuint16mf2x7_t): Ditto.
27710 (vint16mf2x8_t): Ditto.
27711 (vuint16mf2x8_t): Ditto.
27712 (vint16m1x2_t): Ditto.
27713 (vuint16m1x2_t): Ditto.
27714 (vint16m1x3_t): Ditto.
27715 (vuint16m1x3_t): Ditto.
27716 (vint16m1x4_t): Ditto.
27717 (vuint16m1x4_t): Ditto.
27718 (vint16m1x5_t): Ditto.
27719 (vuint16m1x5_t): Ditto.
27720 (vint16m1x6_t): Ditto.
27721 (vuint16m1x6_t): Ditto.
27722 (vint16m1x7_t): Ditto.
27723 (vuint16m1x7_t): Ditto.
27724 (vint16m1x8_t): Ditto.
27725 (vuint16m1x8_t): Ditto.
27726 (vint16m2x2_t): Ditto.
27727 (vuint16m2x2_t): Ditto.
27728 (vint16m2x3_t): Ditto.
27729 (vuint16m2x3_t): Ditto.
27730 (vint16m2x4_t): Ditto.
27731 (vuint16m2x4_t): Ditto.
27732 (vint16m4x2_t): Ditto.
27733 (vuint16m4x2_t): Ditto.
27734 (vint32mf2x2_t): Ditto.
27735 (vuint32mf2x2_t): Ditto.
27736 (vint32mf2x3_t): Ditto.
27737 (vuint32mf2x3_t): Ditto.
27738 (vint32mf2x4_t): Ditto.
27739 (vuint32mf2x4_t): Ditto.
27740 (vint32mf2x5_t): Ditto.
27741 (vuint32mf2x5_t): Ditto.
27742 (vint32mf2x6_t): Ditto.
27743 (vuint32mf2x6_t): Ditto.
27744 (vint32mf2x7_t): Ditto.
27745 (vuint32mf2x7_t): Ditto.
27746 (vint32mf2x8_t): Ditto.
27747 (vuint32mf2x8_t): Ditto.
27748 (vint32m1x2_t): Ditto.
27749 (vuint32m1x2_t): Ditto.
27750 (vint32m1x3_t): Ditto.
27751 (vuint32m1x3_t): Ditto.
27752 (vint32m1x4_t): Ditto.
27753 (vuint32m1x4_t): Ditto.
27754 (vint32m1x5_t): Ditto.
27755 (vuint32m1x5_t): Ditto.
27756 (vint32m1x6_t): Ditto.
27757 (vuint32m1x6_t): Ditto.
27758 (vint32m1x7_t): Ditto.
27759 (vuint32m1x7_t): Ditto.
27760 (vint32m1x8_t): Ditto.
27761 (vuint32m1x8_t): Ditto.
27762 (vint32m2x2_t): Ditto.
27763 (vuint32m2x2_t): Ditto.
27764 (vint32m2x3_t): Ditto.
27765 (vuint32m2x3_t): Ditto.
27766 (vint32m2x4_t): Ditto.
27767 (vuint32m2x4_t): Ditto.
27768 (vint32m4x2_t): Ditto.
27769 (vuint32m4x2_t): Ditto.
27770 (vint64m1x2_t): Ditto.
27771 (vuint64m1x2_t): Ditto.
27772 (vint64m1x3_t): Ditto.
27773 (vuint64m1x3_t): Ditto.
27774 (vint64m1x4_t): Ditto.
27775 (vuint64m1x4_t): Ditto.
27776 (vint64m1x5_t): Ditto.
27777 (vuint64m1x5_t): Ditto.
27778 (vint64m1x6_t): Ditto.
27779 (vuint64m1x6_t): Ditto.
27780 (vint64m1x7_t): Ditto.
27781 (vuint64m1x7_t): Ditto.
27782 (vint64m1x8_t): Ditto.
27783 (vuint64m1x8_t): Ditto.
27784 (vint64m2x2_t): Ditto.
27785 (vuint64m2x2_t): Ditto.
27786 (vint64m2x3_t): Ditto.
27787 (vuint64m2x3_t): Ditto.
27788 (vint64m2x4_t): Ditto.
27789 (vuint64m2x4_t): Ditto.
27790 (vint64m4x2_t): Ditto.
27791 (vuint64m4x2_t): Ditto.
27792 (vfloat32mf2x2_t): Ditto.
27793 (vfloat32mf2x3_t): Ditto.
27794 (vfloat32mf2x4_t): Ditto.
27795 (vfloat32mf2x5_t): Ditto.
27796 (vfloat32mf2x6_t): Ditto.
27797 (vfloat32mf2x7_t): Ditto.
27798 (vfloat32mf2x8_t): Ditto.
27799 (vfloat32m1x2_t): Ditto.
27800 (vfloat32m1x3_t): Ditto.
27801 (vfloat32m1x4_t): Ditto.
27802 (vfloat32m1x5_t): Ditto.
27803 (vfloat32m1x6_t): Ditto.
27804 (vfloat32m1x7_t): Ditto.
27805 (vfloat32m1x8_t): Ditto.
27806 (vfloat32m2x2_t): Ditto.
27807 (vfloat32m2x3_t): Ditto.
27808 (vfloat32m2x4_t): Ditto.
27809 (vfloat32m4x2_t): Ditto.
27810 (vfloat64m1x2_t): Ditto.
27811 (vfloat64m1x3_t): Ditto.
27812 (vfloat64m1x4_t): Ditto.
27813 (vfloat64m1x5_t): Ditto.
27814 (vfloat64m1x6_t): Ditto.
27815 (vfloat64m1x7_t): Ditto.
27816 (vfloat64m1x8_t): Ditto.
27817 (vfloat64m2x2_t): Ditto.
27818 (vfloat64m2x3_t): Ditto.
27819 (vfloat64m2x4_t): Ditto.
27820 (vfloat64m4x2_t): Ditto.
27821 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
27823 (DEF_RVV_TYPE_INDEX): Ditto.
27824 (rvv_arg_type_info::get_tuple_subpart_type): New function.
27825 (DEF_RVV_TUPLE_TYPE): New macro.
27826 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
27827 Adapt for tuple vget/vset support.
27828 (vint8mf4_t): Ditto.
27829 (vuint8mf4_t): Ditto.
27830 (vint8mf2_t): Ditto.
27831 (vuint8mf2_t): Ditto.
27832 (vint8m1_t): Ditto.
27833 (vuint8m1_t): Ditto.
27834 (vint8m2_t): Ditto.
27835 (vuint8m2_t): Ditto.
27836 (vint8m4_t): Ditto.
27837 (vuint8m4_t): Ditto.
27838 (vint8m8_t): Ditto.
27839 (vuint8m8_t): Ditto.
27840 (vint16mf4_t): Ditto.
27841 (vuint16mf4_t): Ditto.
27842 (vint16mf2_t): Ditto.
27843 (vuint16mf2_t): Ditto.
27844 (vint16m1_t): Ditto.
27845 (vuint16m1_t): Ditto.
27846 (vint16m2_t): Ditto.
27847 (vuint16m2_t): Ditto.
27848 (vint16m4_t): Ditto.
27849 (vuint16m4_t): Ditto.
27850 (vint16m8_t): Ditto.
27851 (vuint16m8_t): Ditto.
27852 (vint32mf2_t): Ditto.
27853 (vuint32mf2_t): Ditto.
27854 (vint32m1_t): Ditto.
27855 (vuint32m1_t): Ditto.
27856 (vint32m2_t): Ditto.
27857 (vuint32m2_t): Ditto.
27858 (vint32m4_t): Ditto.
27859 (vuint32m4_t): Ditto.
27860 (vint32m8_t): Ditto.
27861 (vuint32m8_t): Ditto.
27862 (vint64m1_t): Ditto.
27863 (vuint64m1_t): Ditto.
27864 (vint64m2_t): Ditto.
27865 (vuint64m2_t): Ditto.
27866 (vint64m4_t): Ditto.
27867 (vuint64m4_t): Ditto.
27868 (vint64m8_t): Ditto.
27869 (vuint64m8_t): Ditto.
27870 (vfloat32mf2_t): Ditto.
27871 (vfloat32m1_t): Ditto.
27872 (vfloat32m2_t): Ditto.
27873 (vfloat32m4_t): Ditto.
27874 (vfloat32m8_t): Ditto.
27875 (vfloat64m1_t): Ditto.
27876 (vfloat64m2_t): Ditto.
27877 (vfloat64m4_t): Ditto.
27878 (vfloat64m8_t): Ditto.
27879 (tuple_subpart): Add tuple subpart base type.
27880 * config/riscv/riscv-vector-builtins.h (struct
27881 rvv_arg_type_info): Ditto.
27882 (tuple_type_field): New function.
27884 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27886 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
27887 (RVV_TUPLE_PARTIAL_MODES): Ditto.
27888 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
27891 (get_subpart_mode): Ditto.
27892 (get_tuple_mode): Ditto.
27893 (expand_tuple_move): Ditto.
27894 * config/riscv/riscv-v.cc (ENTRY): New macro.
27895 (TUPLE_ENTRY): Ditto.
27896 (get_nf): New function.
27897 (get_subpart_mode): Ditto.
27898 (get_tuple_mode): Ditto.
27899 (expand_tuple_move): Ditto.
27900 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
27902 (register_tuple_type): New function
27903 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
27905 (vint8mf8x2_t): New macro.
27906 (vuint8mf8x2_t): Ditto.
27907 (vint8mf8x3_t): Ditto.
27908 (vuint8mf8x3_t): Ditto.
27909 (vint8mf8x4_t): Ditto.
27910 (vuint8mf8x4_t): Ditto.
27911 (vint8mf8x5_t): Ditto.
27912 (vuint8mf8x5_t): Ditto.
27913 (vint8mf8x6_t): Ditto.
27914 (vuint8mf8x6_t): Ditto.
27915 (vint8mf8x7_t): Ditto.
27916 (vuint8mf8x7_t): Ditto.
27917 (vint8mf8x8_t): Ditto.
27918 (vuint8mf8x8_t): Ditto.
27919 (vint8mf4x2_t): Ditto.
27920 (vuint8mf4x2_t): Ditto.
27921 (vint8mf4x3_t): Ditto.
27922 (vuint8mf4x3_t): Ditto.
27923 (vint8mf4x4_t): Ditto.
27924 (vuint8mf4x4_t): Ditto.
27925 (vint8mf4x5_t): Ditto.
27926 (vuint8mf4x5_t): Ditto.
27927 (vint8mf4x6_t): Ditto.
27928 (vuint8mf4x6_t): Ditto.
27929 (vint8mf4x7_t): Ditto.
27930 (vuint8mf4x7_t): Ditto.
27931 (vint8mf4x8_t): Ditto.
27932 (vuint8mf4x8_t): Ditto.
27933 (vint8mf2x2_t): Ditto.
27934 (vuint8mf2x2_t): Ditto.
27935 (vint8mf2x3_t): Ditto.
27936 (vuint8mf2x3_t): Ditto.
27937 (vint8mf2x4_t): Ditto.
27938 (vuint8mf2x4_t): Ditto.
27939 (vint8mf2x5_t): Ditto.
27940 (vuint8mf2x5_t): Ditto.
27941 (vint8mf2x6_t): Ditto.
27942 (vuint8mf2x6_t): Ditto.
27943 (vint8mf2x7_t): Ditto.
27944 (vuint8mf2x7_t): Ditto.
27945 (vint8mf2x8_t): Ditto.
27946 (vuint8mf2x8_t): Ditto.
27947 (vint8m1x2_t): Ditto.
27948 (vuint8m1x2_t): Ditto.
27949 (vint8m1x3_t): Ditto.
27950 (vuint8m1x3_t): Ditto.
27951 (vint8m1x4_t): Ditto.
27952 (vuint8m1x4_t): Ditto.
27953 (vint8m1x5_t): Ditto.
27954 (vuint8m1x5_t): Ditto.
27955 (vint8m1x6_t): Ditto.
27956 (vuint8m1x6_t): Ditto.
27957 (vint8m1x7_t): Ditto.
27958 (vuint8m1x7_t): Ditto.
27959 (vint8m1x8_t): Ditto.
27960 (vuint8m1x8_t): Ditto.
27961 (vint8m2x2_t): Ditto.
27962 (vuint8m2x2_t): Ditto.
27963 (vint8m2x3_t): Ditto.
27964 (vuint8m2x3_t): Ditto.
27965 (vint8m2x4_t): Ditto.
27966 (vuint8m2x4_t): Ditto.
27967 (vint8m4x2_t): Ditto.
27968 (vuint8m4x2_t): Ditto.
27969 (vint16mf4x2_t): Ditto.
27970 (vuint16mf4x2_t): Ditto.
27971 (vint16mf4x3_t): Ditto.
27972 (vuint16mf4x3_t): Ditto.
27973 (vint16mf4x4_t): Ditto.
27974 (vuint16mf4x4_t): Ditto.
27975 (vint16mf4x5_t): Ditto.
27976 (vuint16mf4x5_t): Ditto.
27977 (vint16mf4x6_t): Ditto.
27978 (vuint16mf4x6_t): Ditto.
27979 (vint16mf4x7_t): Ditto.
27980 (vuint16mf4x7_t): Ditto.
27981 (vint16mf4x8_t): Ditto.
27982 (vuint16mf4x8_t): Ditto.
27983 (vint16mf2x2_t): Ditto.
27984 (vuint16mf2x2_t): Ditto.
27985 (vint16mf2x3_t): Ditto.
27986 (vuint16mf2x3_t): Ditto.
27987 (vint16mf2x4_t): Ditto.
27988 (vuint16mf2x4_t): Ditto.
27989 (vint16mf2x5_t): Ditto.
27990 (vuint16mf2x5_t): Ditto.
27991 (vint16mf2x6_t): Ditto.
27992 (vuint16mf2x6_t): Ditto.
27993 (vint16mf2x7_t): Ditto.
27994 (vuint16mf2x7_t): Ditto.
27995 (vint16mf2x8_t): Ditto.
27996 (vuint16mf2x8_t): Ditto.
27997 (vint16m1x2_t): Ditto.
27998 (vuint16m1x2_t): Ditto.
27999 (vint16m1x3_t): Ditto.
28000 (vuint16m1x3_t): Ditto.
28001 (vint16m1x4_t): Ditto.
28002 (vuint16m1x4_t): Ditto.
28003 (vint16m1x5_t): Ditto.
28004 (vuint16m1x5_t): Ditto.
28005 (vint16m1x6_t): Ditto.
28006 (vuint16m1x6_t): Ditto.
28007 (vint16m1x7_t): Ditto.
28008 (vuint16m1x7_t): Ditto.
28009 (vint16m1x8_t): Ditto.
28010 (vuint16m1x8_t): Ditto.
28011 (vint16m2x2_t): Ditto.
28012 (vuint16m2x2_t): Ditto.
28013 (vint16m2x3_t): Ditto.
28014 (vuint16m2x3_t): Ditto.
28015 (vint16m2x4_t): Ditto.
28016 (vuint16m2x4_t): Ditto.
28017 (vint16m4x2_t): Ditto.
28018 (vuint16m4x2_t): Ditto.
28019 (vint32mf2x2_t): Ditto.
28020 (vuint32mf2x2_t): Ditto.
28021 (vint32mf2x3_t): Ditto.
28022 (vuint32mf2x3_t): Ditto.
28023 (vint32mf2x4_t): Ditto.
28024 (vuint32mf2x4_t): Ditto.
28025 (vint32mf2x5_t): Ditto.
28026 (vuint32mf2x5_t): Ditto.
28027 (vint32mf2x6_t): Ditto.
28028 (vuint32mf2x6_t): Ditto.
28029 (vint32mf2x7_t): Ditto.
28030 (vuint32mf2x7_t): Ditto.
28031 (vint32mf2x8_t): Ditto.
28032 (vuint32mf2x8_t): Ditto.
28033 (vint32m1x2_t): Ditto.
28034 (vuint32m1x2_t): Ditto.
28035 (vint32m1x3_t): Ditto.
28036 (vuint32m1x3_t): Ditto.
28037 (vint32m1x4_t): Ditto.
28038 (vuint32m1x4_t): Ditto.
28039 (vint32m1x5_t): Ditto.
28040 (vuint32m1x5_t): Ditto.
28041 (vint32m1x6_t): Ditto.
28042 (vuint32m1x6_t): Ditto.
28043 (vint32m1x7_t): Ditto.
28044 (vuint32m1x7_t): Ditto.
28045 (vint32m1x8_t): Ditto.
28046 (vuint32m1x8_t): Ditto.
28047 (vint32m2x2_t): Ditto.
28048 (vuint32m2x2_t): Ditto.
28049 (vint32m2x3_t): Ditto.
28050 (vuint32m2x3_t): Ditto.
28051 (vint32m2x4_t): Ditto.
28052 (vuint32m2x4_t): Ditto.
28053 (vint32m4x2_t): Ditto.
28054 (vuint32m4x2_t): Ditto.
28055 (vint64m1x2_t): Ditto.
28056 (vuint64m1x2_t): Ditto.
28057 (vint64m1x3_t): Ditto.
28058 (vuint64m1x3_t): Ditto.
28059 (vint64m1x4_t): Ditto.
28060 (vuint64m1x4_t): Ditto.
28061 (vint64m1x5_t): Ditto.
28062 (vuint64m1x5_t): Ditto.
28063 (vint64m1x6_t): Ditto.
28064 (vuint64m1x6_t): Ditto.
28065 (vint64m1x7_t): Ditto.
28066 (vuint64m1x7_t): Ditto.
28067 (vint64m1x8_t): Ditto.
28068 (vuint64m1x8_t): Ditto.
28069 (vint64m2x2_t): Ditto.
28070 (vuint64m2x2_t): Ditto.
28071 (vint64m2x3_t): Ditto.
28072 (vuint64m2x3_t): Ditto.
28073 (vint64m2x4_t): Ditto.
28074 (vuint64m2x4_t): Ditto.
28075 (vint64m4x2_t): Ditto.
28076 (vuint64m4x2_t): Ditto.
28077 (vfloat32mf2x2_t): Ditto.
28078 (vfloat32mf2x3_t): Ditto.
28079 (vfloat32mf2x4_t): Ditto.
28080 (vfloat32mf2x5_t): Ditto.
28081 (vfloat32mf2x6_t): Ditto.
28082 (vfloat32mf2x7_t): Ditto.
28083 (vfloat32mf2x8_t): Ditto.
28084 (vfloat32m1x2_t): Ditto.
28085 (vfloat32m1x3_t): Ditto.
28086 (vfloat32m1x4_t): Ditto.
28087 (vfloat32m1x5_t): Ditto.
28088 (vfloat32m1x6_t): Ditto.
28089 (vfloat32m1x7_t): Ditto.
28090 (vfloat32m1x8_t): Ditto.
28091 (vfloat32m2x2_t): Ditto.
28092 (vfloat32m2x3_t): Ditto.
28093 (vfloat32m2x4_t): Ditto.
28094 (vfloat32m4x2_t): Ditto.
28095 (vfloat64m1x2_t): Ditto.
28096 (vfloat64m1x3_t): Ditto.
28097 (vfloat64m1x4_t): Ditto.
28098 (vfloat64m1x5_t): Ditto.
28099 (vfloat64m1x6_t): Ditto.
28100 (vfloat64m1x7_t): Ditto.
28101 (vfloat64m1x8_t): Ditto.
28102 (vfloat64m2x2_t): Ditto.
28103 (vfloat64m2x3_t): Ditto.
28104 (vfloat64m2x4_t): Ditto.
28105 (vfloat64m4x2_t): Ditto.
28106 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
28108 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
28109 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
28111 (TUPLE_ENTRY): Ditto.
28112 (riscv_v_ext_mode_p): New function.
28113 (riscv_v_adjust_nunits): Add tuple mode adjustment.
28114 (riscv_classify_address): Ditto.
28115 (riscv_binary_cost): Ditto.
28116 (riscv_rtx_costs): Ditto.
28117 (riscv_secondary_memory_needed): Ditto.
28118 (riscv_hard_regno_nregs): Ditto.
28119 (riscv_hard_regno_mode_ok): Ditto.
28120 (riscv_vector_mode_supported_p): Ditto.
28121 (riscv_regmode_natural_size): Ditto.
28122 (riscv_array_mode): New function.
28123 (TARGET_ARRAY_MODE): New target hook.
28124 * config/riscv/riscv.md: Add tuple modes.
28125 * config/riscv/vector-iterators.md: Ditto.
28126 * config/riscv/vector.md (mov<mode>): Add tuple modes data
28128 (*mov<VT:mode>_<P:mode>): Ditto.
28130 2023-05-03 Richard Biener <rguenther@suse.de>
28132 * cse.cc (cse_insn): Track an equivalence to the destination
28133 separately and delay using src_related for it.
28135 2023-05-03 Richard Biener <rguenther@suse.de>
28137 * cse.cc (HASH): Turn into inline function and mix
28138 in another HASH_SHIFT bits.
28139 (SAFE_HASH): Likewise.
28141 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28144 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
28145 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
28147 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28150 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
28151 (add<mode>3<vczle><vczbe>): ... This.
28152 (sub<mode>3): Rename to...
28153 (sub<mode>3<vczle><vczbe>): ... This.
28154 (mul<mode>3): Rename to...
28155 (mul<mode>3<vczle><vczbe>): ... This.
28156 (*div<mode>3): Rename to...
28157 (*div<mode>3<vczle><vczbe>): ... This.
28158 (neg<mode>2): Rename to...
28159 (neg<mode>2<vczle><vczbe>): ... This.
28160 (abs<mode>2): Rename to...
28161 (abs<mode>2<vczle><vczbe>): ... This.
28162 (<frint_pattern><mode>2): Rename to...
28163 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
28164 (<fmaxmin><mode>3): Rename to...
28165 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
28166 (*sqrt<mode>2): Rename to...
28167 (*sqrt<mode>2<vczle><vczbe>): ... This.
28169 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
28171 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
28173 2023-05-03 Martin Liska <mliska@suse.cz>
28175 PR tree-optimization/109693
28176 * value-range-storage.cc (vrange_allocator::vrange_allocator):
28177 Remove unused field.
28178 * value-range-storage.h: Likewise.
28180 2023-05-02 Andrew Pinski <apinski@marvell.com>
28182 * tree-ssa-phiopt.cc (move_stmt): New function.
28183 (match_simplify_replacement): Use move_stmt instead
28184 of the inlined version.
28186 2023-05-02 Andrew Pinski <apinski@marvell.com>
28188 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
28191 2023-05-02 Andrew Pinski <apinski@marvell.com>
28193 PR tree-optimization/109702
28194 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
28195 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
28197 2023-05-02 Andrew Pinski <apinski@marvell.com>
28200 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
28201 insn_and_split pattern.
28203 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28205 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
28208 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28210 * config/riscv/sync.md (mem_thread_fence_1): Change fence
28211 depending on the given memory model.
28213 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28215 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
28216 riscv_union_memmodels function to sync.md.
28217 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
28218 get the union of two memmodels in sync.md.
28219 (riscv_print_operand): Add %I and %J flags that output the
28220 optimal LR/SC flag bits for a given memory model.
28221 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
28222 bits on SC op and replace with optimized %I, %J flags.
28224 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28226 * config/riscv/riscv.cc
28227 (riscv_memmodel_needs_amo_release): Change function name.
28228 (riscv_print_operand): Remove unneeded %F case.
28229 * config/riscv/sync.md: Remove unneeded fences.
28231 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28234 * config/riscv/sync.md (atomic_store<mode>): Use simple store
28235 instruction in combination with fence(s).
28237 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28239 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
28240 of %A to include release bits.
28242 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28244 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
28245 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
28248 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28250 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
28251 sequentially consistent LR.aqrl/SC.rl pairs.
28253 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
28255 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
28256 sanitize memmodel input with memmodel_base.
28258 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
28259 Pan Li <pan2.li@intel.com>
28262 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
28264 2023-05-02 Romain Naour <romain.naour@gmail.com>
28266 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
28269 2023-05-02 Martin Liska <mliska@suse.cz>
28271 * doc/invoke.texi: Update documentation based on param.opt file.
28273 2023-05-02 Richard Biener <rguenther@suse.de>
28275 PR tree-optimization/109672
28276 * tree-vect-stmts.cc (vectorizable_operation): For plus,
28277 minus and negate always check the vector mode is word mode.
28279 2023-05-01 Andrew Pinski <apinski@marvell.com>
28281 * tree-ssa-phiopt.cc: Update comment about
28282 how the transformation are implemented.
28284 2023-05-01 Jeff Law <jlaw@ventanamicro>
28286 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
28288 2023-05-01 Jeff Law <jlaw@ventanamicro>
28290 * config/cris/cris.cc (TARGET_LRA_P): Remove.
28291 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
28292 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
28293 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
28294 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
28295 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
28297 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
28299 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
28300 * print-tree.cc (print_decl_identifier): Implement it.
28301 * toplev.cc (output_stack_usage_1): Use it.
28303 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28305 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
28308 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28310 * value-range.h (irange::set_nonzero): Inline.
28312 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28314 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
28316 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
28317 invalid_range, as it is an inverse range.
28318 * tree-vrp.cc (find_case_label_range): Avoid trees.
28319 * value-range.cc (irange::irange_set): Delete.
28320 (irange::irange_set_1bit_anti_range): Delete.
28321 (irange::irange_set_anti_range): Delete.
28322 (irange::set): Cleanup.
28323 * value-range.h (class irange): Remove irange_set,
28324 irange_set_anti_range, irange_set_1bit_anti_range.
28325 (irange::set_undefined): Remove set to m_type.
28327 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28329 * range-op.cc (update_known_bitmask): Adjust for irange containing
28330 wide_ints internally.
28331 * tree-ssanames.cc (set_nonzero_bits): Same.
28332 * tree-ssanames.h (set_nonzero_bits): Same.
28333 * value-range-storage.cc (irange_storage::set_irange): Same.
28334 (irange_storage::get_irange): Same.
28335 * value-range.cc (irange::operator=): Same.
28336 (irange::irange_set): Same.
28337 (irange::irange_set_1bit_anti_range): Same.
28338 (irange::irange_set_anti_range): Same.
28339 (irange::set): Same.
28340 (irange::verify_range): Same.
28341 (irange::contains_p): Same.
28342 (irange::irange_single_pair_union): Same.
28343 (irange::union_): Same.
28344 (irange::irange_contains_p): Same.
28345 (irange::intersect): Same.
28346 (irange::invert): Same.
28347 (irange::set_range_from_nonzero_bits): Same.
28348 (irange::set_nonzero_bits): Same.
28349 (mask_to_wi): Same.
28350 (irange::intersect_nonzero_bits): Same.
28351 (irange::union_nonzero_bits): Same.
28354 (tree_range): Same.
28355 (range_tests_strict_enum): Same.
28356 (range_tests_misc): Same.
28357 (range_tests_nonzero_bits): Same.
28358 * value-range.h (irange::type): Same.
28359 (irange::varying_compatible_p): Same.
28360 (irange::irange): Same.
28361 (int_range::int_range): Same.
28362 (irange::set_undefined): Same.
28363 (irange::set_varying): Same.
28364 (irange::lower_bound): Same.
28365 (irange::upper_bound): Same.
28367 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28369 * gimple-range-fold.cc (tree_lower_bound): Delete.
28370 (tree_upper_bound): Delete.
28371 (vrp_val_max): Delete.
28372 (vrp_val_min): Delete.
28373 (fold_using_range::range_of_ssa_name_with_loop_info): Call
28374 range_of_var_in_loop.
28375 * vr-values.cc (valid_value_p): Delete.
28376 (fix_overflow): Delete.
28377 (get_scev_info): New.
28378 (bounds_of_var_in_loop): Refactor into...
28379 (induction_variable_may_overflow_p): ...this,
28380 (range_from_loop_direction): ...and this,
28381 (range_of_var_in_loop): ...and this.
28382 * vr-values.h (bounds_of_var_in_loop): Delete.
28383 (range_of_var_in_loop): New.
28385 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28387 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
28389 (vrp_val_max): New.
28390 (vrp_val_min): New.
28391 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
28392 * range-op.cc (max_limit): Same.
28394 (plus_minus_ranges): Same.
28395 (operator_rshift::op1_range): Same.
28396 (operator_cast::inside_domain_p): Same.
28397 * value-range.cc (vrp_val_is_max): Delete.
28398 (vrp_val_is_min): Delete.
28399 (range_tests_misc): Use irange_val_*.
28400 * value-range.h (vrp_val_is_min): Delete.
28401 (vrp_val_is_max): Delete.
28402 (vrp_val_max): Delete.
28403 (irange_val_min): New.
28404 (vrp_val_min): Delete.
28405 (irange_val_max): New.
28406 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
28408 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28410 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
28411 * gimple-fold.cc (size_must_be_zero_p): Same.
28412 * gimple-loop-versioning.cc
28413 (loop_versioning::prune_loop_conditions): Same.
28414 * gimple-range-edge.cc (gcond_edge_range): Same.
28415 (gimple_outgoing_range::calc_switch_ranges): Same.
28416 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
28417 (adjust_realpart_expr): Same.
28418 (fold_using_range::range_of_address): Same.
28419 (fold_using_range::relation_fold_and_or): Same.
28420 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
28421 (range_is_either_true_or_false): Same.
28422 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
28423 (cfn_clz::fold_range): Same.
28424 (cfn_ctz::fold_range): Same.
28425 * gimple-range-tests.cc (class test_expr_eval): Same.
28426 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
28427 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
28428 (propagate_vr_across_jump_function): Same.
28429 (decide_whether_version_node): Same.
28430 * ipa-prop.cc (ipa_get_value_range): Same.
28431 * ipa-prop.h (ipa_range_set_and_normalize): Same.
28432 * range-op.cc (get_shift_range): Same.
28433 (value_range_from_overflowed_bounds): Same.
28434 (value_range_with_overflow): Same.
28435 (create_possibly_reversed_range): Same.
28436 (equal_op1_op2_relation): Same.
28437 (not_equal_op1_op2_relation): Same.
28438 (lt_op1_op2_relation): Same.
28439 (le_op1_op2_relation): Same.
28440 (gt_op1_op2_relation): Same.
28441 (ge_op1_op2_relation): Same.
28442 (operator_mult::op1_range): Same.
28443 (operator_exact_divide::op1_range): Same.
28444 (operator_lshift::op1_range): Same.
28445 (operator_rshift::op1_range): Same.
28446 (operator_cast::op1_range): Same.
28447 (operator_logical_and::fold_range): Same.
28448 (set_nonzero_range_from_mask): Same.
28449 (operator_bitwise_or::op1_range): Same.
28450 (operator_bitwise_xor::op1_range): Same.
28451 (operator_addr_expr::fold_range): Same.
28452 (pointer_plus_operator::wi_fold): Same.
28453 (pointer_or_operator::op1_range): Same.
28460 (range_op_cast_tests): Same.
28461 (range_op_lshift_tests): Same.
28462 (range_op_rshift_tests): Same.
28463 (range_op_bitwise_and_tests): Same.
28464 (range_relational_tests): Same.
28465 * range.cc (range_zero): Same.
28466 (range_nonzero): Same.
28467 * range.h (range_true): Same.
28468 (range_false): Same.
28469 (range_true_and_false): Same.
28470 * tree-data-ref.cc (split_constant_offset_1): Same.
28471 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
28472 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
28473 (find_unswitching_predicates_for_bb): Same.
28474 * tree-ssa-phiopt.cc (value_replacement): Same.
28475 * tree-ssa-threadbackward.cc
28476 (back_threader::find_taken_edge_cond): Same.
28477 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
28478 * tree-vrp.cc (find_case_label_range): Same.
28479 * value-query.cc (range_query::get_tree_range): Same.
28480 * value-range.cc (irange::set_nonnegative): Same.
28481 (frange::contains_p): Same.
28482 (frange::singleton_p): Same.
28483 (frange::internal_singleton_p): Same.
28484 (irange::irange_set): Same.
28485 (irange::irange_set_1bit_anti_range): Same.
28486 (irange::irange_set_anti_range): Same.
28487 (irange::set): Same.
28488 (irange::operator==): Same.
28489 (irange::singleton_p): Same.
28490 (irange::contains_p): Same.
28491 (irange::set_range_from_nonzero_bits): Same.
28492 (DEFINE_INT_RANGE_INSTANCE): Same.
28502 (range_uint128): New.
28503 (range_uchar): New.
28505 (build_range3): Convert to irange wide_int API.
28506 (range_tests_irange3): Same.
28507 (range_tests_int_range_max): Same.
28508 (range_tests_strict_enum): Same.
28509 (range_tests_misc): Same.
28510 (range_tests_nonzero_bits): Same.
28511 (range_tests_nan): Same.
28512 (range_tests_signed_zeros): Same.
28513 * value-range.h (Value_Range::Value_Range): Same.
28514 (irange::set): Same.
28515 (irange::nonzero_p): Same.
28516 (irange::contains_p): Same.
28517 (range_includes_zero_p): Same.
28518 (irange::set_nonzero): Same.
28519 (irange::set_zero): Same.
28520 (contains_zero_p): Same.
28521 (frange::contains_p): Same.
28523 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
28524 (bounds_of_var_in_loop): Same.
28525 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
28527 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28529 * value-range.cc (irange::irange_union): Rename to...
28530 (irange::union_): ...this.
28531 (irange::irange_intersect): Rename to...
28532 (irange::intersect): ...this.
28533 * value-range.h (irange::union_): Delete.
28534 (irange::intersect): Delete.
28536 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28538 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
28540 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28542 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
28544 (compare_ranges): Delete.
28545 (compare_range_with_value): Delete.
28546 (bounds_of_var_in_loop): Tidy up by using ranger API.
28547 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
28548 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
28549 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
28550 strict_overflow_p and only_ranges.
28551 (simplify_using_ranges::legacy_fold_cond): Adjust call to
28552 legacy_fold_cond_overflow.
28553 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
28555 (range_fits_type_p): Rename value_range to irange.
28556 * vr-values.h (range_fits_type_p): Adjust prototype.
28558 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28560 * value-range.cc (irange::irange_set_anti_range): Remove uses of
28561 tree_lower_bound and tree_upper_bound.
28562 (irange::verify_range): Same.
28563 (irange::operator==): Same.
28564 (irange::singleton_p): Same.
28565 * value-range.h (irange::tree_lower_bound): Delete.
28566 (irange::tree_upper_bound): Delete.
28567 (irange::lower_bound): Delete.
28568 (irange::upper_bound): Delete.
28569 (irange::zero_p): Remove uses of tree_lower_bound and
28572 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28574 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
28576 (determine_value_range): Same.
28577 (record_nonwrapping_iv): Same.
28578 (infer_loop_bounds_from_signedness): Same.
28579 (scev_var_range_cant_overflow): Same.
28580 * tree-vrp.cc (operand_less_p): Delete.
28581 * tree-vrp.h (operand_less_p): Delete.
28582 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
28583 (irange::value_inside_range): Delete.
28584 * value-range.h (vrange::kind): Delete.
28585 (irange::num_pairs): Remove check of m_kind.
28586 (irange::min): Delete.
28587 (irange::max): Delete.
28589 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
28591 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
28592 for vrange_storage.
28593 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
28594 (sbr_vector::grow): Same.
28595 (sbr_vector::set_bb_range): Same.
28596 (sbr_vector::get_bb_range): Same.
28597 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
28598 (sbr_sparse_bitmap::set_bb_range): Same.
28599 (sbr_sparse_bitmap::get_bb_range): Same.
28600 (block_range_cache::block_range_cache): Same.
28601 (ssa_global_cache::ssa_global_cache): Same.
28602 (ssa_global_cache::get_global_range): Same.
28603 (ssa_global_cache::set_global_range): Same.
28604 * gimple-range-cache.h: Same.
28605 * gimple-range-edge.cc
28606 (gimple_outgoing_range::gimple_outgoing_range): Same.
28607 (gimple_outgoing_range::switch_edge_range): Same.
28608 (gimple_outgoing_range::calc_switch_ranges): Same.
28609 * gimple-range-edge.h: Same.
28610 * gimple-range-infer.cc
28611 (infer_range_manager::infer_range_manager): Same.
28612 (infer_range_manager::get_nonzero): Same.
28613 (infer_range_manager::maybe_adjust_range): Same.
28614 (infer_range_manager::add_range): Same.
28615 * gimple-range-infer.h: Rename obstack_vrange_allocator to
28617 * tree-core.h (struct irange_storage_slot): Remove.
28618 (struct tree_ssa_name): Remove irange_info and frange_info. Make
28619 range_info a pointer to vrange_storage.
28620 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
28621 (range_info_alloc): Same.
28622 (range_info_free): Same.
28623 (range_info_get_range): Same.
28624 (range_info_set_range): Same.
28625 (get_nonzero_bits): Same.
28626 * value-query.cc (get_ssa_name_range_info): Same.
28627 * value-range-storage.cc (class vrange_internal_alloc): New.
28628 (class vrange_obstack_alloc): New.
28629 (class vrange_ggc_alloc): New.
28630 (vrange_allocator::vrange_allocator): New.
28631 (vrange_allocator::~vrange_allocator): New.
28632 (vrange_storage::alloc_slot): New.
28633 (vrange_allocator::alloc): New.
28634 (vrange_allocator::free): New.
28635 (vrange_allocator::clone): New.
28636 (vrange_allocator::clone_varying): New.
28637 (vrange_allocator::clone_undefined): New.
28638 (vrange_storage::alloc): New.
28639 (vrange_storage::set_vrange): Remove slot argument.
28640 (vrange_storage::get_vrange): Same.
28641 (vrange_storage::fits_p): Same.
28642 (vrange_storage::equal_p): New.
28643 (irange_storage::write_lengths_address): New.
28644 (irange_storage::lengths_address): New.
28645 (irange_storage_slot::alloc_slot): Remove.
28646 (irange_storage::alloc): New.
28647 (irange_storage_slot::irange_storage_slot): Remove.
28648 (irange_storage::irange_storage): New.
28649 (write_wide_int): New.
28650 (irange_storage_slot::set_irange): Remove.
28651 (irange_storage::set_irange): New.
28652 (read_wide_int): New.
28653 (irange_storage_slot::get_irange): Remove.
28654 (irange_storage::get_irange): New.
28655 (irange_storage_slot::size): Remove.
28656 (irange_storage::equal_p): New.
28657 (irange_storage_slot::num_wide_ints_needed): Remove.
28658 (irange_storage::size): New.
28659 (irange_storage_slot::fits_p): Remove.
28660 (irange_storage::fits_p): New.
28661 (irange_storage_slot::dump): Remove.
28662 (irange_storage::dump): New.
28663 (frange_storage_slot::alloc_slot): Remove.
28664 (frange_storage::alloc): New.
28665 (frange_storage_slot::set_frange): Remove.
28666 (frange_storage::set_frange): New.
28667 (frange_storage_slot::get_frange): Remove.
28668 (frange_storage::get_frange): New.
28669 (frange_storage_slot::fits_p): Remove.
28670 (frange_storage::equal_p): New.
28671 (frange_storage::fits_p): New.
28672 (ggc_vrange_allocator): New.
28673 (ggc_alloc_vrange_storage): New.
28674 * value-range-storage.h (class vrange_storage): Rewrite.
28675 (class irange_storage): Rewrite.
28676 (class frange_storage): Rewrite.
28677 (class obstack_vrange_allocator): Remove.
28678 (class ggc_vrange_allocator): Remove.
28679 (vrange_allocator::alloc_vrange): Remove.
28680 (vrange_allocator::alloc_irange): Remove.
28681 (vrange_allocator::alloc_frange): Remove.
28682 (ggc_alloc_vrange_storage): New.
28683 * value-range.h (class irange): Rename vrange_allocator to
28685 (class frange): Same.
28687 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
28689 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
28690 inc to avoid clobbering the carry flag.
28692 2023-04-30 Andrew Pinski <apinski@marvell.com>
28694 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
28695 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
28697 2023-04-30 Andrew Pinski <apinski@marvell.com>
28699 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
28700 Allow some builtin/internal function calls which
28701 are known not to trap/throw.
28702 (phiopt_worker::match_simplify_replacement):
28703 Use name instead of getting the lhs again.
28705 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
28707 * configure: Regenerate.
28708 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
28710 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
28712 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
28713 emit_insn_if_valid_for_reload.
28714 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
28715 to be recognized, also try emitting a parallel that clobbers
28716 TARGET_FLAGS_REGNUM, as applicable.
28718 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
28720 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
28722 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
28723 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
28725 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
28727 * config/stormy16/stormy16.md (any_lshift): New code iterator.
28728 (any_or_plus): Likewise.
28729 (any_rotate): Likewise.
28730 (*<any_lshift>_and_internal): New define_insn_and_split to
28731 recognize a logical shift followed by an AND, and split it
28732 again after reload.
28733 (*swpn): New define_insn matching xstormy16's swpn.
28734 (*swpn_zext): New define_insn recognizing swpn followed by
28735 zero_extendqihi2, i.e. with the high byte set to zero.
28736 (*swpn_sext): Likewise, for swpn followed by cbw.
28737 (*swpn_sext_2): Likewise, for an alternate RTL form.
28738 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
28739 sequence is split in the correct place to recognize the *swpn_zext
28740 followed by any_or_plus (ior, xor or plus) instruction.
28742 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
28745 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
28746 (lm32-*-uclinux*): Likewise.
28748 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
28750 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
28751 for riscv_use_save_libcall.
28752 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
28753 (riscv_compute_frame_info): restructure to decouple stack allocation
28754 for rv32e w/o save-restore.
28756 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
28758 * doc/install.texi: Fix documentation typo
28760 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
28762 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
28763 (u): Add div/udiv cases.
28764 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
28765 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
28767 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
28768 (thead_c906_tune_info): Likewise.
28769 (optimize_size_tune_info): Likewise.
28770 (riscv_use_divmod_expander): New function.
28771 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
28773 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
28775 * config/riscv/bitmanip.md: Added clmulr instruction.
28776 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
28777 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
28779 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
28780 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
28781 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
28782 functions to riscv-cmo.def.
28783 * config/riscv/generic.md: Add clmul to list of instructions
28784 using the generic_imul reservation.
28786 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
28788 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
28790 2023-04-28 Andrew Pinski <apinski@marvell.com>
28792 PR tree-optimization/100958
28793 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
28794 (pass_phiopt::execute): Don't call two_value_replacement.
28795 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
28796 handle what two_value_replacement did.
28798 2023-04-28 Andrew Pinski <apinski@marvell.com>
28800 * match.pd: Add patterns for
28801 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
28803 2023-04-28 Andrew Pinski <apinski@marvell.com>
28805 * match.pd: Factor out the deciding the min/max from
28806 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
28808 * fold-const.cc (minmax_from_comparison): this new function.
28809 * fold-const.h (minmax_from_comparison): New prototype.
28811 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
28813 PR rtl-optimization/109476
28814 * lower-subreg.cc: Include explow.h for force_reg.
28815 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
28816 If decomposing a suitable LSHIFTRT and we're not splitting
28817 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
28818 instead of setting a high part SUBREG to zero, which helps combine.
28819 (decompose_multiword_subregs): Update call to resolve_shift_zext.
28821 2023-04-28 Richard Biener <rguenther@suse.de>
28823 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
28825 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
28826 gather-scatter info and cost emulated scatters accordingly.
28827 (get_load_store_type): Support emulated scatters.
28828 (vectorizable_store): Likewise. Emulate them by extracting
28829 scalar offsets and data, doing scalar stores.
28831 2023-04-28 Richard Biener <rguenther@suse.de>
28833 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
28834 Tame down element extracts and scalar loads for gather/scatter
28835 similar to elementwise strided accesses.
28837 2023-04-28 Pan Li <pan2.li@intel.com>
28838 kito-cheng <kito.cheng@sifive.com>
28840 * config/riscv/vector.md: Add new define split to perform
28841 the simplification.
28843 2023-04-28 Richard Biener <rguenther@suse.de>
28846 * ipa-param-manipulation.cc
28847 (ipa_param_body_adjustments::modify_expression): Allow
28848 conversion of a register to a non-register type. Elide
28849 conversions inside BIT_FIELD_REFs.
28851 2023-04-28 Richard Biener <rguenther@suse.de>
28853 PR tree-optimization/109644
28854 * tree-cfg.cc (verify_types_in_gimple_reference): Check
28855 register constraints on the outermost VIEW_CONVERT_EXPR
28856 only. Do not allow register or invariant bases on
28857 multi-level or possibly variable index handled components.
28859 2023-04-28 Richard Biener <rguenther@suse.de>
28861 * gimplify.cc (gimplify_compound_lval): When there's a
28862 non-register type produced by one of the handled component
28863 operations make sure we get a non-register base.
28865 2023-04-28 Richard Biener <rguenther@suse.de>
28867 PR tree-optimization/108752
28868 * tree-vect-generic.cc (build_replicated_const): Rename
28869 to build_replicated_int_cst and move to tree.{h,cc}.
28870 (do_plus_minus): Adjust.
28871 (do_negate): Likewise.
28872 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
28873 arithmetic vector operations in lowered form.
28874 * tree.h (build_replicated_int_cst): Declare.
28875 * tree.cc (build_replicated_int_cst): Moved from
28876 tree-vect-generic.cc build_replicated_const.
28878 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28881 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
28882 (aarch64_rbit<mode><vczle><vczbe>): ... This.
28883 (neg<mode>2): Rename to...
28884 (neg<mode>2<vczle><vczbe>): ... This.
28885 (abs<mode>2): Rename to...
28886 (abs<mode>2<vczle><vczbe>): ... This.
28887 (aarch64_abs<mode>): Rename to...
28888 (aarch64_abs<mode><vczle><vczbe>): ... This.
28889 (one_cmpl<mode>2): Rename to...
28890 (one_cmpl<mode>2<vczle><vczbe>): ... This.
28891 (clrsb<mode>2): Rename to...
28892 (clrsb<mode>2<vczle><vczbe>): ... This.
28893 (clz<mode>2): Rename to...
28894 (clz<mode>2<vczle><vczbe>): ... This.
28895 (popcount<mode>2): Rename to...
28896 (popcount<mode>2<vczle><vczbe>): ... This.
28898 2023-04-28 Jakub Jelinek <jakub@redhat.com>
28900 * gimple-range-op.cc (class cfn_sqrt): New type.
28901 (op_cfn_sqrt): New variable.
28902 (gimple_range_op_handler::maybe_builtin_call): Handle
28903 CASE_CFN_SQRT{,_FN}.
28905 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
28906 Jakub Jelinek <jakub@redhat.com>
28908 * value-range.h (frange_nextafter): Declare.
28909 * gimple-range-op.cc (class cfn_sincos): New.
28910 (op_cfn_sin, op_cfn_cos): New variables.
28911 (gimple_range_op_handler::maybe_builtin_call): Handle
28912 CASE_CFN_{SIN,COS}{,_FN}.
28914 2023-04-28 Jakub Jelinek <jakub@redhat.com>
28916 * target.def (libm_function_max_error): New target hook.
28917 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
28918 * doc/tm.texi: Regenerated.
28919 * targhooks.h (default_libm_function_max_error,
28920 glibc_linux_libm_function_max_error): Declare.
28921 * targhooks.cc: Include case-cfn-macros.h.
28922 (default_libm_function_max_error,
28923 glibc_linux_libm_function_max_error): New functions.
28924 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28925 * config/linux-protos.h (linux_libm_function_max_error): Declare.
28926 * config/linux.cc: Include target.h and targhooks.h.
28927 (linux_libm_function_max_error): New function.
28928 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
28929 (arc_libm_function_max_error): New function.
28930 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28931 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
28932 (ix86_libm_function_max_error): New function.
28933 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28934 * config/rs6000/rs6000-protos.h
28935 (rs6000_linux_libm_function_max_error): Declare.
28936 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
28937 and case-cfn-macros.h.
28938 (rs6000_linux_libm_function_max_error): New function.
28939 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28940 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28941 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
28942 (or1k_libm_function_max_error): New function.
28943 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28945 2023-04-28 Alexandre Oliva <oliva@adacore.com>
28947 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
28948 Move detach value calls...
28949 (pass_harden_conditional_branches::execute): ... here.
28950 (pass_harden_compares::execute): Detach values before
28953 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
28955 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
28956 (cml<addsub_as><mode>4): Likewise.
28957 (vec_addsub<mode>3): Likewise.
28958 (cadd<rot><mode>3): Likewise.
28959 (vec_fmaddsub<mode>4): Likewise.
28960 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
28962 2023-04-27 Andrew Pinski <apinski@marvell.com>
28964 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
28965 up to 2 min/max expressions in the sequence/match code.
28967 2023-04-27 Andrew Pinski <apinski@marvell.com>
28969 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
28971 * tree-eh.cc (operation_could_trap_helper_p): Treate
28972 MIN_EXPR/MAX_EXPR similar as other comparisons.
28974 2023-04-27 Andrew Pinski <apinski@marvell.com>
28976 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
28978 (cond_if_else_store_replacement): Likewise.
28979 (get_non_trapping): Likewise.
28980 (store_elim_worker): Move into ...
28981 (pass_cselim::execute): This.
28983 2023-04-27 Andrew Pinski <apinski@marvell.com>
28985 * tree-ssa-phiopt.cc (two_value_replacement): Remove
28987 (match_simplify_replacement): Likewise.
28988 (factor_out_conditional_conversion): Likewise.
28989 (value_replacement): Likewise.
28990 (minmax_replacement): Likewise.
28991 (spaceship_replacement): Likewise.
28992 (cond_removal_in_builtin_zero_pattern): Likewise.
28993 (hoist_adjacent_loads): Likewise.
28994 (tree_ssa_phiopt_worker): Move into ...
28995 (pass_phiopt::execute): this.
28997 2023-04-27 Andrew Pinski <apinski@marvell.com>
28999 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
29000 do_store_elim argument and split that part out to ...
29001 (store_elim_worker): This new function.
29002 (pass_cselim::execute): Call store_elim_worker.
29003 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
29005 2023-04-27 Jan Hubicka <jh@suse.cz>
29007 * cfgloopmanip.h (unloop_loops): Export.
29008 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
29009 that no longer loop.
29010 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
29011 vectors of loops to unloop.
29012 (canonicalize_induction_variables): Free vectors here.
29013 (tree_unroll_loops_completely): Free vectors here.
29015 2023-04-27 Richard Biener <rguenther@suse.de>
29017 PR tree-optimization/109170
29018 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
29019 Handle __builtin_expect and similar via cfn_pass_through_arg1
29020 and inspecting the calls fnspec.
29021 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
29022 and BUILT_IN_EXPECT_WITH_PROBABILITY.
29024 2023-04-27 Alexandre Oliva <oliva@adacore.com>
29026 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
29028 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
29030 PR tree-optimization/109639
29031 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
29032 (propagate_vr_across_jump_function): Same.
29033 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
29034 * ipa-prop.h (ipa_range_set_and_normalize): New.
29035 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
29037 2023-04-27 Richard Biener <rguenther@suse.de>
29039 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
29040 create a CTOR operand in the result when simplifying GIMPLE.
29042 2023-04-27 Richard Biener <rguenther@suse.de>
29044 * gimplify.cc (gimplify_compound_lval): When the base
29045 gimplified to a register make sure to split up chains
29048 2023-04-27 Richard Biener <rguenther@suse.de>
29051 * ipa-param-manipulation.h
29052 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
29054 * ipa-param-manipulation.cc
29055 (ipa_param_body_adjustments::modify_expression): Likewise.
29056 When we need a conversion and the replacement is a register
29057 split the conversion out.
29058 (ipa_param_body_adjustments::modify_assignment): Pass
29059 extra_stmts to RHS modify_expression.
29061 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
29063 * doc/extend.texi (Zero Length): Describe example.
29065 2023-04-27 Richard Biener <rguenther@suse.de>
29067 PR tree-optimization/109594
29068 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
29069 what we rewrite to a register based on the above.
29071 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
29073 * config/riscv/riscv.cc: Fix whitespace.
29074 * config/riscv/sync.md: Fix whitespace.
29076 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
29078 PR tree-optimization/108697
29079 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
29080 not clear the vector on an out of range query.
29081 (ssa_cache::dump): Use dump_range_query instead of get_range.
29082 (ssa_cache::dump_range_query): New.
29083 (ssa_lazy_cache::dump_range_query): New.
29084 (ssa_lazy_cache::set_range): New.
29085 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
29086 (class ssa_lazy_cache): New.
29087 (ssa_lazy_cache::ssa_lazy_cache): New.
29088 (ssa_lazy_cache::~ssa_lazy_cache): New.
29089 (ssa_lazy_cache::get_range): New.
29090 (ssa_lazy_cache::clear_range): New.
29091 (ssa_lazy_cache::clear): New.
29092 (ssa_lazy_cache::dump): New.
29093 * gimple-range-path.cc (path_range_query::path_range_query): Do
29094 not allocate a ssa_cache object nor has_cache bitmap.
29095 (path_range_query::~path_range_query): Do not free objects.
29096 (path_range_query::clear_cache): Remove.
29097 (path_range_query::get_cache): Adjust.
29098 (path_range_query::set_cache): Remove.
29099 (path_range_query::dump): Don't call through a pointer.
29100 (path_range_query::internal_range_of_expr): Set cache directly.
29101 (path_range_query::reset_path): Clear cache directly.
29102 (path_range_query::ssa_range_in_phi): Fold with globals only.
29103 (path_range_query::compute_ranges_in_phis): Simply set range.
29104 (path_range_query::compute_ranges_in_block): Call cache directly.
29105 * gimple-range-path.h (class path_range_query): Replace bitmap
29106 and cache pointer with lazy cache object.
29107 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
29109 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
29111 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
29112 (ssa_cache::~ssa_cache): Rename.
29113 (ssa_cache::has_range): New.
29114 (ssa_cache::get_range): Rename.
29115 (ssa_cache::set_range): Rename.
29116 (ssa_cache::clear_range): Rename.
29117 (ssa_cache::clear): Rename.
29118 (ssa_cache::dump): Rename and use get_range.
29119 (ranger_cache::get_global_range): Use get_range and set_range.
29120 (ranger_cache::range_of_def): Use get_range.
29121 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
29122 (class ranger_cache): Use ssa_cache.
29123 * gimple-range-path.cc (path_range_query::path_range_query): Use
29125 (path_range_query::get_cache): Use get_range.
29126 (path_range_query::set_cache): Use set_range.
29127 * gimple-range-path.h (class path_range_query): Use ssa_cache.
29128 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
29129 (assume_query::range_of_expr): Use get_range.
29130 (assume_query::assume_query): Use set_range.
29131 (assume_query::calculate_op): Use get_range and set_range.
29132 * gimple-range.h (class assume_query): Use ssa_cache.
29134 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
29136 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
29137 and local to optionally zero memory.
29138 (br_vector::grow): Only zero memory if flag is set.
29139 (class sbr_lazy_vector): New.
29140 (sbr_lazy_vector::sbr_lazy_vector): New.
29141 (sbr_lazy_vector::set_bb_range): New.
29142 (sbr_lazy_vector::get_bb_range): New.
29143 (sbr_lazy_vector::bb_range_p): New.
29144 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
29145 * gimple-range-gori.cc (gori_map::calculate_gori): Use
29146 param_vrp_switch_limit.
29147 (gori_compute::gori_compute): Use param_vrp_switch_limit.
29148 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
29149 (vrp_switch_limit): Rename from evrp_switch_limit.
29150 (vrp_vector_threshold): New.
29152 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
29154 * value-relation.cc (dom_oracle::query_relation): Check early for lack
29156 * value-relation.h (equiv_oracle::has_equiv_p): New.
29158 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
29160 PR tree-optimization/109417
29161 * gimple-range-gori.cc (range_def_chain::register_dependency):
29162 Save the ssa version number, not the pointer.
29163 (gori_compute::may_recompute_p): No need to check if a dependency
29164 is in the free list.
29165 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
29166 fields to be unsigned int instead of trees.
29167 (ange_def_chain::depend1): Adjust.
29168 (ange_def_chain::depend2): Adjust.
29169 * gimple-range.h: Include "ssa.h" to inline ssa_name().
29171 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
29173 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
29174 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
29175 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
29177 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
29180 * config/riscv/riscv-protos.h: Add helper function stubs.
29181 * config/riscv/riscv.cc: Add helper functions for subword masking.
29182 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
29183 -mno-inline-atomics.
29184 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
29185 fetch_and_nand, CAS, and exchange ops.
29186 * doc/invoke.texi: Add blurb regarding new command-line flags
29187 -minline-atomics and -mno-inline-atomics.
29189 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29191 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
29192 Reimplement using standard RTL codes instead of unspec.
29193 (aarch64_rshrn2<mode>_insn_be): Likewise.
29194 (aarch64_rshrn2<mode>): Adjust for the above.
29195 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
29197 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29199 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
29200 with standard RTL codes instead of an UNSPEC.
29201 (aarch64_rshrn<mode>_insn_be): Likewise.
29202 (aarch64_rshrn<mode>): Adjust for the above.
29203 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
29205 2023-04-26 Pan Li <pan2.li@intel.com>
29206 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29208 * config/riscv/riscv.cc (riscv_classify_address): Allow
29209 const0_rtx for the RVV load/store.
29211 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29213 * range-op.cc (range_op_cast_tests): Remove legacy support.
29214 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
29215 * value-range.cc (irange::operator=): Same.
29216 (get_legacy_range): Same.
29217 (irange::copy_legacy_to_multi_range): Delete.
29218 (irange::copy_to_legacy): Delete.
29219 (irange::irange_set_anti_range): Delete.
29220 (irange::set): Remove legacy support.
29221 (irange::verify_range): Same.
29222 (irange::legacy_lower_bound): Delete.
29223 (irange::legacy_upper_bound): Delete.
29224 (irange::legacy_equal_p): Delete.
29225 (irange::operator==): Remove legacy support.
29226 (irange::singleton_p): Same.
29227 (irange::value_inside_range): Same.
29228 (irange::contains_p): Same.
29229 (intersect_ranges): Delete.
29230 (irange::legacy_intersect): Delete.
29231 (union_ranges): Delete.
29232 (irange::legacy_union): Delete.
29233 (irange::legacy_verbose_union_): Delete.
29234 (irange::legacy_verbose_intersect): Delete.
29235 (irange::irange_union): Remove legacy support.
29236 (irange::irange_intersect): Same.
29237 (irange::intersect): Same.
29238 (irange::invert): Same.
29239 (ranges_from_anti_range): Delete.
29240 (gt_pch_nx): Adjust for legacy removal.
29242 (range_tests_legacy): Delete.
29243 (range_tests_misc): Adjust for legacy removal.
29244 (range_tests): Same.
29245 * value-range.h (class irange): Same.
29246 (irange::legacy_mode_p): Delete.
29247 (ranges_from_anti_range): Delete.
29248 (irange::nonzero_p): Adjust for legacy removal.
29249 (irange::lower_bound): Same.
29250 (irange::upper_bound): Same.
29251 (irange::union_): Same.
29252 (irange::intersect): Same.
29253 (irange::set_nonzero): Same.
29254 (irange::set_zero): Same.
29255 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
29257 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29259 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
29260 of range_has_numeric_bounds_p with irange API.
29261 (range_has_numeric_bounds_p): Delete.
29262 * value-range.h (range_has_numeric_bounds_p): Delete.
29264 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29266 * tree-data-ref.cc (compute_distributive_range): Replace uses of
29267 range_int_cst_p with irange API.
29268 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
29269 * tree-vrp.h (range_int_cst_p): Delete.
29270 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
29271 range_int_cst_p with irange API.
29272 (vr_set_zero_nonzero_bits): Same.
29273 (range_fits_type_p): Same.
29274 (simplify_using_ranges::simplify_casted_cond): Same.
29275 * tree-vrp.cc (range_int_cst_p): Remove.
29277 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29279 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
29281 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29283 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
29284 API uses to new API.
29285 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
29286 * internal-fn.cc (get_min_precision): Same.
29288 * tree-affine.cc (expr_to_aff_combination): Same.
29289 * tree-data-ref.cc (dr_step_indicator): Same.
29290 * tree-dfa.cc (get_ref_base_and_extent): Same.
29291 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
29292 * tree-ssa-phiopt.cc (two_value_replacement): Same.
29293 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
29294 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
29295 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
29296 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
29297 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
29298 * tree.cc (get_range_pos_neg): Same.
29300 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29302 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
29303 vrange::dump instead of ad-hoc dumper.
29304 * tree-ssa-strlen.cc (dump_strlen_info): Same.
29305 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
29308 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29310 * range-op.cc (operator_cast::op1_range): Use
29311 create_possibly_reversed_range.
29312 (operator_bitwise_and::simple_op1_range_solver): Same.
29313 * value-range.cc (swap_out_of_order_endpoints): Delete.
29314 (irange::set): Remove call to swap_out_of_order_endpoints.
29316 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29318 * builtins.cc (determine_block_size): Convert use of legacy API to
29320 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
29321 (array_bounds_checker::check_array_ref): Same.
29322 * gimple-ssa-warn-restrict.cc
29323 (builtin_memref::extend_offset_range): Same.
29324 * ipa-cp.cc (ipcp_store_vr_results): Same.
29325 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
29326 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
29327 (ipa_write_jump_function): Same.
29328 * pointer-query.cc (get_size_range): Same.
29329 * tree-data-ref.cc (split_constant_offset): Same.
29330 * tree-ssa-strlen.cc (get_range): Same.
29331 (maybe_diag_stxncpy_trunc): Same.
29332 (strlen_pass::get_len_or_size): Same.
29333 (strlen_pass::count_nonzero_bytes_addr): Same.
29334 * tree-vect-patterns.cc (vect_get_range_info): Same.
29335 * value-range.cc (irange::maybe_anti_range): Remove.
29336 (get_legacy_range): New.
29337 (irange::copy_to_legacy): Use get_legacy_range.
29338 (ranges_from_anti_range): Same.
29339 * value-range.h (class irange): Remove maybe_anti_range.
29340 (get_legacy_range): New.
29341 * vr-values.cc (check_for_binary_op_overflow): Convert use of
29342 legacy API to get_legacy_range.
29343 (compare_ranges): Same.
29344 (compare_range_with_value): Same.
29345 (bounds_of_var_in_loop): Same.
29346 (find_case_label_ranges): Same.
29347 (simplify_using_ranges::simplify_switch_using_ranges): Same.
29349 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29351 * value-range-pretty-print.cc (vrange_printer::visit): Remove
29353 * value-range.cc (irange::constant_p): Remove.
29354 (irange::get_nonzero_bits_from_range): Remove constant_p use.
29355 * value-range.h (class irange): Remove constant_p.
29356 (irange::num_pairs): Remove constant_p use.
29358 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29360 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
29362 (irange::set): Same.
29363 (irange::legacy_lower_bound): Same.
29364 (irange::legacy_upper_bound): Same.
29365 (irange::contains_p): Same.
29366 (range_tests_legacy): Same.
29367 (irange::normalize_addresses): Remove.
29368 (irange::normalize_symbolics): Remove.
29369 (irange::symbolic_p): Remove.
29370 * value-range.h (class irange): Remove symbolic_p,
29371 normalize_symbolics, and normalize_addresses.
29372 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
29373 Remove symbolics support.
29375 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29377 * value-range.cc (irange::may_contain_p): Remove.
29378 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
29379 usage with contains_p.
29380 * vr-values.cc (compare_range_with_value): Same.
29382 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29384 * tree-vrp.cc (supported_types_p): Remove.
29385 (defined_ranges_p): Remove.
29386 (range_fold_binary_expr): Remove.
29387 (range_fold_unary_expr): Remove.
29388 * tree-vrp.h (range_fold_unary_expr): Remove.
29389 (range_fold_binary_expr): Remove.
29391 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29393 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
29394 (ipa_value_range_from_jfunc): Same.
29395 (propagate_vr_across_jump_function): Same.
29396 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
29397 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
29398 * vr-values.cc (bounds_of_var_in_loop): Same.
29400 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29402 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
29403 Add irange argument.
29404 (check_out_of_bounds_and_warn): Remove check for vr.
29405 (array_bounds_checker::check_array_ref): Remove pointer qualifier
29406 for vr and adjust accordingly.
29407 * gimple-array-bounds.h (get_value_range): Add irange argument.
29408 * value-query.cc (class equiv_allocator): Delete.
29409 (range_query::get_value_range): Delete.
29410 (range_query::range_query): Remove allocator access.
29411 (range_query::~range_query): Same.
29412 * value-query.h (get_value_range): Delete.
29414 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
29415 call to get_value_range.
29416 (check_for_binary_op_overflow): Same.
29417 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
29418 (simplify_using_ranges::simplify_abs_using_ranges): Same.
29419 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
29420 (simplify_using_ranges::simplify_casted_cond): Same.
29421 (simplify_using_ranges::simplify_switch_using_ranges): Same.
29422 (simplify_using_ranges::two_valued_val_range_p): Same.
29424 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29427 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
29429 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
29430 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
29431 (simplify_using_ranges::legacy_fold_cond): ...this.
29432 (simplify_using_ranges::fold_cond): Rename
29433 vrp_evaluate_conditional_warnv_with_ops to
29434 legacy_fold_cond_overflow.
29435 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
29436 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
29437 legacy_fold_cond_overflow respectively.
29439 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
29441 * vr-values.cc (get_vr_for_comparison): Remove.
29442 (compare_name_with_value): Same.
29443 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
29444 compare_name_with_value.
29445 * vr-values.h: Remove compare_name_with_value.
29446 Remove get_vr_for_comparison.
29448 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
29450 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
29451 (bswapsi2): New define_insn.
29452 (swaphi): New define_insn to exchange two registers (swpw).
29453 (define_peephole2): Recognize exchange of registers as swaphi.
29455 2023-04-26 Richard Biener <rguenther@suse.de>
29457 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
29459 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
29460 * predict.cc (apply_return_prediction): Likewise.
29461 * sese.cc (set_ifsese_condition): Likewise. Simplify.
29462 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
29463 (make_edges_bb): Likewise.
29464 (make_cond_expr_edges): Likewise.
29465 (end_recording_case_labels): Likewise.
29466 (make_gimple_asm_edges): Likewise.
29467 (cleanup_dead_labels): Likewise.
29468 (group_case_labels): Likewise.
29469 (gimple_can_merge_blocks_p): Likewise.
29470 (gimple_merge_blocks): Likewise.
29471 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
29472 (gimple_duplicate_sese_tail): Avoid last_stmt.
29473 (find_loop_dist_alias): Likewise.
29474 (gimple_block_ends_with_condjump_p): Likewise.
29475 (gimple_purge_dead_eh_edges): Likewise.
29476 (gimple_purge_dead_abnormal_call_edges): Likewise.
29477 (pass_warn_function_return::execute): Likewise.
29478 (execute_fixup_cfg): Likewise.
29479 * tree-eh.cc (redirect_eh_edge_1): Likewise.
29480 (pass_lower_resx::execute): Likewise.
29481 (pass_lower_eh_dispatch::execute): Likewise.
29482 (cleanup_empty_eh): Likewise.
29483 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
29484 (predicate_bbs): Likewise.
29485 (ifcvt_split_critical_edges): Likewise.
29486 * tree-loop-distribution.cc (create_edge_for_control_dependence):
29488 (loop_distribution::transform_reduction_loop): Likewise.
29489 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
29490 (try_transform_to_exit_first_loop_alt): Likewise.
29491 (transform_to_exit_first_loop): Likewise.
29492 (create_parallel_loop): Likewise.
29493 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
29494 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
29495 (eliminate_unnecessary_stmts): Likewise.
29497 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
29499 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
29500 (pass_tree_ifcombine::execute): Likewise.
29501 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
29502 (should_duplicate_loop_header_p): Likewise.
29503 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
29504 (tree_estimate_loop_size): Likewise.
29505 (try_unroll_loop_completely): Likewise.
29506 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
29507 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
29508 (canonicalize_loop_ivs): Likewise.
29509 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
29510 (bound_difference): Likewise.
29511 (number_of_iterations_popcount): Likewise.
29512 (number_of_iterations_cltz): Likewise.
29513 (number_of_iterations_cltz_complement): Likewise.
29514 (simplify_using_initial_conditions): Likewise.
29515 (number_of_iterations_exit_assumptions): Likewise.
29516 (loop_niter_by_eval): Likewise.
29517 (estimate_numbers_of_iterations): Likewise.
29519 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29521 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
29523 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
29526 * config/rs6000/rs6000-builtins.def
29527 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
29528 __builtin_vsx_scalar_cmp_exp_qp_lt,
29529 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
29532 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
29535 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
29536 easy_vector_constant with const_vector_each_byte_same, add
29537 handlings in preparation for !easy_vector_constant, and update
29538 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
29539 * config/rs6000/predicates.md (const_vector_each_byte_same): New
29542 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29544 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
29545 (*pred_ltge<mode>_merge_tie_mask): Ditto.
29546 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
29547 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
29548 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
29549 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
29550 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
29552 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29554 * config/riscv/vector.md: Fix redundant vmv1r.v.
29556 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29558 * config/riscv/vector.md: Fix RA constraint.
29560 2023-04-26 Pan Li <pan2.li@intel.com>
29563 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
29564 check for vn_reference equal.
29566 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29568 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
29569 auto-vectorization preference.
29570 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
29571 auto-vectorization.
29572 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
29574 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
29576 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
29577 and bclridisi_nottwobits patterns.
29578 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
29579 predicate to avoid splitting arith constants.
29580 (const_nottwobits_not_arith_operand): New predicate.
29582 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
29584 * recog.cc (peep2_attempt, peep2_update_life): Correct
29585 head-comment description of parameter match_len.
29587 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
29589 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
29590 riscv_split_symbol() drop in_splitter arg.
29591 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
29592 riscv_split_symbol() drop in_splitter arg.
29593 riscv_force_temporary() drop in_splitter arg.
29594 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
29595 riscv_split_symbol() drop in_splitter arg.
29597 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
29599 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
29600 superfluous debug temporaries for single GIMPLE assignments.
29602 2023-04-25 Richard Biener <rguenther@suse.de>
29604 PR tree-optimization/109609
29605 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
29607 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
29608 the size given by arg_max_access_size_given_by_arg_p as
29609 maximum, not exact, size.
29611 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29614 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
29615 (orn<mode>3<vczle><vczbe>): ... This.
29616 (bic<mode>3): Rename to...
29617 (bic<mode>3<vczle><vczbe>): ... This.
29618 (<su><maxmin><mode>3): Rename to...
29619 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
29621 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29623 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
29624 * config/aarch64/iterators.md (VQDIV): New mode iterator.
29625 (vnx2di): New mode attribute.
29627 2023-04-25 Richard Biener <rguenther@suse.de>
29629 PR rtl-optimization/109585
29630 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
29632 2023-04-25 Jakub Jelinek <jakub@redhat.com>
29635 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
29636 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
29637 is larger than signed int maximum.
29639 2023-04-25 Martin Liska <mliska@suse.cz>
29641 * doc/gcov.texi: Document the new "calls" field and document
29642 the API bump. Mention also "block_ids" for lines.
29643 * gcov.cc (output_intermediate_json_line): Output info about
29644 calls and extend branches as well.
29645 (generate_results): Bump version to 2.
29646 (output_line_details): Use block ID instead of a non-sensual
29649 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
29651 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
29652 length attribute for the first (memory operand) alternative.
29654 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
29656 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
29657 * config/aarch64/constraints.md: Make "Umn" relaxed memory
29659 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
29661 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
29663 * value-range.cc (frange::set): Adjust constructor.
29664 * value-range.h (nan_state::nan_state): Replace default
29665 constructor with one taking an argument.
29667 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
29669 * ipa-cp.cc (ipa_range_contains_p): New.
29670 (decide_whether_version_node): Use it.
29672 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29674 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
29675 simplify two successive VEC_PERM_EXPRs with same VLA mask,
29676 where mask chooses elements in reverse order.
29678 2023-04-24 Andrew Pinski <apinski@marvell.com>
29680 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
29681 and support diamond shaped basic block form.
29682 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
29684 2023-04-24 Andrew Pinski <apinski@marvell.com>
29686 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
29687 Instead of calling last_and_only_stmt, look for the last statement
29690 2023-04-24 Andrew Pinski <apinski@marvell.com>
29692 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
29694 (match_simplify_replacement): Call
29695 empty_bb_or_one_feeding_into_p instead of doing it inline.
29697 2023-04-24 Andrew Pinski <apinski@marvell.com>
29699 PR tree-optimization/68894
29700 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
29701 continue for the do_hoist_loads diamond case.
29703 2023-04-24 Andrew Pinski <apinski@marvell.com>
29705 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
29706 code for better code readability.
29708 2023-04-24 Andrew Pinski <apinski@marvell.com>
29710 PR tree-optimization/109604
29711 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
29712 diamond form check from ...
29713 (minmax_replacement): Here.
29715 2023-04-24 Patrick Palka <ppalka@redhat.com>
29717 * tree.cc (strip_array_types): Don't define here.
29718 (is_typedef_decl): Don't define here.
29719 (typedef_variant_p): Don't define here.
29720 * tree.h (strip_array_types): Define here.
29721 (is_typedef_decl): Define here.
29722 (typedef_variant_p): Define here.
29724 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
29726 * doc/generic.texi (OpenMP): Add != to allowed
29727 conditions and state that vars can be unsigned.
29728 * tree.def (OMP_FOR): Likewise.
29730 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29732 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
29734 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
29736 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
29737 Remove explicit Solaris 11 references.
29739 (Options specification, --with-gnu-as): as and gas always differ
29741 Remove /usr/ccs/bin reference.
29742 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
29743 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
29744 (*-*-solaris2*): ... here.
29745 Update bundled GCC versions.
29746 Don't refer to pre-built binaries.
29747 Remove /bin/sh warning.
29748 Update assembler, linker recommendations.
29749 Document GNAT bootstrap compiler.
29750 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
29751 (sparc64-*-solaris2*): Move content...
29752 (sparcv9-*-solaris2*): ...here.
29753 Add GDC for 64-bit bootstrap compilers.
29755 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29758 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
29760 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
29763 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29765 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
29766 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
29767 (aarch64_<su>abal2<mode>): New define_expand.
29768 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
29769 (aarch64_rtx_costs): Handle ABD rtxes.
29770 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
29771 * config/aarch64/iterators.md (ABAL2): Delete.
29772 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
29774 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29776 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
29777 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
29778 (<sur>sadv16qi): Rename to...
29779 (<su>sadv16qi): ... This. Adjust for the above.
29780 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
29781 (<su>sad<vsi2qi>): ... This. Adjust for the above.
29782 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
29783 * config/aarch64/iterators.md (ABAL): Delete.
29784 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
29786 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29788 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
29789 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
29790 (aarch64_<su>abdl2<mode>): New define_expand.
29791 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
29792 * config/aarch64/iterators.md (ABDL2): Delete.
29793 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
29795 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29797 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
29798 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
29800 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
29801 * config/aarch64/iterators.md (ABDL): Delete.
29802 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
29804 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29806 * config/aarch64/aarch64-simd.md
29807 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
29809 2023-04-24 Richard Biener <rguenther@suse.de>
29811 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
29813 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
29815 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
29816 (set_switch_stmt_execution_predicate): Likewise.
29817 (phi_result_unknown_predicate): Likewise.
29818 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
29819 (ipa_analyze_indirect_call_uses): Likewise.
29820 * predict.cc (predict_iv_comparison): Likewise.
29821 (predict_extra_loop_exits): Likewise.
29822 (predict_loops): Likewise.
29823 (tree_predict_by_opcode): Likewise.
29824 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
29826 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
29827 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
29828 (replace_phi_edge_with_variable): Likewise.
29829 (two_value_replacement): Likewise.
29830 (value_replacement): Likewise.
29831 (minmax_replacement): Likewise.
29832 (spaceship_replacement): Likewise.
29833 (cond_removal_in_builtin_zero_pattern): Likewise.
29834 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
29835 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
29836 (vn_phi_lookup): Likewise.
29837 (vn_phi_insert): Likewise.
29838 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
29839 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
29841 (back_threader_profitability::possibly_profitable_path_p):
29843 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
29845 * tree-switch-conversion.cc (pass_convert_switch::execute):
29847 (pass_lower_switch<O0>::execute): Likewise.
29848 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
29849 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
29850 * tree-vect-slp.cc (vect_slp_function): Likewise.
29851 * tree-vect-stmts.cc (cfun_returns): Likewise.
29852 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
29853 (vect_loop_dist_alias_call): Likewise.
29855 2023-04-24 Richard Biener <rguenther@suse.de>
29857 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
29859 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29861 * config/riscv/riscv-vsetvl.cc
29862 (vector_infos_manager::all_avail_in_compatible_p): New function.
29863 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
29864 * config/riscv/riscv-vsetvl.h: New function.
29866 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29868 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
29869 comment for cleanup_insns.
29871 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29873 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
29874 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
29875 with the fault first load property.
29877 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29879 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
29880 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
29882 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29885 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
29886 (aarch64_addp<mode><vczle><vczbe>): ... This.
29888 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
29890 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
29891 provide reasonable values for common arithmetic operations and
29892 immediate operands (in several machine modes).
29894 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
29896 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
29897 format specifier to output high_part register name of SImode reg.
29898 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
29899 (zero_extendqihi2): Fix lengths, consistent formatting and add
29900 "and Rx,#255" alternative, for documentation purposes.
29901 (zero_extendhisi2): New define_insn.
29903 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
29905 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
29906 SImode shifts by two by performing a single bit SImode shift twice.
29908 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
29910 PR tree-optimization/109593
29911 * value-range.cc (frange::operator==): Handle NANs.
29913 2023-04-23 liuhongt <hongtao.liu@intel.com>
29915 PR rtl-optimization/108707
29916 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
29917 GENERAL_REGS when preferred reg_class is not known.
29919 2023-04-22 Andrew Pinski <apinski@marvell.com>
29921 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
29922 Change the code around slightly to move diamond
29923 handling for do_store_elim/do_hoist_loads out of
29926 2023-04-22 Andrew Pinski <apinski@marvell.com>
29928 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
29929 Remove check on empty_block_p.
29931 2023-04-22 Jakub Jelinek <jakub@redhat.com>
29933 PR bootstrap/109589
29934 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
29935 * realmpfr.h (class auto_mpfr): Likewise.
29937 2023-04-22 Jakub Jelinek <jakub@redhat.com>
29939 PR tree-optimization/109583
29940 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
29941 if vec_mode is not VECTOR_MODE_P.
29943 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
29944 Ondrej Kubanek <kubanek0ondrej@gmail.com>
29946 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
29947 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
29948 loop profile and bounds after header duplication.
29949 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
29950 Break out from try_peel_loop; fix handling of 0 iterations.
29951 (try_peel_loop): Use adjust_loop_info_after_peeling.
29953 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
29955 PR tree-optimization/109546
29956 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
29957 not fold conditions with ADDR_EXPR early.
29959 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29961 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
29962 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
29964 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
29965 (*aarch64_<optab><mode>3_zero): Define.
29966 (*aarch64_<optab><mode>3_cssc): Likewise.
29967 * config/aarch64/iterators.md (maxminand): New code attribute.
29969 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29972 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
29973 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
29975 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
29976 (aarch64_override_options_internal): Handle the above.
29977 (aarch64_output_load_tp): New function.
29978 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
29979 aarch64_output_load_tp.
29980 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
29981 (mtp=): New option.
29982 * doc/invoke.texi (AArch64 Options): Document -mtp=.
29984 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29987 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
29988 (add_vec_concat_subst_be): Likewise.
29991 (add<mode>3): Rename to...
29992 (add<mode>3<vczle><vczbe>): ... This.
29993 (sub<mode>3): Rename to...
29994 (sub<mode>3<vczle><vczbe>): ... This.
29995 (mul<mode>3): Rename to...
29996 (mul<mode>3<vczle><vczbe>): ... This.
29997 (and<mode>3): Rename to...
29998 (and<mode>3<vczle><vczbe>): ... This.
29999 (ior<mode>3): Rename to...
30000 (ior<mode>3<vczle><vczbe>): ... This.
30001 (xor<mode>3): Rename to...
30002 (xor<mode>3<vczle><vczbe>): ... This.
30003 * config/aarch64/iterators.md (VDZ): Define.
30005 2023-04-21 Patrick Palka <ppalka@redhat.com>
30007 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
30010 2023-04-21 Jan Hubicka <jh@suse.cz>
30012 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
30015 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
30017 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
30018 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
30020 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30022 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
30023 force_reg instead of copy_to_mode_reg.
30024 (aarch64_expand_vector_init): Likewise.
30026 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
30028 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
30029 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
30030 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
30031 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
30032 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
30033 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
30034 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
30035 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
30036 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
30037 * config/i386/predicates.md (index_register_operand):
30038 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
30039 * config/i386/i386.cc (ix86_legitimate_address_p): Use
30040 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
30041 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
30043 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
30044 Ondrej Kubanek <kubanek0ondrej@gmail.com>
30046 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
30049 2023-04-21 Richard Biener <rguenther@suse.de>
30051 * is-a.h (safe_is_a): New.
30053 2023-04-21 Richard Biener <rguenther@suse.de>
30055 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
30056 (gphi_iterator::operator*): Likewise.
30058 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
30059 Michal Jires <michal@jires.eu>
30061 * ipa-inline.cc (class inline_badness): New class.
30062 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
30064 (update_edge_key): Update.
30065 (lookup_recursive_calls): Likewise.
30066 (recursive_inlining): Likewise.
30067 (add_new_edges_to_heap): Likewise.
30068 (inline_small_functions): Likewise.
30070 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
30072 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
30074 2023-04-21 Richard Biener <rguenther@suse.de>
30076 PR tree-optimization/109573
30077 * tree-vect-loop.cc (vectorizable_live_operation): Allow
30078 unhandled SSA copy as well. Demote assert to checking only.
30080 2023-04-21 Richard Biener <rguenther@suse.de>
30082 * df-core.cc (df_analyze): Compute RPO on the reverse graph
30083 for DF_BACKWARD problems.
30084 (loop_post_order_compute): Rename to ...
30085 (loop_rev_post_order_compute): ... this, compute a RPO.
30086 (loop_inverted_post_order_compute): Rename to ...
30087 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
30088 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
30089 problems, RPO on the inverted graph for DF_BACKWARD.
30091 2023-04-21 Richard Biener <rguenther@suse.de>
30093 * cfganal.h (inverted_rev_post_order_compute): Rename
30095 (inverted_post_order_compute): ... this. Add struct function
30096 argument, change allocation to a C array.
30097 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
30098 * lcm.cc (compute_antinout_edge): Adjust.
30099 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
30100 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
30101 * tree-ssa-pre.cc (compute_antic): Likewise.
30103 2023-04-21 Richard Biener <rguenther@suse.de>
30105 * df.h (df_d::postorder_inverted): Change back to int *,
30107 * df-core.cc (rest_of_handle_df_finish): Adjust.
30108 (df_analyze_1): Likewise.
30109 (df_analyze): For DF_FORWARD problems use RPO on the forward
30111 (loop_inverted_post_order_compute): Adjust API.
30112 (df_analyze_loop): Adjust.
30113 (df_get_n_blocks): Likewise.
30114 (df_get_postorder): Likewise.
30116 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30119 * config/riscv/riscv-vsetvl.cc
30120 (vector_infos_manager::all_empty_predecessor_p): New function.
30121 (pass_vsetvl::backward_demand_fusion): Ditto.
30122 * config/riscv/riscv-vsetvl.h: Ditto.
30124 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
30127 * config/riscv/generic.md: Change standard names to insn names.
30129 2023-04-21 Richard Biener <rguenther@suse.de>
30131 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
30132 (compute_laterin): Use RPO.
30133 (compute_available): Likewise.
30135 2023-04-21 Peng Fan <fanpeng@loongson.cn>
30137 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
30139 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30142 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
30143 (vector_insn_info::skip_avl_compatible_p): Ditto.
30144 (vector_insn_info::merge): Remove default value.
30145 (pass_vsetvl::compute_local_backward_infos): Ditto.
30146 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
30147 * config/riscv/riscv-vsetvl.h: Ditto.
30149 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
30151 * doc/extend.texi (Common Function Attributes): Remove duplicate
30154 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
30156 PR tree-optimization/109564
30157 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
30158 UNDEFINED range names when deciding if all PHI arguments are the same,
30160 2023-04-20 Jakub Jelinek <jakub@redhat.com>
30162 PR tree-optimization/109011
30163 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
30164 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
30165 .CTZ (X) = PREC - .POPCOUNT (X | -X).
30167 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
30169 * lra-constraints.cc (match_reload): Exclude some hard regs for
30170 multi-reg inout reload pseudos used in asm in different mode.
30172 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
30174 * config/arm/arm.cc (thumb1_legitimate_address_p):
30175 Use VIRTUAL_REGISTER_P predicate.
30176 (arm_eliminable_register): Ditto.
30177 * config/avr/avr.md (push<mode>_1): Ditto.
30178 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
30179 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
30180 * config/i386/predicates.md (register_no_elim_operand): Ditto.
30181 * config/iq2000/predicates.md (call_insn_operand): Ditto.
30182 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
30184 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
30187 * config/i386/predicates.md (extract_operator): New predicate.
30188 * config/i386/i386.md (any_extract): Remove code iterator.
30189 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
30190 (*cmpqi_ext<mode>_1): Ditto.
30191 (*cmpqi_ext<mode>_2): Ditto.
30192 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
30193 (*cmpqi_ext<mode>_3): Ditto.
30194 (*cmpqi_ext<mode>_4): Ditto.
30195 (*extzvqi_mem_rex64): Ditto.
30197 (*insvqi_2): Ditto.
30198 (*extendqi<SWI24:mode>_ext_1): Ditto.
30199 (*addqi_ext<mode>_0): Ditto.
30200 (*addqi_ext<mode>_1): Ditto.
30201 (*addqi_ext<mode>_2): Ditto.
30202 (*subqi_ext<mode>_0): Ditto.
30203 (*subqi_ext<mode>_2): Ditto.
30204 (*testqi_ext<mode>_1): Ditto.
30205 (*testqi_ext<mode>_2): Ditto.
30206 (*andqi_ext<mode>_0): Ditto.
30207 (*andqi_ext<mode>_1): Ditto.
30208 (*andqi_ext<mode>_1_cc): Ditto.
30209 (*andqi_ext<mode>_2): Ditto.
30210 (*<any_or:code>qi_ext<mode>_0): Ditto.
30211 (*<any_or:code>qi_ext<mode>_1): Ditto.
30212 (*<any_or:code>qi_ext<mode>_2): Ditto.
30213 (*xorqi_ext<mode>_1_cc): Ditto.
30214 (*negqi_ext<mode>_2): Ditto.
30215 (*ashlqi_ext<mode>_2): Ditto.
30216 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
30218 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
30221 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
30222 <bitmanip_insn> as the type to allow for fine grained control of
30223 scheduling these insns.
30224 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
30226 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
30227 pcnt, signed and unsigned min/max.
30229 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30230 kito-cheng <kito.cheng@sifive.com>
30232 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
30234 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30235 kito-cheng <kito.cheng@sifive.com>
30238 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
30239 (pass_vsetvl::cleanup_insns): Fix bug.
30241 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
30243 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
30244 (ldexp<mode>3): Delete.
30245 (ldexp<mode>3<exec>): Change "B" to "A".
30247 2023-04-20 Jakub Jelinek <jakub@redhat.com>
30248 Jonathan Wakely <jwakely@redhat.com>
30250 * tree.h (built_in_function_equal_p): New helper function.
30251 (fndecl_built_in_p): Turn into variadic template to support
30252 1 or more built_in_function arguments.
30253 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
30254 * gimplify.cc (goa_stabilize_expr): Likewise.
30255 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
30256 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
30257 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
30258 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
30259 cgraph_update_edges_for_call_stmt_node,
30260 cgraph_edge::verify_corresponds_to_fndecl,
30261 cgraph_node::verify_node): Likewise.
30262 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
30263 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
30264 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
30266 2023-04-20 Jakub Jelinek <jakub@redhat.com>
30268 PR tree-optimization/109011
30269 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
30270 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
30271 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
30272 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
30273 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
30275 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
30277 2023-04-20 Richard Biener <rguenther@suse.de>
30279 * df-core.cc (rest_of_handle_df_initialize): Remove
30280 computation of df->postorder, df->postorder_inverted and
30283 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
30285 * common/config/i386/i386-common.cc
30286 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
30287 (ix86_handle_option): Set AVX flag for VAES.
30288 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
30289 Add OPTION_MASK_ISA2_VAES_UNSET.
30290 (def_builtin): Share builtin between AES and VAES.
30291 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
30293 * config/i386/i386.md (aes): New isa attribute.
30294 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
30295 (aesenclast): Ditto.
30297 (aesdeclast): Ditto.
30298 * config/i386/vaesintrin.h: Remove redundant avx target push.
30299 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
30300 (_mm_aesdeclast_si128): Ditto.
30301 (_mm_aesenc_si128): Ditto.
30302 (_mm_aesenclast_si128): Ditto.
30304 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
30306 * config/i386/avx2intrin.h
30307 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
30308 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
30309 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
30310 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
30311 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
30312 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
30313 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
30314 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
30315 (_mm_reduce_add_epi16): New instrinsics.
30316 (_mm_reduce_mul_epi16): Ditto.
30317 (_mm_reduce_and_epi16): Ditto.
30318 (_mm_reduce_or_epi16): Ditto.
30319 (_mm_reduce_max_epi16): Ditto.
30320 (_mm_reduce_max_epu16): Ditto.
30321 (_mm_reduce_min_epi16): Ditto.
30322 (_mm_reduce_min_epu16): Ditto.
30323 (_mm256_reduce_add_epi16): Ditto.
30324 (_mm256_reduce_mul_epi16): Ditto.
30325 (_mm256_reduce_and_epi16): Ditto.
30326 (_mm256_reduce_or_epi16): Ditto.
30327 (_mm256_reduce_max_epi16): Ditto.
30328 (_mm256_reduce_max_epu16): Ditto.
30329 (_mm256_reduce_min_epi16): Ditto.
30330 (_mm256_reduce_min_epu16): Ditto.
30331 (_mm_reduce_add_epi8): Ditto.
30332 (_mm_reduce_mul_epi8): Ditto.
30333 (_mm_reduce_and_epi8): Ditto.
30334 (_mm_reduce_or_epi8): Ditto.
30335 (_mm_reduce_max_epi8): Ditto.
30336 (_mm_reduce_max_epu8): Ditto.
30337 (_mm_reduce_min_epi8): Ditto.
30338 (_mm_reduce_min_epu8): Ditto.
30339 (_mm256_reduce_add_epi8): Ditto.
30340 (_mm256_reduce_mul_epi8): Ditto.
30341 (_mm256_reduce_and_epi8): Ditto.
30342 (_mm256_reduce_or_epi8): Ditto.
30343 (_mm256_reduce_max_epi8): Ditto.
30344 (_mm256_reduce_max_epu8): Ditto.
30345 (_mm256_reduce_min_epi8): Ditto.
30346 (_mm256_reduce_min_epu8): Ditto.
30347 * config/i386/avx512vlbwintrin.h:
30348 (_mm_mask_reduce_add_epi16): Ditto.
30349 (_mm_mask_reduce_mul_epi16): Ditto.
30350 (_mm_mask_reduce_and_epi16): Ditto.
30351 (_mm_mask_reduce_or_epi16): Ditto.
30352 (_mm_mask_reduce_max_epi16): Ditto.
30353 (_mm_mask_reduce_max_epu16): Ditto.
30354 (_mm_mask_reduce_min_epi16): Ditto.
30355 (_mm_mask_reduce_min_epu16): Ditto.
30356 (_mm256_mask_reduce_add_epi16): Ditto.
30357 (_mm256_mask_reduce_mul_epi16): Ditto.
30358 (_mm256_mask_reduce_and_epi16): Ditto.
30359 (_mm256_mask_reduce_or_epi16): Ditto.
30360 (_mm256_mask_reduce_max_epi16): Ditto.
30361 (_mm256_mask_reduce_max_epu16): Ditto.
30362 (_mm256_mask_reduce_min_epi16): Ditto.
30363 (_mm256_mask_reduce_min_epu16): Ditto.
30364 (_mm_mask_reduce_add_epi8): Ditto.
30365 (_mm_mask_reduce_mul_epi8): Ditto.
30366 (_mm_mask_reduce_and_epi8): Ditto.
30367 (_mm_mask_reduce_or_epi8): Ditto.
30368 (_mm_mask_reduce_max_epi8): Ditto.
30369 (_mm_mask_reduce_max_epu8): Ditto.
30370 (_mm_mask_reduce_min_epi8): Ditto.
30371 (_mm_mask_reduce_min_epu8): Ditto.
30372 (_mm256_mask_reduce_add_epi8): Ditto.
30373 (_mm256_mask_reduce_mul_epi8): Ditto.
30374 (_mm256_mask_reduce_and_epi8): Ditto.
30375 (_mm256_mask_reduce_or_epi8): Ditto.
30376 (_mm256_mask_reduce_max_epi8): Ditto.
30377 (_mm256_mask_reduce_max_epu8): Ditto.
30378 (_mm256_mask_reduce_min_epi8): Ditto.
30379 (_mm256_mask_reduce_min_epu8): Ditto.
30381 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
30383 * common/config/i386/i386-common.cc
30384 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
30385 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
30386 (OPTION_MASK_ISA_AVX_UNSET):
30387 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
30388 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
30389 * config/i386/i386.md (vpclmulqdqvl): New.
30390 * config/i386/sse.md (pclmulqdq): Add evex encoding.
30391 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
30394 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
30396 * config/i386/avx512vlbwintrin.h
30397 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
30398 (_mm_mask_blend_epi8): Ditto.
30399 (_mm256_mask_blend_epi16): Ditto.
30400 (_mm256_mask_blend_epi8): Ditto.
30401 * config/i386/avx512vlintrin.h
30402 (_mm256_mask_blend_pd): Ditto.
30403 (_mm256_mask_blend_ps): Ditto.
30404 (_mm256_mask_blend_epi64): Ditto.
30405 (_mm256_mask_blend_epi32): Ditto.
30406 (_mm_mask_blend_pd): Ditto.
30407 (_mm_mask_blend_ps): Ditto.
30408 (_mm_mask_blend_epi64): Ditto.
30409 (_mm_mask_blend_epi32): Ditto.
30410 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
30411 (VF_AVX512HFBFVL): Move it before the first usage.
30412 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
30413 to VF_AVX512HFBFVL.
30415 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
30417 * common/config/i386/i386-common.cc
30418 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
30419 to OPTION_MASK_ISA_AVX512BW_SET.
30420 (OPTION_MASK_ISA_AVX512F_UNSET):
30421 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
30422 (OPTION_MASK_ISA_AVX512BW_UNSET):
30423 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
30424 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
30425 * config/i386/avx512vbmi2vlintrin.h: Ditto.
30426 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
30427 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
30428 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
30429 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
30431 (compressstore<mode>_mask): Ditto.
30432 (expand<mode>_mask): Ditto.
30433 (expand<mode>_maskz): Ditto.
30434 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
30435 VI12_VI48F_AVX512VL.
30437 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
30439 * common/config/i386/i386-common.cc
30440 (OPTION_MASK_ISA_AVX512BITALG_SET):
30441 Change OPTION_MASK_ISA_AVX512F_SET
30442 to OPTION_MASK_ISA_AVX512BW_SET.
30443 (OPTION_MASK_ISA_AVX512F_UNSET):
30444 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
30445 (OPTION_MASK_ISA_AVX512BW_UNSET):
30446 Add OPTION_MASK_ISA_AVX512BITALG_SET.
30447 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
30448 * config/i386/i386-builtin.def:
30449 Remove redundant OPTION_MASK_ISA_AVX512BW.
30450 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
30451 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
30452 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
30454 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
30456 * config/i386/i386-expand.cc
30457 (ix86_check_builtin_isa_match): Correct wrong comments.
30458 Add a new macro SHARE_BUILTIN and refactor the current if
30461 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
30463 * config/i386/cpuid.h: Open a new section for Extended Features
30464 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
30467 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
30469 * config/i386/sse.md: Modify insn vperm{i,f}
30472 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
30474 * config/xtensa/xtensa-opts.h: New header.
30475 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
30476 xtensa_strict_align.
30477 * config/xtensa/xtensa.cc (xtensa_option_override): When
30478 -m[no-]strict-align is not specified in the command line set
30479 xtensa_strict_align to 0 if the hardware supports both unaligned
30480 loads and stores or to 1 otherwise.
30481 * config/xtensa/xtensa.opt (mstrict-align): New option.
30482 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
30484 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
30486 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
30489 2023-04-19 Andrew Pinski <apinski@marvell.com>
30491 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
30493 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30495 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
30496 (VECTOR_BOOL_MODE): Ditto.
30497 (ADJUST_NUNITS): Ditto.
30498 (ADJUST_ALIGNMENT): Ditto.
30499 (ADJUST_BYTESIZE): Ditto.
30500 (ADJUST_PRECISION): Ditto.
30501 (RVV_MODES): Ditto.
30502 (VECTOR_MODE_WITH_PREFIX): Ditto.
30503 * config/riscv/riscv-v.cc (ENTRY): Ditto.
30504 (get_vlmul): Ditto.
30505 (get_ratio): Ditto.
30506 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
30507 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
30508 (vbool64_t): Ditto.
30509 (vbool32_t): Ditto.
30510 (vbool16_t): Ditto.
30515 (vint8mf8_t): Ditto.
30516 (vuint8mf8_t): Ditto.
30517 (vint8mf4_t): Ditto.
30518 (vuint8mf4_t): Ditto.
30519 (vint8mf2_t): Ditto.
30520 (vuint8mf2_t): Ditto.
30521 (vint8m1_t): Ditto.
30522 (vuint8m1_t): Ditto.
30523 (vint8m2_t): Ditto.
30524 (vuint8m2_t): Ditto.
30525 (vint8m4_t): Ditto.
30526 (vuint8m4_t): Ditto.
30527 (vint8m8_t): Ditto.
30528 (vuint8m8_t): Ditto.
30529 (vint16mf4_t): Ditto.
30530 (vuint16mf4_t): Ditto.
30531 (vint16mf2_t): Ditto.
30532 (vuint16mf2_t): Ditto.
30533 (vint16m1_t): Ditto.
30534 (vuint16m1_t): Ditto.
30535 (vint16m2_t): Ditto.
30536 (vuint16m2_t): Ditto.
30537 (vint16m4_t): Ditto.
30538 (vuint16m4_t): Ditto.
30539 (vint16m8_t): Ditto.
30540 (vuint16m8_t): Ditto.
30541 (vint32mf2_t): Ditto.
30542 (vuint32mf2_t): Ditto.
30543 (vint32m1_t): Ditto.
30544 (vuint32m1_t): Ditto.
30545 (vint32m2_t): Ditto.
30546 (vuint32m2_t): Ditto.
30547 (vint32m4_t): Ditto.
30548 (vuint32m4_t): Ditto.
30549 (vint32m8_t): Ditto.
30550 (vuint32m8_t): Ditto.
30551 (vint64m1_t): Ditto.
30552 (vuint64m1_t): Ditto.
30553 (vint64m2_t): Ditto.
30554 (vuint64m2_t): Ditto.
30555 (vint64m4_t): Ditto.
30556 (vuint64m4_t): Ditto.
30557 (vint64m8_t): Ditto.
30558 (vuint64m8_t): Ditto.
30559 (vfloat32mf2_t): Ditto.
30560 (vfloat32m1_t): Ditto.
30561 (vfloat32m2_t): Ditto.
30562 (vfloat32m4_t): Ditto.
30563 (vfloat32m8_t): Ditto.
30564 (vfloat64m1_t): Ditto.
30565 (vfloat64m2_t): Ditto.
30566 (vfloat64m4_t): Ditto.
30567 (vfloat64m8_t): Ditto.
30568 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
30569 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
30570 (riscv_convert_vector_bits): Ditto.
30571 * config/riscv/riscv.md:
30572 * config/riscv/vector-iterators.md:
30573 * config/riscv/vector.md
30574 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
30575 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
30576 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
30577 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
30578 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
30579 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
30580 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
30581 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
30582 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
30584 2023-04-19 Pan Li <pan2.li@intel.com>
30586 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
30587 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
30589 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
30593 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
30594 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
30595 for operand 0. Use any_extract code iterator.
30596 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
30597 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
30598 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
30599 (*cmpqi_ext<mode>_1): Use general_operand predicate
30600 for operand 1. Use any_extract code iterator.
30601 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
30602 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
30604 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30606 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
30607 (aarch64_uaddw2<mode>): Delete.
30608 (aarch64_ssubw2<mode>): Delete.
30609 (aarch64_usubw2<mode>): Delete.
30610 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
30612 2023-04-19 Richard Biener <rguenther@suse.de>
30614 * tree-ssa-structalias.cc (do_ds_constraint): Use
30615 solve_add_graph_edge.
30617 2023-04-19 Richard Biener <rguenther@suse.de>
30619 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
30621 (do_sd_constraint): ... here.
30623 2023-04-19 Richard Biener <rguenther@suse.de>
30625 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
30626 rejecting the merge when A contains only a non-local label.
30628 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
30630 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
30631 (VIRTUAL_REGISTER_NUM_P): Ditto.
30632 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
30633 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
30634 * function.cc (instantiate_decl_rtl): Ditto.
30635 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
30636 (nonzero_address_p): Ditto.
30637 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
30639 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
30641 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
30643 2023-04-19 Richard Biener <rguenther@suse.de>
30645 * system.h (auto_mpz::operator->()): New.
30646 * realmpfr.h (auto_mpfr::operator->()): New.
30647 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
30648 * real.cc (real_from_string): Likewise.
30649 (dconst_e_ptr): Likewise.
30650 (dconst_sqrt2_ptr): Likewise.
30651 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
30653 (bound_difference_of_offsetted_base): Likewise.
30654 (number_of_iterations_ne): Likewise.
30655 (number_of_iterations_lt_to_ne): Likewise.
30656 * ubsan.cc: Include realmpfr.h.
30657 (ubsan_instrument_float_cast): Use auto_mpfr.
30659 2023-04-19 Richard Biener <rguenther@suse.de>
30661 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
30662 edges, remove edges from escaped after special-casing them.
30664 2023-04-19 Richard Biener <rguenther@suse.de>
30666 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
30669 2023-04-19 Richard Biener <rguenther@suse.de>
30671 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
30672 to the LHS varinfo solution member.
30674 2023-04-19 Richard Biener <rguenther@suse.de>
30676 * tree-ssa-structalias.cc (topo_visit): Look at the real
30677 destination of edges.
30679 2023-04-19 Richard Biener <rguenther@suse.de>
30681 PR tree-optimization/44794
30682 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
30683 If an epilogue loop is required set its iteration upper bound.
30685 2023-04-19 Xi Ruoyao <xry111@xry111.site>
30688 * config/loongarch/loongarch-protos.h
30689 (loongarch_expand_block_move): Add a parameter as alignment RTX.
30690 * config/loongarch/loongarch.h:
30691 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
30692 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
30693 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
30694 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
30695 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
30696 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
30697 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
30698 Take the alignment from the parameter, but set it to
30699 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
30700 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
30701 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
30702 (loongarch_block_move_straight): When there are left-over bytes,
30703 half the mode size instead of falling back to byte mode at once.
30704 (loongarch_block_move_loop): Limit the length of loop body with
30705 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
30706 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
30707 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
30708 to loongarch_expand_block_move.
30710 2023-04-19 Xi Ruoyao <xry111@xry111.site>
30712 * config/loongarch/loongarch.cc
30713 (loongarch_setup_incoming_varargs): Don't save more GARs than
30714 cfun->va_list_gpr_size / UNITS_PER_WORD.
30716 2023-04-19 Richard Biener <rguenther@suse.de>
30718 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
30719 no epilogue condition.
30721 2023-04-19 Richard Biener <rguenther@suse.de>
30723 * gimple.h (gimple_assign_load): Outline...
30724 * gimple.cc (gimple_assign_load): ... here. Avoid
30725 get_base_address and instead just strip the outermost
30726 handled component, treating a remaining handled component
30729 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30731 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
30733 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
30735 2023-04-19 Jakub Jelinek <jakub@redhat.com>
30737 PR tree-optimization/109011
30738 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
30739 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
30740 CLZ, CTZ and FFS. Remove vargs variable, use
30741 gimple_build_call_internal rather than gimple_build_call_internal_vec.
30742 (vect_vect_recog_func_ptrs): Adjust popcount entry.
30744 2023-04-19 Jakub Jelinek <jakub@redhat.com>
30747 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
30748 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
30749 a new REG rather than the SUBREG.
30751 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30753 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
30756 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30759 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
30760 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
30762 2023-04-19 Richard Biener <rguenther@suse.de>
30764 PR rtl-optimization/109237
30765 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
30766 TREE_VISITED on INSN_VAR_LOCATION_DECL.
30767 (delete_trivially_dead_insns): Maintain TREE_VISITED on
30768 active debug bind INSN_VAR_LOCATION_DECL.
30770 2023-04-19 Richard Biener <rguenther@suse.de>
30772 PR rtl-optimization/109237
30773 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30775 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
30777 * doc/install.texi (enable-decimal-float): Add AArch64.
30779 2023-04-19 liuhongt <hongtao.liu@intel.com>
30781 PR rtl-optimization/109351
30782 * ira.cc (setup_class_subset_and_memory_move_costs): Check
30783 hard_regno_mode_ok before setting lowest memory move cost for
30784 the mode with different reg classes.
30786 2023-04-18 Jason Merrill <jason@redhat.com>
30788 * doc/invoke.texi: Remove stray @gol.
30790 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
30792 * ifcvt.cc (cond_move_process_if_block): Consider the result of
30793 targetm.noce_conversion_profitable_p() when replacing the original
30794 sequence with the converted one.
30796 2023-04-18 Mark Harmstone <mark@harmstone.com>
30798 * common.opt (gcodeview): Add new option.
30799 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
30800 * opts.cc (command_handle_option): Similarly.
30801 * doc/invoke.texi: Add documentation for -gcodeview.
30803 2023-04-18 Andrew Pinski <apinski@marvell.com>
30805 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
30806 (make_pass_phiopt): Make execute out of line.
30807 (tree_ssa_cs_elim): Move code into ...
30808 (pass_cselim::execute): here.
30810 2023-04-18 Sam James <sam@gentoo.org>
30812 * system.h: Drop unused INCLUDE_PTHREAD_H.
30814 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
30816 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
30819 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
30821 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
30822 (bswapdi2, bswapsi2): Similarly.
30824 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
30827 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
30828 Use CODE_FOR_sse4_1_insertps_v4sf.
30829 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
30830 (expand_vec_perm_1): Call expand_vec_per_insertps.
30831 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
30832 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
30833 (@sse4_1_insertps_<mode>): New insn pattern.
30834 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
30835 pattern from sse4_1_insertps using VI4F_128 mode iterator.
30837 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30839 * value-range.cc (gt_ggc_mx): New.
30841 * value-range.h (class vrange): Add GTY marker.
30842 (class frange): Same.
30843 (gt_ggc_mx): Remove.
30844 (gt_pch_nx): Remove.
30846 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
30848 * lra-constraints.cc (constraint_unique): New.
30849 (process_address_1): Apply constraint_unique test.
30850 * recog.cc (constrain_operands): Allow relaxed memory
30853 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
30855 * doc/extend.texi (Target Builtins): Add RISC-V Vector
30857 (RISC-V Vector Intrinsics): Document GCC implemented which
30858 version of RISC-V vector intrinsics and its reference.
30860 2023-04-18 Richard Biener <rguenther@suse.de>
30862 PR middle-end/108786
30863 * bitmap.h (bitmap_clear_first_set_bit): New.
30864 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
30865 bitmap_first_set_bit and add optional clearing of the bit.
30866 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
30867 (bitmap_clear_first_set_bit): Likewise.
30868 * df-core.cc (df_worklist_dataflow_doublequeue): Use
30869 bitmap_clear_first_set_bit.
30870 * graphite-scop-detection.cc (scop_detection::merge_sese):
30872 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
30873 (sanitize_asan_mark_poison): Likewise.
30874 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
30875 * tree-into-ssa.cc (rewrite_blocks): Likewise.
30876 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
30877 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
30879 2023-04-18 Richard Biener <rguenther@suse.de>
30881 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
30882 (dump_sa_points_to_info): ... this function.
30883 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
30884 and call dump_sa_stats guarded with TDF_STATS.
30885 (ipa_pta_execute): Likewise.
30886 (compute_may_aliases): Guard dump_alias_info with
30887 TDF_DETAILS|TDF_ALIAS.
30889 2023-04-18 Andrew Pinski <apinski@marvell.com>
30891 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
30892 the expression that is being tried when TDF_FOLDING
30894 (phiopt_worker::match_simplify_replacement): Dump
30895 the sequence which was created by gimple_simplify_phiopt
30896 when TDF_FOLDING is true.
30898 2023-04-18 Andrew Pinski <apinski@marvell.com>
30900 * tree-ssa-phiopt.cc (match_simplify_replacement):
30901 Simplify code that does the movement slightly.
30903 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30905 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
30907 (rev16<mode>2): Rename to...
30908 (aarch64_rev16<mode>2_alt1): ... This.
30909 (rev16<mode>2_alt): Rename to...
30910 (*aarch64_rev16<mode>2_alt2): ... This.
30912 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30914 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
30915 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
30917 * range-op-float.cc (zero_range): Use dconstm0.
30918 (zero_to_inf_range): Same.
30919 * real.h (dconstm0): New.
30920 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
30921 (frange::set_zero): Do not declare dconstm0.
30923 2023-04-18 Richard Biener <rguenther@suse.de>
30925 * system.h (class auto_mpz): New,
30926 * realmpfr.h (class auto_mpfr): Likewise.
30927 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
30928 (do_mpfr_arg2): Likewise.
30929 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
30931 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30933 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
30934 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
30936 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30938 * value-range.cc (frange::operator==): Adjust for NAN.
30939 (range_tests_nan): Remove some NAN tests.
30941 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30943 * inchash.cc (hash::add_real_value): New.
30944 * inchash.h (class hash): Add add_real_value.
30945 * value-range.cc (add_vrange): New.
30946 * value-range.h (inchash::add_vrange): New.
30948 2023-04-18 Richard Biener <rguenther@suse.de>
30950 PR tree-optimization/109539
30951 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
30952 Re-implement pointer relatedness for PHIs.
30954 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
30956 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
30957 (SV_FP): New iterator.
30958 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
30959 (recip<mode>2): Unify the two patterns using SV_FP.
30960 (div_scale<mode><exec_vcc>): New insn.
30961 (div_fmas<mode><exec>): New insn.
30962 (div_fixup<mode><exec>): New insn.
30963 (div<mode>3): Unify the two expanders and rewrite using hardfp.
30964 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
30965 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
30966 and UNSPEC_DIV_FIXUP.
30967 (vccwait): New attribute.
30969 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30971 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
30972 if the argument matches that.
30974 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30976 * config/aarch64/atomics.md
30977 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
30978 Use SD_HSDI for destination mode iterator.
30980 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
30982 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
30983 of z-extensions and s-extensions.
30984 (riscv_subset_list::parse): Likewise.
30986 2023-04-18 Jakub Jelinek <jakub@redhat.com>
30988 PR tree-optimization/109240
30989 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
30990 first vec_perm operand and minus as second using fneg/fadd and
30991 minus as first vec_perm operand and plus as second using fneg/fsub.
30993 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30995 * data-streamer.cc (bp_pack_real_value): New.
30996 (bp_unpack_real_value): New.
30997 * data-streamer.h (bp_pack_real_value): New.
30998 (bp_unpack_real_value): New.
30999 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
31000 bp_unpack_real_value.
31001 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
31002 bp_pack_real_value.
31004 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
31006 * wide-int.h (WIDE_INT_MAX_HWIS): New.
31007 (class fixed_wide_int_storage): Use it.
31008 (trailing_wide_ints <N>::set_precision): Use it.
31009 (trailing_wide_ints <N>::extra_size): Use it.
31011 2023-04-18 Xi Ruoyao <xry111@xry111.site>
31013 * config/loongarch/loongarch-protos.h
31014 (loongarch_addu16i_imm12_operand_p): New function prototype.
31015 (loongarch_split_plus_constant): Likewise.
31016 * config/loongarch/loongarch.cc
31017 (loongarch_addu16i_imm12_operand_p): New function.
31018 (loongarch_split_plus_constant): Likewise.
31019 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
31020 (DUAL_IMM12_OPERAND): Likewise.
31021 (DUAL_ADDU16I_OPERAND): Likewise.
31022 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
31024 * config/loongarch/predicates.md (const_dual_imm12_operand): New
31026 (const_addu16i_operand): Likewise.
31027 (const_addu16i_imm12_di_operand): Likewise.
31028 (const_addu16i_imm12_si_operand): Likewise.
31029 (plus_di_operand): Likewise.
31030 (plus_si_operand): Likewise.
31031 (plus_si_extend_operand): Likewise.
31032 * config/loongarch/loongarch.md (add<mode>3): Convert to
31033 define_insn_and_split. Use plus_<mode>_operand predicate
31034 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
31035 and Le constraints.
31036 (*addsi3_extended): Convert to define_insn_and_split. Use
31037 plus_si_extend_operand instead of arith_operand. Add
31038 alternatives for La and Le alternatives.
31040 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
31042 * value-range.h (Value_Range::Value_Range): New.
31043 (Value_Range::contains_p): New.
31045 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
31047 * value-range.h (class vrange): Make m_discriminator const.
31048 (class irange): Make m_max_ranges const. Adjust constructors
31050 (class unsupported_range): Construct vrange appropriately.
31051 (class frange): Same.
31053 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
31055 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
31058 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
31060 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
31062 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
31064 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
31066 (riscv_expand_epilogue): Likewise.
31068 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
31070 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
31072 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
31074 2023-04-17 Andrew Pinski <apinski@marvell.com>
31076 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
31079 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
31081 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
31084 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
31086 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
31087 parameter remaining_size.
31088 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
31089 (riscv_expand_prologue): Likewise.
31090 (riscv_expand_epilogue): Likewise.
31092 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
31094 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
31095 roriw for constant counts.
31096 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
31097 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
31098 (simplify_context::simplify_binary_operation_1): Use it.
31099 * expmed.cc (expand_shift_1): Likewise.
31101 2023-04-17 Martin Jambor <mjambor@suse.cz>
31105 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
31106 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
31107 (ipa_zap_jf_refdesc): New function.
31108 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
31109 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
31110 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
31111 the new parameter of find_reference.
31112 (adjust_references_in_caller): Likewise. Make sure the constant jump
31113 function is not used to decrement a refdec counter again. Only
31114 decrement refdesc counters when the pass_through jump function allows
31115 it. Added a detailed dump when decrementing refdesc counters.
31116 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
31117 (ipa_set_jf_simple_pass_through): Initialize the new flag.
31118 (ipa_set_jf_unary_pass_through): Likewise.
31119 (ipa_set_jf_arith_pass_through): Likewise.
31120 (remove_described_reference): Provide a value for the new parameter of
31122 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
31123 the previous pass_through had a flag mandating that we do so.
31124 (propagate_controlled_uses): Likewise. Only decrement refdesc
31125 counters when the pass_through jump function allows it.
31126 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
31127 parameter of find_reference.
31128 (ipa_write_jump_function): Assert the new flag does not have to be
31130 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
31133 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
31134 Di Zhao <di.zhao@amperecomputing.com>
31136 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
31137 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
31138 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
31139 Check for the above tuning option when processing loads.
31141 2023-04-17 Richard Biener <rguenther@suse.de>
31143 PR tree-optimization/109524
31144 * tree-vrp.cc (remove_unreachable::m_list): Change to a
31145 vector of pairs of block indices.
31146 (remove_unreachable::maybe_register_block): Adjust.
31147 (remove_unreachable::remove_and_update_globals): Likewise.
31148 Deal with removed blocks.
31150 2023-04-16 Jeff Law <jlaw@ventanamicro>
31153 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
31154 TARGET_SFB_ALU, force the true arm into a register.
31156 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
31159 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
31160 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
31162 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
31163 (pa_function_arg_size): Change return type to int. Return zero
31164 for arguments larger than 1 GB. Update comments.
31166 2023-04-15 Jakub Jelinek <jakub@redhat.com>
31168 PR tree-optimization/109154
31169 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
31170 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
31172 2023-04-15 Jason Merrill <jason@redhat.com>
31175 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
31176 Overhaul lhs_ref.ref analysis.
31178 2023-04-14 Richard Biener <rguenther@suse.de>
31180 PR tree-optimization/109502
31181 * tree-vect-stmts.cc (vectorizable_assignment): Fix
31182 check for conversion between mask and non-mask types.
31184 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
31185 Jakub Jelinek <jakub@redhat.com>
31189 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
31190 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
31191 smaller than word_mode.
31192 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
31193 <case AND>: Likewise.
31195 2023-04-14 Jakub Jelinek <jakub@redhat.com>
31197 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
31200 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
31202 PR tree-optimization/108139
31203 PR tree-optimization/109462
31204 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
31205 equivalency check for PHI nodes.
31206 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
31207 does not dominate single-arg equivalency edges.
31209 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
31212 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
31213 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
31215 2023-04-13 Richard Biener <rguenther@suse.de>
31217 PR tree-optimization/109491
31218 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
31219 NULL operands test.
31221 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31224 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
31225 (vint16mf4_t): Ditto.
31226 (vint32mf2_t): Ditto.
31227 (vint64m1_t): Ditto.
31228 (vint64m2_t): Ditto.
31229 (vint64m4_t): Ditto.
31230 (vint64m8_t): Ditto.
31231 (vuint8mf8_t): Ditto.
31232 (vuint16mf4_t): Ditto.
31233 (vuint32mf2_t): Ditto.
31234 (vuint64m1_t): Ditto.
31235 (vuint64m2_t): Ditto.
31236 (vuint64m4_t): Ditto.
31237 (vuint64m8_t): Ditto.
31238 (vfloat32mf2_t): Ditto.
31239 (vbool64_t): Ditto.
31240 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
31241 (register_vector_type): Ditto.
31242 (check_required_extensions): Fix condition.
31243 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
31244 (RVV_REQUIRE_ELEN_64): New define.
31245 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
31246 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
31247 (TARGET_VECTOR_FP64): Ditto.
31248 (ENTRY): Fix predicate.
31249 * config/riscv/vector-iterators.md: Fix predicate.
31251 2023-04-12 Jakub Jelinek <jakub@redhat.com>
31253 PR tree-optimization/109410
31254 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
31255 block if first statement of the function is a call to returns_twice
31258 2023-04-12 Jakub Jelinek <jakub@redhat.com>
31261 * config/i386/i386.cc: Include rtl-error.h.
31262 (ix86_print_operand): For z modifier warning, use warning_for_asm
31263 if this_is_asm_operands. For Z modifier errors, use %c and code
31264 instead of hardcoded Z.
31266 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
31268 * config/i386/x-mingw32-utf8: Remove extrataneous $@
31270 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
31272 PR tree-optimization/109462
31273 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
31274 check for equivalences if NAME is a phi node.
31276 2023-04-12 Richard Biener <rguenther@suse.de>
31278 PR tree-optimization/109473
31279 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
31280 Convert scalar result to the computation type before performing
31281 the reduction adjustment.
31283 2023-04-12 Richard Biener <rguenther@suse.de>
31285 PR tree-optimization/109469
31286 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
31287 a returns-twice call.
31289 2023-04-12 Richard Biener <rguenther@suse.de>
31291 PR tree-optimization/109434
31292 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
31293 handle possibly throwing calls when processing the LHS
31294 and may-defs are not OK.
31296 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
31298 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
31299 predicate to avoid splitting arith constants.
31301 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
31302 Pan Li <pan2.li@intel.com>
31303 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31304 Kito Cheng <kito.cheng@sifive.com>
31307 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
31308 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
31309 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
31310 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
31311 (riscv_zero_call_used_regs): New.
31312 (TARGET_ZERO_CALL_USED_REGS): New.
31314 2023-04-11 Martin Liska <mliska@suse.cz>
31317 * opts.cc (finish_options): Drop also
31318 x_flag_var_tracking_assignments.
31320 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
31322 PR tree-optimization/108888
31323 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
31325 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
31328 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
31329 (vsx_sign_extend_v16qi_<mode>): ... this.
31330 (vsx_sign_extend_hi_<mode>): Rename to...
31331 (vsx_sign_extend_v8hi_<mode>): ... this.
31332 (vsx_sign_extend_si_v2di): Rename to...
31333 (vsx_sign_extend_v4si_v2di): ... this.
31334 (vsignextend_qi_<mode>): Remove.
31335 (vsignextend_hi_<mode>): Remove.
31336 (vsignextend_si_v2di): Remove.
31337 (vsignextend_v2di_v1ti): Remove.
31338 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
31339 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
31340 with gen_vsx_sign_extend_v16qi_v4si.
31341 * config/rs6000/rs6000.md (split for DI constant generation):
31342 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
31343 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
31344 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
31345 with gen_vsx_sign_extend_v16qi_si.
31346 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
31347 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
31348 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
31349 vsx_sign_extend_v16qi_v4si.
31350 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
31351 vsx_sign_extend_v8hi_v2di.
31352 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
31353 vsx_sign_extend_v8hi_v4si.
31354 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
31355 vsx_sign_extend_si_v2di.
31356 (__builtin_altivec_vsignext): Set bif-pattern to
31357 vsx_sign_extend_v2di_v1ti.
31358 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
31359 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
31360 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
31361 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
31363 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
31366 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
31367 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
31369 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
31371 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
31373 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
31375 * common/config/i386/cpuinfo.h (get_available_features):
31376 Detect AMX-COMPLEX.
31377 * common/config/i386/i386-common.cc
31378 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
31379 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
31380 (ix86_handle_option): Handle -mamx-complex.
31381 * common/config/i386/i386-cpuinfo.h (enum processor_features):
31382 Add FEATURE_AMX_COMPLEX.
31383 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
31385 * config.gcc: Add amxcomplexintrin.h.
31386 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
31387 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
31389 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
31390 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
31391 Handle amx-complex.
31392 * config/i386/i386.opt: Add option -mamx-complex.
31393 * config/i386/immintrin.h: Include amxcomplexintrin.h.
31394 * doc/extend.texi: Document amx-complex.
31395 * doc/invoke.texi: Document -mamx-complex.
31396 * doc/sourcebuild.texi: Document target amx-complex.
31397 * config/i386/amxcomplexintrin.h: New file.
31399 2023-04-08 Jakub Jelinek <jakub@redhat.com>
31401 PR tree-optimization/109392
31402 * tree-vect-generic.cc (tree_vec_extract): Handle failure
31403 of maybe_push_res_to_seq better.
31405 2023-04-08 Jakub Jelinek <jakub@redhat.com>
31407 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
31409 (SYSTEM_H): Depend on $(HASHTAB_H).
31410 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
31411 dependency on $(RTL_BASE_H), remove redundant dependency on
31414 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
31417 * config/arm/arm.cc (arm_effective_regno): New function.
31418 (mve_vector_mem_operand): Use it.
31420 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
31422 PR tree-optimization/109417
31423 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
31424 dependency is in SSA_NAME_FREE_LIST.
31426 2023-04-06 Andrew Pinski <apinski@marvell.com>
31428 PR tree-optimization/109427
31429 * params.opt (-param=vect-induction-float=):
31430 Fix option attribute typo for IntegerRange.
31432 2023-04-05 Jeff Law <jlaw@ventanamicro>
31435 * combine.cc (combine_instructions): Force re-recognition when
31436 after restoring the body of an insn to its original form.
31438 2023-04-05 Martin Jambor <mjambor@suse.cz>
31441 * ipa-sra.cc (zap_useless_ipcp_results): New function.
31442 (process_isra_node_results): Call it.
31444 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31446 * config/riscv/vector.md: Fix incorrect operand order.
31448 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31450 * config/riscv/riscv-vsetvl.cc
31451 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
31454 2023-04-05 Li Xu <xuli1@eswincomputing.com>
31456 * config/riscv/riscv-vector-builtins.def: Fix typo.
31457 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
31458 * config/riscv/vector-iterators.md: Ditto.
31460 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
31462 * doc/md.texi (Including Patterns): Fix page break.
31464 2023-04-04 Jakub Jelinek <jakub@redhat.com>
31466 PR tree-optimization/109386
31467 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
31468 foperator_le::op1_range, foperator_le::op2_range,
31469 foperator_gt::op1_range, foperator_gt::op2_range,
31470 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
31471 BRS_FALSE case even if the other op is maybe_isnan, not just
31473 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
31474 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
31475 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
31476 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
31477 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
31478 not just known_isnan.
31480 2023-04-04 Marek Polacek <polacek@redhat.com>
31482 PR sanitizer/109107
31483 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
31485 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
31487 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
31489 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
31490 (mve_vcreateq_f<mode>): Swap operands.
31492 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
31494 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
31496 2023-04-04 Jakub Jelinek <jakub@redhat.com>
31499 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
31500 Reword diagnostics about zfinx conflict with f, formatting fixes.
31502 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
31504 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
31506 2023-04-04 Richard Biener <rguenther@suse.de>
31508 PR tree-optimization/109304
31509 * tree-profile.cc (tree_profiling): Use symtab node
31510 availability to decide whether to skip adjusting calls.
31511 Do not adjust calls to internal functions.
31513 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
31516 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
31517 function for permutation control vector by considering big endianness.
31519 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
31522 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
31523 (rs6000_vprtyb<mode>2): ... this.
31524 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
31525 rs6000_vprtybv2di2.
31526 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
31527 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
31528 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
31529 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
31531 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
31532 Sandra Loosemore <sandra@codesourcery.com>
31534 * doc/md.texi (Insn Splitting): Tweak wording for readability.
31536 2023-04-03 Martin Jambor <mjambor@suse.cz>
31539 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
31540 offset + size will be representable in unsigned int.
31542 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
31544 * configure.ac (ZSTD_LIB): Move before zstd.h check.
31545 Unset gcc_cv_header_zstd_h without libzstd.
31546 * configure: Regenerate.
31548 2023-04-03 Martin Liska <mliska@suse.cz>
31550 * doc/invoke.texi: Document new param.
31552 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
31554 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
31555 new check_effective_target function.
31557 2023-04-03 Li Xu <xuli1@eswincomputing.com>
31559 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
31560 (vfloat32m8_t): Likewise
31562 2023-04-03 liuhongt <hongtao.liu@intel.com>
31564 * doc/md.texi: Document signbitm2.
31566 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31567 kito-cheng <kito.cheng@sifive.com>
31569 * config/riscv/vector.md: Fix RA constraint.
31571 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31573 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
31574 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
31575 * config/riscv/vector.md: Fix scalar move bug.
31577 2023-04-01 Jakub Jelinek <jakub@redhat.com>
31579 * range-op-float.cc (foperator_equal::fold_range): If at least
31580 one of the op ranges is not singleton and neither is NaN and all
31581 4 bounds are zero, return [1, 1].
31582 (foperator_not_equal::fold_range): In the same case return [0, 0].
31584 2023-04-01 Jakub Jelinek <jakub@redhat.com>
31586 * range-op-float.cc (foperator_equal::fold_range): Perform the
31587 non-singleton handling regardless of maybe_isnan (op1, op2).
31588 (foperator_not_equal::fold_range): Likewise.
31589 (foperator_lt::fold_range, foperator_le::fold_range,
31590 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
31591 real_* comparison check which results in range_false (type)
31592 even if maybe_isnan (op1, op2). Simplify.
31593 (foperator_ltgt): New class.
31594 (fop_ltgt): New variable.
31595 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
31598 2023-04-01 Jakub Jelinek <jakub@redhat.com>
31601 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
31602 returns VOIDmode, handle it like if the register isn't used for
31603 passing arguments at all.
31604 (apply_result_size): If targetm.calls.get_raw_result_mode returns
31605 VOIDmode, handle it like if the register isn't used for returning
31607 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
31608 means to return VOIDmode.
31609 * doc/tm.texi: Regenerated.
31610 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
31611 TARGET_SVE for P0_REGNUM.
31612 (aarch64_function_arg_regno_p): Also return true for p0-p3.
31613 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
31615 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
31617 * lra-constraints.cc: (combine_reload_insn): New function.
31619 2023-03-31 Jakub Jelinek <jakub@redhat.com>
31621 PR tree-optimization/91645
31622 * range-op-float.cc (foperator_unordered_lt::fold_range,
31623 foperator_unordered_le::fold_range,
31624 foperator_unordered_gt::fold_range,
31625 foperator_unordered_ge::fold_range,
31626 foperator_unordered_equal::fold_range): Call the ordered
31627 fold_range on ranges with cleared NaNs.
31628 * value-query.cc (range_query::get_tree_range): Handle also
31629 COMPARISON_CLASS_P trees.
31631 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
31632 Andrew Pinski <pinskia@gmail.com>
31635 * config/riscv/t-riscv: Add missing dependencies.
31637 2023-03-31 liuhongt <hongtao.liu@intel.com>
31639 * config/i386/i386.cc (inline_memory_move_cost): Return 100
31640 for MASK_REGS when MODE_SIZE > 8.
31642 2023-03-31 liuhongt <hongtao.liu@intel.com>
31645 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
31646 ufloat/ufix to floatuns/fixuns.
31647 * config/i386/i386-expand.cc
31648 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
31649 * config/i386/sse.md
31650 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
31652 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
31653 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
31655 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
31657 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
31659 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
31660 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
31661 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
31662 (ufloatv2siv2df2<mask_name>): Renamed to ..
31663 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
31664 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
31666 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
31668 (ufix_notruncv2dfv2si2): Renamed to ..
31669 (fixuns_notruncv2dfv2si2):.. this.
31670 (ufix_notruncv2dfv2si2_mask): Renamed to ..
31671 (fixuns_notruncv2dfv2si2_mask): .. this.
31672 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
31673 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
31674 (ufix_truncv2dfv2si2): Renamed to ..
31675 (*fixuns_truncv2dfv2si2): .. this.
31676 (ufix_truncv2dfv2si2_mask): Renamed to ..
31677 (fixuns_truncv2dfv2si2_mask): .. this.
31678 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
31679 (*fixuns_truncv2dfv2si2_mask_1): .. this.
31680 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
31681 (fixuns_truncv4dfv4si2<mask_name>): .. this.
31682 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
31684 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
31686 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
31687 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
31690 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
31692 PR tree-optimization/109154
31693 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
31694 * gimple-range-gori.h (may_recompute_p): Add depth param.
31695 * params.opt (ranger-recompute-depth): New param.
31697 2023-03-30 Jason Merrill <jason@redhat.com>
31701 * cgraph.h: Move reset() from cgraph_node to symtab_node.
31702 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
31703 remove_from_same_comdat_group.
31705 2023-03-30 Richard Biener <rguenther@suse.de>
31707 PR tree-optimization/107561
31708 * gimple-ssa-warn-access.cc (get_size_range): Add flags
31709 argument and pass it on.
31710 (check_access): When querying for the size range pass
31711 SR_ALLOW_ZERO when the known destination size is zero.
31713 2023-03-30 Richard Biener <rguenther@suse.de>
31715 PR tree-optimization/109342
31716 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
31717 overload for edge. When that edge is a backedge use
31718 dominated_by_p directly.
31720 2023-03-30 liuhongt <hongtao.liu@intel.com>
31722 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
31723 vpblendd instead of vpblendw for V4SI under avx2.
31725 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
31727 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
31728 for many quick operands, for register-sized modes.
31730 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
31732 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
31735 2023-03-29 Martin Liska <mliska@suse.cz>
31737 PR bootstrap/109310
31738 * configure.ac: Emit a warning for deprecated option
31739 --enable-link-mutex.
31740 * configure: Regenerate.
31742 2023-03-29 Richard Biener <rguenther@suse.de>
31744 PR tree-optimization/109331
31745 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
31746 discover a taken edge make sure to cleanup the CFG.
31748 2023-03-29 Richard Biener <rguenther@suse.de>
31750 PR tree-optimization/109327
31751 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
31752 already removed stmts when draining to_remove.
31754 2023-03-29 Richard Biener <rguenther@suse.de>
31757 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
31758 so we can re-create the DIE for the type if required.
31760 2023-03-29 Jakub Jelinek <jakub@redhat.com>
31761 Richard Biener <rguenther@suse.de>
31763 PR tree-optimization/109301
31764 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
31765 properties_provided from PROP_gimple_opt_math to 0.
31766 (pass_data_expand_powcabs): Change properties_provided from 0 to
31767 PROP_gimple_opt_math.
31769 2023-03-29 Richard Biener <rguenther@suse.de>
31771 PR tree-optimization/109154
31772 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
31773 inverted condition specially by inverting at the caller.
31774 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
31776 2023-03-28 David Malcolm <dmalcolm@redhat.com>
31779 * diagnostic-show-locus.cc (column_range::column_range): Factor
31780 out assertion conditional into...
31781 (column_range::valid_p): ...this new function.
31782 (line_corrections::add_hint): Don't attempt to consolidate hints
31783 if it would lead to invalid column_range instances.
31785 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
31788 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
31789 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
31792 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
31794 PR rtl-optimization/109187
31795 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
31796 subtraction in three-way comparison.
31798 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
31800 PR tree-optimization/109265
31801 PR tree-optimization/109274
31802 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
31803 not create a relation record is op1 and op2 are the same symbol.
31804 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
31805 handler for this stmt, but create a new record only if this statement
31806 generates a relation based on the ranges.
31807 (gori_compute::compute_operand2_range): Ditto.
31808 * value-relation.h (value_relation::set_relation): Always create the
31809 record that is requested.
31811 2023-03-28 Richard Biener <rguenther@suse.de>
31813 PR tree-optimization/107087
31814 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
31815 executable regions to avoid useless work and to better
31816 propagate degenerate PHIs.
31818 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
31820 * config/i386/x-mingw32-utf8: update comments.
31822 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
31825 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
31826 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
31828 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
31830 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
31831 after inlining. Record which decls are loaded from. Fix handling
31832 of vops for loads and stores.
31833 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
31834 (aarch64_accesses_vector_load_decl_p): Likewise.
31835 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
31837 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
31838 that loads from a decl, treat vector stores to those decls as
31840 (aarch64_vector_costs::finish_cost): ...and in that case,
31841 if the vector code does nothing more than a store, give the
31842 prologue a zero cost as well.
31844 2023-03-28 Richard Biener <rguenther@suse.de>
31847 PR tree-optimization/108129
31848 * genmatch.cc (lower_for): For (match ...) delay
31849 substituting into the match operator if possible.
31850 (dt_operand::gen_gimple_expr): For user_id look at the
31851 first substitute for determining how to access operands.
31852 (dt_operand::gen_generic_expr): Likewise.
31853 (dt_node::gen_kids): Properly sort user_ids according
31854 to their substitutes.
31855 (dt_node::gen_kids_1): Code-generate user_id matching.
31857 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31858 Jonathan Wakely <jwakely@redhat.com>
31860 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
31861 Use subcommand rather than sub-command in function comments.
31863 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31865 PR tree-optimization/109154
31866 * value-range.h (frange::flush_denormals_to_zero): Make it public
31867 rather than private.
31868 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
31870 * range-op-float.cc (range_operator_float::fold_range): Call
31871 flush_denormals_to_zero.
31873 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31875 PR middle-end/106190
31876 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
31877 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
31879 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31881 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
31882 as 4th argument to set to avoid clear_nan and union_ calls.
31884 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31887 * config/i386/i386.cc (assign_386_stack_local): For DImode
31888 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
31889 align 32 rather than 0 to assign_stack_local.
31891 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
31894 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
31895 on operand #3 to get the final condition code. Use std::swap.
31896 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
31897 (fucmp<gcond:code>8<P:mode>_vis): Move around.
31898 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
31899 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
31901 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
31903 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
31904 top-level sections.
31906 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
31908 * config.host: Pull in i386/x-mingw32-utf8 Makefile
31909 fragment and reference utf8rc-mingw32.o explicitly
31911 * config/i386/sym-mingw32.cc: prevent name mangling of
31913 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
31914 depend on manifest file explicitly.
31916 2023-03-28 Richard Biener <rguenther@suse.de>
31919 2023-03-27 Richard Biener <rguenther@suse.de>
31921 PR rtl-optimization/109237
31922 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
31924 2023-03-28 Richard Biener <rguenther@suse.de>
31926 * common.opt (gdwarf): Remove Negative(gdwarf-).
31928 2023-03-28 Richard Biener <rguenther@suse.de>
31930 * common.opt (gdwarf): Add RejectNegative.
31931 (gdwarf-): Likewise.
31935 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31937 * config/cris/constraints.md ("T"): Correct to
31938 define_memory_constraint.
31940 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31942 * config/cris/cris.md (BW2): New mode-iterator.
31943 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
31946 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31948 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
31949 for possible eliminable compares.
31951 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31953 * config/cris/constraints.md ("R"): Remove unused constraint.
31955 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
31957 PR gcov-profile/109297
31958 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
31959 (merge_stream_usage): Likewise.
31960 (overlap_usage): Likewise.
31962 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
31965 * config/riscv/thead.md: Add missing mode specifiers.
31967 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
31968 Jiangning Liu <jiangning.liu@amperecomputing.com>
31969 Manolis Tsamis <manolis.tsamis@vrull.eu>
31971 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
31973 2023-03-27 Richard Biener <rguenther@suse.de>
31975 PR rtl-optimization/109237
31976 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
31978 2023-03-27 Richard Biener <rguenther@suse.de>
31981 * lto-wrapper.cc (run_gcc): Parse alternate debug options
31982 as well, they always enable debug.
31984 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
31987 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
31989 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
31991 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
31994 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
31995 than zero when calling vec_sld.
31996 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
31997 zero when calling vec_sld.
31998 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
31999 than zero when calling vec_sld.
32001 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
32003 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
32004 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
32005 loops are represented and which fields are vectors. Add
32006 documentation for OMP_FOR_PRE_BODY field. Document internal
32007 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
32008 * tree.def (OMP_FOR): Make documentation consistent with the
32009 Texinfo manual, to fill some gaps and correct errors.
32011 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
32014 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
32015 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
32016 (handle_move_double): Call it before handle_movsi.
32017 * config/m68k/m68k-protos.h: Declare it.
32019 2023-03-26 Jakub Jelinek <jakub@redhat.com>
32021 PR tree-optimization/109230
32022 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
32024 2023-03-26 Jakub Jelinek <jakub@redhat.com>
32027 * predict.cc (compute_function_frequency): Don't call
32028 warn_function_cold if function already has cold attribute.
32030 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
32032 * doc/install.texi: Remove anachronistic note
32033 related to languages built and separate source tarballs.
32035 2023-03-25 David Malcolm <dmalcolm@redhat.com>
32038 * diagnostic-format-sarif.cc (read_until_eof): Delete.
32039 (maybe_read_file): Delete.
32040 (sarif_builder::maybe_make_artifact_content_object): Use
32041 get_source_file_content rather than maybe_read_file.
32042 Reject it if it's not valid UTF-8.
32043 * input.cc (file_cache_slot::get_full_file_content): New.
32044 (get_source_file_content): New.
32045 (selftest::check_cpp_valid_utf8_p): New.
32046 (selftest::test_cpp_valid_utf8_p): New.
32047 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
32048 * input.h (get_source_file_content): New prototype.
32050 2023-03-24 David Malcolm <dmalcolm@redhat.com>
32052 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
32054 (Special Functions for Debugging the Analyzer): Convert to a
32055 table, and rewrite in places.
32056 (Other Debugging Techniques): Add notes on how to compare two
32057 different exploded graphs.
32059 2023-03-24 David Malcolm <dmalcolm@redhat.com>
32062 * json.cc: Update comments to indicate that we now preserve
32063 insertion order of keys within objects.
32064 (object::print): Traverse keys in insertion order.
32065 (object::set): Preserve insertion order of keys.
32066 (selftest::test_writing_objects): Add an additional key to verify
32067 that we preserve insertion order.
32068 * json.h (object::m_keys): New field.
32070 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
32072 PR tree-optimization/109238
32073 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
32074 predecessors which this block dominates.
32076 2023-03-24 Richard Biener <rguenther@suse.de>
32078 PR tree-optimization/106912
32079 * tree-profile.cc (tree_profiling): Update stmts only when
32080 profiling or testing coverage. Make sure to update calls
32081 fntype, stripping 'const' there.
32083 2023-03-24 Jakub Jelinek <jakub@redhat.com>
32085 PR middle-end/109258
32086 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
32087 if target == const0_rtx.
32089 2023-03-24 Alexandre Oliva <oliva@adacore.com>
32091 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
32092 Document options and effective targets.
32094 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
32096 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
32099 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
32101 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
32102 non-earlyclobber alternative.
32104 2023-03-23 Andrew Pinski <apinski@marvell.com>
32107 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
32110 2023-03-23 Richard Biener <rguenther@suse.de>
32112 PR tree-optimization/107569
32113 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
32114 Do not push SSA names with zero uses as available leader.
32115 (process_bb): Likewise.
32117 2023-03-23 Richard Biener <rguenther@suse.de>
32119 PR tree-optimization/109262
32120 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
32121 combining a piecewise complex load avoid touching loads
32122 that throw internally. Use fun, not cfun throughout.
32124 2023-03-23 Jakub Jelinek <jakub@redhat.com>
32126 * value-range.cc (irange::irange_union, irange::intersect): Fix
32127 comment spelling bugs.
32128 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
32129 * gimple-range-trace.h: Likewise.
32130 * gimple-range-edge.cc: Likewise.
32131 (gimple_outgoing_range_stmt_p,
32132 gimple_outgoing_range::switch_edge_range,
32133 gimple_outgoing_range::edge_range_p): Likewise.
32134 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
32135 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
32136 assume_query::assume_query, assume_query::calculate_phi): Likewise.
32137 * gimple-range-edge.h: Likewise.
32138 * value-range.h (Value_Range::set, Value_Range::lower_bound,
32139 Value_Range::upper_bound, frange::set_undefined): Likewise.
32140 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
32141 gori_compute): Likewise.
32142 * gimple-range-fold.h (fold_using_range): Likewise.
32143 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
32145 * gimple-range-gori.cc (range_def_chain::in_chain_p,
32146 range_def_chain::dump, gori_map::calculate_gori,
32147 gori_compute::compute_operand_range_switch,
32148 gori_compute::logical_combine, gori_compute::refine_using_relation,
32149 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
32151 * gimple-range.h: Likewise.
32152 (enable_ranger): Likewise.
32153 * range-op.h (empty_range_varying): Likewise.
32154 * value-query.h (value_query): Likewise.
32155 * gimple-range-cache.cc (block_range_cache::set_bb_range,
32156 block_range_cache::dump, ssa_global_cache::clear_global_range,
32157 temporal_cache::temporal_value, temporal_cache::current_p,
32158 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
32159 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
32161 * gimple-range-fold.cc (fur_edge::get_phi_operand,
32162 fur_stmt::get_operand, gimple_range_adjustment,
32163 fold_using_range::range_of_phi,
32164 fold_using_range::relation_fold_and_or): Likewise.
32165 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
32166 * value-query.cc (range_query::value_of_expr,
32167 range_query::value_on_edge, range_query::query_relation): Likewise.
32168 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
32169 intersect_range_with_nonzero_bits): Likewise.
32170 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
32171 exit_range): Likewise.
32172 * value-relation.h: Likewise.
32173 (equiv_oracle, relation_trio::relation_trio, value_relation,
32174 value_relation::value_relation, pe_min): Likewise.
32175 * range-op-float.cc (range_operator_float::rv_fold,
32176 frange_arithmetic, foperator_unordered_equal::op1_range,
32177 foperator_div::rv_fold): Likewise.
32178 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
32179 * value-relation.cc (equiv_oracle::query_relation,
32180 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
32181 value_relation::apply_transitive, relation_chain_head::find_relation,
32182 dom_oracle::query_relation, dom_oracle::find_relation_block,
32183 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
32184 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
32185 create_possibly_reversed_range, adjust_op1_for_overflow,
32186 operator_mult::wi_fold, operator_exact_divide::op1_range,
32187 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
32188 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
32189 range_op_lshift_tests): Likewise.
32191 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
32193 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
32194 (move_callee_saved_registers): Detect the bug condition early.
32196 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
32198 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
32199 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
32201 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
32202 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
32203 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
32204 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
32205 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
32207 2023-03-23 Jakub Jelinek <jakub@redhat.com>
32209 PR tree-optimization/109176
32210 * tree-vect-generic.cc (expand_vector_condition): If a has
32211 vector boolean type and is a comparison, also check if both
32212 the comparison and VEC_COND_EXPR could be successfully expanded
32215 2023-03-23 Pan Li <pan2.li@intel.com>
32216 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32220 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
32221 for vector mask modes.
32222 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
32223 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
32225 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
32227 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
32229 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32232 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
32233 (emit_vlmax_op): Ditto.
32234 * config/riscv/riscv-v.cc (get_sew): New function.
32235 (emit_vlmax_vsetvl): Adapt function.
32236 (emit_pred_op): Ditto.
32237 (emit_vlmax_op): Ditto.
32238 (emit_nonvlmax_op): Ditto.
32239 (legitimize_move): Fix LRA ICE.
32240 (gen_no_side_effects_vsetvl_rtx): Adapt function.
32241 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
32242 (@mov<VB:mode><P:mode>_lra): Ditto.
32243 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
32244 (*mov<VB:mode><P:mode>_lra): Ditto.
32246 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32249 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
32250 __riscv_vlenb support.
32252 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32253 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
32254 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
32256 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32257 * config/riscv/riscv-vector-builtins.cc: Ditto.
32259 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32260 kito-cheng <kito.cheng@sifive.com>
32262 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
32263 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
32264 (pass_vsetvl::need_vsetvl): Fix bugs.
32265 (pass_vsetvl::backward_demand_fusion): Fix bugs.
32266 (pass_vsetvl::demand_fusion): Fix bugs.
32267 (eliminate_insn): Fix bugs.
32268 (insert_vsetvl): Ditto.
32269 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
32270 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
32271 * config/riscv/vector.md: Ditto.
32273 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32274 kito-cheng <kito.cheng@sifive.com>
32276 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
32277 * config/riscv/vector-iterators.md (nmsac): Ditto.
32283 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
32284 (@pred_mul_plus<mode>): Ditto.
32285 (*pred_madd<mode>): Ditto.
32286 (*pred_macc<mode>): Ditto.
32287 (*pred_mul_plus<mode>): Ditto.
32288 (@pred_mul_plus<mode>_scalar): Ditto.
32289 (*pred_madd<mode>_scalar): Ditto.
32290 (*pred_macc<mode>_scalar): Ditto.
32291 (*pred_mul_plus<mode>_scalar): Ditto.
32292 (*pred_madd<mode>_extended_scalar): Ditto.
32293 (*pred_macc<mode>_extended_scalar): Ditto.
32294 (*pred_mul_plus<mode>_extended_scalar): Ditto.
32295 (@pred_minus_mul<mode>): Ditto.
32296 (*pred_<madd_nmsub><mode>): Ditto.
32297 (*pred_nmsub<mode>): Ditto.
32298 (*pred_<macc_nmsac><mode>): Ditto.
32299 (*pred_nmsac<mode>): Ditto.
32300 (*pred_mul_<optab><mode>): Ditto.
32301 (*pred_minus_mul<mode>): Ditto.
32302 (@pred_mul_<optab><mode>_scalar): Ditto.
32303 (@pred_minus_mul<mode>_scalar): Ditto.
32304 (*pred_<madd_nmsub><mode>_scalar): Ditto.
32305 (*pred_nmsub<mode>_scalar): Ditto.
32306 (*pred_<macc_nmsac><mode>_scalar): Ditto.
32307 (*pred_nmsac<mode>_scalar): Ditto.
32308 (*pred_mul_<optab><mode>_scalar): Ditto.
32309 (*pred_minus_mul<mode>_scalar): Ditto.
32310 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
32311 (*pred_nmsub<mode>_extended_scalar): Ditto.
32312 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
32313 (*pred_nmsac<mode>_extended_scalar): Ditto.
32314 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
32315 (*pred_minus_mul<mode>_extended_scalar): Ditto.
32316 (*pred_<madd_msub><mode>): Ditto.
32317 (*pred_<macc_msac><mode>): Ditto.
32318 (*pred_<madd_msub><mode>_scalar): Ditto.
32319 (*pred_<macc_msac><mode>_scalar): Ditto.
32320 (@pred_neg_mul_<optab><mode>): Ditto.
32321 (@pred_mul_neg_<optab><mode>): Ditto.
32322 (*pred_<nmadd_msub><mode>): Ditto.
32323 (*pred_<nmsub_nmadd><mode>): Ditto.
32324 (*pred_<nmacc_msac><mode>): Ditto.
32325 (*pred_<nmsac_nmacc><mode>): Ditto.
32326 (*pred_neg_mul_<optab><mode>): Ditto.
32327 (*pred_mul_neg_<optab><mode>): Ditto.
32328 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
32329 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
32330 (*pred_<nmadd_msub><mode>_scalar): Ditto.
32331 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
32332 (*pred_<nmacc_msac><mode>_scalar): Ditto.
32333 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
32334 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
32335 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
32336 (@pred_widen_neg_mul_<optab><mode>): Ditto.
32337 (@pred_widen_mul_neg_<optab><mode>): Ditto.
32338 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
32339 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
32341 2023-03-23 liuhongt <hongtao.liu@intel.com>
32343 * builtins.cc (builtin_memset_read_str): Replace
32344 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
32345 (builtin_memset_gen_str): Ditto.
32346 * config/i386/i386-expand.cc
32347 (ix86_convert_const_wide_int_to_broadcast): Replace
32348 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
32349 (ix86_expand_vector_move): Ditto.
32350 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
32352 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
32353 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
32354 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
32355 * doc/tm.texi.in: Ditto.
32356 * target.def: Ditto.
32358 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
32360 * lra.cc (lra): Do not repeat inheritance and live range splitting
32361 when asm error is found.
32363 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
32365 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
32366 (gcn_expand_dpp_distribute_even_insn)
32367 (gcn_expand_dpp_distribute_odd_insn): Declare.
32368 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
32369 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
32370 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
32371 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
32372 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
32373 (fms<mode>4_negop2): New patterns.
32374 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
32375 (gcn_expand_dpp_distribute_even_insn)
32376 (gcn_expand_dpp_distribute_odd_insn): New functions.
32377 * config/gcn/gcn.md: Add entries to unspec enum.
32379 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
32381 PR tree-optimization/109008
32382 * value-range.cc (frange::set): Add nan_state argument.
32383 * value-range.h (class nan_state): New.
32384 (frange::get_nan_state): New.
32386 2023-03-22 Martin Liska <mliska@suse.cz>
32388 * configure: Regenerate.
32390 2023-03-21 Joseph Myers <joseph@codesourcery.com>
32392 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
32395 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
32397 PR tree-optimization/109192
32398 * gimple-range-gori.cc (gori_compute::compute_operand_range):
32399 Terminate gori calculations if a relation is not relevant.
32400 * value-relation.h (value_relation::set_relation): Allow
32401 equality between op1 and op2 if they are the same.
32403 2023-03-21 Richard Biener <rguenther@suse.de>
32405 PR tree-optimization/109219
32406 * tree-vect-loop.cc (vectorizable_reduction): Check
32407 slp_node, not STMT_SLP_TYPE.
32408 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
32409 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
32410 Remove assertion on STMT_SLP_TYPE.
32412 2023-03-21 Jakub Jelinek <jakub@redhat.com>
32414 PR tree-optimization/109215
32415 * tree.h (enum special_array_member): Adjust comments for int_0
32417 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
32418 has zero sized element type and the array has variable number of
32419 elements or constant one or more elements.
32420 (component_ref_size): Adjust comments, formatting fix.
32422 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
32424 * configure.ac: Add check for the Texinfo 6.8
32425 CONTENTS_OUTPUT_LOCATION customization variable and set it if
32427 * configure: Regenerate.
32428 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
32429 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
32430 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
32431 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
32433 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
32435 * doc/extend.texi: Associate use_hazard_barrier_return index
32436 entry with its attribute.
32437 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
32440 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
32442 * doc/implement-c.texi: Remove usage of @gol.
32443 * doc/invoke.texi: Ditto.
32444 * doc/sourcebuild.texi: Ditto.
32445 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
32446 texinfo.tex versions, the bug it was working around appears to
32449 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
32451 * doc/include/texinfo.tex: Update to 2023-01-17.19.
32453 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
32455 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
32456 @enddefbuiltin for defining built-in functions.
32457 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
32458 places where it should be used.
32460 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
32462 * doc/extend.texi (Formatted Output Function Checking): New
32463 subsection for grouping together printf et al.
32464 (Exception handling) Fix missing @ sign before copyright
32465 header, which lead to the copyright line leaking into
32466 '(gcc)Exception handling'.
32467 * doc/gcc.texi: Set document language to en_US.
32468 (@copying): Wrap front cover texts in quotations, move in manual
32471 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
32473 * doc/gcc.texi: Add the Indices appendix, to make texinfo
32474 generate nice indices overview page.
32476 2023-03-21 Richard Biener <rguenther@suse.de>
32478 PR tree-optimization/109170
32479 * gimple-range-op.cc (cfn_pass_through_arg1): New.
32480 (gimple_range_op_handler::maybe_builtin_call): Handle
32481 __builtin_expect via cfn_pass_through_arg1.
32483 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
32486 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
32487 (init_float128_ieee): Delete code to switch complex multiply and divide
32489 (complex_multiply_builtin_code): New helper function.
32490 (complex_divide_builtin_code): Likewise.
32491 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
32492 of complex 128-bit multiply and divide built-in functions.
32494 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
32497 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
32499 2023-03-19 Jonny Grant <jg@jguk.org>
32501 * doc/extend.texi (Common Function Attributes) <nonnull>:
32504 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
32506 PR rtl-optimization/109179
32507 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
32508 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
32510 2023-03-17 Jakub Jelinek <jakub@redhat.com>
32513 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
32515 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
32516 to allocate_struct_function instead of false.
32517 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
32518 nor DECL_RESULT here. Pass true as ABSTRACT_P to
32519 push_struct_function. Call targetm.target_option.relayout_function
32521 (tree_function_versioning): Formatting fix.
32523 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
32525 * lra-constraints.cc: Include hooks.h.
32526 (combine_reload_insn): New function.
32527 (lra_constraints): Call it.
32529 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32530 kito-cheng <kito.cheng@sifive.com>
32532 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
32533 as legitimate value.
32534 * config/riscv/riscv-vector-builtins.cc
32535 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
32536 (function_expander::use_widen_ternop_insn): Ditto.
32537 * config/riscv/vector.md (@vundefined<mode>): New pattern.
32538 (pred_mul_<optab><mode>_undef_merge): Remove.
32539 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
32540 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
32541 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
32542 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
32544 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32547 * config/riscv/riscv.md: Fix subreg bug.
32549 2023-03-17 Jakub Jelinek <jakub@redhat.com>
32551 PR middle-end/108685
32552 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
32553 use its loop_father rather than BODY_BB's loop_father.
32554 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
32555 If broken_loop with ordered > collapse and at least one of those
32556 extra loops aren't guaranteed to have at least one iteration, change
32557 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
32558 loop_father to l0_bb's loop_father rather than l1_bb's.
32560 2023-03-17 Jakub Jelinek <jakub@redhat.com>
32563 * gdbhooks.py (TreePrinter.to_string): Wrap
32564 gdb.parse_and_eval('tree_code_type') in a try block, parse
32565 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
32566 raises exception. Update comments for the recent tree_code_type
32569 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
32571 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
32572 issues. Add more line breaks to example so it doesn't overflow
32575 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
32577 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
32578 line breaks in examples.
32579 <malloc>: Fix bad line breaks in running text, also copy-edit
32581 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
32582 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
32584 (C++ Dialect Options) <-fcontracts>: Add line break in example.
32585 <-Wctad-maybe-unsupported>: Likewise.
32586 <-Winvalid-constexpr>: Likewise.
32587 (Warning Options) <-Wdangling-pointer>: Likewise.
32588 <-Winterference-size>: Likewise.
32589 <-Wvla-parameter>: Likewise.
32590 (Static Analyzer Options): Fix bad line breaks in running text,
32591 plus add some missing markup.
32592 (Optimize Options) <openacc-privatization>: Fix more bad line
32593 breaks in running text.
32595 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
32597 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
32598 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
32599 (expand_vec_perm_2perm_pblendv): Ditto.
32601 2023-03-16 Martin Liska <mliska@suse.cz>
32603 PR middle-end/106133
32604 * gcc.cc (driver_handle_option): Use x_main_input_basename
32605 if x_dump_base_name is null.
32606 * opts.cc (common_handle_option): Likewise.
32608 2023-03-16 Richard Biener <rguenther@suse.de>
32610 PR tree-optimization/109123
32611 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
32612 Do not emit -Wuse-after-free late.
32613 (pass_waccess::check_call): Always check call pointer uses.
32615 2023-03-16 Richard Biener <rguenther@suse.de>
32617 PR tree-optimization/109141
32618 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
32619 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
32621 (renumber_gimple_stmt_uids): ... here and
32622 (renumber_gimple_stmt_uids_in_blocks): ... here.
32623 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
32624 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
32626 (pass_waccess::check_pointer_uses): Process all PHIs.
32628 2023-03-15 David Malcolm <dmalcolm@redhat.com>
32631 * diagnostic-format-sarif.cc (class sarif_invocation): New.
32632 (class sarif_ice_notification): New.
32633 (sarif_builder::m_invocation_obj): New field.
32634 (sarif_invocation::add_notification_for_ice): New.
32635 (sarif_invocation::prepare_to_flush): New.
32636 (sarif_ice_notification::sarif_ice_notification): New.
32637 (sarif_builder::sarif_builder): Add m_invocation_obj.
32638 (sarif_builder::end_diagnostic): Special-case DK_ICE and
32640 (sarif_builder::flush_to_file): Call prepare_to_flush on
32641 m_invocation_obj. Pass the latter to make_top_level_object.
32642 (sarif_builder::make_result_object): Move creation of "locations"
32644 (sarif_builder::make_locations_arr): ...this new function.
32645 (sarif_builder::make_top_level_object): Add "invocation_obj" param
32646 and pass it to make_run_object.
32647 (sarif_builder::make_run_object): Add "invocation_obj" param and
32649 (sarif_ice_handler): New callback.
32650 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
32651 * diagnostic.cc (diagnostic_initialize): Initialize new field
32653 (diagnostic_action_after_output): If it is set, make one attempt
32654 to call ice_handler_cb.
32655 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
32657 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
32659 * config/i386/i386-expand.cc (expand_vec_perm_blend):
32660 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
32661 and fix V2HImode handling.
32662 (expand_vec_perm_1): Try to emit BLEND instruction
32663 before MOVSS/MOVSD.
32664 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
32666 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
32668 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
32670 2023-03-15 Richard Biener <rguenther@suse.de>
32672 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
32673 Do not diagnose clobbers.
32675 2023-03-15 Richard Biener <rguenther@suse.de>
32677 PR tree-optimization/109139
32678 * tree-ssa-live.cc (remove_unused_locals): Look at the
32679 base address for unused decls on the LHS of .DEFERRED_INIT.
32681 2023-03-15 Xi Ruoyao <xry111@xry111.site>
32684 * builtins.cc (inline_string_cmp): Force the character
32685 difference into "result" pseudo-register, instead of reassign
32686 the pseudo-register.
32688 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32690 * config.gcc: Add thead.o to RISC-V extra_objs.
32691 * config/riscv/peephole.md: Add mempair peephole passes.
32692 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
32694 (th_mempair_operands_p): Likewise.
32695 (th_mempair_order_operands): Likewise.
32696 (th_mempair_prepare_save_restore_operands): Likewise.
32697 (th_mempair_save_restore_regs): Likewise.
32698 (th_mempair_output_move): Likewise.
32699 * config/riscv/riscv.cc (riscv_save_reg): Move code.
32700 (riscv_restore_reg): Move code.
32701 (riscv_for_each_saved_reg): Add code to emit mempair insns.
32702 * config/riscv/t-riscv: Add thead.cc.
32703 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
32705 (*th_mempair_store_<GPR:mode>2): Likewise.
32706 (*th_mempair_load_extendsidi2): Likewise.
32707 (*th_mempair_load_zero_extendsidi2): Likewise.
32708 * config/riscv/thead.cc: New file.
32710 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32712 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
32713 New constraint "th_f_fmv".
32714 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
32716 * config/riscv/riscv.cc (riscv_split_doubleword_move):
32717 Add split code for XTheadFmv.
32718 (riscv_secondary_memory_needed): XTheadFmv does not need
32720 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
32721 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
32722 movdf_hardfloat_rv32.
32723 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
32724 (th_fmv_x_w): New INSN.
32725 (th_fmv_x_hw): New INSN.
32727 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32729 * config/riscv/riscv.md (maddhisi4): New expand.
32730 (msubhisi4): New expand.
32731 * config/riscv/thead.md (*th_mula<mode>): New pattern.
32732 (*th_mulawsi): New pattern.
32733 (*th_mulawsi2): New pattern.
32734 (*th_maddhisi4): New pattern.
32735 (*th_sextw_maddhisi4): New pattern.
32736 (*th_muls<mode>): New pattern.
32737 (*th_mulswsi): New pattern.
32738 (*th_mulswsi2): New pattern.
32739 (*th_msubhisi4): New pattern.
32740 (*th_sextw_msubhisi4): New pattern.
32742 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32744 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
32745 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
32747 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
32749 (riscv_expand_conditional_move): New function.
32750 (riscv_expand_conditional_move_onesided): New function.
32751 * config/riscv/riscv.md: Add support for XTheadCondMov.
32752 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
32753 support for XTheadCondMov.
32754 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
32756 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32758 * config/riscv/bitmanip.md (clzdi2): New expand.
32759 (clzsi2): New expand.
32760 (ctz<mode>2): New expand.
32761 (popcount<mode>2): New expand.
32762 (<bitmanip_optab>si2): Rename INSN.
32763 (*<bitmanip_optab>si2): Hide INSN name.
32764 (<bitmanip_optab>di2): Rename INSN.
32765 (*<bitmanip_optab>di2): Hide INSN name.
32766 (rotrsi3): Remove INSN.
32767 (rotr<mode>3): Add expand.
32768 (*rotrsi3): New INSN.
32769 (rotrdi3): Rename INSN.
32770 (*rotrdi3): Hide INSN name.
32771 (rotrsi3_sext): Rename INSN.
32772 (*rotrsi3_sext): Hide INSN name.
32773 (bswap<mode>2): Remove INSN.
32774 (bswapdi2): Add expand.
32775 (bswapsi2): Add expand.
32776 (*bswap<mode>2): Hide INSN name.
32777 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
32779 * config/riscv/riscv.md (extv<mode>): New expand.
32780 (extzv<mode>): New expand.
32781 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
32782 (*th_ext<mode>): New INSN.
32783 (*th_extu<mode>): New INSN.
32784 (*th_clz<mode>2): New INSN.
32785 (*th_rev<mode>2): New INSN.
32787 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32789 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
32790 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
32792 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32794 * config/riscv/riscv.md: Include thead.md
32795 * config/riscv/thead.md: New file.
32797 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32799 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
32801 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32803 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
32804 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
32805 (MASK_XTHEADBB): New.
32806 (MASK_XTHEADBS): New.
32807 (MASK_XTHEADCMO): New.
32808 (MASK_XTHEADCONDMOV): New.
32809 (MASK_XTHEADFMEMIDX): New.
32810 (MASK_XTHEADFMV): New.
32811 (MASK_XTHEADINT): New.
32812 (MASK_XTHEADMAC): New.
32813 (MASK_XTHEADMEMIDX): New.
32814 (MASK_XTHEADMEMPAIR): New.
32815 (MASK_XTHEADSYNC): New.
32816 (TARGET_XTHEADBA): New.
32817 (TARGET_XTHEADBB): New.
32818 (TARGET_XTHEADBS): New.
32819 (TARGET_XTHEADCMO): New.
32820 (TARGET_XTHEADCONDMOV): New.
32821 (TARGET_XTHEADFMEMIDX): New.
32822 (TARGET_XTHEADFMV): New.
32823 (TARGET_XTHEADINT): New.
32824 (TARGET_XTHEADMAC): New.
32825 (TARGET_XTHEADMEMIDX): New.
32826 (TARGET_XTHEADMEMPAIR): new.
32827 (TARGET_XTHEADSYNC): New.
32828 * config/riscv/riscv.opt: Add riscv_xthead_subext.
32830 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
32833 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
32834 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
32835 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
32837 2023-03-14 Jakub Jelinek <jakub@redhat.com>
32840 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
32841 when lo is equal to dhi and hi is a MEM which uses dlo register.
32843 2023-03-14 Martin Jambor <mjambor@suse.cz>
32846 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
32847 global0 instead of zeroing when it does not have as many counts as
32850 2023-03-14 Martin Jambor <mjambor@suse.cz>
32853 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
32854 ipa count, remove assert, lenient_count_portion_handling, dump
32855 also orig_node_count.
32857 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
32859 * config/i386/i386-expand.cc (expand_vec_perm_movs):
32860 Handle V2SImode for TARGET_MMX_WITH_SSE.
32861 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
32862 using V2FI mode iterator to handle both V2SI and V2SF modes.
32864 2023-03-14 Sam James <sam@gentoo.org>
32866 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
32867 including <sstream> earlier.
32868 * system.h: Add INCLUDE_SSTREAM.
32870 2023-03-14 Richard Biener <rguenther@suse.de>
32872 * tree-ssa-live.cc (remove_unused_locals): Do not treat
32873 the .DEFERRED_INIT of a variable as use, instead remove
32874 that if it is the only use.
32876 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
32878 PR rtl-optimization/107762
32879 * expr.cc (emit_group_store): Revert latest change.
32881 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
32883 PR tree-optimization/109005
32884 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
32885 aggregate type check.
32887 2023-03-14 Jakub Jelinek <jakub@redhat.com>
32889 PR tree-optimization/109115
32890 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
32891 r.upper_bound () on r.undefined_p () range.
32893 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
32895 PR tree-optimization/106896
32896 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
32897 implementatoin with probability_in; avoid some asserts.
32899 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
32901 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
32903 2023-03-13 Sean Bright <sean@seanbright.com>
32905 * doc/invoke.texi (Warning Options): Remove errant 'See'
32908 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32910 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
32911 REG_OK_FOR_BASE_P): Remove.
32913 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32915 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
32916 (=vd,vd,vr,vr): Ditto.
32917 * config/riscv/vector.md: Ditto.
32919 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32921 * config/riscv/riscv-vector-builtins.cc
32922 (function_expander::use_compare_insn): Add operand predicate check.
32924 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32926 * config/riscv/vector.md: Fine tune RA constraints.
32928 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
32930 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
32931 hsaco assemble/link.
32933 2023-03-13 Richard Biener <rguenther@suse.de>
32935 PR tree-optimization/109046
32936 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
32937 piecewise complex loads.
32939 2023-03-12 Jakub Jelinek <jakub@redhat.com>
32941 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
32942 (aarch64_bf16_ptr_type_node): Adjust comment.
32943 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
32944 bfloat16_type_node rather than aarch64_bf16_type_node.
32945 (aarch64_libgcc_floating_mode_supported_p,
32946 aarch64_scalar_mode_supported_p): Also support BFmode.
32947 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
32948 (aarch64_invalid_binary_op): Remove BFmode related rejections.
32949 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
32950 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
32951 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
32952 aarch64_bf16_type_node.
32953 (aarch64_init_simd_builtin_types): Likewise.
32954 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
32955 which is created in tree.cc already.
32956 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
32958 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
32960 PR middle-end/109031
32961 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
32962 ensure that the type of x is as wide or wider than the type of a.
32964 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32967 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
32968 (*bitmask_shift_plus<mode>): New.
32969 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
32970 (@aarch64_bitmask_udiv<mode>3): Remove.
32971 * config/aarch64/aarch64.cc
32972 (aarch64_vectorize_can_special_div_by_constant,
32973 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
32974 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
32975 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
32977 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32980 * target.def (preferred_div_as_shifts_over_mult): New.
32981 * doc/tm.texi.in: Document it.
32982 * doc/tm.texi: Regenerate.
32983 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
32984 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
32985 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
32987 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32988 Richard Sandiford <richard.sandiford@arm.com>
32991 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
32994 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32995 Andrew MacLeod <amacleod@redhat.com>
32998 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
32999 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
33001 (gimple_range_op_handler::maybe_non_standard): New.
33002 * range-op.cc (class operator_widen_plus_signed,
33003 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
33004 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
33005 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
33006 operator_widen_mult_unsigned::wi_fold,
33007 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
33008 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
33009 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
33010 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
33012 2023-03-12 Tamar Christina <tamar.christina@arm.com>
33015 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
33016 * doc/tm.texi.in: Likewise.
33017 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
33018 * expmed.cc (expand_divmod): Likewise.
33019 * expmed.h (expand_divmod): Likewise.
33020 * expr.cc (force_operand, expand_expr_divmod): Likewise.
33021 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
33022 * target.def (can_special_div_by_const): Remove.
33023 * target.h: Remove tree-core.h include
33024 * targhooks.cc (default_can_special_div_by_const): Remove.
33025 * targhooks.h (default_can_special_div_by_const): Remove.
33026 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
33027 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
33028 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
33030 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
33032 * doc/install.texi2html: Fix issue number typo in comment.
33034 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
33036 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
33039 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
33041 * doc/invoke.texi (Optimize Options): Add markup to
33042 description of asan-kernel-mem-intrinsic-prefix, and clarify
33045 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
33047 * doc/extend.texi (Named Address Spaces): Drop a redundant link
33050 2023-03-11 Jeff Law <jlaw@ventanamicro>
33053 * doc/extend.texi: Clarify Attribute Syntax a bit.
33055 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
33057 * doc/install.texi (Prerequisites): Suggest using newer versions
33059 (Final install): Clean up and modernize discussion of how to
33060 build or obtain the GCC manuals.
33061 * doc/install.texi2html: Update comment to point to the PR instead
33062 of "makeinfo 4.7 brokenness" (it's not specific to that version).
33064 2023-03-10 Jakub Jelinek <jakub@redhat.com>
33067 * optabs.cc (expand_fix): For conversions from BFmode to integral,
33068 use shifts to convert it to SFmode first and then convert SFmode
33071 2023-03-10 Andrew Pinski <apinski@marvell.com>
33073 * config/aarch64/aarch64.md: Add a new define_split
33076 2023-03-10 Richard Biener <rguenther@suse.de>
33078 * tree-ssa-structalias.cc (solve_graph): Immediately
33079 iterate self-cycles.
33081 2023-03-10 Jakub Jelinek <jakub@redhat.com>
33083 PR tree-optimization/109008
33084 * range-op-float.cc (float_widen_lhs_range): If not
33085 -frounding-math and not IBM double double format, extend lhs
33086 range just by 0.5ulp rather than 1ulp in each direction.
33088 2023-03-10 Jakub Jelinek <jakub@redhat.com>
33091 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
33093 * config/i386/t-cygwin-w64: Remove.
33095 2023-03-10 Jakub Jelinek <jakub@redhat.com>
33098 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
33099 C++14, don't declare as extern const arrays.
33100 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
33101 static constexpr member arrays for C++11 or C++14.
33102 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
33103 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
33104 (TREE_CODE_LENGTH): For C++11 or C++14 use
33105 tree_code_length_tmpl <0>::tree_code_length instead of
33107 * tree.cc (tree_code_type, tree_code_length): Remove.
33109 2023-03-10 Jakub Jelinek <jakub@redhat.com>
33112 * common.opt (fcanon-prefix-map): New option.
33113 * opts.cc: Include file-prefix-map.h.
33114 (flag_canon_prefix_map): New variable.
33115 (common_handle_option): Handle OPT_fcanon_prefix_map.
33116 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
33117 * file-prefix-map.h (flag_canon_prefix_map): Declare.
33118 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
33120 (add_prefix_map): Initialize canonicalize member from
33121 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
33122 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
33123 use lrealpath result only for map->canonicalize map entries.
33124 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
33125 * opts-global.cc (handle_common_deferred_options): Clear
33126 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
33127 * doc/invoke.texi (-fcanon-prefix-map): Document.
33128 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
33129 see also for -fcanon-prefix-map.
33130 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
33132 2023-03-10 Jakub Jelinek <jakub@redhat.com>
33135 * cgraphunit.cc (check_global_declaration): Don't warn for unused
33136 variables which have OPT_Wunused_variable warning suppressed.
33138 2023-03-10 Jakub Jelinek <jakub@redhat.com>
33140 PR tree-optimization/109008
33141 * range-op-float.cc (float_widen_lhs_range): If lb is
33142 minimum representable finite number or ub is maximum
33143 representable finite number, instead of widening it to
33144 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
33145 Temporarily clear flag_finite_math_only when canonicalizing
33148 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33150 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
33151 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
33152 (gimple_fold_builtin): Ditto.
33153 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
33154 (class vleff): Ditto.
33156 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33157 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
33159 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
33160 (struct fault_load_def): Ditto.
33162 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33163 * config/riscv/riscv-vector-builtins.cc
33164 (rvv_arg_type_info::get_tree_type): Add size_ptr.
33165 (gimple_folder::gimple_folder): New class.
33166 (gimple_folder::fold): Ditto.
33167 (gimple_fold_builtin): New function.
33168 (get_read_vl_instance): Ditto.
33169 (get_read_vl_decl): Ditto.
33170 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
33171 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
33172 (get_read_vl_instance): New function.
33173 (get_read_vl_decl): Ditto.
33174 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
33175 (read_vl_insn_p): Ditto.
33176 (available_occurrence_p): Ditto.
33177 (backward_propagate_worthwhile_p): Ditto.
33178 (gen_vsetvl_pat): Adapt for vleff support.
33179 (get_forward_read_vl_insn): New function.
33180 (get_backward_fault_first_load_insn): Ditto.
33181 (source_equal_p): Adapt for vleff support.
33182 (first_ratio_invalid_for_second_sew_p): Remove.
33183 (first_ratio_invalid_for_second_lmul_p): Ditto.
33184 (first_lmul_less_than_second_lmul_p): Ditto.
33185 (first_ratio_less_than_second_ratio_p): Ditto.
33186 (support_relaxed_compatible_p): New function.
33187 (vector_insn_info::operator>): Remove.
33188 (vector_insn_info::operator>=): Refine.
33189 (vector_insn_info::parse_insn): Adapt for vleff support.
33190 (vector_insn_info::compatible_p): Ditto.
33191 (vector_insn_info::update_fault_first_load_avl): New function.
33192 (pass_vsetvl::transfer_after): Adapt for vleff support.
33193 (pass_vsetvl::demand_fusion): Ditto.
33194 (pass_vsetvl::cleanup_insns): Ditto.
33195 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
33196 redundant condtions.
33197 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
33198 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
33199 * config/riscv/riscv.md: Adapt for vleff support.
33200 * config/riscv/t-riscv: Ditto.
33201 * config/riscv/vector-iterators.md: New iterator.
33202 * config/riscv/vector.md (read_vlsi): New pattern.
33203 (read_vldi_zero_extend): Ditto.
33204 (@pred_fault_load<mode>): Ditto.
33206 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33208 * config/riscv/riscv-vector-builtins.cc
33209 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
33210 (function_expander::use_widen_ternop_insn): Ditto.
33211 * optabs.cc (maybe_gen_insn): Extend nops handling.
33213 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33215 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
33216 patterns according to RVV ISA.
33217 * config/riscv/vector-iterators.md: New iterators.
33218 * config/riscv/vector.md
33219 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
33220 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
33221 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
33222 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
33223 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
33224 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
33225 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
33226 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
33227 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
33228 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
33229 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
33230 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
33231 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
33232 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
33234 2023-03-10 Michael Collison <collison@rivosinc.com>
33236 * tree-vect-loop-manip.cc (vect_do_peeling): Use
33237 result of constant_lower_bound instead of vf for the lower
33238 bound of the epilog loop trip count.
33240 2023-03-09 Tamar Christina <tamar.christina@arm.com>
33242 * passes.cc (emergency_dump_function): Finish graph generation.
33244 2023-03-09 Tamar Christina <tamar.christina@arm.com>
33246 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
33247 and bottom bit only.
33249 2023-03-09 Andrew Pinski <apinski@marvell.com>
33251 PR tree-optimization/108980
33252 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
33253 Reorgnize the call to warning for not strict flexible arrays
33254 to be before the check of warned.
33256 2023-03-09 Jason Merrill <jason@redhat.com>
33258 * doc/extend.texi: Comment out __is_deducible docs.
33260 2023-03-09 Jason Merrill <jason@redhat.com>
33263 * doc/extend.texi (Type Traits):: Document __is_deducible.
33265 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
33268 * config.host: add object for x86_64-*-mingw*.
33269 * config/i386/sym-mingw32.cc: dummy file to attach
33271 * config/i386/utf8-mingw32.rc: windres resource file.
33272 * config/i386/winnt-utf8.manifest: XML manifest to
33274 * config/i386/x-mingw32: reference to x-mingw32-utf8.
33275 * config/i386/x-mingw32-utf8: Makefile fragment to
33276 embed UTF-8 manifest.
33278 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
33280 * lra-constraints.cc (process_alt_operands): Use operand modes for
33281 clobbered regs instead of the biggest access mode.
33283 2023-03-09 Richard Biener <rguenther@suse.de>
33285 PR middle-end/108995
33286 * fold-const.cc (extract_muldiv_1): Avoid folding
33287 (CST * b) / CST2 when sanitizing overflow and we rely on
33288 overflow being undefined.
33290 2023-03-09 Jakub Jelinek <jakub@redhat.com>
33291 Richard Biener <rguenther@suse.de>
33293 PR tree-optimization/109008
33294 * range-op-float.cc (float_widen_lhs_range): New function.
33295 (foperator_plus::op1_range, foperator_minus::op1_range,
33296 foperator_minus::op2_range, foperator_mult::op1_range,
33297 foperator_div::op1_range, foperator_div::op2_range): Use it.
33299 2023-03-07 Jonathan Grant <jg@jguk.org>
33302 * doc/invoke.texi (Instrumentation Options): Clarify
33303 LeakSanitizer behavior.
33305 2023-03-07 Benson Muite <benson_muite@emailplus.org>
33307 * doc/install.texi (Prerequisites): Add link to gmplib.org.
33309 2023-03-07 Pan Li <pan2.li@intel.com>
33310 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33314 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
33316 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
33317 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
33318 * genmodes.cc (adj_precision): New.
33319 (ADJUST_PRECISION): New.
33320 (emit_mode_adjustments): Handle ADJUST_PRECISION.
33322 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
33324 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
33326 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
33328 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
33329 {s|u}{max|min} in QI, HI and DI modes.
33330 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
33331 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
33332 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
33333 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
33336 2023-03-06 Richard Biener <rguenther@suse.de>
33338 PR tree-optimization/109025
33339 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
33340 the inner LC PHI use is the inner loop PHI latch definition
33341 before classifying an outer PHI as double reduction.
33343 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
33346 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
33348 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
33349 (X86_TUNE_USE_SCATTER): Likewise.
33351 2023-03-06 Xi Ruoyao <xry111@xry111.site>
33354 * config/loongarch/loongarch.h (FP_RETURN): Use
33355 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
33356 (UNITS_PER_FP_ARG): Likewise.
33358 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33360 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
33361 (pass_vsetvl::backward_demand_fusion): Ditto.
33363 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
33364 SiYu Wu <siyu@isrc.iscas.ac.cn>
33366 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
33368 (riscv_sm3p1_<mode>): New.
33369 (riscv_sm4ed_<mode>): New.
33370 (riscv_sm4ks_<mode>): New.
33371 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
33372 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
33373 ZKSH's built-in functions.
33375 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
33376 SiYu Wu <siyu@isrc.iscas.ac.cn>
33378 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
33379 (riscv_sha256sig1_<mode>): New.
33380 (riscv_sha256sum0_<mode>): New.
33381 (riscv_sha256sum1_<mode>): New.
33382 (riscv_sha512sig0h): New.
33383 (riscv_sha512sig0l): New.
33384 (riscv_sha512sig1h): New.
33385 (riscv_sha512sig1l): New.
33386 (riscv_sha512sum0r): New.
33387 (riscv_sha512sum1r): New.
33388 (riscv_sha512sig0): New.
33389 (riscv_sha512sig1): New.
33390 (riscv_sha512sum0): New.
33391 (riscv_sha512sum1): New.
33392 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
33393 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
33394 built-in functions.
33395 (DIRECT_BUILTIN): Add new.
33397 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
33398 SiYu Wu <siyu@isrc.iscas.ac.cn>
33400 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
33402 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
33403 (riscv_aes32dsmi): New.
33404 (riscv_aes64ds): New.
33405 (riscv_aes64dsm): New.
33406 (riscv_aes64im): New.
33407 (riscv_aes64ks1i): New.
33408 (riscv_aes64ks2): New.
33409 (riscv_aes32esi): New.
33410 (riscv_aes32esmi): New.
33411 (riscv_aes64es): New.
33412 (riscv_aes64esm): New.
33413 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
33414 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
33415 ZKNE's built-in functions.
33417 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
33418 SiYu Wu <siyu@isrc.iscas.ac.cn>
33420 * config/riscv/bitmanip.md: Add ZBKB's instructions.
33421 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
33422 * config/riscv/riscv.md: Add new type for crypto instructions.
33423 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
33425 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
33426 extension's built-in function file.
33428 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
33429 SiYu Wu <siyu@isrc.iscas.ac.cn>
33431 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
33432 (RISCV_FTYPE_NAME3): New.
33433 (RISCV_ATYPE_QI): New.
33434 (RISCV_ATYPE_HI): New.
33435 (RISCV_FTYPE_ATYPES2): New.
33436 (RISCV_FTYPE_ATYPES3): New.
33437 * config/riscv/riscv-ftypes.def (2): New.
33440 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
33442 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
33445 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33446 kito-cheng <kito.cheng@sifive.com>
33448 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
33449 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
33450 (riscv_register_pragmas): Add builtin function check call.
33451 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
33452 (check_builtin_call): New function.
33453 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
33454 (class vreinterpret): Ditto.
33455 (class vlmul_ext): Ditto.
33456 (class vlmul_trunc): Ditto.
33457 (class vset): Ditto.
33458 (class vget): Ditto.
33460 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33461 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
33477 (vundefined): Add new intrinsic.
33478 (vreinterpret): Ditto.
33479 (vlmul_ext): Ditto.
33480 (vlmul_trunc): Ditto.
33483 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
33484 (struct narrow_alu_def): Ditto.
33485 (struct reduc_alu_def): Ditto.
33486 (struct vundefined_def): Ditto.
33487 (struct misc_def): Ditto.
33488 (struct vset_def): Ditto.
33489 (struct vget_def): Ditto.
33491 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33492 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
33493 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
33494 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
33495 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
33496 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
33497 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
33498 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
33499 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
33500 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
33501 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
33502 (DEF_RVV_LMUL1_OPS): Ditto.
33503 (DEF_RVV_LMUL2_OPS): Ditto.
33504 (DEF_RVV_LMUL4_OPS): Ditto.
33505 (vint16mf4_t): Ditto.
33506 (vint16mf2_t): Ditto.
33507 (vint16m1_t): Ditto.
33508 (vint16m2_t): Ditto.
33509 (vint16m4_t): Ditto.
33510 (vint16m8_t): Ditto.
33511 (vint32mf2_t): Ditto.
33512 (vint32m1_t): Ditto.
33513 (vint32m2_t): Ditto.
33514 (vint32m4_t): Ditto.
33515 (vint32m8_t): Ditto.
33516 (vint64m1_t): Ditto.
33517 (vint64m2_t): Ditto.
33518 (vint64m4_t): Ditto.
33519 (vint64m8_t): Ditto.
33520 (vuint16mf4_t): Ditto.
33521 (vuint16mf2_t): Ditto.
33522 (vuint16m1_t): Ditto.
33523 (vuint16m2_t): Ditto.
33524 (vuint16m4_t): Ditto.
33525 (vuint16m8_t): Ditto.
33526 (vuint32mf2_t): Ditto.
33527 (vuint32m1_t): Ditto.
33528 (vuint32m2_t): Ditto.
33529 (vuint32m4_t): Ditto.
33530 (vuint32m8_t): Ditto.
33531 (vuint64m1_t): Ditto.
33532 (vuint64m2_t): Ditto.
33533 (vuint64m4_t): Ditto.
33534 (vuint64m8_t): Ditto.
33535 (vint8mf4_t): Ditto.
33536 (vint8mf2_t): Ditto.
33537 (vint8m1_t): Ditto.
33538 (vint8m2_t): Ditto.
33539 (vint8m4_t): Ditto.
33540 (vint8m8_t): Ditto.
33541 (vuint8mf4_t): Ditto.
33542 (vuint8mf2_t): Ditto.
33543 (vuint8m1_t): Ditto.
33544 (vuint8m2_t): Ditto.
33545 (vuint8m4_t): Ditto.
33546 (vuint8m8_t): Ditto.
33547 (vint8mf8_t): Ditto.
33548 (vuint8mf8_t): Ditto.
33549 (vfloat32mf2_t): Ditto.
33550 (vfloat32m1_t): Ditto.
33551 (vfloat32m2_t): Ditto.
33552 (vfloat32m4_t): Ditto.
33553 (vfloat64m1_t): Ditto.
33554 (vfloat64m2_t): Ditto.
33555 (vfloat64m4_t): Ditto.
33556 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
33557 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
33558 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
33559 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
33560 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
33561 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
33562 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
33563 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
33564 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
33565 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
33566 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
33567 (DEF_RVV_LMUL1_OPS): Ditto.
33568 (DEF_RVV_LMUL2_OPS): Ditto.
33569 (DEF_RVV_LMUL4_OPS): Ditto.
33570 (DEF_RVV_TYPE_INDEX): Ditto.
33571 (required_extensions_p): Adapt for new intrinsic support/
33572 (get_required_extensions): New function.
33573 (check_required_extensions): Ditto.
33574 (unsigned_base_type_p): Remove.
33575 (rvv_arg_type_info::get_scalar_ptr_type): New function.
33576 (get_mode_for_bitsize): Remove.
33577 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
33578 (rvv_arg_type_info::get_base_vector_type): Ditto.
33579 (rvv_arg_type_info::get_function_type_index): Ditto.
33580 (DEF_RVV_BASE_TYPE): New def.
33581 (function_builder::apply_predication): New class.
33582 (function_expander::mask_mode): Ditto.
33583 (function_checker::function_checker): Ditto.
33584 (function_checker::report_non_ice): Ditto.
33585 (function_checker::report_out_of_range): Ditto.
33586 (function_checker::require_immediate): Ditto.
33587 (function_checker::require_immediate_range): Ditto.
33588 (function_checker::check): Ditto.
33589 (check_builtin_call): Ditto.
33590 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
33591 (DEF_RVV_BASE_TYPE): Ditto.
33592 (DEF_RVV_TYPE_INDEX): Ditto.
33593 (vbool64_t): Ditto.
33594 (vbool32_t): Ditto.
33595 (vbool16_t): Ditto.
33600 (vuint8mf8_t): Ditto.
33601 (vuint8mf4_t): Ditto.
33602 (vuint8mf2_t): Ditto.
33603 (vuint8m1_t): Ditto.
33604 (vuint8m2_t): Ditto.
33605 (vint8m4_t): Ditto.
33606 (vuint8m4_t): Ditto.
33607 (vint8m8_t): Ditto.
33608 (vuint8m8_t): Ditto.
33609 (vint16mf4_t): Ditto.
33610 (vuint16mf2_t): Ditto.
33611 (vuint16m1_t): Ditto.
33612 (vuint16m2_t): Ditto.
33613 (vuint16m4_t): Ditto.
33614 (vuint16m8_t): Ditto.
33615 (vint32mf2_t): Ditto.
33616 (vuint32m1_t): Ditto.
33617 (vuint32m2_t): Ditto.
33618 (vuint32m4_t): Ditto.
33619 (vuint32m8_t): Ditto.
33620 (vuint64m1_t): Ditto.
33621 (vuint64m2_t): Ditto.
33622 (vuint64m4_t): Ditto.
33623 (vuint64m8_t): Ditto.
33624 (vfloat32mf2_t): Ditto.
33625 (vfloat32m1_t): Ditto.
33626 (vfloat32m2_t): Ditto.
33627 (vfloat32m4_t): Ditto.
33628 (vfloat32m8_t): Ditto.
33629 (vfloat64m1_t): Ditto.
33630 (vfloat64m4_t): Ditto.
33631 (vector): Move it def.
33634 (signed_vector): Ditto.
33635 (unsigned_vector): Ditto.
33636 (unsigned_scalar): Ditto.
33637 (vector_ptr): Ditto.
33638 (scalar_ptr): Ditto.
33639 (scalar_const_ptr): Ditto.
33643 (unsigned_long): Ditto.
33645 (eew8_index): Ditto.
33646 (eew16_index): Ditto.
33647 (eew32_index): Ditto.
33648 (eew64_index): Ditto.
33649 (shift_vector): Ditto.
33650 (double_trunc_vector): Ditto.
33651 (quad_trunc_vector): Ditto.
33652 (oct_trunc_vector): Ditto.
33653 (double_trunc_scalar): Ditto.
33654 (double_trunc_signed_vector): Ditto.
33655 (double_trunc_unsigned_vector): Ditto.
33656 (double_trunc_unsigned_scalar): Ditto.
33657 (double_trunc_float_vector): Ditto.
33658 (float_vector): Ditto.
33659 (lmul1_vector): Ditto.
33660 (widen_lmul1_vector): Ditto.
33661 (eew8_interpret): Ditto.
33662 (eew16_interpret): Ditto.
33663 (eew32_interpret): Ditto.
33664 (eew64_interpret): Ditto.
33665 (vlmul_ext_x2): Ditto.
33666 (vlmul_ext_x4): Ditto.
33667 (vlmul_ext_x8): Ditto.
33668 (vlmul_ext_x16): Ditto.
33669 (vlmul_ext_x32): Ditto.
33670 (vlmul_ext_x64): Ditto.
33671 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
33672 (struct function_type_info): New function.
33673 (struct rvv_arg_type_info): Ditto.
33674 (class function_checker): New class.
33675 (rvv_arg_type_info::get_scalar_type): New function.
33676 (rvv_arg_type_info::get_vector_type): Ditto.
33677 (function_expander::ret_mode): New function.
33678 (function_checker::arg_mode): Ditto.
33679 (function_checker::ret_mode): Ditto.
33680 * config/riscv/t-riscv: Add generator.
33681 * config/riscv/vector-iterators.md: New iterators.
33682 * config/riscv/vector.md (vundefined<mode>): New pattern.
33683 (@vundefined<mode>): Ditto.
33684 (@vreinterpret<mode>): Ditto.
33685 (@vlmul_extx2<mode>): Ditto.
33686 (@vlmul_extx4<mode>): Ditto.
33687 (@vlmul_extx8<mode>): Ditto.
33688 (@vlmul_extx16<mode>): Ditto.
33689 (@vlmul_extx32<mode>): Ditto.
33690 (@vlmul_extx64<mode>): Ditto.
33691 (*vlmul_extx2<mode>): Ditto.
33692 (*vlmul_extx4<mode>): Ditto.
33693 (*vlmul_extx8<mode>): Ditto.
33694 (*vlmul_extx16<mode>): Ditto.
33695 (*vlmul_extx32<mode>): Ditto.
33696 (*vlmul_extx64<mode>): Ditto.
33697 * config/riscv/genrvv-type-indexer.cc: New file.
33699 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33701 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
33702 (slide1_sew64_helper): New function.
33703 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
33704 (get_unknown_min_value): Ditto.
33705 (force_vector_length_operand): Ditto.
33706 (gen_no_side_effects_vsetvl_rtx): Ditto.
33707 (get_vl_x2_rtx): Ditto.
33708 (slide1_sew64_helper): Ditto.
33709 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
33710 (class vrgather): Ditto.
33711 (class vrgatherei16): Ditto.
33712 (class vcompress): Ditto.
33714 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33715 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
33716 (vslidedown): Ditto.
33717 (vslide1up): Ditto.
33718 (vslide1down): Ditto.
33719 (vfslide1up): Ditto.
33720 (vfslide1down): Ditto.
33722 (vrgatherei16): Ditto.
33723 (vcompress): Ditto.
33724 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
33725 (vint8mf8_t): Ditto.
33726 (vint8mf4_t): Ditto.
33727 (vint8mf2_t): Ditto.
33728 (vint8m1_t): Ditto.
33729 (vint8m2_t): Ditto.
33730 (vint8m4_t): Ditto.
33731 (vint16mf4_t): Ditto.
33732 (vint16mf2_t): Ditto.
33733 (vint16m1_t): Ditto.
33734 (vint16m2_t): Ditto.
33735 (vint16m4_t): Ditto.
33736 (vint16m8_t): Ditto.
33737 (vint32mf2_t): Ditto.
33738 (vint32m1_t): Ditto.
33739 (vint32m2_t): Ditto.
33740 (vint32m4_t): Ditto.
33741 (vint32m8_t): Ditto.
33742 (vint64m1_t): Ditto.
33743 (vint64m2_t): Ditto.
33744 (vint64m4_t): Ditto.
33745 (vint64m8_t): Ditto.
33746 (vuint8mf8_t): Ditto.
33747 (vuint8mf4_t): Ditto.
33748 (vuint8mf2_t): Ditto.
33749 (vuint8m1_t): Ditto.
33750 (vuint8m2_t): Ditto.
33751 (vuint8m4_t): Ditto.
33752 (vuint16mf4_t): Ditto.
33753 (vuint16mf2_t): Ditto.
33754 (vuint16m1_t): Ditto.
33755 (vuint16m2_t): Ditto.
33756 (vuint16m4_t): Ditto.
33757 (vuint16m8_t): Ditto.
33758 (vuint32mf2_t): Ditto.
33759 (vuint32m1_t): Ditto.
33760 (vuint32m2_t): Ditto.
33761 (vuint32m4_t): Ditto.
33762 (vuint32m8_t): Ditto.
33763 (vuint64m1_t): Ditto.
33764 (vuint64m2_t): Ditto.
33765 (vuint64m4_t): Ditto.
33766 (vuint64m8_t): Ditto.
33767 (vfloat32mf2_t): Ditto.
33768 (vfloat32m1_t): Ditto.
33769 (vfloat32m2_t): Ditto.
33770 (vfloat32m4_t): Ditto.
33771 (vfloat32m8_t): Ditto.
33772 (vfloat64m1_t): Ditto.
33773 (vfloat64m2_t): Ditto.
33774 (vfloat64m4_t): Ditto.
33775 (vfloat64m8_t): Ditto.
33776 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
33777 * config/riscv/riscv.md: Adjust RVV instruction types.
33778 * config/riscv/vector-iterators.md (down): New iterator.
33779 (=vd,vr): New attribute.
33780 (UNSPEC_VSLIDE1UP): New unspec.
33781 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
33782 (*pred_slide<ud><mode>): Ditto.
33783 (*pred_slide<ud><mode>_extended): Ditto.
33784 (@pred_gather<mode>): Ditto.
33785 (@pred_gather<mode>_scalar): Ditto.
33786 (@pred_gatherei16<mode>): Ditto.
33787 (@pred_compress<mode>): Ditto.
33789 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33791 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
33793 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33795 * config/riscv/constraints.md (Wb1): New constraint.
33796 * config/riscv/predicates.md
33797 (vector_least_significant_set_mask_operand): New predicate.
33798 (vector_broadcast_mask_operand): Ditto.
33799 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
33800 (gen_scalar_move_mask): New function.
33801 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
33802 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
33803 (class vmv_s): Ditto.
33805 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33806 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
33810 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
33812 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33813 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
33814 (function_expander::use_exact_insn): New function.
33815 (function_expander::use_contiguous_load_insn): New function.
33816 (function_expander::use_contiguous_store_insn): New function.
33817 (function_expander::use_ternop_insn): New function.
33818 (function_expander::use_widen_ternop_insn): New function.
33819 (function_expander::use_scalar_move_insn): New function.
33820 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
33821 * config/riscv/riscv-vector-builtins.h
33822 (function_expander::add_scalar_move_mask_operand): New class.
33823 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
33824 (scalar_move_insn_p): Ditto.
33825 (has_vsetvl_killed_avl_p): Ditto.
33826 (anticipatable_occurrence_p): Ditto.
33827 (insert_vsetvl): Ditto.
33828 (get_vl_vtype_info): Ditto.
33829 (calculate_sew): Ditto.
33830 (calculate_vlmul): Ditto.
33831 (incompatible_avl_p): Ditto.
33832 (different_sew_p): Ditto.
33833 (different_lmul_p): Ditto.
33834 (different_ratio_p): Ditto.
33835 (different_tail_policy_p): Ditto.
33836 (different_mask_policy_p): Ditto.
33837 (possible_zero_avl_p): Ditto.
33838 (first_ratio_invalid_for_second_sew_p): Ditto.
33839 (first_ratio_invalid_for_second_lmul_p): Ditto.
33840 (second_ratio_invalid_for_first_sew_p): Ditto.
33841 (second_ratio_invalid_for_first_lmul_p): Ditto.
33842 (second_sew_less_than_first_sew_p): Ditto.
33843 (first_sew_less_than_second_sew_p): Ditto.
33844 (compare_lmul): Ditto.
33845 (second_lmul_less_than_first_lmul_p): Ditto.
33846 (first_lmul_less_than_second_lmul_p): Ditto.
33847 (first_ratio_less_than_second_ratio_p): Ditto.
33848 (second_ratio_less_than_first_ratio_p): Ditto.
33849 (DEF_INCOMPATIBLE_COND): Ditto.
33850 (greatest_sew): Ditto.
33851 (first_sew): Ditto.
33852 (second_sew): Ditto.
33853 (first_vlmul): Ditto.
33854 (second_vlmul): Ditto.
33855 (first_ratio): Ditto.
33856 (second_ratio): Ditto.
33857 (vlmul_for_first_sew_second_ratio): Ditto.
33858 (ratio_for_second_sew_first_vlmul): Ditto.
33859 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
33860 (always_unavailable): Ditto.
33861 (avl_unavailable_p): Ditto.
33862 (sew_unavailable_p): Ditto.
33863 (lmul_unavailable_p): Ditto.
33864 (ge_sew_unavailable_p): Ditto.
33865 (ge_sew_lmul_unavailable_p): Ditto.
33866 (ge_sew_ratio_unavailable_p): Ditto.
33867 (DEF_UNAVAILABLE_COND): Ditto.
33868 (same_sew_lmul_demand_p): Ditto.
33869 (propagate_avl_across_demands_p): Ditto.
33870 (reg_available_p): Ditto.
33871 (avl_info::has_non_zero_avl): Ditto.
33872 (vl_vtype_info::has_non_zero_avl): Ditto.
33873 (vector_insn_info::operator>=): Refactor.
33874 (vector_insn_info::parse_insn): Adjust for scalar move.
33875 (vector_insn_info::demand_vl_vtype): Remove.
33876 (vector_insn_info::compatible_p): New function.
33877 (vector_insn_info::compatible_avl_p): Ditto.
33878 (vector_insn_info::compatible_vtype_p): Ditto.
33879 (vector_insn_info::available_p): Ditto.
33880 (vector_insn_info::merge): Ditto.
33881 (vector_insn_info::fuse_avl): Ditto.
33882 (vector_insn_info::fuse_sew_lmul): Ditto.
33883 (vector_insn_info::fuse_tail_policy): Ditto.
33884 (vector_insn_info::fuse_mask_policy): Ditto.
33885 (vector_insn_info::dump): Ditto.
33886 (vector_infos_manager::release): Ditto.
33887 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
33888 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
33889 (pass_vsetvl::hard_empty_block_p): Ditto.
33890 (pass_vsetvl::backward_demand_fusion): Ditto.
33891 (pass_vsetvl::forward_demand_fusion): Ditto.
33892 (pass_vsetvl::refine_vsetvls): Ditto.
33893 (pass_vsetvl::cleanup_vsetvls): Ditto.
33894 (pass_vsetvl::commit_vsetvls): Ditto.
33895 (pass_vsetvl::propagate_avl): Ditto.
33896 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
33897 (struct demands_pair): Ditto.
33898 (struct demands_cond): Ditto.
33899 (struct demands_fuse_rule): Ditto.
33900 * config/riscv/vector-iterators.md: New iterator.
33901 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
33902 (*pred_broadcast<mode>): Ditto.
33903 (*pred_broadcast<mode>_extended_scalar): Ditto.
33904 (@pred_extract_first<mode>): Ditto.
33905 (*pred_extract_first<mode>): Ditto.
33906 (@pred_extract_first_trunc<mode>): Ditto.
33907 * config/riscv/riscv-vsetvl.def: New file.
33909 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
33911 * config/riscv/bitmanip.md: allow 0 constant in max/min
33914 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
33916 * config/riscv/bitmanip.md: Fix wrong index in the check.
33918 2023-03-04 Jakub Jelinek <jakub@redhat.com>
33920 PR middle-end/109006
33921 * vec.cc (test_auto_alias): Adjust comment for removal of
33923 * read-rtl-function.cc (function_reader::parse_block): Likewise.
33924 * gdbhooks.py: Likewise.
33926 2023-03-04 Jakub Jelinek <jakub@redhat.com>
33928 PR testsuite/108973
33929 * selftest-diagnostic.cc
33930 (test_diagnostic_context::test_diagnostic_context): Set
33931 caret_max_width to 80.
33933 2023-03-03 Alexandre Oliva <oliva@adacore.com>
33935 * gimple-ssa-warn-access.cc
33936 (pass_waccess::check_dangling_stores): Skip non-stores.
33938 2023-03-03 Alexandre Oliva <oliva@adacore.com>
33940 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
33941 after vmsr and vmrs, and lower the case of P0.
33943 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
33945 PR middle-end/109006
33946 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
33948 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
33950 PR middle-end/109006
33951 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
33953 2023-03-03 Jakub Jelinek <jakub@redhat.com>
33956 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
33957 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
33958 suppressed on stmt. For [static %E] warning, print access_nelts
33959 rather than access_size. Fix up comment wording.
33961 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
33963 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
33964 arch14 instead of z16.
33966 2023-03-03 Anthony Green <green@moxielogic.com>
33968 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
33970 2023-03-03 Anthony Green <green@moxielogic.com>
33972 * config/moxie/constraints.md (A, B, W): Change
33973 define_constraint to define_memory_constraint.
33975 2023-03-03 Xi Ruoyao <xry111@xry111.site>
33977 * toplev.cc (process_options): Fix the spelling of
33978 "-fstack-clash-protection".
33980 2023-03-03 Richard Biener <rguenther@suse.de>
33982 PR tree-optimization/109002
33983 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
33984 PHI-translate ANTIC_IN.
33986 2023-03-03 Jakub Jelinek <jakub@redhat.com>
33988 PR tree-optimization/108988
33989 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
33990 size_type_node before passing it as argument to fwrite. Formatting
33993 2023-03-03 Richard Biener <rguenther@suse.de>
33996 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
33997 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
33998 * config/i386/i386-features.h (scalar_chain::max_visits): New.
33999 (scalar_chain::build): Add bitmap parameter, return boolean.
34000 (scalar_chain::add_insn): Likewise.
34001 (scalar_chain::analyze_register_chain): Likewise.
34002 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
34003 Initialize max_visits.
34004 (scalar_chain::analyze_register_chain): When we exhaust
34005 max_visits, abort. Also abort when running into any
34007 (scalar_chain::add_insn): Propagate abort.
34008 (scalar_chain::build): Likewise. When aborting amend
34009 the set of disallowed insn with the insns set.
34010 (convert_scalars_to_vector): Adjust. Do not convert aborted
34013 2023-03-03 Richard Biener <rguenther@suse.de>
34016 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
34017 generate a DIE for a function scope static.
34019 2023-03-03 Alexandre Oliva <oliva@adacore.com>
34021 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
34023 2023-03-02 Jakub Jelinek <jakub@redhat.com>
34026 * target.h (emit_support_tinfos_callback): New typedef.
34027 * targhooks.h (default_emit_support_tinfos): Declare.
34028 * targhooks.cc (default_emit_support_tinfos): New function.
34029 * target.def (emit_support_tinfos): New target hook.
34030 * doc/tm.texi.in (emit_support_tinfos): Document it.
34031 * doc/tm.texi: Regenerated.
34032 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
34033 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
34035 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
34037 * ira-costs.cc: Include print-rtl.h.
34038 (record_reg_classes, scan_one_insn): Add code to print debug info.
34039 (record_operand_costs): Find and use smaller cost for hard reg
34042 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
34043 Paul-Antoine Arras <pa@codesourcery.com>
34045 * builtins.cc (mathfn_built_in_explicit): New.
34046 * config/gcn/gcn.cc: Include case-cfn-macros.h.
34047 (mathfn_built_in_explicit): Add prototype.
34048 (gcn_vectorize_builtin_vectorized_function): New.
34049 (gcn_libc_has_function): New.
34050 (TARGET_LIBC_HAS_FUNCTION): Define.
34051 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
34053 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
34055 PR tree-optimization/108979
34056 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
34057 operations on invariants.
34059 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
34061 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
34062 * config/s390/s390.cc (s390_option_override_internal): Make
34063 partial vector usage the default from z13 on.
34064 * config/s390/vector.md (len_load_v16qi): Add.
34065 (len_store_v16qi): Add.
34067 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
34069 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
34070 of constant 0 offset.
34072 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
34074 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
34076 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
34078 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
34080 * config.gcc: add -with-{no-}msa build option.
34081 * config/mips/mips.h: Likewise.
34082 * doc/install.texi: Likewise.
34084 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
34086 PR tree-optimization/108603
34087 * explow.cc (convert_memory_address_addr_space_1): Only wrap
34088 the result of a recursive call in a CONST if no instructions
34091 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
34093 PR tree-optimization/108430
34094 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
34095 of inverted condition.
34097 2023-03-02 Jakub Jelinek <jakub@redhat.com>
34100 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
34101 comparison copy the bytes from ptr to a temporary buffer and clearing
34102 padding bits in there.
34104 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
34106 PR middle-end/108545
34107 * gimplify.cc (struct tree_operand_hash_no_se): New.
34108 (omp_index_mapping_groups_1, omp_index_mapping_groups,
34109 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
34110 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
34111 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
34112 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
34113 of tree_operand_hash.
34115 2023-03-01 LIU Hao <lh_mouse@126.com>
34118 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
34119 Remove the size limit `pch_VA_max_size`
34121 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
34123 PR middle-end/108546
34124 * omp-low.cc (lower_omp_target): Remove optional handling
34125 on the receiver side, i.e. inside target (data), for
34128 2023-03-01 Jakub Jelinek <jakub@redhat.com>
34131 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
34132 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
34134 2023-03-01 Richard Biener <rguenther@suse.de>
34136 PR tree-optimization/108970
34137 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
34138 Check we can copy the BBs.
34139 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
34141 (vect_do_peeling): Streamline error handling.
34143 2023-03-01 Richard Biener <rguenther@suse.de>
34145 PR tree-optimization/108950
34146 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
34147 Check oprnd0 is defined in the loop.
34148 * tree-vect-loop.cc (vectorizable_reduction): Record all
34149 operands vector types, compute that of invariants and
34150 properly update their SLP nodes.
34152 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
34155 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
34156 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
34158 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
34160 PR middle-end/107411
34161 PR middle-end/107411
34162 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
34164 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
34165 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
34167 2023-02-28 Jakub Jelinek <jakub@redhat.com>
34169 PR sanitizer/108894
34170 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
34171 comparison rather than index > bound.
34172 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
34173 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
34174 * doc/invoke.texi (-fsanitize=bounds): Document that whether
34175 flexible array member-like arrays are instrumented or not depends
34176 on -fstrict-flex-arrays* options of strict_flex_array attributes.
34177 (-fsanitize=bounds-strict): Document that flexible array members
34178 are not instrumented.
34180 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
34184 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
34185 (fmod<mode>3): Ditto.
34186 (fpremxf4_i387): Ditto.
34187 (reminderxf3): Ditto.
34188 (reminder<mode>3): Ditto.
34189 (fprem1xf4_i387): Ditto.
34191 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
34193 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
34194 generating FFS with mismatched operand and result modes, by using
34195 an explicit SIGN_EXTEND/ZERO_EXTEND.
34196 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
34197 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
34199 2023-02-27 Patrick Palka <ppalka@redhat.com>
34201 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
34202 * lra-int.h (lra_change_class): Likewise.
34203 * recog.h (which_op_alt): Likewise.
34204 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
34207 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34209 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
34211 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
34213 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
34214 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
34216 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
34218 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
34219 (xtensa_get_config_v3): New functions.
34221 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34223 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
34225 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
34227 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
34228 the macro to 0x1000000000.
34230 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
34233 * doc/gm2.texi (-fm2-pathname): New option documented.
34234 (-fm2-pathnameI): New option documented.
34235 (-fm2-prefix=): New option documented.
34236 (-fruntime-modules=): Update default module list.
34238 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
34241 * config/xtensa/xtensa-protos.h
34242 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
34243 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
34244 to xtensa_expand_call.
34245 (xtensa_expand_call): Emit the call and add a clobber expression
34246 for the static chain to it in case of windowed ABI.
34247 * config/xtensa/xtensa.md (call, call_value, sibcall)
34248 (sibcall_value): Call xtensa_expand_call and complete expansion
34249 right after that call.
34251 2023-02-24 Richard Biener <rguenther@suse.de>
34253 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
34254 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
34255 changing alignment of vec<T, A, vl_embed> and simplifying
34257 (vec<T, A, vl_embed>::address): Compute as this + 1.
34258 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
34259 vector instead of the offset of the m_vecdata member.
34260 (auto_vec<T, N>::m_data): Turn storage into
34261 uninitialized unsigned char.
34262 (auto_vec<T, N>::auto_vec): Allow allocation of one
34263 stack member. Initialize m_vec in a special way to
34264 avoid later stringop overflow diagnostics.
34265 * vec.cc (test_auto_alias): New.
34266 (vec_cc_tests): Call it.
34268 2023-02-24 Richard Biener <rguenther@suse.de>
34270 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
34271 take a const reference to the object, use address to
34273 (vec<T, A, vl_embed>::contains): Use address to access data.
34274 (vec<T, A, vl_embed>::operator[]): Use address instead of
34275 m_vecdata to access data.
34276 (vec<T, A, vl_embed>::iterate): Likewise.
34277 (vec<T, A, vl_embed>::copy): Likewise.
34278 (vec<T, A, vl_embed>::quick_push): Likewise.
34279 (vec<T, A, vl_embed>::pop): Likewise.
34280 (vec<T, A, vl_embed>::quick_insert): Likewise.
34281 (vec<T, A, vl_embed>::ordered_remove): Likewise.
34282 (vec<T, A, vl_embed>::unordered_remove): Likewise.
34283 (vec<T, A, vl_embed>::block_remove): Likewise.
34284 (vec<T, A, vl_heap>::address): Likewise.
34286 2023-02-24 Martin Liska <mliska@suse.cz>
34288 PR sanitizer/108834
34289 * asan.cc (asan_add_global): Use proper TU name for normal
34290 global variables (and aux_base_name for the artificial one).
34292 2023-02-24 Jakub Jelinek <jakub@redhat.com>
34294 * config/i386/i386-builtin.def: Update description of BDESC
34295 and BDESC_FIRST in file comment to include mask2.
34297 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34299 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
34301 2023-02-24 Jakub Jelinek <jakub@redhat.com>
34303 PR middle-end/108854
34304 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
34305 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
34306 nodes and adjust their DECL_CONTEXT.
34308 2023-02-24 Jakub Jelinek <jakub@redhat.com>
34311 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
34312 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
34313 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
34314 __builtin_ia32_cvtne2ps2bf16_v8bf,
34315 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
34316 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
34317 __builtin_ia32_cvtneps2bf16_v8sf_mask,
34318 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
34319 __builtin_ia32_cvtneps2bf16_v4sf_mask,
34320 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
34321 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
34322 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
34323 __builtin_ia32_dpbf16ps_v4sf_mask,
34324 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
34325 OPTION_MASK_ISA_AVX512VL.
34327 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
34329 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
34330 Add non-compact 32-bit multilibs.
34332 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
34334 * config/mips/mips.md (*clo<mode>2): New pattern.
34336 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
34338 * config/mips/mips.h (machine_function): New variable
34339 use_hazard_barrier_return_p.
34340 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
34341 (mips_hb_return_internal): New insn pattern.
34342 * config/mips/mips.cc (mips_attribute_table): Add attribute
34343 use_hazard_barrier_return.
34344 (mips_use_hazard_barrier_return_p): New static function.
34345 (mips_function_attr_inlinable_p): Likewise.
34346 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
34347 Emit error for unsupported architecture choice.
34348 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
34349 Return false for use_hazard_barrier_return.
34350 (mips_expand_epilogue): Emit hazard barrier return.
34351 * doc/extend.texi: Document use_hazard_barrier_return.
34353 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
34355 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
34356 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
34357 for the gcc-internal headers.
34359 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
34361 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
34362 and $(POSTCOMPILE) instead of manual dependency listing.
34363 * config/xtensa/xtensa-dynconfig.c: Rename to ...
34364 * config/xtensa/xtensa-dynconfig.cc: ... this.
34366 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
34368 * doc/cfg.texi: Reorder index entries around @items.
34369 * doc/cpp.texi: Ditto.
34370 * doc/cppenv.texi: Ditto.
34371 * doc/cppopts.texi: Ditto.
34372 * doc/generic.texi: Ditto.
34373 * doc/install.texi: Ditto.
34374 * doc/extend.texi: Ditto.
34375 * doc/invoke.texi: Ditto.
34376 * doc/md.texi: Ditto.
34377 * doc/rtl.texi: Ditto.
34378 * doc/tm.texi.in: Ditto.
34379 * doc/trouble.texi: Ditto.
34380 * doc/tm.texi: Regenerate.
34382 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34384 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
34385 the occurrence of general-purpose register used only once and for
34386 transferring intermediate value.
34388 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34390 * config/xtensa/xtensa.cc (machine_function): Add new member
34391 'eliminated_callee_saved_bmp'.
34392 (xtensa_can_eliminate_callee_saved_reg_p): New function to
34393 determine whether the register can be eliminated or not.
34394 (xtensa_expand_prologue): Add invoking the above function and
34395 elimination the use of callee-saved register by using its stack
34396 slot through the stack pointer (or the frame pointer if needed)
34398 (xtensa_expand_prologue): Modify to not emit register restoration
34399 insn from its stack slot if the register is already eliminated.
34401 2023-02-23 Jakub Jelinek <jakub@redhat.com>
34403 PR translation/108890
34404 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
34405 around fatal_error format strings.
34407 2023-02-23 Richard Biener <rguenther@suse.de>
34409 * tree-ssa-structalias.cc (handle_lhs_call): Do not
34410 re-create rhsc, only truncate it.
34412 2023-02-23 Jakub Jelinek <jakub@redhat.com>
34414 PR middle-end/106258
34415 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
34416 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
34418 2023-02-23 Richard Biener <rguenther@suse.de>
34420 * tree-if-conv.cc (tree_if_conversion): Properly manage
34421 memory of refs and the contained data references.
34423 2023-02-23 Richard Biener <rguenther@suse.de>
34425 PR tree-optimization/108888
34426 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
34427 calls to predicate.
34428 (predicate_statements): Only predicate calls with PLF_2.
34430 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34432 * config/xtensa/xtensa.md
34433 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
34434 Add missing "SI:" to PLUS RTXes.
34436 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
34439 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
34440 Emit (use (reg:SI A0_REG)) at the end in the sibling call
34441 (i.e. the same place as (return) in the normal call).
34443 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
34446 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
34449 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
34451 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
34452 (sibcall_value, sibcall_value_internal): Add 'use' expression
34455 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
34457 * doc/cppdiropts.texi: Reorder @opindex commands to precede
34458 @items they relate to.
34459 * doc/cppopts.texi: Ditto.
34460 * doc/cppwarnopts.texi: Ditto.
34461 * doc/invoke.texi: Ditto.
34462 * doc/lto.texi: Ditto.
34464 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
34466 * internal-fn.cc (expand_MASK_CALL): New.
34467 * internal-fn.def (MASK_CALL): New.
34468 * internal-fn.h (expand_MASK_CALL): New prototype.
34469 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
34470 for mask arguments also.
34471 * tree-if-conv.cc: Include cgraph.h.
34472 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
34473 (predicate_statements): Convert functions to IFN_MASK_CALL.
34474 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
34475 IFN_MASK_CALL as a SIMD function call.
34476 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
34477 IFN_MASK_CALL as an inbranch SIMD function call.
34478 Generate the mask vector arguments.
34480 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34482 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
34483 (class widen_reducop): Ditto.
34484 (class freducop): Ditto.
34485 (class widen_freducop): Ditto.
34487 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34488 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
34497 (vwredsumu): Ditto.
34498 (vfredusum): Ditto.
34499 (vfredosum): Ditto.
34502 (vfwredosum): Ditto.
34503 (vfwredusum): Ditto.
34504 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
34506 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34507 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
34508 (DEF_RVV_WU_OPS): Ditto.
34509 (DEF_RVV_WF_OPS): Ditto.
34510 (vint8mf8_t): Ditto.
34511 (vint8mf4_t): Ditto.
34512 (vint8mf2_t): Ditto.
34513 (vint8m1_t): Ditto.
34514 (vint8m2_t): Ditto.
34515 (vint8m4_t): Ditto.
34516 (vint8m8_t): Ditto.
34517 (vint16mf4_t): Ditto.
34518 (vint16mf2_t): Ditto.
34519 (vint16m1_t): Ditto.
34520 (vint16m2_t): Ditto.
34521 (vint16m4_t): Ditto.
34522 (vint16m8_t): Ditto.
34523 (vint32mf2_t): Ditto.
34524 (vint32m1_t): Ditto.
34525 (vint32m2_t): Ditto.
34526 (vint32m4_t): Ditto.
34527 (vint32m8_t): Ditto.
34528 (vuint8mf8_t): Ditto.
34529 (vuint8mf4_t): Ditto.
34530 (vuint8mf2_t): Ditto.
34531 (vuint8m1_t): Ditto.
34532 (vuint8m2_t): Ditto.
34533 (vuint8m4_t): Ditto.
34534 (vuint8m8_t): Ditto.
34535 (vuint16mf4_t): Ditto.
34536 (vuint16mf2_t): Ditto.
34537 (vuint16m1_t): Ditto.
34538 (vuint16m2_t): Ditto.
34539 (vuint16m4_t): Ditto.
34540 (vuint16m8_t): Ditto.
34541 (vuint32mf2_t): Ditto.
34542 (vuint32m1_t): Ditto.
34543 (vuint32m2_t): Ditto.
34544 (vuint32m4_t): Ditto.
34545 (vuint32m8_t): Ditto.
34546 (vfloat32mf2_t): Ditto.
34547 (vfloat32m1_t): Ditto.
34548 (vfloat32m2_t): Ditto.
34549 (vfloat32m4_t): Ditto.
34550 (vfloat32m8_t): Ditto.
34551 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
34552 (DEF_RVV_WU_OPS): Ditto.
34553 (DEF_RVV_WF_OPS): Ditto.
34554 (required_extensions_p): Add reduction support.
34555 (rvv_arg_type_info::get_base_vector_type): Ditto.
34556 (rvv_arg_type_info::get_tree_type): Ditto.
34557 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
34558 * config/riscv/riscv.md: Ditto.
34559 * config/riscv/vector-iterators.md (minu): Ditto.
34560 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
34561 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
34562 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
34563 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
34564 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
34565 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
34566 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
34568 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34570 * config/riscv/iterators.md: New iterator.
34571 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
34572 (enum ternop_type): New enum.
34573 (class vmacc): New class.
34574 (class imac): Ditto.
34575 (class vnmsac): Ditto.
34576 (enum widen_ternop_type): New enum.
34577 (class vmadd): Ditto.
34578 (class vnmsub): Ditto.
34579 (class iwmac): Ditto.
34580 (class vwmacc): Ditto.
34581 (class vwmaccu): Ditto.
34582 (class vwmaccsu): Ditto.
34583 (class vwmaccus): Ditto.
34584 (class reverse_binop): Ditto.
34585 (class vfmacc): Ditto.
34586 (class vfnmsac): Ditto.
34587 (class vfmadd): Ditto.
34588 (class vfnmsub): Ditto.
34589 (class vfnmacc): Ditto.
34590 (class vfmsac): Ditto.
34591 (class vfnmadd): Ditto.
34592 (class vfmsub): Ditto.
34593 (class vfwmacc): Ditto.
34594 (class vfwnmacc): Ditto.
34595 (class vfwmsac): Ditto.
34596 (class vfwnmsac): Ditto.
34597 (class float_misc): Ditto.
34598 (class fcmp): Ditto.
34599 (class vfclass): Ditto.
34600 (class vfcvt_x): Ditto.
34601 (class vfcvt_rtz_x): Ditto.
34602 (class vfcvt_f): Ditto.
34603 (class vfwcvt_x): Ditto.
34604 (class vfwcvt_rtz_x): Ditto.
34605 (class vfwcvt_f): Ditto.
34606 (class vfncvt_x): Ditto.
34607 (class vfncvt_rtz_x): Ditto.
34608 (class vfncvt_f): Ditto.
34609 (class vfncvt_rod_f): Ditto.
34611 * config/riscv/riscv-vector-builtins-bases.h:
34612 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
34656 (vfcvt_rtz_x): Ditto.
34657 (vfcvt_rtz_xu): Ditto.
34660 (vfwcvt_xu): Ditto.
34661 (vfwcvt_rtz_x): Ditto.
34662 (vfwcvt_rtz_xu): Ditto.
34665 (vfncvt_xu): Ditto.
34666 (vfncvt_rtz_x): Ditto.
34667 (vfncvt_rtz_xu): Ditto.
34669 (vfncvt_rod_f): Ditto.
34670 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
34671 (struct move_def): Ditto.
34672 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
34673 (DEF_RVV_CONVERT_I_OPS): Ditto.
34674 (DEF_RVV_CONVERT_U_OPS): Ditto.
34675 (DEF_RVV_WCONVERT_I_OPS): Ditto.
34676 (DEF_RVV_WCONVERT_U_OPS): Ditto.
34677 (DEF_RVV_WCONVERT_F_OPS): Ditto.
34678 (vfloat64m1_t): Ditto.
34679 (vfloat64m2_t): Ditto.
34680 (vfloat64m4_t): Ditto.
34681 (vfloat64m8_t): Ditto.
34682 (vint32mf2_t): Ditto.
34683 (vint32m1_t): Ditto.
34684 (vint32m2_t): Ditto.
34685 (vint32m4_t): Ditto.
34686 (vint32m8_t): Ditto.
34687 (vint64m1_t): Ditto.
34688 (vint64m2_t): Ditto.
34689 (vint64m4_t): Ditto.
34690 (vint64m8_t): Ditto.
34691 (vuint32mf2_t): Ditto.
34692 (vuint32m1_t): Ditto.
34693 (vuint32m2_t): Ditto.
34694 (vuint32m4_t): Ditto.
34695 (vuint32m8_t): Ditto.
34696 (vuint64m1_t): Ditto.
34697 (vuint64m2_t): Ditto.
34698 (vuint64m4_t): Ditto.
34699 (vuint64m8_t): Ditto.
34700 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
34701 (DEF_RVV_CONVERT_U_OPS): Ditto.
34702 (DEF_RVV_WCONVERT_I_OPS): Ditto.
34703 (DEF_RVV_WCONVERT_U_OPS): Ditto.
34704 (DEF_RVV_WCONVERT_F_OPS): Ditto.
34705 (DEF_RVV_F_OPS): Ditto.
34706 (DEF_RVV_WEXTF_OPS): Ditto.
34707 (required_extensions_p): Adjust for floating-point support.
34708 (check_required_extensions): Ditto.
34709 (unsigned_base_type_p): Ditto.
34710 (get_mode_for_bitsize): Ditto.
34711 (rvv_arg_type_info::get_base_vector_type): Ditto.
34712 (rvv_arg_type_info::get_tree_type): Ditto.
34713 * config/riscv/riscv-vector-builtins.def (v_f): New define.
34716 (xu_v): New define.
34718 (xu_w): New define.
34719 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
34720 (function_expander::arg_mode): New function.
34721 * config/riscv/vector-iterators.md (sof): New iterator.
34727 (fixuns_trunc): Ditto.
34729 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
34730 (@pred_<optab><mode>): Ditto.
34731 (@pred_<optab><mode>_scalar): Ditto.
34732 (@pred_<optab><mode>_reverse_scalar): Ditto.
34733 (@pred_<copysign><mode>): Ditto.
34734 (@pred_<copysign><mode>_scalar): Ditto.
34735 (@pred_mul_<optab><mode>): Ditto.
34736 (pred_mul_<optab><mode>_undef_merge): Ditto.
34737 (*pred_<madd_nmsub><mode>): Ditto.
34738 (*pred_<macc_nmsac><mode>): Ditto.
34739 (*pred_mul_<optab><mode>): Ditto.
34740 (@pred_mul_<optab><mode>_scalar): Ditto.
34741 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
34742 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34743 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34744 (*pred_mul_<optab><mode>_scalar): Ditto.
34745 (@pred_neg_mul_<optab><mode>): Ditto.
34746 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
34747 (*pred_<nmadd_msub><mode>): Ditto.
34748 (*pred_<nmacc_msac><mode>): Ditto.
34749 (*pred_neg_mul_<optab><mode>): Ditto.
34750 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
34751 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
34752 (*pred_<nmadd_msub><mode>_scalar): Ditto.
34753 (*pred_<nmacc_msac><mode>_scalar): Ditto.
34754 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
34755 (@pred_<misc_op><mode>): Ditto.
34756 (@pred_class<mode>): Ditto.
34757 (@pred_dual_widen_<optab><mode>): Ditto.
34758 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
34759 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
34760 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
34761 (@pred_widen_mul_<optab><mode>): Ditto.
34762 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
34763 (@pred_widen_neg_mul_<optab><mode>): Ditto.
34764 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
34765 (@pred_cmp<mode>): Ditto.
34766 (*pred_cmp<mode>): Ditto.
34767 (*pred_cmp<mode>_narrow): Ditto.
34768 (@pred_cmp<mode>_scalar): Ditto.
34769 (*pred_cmp<mode>_scalar): Ditto.
34770 (*pred_cmp<mode>_scalar_narrow): Ditto.
34771 (@pred_eqne<mode>_scalar): Ditto.
34772 (*pred_eqne<mode>_scalar): Ditto.
34773 (*pred_eqne<mode>_scalar_narrow): Ditto.
34774 (@pred_merge<mode>_scalar): Ditto.
34775 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
34776 (@pred_<fix_cvt><mode>): Ditto.
34777 (@pred_<float_cvt><mode>): Ditto.
34778 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
34779 (@pred_widen_<fix_cvt><mode>): Ditto.
34780 (@pred_widen_<float_cvt><mode>): Ditto.
34781 (@pred_extend<mode>): Ditto.
34782 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
34783 (@pred_narrow_<fix_cvt><mode>): Ditto.
34784 (@pred_narrow_<float_cvt><mode>): Ditto.
34785 (@pred_trunc<mode>): Ditto.
34786 (@pred_rod_trunc<mode>): Ditto.
34788 2023-02-22 Jakub Jelinek <jakub@redhat.com>
34790 PR middle-end/106258
34791 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
34792 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
34793 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
34794 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
34796 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
34798 * common.opt (-Wcomplain-wrong-lang): New.
34799 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
34800 * opts-common.cc (prune_options): Handle it.
34801 * opts-global.cc (complain_wrong_lang): Use it.
34803 2023-02-21 David Malcolm <dmalcolm@redhat.com>
34806 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
34808 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
34811 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
34813 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
34814 (sibcall_value, sibcall_value_internal): Add 'use' expression
34817 2023-02-21 Richard Biener <rguenther@suse.de>
34819 PR tree-optimization/108691
34820 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
34821 assert about calls_setjmp not becoming true when it was false.
34823 2023-02-21 Richard Biener <rguenther@suse.de>
34825 PR tree-optimization/108793
34826 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
34827 Use convert operands to niter_type when computing num.
34829 2023-02-21 Richard Biener <rguenther@suse.de>
34832 2023-02-13 Richard Biener <rguenther@suse.de>
34834 PR tree-optimization/108691
34835 * tree-cfg.cc (notice_special_calls): When the CFG is built
34836 honor gimple_call_ctrl_altering_p.
34837 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
34838 temporarily if the call is not control-altering.
34839 * calls.cc (emit_call_1): Do not add REG_SETJMP if
34840 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
34842 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34844 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
34845 true if register A0 (return address register) when -Og is specified.
34847 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
34849 * config/i386/predicates.md
34850 (general_x64constmem_operand): New predicate.
34851 * config/i386/i386.md (*cmpqi_ext<mode>_1):
34852 Use nonimm_x64constmem_operand.
34853 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
34854 (*addqi_ext<mode>_1): Ditto.
34855 (*testqi_ext<mode>_1): Ditto.
34856 (*andqi_ext<mode>_1): Ditto.
34857 (*andqi_ext<mode>_1_cc): Ditto.
34858 (*<any_or:code>qi_ext<mode>_1): Ditto.
34859 (*xorqi_ext<mode>_1_cc): Ditto.
34861 2023-02-20 Jakub Jelinek <jakub2redhat.com>
34864 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
34865 gen_umadddi4_highpart{,_le}.
34867 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
34869 * config/riscv/riscv.md (prefetch): Use r instead of p for the
34871 (riscv_prefetchi_<mode>): Ditto.
34873 2023-02-20 Richard Biener <rguenther@suse.de>
34875 PR tree-optimization/108816
34876 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
34877 versioning condition split prerequesite, assert required
34880 2023-02-20 Richard Biener <rguenther@suse.de>
34882 PR tree-optimization/108825
34883 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
34884 loop-local verfication only verify there's no pending SSA
34887 2023-02-20 Richard Biener <rguenther@suse.de>
34889 PR tree-optimization/108819
34890 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
34891 we have an SSA name as iv_2 as expected.
34893 2023-02-18 Jakub Jelinek <jakub@redhat.com>
34895 PR tree-optimization/108819
34896 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
34898 2023-02-18 Jakub Jelinek <jakub@redhat.com>
34901 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
34902 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
34904 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
34905 with ix86_replace_reg_with_reg.
34907 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
34909 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
34911 2023-02-18 Xi Ruoyao <xry111@xry111.site>
34913 * config.gcc (triplet_abi): Set its value based on $with_abi,
34914 instead of $target.
34915 (la_canonical_triplet): Set it after $triplet_abi is set
34917 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
34918 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
34921 2023-02-18 Andrew Pinski <apinski@marvell.com>
34923 * match.pd: Remove #if GIMPLE around the
34926 2023-02-18 Andrew Pinski <apinski@marvell.com>
34928 * value-query.h (get_range_query): Return the global ranges
34929 for a nullptr func.
34931 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
34933 * doc/invoke.texi (@item -Wall): Fix typo in
34936 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
34939 * config/i386/predicates.md
34940 (nonimm_x64constmem_operand): New predicate.
34941 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
34942 (*subqi_ext<mode>_0): Ditto.
34943 (*andqi_ext<mode>_0): Ditto.
34944 (*<any_or:code>qi_ext<mode>_0): Ditto.
34946 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
34949 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
34950 int_outermode instead of GET_MODE (tem) to prevent
34951 VOIDmode from entering simplify_gen_subreg.
34953 2023-02-17 Richard Biener <rguenther@suse.de>
34955 PR tree-optimization/108821
34956 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
34957 move volatile accesses.
34959 2023-02-17 Richard Biener <rguenther@suse.de>
34961 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
34962 called on virtual operands.
34963 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
34964 ssa_undefined_value_p calls.
34965 (vn_phi_insert): Likewise.
34966 (set_ssa_val_to): Likewise.
34967 (visit_phi): Avoid extra work with equivalences for
34968 virtual operand PHIs.
34970 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34972 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
34974 (class mask_nlogic): Ditto.
34975 (class mask_notlogic): Ditto.
34976 (class vmmv): Ditto.
34977 (class vmclr): Ditto.
34978 (class vmset): Ditto.
34979 (class vmnot): Ditto.
34980 (class vcpop): Ditto.
34981 (class vfirst): Ditto.
34982 (class mask_misc): Ditto.
34983 (class viota): Ditto.
34984 (class vid): Ditto.
34986 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34987 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
35006 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
35007 (struct mask_alu_def): Ditto.
35009 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35010 * config/riscv/riscv-vector-builtins.cc: Ditto.
35011 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
35012 for dest it scalar RVV intrinsics.
35013 * config/riscv/vector-iterators.md (sof): New iterator.
35014 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
35015 (@pred_<optab>not<mode>): New pattern.
35016 (@pred_popcount<VB:mode><P:mode>): New pattern.
35017 (@pred_ffs<VB:mode><P:mode>): New pattern.
35018 (@pred_<misc_op><mode>): New pattern.
35019 (@pred_iota<mode>): New pattern.
35020 (@pred_series<mode>): New pattern.
35022 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35024 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
35028 * config/riscv/riscv-vector-builtins.cc: Ditto.
35030 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35031 kito-cheng <kito.cheng@sifive.com>
35033 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
35034 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
35035 (sew64_scalar_helper): New function.
35036 * config/riscv/vector.md: Normalization.
35038 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35040 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
35102 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35104 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
35105 (@pred_<optab><mode>_scalar): Ditto.
35106 (*pred_<optab><mode>_scalar): Ditto.
35107 (*pred_<optab><mode>_extended_scalar): Ditto.
35109 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35111 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
35112 (init_builtins): Ditto.
35113 (mangle_builtin_type): Ditto.
35114 (verify_type_context): Ditto.
35115 (handle_pragma_vector): Ditto.
35116 (builtin_decl): Ditto.
35117 (expand_builtin): Ditto.
35118 (const_vec_all_same_in_range_p): Ditto.
35119 (legitimize_move): Ditto.
35120 (emit_vlmax_op): Ditto.
35121 (emit_nonvlmax_op): Ditto.
35122 (get_vlmul): Ditto.
35123 (get_ratio): Ditto.
35126 (get_avl_type): Ditto.
35127 (calculate_ratio): Ditto.
35128 (enum vlmul_type): Ditto.
35130 (neg_simm5_p): Ditto.
35131 (has_vi_variant_p): Ditto.
35133 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35135 * config/riscv/riscv-protos.h (simm32_p): Remove.
35136 * config/riscv/riscv-v.cc (simm32_p): Ditto.
35137 * config/riscv/vector.md: Use immediate_operand
35138 instead of riscv_vector::simm32_p.
35140 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
35142 * doc/invoke.texi (Optimize Options): Reword the explanation
35143 getting minimal, maximal and default values of a parameter.
35145 2023-02-16 Patrick Palka <ppalka@redhat.com>
35147 * addresses.h: Mechanically drop 'static' from 'static inline'
35148 functions via s/^static inline/inline/g.
35149 * asan.h: Likewise.
35150 * attribs.h: Likewise.
35151 * basic-block.h: Likewise.
35152 * bitmap.h: Likewise.
35153 * cfghooks.h: Likewise.
35154 * cfgloop.h: Likewise.
35155 * cgraph.h: Likewise.
35156 * cselib.h: Likewise.
35157 * data-streamer.h: Likewise.
35158 * debug.h: Likewise.
35160 * diagnostic.h: Likewise.
35161 * dominance.h: Likewise.
35162 * dumpfile.h: Likewise.
35163 * emit-rtl.h: Likewise.
35164 * except.h: Likewise.
35165 * expmed.h: Likewise.
35166 * expr.h: Likewise.
35167 * fixed-value.h: Likewise.
35168 * gengtype.h: Likewise.
35169 * gimple-expr.h: Likewise.
35170 * gimple-iterator.h: Likewise.
35171 * gimple-predict.h: Likewise.
35172 * gimple-range-fold.h: Likewise.
35173 * gimple-ssa.h: Likewise.
35174 * gimple.h: Likewise.
35175 * graphite.h: Likewise.
35176 * hard-reg-set.h: Likewise.
35177 * hash-map.h: Likewise.
35178 * hash-set.h: Likewise.
35179 * hash-table.h: Likewise.
35180 * hwint.h: Likewise.
35181 * input.h: Likewise.
35182 * insn-addr.h: Likewise.
35183 * internal-fn.h: Likewise.
35184 * ipa-fnsummary.h: Likewise.
35185 * ipa-icf-gimple.h: Likewise.
35186 * ipa-inline.h: Likewise.
35187 * ipa-modref.h: Likewise.
35188 * ipa-prop.h: Likewise.
35189 * ira-int.h: Likewise.
35191 * lra-int.h: Likewise.
35193 * lto-streamer.h: Likewise.
35194 * memmodel.h: Likewise.
35195 * omp-general.h: Likewise.
35196 * optabs-query.h: Likewise.
35197 * optabs.h: Likewise.
35198 * plugin.h: Likewise.
35199 * pretty-print.h: Likewise.
35200 * range.h: Likewise.
35201 * read-md.h: Likewise.
35202 * recog.h: Likewise.
35203 * regs.h: Likewise.
35204 * rtl-iter.h: Likewise.
35206 * sbitmap.h: Likewise.
35207 * sched-int.h: Likewise.
35208 * sel-sched-ir.h: Likewise.
35209 * sese.h: Likewise.
35210 * sparseset.h: Likewise.
35211 * ssa-iterators.h: Likewise.
35212 * system.h: Likewise.
35213 * target-globals.h: Likewise.
35214 * target.h: Likewise.
35215 * timevar.h: Likewise.
35216 * tree-chrec.h: Likewise.
35217 * tree-data-ref.h: Likewise.
35218 * tree-iterator.h: Likewise.
35219 * tree-outof-ssa.h: Likewise.
35220 * tree-phinodes.h: Likewise.
35221 * tree-scalar-evolution.h: Likewise.
35222 * tree-sra.h: Likewise.
35223 * tree-ssa-alias.h: Likewise.
35224 * tree-ssa-live.h: Likewise.
35225 * tree-ssa-loop-manip.h: Likewise.
35226 * tree-ssa-loop.h: Likewise.
35227 * tree-ssa-operands.h: Likewise.
35228 * tree-ssa-propagate.h: Likewise.
35229 * tree-ssa-sccvn.h: Likewise.
35230 * tree-ssa.h: Likewise.
35231 * tree-ssanames.h: Likewise.
35232 * tree-streamer.h: Likewise.
35233 * tree-switch-conversion.h: Likewise.
35234 * tree-vectorizer.h: Likewise.
35235 * tree.h: Likewise.
35236 * wide-int.h: Likewise.
35238 2023-02-16 Jakub Jelinek <jakub@redhat.com>
35240 PR tree-optimization/108657
35241 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
35242 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
35243 is a call to internal or builtin function.
35245 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
35247 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
35248 using-declaration to unhide functions.
35250 2023-02-16 Jakub Jelinek <jakub@redhat.com>
35252 PR tree-optimization/108783
35253 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
35254 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
35255 t to curr->op. Otherwise, punt if either newop1 or newop2 are
35256 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
35258 2023-02-16 Richard Biener <rguenther@suse.de>
35260 PR tree-optimization/108791
35261 * tree-ssa-forwprop.cc (optimize_vector_load): Build
35262 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
35265 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
35268 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
35269 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
35270 (ix86_expand_prologue): Likewise.
35272 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
35274 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
35276 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
35278 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
35279 int248_register_operand predicate in zero_extract sub-RTX.
35280 (*cmpqi_ext<mode>_2): Ditto.
35281 (*cmpqi_ext<mode>_3): Ditto.
35282 (*cmpqi_ext<mode>_4): Ditto.
35283 (*extzvqi_mem_rex64): Ditto.
35285 (*insvqi_1_mem_rex64): Ditto.
35286 (@insv<mode>_1): Ditto.
35287 (*insvqi_1): Ditto.
35288 (*insvqi_2): Ditto.
35289 (*insvqi_3): Ditto.
35290 (*extendqi<SWI24:mode>_ext_1): Ditto.
35291 (*addqi_ext<mode>_1): Ditto.
35292 (*addqi_ext<mode>_2): Ditto.
35293 (*subqi_ext<mode>_2): Ditto.
35294 (*testqi_ext<mode>_1): Ditto.
35295 (*testqi_ext<mode>_2): Ditto.
35296 (*andqi_ext<mode>_1): Ditto.
35297 (*andqi_ext<mode>_1_cc): Ditto.
35298 (*andqi_ext<mode>_2): Ditto.
35299 (*<any_or:code>qi_ext<mode>_1): Ditto.
35300 (*<any_or:code>qi_ext<mode>_2): Ditto.
35301 (*xorqi_ext<mode>_1_cc): Ditto.
35302 (*negqi_ext<mode>_2): Ditto.
35303 (*ashlqi_ext<mode>_2): Ditto.
35304 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
35306 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
35308 * config/i386/predicates.md (int248_register_operand):
35309 Rename from extr_register_operand.
35310 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
35311 (*extzx<mode>): Ditto.
35312 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
35313 (*ashl<mode>3_mask): Ditto.
35314 (*<any_shiftrt:insn><mode>3_mask): Ditto.
35315 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
35316 (*<any_rotate:insn><mode>3_mask): Ditto.
35317 (*<btsc><mode>_mask): Ditto.
35318 (*btr<mode>_mask): Ditto.
35319 (*jcc_bt<mode>_mask_1): Ditto.
35321 2023-02-15 Richard Biener <rguenther@suse.de>
35323 PR middle-end/26854
35324 * df-core.cc (df_worklist_propagate_forward): Put later
35325 blocks on worklist and only earlier blocks on pending.
35326 (df_worklist_propagate_backward): Likewise.
35327 (df_worklist_dataflow_doublequeue): Change the iteration
35328 to process new blocks in the same iteration if that
35329 maintains the iteration order.
35331 2023-02-15 Marek Polacek <polacek@redhat.com>
35333 PR middle-end/106080
35334 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
35337 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35339 * config/riscv/predicates.md: Refine codes.
35340 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
35341 * config/riscv/riscv-v.cc: Refine codes.
35342 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
35344 (class imac): New class.
35345 (enum widen_ternop_type): New enum.
35346 (class iwmac): New class.
35348 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35349 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
35357 * config/riscv/riscv-vector-builtins.cc
35358 (function_builder::apply_predication): Adjust for multiply-add support.
35359 (function_expander::add_vundef_operand): Refine codes.
35360 (function_expander::use_ternop_insn): New function.
35361 (function_expander::use_widen_ternop_insn): Ditto.
35362 * config/riscv/riscv-vector-builtins.h: New function.
35363 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
35364 (pred_mul_<optab><mode>_undef_merge): Ditto.
35365 (*pred_<madd_nmsub><mode>): Ditto.
35366 (*pred_<macc_nmsac><mode>): Ditto.
35367 (*pred_mul_<optab><mode>): Ditto.
35368 (@pred_mul_<optab><mode>_scalar): Ditto.
35369 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
35370 (*pred_<madd_nmsub><mode>_scalar): Ditto.
35371 (*pred_<macc_nmsac><mode>_scalar): Ditto.
35372 (*pred_mul_<optab><mode>_scalar): Ditto.
35373 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
35374 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
35375 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
35376 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
35377 (@pred_widen_mul_plus<su><mode>): Ditto.
35378 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
35379 (@pred_widen_mul_plussu<mode>): Ditto.
35380 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
35381 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
35383 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35385 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
35386 (vector_all_trues_mask_operand): New predicate.
35387 (vector_undef_operand): New predicate.
35388 (ltge_operator): New predicate.
35389 (comparison_except_ltge_operator): New predicate.
35390 (comparison_except_eqge_operator): New predicate.
35391 (ge_operator): New predicate.
35392 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
35393 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
35395 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35396 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
35406 * config/riscv/riscv-vector-builtins-shapes.cc
35407 (struct return_mask_def): Adjust for compare support.
35408 * config/riscv/riscv-vector-builtins.cc
35409 (function_expander::use_compare_insn): New function.
35410 * config/riscv/riscv-vector-builtins.h
35411 (function_expander::add_integer_operand): Ditto.
35412 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
35413 * config/riscv/riscv.md: Add vector min/max attributes.
35414 * config/riscv/vector-iterators.md (xnor): New iterator.
35415 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
35416 (*pred_cmp<mode>): Ditto.
35417 (*pred_cmp<mode>_narrow): Ditto.
35418 (@pred_ltge<mode>): Ditto.
35419 (*pred_ltge<mode>): Ditto.
35420 (*pred_ltge<mode>_narrow): Ditto.
35421 (@pred_cmp<mode>_scalar): Ditto.
35422 (*pred_cmp<mode>_scalar): Ditto.
35423 (*pred_cmp<mode>_scalar_narrow): Ditto.
35424 (@pred_eqne<mode>_scalar): Ditto.
35425 (*pred_eqne<mode>_scalar): Ditto.
35426 (*pred_eqne<mode>_scalar_narrow): Ditto.
35427 (*pred_cmp<mode>_extended_scalar): Ditto.
35428 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
35429 (*pred_eqne<mode>_extended_scalar): Ditto.
35430 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
35431 (@pred_ge<mode>_scalar): Ditto.
35432 (@pred_<optab><mode>): Ditto.
35433 (@pred_n<optab><mode>): Ditto.
35434 (@pred_<optab>n<mode>): Ditto.
35435 (@pred_not<mode>): Ditto.
35437 2023-02-15 Martin Jambor <mjambor@suse.cz>
35440 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
35441 creation of non-scalar replacements even if IPA-CP knows their
35444 2023-02-15 Jakub Jelinek <jakub@redhat.com>
35448 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
35449 expander, change operand 3 to be TImode, emit maddlddi4 and
35450 umadddi4_highpart{,_le} with its low half and finally add the high
35451 half to the result.
35453 2023-02-15 Martin Liska <mliska@suse.cz>
35455 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
35457 2023-02-15 Richard Biener <rguenther@suse.de>
35459 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
35460 for with_poison and alias worklist to it.
35461 (sanitize_asan_mark_poison): Likewise.
35463 2023-02-15 Richard Biener <rguenther@suse.de>
35466 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
35467 Combine bitmap test and set.
35468 (scalar_chain::add_insn): Likewise.
35469 (scalar_chain::analyze_register_chain): Remove redundant
35470 attempt to add to queue and instead strengthen assert.
35471 Sink common attempts to mark the def dual-mode.
35472 (scalar_chain::add_to_queue): Remove redundant insn bitmap
35475 2023-02-15 Richard Biener <rguenther@suse.de>
35478 * config/i386/i386-features.cc (convert_scalars_to_vector):
35479 Switch candidates bitmaps to tree view before building the chains.
35481 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
35483 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
35484 "failure trying to reload" call.
35486 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
35488 * gdbinit.in (phrs): New command.
35489 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
35490 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
35492 2023-02-14 David Faust <david.faust@oracle.com>
35495 * config/bpf/constraints.md (q): New memory constraint.
35496 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
35497 (zero_extendqidi2): Likewise.
35498 (zero_extendsidi2): Likewise.
35499 (*mov<MM:mode>): Likewise.
35501 2023-02-14 Andrew Pinski <apinski@marvell.com>
35503 PR tree-optimization/108355
35504 PR tree-optimization/96921
35505 * match.pd: Add pattern for "1 - bool_val".
35507 2023-02-14 Richard Biener <rguenther@suse.de>
35509 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
35510 basic block index hashing on the availability of ->cclhs.
35511 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
35512 rely on ->cclhs availability.
35513 (vn_phi_lookup): Set ->cclhs only when we are eventually
35514 going to CSE the PHI.
35515 (vn_phi_insert): Likewise.
35517 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
35519 * gimplify.cc (gimplify_save_expr): Add missing guard.
35521 2023-02-14 Richard Biener <rguenther@suse.de>
35523 PR tree-optimization/108782
35524 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
35525 Make sure we're not vectorizing an inner loop.
35527 2023-02-14 Jakub Jelinek <jakub@redhat.com>
35529 PR sanitizer/108777
35530 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
35531 * asan.h (asan_memfn_rtl): Declare.
35532 * asan.cc (asan_memfn_rtls): New variable.
35533 (asan_memfn_rtl): New function.
35534 * builtins.cc (expand_builtin): If
35535 param_asan_kernel_mem_intrinsic_prefix and function is
35536 kernel-{,hw}address sanitized, emit calls to
35537 __{,hw}asan_{memcpy,memmove,memset} rather than
35538 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
35539 instead of flag_sanitize & SANITIZE_ADDRESS to check if
35540 asan_intercepted_p functions shouldn't be expanded inline.
35542 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
35544 PR tree-optimization/96373
35545 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
35546 operations on the loop mask. Reject partial vectors if this isn't
35549 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
35551 PR rtl-optimization/108681
35552 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
35553 code to handle bare uses and clobbers.
35555 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
35557 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
35558 caller_save_p flag when clearing defined_p flag.
35559 (setup_reg_equiv): Ditto.
35560 * lra-constraints.cc (lra_constraints): Ditto.
35562 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
35565 * config/i386/predicates.md (extr_register_operand):
35566 New special predicate.
35567 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
35568 as operand 1 predicate.
35569 (*exzv<mode>): Ditto.
35570 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
35572 2023-02-13 Richard Biener <rguenther@suse.de>
35574 PR tree-optimization/28614
35575 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
35576 walking all edges in most cases.
35577 (vn_nary_op_insert_pieces_predicated): Avoid repeated
35578 calls to can_track_predicate_on_edge unless checking is
35580 (process_bb): Instead call it once here for each edge
35581 we register possibly multiple predicates on.
35583 2023-02-13 Richard Biener <rguenther@suse.de>
35585 PR tree-optimization/108691
35586 * tree-cfg.cc (notice_special_calls): When the CFG is built
35587 honor gimple_call_ctrl_altering_p.
35588 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
35589 temporarily if the call is not control-altering.
35590 * calls.cc (emit_call_1): Do not add REG_SETJMP if
35591 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
35593 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
35596 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
35597 (struct s390_sched_state): Initialise to zero.
35598 (s390_sched_variable_issue): For better debuggability also emit
35600 (s390_sched_init): Unconditionally reset scheduler state.
35602 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
35604 * ifcvt.h (noce_if_info::cond_inverted): New field.
35605 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
35606 values when cond_inverted is true.
35607 (noce_find_if_block): Allow the condition to be inverted when
35608 handling conditional moves.
35610 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
35612 * config/s390/predicates.md (execute_operation): Use
35613 constrain_operands instead of extract_constrain_insn in order to
35614 determine wheter there exists a valid alternative.
35616 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
35618 * common/config/arc/arc-common.cc (arc_option_optimization_table):
35619 Remove millicode from list.
35621 2023-02-13 Martin Liska <mliska@suse.cz>
35623 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
35625 2023-02-13 Richard Biener <rguenther@suse.de>
35627 PR tree-optimization/106722
35628 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
35629 whether we marked a stmt.
35630 (mark_control_dependent_edges_necessary): When
35631 mark_last_stmt_necessary didn't mark any stmt make sure
35632 to mark its control dependent edges.
35633 (propagate_necessity): Likewise.
35635 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
35637 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
35638 (DWARF_FRAME_REGISTERS): New.
35639 (DWARF_REG_TO_UNWIND_COLUMN): New.
35641 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
35643 * doc/sourcebuild.texi: Remove (broken) direct reference to
35644 "The GNU configure and build system".
35646 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
35648 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
35649 gen_add3_insn to gen_rtx_SET.
35650 (riscv_adjust_libcall_cfi_epilogue): Likewise.
35652 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35654 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
35655 (class vnclip): Ditto.
35657 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35658 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
35667 * config/riscv/vector-iterators.md (su): Add instruction.
35670 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
35671 (@pred_<sat_op><mode>_scalar): Ditto.
35672 (*pred_<sat_op><mode>_scalar): Ditto.
35673 (*pred_<sat_op><mode>_extended_scalar): Ditto.
35674 (@pred_narrow_clip<v_su><mode>): Ditto.
35675 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
35677 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35679 * config/riscv/constraints.md (Wbr): Remove unused constraint.
35680 * config/riscv/predicates.md: Fix move operand predicate.
35681 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
35682 (class vncvt_x): Ditto.
35683 (class vmerge): Ditto.
35684 (class vmv_v): Ditto.
35686 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35687 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
35694 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
35695 (struct move_def): Ditto.
35697 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35698 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
35699 (DEF_RVV_WEXTU_OPS): Ditto
35700 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
35705 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
35706 * config/riscv/vector-iterators.md (nmsac):New iterator.
35707 (nmsub): New iterator.
35708 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
35709 (@pred_merge<mode>_scalar): New pattern.
35710 (*pred_merge<mode>_scalar): New pattern.
35711 (*pred_merge<mode>_extended_scalar): New pattern.
35712 (@pred_narrow_<optab><mode>): New pattern.
35713 (@pred_narrow_<optab><mode>_scalar): New pattern.
35714 (@pred_trunc<mode>): New pattern.
35716 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35718 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
35719 (class vmsbc): Ditto.
35720 (BASE): Define new class.
35721 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35722 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
35724 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
35727 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35728 * config/riscv/riscv-vector-builtins.cc
35729 (function_expander::use_exact_insn): Adjust for new support
35730 * config/riscv/riscv-vector-builtins.h
35731 (function_base::has_merge_operand_p): New function.
35732 * config/riscv/vector-iterators.md: New iterator.
35733 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
35734 (@pred_msbc<mode>): Ditto.
35735 (@pred_madc<mode>_scalar): Ditto.
35736 (@pred_msbc<mode>_scalar): Ditto.
35737 (*pred_madc<mode>_scalar): Ditto.
35738 (*pred_madc<mode>_extended_scalar): Ditto.
35739 (*pred_msbc<mode>_scalar): Ditto.
35740 (*pred_msbc<mode>_extended_scalar): Ditto.
35741 (@pred_madc<mode>_overflow): Ditto.
35742 (@pred_msbc<mode>_overflow): Ditto.
35743 (@pred_madc<mode>_overflow_scalar): Ditto.
35744 (@pred_msbc<mode>_overflow_scalar): Ditto.
35745 (*pred_madc<mode>_overflow_scalar): Ditto.
35746 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
35747 (*pred_msbc<mode>_overflow_scalar): Ditto.
35748 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
35750 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35752 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
35753 * config/riscv/riscv-v.cc (simm32_p): Ditto.
35754 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
35755 (class vsbc): Ditto.
35757 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35758 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
35760 * config/riscv/riscv-vector-builtins-shapes.cc
35761 (struct no_mask_policy_def): Ditto.
35763 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35764 * config/riscv/riscv-vector-builtins.cc
35765 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
35766 (rvv_arg_type_info::get_tree_type): Ditto.
35767 (function_expander::use_exact_insn): Ditto.
35768 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
35769 (function_base::use_mask_predication_p): New function.
35770 * config/riscv/vector-iterators.md: New iterator.
35771 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
35772 (@pred_sbc<mode>): Ditto.
35773 (@pred_adc<mode>_scalar): Ditto.
35774 (@pred_sbc<mode>_scalar): Ditto.
35775 (*pred_adc<mode>_scalar): Ditto.
35776 (*pred_adc<mode>_extended_scalar): Ditto.
35777 (*pred_sbc<mode>_scalar): Ditto.
35778 (*pred_sbc<mode>_extended_scalar): Ditto.
35780 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35782 * config/riscv/vector.md: use "zero" reg.
35784 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35786 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
35788 (class vwmulsu): Ditto.
35789 (class vwcvt): Ditto.
35790 (BASE): Add integer widening support.
35791 * config/riscv/riscv-vector-builtins-bases.h: Ditto
35792 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
35793 (vwsub): New class.
35794 (vwmul): New class.
35795 (vwmulu): New class.
35796 (vwmulsu): New class.
35797 (vwaddu): New class.
35798 (vwsubu): New class.
35799 (vwcvt_x): New class.
35800 (vwcvtu_x): New class.
35801 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
35803 (struct widen_alu_def): New class.
35804 (SHAPE): New class.
35805 * config/riscv/riscv-vector-builtins-shapes.h: New class.
35806 * config/riscv/riscv-vector-builtins.cc
35807 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
35808 (rvv_arg_type_info::get_tree_type): Ditto.
35809 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
35811 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
35813 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
35814 * config/riscv/riscv.h (X0_REGNUM): New constant.
35815 * config/riscv/vector-iterators.md: New iterators.
35816 * config/riscv/vector.md
35817 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
35819 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
35821 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
35822 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
35824 (@pred_widen_mulsu<mode>): Ditto.
35825 (@pred_widen_mulsu<mode>_scalar): Ditto.
35826 (@pred_<optab><mode>): Ditto.
35828 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35829 kito-cheng <kito.cheng@sifive.com>
35831 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
35832 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
35834 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35835 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
35839 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
35841 (DEF_RVV_FULL_V_U_OPS): Ditto.
35842 (vint8mf8_t): Ditto.
35843 (vint8mf4_t): Ditto.
35844 (vint8mf2_t): Ditto.
35845 (vint8m1_t): Ditto.
35846 (vint8m2_t): Ditto.
35847 (vint8m4_t): Ditto.
35848 (vint8m8_t): Ditto.
35849 (vint16mf4_t): Ditto.
35850 (vint16mf2_t): Ditto.
35851 (vint16m1_t): Ditto.
35852 (vint16m2_t): Ditto.
35853 (vint16m4_t): Ditto.
35854 (vint16m8_t): Ditto.
35855 (vint32mf2_t): Ditto.
35856 (vint32m1_t): Ditto.
35857 (vint32m2_t): Ditto.
35858 (vint32m4_t): Ditto.
35859 (vint32m8_t): Ditto.
35860 (vint64m1_t): Ditto.
35861 (vint64m2_t): Ditto.
35862 (vint64m4_t): Ditto.
35863 (vint64m8_t): Ditto.
35864 (vuint8mf8_t): Ditto.
35865 (vuint8mf4_t): Ditto.
35866 (vuint8mf2_t): Ditto.
35867 (vuint8m1_t): Ditto.
35868 (vuint8m2_t): Ditto.
35869 (vuint8m4_t): Ditto.
35870 (vuint8m8_t): Ditto.
35871 (vuint16mf4_t): Ditto.
35872 (vuint16mf2_t): Ditto.
35873 (vuint16m1_t): Ditto.
35874 (vuint16m2_t): Ditto.
35875 (vuint16m4_t): Ditto.
35876 (vuint16m8_t): Ditto.
35877 (vuint32mf2_t): Ditto.
35878 (vuint32m1_t): Ditto.
35879 (vuint32m2_t): Ditto.
35880 (vuint32m4_t): Ditto.
35881 (vuint32m8_t): Ditto.
35882 (vuint64m1_t): Ditto.
35883 (vuint64m2_t): Ditto.
35884 (vuint64m4_t): Ditto.
35885 (vuint64m8_t): Ditto.
35886 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
35887 (DEF_RVV_FULL_V_U_OPS): Ditto.
35888 (check_required_extensions): Add vmulh support.
35889 (rvv_arg_type_info::get_tree_type): Ditto.
35890 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
35891 (enum rvv_base_type): Ditto.
35892 * config/riscv/riscv.opt: Add 'V' extension flag.
35893 * config/riscv/vector-iterators.md (su): New iterator.
35894 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
35895 (@pred_mulh<v_su><mode>_scalar): Ditto.
35896 (*pred_mulh<v_su><mode>_scalar): Ditto.
35897 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
35899 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35901 * config/riscv/iterators.md: Add sign_extend/zero_extend.
35902 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
35904 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
35905 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
35908 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
35909 for vsext/vzext support.
35910 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
35912 (DEF_RVV_QEXTI_OPS): Ditto.
35913 (DEF_RVV_OEXTI_OPS): Ditto.
35914 (DEF_RVV_WEXTU_OPS): Ditto.
35915 (DEF_RVV_QEXTU_OPS): Ditto.
35916 (DEF_RVV_OEXTU_OPS): Ditto.
35917 (vint16mf4_t): Ditto.
35918 (vint16mf2_t): Ditto.
35919 (vint16m1_t): Ditto.
35920 (vint16m2_t): Ditto.
35921 (vint16m4_t): Ditto.
35922 (vint16m8_t): Ditto.
35923 (vint32mf2_t): Ditto.
35924 (vint32m1_t): Ditto.
35925 (vint32m2_t): Ditto.
35926 (vint32m4_t): Ditto.
35927 (vint32m8_t): Ditto.
35928 (vint64m1_t): Ditto.
35929 (vint64m2_t): Ditto.
35930 (vint64m4_t): Ditto.
35931 (vint64m8_t): Ditto.
35932 (vuint16mf4_t): Ditto.
35933 (vuint16mf2_t): Ditto.
35934 (vuint16m1_t): Ditto.
35935 (vuint16m2_t): Ditto.
35936 (vuint16m4_t): Ditto.
35937 (vuint16m8_t): Ditto.
35938 (vuint32mf2_t): Ditto.
35939 (vuint32m1_t): Ditto.
35940 (vuint32m2_t): Ditto.
35941 (vuint32m4_t): Ditto.
35942 (vuint32m8_t): Ditto.
35943 (vuint64m1_t): Ditto.
35944 (vuint64m2_t): Ditto.
35945 (vuint64m4_t): Ditto.
35946 (vuint64m8_t): Ditto.
35947 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
35948 (DEF_RVV_QEXTI_OPS): Ditto.
35949 (DEF_RVV_OEXTI_OPS): Ditto.
35950 (DEF_RVV_WEXTU_OPS): Ditto.
35951 (DEF_RVV_QEXTU_OPS): Ditto.
35952 (DEF_RVV_OEXTU_OPS): Ditto.
35953 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
35955 (rvv_arg_type_info::get_tree_type): Ditto.
35956 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
35957 * config/riscv/vector-iterators.md (z): New attribute.
35958 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
35959 (@pred_<optab><mode>_vf4): Ditto.
35960 (@pred_<optab><mode>_vf8): Ditto.
35962 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35964 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
35965 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
35966 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
35967 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35968 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
35972 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
35977 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
35978 (@pred_<optab><mode>_scalar): New pattern.
35979 (*pred_<optab><mode>_scalar): New pattern.
35980 (*pred_<optab><mode>_extended_scalar): New pattern.
35982 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35984 * config/riscv/iterators.md: Add neg and not.
35985 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
35987 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35988 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
36009 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
36010 (struct alu_def): Ditto.
36012 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36013 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
36014 * config/riscv/vector-iterators.md: New iterator.
36015 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
36017 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36019 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
36021 2023-02-11 Jakub Jelinek <jakub@redhat.com>
36024 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
36025 item->offset bit position is too large to be representable as
36026 unsigned int byte position.
36028 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
36030 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
36032 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
36034 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
36035 valid_combine only when ira_use_lra_p is true.
36037 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
36039 * params.opt (ira-simple-lra-insn-threshold): Add new param.
36040 * ira.cc (ira): Use the param to switch on simple LRA.
36042 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
36044 PR tree-optimization/108687
36045 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
36046 back to RFD_NONE mode for calculations.
36047 (ranger_cache::propagate_cache): Call the internal edge range API
36048 with RFD_READ_ONLY instead of changing the external routine.
36050 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
36052 PR tree-optimization/108520
36053 * gimple-range-infer.cc (check_assume_func): Invoke
36054 gimple_range_global directly instead using global_range_query.
36055 * value-query.cc (get_range_global): Add function context and
36056 avoid calling nonnull_arg_p if not cfun.
36057 (gimple_range_global): Add function context pointer.
36058 * value-query.h (imple_range_global): Add function context.
36060 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36062 * config/riscv/constraints.md (Wdm): Adjust constraint.
36063 (Wbr): New constraint.
36064 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
36065 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
36066 (emit_vlmax_op): New function.
36067 (emit_nonvlmax_op): Ditto.
36069 (neg_simm5_p): Ditto.
36070 (has_vi_variant_p): Ditto.
36071 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
36072 (emit_vlmax_op): New function.
36073 (emit_nonvlmax_op): Ditto.
36074 (expand_const_vector): Adjust function.
36075 (legitimize_move): Ditto.
36076 (simm32_p): New function.
36078 (neg_simm5_p): Ditto.
36079 (has_vi_variant_p): Ditto.
36080 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
36082 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36083 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
36086 (vminu): Remove signed cases.
36088 (vdiv): Remove unsigned cases.
36090 (vdivu): Remove signed cases.
36094 (vrsub): New class.
36099 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
36100 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
36101 * config/riscv/vector-iterators.md: New iterators.
36102 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
36104 (@pred_<optab><mode>_scalar): New pattern.
36105 (@pred_sub<mode>_reverse_scalar): Ditto.
36106 (*pred_<optab><mode>_scalar): Ditto.
36107 (*pred_<optab><mode>_extended_scalar): Ditto.
36108 (*pred_sub<mode>_reverse_scalar): Ditto.
36109 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
36111 2023-02-10 Richard Biener <rguenther@suse.de>
36113 PR tree-optimization/108724
36114 * tree-vect-stmts.cc (vectorizable_operation): Avoid
36115 using word_mode vectors when vector lowering will
36116 decompose them to elementwise operations.
36118 2023-02-10 Jakub Jelinek <jakub@redhat.com>
36121 2023-02-09 Martin Liska <mliska@suse.cz>
36124 * doc/extend.texi: Document that the function
36125 does not work correctly for old VIA processors.
36127 2023-02-10 Andrew Pinski <apinski@marvell.com>
36128 Andrew Macleod <amacleod@redhat.com>
36130 PR tree-optimization/108684
36131 * tree-ssa-dce.cc (simple_dce_from_worklist):
36132 Check all ssa names and not just non-vdef ones
36133 before accepting the inline-asm.
36134 Call unlink_stmt_vdef on the statement before
36137 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
36139 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
36140 * ira.cc (validate_equiv_mem): Check memref address variance.
36141 (no_equiv): Clear caller_save_p flag.
36142 (update_equiv_regs): Define caller save equivalence for
36144 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
36145 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
36146 call_save_p. Use caller save equivalence depending on the arg.
36147 (split_reg): Adjust the call.
36149 2023-02-09 Jakub Jelinek <jakub@redhat.com>
36152 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
36153 (cpu_indicator_init): Call get_available_features for all CPUs with
36154 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
36157 2023-02-09 Jakub Jelinek <jakub@redhat.com>
36159 PR tree-optimization/108688
36160 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
36161 of BIT_INSERT_EXPR extracting exactly all inserted bits even
36162 when without mode precision. Formatting fixes.
36164 2023-02-09 Andrew Pinski <apinski@marvell.com>
36166 PR tree-optimization/108688
36167 * match.pd (bit_field_ref [bit_insert]): Avoid generating
36168 BIT_FIELD_REFs of non-mode-precision integral operands.
36170 2023-02-09 Martin Liska <mliska@suse.cz>
36173 * doc/extend.texi: Document that the function
36174 does not work correctly for old VIA processors.
36176 2023-02-09 Andreas Schwab <schwab@suse.de>
36178 * lto-wrapper.cc (merge_and_complain): Handle
36179 -funwind-tables and -fasynchronous-unwind-tables.
36180 (append_compiler_options): Likewise.
36182 2023-02-09 Richard Biener <rguenther@suse.de>
36184 PR tree-optimization/26854
36185 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
36186 view around insert_updated_phi_nodes_for.
36187 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
36189 (walk_aliased_vdefs_1): Likewise.
36191 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
36193 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
36195 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36198 * config.gcc (tm_mlib_file): Define new variable.
36200 2023-02-08 Jakub Jelinek <jakub@redhat.com>
36202 PR tree-optimization/108692
36203 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
36204 widened_code which is different from code, don't call
36205 vect_look_through_possible_promotion but instead just check op is
36206 SSA_NAME with integral type for which vect_is_simple_use is true
36207 and call set_op on this_unprom.
36209 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
36211 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
36213 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
36215 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
36216 to 'aarch_ra_sign_key'.
36217 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
36219 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
36220 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
36221 * config/arm/arm.opt: Define.
36223 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
36225 PR tree-optimization/108316
36226 * tree-vect-stmts.cc (get_load_store_type): When using
36227 internal functions for gather/scatter, make sure that the type
36228 of the offset argument is consistent with the offset vector type.
36230 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
36233 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
36235 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
36236 * ira.cc (validate_equiv_mem): Check memref address variance.
36237 (update_equiv_regs): Define caller save equivalence for
36239 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
36240 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
36241 call_save_p. Use caller save equivalence depending on the arg.
36242 (split_reg): Adjust the call.
36244 2023-02-08 Jakub Jelinek <jakub@redhat.com>
36246 * tree.def (SAD_EXPR): Remove outdated comment about missing
36249 2023-02-07 Marek Polacek <polacek@redhat.com>
36251 * doc/invoke.texi: Update -fchar8_t documentation.
36253 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
36255 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
36256 * ira.cc (validate_equiv_mem): Check memref address variance.
36257 (update_equiv_regs): Define caller save equivalence for
36259 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
36260 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
36261 call_save_p. Use caller save equivalence depending on the arg.
36262 (split_reg): Adjust the call.
36264 2023-02-07 Richard Biener <rguenther@suse.de>
36266 PR tree-optimization/26854
36267 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
36268 instead of immediate uses.
36270 2023-02-07 Jakub Jelinek <jakub@redhat.com>
36272 PR tree-optimization/106923
36273 * ipa-split.cc (execute_split_functions): Don't split returns_twice
36276 2023-02-07 Jakub Jelinek <jakub@redhat.com>
36278 PR tree-optimization/106433
36279 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
36280 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
36282 2023-02-07 Jan Hubicka <jh@suse.cz>
36284 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
36287 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
36289 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
36290 (process_asm): Create a constructor for GCN_STACK_SIZE.
36291 (main): Parse the -mstack-size option.
36293 2023-02-06 Alex Coplan <alex.coplan@arm.com>
36296 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
36297 Use correct constraint for operand 3.
36299 2023-02-06 Martin Jambor <mjambor@suse.cz>
36301 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
36303 2023-02-06 Xi Ruoyao <xry111@xry111.site>
36305 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
36306 New define_int_iterator.
36307 (bytepick_d_ashift_amount): Likewise.
36308 (bytepick_imm): New define_int_attr.
36309 (bytepick_w_lshiftrt_amount): Likewise.
36310 (bytepick_d_lshiftrt_amount): Likewise.
36311 (bytepick_w_<bytepick_imm>): New define_insn template.
36312 (bytepick_w_<bytepick_imm>_extend): Likewise.
36313 (bytepick_d_<bytepick_imm>): Likewise.
36314 (bytepick_w): Remove unused define_insn.
36315 (bytepick_d): Likewise.
36316 (UNSPEC_BYTEPICK_W): Remove unused unspec.
36317 (UNSPEC_BYTEPICK_D): Likewise.
36318 * config/loongarch/predicates.md (const_0_to_3_operand):
36319 Remove unused define_predicate.
36320 (const_0_to_7_operand): Likewise.
36322 2023-02-06 Jakub Jelinek <jakub@redhat.com>
36324 PR tree-optimization/108655
36325 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
36326 or -fsanitize=unreachable -fsanitize-trap=unreachable return
36327 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
36329 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
36331 * doc/install.texi (Specific): Remove PW32.
36333 2023-02-03 Jakub Jelinek <jakub@redhat.com>
36335 PR tree-optimization/108647
36336 * range-op.cc (operator_equal::op1_range,
36337 operator_not_equal::op1_range): Don't test op2 bound
36338 equality if op2.undefined_p (), instead set_varying.
36339 (operator_lt::op1_range, operator_le::op1_range,
36340 operator_gt::op1_range, operator_ge::op1_range): Return false if
36341 op2.undefined_p ().
36342 (operator_lt::op2_range, operator_le::op2_range,
36343 operator_gt::op2_range, operator_ge::op2_range): Return false if
36344 op1.undefined_p ().
36346 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
36348 PR tree-optimization/108639
36349 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
36351 (irange::operator==): Same.
36353 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
36355 PR tree-optimization/108647
36356 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
36357 (foperator_lt::op2_range): Same.
36358 (foperator_le::op1_range): Same.
36359 (foperator_le::op2_range): Same.
36360 (foperator_gt::op1_range): Same.
36361 (foperator_gt::op2_range): Same.
36362 (foperator_ge::op1_range): Same.
36363 (foperator_ge::op2_range): Same.
36364 (foperator_unordered_lt::op1_range): Same.
36365 (foperator_unordered_lt::op2_range): Same.
36366 (foperator_unordered_le::op1_range): Same.
36367 (foperator_unordered_le::op2_range): Same.
36368 (foperator_unordered_gt::op1_range): Same.
36369 (foperator_unordered_gt::op2_range): Same.
36370 (foperator_unordered_ge::op1_range): Same.
36371 (foperator_unordered_ge::op2_range): Same.
36373 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
36375 PR tree-optimization/107570
36376 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
36378 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
36380 * doc/gm2.texi (Internals): Remove from menu.
36381 (Using): Comment out ifnohtml conditional.
36382 (Documentation): Use gcc url.
36383 (License): Node simplified.
36384 (Copying): New node. Include gpl_v3_without_node.
36385 (Contributing): Node simplified.
36386 (Internals): Commented out.
36387 (Libraries): Node simplified.
36390 (Functions): Ditto.
36392 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
36394 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
36396 (mve_vqshluq_m_n_s<mode>): Likewise.
36397 (mve_vshlq_m_<supf><mode>): Likewise.
36398 (mve_vsriq_m_n_<supf><mode>): Likewise.
36399 (mve_vsubq_m_<supf><mode>): Likewise.
36401 2023-02-03 Martin Jambor <mjambor@suse.cz>
36404 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
36405 when comparing to an IPA-CP value.
36406 (dump_list_of_param_indices): New function.
36407 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
36408 Dump removed candidates using dump_list_of_param_indices.
36409 * ipa-param-manipulation.cc
36410 (ipa_param_body_adjustments::modify_expression): Add assert checking
36411 sizes of a VIEW_CONVERT_EXPR will match.
36412 (ipa_param_body_adjustments::modify_assignment): Likewise.
36414 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
36416 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
36417 * config/riscv/riscv.cc: Ditto.
36419 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36421 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
36425 * config/riscv/vector.md: Ditto.
36427 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36429 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
36430 * config/riscv/riscv-vector-builtins-bases.cc: New class.
36431 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
36434 * config/riscv/riscv-vector-builtins.cc: Ditto.
36435 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
36437 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
36439 * toplev.cc (toplev::main): Only print the version information header
36440 from toplevel main().
36442 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
36444 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
36445 cond_{ashl|ashr|lshr}
36447 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
36449 PR rtl-optimization/108086
36450 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
36451 Adjust size-related commentary accordingly.
36453 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
36455 PR rtl-optimization/108508
36456 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
36457 the splay tree search gives the first clobber in the second group,
36458 make sure that the root of the first clobber group is updated
36459 correctly. Enter the new clobber group into the definition splay
36462 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
36464 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
36465 Fix finding best match score.
36467 2023-02-02 Jakub Jelinek <jakub@redhat.com>
36470 PR rtl-optimization/108463
36472 * cselib.cc (cselib_current_insn): Move declaration earlier.
36473 (cselib_hasher::equal): For debug only locs, temporarily override
36474 cselib_current_insn to their l->setting_insn for the
36475 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
36476 promote some debug locs.
36477 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
36478 when using cselib call cselib_lookup_from_insn on the address but
36479 don't substitute it.
36481 2023-02-02 Richard Biener <rguenther@suse.de>
36483 PR middle-end/108625
36484 * genmatch.cc (expr::gen_transform): Also disallow resimplification
36485 from pushing to lseq with force_leaf.
36486 (dt_simplify::gen_1): Likewise.
36488 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
36490 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
36491 (struct kernargs): Replace the common content with kernargs_abi.
36492 (struct heap): Delete.
36493 (main): Read GCN_STACK_SIZE envvar.
36494 Allocate space for the device stacks.
36495 Write the new kernargs fields.
36496 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
36497 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
36498 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
36499 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
36500 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
36501 Set up the stacks from the values in the kernargs, not private.
36502 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
36503 (gcn_hsa_declare_function_name): Turn off the private segment.
36504 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
36505 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
36506 * config/gcn/gcn.opt (mstack-size): Change the description.
36508 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
36511 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
36512 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
36513 addressing MVE predicate modes.
36514 (mve_bool_vec_to_const): Change to represent correct MVE predicate
36516 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
36518 (arm_vector_mode_supported_p): Likewise.
36519 (arm_mode_to_pred_mode): Add V2QI.
36520 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
36522 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
36523 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
36524 (v2qi_UP): New macro.
36525 (v4bi_UP): New macro.
36526 (v8bi_UP): New macro.
36527 (v16bi_UP): New macro.
36528 (arm_expand_builtin_args): Make it able to expand the new predicate
36530 * config/arm/arm-modes.def (V2QI): New mode.
36531 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
36532 Pred4x4_t): Remove unused predicate builtin types.
36533 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
36534 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
36535 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
36536 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
36537 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
36538 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
36539 of MODE_VECTOR_BOOL.
36540 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
36541 (MVE_VPRED): Likewise.
36542 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
36543 (MVE_vctp): New mode attribute.
36547 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
36548 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
36550 (mve_vpnothi): Rename this...
36551 (mve_vpnotv16bi): ... to this.
36552 (mve_vctp<mode1>q_mhi): Rename this...
36553 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
36554 (mve_vldrdq_gather_base_z_<supf>v2di,
36555 mve_vldrdq_gather_offset_z_<supf>v2di,
36556 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
36557 mve_vstrdq_scatter_base_p_<supf>v2di,
36558 mve_vstrdq_scatter_offset_p_<supf>v2di,
36559 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
36560 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
36561 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
36562 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
36563 mve_vldrdq_gather_base_wb_z_<supf>v2di,
36564 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
36565 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
36567 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
36569 (VCTP): ... with this.
36570 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
36571 (VCTP_M): ... with this.
36572 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
36573 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
36575 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
36578 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
36579 (arm_modes_tieable_p): Make MVE predicate modes tieable.
36580 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
36581 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
36582 simplify_subreg to simplify subregs where the outermode is not scalar.
36584 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
36587 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
36588 new qualifiers parameter and use unsigned short type for MVE predicate.
36589 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
36591 (arm_init_crypto_builtins): Likewise.
36593 2023-02-02 Jakub Jelinek <jakub@redhat.com>
36596 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
36597 * internal-fn.def (TRAP): Remove.
36598 * internal-fn.cc (expand_TRAP): Remove.
36599 * tree.cc (build_common_builtin_nodes): Define
36600 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
36601 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
36602 instead of BUILT_IN_TRAP.
36603 * gimple.cc (gimple_build_builtin_unreachable): Remove
36604 emitting internal function for BUILT_IN_TRAP.
36605 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
36606 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
36607 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
36608 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
36609 BUILT_IN_UNREACHABLE_TRAP.
36610 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
36611 * tree-cfg.cc (verify_gimple_call,
36612 pass_warn_function_return::execute): Likewise.
36613 * attribs.cc (decl_attributes): Don't report exclusions on
36614 BUILT_IN_UNREACHABLE_TRAP either.
36616 2023-02-02 liuhongt <hongtao.liu@intel.com>
36618 PR tree-optimization/108601
36619 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
36620 * tree-vect-loop.cc
36621 (vectorizable_nonlinear_induction): Remove
36622 vect_can_peel_nonlinear_iv_p.
36623 (vect_can_peel_nonlinear_iv_p): Don't peel
36624 nonlinear iv(mult or shift) for epilog when vf is not
36625 constant and moved the defination to ..
36626 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
36629 2023-02-02 Jakub Jelinek <jakub@redhat.com>
36631 PR middle-end/108435
36632 * tree-nested.cc (convert_nonlocal_omp_clauses)
36633 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
36634 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
36635 before calling declare_vars.
36636 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
36637 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
36638 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
36639 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
36641 2023-02-01 Tamar Christina <tamar.christina@arm.com>
36643 * common/config/aarch64/aarch64-common.cc
36644 (struct aarch64_option_extension): Add native_detect and document struct
36646 (all_extensions): Set new field native_detect.
36647 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
36650 2023-02-01 Martin Liska <mliska@suse.cz>
36652 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
36655 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
36657 PR tree-optimization/108356
36658 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
36659 do a search of the DOM tree for a range.
36661 2023-02-01 Martin Liska <mliska@suse.cz>
36664 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
36665 ony non-null values.
36666 * ipa.cc (walk_polymorphic_call_targets): Likewise.
36668 2023-02-01 Martin Liska <mliska@suse.cz>
36671 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
36674 2023-02-01 Jakub Jelinek <jakub@redhat.com>
36677 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
36678 subregs in DEBUG_INSNs.
36680 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
36682 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
36684 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
36686 * config/s390/s390.cc (s390_restore_gpr_p): New function.
36687 (s390_preserve_gpr_arg_in_range_p): New function.
36688 (s390_preserve_gpr_arg_p): New function.
36689 (s390_preserve_fpr_arg_p): New function.
36690 (s390_register_info_stdarg_fpr): Rename to ...
36691 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
36692 (s390_register_info_stdarg_gpr): Rename to ...
36693 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
36694 (s390_register_info): Use the renamed functions above.
36695 (s390_optimize_register_info): Likewise.
36696 (save_fpr): Generate CFI for -mpreserve-args.
36697 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
36698 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
36699 (s390_optimize_prologue): Likewise.
36700 * config/s390/s390.opt: New option -mpreserve-args
36702 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
36704 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
36705 (restore_gprs): Likewise.
36706 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
36707 frame pointer if a frame-pointer is used.
36708 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
36709 * config/s390/s390.md (stack_tie): Add a register operand and
36711 (@stack_tie<mode>): ... this.
36713 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
36715 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
36716 EMIT_CFI parameter.
36717 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
36718 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
36720 2023-02-01 Richard Biener <rguenther@suse.de>
36722 PR middle-end/108500
36723 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
36724 with tree traversal algorithm.
36726 2023-02-01 Jason Merrill <jason@redhat.com>
36728 * doc/invoke.texi: Document -Wno-changes-meaning.
36730 2023-02-01 David Malcolm <dmalcolm@redhat.com>
36732 * doc/invoke.texi (Static Analyzer Options): Add notes about
36733 limitations of -fanalyzer.
36735 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36737 * config/riscv/constraints.md (vj): New.
36739 * config/riscv/iterators.md: Add more opcode.
36740 * config/riscv/predicates.md (vector_arith_operand): New.
36741 (vector_neg_arith_operand): New.
36742 (vector_shift_operand): New.
36743 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
36744 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
36761 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
36778 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
36779 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
36780 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
36781 (DEF_RVV_U_OPS): New.
36782 (rvv_arg_type_info::get_base_vector_type): Handle
36783 RVV_BASE_shift_vector.
36784 (rvv_arg_type_info::get_tree_type): Ditto.
36785 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
36786 RVV_BASE_shift_vector.
36787 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
36788 * config/riscv/vector-iterators.md: Handle more opcode.
36789 * config/riscv/vector.md (@pred_<optab><mode>): New.
36791 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
36794 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
36797 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
36799 PR tree-optimization/108608
36800 * tree-vect-loop.cc (vect_transform_reduction): Handle single
36801 def-use cycles that involve function calls rather than tree codes.
36803 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
36805 PR tree-optimization/108385
36806 * gimple-range-gori.cc (gori_compute::compute_operand_range):
36807 Allow VARYING computations to continue if there is a relation.
36808 * range-op.cc (pointer_plus_operator::op2_range): New.
36810 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
36812 PR tree-optimization/108359
36813 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
36814 (range_operator::fold_range): If op1 is equivalent to op2 then
36815 invoke new fold_in_parts_equiv to operate on sub-components.
36816 * range-op.h (wi_fold_in_parts_equiv): New prototype.
36818 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
36820 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
36821 not abort calculations if there is a valid relation available.
36822 (gori_compute::refine_using_relation): Pass correct relation trio.
36823 (gori_compute::compute_operand1_range): Create trio and use it.
36824 (gori_compute::compute_operand2_range): Ditto.
36825 * range-op.cc (operator_plus::op1_range): Use correct trio member.
36826 (operator_minus::op1_range): Use correct trio member.
36827 * value-relation.cc (value_relation::create_trio): New.
36828 * value-relation.h (value_relation::create_trio): New prototype.
36830 2023-01-31 Jakub Jelinek <jakub@redhat.com>
36833 * config/i386/i386-expand.cc
36834 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
36835 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
36836 equal to bitsize of mode.
36838 2023-01-31 Jakub Jelinek <jakub@redhat.com>
36840 PR rtl-optimization/108596
36841 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
36842 ends with asm goto and has a crossing fallthrough edge to the same bb
36843 that contains at least one of its labels by restoring EDGE_CROSSING
36844 flag even on possible edge from cur_bb to new_bb successor.
36846 2023-01-31 Jakub Jelinek <jakub@redhat.com>
36849 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
36850 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
36851 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
36852 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
36853 uninitialized automatic variable __W.
36855 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
36857 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
36859 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36861 * config/riscv/riscv-protos.h (get_vector_mode): New function.
36862 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
36863 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
36864 (class loadstore): Adjust for indexed loads/stores support.
36866 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
36867 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
36883 * config/riscv/riscv-vector-builtins-shapes.cc
36884 (struct indexed_loadstore_def): New class.
36886 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36887 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
36888 for indexed loads/stores support.
36889 (check_required_extensions): Ditto.
36890 (rvv_arg_type_info::get_base_vector_type): New function.
36891 (rvv_arg_type_info::get_tree_type): Ditto.
36892 (function_builder::add_unique_function): Adjust for indexed loads/stores
36894 (function_expander::use_exact_insn): New function.
36895 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
36896 indexed loads/stores support.
36897 (struct rvv_arg_type_info): Ditto.
36898 (function_expander::index_mode): New function.
36899 (function_base::apply_tail_policy_p): Ditto.
36900 (function_base::apply_mask_policy_p): Ditto.
36901 * config/riscv/vector-iterators.md (unspec): New unspec.
36902 * config/riscv/vector.md (unspec): Ditto.
36903 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
36905 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
36906 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
36907 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
36908 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
36909 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
36910 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
36911 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
36912 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
36913 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
36914 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
36915 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
36916 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
36917 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
36919 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
36921 * config.gcc: Recognize x86_64-*-gnu* targets and include
36923 * config/i386/gnu64.h: Define configuration for new target
36924 including ld.so location.
36926 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
36928 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
36929 ampere1a to include SM4.
36931 2023-01-30 Andrew Pinski <apinski@marvell.com>
36933 PR tree-optimization/108582
36934 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
36935 for middlebb to have no phi nodes.
36937 2023-01-30 Richard Biener <rguenther@suse.de>
36939 PR tree-optimization/108574
36940 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
36941 sameval and def, ignore the equivalence if there's the
36942 danger of oscillating between two values.
36944 2023-01-30 Andreas Schwab <schwab@suse.de>
36946 * common/config/riscv/riscv-common.cc
36947 (riscv_option_optimization_table)
36948 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
36949 -fasynchronous-unwind-tables and -funwind-tables.
36950 * config.gcc (riscv*-*-linux*): Define
36951 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
36953 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
36955 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
36956 value of includedir.
36958 2023-01-30 Richard Biener <rguenther@suse.de>
36961 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
36964 2023-01-30 liuhongt <hongtao.liu@intel.com>
36966 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
36967 * doc/invoke.texi: Ditto.
36969 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
36971 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
36972 (stmt_may_terminate_function_p): If assuming return or EH
36973 volatile asm is safe.
36974 (find_always_executed_bbs): Fix handling of terminating BBS and
36975 infinite loops; add debug output.
36976 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
36978 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
36980 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
36981 off-by-one in checking the permissible shift-amount.
36983 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36985 * doc/extend.texi (Named Address Spaces): Update link to the
36988 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36990 * doc/standards.texi (Standards): Fix markup.
36992 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36994 * doc/standards.texi (Standards): Update link to Objective-C book.
36996 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36998 * doc/invoke.texi (Instrumentation Options): Update reference to
37001 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
37003 * doc/standards.texi: Update Go1 link.
37005 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37007 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
37008 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
37011 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37012 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
37014 * config/riscv/riscv-vector-builtins.cc
37015 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
37016 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
37017 (@pred_strided_store<mode>): Ditto.
37019 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37021 * config/riscv/vector.md (tail_policy_op_idx): Remove.
37022 (mask_policy_op_idx): Remove.
37023 (avl_type_op_idx): Remove.
37025 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
37027 PR tree-optimization/96373
37028 * tree.h (sign_mask_for): Declare.
37029 * tree.cc (sign_mask_for): New function.
37030 (signed_or_unsigned_type_for): For vector types, try to use the
37031 related_int_vector_mode.
37032 * genmatch.cc (commutative_op): Handle conditional internal functions.
37033 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
37035 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
37037 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
37038 Use the likely minimum VF when bounding the denominators to
37039 the estimated number of iterations.
37041 2023-01-27 Richard Biener <rguenther@suse.de>
37044 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
37045 and -Ofast FP environment side-effects.
37047 2023-01-27 Richard Biener <rguenther@suse.de>
37050 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
37051 Don't add crtfastmath.o for -shared.
37053 2023-01-27 Richard Biener <rguenther@suse.de>
37056 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
37059 2023-01-27 Richard Biener <rguenther@suse.de>
37062 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
37063 crtfastmath.o for -shared.
37065 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
37067 PR tree-optimization/108306
37068 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
37069 varying for shifts that are always out of void range.
37070 (operator_rshift::fold_range): Return [0, 0] not
37071 varying for shifts that are always out of void range.
37073 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
37075 PR tree-optimization/108447
37076 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
37077 Do not attempt to fold HONOR_NAN types.
37079 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37081 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
37082 Remove _m suffix for "vop_m" C++ overloaded API name.
37084 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37086 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
37087 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37088 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
37090 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
37091 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
37092 (vbool64_t): Ditto.
37093 (vbool32_t): Ditto.
37094 (vbool16_t): Ditto.
37099 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
37100 (rvv_arg_type_info::get_tree_type): Ditto.
37101 (function_expander::use_contiguous_load_insn): Ditto.
37102 * config/riscv/vector.md (@pred_store<mode>): Ditto.
37104 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37106 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
37107 (vsetvl_discard_result_insn_p): New function.
37108 (reg_killed_by_bb_p): rename to find_reg_killed_by.
37109 (find_reg_killed_by): New name.
37110 (get_vl): allow it to be called by more functions.
37111 (has_vsetvl_killed_avl_p): Add condition.
37112 (get_avl): allow it to be called by more functions.
37113 (insn_should_be_added_p): New function.
37114 (get_all_nonphi_defs): Refine function.
37115 (get_all_sets): Ditto.
37116 (get_same_bb_set): New function.
37117 (any_insn_in_bb_p): Ditto.
37118 (any_set_in_bb_p): Ditto.
37119 (get_vl_vtype_info): Add VLMAX forward optimization.
37120 (source_equal_p): Fix issues.
37121 (extract_single_source): Refine.
37122 (avl_info::multiple_source_equal_p): New function.
37123 (avl_info::operator==): Adjust for final version.
37124 (vl_vtype_info::operator==): Ditto.
37125 (vl_vtype_info::same_avl_p): Ditto.
37126 (vector_insn_info::parse_insn): Ditto.
37127 (vector_insn_info::available_p): New function.
37128 (vector_insn_info::merge): Adjust for final version.
37129 (vector_insn_info::dump): Add hard_empty.
37130 (pass_vsetvl::hard_empty_block_p): New function.
37131 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
37132 (pass_vsetvl::forward_demand_fusion): Ditto.
37133 (pass_vsetvl::demand_fusion): Ditto.
37134 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
37135 (pass_vsetvl::compute_local_properties): Adjust for final version.
37136 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
37137 (pass_vsetvl::refine_vsetvls): Ditto.
37138 (pass_vsetvl::commit_vsetvls): Ditto.
37139 (pass_vsetvl::propagate_avl): New function.
37140 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
37141 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
37143 2023-01-27 Jakub Jelinek <jakub@redhat.com>
37146 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
37147 from size_t to int.
37149 2023-01-27 Jakub Jelinek <jakub@redhat.com>
37152 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
37153 redirection of calls to __builtin_trap in addition to redirection
37154 to __builtin_unreachable.
37156 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37158 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
37160 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37162 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
37163 (emit_vsetvl_insn): Ditto.
37165 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37167 * config/riscv/vector.md: Fix constraints.
37169 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37171 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
37173 2023-01-27 Patrick Palka <ppalka@redhat.com>
37174 Jakub Jelinek <jakub@redhat.com>
37176 * tree-core.h (tree_code_type, tree_code_length): For
37177 C++17 and later, add inline keyword, otherwise don't define
37178 the arrays, but declare extern arrays.
37179 * tree.cc (tree_code_type, tree_code_length): Define these
37180 arrays for C++14 and older.
37182 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37184 * config/riscv/riscv-vsetvl.h: Change it into public.
37186 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37188 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
37191 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37193 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
37195 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37197 * config/riscv/vector.md: Fix incorrect attributes.
37199 2023-01-27 Richard Biener <rguenther@suse.de>
37202 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
37203 Don't add crtfastmath.o for -shared.
37205 2023-01-27 Alexandre Oliva <oliva@gnu.org>
37207 * doc/options.texi (option, RejectNegative): Mention that
37208 -g-started options are also implicitly negatable.
37210 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
37212 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
37213 Use get_typenode_from_name to get fixed-width integer type
37215 * config/riscv/riscv-vector-builtins.def: Update define with
37216 fixed-width integer type nodes.
37218 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37220 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
37221 (real_insn_and_same_bb_p): New function.
37222 (same_bb_and_after_or_equal_p): Remove it.
37223 (before_p): New function.
37224 (reg_killed_by_bb_p): Ditto.
37225 (has_vsetvl_killed_avl_p): Ditto.
37226 (get_vl): Move location so that we can call it.
37227 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
37228 (available_occurrence_p): Ditto.
37229 (dominate_probability_p): Remove it.
37230 (can_backward_propagate_p): Remove it.
37231 (get_all_nonphi_defs): New function.
37232 (get_all_predecessors): Ditto.
37233 (any_insn_in_bb_p): Ditto.
37234 (insert_vsetvl): Adjust AVL REG.
37235 (source_equal_p): New function.
37236 (extract_single_source): Ditto.
37237 (avl_info::single_source_equal_p): Ditto.
37238 (avl_info::operator==): Adjust for AVL=REG.
37239 (vl_vtype_info::same_avl_p): Ditto.
37240 (vector_insn_info::set_demand_info): Remove it.
37241 (vector_insn_info::compatible_p): Adjust for AVL=REG.
37242 (vector_insn_info::compatible_avl_p): New function.
37243 (vector_insn_info::merge): Adjust AVL=REG.
37244 (vector_insn_info::dump): Ditto.
37245 (pass_vsetvl::merge_successors): Remove it.
37246 (enum fusion_type): New enum.
37247 (pass_vsetvl::get_backward_fusion_type): New function.
37248 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
37249 (pass_vsetvl::forward_demand_fusion): Ditto.
37250 (pass_vsetvl::demand_fusion): Ditto.
37251 (pass_vsetvl::prune_expressions): Ditto.
37252 (pass_vsetvl::compute_local_properties): Ditto.
37253 (pass_vsetvl::cleanup_vsetvls): Ditto.
37254 (pass_vsetvl::commit_vsetvls): Ditto.
37255 (pass_vsetvl::init): Ditto.
37256 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
37257 (enum merge_type): New enum.
37259 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37261 * config/riscv/riscv-vsetvl.cc
37262 (vector_infos_manager::vector_infos_manager): Add probability.
37263 (vector_infos_manager::dump): Ditto.
37264 (pass_vsetvl::compute_probabilities): Ditto.
37265 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
37267 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37269 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
37270 (vector_insn_info::merge): Ditto.
37271 (vector_insn_info::dump): Ditto.
37272 (pass_vsetvl::merge_successors): Ditto.
37273 (pass_vsetvl::backward_demand_fusion): Ditto.
37274 (pass_vsetvl::forward_demand_fusion): Ditto.
37275 (pass_vsetvl::commit_vsetvls): Ditto.
37276 * config/riscv/riscv-vsetvl.h: Ditto.
37278 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37280 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
37283 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37285 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
37287 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37289 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
37290 Add pre-check for redundant flow.
37292 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37294 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
37295 (vector_infos_manager::free_bitmap_vectors): Ditto.
37296 (pass_vsetvl::pre_vsetvl): Adjust codes.
37297 * config/riscv/riscv-vsetvl.h: New function declaration.
37299 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37301 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
37302 (vector_insn_info::set_demand_info): New function.
37303 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
37304 (pass_vsetvl::merge_successors): Ditto.
37305 (pass_vsetvl::compute_global_backward_infos): Ditto.
37306 (pass_vsetvl::backward_demand_fusion): Ditto.
37307 (pass_vsetvl::forward_demand_fusion): Ditto.
37308 (pass_vsetvl::demand_fusion): New function.
37309 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
37310 * config/riscv/riscv-vsetvl.h: New function declaration.
37312 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37314 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
37316 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37318 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
37319 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
37321 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37323 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
37324 (backward_propagate_worthwhile_p): Fix non-worthwhile.
37326 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37328 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
37330 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37332 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
37333 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
37334 (pass_vsetvl::commit_vsetvls): Ditto.
37335 * config/riscv/riscv-vsetvl.h: New function declaration.
37337 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37339 * config/riscv/vector.md:
37341 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37343 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
37344 pred_store for vse.
37345 * config/riscv/riscv-vector-builtins.cc
37346 (function_expander::add_mem_operand): Refine function.
37347 (function_expander::use_contiguous_load_insn): Adjust new
37349 (function_expander::use_contiguous_store_insn): Ditto.
37350 * config/riscv/riscv-vector-builtins.h: Refine function.
37351 * config/riscv/vector.md (@pred_store<mode>): New pattern.
37353 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37355 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
37357 2023-01-26 Marek Polacek <polacek@redhat.com>
37359 PR middle-end/108543
37360 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
37361 if it was previously set.
37363 2023-01-26 Jakub Jelinek <jakub@redhat.com>
37365 PR tree-optimization/108540
37366 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
37367 are singletons, use range_true even if op1 != op2
37368 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
37369 even if intersection of the ranges is empty and one has
37370 zero low bound and another zero high bound, use range_true_and_false
37371 rather than range_false.
37372 (foperator_not_equal::fold_range): If both op1 and op2
37373 are singletons, use range_false even if op1 != op2
37374 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
37375 even if intersection of the ranges is empty and one has
37376 zero low bound and another zero high bound, use range_true_and_false
37377 rather than range_true.
37379 2023-01-26 Jakub Jelinek <jakub@redhat.com>
37381 * value-relation.cc (kind_string): Add const.
37382 (rr_negate_table, rr_swap_table, rr_intersect_table,
37383 rr_union_table, rr_transitive_table): Add static const, change
37384 element type from relation_kind to unsigned char.
37385 (relation_negate, relation_swap, relation_intersect, relation_union,
37386 relation_transitive): Cast rr_*_table element to relation_kind.
37387 (relation_to_code): Add static const.
37388 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
37390 2023-01-26 Richard Biener <rguenther@suse.de>
37392 PR tree-optimization/108547
37393 * gimple-predicate-analysis.cc (value_sat_pred_p):
37396 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
37398 PR tree-optimization/108522
37399 * tree-object-size.cc (compute_object_offset): Make EXPR
37400 argument non-const. Call component_ref_field_offset.
37402 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37404 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
37405 FEATURE_STRING field.
37407 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
37409 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
37411 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
37415 * gcc.cc: Provide default specs for Modula-2 so that when the
37416 language is not built-in better diagnostics are emitted for
37417 attempts to use .mod or .m2i file extensions.
37419 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
37421 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
37423 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
37425 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
37427 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
37429 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
37432 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
37434 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
37436 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
37438 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
37440 2023-01-25 Richard Biener <rguenther@suse.de>
37442 PR tree-optimization/108523
37443 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
37444 backedge value for the result when using predication to
37447 2023-01-25 Richard Biener <rguenther@suse.de>
37449 * doc/lto.texi (Command line options): Reword and update reference
37450 to removed lto_read_all_file_options.
37452 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
37454 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
37457 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
37459 * doc/contrib.texi: Add Jose E. Marchesi.
37461 2023-01-25 Jakub Jelinek <jakub@redhat.com>
37463 PR tree-optimization/108498
37464 * gimple-ssa-store-merging.cc (class store_operand_info):
37465 End coment with full stop rather than comma.
37466 (split_group): Likewise.
37467 (merged_store_group::apply_stores): Clear string_concatenation if
37468 start or end aren't on a byte boundary.
37470 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
37471 Jakub Jelinek <jakub@redhat.com>
37473 PR tree-optimization/108522
37474 * tree-object-size.cc (compute_object_offset): Use
37475 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
37477 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37479 * config/xtensa/xtensa.md:
37480 Fix exit from loops detecting references before overwriting in the
37483 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
37485 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
37486 do elimination but only for hard register.
37487 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
37488 calls of get_hard_regno.
37490 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
37492 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
37495 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
37498 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
37499 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
37502 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37504 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
37505 and only include 'csky/t-csky-linux' when enable multilib.
37506 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
37507 define it when disable multilib.
37509 2023-01-24 Richard Biener <rguenther@suse.de>
37511 PR tree-optimization/108500
37512 * dominance.h (calculate_dominance_info): Add parameter
37513 to indicate fast-query compute, defaulted to true.
37514 * dominance.cc (calculate_dominance_info): Honor
37515 fast-query compute parameter.
37516 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
37517 not compute the dominator fast-query DFS numbers.
37519 2023-01-24 Eric Biggers <ebiggers@google.com>
37522 * optc-save-gen.awk: Fix copy-and-paste error.
37524 2023-01-24 Jakub Jelinek <jakub@redhat.com>
37527 * cgraphbuild.cc: Include gimplify.h.
37528 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
37529 their corresponding DECL_VALUE_EXPR expressions after unsharing.
37531 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37534 * config.gcc (tm_file): Move the variable out of loop.
37536 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
37537 Yang Yujie <yangyujie@loongson.cn>
37540 * config/loongarch/loongarch.cc (loongarch_classify_address):
37541 Add precessint for CONST_INT.
37542 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
37543 (loongarch_print_operand): Increase the processing of '%c'.
37544 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
37545 And port the public operand modifiers information to this document.
37547 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37549 * doc/invoke.texi (-mbranch-protection): Update documentation.
37551 2023-01-23 Richard Biener <rguenther@suse.de>
37554 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
37556 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
37557 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
37558 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
37559 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
37561 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37563 * config/arm/aout.h (ra_auth_code): Add entry in enum.
37564 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
37565 to dwarf frame expression.
37566 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
37567 (arm_expand_prologue): Update frame related information and reg notes
37568 for pac/pacbit insn.
37569 (arm_regno_class): Check for pac pseudo reigster.
37570 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
37571 (arm_init_machine_status): Set pacspval_needed to zero.
37572 (arm_debugger_regno): Check for PAC register.
37573 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
37575 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
37576 (arm_unwind_emit): Update REG_CFA_REGISTER case._
37577 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
37578 (DWARF_PAC_REGNUM): Define.
37579 (IS_PAC_REGNUM): Likewise.
37580 (enum reg_class): Add PAC_REG entry.
37581 (machine_function): Add pacbti_needed state to structure.
37582 * config/arm/arm.md (RA_AUTH_CODE): Define.
37584 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37586 * config.gcc ($tm_file): Update variable.
37587 * config/arm/arm-mlib.h: Create new header file.
37588 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
37589 multilib arch directory.
37590 (MULTILIB_REUSE): Add multilib reuse rules.
37591 (MULTILIB_MATCHES): Add multilib match rules.
37593 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37595 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
37596 * config/arm/arm-tables.opt: Regenerate.
37597 * config/arm/arm-tune.md: Likewise.
37598 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
37599 * (-mfix-cmse-cve-2021-35465): Likewise.
37601 2023-01-23 Richard Biener <rguenther@suse.de>
37603 PR tree-optimization/108482
37604 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
37605 .LOOP_DIST_ALIAS calls.
37607 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37609 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
37610 * config/arm/arm-protos.h: Update.
37611 * config/arm/aarch-common-protos.h: Declare
37612 'aarch_bti_arch_check'.
37613 * config/arm/arm.cc (aarch_bti_enabled) Update.
37614 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
37615 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
37616 * config/arm/arm.md (bti_nop): New insn.
37617 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
37618 (aarch-bti-insert.o): New target.
37619 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
37620 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
37622 (gate): Make use of 'aarch_bti_arch_check'.
37623 * config/arm/arm-passes.def: New file.
37624 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
37626 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37628 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
37629 'aarch-bti-insert.o'.
37630 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
37632 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
37633 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
37634 (aarch64_output_mi_thunk)
37635 (aarch64_print_patchable_function_entry)
37636 (aarch64_file_end_indicate_exec_stack): Update renamed function
37637 calls to renamed functions.
37638 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
37639 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
37641 * config/aarch64/aarch64-bti-insert.cc: Delete.
37642 * config/arm/aarch-bti-insert.cc: New file including and
37643 generalizing code from aarch64-bti-insert.cc.
37644 * config/arm/aarch-common-protos.h: Update.
37646 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37648 * config/arm/arm.h (arm_arch8m_main): Declare it.
37649 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
37651 * config/arm/arm.cc (arm_arch8m_main): Define it.
37652 (arm_option_reconfigure_globals): Set arm_arch8m_main.
37653 (arm_compute_frame_layout, arm_expand_prologue)
37654 (thumb2_expand_return, arm_expand_epilogue)
37655 (arm_conditional_register_usage): Update for pac codegen.
37656 (arm_current_function_pac_enabled_p): New function.
37657 (aarch_bti_enabled) New function.
37658 (use_return_insn): Return zero when pac is enabled.
37659 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
37661 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
37662 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
37664 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37666 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
37667 mbranch-protection.
37669 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37670 Tejas Belagod <tbelagod@arm.com>
37672 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
37673 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
37675 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37676 Tejas Belagod <tbelagod@arm.com>
37677 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37679 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
37680 new pseudo register class _UVRSC_PAC.
37682 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37683 Tejas Belagod <tbelagod@arm.com>
37685 * config/arm/arm-c.cc (arm_cpu_builtins): Define
37686 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
37687 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
37689 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37690 Tejas Belagod <tbelagod@arm.com>
37692 * doc/sourcebuild.texi: Document arm_pacbti_hw.
37694 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37695 Tejas Belagod <tbelagod@arm.com>
37696 Richard Earnshaw <Richard.Earnshaw@arm.com>
37698 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
37699 -mbranch-protection option and initialize appropriate data structures.
37700 * config/arm/arm.opt (-mbranch-protection): New option.
37701 * doc/invoke.texi (Arm Options): Document it.
37703 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37704 Tejas Belagod <tbelagod@arm.com>
37706 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
37707 * config/arm/arm-cpus.in (pacbti): New feature.
37708 * doc/invoke.texi (Arm Options): Document it.
37710 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37711 Tejas Belagod <tbelagod@arm.com>
37713 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
37714 (all_architectures): Fix comment.
37715 (aarch64_parse_extension): Rename return type, enum value names.
37716 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
37717 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
37718 Also rename corresponding enum values.
37719 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
37720 out aarch64_function_type and move it to common code as
37721 aarch_function_type in aarch-common.h.
37722 * config/aarch64/aarch64-protos.h: Include common types header,
37723 move out types aarch64_parse_opt_result and aarch64_key_type to
37725 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
37726 and functions out into aarch-common.h and aarch-common.cc. Fix up
37727 all the name changes resulting from the move.
37728 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
37730 * config/aarch64/aarch64.opt: Include aarch-common.h to import
37731 type move. Fix up name changes from factoring out common code and
37733 * config/arm/aarch-common-protos.h: Export factored out routines to both
37735 * config/arm/aarch-common.cc: Include newly factored out types.
37736 Move all mbranch-protection code and data structures from
37738 * config/arm/aarch-common.h: New header that declares types shared
37739 between aarch32 and aarch64 backends.
37740 * config/arm/arm-protos.h: Declare types and variables that are
37741 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
37742 aarch_ra_sign_scope and aarch_enable_bti.
37743 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
37744 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
37745 * config/arm/arm.cc: Add missing includes.
37747 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
37749 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
37751 2023-01-23 Richard Biener <rguenther@suse.de>
37753 PR tree-optimization/108449
37754 * cgraphunit.cc (check_global_declaration): Do not turn
37755 undefined statics into externs.
37757 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
37759 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
37760 and HI input modes.
37761 * config/pru/pru.md (clz): Fix generated code for QI and HI
37764 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
37766 * config/v850/v850.cc (v850_select_section): Put const volatile
37767 objects into read-only sections.
37769 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
37771 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
37772 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
37773 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
37775 2023-01-20 Jakub Jelinek <jakub@redhat.com>
37777 PR tree-optimization/108457
37778 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
37779 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
37780 argument instead of a temporary. Formatting fixes.
37782 2023-01-19 Jakub Jelinek <jakub@redhat.com>
37784 PR tree-optimization/108447
37785 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
37786 (relation_tests): Add self-tests for relation_{intersect,union}
37788 * selftest.h (relation_tests): Declare.
37789 * function-tests.cc (test_ranges): Call it.
37791 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
37794 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
37795 invalid third argument to __builtin_ia32_prefetch.
37797 2023-01-19 Jakub Jelinek <jakub@redhat.com>
37799 PR middle-end/108459
37800 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
37801 than fold_unary for NEGATE_EXPR.
37803 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
37806 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
37807 comment. Move assert about alignment a bit later.
37809 2023-01-19 Jakub Jelinek <jakub@redhat.com>
37811 PR tree-optimization/108440
37812 * tree-ssa-forwprop.cc: Include gimple-range.h.
37813 (simplify_rotate): For the forms with T2 wider than T and shift counts of
37814 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
37815 to B. For the forms with T2 wider than T and shift counts of
37816 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
37817 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
37818 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
37819 pass specific ranger instead of get_global_range_query.
37820 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
37823 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
37825 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
37826 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
37828 (aarch64_simd_vec_copy_lane<mode>): Likewise.
37829 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
37831 2023-01-19 Alexandre Oliva <oliva@adacore.com>
37834 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
37835 within debug insns.
37837 2023-01-18 Martin Jambor <mjambor@suse.cz>
37840 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
37841 lcone_of chain also do not need the body.
37843 2023-01-18 Richard Biener <rguenther@suse.de>
37846 2022-12-16 Richard Biener <rguenther@suse.de>
37848 PR middle-end/108086
37849 * tree-inline.cc (remap_ssa_name): Do not unshare the
37850 result from the decl_map.
37852 2023-01-18 Murray Steele <murray.steele@arm.com>
37855 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
37857 (__arm_vst1q_p_s8): Likewise.
37858 (__arm_vld1q_z_u8): Likewise.
37859 (__arm_vld1q_z_s8): Likewise.
37860 (__arm_vst1q_p_u16): Likewise.
37861 (__arm_vst1q_p_s16): Likewise.
37862 (__arm_vld1q_z_u16): Likewise.
37863 (__arm_vld1q_z_s16): Likewise.
37864 (__arm_vst1q_p_u32): Likewise.
37865 (__arm_vst1q_p_s32): Likewise.
37866 (__arm_vld1q_z_u32): Likewise.
37867 (__arm_vld1q_z_s32): Likewise.
37868 (__arm_vld1q_z_f16): Likewise.
37869 (__arm_vst1q_p_f16): Likewise.
37870 (__arm_vld1q_z_f32): Likewise.
37871 (__arm_vst1q_p_f32): Likewise.
37873 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37875 * config/xtensa/xtensa.md (xorsi3_internal):
37876 Rename from the original of "xorsi3".
37877 (xorsi3): New expansion pattern that emits addition rather than
37878 bitwise-XOR when the second source is a constant of -2147483648
37881 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
37882 Andrew Pinski <apinski@marvell.com>
37885 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
37886 vec_vsubcuqP with vec_vsubcuq.
37888 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
37891 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
37892 support for invalid uses of MMA opaque type in function arguments.
37894 2023-01-18 liuhongt <hongtao.liu@intel.com>
37897 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
37898 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
37899 -share or -mno-daz-ftz is specified.
37900 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
37901 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
37903 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
37905 * config/bpf/bpf.cc (bpf_option_override): Disable
37908 2023-01-17 Jakub Jelinek <jakub@redhat.com>
37910 PR tree-optimization/106523
37911 * tree-ssa-forwprop.cc (simplify_rotate): For the
37912 patterns with (-Y) & (B - 1) in one operand's shift
37913 count and Y in another, if T2 has wider precision than T,
37914 punt if Y could have a value in [B, B2 - 1] range.
37916 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
37919 * config/i386/i386.cc (x86_output_mi_thunk): Disable
37920 -mforce-indirect-call for PIC in 32-bit mode.
37922 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
37925 * ipa-modref.cc (modref_access_analysis::analyze): Use
37926 find_always_executed_bbs.
37927 * ipa-sra.cc (process_scan_results): Likewise.
37928 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
37929 (find_always_executed_bbs): New function.
37930 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
37931 (find_always_executed_bbs): Declare.
37933 2023-01-16 Jan Hubicka <jh@suse.cz>
37935 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
37936 by TARGET_USE_SCATTER.
37937 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
37938 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
37939 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
37940 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
37941 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
37942 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
37944 2023-01-16 Richard Biener <rguenther@suse.de>
37947 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
37949 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
37953 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
37954 (__ARM_mve_coerce3): Likewise.
37956 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37958 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
37960 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37962 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
37963 (number_of_iterations_bitcount): Add call to the above.
37964 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
37965 c[lt]z idiom recognition.
37967 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37969 * doc/sourcebuild.texi: Add missing target attributes.
37971 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37973 PR tree-optimization/94793
37974 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
37976 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
37977 (number_of_iterations_cltz_complement): New.
37978 (number_of_iterations_bitcount): Add call to the above.
37980 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
37982 * doc/extend.texi (Common Function Attributes): Fix grammar.
37984 2023-01-16 Jakub Jelinek <jakub@redhat.com>
37987 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
37988 * config/riscv/riscv-vsetvl.cc: Likewise.
37990 2023-01-16 Jakub Jelinek <jakub@redhat.com>
37993 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
37994 disable -Winit-self using pragma GCC diagnostic ignored.
37995 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
37997 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
37998 _mm256_undefined_si256): Likewise.
37999 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
38000 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
38001 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
38002 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
38004 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
38007 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
38008 support for invalid uses in inline asm, factor out the checking and
38009 erroring to lambda function check_and_error_invalid_use.
38011 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
38013 PR tree-optimization/107608
38014 * range-op-float.cc (range_operator_float::fold_range): Avoid
38015 folding into INF when flag_trapping_math.
38016 * value-range.h (frange::known_isinf): Return false for possible NANs.
38018 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
38020 * config.gcc (csky-*-*): Support --with-float=softfp.
38022 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38024 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
38025 Rename to xtensa_adjust_reg_alloc_order.
38026 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
38027 Ditto. And also remove code to reorder register numbers for
38028 leaf functions, rename the tables, and adjust the allocation
38029 order for the call0 ABI to use register A0 more.
38030 (xtensa_leaf_regs): Remove.
38031 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
38032 (order_regs_for_local_alloc): Rename as the above.
38033 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
38035 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
38037 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
38038 Change to define_insn_and_split to fold ldr+dup to ld1rq.
38039 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
38041 2023-01-14 Alexandre Oliva <oliva@adacore.com>
38043 * hash-table.h (is_deleted): Precheck !is_empty.
38044 (mark_deleted): Postcheck !is_empty.
38045 (copy constructor): Test is_empty before is_deleted.
38047 2023-01-14 Alexandre Oliva <oliva@adacore.com>
38050 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
38053 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
38055 PR rtl-optimization/108274
38056 * function.cc (thread_prologue_and_epilogue_insns): Also update the
38057 DF information for calls in a few more cases.
38059 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
38061 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
38062 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
38064 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
38065 (MAX_SYNC_LIBFUNC_SIZE): Define.
38066 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
38068 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
38069 libcall when sync libcalls are disabled.
38070 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
38071 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
38072 are disabled on 32-bit target.
38073 * config/pa/pa.opt (matomic-libcalls): New option.
38074 * doc/invoke.texi (HPPA Options): Update.
38076 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
38078 PR rtl-optimization/108117
38079 PR rtl-optimization/108132
38080 * sched-deps.cc (deps_analyze_insn): Do not schedule across
38081 calls before reload.
38083 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38085 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
38086 options for -mlibarch.
38087 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
38088 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
38090 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
38092 * attribs.cc (strict_flex_array_level_of): Move this function to ...
38093 * attribs.h (strict_flex_array_level_of): Remove the declaration.
38094 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
38095 replace the referece to strict_flex_array_level_of with
38096 DECL_NOT_FLEXARRAY.
38097 * tree.cc (component_ref_size): Likewise.
38099 2023-01-13 Richard Biener <rguenther@suse.de>
38102 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
38103 crtfastmath.o for -shared.
38104 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
38106 2023-01-13 Richard Biener <rguenther@suse.de>
38109 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
38110 crtfastmath.o for -shared.
38111 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
38113 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
38116 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
38118 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
38120 (TARGET_DWARF_FRAME_REG_MODE): Define.
38122 2023-01-13 Richard Biener <rguenther@suse.de>
38125 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
38126 update EH info on the fly.
38128 2023-01-13 Richard Biener <rguenther@suse.de>
38130 PR tree-optimization/108387
38131 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
38132 value before inserting expression into the tables.
38134 2023-01-12 Andrew Pinski <apinski@marvell.com>
38135 Roger Sayle <roger@nextmovesoftware.com>
38137 PR tree-optimization/92342
38138 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
38139 Use tcc_comparison and :c for the multiply.
38140 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
38142 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
38143 Richard Sandiford <richard.sandiford@arm.com>
38146 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
38147 Check DECL_PACKED for bitfield.
38148 (aarch64_layout_arg): Warn when parameter passing ABI changes.
38149 (aarch64_function_arg_boundary): Do not warn here.
38150 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
38153 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
38154 Richard Sandiford <richard.sandiford@arm.com>
38156 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
38158 (aarch64_layout_arg): Factorize warning conditions.
38159 (aarch64_function_arg_boundary): Fix typo.
38160 * function.cc (currently_expanding_function_start): New variable.
38161 (expand_function_start): Handle
38162 currently_expanding_function_start.
38163 * function.h (currently_expanding_function_start): Declare.
38165 2023-01-12 Richard Biener <rguenther@suse.de>
38167 PR tree-optimization/99412
38168 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
38169 (swap_ops_for_binary_stmt): Remove reduction handling.
38170 (rewrite_expr_tree_parallel): Adjust.
38171 (reassociate_bb): Likewise.
38172 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
38174 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38176 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
38177 Rearrange the emitting codes.
38179 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38181 * config/xtensa/xtensa.md (*btrue):
38182 Correct value of the attribute "length" that depends on
38183 TARGET_DENSITY and operands, and add '?' character to the register
38184 constraint of the compared operand.
38186 2023-01-12 Alexandre Oliva <oliva@adacore.com>
38188 * hash-table.h (expand): Check elements and deleted counts.
38189 (verify): Likewise.
38191 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
38193 PR tree-optimization/71343
38194 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
38195 the value number of the expression X << C the same as the value
38196 number for the multiplication X * (1<<C).
38198 2023-01-11 David Faust <david.faust@oracle.com>
38201 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
38202 floating point modes.
38204 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
38206 PR tree-optimization/108199
38207 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
38208 for bit-field references.
38210 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
38212 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
38213 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
38214 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
38215 OPTION_MASK_P10_FUSION.
38217 2023-01-11 Richard Biener <rguenther@suse.de>
38219 PR tree-optimization/107767
38220 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
38221 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
38222 * tree-switch-conversion.cc (switch_conversion::collect):
38223 Count unique non-default targets accounting for later
38224 merging opportunities.
38226 2023-01-11 Martin Liska <mliska@suse.cz>
38228 PR middle-end/107976
38229 * params.opt: Limit JT params.
38230 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
38232 2023-01-11 Richard Biener <rguenther@suse.de>
38234 PR tree-optimization/108352
38235 * tree-ssa-threadbackward.cc
38236 (back_threader_profitability::profitable_path_p): Adjust
38237 heuristic that allows non-multi-way branch threads creating
38239 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
38240 (--param fsm-scale-path-stmts): Adjust.
38241 * params.opt (--param=fsm-scale-path-blocks=): Remove.
38242 (-param=fsm-scale-path-stmts=): Adjust description.
38244 2023-01-11 Richard Biener <rguenther@suse.de>
38246 PR tree-optimization/108353
38247 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
38249 (add_ssa_edge): Simplify.
38250 (add_control_edge): Likewise.
38251 (ssa_prop_init): Likewise.
38252 (ssa_prop_fini): Likewise.
38253 (ssa_propagation_engine::ssa_propagate): Likewise.
38255 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
38257 * config/s390/s390.md (*not<mode>): New pattern.
38259 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38261 * config/xtensa/xtensa.cc (xtensa_insn_cost):
38262 Let insn cost for size be obtained by applying COSTS_N_INSNS()
38263 to instruction length and then dividing by 3.
38265 2023-01-10 Richard Biener <rguenther@suse.de>
38267 PR tree-optimization/106293
38268 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
38269 process degenerate PHI defs.
38271 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
38273 PR rtl-optimization/106421
38274 * cprop.cc (bypass_block): Check that DEST is local to this
38275 function (non-NULL) before calling find_edge.
38277 2023-01-10 Martin Jambor <mjambor@suse.cz>
38280 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
38281 sort_replacements, lookup_first_base_replacement and
38282 m_sorted_replacements_p.
38283 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
38284 (ipa_param_body_adjustments::register_replacement): Set
38285 m_sorted_replacements_p to false.
38286 (compare_param_body_replacement): New function.
38287 (ipa_param_body_adjustments::sort_replacements): Likewise.
38288 (ipa_param_body_adjustments::common_initialization): Call
38290 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
38291 m_sorted_replacements_p.
38292 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
38294 (ipa_param_body_adjustments::lookup_first_base_replacement): New
38296 (ipa_param_body_adjustments::modify_call_stmt): Use
38297 lookup_first_base_replacement.
38298 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
38299 adjustments->sort_replacements.
38301 2023-01-10 Richard Biener <rguenther@suse.de>
38303 PR tree-optimization/108314
38304 * tree-vect-stmts.cc (vectorizable_condition): Do not
38305 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
38307 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
38309 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
38311 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
38313 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
38315 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
38317 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
38318 defines for soft float abi.
38320 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
38322 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
38323 (smart_bclri): Likewise.
38324 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
38325 (fast_bclri): Likewise.
38326 (fast_cmpnesi_i): Likewise.
38327 (*fast_cmpltsi_i): Likewise.
38328 (*fast_cmpgeusi_i): Likewise.
38330 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
38332 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
38333 flag_fp_int_builtin_inexact || !flag_trapping_math.
38334 (<frm_pattern><mode>2): Likewise.
38336 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
38338 * config/s390/s390.cc (s390_register_info): Check call_used_regs
38339 instead of hard-coding the register numbers for call saved
38341 (s390_optimize_register_info): Likewise.
38343 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
38345 * doc/gm2.texi (Overview): Fix @node markers.
38346 (Using): Likewise. Remove subsections that were moved to Overview
38347 from the menu and move others around.
38349 2023-01-09 Richard Biener <rguenther@suse.de>
38351 PR middle-end/108209
38352 * genmatch.cc (commutative_op): Fix return value for
38353 user-id with non-commutative first replacement.
38355 2023-01-09 Jakub Jelinek <jakub@redhat.com>
38358 * calls.cc (expand_call): For calls with
38359 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
38362 2023-01-09 Richard Biener <rguenther@suse.de>
38364 PR middle-end/69482
38365 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
38366 qualified accesses also force objects to memory.
38368 2023-01-09 Martin Liska <mliska@suse.cz>
38371 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
38372 NULL (deleleted value) to a hash_set.
38374 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38376 * config/xtensa/xtensa.md (*splice_bits):
38377 New insn_and_split pattern.
38379 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38381 * config/xtensa/xtensa.cc
38382 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
38383 New helper functions.
38384 (xtensa_set_return_address, xtensa_output_mi_thunk):
38385 Change to use the helper function.
38386 (xtensa_emit_adjust_stack_ptr): Ditto.
38387 And also change to try reusing the content of scratch register
38388 A9 if the register is not modified in the function body.
38390 2023-01-07 LIU Hao <lh_mouse@126.com>
38392 PR middle-end/108300
38393 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
38394 before <windows.h>.
38395 * diagnostic-color.cc: Likewise.
38396 * plugin.cc: Likewise.
38397 * prefix.cc: Likewise.
38399 2023-01-06 Joseph Myers <joseph@codesourcery.com>
38401 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
38402 for handling real integer types.
38404 2023-01-06 Tamar Christina <tamar.christina@arm.com>
38407 2022-12-12 Tamar Christina <tamar.christina@arm.com>
38409 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
38410 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
38411 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
38412 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
38413 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
38414 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
38415 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
38416 (aarch64_simd_dupv2hf): New.
38417 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
38419 * config/aarch64/iterators.md (VHSDF_P): New.
38420 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
38421 Vel, q, vp): Add V2HF.
38422 * config/arm/types.md (neon_fp_reduc_add_h): New.
38424 2023-01-06 Martin Liska <mliska@suse.cz>
38426 PR middle-end/107966
38427 * doc/options.texi: Fix Var documentation in internal manual.
38429 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
38432 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
38434 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
38435 RTL expansion to allow condition (mask) to be shared/reused,
38436 by avoiding overwriting pseudos and adding REG_EQUAL notes.
38438 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
38440 * common.opt: Add -static-libgm2.
38441 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
38442 * doc/gm2.texi: Document static-libgm2.
38443 * gcc.cc (driver_handle_option): Allow static-libgm2.
38445 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
38447 * common/config/i386/i386-common.cc (processor_alias_table):
38448 Use CPU_ZNVER4 for znver4.
38449 * config/i386/i386.md: Add znver4.md.
38450 * config/i386/znver4.md: New.
38452 2023-01-04 Jakub Jelinek <jakub@redhat.com>
38454 PR tree-optimization/108253
38455 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
38458 2023-01-04 Jakub Jelinek <jakub@redhat.com>
38460 PR middle-end/108237
38461 * generic-match-head.cc: Include tree-pass.h.
38462 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
38463 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
38464 resp. PROP_gimple_lvec property set.
38466 2023-01-04 Jakub Jelinek <jakub@redhat.com>
38468 PR sanitizer/108256
38469 * convert.cc (do_narrow): Punt for MULT_EXPR if original
38470 type doesn't wrap around and -fsanitize=signed-integer-overflow
38472 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
38474 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
38476 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
38477 * common/config/i386/i386-common.cc: Add Emeraldrapids.
38479 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
38481 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
38484 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
38486 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
38487 default constructor to initialize it.
38488 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
38489 for last and iterate to handle recursive calls. Delete leftover
38490 candidates at the end.
38491 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
38493 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
38494 gc_candidate bit when a clone is used.
38496 2023-01-03 Florian Weimer <fweimer@redhat.com>
38499 2023-01-02 Florian Weimer <fweimer@redhat.com>
38501 * dwarf2cfi.cc (init_return_column_size): Remove.
38502 (init_one_dwarf_reg_size): Adjust.
38503 (generate_dwarf_reg_sizes): New function. Extracted
38504 from expand_builtin_init_dwarf_reg_sizes.
38505 (expand_builtin_init_dwarf_reg_sizes): Call
38506 generate_dwarf_reg_sizes.
38507 * target.def (init_dwarf_reg_sizes_extra): Adjust
38509 * config/msp430/msp430.cc
38510 (msp430_init_dwarf_reg_sizes_extra): Adjust.
38511 * config/rs6000/rs6000.cc
38512 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
38513 * doc/tm.texi: Update.
38515 2023-01-03 Florian Weimer <fweimer@redhat.com>
38518 2023-01-02 Florian Weimer <fweimer@redhat.com>
38520 * debug.h (dwarf_reg_sizes_constant): Declare.
38521 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
38523 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
38525 PR tree-optimization/105043
38526 * doc/extend.texi (Object Size Checking): Split out into two
38527 subsections and mention _FORTIFY_SOURCE.
38529 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
38531 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
38532 RTL expansion to allow condition (mask) to be shared/reused,
38533 by avoiding overwriting pseudos and adding REG_EQUAL notes.
38535 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
38538 * config/i386/i386-features.cc
38539 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
38540 the gain/cost of converting a MEM operand.
38542 2023-01-03 Jakub Jelinek <jakub@redhat.com>
38544 PR middle-end/108264
38545 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
38546 from source which doesn't have scalar integral mode first convert
38549 2023-01-03 Jakub Jelinek <jakub@redhat.com>
38551 PR rtl-optimization/108263
38552 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
38555 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
38558 * config/i386/lujiazui.md (lujiazui_div): New automaton.
38559 (lua_div): New unit.
38560 (lua_idiv_qi): Correct unit in the reservation.
38561 (lua_idiv_qi_load): Ditto.
38562 (lua_idiv_hi): Ditto.
38563 (lua_idiv_hi_load): Ditto.
38564 (lua_idiv_si): Ditto.
38565 (lua_idiv_si_load): Ditto.
38566 (lua_idiv_di): Ditto.
38567 (lua_idiv_di_load): Ditto.
38568 (lua_fdiv_SF): Ditto.
38569 (lua_fdiv_SF_load): Ditto.
38570 (lua_fdiv_DF): Ditto.
38571 (lua_fdiv_DF_load): Ditto.
38572 (lua_fdiv_XF): Ditto.
38573 (lua_fdiv_XF_load): Ditto.
38574 (lua_ssediv_SF): Ditto.
38575 (lua_ssediv_load_SF): Ditto.
38576 (lua_ssediv_V4SF): Ditto.
38577 (lua_ssediv_load_V4SF): Ditto.
38578 (lua_ssediv_V8SF): Ditto.
38579 (lua_ssediv_load_V8SF): Ditto.
38580 (lua_ssediv_SD): Ditto.
38581 (lua_ssediv_load_SD): Ditto.
38582 (lua_ssediv_V2DF): Ditto.
38583 (lua_ssediv_load_V2DF): Ditto.
38584 (lua_ssediv_V4DF): Ditto.
38585 (lua_ssediv_load_V4DF): Ditto.
38587 2023-01-02 Florian Weimer <fweimer@redhat.com>
38589 * debug.h (dwarf_reg_sizes_constant): Declare.
38590 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
38592 2023-01-02 Florian Weimer <fweimer@redhat.com>
38594 * dwarf2cfi.cc (init_return_column_size): Remove.
38595 (init_one_dwarf_reg_size): Adjust.
38596 (generate_dwarf_reg_sizes): New function. Extracted
38597 from expand_builtin_init_dwarf_reg_sizes.
38598 (expand_builtin_init_dwarf_reg_sizes): Call
38599 generate_dwarf_reg_sizes.
38600 * target.def (init_dwarf_reg_sizes_extra): Adjust
38602 * config/msp430/msp430.cc
38603 (msp430_init_dwarf_reg_sizes_extra): Adjust.
38604 * config/rs6000/rs6000.cc
38605 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
38606 * doc/tm.texi: Update.
38608 2023-01-02 Jakub Jelinek <jakub@redhat.com>
38610 * gcc.cc (process_command): Update copyright notice dates.
38611 * gcov-dump.cc (print_version): Ditto.
38612 * gcov.cc (print_version): Ditto.
38613 * gcov-tool.cc (print_version): Ditto.
38614 * gengtype.cc (create_file): Ditto.
38615 * doc/cpp.texi: Bump @copying's copyright year.
38616 * doc/cppinternals.texi: Ditto.
38617 * doc/gcc.texi: Ditto.
38618 * doc/gccint.texi: Ditto.
38619 * doc/gcov.texi: Ditto.
38620 * doc/install.texi: Ditto.
38621 * doc/invoke.texi: Ditto.
38623 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
38624 Uroš Bizjak <ubizjak@gmail.com>
38626 * config/i386/i386.md (extendditi2): New define_insn.
38627 (define_split): Use DWIH mode iterator to treat new extendditi2
38628 identically to existing extendsidi2_1.
38629 (define_peephole2): Likewise.
38630 (define_peephole2): Likewise.
38631 (define_Split): Likewise.
38634 Copyright (C) 2023 Free Software Foundation, Inc.
38636 Copying and distribution of this file, with or without modification,
38637 are permitted in any medium without royalty provided the copyright
38638 notice and this notice are preserved.