1 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
4 * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
5 (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
6 (*subqi_ext<mode>_2_slp): Ditto.
7 (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
9 2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
11 * common/config/riscv/riscv-common.cc
12 (riscv_subset_list::parse_std_ext): Emit an error and skip to
13 the next extension when a non-canonical ordering is detected.
15 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
17 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
18 Revert using the macro CAN_HAVE_LOCATION_P.
20 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
24 local vsetvl info before LCM suggested one.
25 Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
26 Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
28 2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
30 * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
31 * (riscv_extend_comparands): Call New function on operands.
33 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
35 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
36 Add "&& " before "reload_completed" in split condition.
37 (*subqi_ext<mode>_1_slp): Ditto.
38 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
40 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
43 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
44 Correct operand numbers in split pattern. Replace !Q constraint
45 of operand 1 with !qm. Add insn constrain.
46 (*subqi_ext<mode>_1_slp): Ditto.
47 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
49 2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
51 * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
52 copy'n'paste-o in '__builtin_nvptx_brev' description.
54 2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
55 Thomas Schwinge <thomas@codesourcery.com>
57 * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
58 (bitrev<mode>2): Represent using bitreverse.
60 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
61 Andrew Jenner <andrew@codesourcery.com>
63 * config/gcn/constraints.md: Add "a" AVGPR constraint.
64 * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
65 (*mov<mode>_4reg): Likewise.
66 (@mov<mode>_sgprbase): Likewise.
67 (gather<mode>_insn_1offset<exec>): Likewise.
68 (gather<mode>_insn_1offset_ds<exec>): Likewise.
69 (gather<mode>_insn_2offsets<exec>): Likewise.
70 (scatter<mode>_expr<exec_scatter>): Likewise.
71 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
72 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
73 * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
74 (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
75 (gcn_hard_regno_mode_ok): Likewise.
76 (gcn_regno_reg_class): Likewise.
77 (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
78 (gcn_sgpr_move_p): Handle AVGPRs.
79 (gcn_secondary_reload): Reload AVGPRs via VGPRs.
80 (gcn_conditional_register_usage): Handle AVGPRs.
81 (gcn_vgpr_equivalent_register_operand): New function.
82 (gcn_valid_move_p): Check for validity of AVGPR moves.
83 (gcn_compute_frame_offsets): Handle AVGPRs.
84 (gcn_memory_move_cost): Likewise.
85 (gcn_register_move_cost): Likewise.
86 (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
87 (gcn_md_reorg): Handle AVGPRs.
88 (gcn_hsa_declare_function_name): Likewise.
89 (print_reg): Likewise.
90 (gcn_dwarf_register_number): Likewise.
91 * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
92 (AVGPR_REGNO): Define.
93 (LAST_AVGPR_REG): Define.
94 (SOFT_ARG_REG): Update.
95 (FRAME_POINTER_REGNUM): Update.
96 (DWARF_LINK_REGISTER): Update.
97 (FIRST_PSEUDO_REGISTER): Update.
98 (AVGPR_REGNO_P): Define.
99 (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
100 (REG_CLASS_CONTENTS): Add new register classes and add entries for
101 AVGPRs to all classes.
102 (REGISTER_NAMES): Add AVGPRs.
103 * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
104 (AP_REGNUM, FP_REGNUM): Update.
105 (define_attr "type"): Add vop3p_mai.
106 (define_attr "unit"): Handle vop3p_mai.
107 (define_attr "gcn_version"): Add "cdna2".
108 (define_attr "enabled"): Handle cdna2.
109 (*mov<mode>_insn): Add AVGPR alternatives.
110 (*movti_insn): Likewise.
111 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
112 (process_asm): Process avgpr_count.
113 * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
114 (gcn_avgpr_hard_register_operand): New.
115 * doc/md.texi: Document the "a" constraint.
117 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
119 * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
120 (reload_in<mode>): Delete.
121 (reload_out<mode>): Delete.
122 * config/gcn/gcn.cc (CODE_FOR): Delete.
123 (get_code_for_##PREFIX##vN##SUFFIX): Delete.
124 (CODE_FOR_OP): Delete.
125 (get_code_for_##PREFIX): Delete.
126 (gcn_secondary_reload): Replace "get_code_for" with "code_for".
128 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
130 * config/s390/t-s390: Generate s390-gen-builtins.h without
133 2023-11-15 Richard Biener <rguenther@suse.de>
135 PR tree-optimization/112282
136 * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
139 2023-11-15 Richard Biener <rguenther@suse.de>
141 * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
142 we skipped an instance due to -fdbg-cnt.
144 2023-11-15 Xi Ruoyao <xry111@xry111.site>
146 * config/loongarch/loongarch.cc
147 (loongarch_memmodel_needs_release_fence): Remove.
148 (loongarch_cas_failure_memorder_needs_acquire): New static
150 (loongarch_print_operand): Redefine 'G' for the barrier on CAS
152 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
153 Remove the redundant barrier before the LL instruction, and
154 emit an acquire barrier on failure if needed by
156 (atomic_cas_value_cmp_and_7_<mode>): Likewise.
157 (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
158 before the LL instruction.
159 (atomic_cas_value_sub_7_<mode>): Likewise.
160 (atomic_cas_value_and_7_<mode>): Likewise.
161 (atomic_cas_value_xor_7_<mode>): Likewise.
162 (atomic_cas_value_or_7_<mode>): Likewise.
163 (atomic_cas_value_nand_7_<mode>): Likewise.
164 (atomic_cas_value_exchange_7_<mode>): Likewise.
166 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
168 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
169 (expand_vec_init): Add trailing optimization.
171 2023-11-15 Pan Li <pan2.li@intel.com>
173 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
174 Add inner_mode mask arg for mask int mode.
175 (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
176 to get the good enough vector int mode on precision.
177 (expand_vector_init_merge_repeating_sequence): Pass required args
180 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
183 * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
185 2023-11-15 David Malcolm <dmalcolm@redhat.com>
187 * json.cc (selftest::assert_print_eq): Add "loc" param and use
189 (ASSERT_PRINT_EQ): New macro.
190 (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
191 source location of assertion.
192 (selftest::test_writing_arrays): Likewise.
193 (selftest::test_writing_float_numbers): Likewise.
194 (selftest::test_writing_integer_numbers): Likewise.
195 (selftest::test_writing_strings): Likewise.
196 (selftest::test_writing_literals): Likewise.
198 2023-11-14 David Malcolm <dmalcolm@redhat.com>
201 * doc/invoke.texi (Static Analyzer Options): Add the six
202 -Wanalyzer-tainted-* warnings. Update documentation of each
203 warning to reflect removed requirement to use
204 -fanalyzer-checker=taint. Remove discussion of
205 -fanalyzer-checker=taint.
207 2023-11-14 David Malcolm <dmalcolm@redhat.com>
209 * diagnostic-format-json.cc
210 (json_output_format::on_end_diagnostic): Update calls to m_context
211 callbacks to use member functions; tighten up scopes.
212 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
214 (sarif_builder::make_reporting_descriptor_object_for_warning):
216 * diagnostic.cc (diagnostic_context::initialize): Update for
217 callbacks being moved into m_option_callbacks and being renamed.
218 (diagnostic_context::set_option_hooks): New.
219 (diagnostic_option_classifier::classify_diagnostic): Update call
220 to global_dc->m_option_enabled to use option_enabled_p.
221 (diagnostic_context::print_option_information): Update calls to
222 m_context callbacks to use member functions; tighten up scopes.
223 (diagnostic_context::diagnostic_enabled): Likewise.
224 * diagnostic.h (diagnostic_option_enabled_cb): New typedef.
225 (diagnostic_make_option_name_cb): New typedef.
226 (diagnostic_make_option_url_cb): New typedef.
227 (diagnostic_context::option_enabled_p): New.
228 (diagnostic_context::make_option_name): New.
229 (diagnostic_context::make_option_url): New.
230 (diagnostic_context::set_option_hooks): New decl.
231 (diagnostic_context::m_option_enabled): Rename to
232 m_option_enabled_cb and move within m_option_callbacks, using
234 (diagnostic_context::m_option_state): Move within
236 (diagnostic_context::m_option_name): Rename to
237 m_make_option_name_cb and move within m_option_callbacks, using
239 (diagnostic_context::m_get_option_url): Likewise, renaming to
240 m_make_option_url_cb.
241 * lto-wrapper.cc (print_lto_docs_link): Update call to m_context
242 callback to use member function.
243 (main): Use diagnostic_context::set_option_hooks.
244 * opts-diagnostic.h (option_name): Make context param const.
245 (get_option_url): Likewise.
246 * opts.cc (option_name): Likewise.
247 (get_option_url): Likewise.
248 * toplev.cc (general_init): Use
249 diagnostic_context::set_option_hooks.
251 2023-11-14 David Malcolm <dmalcolm@redhat.com>
253 * selftest-diagnostic.cc
254 (test_diagnostic_context::test_diagnostic_context): Use
255 diagnostic_start_span.
256 * tree-diagnostic-path.cc (struct event_range): Likewise.
258 2023-11-14 David Malcolm <dmalcolm@redhat.com>
260 * diagnostic-show-locus.cc (diagnostic_context::show_locus):
261 Update for renaming of text callbacks fields.
262 * diagnostic.cc (diagnostic_context::initialize): Likewise.
263 * diagnostic.h (class diagnostic_context): Add "friend" for
264 accessors to m_text_callbacks.
265 (diagnostic_context::m_text_callbacks): Make private, and add an
266 "m_" prefix to field names.
267 (diagnostic_starter): Convert from macro to inline function.
268 (diagnostic_start_span): New.
269 (diagnostic_finalizer): Convert from macro to inline function.
271 2023-11-14 David Malcolm <dmalcolm@redhat.com>
273 * diagnostic.h (diagnostic_ready_p): Convert from macro to inline
276 2023-11-14 Uros Bizjak <ubizjak@gmail.com>
279 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
280 New define_insn_and_split pattern.
281 (*subqi_ext<mode>_1_slp): Ditto.
282 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
284 2023-11-14 Andrew Stubbs <ams@codesourcery.com>
287 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
289 2023-11-14 David Malcolm <dmalcolm@redhat.com>
291 * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column):
292 Use m_context's file_cache.
293 (sarif_builder::maybe_make_artifact_content_object): Likewise.
294 (sarif_builder::get_source_lines): Likewise.
295 * diagnostic-show-locus.cc
296 (exploc_with_display_col::exploc_with_display_col): Add file_cache
298 (layout::m_file_cache): New field.
299 (make_range): Add file_cache param.
300 (selftest::test_layout_range_for_single_point): Create and use a
301 temporary file_cache.
302 (selftest::test_layout_range_for_single_line): Likewise.
303 (selftest::test_layout_range_for_multiple_lines): Likewise.
304 (layout::layout): Initialize m_file_cache from the context and use it.
305 (layout::maybe_add_location_range): Use m_file_cache.
306 (layout::calculate_x_offset_display): Likewise.
307 (get_affected_range): Add file_cache param.
308 (get_printed_columns): Likewise.
309 (line_corrections::line_corrections): Likewwise.
310 (line_corrections::m_file_cache): New field.
311 (source_line::source_line): Add file_cache param.
312 (line_corrections::add_hint): Use m_file_cache.
313 (layout::print_trailing_fixits): Likewise.
314 (layout::print_line): Likewise.
315 (selftest::test_layout_x_offset_display_utf8): Create and use a
316 temporary file_cache.
317 (selftest::test_layout_x_offset_display_tab): Likewise.
318 (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise.
319 (selftest::test_add_location_if_nearby): Pass global_dc's
320 file_cache to temp_source_file ctor.
321 (selftest::test_overlapped_fixit_printing): Create and use a
322 temporary file_cache.
323 (selftest::test_overlapped_fixit_printing_utf8): Likewise.
324 (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache.
325 * diagnostic.cc (diagnostic_context::initialize): Always create a
327 (diagnostic_context::initialize_input_context): Assume
328 m_file_cache has already been created.
329 (diagnostic_context::create_edit_context): Pass m_file_cache to
331 (convert_column_unit): Add file_cache param.
332 (diagnostic_context::converted_column): Use context's file_cache.
333 (print_parseable_fixits): Add file_cache param.
334 (diagnostic_context::report_diagnostic): Use context's file_cache.
335 (selftest::test_print_parseable_fixits_none): Create and use a
336 temporary file_cache.
337 (selftest::test_print_parseable_fixits_insert): Likewise.
338 (selftest::test_print_parseable_fixits_remove): Likewise.
339 (selftest::test_print_parseable_fixits_replace): Likewise.
340 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
342 * diagnostic.h (diagnostic_context::file_cache_init): Delete.
343 (diagnostic_context::get_file_cache): Convert return type from
344 pointer to reference.
345 * edit-context.cc (edited_file::get_file_cache): New.
346 (edited_file::m_edit_context): New.
347 (edit_context::edit_context): Add file_cache param.
348 (edit_context::get_or_insert_file): Pass this to edited_file's
350 (edited_file::edited_file): Add edit_context param.
351 (edited_file::print_content): Use get_file_cache.
352 (edited_file::print_diff_hunk): Likewise.
353 (edited_file::print_run_of_changed_lines): Likewise.
354 (edited_file::get_or_insert_line): Likewise.
355 (edited_file::get_num_lines): Likewise.
356 (edited_line::edited_line): Pass in file_cache and use it.
357 (selftest::test_get_content): Create and use a
358 temporary file_cache.
359 (selftest::test_applying_fixits_insert_before): Likewise.
360 (selftest::test_applying_fixits_insert_after): Likewise.
361 (selftest::test_applying_fixits_insert_after_at_line_end):
363 (selftest::test_applying_fixits_insert_after_failure): Likewise.
364 (selftest::test_applying_fixits_insert_containing_newline):
366 (selftest::test_applying_fixits_growing_replace): Likewise.
367 (selftest::test_applying_fixits_shrinking_replace): Likewise.
368 (selftest::test_applying_fixits_replace_containing_newline):
370 (selftest::test_applying_fixits_remove): Likewise.
371 (selftest::test_applying_fixits_multiple): Likewise.
372 (selftest::test_applying_fixits_multiple_lines): Likewise.
373 (selftest::test_applying_fixits_modernize_named_init): Likewise.
374 (selftest::test_applying_fixits_modernize_named_init): Likewise.
375 (selftest::test_applying_fixits_unreadable_file): Likewise.
376 (selftest::test_applying_fixits_line_out_of_range): Likewise.
377 (selftest::test_applying_fixits_column_validation): Likewise.
378 (selftest::test_applying_fixits_column_validation): Likewise.
379 (selftest::test_applying_fixits_column_validation): Likewise.
380 (selftest::test_applying_fixits_column_validation): Likewise.
381 * edit-context.h (edit_context::edit_context): Add file_cache
383 (edit_context::get_file_cache): New.
384 (edit_context::m_file_cache): New.
385 * final.cc: Include "diagnostic.h".
386 (asm_show_source): Use global_dc's file_cache.
387 * gcc-rich-location.cc (blank_line_before_p): Add file_cache
389 (use_new_line): Likewise.
390 (gcc_rich_location::add_fixit_insert_formatted): Use global dc's
392 * input.cc (diagnostic_file_cache_init): Delete.
393 (diagnostic_context::file_cache_init): Delete.
394 (diagnostics_file_cache_forcibly_evict_file): Delete.
395 (file_cache::missing_trailing_newline_p): New.
396 (file_cache::evicted_cache_tab_entry): Don't call
397 diagnostic_file_cache_init.
398 (location_get_source_line): Delete.
399 (get_source_text_between): Add file_cache param.
400 (get_source_file_content): Delete.
401 (location_missing_trailing_newline): Delete.
402 (location_compute_display_column): Add file_cache param.
403 (dump_location_info): Create and use temporary file_cache.
404 (get_substring_ranges_for_loc): Add file_cache param.
405 (get_location_within_string): Likewise.
406 (get_source_range_for_char): Likewise.
407 (get_num_source_ranges_for_substring): Likewise.
408 (selftest::test_reading_source_line): Create and use temporary
410 (selftest::lexer_test::m_file_cache): New field.
411 (selftest::assert_char_at_range): Use test.m_file_cache.
412 (selftest::assert_num_substring_ranges): Likewise.
413 (selftest::assert_has_no_substring_ranges): Likewise.
414 (selftest::test_lexer_string_locations_concatenation_2): Likewise.
415 * input.h (class file_cache): New forward decl.
416 (location_compute_display_column): Add file_cache param.
417 (location_get_source_line): Delete.
418 (get_source_text_between): Add file_cache param.
419 (get_source_file_content): Delete.
420 (location_missing_trailing_newline): Delete.
421 (file_cache::missing_trailing_newline_p): New decl.
422 (diagnostics_file_cache_forcibly_evict_file): Delete.
423 * selftest.cc (named_temp_file::named_temp_file): Add file_cache
425 (named_temp_file::~named_temp_file): Optionally evict the file
426 from the given file_cache.
427 (temp_source_file::temp_source_file): Add file_cache param.
428 * selftest.h (class file_cache): New forward decl.
429 (named_temp_file::named_temp_file): Add file_cache param.
430 (named_temp_file::m_file_cache): New field.
431 (temp_source_file::temp_source_file): Add file_cache param.
432 * substring-locations.h (get_location_within_string): Add
435 2023-11-14 David Malcolm <dmalcolm@redhat.com>
437 * diagnostic-format-json.cc: Use type-specific "set_*" functions
438 of json::object to avoid naked new of json value subclasses.
439 * diagnostic-format-sarif.cc: Likewise.
441 * json.cc (object::set_string): New.
442 (object::set_integer): New.
443 (object::set_float): New.
444 (object::set_bool): New.
445 (selftest::test_writing_objects): Use object::set_string.
446 * json.h (object::set_string): New decl.
447 (object::set_integer): New decl.
448 (object::set_float): New decl.
449 (object::set_bool): New decl.
450 * optinfo-emit-json.cc: Use type-specific "set_*" functions of
451 json::object to avoid naked new of json value subclasses.
452 * timevar.cc: Likewise.
453 * tree-diagnostic-path.cc: Likewise.
455 2023-11-14 Andrew MacLeod <amacleod@redhat.com>
457 PR tree-optimization/112509
458 * tree-vrp.cc (find_case_label_range): Create range from case labels.
460 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
462 * config/s390/s390-builtin-types.def: Add/remove types.
463 * config/s390/s390-builtins.def (s390_vec_scatter_element_flt):
464 The type for the offset should be UV4SI instead of V4SF.
466 2023-11-14 Saurabh Jha <saurabh.jha@arm.com>
469 * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
472 2023-11-14 Richard Biener <rguenther@suse.de>
474 PR tree-optimization/111233
475 PR tree-optimization/111652
476 PR tree-optimization/111727
477 PR tree-optimization/111838
478 PR tree-optimization/112113
479 * tree-ssa-loop-split.cc (patch_loop_exit): Get the new
480 guard code instead of the old guard stmt.
481 (split_loop): Adjust.
483 2023-11-14 Richard Biener <rguenther@suse.de>
485 * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p):
486 Consider all loops in the nest when looking for
489 2023-11-14 Richard Biener <rguenther@suse.de>
491 PR tree-optimization/112281
492 * tree-loop-distribution.cc (pg_add_dependence_edges):
493 Preserve stmt order when the innermost loop has exact
496 2023-11-14 Jakub Jelinek <jakub@redhat.com>
500 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move
501 operands[1] aka low part of input rather than operands[3] aka high
502 part of input to output if not the same register.
504 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
506 * config.gcc: Add s390-gen-builtins.h to target_gtfiles.
507 * config/s390/s390-builtins.h (s390_builtin_types)
508 (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker.
509 * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h.
510 Add build rule for s390-gen-builtins.h.
512 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
514 * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check
517 2023-11-14 Jakub Jelinek <jakub@redhat.com>
520 * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG,
521 BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New
523 * builtins.cc (fold_builtin_bit_query): New function.
524 (fold_builtin_1): Use it for
525 BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
526 (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G.
527 * fold-const-call.cc: Fix comment typo on tm.h inclusion.
528 (fold_const_call_ss): Handle
529 CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
530 (fold_const_call_sss): New function.
531 (fold_const_call_1): Call it for 2 argument functions returning
532 scalar when passed 2 INTEGER_CSTs.
533 * genmatch.cc (cmp_operand): For function calls also compare
535 (fns_cmp): New function.
536 (dt_node::gen_kids): Sort fns and generic_fns.
537 (dt_node::gen_kids_1): Handle fns with the same id but different
539 * match.pd (CLZ simplifications): Drop checks for defined behavior
540 at zero. Add variant of simplifications for IFN_CLZ with 2 arguments.
541 (CTZ simplifications): Drop checks for defined behavior at zero,
542 don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of
543 simplifications for IFN_CTZ with 2 arguments.
544 (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of
545 type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than
546 one argument. Add variant for matching CLZ with 2 arguments.
547 (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly.
548 * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New
550 (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS}
551 and IFN_{PARITY,POPCOUNT} calls.
552 * gimple-range-op.cc (cfn_clz::fold_range): Don't check
553 CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead
554 assume defined value at zero if the call has 2 arguments and use
555 second argument value for that case.
556 (cfn_ctz::fold_range): Similarly.
557 (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal
558 or op_cfn_ctz_internal only if internal fn call has 2 arguments and
559 set m_op2 in that case.
560 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern,
561 vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero
562 use second argument of calls if present, otherwise assume UB at zero,
563 create 2 argument .CLZ/.CTZ calls if needed.
564 * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ
566 * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument
567 .CLZ/.CTZ calls if needed.
568 * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2
569 argument .CTZ calls if needed.
570 * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle
571 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument
573 * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg,
574 __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document.
576 2023-11-14 Xi Ruoyao <xry111@xry111.site>
579 * config/loongarch/genopts/loongarch.opt.in: Add
580 -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to
581 account conditional branch relaxation support status.
582 * config/loongarch/loongarch.opt: Regenerate.
583 * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
584 the assembler supports conditional branch relaxation.
585 * configure: Regenerate.
586 * config.in: Regenerate. Note that there are some unrelated
587 changes introduced by r14-5424 (which does not contain a
588 config.in regeneration).
589 * config/loongarch/loongarch-opts.h
590 (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
591 * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
593 (ASM_MRELAX_SPEC): Define.
594 (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
595 * config/loongarch/loongarch.cc: Take the setting of
596 -m[no-]relax into account when determining the default of
598 * doc/invoke.texi: Document -m[no-]relax and
599 -m[no-]pass-mrelax-to-as for LoongArch. Update the default
600 value of -mexplicit-relocs=.
602 2023-11-14 liuhongt <hongtao.liu@intel.com>
604 PR tree-optimization/112496
605 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return
606 false when !tree_nop_conversion_p (TREE_TYPE (vectype),
607 TREE_TYPE (init_expr)).
609 2023-11-14 Xi Ruoyao <xry111@xry111.site>
611 * config/loongarch/sync.md (mem_thread_fence): Remove redundant
613 (mem_thread_fence_1): Emit finer-grained DBAR hints for
614 different memory models, instead of 0.
616 2023-11-14 Jakub Jelinek <jakub@redhat.com>
619 * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like
622 2023-11-14 Jakub Jelinek <jakub@redhat.com>
623 Hu, Lin1 <lin1.hu@intel.com>
626 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
627 <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add
628 alternative with just x instead of v constraints and xjm instead of
629 vm and use vblendps as optimization only with that alternative.
631 2023-11-14 liuhongt <hongtao.liu@intel.com>
633 PR tree-optimization/105735
634 PR tree-optimization/111972
635 * tree-scalar-evolution.cc
636 (analyze_and_compute_bitop_with_inv_effect): Handle bitop with
639 2023-11-13 Arsen Arsenović <arsen@aarsen.me>
641 * configure: Regenerate.
642 * aclocal.m4: Regenerate.
643 * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from
645 * doc/install.texi: Document new (notable) flags added by the
646 optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc
647 with gettext dependency.
649 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
651 * config/i386/i386-expand.h (gen_pushfl): New prototype.
653 * config/i386/i386-expand.cc (ix86_expand_builtin)
654 [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
655 [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
656 * config/i386/i386.cc (gen_pushfl): New function.
658 * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
659 (@pushfl<mode>2): Rename from *pushfl<mode>2.
660 Rewrite as unspec using UNSPEC_PUSHFL.
661 (@popfl<mode>1): Rename from *popfl<mode>1.
662 Rewrite as unspec using UNSPEC_POPFL.
664 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
667 * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode.
669 2023-11-13 Robin Dapp <rdapp@ventanamicro.com>
671 * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer
672 equality for REG_EQUAL.
674 2023-11-13 Richard Biener <rguenther@suse.de>
676 PR tree-optimization/112495
677 * tree-data-ref.cc (runtime_alias_check_p): Reject checks
678 between different address spaces.
680 2023-11-13 Richard Biener <rguenther@suse.de>
683 * tree-inline.cc (setup_one_parameter): When the parameter
684 is unused only insert a debug bind when there's not a gross
685 mismatch in value and declared parameter type. Do not assert
686 there effectively isn't.
688 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
690 * config/riscv/riscv-v.cc
691 (rvv_builder::combine_sequence_use_merge_profitable_p): New function.
692 (expand_vector_init_merge_combine_sequence): Ditto.
693 (expand_vec_init): Adapt for new optimization.
695 2023-11-13 liuhongt <hongtao.liu@intel.com>
697 * config/i386/i386-expand.cc
698 (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and
700 (ix86_expand_vector_init_one_nonzero): Ditto.
701 (ix86_expand_vector_init_one_var): Ditto.
702 (ix86_expand_vector_init_general): Ditto.
703 (ix86_expand_vector_set_var): Ditto.
704 (ix86_expand_vector_set): Ditto.
705 (ix86_expand_vector_extract): Ditto.
707 (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF.
708 (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x,
709 x, x), add a new define_split after the pattern.
710 (*mmx_pextrw<mode>): New define_insn.
711 (mmx_pshufw_1): Rename to ..
712 (mmx_pshufw<mode>_1): .. this, extend to V4FI_64.
713 (*mmx_pblendw64): Extend to V4FI_64.
714 (*vec_dup<mode>): New define_insn.
715 (vec_setv4hi): Rename to ..
716 (vec_set<mode>): .. this, and extend to V4FI_64
717 (vec_extractv4hihi): Rename to ..
718 (vec_extract<mode><mmxscalarmodelower>): .. this, and extend
720 (vec_init<mode><mmxscalarmodelower>): New define_insn.
721 (*pinsrw): Extend to V2FI_32, add a new alternative (&x,
722 x, x), and add a new define_split after it.
723 (*pextrw<mode>): New define_insn.
724 (vec_setv2hi): Rename to ..
725 (vec_set<mode>): .. this, extend to V2FI_32.
726 (vec_extractv2hihi): Rename to ..
727 (vec_extract<mode><mmxscalarmodelower>): .. this, extend to
729 (*punpckwd): Extend to V2FI_32.
730 (*pshufw_1): Rename to ..
731 (*pshufw<mode>_1): .. this, extend to V2FI_32.
732 (vec_initv2hihi): Rename to ..
733 (vec_init<mode><mmxscalarmodelower>): .. this, and extend to
735 (*vec_dup<mode>): New define_insn.
736 * config/i386/sse.md (*vec_extract<mode>): Refine constraint
739 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
741 * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that
742 represents the carry flag being set if the operand is non-zero.
743 (adc_f): New define_insn representing adc with updated flags.
744 (ashrdi3): New define_expand that only handles shifts by 1.
745 (ashrdi3_cnt1): New pre-reload define_insn_and_split.
746 (lshrdi3): New define_expand that only handles shifts by 1.
747 (lshrdi3_cnt1): New pre-reload define_insn_and_split.
748 (rrcsi2): New define_insn for rrc (SImode rotate right through carry).
749 (rrcsi2_carry): Likewise for rrc.f, as above but updating flags.
750 (rotldi3): New define_expand that only handles rotates by 1.
751 (rotldi3_cnt1): New pre-reload define_insn_and_split.
752 (rotrdi3): New define_expand that only handles rotates by 1.
753 (rotrdi3_cnt1): New pre-reload define_insn_and_split.
754 (lshrsi3_cnt1_carry): New define_insn for lsr.f.
755 (ashrsi3_cnt1_carry): New define_insn for asr.f.
756 (btst_0_carry): New define_insn for asr.f without result.
758 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
760 * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to
762 (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP
763 into a rotate. Evaluate ARC_BUILTIN_NORM and
764 ARC_BUILTIN_NORMW of constant arguments.
765 * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete.
766 (normw): Make output template/assembler whitespace consistent.
767 (swap): Remove define_insn, only use of SWAP UNSPEC.
768 * config/arc/builtins.def: Tweak indentation.
769 (SWAP): Expand using rotlsi2_cnt16 instead of using swap.
771 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
773 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New
774 define_insn_and_split to optimize register usage of doubleword
775 right shifts followed by truncation.
777 2023-11-13 Jakub Jelinek <jakub@redhat.com>
779 * config/i386/constraints.md: Remove j constraint letter from list of
782 2023-11-13 Xi Ruoyao <xry111@xry111.site>
784 PR rtl-optimization/112483
785 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
786 Fix the simplification of (fcopysign x, NEGATIVE_CONST).
788 2023-11-13 Jakub Jelinek <jakub@redhat.com>
790 PR tree-optimization/111967
791 * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
792 m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
793 (block_range_cache::dump): Iterate from 1 rather than 0. Don't use
794 ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to
795 m_ssa_ranges.length () rather than num_ssa_names.
797 2023-11-13 Xi Ruoyao <xry111@xry111.site>
799 * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode
801 (ST_ANY): New mode iterator.
802 (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and
803 ST_ANY instead of QHWD for applicable patterns.
805 2023-11-13 Xi Ruoyao <xry111@xry111.site>
808 * config/loongarch/loongarch.cc
809 (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
810 instead of gen_rtx_SUBREG.
812 2023-11-13 Pan Li <pan2.li@intel.com>
814 * config/riscv/autovec.md: Add bridge mode to lrint and lround
816 * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
818 (expand_vec_lround): Ditto.
819 * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
820 func impl to emit vfwcvt.f.f.
821 (emit_vec_rounding_to_integer): Handle the HF to DI rounding
822 with the bridge mode.
823 (expand_vec_lrint): Reorder the args.
824 (expand_vec_lround): Ditto.
825 (expand_vec_lceil): Ditto.
826 (expand_vec_lfloor): Ditto.
827 * config/riscv/vector-iterators.md: Add vector HFmode and bridge
828 mode for converting to DI.
830 2023-11-12 Jeff Law <jlaw@ventanamicro.com>
833 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
835 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
836 (prune_ready_list): USE or CLOBBER should delay execution
837 if it starts a new live range.
839 2023-11-12 Uros Bizjak <ubizjak@gmail.com>
841 * config/i386/i386.md (*stack_protect_set_4s_<mode>_di):
842 Remove alternative 0.
844 2023-11-11 Eric Botcazou <ebotcazou@adacore.com>
846 * ipa-cp.cc (print_ipcp_constant_value): Move to...
847 (values_equal_for_ipcp_p): Deal with VAR_DECLs from the
849 * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise.
850 (ipa_print_node_jump_functions_for_edge): Call the function
851 ipa_print_constant_value to print IPA_JF_CONST elements.
853 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
855 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
856 (prune_ready_list): USE or CLOBBER should delay execution
857 if it starts a new live range.
859 2023-11-11 Jakub Jelinek <jakub@redhat.com>
862 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the
863 order they were pushed rather than in reverse order. Call
864 release_defs after gsi_remove.
866 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
868 * target.def (mode_switching.backprop): New hook.
869 * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook.
870 * doc/tm.texi: Regenerate.
871 * mode-switching.cc (struct bb_info): Add single_succ.
872 (confluence_info): Add transp field.
873 (single_succ_confluence_n, single_succ_transfer): New functions.
874 (backprop_confluence_n, backprop_transfer): Likewise.
875 (optimize_mode_switching): Use them. Push mode transitions onto
876 a block's incoming edges, if the backprop hook requires it.
878 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
880 * target.def (mode_switching.confluence): New hook.
881 * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook.
882 * doc/tm.texi.in: Regenerate.
883 * mode-switching.cc (confluence_info): New variable.
884 (mode_confluence, forward_confluence_n, forward_transfer): New
886 (optimize_mode_switching): Use them to calculate mode_in when
887 TARGET_MODE_CONFLUENCE is defined.
889 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
891 * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values.
893 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
895 * target.def (mode_switching.after): Add a regs_live parameter.
896 * doc/tm.texi: Regenerate.
897 * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update
899 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
900 (epiphany_mode_after): Likewise.
901 * config/i386/i386.cc (ix86_mode_after): Likewise.
902 * config/riscv/riscv.cc (riscv_mode_after): Likewise.
903 * config/sh/sh.cc (sh_mode_after): Likewise.
904 * mode-switching.cc (optimize_mode_switching): Likewise.
906 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
908 * target.def (mode_switching.needed): Add a regs_live parameter.
909 * doc/tm.texi: Regenerate.
910 * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update
912 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
913 * config/epiphany/mode-switch-use.cc (insert_uses): Likewise.
914 * config/i386/i386.cc (ix86_mode_needed): Likewise.
915 * config/riscv/riscv.cc (riscv_mode_needed): Likewise.
916 * config/sh/sh.cc (sh_mode_needed): Likewise.
917 * mode-switching.cc (optimize_mode_switching): Likewise.
918 (create_pre_exit): Likewise, using the DF simulate functions
919 to calculate the required information.
921 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
923 * target.def (mode_switching.eh_handler): New hook.
924 * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook.
925 * doc/tm.texi: Regenerate.
926 * mode-switching.cc (optimize_mode_switching): Use eh_handler
927 to get the mode on entry to an exception handler.
929 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
931 * mode-switching.cc (optimize_mode_switching): Mark the exit
932 block as nontransparent if it requires a specific mode.
933 Handle the entry and exit mode as sibling rather than nested
934 concepts. Remove outdated comment.
936 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
938 * mode-switching.cc (optimize_mode_switching): Initially
939 compute transparency in a bit-per-block bitmap.
941 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
943 * mode-switching.cc (seginfo): Add a prev_mode field.
944 (new_seginfo): Take and initialize the prev_mode.
945 (optimize_mode_switching): Update calls accordingly.
946 Use the recorded modes during the emit phase, rather than
947 computing one on the fly.
949 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
951 * mode-switching.cc (add_seginfo): Replace head pointer with
952 a pointer to the tail pointer.
953 (optimize_mode_switching): Update calls accordingly.
955 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
957 * mode-switching.cc (optimize_mode_switching): Call
960 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
962 * target.def: Tweak documentation of mode-switching hooks.
963 * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation.
964 (NUM_MODES_FOR_MODE_SWITCHING): Likewise.
965 * doc/tm.texi: Regenerate.
967 2023-11-11 Martin Uecker <uecker@tugraz.at>
971 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
972 remove warning for parameters declared with `static`.
974 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
976 * doc/sourcebuild.texi (Scan the assembly output): Document change.
978 2023-11-10 Mao <sray@live.com>
981 * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry.
983 2023-11-10 Maciej W. Rozycki <macro@embecosm.com>
985 * config/riscv/riscv.md (length): Fix indentation for branch and
986 jump length calculation expressions.
988 2023-11-10 Eric Botcazou <ebotcazou@adacore.com>
990 * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>:
991 Deal with nonempty constant CONSTRUCTORs.
992 (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET
993 and DECL_FIELD_BIT_OFFSET for FIELD_DECLs.
995 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com>
998 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
999 (equiv_can_be_consumed_p): Use it.
1001 2023-11-10 Richard Sandiford <richard.sandiford@arm.com>
1003 * read-rtl.cc (md_reader::read_mapping): Allow iterators to
1004 include other iterators.
1005 * doc/md.texi: Document the change.
1006 * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
1007 the iterator that is being duplicated, rather than reproducing it.
1008 (VSTRUCT_D): Redefine using VSTRUCT_[234]D.
1009 (VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
1010 (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
1011 the individual D and Q iterators.
1013 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
1015 * config/i386/i386.md (stack_protect_set_1 peephole2):
1016 Explicitly check operand 2 for word_mode.
1017 (stack_protect_set_1 peephole2 #2): Ditto.
1018 (stack_protect_set_2 peephole2): Ditto.
1019 (stack_protect_set_3 peephole2): Ditto.
1020 (*stack_protect_set_4z_<mode>_di): New insn patter.
1021 (*stack_protect_set_4s_<mode>_di): Ditto.
1022 (stack_protect_set_4 peephole2): New peephole2 pattern to
1023 substitute stack protector scratch register clear with unrelated
1024 register initialization involving zero/sign-extend instruction.
1026 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
1028 * config/i386/i386.md (shift): Use SAL insted of SLL
1029 for ashift insn mnemonic.
1031 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1033 PR tree-optimization/112438
1034 * tree-vect-loop.cc (vectorizable_induction): Bugfix when
1035 LOOP_VINFO_USING_SELECT_VL_P.
1037 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1039 * config/riscv/riscv-protos.h (enum insn_type): New enum.
1040 * config/riscv/riscv-v.cc
1041 (rvv_builder::combine_sequence_use_slideup_profitable_p): New function.
1042 (expand_vector_init_slideup_combine_sequence): Ditto.
1043 (expand_vec_init): Add slideup combine optimization.
1045 2023-11-10 Robin Dapp <rdapp@ventanamicro.com>
1047 PR tree-optimization/112464
1048 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
1049 vect_orig_stmt on scalar_dest_def_info.
1051 2023-11-10 Jin Ma <jinma@linux.alibaba.com>
1053 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt
1054 operation before the XTheadMemPair.
1056 2023-11-10 Richard Biener <rguenther@suse.de>
1058 PR tree-optimization/110221
1059 * tree-vect-slp.cc (vect_schedule_slp_node): When loop
1060 masking / len is applied make sure to not schedule
1061 intenal defs outside of the loop.
1063 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
1065 * expr.cc (store_constructor): Add "and" operation to uniform mask
1068 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
1071 * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint
1072 and switch to the new format.
1073 (add<mode>3_dup<exec_clobber>): Likewise.
1074 (add<mode>3_vcc<exec_vcc>): Likewise.
1075 (add<mode>3_vcc_dup<exec_vcc>): Likewise.
1076 (add<mode>3_vcc_zext_dup): Likewise.
1077 (add<mode>3_vcc_zext_dup_exec): Likewise.
1078 (add<mode>3_vcc_zext_dup2): Likewise.
1079 (add<mode>3_vcc_zext_dup2_exec): Likewise.
1081 2023-11-10 Richard Biener <rguenther@suse.de>
1083 PR middle-end/112469
1084 * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add
1085 missing view_converts.
1087 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
1089 * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
1090 min/max instructions.
1092 2023-11-10 Chenghui Pan <panchenghui@loongson.cn>
1094 * config/loongarch/lsx.md: Fix instruction name typo in
1095 lsx_vreplgr2vr_<lsxfmt_f> template.
1097 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1099 * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
1101 2023-11-10 Pan Li <pan2.li@intel.com>
1104 2023-11-10 Pan Li <pan2.li@intel.com>
1105 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
1106 New fun impl to expand the insn when trailing same elements.
1107 (expand_vec_init): Try trailing same elements when vec_init.
1109 2023-11-10 Pan Li <pan2.li@intel.com>
1111 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
1112 New fun impl to expand the insn when trailing same elements.
1113 (expand_vec_init): Try trailing same elements when vec_init.
1115 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1117 * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
1118 * config/riscv/autovec.md (cond_copysign<mode>): New pattern.
1120 2023-11-10 Pan Li <pan2.li@intel.com>
1123 * internal-fn.def (LRINT): Add FLOATN support.
1128 2023-11-10 Jeff Law <jlaw@ventanamicro.com>
1130 * config/h8300/combiner.md (single bit sign_extract): Avoid recently
1131 added patterns for H8/SX.
1132 (single bit zero_extract): New patterns.
1134 2023-11-10 liuhongt <hongtao.liu@intel.com>
1137 * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
1138 from LT to GT since there's not in the pattern.
1139 (*avx2_pcmp<mode>3_5): Ditto.
1141 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com>
1143 * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
1144 to force emitting register names using the wN form.
1145 * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
1146 always use wN written form in pseudo-C assembly syntax.
1148 2023-11-09 David Malcolm <dmalcolm@redhat.com>
1150 * diagnostic-show-locus.cc (layout::m_line_table): New field.
1151 (compatible_locations_p): Convert to...
1152 (layout::compatible_locations_p): ...this, replacing uses of
1153 line_table global with m_line_table.
1154 (layout::layout): Convert "richloc" param from a pointer to a
1155 const reference. Initialize m_line_table member.
1156 (layout::maybe_add_location_range): Replace uses of line_table
1157 global with m_line_table. Pass the latter to
1158 linemap_client_expand_location_to_spelling_point.
1159 (layout::print_leading_fixits): Pass m_line_table to
1161 (layout::print_trailing_fixits): Likewise.
1162 (gcc_rich_location::add_location_if_nearby): Update for change
1163 to layout ctor params.
1164 (diagnostic_show_locus): Convert to...
1165 (diagnostic_context::maybe_show_locus): ...this, converting
1166 richloc param from a pointer to a const reference. Make "loc"
1167 const. Split out printing part of function to...
1168 (diagnostic_context::show_locus): ...this.
1169 (selftest::test_offset_impl): Update for change to layout ctor
1171 (selftest::test_layout_x_offset_display_utf8): Likewise.
1172 (selftest::test_layout_x_offset_display_tab): Likewise.
1173 (selftest::test_tab_expansion): Likewise.
1174 * diagnostic.h (diagnostic_context::maybe_show_locus): New decl.
1175 (diagnostic_context::show_locus): New decl.
1176 (diagnostic_show_locus): Convert from a decl to an inline function.
1177 * gdbinit.in (break-on-diagnostic): Update from a breakpoint
1178 on diagnostic_show_locus to one on
1179 diagnostic_context::maybe_show_locus.
1180 * genmatch.cc (linemap_client_expand_location_to_spelling_point):
1181 Add "set" param and use it in place of line_table global.
1182 * input.cc (expand_location_1): Likewise.
1183 (expand_location): Update for new param of expand_location_1.
1184 (expand_location_to_spelling_point): Likewise.
1185 (linemap_client_expand_location_to_spelling_point): Add "set"
1186 param and use it in place of line_table global.
1187 * tree-diagnostic-path.cc (event_range::print): Pass line_table
1188 for new param of linemap_client_expand_location_to_spelling_point.
1190 2023-11-09 Uros Bizjak <ubizjak@gmail.com>
1192 * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>):
1193 Use W mode iterator instead of SWI48. Output MOV instead of XOR
1194 for TARGET_USE_MOV0.
1195 (stack_protect_set_1 peephole2): Use integer modes with
1196 mode size <= word mode size for operand 3.
1197 (stack_protect_set_1 peephole2 #2): New peephole2 pattern to
1198 substitute stack protector scratch register clear with unrelated
1199 register initialization, originally in front of stack
1201 (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern.
1202 (stack_protect_set_1 peephole2): New peephole2 pattern to
1203 substitute stack protector scratch register clear with unrelated
1204 register initialization involving LEA instruction.
1206 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com>
1208 PR rtl-optimization/110215
1209 * ira-lives.cc: (add_conflict_from_region_landing_pads): New
1211 (process_bb_node_lives): Use it.
1213 2023-11-09 Alexandre Oliva <oliva@adacore.com>
1215 * config/i386/i386.cc (symbolic_base_address_p,
1216 base_address_p): New, factored out from...
1217 (extract_base_offset_in_addr): ... here and extended to
1218 recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c
1219 and sse2-store-multi.c with PIE enabled by default.
1221 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1223 PR tree-optimization/109154
1224 * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New.
1226 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1228 PR tree-optimization/109154
1229 * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle
1231 * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise.
1232 * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise.
1234 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1236 PR tree-optimization/109154
1237 * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case.
1238 * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise.
1239 * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New.
1241 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1243 PR tree-optimization/109154
1244 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
1245 *movdi_aarch64): Add new w -> Z case.
1246 * config/aarch64/iterators.md (Vbtype): Add QI and HI.
1248 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1250 PR tree-optimization/109154
1251 * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p,
1252 aarch64_maybe_generate_simd_constant): New.
1253 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>,
1254 *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants.
1255 * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int):
1257 (aarch64_simd_special_constant_p,
1258 aarch64_maybe_generate_simd_constant): New.
1259 * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for
1261 * config/aarch64/constraints.md (Dx): new.
1263 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1265 PR tree-optimization/109154
1266 * internal-fn.def (COPYSIGN): New.
1267 * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to
1269 * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New.
1271 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1273 PR tree-optimization/109154
1274 * match.pd: Add new neg+abs rule, remove inverse copysign rule.
1276 2023-11-09 Tamar Christina <tamar.christina@arm.com>
1278 PR tree-optimization/109154
1279 * match.pd: expand existing copysign optimizations.
1281 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
1284 * collect2.cc (main): Do not prepend target triple to
1287 2023-11-09 Richard Biener <rguenther@suse.de>
1289 PR tree-optimization/111133
1290 * tree-vect-stmts.cc (vect_build_scatter_store_calls):
1291 Remove and refactor to ...
1292 (vect_build_one_scatter_store_call): ... this new function.
1293 (vectorizable_store): Use vect_check_scalar_mask to record
1294 the SLP node for the mask operand. Code generate scatters
1295 with builtin decls from the main scatter vectorization
1296 path and prepare that for SLP.
1297 * tree-vect-slp.cc (vect_get_operand_map): Do not look
1298 at the VDEF to decide between scatter or gather since that
1299 doesn't work for patterns. Use the LHS being an SSA_NAME
1302 2023-11-09 Pan Li <pan2.li@intel.com>
1304 * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
1305 perform once emit when at least one succ edge is abnormal.
1307 2023-11-09 Richard Biener <rguenther@suse.de>
1309 * tree-vect-loop.cc (vect_verify_full_masking_avx512):
1310 Check we have integer mode masks as required by
1313 2023-11-09 Richard Biener <rguenther@suse.de>
1315 PR tree-optimization/112444
1316 * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited
1317 defs as undefined vals.
1319 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com>
1321 * config/mips/mips.cc(mips_option_override): Set mips_abs to
1322 2008, if mips_abs is default and mips_nan is 2008.
1324 2023-11-09 Florian Weimer <fweimer@redhat.com>
1326 * doc/invoke.texi (Warning Options): Document
1327 -Wreturn-mismatch. Update -Wreturn-type documentation.
1329 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1331 * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP.
1332 * config/s390/vector.md (eltswapv16qi): New expander.
1333 (*eltswapv16qi): New insn and splitter.
1334 (eltswapv8hi): New insn and splitter.
1335 (eltswap<mode>): New insn and splitter for modes V_HW_4 as well
1337 * config/s390/vx-builtins.md (eltswap<mode>): Remove.
1338 (*eltswapv16qi): Remove.
1339 (*eltswap<mode>): Remove.
1340 (*eltswap<mode>_emu): Remove.
1342 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1344 * config/s390/s390.cc (expand_perm_with_rot): Remove.
1345 (expand_perm_reverse_elements): New.
1346 (expand_perm_with_vster): Remove.
1347 (expand_perm_with_vstbrq): Remove.
1348 (vectorize_vec_perm_const_1): Replace removed functions with new
1351 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1353 * config/s390/s390.cc (expand_perm_with_merge): Deal with cases
1354 where vmr{l,h} are still applicable if the operands are swapped.
1355 (expand_perm_with_vpdi): Likewise for vpdi.
1357 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1359 * config/s390/s390.md (VX_CONV_INT): Remove iterator.
1360 (gf): Add float mappings.
1361 (TOINT, toint): New attribute.
1362 (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13):
1364 (*fixuns_trunc<mode><toint>2_z13): Add.
1365 (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13):
1367 (*fix_trunc<mode><toint>2_bfp_z13): Add.
1368 (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove.
1369 (*floatuns<toint><mode>2_z13): Add.
1370 * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator.
1371 (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
1372 (float<tointvec><mode>2): Add.
1373 (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
1374 (floatuns<tointvec><mode>2): Add.
1375 (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
1377 (fix_trunc<mode><tointvec>2): Add.
1378 (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
1380 (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add.
1382 2023-11-09 Jakub Jelinek <jakub@redhat.com>
1385 * attribs.cc (attribute_ignored_p): Only return true for
1386 attr_namespace_ignored_p if as is NULL.
1387 (decl_attributes): Never add ignored attributes.
1389 2023-11-09 Jin Ma <jinma@linux.alibaba.com>
1391 * config/riscv/bitmanip.md: Avoid the conflict between
1392 zbb and xtheadmemidx in patterns.
1394 2023-11-09 Richard Biener <rguenther@suse.de>
1396 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
1397 to the correct simd_clone_info.
1399 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1401 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE.
1403 2023-11-09 Alexandre Oliva <oliva@adacore.com>
1405 * tree-cfg.cc (assign_discriminators): Handle debug stmts.
1407 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
1410 * config/i386/i386.md (*add<mode>_1_slp):
1411 Split insn only for unmatched operand 0.
1412 (*sub<mode>_1_slp): Ditto.
1413 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
1414 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
1415 Split insn only for unmatched operand 0.
1416 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
1417 (*one_cmpl<mode>_1_slp): Ditto.
1418 (*ashl<mode>3_1_slp): Ditto.
1419 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
1420 (*<any_rotate:insn><mode>_1_slp): Ditto.
1421 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
1422 alternative 1 and split insn after reload for unmatched operand 0.
1423 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
1424 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
1425 iterator. Redefine as define_insn_and_split. Add alternative 1
1426 and split insn after reload for unmatched operand 0.
1427 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
1428 alternative 1 and split insn after reload for unmatched operand 0.
1429 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
1430 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
1431 any_logic code iterator.
1432 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
1433 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
1434 any_logic code iterator. Redefine as define_insn_and_split. Add
1435 alternative 1 and split insn after reload for unmatched operand 0.
1436 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
1437 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
1438 code iterator. Redefine as define_insn_and_split. Add alternative 1
1439 and split insn after reload for unmatched operand 0.
1440 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
1441 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
1442 any_logic code iterator. Redefine as define_insn_and_split. Add
1443 alternative 1 and split insn after reload for unmatched operand 0.
1444 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
1445 Add alternative 1 and split insn after reload for unmatched operand 0.
1446 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
1447 alternative 1 and split insn after reload for unmatched operand 0.
1448 (*one_cmplqi_ext<mode>_1): Ditto.
1449 (*ashlqi_ext<mode>_1): Ditto.
1450 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
1452 2023-11-08 Richard Biener <rguenther@suse.de>
1454 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
1455 vector gathering for SLP of emulated gathers.
1457 2023-11-08 Richard Biener <rguenther@suse.de>
1459 * tree-vectorizer.h (vect_slp_child_index_for_operand):
1460 Add gatherscatter_p argument.
1461 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
1463 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
1464 argument into an output, also output the SLP node associated
1466 (vectorizable_simd_clone_call): Adjust.
1467 (vectorizable_store): Likewise.
1468 (vectorizable_load): Likewise.
1470 2023-11-08 Richard Biener <rguenther@suse.de>
1472 * tree-vect-stmts.cc (vectorizable_load): Use the correct
1473 vectorized mask operand.
1475 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
1477 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
1478 New combine pattern.
1480 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1482 * config/riscv/riscv-vsetvl.cc: Fix ICE.
1484 2023-11-08 xuli <xuli1@eswincomputing.com>
1486 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
1488 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
1491 * config/i386/constraints.md (jc): New constraint that prohibits
1493 * config/i386/i386.md (*movdi_internal): Change r constraint
1495 (*movti_internal): Likewise.
1497 2023-11-08 Florian Weimer <fweimer@redhat.com>
1499 * doc/invoke.texi (Warning Options): Mention C diagnostics
1502 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1505 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
1507 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
1510 * config/i386/i386.md (avx_noavx512vl): New definition for isa
1512 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
1513 avx_noavx512f to avx_noavx512vl.
1515 2023-11-07 Pan Li <pan2.li@intel.com>
1517 * config/riscv/autovec.md: Remove the size check of lfloor.
1518 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
1519 emit_vec_rounding_to_integer for floor.
1521 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
1523 PR tree-optimization/112361
1525 PR middle-end/112406
1526 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
1527 loop was versioned and only then create COND_OPs.
1528 (predicate_scalar_phi): Do not create COND_OP when not
1530 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
1532 (vectorize_fold_left_reduction): Pass mask to
1533 vect_expand_fold_left.
1535 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
1537 * config/i386/predicates.md ("flags_reg_operand"):
1538 Make predicate special to avoid automatic mode checks.
1540 2023-11-07 Martin Jambor <mjambor@suse.cz>
1542 * configure: Regenerate.
1544 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
1546 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
1548 (output_offload_tables): Write indirect functions.
1549 (input_offload_tables): read indirect functions.
1550 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
1551 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
1552 * omp-offload.cc (offload_ind_funcs): New.
1553 (omp_discover_implicit_declare_target): Add functions marked with
1554 'omp declare target indirect' to indirect functions list.
1555 (omp_finish_file): Add indirect functions to section for offload
1557 (execute_omp_device_lower): Redirect indirect calls on target by
1558 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
1559 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
1560 indirect functions are present on an accelerator device.
1561 * omp-offload.h (offload_ind_funcs): New.
1562 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
1563 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
1564 (omp_clause_code_name): Likewise.
1565 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
1566 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
1567 section. Count number of indirect functions.
1568 (process_obj): Emit number of indirect functions.
1569 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
1570 (process): Emit offload_ind_func_table in PTX code. Emit indirect
1571 function names and count in image.
1572 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
1573 indirect functions in PTX code with IND_FUNC_MAP.
1575 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
1577 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
1578 attribute syntax supported also in C.
1580 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
1582 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
1583 modifier for SVE registers.
1585 2023-11-07 Joseph Myers <joseph@codesourcery.com>
1587 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
1588 use flag_isoc23 and function_c23_misc.
1589 * config/rl78/rl78.cc (rl78_option_override): Compare
1590 lang_hooks.name with "GNU C23" not "GNU C2X".
1591 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
1592 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
1594 * doc/extend.texi: Likewise.
1595 * doc/invoke.texi: Likewise.
1596 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
1597 against and return "GNU C23" language string instead of "GNU C2X".
1598 * ginclude/float.h: Refer to C23 instead of C2X in comments.
1599 * ginclude/stdint-gcc.h: Likewise.
1600 * glimits.h: Likewise.
1603 2023-11-07 Alexandre Oliva <oliva@adacore.com>
1605 * doc/sourcebuild.texi (opt_mstrict_align): New target.
1607 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
1609 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
1610 New combine pattern.
1611 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
1612 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
1613 (*cond_len_extend<v_double_trunc><mode>): Ditto.
1614 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
1616 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1619 * config/riscv/riscv-avlprop.cc
1620 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
1621 * config/riscv/t-riscv: Add new include.
1623 2023-11-07 Pan Li <pan2.li@intel.com>
1625 * config/riscv/autovec.md: Remove the size check of lceil.l
1626 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
1627 emit_vec_rounding_to_integer for ceil.
1629 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
1631 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
1633 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
1635 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
1637 2023-11-06 David Malcolm <dmalcolm@redhat.com>
1639 * diagnostic-show-locus.cc (class colorizer): Take just a
1640 pretty_printer rather than a diagnostic_context.
1641 (layout::layout): Make context param a const reference,
1642 and pretty_printer param non-optional.
1643 (layout::m_context): Drop field.
1644 (layout::m_options): New field.
1645 (layout::m_colorize_source_p): Drop field.
1646 (layout::m_show_labels_p): Drop field.
1647 (layout::m_show_line_numbers_p): Drop field.
1648 (layout::print_gap_in_line_numbering): Use m_options.
1649 (layout::calculate_line_spans): Likewise.
1650 (layout::calculate_linenum_width): Likewise.
1651 (layout::calculate_x_offset_display): Likewise.
1652 (layout::print_source_line): Likewise.
1653 (layout::start_annotation_line): Likewise.
1654 (layout::print_annotation_line): Likewise.
1655 (layout::print_line): Likewise.
1656 (gcc_rich_location::add_location_if_nearby): Update for changes to
1658 (diagnostic_show_locus): Likewise.
1659 (selftest::test_offset_impl): Likewise.
1660 (selftest::test_layout_x_offset_display_utf8): Likewise.
1661 (selftest::test_layout_x_offset_display_tab): Likewise.
1662 (selftest::test_tab_expansion): Likewise.
1663 * diagnostic.h (diagnostic_context::m_source_printing): Move
1664 declaration of struct outside diagnostic_context as...
1665 (struct diagnostic_source_printing_options)... this.
1667 2023-11-06 David Malcolm <dmalcolm@redhat.com>
1669 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
1671 (diagnostic_option_classifier::push): ...this.
1672 (diagnostic_context::pop_diagnostics): Convert to...
1673 (diagnostic_option_classifier::pop): ...this.
1674 (diagnostic_context::initialize): Move code to...
1675 (diagnostic_option_classifier::init): ...this new function.
1676 (diagnostic_context::finish): Move code to...
1677 (diagnostic_option_classifier::fini): ...this new function.
1678 (diagnostic_context::classify_diagnostic): Convert to...
1679 (diagnostic_option_classifier::classify_diagnostic): ...this.
1680 (diagnostic_context::update_effective_level_from_pragmas): Convert
1682 (diagnostic_option_classifier::update_effective_level_from_pragmas):
1684 (diagnostic_context::diagnostic_enabled): Update for refactoring.
1685 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
1686 (class diagnostic_option_classifier): ...this new class.
1687 (diagnostic_context::option_unspecified_p): Update for move of
1688 fields into m_option_classifier.
1689 (diagnostic_context::classify_diagnostic): Likewise.
1690 (diagnostic_context::push_diagnostics): Likewise.
1691 (diagnostic_context::pop_diagnostics): Likewise.
1692 (diagnostic_context::update_effective_level_from_pragmas): Delete.
1693 (diagnostic_context::m_classify_diagnostic): Move into class
1694 diagnostic_option_classifier.
1695 (diagnostic_context::m_option_classifier): Likewise.
1696 (diagnostic_context::m_classification_history): Likewise.
1697 (diagnostic_context::m_n_classification_history): Likewise.
1698 (diagnostic_context::m_push_list): Likewise.
1699 (diagnostic_context::m_n_push): Likewise.
1700 (diagnostic_context::m_option_classifier): New.
1702 2023-11-06 David Malcolm <dmalcolm@redhat.com>
1704 * diagnostic.cc (diagnostic_context::set_urlifier): New.
1705 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
1706 (diagnostic_context::m_urlifier): Make private.
1707 * gcc.cc (driver::global_initializations): Use set_urlifier rather
1708 than directly setting field.
1709 * toplev.cc (general_init): Likewise.
1711 2023-11-06 David Malcolm <dmalcolm@redhat.com>
1713 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
1714 uses of diagnostic_kind_count with simple field acesss.
1715 (diagnostic_context::report_diagnostic): Likewise.
1716 (diagnostic_text_output_format::~diagnostic_text_output_format):
1717 Replace use of diagnostic_kind_count with
1718 diagnostic_context::diagnostic_count.
1719 * diagnostic.h (diagnostic_kind_count): Delete.
1720 (errorcount): Replace use of diagnostic_kind_count with
1721 diagnostic_context::diagnostic_count.
1722 (warningcount): Likewise.
1723 (werrorcount): Likewise.
1724 (sorrycount): Likewise.
1726 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
1728 * doc/sourcebuild.texi (Other attributes): Document thread_fence
1731 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
1733 * config/i386/constraints.md (Bc): Remove constraint.
1734 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
1735 * config/i386/i386.cc (ix86_memory_address_reg_class):
1736 Do not limit processing to TARGET_APX_EGPR. Exit early for
1737 NULL insn. Do not check recog_data.insn before calling
1738 extract_insn_cached.
1739 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
1740 (ix86_regno_ok_for_insn_base_p): Ditto.
1741 (ix86_insn_index_reg_class): Ditto.
1742 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
1743 Remove insn pattern and corresponding peephole2 pattern.
1744 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
1745 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
1746 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
1747 and corresponding peephole2 pattern.
1748 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
1749 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
1750 (*extzvqi_mem_rex64): Remove insn pattern and
1751 corresponding peephole2 pattern.
1752 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
1753 alternative to (Q,QnBn). Add "addr" attribute.
1754 (*insvqi_1_mem_rex64): Remove insn pattern and
1755 corresponding peephole2 pattern.
1756 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
1757 alternative to (Q,QnBn). Add "addr" attribute.
1758 (@insv<mode>_1): Ditto.
1759 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
1760 alternative to (QBn,0,Q). Add "addr" attribute.
1761 (*subqi_ext<mode>_0): Ditto.
1762 (*andqi_ext<mode>_0): Ditto.
1763 (*<any_or:code>qi_ext<mode>_0): Ditto.
1764 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
1765 alternative to (Q,0,QnBn). Add "addr" attribute.
1766 (*andqi_ext<mode>_1): Ditto.
1767 (*andqi_ext<mode>_1_cc): Ditto.
1768 (*<any_or:code>qi_ext<mode>_1): Ditto.
1769 (*xorqi_ext<mode>_1_cc): Ditto.
1770 * config/i386/predicates.md (nonimm_x64constmem_operand):
1772 (general_x64constmem_operand): Ditto.
1773 (norex_memory_operand): Ditto.
1775 2023-11-06 Joseph Myers <joseph@codesourcery.com>
1778 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
1779 -std=gnu23 instead of -std=c2x and -std=gnu2x.
1780 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
1781 instead of C2x and -std=c2x.
1782 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
1783 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
1784 -std=gnu2x as deprecated aliases. Update descriptions of C23.
1785 * doc/standards.texi (Standards): Describe C23 with C2X as an old
1788 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
1790 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
1792 2023-11-06 Richard Biener <rguenther@suse.de>
1794 PR tree-optimization/112405
1795 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
1796 Properly handle invariant and/or loop mask passing.
1798 2023-11-06 Pan Li <pan2.li@intel.com>
1800 * config/riscv/autovec.md: Remove the size check of lround.
1801 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
1802 emit_vec_rounding_to_integer for round.
1804 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1806 * config/riscv/predicates.md: Adapt predicate.
1807 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
1808 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
1809 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
1810 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
1812 2023-11-06 Richard Biener <rguenther@suse.de>
1814 PR tree-optimization/111950
1815 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
1817 (find_guard_arg): Likewise.
1818 (slpeel_update_phi_nodes_for_guard2): Likewise.
1819 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
1820 slpeel_duplicate_current_defs_from_edges, do not elide
1821 LC-PHIs for invariant values.
1822 (vect_do_peeling): Materialize PHI arguments for the edge
1823 around the epilog from the PHI defs of the main loop exit.
1825 2023-11-06 Richard Biener <rguenther@suse.de>
1827 PR tree-optimization/112404
1828 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
1829 overload with SLP node argument.
1830 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
1831 (vect_check_scalar_mask): Use it.
1832 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
1833 loads also for nodes with children, like .MASK_LOAD.
1834 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
1835 representative for load nodes and check whether it is a grouped
1836 access before looking for load-lanes support.
1838 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
1840 PR tree-optimization/111760
1841 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
1843 * config/riscv/riscv-protos.h (enum insn_type): Add.
1844 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
1845 * doc/md.texi: Add vcond_mask_len.
1846 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
1847 Create VCOND_MASK_LEN when length masking.
1848 * gimple-match.h (gimple_match_op::gimple_match_op): Always
1849 initialize len and bias.
1850 * internal-fn.cc (vec_cond_mask_len_direct): Add.
1851 (direct_vec_cond_mask_len_optab_supported_p): Add.
1852 (internal_fn_len_index): Add VCOND_MASK_LEN.
1853 (internal_fn_mask_index): Ditto.
1854 * internal-fn.def (VCOND_MASK_LEN): New internal function.
1855 * match.pd: Combine unconditional unary, binary and ternary
1856 operations into the respective COND_LEN operations.
1857 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
1859 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
1861 * explow.cc (align_dynamic_address): Do nothing if the required
1862 alignment is a byte.
1864 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
1866 * function.h (get_stack_dynamic_offset): Declare.
1867 * function.cc (get_stack_dynamic_offset): New function,
1869 (get_stack_dynamic_offset): ...here.
1870 * explow.cc (allocate_dynamic_stack_space): Handle calls made
1871 after virtual registers have been instantiated.
1873 2023-11-06 liuhongt <hongtao.liu@intel.com>
1876 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
1877 Avoid generating RTL code when d->testing_p.
1879 2023-11-06 Richard Biener <rguenther@suse.de>
1881 PR tree-optimization/112369
1882 * tree.cc (strip_float_extensions): Use element_precision.
1884 2023-11-06 Richard Biener <rguenther@suse.de>
1886 PR middle-end/112296
1887 * doc/extend.texi (__builtin_constant_p): Clarify that
1888 side-effects are discarded.
1890 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
1893 * config.in: Regenerate.
1894 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
1895 inline asm handling under !HAVE_AS_POWER10_HTM.
1896 * configure: Regenerate.
1897 * configure.ac: Detect assembler support for HTM insns at power10.
1899 2023-11-06 xuli <xuli1@eswincomputing.com>
1900 Pan Li <pan2.li@intel.com>
1902 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
1903 (riscv_register_pragmas): Register the hook.
1904 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
1905 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
1906 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
1907 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
1909 (function_builder::add_function): Add overloaded arg.
1910 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
1911 (function_builder::add_overloaded_function): New API impl.
1912 (registered_function::overloaded_hash): Calculate hash value.
1913 (has_vxrm_or_frm_p): New function impl.
1914 (non_overloaded_registered_function_hasher::hash): Ditto.
1915 (non_overloaded_registered_function_hasher::equal): Ditto.
1916 (handle_pragma_vector): Allocate space for hash table.
1917 (resolve_overloaded_builtin): New function impl.
1918 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
1919 (function_base::may_require_vxrm_p): Ditto.
1921 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
1924 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
1925 * config/i386/avx512bf16vlintrin.h: Ditto.
1926 * config/i386/avx512bitalgvlintrin.h: Ditto.
1927 * config/i386/avx512bwintrin.h: Ditto.
1928 * config/i386/avx512dqintrin.h: Ditto.
1929 * config/i386/avx512fintrin.h: Ditto.
1930 * config/i386/avx512fp16intrin.h: Ditto.
1931 * config/i386/avx512fp16vlintrin.h: Ditto.
1932 * config/i386/avx512ifmavlintrin.h: Ditto.
1933 * config/i386/avx512vbmi2vlintrin.h: Ditto.
1934 * config/i386/avx512vbmivlintrin.h: Ditto.
1935 * config/i386/avx512vlbwintrin.h: Ditto.
1936 * config/i386/avx512vldqintrin.h: Ditto.
1937 * config/i386/avx512vlintrin.h: Ditto.
1938 * config/i386/avx512vnnivlintrin.h: Ditto.
1939 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
1940 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
1942 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
1944 * config/i386/avx512bf16vlintrin.h
1945 (_mm_avx512_castsi128_ps): New.
1946 (_mm256_avx512_castsi256_ps): Ditto.
1947 (_mm_avx512_slli_epi32): Ditto.
1948 (_mm256_avx512_slli_epi32): Ditto.
1949 (_mm_avx512_cvtepi16_epi32): Ditto.
1950 (_mm256_avx512_cvtepi16_epi32): Ditto.
1951 (__attribute__): Change intrin call.
1952 * config/i386/avx512bwintrin.h
1953 (_mm_avx512_set_epi32): New.
1954 (_mm_avx512_set_epi16): Ditto.
1955 (_mm_avx512_set_epi8): Ditto.
1956 (__attribute__): Change intrin call.
1957 * config/i386/avx512fp16intrin.h: Ditto.
1958 * config/i386/avx512fp16vlintrin.h
1959 (_mm_avx512_set1_ps): New.
1960 (_mm256_avx512_set1_ps): Ditto.
1961 (_mm_avx512_and_si128): Ditto.
1962 (_mm256_avx512_and_si256): Ditto.
1963 (__attribute__): Change intrin call.
1964 * config/i386/avx512vlbwintrin.h
1965 (_mm_avx512_set1_epi32): New.
1966 (_mm_avx512_set1_epi16): Ditto.
1967 (_mm_avx512_set1_epi8): Ditto.
1968 (_mm256_avx512_set_epi16): Ditto.
1969 (_mm256_avx512_set_epi8): Ditto.
1970 (_mm256_avx512_set1_epi16): Ditto.
1971 (_mm256_avx512_set1_epi32): Ditto.
1972 (_mm256_avx512_set1_epi8): Ditto.
1973 (_mm_avx512_max_epi16): Ditto.
1974 (_mm_avx512_min_epi16): Ditto.
1975 (_mm_avx512_max_epu16): Ditto.
1976 (_mm_avx512_min_epu16): Ditto.
1977 (_mm_avx512_max_epi8): Ditto.
1978 (_mm_avx512_min_epi8): Ditto.
1979 (_mm_avx512_max_epu8): Ditto.
1980 (_mm_avx512_min_epu8): Ditto.
1981 (_mm256_avx512_max_epi16): Ditto.
1982 (_mm256_avx512_min_epi16): Ditto.
1983 (_mm256_avx512_max_epu16): Ditto.
1984 (_mm256_avx512_min_epu16): Ditto.
1985 (_mm256_avx512_insertf128_ps): Ditto.
1986 (_mm256_avx512_extractf128_pd): Ditto.
1987 (_mm256_avx512_extracti128_si256): Ditto.
1988 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
1989 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
1990 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
1991 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
1992 (__attribute__): Change intrin call.
1994 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
1996 * config/i386/avx512bf16vlintrin.h: Change intrin call.
1997 * config/i386/avx512fintrin.h
1998 (_mm_avx512_undefined_ps): New.
1999 (_mm_avx512_undefined_pd): Ditto.
2000 (__attribute__): Change intrin call.
2001 * config/i386/avx512vbmivlintrin.h: Ditto.
2002 * config/i386/avx512vlbwintrin.h: Ditto.
2003 * config/i386/avx512vldqintrin.h: Ditto.
2004 * config/i386/avx512vlintrin.h
2005 (_mm_avx512_undefined_si128): New.
2006 (_mm256_avx512_undefined_ps): Ditto.
2007 (_mm256_avx512_undefined_pd): Ditto.
2008 (_mm256_avx512_undefined_si256): Ditto.
2009 (__attribute__): Change intrin call.
2011 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
2013 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
2014 * config/i386/avx512dqintrin.h: Ditto.
2015 * config/i386/avx512fintrin.h:
2016 (_mm_avx512_setzero_ps): New.
2017 (_mm_avx512_setzero_pd): Ditto.
2018 (__attribute__): Change intrin call.
2019 * config/i386/avx512fp16intrin.h: Ditto.
2020 * config/i386/avx512fp16vlintrin.h: Ditto.
2021 * config/i386/avx512vbmi2vlintrin.h: Ditto.
2022 * config/i386/avx512vbmivlintrin.h: Ditto.
2023 * config/i386/avx512vlbwintrin.h: Ditto.
2024 * config/i386/avx512vldqintrin.h: Ditto.
2025 * config/i386/avx512vlintrin.h
2026 (_mm_avx512_setzero_si128): New.
2027 (_mm256_avx512_setzero_pd): Ditto.
2028 (_mm256_avx512_setzero_ps): Ditto.
2029 (_mm256_avx512_setzero_si256): Ditto.
2030 (__attribute__): Change intrin call.
2031 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
2032 * config/i386/gfniintrin.h: Ditto.
2034 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
2036 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
2037 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
2038 (REG_CLASS_NAMES): Ditto.
2039 (REG_CLASS_CONTENTS): Ditto.
2040 * config/i386/constraints.md ("R"): Update for rename.
2042 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
2044 * mode-switching.cc: Remove unused forward references.
2045 (seginfo): Remove bbnum.
2046 (new_seginfo): Remove associated argument.
2047 (optimize_mode_switching): Update calls accordingly.
2049 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
2051 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
2052 invalid [...] operands.
2054 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
2057 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
2058 function, with the core logic extracted from...
2059 (aarch64_can_change_mode_class): ...here. Extend the previous rules
2060 to allow changes between partial SVE modes and other modes if
2061 the other mode is no bigger than an element, and if no other rule
2062 prevents it. Use the aarch64_modes_tieable_p handling of
2063 partial Advanced SIMD structure modes.
2064 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
2065 Allow all vector mode ties that it allows.
2067 2023-11-05 Pan Li <pan2.li@intel.com>
2069 * config/riscv/autovec.md: Remove the size check of lrint.
2070 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
2072 (emit_vec_widden_cvt_x_f): New help emit func impl.
2073 (emit_vec_rounding_to_integer): New func impl to emit the
2074 rounding from FP to integer.
2075 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
2076 * config/riscv/vector.md: Take V_VLSF for vfncvt.
2078 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2080 * config/riscv/vector.md: Fix bug.
2082 2023-11-04 Sergei Trofimovich <siarheit@google.com>
2085 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
2088 2023-11-04 Pan Li <pan2.li@intel.com>
2090 * config/riscv/vector-iterators.md: Remove HF modes.
2092 2023-11-04 David Malcolm <dmalcolm@redhat.com>
2094 * diagnostic.cc: Include "pretty-print-urlifier.h".
2095 (diagnostic_context::initialize): Initialize m_urlifier.
2096 (diagnostic_context::finish): Clean up m_urlifier
2097 (diagnostic_report::diagnostic): m_urlifier to pp_format.
2098 * diagnostic.h (diagnostic_context::m_urlifier): New field.
2099 * gcc-urlifier.cc: New file.
2100 * gcc-urlifier.def: New file.
2101 * gcc-urlifier.h: New file.
2102 * gcc.cc: Include "gcc-urlifier.h".
2103 (driver::global_initializations): Initialize global_dc->m_urlifier.
2104 * pretty-print-urlifier.h: New file.
2105 * pretty-print.cc: Include "pretty-print-urlifier.h".
2106 (obstack_append_string): New.
2107 (urlify_quoted_string): New.
2108 (pp_format): Add "urlifier" param and use it to implement optional
2109 urlification of quoted text strings.
2110 (pp_output_formatted_text): Make buffer a const pointer.
2111 (selftest::pp_printf_with_urlifier): New.
2112 (selftest::test_urlification): New.
2113 (selftest::pretty_print_cc_tests): Call it.
2114 * pretty-print.h (class urlifier): New forward declaration.
2115 (pp_format): Add optional urlifier param.
2116 * selftest-run-tests.cc (selftest::run_tests): Call
2117 selftest::gcc_urlifier_cc_tests .
2118 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
2119 * toplev.cc: Include "gcc-urlifier.h".
2120 (general_init): Initialize global_dc->m_urlifier.
2122 2023-11-04 David Malcolm <dmalcolm@redhat.com>
2124 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
2127 2023-11-04 David Malcolm <dmalcolm@redhat.com>
2129 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
2130 to diagnostic-text-art.h.
2131 * coretypes.h (struct diagnostic_context): Replace forward decl
2133 (class diagnostic_context): ...this.
2134 * diagnostic-format-json.cc: Update for changes to
2136 * diagnostic-format-sarif.cc: Likewise.
2137 * diagnostic-show-locus.cc: Likewise.
2138 * diagnostic-text-art.h: Deleted file, moving content...
2139 (enum diagnostic_text_art_charset): ...to diagnostic.h,
2140 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
2141 (diagnostics_text_art_charset_init): ...deleting in favor of
2142 diagnostic_context::set_text_art_charset.
2143 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
2144 (pedantic_warning_kind): Update for field renaming.
2145 (permissive_error_kind): Likewise.
2146 (permissive_error_option): Likewise.
2147 (diagnostic_initialize): Convert to...
2148 (diagnostic_context::initialize): ...this, updating for field
2150 (diagnostic_color_init): Convert to...
2151 (diagnostic_context::color_init): ...this.
2152 (diagnostic_urls_init): Convert to...
2153 (diagnostic_context::urls_init): ...this.
2154 (diagnostic_initialize_input_context): Convert to...
2155 (diagnostic_context::initialize_input_context): ...this.
2156 (diagnostic_finish): Convert to...
2157 (diagnostic_context::finish): ...this, updating for field
2159 (diagnostic_context::set_output_format): New.
2160 (diagnostic_context::set_client_data_hooks): New.
2161 (diagnostic_context::create_edit_context): New.
2162 (diagnostic_converted_column): Convert to...
2163 (diagnostic_context::converted_column): ...this.
2164 (diagnostic_get_location_text): Update for field renaming.
2165 (diagnostic_check_max_errors): Convert to...
2166 (diagnostic_context::check_max_errors): ...this, updating for
2168 (diagnostic_action_after_output): Convert to...
2169 (diagnostic_context::action_after_output): ...this, updating for
2171 (last_module_changed_p): Delete.
2172 (set_last_module): Delete.
2173 (includes_seen): Convert to...
2174 (diagnostic_context::includes_seen_p): ...this, updating for field
2176 (diagnostic_report_current_module): Convert to...
2177 (diagnostic_context::report_current_module): ...this, updating for
2178 field renamings, and replacing uses of last_module_changed_p and
2179 set_last_module to simple field accesses.
2180 (diagnostic_show_any_path): Convert to...
2181 (diagnostic_context::show_any_path): ...this.
2182 (diagnostic_classify_diagnostic): Convert to...
2183 (diagnostic_context::classify_diagnostic): ...this, updating for
2185 (diagnostic_push_diagnostics): Convert to...
2186 (diagnostic_context::push_diagnostics): ...this, updating for field
2188 (diagnostic_pop_diagnostics): Convert to...
2189 (diagnostic_context::pop_diagnostics): ...this, updating for field
2191 (get_any_inlining_info): Convert to...
2192 (diagnostic_context::get_any_inlining_info): ...this, updating for
2194 (update_effective_level_from_pragmas): Convert to...
2195 (diagnostic_context::update_effective_level_from_pragmas):
2196 ...this, updating for field renamings.
2197 (print_any_cwe): Convert to...
2198 (diagnostic_context::print_any_cwe): ...this.
2199 (print_any_rules): Convert to...
2200 (diagnostic_context::print_any_rules): ...this.
2201 (print_option_information): Convert to...
2202 (diagnostic_context::print_option_information): ...this, updating
2203 for field renamings.
2204 (diagnostic_enabled): Convert to...
2205 (diagnostic_context::diagnostic_enabled): ...this, updating for
2207 (warning_enabled_at): Convert to...
2208 (diagnostic_context::warning_enabled_at): ...this.
2209 (diagnostic_report_diagnostic): Convert to...
2210 (diagnostic_context::report_diagnostic): ...this, updating for
2211 field renamings and conversions to member functions.
2212 (diagnostic_append_note): Update for field renaming.
2213 (diagnostic_impl): Use diagnostic_context::report_diagnostic
2215 (diagnostic_n_impl): Likewise.
2216 (diagnostic_emit_diagram): Convert to...
2217 (diagnostic_context::emit_diagram): ...this, updating for field
2219 (error_recursion): Convert to...
2220 (diagnostic_context::error_recursion): ...this.
2221 (diagnostic_text_output_format::~diagnostic_text_output_format):
2223 (diagnostics_text_art_charset_init): Convert to...
2224 (diagnostic_context::set_text_art_charset): ...this.
2225 (assert_location_text): Update for field renamings.
2226 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
2227 diagnostic-text-art.h.
2228 (struct diagnostic_context): Convert to...
2229 (class diagnostic_context): ...this.
2230 (diagnostic_context::ice_handler_callback_t): New typedef.
2231 (diagnostic_context::set_locations_callback_t): New typedef.
2232 (diagnostic_context::initialize): New decl.
2233 (diagnostic_context::color_init): New decl.
2234 (diagnostic_context::urls_init): New decl.
2235 (diagnostic_context::file_cache_init): New decl.
2236 (diagnostic_context::finish): New decl.
2237 (diagnostic_context::set_set_locations_callback): New.
2238 (diagnostic_context::initialize_input_context): New decl.
2239 (diagnostic_context::warning_enabled_at): New decl.
2240 (diagnostic_context::option_unspecified_p): New.
2241 (diagnostic_context::report_diagnostic): New decl.
2242 (diagnostic_context::report_current_module): New decl.
2243 (diagnostic_context::check_max_errors): New decl.
2244 (diagnostic_context::action_after_output): New decl.
2245 (diagnostic_context::classify_diagnostic): New decl.
2246 (diagnostic_context::push_diagnostics): New decl.
2247 (diagnostic_context::pop_diagnostics): New decl.
2248 (diagnostic_context::emit_diagram): New decl.
2249 (diagnostic_context::set_output_format): New decl.
2250 (diagnostic_context::set_text_art_charset): New decl.
2251 (diagnostic_context::set_client_data_hooks): New decl.
2252 (diagnostic_context::create_edit_context): New decl.
2253 (diagnostic_context::set_warning_as_error_requested): New.
2254 (diagnostic_context::set_report_bug): New.
2255 (diagnostic_context::set_extra_output_kind): New.
2256 (diagnostic_context::set_show_cwe): New.
2257 (diagnostic_context::set_show_rules): New.
2258 (diagnostic_context::set_path_format): New.
2259 (diagnostic_context::set_show_path_depths): New.
2260 (diagnostic_context::set_show_option_requested): New.
2261 (diagnostic_context::set_max_errors): New.
2262 (diagnostic_context::set_escape_format): New.
2263 (diagnostic_context::set_ice_handler_callback): New.
2264 (diagnostic_context::warning_as_error_requested_p): New.
2265 (diagnostic_context::show_path_depths_p): New.
2266 (diagnostic_context::get_path_format): New.
2267 (diagnostic_context::get_escape_format): New.
2268 (diagnostic_context::get_file_cache): New.
2269 (diagnostic_context::get_edit_context): New.
2270 (diagnostic_context::get_client_data_hooks): New.
2271 (diagnostic_context::get_diagram_theme): New.
2272 (diagnostic_context::converted_column): New decl.
2273 (diagnostic_context::diagnostic_count): New.
2274 (diagnostic_context::includes_seen_p): New decl.
2275 (diagnostic_context::print_any_cwe): New decl.
2276 (diagnostic_context::print_any_rules): New decl.
2277 (diagnostic_context::print_option_information): New decl.
2278 (diagnostic_context::show_any_path): New decl.
2279 (diagnostic_context::error_recursion): New decl.
2280 (diagnostic_context::diagnostic_enabled): New decl.
2281 (diagnostic_context::get_any_inlining_info): New decl.
2282 (diagnostic_context::update_effective_level_from_pragmas): New
2284 (diagnostic_context::m_file_cache): Make private.
2285 (diagnostic_context::diagnostic_count): Rename to...
2286 (diagnostic_context::m_diagnostic_count): ...this and make
2288 (diagnostic_context::warning_as_error_requested): Rename to...
2289 (diagnostic_context::m_warning_as_error_requested): ...this and
2291 (diagnostic_context::n_opts): Rename to...
2292 (diagnostic_context::m_n_opts): ...this and make private.
2293 (diagnostic_context::classify_diagnostic): Rename to...
2294 (diagnostic_context::m_classify_diagnostic): ...this and make
2296 (diagnostic_context::classification_history): Rename to...
2297 (diagnostic_context::m_classification_history): ...this and make
2299 (diagnostic_context::n_classification_history): Rename to...
2300 (diagnostic_context::m_n_classification_history): ...this and make
2302 (diagnostic_context::push_list): Rename to...
2303 (diagnostic_context::m_push_list): ...this and make private.
2304 (diagnostic_context::n_push): Rename to...
2305 (diagnostic_context::m_n_push): ...this and make private.
2306 (diagnostic_context::show_cwe): Rename to...
2307 (diagnostic_context::m_show_cwe): ...this and make private.
2308 (diagnostic_context::show_rules): Rename to...
2309 (diagnostic_context::m_show_rules): ...this and make private.
2310 (diagnostic_context::path_format): Rename to...
2311 (diagnostic_context::m_path_format): ...this and make private.
2312 (diagnostic_context::show_path_depths): Rename to...
2313 (diagnostic_context::m_show_path_depths): ...this and make
2315 (diagnostic_context::show_option_requested): Rename to...
2316 (diagnostic_context::m_show_option_requested): ...this and make
2318 (diagnostic_context::abort_on_error): Rename to...
2319 (diagnostic_context::m_abort_on_error): ...this.
2320 (diagnostic_context::show_column): Rename to...
2321 (diagnostic_context::m_show_column): ...this.
2322 (diagnostic_context::pedantic_errors): Rename to...
2323 (diagnostic_context::m_pedantic_errors): ...this.
2324 (diagnostic_context::permissive): Rename to...
2325 (diagnostic_context::m_permissive): ...this.
2326 (diagnostic_context::opt_permissive): Rename to...
2327 (diagnostic_context::m_opt_permissive): ...this.
2328 (diagnostic_context::fatal_errors): Rename to...
2329 (diagnostic_context::m_fatal_errors): ...this.
2330 (diagnostic_context::dc_inhibit_warnings): Rename to...
2331 (diagnostic_context::m_inhibit_warnings): ...this.
2332 (diagnostic_context::dc_warn_system_headers): Rename to...
2333 (diagnostic_context::m_warn_system_headers): ...this.
2334 (diagnostic_context::max_errors): Rename to...
2335 (diagnostic_context::m_max_errors): ...this and make private.
2336 (diagnostic_context::internal_error): Rename to...
2337 (diagnostic_context::m_internal_error): ...this.
2338 (diagnostic_context::option_enabled): Rename to...
2339 (diagnostic_context::m_option_enabled): ...this.
2340 (diagnostic_context::option_state): Rename to...
2341 (diagnostic_context::m_option_state): ...this.
2342 (diagnostic_context::option_name): Rename to...
2343 (diagnostic_context::m_option_name): ...this.
2344 (diagnostic_context::get_option_url): Rename to...
2345 (diagnostic_context::m_get_option_url): ...this.
2346 (diagnostic_context::print_path): Rename to...
2347 (diagnostic_context::m_print_path): ...this.
2348 (diagnostic_context::make_json_for_path): Rename to...
2349 (diagnostic_context::m_make_json_for_path): ...this.
2350 (diagnostic_context::x_data): Rename to...
2351 (diagnostic_context::m_client_aux_data): ...this.
2352 (diagnostic_context::last_location): Rename to...
2353 (diagnostic_context::m_last_location): ...this.
2354 (diagnostic_context::last_module): Rename to...
2355 (diagnostic_context::m_last_module): ...this and make private.
2356 (diagnostic_context::lock): Rename to...
2357 (diagnostic_context::m_lock): ...this and make private.
2358 (diagnostic_context::lang_mask): Rename to...
2359 (diagnostic_context::m_lang_mask): ...this.
2360 (diagnostic_context::inhibit_notes_p): Rename to...
2361 (diagnostic_context::m_inhibit_notes_p): ...this.
2362 (diagnostic_context::report_bug): Rename to...
2363 (diagnostic_context::m_report_bug): ...this and make private.
2364 (diagnostic_context::extra_output_kind): Rename to...
2365 (diagnostic_context::m_extra_output_kind): ...this and make
2367 (diagnostic_context::column_unit): Rename to...
2368 (diagnostic_context::m_column_unit): ...this and make private.
2369 (diagnostic_context::column_origin): Rename to...
2370 (diagnostic_context::m_column_origin): ...this and make private.
2371 (diagnostic_context::tabstop): Rename to...
2372 (diagnostic_context::m_tabstop): ...this and make private.
2373 (diagnostic_context::escape_format): Rename to...
2374 (diagnostic_context::m_escape_format): ...this and make private.
2375 (diagnostic_context::edit_context_ptr): Rename to...
2376 (diagnostic_context::m_edit_context_ptr): ...this and make
2378 (diagnostic_context::set_locations_cb): Rename to...
2379 (diagnostic_context::m_set_locations_cb): ...this and make
2381 (diagnostic_context::ice_handler_cb): Rename to...
2382 (diagnostic_context::m_ice_handler_cb): ...this and make private.
2383 (diagnostic_context::includes_seen): Rename to...
2384 (diagnostic_context::m_includes_seen): ...this and make private.
2385 (diagnostic_inhibit_notes): Update for field renaming.
2386 (diagnostic_context_auxiliary_data): Likewise.
2387 (diagnostic_abort_on_error): Convert from macro to inline function
2388 and update for field renaming.
2389 (diagnostic_kind_count): Convert from macro to inline function and
2390 use diagnostic_count accessor.
2391 (diagnostic_report_warnings_p): Update for field renaming.
2392 (diagnostic_initialize): Convert decl to inline function calling
2393 into diagnostic_context.
2394 (diagnostic_color_init): Likewise.
2395 (diagnostic_urls_init): Likewise.
2396 (diagnostic_urls_init): Likewise.
2397 (diagnostic_finish): Likewise.
2398 (diagnostic_report_current_module): Likewise.
2399 (diagnostic_show_any_path): Delete decl.
2400 (diagnostic_initialize_input_context): Convert decl to inline
2401 function calling into diagnostic_context.
2402 (diagnostic_classify_diagnostic): Likewise.
2403 (diagnostic_push_diagnostics): Likewise.
2404 (diagnostic_pop_diagnostics): Likewise.
2405 (diagnostic_report_diagnostic): Likewise.
2406 (diagnostic_action_after_output): Likewise.
2407 (diagnostic_check_max_errors): Likewise.
2408 (diagnostic_file_cache_fini): Delete decl.
2409 (diagnostic_converted_column): Delete decl.
2410 (warning_enabled_at): Convert decl to inline function calling into
2412 (option_unspecified_p): New.
2413 (diagnostic_emit_diagram): Delete decl.
2414 * gcc.cc: Remove include of "diagnostic-text-art.h".
2415 Update for changes to diagnostic_context.
2416 * input.cc (diagnostic_file_cache_init): Move implementation
2418 (diagnostic_context::file_cache_init): ...this new member
2420 (diagnostic_file_cache_fini): Delete.
2421 (diagnostics_file_cache_forcibly_evict_file): Update for
2422 m_file_cache becoming private.
2423 (location_get_source_line): Likewise.
2424 (get_source_file_content): Likewise.
2425 (location_missing_trailing_newline): Likewise.
2426 * input.h (diagnostics_file_cache_fini): Delete.
2427 * langhooks.cc: Update for changes to diagnostic_context.
2428 * lto-wrapper.cc: Likewise.
2429 * opts.cc: Remove include of "diagnostic-text-art.h".
2430 Update for changes to diagnostic_context.
2431 * selftest-diagnostic.cc: Update for changes to
2433 * toplev.cc: Likewise.
2434 * tree-diagnostic-path.cc: Likewise.
2435 * tree-diagnostic.cc: Likewise.
2437 2023-11-03 Martin Uecker <uecker@tugraz.at>
2440 * gimple-ssa-warn-access.cc
2441 (pass_waccess::maybe_check_access_sizes): For VLA bounds
2442 in parameters, only warn about null pointers with 'static'.
2444 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
2446 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
2447 calls to use masked simdclones.
2449 2023-11-03 David Malcolm <dmalcolm@redhat.com>
2451 * diagnostic.cc (diagnostic_initialize): Update for consolidation
2452 of group-based fields.
2453 (diagnostic_report_diagnostic): Likewise.
2454 (diagnostic_context::begin_group): New, based on body of
2455 auto_diagnostic_group's ctor.
2456 (diagnostic_context::end_group): New, based on body of
2457 auto_diagnostic_group's dtor.
2458 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
2460 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
2462 * diagnostic.h (diagnostic_context::begin_group): New decl.
2463 (diagnostic_context::end_group): New decl.
2464 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
2465 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
2467 (diagnostic_context::diagnostic_group_emission_count): Rename
2469 (diagnostic_context::m_diagnostic_groups::m_emission_count):
2472 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
2474 PR tree-optimization/111766
2475 * range-op.cc (operator_equal::fold_range): Check constants
2476 against the bitmask.
2477 (operator_not_equal::fold_range): Ditto.
2478 * value-range.h (irange_bitmask::member_p): New.
2480 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
2482 * value-range.cc (irange_bitmask::adjust_range): New.
2483 (irange::intersect_bitmask): Call adjust_range.
2484 * value-range.h (irange_bitmask::adjust_range): New prototype.
2486 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
2488 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
2490 (ix86_memory_address_reg_class): ... this. Generalize address
2491 register class handling to allow multiple address register classes.
2492 Return maximal class for unrecognized instructions. Improve comments.
2493 (ix86_insn_base_reg_class): Rewrite to handle
2494 multiple address register classes.
2495 (ix86_regno_ok_for_insn_base_p): Ditto.
2496 (ix86_insn_index_reg_class): Ditto.
2497 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
2498 and substitute its values with "0" -> "gpr16", "1" -> "*".
2499 (addr): New attribute to limit allowed address register set.
2501 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
2502 and substitute its values with "0" -> "gpr16", "1" -> "*".
2503 * config/i386/sse.md: Ditto.
2505 2023-11-03 Richard Biener <rguenther@suse.de>
2507 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
2510 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
2512 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
2513 (adddi3): Change define_expand to generate a *adddi3.
2514 (*adddi3): New define_insn_and_split to lower DImode additions
2515 during the split1 pass (after combine and before reload).
2516 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
2517 for DImode left shifts by a single bit.
2518 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
2519 left shifts by one bit to an *adddi3.
2521 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
2523 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
2524 can_create_pseudo_p condition.
2526 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2528 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
2529 * tree-vect-stmts.cc (vectorizable_load): Ditto.
2531 2023-11-03 Richard Biener <rguenther@suse.de>
2533 PR tree-optimization/112366
2534 * tree-vect-loop.cc (vectorizable_live_operation): Remove
2537 2023-11-03 Richard Biener <rguenther@suse.de>
2539 PR tree-optimization/112310
2540 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
2541 of expressions, validate dependences are contained within
2542 the hoistable set before hoisting.
2544 2023-11-03 Pan Li <pan2.li@intel.com>
2546 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
2547 (lround<mode><v_i_l_ll_convert>2): Ditto.
2548 (lceil<mode><v_i_l_ll_convert>2): Ditto.
2549 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
2550 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
2552 (lround<mode><v_f2si_convert>2): Ditto.
2553 (lceil<mode><v_f2si_convert>2): Ditto.
2554 (lfloor<mode><v_f2si_convert>2): Ditto.
2555 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
2557 (lround<mode><v_f2di_convert>2): Ditto.
2558 (lceil<mode><v_f2di_convert>2): Ditto.
2559 (lfloor<mode><v_f2di_convert>2): Ditto.
2560 * config/riscv/vector-iterators.md: Renew iterators for both
2563 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2566 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
2567 (simplify_replace_vlmax_avl): Ditto.
2568 (pass_avlprop::execute): Add immediate AVL simplification.
2569 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
2570 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
2572 (emit_vlmax_insn): Adapt for new interface name.
2573 * config/riscv/vector.md (mode_idx): New attribute.
2575 2023-11-03 Pan Li <pan2.li@intel.com>
2578 2023-11-02 Pan Li <pan2.li@intel.com>
2580 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
2581 (lround<mode><v_i_l_ll_convert>2): Ditto.
2582 (lceil<mode><v_i_l_ll_convert>2): Ditto.
2583 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
2584 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
2586 (lround<mode><v_f2si_convert>2): Ditto.
2587 (lceil<mode><v_f2si_convert>2): Ditto.
2588 (lfloor<mode><v_f2si_convert>2): Ditto.
2589 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
2591 (lround<mode><v_f2di_convert>2): Ditto.
2592 (lceil<mode><v_f2di_convert>2): Ditto.
2593 (lfloor<mode><v_f2di_convert>2): Ditto.
2594 * config/riscv/vector-iterators.md: Renew iterators for both
2597 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
2599 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
2601 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
2603 * config/h8300/combiner.md: Add new patterns for single bit
2606 2023-11-02 Pan Li <pan2.li@intel.com>
2608 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
2609 (lround<mode><v_i_l_ll_convert>2): Ditto.
2610 (lceil<mode><v_i_l_ll_convert>2): Ditto.
2611 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
2612 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
2614 (lround<mode><v_f2si_convert>2): Ditto.
2615 (lceil<mode><v_f2si_convert>2): Ditto.
2616 (lfloor<mode><v_f2si_convert>2): Ditto.
2617 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
2619 (lround<mode><v_f2di_convert>2): Ditto.
2620 (lceil<mode><v_f2di_convert>2): Ditto.
2621 (lfloor<mode><v_f2di_convert>2): Ditto.
2622 * config/riscv/vector-iterators.md: Renew iterators for both
2625 2023-11-02 Sam James <sam@gentoo.org>
2627 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
2628 as this has become the standard term for what we're doing here.
2630 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2632 * config/riscv/riscv-avlprop.cc
2633 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
2634 non-real insn AVL propation.
2636 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
2638 PR middle-end/111401
2639 * internal-fn.cc (internal_fn_else_index): New function.
2640 * internal-fn.h (internal_fn_else_index): Define.
2641 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
2643 (predicate_scalar_phi): Add whitespace.
2644 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
2645 (neutral_op_for_reduction): Return -0 for PLUS.
2646 (check_reduction_path): Don't count else operand in COND_OP.
2647 (vect_is_simple_reduction): Ditto.
2648 (vect_create_epilog_for_reduction): Fix whitespace.
2649 (vectorize_fold_left_reduction): Add COND_OP handling.
2650 (vectorizable_reduction): Don't count else operand in COND_OP.
2651 (vect_transform_reduction): Add COND_OP handling.
2652 * tree-vectorizer.h (neutral_op_for_reduction): Add default
2655 2023-11-02 Richard Biener <rguenther@suse.de>
2657 PR tree-optimization/112320
2658 * gimple-fold.h (rewrite_to_defined_overflow): New overload
2659 for in-place operation.
2660 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
2661 iterator argument to worker, define separate API for
2662 in-place and not in-place operation.
2663 * tree-if-conv.cc (predicate_statements): Simplify.
2664 * tree-scalar-evolution.cc (final_value_replacement_loop):
2666 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
2667 * tree-ssa-reassoc.cc (update_range_test): Likewise.
2669 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
2671 * config/i386/i386.md: Move stack protector patterns
2672 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
2674 2023-11-02 liuhongt <hongtao.liu@intel.com>
2676 * config/i386/mmx.md (cmlav4hf4): New expander.
2677 (cmla_conjv4hf4): Ditto.
2679 (cmul_conjv4hf3): Ditto.
2681 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2683 * config/riscv/vector.md: Fix redundant codes in attributes.
2685 2023-11-02 xuli <xuli1@eswincomputing.com>
2687 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
2688 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
2689 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
2690 * config/riscv/riscv-vector-builtins.cc: Add arg types.
2692 2023-11-02 Pan Li <pan2.li@intel.com>
2694 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
2695 size check for vectype_out doesn't participating for optab query.
2696 (vectorizable_call): Remove the type size check.
2698 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2701 * config/riscv/vector.md: Add '0'.
2703 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
2706 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
2707 as operands[2] with predicate register_operand must be !MEM_P.
2708 (peephole2): Optimize a mulx followed by a register-to-register
2709 move, to place result in the correct destination if possible.
2711 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
2713 * config/riscv/sync.md: Use riscv_subword_address function to
2714 calculate the address and shift in atomic_test_and_set.
2716 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
2718 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
2719 returned for libcall case.
2721 2023-11-01 Martin Uecker <uecker@tugraz.at>
2724 * doc/invoke.texi: Document -Walloc-size option.
2726 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
2728 * genautomata.cc (write_automata): move endif
2730 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
2732 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
2733 create return array and don't return new type.
2734 (simd_clone_adjust_argument_types): Hoist out code that creates
2735 ipa_param_body_adjustments and don't return them.
2736 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
2737 argument types have been vectorized, create adjustments and return array
2739 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
2740 argument types have been vectorized.
2742 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
2745 * config/i386/i386.md (stack_protexct_set_2 peephole2):
2746 Use general_gr_operand as operand 4 predicate.
2748 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
2750 * config/i386/i386.md (stack_protect_set): Explicitly
2751 generate scratch register in word mode.
2752 (@stack_protect_set_1_<mode>): Rename to ...
2753 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
2754 Use SWI48 mode iterator to match scratch register.
2755 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
2756 iterators to match peephole sequence. Use general_operand
2757 predicate for operand 4. Allow different operand 2 and operand 3
2758 registers and use peep2_reg_dead_p to ensure new scratch
2759 register is dead before peephole seqeunce. Use peep2_reg_dead_p
2760 to ensure old scratch register is dead after peephole sequence.
2761 (*stack_protect_set_2_<mode>): Rename to ...
2762 (*stack_protect_set_2_<mode>_si): .. this.
2763 (*stack_protect_set_3): Rename to ...
2764 (*stack_protect_set_2_<mode>_di): ... this.
2765 Use PTR mode iterator to match stack protector memory move.
2766 Use earlyclobber for all alternatives of operand 1.
2767 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
2768 iterators to match peephole sequence. Use general_operand
2769 predicate for operand 4. Allow different operand 2 and operand 3
2770 registers and use peep2_reg_dead_p to ensure new scratch
2771 register is dead before peephole seqeunce. Use peep2_reg_dead_p
2772 to ensure old scratch register is dead after peephole sequence.
2774 2023-11-01 xuli <xuli1@eswincomputing.com>
2776 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
2777 intrinsics for tuple types.
2778 * config/riscv/riscv-vector-builtins.cc: Ditto.
2779 * config/riscv/vector.md (@vundefined<mode>): Ditto.
2781 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2783 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
2785 2023-10-31 David Malcolm <dmalcolm@redhat.com>
2787 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
2789 2023-10-31 David Malcolm <dmalcolm@redhat.com>
2791 * input.cc (dump_location_info): Update for removal of
2792 MACRO_MAP_EXPANSION_POINT_LOCATION.
2793 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
2796 2023-10-31 David Malcolm <dmalcolm@redhat.com>
2798 * opts.cc (get_option_url): Update comment; the requirement to
2799 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
2800 r10-8065-ge33a1eae25b8a8.
2802 2023-10-31 David Malcolm <dmalcolm@redhat.com>
2804 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
2805 m_skipping_null_url.
2806 (pp_begin_url): Handle URL being null.
2807 (pp_end_url): Likewise.
2808 (selftest::test_null_urls): New.
2809 (selftest::pretty_print_cc_tests): Call it.
2810 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
2812 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2814 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
2815 (vect_build_slp_tree_1): Ditto.
2816 (vect_build_slp_tree_2): Ditto.
2818 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
2820 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
2821 * config/bpf/bpf-protos.h: Added prototype for new pass.
2822 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
2823 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
2825 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
2827 (is_attr_preserve_access): Improved check.
2828 (core_field_info): Make use of root_for_core_field_info
2830 (process_field_expr): Adapted to new functions.
2831 (pack_type): Small improvement.
2832 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
2833 (bpf_init_core_builtins): Changed to new function names.
2834 (construct_builtin_core_reloc): Improved implementation.
2835 (bpf_resolve_overloaded_core_builtin): Changed how
2836 __builtin_preserve_access_index is converted.
2837 (compute_field_expr): Corrected implementation. Added
2838 access_node argument.
2839 (bpf_core_get_index): Added valid argument.
2840 (root_for_core_field_info, pack_field_expr)
2841 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
2842 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
2843 (core_access_clean, core_is_access_index, core_mark_as_access_index)
2844 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
2845 (make_pass_lower_bpf_core): Added functions.
2846 (pass_data_lower_bpf_core): New pass struct.
2847 (pass_lower_bpf_core): New gimple_opt_pass class.
2848 (pack_field_expr_for_preserve_field)
2849 (bpf_replace_core_move_operands): Removed function.
2850 (bpf_enum_value_kind): Added GTY(()).
2851 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
2852 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
2853 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
2855 2023-10-31 Neal Frager <neal.frager@amd.com>
2857 * config/microblaze/microblaze.cc: Fix mcpu version check.
2859 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
2861 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
2862 TARGET_ATOMIC constraint
2863 (atomic_store_rvwmo<mode>): Ditto.
2864 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
2865 (atomic_store_ztso<mode>): Ditto.
2866 * config/riscv/sync.md (atomic_load<mode>): Ditto.
2867 (atomic_store<mode>): Ditto.
2869 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
2871 * config/riscv/riscv.cc (riscv_index_reg_class):
2872 Return GR_REGS for XTheadFMemIdx.
2873 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
2874 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
2875 * config/riscv/thead.cc (is_fmemidx_mode): New function.
2876 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
2877 (th_fmemidx_output_index): New function.
2878 (th_output_move): Add support for XTheadFMemIdx.
2879 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
2880 (TH_M_NOEXTF): Likewise.
2881 (*th_fmemidx_movsf_hardfloat): New INSN.
2882 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
2883 (*th_fmemidx_I_a): Likewise.
2884 (*th_fmemidx_I_c): Likewise.
2885 (*th_fmemidx_US_a): Likewise.
2886 (*th_fmemidx_US_c): Likewise.
2887 (*th_fmemidx_UZ_a): Likewise.
2888 (*th_fmemidx_UZ_c): Likewise.
2890 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
2892 * config/riscv/constraints.md (th_m_mia): New constraint.
2893 (th_m_mib): Likewise.
2894 (th_m_mir): Likewise.
2895 (th_m_miu): Likewise.
2896 * config/riscv/riscv-protos.h (enum riscv_address_type):
2897 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
2898 and ADDRESS_REG_WB and their documentation.
2899 (struct riscv_address_info): Add new field 'shift' and
2900 document the field usage for the new address types.
2901 (riscv_valid_base_register_p): New prototype.
2902 (th_memidx_legitimate_modify_p): Likewise.
2903 (th_memidx_legitimate_index_p): Likewise.
2904 (th_classify_address): Likewise.
2905 (th_output_move): Likewise.
2906 (th_print_operand_address): Likewise.
2907 * config/riscv/riscv.cc (riscv_index_reg_class):
2908 Return GR_REGS for XTheadMemIdx.
2909 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
2910 (riscv_classify_address): Call th_classify_address() on top.
2911 (riscv_output_move): Call th_output_move() on top.
2912 (riscv_print_operand_address): Call th_print_operand_address()
2914 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
2915 (HAVE_PRE_MODIFY_DISP): Likewise.
2916 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
2918 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
2919 create INSN with same name and disable it for XTheadMemIdx.
2920 (extendsidi2): Likewise.
2921 (*extendsidi2_internal): Disable for XTheadMemIdx.
2922 * config/riscv/thead.cc (valid_signed_immediate): New helper
2924 (th_memidx_classify_address_modify): New function.
2925 (th_memidx_legitimate_modify_p): Likewise.
2926 (th_memidx_output_modify): Likewise.
2927 (is_memidx_mode): Likewise.
2928 (th_memidx_classify_address_index): Likewise.
2929 (th_memidx_legitimate_index_p): Likewise.
2930 (th_memidx_output_index): Likewise.
2931 (th_classify_address): Likewise.
2932 (th_output_move): Likewise.
2933 (th_print_operand_address): Likewise.
2934 * config/riscv/thead.md (*th_memidx_operand): New splitter.
2935 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
2936 (*th_memidx_extendsidi2): Likewise.
2937 (*th_memidx_zero_extendsidi2): Likewise.
2938 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
2939 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
2940 (*th_memidx_bb_zero_extendsidi2): Likewise.
2941 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
2942 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
2943 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
2944 (TH_M_ANYI): New mode iterator.
2945 (TH_M_NOEXTI): Likewise.
2946 (*th_memidx_I_a): New combiner optimization.
2947 (*th_memidx_I_b): Likewise.
2948 (*th_memidx_I_c): Likewise.
2949 (*th_memidx_US_a): Likewise.
2950 (*th_memidx_US_b): Likewise.
2951 (*th_memidx_US_c): Likewise.
2952 (*th_memidx_UZ_a): Likewise.
2953 (*th_memidx_UZ_b): Likewise.
2954 (*th_memidx_UZ_c): Likewise.
2956 2023-10-31 Carl Love <cel@us.ibm.com>
2958 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
2959 documentation for the builti-ins.
2961 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
2963 PR rtl-optimization/111971
2964 * lra-constraints.cc: (process_alt_operands): Don't check start
2965 hard regs for regs originated from register variables.
2967 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
2969 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
2971 (cond_<ieee_fmaxmin_op><mode>): Ditto.
2972 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
2973 (reduc_fmax_scal_<mode>): Ditto.
2974 (reduc_fmin_scal_<mode>): Ditto.
2975 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
2976 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
2977 (UNSPEC_VFMIN): Ditto.
2978 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
2979 UNSPEC insn patterns.
2980 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
2982 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
2986 * Makefile.in: Handle split insn-emit.cc.
2987 * configure: Regenerate.
2988 * configure.ac: Add --with-insnemit-partitions.
2989 * genemit.cc (output_peephole2_scratches): Print to file instead
2991 (print_code): Ditto.
2992 (gen_rtx_scratch): Ditto.
2994 (gen_emit_seq): Ditto.
2995 (emit_c_code): Ditto.
2997 (gen_expand): Ditto.
2999 (output_add_clobbers): Ditto.
3000 (output_added_clobbers_hard_reg_p): Ditto.
3001 (print_overload_arguments): Ditto.
3002 (print_overload_test): Ditto.
3003 (handle_overloaded_code_for): Ditto.
3004 (handle_overloaded_gen): Ditto.
3005 (print_header): New function.
3006 (handle_arg): New function.
3007 (main): Split output into 10 files.
3008 * gensupport.cc (count_patterns): New function.
3009 * gensupport.h (count_patterns): Define.
3010 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
3011 * read-md.h (class md_reader): Change definition.
3013 2023-10-31 Alexandre Oliva <oliva@adacore.com>
3015 PR tree-optimization/111943
3016 * gimple-harden-control-flow.cc: Adjust copyright year.
3017 (rt_bb_visited): Add vfalse and vtrue data members.
3018 Zero-initialize them in the ctor.
3019 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
3020 abnormal edges, insert initializers for vfalse and vtrue on
3021 entry, and insert the check sequence guarded by a conditional
3024 2023-10-31 Richard Biener <rguenther@suse.de>
3026 PR tree-optimization/112305
3027 * tree-scalar-evolution.h (expression_expensive): Adjust.
3028 * tree-scalar-evolution.cc (expression_expensive): Record
3029 when we see a COND_EXPR.
3030 (final_value_replacement_loop): When the replacement contains
3031 a COND_EXPR, rewrite it to defined overflow.
3032 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
3034 2023-10-31 Xi Ruoyao <xry111@xry111.site>
3037 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
3040 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
3042 * gimple-match.h (gimple_match_op::gimple_match_op):
3043 Add interfaces for more arguments.
3044 (gimple_match_op::set_op): Add interfaces for more arguments.
3045 * match.pd: Add support of combining cond_len_op + vec_cond
3047 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
3049 * config/i386/avx512cdintrin.h (target): Push evex512 for
3051 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
3053 * config/i386/i386-builtin.def (BDESC): Do not check evex512
3054 for builtins not needed.
3056 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
3058 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
3059 Change to define_expand.
3061 2023-10-31 liuhongt <hongtao.liu@intel.com>
3064 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
3065 define_split to define_insn_and_split to handle
3066 immediate_operand for comparison.
3067 (*mmx_pblendvb_v8qi_2): Ditto.
3068 (*mmx_pblendvb_<mode>_1): Ditto.
3069 (*mmx_pblendvb_v4qi_2): Ditto.
3070 (<code><mode>3): Remove define_split after it.
3071 (<code>v8qi3): Ditto.
3072 (<code><mode>3): Ditto.
3073 (<ode>v2hi3): Ditto.
3075 2023-10-31 Andrew Pinski <pinskia@gmail.com>
3077 * match.pd (`a == 1 ? b : a OP b`): New pattern.
3078 (`a == -1 ? b : a & b`): New pattern.
3080 2023-10-31 Andrew Pinski <pinskia@gmail.com>
3082 * match.pd: (`a == 0 ? b : b + a`,
3083 `a == 0 ? b : b - a`): New patterns.
3085 2023-10-31 Neal Frager <neal.frager@amd.com>
3087 * config/microblaze/microblaze.cc: Fix mcpu version check.
3089 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
3091 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
3092 * common/config/i386/i386-common.cc: Add yongfeng.
3093 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
3094 Add ZHAOXIN_FAM7H_YONGFENG.
3095 * config.gcc: Add yongfeng.
3096 * config/i386/driver-i386.cc (host_detect_local_cpu):
3097 Let -march=native recognize yongfeng processors.
3098 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
3099 * config/i386/i386-options.cc (m_YONGFENG): New definition.
3101 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
3102 * config/i386/i386.md: Add yongfeng.
3103 * config/i386/lujiazui.md: Fix typo.
3104 * config/i386/x86-tune-costs.h (struct processor_costs):
3106 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
3107 (ix86_adjust_cost): Ditto.
3108 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
3109 m_LUJIAZUI with m_ZHAOXIN.
3110 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
3111 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
3112 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
3113 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
3114 (X86_TUNE_MOVX): Ditto.
3115 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
3116 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
3117 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
3118 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
3119 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
3120 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
3121 (X86_TUNE_USE_LEAVE): Ditto.
3122 (X86_TUNE_PUSH_MEMORY): Ditto.
3123 (X86_TUNE_LCP_STALL): Ditto.
3124 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
3125 (X86_TUNE_OPT_AGU): Ditto.
3126 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
3127 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
3128 (X86_TUNE_USE_SAHF): Ditto.
3129 (X86_TUNE_USE_BT): Ditto.
3130 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
3131 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
3132 (X86_TUNE_AVOID_MFENCE): Ditto.
3133 (X86_TUNE_EXPAND_ABS): Ditto.
3134 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
3135 (X86_TUNE_USE_FFREEP): Ditto.
3136 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
3137 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
3138 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
3139 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
3140 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
3141 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
3142 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
3143 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
3144 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
3145 * doc/extend.texi: Add details about yongfeng.
3146 * doc/invoke.texi: Ditto.
3147 * config/i386/yongfeng.md: New file to describe yongfeng processor.
3149 2023-10-30 Martin Jambor <mjambor@suse.cz>
3152 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
3153 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
3154 (update_signature): Mark any any IPA-CP aggregate constants at
3155 positions known to be killed as killed. Move check that there is
3156 clone_info after this pruning.
3157 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
3158 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
3159 (push_agg_values_from_plats): Likewise.
3160 (ipa_push_agg_values_from_jfunc): Likewise.
3161 (estimate_local_effects): Likewise.
3162 (push_agg_values_for_index_from_edge): Likewise.
3163 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
3165 (read_ipcp_transformation_info): Likewise.
3166 (ipcp_get_aggregate_const): Update comment, assert that encountered
3167 record does not have killed flag set.
3168 (ipcp_transform_function): Prune all aggregate constants with killed
3171 2023-10-30 Martin Jambor <mjambor@suse.cz>
3174 * ipa-prop.h (ipcp_transformation): New member function template
3176 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
3177 filter aggreagate constants.
3179 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
3181 PR middle-end/101955
3182 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
3183 to convert sign extract of the least significant bit into an
3184 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
3186 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
3188 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
3189 Provide reasonable values for SHIFTS and ROTATES by constant
3190 bit counts depending upon TARGET_BARREL_SHIFTER.
3191 (arc_insn_cost): Use insn attributes if the instruction is
3192 recognized. Avoid calling get_attr_length for type "multi",
3193 i.e. define_insn_and_split patterns without explicit type.
3194 Fall-back to set_rtx_cost for single_set and pattern_cost
3196 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
3197 (BRANCH_COST): Improve/correct definition.
3198 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
3200 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
3202 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
3203 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
3204 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
3205 (arc_split_rotl): Use swap on TARGET_SWAP.
3206 (arc_split_rotr): Likewise.
3207 * config/arc/arc.md (ANY_ROTATE): New code iterator.
3208 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
3209 swap instruction on TARGET_SWAP.
3210 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
3211 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
3212 (*ashlsi2_cnt16): See above.
3214 2023-10-30 Richard Ball <richard.ball@arm.com>
3216 * config/arm/aout.h: Change to use the Lrtx label.
3217 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
3218 from (!target_pure_code) condition.
3219 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
3220 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
3221 .Lrtx label and remove adr instructions.
3223 (arm_casesi_internal): Use force_reg to generate ldr instructions that
3224 would otherwise be out of range, and change rtl to accommodate force reg.
3225 Additionally remove unnecessary register temp.
3226 (casesi): Remove pure code check for Arm.
3227 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
3228 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
3230 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
3233 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
3234 xor to an equality and fix comment indentation.
3236 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3238 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
3239 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
3240 * config/riscv/vector.md: Ditto.
3242 2023-10-30 liuhongt <hongtao.liu@intel.com>
3245 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
3246 512-bit vector with vpcmpeq + kortest.
3247 * config/i386/i386.md (cbranchxi4): New expander.
3248 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
3251 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
3254 * expr.cc (qi_vector_mode_supported_p): Rename to...
3255 (by_pieces_mode_supported_p): ...this, and extends it to do
3256 the checking for both scalar and vector mode.
3257 (widest_fixed_size_mode_for_size): Call
3258 by_pieces_mode_supported_p to examine the mode.
3259 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
3261 2023-10-29 Martin Uecker <uecker@tugraz.at>
3263 PR tree-optimization/109334
3264 * tree-object-size.cc (parm_object_size): Allow size
3265 computation for implicit access attributes.
3267 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
3269 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
3270 260000 (which corresponds to RF-2014.0) to 270000 (which
3271 corresponds to RG-2015.0, the release where salt/saltu opcodes
3274 2023-10-29 Pan Li <pan2.li@intel.com>
3276 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
3277 reference type to prevent copying.
3279 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
3281 PR rtl-optimization/112107
3282 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
3285 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
3288 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
3291 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
3293 * config/gcn/gcn-valu.md
3294 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
3295 condition to silence the warnings.
3296 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
3297 * config/gcn/gcn.md (*movti_insn): Likewise.
3299 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
3301 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
3304 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
3306 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
3307 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
3309 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
3311 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
3312 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
3314 (expand_rawmemchr): Define.
3315 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
3317 (expand_block_move): Move from here...
3318 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
3319 (expand_rawmemchr): Add vectorized expander.
3320 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
3322 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
3324 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
3325 Process reg equivalence invariants.
3327 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
3329 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
3330 i386: Fiy typo in "partial_memory_read_stall" tune option.
3332 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
3334 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
3335 support for CONST_STRING.
3337 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
3340 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
3341 2 take "regiser_operand" and "nonimmediate_operand" respectively.
3342 (<u>mulqihi3): Likewise.
3343 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
3344 matching the %d constraint. Use umul_highpart RTX to represent
3345 the highpart multiplication.
3346 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
3347 predicate, and "a" rather than "0" as operands 0 and 2 have
3349 (define_split): For mul to mulx conversion, use the new
3350 umul_highpart RTX representation.
3351 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
3352 and the constraint %a as operands 0 and 1 have different modes.
3353 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
3355 (define_peephole2): Providing widening multiplication variants
3356 of the peephole2s that tweak highpart multiplication register
3359 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
3361 PR preprocessor/87299
3362 * toplev.cc (no_backend): New static global.
3363 (finalize): Remove argument no_backend, which is now a
3365 (process_options): Likewise.
3366 (do_compile): Likewise.
3367 (target_reinit): Don't do anything in preprocess-only mode.
3368 (toplev::main): Adapt to no_backend change.
3369 (toplev::finalize): Likewise.
3371 2023-10-27 Andrew Pinski <apinski@marvell.com>
3373 PR tree-optimization/101590
3374 PR tree-optimization/94884
3375 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
3377 2023-10-27 liuhongt <hongtao.liu@intel.com>
3380 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
3381 V2HF/V2BF/V4HF/V4BFmode.
3382 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
3383 data_mode is V4HF/V2HFmode.
3384 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
3385 (vcond_mask_<mode>v4hi): Ditto.
3386 (vcond_mask_<mode>qi): Ditto.
3387 (vec_cmpv2hfqi): Ditto.
3388 (vcond_mask_<mode>v2hi): Ditto.
3389 (mmx_plendvb_<mode>): Add 2 combine splitters after the
3391 (mmx_pblendvb_v8qi): Ditto.
3392 (<code>v2hi3): Add a combine splitter after the pattern.
3393 (<code><mode>3): Ditto.
3394 (<code>v8qi3): Ditto.
3395 (<code><mode>3): Ditto.
3396 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
3397 (vcond<sseintvecmodelower><mode>): .. this into ..
3398 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
3399 and extend to V8BF/V16BF/V32BFmode.
3401 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3403 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
3404 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
3405 (autovectorize_vector_modes): Ditto.
3406 (can_find_related_mode_p): Ditto.
3408 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3412 * config.gcc: Add AVL propagation pass.
3413 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
3414 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
3415 * config/riscv/t-riscv: Ditto.
3416 * config/riscv/riscv-avlprop.cc: New file.
3418 2023-10-26 David Malcolm <dmalcolm@redhat.com>
3420 * doc/extend.texi (Common Function Attributes): Add
3421 null_terminated_string_arg.
3423 2023-10-26 Andrew Pinski <pinskia@gmail.com>
3425 PR tree-optimization/111957
3426 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
3428 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
3430 * range-op-float.cc (range_operator::fold_range): Delete unused
3433 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
3435 * range-op-float.cc (range_operator::fold_range): Remove
3437 (range_operator::rv_fold): Remove unneeded arguments.
3438 (operator_plus::rv_fold): Same.
3439 (operator_minus::rv_fold): Same.
3440 (operator_mult::rv_fold): Same.
3441 (operator_div::rv_fold): Same.
3442 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
3446 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
3448 * range-op-float.cc (range_operator::fold_range): Pass frange
3449 argument to rv_fold.
3450 (range_operator::rv_fold): Add frange argument.
3451 (operator_plus::rv_fold): Same.
3452 (operator_minus::rv_fold): Same.
3453 (operator_mult::rv_fold): Same.
3454 (operator_div::rv_fold): Same.
3455 * range-op-mixed.h: Add frange argument to rv_fold methods.
3458 2023-10-26 Richard Ball <richard.ball@arm.com>
3460 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
3461 for different machine modes for arm.
3462 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
3463 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
3464 ASM_OUTPUT_ADDR_DIFF_ELT.
3465 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
3467 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
3469 * config/arm/arm.cc (arm_output_casesi): New function.
3470 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
3472 for arm to use new function arm_output_casesi.
3474 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
3477 (darwin_label_is_anonymous_local_objc_name): Make metadata names
3478 linker-visibile for GNU objective C.
3480 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
3482 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
3484 * ira-costs.cc: Include regset.h.
3485 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
3487 (find_costs_and_classes): Call calculate_equiv_gains and redefine
3488 mem_cost of pseudos with equivs when LRA is used.
3489 * var-tracking.cc: Include ira.h and lra.h.
3490 (vt_initialize): Use lra_eliminate_regs when LRA is used.
3492 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3494 * doc/md.texi: Adapt COND_LEN pseudo code.
3496 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
3497 Richard Biener <rguenther@suse.de>
3499 PR rtl-optimization/91865
3500 * combine.cc (make_compound_operation): Avoid creating a
3501 ZERO_EXTEND of a ZERO_EXTEND.
3503 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
3505 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
3506 (vcond_mask_<mode><mode256_i>): this.
3507 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
3508 (vcond_mask_<mode><mode_i>): this.
3510 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
3512 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
3513 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
3515 * ipa-visibility.cc (function_and_variable_visibility): Change
3516 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
3517 * varasm.cc (output_constant_pool_contents)
3518 [#ifdef ASM_OUTPUT_DEF]:
3519 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
3520 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
3521 'if (!TARGET_SUPPORTS_ALIASES)',
3522 'gcc_checking_assert (seen_error ());'.
3523 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
3524 'if (!TARGET_SUPPORTS_ALIASES)'.
3525 (default_asm_output_anchor):
3526 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
3528 2023-10-26 Alexandre Oliva <oliva@adacore.com>
3530 PR tree-optimization/111520
3531 * gimple-harden-conditionals.cc
3532 (pass_harden_compares::execute): Set EH edge probability and
3533 EH block execution count.
3535 2023-10-26 Alexandre Oliva <oliva@adacore.com>
3537 * tree-eh.h (make_eh_edges): Rename to...
3538 (make_eh_edge): ... this.
3539 * tree-eh.cc: Likewise. Adjust all callers...
3540 * gimple-harden-conditionals.cc: ... here, ...
3541 * gimple-harden-control-flow.cc: ... here, ...
3542 * tree-cfg.cc: ... here, ...
3543 * tree-inline.cc: ... and here.
3545 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
3547 * config/darwin.cc (darwin_override_options): Handle fPIE.
3549 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
3551 * config.gcc: Use -E to to sed to indicate that we are using
3554 2023-10-25 Jason Merrill <jason@redhat.com>
3556 * tree-core.h (struct tree_base): Update address_space comment.
3558 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
3560 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
3561 Add support for immediates using MOV/EOR bitmask.
3563 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
3566 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
3568 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
3569 * config/i386/i386.md: New peephole pattern to narrow test
3570 instructions with immediate operands that test memory locations
3573 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
3575 * value-range.cc (irange::union_append): New.
3576 (irange::union_): Call union_append when appropriate.
3577 * value-range.h (irange::union_append): New prototype.
3579 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
3581 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
3582 (__lasx_xvfrintrne_s): Ditto.
3583 (__lasx_xvfrintrne_d): Ditto.
3584 (__lasx_xvfrintrz_s): Ditto.
3585 (__lasx_xvfrintrz_d): Ditto.
3586 (__lasx_xvfrintrp_s): Ditto.
3587 (__lasx_xvfrintrp_d): Ditto.
3588 (__lasx_xvfrintrm_s): Ditto.
3589 (__lasx_xvfrintrm_d): Ditto.
3590 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
3591 (__lsx_vfrintrne_s): Ditto.
3592 (__lsx_vfrintrne_d): Ditto.
3593 (__lsx_vfrintrz_s): Ditto.
3594 (__lsx_vfrintrz_d): Ditto.
3595 (__lsx_vfrintrp_s): Ditto.
3596 (__lsx_vfrintrp_d): Ditto.
3597 (__lsx_vfrintrm_s): Ditto.
3598 (__lsx_vfrintrm_d): Ditto.
3600 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
3602 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
3603 instruction template corresponding to the __builtin_thread_pointer
3605 * doc/extend.texi:Add the __builtin_thread_pointer function support
3606 description to the documentation.
3608 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3610 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
3611 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
3612 (single_set_info): New functions.
3613 (remove_uses_of_def, accesses_reference_same_resource): Declare.
3614 (insn_clobbers_resources): Likewise.
3615 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
3616 (rtl_ssa::accesses_reference_same_resource): Likewise.
3617 (rtl_ssa::insn_clobbers_resources): Likewise.
3618 * rtl-ssa/movement.h (can_move_insn_p): Declare.
3619 * rtl-ssa/movement.cc: New file.
3621 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3623 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
3624 New member function.
3625 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
3627 (function_info::make_use_available): Avoid false negatives for
3628 queries within an EBB.
3630 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3632 * rtl-ssa/changes.cc: Include sreal.h.
3633 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
3634 scale the cost of each instruction by its execution frequency.
3636 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3638 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
3639 (is_single_dominating_def, remains_available_on_exit): Replace with...
3640 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
3641 (function_info::remains_available_on_exit): ...these new member
3643 (function_info::m_clobbered_by_calls): New member variable.
3644 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
3645 initialize m_clobbered_by_calls.
3646 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
3647 m_clobbered_by_calls for each call-clobber note.
3648 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
3649 New function. Check for call clobbers.
3650 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
3653 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3655 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
3657 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
3658 (bb_walker::bb_walker): Use it, moving the computation of the
3660 (function_info::process_all_blocks): ...here.
3661 (function_info::place_phis): Add dominance frontiers for the
3664 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3666 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
3667 New member function.
3668 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
3670 (function_info::change_insns): Use it.
3672 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3674 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
3675 If a change describes a set of memory, ensure that that set
3676 is kept, regardless of the insn pattern.
3678 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3680 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
3681 call to add_reg_unused_notes and instead...
3682 (function_info::change_insns): ...use a separate loop here.
3684 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
3686 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
3687 global registers to be live on exit. Handle any block with zero
3688 successors like an exit block.
3690 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
3692 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
3693 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
3694 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
3695 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
3697 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
3699 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
3701 * tree-pretty-print.cc (dump_omp_clause): Adjust.
3702 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
3705 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3707 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
3708 (tail_agnostic_p): Ditto.
3709 (validate_change_or_fail): Ditto.
3710 (nonvlmax_avl_type_p): Ditto.
3711 (vlmax_avl_p): Ditto.
3713 (enum vlmul_type): Ditto.
3714 (count_regno_occurrences): Ditto.
3715 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
3716 (get_default_ta): Ditto.
3717 (tail_agnostic_p): Ditto.
3718 (validate_change_or_fail): Ditto.
3719 (nonvlmax_avl_type_p): Ditto.
3720 (vlmax_avl_p): Ditto.
3722 (enum vlmul_type): Ditto.
3724 (count_regno_occurrences): Ditto.
3725 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
3729 (get_default_ta): Ditto.
3730 (tail_agnostic_p): Ditto.
3731 (count_regno_occurrences): Ditto.
3732 (validate_change_or_fail): Ditto.
3734 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
3736 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
3737 (gimplify_adjust_omp_clauses): Likewise.
3738 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
3739 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
3740 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
3741 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
3743 (convert_local_omp_clauses): Likewise.
3744 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
3745 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
3746 (omp_clause_code_name): Likewise.
3747 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
3749 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3751 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
3752 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
3753 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
3754 * config/riscv/vector.md: Change avl_type into avl_type_idx.
3756 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3758 * recog.cc (constrain_operands): Remove UNARY_P handling.
3759 * reload.cc (find_reloads): Likewise.
3761 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
3763 * gcov-io.h: Fix record length encoding in comment.
3765 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
3767 * config/i386/i386-features.cc (compute_convert_gain): Provide
3768 more accurate values (sizes) for inter-unit moves with -Os.
3770 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
3771 Claudiu Zissulescu <claziss@gmail.com>
3773 * config/arc/arc-protos.h (output_shift): Rename to...
3774 (output_shift_loop): Tweak API to take an explicit rtx_code.
3775 (arc_split_ashl): Prototype new function here.
3776 (arc_split_ashr): Likewise.
3777 (arc_split_lshr): Likewise.
3778 (arc_split_rotl): Likewise.
3779 (arc_split_rotr): Likewise.
3780 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
3781 (output_shift_loop): New function replacing output_shift to output
3782 a zero overheap loop for SImode shifts and rotates on ARC targets
3783 without barrel shifter (i.e. no hardware support for these insns).
3784 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
3785 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
3786 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
3787 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
3788 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
3789 (arc_print_operand): Correct whitespace.
3790 (arc_rtx_costs): Likewise.
3791 (hwloop_optimize): Likewise.
3792 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
3793 (define_code_attr insn): New code attribute to map to pattern name.
3794 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
3795 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
3796 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
3797 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
3798 We now call arc_split_<insn> in arc.cc to implement each split.
3799 (shift_si3): Delete define_insn, all shifts/rotates are now split.
3800 (shift_si3_loop): Rename to...
3801 (<insn>si3_loop): define_insn to handle loop implementations of
3802 SImode shifts and rotates, calling ouput_shift_loop for template.
3803 (rotrsi3): Rename to...
3804 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
3805 (*rotlsi3): New define_insn_and_split to transform left rotates
3806 into right rotates before reload.
3807 (rotlsi3_cnt1): New define_insn_and_split to implement a left
3808 rotate by one bit using an add.f followed by an adc.
3809 * config/arc/predicates.md (shiftr4_operator): Delete.
3811 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
3813 * config/arc/arc.md (mulsi3_700): Update pattern.
3814 (mulsi3_v2): Likewise.
3815 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
3817 2023-10-24 Andrew Pinski <pinskia@gmail.com>
3819 PR tree-optimization/104376
3820 PR tree-optimization/101541
3821 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
3822 Allow nop conversions even if it is defined by a statement
3823 inside the conditional.
3825 2023-10-24 Andrew Pinski <pinskia@gmail.com>
3827 PR tree-optimization/111913
3828 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
3831 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3833 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
3834 whether the requested phi already exists.
3836 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3838 * rtl-ssa.h: Include cfgbuild.h.
3839 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
3840 more comprehensive control_flow_insn_p.
3842 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3844 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
3845 whether an insn has been replaced by a note.
3847 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3849 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
3852 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3854 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
3855 destination to be wider than the sources. Take the mode from the
3857 (ix86_expand_sse_extend): Pass the destination directly to
3858 ix86_split_mmx_punpck, rather than using a fresh register that
3861 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3863 * config/i386/predicates.md (aeswidekl_operation): Protect
3864 REGNO check with REG_P.
3866 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3868 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
3869 (TARGET_INSN_COST): Define.
3871 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
3873 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
3876 2023-10-24 xuli <xuli1@eswincomputing.com>
3879 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
3881 2023-10-24 Mark Harmstone <mark@harmstone.com>
3883 * opts.cc (debug_type_names): Remove stabs and xcoff.
3884 (df_set_names): Adjust.
3886 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3889 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
3891 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
3893 PR preprocessor/36887
3894 * toplev.h (ident_hash_extra): Declare...
3895 * stringpool.cc (ident_hash_extra): ...this new global variable.
3896 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
3897 (ggc_mark_stringpool): Likewise.
3898 (ggc_purge_stringpool): Likewise.
3899 (struct string_pool_data_extra): New struct.
3900 (spd2): New GC root variable.
3901 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
3902 analogous to how spd is used to handle ident_hash.
3903 (gt_pch_restore_stringpool): Likewise.
3905 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
3907 PR tree-optimization/111794
3908 * tree-vect-stmts.cc (vectorizable_assignment): Add
3909 same-precision exception for dest and source.
3911 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
3913 * config/riscv/autovec.md (popcount<mode>2): New expander.
3914 * config/riscv/riscv-protos.h (expand_popcount): Define.
3915 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
3916 with the WWG algorithm.
3918 2023-10-23 Richard Biener <rguenther@suse.de>
3920 PR tree-optimization/111916
3921 * tree-sra.cc (sra_modify_assign): Do not lower all
3922 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
3924 2023-10-23 Richard Biener <rguenther@suse.de>
3926 PR tree-optimization/111915
3927 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
3928 accesses are either grouped or not.
3930 2023-10-23 Richard Biener <rguenther@suse.de>
3933 * tree-inline.cc (setup_one_parameter): Move code emitting
3934 a dummy load when not optimizing ...
3935 (initialize_inlined_parameters): ... here to after when
3936 we remapped the parameter type.
3938 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
3941 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
3942 Skip over nop move insns.
3944 2023-10-23 Tamar Christina <tamar.christina@arm.com>
3946 PR tree-optimization/111860
3947 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
3948 Drop .MEM nodes only.
3950 2023-10-23 Andrew Pinski <apinski@marvell.com>
3952 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
3955 2023-10-23 Andrew Pinski <pinskia@gmail.com>
3957 * convert.cc (convert_to_pointer_1): Return error_mark_node
3959 (convert_to_real_1): Likewise.
3960 (convert_to_integer_1): Likewise.
3961 (convert_to_complex_1): Likewise.
3963 2023-10-23 Andrew Pinski <pinskia@gmail.com>
3966 * convert.cc (convert_to_complex_1): Return
3967 error_mark_node if either convert was an error
3968 when converting from a scalar.
3970 2023-10-23 Richard Biener <rguenther@suse.de>
3972 PR tree-optimization/111917
3973 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
3974 new conditional after last stmt.
3976 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3979 * config/riscv/riscv-vsetvl.cc: Fix bug.
3981 2023-10-23 Pan Li <pan2.li@intel.com>
3983 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
3985 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
3987 2023-10-23 Xi Ruoyao <xry111@xry111.site>
3989 * doc/invoke.texi (-mexplicit-relocs=style): Document.
3990 (-mexplicit-relocs): Document as an alias of
3991 -mexplicit-relocs=always.
3992 (-mno-explicit-relocs): Document as an alias of
3993 -mexplicit-relocs=none.
3994 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
3997 2023-10-23 Xi Ruoyao <xry111@xry111.site>
3999 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
4001 * config/loongarch/loongarch.md (define_peephole2): Optimize
4002 la.local + ld/st to pcalau12i + ld/st if the address is only used
4003 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
4005 2023-10-23 Xi Ruoyao <xry111@xry111.site>
4007 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
4008 Return true for TLS symbol types if -mexplicit-relocs=auto.
4009 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
4010 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
4011 (loongarch_legitimize_tls_address): Likewise.
4012 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
4013 TARGET_EXPLICIT_RELOCS from insn condition.
4015 2023-10-23 Xi Ruoyao <xry111@xry111.site>
4017 * config/loongarch/loongarch-protos.h
4018 (loongarch_explicit_relocs_p): Declare new function.
4019 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
4021 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
4022 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
4023 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
4024 deciding if return early, instead of using
4025 TARGET_EXPLICIT_RELOCS.
4026 (loongarch_output_move): CAll loongarch_explicit_relocs_p
4027 instead of using TARGET_EXPLICIT_RELOCS.
4028 * config/loongarch/loongarch.md (*low<mode>): Remove
4029 TARGET_EXPLICIT_RELOCS from insn condition.
4030 (@ld_from_got<mode>): Likewise.
4031 * config/loongarch/predicates.md (move_operand): Call
4032 loongarch_explicit_relocs_p instead of using
4033 TARGET_EXPLICIT_RELOCS.
4035 2023-10-23 Xi Ruoyao <xry111@xry111.site>
4037 * config/loongarch/genopts/loongarch-strings: Add strings for
4038 -mexplicit-relocs={auto,none,always}.
4039 * config/loongarch/genopts/loongarch.opt.in: Add options for
4040 -mexplicit-relocs={auto,none,always}.
4041 * config/loongarch/loongarch-str.h: Regenerate.
4042 * config/loongarch/loongarch.opt: Regenerate.
4043 * config/loongarch/loongarch-def.h
4044 (EXPLICIT_RELOCS_AUTO): Define.
4045 (EXPLICIT_RELOCS_NONE): Define.
4046 (EXPLICIT_RELOCS_ALWAYS): Define.
4047 (N_EXPLICIT_RELOCS_TYPES): Define.
4048 * config/loongarch/loongarch.cc
4049 (loongarch_option_override_internal): Error out if the old-style
4050 -m[no-]explicit-relocs option is used with
4051 -mexplicit-relocs={auto,none,always} together. Map
4052 -mno-explicit-relocs to -mexplicit-relocs=none and
4053 -mexplicit-relocs to -mexplicit-relocs=always for backward
4054 compatibility. Set a proper default for -mexplicit-relocs=
4055 based on configure-time probed linker capability. Update a
4056 diagnostic message to mention -mexplicit-relocs=always instead
4057 of the old-style -mexplicit-relocs.
4058 (loongarch_handle_model_attribute): Update a diagnostic message
4059 to mention -mexplicit-relocs=always instead of the old-style
4061 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
4063 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4065 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
4066 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
4068 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4070 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
4072 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
4074 PR tree-optimization/111784
4075 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
4076 adjacent vector stores, by costing them with the total number
4077 rather than costing them one by one.
4078 (vectorizable_load): Adjust costing way for adjacent vector
4079 loads, by costing them with the total number rather than costing
4082 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
4085 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
4086 Do not split to xmm16+ when !TARGET_AVX512VL.
4088 2023-10-23 Pan Li <pan2.li@intel.com>
4090 * config/riscv/riscv-protos.h (enum insn_type): Add new type
4092 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
4094 (expand_vec_ceil): Take MA instead of MU for tmp register.
4095 (expand_vec_floor): Ditto.
4096 (expand_vec_nearbyint): Ditto.
4097 (expand_vec_rint): Ditto.
4098 (expand_vec_round): Ditto.
4099 (expand_vec_roundeven): Ditto.
4101 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
4103 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
4105 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
4108 * expr.cc (can_use_qi_vectors): New function to return true if
4109 we know how to implement OP using vectors of bytes.
4110 (qi_vector_mode_supported_p): New function to check if optabs
4111 exists for the mode and certain by pieces operations.
4112 (widest_fixed_size_mode_for_size): Replace the second argument
4113 with the type of by pieces operations. Call can_use_qi_vectors
4114 and qi_vector_mode_supported_p to do the check. Call
4115 scalar_mode_supported_p to check if the scalar mode is supported.
4116 (by_pieces_ninsns): Pass the type of by pieces operation to
4117 widest_fixed_size_mode_for_size.
4118 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
4119 record the type of by pieces operations.
4120 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
4121 type of by pieces operations, initialize m_op with it. Pass
4122 m_op to function widest_fixed_size_mode_for_size.
4123 (op_by_pieces_d::get_usable_mode): Pass m_op to function
4124 widest_fixed_size_mode_for_size.
4125 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
4126 can_use_qi_vectors and qi_vector_mode_supported_p to do the
4128 (op_by_pieces_d::run): Pass m_op to function
4129 widest_fixed_size_mode_for_size.
4130 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
4131 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
4132 (can_store_by_pieces): Pass the type of by pieces operations to
4133 widest_fixed_size_mode_for_size.
4134 (clear_by_pieces): Initialize class store_by_pieces_d with
4136 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
4139 2023-10-23 liuhongt <hongtao.liu@intel.com>
4141 PR tree-optimization/111820
4142 PR tree-optimization/111833
4143 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
4144 up vectorization for nonlinear iv vect_step_op_mul when
4145 step_expr is not exact_log2 and niters is greater than
4146 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
4147 for nagative niters_skip which will be used by fully masked
4149 (vect_can_advance_ivs_p): Pass whole phi_info to
4150 vect_can_peel_nonlinear_iv_p.
4151 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
4152 init_expr * pow (step_expr, skipn) to init_expr
4153 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
4155 2023-10-23 liuhongt <hongtao.liu@intel.com>
4157 * config/i386/mmx.md (mmx_pinsrw): Remove.
4159 2023-10-22 Andrew Pinski <pinskia@gmail.com>
4162 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
4163 (*cmov_uxtw_insn_insv): Likewise.
4165 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
4167 * doc/invoke.texi: Document the new -nodefaultrpaths option.
4168 * doc/install.texi: Document the new --with-darwin-extra-rpath
4171 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
4173 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
4175 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
4177 * configure.ac: Add --with-darwin-extra-rpath option.
4178 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
4179 * config.in: Regenerate.
4180 * configure: Regenerate.
4182 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
4184 * aclocal.m4: Regenerate.
4185 * configure: Regenerate.
4186 * configure.ac: Handle Darwin rpaths.
4187 * config/darwin.h: Handle Darwin rpaths.
4188 * config/darwin.opt: Handle Darwin rpaths.
4189 * Makefile.in: Handle Darwin rpaths.
4191 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
4193 * gcc.cc (RUNPATH_OPTION): New.
4194 (do_spec_1): Provide '%P' as a spec to insert rpaths for
4195 each compiler startfile path.
4197 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
4198 Maxim Blinov <maxim.blinov@embecosm.com>
4199 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
4200 Iain Sandoe <iain@sandoe.co.uk>
4202 * config.gcc: Default to heap trampolines on macOS 11 and above.
4203 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
4204 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
4205 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
4207 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
4208 Maxim Blinov <maxim.blinov@embecosm.com>
4209 Iain Sandoe <iain@sandoe.co.uk>
4210 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
4212 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
4213 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
4214 * common.opt (ftrampoline-impl): Add option to control
4215 generation of trampoline instantiation (heap or stack).
4216 * coretypes.h: Define enum trampoline_impl.
4217 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
4218 __builtin_adjust_trampoline for heap trampolines.
4219 (finalize_nesting_tree_1): Emit calls to
4220 __builtin_nested_...{created,deleted} if we're generating with
4221 -ftrampoline-impl=heap.
4222 * tree.cc (build_common_builtin_nodes): Build
4223 __builtin_nested_...{created,deleted}.
4224 * doc/invoke.texi (-ftrampoline-impl): Document.
4226 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
4228 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
4229 Prohibit 'E' and 'H' combinations.
4231 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
4233 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4234 Change version number of the 'Zfa' extension to 1.0.
4236 2023-10-21 Pan Li <pan2.li@intel.com>
4239 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
4240 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
4241 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
4242 macro reference to func.
4243 (vls_mode_valid_p): New func impl for vls mode valid or not.
4244 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
4245 macro reference to func.
4246 * config/riscv/vector-iterators.md: Ditto.
4248 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
4249 Uros Bizjak <ubizjak@gmail.com>
4251 PR middle-end/101955
4252 PR tree-optimization/106245
4253 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
4255 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
4257 * gimple-harden-control-flow.cc: Include memmodel.h.
4259 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
4261 * gimple-harden-control-flow.cc: Include tm_p.h.
4263 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
4265 PR tree-optimization/111882
4266 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
4267 with non-constant offsets.
4269 2023-10-20 Tamar Christina <tamar.christina@arm.com>
4271 PR tree-optimization/111866
4272 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
4273 vect_set_loop_condition during prolog peeling.
4275 2023-10-20 Richard Biener <rguenther@suse.de>
4277 PR tree-optimization/111445
4278 * tree-scalar-evolution.cc (simple_iv_with_niters):
4279 Add missing check for a sign-conversion.
4281 2023-10-20 Richard Biener <rguenther@suse.de>
4283 PR tree-optimization/110243
4284 PR tree-optimization/111336
4285 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
4286 operations with undefined behavior on overflow to
4287 unsigned arithmetic.
4289 2023-10-20 Richard Biener <rguenther@suse.de>
4291 PR tree-optimization/111891
4292 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
4295 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
4297 * config.gcc: Allow --with-arch=gfx1030.
4298 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
4299 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
4300 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
4301 (TARGET_GFX1030): New.
4302 (TARGET_RDNA2): New.
4303 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
4304 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
4305 (subc<mode>3<exec_vcc>): Likewise.
4306 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
4307 (vec_cmp<mode>di): Likewise.
4308 (vec_cmp<u><mode>di): Likewise.
4309 (vec_cmp<mode>di_exec): Likewise.
4310 (vec_cmp<u><mode>di_exec): Likewise.
4311 (vec_cmp<mode>di_dup): Likewise.
4312 (vec_cmp<mode>di_dup_exec): Likewise.
4313 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
4314 (*<reduc_op>_dpp_shr_<mode>): Likewise.
4315 (*plus_carry_dpp_shr_<mode>): Likewise.
4316 (*plus_carry_in_dpp_shr_<mode>): Likewise.
4317 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
4318 (gcn_global_address_p): RDNA2 only allows smaller offsets.
4319 (gcn_addr_space_legitimate_address_p): Likewise.
4320 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
4321 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
4322 (output_file_start): Configure gfx1030.
4323 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
4324 (ASSEMBLER_DIALECT): New.
4325 * config/gcn/gcn.md (rdna): New define_attr.
4326 (enabled): Use "rdna" attribute.
4327 (gcn_return): Remove s_dcache_wb.
4328 (addcsi3_scalar): Add RDNA2 syntax variant.
4329 (addcsi3_scalar_zero): Likewise.
4330 (addptrdi3): Likewise.
4331 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
4332 (*memory_barrier): Add RDNA2 syntax variant.
4333 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
4334 scalar atomics for RDNA2.
4335 (atomic_store<mode>): Likewise.
4336 (atomic_exchange<mode>): Likewise.
4337 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
4338 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
4339 (main): Recognise -march=gfx1030.
4340 * config/gcn/t-omp-device: Add gfx1030 isa.
4342 2023-10-20 Richard Biener <rguenther@suse.de>
4344 PR tree-optimization/111000
4345 * stor-layout.h (element_precision): Move ..
4346 * tree.h (element_precision): .. here.
4347 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
4348 motion of shifts and rotates.
4350 2023-10-20 Alexandre Oliva <oliva@adacore.com>
4352 * tree-core.h (ECF_XTHROW): New macro.
4353 * tree.cc (set_call_expr): Add expected_throw attribute when
4355 (build_common_builtin_node): Add ECF_XTHROW to
4356 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
4357 * calls.cc (flags_from_decl_or_type): Check for expected_throw
4358 attribute to set ECF_XTHROW.
4359 * gimple.cc (gimple_build_call_from_tree): Propagate
4360 ECF_XTHROW from decl flags to gimple call...
4361 (gimple_call_flags): ... and back.
4362 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
4363 (gimple_call_set_expected_throw): New.
4364 (gimple_call_expected_throw_p): New.
4365 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
4366 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
4367 * common.opt (fharden-control-flow-redundancy): New.
4368 (-fhardcfr-check-returning-calls): New.
4369 (-fhardcfr-check-exceptions): New.
4370 (-fhardcfr-check-noreturn-calls=*): New.
4371 (Enum hardcfr_check_noreturn_calls): New.
4372 (fhardcfr-skip-leaf): New.
4373 * doc/invoke.texi: Document them.
4374 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
4375 * flag-types.h (enum hardcfr_noret): New.
4376 * gimple-harden-control-flow.cc: New.
4377 * params.opt (-param=hardcfr-max-blocks=): New.
4378 (-param=hradcfr-max-inline-blocks=): New.
4379 * passes.def (pass_harden_control_flow_redundancy): Add.
4380 * tree-pass.h (make_pass_harden_control_flow_redundancy):
4382 * doc/extend.texi: Document expected_throw attribute.
4384 2023-10-20 Alex Coplan <alex.coplan@arm.com>
4386 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
4387 ::remove_insn on deleted insns.
4389 2023-10-20 Richard Biener <rguenther@suse.de>
4391 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
4393 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
4396 * config/sh/sh.md (unnamed split pattern): Fix comparison of
4397 find_regno_note result.
4399 2023-10-20 Richard Biener <rguenther@suse.de>
4401 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
4402 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
4405 2023-10-20 Richard Biener <rguenther@suse.de>
4407 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
4408 off_arg3_arg2_map): New.
4409 (vect_get_operand_map): Get flag whether the stmt was
4410 recognized as gather or scatter and use the above
4412 (vect_get_and_check_slp_defs): Adjust.
4413 (vect_build_slp_tree_2): Likewise.
4415 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4417 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
4418 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
4419 (pre_vsetvl::emit_vsetvl): Ditto.
4421 2023-10-20 Tamar Christina <tamar.christina@arm.com>
4422 Andre Vieira <andre.simoesdiasvieira@arm.com>
4424 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
4425 (get_loop_body_if_conv_order): ... to here.
4426 (if_convertible_loop_p): Remove single_exit check.
4427 (tree_if_conversion): Move single_exit check to if-conversion part and
4428 support multiple exits.
4430 2023-10-20 Tamar Christina <tamar.christina@arm.com>
4431 Andre Vieira <andre.simoesdiasvieira@arm.com>
4433 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
4434 from original statement.
4435 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
4437 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4440 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
4441 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
4443 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
4448 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
4450 (compute_reaching_defintion): New.
4451 (enum vsetvl_type): Moved.
4452 (vlmax_avl_p): Moved.
4453 (enum emit_type): Moved.
4454 (vlmul_to_str): Moved.
4455 (vlmax_avl_insn_p): Removed.
4456 (policy_to_str): Moved.
4457 (loop_basic_block_p): Removed.
4458 (valid_sew_p): Removed.
4459 (vsetvl_insn_p): Moved.
4460 (vsetvl_vtype_change_only_p): Removed.
4461 (after_or_same_p): Removed.
4462 (before_p): Removed.
4463 (anticipatable_occurrence_p): Removed.
4464 (available_occurrence_p): Removed.
4465 (insn_should_be_added_p): Removed.
4466 (get_all_sets): Moved.
4467 (get_same_bb_set): Moved.
4468 (gen_vsetvl_pat): Removed.
4469 (calculate_vlmul): Moved.
4470 (get_max_int_sew): New.
4471 (emit_vsetvl_insn): Removed.
4472 (get_max_float_sew): New.
4473 (eliminate_insn): Removed.
4474 (insert_vsetvl): Removed.
4475 (count_regno_occurrences): Moved.
4476 (get_vl_vtype_info): Removed.
4477 (enum def_type): Moved.
4478 (validate_change_or_fail): Moved.
4479 (change_insn): Removed.
4480 (get_all_real_uses): Moved.
4481 (get_forward_read_vl_insn): Removed.
4482 (get_backward_fault_first_load_insn): Removed.
4483 (change_vsetvl_insn): Removed.
4484 (avl_source_has_vsetvl_p): Removed.
4485 (source_equal_p): Moved.
4486 (calculate_sew): Removed.
4487 (same_equiv_note_p): Moved.
4489 (incompatible_avl_p): Removed.
4491 (different_sew_p): Removed.
4492 (get_bb_index): New.
4493 (different_lmul_p): Removed.
4494 (has_no_uses): Moved.
4495 (different_ratio_p): Removed.
4496 (different_tail_policy_p): Removed.
4497 (different_mask_policy_p): Removed.
4498 (possible_zero_avl_p): Removed.
4499 (enum demand_flags): New.
4500 (second_ratio_invalid_for_first_sew_p): Removed.
4501 (second_ratio_invalid_for_first_lmul_p): Removed.
4503 (float_insn_valid_sew_p): Removed.
4504 (second_sew_less_than_first_sew_p): Removed.
4505 (first_sew_less_than_second_sew_p): Removed.
4506 (class vsetvl_info): New.
4507 (compare_lmul): Removed.
4508 (second_lmul_less_than_first_lmul_p): Removed.
4509 (second_ratio_less_than_first_ratio_p): Removed.
4510 (DEF_INCOMPATIBLE_COND): Removed.
4511 (greatest_sew): Removed.
4512 (first_sew): Removed.
4513 (second_sew): Removed.
4514 (first_vlmul): Removed.
4515 (second_vlmul): Removed.
4516 (first_ratio): Removed.
4517 (second_ratio): Removed.
4518 (vlmul_for_first_sew_second_ratio): Removed.
4519 (vlmul_for_greatest_sew_second_ratio): Removed.
4520 (ratio_for_second_sew_first_vlmul): Removed.
4521 (class vsetvl_block_info): New.
4522 (DEF_SEW_LMUL_FUSE_RULE): New.
4523 (always_unavailable): Removed.
4524 (avl_unavailable_p): Removed.
4525 (class demand_system): New.
4526 (sew_unavailable_p): Removed.
4527 (lmul_unavailable_p): Removed.
4528 (ge_sew_unavailable_p): Removed.
4529 (ge_sew_lmul_unavailable_p): Removed.
4530 (ge_sew_ratio_unavailable_p): Removed.
4531 (DEF_UNAVAILABLE_COND): Removed.
4532 (same_sew_lmul_demand_p): Removed.
4533 (propagate_avl_across_demands_p): Removed.
4534 (reg_available_p): Removed.
4535 (support_relaxed_compatible_p): Removed.
4536 (demands_can_be_fused_p): Removed.
4537 (earliest_pred_can_be_fused_p): Removed.
4538 (vsetvl_dominated_by_p): Removed.
4539 (avl_info::avl_info): Removed.
4540 (avl_info::single_source_equal_p): Removed.
4541 (avl_info::multiple_source_equal_p): Removed.
4542 (DEF_SEW_LMUL_RULE): New.
4543 (avl_info::operator=): Removed.
4544 (avl_info::operator==): Removed.
4545 (DEF_POLICY_RULE): New.
4546 (avl_info::operator!=): Removed.
4547 (avl_info::has_non_zero_avl): Removed.
4548 (vl_vtype_info::vl_vtype_info): Removed.
4549 (vl_vtype_info::operator==): Removed.
4550 (DEF_AVL_RULE): New.
4551 (vl_vtype_info::operator!=): Removed.
4552 (vl_vtype_info::same_avl_p): Removed.
4553 (vl_vtype_info::same_vtype_p): Removed.
4554 (vl_vtype_info::same_vlmax_p): Removed.
4555 (vector_insn_info::operator>=): Removed.
4556 (vector_insn_info::operator==): Removed.
4557 (class pre_vsetvl): New.
4558 (vector_insn_info::parse_insn): Removed.
4559 (vector_insn_info::compatible_p): Removed.
4560 (vector_insn_info::skip_avl_compatible_p): Removed.
4561 (vector_insn_info::compatible_avl_p): Removed.
4562 (vector_insn_info::compatible_vtype_p): Removed.
4563 (vector_insn_info::available_p): Removed.
4564 (vector_insn_info::fuse_avl): Removed.
4565 (vector_insn_info::fuse_sew_lmul): Removed.
4566 (vector_insn_info::fuse_tail_policy): Removed.
4567 (vector_insn_info::fuse_mask_policy): Removed.
4568 (vector_insn_info::local_merge): Removed.
4569 (vector_insn_info::global_merge): Removed.
4570 (vector_insn_info::get_avl_or_vl_reg): Removed.
4571 (vector_insn_info::update_fault_first_load_avl): Removed.
4572 (vector_insn_info::dump): Removed.
4573 (vector_infos_manager::vector_infos_manager): Removed.
4574 (vector_infos_manager::create_expr): Removed.
4575 (vector_infos_manager::get_expr_id): Removed.
4576 (vector_infos_manager::all_same_ratio_p): Removed.
4577 (vector_infos_manager::all_avail_in_compatible_p): Removed.
4578 (vector_infos_manager::all_same_avl_p): Removed.
4579 (vector_infos_manager::expr_set_num): Removed.
4580 (vector_infos_manager::release): Removed.
4581 (vector_infos_manager::create_bitmap_vectors): Removed.
4582 (vector_infos_manager::free_bitmap_vectors): Removed.
4583 (vector_infos_manager::dump): Removed.
4584 (class pass_vsetvl): Adjust.
4585 (pass_vsetvl::get_vector_info): Removed.
4586 (pass_vsetvl::get_block_info): Removed.
4587 (pass_vsetvl::update_vector_info): Removed.
4588 (pass_vsetvl::update_block_info): Removed.
4589 (pre_vsetvl::compute_avl_def_data): New.
4590 (pass_vsetvl::simple_vsetvl): Removed.
4591 (pass_vsetvl::compute_local_backward_infos): Removed.
4592 (pass_vsetvl::need_vsetvl): Removed.
4593 (pass_vsetvl::transfer_before): Removed.
4594 (pass_vsetvl::transfer_after): Removed.
4595 (pre_vsetvl::compute_vsetvl_def_data): New.
4596 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
4597 (pass_vsetvl::prune_expressions): Removed.
4598 (pass_vsetvl::compute_local_properties): Removed.
4599 (pre_vsetvl::compute_lcm_local_properties): New.
4600 (pass_vsetvl::earliest_fusion): Removed.
4601 (pre_vsetvl::fuse_local_vsetvl_info): New.
4602 (pass_vsetvl::vsetvl_fusion): Removed.
4603 (pass_vsetvl::can_refine_vsetvl_p): Removed.
4604 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
4605 (pass_vsetvl::refine_vsetvls): Removed.
4606 (pass_vsetvl::cleanup_vsetvls): Removed.
4607 (pass_vsetvl::commit_vsetvls): Removed.
4608 (pass_vsetvl::pre_vsetvl): Removed.
4609 (pass_vsetvl::get_vsetvl_at_end): Removed.
4610 (local_avl_compatible_p): Removed.
4611 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
4612 (pre_vsetvl::pre_global_vsetvl_info): New.
4613 (get_first_vsetvl_before_rvv_insns): Removed.
4614 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
4615 (pre_vsetvl::emit_vsetvl): New.
4616 (pass_vsetvl::ssa_post_optimization): Removed.
4617 (pre_vsetvl::cleaup): New.
4618 (pre_vsetvl::remove_avl_operand): New.
4619 (pass_vsetvl::df_post_optimization): Removed.
4620 (pre_vsetvl::remove_unused_dest_operand): New.
4621 (pass_vsetvl::init): Removed.
4622 (pass_vsetvl::done): Removed.
4623 (pass_vsetvl::compute_probabilities): Removed.
4624 (pass_vsetvl::lazy_vsetvl): Adjust.
4625 (pass_vsetvl::execute): Adjust.
4626 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
4627 (DEF_SEW_LMUL_RULE): New.
4628 (DEF_SEW_LMUL_FUSE_RULE): Removed.
4629 (DEF_POLICY_RULE): New.
4630 (DEF_UNAVAILABLE_COND): Removed
4631 (DEF_AVL_RULE): New demand type.
4632 (sew_lmul): New demand type.
4633 (ratio_only): New demand type.
4634 (sew_only): New demand type.
4635 (ge_sew): New demand type.
4636 (ratio_and_ge_sew): New demand type.
4637 (tail_mask_policy): New demand type.
4638 (tail_policy_only): New demand type.
4639 (mask_policy_only): New demand type.
4640 (ignore_policy): New demand type.
4641 (avl): New demand type.
4642 (non_zero_avl): New demand type.
4643 (ignore_avl): New demand type.
4644 * config/riscv/t-riscv: Removed riscv-vsetvl.h
4645 * config/riscv/riscv-vsetvl.h: Removed.
4647 2023-10-20 Alexandre Oliva <oliva@adacore.com>
4649 * tree-eh.cc (make_eh_edges): Return the new edge.
4650 * tree-eh.h (make_eh_edges): Likewise.
4652 2023-10-19 Marek Polacek <polacek@redhat.com>
4654 * doc/contrib.texi: Add entry for Patrick Palka.
4656 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4658 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
4659 compatible with mask parameters in clone.
4660 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
4662 (vectorizable_simd_clone_call): Enable the use of masked clones in
4665 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4667 PR tree-optimization/110485
4668 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
4669 vectors usage if a notinbranch simdclone has been selected.
4671 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4673 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
4674 simd clone calls and only use types that are mapped to vectors.
4675 (simd_clone_call_p): New helper function.
4677 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4679 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
4680 poly NIT and ALT_BOUND.
4682 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4684 * tree-parloops.cc (create_loop_fn): Copy specific target and
4685 optimization options to clone.
4687 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4689 * omp-simd-clone.cc (simd_clone_subparts): Remove.
4690 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
4691 TYPE_VECTOR_SUBPARTS.
4692 (ipa_simd_modify_function_body): Likewise.
4693 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
4694 (simd_clone_subparts): Remove.
4696 2023-10-19 Jason Merrill <jason@redhat.com>
4698 * ABOUT-GCC-NLS: Add usage guidance.
4700 2023-10-19 Jason Merrill <jason@redhat.com>
4702 * diagnostic-core.h (permerror): Rename new overloads...
4703 (permerror_opt): To this.
4704 * diagnostic.cc: Likewise.
4706 2023-10-19 Tamar Christina <tamar.christina@arm.com>
4708 PR tree-optimization/111860
4709 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
4710 Remove PHI nodes that dominate loop.
4712 2023-10-19 Richard Biener <rguenther@suse.de>
4714 PR tree-optimization/111131
4715 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
4716 sure to update all gather/scatter stmt DRs, not only those
4717 that eventually got VMAT_GATHER_SCATTER set.
4718 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
4719 (vect_get_and_check_slp_defs): Handle gathers/scatters,
4720 adding the offset as SLP operand and comparing base and scale.
4721 (vect_build_slp_tree_1): Handle gathers.
4722 (vect_build_slp_tree_2): Likewise.
4724 2023-10-19 Richard Biener <rguenther@suse.de>
4726 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
4728 (vect_build_one_gather_load_call): ... this. Refactor,
4729 inline widening/narrowing support ...
4730 (vectorizable_load): ... here, do gather vectorization
4731 with builtin decls along other gather vectorization.
4733 2023-10-19 Alex Coplan <alex.coplan@arm.com>
4735 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
4736 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
4737 (store_pair_dw_tftf): Rename to ...
4738 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
4739 * config/aarch64/iterators.md (TX2): New.
4741 2023-10-19 Alex Coplan <alex.coplan@arm.com>
4743 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
4744 parameter to give final insn position, infer use of mem if it isn't
4745 specified explicitly.
4746 (function_info::change_insns): Pass down final insn position to
4747 finalize_new_accesses.
4748 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
4750 2023-10-19 Alex Coplan <alex.coplan@arm.com>
4752 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
4753 * rtl-ssa/functions.h (function_info): Declare new member
4754 function reparent_use.
4756 2023-10-19 Alex Coplan <alex.coplan@arm.com>
4758 * rtl-ssa/access-utils.h (drop_memory_access): New.
4760 2023-10-19 Alex Coplan <alex.coplan@arm.com>
4762 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
4763 update the prev pointer on the following nondebug insn in the
4764 case that !insn->is_debug_insn () && next->is_debug_insn ().
4766 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
4768 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
4769 Also make Clearwater Forest depends on Sierra Forest.
4770 * config/i386/i386-options.cc: Revise the order of the macro
4771 definition to avoid confusion.
4772 * doc/extend.texi: Revise documentation.
4773 * doc/invoke.texi: Correct documentation.
4775 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
4777 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
4778 Implement support for --with-multilib-list.
4779 * config/gcn/t-gcn-hsa: Likewise.
4780 * doc/install.texi: Likewise.
4781 * doc/invoke.texi: Mark Fiji deprecated.
4783 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
4785 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
4786 vector_costs. Add a constructor.
4787 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
4788 adjust the cost for inner loops.
4789 (loongarch_vector_costs::count_operations): New function.
4790 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
4791 (loongarch_vector_costs::finish_cost): Ditto.
4792 (loongarch_builtin_vectorization_cost): Adjust.
4793 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
4794 (loongarcg-vect-issue-info): Ditto.
4795 (mmemvec-cost): Delete.
4796 * config/loongarch/genopts/loongarch.opt.in
4797 (loongarch-vect-unroll-limit): Ditto.
4798 (loongarcg-vect-issue-info): Ditto.
4799 (mmemvec-cost): Delete.
4800 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
4802 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
4804 * config/loongarch/lasx.md
4805 (vec_widen_<su>mult_even_v8si): New patterns.
4806 (vec_widen_<su>add_hi_<mode>): Ditto.
4807 (vec_widen_<su>add_lo_<mode>): Ditto.
4808 (vec_widen_<su>sub_hi_<mode>): Ditto.
4809 (vec_widen_<su>sub_lo_<mode>): Ditto.
4810 (vec_widen_<su>mult_hi_<mode>): Ditto.
4811 (vec_widen_<su>mult_lo_<mode>): Ditto.
4812 * config/loongarch/loongarch.md (u_bool): New iterator.
4813 * config/loongarch/loongarch-protos.h
4814 (loongarch_expand_vec_widen_hilo): New prototype.
4815 * config/loongarch/loongarch.cc
4816 (loongarch_expand_vec_interleave): New function.
4817 (loongarch_expand_vec_widen_hilo): New function.
4819 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
4821 * config/loongarch/lasx.md
4822 (avg<mode>3_ceil): New patterns.
4823 (uavg<mode>3_ceil): Ditto.
4824 (avg<mode>3_floor): Ditto.
4825 (uavg<mode>3_floor): Ditto.
4828 * config/loongarch/lsx.md
4829 (avg<mode>3_ceil): New patterns.
4830 (uavg<mode>3_ceil): Ditto.
4831 (avg<mode>3_floor): Ditto.
4832 (uavg<mode>3_floor): Ditto.
4836 2023-10-18 Andrew Pinski <pinskia@gmail.com>
4838 PR middle-end/111863
4839 * expr.cc (do_store_flag): Don't over write arg0
4840 when stripping off `& POW2`.
4842 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
4844 PR tree-optimization/111648
4845 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
4846 chooses base element from arg, ensure that it's a natural stepped
4848 (build_vec_cst_rand): New param natural_stepped and use it to
4849 construct a naturally stepped sequence.
4850 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
4852 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
4854 * config/pru/pru.cc (pru_insn_cost): New function.
4855 (TARGET_INSN_COST): Define for PRU.
4857 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
4859 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
4860 Test <= instead of testing < twice.
4862 2023-10-18 Jakub Jelinek <jakub@redhat.com>
4865 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
4866 using rtx_def type for memory_extend_buf, use unsigned char
4867 arrayy with size of rtx_def and its alignment.
4869 2023-10-18 Jason Merrill <jason@redhat.com>
4871 * doc/invoke.texi: Move -fpermissive to Warning Options.
4872 * diagnostic.cc (update_effective_level_from_pragmas): Remove
4873 redundant system header check.
4874 (diagnostic_report_diagnostic): Move down syshdr/-w check.
4875 (diagnostic_impl): Handle DK_PERMERROR with an option number.
4876 (permerror): Add new overloads.
4877 * diagnostic-core.h (permerror): Declare them.
4879 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
4881 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
4882 to avoid that auxillary statement list reaches LTO.
4884 2023-10-18 Jakub Jelinek <jakub@redhat.com>
4886 PR tree-optimization/111845
4887 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
4888 statements for the 4 operand addition or subtraction of 3 operands
4889 from 1 operand cases and remove them when successful. Look for
4890 nested additions even from rhs[2], not just rhs[1].
4892 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
4895 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
4896 instead of an assert ICE when no -march= has been specified.
4898 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
4900 * config.in: Regenerate.
4901 * config/darwin.cc (darwin_file_start): Add assembler directives
4902 for the target OS version, where these are supported by the
4904 (darwin_override_options): Check for building >= macOS 10.14.
4905 * configure: Regenerate.
4906 * configure.ac: Check for assembler support of .build_version
4909 2023-10-18 Tamar Christina <tamar.christina@arm.com>
4911 PR tree-optimization/109154
4912 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
4913 (typedef struct ifcvt_arg_entry): New.
4914 (cmp_arg_entry): New.
4915 (gen_phi_arg_condition, gen_phi_nest_statement,
4916 predicate_scalar_phi): Use them.
4918 2023-10-18 Tamar Christina <tamar.christina@arm.com>
4920 PR tree-optimization/109154
4921 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
4922 Rewrite to new syntax.
4923 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
4926 2023-10-18 Tamar Christina <tamar.christina@arm.com>
4928 PR tree-optimization/109154
4929 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
4931 2023-10-18 Tamar Christina <tamar.christina@arm.com>
4933 PR tree-optimization/109154
4934 * match.pd: Add new cond_op rule.
4936 2023-10-18 Xi Ruoyao <xry111@xry111.site>
4938 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
4941 2023-10-18 Richard Biener <rguenther@suse.de>
4943 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
4944 Relax check to again allow passing integer mode masks
4945 as traditional vectors.
4947 2023-10-18 Tamar Christina <tamar.christina@arm.com>
4949 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
4950 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
4952 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
4953 (find_guard_arg): Look value up through explicit edge and original defs.
4954 (vect_do_peeling): Use it.
4955 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
4956 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
4958 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
4959 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
4960 optional param to turn off LCSSA mode.
4962 2023-10-18 Tamar Christina <tamar.christina@arm.com>
4964 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
4965 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
4967 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
4968 (vec_init_loop_exit_info): Extend analysis when multiple exits.
4969 (vect_analyze_loop_form): Record conds and determine main cond.
4970 (vect_create_loop_vinfo): Extend bookkeeping of conds.
4971 (vect_analyze_loop): Release conds.
4972 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
4973 LOOP_VINFO_LOOP_IV_COND): New.
4974 (struct vect_loop_form_info): Add conds, alt_loop_conds;
4975 (struct loop_vec_info): Add conds, loop_iv_cond.
4977 2023-10-18 Tamar Christina <tamar.christina@arm.com>
4979 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
4980 (loop_distribution::distribute_loop): Bail out of not single exit.
4981 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
4982 * tree-scalar-evolution.h (get_loop_exit_condition): New.
4983 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
4985 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
4986 vect_set_loop_condition_partial_vectors_avx512,
4987 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
4989 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
4990 return new peeled corresponding peeled exit.
4991 (slpeel_can_duplicate_loop_p): Explicitly take exit.
4992 (find_loop_location): Handle not knowing an explicit exit.
4993 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
4994 find_guard_arg, slpeel_update_phi_nodes_for_loops,
4995 slpeel_update_phi_nodes_for_guard2): Use new exits.
4996 (vect_do_peeling): Update bookkeeping to keep track of exits.
4997 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
4999 (vec_init_loop_exit_info): New.
5000 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
5001 vec_epilogue_loop_iv, scalar_loop_iv.
5002 (vect_analyze_loop_form): Initialize exits.
5003 (vect_create_loop_vinfo): Set main exit.
5004 (vect_create_epilog_for_reduction, vectorizable_live_operation,
5005 vect_transform_loop): Use it.
5006 (scale_profile_for_vect_loop): Explicitly take exit to scale.
5007 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
5008 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
5009 LOOP_VINFO_SCALAR_IV_EXIT): New.
5010 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
5012 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
5013 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
5014 (vec_init_loop_exit_info): New.
5015 (struct vect_loop_form_info): Add loop_exit.
5017 2023-10-18 Tamar Christina <tamar.christina@arm.com>
5019 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
5021 (vectorizable_comparison_1): ...This.
5023 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5025 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
5026 (expand_vec_perm_const_1): Add consecutive pattern recognition.
5028 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
5030 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
5032 * common/config/i386/i386-common.cc (processor_name):
5034 (processor_alias_table): Ditto.
5035 * common/config/i386/i386-cpuinfo.h (enum processor_types):
5036 Add INTEL_PANTHERLAKE.
5037 * config.gcc: Add -march=pantherlake.
5038 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
5039 the if clause. Handle pantherlake.
5040 * config/i386/i386-c.cc (ix86_target_macros_internal):
5042 * config/i386/i386-options.cc (processor_cost_table): Ditto.
5043 (m_PANTHERLAKE): New.
5044 (m_CORE_HYBRID): Add pantherlake.
5045 * config/i386/i386.h (enum processor_type): Ditto.
5046 * doc/extend.texi: Ditto.
5047 * doc/invoke.texi: Ditto.
5049 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
5051 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
5052 * config/i386/x86-tune.def: Replace hybrid client tune to
5055 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
5057 * common/config/i386/cpuinfo.h
5058 (get_intel_cpu): Handle Clearwater Forest.
5059 * common/config/i386/i386-common.cc (processor_name):
5060 Add Clearwater Forest.
5061 (processor_alias_table): Ditto.
5062 * common/config/i386/i386-cpuinfo.h (enum processor_types):
5063 Add INTEL_CLEARWATERFOREST.
5064 * config.gcc: Add -march=clearwaterforest.
5065 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
5067 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
5068 * config/i386/i386-options.cc (processor_cost_table): Ditto.
5069 (m_CLEARWATERFOREST): New.
5070 (m_CORE_ATOM): Add clearwaterforest.
5071 * config/i386/i386.h (enum processor_type): Ditto.
5072 * doc/extend.texi: Ditto.
5073 * doc/invoke.texi: Ditto.
5075 2023-10-18 liuhongt <hongtao.liu@intel.com>
5077 * config/i386/mmx.md (fma<mode>4): New expander.
5078 (fms<mode>4): Ditto.
5079 (fnma<mode>4): Ditto.
5080 (fnms<mode>4): Ditto.
5081 (vec_fmaddsubv4hf4): Ditto.
5082 (vec_fmsubaddv4hf4): Ditto.
5084 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5087 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
5089 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
5091 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
5092 the position of the LR save slot dependent on stack clash
5093 protection unless shadow call stacks are enabled.
5095 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
5097 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
5098 store the list saved GPRs, FPRs and predicate registers.
5099 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
5100 the lists of saved registers. Use them to choose push candidates.
5101 Invalidate pop candidates if we're not going to do a pop.
5102 (aarch64_next_callee_save): Delete.
5103 (aarch64_save_callee_saves): Take a list of registers,
5104 rather than a range. Make !skip_wb select only write-back
5106 (aarch64_expand_prologue): Update calls accordingly.
5107 (aarch64_restore_callee_saves): Take a list of registers,
5108 rather than a range. Always skip pop candidates. Also skip
5109 LR if shadow call stacks are enabled.
5110 (aarch64_expand_epilogue): Update calls accordingly.
5112 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
5114 * cfgbuild.h (find_sub_basic_blocks): Declare.
5115 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
5117 (find_many_sub_basic_blocks): ...here.
5118 (find_sub_basic_blocks): New function.
5119 * function.cc (thread_prologue_and_epilogue_insns): Handle
5120 epilogues that contain jumps.
5122 2023-10-17 Andrew Pinski <apinski@marvell.com>
5124 PR tree-optimization/110817
5125 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
5126 check for boolean type as they don't have "[0,1]" range.
5128 2023-10-17 Andrew Pinski <pinskia@gmail.com>
5130 PR tree-optimization/111432
5131 * match.pd (`a & (x | CST)`): New pattern.
5133 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
5135 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
5138 2023-10-17 Richard Biener <rguenther@suse.de>
5140 PR tree-optimization/111846
5141 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
5142 (SLP_TREE_SIMD_CLONE_INFO): New.
5143 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
5144 SLP_TREE_SIMD_CLONE_INFO.
5145 (_slp_tree::~_slp_tree): Release it.
5146 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
5147 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
5148 dependent on if we're doing SLP.
5150 2023-10-17 Jakub Jelinek <jakub@redhat.com>
5152 * wide-int-print.h (print_dec_buf_size): For length, divide number
5153 of bits by 3 and add 3 instead of division by 4 and adding 4.
5154 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
5155 print_hex, instead call print_decu on either negated value after
5156 printing - or on wi itself.
5157 (print_decu): Don't call print_hex, instead print even large numbers
5159 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
5160 even if it returns false.
5161 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
5162 pp_wide_int_large should be used.
5163 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
5164 to compute needed buffer size.
5166 2023-10-17 Richard Biener <rguenther@suse.de>
5168 PR middle-end/111818
5169 * tree-ssa.cc (maybe_optimize_var): When clearing
5170 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
5172 2023-10-17 Richard Biener <rguenther@suse.de>
5174 PR tree-optimization/111807
5175 * tree-sra.cc (build_ref_for_model): Only call
5176 build_reconstructed_reference when the offsets are the same.
5178 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
5181 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
5183 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
5185 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
5186 fix impl related to vec_initv32qiv16qi template to avoid ICE.
5188 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
5189 Chenghua Xu <xuchenghua@loongson.cn>
5191 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
5194 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5196 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
5197 (get_store_value): New function.
5199 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
5201 * explow.cc (probe_stack_range): Handle case when expand_binop
5202 does not construct its result in the expected location.
5204 2023-10-16 David Malcolm <dmalcolm@redhat.com>
5206 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
5207 default for -fdiagnostics-text-art-charset from emoji to ascii.
5208 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
5210 2023-10-16 David Malcolm <dmalcolm@redhat.com>
5212 * diagnostic.cc (diagnostic_initialize): Ensure
5213 context->extra_output_kind is initialized.
5215 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
5217 * config/i386/i386.cc (ix86_can_inline_p):
5218 Handle CM_LARGE and CM_LARGE_PIC.
5219 (x86_elf_aligned_decl_common): Ditto.
5220 (x86_output_aligned_bss): Ditto.
5221 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
5222 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
5224 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
5226 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
5227 prototype. Improve comment.
5228 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
5229 into riscv-string.cc.
5230 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
5231 (riscv_expand_block_move): Likewise.
5232 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
5234 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
5235 (riscv_expand_block_move): Likewise.
5237 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
5239 * Makefile.in: Add fold-mem-offsets.o.
5240 * passes.def: Schedule a new pass.
5241 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
5242 * common.opt: New options.
5243 * doc/invoke.texi: Document new option.
5244 * fold-mem-offsets.cc: New file.
5246 2023-10-16 Andrew Pinski <pinskia@gmail.com>
5248 PR tree-optimization/101541
5249 * match.pd (A CMP 0 ? A : -A): Improve
5250 using bitwise_equal_p.
5252 2023-10-16 Andrew Pinski <pinskia@gmail.com>
5254 PR tree-optimization/31531
5255 * match.pd (~X op ~Y): Allow for an optional nop convert.
5256 (~X op C): Likewise.
5258 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
5260 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
5261 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
5263 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5265 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
5266 unsigned vector element.
5268 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5270 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
5272 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
5274 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
5276 * gimple-fold.cc (size_must_be_zero_p): Likewise.
5277 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
5278 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
5279 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
5281 2023-10-16 liuhongt <hongtao.liu@intel.com>
5283 * config/i386/mmx.md (V2FI_32): New mode iterator
5284 (movd_v2hf_to_sse): Rename to ..
5285 (movd_<mode>_to_sse): .. this.
5286 (movd_v2hf_to_sse_reg): Rename to ..
5287 (movd_<mode>_to_sse_reg): .. this.
5288 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
5290 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
5291 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
5292 (float<floatunssuffix>v2siv2hf2): Ditto.
5293 (extendv2hfv2sf2): Ditto.
5294 (truncv2sfv2hf2): Ditto.
5295 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
5296 (*vec_concat<mode>_movss): .. this.
5298 2023-10-16 liuhongt <hongtao.liu@intel.com>
5300 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
5302 (ix86_expand_round_sse4): Ditto.
5303 * config/i386/i386.md (roundhf2): New expander.
5304 (lroundhf<mode>2): Ditto.
5305 (lrinthf<mode>2): Ditto.
5306 (l<rounding_insn>hf<mode>2): Ditto.
5307 * config/i386/mmx.md (sqrt<mode>2): Ditto.
5308 (btrunc<mode>2): Ditto.
5309 (nearbyint<mode>2): Ditto.
5310 (rint<mode>2): Ditto.
5311 (lrint<mode><mmxintvecmodelower>2): Ditto.
5312 (floor<mode>2): Ditto.
5313 (lfloor<mode><mmxintvecmodelower>2): Ditto.
5314 (ceil<mode>2): Ditto.
5315 (lceil<mode><mmxintvecmodelower>2): Ditto.
5316 (round<mode>2): Ditto.
5317 (lround<mode><mmxintvecmodelower>2): Ditto.
5318 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
5319 (lfloor<mode><sseintvecmodelower>2): Ditto.
5320 (lceil<mode><sseintvecmodelower>2): Ditto.
5321 (lround<mode><sseintvecmodelower>2): Ditto.
5322 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
5323 (round<mode>2): Extend to V8HF/V16HF/V32HF.
5325 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
5327 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
5328 @code; document more completely the supported Fortran sentinels.
5330 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
5332 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
5333 instead of expand_binop. Optimize cases (i.e. avoid generating
5334 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
5335 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
5337 2023-10-15 Jakub Jelinek <jakub@redhat.com>
5339 PR tree-optimization/111800
5340 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
5341 print_decu_buf_size, print_hex_buf_size): New inline functions.
5342 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
5343 (assert_hexeq): Use print_hex_buf_size.
5344 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
5345 (print_decu): Use print_decu_buf_size.
5346 (print_hex): Use print_hex_buf_size.
5347 (pp_wide_int_large): Use print_dec_buf_size.
5348 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
5349 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
5351 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
5352 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
5354 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5356 * combine.cc (simplify_compare_const): Fix handling of unsigned
5359 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5361 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
5363 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
5365 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
5366 'omp allocate' for stack variables.
5368 2023-10-14 Jakub Jelinek <jakub@redhat.com>
5371 * tree-core.h (struct tree_base): Remove int_length.offset
5372 member, change type of int_length.unextended and int_length.extended
5373 from unsigned char to unsigned short.
5374 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
5375 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
5376 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
5377 TREE_INT_CST_NUNITS.
5378 * tree.cc (wide_int_to_tree_1): Don't assert
5379 TREE_INT_CST_OFFSET_NUNITS value.
5380 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
5381 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
5382 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
5383 (trailing_wide_int_storage): Change m_len type from unsigned char *
5384 to unsigned short *.
5385 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
5386 argument from unsigned char * to unsigned short *.
5387 (trailing_wide_ints): Change m_max_len type from unsigned char to
5388 unsigned short. Change m_len element type from
5389 struct{unsigned char len;} to unsigned short.
5390 (trailing_wide_ints <N>::operator []): Remove .len from m_len
5392 * value-range-storage.h (irange_storage::lengths_address): Change
5393 return type from const unsigned char * to const unsigned short *.
5394 (irange_storage::write_lengths_address): Change return type from
5395 unsigned char * to unsigned short *.
5396 * value-range-storage.cc (irange_storage::write_lengths_address):
5398 (irange_storage::lengths_address): Change return type from
5399 const unsigned char * to const unsigned short *.
5400 (write_wide_int): Change len argument type from unsigned char *&
5401 to unsigned short *&.
5402 (irange_storage::set_irange): Change len variable type from
5403 unsigned char * to unsigned short *.
5404 (read_wide_int): Change len argument type from unsigned char to
5405 unsigned short. Use trailing_wide_int_storage <unsigned short>
5406 instead of trailing_wide_int_storage and
5407 trailing_wide_int <unsigned short> instead of trailing_wide_int.
5408 (irange_storage::get_irange): Change len variable type from
5409 unsigned char * to unsigned short *.
5410 (irange_storage::size): Multiply n by sizeof (unsigned short)
5411 in len_size variable initialization.
5412 (irange_storage::dump): Change len variable type from
5413 unsigned char * to unsigned short *.
5415 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5417 * config/riscv/vector-iterators.md: Remove redundant iterators.
5419 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
5421 PR tree-optimization/111622
5422 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
5423 register a partial equivalence if an operand has no uses.
5425 2023-10-13 Richard Biener <rguenther@suse.de>
5427 PR tree-optimization/111795
5428 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
5429 integer mode mask arguments.
5431 2023-10-13 Richard Biener <rguenther@suse.de>
5433 * tree-vect-slp.cc (mask_call_maps): New.
5434 (vect_get_operand_map): Handle IFN_MASK_CALL.
5435 (vect_build_slp_tree_1): Likewise.
5436 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
5439 2023-10-13 Richard Biener <rguenther@suse.de>
5441 PR tree-optimization/111779
5442 * tree-sra.cc (sra_handled_bf_read_p): New function.
5443 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
5444 (sra_modify_expr): Likewise.
5445 (make_fancy_name_1): Skip over BIT_FIELD_REF.
5447 2023-10-13 Richard Biener <rguenther@suse.de>
5449 PR tree-optimization/111773
5450 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
5451 not elide noreturn calls that are reflected to the IL.
5453 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
5455 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
5457 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
5459 2023-10-13 Pan Li <pan2.li@intel.com>
5461 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
5462 pattern for lfloor/lfloorf.
5463 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
5464 (expand_vec_lfloor): New func decl for expanding lfloor.
5465 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
5466 for expanding lfloor.
5468 2023-10-13 Pan Li <pan2.li@intel.com>
5470 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
5471 pattern] for lceil/lceilf.
5472 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
5473 (expand_vec_lceil): New func decl for expanding lceil.
5474 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
5475 for expanding lceil.
5477 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
5480 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
5481 code from shifts that are undefined.
5482 (can_be_built_by_li_lis_and_rldicr): Likewise.
5483 (can_be_built_by_li_and_rldic): Protect code from shifts that
5484 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
5486 2023-10-12 Alex Coplan <alex.coplan@arm.com>
5488 * reg-notes.def (NOALIAS): Correct comment.
5490 2023-10-12 Jakub Jelinek <jakub@redhat.com>
5493 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
5495 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
5496 (wi::ints_for): Provide separate partial specializations for
5497 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
5498 and CONST_PRECISION, rather than using
5499 int_traits <extended_tree <N> >::precision_type as the second template
5501 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
5503 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
5506 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
5508 PR middle-end/111777
5509 * doc/extend.texi: Change subsubsection to subsection for
5512 2023-10-12 Tamar Christina <tamar.christina@arm.com>
5514 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
5516 2023-10-12 Jakub Jelinek <jakub@redhat.com>
5518 * wide-int.h (widest_int_storage <N>::write_val): If l is small
5519 and there is space in u.val array, store a canary value at the
5521 (widest_int_storage <N>::set_len): Check the canary hasn't been
5524 2023-10-12 Jakub Jelinek <jakub@redhat.com>
5527 * wide-int.h: Adjust file comment.
5528 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
5529 (WIDE_INT_MAX_INL_PRECISION): Define.
5530 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
5531 is smaller than WIDE_INT_MAX_ELTS.
5532 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
5533 WIDEST_INT_MAX_PRECISION): Define.
5534 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
5535 to pass 0 as a new argument.
5536 (class widest_int_storage): Likewise.
5537 (widest_int, widest2_int): Change typedefs to use widest_int_storage
5538 rather than fixed_wide_int_storage.
5539 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
5540 (struct binary_traits): Add partial specializations for
5541 INL_CONST_PRECISION.
5542 (generic_wide_int): Add needs_write_val_arg static data member.
5543 (int_traits): Likewise.
5544 (wide_int_storage): Replace val non-static data member with a union
5545 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
5546 assignment operator and destructor. Add unsigned int argument to
5548 (wide_int_storage::wide_int_storage): Initialize precision to 0
5549 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
5550 Assert in non-default ctor T's precision_type is not
5551 INL_CONST_PRECISION and allocate u.valp for large precision. Add
5553 (wide_int_storage::~wide_int_storage): New.
5554 (wide_int_storage::operator=): Add copy assignment operator. In
5555 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
5556 assert ctor T's precision_type is not INL_CONST_PRECISION and
5557 if precision changes, deallocate and/or allocate u.valp.
5558 (wide_int_storage::get_val): Return u.valp rather than u.val for
5560 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
5562 (wide_int_storage::set_len): Use write_val instead of writing val
5564 (wide_int_storage::from, wide_int_storage::from_array): Adjust
5566 (wide_int_storage::create): Allocate u.valp for large precisions.
5567 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
5568 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
5570 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
5571 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
5572 Adjust write_val callers.
5573 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
5574 (WIDEST_INT): Define.
5575 (widest_int_storage): New template class.
5576 (wi::int_traits <widest_int_storage>): New.
5577 (trailing_wide_int_storage::write_val): Add unused unsigned int
5579 (wi::get_binary_precision): Use
5580 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
5581 rather than get_precision on get_binary_result.
5582 (wi::copy): Adjust write_val callers. Don't call set_len if
5583 needs_write_val_arg.
5584 (wi::bit_not): If result.needs_write_val_arg, call write_val
5585 again with upper bound estimate of len.
5586 (wi::sext, wi::zext, wi::set_bit): Likewise.
5587 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
5588 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
5589 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
5590 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
5591 wi::lshift, wi::lrshift, wi::arshift): Likewise.
5592 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
5594 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
5595 generic_wide_int, instead add functions and templates for each
5596 storage of generic_wide_int. Make functions for
5597 generic_wide_int <wide_int_storage> and templates for
5598 generic_wide_int <widest_int_storage <N>> deleted.
5599 (wi::mask, wi::shifted_mask): Adjust write_val calls.
5600 * wide-int.cc (zeros): Decrease array size to 1.
5601 (BLOCKS_NEEDED): Use CEIL.
5602 (canonize): Use HOST_WIDE_INT_M1.
5603 (wi::from_buffer): Pass 0 to write_val.
5604 (wi::to_mpz): Use CEIL.
5605 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
5606 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
5607 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
5608 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
5609 above WIDE_INT_MAX_INL_PRECISION estimate precision from
5610 lengths of operands. Use XALLOCAVEC allocated buffers for
5611 prec above WIDE_INT_MAX_INL_PRECISION.
5612 (wi::divmod_internal): Likewise.
5613 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
5614 it from xlen and skip.
5615 (rshift_large_common): Remove xprecision argument, add len
5616 argument with len computed in caller. Don't return anything.
5617 (wi::lrshift_large, wi::arshift_large): Compute len here
5618 and pass it to rshift_large_common, for lengths above
5619 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
5620 (assert_deceq, assert_hexeq): For lengths above
5621 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
5622 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
5623 WIDE_INT_MAX_PRECISION.
5624 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
5625 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
5626 * wide-int-print.cc (print_decs, print_decu, print_hex): For
5627 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
5628 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
5629 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
5630 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
5631 WIDE_INT_MAX_PRECISION.
5632 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
5633 instead of hard coded CONST_PRECISION.
5634 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
5635 WIDE_INT_MAX_PRECISION.
5636 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
5637 than WIDE_INT_MAX_PRECISION.
5638 (wi::ints_for::zero): Use
5639 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
5640 wi::CONST_PRECISION.
5641 * tree.cc (build_replicated_int_cst): Formatting fix. Use
5642 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
5643 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
5644 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
5645 * double-int.h (wi::int_traits <double_int>::precision_type): Change
5646 to INL_CONST_PRECISION from CONST_PRECISION.
5647 * poly-int.h (struct poly_coeff_traits): Add partial specialization
5648 for wi::INL_CONST_PRECISION.
5649 * cfgloop.h (bound_wide_int): New typedef.
5650 (struct nb_iter_bound): Change bound type from widest_int to
5652 (struct loop): Change nb_iterations_upper_bound,
5653 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
5654 widest_int to bound_wide_int.
5655 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
5656 of i_bound is too large for bound_wide_int. Adjustments for the
5657 widest_int to bound_wide_int type change in non-static data members.
5658 (get_estimated_loop_iterations, get_max_loop_iterations,
5659 get_likely_max_loop_iterations): Adjustments for the widest_int to
5660 bound_wide_int type change in non-static data members.
5661 * tree-vect-loop.cc (vect_transform_loop): Likewise.
5662 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
5663 XALLOCAVEC allocated buffer for i_bound len above
5664 WIDE_INT_MAX_INL_ELTS.
5665 (record_estimate): Return early if wi::min_precision of i_bound is too
5666 large for bound_wide_int. Adjustments for the widest_int to
5667 bound_wide_int type change in non-static data members.
5668 (wide_int_cmp): Use bound_wide_int instead of widest_int.
5669 (bound_index): Use bound_wide_int instead of widest_int.
5670 (discover_iteration_bound_by_body_walk): Likewise. Use
5671 widest_int::from to convert it to widest_int when passed to
5673 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
5674 widest_int when passed to record_niter_bound.
5675 (estimate_numbers_of_iteration): Don't record upper bound if
5676 loop->nb_iterations has too large precision for bound_wide_int.
5677 (n_of_executions_at_most): Use widest_int::from.
5678 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
5679 the widest_int to bound_wide_int changes.
5680 * match.pd (fold_sign_changed_comparison simplification): Use
5681 wide_int::from on wi::to_wide instead of wi::to_widest.
5682 * value-range.h (irange::maybe_resize): Avoid using memcpy on
5683 non-trivially copyable elements.
5684 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
5685 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
5686 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
5687 Use wide_int::from on wi::to_wide instead of wi::to_widest.
5688 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
5689 before calling wi::udiv_trunc.
5690 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
5691 bound_wide_int type change in non-static data members.
5692 * lto-streamer-in.cc (input_cfg): Likewise.
5693 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
5694 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
5695 XALLOCAVEC allocated buffer. Formatting fix.
5696 * data-streamer-in.cc (streamer_read_wide_int,
5697 streamer_read_widest_int): Likewise.
5698 * tree-affine.cc (aff_combination_expand): Use placement new to
5699 construct name_expansion.
5700 (free_name_expansion): Destruct name_expansion.
5701 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
5702 index type from widest_int to offset_int.
5703 (class incr_info_d): Change incr type from widest_int to offset_int.
5704 (alloc_cand_and_find_basis, backtrace_base_for_ref,
5705 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
5706 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
5707 slsr_process_add, cand_abs_increment, replace_mult_candidate,
5708 replace_unconditional_candidate, incr_vec_index,
5709 create_add_on_incoming_edge, create_phi_basis_1,
5710 replace_conditional_candidate, record_increment,
5711 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
5712 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
5713 nearest_common_dominator_for_cands, insert_initializers,
5714 all_phi_incrs_profitable_1, replace_one_candidate,
5715 replace_profitable_candidates): Use offset_int rather than widest_int
5716 and wi::to_offset rather than wi::to_widest.
5717 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
5718 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
5720 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
5721 to construct tree_niter_desc and destruct it on failure.
5722 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
5723 * gengtype.cc (main): Remove widest_int handling.
5724 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
5725 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
5726 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
5727 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
5728 assert get_len () fits into it.
5729 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
5730 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
5732 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
5733 wide_int::from on wi::to_wide instead of wi::to_widest.
5734 * omp-general.cc (score_wide_int): New typedef.
5735 (omp_context_compute_score): Use score_wide_int instead of widest_int
5736 and adjust for those changes.
5737 (struct omp_declare_variant_entry): Change score and
5738 score_in_declare_simd_clone non-static data member type from widest_int
5740 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
5741 score_wide_int instead of widest_int and adjust for those changes.
5742 (omp_lto_output_declare_variant_alt): Likewise.
5743 (omp_lto_input_declare_variant_alt): Likewise.
5744 * godump.cc (go_output_typedef): Assert get_len () is smaller than
5745 WIDE_INT_MAX_INL_ELTS.
5747 2023-10-12 Pan Li <pan2.li@intel.com>
5749 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
5750 pattern for lround/lroundf.
5751 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
5752 (expand_vec_lround): New func decl for expanding lround.
5753 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
5754 for expanding lround.
5756 2023-10-12 Jakub Jelinek <jakub@redhat.com>
5758 * dwarf2out.h (wide_int_ptr): Remove.
5759 (dw_wide_int_ptr): New typedef.
5760 (struct dw_val_node): Change type of val_wide from wide_int_ptr
5762 (struct dw_wide_int): New type.
5763 (dw_wide_int::elt): New method.
5764 (dw_wide_int::operator ==): Likewise.
5765 * dwarf2out.cc (get_full_len): Change argument type to
5766 const dw_wide_int & from const wide_int &. Use CEIL. Call
5767 get_precision method instead of calling wi::get_precision.
5768 (alloc_dw_wide_int): New function.
5769 (add_AT_wide): Change w argument type to const wide_int_ref &
5770 from const wide_int &. Use alloc_dw_wide_int.
5771 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
5772 (insert_wide_int): Change val argument type to const wide_int_ref &
5773 from const wide_int &.
5774 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
5775 add_AT_wide instead of using a temporary variable.
5777 2023-10-12 Richard Biener <rguenther@suse.de>
5779 PR tree-optimization/111764
5780 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
5781 to allow x + x via special-casing of assigns.
5783 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
5785 * common/config/i386/cpuinfo.h (get_available_features):
5787 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
5788 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
5789 (ix86_handle_option): Handle -musermsr.
5790 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5791 Add FEATURE_USER_MSR.
5792 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
5793 * config.gcc: Add usermsrintrin.h
5794 * config/i386/cpuid.h (bit_USER_MSR): New.
5795 * config/i386/i386-builtin-types.def:
5796 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
5797 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
5798 Add __builtin_urdmsr and __builtin_uwrmsr.
5799 * config/i386/i386-builtins.h (ix86_builtins):
5800 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
5801 * config/i386/i386-c.cc (ix86_target_macros_internal):
5802 Define __USER_MSR__.
5803 * config/i386/i386-expand.cc (ix86_expand_builtin):
5804 Handle new builtins.
5805 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
5806 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
5808 * config/i386/i386.md (urdmsr): New define_insn.
5810 * config/i386/i386.opt: Add option -musermsr.
5811 * config/i386/x86gprintrin.h: Include usermsrintrin.h
5812 * doc/extend.texi: Document usermsr.
5813 * doc/invoke.texi: Document -musermsr.
5814 * doc/sourcebuild.texi: Document target usermsr.
5815 * config/i386/usermsrintrin.h: New file.
5817 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
5819 * config.gcc: Add loongarch-driver.h to tm_files.
5820 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
5821 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
5822 instead of $(TM_H) for building generator programs.
5824 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5827 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
5828 instruction emission and incorporate to stack_protect_set<mode>.
5829 (stack_protect_setdi): Rename to ...
5830 (stack_protect_set<mode>): ... this, adjust constraint.
5831 (stack_protect_testsi): Support prefixed instruction emission and
5832 incorporate to stack_protect_test<mode>.
5833 (stack_protect_testdi): Rename to ...
5834 (stack_protect_test<mode>): ... this, adjust constraint.
5836 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5838 * tree-vect-stmts.cc (vectorizable_store): Consider generated
5839 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
5842 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5844 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
5845 (vectorizable_store): Adjust the costing for the remaining memory
5846 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
5848 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5850 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
5851 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
5853 (vectorizable_store): Adjust the cost handling on
5854 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
5856 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5858 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
5859 get VMAT_LOAD_STORE_LANES.
5860 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
5861 without calling vect_model_store_cost. Factor out new lambda function
5862 update_prologue_cost.
5864 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5866 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
5867 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
5869 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
5870 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
5872 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5874 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
5875 vectorizable_scan_store without calling vect_model_store_cost
5878 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5880 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
5881 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
5882 handlings and the related parameter gs_info.
5883 (vect_build_scatter_store_calls): Add the handlings on costing with
5884 one more argument cost_vec.
5885 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
5886 without calling vect_model_store_cost any more.
5888 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5890 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
5891 to vect_model_store_cost down to some different transform paths
5892 according to the handlings of different vect_memory_access_types
5893 or some special handling need.
5895 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
5897 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
5898 vector store for some case of VMAT_ELEMENTWISE is supported.
5900 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
5901 Hu Lin1 <lin1.hu@intel.com>
5902 Hongyu Wang <hongyu.wang@intel.com>
5904 * config/i386/i386.cc (gen_push2): New function to emit push2
5905 and adjust cfa offset.
5906 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
5907 determine whether push2/pop2 can be used.
5908 (ix86_compute_frame_layout): Adjust preferred stack boundary
5909 and stack alignment needed for push2/pop2.
5910 (ix86_emit_save_regs): Emit push2 when available.
5911 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
5912 and adjust cfa info.
5913 (ix86_emit_restore_regs_using_pop2): New function to loop
5914 through the saved regs and call above.
5915 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
5916 when push2pop2 available.
5917 * config/i386/i386.md (push2_di): New pattern for push2.
5918 (pop2_di): Likewise for pop2.
5920 2023-10-12 Pan Li <pan2.li@intel.com>
5922 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
5923 (lrint<mode><v_i_l_ll_convert>2): Rename to.
5924 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
5926 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
5928 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
5930 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
5932 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
5933 pseudo op instead of a "call" pseudo op.
5935 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
5937 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
5939 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
5940 (riscv_subset_list::clone): Ditto.
5941 (riscv_subset_list::parse_single_ext): Ditto.
5942 (riscv_subset_list::set_loc): Ditto.
5943 (riscv_set_arch_by_subset_list): Ditto.
5944 * common/config/riscv/riscv-common.cc
5945 (riscv_subset_list::parse_single_std_ext): New.
5946 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
5947 (riscv_subset_list::clone): Ditto.
5948 (riscv_subset_list::parse_single_ext): Ditto.
5949 (riscv_subset_list::set_loc): Ditto.
5950 (riscv_set_arch_by_subset_list): Ditto.
5952 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
5954 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
5955 from argument rather than get setting from global setting.
5956 (riscv_override_options_internal): New, splited from
5957 riscv_override_options, also take a gcc_options argument.
5958 (riscv_option_override): Splited most part to
5959 riscv_override_options_internal.
5961 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
5963 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
5964 TARGET_<NAME>_OPTS_P.
5965 (InverseMask): Ditto.
5966 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
5967 TARGET_<NAME>_OPTS_P macro.
5968 (InverseMask): Ditto.
5970 2023-10-11 Andrew Pinski <pinskia@gmail.com>
5972 PR tree-optimization/111282
5973 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
5974 `a & ((~a) ^ b)`): New patterns.
5976 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
5978 * common/config/riscv/riscv-common.cc: Add the XCValu
5980 * config/riscv/constraints.md: Add builtins for the XCValu
5982 * config/riscv/predicates.md (immediate_register_operand):
5984 * config/riscv/corev.def: Likewise.
5985 * config/riscv/corev.md: Likewise.
5986 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
5987 (RISCV_ATYPE_UHI): Likewise.
5988 * config/riscv/riscv-ftypes.def: Likewise.
5989 * config/riscv/riscv.opt: Likewise.
5990 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
5991 * doc/extend.texi: Add XCValu documentation.
5992 * doc/sourcebuild.texi: Likewise.
5994 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
5996 * common/config/riscv/riscv-common.cc: Add XCVmac.
5997 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
5998 * config/riscv/riscv-builtins.cc: Likewise.
5999 * config/riscv/riscv.md: Likewise.
6000 * config/riscv/riscv.opt: Likewise.
6001 * doc/extend.texi: Add XCVmac builtin documentation.
6002 * doc/sourcebuild.texi: Likewise.
6003 * config/riscv/corev.def: New file.
6004 * config/riscv/corev.md: New file.
6006 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6008 * config/riscv/autovec.md: Fix index bug.
6009 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
6010 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
6011 (gather_scatter_valid_offset_mode_p): New function.
6013 2023-10-11 Pan Li <pan2.li@intel.com>
6015 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
6017 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
6019 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
6021 (expand_vec_lrint): New function impl for expanding lint.
6022 * config/riscv/vector-iterators.md: New mode attr and iterator.
6024 2023-10-11 Richard Biener <rguenther@suse.de>
6025 Jakub Jelinek <jakub@redhat.com>
6027 PR tree-optimization/111519
6028 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
6029 argument and pass it through to recursive calls and
6030 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
6031 change stmt for gimple_assign_single_p statements for which we don't
6033 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
6034 it through to recursive calls and count_nonzero_bytes calls. Don't
6035 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
6036 shadow the stmt argument.
6038 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
6040 PR middle-end/101955
6041 PR tree-optimization/106245
6042 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
6043 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
6045 2023-10-11 liuhongt <hongtao.liu@intel.com>
6048 * config/i386/mmx.md (divv4hf3): Refine predicate of
6049 operands[2] with register_operand.
6051 2023-10-10 Andrew Waterman <andrew@sifive.com>
6052 Philipp Tomsich <philipp.tomsich@vrull.eu>
6053 Jeff Law <jlaw@ventanamicro.com>
6055 * config/riscv/riscv.cc (struct machine_function): Track if a
6056 far-branch/jump is used within a function (and $ra needs to be
6058 (riscv_print_operand): Implement 'N' (inverse integer branch).
6059 (riscv_far_jump_used_p): Implement.
6060 (riscv_save_return_addr_reg_p): New function.
6061 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
6062 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
6063 (CALL_USED_REGISTERS): Update $ra.
6064 * config/riscv/riscv.md: Add new types "ret" and "jalr".
6065 (length attribute): Handle long conditional and unconditional
6067 (conditional branch pattern): Handle case where jump can not
6068 reach the intended target.
6069 (indirect_jump, tablejump): Use new "jalr" type.
6070 (simple_return): Use new "ret" type.
6071 (simple_return_internal, eh_return_internal): Likewise.
6072 (gpr_restore_return, riscv_mret): Likewise.
6073 (riscv_uret, riscv_sret): Likewise.
6074 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
6076 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
6078 2023-10-10 Andrew Pinski <pinskia@gmail.com>
6080 PR tree-optimization/111679
6081 * match.pd (`a | ((~a) ^ b)`): New pattern.
6083 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6086 * config/riscv/autovec.md: Add VLS BOOL modes.
6088 2023-10-10 Richard Biener <rguenther@suse.de>
6090 PR tree-optimization/111751
6091 * fold-const.cc (fold_view_convert_expr): Up the buffer size
6093 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
6094 constants, giving up when re-interpretation to the target type
6097 2023-10-10 Richard Biener <rguenther@suse.de>
6099 PR tree-optimization/111751
6100 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
6101 BLKmode result from the padding bits check.
6103 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
6105 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
6107 * config/arc/arc.md (addsi_compare): Make pattern canonical.
6108 (addsi_compare_2): Fix identation, constraint letters.
6109 (addsi_compare_3): Likewise.
6111 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
6113 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
6114 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
6115 when scaling loop profile
6117 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
6119 PR tree-optimization/111694
6120 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
6122 * value-relation.cc (adjust_equivalence_range): New.
6123 * value-relation.h (adjust_equivalence_range): New prototype.
6125 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
6127 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
6128 not call get_identity_relation.
6129 (gori_compute::compute_operand2_range): Ditto.
6130 * value-relation.cc (get_identity_relation): Remove.
6131 * value-relation.h (get_identity_relation): Remove protyotype.
6133 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
6135 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
6136 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
6138 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
6140 (TARGET_SCHED_ADJUST_COST): Define.
6141 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
6142 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
6143 * config/riscv/generic-ooo.md: New file.
6144 * config/riscv/vector.md: Add vsetvl_pre.
6146 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6148 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
6149 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
6150 * config/riscv/vector.md (movmisalign<mode>): New pattern.
6152 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
6154 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
6155 directives for store-pair instruction.
6157 2023-10-09 Richard Biener <rguenther@suse.de>
6159 PR tree-optimization/111715
6160 * alias.cc (reference_alias_ptr_type_1): When we have
6161 a type-punning ref at the base search for the access
6162 path part that's still semantically valid.
6164 2023-10-09 Pan Li <pan2.li@intel.com>
6166 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
6168 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
6170 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
6172 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
6173 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
6175 (ix86_split_lshr): Likewise, split shifts by one bit into
6176 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
6177 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
6178 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
6179 (rcrdi2): New define_insn for rcrq.
6180 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
6181 set the carry flag from the least significant bit, modelled using
6183 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
6184 controlling use of rcr 1 vs. shrd, which is significantly faster on
6187 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6189 * config/i386/i386.opt: Allow -mno-evex512.
6191 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6192 Hu, Lin1 <lin1.hu@intel.com>
6194 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
6197 (VFH_AVX512VL): Ditto.
6199 (VHF_AVX512VL): Ditto.
6200 (VI2H_AVX512VL): Ditto.
6201 (VI2F_256_512): Ditto.
6202 (VF48_I1248): Remove unused iterator.
6203 (VF48H_AVX512VL): Add TARGET_EVEX512.
6204 (VF_AVX512): Remove unused iterator.
6205 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
6206 (REDUC_SMINMAX_MODE): Ditto.
6208 (VFH_SF_AVX512VL): Ditto.
6209 (VEC_PERM_AVX2): Ditto.
6211 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6212 Hu, Lin1 <lin1.hu@intel.com>
6214 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
6216 (VI1_AVX512F): Ditto.
6217 (VI1_AVX512VNNI): Ditto.
6218 (VI1_AVX512VL_F): Ditto.
6219 (VI12_VI48F_AVX512VL): Ditto.
6220 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
6221 (sdot_prod<mode>): Ditto.
6222 (VEC_PERM_AVX2): Ditto.
6225 (vpmadd52<vpmadd52type>v8di): Ditto.
6226 (usdot_prod<mode>): Ditto.
6227 (vpdpbusd_v16si): Ditto.
6228 (vpdpbusds_v16si): Ditto.
6229 (vpdpwssd_v16si): Ditto.
6230 (vpdpwssds_v16si): Ditto.
6231 (VI48_AVX512VP2VL): Ditto.
6232 (avx512vp2intersect_2intersectv16si): Ditto.
6233 (VF_AVX512BF16VL): Ditto.
6234 (VF1_AVX512_256): Ditto.
6236 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6238 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
6239 Make sure there is EVEX512 enabled.
6240 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
6241 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
6242 when !TARGET_EVEX512.
6243 * config/i386/i386.md (avx512bw_512): New.
6244 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
6245 (*zero_extendsidi2): Change isa to avx512bw_512.
6248 (*andn<mode>_1): Change isa to kmov_isa.
6249 (*<code><mode>_1): Ditto.
6250 (*notxor<mode>_1): Ditto.
6251 (*one_cmpl<mode>2_1): Ditto.
6252 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
6253 (*ashl<mode>3_1): Change isa to kmov_isa.
6254 (*lshr<mode>3_1): Ditto.
6255 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
6256 (VI1248_AVX512VLBW): Ditto.
6257 (VHFBF_AVX512VL): Ditto.
6261 (VI1_AVX512): Ditto.
6262 (VI12_256_512_AVX512VL): Ditto.
6263 (VI2_AVX2_AVX512BW): Ditto.
6264 (VI2_AVX512VNNIBW): Ditto.
6265 (VI2_AVX512VL): Ditto.
6266 (VI2HFBF_AVX512VL): Ditto.
6267 (VI8_AVX2_AVX512BW): Ditto.
6268 (VIMAX_AVX2_AVX512BW): Ditto.
6269 (VIMAX_AVX512VL): Ditto.
6270 (VI12_AVX2_AVX512BW): Ditto.
6271 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
6272 (VI248_AVX512VL): Ditto.
6273 (VI248_AVX512VLBW): Ditto.
6274 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
6275 (VI248_AVX512BW): Ditto.
6276 (VI248_AVX512BW_AVX512VL): Ditto.
6278 (VI124_256_AVX512F_AVX512BW): Ditto.
6279 (VI_AVX512BW): Ditto.
6280 (VIHFBF_AVX512BW): Ditto.
6281 (SWI1248_AVX512BWDQ): Ditto.
6282 (SWI1248_AVX512BW): Ditto.
6283 (SWI1248_AVX512BWDQ2): Ditto.
6284 (*knotsi_1_zext): Ditto.
6285 (define_split for zero_extend + not): Ditto.
6287 (REDUC_SMINMAX_MODE): Ditto.
6288 (VEC_EXTRACT_MODE): Ditto.
6289 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
6290 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
6291 (truncv32hiv32qi2): Ditto.
6292 (avx512bw_<code>v32hiv32qi2): Ditto.
6293 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
6294 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
6296 (VEC_PERM_AVX2): Ditto.
6297 (AVX512ZEXTMASK): Ditto.
6299 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
6300 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
6301 (avx512bw_packssdw<mask_name>): Ditto.
6302 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
6303 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
6304 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
6305 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
6306 (vec_unpacks_lo_di): Ditto.
6308 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
6309 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
6310 (VI1248_AVX512VL_AVX512BW): Ditto.
6311 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
6312 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
6313 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
6314 (<insn>v32qiv32hi2): Ditto.
6315 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
6316 (VPERMI2): Add TARGET_EVEX512.
6319 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6321 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
6322 Add TARGET_EVEX512 for 512 bit usage.
6323 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
6324 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
6325 (VF1_128_256VL): Ditto.
6326 (VF2_AVX512VL): Ditto.
6327 (VI8_256_512): Ditto.
6328 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
6330 (AVX512_VEC): Ditto.
6331 (AVX512_VEC_2): Ditto.
6332 (VI4F_BRCST32x2): Ditto.
6333 (VI8F_BRCST64x2): Ditto.
6335 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6337 * config/i386/i386-builtins.cc
6338 (ix86_vectorize_builtin_gather): Disable 512 bit gather
6339 when !TARGET_EVEX512.
6340 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
6342 (ix86_expand_int_sse_cmp): Ditto.
6343 (ix86_expand_vector_init_one_nonzero): Disable subroutine
6344 when !TARGET_EVEX512.
6345 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
6346 (ix86_vectorize_vec_perm_const): Disable subroutine when
6348 * config/i386/i386.cc
6349 (standard_sse_constant_p): Add TARGET_EVEX512.
6350 (standard_sse_constant_opcode): Ditto.
6351 (ix86_get_ssemov): Ditto.
6352 (ix86_legitimate_constant_p): Ditto.
6353 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
6354 when !TARGET_EVEX512.
6355 * config/i386/i386.md (avx512f_512): New.
6356 (movxi): Add TARGET_EVEX512.
6357 (*movxi_internal_avx512f): Ditto.
6358 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
6360 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
6362 (*movhi_internal): Change alternative 11 to *Yv.
6363 (*movdf_internal): Change alternative 12 to Yv.
6364 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
6365 alternative 5 and 6.
6366 (*mov<mode>_internal): Change alternative 4 to Yv.
6367 (define_split for convert SF to DF): Add TARGET_EVEX512.
6368 (extendbfsf2_1): Ditto.
6369 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
6370 for 512 bit when !TARGET_EVEX512.
6371 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
6372 (V48_AVX512VL): Ditto.
6373 (V48_256_512_AVX512VL): Ditto.
6374 (V48H_AVX512VL): Ditto.
6375 (VI12_AVX512VL): Ditto.
6380 (VF1_VF2_AVX512DQ): Ditto.
6387 (VF2_512_256): Ditto.
6388 (VF2_512_256VL): Ditto.
6391 (VI48_AVX512VL): Ditto.
6392 (VI1248_AVX512VLBW): Ditto.
6393 (VF_AVX512VL): Ditto.
6394 (VFH_AVX512VL): Ditto.
6395 (VF1_AVX512VL): Ditto.
6400 (VI8_AVX512VL): Ditto.
6401 (VI2_AVX512F): Ditto.
6402 (VI4_AVX512F): Ditto.
6403 (VI4_AVX512VL): Ditto.
6404 (VI48_AVX512F_AVX512VL): Ditto.
6405 (VI8_AVX2_AVX512F): Ditto.
6406 (VI8_AVX_AVX512F): Ditto.
6409 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
6410 (VI248_AVX512VLBW): Ditto.
6411 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
6412 (VI248_AVX512BW): Ditto.
6413 (VI248_AVX512BW_AVX512VL): Ditto.
6414 (VI48_AVX512F): Ditto.
6415 (VI48_AVX_AVX512F): Ditto.
6416 (VI12_AVX_AVX512F): Ditto.
6418 (VI124_256_AVX512F_AVX512BW): Ditto.
6420 (VI_AVX512BW): Ditto.
6421 (VIHFBF_AVX512BW): Ditto.
6422 (VI4F_256_512): Ditto.
6423 (VI48F_256_512): Ditto.
6425 (VI12_VI48F_AVX512VL): Ditto.
6427 (AVX512MODE2P): Ditto.
6428 (STORENT_MODE): Ditto.
6429 (REDUC_PLUS_MODE): Ditto.
6430 (REDUC_SMINMAX_MODE): Ditto.
6431 (*andnot<mode>3): Change isa attribute to avx512f_512.
6432 (*andnot<mode>3): Ditto.
6433 (<code><mode>3): Ditto.
6435 (FMAMODEM): Add TARGET_EVEX512.
6436 (FMAMODE_AVX512): Ditto.
6437 (VFH_SF_AVX512VL): Ditto.
6438 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
6439 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
6441 (avx512f_cvtdq2pd512_2): Ditto.
6442 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
6443 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
6445 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
6446 (vec_unpacks_lo_v16sf): Ditto.
6447 (vec_unpacks_hi_v16sf): Ditto.
6448 (vec_unpacks_float_hi_v16si): Ditto.
6449 (vec_unpacks_float_lo_v16si): Ditto.
6450 (vec_unpacku_float_hi_v16si): Ditto.
6451 (vec_unpacku_float_lo_v16si): Ditto.
6452 (vec_pack_sfix_trunc_v8df): Ditto.
6453 (avx512f_vec_pack_sfix_v8df): Ditto.
6454 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
6455 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
6456 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
6457 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
6458 (AVX512_VEC): Ditto.
6459 (AVX512_VEC_2): Ditto.
6460 (vec_extract_lo_v64qi): Ditto.
6461 (vec_extract_hi_v64qi): Ditto.
6462 (VEC_EXTRACT_MODE): Ditto.
6463 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
6464 (avx512f_movddup512<mask_name>): Ditto.
6465 (avx512f_unpcklpd512<mask_name>): Ditto.
6466 (*<avx512>_vternlog<mode>_all): Ditto.
6467 (*<avx512>_vpternlog<mode>_1): Ditto.
6468 (*<avx512>_vpternlog<mode>_2): Ditto.
6469 (*<avx512>_vpternlog<mode>_3): Ditto.
6470 (avx512f_shufps512_mask): Ditto.
6471 (avx512f_shufps512_1<mask_name>): Ditto.
6472 (avx512f_shufpd512_mask): Ditto.
6473 (avx512f_shufpd512_1<mask_name>): Ditto.
6474 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
6475 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
6476 (vec_dupv2df<mask_name>): Ditto.
6477 (trunc<pmov_src_lower><mode>2): Ditto.
6478 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
6479 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
6480 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
6481 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
6482 (truncv8div8qi2): Ditto.
6483 (avx512f_<code>v8div16qi2): Ditto.
6484 (*avx512f_<code>v8div16qi2_store_1): Ditto.
6485 (*avx512f_<code>v8div16qi2_store_2): Ditto.
6486 (avx512f_<code>v8div16qi2_mask): Ditto.
6487 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
6488 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
6489 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
6490 (vec_widen_umult_even_v16si<mask_name>): Ditto.
6491 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
6492 (vec_widen_smult_even_v16si<mask_name>): Ditto.
6493 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
6494 (VEC_PERM_AVX2): Ditto.
6495 (one_cmpl<mode>2): Ditto.
6496 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
6497 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
6498 (define_split to xor): Ditto.
6499 (*andnot<mode>3): Ditto.
6500 (define_split for ior): Ditto.
6501 (*iornot<mode>3): Ditto.
6502 (*xnor<mode>3): Ditto.
6503 (*<nlogic><mode>3): Ditto.
6504 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
6505 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
6506 (avx512f_pshufdv3_mask): Ditto.
6507 (avx512f_pshufd_1<mask_name>): Ditto.
6508 (*vec_extractv4ti): Ditto.
6509 (VEXTRACTI128_MODE): Ditto.
6510 (define_split to vec_extract): Ditto.
6511 (VI1248_AVX512VL_AVX512BW): Ditto.
6512 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
6513 (<insn>v16qiv16si2): Ditto.
6514 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
6515 (<insn>v16hiv16si2): Ditto.
6516 (avx512f_zero_extendv16hiv16si2_1): Ditto.
6517 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
6518 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
6519 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
6520 (<insn>v8qiv8di2): Ditto.
6521 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
6522 (<insn>v8hiv8di2): Ditto.
6523 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
6524 (*avx512f_zero_extendv8siv8di2_1): Ditto.
6525 (*avx512f_zero_extendv8siv8di2_2): Ditto.
6526 (<insn>v8siv8di2): Ditto.
6527 (avx512f_roundps512_sfix): Ditto.
6528 (vashrv8di3): Ditto.
6529 (vashrv16si3): Ditto.
6530 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
6531 (vec_dupv4sf): Add TARGET_EVEX512.
6532 (*vec_dupv4si): Ditto.
6533 (*vec_dupv2di): Ditto.
6534 (vec_dup<mode>): Change isa attribute to avx512f_512.
6535 (VPERMI2): Add TARGET_EVEX512.
6537 (VEC_INIT_MODE): Ditto.
6538 (VEC_INIT_HALF_MODE): Ditto.
6539 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
6541 (avx512f_vcvtps2ph512_mask_sae): Ditto.
6542 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
6544 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
6545 (INT_BROADCAST_MODE): Ditto.
6547 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6549 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
6550 Disable zmm broadcast for !TARGET_EVEX512.
6551 * config/i386/i386-options.cc (ix86_option_override_internal):
6552 Do not use PVW_512 when no-evex512.
6553 (ix86_simd_clone_adjust): Add evex512 target into string.
6554 * config/i386/i386.cc (type_natural_mode): Report ABI warning
6555 when using zmm register w/o evex512.
6556 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
6557 (ix86_hard_regno_mode_ok): Ditto.
6558 (ix86_set_reg_reg_cost): Ditto.
6559 (ix86_rtx_costs): Ditto.
6560 (ix86_vector_mode_supported_p): Ditto.
6561 (ix86_preferred_simd_mode): Ditto.
6562 (ix86_get_mask_mode): Ditto.
6563 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
6564 libmvec call when !TARGET_EVEX512.
6565 (ix86_simd_clone_usable): Ditto.
6566 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
6567 when !TARGET_EVEX512
6568 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
6569 (STORE_MAX_PIECES): Ditto.
6571 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6573 * config/i386/i386-builtin.def (BDESC): Add
6574 OPTION_MASK_ISA2_EVEX512.
6576 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6578 * config/i386/i386-builtin.def (BDESC): Add
6579 OPTION_MASK_ISA2_EVEX512.
6581 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6583 * config/i386/i386-builtin.def (BDESC): Add
6584 OPTION_MASK_ISA2_EVEX512.
6586 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6588 * config/i386/i386-builtin.def (BDESC): Add
6589 OPTION_MASK_ISA2_EVEX512.
6591 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6593 * config/i386/i386-builtin.def (BDESC): Add
6594 OPTION_MASK_ISA2_EVEX512.
6595 * config/i386/i386-builtins.cc
6596 (ix86_init_mmx_sse_builtins): Ditto.
6598 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6599 Hu, Lin1 <lin1.hu@intel.com>
6601 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
6604 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6606 * config.gcc: Add avx512bitalgvlintrin.h.
6607 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
6609 * config/i386/avx5124vnniwintrin.h: Ditto.
6610 * config/i386/avx512bf16intrin.h: Ditto.
6611 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
6612 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
6613 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
6615 * config/i386/avx512ifmaintrin.h: Ditto
6616 * config/i386/avx512pfintrin.h: Ditto
6617 * config/i386/avx512vbmi2intrin.h: Ditto.
6618 * config/i386/avx512vbmiintrin.h: Ditto.
6619 * config/i386/avx512vnniintrin.h: Ditto.
6620 * config/i386/avx512vp2intersectintrin.h: Ditto.
6621 * config/i386/avx512vpopcntdqintrin.h: Ditto.
6622 * config/i386/gfniintrin.h: Ditto.
6623 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
6624 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
6625 * config/i386/vpclmulqdqintrin.h: Ditto.
6626 * config/i386/avx512bitalgvlintrin.h: New.
6628 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6630 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
6633 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6635 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
6638 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6640 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
6642 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
6644 * common/config/i386/i386-common.cc
6645 (OPTION_MASK_ISA2_EVEX512_SET): New.
6646 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
6647 (ix86_handle_option): Handle EVEX512.
6648 * config/i386/i386-c.cc
6649 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
6650 when AVX512VL is set.
6651 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
6652 (ix86_valid_target_attribute_inner_p): Ditto.
6653 (ix86_option_override_internal): Set EVEX512 target if it is not
6654 explicitly set when AVX512 is enabled. Disable
6655 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
6656 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
6658 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
6661 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
6662 from insn condition.
6663 (lrint<mode>si2): New insn pattern for 32bit lrint.
6665 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
6668 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
6669 Enable SImode on FP registers for P7.
6670 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
6671 move between FP registers. Set attribute isa of stfiwx to "*"
6672 and attribute of stxsiwx to "p7".
6674 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6676 * config/s390/s390.md: Make use of new copysign RTL.
6678 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
6680 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
6681 with "jm" for alternative 0 and 1 of operand 2.
6682 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
6683 "ja" for alternative 0 and 1 of operand2.
6685 2023-10-08 David Malcolm <dmalcolm@redhat.com>
6688 * text-art/table.cc (table::maybe_set_cell_span): New.
6689 (table::add_other_table): New.
6690 * text-art/table.h (class table::cell_placement): Add class table
6692 (table::add_rows): New.
6693 (table::add_row): Reimplement in terms of add_rows.
6694 (table::maybe_set_cell_span): New decl.
6695 (table::add_other_table): New decl.
6696 * text-art/types.h (operator+): New operator for rect + coord.
6698 2023-10-08 David Malcolm <dmalcolm@redhat.com>
6700 * genmatch.cc (main): Update for "m_" prefix of some fields of
6702 * input.cc (make_location): Update for removal of
6703 COMBINE_LOCATION_DATA.
6704 (dump_line_table_statistics): Update for "m_" prefix of some
6705 fields of line_maps.
6706 (location_with_discriminator): Update for removal of
6707 COMBINE_LOCATION_DATA.
6708 (line_table_test::line_table_test): Update for "m_" prefix of some
6709 fields of line_maps.
6710 * toplev.cc (general_init): Likewise.
6711 * tree.cc (set_block): Update for removal of
6712 COMBINE_LOCATION_DATA.
6713 (set_source_range): Likewise.
6715 2023-10-08 David Malcolm <dmalcolm@redhat.com>
6717 * input.cc (make_location): Move implementation to
6718 line_maps::make_location.
6720 2023-10-08 David Malcolm <dmalcolm@redhat.com>
6723 * input.cc (file_cache::add_file): Update leading comment to
6724 clarify that it can fail.
6725 (file_cache::lookup_or_add_file): Likewise.
6726 (file_cache::get_source_file_content): Gracefully handle
6727 lookup_or_add_file failing.
6729 2023-10-08 liuhongt <hongtao.liu@intel.com>
6731 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
6733 (ix86_build_signbit_mask): Ditto.
6734 * config/i386/mmx.md (mmxintvecmode): Ditto.
6735 (<code><mode>2): New define_expand.
6736 (*mmx_<code><mode>): New define_insn_and_split.
6737 (*mmx_nabs<mode>2): Ditto.
6738 (*mmx_andnot<mode>3): New define_insn.
6739 (<code><mode>3): Ditto.
6740 (copysign<mode>3): New define_expand.
6741 (xorsign<mode>3): Ditto.
6742 (signbit<mode>2): Ditto.
6744 2023-10-08 liuhongt <hongtao.liu@intel.com>
6746 * config/i386/mmx.md (VHF_32_64): New mode iterator.
6747 (<insn><mode>3): New define_expand, merged from ..
6748 (<insn>v4hf3): .. this and
6749 (<insn>v2hf3): .. this.
6750 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
6751 (movd_v2hf_to_sse): .. this.
6752 (<code><mode>3): New define_expand.
6754 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
6756 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
6757 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
6759 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
6761 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
6763 (can_be_built_by_li_lis_and_rldicr): New function.
6764 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
6765 can_be_built_by_li_lis_and_rldicl.
6767 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
6769 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
6771 (can_be_built_by_li_and_rotldi): Rename to ...
6772 (can_be_built_by_li_lis_and_rotldi): ... this function.
6773 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
6775 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
6777 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
6778 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
6780 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
6782 * config/riscv/linux.h: Pass the static-pie specific options to
6785 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
6787 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
6789 * config/aarch64/aarch64-tune.md: Regenerated.
6790 * doc/invoke.texi: Add command-line option for cortex-x4 core.
6792 2023-10-07 Kong Lingling <lingling.kong@intel.com>
6793 Hongyu Wang <hongyu.wang@intel.com>
6794 Hongtao Liu <hongtao.liu@intel.com>
6796 * config/i386/constraints.md (jb): New constraint for vsib memory
6797 that does not allow gpr32.
6798 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
6799 alternative and set attr_gpr32 to 0.
6800 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
6802 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
6803 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
6804 (*rsqrtsf2_sse): Likewise.
6805 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
6806 avx/noavx and assign jr/r constraint to dest.
6807 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
6808 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
6809 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
6810 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
6811 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
6812 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
6813 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
6814 (<sse2_avx2>_pmovmskb): Likewise.
6815 (*<sse2_avx2>_pmovmskb_zext): Likewise.
6816 (*sse2_pmovmskb_ext): Likewise.
6817 (*<sse2_avx2>_pmovmskb_lt): Likewise.
6818 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
6819 (*sse2_pmovmskb_ext_lt): Likewise.
6820 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
6821 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
6822 (sse_vmrcpv4sf2): Likewise.
6823 (*sse_vmrcpv4sf2): Likewise.
6824 (rsqrt<mode>2): Likewise.
6825 (sse_vmrsqrtv4sf2): Likewise.
6826 (*sse_vmrsqrtv4sf2): Likewise.
6827 (avx_h<insn>v4df3): Likewise.
6828 (sse3_hsubv2df3): Likewise.
6829 (avx_h<insn>v8sf3): Likewise.
6830 (sse3_h<insn>v4sf3): Likewise.
6831 (<sse3>_lddqu<avxsizesuffix>): Likewise.
6832 (avx_cmp<mode>3): Likewise.
6833 (avx_vmcmp<mode>3): Likewise.
6834 (*sse2_gt<mode>3): Likewise.
6835 (sse_ldmxcsr): Likewise.
6836 (sse_stmxcsr): Likewise.
6837 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
6838 avx alternative and set attr_gpr32 to 0.
6839 (avx2_permv2ti): Likewise.
6840 (*avx_vperm2f128<mode>_full): Likewise.
6841 (*avx_vperm2f128<mode>_nozero): Likewise.
6842 (vec_set_lo_v32qi): Likewise.
6843 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
6844 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
6845 (avx_cmp<mode>3): Likewise.
6846 (avx_vmcmp<mode>3): Likewise.
6847 (*<sse>_maskcmp<mode>3_comm): Likewise.
6848 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
6850 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
6851 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
6852 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
6853 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
6854 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
6855 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
6856 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
6857 (vec_set_lo_<mode><mask_name>): Likewise.
6858 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
6859 (vec_set_hi_<mode><mask_name>): Likewise.
6860 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
6861 (vec_set_hi_<mode>): Likewise.
6862 (vec_set_lo_<mode>): Likewise.
6863 (avx2_set_hi_v32qi): Likewise.
6865 2023-10-07 Kong Lingling <lingling.kong@intel.com>
6866 Hongyu Wang <hongyu.wang@intel.com>
6867 Hongtao Liu <hongtao.liu@intel.com>
6869 * config/i386/i386.md (*movhi_internal): Split out non-gpr
6870 supported pextrw with mem constraint to avx/noavx alternatives,
6871 set jm and attr gpr32 0 to the noavx alternative.
6872 (*mov<mode>_internal): Likewise.
6873 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
6874 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
6875 (mmx_pshufbv4qi3): Likewise.
6876 (*mmx_pinsrd): Likewise.
6877 (*mmx_pinsrb): Likewise.
6878 (*pinsrb): Likewise.
6879 (mmx_pshufbv8qi3): Likewise.
6880 (mmx_pshufbv4qi3): Likewise.
6881 (@sse4_1_insertps_<mode>): Likewise.
6882 (*mmx_pextrw): Split altrenatives and map non-EGPR
6883 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
6884 (*movv2qi_internal): Likewise.
6885 (*pextrw): Likewise.
6886 (*mmx_pextrb): Likewise.
6887 (*mmx_pextrb_zext): Likewise.
6888 (*pextrb): Likewise.
6889 (*pextrb_zext): Likewise.
6890 (vec_extractv2si_1): Likewise.
6891 (vec_extractv2si_1_zext): Likewise.
6892 * config/i386/sse.md: (vi128_h_r): New mode attr for
6893 pinsr{bw}/pextr{bw} with reg operand.
6894 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
6895 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
6896 (*vec_extract<mode>): Likewise.
6897 (*vec_extract<mode>): Likewise for HFBF pattern.
6898 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
6899 (*vec_extractv4si_1): Likewise.
6900 (*vec_extractv4si_zext): Likewise.
6901 (*vec_extractv2di_1): Likewise.
6902 (*vec_concatv2si_sse4_1): Likewise.
6903 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
6904 (vec_concatv2di): Likewise.
6905 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
6906 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
6907 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
6908 %v for avx/noavx alternatives if necessary.
6909 (*vec_concatv2sf_sse4_1): Likewise.
6910 (*sse4_1_extractps): Likewise.
6911 (vec_set<mode>_0): Likewise for VI4F_128.
6912 (*vec_setv4sf_sse4_1): Likewise.
6913 (@sse4_1_insertps<mode>): Likewise.
6914 (ssse3_pmaddubsw128): Likewise.
6915 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
6916 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
6917 (<ssse3_avx2>_palignr<mode>): Likewise.
6918 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
6919 (<sse4_1_avx2>_mpsadbw): Likewise.
6920 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
6921 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
6922 (*sse4_1_<code><mode>3<mask_name>): Likewise.
6923 (*<code>v8hi3): Likewise.
6924 (*<code>v16qi3): Likewise.
6925 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
6926 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
6927 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
6928 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
6929 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
6930 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
6931 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
6932 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
6933 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
6934 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
6935 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
6937 (aesdeclast): Likewise.
6939 (aesenclast): Likewise.
6940 (pclmulqdq): Likewise.
6941 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
6942 (vgf2p8affineqb_<mode><mask_name>): Likewise.
6943 (vgf2p8mulb_<mode><mask_name>): Likewise.
6945 2023-10-07 Kong Lingling <lingling.kong@intel.com>
6946 Hongyu Wang <hongyu.wang@intel.com>
6947 Hongtao Liu <hongtao.liu@intel.com>
6949 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
6951 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
6953 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
6954 and constraint jm to all non-evex alternatives, adjust
6955 alternative outputs if evex reg is mentioned.
6956 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
6957 and constraint jm/ja to all non-evex alternatives.
6958 (ptesttf2): Likewise.
6959 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
6960 (sse4_1_round<ssescalarmodesuffix>): Likewise.
6961 (sse4_2_pcmpestri): Likewise.
6962 (sse4_2_pcmpestrm): Likewise.
6963 (sse4_2_pcmpestr_cconly): Likewise.
6964 (sse4_2_pcmpistr): Likewise.
6965 (sse4_2_pcmpistri): Likewise.
6966 (sse4_2_pcmpistrm): Likewise.
6967 (sse4_2_pcmpistr_cconly): Likewise.
6969 (aeskeygenassist): Likewise.
6971 2023-10-07 Kong Lingling <lingling.kong@intel.com>
6972 Hongyu Wang <hongyu.wang@intel.com>
6973 Hongtao Liu <hongtao.liu@intel.com>
6975 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
6976 attr gpr32 0 and constraint jm/ja to all mem alternatives.
6977 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
6978 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
6979 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
6980 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
6981 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
6982 (<ssse3_avx2>_psign<mode>3): Likewise.
6983 (ssse3_psign<mode>3): Likewise.
6984 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
6985 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
6986 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
6987 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
6988 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
6989 (<sse4_1_avx2>_mpsadbw): Likewise.
6990 (<sse4_1_avx2>_pblendvb): Likewise.
6991 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
6992 (sse4_1_pblend<ssemodesuffix>): Likewise.
6993 (*avx2_pblend<ssemodesuffix>): Likewise.
6994 (avx2_permv2ti): Likewise.
6995 (*avx_vperm2f128<mode>_nozero): Likewise.
6996 (*avx2_eq<mode>3): Likewise.
6997 (*sse4_1_eqv2di3): Likewise.
6998 (sse4_2_gtv2di3): Likewise.
6999 (avx2_gt<mode>3): Likewise.
7001 2023-10-07 Kong Lingling <lingling.kong@intel.com>
7002 Hongyu Wang <hongyu.wang@intel.com>
7003 Hongtao Liu <hongtao.liu@intel.com>
7005 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
7007 (<xsave>_rex64): Likewise.
7008 (<xrstor>_rex64): Likewise.
7009 (<xrstor>64): Likewise.
7010 (fxsave64): Likewise.
7011 (fxstore64): Likewise.
7013 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
7014 Kong Lingling <lingling.kong@intel.com>
7015 Hongtao Liu <hongtao.liu@intel.com>
7017 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
7018 adjust mnemonic for vmovduq/vmovdqa.
7019 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
7020 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
7021 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
7024 2023-10-07 Kong Lingling <lingling.kong@intel.com>
7025 Hongyu Wang <hongyu.wang@intel.com>
7026 Hongtao Liu <hongtao.liu@intel.com>
7028 * config/i386/i386.cc (map_egpr_constraints): New funciton to
7029 map common constraints to EGPR prohibited constraints.
7030 (ix86_md_asm_adjust): Calls map_egpr_constraints.
7031 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
7033 2023-10-07 Kong Lingling <lingling.kong@intel.com>
7034 Hongyu Wang <hongyu.wang@intel.com>
7035 Hongtao Liu <hongtao.liu@intel.com>
7037 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
7039 (ix86_regno_ok_for_insn_base_p): Likewise.
7040 (ix86_insn_index_reg_class): Likewise.
7041 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
7042 New helper function to scan the insn.
7043 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
7044 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
7045 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
7046 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
7047 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
7048 (INSN_INDEX_REG_CLASS): Likewise.
7049 (enum reg_class): Add INDEX_GPR16.
7050 (GENERAL_GPR16_REGNO_P): Define.
7051 * config/i386/i386.md (gpr32): New attribute.
7053 2023-10-07 Kong Lingling <lingling.kong@intel.com>
7054 Hongyu Wang <hongyu.wang@intel.com>
7055 Hongtao Liu <hongtao.liu@intel.com>
7057 * config/i386/constraints.md (jr): New register constraint
7058 that prohibits EGPR.
7059 (jR): Constraint that force usage of EGPR.
7060 (jm): New memory constraint that prohibits EGPR.
7061 (ja): Likewise for Bm constraint.
7062 (jb): Likewise for Tv constraint.
7063 (j<): New auto-dec memory constraint that prohibits EGPR.
7064 (j>): Likewise for ">" constraint.
7065 (jo): Likewise for "o" constraint.
7066 (jv): Likewise for "V" constraint.
7067 (jp): Likewise for "p" constraint.
7068 * config/i386/i386.h (enum reg_class): Add new reg class
7071 2023-10-07 Kong Lingling <lingling.kong@intel.com>
7072 Hongyu Wang <hongyu.wang@intel.com>
7073 Hongtao Liu <hongtao.liu@intel.com>
7075 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
7076 New function prototype.
7077 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
7079 (debugger64_register_map): Likewise.
7080 (ix86_conditional_register_usage): Clear REX2 register when APX
7082 (ix86_code_end): Add handling for REX2 reg.
7083 (print_reg): Likewise.
7084 (ix86_output_jmp_thunk_or_indirect): Likewise.
7085 (ix86_output_indirect_branch_via_reg): Likewise.
7086 (ix86_attr_length_vex_default): Likewise.
7087 (ix86_emit_save_regs): Adjust to allow saving r31.
7088 (ix86_register_priority): Set REX2 reg priority same as REX.
7089 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
7090 (x86_extended_rex2reg_mentioned_p): New function.
7091 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
7093 (REG_ALLOC_ORDER): Likewise.
7094 (FIRST_REX2_INT_REG): Define.
7095 (LAST_REX2_INT_REG): Ditto.
7096 (GENERAL_REGS): Add 16 new registers.
7097 (INT_SSE_REGS): Likewise.
7098 (FLOAT_INT_REGS): Likewise.
7099 (FLOAT_INT_SSE_REGS): Likewise.
7100 (INT_MASK_REGS): Likewise.
7101 (ALL_REGS):Likewise.
7102 (REX2_INT_REG_P): Define.
7103 (REX2_INT_REGNO_P): Ditto.
7104 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
7105 (REGNO_OK_FOR_INDEX_P): Ditto.
7106 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
7107 * config/i386/i386.md: Add 16 new integer general
7110 2023-10-07 Kong Lingling <lingling.kong@intel.com>
7111 Hongyu Wang <hongyu.wang@intel.com>
7112 Hongtao Liu <hongtao.liu@intel.com>
7114 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
7115 (XCR_APX_F_ENABLED_MASK): Likewise.
7116 (get_available_features): Detect APX_F under
7117 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
7118 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
7119 (ix86_handle_option): Handle -mapxf.
7120 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
7121 * common/config/i386/i386-isas.h: Add entry for APX_F.
7122 * config/i386/cpuid.h (bit_APX_F): New.
7123 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
7124 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
7125 * config/i386/i386-opts.h (enum apx_features): New enum.
7126 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
7127 * config/i386/i386-options.cc (ix86_function_specific_save):
7128 Save ix86_apx_features.
7129 (ix86_function_specific_restore): Restore it.
7130 (ix86_valid_target_attribute_inner_p): Add mapxf.
7131 (ix86_option_override_internal): Set ix86_apx_features for PTA
7132 and TARGET_APX_F. Also reports error when APX_F is set but not
7133 having TARGET_64BIT.
7134 * config/i386/i386.opt: (-mapxf): New ISA flag option.
7135 (-mapx=): New enumeration option.
7136 (apx_features): New enum type.
7137 (apx_none): New enum value.
7138 (apx_egpr): Likewise.
7139 (apx_push2pop2): Likewise.
7140 (apx_ndd): Likewise.
7141 (apx_all): Likewise.
7142 * doc/invoke.texi: Document mapxf.
7144 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
7145 Kong Lingling <lingling.kong@intel.com>
7146 Hongtao Liu <hongtao.liu@intel.com>
7148 * addresses.h (index_reg_class): New wrapper function like
7150 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
7151 * doc/tm.texi.in: Ditto.
7152 * lra-constraints.cc (index_part_to_reg): Pass index_class.
7153 (process_address_1): Calls index_reg_class with curr_insn and
7154 replace INDEX_REG_CLASS with its return value index_cl.
7155 * reload.cc (find_reloads_address): Likewise.
7156 (find_reloads_address_1): Likewise.
7158 2023-10-07 Kong Lingling <lingling.kong@intel.com>
7159 Hongyu Wang <hongyu.wang@intel.com>
7160 Hongtao Liu <hongtao.liu@intel.com>
7162 * addresses.h (base_reg_class): Add insn argument and new macro
7163 INSN_BASE_REG_CLASS.
7164 (regno_ok_for_base_p_1): Add insn argument and new macro
7165 REGNO_OK_FOR_INSN_BASE_P.
7166 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
7167 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
7168 REGNO_OK_FOR_INSN_BASE_P.
7169 * doc/tm.texi.in: Ditto.
7170 * lra-constraints.cc (process_address_1): Pass insn to
7172 (curr_insn_transform): Ditto.
7173 * reload.cc (find_reloads): Ditto.
7174 (find_reloads_address): Ditto.
7175 (find_reloads_address_1): Ditto.
7176 (find_reloads_subreg_address): Ditto.
7177 * reload1.cc (maybe_fix_stack_asms): Ditto.
7179 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
7182 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
7185 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
7188 * config/rs6000/predicates.md (lowpart_subreg_operator): New
7190 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
7191 (movsf_from_si2): Rename to ...
7192 (movsf_from_si2_<code>): ... this.
7194 2023-10-07 Pan Li <pan2.li@intel.com>
7197 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
7198 object is a REG before extracting its' REGNO.
7200 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
7202 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
7203 one into add3_cc_overflow_1 followed by add3_carry.
7204 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
7205 "*add<mode>3_cc_overflow_1" to provide generator function.
7207 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
7208 Uros Bizjak <ubizjak@gmail.com>
7210 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
7211 to perform left shifts into shorter instructions with -Oz.
7213 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
7215 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
7217 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
7219 * doc/extend.texi (Function Attributes): Mention standard attribute
7221 (Variable Attributes): Likewise.
7222 (Type Attributes): Likewise.
7223 (Attribute Syntax): Likewise.
7225 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
7227 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
7228 (mov<mode>_exec): Likewise.
7229 (mov<mode>_sgprbase): Likewise.
7230 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
7231 (*movti_insn): Likewise.
7233 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
7235 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
7237 2023-10-06 Andrew Pinski <pinskia@gmail.com>
7239 PR middle-end/111699
7240 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
7241 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
7243 2023-10-06 Jakub Jelinek <jakub@redhat.com>
7245 * ipa-prop.h (ipa_bits): Remove.
7246 (struct ipa_jump_func): Remove bits member.
7247 (struct ipcp_transformation): Remove bits member, adjust
7249 (ipa_get_ipa_bits_for_value): Remove.
7250 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
7251 (ipa_bits_hash_table): Remove.
7252 (ipa_print_node_jump_functions_for_edge): Don't print bits.
7253 (ipa_get_ipa_bits_for_value): Remove.
7254 (ipa_set_jfunc_bits): Remove.
7255 (ipa_compute_jump_functions_for_edge): For pointers query
7256 pointer alignment before ipa_set_jfunc_vr and update_bitmask
7257 in there. For integral types, just rely on bitmask already
7258 being handled in value ranges.
7259 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
7260 (ipcp_transformation_initialize): Neither here.
7261 (ipcp_transformation_t::duplicate): Don't copy bits vector.
7262 (ipa_write_jump_function): Don't stream bits here.
7263 (ipa_read_jump_function): Neither here.
7264 (useful_ipcp_transformation_info_p): Don't test bits vec.
7265 (write_ipcp_transformation_info): Don't stream bits here.
7266 (read_ipcp_transformation_info): Neither here.
7267 (ipcp_get_parm_bits): Get mask and value from m_vr rather
7269 (ipcp_update_bits): Remove.
7270 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
7271 bitmask stored in value range.
7272 (ipcp_transform_function): Don't test bits vector, don't call
7274 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
7275 jfunc->bits, instead get mask and value from jfunc->m_vr.
7276 (ipcp_store_bits_results): Remove.
7277 (ipcp_store_vr_results): Incorporate parts of
7278 ipcp_store_bits_results here, merge the bitmasks with value
7279 range if both are supplied.
7280 (ipcp_driver): Don't call ipcp_store_bits_results.
7281 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
7284 2023-10-06 Pan Li <pan2.li@intel.com>
7286 * config/riscv/autovec.md: Update comments.
7288 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
7290 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
7292 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
7294 * timevar.def (TV_TREE_FAST_VRP): New.
7295 * tree-pass.h (make_pass_fast_vrp): New prototype.
7296 * tree-vrp.cc (class fvrp_folder): New.
7297 (fvrp_folder::fvrp_folder): New.
7298 (fvrp_folder::~fvrp_folder): New.
7299 (fvrp_folder::value_of_expr): New.
7300 (fvrp_folder::value_on_edge): New.
7301 (fvrp_folder::value_of_stmt): New.
7302 (fvrp_folder::pre_fold_bb): New.
7303 (fvrp_folder::post_fold_bb): New.
7304 (fvrp_folder::pre_fold_stmt): New.
7305 (fvrp_folder::fold_stmt): New.
7306 (execute_fast_vrp): New.
7307 (pass_data_fast_vrp): New.
7308 (pass_vrp:execute): Check for fast VRP pass.
7309 (make_pass_fast_vrp): New.
7311 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
7313 * gimple-range.cc (dom_ranger::dom_ranger): New.
7314 (dom_ranger::~dom_ranger): New.
7315 (dom_ranger::range_of_expr): New.
7316 (dom_ranger::edge_range): New.
7317 (dom_ranger::range_on_edge): New.
7318 (dom_ranger::range_in_bb): New.
7319 (dom_ranger::range_of_stmt): New.
7320 (dom_ranger::maybe_push_edge): New.
7321 (dom_ranger::pre_bb): New.
7322 (dom_ranger::post_bb): New.
7323 * gimple-range.h (class dom_ranger): New.
7325 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
7327 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
7328 (gori_calc_operands): New.
7329 (gori_on_edge): New.
7330 (gori_name_helper): New.
7331 (gori_name_on_edge): New.
7332 * gimple-range-gori.h (gori_on_edge): New prototype.
7333 (gori_name_on_edge): New prototype.
7335 2023-10-05 Sergei Trofimovich <siarheit@google.com>
7338 PR gcov-profile/111559
7339 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
7340 uninitialized probabilities when merging counters with zero
7343 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
7346 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
7347 strategy for non-default address spaces.
7348 (decide_alg): Use loop strategy as a fallback strategy for
7349 non-default address spaces.
7351 2023-10-05 Jakub Jelinek <jakub@redhat.com>
7353 * sreal.cc (verify_aritmetics): Rename to ...
7354 (verify_arithmetics): ... this.
7355 (sreal_verify_arithmetics): Adjust caller.
7357 2023-10-05 Martin Jambor <mjambor@suse.cz>
7360 2023-10-03 Martin Jambor <mjambor@suse.cz>
7363 * cgraph.h (cgraph_edge): Add a parameter to
7364 redirect_call_stmt_to_callee.
7365 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
7366 parameter to modify_call.
7367 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
7368 parameter killed_ssas, pass it to padjs->modify_call.
7369 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
7370 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
7371 Instead of substituting uses, invoke purge_transitive_uses. If
7372 hash of killed SSAs has not been provided, create a temporary one
7373 and release SSAs that have been added to it.
7374 * tree-inline.cc (redirect_all_calls): Create
7375 id->killed_new_ssa_names earlier, pass it to edge redirection,
7377 (copy_body): Release SSAs in id->killed_new_ssa_names.
7379 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7381 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
7382 (vec_series<mode>): Ditto.
7383 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
7384 (shuffle_decompress_patterns): Ditto.
7386 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
7388 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
7389 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
7390 (arc_ccfsm_record_branch_deleted): Likewise.
7391 (arc_ccfsm_cond_exec_p): Likewise.
7392 (arc_ccfsm): Likewise.
7393 (arc_ccfsm_record_condition): Likewise.
7394 (make_pass_arc_ifcvt): Likewise.
7395 * config/arc/arc.cc (arc_ccfsm): Remove.
7396 (arc_ccfsm_current): Likewise.
7397 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
7398 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
7399 (ARC_CCFSM_COND_EXEC_P): Likewise.
7400 (CCFSM_ISCOMPACT): Likewise.
7401 (CCFSM_DBR_ISCOMPACT): Likewise.
7402 (machine_function): Remove ccfsm related fields.
7403 (arc_ifcvt): Remove pass.
7404 (arc_print_operand): Remove `#` punct operand and other ccfsm
7406 (arc_ccfsm_advance): Remove.
7407 (arc_ccfsm_at_label): Likewise.
7408 (arc_ccfsm_record_condition): Likewise.
7409 (arc_ccfsm_post_advance): Likewise.
7410 (arc_ccfsm_branch_deleted_p): Likewise.
7411 (arc_ccfsm_record_branch_deleted): Likewise.
7412 (arc_ccfsm_cond_exec_p): Likewise.
7413 (arc_get_ccfsm_cond): Likewise.
7414 (arc_final_prescan_insn): Remove ccfsm references.
7415 (arc_internal_label): Likewise.
7416 (arc_reorg): Likewise.
7417 (arc_output_libcall): Likewise.
7418 * config/arc/arc.md: Remove ccfsm references and update related
7419 instruction patterns.
7421 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
7423 * config/arc/arc.cc (arc_init): Remove '^' punct char.
7424 (arc_print_operand): Remove related code.
7425 * config/arc/arc.md: Update patterns which uses '%&'.
7427 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
7429 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
7430 (arc_toggle_unalign): Likewise.
7431 * config/arc/arc.cc (machine_function) Remove unalign.
7432 (arc_init): Remove `&` punct character.
7433 (arc_print_operand): Remove `&` related functions.
7434 (arc_verify_short): Update function's number of parameters.
7435 (output_short_suffix): Update function.
7436 (arc_short_long): Likewise.
7437 (arc_clear_unalign): Remove.
7438 (arc_toggle_unalign): Likewise.
7439 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
7440 (ASM_OUTPUT_ALIGN): Update.
7441 * config/arc/arc.md: Remove all `%&` references.
7442 * config/arc/arc.opt (mannotate-align): Ignore option.
7443 * doc/invoke.texi (mannotate-align): Update description.
7445 2023-10-05 Richard Biener <rguenther@suse.de>
7447 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
7448 ask for internal_fn_p (CFN_LAST).
7450 2023-10-05 Richard Biener <rguenther@suse.de>
7452 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
7453 visited value numbers are available itself.
7455 2023-10-05 Richard Biener <rguenther@suse.de>
7458 * doc/extend.texi (attribute flatten): Clarify.
7460 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
7462 * config/arc/arc-protos.h (emit_shift): Delete prototype.
7463 (arc_pre_reload_split): New function prototype.
7464 * config/arc/arc.cc (emit_shift): Delete function.
7465 (arc_pre_reload_split): New predicate function, copied from i386,
7466 to schedule define_insn_and_split splitters to the split1 pass.
7467 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
7468 (ashrsi3): Likewise.
7469 (lshrsi3): Likewise.
7470 (shift_si3): Move after other shift patterns, and disable when
7471 operands[2] is one (which is handled by its own define_insn).
7472 Use shiftr4_operator, instead of shift4_operator, as this is no
7473 longer used for left shifts.
7474 (shift_si3_loop): Likewise. Additionally remove match_scratch.
7475 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
7476 (*ashrsi3_nobs): Likewise.
7477 (*lshrsi3_nobs): Likewise.
7478 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
7479 (add_shift): Rename define_insn from *add_shift.
7480 * config/arc/predicates.md (shiftl4_operator): Delete.
7481 (shift4_operator): Delete.
7483 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
7485 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
7486 Change type attribute to "unary", as this doesn't have operands[2].
7487 Change length attribute to "*,4" to allow compact representation.
7488 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
7489 insn type attribute to "unary", as this doesn't have operands[2].
7490 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
7491 insn type attribute to "unary", as this doesn't have operands[2].
7493 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
7495 PR rtl-optimization/110701
7496 * combine.cc (record_dead_and_set_regs_1): Split comment into
7497 pieces placed before the relevant clauses. When the SET_DEST
7498 is a partial_subreg_p, mark the bits outside of the updated
7499 portion of the destination as undefined.
7501 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
7504 * opt-read.awk: Drop multidimensional arrays.
7505 * opth-gen.awk: Ditto.
7507 2023-10-04 Xi Ruoyao <xry111@xry111.site>
7509 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
7510 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
7512 2023-10-04 Jakub Jelinek <jakub@redhat.com>
7514 PR middle-end/111369
7515 * match.pd (x == cstN ? cst4 : cst3): Use
7516 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
7517 Fix comment typo. Formatting fix.
7518 (a?~t:t -> (-(a))^t): Always convert to type rather
7519 than using build_nonstandard_integer_type. Perform negation
7520 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
7522 2023-10-04 Jakub Jelinek <jakub@redhat.com>
7524 PR tree-optimization/111668
7525 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
7526 a ? 0 : -1 cases before the powerof2cst cases and differentiate
7527 between 1-bit precision types, larger precision boolean types
7528 and other integral types. Fix comment pastos and formatting.
7530 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
7532 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
7533 pointers rather than range_info_get_range.
7535 2023-10-03 Martin Jambor <mjambor@suse.cz>
7537 * ipa-modref.h (modref_summary::dump): Make const.
7538 * ipa-modref.cc (modref_summary::dump): Likewise.
7539 (dump_lto_records): Dump to out instead of dump_file.
7541 2023-10-03 Martin Jambor <mjambor@suse.cz>
7544 * ipa-param-manipulation.cc
7545 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
7546 return uses of PARAM will be removed.
7547 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
7548 * ipa-sra.cc (isra_param_desc): New fields
7549 remove_only_when_retval_removed and split_only_when_retval_removed.
7550 (struct gensum_param_desc): Likewise. Fix comment long line.
7551 (ipa_sra_function_summaries::duplicate): Copy the new flags.
7552 (dump_gensum_param_descriptor): Dump the new flags.
7553 (dump_isra_param_descriptor): Likewise.
7554 (isra_track_scalar_value_uses): New parameter desc. Set its flag
7555 remove_only_when_retval_removed when encountering a simple return.
7556 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
7557 with desc. Pass it to isra_track_scalar_value_uses and set its
7559 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
7560 parameter. If there is a direct return use, mark any..
7561 (create_parameter_descriptors): Pass the whole parameter descriptor to
7562 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
7563 (process_scan_results): Copy the new flags.
7564 (isra_write_node_summary): Stream the new flags.
7565 (isra_read_node_info): Likewise.
7566 (adjust_parameter_descriptions): Check that transformations
7567 requring return removal only happen when return value is removed.
7568 Restructure main loop. Adjust dump message.
7570 2023-10-03 Martin Jambor <mjambor@suse.cz>
7573 * cgraph.h (cgraph_edge): Add a parameter to
7574 redirect_call_stmt_to_callee.
7575 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
7576 parameter to modify_call.
7577 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
7578 parameter killed_ssas, pass it to padjs->modify_call.
7579 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
7580 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
7581 Instead of substituting uses, invoke purge_transitive_uses. If
7582 hash of killed SSAs has not been provided, create a temporary one
7583 and release SSAs that have been added to it.
7584 * tree-inline.cc (redirect_all_calls): Create
7585 id->killed_new_ssa_names earlier, pass it to edge redirection,
7587 (copy_body): Release SSAs in id->killed_new_ssa_names.
7589 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
7591 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
7592 * tree-vrp.cc (vrp_pass_num): Remove.
7593 (pass_vrp::my_pass): Remove.
7594 (pass_vrp::pass_vrp): Add warn_p as a parameter.
7595 (pass_vrp::final_p): New.
7596 (pass_vrp::set_pass_param): Set final_p param.
7597 (pass_vrp::execute): Call execute_range_vrp with no conditions.
7598 (make_pass_vrp): Pass additional parameter.
7599 (make_pass_early_vrp): Ditto.
7601 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
7603 * tree-ssanames.cc (set_range_info): Return true only if the
7604 current value changes.
7606 2023-10-03 David Malcolm <dmalcolm@redhat.com>
7608 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
7609 prefixes to text_info fields.
7610 (diagnostic_report_diagnostic): Likewise.
7611 (verbatim): Use text_info ctor.
7612 (simple_diagnostic_path::add_event): Likewise.
7613 (simple_diagnostic_path::add_thread_event): Likewise.
7614 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
7615 "m_" prefixes to text_info fields.
7616 (dump_context::dump_printf_va): Use text_info ctor.
7617 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
7618 (graphviz_out::print): Likewise.
7619 * opt-problem.cc (opt_problem::opt_problem): Likewise.
7620 * pretty-print.cc (pp_format): Update for "m_" prefixes to
7622 (pp_printf): Use text_info ctor.
7623 (pp_verbatim): Likewise.
7624 (assert_pp_format_va): Likewise.
7625 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
7627 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
7629 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
7630 prefixes to text_info fields.
7631 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
7633 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
7635 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
7636 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
7637 (*scc_insn): Don't split to a conditional move sequence for LTU.
7639 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
7641 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
7642 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
7643 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
7644 (load_pair_dw_<DX:mode><DX2:mode>)
7645 (store_pair_sw_<SX:mode><SX2:mode>)
7646 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
7647 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
7648 (*extend<SHORT:mode><GPI:mode>2_aarch64)
7649 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
7650 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
7651 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
7652 (add<mode>3_compare0, *addsi3_compare0_uxtw)
7653 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
7654 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
7655 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
7656 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
7657 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
7658 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
7659 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
7660 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
7661 (*aarch64_ashl_sisd_or_int_<mode>3)
7662 (*aarch64_lshr_sisd_or_int_<mode>3)
7663 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
7664 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
7665 (<optab><fcvt_target><GPF:mode>2)
7666 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
7667 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
7668 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
7670 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
7671 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
7672 (*aarch64_mul_unpredicated_<mode>)
7673 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
7674 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
7675 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
7676 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
7677 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
7678 (@aarch64_sve_<sve_int_op>_lane_<mode>)
7679 (@aarch64_sve_add_mul_lane_<mode>)
7680 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
7681 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
7682 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
7683 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
7684 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
7685 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
7686 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
7687 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
7688 (@aarch64_sve_qadd_<sve_int_op><mode>)
7689 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
7690 (@aarch64_sve_sub_<sve_int_op><mode>)
7691 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
7692 (@aarch64_sve_qsub_<sve_int_op><mode>)
7693 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
7694 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
7695 (@aarch64_pred_<sve_int_op><mode>)
7696 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
7697 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
7698 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
7699 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
7700 (*cond_<sve_fp_op><mode>_any_relaxed)
7701 (*cond_<sve_fp_op><mode>_any_strict)
7702 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
7703 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
7704 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
7705 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
7706 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
7707 (*aarch64_sve_mov<mode>, aarch64_wrffr)
7708 (mask_scatter_store<mode><v_int_container>)
7709 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
7710 (*mask_scatter_store<mode><v_int_container>_sxtw)
7711 (*mask_scatter_store<mode><v_int_container>_uxtw)
7712 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
7713 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
7714 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
7715 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
7716 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
7717 (vec_series<mode>, @extract_<last_op>_<mode>)
7718 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
7719 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
7720 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
7721 (@cond_<optab><mode>)
7722 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
7723 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
7724 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
7725 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
7726 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
7727 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
7728 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
7729 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
7730 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
7731 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
7732 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
7733 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
7734 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
7735 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
7736 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
7737 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
7738 (*cond_bic<mode>_2, *cond_bic<mode>_any)
7739 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
7740 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
7741 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
7742 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
7743 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
7744 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
7745 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
7746 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
7747 (*cond_<optab><mode>_2_const_relaxed)
7748 (*cond_<optab><mode>_2_const_strict)
7749 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
7750 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
7751 (*cond_<optab><mode>_any_const_relaxed)
7752 (*cond_<optab><mode>_any_const_strict)
7753 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
7754 (*cond_add<mode>_2_const_strict)
7755 (*cond_add<mode>_any_const_relaxed)
7756 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
7757 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
7758 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
7759 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
7760 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
7761 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
7762 (*aarch64_pred_abd<mode>_strict)
7763 (*aarch64_cond_abd<mode>_2_relaxed)
7764 (*aarch64_cond_abd<mode>_2_strict)
7765 (*aarch64_cond_abd<mode>_3_relaxed)
7766 (*aarch64_cond_abd<mode>_3_strict)
7767 (*aarch64_cond_abd<mode>_any_relaxed)
7768 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
7769 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
7770 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
7771 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
7772 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
7773 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
7774 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
7775 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
7776 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
7777 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
7778 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
7779 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
7780 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
7781 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
7782 (@aarch64_sve_<sve_fp_op>vnx4sf)
7783 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
7784 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
7785 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
7786 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
7787 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
7788 (@aarch64_fold_extract_vector_<last_op>_<mode>)
7789 (@aarch64_sve_splice<mode>)
7790 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
7791 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
7792 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
7793 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
7794 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
7795 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
7796 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
7797 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
7798 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
7799 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
7800 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
7801 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
7802 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
7803 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
7804 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
7805 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
7806 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
7808 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
7809 (load_pair<DREG:mode><DREG2:mode>)
7810 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
7811 (aarch64_simd_mov_from_<mode>low)
7812 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
7813 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
7814 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
7815 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
7816 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
7817 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
7818 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
7819 (*aarch64_combinez_be<mode>)
7820 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
7821 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
7822 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
7824 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
7826 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
7827 in new compact pattern syntax.
7829 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
7831 * gensupport.cc (convert_syntax): Updated to support unordered
7832 constraints in compact syntax.
7834 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
7836 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
7837 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
7838 (copysign<mode>3_hard): Likewise.
7839 (copysign<mode>3_soft): Likewise.
7840 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
7842 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
7845 2023-10-02 David Malcolm <dmalcolm@redhat.com>
7847 * diagnostic-format-json.cc (toplevel_array): Remove global in
7848 favor of json_output_format::m_top_level_array.
7849 (cur_group): Likewise, for json_output_format::m_cur_group.
7850 (cur_children_array): Likewise, for
7851 json_output_format::m_cur_children_array.
7852 (class json_output_format): New.
7853 (json_begin_diagnostic): Remove, in favor of
7854 json_output_format::on_begin_diagnostic.
7855 (json_end_diagnostic): Convert to...
7856 (json_output_format::on_end_diagnostic): ...this.
7857 (json_begin_group): Remove, in favor of
7858 json_output_format::on_begin_group.
7859 (json_end_group): Remove, in favor of
7860 json_output_format::on_end_group.
7861 (json_flush_to_file): Remove, in favor of
7862 json_output_format::flush_to_file.
7863 (json_stderr_final_cb): Remove, in favor of json_output_format
7865 (json_output_base_file_name): Remove global.
7866 (class json_stderr_output_format): New.
7867 (json_file_final_cb): Remove.
7868 (class json_file_output_format): New.
7869 (json_emit_diagram): Remove.
7870 (diagnostic_output_format_init_json): Update.
7871 (diagnostic_output_format_init_json_file): Update.
7872 * diagnostic-format-sarif.cc (the_builder): Remove this global,
7873 moving to a field of the sarif_output_format.
7874 (sarif_builder::maybe_make_artifact_content_object): Use the
7875 context's m_file_cache.
7876 (get_source_lines): Convert to...
7877 (sarif_builder::get_source_lines): ...this, using context's
7879 (sarif_begin_diagnostic): Remove, in favor of
7880 sarif_output_format::on_begin_diagnostic.
7881 (sarif_end_diagnostic): Remove, in favor of
7882 sarif_output_format::on_end_diagnostic.
7883 (sarif_begin_group): Remove, in favor of
7884 sarif_output_format::on_begin_group.
7885 (sarif_end_group): Remove, in favor of
7886 sarif_output_format::on_end_group.
7887 (sarif_flush_to_file): Delete.
7888 (sarif_stderr_final_cb): Delete.
7889 (sarif_output_base_file_name): Delete.
7890 (sarif_file_final_cb): Delete.
7891 (class sarif_output_format): New.
7892 (sarif_emit_diagram): Delete.
7893 (class sarif_stream_output_format): New.
7894 (class sarif_file_output_format): New.
7895 (diagnostic_output_format_init_sarif): Update.
7896 (diagnostic_output_format_init_sarif_stderr): Update.
7897 (diagnostic_output_format_init_sarif_file): Update.
7898 (diagnostic_output_format_init_sarif_stream): Update.
7899 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
7900 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
7901 diagnostic_text_output_format's dtor.
7902 (diagnostic_initialize): Update, making a new instance of
7903 diagnostic_text_output_format.
7904 (diagnostic_finish): Delete m_output_format, rather than calling
7906 (diagnostic_report_diagnostic): Assert that m_output_format is
7907 non-NULL. Replace call to begin_group_cb with call to
7908 m_output_format->on_begin_group. Replace call to
7909 diagnostic_starter with call to
7910 m_output_format->on_begin_diagnostic. Replace call to
7911 diagnostic_finalizer with call to
7912 m_output_format->on_end_diagnostic.
7913 (diagnostic_emit_diagram): Replace both optional call to
7914 m_diagrams.m_emission_cb and default implementation with call to
7915 m_output_format->on_diagram. Move default implementation to
7916 diagnostic_text_output_format::on_diagram.
7917 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
7918 end_group_cb with call to m_output_format->on_end_group.
7919 (diagnostic_text_output_format::~diagnostic_text_output_format):
7920 New, based on default_diagnostic_final_cb.
7921 (diagnostic_text_output_format::on_begin_diagnostic): New, based
7922 on code from diagnostic_report_diagnostic.
7923 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
7924 (diagnostic_text_output_format::on_diagram): New, based on code
7925 from diagnostic_emit_diagram.
7926 * diagnostic.h (class diagnostic_output_format): New.
7927 (class diagnostic_text_output_format): New.
7928 (diagnostic_context::begin_diagnostic): Move to...
7929 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
7930 (diagnostic_context::start_span): Move to...
7931 (diagnostic_context::m_text_callbacks::start_span): ...here.
7932 (diagnostic_context::end_diagnostic): Move to...
7933 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
7934 (diagnostic_context::begin_group_cb): Remove, in favor of
7935 m_output_format->on_begin_group.
7936 (diagnostic_context::end_group_cb): Remove, in favor of
7937 m_output_format->on_end_group.
7938 (diagnostic_context::final_cb): Remove, in favor of
7939 m_output_format's dtor.
7940 (diagnostic_context::m_output_format): New field.
7941 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
7942 of m_output_format->on_diagram.
7943 (diagnostic_starter): Update.
7944 (diagnostic_finalizer): Update.
7945 (diagnostic_output_format_init_sarif_stream): New.
7946 * input.cc (location_get_source_line): Move implementation apart from
7947 call to diagnostic_file_cache_init to...
7948 (file_cache::get_source_line): ...this new function...
7949 (location_get_source_line): ...and reintroduce, rewritten in terms of
7950 file_cache::get_source_line.
7951 (get_source_file_content): Likewise, refactor into...
7952 (file_cache::get_source_file_content): ...this new function.
7953 * input.h (file_cache::get_source_line): New decl.
7954 (file_cache::get_source_file_content): New decl.
7955 * selftest-diagnostic.cc
7956 (test_diagnostic_context::test_diagnostic_context): Update.
7957 * tree-diagnostic-path.cc (event_range::print): Update for
7958 change to diagnostic_context's start_span callback.
7960 2023-10-02 David Malcolm <dmalcolm@redhat.com>
7962 * diagnostic-show-locus.cc: Update for reorganization of
7963 source-printing fields of diagnostic_context.
7964 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
7965 (diagnostic_initialize): Likewise.
7966 * diagnostic.h (diagnostic_context::show_caret): Move to...
7967 (diagnostic_context::m_source_printing::enabled): ...here.
7968 (diagnostic_context::caret_max_width): Move to...
7969 (diagnostic_context::m_source_printing::max_width): ...here.
7970 (diagnostic_context::caret_chars): Move to...
7971 (diagnostic_context::m_source_printing::caret_chars): ...here.
7972 (diagnostic_context::colorize_source_p): Move to...
7973 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
7974 (diagnostic_context::show_labels_p): Move to...
7975 (diagnostic_context::m_source_printing::show_labels_p): ...here.
7976 (diagnostic_context::show_line_numbers_p): Move to...
7977 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
7978 (diagnostic_context::min_margin_width): Move to...
7979 (diagnostic_context::m_source_printing::min_margin_width): ...here.
7980 (diagnostic_context::show_ruler_p): Move to...
7981 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
7982 (diagnostic_same_line): Update for above changes.
7983 * opts.cc (common_handle_option): Update for reorganization of
7984 source-printing fields of diagnostic_context.
7985 * selftest-diagnostic.cc
7986 (test_diagnostic_context::test_diagnostic_context): Likewise.
7987 * toplev.cc (general_init): Likewise.
7988 * tree-diagnostic-path.cc (struct event_range): Likewise.
7990 2023-10-02 David Malcolm <dmalcolm@redhat.com>
7992 * diagnostic.cc (diagnostic_initialize): Initialize
7993 set_locations_cb to nullptr.
7995 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
7998 * config/arm/constraints.md: Remove Pf constraint.
7999 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
8000 (arm_atomic_load_acquire<mode>): Likewise.
8001 (arm_atomic_store<mode>): Likewise.
8002 (arm_atomic_store_release<mode>): Likewise.
8003 (atomic_load<mode>): Switch patterns to define_expand.
8004 (atomic_store<mode>): Likewise.
8005 (arm_atomic_loaddi2_ldrd): Remove predication.
8006 (arm_load_exclusive<mode>): Likewise.
8007 (arm_load_acquire_exclusive<mode>): Likewise.
8008 (arm_load_exclusivesi): Likewise.
8009 (arm_load_acquire_exclusivesi): Likewise.
8010 (arm_load_exclusivedi): Likewise.
8011 (arm_load_acquire_exclusivedi): Likewise.
8012 (arm_store_exclusive<mode>): Likewise.
8013 (arm_store_release_exclusivedi): Likewise.
8014 (arm_store_release_exclusive<mode>): Likewise.
8015 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
8017 2023-10-02 Tamar Christina <tamar.christina@arm.com>
8020 2023-10-02 Tamar Christina <tamar.christina@arm.com>
8022 PR tree-optimization/109154
8023 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
8024 (cmp_arg_entry): New.
8025 (predicate_scalar_phi): Use it.
8027 2023-10-02 Tamar Christina <tamar.christina@arm.com>
8029 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
8030 (@xorsign<mode>3): ...This.
8031 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
8032 (@xorsign<mode>3): ..This and emit vectors directly
8033 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
8035 2023-10-02 Tamar Christina <tamar.christina@arm.com>
8037 * emit-rtl.cc (validate_subreg): Relax subreg rule.
8039 2023-10-02 Tamar Christina <tamar.christina@arm.com>
8041 PR tree-optimization/109154
8042 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
8043 (cmp_arg_entry): New.
8044 (predicate_scalar_phi): Use it.
8046 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
8049 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
8051 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
8053 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
8054 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8056 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
8058 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
8060 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
8062 (cpymem<P:mode>) .. this.
8064 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8066 * combine.cc (simplify_compare_const): Properly handle unsigned
8067 constants while narrowing comparison of memory and constants.
8069 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
8071 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
8072 (MASK_ZIFENCEI): Delete;
8073 (MASK_ZIHINTNTL): Ditto.
8074 (MASK_ZIHINTPAUSE): Ditto.
8075 (TARGET_ZICSR): Ditto.
8076 (TARGET_ZIFENCEI): Ditto.
8077 (TARGET_ZIHINTNTL): Ditto.
8078 (TARGET_ZIHINTPAUSE): Ditto.
8079 (MASK_ZAWRS): Ditto.
8080 (TARGET_ZAWRS): Ditto.
8085 (TARGET_ZBA): Ditto.
8086 (TARGET_ZBB): Ditto.
8087 (TARGET_ZBC): Ditto.
8088 (TARGET_ZBS): Ditto.
8089 (MASK_ZFINX): Ditto.
8090 (MASK_ZDINX): Ditto.
8091 (MASK_ZHINX): Ditto.
8092 (MASK_ZHINXMIN): Ditto.
8093 (TARGET_ZFINX): Ditto.
8094 (TARGET_ZDINX): Ditto.
8095 (TARGET_ZHINX): Ditto.
8096 (TARGET_ZHINXMIN): Ditto.
8104 (MASK_ZKSED): Ditto.
8107 (TARGET_ZBKB): Ditto.
8108 (TARGET_ZBKC): Ditto.
8109 (TARGET_ZBKX): Ditto.
8110 (TARGET_ZKNE): Ditto.
8111 (TARGET_ZKND): Ditto.
8112 (TARGET_ZKNH): Ditto.
8113 (TARGET_ZKR): Ditto.
8114 (TARGET_ZKSED): Ditto.
8115 (TARGET_ZKSH): Ditto.
8116 (TARGET_ZKT): Ditto.
8118 (TARGET_ZTSO): Ditto.
8119 (MASK_VECTOR_ELEN_32): Ditto.
8120 (MASK_VECTOR_ELEN_64): Ditto.
8121 (MASK_VECTOR_ELEN_FP_32): Ditto.
8122 (MASK_VECTOR_ELEN_FP_64): Ditto.
8123 (MASK_VECTOR_ELEN_FP_16): Ditto.
8124 (TARGET_VECTOR_ELEN_32): Ditto.
8125 (TARGET_VECTOR_ELEN_64): Ditto.
8126 (TARGET_VECTOR_ELEN_FP_32): Ditto.
8127 (TARGET_VECTOR_ELEN_FP_64): Ditto.
8128 (TARGET_VECTOR_ELEN_FP_16): Ditto.
8131 (TARGET_ZVBB): Ditto.
8132 (TARGET_ZVBC): Ditto.
8134 (MASK_ZVKNED): Ditto.
8135 (MASK_ZVKNHA): Ditto.
8136 (MASK_ZVKNHB): Ditto.
8137 (MASK_ZVKSED): Ditto.
8138 (MASK_ZVKSH): Ditto.
8140 (MASK_ZVKNC): Ditto.
8141 (MASK_ZVKNG): Ditto.
8143 (MASK_ZVKSC): Ditto.
8144 (MASK_ZVKSG): Ditto.
8146 (TARGET_ZVKG): Ditto.
8147 (TARGET_ZVKNED): Ditto.
8148 (TARGET_ZVKNHA): Ditto.
8149 (TARGET_ZVKNHB): Ditto.
8150 (TARGET_ZVKSED): Ditto.
8151 (TARGET_ZVKSH): Ditto.
8152 (TARGET_ZVKN): Ditto.
8153 (TARGET_ZVKNC): Ditto.
8154 (TARGET_ZVKNG): Ditto.
8155 (TARGET_ZVKS): Ditto.
8156 (TARGET_ZVKSC): Ditto.
8157 (TARGET_ZVKSG): Ditto.
8158 (TARGET_ZVKT): Ditto.
8159 (MASK_ZVL32B): Ditto.
8160 (MASK_ZVL64B): Ditto.
8161 (MASK_ZVL128B): Ditto.
8162 (MASK_ZVL256B): Ditto.
8163 (MASK_ZVL512B): Ditto.
8164 (MASK_ZVL1024B): Ditto.
8165 (MASK_ZVL2048B): Ditto.
8166 (MASK_ZVL4096B): Ditto.
8167 (MASK_ZVL8192B): Ditto.
8168 (MASK_ZVL16384B): Ditto.
8169 (MASK_ZVL32768B): Ditto.
8170 (MASK_ZVL65536B): Ditto.
8171 (TARGET_ZVL32B): Ditto.
8172 (TARGET_ZVL64B): Ditto.
8173 (TARGET_ZVL128B): Ditto.
8174 (TARGET_ZVL256B): Ditto.
8175 (TARGET_ZVL512B): Ditto.
8176 (TARGET_ZVL1024B): Ditto.
8177 (TARGET_ZVL2048B): Ditto.
8178 (TARGET_ZVL4096B): Ditto.
8179 (TARGET_ZVL8192B): Ditto.
8180 (TARGET_ZVL16384B): Ditto.
8181 (TARGET_ZVL32768B): Ditto.
8182 (TARGET_ZVL65536B): Ditto.
8183 (MASK_ZICBOZ): Ditto.
8184 (MASK_ZICBOM): Ditto.
8185 (MASK_ZICBOP): Ditto.
8186 (TARGET_ZICBOZ): Ditto.
8187 (TARGET_ZICBOM): Ditto.
8188 (TARGET_ZICBOP): Ditto.
8189 (MASK_ZICOND): Ditto.
8190 (TARGET_ZICOND): Ditto.
8192 (TARGET_ZFA): Ditto.
8193 (MASK_ZFHMIN): Ditto.
8195 (MASK_ZVFHMIN): Ditto.
8197 (TARGET_ZFHMIN): Ditto.
8198 (TARGET_ZFH): Ditto.
8199 (TARGET_ZVFHMIN): Ditto.
8200 (TARGET_ZVFH): Ditto.
8201 (MASK_ZMMUL): Ditto.
8202 (TARGET_ZMMUL): Ditto.
8210 (TARGET_ZCA): Ditto.
8211 (TARGET_ZCB): Ditto.
8212 (TARGET_ZCE): Ditto.
8213 (TARGET_ZCF): Ditto.
8214 (TARGET_ZCD): Ditto.
8215 (TARGET_ZCMP): Ditto.
8216 (TARGET_ZCMT): Ditto.
8217 (MASK_SVINVAL): Ditto.
8218 (MASK_SVNAPOT): Ditto.
8219 (TARGET_SVINVAL): Ditto.
8220 (TARGET_SVNAPOT): Ditto.
8221 (MASK_XTHEADBA): Ditto.
8222 (MASK_XTHEADBB): Ditto.
8223 (MASK_XTHEADBS): Ditto.
8224 (MASK_XTHEADCMO): Ditto.
8225 (MASK_XTHEADCONDMOV): Ditto.
8226 (MASK_XTHEADFMEMIDX): Ditto.
8227 (MASK_XTHEADFMV): Ditto.
8228 (MASK_XTHEADINT): Ditto.
8229 (MASK_XTHEADMAC): Ditto.
8230 (MASK_XTHEADMEMIDX): Ditto.
8231 (MASK_XTHEADMEMPAIR): Ditto.
8232 (MASK_XTHEADSYNC): Ditto.
8233 (TARGET_XTHEADBA): Ditto.
8234 (TARGET_XTHEADBB): Ditto.
8235 (TARGET_XTHEADBS): Ditto.
8236 (TARGET_XTHEADCMO): Ditto.
8237 (TARGET_XTHEADCONDMOV): Ditto.
8238 (TARGET_XTHEADFMEMIDX): Ditto.
8239 (TARGET_XTHEADFMV): Ditto.
8240 (TARGET_XTHEADINT): Ditto.
8241 (TARGET_XTHEADMAC): Ditto.
8242 (TARGET_XTHEADMEMIDX): Ditto.
8243 (TARGET_XTHEADMEMPAIR): Ditto.
8244 (TARGET_XTHEADSYNC): Ditto.
8245 (MASK_XVENTANACONDOPS): Ditto.
8246 (TARGET_XVENTANACONDOPS): Ditto.
8247 * config/riscv/riscv.opt: Add new Mask defination.
8248 * doc/options.texi: Add explanation for this new usage.
8249 * opt-functions.awk: Add new function to find the index
8250 of target variable from extra_target_vars.
8251 * opt-read.awk: Add new function to store the Mask flags.
8252 * opth-gen.awk: Add new function to output the defination of
8253 Mask Macro and Target Macro.
8255 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
8256 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8257 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8260 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
8261 Change second parameter to rtx *.
8262 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
8263 * config/riscv/vector.md: Changed callers of
8264 riscv_vector::legitimize_move.
8265 (*mov<mode>_mem_to_mem): Remove.
8267 2023-09-30 Jakub Jelinek <jakub@redhat.com>
8270 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
8271 Replace safe_grow with safe_grow_cleared.
8273 2023-09-30 Jakub Jelinek <jakub@redhat.com>
8275 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
8276 in function comment.
8278 2023-09-30 Jakub Jelinek <jakub@redhat.com>
8280 PR middle-end/111625
8281 PR middle-end/111637
8282 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
8284 (bitint_large_huge::handle_operand_addr): For uninitialized operands
8285 use limb_prec or -limb_prec precision.
8287 2023-09-30 Jakub Jelinek <jakub@redhat.com>
8289 * vec.h (quick_grow): Uncomment static_assert.
8291 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
8293 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
8295 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
8297 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
8298 SETs when the outer code is INSN.
8300 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
8302 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
8305 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
8307 * poly-int.h (poly_int_pod): Delete.
8308 (poly_coeff_traits::init_cast): New type.
8309 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
8310 (poly_int): Replace constructors that take 1 and 2 coefficients with
8311 a general one that takes an arbitrary number of coefficients.
8312 Delegate initialization to two new private constructors, one of
8313 which uses the coefficients as-is and one of which adds an extra
8314 zero of the appropriate type (and precision, where applicable).
8315 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
8316 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
8317 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
8318 * gengtype.cc (main): Don't register poly_int64_pod.
8319 * calls.cc (initialize_argument_information): Use poly_int rather
8321 (combine_pending_stack_adjustment_and_call): Likewise.
8322 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
8323 * data-streamer.h (bp_unpack_poly_value): Likewise.
8324 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
8325 (struct queued_reg_save): Likewise.
8326 * dwarf2out.h (struct dw_cfa_location): Likewise.
8327 * emit-rtl.h (struct incoming_args): Likewise.
8328 (struct rtl_data): Likewise.
8329 * expr.cc (get_bit_range): Likewise.
8330 (get_inner_reference): Likewise.
8331 * expr.h (get_bit_range): Likewise.
8332 * fold-const.cc (split_address_to_core_and_offset): Likewise.
8333 (ptr_difference_const): Likewise.
8334 * fold-const.h (ptr_difference_const): Likewise.
8335 * function.cc (try_fit_stack_local): Likewise.
8336 (instantiate_new_reg): Likewise.
8337 * function.h (struct expr_status): Likewise.
8338 (struct args_size): Likewise.
8339 * genmodes.cc (ZERO_COEFFS): Likewise.
8340 (mode_size_inline): Likewise.
8341 (mode_nunits_inline): Likewise.
8342 (emit_mode_precision): Likewise.
8343 (emit_mode_size): Likewise.
8344 (emit_mode_nunits): Likewise.
8345 * gimple-fold.cc (get_base_constructor): Likewise.
8346 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
8347 * inchash.h (class hash): Likewise.
8348 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
8349 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
8351 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
8352 * lra-eliminations.cc (self_elim_offsets): Likewise.
8353 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
8354 * omp-low.cc (omplow_simd_context): Likewise.
8355 * pretty-print.cc (pp_wide_integer): Likewise.
8356 * pretty-print.h (pp_wide_integer): Likewise.
8357 * reload.cc (struct decomposition): Likewise.
8358 * reload.h (struct reload): Likewise.
8359 * reload1.cc (spill_stack_slot_width): Likewise.
8360 (struct elim_table): Likewise.
8361 (offsets_at): Likewise.
8362 (init_eliminable_invariants): Likewise.
8363 * rtl.h (union rtunion): Likewise.
8364 (poly_int_rtx_p): Likewise.
8365 (strip_offset): Likewise.
8366 (strip_offset_and_add): Likewise.
8367 * rtlanal.cc (strip_offset): Likewise.
8368 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
8369 (get_addr_base_and_unit_offset_1): Likewise.
8370 (get_addr_base_and_unit_offset): Likewise.
8371 * tree-dfa.h (get_ref_base_and_extent): Likewise.
8372 (get_addr_base_and_unit_offset_1): Likewise.
8373 (get_addr_base_and_unit_offset): Likewise.
8374 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
8375 (strip_offset): Likewise.
8376 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
8377 * tree.cc (ptrdiff_tree_p): Likewise.
8378 * tree.h (poly_int_tree_p): Likewise.
8379 (ptrdiff_tree_p): Likewise.
8380 (get_inner_reference): Likewise.
8382 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
8384 * config/pa/pa.md (memory_barrier): Revise comment.
8385 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
8386 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
8388 2023-09-29 Jakub Jelinek <jakub@redhat.com>
8390 * vec.h (quick_insert, ordered_remove, unordered_remove,
8391 block_remove, qsort, sort, stablesort, quick_grow): Guard
8392 std::is_trivially_{copyable,default_constructible} and
8393 vec_detail::is_trivially_copyable_or_pair static assertions
8394 with GCC_VERSION >= 5000.
8395 (vec_detail::is_trivially_copyable_or_pair): Guard definition
8396 with GCC_VERSION >= 5000.
8398 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
8400 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
8401 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
8402 and aarch64_stp_policy to aarch64_ldp_stp_policy.
8403 (enum aarch64_stp_policy): Removed.
8404 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
8405 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
8406 and left only the definitions to the aarch64-opts one.
8407 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
8408 (aarch64_parse_stp_policy): Removed.
8409 (aarch64_override_options_internal): Removed calls to parsing
8410 functions and added obvious direct assignments.
8411 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
8412 code quality based on the new changes.
8413 * config/aarch64/aarch64.opt: Use single enum type
8414 aarch64_ldp_stp_policy for both ldp and stp options.
8416 2023-09-29 Richard Biener <rguenther@suse.de>
8418 PR tree-optimization/111583
8419 * tree-loop-distribution.cc (find_single_drs): Ensure the
8420 load/store are always executed.
8422 2023-09-29 Jakub Jelinek <jakub@redhat.com>
8424 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
8425 quick_grow_cleared method on unprom rather than quick_grow.
8427 2023-09-29 Sergei Trofimovich <siarheit@google.com>
8429 PR middle-end/111505
8430 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
8431 Add new helper. Use helper instead of memset() to wipe out pointers.
8433 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
8435 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
8437 * builtins.cc (c_readstr): Likewise. Build a local array of
8438 bytes and use native_decode_rtx to get the rtx image.
8439 (builtin_memcpy_read_str): Simplify accordingly.
8440 (builtin_strncpy_read_str): Likewise.
8441 (builtin_memset_read_str): Likewise.
8442 (builtin_memset_gen_str): Likewise.
8443 * expr.cc (string_cst_read_str): Likewise.
8445 2023-09-29 Jakub Jelinek <jakub@redhat.com>
8447 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
8448 instead of quick_grow on vec<bitmap_head> members.
8449 * cfganal.cc (control_dependences::control_dependences): Likewise.
8450 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
8451 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
8452 on auto_vec<bitmap_head> vars.
8453 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
8454 of quick_grow on vec<bitmap_head> var.
8456 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
8459 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
8461 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
8464 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
8467 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
8468 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
8469 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
8471 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
8474 2023-09-28 Pan Li <pan2.li@intel.com>
8477 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
8479 * config/riscv/vector-iterators.md: New iterator.
8481 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
8483 * rtl.h (lra_in_progress): Change type to bool.
8484 (ira_in_progress): Add new extern.
8485 * ira.cc (ira_in_progress): New global.
8486 (pass_ira::execute): Set up ira_in_progress.
8487 * lra.cc: (lra_in_progress): Change type to bool and initialize.
8488 (lra): Use bool values for lra_in_progress.
8489 * lra-eliminations.cc (init_elim_table): Ditto.
8491 2023-09-28 Richard Biener <rguenther@suse.de>
8494 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
8495 Use a heap allocated worklist for CFG traversal instead of
8498 2023-09-28 Jakub Jelinek <jakub@redhat.com>
8499 Jonathan Wakely <jwakely@redhat.com>
8501 * vec.h: Mention in file comment limited support for non-POD types
8503 (vec_destruct): New function template.
8504 (release): Use it for non-trivially destructible T.
8505 (truncate): Likewise.
8506 (quick_push): Perform a placement new into slot
8507 instead of assignment.
8508 (pop): For non-trivially destructible T return void
8509 rather than T & and destruct the popped element.
8510 (quick_insert, ordered_remove): Note that they aren't suitable
8511 for non-trivially copyable types. Add static_asserts for that.
8512 (block_remove): Assert T is trivially copyable.
8513 (vec_detail::is_trivially_copyable_or_pair): New trait.
8514 (qsort, sort, stablesort): Assert T is trivially copyable or
8515 std::pair with both trivally copyable types.
8516 (quick_grow): Add assert T is trivially default constructible,
8517 for now commented out.
8518 (quick_grow_cleared): Don't call quick_grow, instead inline it
8519 by hand except for the new static_assert.
8520 (gt_ggc_mx): Assert T is trivially destructable.
8521 (auto_vec::operator=): Formatting fixes.
8522 (auto_vec::auto_vec): Likewise.
8523 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
8524 it manually and call quick_grow_cleared method rather than quick_grow.
8525 (safe_grow_cleared): Likewise.
8526 * edit-context.cc (class line_event): Move definition earlier.
8527 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
8529 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
8530 safe_grow_cleared instead of safe_grow followed by placement new
8531 constructing the elements.
8533 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
8535 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
8536 * tree-affine.cc (expr_to_aff_combination): Likewise.
8538 2023-09-28 Richard Biener <rguenther@suse.de>
8540 PR tree-optimization/111614
8541 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
8542 convert the first vector when required.
8544 2023-09-28 xuli <xuli1@eswincomputing.com>
8547 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
8548 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
8550 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
8552 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
8554 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
8557 * configure: Regenerate.
8558 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
8560 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
8561 Philipp Tomsich <philipp.tomsich@vrull.eu>
8562 Manolis Tsamis <manolis.tsamis@vrull.eu>
8564 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
8566 (enum aarch64_stp_policy): New enum type.
8567 * config/aarch64/aarch64-protos.h (struct tune_params): Add
8568 appropriate enums for the policies.
8569 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
8570 * config/aarch64/aarch64-tuning-flags.def
8571 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
8573 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
8574 function to parse ldp-policy parameter.
8575 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
8576 (aarch64_override_options_internal): Call parsing functions.
8577 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
8578 (aarch64_operands_ok_for_ldpstp): Add call to
8579 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
8580 check and alignment check and remove superseded ones.
8581 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
8582 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
8583 check and alignment check and remove superseded ones.
8584 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
8585 (aarch64-stp-policy): New param.
8586 * doc/invoke.texi: Document the parameters accordingly.
8588 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
8590 * tree-data-ref.cc (include calls.h): Add new include.
8591 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
8593 2023-09-27 Richard Biener <rguenther@suse.de>
8595 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
8597 2023-09-27 Jakub Jelinek <jakub@redhat.com>
8600 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
8601 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
8603 * function.cc (assign_parm_find_data_types): Likewise.
8605 2023-09-27 Pan Li <pan2.li@intel.com>
8607 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
8608 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
8609 (enum insn_type): Ditto.
8610 (expand_vec_roundeven): New func decl.
8611 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
8613 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8616 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
8618 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8620 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
8622 2023-09-27 Pan Li <pan2.li@intel.com>
8624 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
8625 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
8626 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
8627 (expand_vec_trunc): Ditto.
8629 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
8633 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
8634 Handle failure from expand_builtin_atomic_test_and_set.
8635 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
8636 generate atomic code through target support, return NULL
8637 instead of emitting non-atomic code. Also, for code handling
8638 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
8639 from calling emit_store_flag_force instead of returning NULL.
8641 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
8643 PR tree-optimization/111599
8644 * value-relation.cc (relation_oracle::valid_equivs): Ensure
8647 2023-09-26 Andrew Pinski <apinski@marvell.com>
8649 PR tree-optimization/106164
8650 PR tree-optimization/111456
8651 * match.pd (`(A ==/!= B) & (A CMP C)`):
8652 Support an optional cast on the second A.
8653 (`(A ==/!= B) | (A CMP C)`): Likewise.
8655 2023-09-26 Andrew Pinski <apinski@marvell.com>
8657 PR tree-optimization/111469
8658 * tree-ssa-phiopt.cc (minmax_replacement): Fix
8659 the assumption for the `non-diamond` handling cases
8662 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8664 * match.pd: Optimize COND_ADD reduction pattern.
8666 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8668 PR tree-optimization/111594
8669 PR tree-optimization/110660
8670 * match.pd: Optimize COND_LEN_ADD reduction.
8672 2023-09-26 Pan Li <pan2.li@intel.com>
8674 * config/riscv/autovec.md (round<mode>2): New pattern.
8675 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
8676 (enum insn_type): Ditto.
8677 (expand_vec_round): New function decl.
8678 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
8680 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
8682 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
8684 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
8686 PR middle-end/111547
8687 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
8688 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
8690 2023-09-26 Pan Li <pan2.li@intel.com>
8692 * config/riscv/autovec.md (rint<mode>2): New pattern.
8693 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
8694 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
8696 2023-09-26 Pan Li <pan2.li@intel.com>
8698 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
8699 * config/riscv/riscv-protos.h (enum insn_type): New enum.
8700 (expand_vec_nearbyint): New function decl.
8701 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
8703 2023-09-26 Pan Li <pan2.li@intel.com>
8705 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
8706 (get_fp_rounding_coefficient): Rename.
8707 (gen_floor_const_fp): Remove.
8708 (expand_vec_ceil): Take renamed func.
8709 (expand_vec_floor): Ditto.
8711 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
8713 PR middle-end/111497
8714 * lra-constraints.cc (lra_constraints): Copy substituted
8716 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
8718 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
8720 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
8721 return statement in the varying case.
8723 2023-09-25 Xi Ruoyao <xry111@xry111.site>
8725 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
8727 2023-09-25 Andrew Pinski <apinski@marvell.com>
8729 PR tree-optimization/110386
8730 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
8732 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8735 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
8737 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
8740 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
8743 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
8746 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
8747 target_option_default_node when the callee has no option
8748 attributes, also simplify the existing code accordingly.
8750 2023-09-25 Guo Jie <guojie@loongson.cn>
8752 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
8753 pattern for vector construction.
8754 (vec_set<mode>_internal): Ditto.
8755 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
8756 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
8757 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
8758 Optimized the implementation of vector construction.
8759 (loongarch_expand_vector_init_same): New function.
8760 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
8761 pattern for vector construction.
8762 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
8764 (vec_concatv2df): Ditto.
8765 (vec_concatv4sf): Ditto.
8767 2023-09-24 Pan Li <pan2.li@intel.com>
8770 * config/riscv/riscv-v.cc
8771 (expand_vector_init_merge_repeating_sequence): Bugfix
8773 2023-09-24 Andrew Pinski <apinski@marvell.com>
8775 PR tree-optimization/111543
8776 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
8778 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8780 * config/riscv/autovec-opt.md: Extend VLS modes
8781 * config/riscv/vector-iterators.md: Ditto.
8783 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8785 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
8787 2023-09-23 Pan Li <pan2.li@intel.com>
8789 * config/riscv/autovec.md (floor<mode>2): New pattern.
8790 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
8791 (enum insn_type): Ditto.
8792 (expand_vec_floor): New function decl.
8793 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
8794 (expand_vec_floor): Ditto.
8796 2023-09-22 Pan Li <pan2.li@intel.com>
8798 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
8799 (emit_vec_float_cmp_mask): Rename.
8800 (expand_vec_copysign): Ditto.
8801 (emit_vec_copysign): Ditto.
8802 (emit_vec_abs): New function impl.
8803 (emit_vec_cvt_x_f): Ditto.
8804 (emit_vec_cvt_f_x): Ditto.
8805 (expand_vec_ceil): Ditto.
8807 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8809 * config/riscv/vector-iterators.md: Extend VLS modes.
8811 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8813 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
8814 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
8815 (vec_duplicate<mode>): Ditto.
8817 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8819 * config/riscv/autovec.md: Add VLS conditional patterns.
8820 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
8821 (expand_cond_binop): Ditto.
8822 (expand_cond_ternop): Ditto.
8823 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
8824 (expand_cond_binop): Ditto.
8825 (expand_cond_ternop): Ditto.
8827 2023-09-22 xuli <xuli1@eswincomputing.com>
8830 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
8831 into vrgatherei16.vv.
8833 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
8835 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
8836 New combine patterns.
8837 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
8839 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
8841 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
8842 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
8844 2023-09-22 Pan Li <pan2.li@intel.com>
8846 * config/riscv/autovec.md (ceil<mode>2): New pattern.
8847 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
8848 (enum insn_type): Ditto.
8849 (expand_vec_ceil): New function decl.
8850 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
8851 (expand_vec_float_cmp_mask): Ditto.
8852 (expand_vec_copysign): Ditto.
8853 (expand_vec_ceil): Ditto.
8854 * config/riscv/vector.md: Add VLS mode support.
8856 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8858 * config/riscv/autovec.md: Extend VLS modes.
8860 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8862 * config/riscv/vector-iterators.md: Extend VLS modes.
8864 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
8865 Robin Dapp <rdapp.gcc@gmail.com>
8867 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
8868 (emit_nonvlmax_insn): Adjust comments.
8869 (emit_vlmax_insn_lra): Adjust comments.
8871 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8873 * config.gcc (*linux*): Set rust target_objs, and
8874 target_has_targetrustm,
8875 * config/t-linux (linux-rust.o): New rule.
8876 * config/linux-rust.cc: New file.
8878 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8880 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
8881 rust_target_objs and target_has_targetrustm.
8882 * config/t-winnt (winnt-rust.o): New rule.
8883 * config/winnt-rust.cc: New file.
8885 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8887 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
8888 and target_has_targetrustm.
8889 * config/fuchsia-rust.cc: New file.
8890 * config/t-fuchsia: New file.
8892 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8894 * config.gcc (*-*-vxworks*): Set rust_target_objs and
8895 target_has_targetrustm.
8896 * config/t-vxworks (vxworks-rust.o): New rule.
8897 * config/vxworks-rust.cc: New file.
8899 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8901 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
8902 target_has_targetrustm.
8903 * config/t-dragonfly (dragonfly-rust.o): New rule.
8904 * config/dragonfly-rust.cc: New file.
8906 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8908 * config.gcc (*-*-solaris2*): Set rust_target_objs and
8909 target_has_targetrustm.
8910 * config/t-sol2 (sol2-rust.o): New rule.
8911 * config/sol2-rust.cc: New file.
8913 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8915 * config.gcc (*-*-openbsd*): Set rust_target_objs and
8916 target_has_targetrustm.
8917 * config/t-openbsd (openbsd-rust.o): New rule.
8918 * config/openbsd-rust.cc: New file.
8920 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8922 * config.gcc (*-*-netbsd*): Set rust_target_objs and
8923 target_has_targetrustm.
8924 * config/t-netbsd (netbsd-rust.o): New rule.
8925 * config/netbsd-rust.cc: New file.
8927 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8929 * config.gcc (*-*-freebsd*): Set rust_target_objs and
8930 target_has_targetrustm.
8931 * config/t-freebsd (freebsd-rust.o): New rule.
8932 * config/freebsd-rust.cc: New file.
8934 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8936 * config.gcc (*-*-darwin*): Set rust_target_objs and
8937 target_has_targetrustm.
8938 * config/t-darwin (darwin-rust.o): New rule.
8939 * config/darwin-rust.cc: New file.
8941 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8943 * config/i386/t-i386 (i386-rust.o): New rule.
8944 * config/i386/i386-rust.cc: New file.
8945 * config/i386/i386-rust.h: New file.
8947 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8949 * doc/tm.texi: Regenerate.
8950 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
8952 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8954 * doc/tm.texi: Regenerate.
8955 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
8956 TARGET_RUST_CPU_INFO.
8958 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
8960 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
8961 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
8962 (tm_rust.h, cs-tm_rust.h, default-rust.o,
8963 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
8964 (s-tm-texi): Also check timestamp on rust-target.def.
8965 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
8966 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
8967 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
8969 * configure: Regenerate.
8970 * configure.ac (tm_rust_file_list, tm_rust_include_list,
8971 rust_target_objs): Add substitutes.
8972 * doc/tm.texi: Regenerate.
8973 * doc/tm.texi.in (targetrustm): Document.
8974 (target_has_targetrustm): Document.
8975 * genhooks.cc: Include rust/rust-target.def.
8976 * config/default-rust.cc: New file.
8978 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8981 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
8982 * config/riscv/predicates.md (autovec_else_operand): New predicate.
8983 * config/riscv/riscv-v.cc (get_else_operand): New function.
8984 (expand_cond_len_unop): Adapt ELSE value.
8985 (expand_cond_len_binop): Ditto.
8986 (expand_cond_len_ternop): Ditto.
8987 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
8988 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
8990 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8993 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
8995 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
8997 PR tree-optimization/111355
8998 * match.pd ((X + C) / N): Update pattern.
9000 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
9002 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
9004 2023-09-21 xuli <xuli1@eswincomputing.com>
9007 * config/riscv/constraints.md (c01): const_int 1.
9011 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
9012 (vector_eew16_stride_operand): Ditto.
9013 (vector_eew32_stride_operand): Ditto.
9014 (vector_eew64_stride_operand): Ditto.
9015 * config/riscv/vector-iterators.md: New iterator for stride operand.
9016 * config/riscv/vector.md: Add stride = element width constraint.
9018 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
9020 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
9021 (const_1_or_4_operand): Ditto.
9022 (vector_gs_scale_operand_16): Ditto.
9023 (vector_gs_scale_operand_32): Ditto.
9024 * config/riscv/vector-iterators.md: Adjust.
9026 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9028 * config/riscv/autovec.md: Extend VLS modes.
9029 * config/riscv/vector-iterators.md: Ditto.
9030 * config/riscv/vector.md: Ditto.
9032 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
9034 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
9035 of the return value.
9036 (ssa_cache::dump): Don't print GLOBAL RANGE header.
9037 (ssa_lazy_cache::merge_range): Adjust return value meaning.
9038 (ranger_cache::dump): Print GLOBAL RANGE header.
9040 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
9042 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
9044 (foperator_unordered_gt::fold_range): Same.
9045 (foperator_unordered_lt::fold_range): Same.
9046 (foperator_unordered_le::fold_range): Same.
9048 2023-09-20 Jakub Jelinek <jakub@redhat.com>
9050 * builtins.h (type_to_class): Declare.
9051 * builtins.cc (type_to_class): No longer static. Return
9052 int rather than enum.
9053 * doc/extend.texi (__builtin_classify_type): Document.
9055 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9058 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
9059 * optabs.cc (maybe_legitimize_operand): Ditto.
9060 (can_reuse_operands_p): Ditto.
9061 * optabs.h (enum expand_operand_type): Ditto.
9062 (create_undefined_input_operand): Ditto.
9064 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
9066 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
9067 'omp allocate' variables; move stack cleanup after other
9069 (omp_notice_variable): Process original decl when decl
9070 of the value-expression for a 'omp allocate' variable is passed.
9071 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
9073 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
9075 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
9076 support simplifying vector int not only scalar int.
9078 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9080 * config/riscv/vector-iterators.md: Extend VLS floating-point.
9082 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9084 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
9086 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
9089 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
9090 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
9092 2023-09-20 Richard Biener <rguenther@suse.de>
9094 PR tree-optimization/111489
9095 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
9097 2023-09-20 Richard Biener <rguenther@suse.de>
9099 PR tree-optimization/111489
9100 * doc/invoke.texi (--param uninit-max-chain-len): Document.
9101 (--param uninit-max-num-chains): Likewise.
9102 * params.opt (-param=uninit-max-chain-len=): New.
9103 (-param=uninit-max-num-chains=): Likewise.
9104 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
9105 param_uninit_max_num_chains.
9106 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
9107 (uninit_analysis::init_use_preds): Avoid VLA.
9108 (uninit_analysis::init_from_phi_def): Likewise.
9109 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
9112 2023-09-20 Jakub Jelinek <jakub@redhat.com>
9114 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
9115 GET_MODE_PRECISION of TImode or DImode depending on whether
9116 TImode is supported scalar mode.
9117 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
9118 * expr.cc (expand_expr_real_1): Likewise.
9119 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
9120 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
9122 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
9124 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
9125 (*n<optab><mode>): Ditto.
9126 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
9127 (*<any_shiftrt:optab>trunc<mode>): Ditto.
9128 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
9129 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
9130 (*single_widen_mult<any_extend:su><mode>): Ditto.
9131 (*single_widen_mul<any_extend:su><mode>): Ditto.
9132 (*single_widen_mult<mode>): Ditto.
9133 (*single_widen_mul<mode>): Ditto.
9134 (*dual_widen_fma<mode>): Ditto.
9135 (*dual_widen_fma<su><mode>): Ditto.
9136 (*single_widen_fma<mode>): Ditto.
9137 (*single_widen_fma<su><mode>): Ditto.
9138 (*dual_fma<mode>): Ditto.
9139 (*single_fma<mode>): Ditto.
9140 (*dual_fnma<mode>): Ditto.
9141 (*dual_widen_fnma<mode>): Ditto.
9142 (*single_fnma<mode>): Ditto.
9143 (*single_widen_fnma<mode>): Ditto.
9144 (*dual_fms<mode>): Ditto.
9145 (*dual_widen_fms<mode>): Ditto.
9146 (*single_fms<mode>): Ditto.
9147 (*single_widen_fms<mode>): Ditto.
9148 (*dual_fnms<mode>): Ditto.
9149 (*dual_widen_fnms<mode>): Ditto.
9150 (*single_fnms<mode>): Ditto.
9151 (*single_widen_fnms<mode>): Ditto.
9153 2023-09-20 Jakub Jelinek <jakub@redhat.com>
9156 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
9157 on vars or function decls if -fopenmp or -fopenmp-simd.
9159 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
9162 * config/riscv/autovec-opt.md: Add missed operand.
9164 2023-09-20 Omar Sandoval <osandov@osandov.com>
9167 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
9168 dwarf_split_debug_info.
9170 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9172 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
9173 (vectorize_related_mode): Add VLS related modes.
9174 * config/riscv/vector-iterators.md: Extend VLS modes.
9176 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
9178 PR rtl-optimization/110071
9179 * ira-color.cc (improve_allocation): Consider cost of callee
9182 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
9183 Xi Ruoyao <xry111@xry111.site>
9185 * configure: Regenerate.
9186 * configure.ac: Checking assembler for -mno-relax support.
9187 Disable relaxation when probing leb128 support.
9189 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
9191 * config.in: Regenerate.
9192 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
9193 mrelax. And set the initial value of explicit-relocs according to the
9195 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
9196 --no-relax option to the linker.
9197 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
9198 -mno-relax, pass the -mno-relax option to the assembler.
9199 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
9200 * config/loongarch/loongarch.opt: Regenerate.
9201 * configure: Regenerate.
9202 * configure.ac: Add detection of support for binutils relax function.
9204 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
9206 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
9207 -fdeps-target= flags.
9208 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
9209 only -fdeps-format= is specified.
9210 * json.h: Add a TODO item to refactor out to share with
9213 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
9214 Jason Merrill <jason@redhat.com>
9216 * gcc.cc (join_spec_func): Add a spec function to join all
9219 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
9221 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
9222 src_op_0 var to avoid rtl check error.
9224 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
9226 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
9228 (operator_not_equal::fold_range): Handle VREL_EQ.
9229 (operator_lt::fold_range): Remove special casing for VREL_EQ.
9230 (operator_gt::fold_range): Same.
9231 (foperator_unordered_equal::fold_range): Same.
9233 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
9235 * doc/extend.texi: Document attributes hot, cold on C++ types.
9237 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
9239 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
9240 modulo instruction is disabled.
9241 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
9242 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
9243 (define_expand umod<mode>3): New.
9244 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
9245 instruction is disabled.
9246 (umodti3, modti3): Check if the modulo instruction is disabled.
9248 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
9250 * doc/gm2.texi (fdebug-builtins): Correct description.
9252 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
9254 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
9255 * config/iq2000/iq2000.md (rotrsi3): Use it.
9257 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
9259 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
9260 (operator_lt::op2_range): Same.
9261 (operator_le::op1_range): Same.
9262 (operator_le::op2_range): Same.
9263 (operator_gt::op1_range): Same.
9264 (operator_gt::op2_range): Same.
9265 (operator_ge::op1_range): Same.
9266 (operator_ge::op2_range): Same.
9267 (foperator_unordered_lt::op1_range): Same.
9268 (foperator_unordered_lt::op2_range): Same.
9269 (foperator_unordered_le::op1_range): Same.
9270 (foperator_unordered_le::op2_range): Same.
9271 (foperator_unordered_gt::op1_range): Same.
9272 (foperator_unordered_gt::op2_range): Same.
9273 (foperator_unordered_ge::op1_range): Same.
9274 (foperator_unordered_ge::op2_range): Same.
9276 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
9278 * value-range.h (frange::update_nan): New.
9280 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
9282 * range-op-float.cc (operator_not_equal::op2_range): New.
9283 * range-op-mixed.h: Add operator_not_equal::op2_range.
9285 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
9287 PR tree-optimization/110080
9288 PR tree-optimization/110249
9289 * tree-vrp.cc (remove_unreachable::final_p): New.
9290 (remove_unreachable::maybe_register): Rename from
9291 maybe_register_block and call early or final routine.
9292 (fully_replaceable): New.
9293 (remove_unreachable::handle_early): New.
9294 (remove_unreachable::remove_and_update_globals): Remove
9295 non-final processing.
9296 (rvrp_folder::rvrp_folder): Add final flag to constructor.
9297 (rvrp_folder::post_fold_bb): Remove unreachable registration.
9298 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
9299 (execute_ranger_vrp): Adjust some call parameters.
9301 2023-09-19 Richard Biener <rguenther@suse.de>
9304 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
9306 * tree-pretty-print.cc (op_symbol): Likewise.
9307 (op_symbol_code): Print TDF_GIMPLE variant if requested.
9308 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
9310 (dump_gimple_cond): Likewise.
9312 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
9313 Pan Li <pan2.li@intel.com>
9315 * tree-streamer.h (bp_unpack_machine_mode): If
9316 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
9318 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9320 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
9322 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9324 * config/riscv/autovec.md: Extend VLS modes.
9325 * config/riscv/vector.md: Ditto.
9327 2023-09-19 Richard Biener <rguenther@suse.de>
9329 PR tree-optimization/111465
9330 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
9331 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
9333 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9335 * config/riscv/autovec.md: Extend VLS floating-point modes.
9336 * config/riscv/vector.md: Ditto.
9338 2023-09-19 Jakub Jelinek <jakub@redhat.com>
9340 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
9341 nor check type_has_mode_precision_p for width larger than [TD]Imode
9343 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
9344 to type. Use boolean_true_node instead of
9345 constant_boolean_node (true, boolean_type_node). Formatting fixes.
9347 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9349 * config/riscv/autovec.md: Add VLS modes.
9350 * config/riscv/vector.md: Ditto.
9352 2023-09-19 Jakub Jelinek <jakub@redhat.com>
9354 * tree.cc (build_bitint_type): Assert precision is not 0, or
9356 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
9357 of unsigned _BitInt(1).
9359 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
9361 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
9362 Removed old combine patterns.
9363 (*single_<optab>mult_plus<mode>): Ditto.
9364 (*double_<optab>mult_plus<mode>): Ditto.
9365 (*sign_zero_extend_fma): Ditto.
9366 (*zero_sign_extend_fma): Ditto.
9367 (*double_widen_fma<mode>): Ditto.
9368 (*single_widen_fma<mode>): Ditto.
9369 (*double_widen_fnma<mode>): Ditto.
9370 (*single_widen_fnma<mode>): Ditto.
9371 (*double_widen_fms<mode>): Ditto.
9372 (*single_widen_fms<mode>): Ditto.
9373 (*double_widen_fnms<mode>): Ditto.
9374 (*single_widen_fnms<mode>): Ditto.
9375 (*reduc_plus_scal_<mode>): Adjust name.
9376 (*widen_reduc_plus_scal_<mode>): Adjust name.
9377 (*dual_widen_fma<mode>): New combine pattern.
9378 (*dual_widen_fmasu<mode>): Ditto.
9379 (*dual_widen_fmaus<mode>): Ditto.
9380 (*dual_fma<mode>): Ditto.
9381 (*single_fma<mode>): Ditto.
9382 (*dual_fnma<mode>): Ditto.
9383 (*single_fnma<mode>): Ditto.
9384 (*dual_fms<mode>): Ditto.
9385 (*single_fms<mode>): Ditto.
9386 (*dual_fnms<mode>): Ditto.
9387 (*single_fnms<mode>): Ditto.
9388 * config/riscv/autovec.md (fma<mode>4):
9389 Reafctor fma pattern.
9390 (*fma<VI:mode><P:mode>): Removed.
9391 (fnma<mode>4): Reafctor.
9392 (*fnma<VI:mode><P:mode>): Removed.
9393 (*fma<VF:mode><P:mode>): Removed.
9394 (*fnma<VF:mode><P:mode>): Removed.
9395 (fms<mode>4): Reafctor.
9396 (*fms<VF:mode><P:mode>): Removed.
9397 (fnms<mode>4): Reafctor.
9398 (*fnms<VF:mode><P:mode>): Removed.
9399 * config/riscv/riscv-protos.h (prepare_ternary_operands):
9401 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
9402 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
9403 (*pred_mul_plus<mode>): Removed.
9404 (*pred_mul_plus<mode>_scalar): Removed.
9405 (*pred_mul_plus<mode>_extended_scalar): Removed.
9406 (*pred_minus_mul<mode>_undef): New pattern.
9407 (*pred_minus_mul<mode>): Removed.
9408 (*pred_minus_mul<mode>_scalar): Removed.
9409 (*pred_minus_mul<mode>_extended_scalar): Removed.
9410 (*pred_mul_<optab><mode>_undef): New pattern.
9411 (*pred_mul_<optab><mode>): Removed.
9412 (*pred_mul_<optab><mode>_scalar): Removed.
9413 (*pred_mul_neg_<optab><mode>_undef): New pattern.
9414 (*pred_mul_neg_<optab><mode>): Removed.
9415 (*pred_mul_neg_<optab><mode>_scalar): Removed.
9417 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
9419 * config/riscv/riscv-vector-builtins.cc
9420 (builtin_decl, expand_builtin): Replace SVE with RVV.
9422 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
9424 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
9425 riscv-cmo.def and riscv-scalar-crypto.def.
9427 2023-09-18 Pan Li <pan2.li@intel.com>
9429 * config/riscv/autovec.md: Extend to vls mode.
9431 2023-09-18 Pan Li <pan2.li@intel.com>
9433 * config/riscv/autovec.md: Bugfix.
9434 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
9436 2023-09-18 Andrew Pinski <apinski@marvell.com>
9438 PR tree-optimization/111442
9439 * match.pd (zero_one_valued_p): Have the bit_and match not be
9442 2023-09-18 Andrew Pinski <apinski@marvell.com>
9444 PR tree-optimization/111435
9445 * match.pd (zero_one_valued_p): Don't do recursion
9448 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
9450 * config/darwin-protos.h (enum darwin_external_toolchain): New.
9451 * config/darwin.cc (DSYMUTIL_VERSION): New.
9452 (darwin_override_options): Choose the default debug DWARF version
9453 depending on the configured dsymutil version.
9455 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
9457 * configure: Regenerate.
9458 * configure.ac: Handle explict disable of stdlib option, set
9459 defaults for Darwin.
9461 2023-09-18 Andrew Pinski <apinski@marvell.com>
9463 PR tree-optimization/111431
9464 * match.pd (`(a == CST) & a`): New pattern.
9466 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9468 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
9469 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
9471 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
9474 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
9475 Add support for immediates using shifted ORR/BIC.
9476 (aarch64_split_dimode_const_store): Apply if we save one instruction.
9477 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
9478 Make pattern global.
9480 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
9482 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
9483 (neoverse-v1): Place before zeus.
9484 (neoverse-v2): Place before demeter.
9485 * config/aarch64/aarch64-tune.md: Regenerate.
9487 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9489 * config/riscv/autovec.md: Add VLS modes.
9490 * config/riscv/vector-iterators.md: Ditto.
9491 * config/riscv/vector.md: Ditto.
9493 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9495 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
9496 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
9498 2023-09-18 Richard Biener <rguenther@suse.de>
9500 PR tree-optimization/111294
9501 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
9503 (back_threader::find_paths_to_names): Adjust.
9504 (back_threader::maybe_thread_block): Likewise.
9505 (back_threader_profitability::possibly_profitable_path_p): Remove
9506 code applying extra costs to copies PHIs.
9508 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9510 * config/riscv/autovec.md: Extend VLS modes.
9511 * config/riscv/vector.md: Ditto.
9513 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9515 * config/riscv/vector.md (mov<mode>): New pattern.
9516 (*mov<mode>_mem_to_mem): Ditto.
9517 (*mov<mode>): Ditto.
9518 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
9519 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
9520 (*mov<mode>_vls): Ditto.
9521 (movmisalign<mode>): Ditto.
9522 (@vec_duplicate<mode>): Ditto.
9523 * config/riscv/autovec-vls.md: Removed.
9525 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9528 * config/riscv/autovec.md: Add VLS modes.
9530 2023-09-18 Jason Merrill <jason@redhat.com>
9532 * doc/gty.texi: Add discussion of cache vs. deletable.
9534 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9536 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
9537 (copysign<mode>3): Ditto.
9538 (xorsign<mode>3): Ditto.
9539 (<optab><mode>2): Ditto.
9540 * config/riscv/autovec.md: Extend VLS modes.
9542 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
9544 PR middle-end/111303
9545 * match.pd ((t * 2) / 2): Update pattern.
9547 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
9549 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
9551 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9554 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
9555 (vec_extract<mode><vel>): Ditto.
9556 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
9557 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
9558 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
9560 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
9562 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
9563 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
9564 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
9565 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
9566 new insn/expansions.
9567 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
9568 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
9569 (*riscv_<sha256_op>_si): New raw instruction for RV32.
9570 (*riscv_<sm3_op>_si): Ditto.
9571 (*riscv_<sm4_op>_si): Ditto.
9572 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
9573 (riscv_<sm3_op>_di_extended): Ditto.
9574 (riscv_<sm4_op>_di_extended): Ditto.
9575 (riscv_<sha256_op>_si): New common instruction expansion.
9576 (riscv_<sm3_op>_si): Ditto.
9577 (riscv_<sm4_op>_si): Ditto.
9578 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
9579 "crypto_zksh" and "crypto_zksed". Remove availability
9580 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
9581 * config/riscv/riscv-ftypes.def: Remove unused function type.
9582 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
9583 intrinsics to operate on uint32_t.
9585 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
9587 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
9588 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
9589 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
9590 Removed as no longer used.
9591 (RISCV_ATYPE_UDI): New for uint64_t.
9592 * config/riscv/riscv-cmo.def: Make types unsigned for not working
9593 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
9594 argument/return types.
9595 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
9596 number and shift amount types unsigned.
9597 * config/riscv/riscv-scalar-crypto.def: Ditto.
9599 2023-09-16 Pan Li <pan2.li@intel.com>
9601 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
9603 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
9605 * config/riscv/predicates.md: Restrict predicate
9606 to allow 'reg' only.
9608 2023-09-15 Andrew Pinski <apinski@marvell.com>
9610 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
9611 Also match `a & zero_one_valued_p` too.
9613 2023-09-15 Andrew Pinski <apinski@marvell.com>
9615 PR tree-optimization/111414
9616 * match.pd (`(1 >> X) != 0`): Check to see if
9617 the integer_onep was an integral type (not a vector type).
9619 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
9621 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
9622 run phi analysis, and do it before loop analysis.
9624 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
9626 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
9629 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
9631 PR tree-optimization/111407
9632 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
9633 when one of the operands is subject to abnormal coalescing.
9635 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
9637 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
9638 (enum insn_type): Ditto.
9639 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
9640 (emit_vlmax_insn): Adjust.
9641 (emit_nonvlmax_insn): Adjust.
9642 (emit_vlmax_insn_lra): Adjust.
9644 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
9646 * config/riscv/autovec-opt.md: Adjust.
9647 * config/riscv/autovec.md: Ditto.
9648 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
9649 (expand_reduction): Adjust expand_reduction prototype.
9650 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
9651 (expand_reduction): Refactor expand_reduction.
9653 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
9656 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
9657 the lower memory access to a mem-pair operand.
9659 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
9661 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
9662 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
9663 before the driver canonicalization routines.
9664 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
9665 to loongarch-driver.h
9666 * config/loongarch/t-linux: Move multilib-related definitions to
9668 * config/loongarch/t-multilib: New file. Inject library build
9669 options obtained from --with-multilib-list.
9670 * config/loongarch/t-loongarch: Same.
9672 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
9675 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
9676 New combine pattern.
9677 (*fold_left_widen_plus_<mode>): Ditto.
9678 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
9679 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
9680 Change from define_expand to define_insn_and_split.
9681 (fold_left_plus_<mode>): Ditto.
9682 (mask_len_fold_left_plus_<mode>): Ditto.
9683 * config/riscv/riscv-v.cc (expand_reduction):
9684 Support widen reduction.
9685 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
9686 Add new iterators and attrs.
9688 2023-09-14 David Malcolm <dmalcolm@redhat.com>
9690 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
9691 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
9692 (sarif_thread_flow::sarif_thread_flow): New.
9693 (sarif_builder::make_code_flow_object): Reimplement, creating
9694 per-thread threadFlow objects, populating them with the relevant
9696 (sarif_builder::make_thread_flow_object): Delete, moving the
9697 code into sarif_builder::make_code_flow_object.
9698 (sarif_builder::make_thread_flow_location_object): Add
9699 "path_event_idx" param. Use it to set "executionOrder"
9701 * diagnostic-path.h (diagnostic_event::get_thread_id): New
9703 (class diagnostic_thread): New.
9704 (diagnostic_path::num_threads): New pure-virtual vfunc.
9705 (diagnostic_path::get_thread): New pure-virtual vfunc.
9706 (diagnostic_path::multithreaded_p): New decl.
9707 (simple_diagnostic_event::simple_diagnostic_event): Add optional
9709 (simple_diagnostic_event::get_thread_id): New accessor.
9710 (simple_diagnostic_event::m_thread_id): New.
9711 (class simple_diagnostic_thread): New.
9712 (simple_diagnostic_path::simple_diagnostic_path): Move definition
9714 (simple_diagnostic_path::num_threads): New.
9715 (simple_diagnostic_path::get_thread): New.
9716 (simple_diagnostic_path::add_thread): New.
9717 (simple_diagnostic_path::add_thread_event): New.
9718 (simple_diagnostic_path::m_threads): New.
9719 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
9720 param for overriding the context's printer.
9721 (diagnostic_show_locus): Likwise.
9722 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
9723 Move here from diagnostic-path.h. Add main thread.
9724 (simple_diagnostic_path::num_threads): New.
9725 (simple_diagnostic_path::get_thread): New.
9726 (simple_diagnostic_path::add_thread): New.
9727 (simple_diagnostic_path::add_thread_event): New.
9728 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
9729 param and use it to initialize m_thread_id. Reformat.
9730 * diagnostic.h: Add pretty_printer param for overriding the
9732 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
9733 (can_consolidate_events): Compare thread ids.
9734 (class per_thread_summary): New.
9735 (event_range::event_range): Add per_thread_summary arg.
9736 (event_range::print): Add "pp" param and use it rather than dc's
9738 (event_range::m_thread_id): New field.
9739 (event_range::m_per_thread_summary): New field.
9740 (path_summary::multithreaded_p): New.
9741 (path_summary::get_events_for_thread_id): New.
9742 (path_summary::m_per_thread_summary): New field.
9743 (path_summary::m_thread_id_to_events): New field.
9744 (path_summary::get_or_create_events_for_thread_id): New.
9745 (path_summary::path_summary): Create per_thread_summary instances
9746 as needed and associate the event_range instances with them.
9747 (base_indent): Move here from print_path_summary_as_text.
9748 (per_frame_indent): Likewise.
9749 (class thread_event_printer): New, adapted from parts of
9750 print_path_summary_as_text.
9751 (print_path_summary_as_text): Make static. Reimplement to
9752 moving most of existing code to class thread_event_printer,
9753 capturing state as per-thread as appropriate.
9754 (default_tree_diagnostic_path_printer): Add missing 'break' on
9757 2023-09-14 David Malcolm <dmalcolm@redhat.com>
9759 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
9760 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
9761 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
9762 clearing the deletable gcc_root_tab_t.
9763 (ggc_common_finalize): New.
9764 * ggc.h (ggc_common_finalize): New decl.
9765 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
9766 ggc_common_finalize.
9768 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
9770 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
9771 unsigned comparisons.
9772 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
9773 generation of salt/saltu instructions.
9774 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
9775 * config/xtensa/xtensa.md (salt, saltu): New instruction
9778 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
9780 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
9783 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
9785 * config/riscv/autovec.md: Change rtx code to unspec.
9786 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
9787 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
9788 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
9790 (class widen_freducop): Removed.
9791 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
9792 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
9793 (@pred_<reduc_op><mode>): New name.
9794 (@pred_widen_reduc_plus<v_su><mode>): Change name.
9795 (@pred_reduc_plus<order><mode>): Change name.
9796 (@pred_widen_reduc_plus<order><mode>): Change name.
9798 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
9800 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
9801 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
9802 * config/riscv/vector-iterators.md: New iterators and attrs.
9803 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
9805 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
9806 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
9807 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
9808 (@pred_reduc_<reduc><mode>): Added.
9809 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
9810 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
9811 (@pred_widen_reduc_plus<v_su><mode>): Added.
9812 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
9813 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
9814 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
9815 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
9816 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
9817 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
9818 (@pred_reduc_plus<order><mode>): Added.
9819 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
9820 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
9821 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
9822 (@pred_widen_reduc_plus<order><mode>): Added.
9824 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
9826 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
9827 Move WHILELO handling to...
9828 (aarch64_vector_costs::finish_cost): ...here. Check whether the
9829 vectorizer has decided to use a predicated loop.
9831 2023-09-14 Andrew Pinski <apinski@marvell.com>
9833 PR tree-optimization/106164
9834 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
9835 Expand to support constants that are off by one.
9837 2023-09-14 Andrew Pinski <apinski@marvell.com>
9839 * genmatch.cc (parser::parse_result): For an else clause
9840 of an if statement inside a switch, error out explictly.
9842 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9844 * config/riscv/autovec-opt.md: Add VLS mask modes.
9845 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
9846 (vcond_mask_<mode><vm>): Add VLS mask modes.
9847 * config/riscv/vector.md: Ditto.
9849 2023-09-14 Richard Biener <rguenther@suse.de>
9851 PR tree-optimization/111294
9852 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
9853 operands that eventually become dead and use simple_dce_from_worklist
9854 to remove their definitions if they did so.
9856 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
9858 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
9859 Accept all nonimmediate_operands, but keep the existing constraints.
9860 If the instruction is split before RA, load invalid addresses into
9861 a temporary register.
9862 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
9864 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9867 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
9868 (vector_insn_info::global_merge): Ditto.
9869 (vector_insn_info::get_avl_or_vl_reg): Ditto.
9871 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9873 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
9875 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
9877 * config/loongarch/loongarch-def.c: Modify the default value of
9880 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
9882 * config/xtensa/xtensa.cc (xtensa_expand_scc):
9883 Revert the changes from the last patch, as the work in the RTL
9884 expansion pass is too far to determine the physical registers.
9885 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
9886 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
9888 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
9891 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
9893 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9895 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
9896 (@vec_extract<mode><vel>): Ditto.
9897 * config/riscv/vector.md: Ditto
9899 2023-09-13 Andrew Pinski <apinski@marvell.com>
9901 * match.pd (`X <= MAX(X, Y)`):
9902 Move before `MIN (X, C1) < C2` pattern.
9904 2023-09-13 Andrew Pinski <apinski@marvell.com>
9906 PR tree-optimization/111364
9907 * match.pd (`MIN (X, Y) == X`): Extend
9908 to min/lt, min/ge, max/gt, max/le.
9910 2023-09-13 Andrew Pinski <apinski@marvell.com>
9912 PR tree-optimization/111345
9913 * match.pd (`Y > (X % Y)`): Merge
9915 (`(X % Y) < Y`): Pattern by adding `:c`
9918 2023-09-13 Richard Biener <rguenther@suse.de>
9920 PR tree-optimization/111387
9921 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
9922 EDGE_DFS_BACK when doing BB vectorization.
9923 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
9924 to compute RPO and mark backedges.
9926 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
9928 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
9929 New combine pattern.
9930 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
9931 (<mulh_table><mode>3_highpart): Merged pattern.
9932 (umul<mode>3_highpart): Mrege smul and umul.
9933 * config/riscv/vector-iterators.md (umul): New iterators.
9934 (UNSPEC_VMULHU): New iterators.
9936 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
9938 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
9939 New combine pattern.
9940 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
9942 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
9944 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
9945 (*cond_copysign<mode>): New combine pattern.
9946 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
9948 2023-09-13 Richard Biener <rguenther@suse.de>
9950 PR tree-optimization/111397
9951 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
9952 argument to specify whether the PHI destination doesn't flow in
9953 from an abnormal PHI.
9954 (propagate_value): Adjust.
9955 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
9957 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
9959 (process_bb): Likewise.
9961 2023-09-13 Pan Li <pan2.li@intel.com>
9964 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
9966 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
9968 PR tree-optimization/111303
9969 * match.pd ((X - N * M) / N): Add undefined_p checking.
9970 ((X + N * M) / N): Likewise.
9971 ((X + C) div_rshift N): Likewise.
9973 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9976 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
9978 2023-09-12 Martin Jambor <mjambor@suse.cz>
9980 * dbgcnt.def (form_fma): New.
9981 * tree-ssa-math-opts.cc: Include dbgcnt.h.
9982 (convert_mult_to_fma): Bail out if the debug counter say so.
9984 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
9986 * config/riscv/autovec-opt.md: Update type
9987 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
9989 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
9991 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
9993 (aarch64_layout_frame): Use it to decide whether locals should
9994 go above or below the saved registers.
9995 (aarch64_expand_prologue): Update stack layout comment.
9996 Emit a stack tie after the final adjustment.
9998 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10000 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
10001 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
10002 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
10004 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10006 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
10007 (aarch64_frame::hard_fp_save_and_probe): New fields.
10008 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
10009 Rather than asserting that a leaf function saves LR, instead assert
10010 that a leaf function saves something.
10011 (aarch64_get_separate_components): Prevent the chosen probe
10012 registers from being individually shrink-wrapped.
10013 (aarch64_allocate_and_probe_stack_space): Remove workaround for
10014 probe registers that aren't at the bottom of the previous allocation.
10016 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10018 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
10019 Always probe the residual allocation at offset 1024, asserting
10020 that that is in range.
10022 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10024 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
10025 the LR save slot is in the first 16 bytes of the register save area.
10026 Only form STP/LDP push/pop candidates if both registers are valid.
10027 (aarch64_allocate_and_probe_stack_space): Remove workaround for
10028 when LR was not in the first 16 bytes.
10030 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10032 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
10033 Don't probe final allocations that are exactly 1KiB in size (after
10034 unprobed space above the final allocation has been deducted).
10036 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10038 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
10039 calculation of initial_adjust for frames in which all saves
10042 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10044 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
10045 the allocation of the top of the frame.
10047 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10049 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
10051 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
10052 from the bottom of the frame, rather than the bottom of the saved
10053 register area. Measure reg_offset from the bottom of the frame
10054 rather than the bottom of the saved register area.
10055 (aarch64_save_callee_saves): Update accordingly.
10056 (aarch64_restore_callee_saves): Likewise.
10057 (aarch64_get_separate_components): Likewise.
10058 (aarch64_process_components): Likewise.
10060 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10062 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
10064 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10066 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
10068 (aarch64_frame::bytes_above_hard_fp): ...this.
10069 * config/aarch64/aarch64.cc (aarch64_layout_frame)
10070 (aarch64_expand_prologue): Update accordingly.
10071 (aarch64_initial_elimination_offset): Likewise.
10073 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10075 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
10076 (aarch64_frame::bytes_above_locals): ...this.
10077 * config/aarch64/aarch64.cc (aarch64_layout_frame)
10078 (aarch64_initial_elimination_offset): Update accordingly.
10080 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10082 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
10083 calculation of chain_offset into the emit_frame_chain block.
10085 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10087 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
10088 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
10089 callee_offset handling.
10090 (aarch64_save_callee_saves): Replace the start_offset parameter
10091 with a bytes_below_sp parameter.
10092 (aarch64_restore_callee_saves): Likewise.
10093 (aarch64_expand_prologue): Update accordingly.
10094 (aarch64_expand_epilogue): Likewise.
10096 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10098 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
10100 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
10101 (aarch64_expand_epilogue): Use it instead of
10102 below_hard_fp_saved_regs_size.
10104 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10106 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
10108 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
10109 and use it instead of crtl->outgoing_args_size.
10110 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
10111 of outgoing_args_size.
10112 (aarch64_process_components): Likewise.
10114 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10116 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
10117 allocate the frame in one go if there are no saved registers.
10119 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10121 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
10122 chain_offset rather than callee_offset.
10124 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
10126 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
10127 a local shorthand for cfun->machine->frame.
10128 (aarch64_restore_callee_saves, aarch64_get_separate_components):
10129 (aarch64_process_components): Likewise.
10130 (aarch64_allocate_and_probe_stack_space): Likewise.
10131 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
10132 (aarch64_layout_frame): Use existing shorthand for one more case.
10134 2023-09-12 Andrew Pinski <apinski@marvell.com>
10136 PR tree-optimization/107881
10137 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
10138 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
10140 2023-09-12 Pan Li <pan2.li@intel.com>
10142 * config/riscv/riscv-vector-costs.h (struct range): Removed.
10144 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10146 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
10147 (compute_nregs_for_mode): Ditto.
10148 (live_range_conflict_p): Ditto.
10149 (max_number_of_live_regs): Ditto.
10150 (compute_lmul): Ditto.
10151 (costs::prefer_new_lmul_p): Ditto.
10152 (costs::better_main_loop_than_p): Ditto.
10153 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
10154 (struct var_live_range): Ditto.
10155 (struct autovec_info): Ditto.
10156 * config/riscv/t-riscv: Update makefile for COST model.
10158 2023-09-12 Jakub Jelinek <jakub@redhat.com>
10160 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
10163 2023-09-12 Jakub Jelinek <jakub@redhat.com>
10165 PR middle-end/111338
10166 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
10168 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
10169 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
10170 optimization if type's precision is too large for
10171 vn_walk_cb_data::bufsize.
10173 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
10175 * doc/gm2.texi (Compiler options): Document new option
10178 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
10180 * doc/sourcebuild.texi (stack_size): Update.
10182 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
10184 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
10185 (<optab>_not<mode>3): Likewise.
10186 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
10188 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
10190 (GEN_EMIT_HELPER2): Likewise.
10191 (emit_strcmp_scalar_compare_byte): New function.
10192 (emit_strcmp_scalar_compare_subword): Likewise.
10193 (emit_strcmp_scalar_compare_word): Likewise.
10194 (emit_strcmp_scalar_load_and_compare): Likewise.
10195 (emit_strcmp_scalar_call_to_libc): Likewise.
10196 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
10197 (emit_strcmp_scalar_result_calculation): Likewise.
10198 (riscv_expand_strcmp_scalar): Likewise.
10199 (riscv_expand_strcmp): Likewise.
10200 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
10202 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
10203 (cmpstrnsi): Invoke expansion function for str(n)cmp.
10204 (cmpstrsi): Likewise.
10205 * config/riscv/riscv.opt: Add new parameter
10206 '-mstring-compare-inline-limit'.
10207 * doc/invoke.texi: Document new parameter
10208 '-mstring-compare-inline-limit'.
10210 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
10212 * config.gcc: Add new object riscv-string.o.
10214 * config/riscv/riscv-protos.h (riscv_expand_strlen):
10216 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
10217 * config/riscv/riscv.opt: New flag 'minline-strlen'.
10218 * config/riscv/t-riscv: Add new object riscv-string.o.
10219 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
10220 (th_rev<mode>2): Likewise.
10221 (th_tstnbz<mode>2): New INSN.
10222 * doc/invoke.texi: Document '-minline-strlen'.
10223 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
10224 (emit_unlikely_jump_insn): Likewise.
10225 * rtl.h (emit_likely_jump_insn): New prototype.
10226 (emit_unlikely_jump_insn): Likewise.
10227 * config/riscv/riscv-string.cc: New file.
10229 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
10231 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
10232 (TARGET_SUPPORTS_ALIASES): Define.
10234 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
10236 * doc/sourcebuild.texi (check-function-bodies): Update.
10238 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
10240 * gimplify.cc (gimplify_bind_expr): Check for
10241 insertion after variable cleanup. Convert 'omp allocate'
10242 var-decl attribute to GOMP_alloc/GOMP_free calls.
10244 2023-09-12 xuli <xuli1@eswincomputing.com>
10246 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
10247 parameter e and replace NULL_RTX with gcc_unreachable.
10249 2023-09-12 xuli <xuli1@eswincomputing.com>
10251 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
10253 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10254 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
10255 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
10257 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
10258 * config/riscv/riscv-vector-builtins.cc: Add args type.
10260 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
10262 * config/riscv/riscv.cc
10263 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
10264 riscv_avoid_shrink_wrapping_separate.
10265 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
10267 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
10269 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
10271 * shrink-wrap.cc (try_shrink_wrapping_separate):call
10272 use_shrink_wrapping_separate.
10273 (use_shrink_wrapping_separate): wrap the condition
10274 check in use_shrink_wrapping_separate.
10275 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
10277 2023-09-11 Andrew Pinski <apinski@marvell.com>
10279 PR tree-optimization/111348
10280 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
10281 the cmp part of the pattern.
10283 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
10286 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
10287 Call output_addr_const for CASE_CONST_SCALAR_INT.
10289 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
10291 * config/riscv/thead.md: Update types
10293 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
10295 * config/riscv/riscv.md: Update types
10297 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
10299 * config/riscv/riscv.md: Add "zicond" type
10300 * config/riscv/zicond.md: Update types
10302 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
10304 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
10305 * config/riscv/zc.md: Update types
10307 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
10309 * config/riscv/autovec-opt.md: Update types
10310 * config/riscv/autovec.md: likewise
10312 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10314 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
10316 (s390_vec_unsigned_flt): Ditto.
10317 (s390_vec_revb_flt): Ditto.
10318 (s390_vec_reve_flt): Ditto.
10319 (s390_vclfnhs): Fix operand flags.
10320 (s390_vclfnls): Ditto.
10321 (s390_vcrnfs): Ditto.
10322 (s390_vcfn): Ditto.
10323 (s390_vcnf): Ditto.
10325 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10327 * config/s390/s390-builtins.def (O_U64): New.
10332 (O_M12): Change bit position.
10343 (OB_DEF_VAR): Add operand constraints.
10345 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
10348 2023-09-11 Andrew Pinski <apinski@marvell.com>
10350 PR tree-optimization/111349
10351 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
10352 the cmp part of the pattern.
10354 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10357 * config/riscv/riscv.opt: Set default as scalable vectorization.
10359 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10361 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
10362 (get_all_successors): Ditto.
10363 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
10364 (get_all_successors): Ditto.
10366 2023-09-11 Jakub Jelinek <jakub@redhat.com>
10368 PR middle-end/111329
10369 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
10370 function. For printing values which don't fit into digit_buffer
10371 use out-of-line function.
10372 * wide-int-print.h (pp_wide_int_large): Declare.
10373 * wide-int-print.cc: Include pretty-print.h.
10374 (pp_wide_int_large): Define.
10376 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10378 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
10379 Use dominance analysis.
10380 (pass_vsetvl::init): Ditto.
10381 (pass_vsetvl::done): Ditto.
10383 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10386 * config/riscv/autovec.md: Add VLS modes.
10387 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
10388 (cmp_lmul_gt_one): Ditto.
10389 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
10390 (cmp_lmul_gt_one): Ditto.
10391 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
10392 (riscv_vectorize_vec_perm_const): Ditto.
10393 * config/riscv/vector-iterators.md: Ditto.
10394 * config/riscv/vector.md: Ditto.
10396 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10398 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
10399 * config/riscv/vector-iterators.md: New iterator
10401 2023-09-11 Andrew Pinski <apinski@marvell.com>
10403 PR tree-optimization/111346
10404 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
10407 2023-09-11 liuhongt <hongtao.liu@intel.com>
10411 * config/i386/sse.md (int_comm): New int_attr.
10412 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
10413 Remove % for Complex conjugate operations since they're not
10415 (fma_<complexpairopname>_<mode>_pair): Ditto.
10416 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
10417 (cmul<conj_op><mode>3): Ditto.
10419 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10421 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
10422 fixed-vlmax/vls vector permutation.
10424 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10426 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
10428 2023-09-10 Andrew Pinski <apinski@marvell.com>
10430 PR tree-optimization/111331
10431 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
10432 Fix the LE/GE comparison to the correct value.
10433 * tree-ssa-phiopt.cc (minmax_replacement):
10434 Fix the LE/GE comparison for the
10435 `(a CMP CST1) ? max<a,CST2> : a` optimization.
10437 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
10439 * config/darwin.cc (darwin_function_section): Place unlikely
10440 executed global init code into the standard cold section.
10442 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10445 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
10446 (pass_vsetvl::pre_vsetvl): Ditto.
10447 (pass_vsetvl::init): Ditto.
10448 (pass_vsetvl::lazy_vsetvl): Ditto.
10450 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
10452 * config/loongarch/loongarch.md (mulsidi3_64bit):
10453 Field unsigned extension support.
10454 (<u>muldi3_highpart): Modify template name.
10455 (<u>mulsi3_highpart): Likewise.
10456 (<u>mulsidi3_64bit): Field unsigned extension support.
10457 (<su>muldi3_highpart): Modify muldi3_highpart to
10459 (<su>mulsi3_highpart): Modify mulsi3_highpart to
10462 2023-09-09 Xi Ruoyao <xry111@xry111.site>
10464 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
10465 Check precondition (delta must be a power of 2) and use
10466 popcount_hwi instead of a homebrew loop.
10468 2023-09-09 Xi Ruoyao <xry111@xry111.site>
10470 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
10471 Define to the maximum amount of bytes able to be loaded or
10472 stored with one machine instruction.
10473 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
10474 New static function.
10475 (loongarch_block_move_straight): Call
10476 loongarch_mode_for_move_size for machine_mode to be moved.
10477 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
10478 instead of UNITS_PER_WORD.
10480 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10482 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
10484 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
10486 * fold-const.cc (can_min_p): New function.
10487 (poly_int_binop): Try fold MIN_EXPR.
10489 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
10491 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
10492 case VREL_EQ nor call frelop_early_resolve.
10494 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
10496 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
10497 Remove broken INSN.
10498 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
10499 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
10501 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
10503 * config/riscv/thead.md: Use more appropriate mode attributes
10506 2023-09-08 Guo Jie <guojie@loongson.cn>
10508 * common/config/loongarch/loongarch-common.cc:
10509 (default_options loongarch_option_optimization_table):
10510 Default to -fsched-pressure.
10512 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
10514 * config.gcc: remove non-POSIX syntax "<<<".
10516 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
10518 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
10519 Rename postfix to _bitmanip.
10520 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
10521 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
10523 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10525 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
10527 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10529 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
10531 2023-09-07 liuhongt <hongtao.liu@intel.com>
10533 * config/i386/sse.md
10534 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
10535 (VHFBF_AVX512VL): New mode iterator.
10536 (VI2HFBF_AVX512VL): New mode iterator.
10538 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
10540 * value-range.h (contains_zero_p): Return false for undefined ranges.
10541 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
10542 contains_zero_p change above.
10543 (operator_ge::op1_op2_relation): Same.
10544 (operator_equal::op1_op2_relation): Same.
10545 (operator_not_equal::op1_op2_relation): Same.
10546 (operator_lt::op1_op2_relation): Same.
10547 (operator_le::op1_op2_relation): Same.
10548 (operator_ge::op1_op2_relation): Same.
10549 * range-op.cc (operator_equal::op1_op2_relation): Same.
10550 (operator_not_equal::op1_op2_relation): Same.
10551 (operator_lt::op1_op2_relation): Same.
10552 (operator_le::op1_op2_relation): Same.
10553 (operator_cast::op1_range): Same.
10554 (set_nonzero_range_from_mask): Same.
10555 (operator_bitwise_xor::op1_range): Same.
10556 (operator_addr_expr::fold_range): Same.
10557 (operator_addr_expr::op1_range): Same.
10559 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
10561 PR tree-optimization/110875
10562 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
10563 cache-prefilling routine when the ssa-name has no global value.
10565 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
10568 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
10569 (process_alt_operands): Set up the flag. Clear flag for chosen
10570 alternative with special memory constraints.
10571 (process_alt_operands): Set up used insn alternative depending on the flag.
10573 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10575 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
10576 * config/riscv/riscv.md: Ditto.
10577 * config/riscv/vector-iterators.md: Ditto.
10578 * config/riscv/vector.md: Ditto.
10580 2023-09-07 David Malcolm <dmalcolm@redhat.com>
10582 * diagnostic-core.h (error_meta): New decl.
10583 * diagnostic.cc (error_meta): New.
10585 2023-09-07 Jakub Jelinek <jakub@redhat.com>
10588 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
10589 inside gcc_assert, as later code relies on it filling info variable.
10590 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
10591 clear_padding_type): Likewise.
10592 * varasm.cc (output_constant): Likewise.
10593 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
10594 * stor-layout.cc (finish_bitfield_representative, layout_type):
10596 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
10598 2023-09-07 Xi Ruoyao <xry111@xry111.site>
10601 * config/loongarch/loongarch-protos.h
10602 (loongarch_pre_reload_split): Declare new function.
10603 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
10604 * config/loongarch/loongarch.cc
10605 (loongarch_pre_reload_split): Implement.
10606 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
10607 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
10609 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
10610 New define_insn_and_split.
10611 (bstrins_<mode>_for_ior_mask): Likewise.
10612 (define_peephole2): Further optimize code sequence produced by
10613 bstrins_<mode>_for_ior_mask if possible.
10615 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
10617 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
10618 rather than gen_rtx_PLUS.
10620 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10623 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
10624 (pass_vsetvl::df_post_optimization): Remove incorrect function.
10626 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
10628 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
10629 Parse 'XVentanaCondOps' extension.
10630 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
10631 (TARGET_XVENTANACONDOPS): Ditto.
10632 (TARGET_ZICOND_LIKE): New to represent targets with conditional
10633 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
10634 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
10635 with TARGET_ZICOND_LIKE.
10636 (riscv_expand_conditional_move): Ditto.
10637 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
10638 TARGET_ZICOND_LIKE.
10639 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
10640 * config/riscv/zicond.md: Modify description.
10641 (eqz_ventana): New to match corresponding czero instructions.
10642 (nez_ventana): Ditto.
10643 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
10644 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
10645 (*czero.<eqz>.<GPR><X>): Ditto.
10646 (*czero.eqz.<GPR><X>.opt1): Ditto.
10647 (*czero.nez.<GPR><X>.opt2): Ditto.
10649 2023-09-06 Ian Lance Taylor <iant@golang.org>
10652 * godump.cc (go_format_type): Handle BITINT_TYPE.
10654 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10657 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
10660 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10663 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
10664 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
10665 rather than make_edge, initialize bb->count.
10667 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10670 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
10671 Document general rules for _BitInt support library functions
10672 and document __mulbitint3 and __divmodbitint4.
10673 (Conversion functions): Document __fix{s,d,x,t}fbitint,
10674 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
10675 __bid_floatbitint{s,d,t}d.
10677 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10680 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
10683 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10686 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
10687 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
10688 check if all padding bits up to mode precision are zeros or sign
10689 bit copies and if not, jump to DO_ERROR.
10690 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
10691 Adjust expand_ubsan_result_store callers.
10692 * ubsan.cc: Include target.h and langhooks.h.
10693 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
10694 size converted to pointer sized integer, pass BITINT_TYPE values
10695 which fit into TImode (if supported) or DImode as those integer types
10696 or otherwise for now punt (pass 0).
10697 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
10698 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
10699 TImode/DImode precision rather than TK_Unknown used otherwise for
10700 large/huge BITINT_TYPEs.
10701 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
10702 they don't have mode precision.
10703 * ubsan.h (enum ubsan_print_style): New enumerator.
10705 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10708 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
10709 (ix86_bitint_type_info): New function.
10710 (TARGET_C_BITINT_TYPE_INFO): Redefine.
10712 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10715 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
10716 * passes.def: Add pass_lower_bitint after pass_lower_complex and
10717 pass_lower_bitint_O0 after pass_lower_complex_O0.
10718 * tree-pass.h (PROP_gimple_lbitint): Define.
10719 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
10720 * gimple-lower-bitint.h: New file.
10721 * tree-ssa-live.h (struct _var_map): Add bitint member.
10722 (init_var_map): Adjust declaration.
10723 (region_contains_p): Handle map->bitint like map->outofssa_p.
10724 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
10725 map->bitint and set map->outofssa_p to false if it is non-NULL.
10726 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
10727 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
10729 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
10730 not in that bitmap, and allow res without default def.
10731 (compute_optimized_partition_bases): In map->bitint mode try hard to
10732 coalesce any SSA_NAMEs with the same size.
10733 (coalesce_bitint): New function.
10734 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
10735 used_in_copies and call coalesce_bitint.
10736 * gimple-lower-bitint.cc: New file.
10738 2023-09-06 Jakub Jelinek <jakub@redhat.com>
10741 * tree.def (BITINT_TYPE): New type.
10742 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
10743 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
10745 (BITINT_TYPE_P): Define.
10746 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
10747 they have BITINT_TYPE type.
10748 (tree_check6, tree_not_check6): New inline functions.
10749 (any_integral_type_check): Include BITINT_TYPE.
10750 (build_bitint_type): Declare.
10751 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
10752 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
10753 type_hash_canon): Handle BITINT_TYPE.
10754 (bitint_type_cache): New variable.
10755 (build_bitint_type): New function.
10756 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
10757 Handle BITINT_TYPE.
10758 (tree_cc_finalize): Free bitint_type_cache.
10759 * builtins.cc (type_to_class): Handle BITINT_TYPE.
10760 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
10761 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
10763 * convert.cc (convert_to_pointer_1, convert_to_real_1,
10764 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
10765 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
10766 GET_MODE_PRECISION (TYPE_MODE (type)).
10767 * doc/generic.texi (BITINT_TYPE): Document.
10768 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
10769 * doc/tm.texi: Regenerated.
10770 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
10771 gen_type_die_with_usage): Handle BITINT_TYPE.
10772 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
10773 handle those which fit into shwi.
10774 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
10775 to bitfield precision reads from BITINT_TYPE vars, parameters or
10776 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
10778 * fold-const.cc (fold_convert_loc, make_range_step): Handle
10780 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
10781 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
10782 (native_encode_int, native_interpret_int, native_interpret_expr):
10783 Handle BITINT_TYPE.
10784 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
10785 to some other integral type or vice versa conversions non-useless.
10786 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
10787 (clear_padding_unit): Mention in comment that _BitInt types don't need
10789 (clear_padding_bitint_needs_padding_p): New function.
10790 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
10791 (clear_padding_type): Likewise.
10792 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
10793 precision operands force pos_neg? to 1.
10794 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
10795 expand_BITINTTOFLOAT): New functions.
10796 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
10797 BITINTTOFLOAT): New internal functions.
10798 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
10799 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
10800 * match.pd (non-equality compare simplifications from fold_binary):
10801 Punt if TYPE_MODE (arg1_type) is BLKmode.
10802 * pretty-print.h (pp_wide_int): Handle printing of large precision
10803 wide_ints which would buffer overflow digit_buffer.
10804 * stor-layout.cc (finish_bitfield_representative): For bit-fields
10805 with BITINT_TYPE, prefer representatives with precisions in
10806 multiple of limb precision.
10807 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
10808 element type and assert it is BITINT_TYPE.
10809 * target.def (bitint_type_info): New C target hook.
10810 * target.h (struct bitint_info): New type.
10811 * targhooks.cc (default_bitint_type_info): New function.
10812 * targhooks.h (default_bitint_type_info): Declare.
10813 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
10814 Handle printing large wide_ints which would buffer overflow
10816 * tree-ssa-sccvn.cc: Include target.h.
10817 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
10819 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
10820 64-bit BITINT_TYPE subtract low bound from expression and cast to
10821 64-bit integer type both the controlling expression and case labels.
10822 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
10823 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
10824 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
10826 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
10827 unsigned_type_for rather than build_nonstandard_integer_type.
10829 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10832 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
10833 tieable for RVV modes.
10835 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10838 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
10840 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10842 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
10844 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
10846 * config/xtensa/xtensa.cc (xtensa_expand_scc):
10847 Add code for particular constants (only 0 and INT_MIN for now)
10848 for EQ/NE boolean evaluation in SImode.
10849 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
10850 implementation has been integrated into the above.
10852 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
10855 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
10857 (*pred_widen_mulsu<mode>): Delete.
10858 (*pred_single_widen_mul<mode>): Delete.
10859 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
10860 Add new combine patterns.
10861 (*single_widen_sub<any_extend:su><mode>): Ditto.
10862 (*single_widen_add<any_extend:su><mode>): Ditto.
10863 (*single_widen_mult<any_extend:su><mode>): Ditto.
10864 (*dual_widen_mulsu<mode>): Ditto.
10865 (*dual_widen_mulus<mode>): Ditto.
10866 (*dual_widen_<optab><mode>): Ditto.
10867 (*single_widen_add<mode>): Ditto.
10868 (*single_widen_sub<mode>): Ditto.
10869 (*single_widen_mult<mode>): Ditto.
10870 * config/riscv/autovec.md (<optab><mode>3):
10871 Change define_expand to define_insn_and_split.
10872 (<optab><mode>2): Ditto.
10873 (abs<mode>2): Ditto.
10874 (smul<mode>3_highpart): Ditto.
10875 (umul<mode>3_highpart): Ditto.
10877 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
10879 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
10880 (riscv_asm_output_alias): Ditto.
10881 (riscv_asm_output_external): Ditto.
10882 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
10883 Output .variant_cc directive for vector function.
10884 (riscv_declare_function_name): Ditto.
10885 (riscv_asm_output_alias): Ditto.
10886 (riscv_asm_output_external): Ditto.
10887 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
10888 Implement ASM_DECLARE_FUNCTION_NAME.
10889 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
10890 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
10892 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
10894 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
10895 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
10896 (riscv_frame_info::reset): Reset new fileds.
10897 (riscv_call_tls_get_addr): Pass riscv_cc.
10898 (riscv_function_arg): Return riscv_cc for call patterm.
10899 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
10900 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
10901 (riscv_save_reg_p): Add vector callee-saved check.
10902 (riscv_stack_align): Add vector save area comment.
10903 (riscv_compute_frame_info): Ditto.
10904 (riscv_restore_reg): Update for type change.
10905 (riscv_for_each_saved_v_reg): New function save vector registers.
10906 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
10907 (riscv_expand_prologue): Ditto.
10908 (riscv_expand_epilogue): Ditto.
10909 (riscv_output_mi_thunk): Pass riscv_cc.
10910 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
10911 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
10912 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
10914 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
10916 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
10917 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
10918 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
10919 (riscv_init_cumulative_args): Setup variant_cc field.
10920 (riscv_vector_type_p): New function for checking vector type.
10921 (riscv_hard_regno_nregs): Hoist declare.
10922 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
10923 (riscv_get_arg_info): Support vector cc.
10924 (riscv_function_arg_advance): Update cum.
10925 (riscv_pass_by_reference): Handle vector args.
10926 (riscv_v_abi): New function return vector abi.
10927 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
10928 (riscv_arguments_is_vector_type_p): New function for check vector returns.
10929 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
10930 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
10931 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
10932 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
10933 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
10934 (V_ARG_FIRST): Ditto.
10935 (V_ARG_LAST): Ditto.
10936 (enum riscv_cc): Define all RISCV_CC variants.
10937 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
10939 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
10941 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
10942 Add sqrt + vcond_mask combine pattern.
10943 * config/riscv/autovec.md (<optab><mode>2):
10944 Change define_expand to define_insn_and_split.
10946 2023-09-06 Jason Merrill <jason@redhat.com>
10948 * common.opt: Update -fabi-version=19.
10950 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
10952 * config/riscv/zicond.md: Add closing parent to a comment.
10954 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
10956 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
10957 large constant cons/alt into a register.
10959 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
10961 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
10962 require one zero bit in the upper 32 bits for LI+RORI synthesis.
10964 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
10966 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
10968 2023-09-05 Andrew Pinski <apinski@marvell.com>
10970 PR tree-optimization/98710
10971 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
10972 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
10974 2023-09-05 Andrew Pinski <apinski@marvell.com>
10976 PR tree-optimization/103536
10977 * match.pd (`(x | y) & (x & z)`,
10978 `(x & y) | (x | z)`): New patterns.
10980 2023-09-05 Andrew Pinski <apinski@marvell.com>
10982 PR tree-optimization/107137
10983 * match.pd (`(nop_convert)-(convert)a`): New pattern.
10985 2023-09-05 Andrew Pinski <apinski@marvell.com>
10987 PR tree-optimization/96694
10988 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
10990 2023-09-05 Andrew Pinski <apinski@marvell.com>
10992 PR tree-optimization/105832
10993 * match.pd (`(1 >> X) != 0`): New pattern
10995 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
10997 * config/riscv/riscv.md: Update/Add types
10999 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
11001 * config/riscv/pic.md: Update types
11003 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
11005 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
11006 synthesis with rotate-right for XTheadBb.
11008 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
11010 * config/riscv/zicond.md: Fix op2 pattern.
11012 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
11014 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
11016 2023-09-05 Xi Ruoyao <xry111@xry111.site>
11018 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
11019 Define to 0 if not defined yet.
11021 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
11023 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
11024 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
11026 2023-09-05 Pan Li <pan2.li@intel.com>
11028 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
11029 * config/riscv/vector.md: Extend iterator for VLS.
11031 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
11033 * config.gcc: Export the header file lasxintrin.h.
11034 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
11035 Add Loongson ASX builtin functions support.
11036 (AVAIL_ALL): Ditto.
11037 (LASX_BUILTIN): Ditto.
11038 (LASX_NO_TARGET_BUILTIN): Ditto.
11039 (LASX_BUILTIN_TEST_BRANCH): Ditto.
11040 (CODE_FOR_lasx_xvsadd_b): Ditto.
11041 (CODE_FOR_lasx_xvsadd_h): Ditto.
11042 (CODE_FOR_lasx_xvsadd_w): Ditto.
11043 (CODE_FOR_lasx_xvsadd_d): Ditto.
11044 (CODE_FOR_lasx_xvsadd_bu): Ditto.
11045 (CODE_FOR_lasx_xvsadd_hu): Ditto.
11046 (CODE_FOR_lasx_xvsadd_wu): Ditto.
11047 (CODE_FOR_lasx_xvsadd_du): Ditto.
11048 (CODE_FOR_lasx_xvadd_b): Ditto.
11049 (CODE_FOR_lasx_xvadd_h): Ditto.
11050 (CODE_FOR_lasx_xvadd_w): Ditto.
11051 (CODE_FOR_lasx_xvadd_d): Ditto.
11052 (CODE_FOR_lasx_xvaddi_bu): Ditto.
11053 (CODE_FOR_lasx_xvaddi_hu): Ditto.
11054 (CODE_FOR_lasx_xvaddi_wu): Ditto.
11055 (CODE_FOR_lasx_xvaddi_du): Ditto.
11056 (CODE_FOR_lasx_xvand_v): Ditto.
11057 (CODE_FOR_lasx_xvandi_b): Ditto.
11058 (CODE_FOR_lasx_xvbitsel_v): Ditto.
11059 (CODE_FOR_lasx_xvseqi_b): Ditto.
11060 (CODE_FOR_lasx_xvseqi_h): Ditto.
11061 (CODE_FOR_lasx_xvseqi_w): Ditto.
11062 (CODE_FOR_lasx_xvseqi_d): Ditto.
11063 (CODE_FOR_lasx_xvslti_b): Ditto.
11064 (CODE_FOR_lasx_xvslti_h): Ditto.
11065 (CODE_FOR_lasx_xvslti_w): Ditto.
11066 (CODE_FOR_lasx_xvslti_d): Ditto.
11067 (CODE_FOR_lasx_xvslti_bu): Ditto.
11068 (CODE_FOR_lasx_xvslti_hu): Ditto.
11069 (CODE_FOR_lasx_xvslti_wu): Ditto.
11070 (CODE_FOR_lasx_xvslti_du): Ditto.
11071 (CODE_FOR_lasx_xvslei_b): Ditto.
11072 (CODE_FOR_lasx_xvslei_h): Ditto.
11073 (CODE_FOR_lasx_xvslei_w): Ditto.
11074 (CODE_FOR_lasx_xvslei_d): Ditto.
11075 (CODE_FOR_lasx_xvslei_bu): Ditto.
11076 (CODE_FOR_lasx_xvslei_hu): Ditto.
11077 (CODE_FOR_lasx_xvslei_wu): Ditto.
11078 (CODE_FOR_lasx_xvslei_du): Ditto.
11079 (CODE_FOR_lasx_xvdiv_b): Ditto.
11080 (CODE_FOR_lasx_xvdiv_h): Ditto.
11081 (CODE_FOR_lasx_xvdiv_w): Ditto.
11082 (CODE_FOR_lasx_xvdiv_d): Ditto.
11083 (CODE_FOR_lasx_xvdiv_bu): Ditto.
11084 (CODE_FOR_lasx_xvdiv_hu): Ditto.
11085 (CODE_FOR_lasx_xvdiv_wu): Ditto.
11086 (CODE_FOR_lasx_xvdiv_du): Ditto.
11087 (CODE_FOR_lasx_xvfadd_s): Ditto.
11088 (CODE_FOR_lasx_xvfadd_d): Ditto.
11089 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
11090 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
11091 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
11092 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
11093 (CODE_FOR_lasx_xvffint_s_w): Ditto.
11094 (CODE_FOR_lasx_xvffint_d_l): Ditto.
11095 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
11096 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
11097 (CODE_FOR_lasx_xvfsub_s): Ditto.
11098 (CODE_FOR_lasx_xvfsub_d): Ditto.
11099 (CODE_FOR_lasx_xvfmul_s): Ditto.
11100 (CODE_FOR_lasx_xvfmul_d): Ditto.
11101 (CODE_FOR_lasx_xvfdiv_s): Ditto.
11102 (CODE_FOR_lasx_xvfdiv_d): Ditto.
11103 (CODE_FOR_lasx_xvfmax_s): Ditto.
11104 (CODE_FOR_lasx_xvfmax_d): Ditto.
11105 (CODE_FOR_lasx_xvfmin_s): Ditto.
11106 (CODE_FOR_lasx_xvfmin_d): Ditto.
11107 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
11108 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
11109 (CODE_FOR_lasx_xvflogb_s): Ditto.
11110 (CODE_FOR_lasx_xvflogb_d): Ditto.
11111 (CODE_FOR_lasx_xvmax_b): Ditto.
11112 (CODE_FOR_lasx_xvmax_h): Ditto.
11113 (CODE_FOR_lasx_xvmax_w): Ditto.
11114 (CODE_FOR_lasx_xvmax_d): Ditto.
11115 (CODE_FOR_lasx_xvmaxi_b): Ditto.
11116 (CODE_FOR_lasx_xvmaxi_h): Ditto.
11117 (CODE_FOR_lasx_xvmaxi_w): Ditto.
11118 (CODE_FOR_lasx_xvmaxi_d): Ditto.
11119 (CODE_FOR_lasx_xvmax_bu): Ditto.
11120 (CODE_FOR_lasx_xvmax_hu): Ditto.
11121 (CODE_FOR_lasx_xvmax_wu): Ditto.
11122 (CODE_FOR_lasx_xvmax_du): Ditto.
11123 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
11124 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
11125 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
11126 (CODE_FOR_lasx_xvmaxi_du): Ditto.
11127 (CODE_FOR_lasx_xvmin_b): Ditto.
11128 (CODE_FOR_lasx_xvmin_h): Ditto.
11129 (CODE_FOR_lasx_xvmin_w): Ditto.
11130 (CODE_FOR_lasx_xvmin_d): Ditto.
11131 (CODE_FOR_lasx_xvmini_b): Ditto.
11132 (CODE_FOR_lasx_xvmini_h): Ditto.
11133 (CODE_FOR_lasx_xvmini_w): Ditto.
11134 (CODE_FOR_lasx_xvmini_d): Ditto.
11135 (CODE_FOR_lasx_xvmin_bu): Ditto.
11136 (CODE_FOR_lasx_xvmin_hu): Ditto.
11137 (CODE_FOR_lasx_xvmin_wu): Ditto.
11138 (CODE_FOR_lasx_xvmin_du): Ditto.
11139 (CODE_FOR_lasx_xvmini_bu): Ditto.
11140 (CODE_FOR_lasx_xvmini_hu): Ditto.
11141 (CODE_FOR_lasx_xvmini_wu): Ditto.
11142 (CODE_FOR_lasx_xvmini_du): Ditto.
11143 (CODE_FOR_lasx_xvmod_b): Ditto.
11144 (CODE_FOR_lasx_xvmod_h): Ditto.
11145 (CODE_FOR_lasx_xvmod_w): Ditto.
11146 (CODE_FOR_lasx_xvmod_d): Ditto.
11147 (CODE_FOR_lasx_xvmod_bu): Ditto.
11148 (CODE_FOR_lasx_xvmod_hu): Ditto.
11149 (CODE_FOR_lasx_xvmod_wu): Ditto.
11150 (CODE_FOR_lasx_xvmod_du): Ditto.
11151 (CODE_FOR_lasx_xvmul_b): Ditto.
11152 (CODE_FOR_lasx_xvmul_h): Ditto.
11153 (CODE_FOR_lasx_xvmul_w): Ditto.
11154 (CODE_FOR_lasx_xvmul_d): Ditto.
11155 (CODE_FOR_lasx_xvclz_b): Ditto.
11156 (CODE_FOR_lasx_xvclz_h): Ditto.
11157 (CODE_FOR_lasx_xvclz_w): Ditto.
11158 (CODE_FOR_lasx_xvclz_d): Ditto.
11159 (CODE_FOR_lasx_xvnor_v): Ditto.
11160 (CODE_FOR_lasx_xvor_v): Ditto.
11161 (CODE_FOR_lasx_xvori_b): Ditto.
11162 (CODE_FOR_lasx_xvnori_b): Ditto.
11163 (CODE_FOR_lasx_xvpcnt_b): Ditto.
11164 (CODE_FOR_lasx_xvpcnt_h): Ditto.
11165 (CODE_FOR_lasx_xvpcnt_w): Ditto.
11166 (CODE_FOR_lasx_xvpcnt_d): Ditto.
11167 (CODE_FOR_lasx_xvxor_v): Ditto.
11168 (CODE_FOR_lasx_xvxori_b): Ditto.
11169 (CODE_FOR_lasx_xvsll_b): Ditto.
11170 (CODE_FOR_lasx_xvsll_h): Ditto.
11171 (CODE_FOR_lasx_xvsll_w): Ditto.
11172 (CODE_FOR_lasx_xvsll_d): Ditto.
11173 (CODE_FOR_lasx_xvslli_b): Ditto.
11174 (CODE_FOR_lasx_xvslli_h): Ditto.
11175 (CODE_FOR_lasx_xvslli_w): Ditto.
11176 (CODE_FOR_lasx_xvslli_d): Ditto.
11177 (CODE_FOR_lasx_xvsra_b): Ditto.
11178 (CODE_FOR_lasx_xvsra_h): Ditto.
11179 (CODE_FOR_lasx_xvsra_w): Ditto.
11180 (CODE_FOR_lasx_xvsra_d): Ditto.
11181 (CODE_FOR_lasx_xvsrai_b): Ditto.
11182 (CODE_FOR_lasx_xvsrai_h): Ditto.
11183 (CODE_FOR_lasx_xvsrai_w): Ditto.
11184 (CODE_FOR_lasx_xvsrai_d): Ditto.
11185 (CODE_FOR_lasx_xvsrl_b): Ditto.
11186 (CODE_FOR_lasx_xvsrl_h): Ditto.
11187 (CODE_FOR_lasx_xvsrl_w): Ditto.
11188 (CODE_FOR_lasx_xvsrl_d): Ditto.
11189 (CODE_FOR_lasx_xvsrli_b): Ditto.
11190 (CODE_FOR_lasx_xvsrli_h): Ditto.
11191 (CODE_FOR_lasx_xvsrli_w): Ditto.
11192 (CODE_FOR_lasx_xvsrli_d): Ditto.
11193 (CODE_FOR_lasx_xvsub_b): Ditto.
11194 (CODE_FOR_lasx_xvsub_h): Ditto.
11195 (CODE_FOR_lasx_xvsub_w): Ditto.
11196 (CODE_FOR_lasx_xvsub_d): Ditto.
11197 (CODE_FOR_lasx_xvsubi_bu): Ditto.
11198 (CODE_FOR_lasx_xvsubi_hu): Ditto.
11199 (CODE_FOR_lasx_xvsubi_wu): Ditto.
11200 (CODE_FOR_lasx_xvsubi_du): Ditto.
11201 (CODE_FOR_lasx_xvpackod_d): Ditto.
11202 (CODE_FOR_lasx_xvpackev_d): Ditto.
11203 (CODE_FOR_lasx_xvpickod_d): Ditto.
11204 (CODE_FOR_lasx_xvpickev_d): Ditto.
11205 (CODE_FOR_lasx_xvrepli_b): Ditto.
11206 (CODE_FOR_lasx_xvrepli_h): Ditto.
11207 (CODE_FOR_lasx_xvrepli_w): Ditto.
11208 (CODE_FOR_lasx_xvrepli_d): Ditto.
11209 (CODE_FOR_lasx_xvandn_v): Ditto.
11210 (CODE_FOR_lasx_xvorn_v): Ditto.
11211 (CODE_FOR_lasx_xvneg_b): Ditto.
11212 (CODE_FOR_lasx_xvneg_h): Ditto.
11213 (CODE_FOR_lasx_xvneg_w): Ditto.
11214 (CODE_FOR_lasx_xvneg_d): Ditto.
11215 (CODE_FOR_lasx_xvbsrl_v): Ditto.
11216 (CODE_FOR_lasx_xvbsll_v): Ditto.
11217 (CODE_FOR_lasx_xvfmadd_s): Ditto.
11218 (CODE_FOR_lasx_xvfmadd_d): Ditto.
11219 (CODE_FOR_lasx_xvfmsub_s): Ditto.
11220 (CODE_FOR_lasx_xvfmsub_d): Ditto.
11221 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
11222 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
11223 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
11224 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
11225 (CODE_FOR_lasx_xvpermi_q): Ditto.
11226 (CODE_FOR_lasx_xvpermi_d): Ditto.
11227 (CODE_FOR_lasx_xbnz_v): Ditto.
11228 (CODE_FOR_lasx_xbz_v): Ditto.
11229 (CODE_FOR_lasx_xvssub_b): Ditto.
11230 (CODE_FOR_lasx_xvssub_h): Ditto.
11231 (CODE_FOR_lasx_xvssub_w): Ditto.
11232 (CODE_FOR_lasx_xvssub_d): Ditto.
11233 (CODE_FOR_lasx_xvssub_bu): Ditto.
11234 (CODE_FOR_lasx_xvssub_hu): Ditto.
11235 (CODE_FOR_lasx_xvssub_wu): Ditto.
11236 (CODE_FOR_lasx_xvssub_du): Ditto.
11237 (CODE_FOR_lasx_xvabsd_b): Ditto.
11238 (CODE_FOR_lasx_xvabsd_h): Ditto.
11239 (CODE_FOR_lasx_xvabsd_w): Ditto.
11240 (CODE_FOR_lasx_xvabsd_d): Ditto.
11241 (CODE_FOR_lasx_xvabsd_bu): Ditto.
11242 (CODE_FOR_lasx_xvabsd_hu): Ditto.
11243 (CODE_FOR_lasx_xvabsd_wu): Ditto.
11244 (CODE_FOR_lasx_xvabsd_du): Ditto.
11245 (CODE_FOR_lasx_xvavg_b): Ditto.
11246 (CODE_FOR_lasx_xvavg_h): Ditto.
11247 (CODE_FOR_lasx_xvavg_w): Ditto.
11248 (CODE_FOR_lasx_xvavg_d): Ditto.
11249 (CODE_FOR_lasx_xvavg_bu): Ditto.
11250 (CODE_FOR_lasx_xvavg_hu): Ditto.
11251 (CODE_FOR_lasx_xvavg_wu): Ditto.
11252 (CODE_FOR_lasx_xvavg_du): Ditto.
11253 (CODE_FOR_lasx_xvavgr_b): Ditto.
11254 (CODE_FOR_lasx_xvavgr_h): Ditto.
11255 (CODE_FOR_lasx_xvavgr_w): Ditto.
11256 (CODE_FOR_lasx_xvavgr_d): Ditto.
11257 (CODE_FOR_lasx_xvavgr_bu): Ditto.
11258 (CODE_FOR_lasx_xvavgr_hu): Ditto.
11259 (CODE_FOR_lasx_xvavgr_wu): Ditto.
11260 (CODE_FOR_lasx_xvavgr_du): Ditto.
11261 (CODE_FOR_lasx_xvmuh_b): Ditto.
11262 (CODE_FOR_lasx_xvmuh_h): Ditto.
11263 (CODE_FOR_lasx_xvmuh_w): Ditto.
11264 (CODE_FOR_lasx_xvmuh_d): Ditto.
11265 (CODE_FOR_lasx_xvmuh_bu): Ditto.
11266 (CODE_FOR_lasx_xvmuh_hu): Ditto.
11267 (CODE_FOR_lasx_xvmuh_wu): Ditto.
11268 (CODE_FOR_lasx_xvmuh_du): Ditto.
11269 (CODE_FOR_lasx_xvssran_b_h): Ditto.
11270 (CODE_FOR_lasx_xvssran_h_w): Ditto.
11271 (CODE_FOR_lasx_xvssran_w_d): Ditto.
11272 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
11273 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
11274 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
11275 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
11276 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
11277 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
11278 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
11279 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
11280 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
11281 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
11282 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
11283 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
11284 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
11285 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
11286 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
11287 (CODE_FOR_lasx_xvftint_w_s): Ditto.
11288 (CODE_FOR_lasx_xvftint_l_d): Ditto.
11289 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
11290 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
11291 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
11292 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
11293 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
11294 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
11295 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
11296 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
11297 (CODE_FOR_lasx_xvsat_b): Ditto.
11298 (CODE_FOR_lasx_xvsat_h): Ditto.
11299 (CODE_FOR_lasx_xvsat_w): Ditto.
11300 (CODE_FOR_lasx_xvsat_d): Ditto.
11301 (CODE_FOR_lasx_xvsat_bu): Ditto.
11302 (CODE_FOR_lasx_xvsat_hu): Ditto.
11303 (CODE_FOR_lasx_xvsat_wu): Ditto.
11304 (CODE_FOR_lasx_xvsat_du): Ditto.
11305 (loongarch_builtin_vectorized_function): Ditto.
11306 (loongarch_expand_builtin_insn): Ditto.
11307 (loongarch_expand_builtin): Ditto.
11308 * config/loongarch/loongarch-ftypes.def (1): Ditto.
11312 * config/loongarch/lasxintrin.h: New file.
11314 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
11316 * config/loongarch/loongarch-modes.def
11317 (VECTOR_MODES): Add Loongson ASX instruction support.
11318 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
11319 (loongarch_split_256bit_move_p): Ditto.
11320 (loongarch_expand_vector_group_init): Ditto.
11321 (loongarch_expand_vec_perm_1): Ditto.
11322 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
11323 (loongarch_valid_offset_p): Ditto.
11324 (loongarch_address_insns): Ditto.
11325 (loongarch_const_insns): Ditto.
11326 (loongarch_legitimize_move): Ditto.
11327 (loongarch_builtin_vectorization_cost): Ditto.
11328 (loongarch_split_move_p): Ditto.
11329 (loongarch_split_move): Ditto.
11330 (loongarch_output_move_index_float): Ditto.
11331 (loongarch_split_256bit_move_p): Ditto.
11332 (loongarch_split_256bit_move): Ditto.
11333 (loongarch_output_move): Ditto.
11334 (loongarch_print_operand_reloc): Ditto.
11335 (loongarch_print_operand): Ditto.
11336 (loongarch_hard_regno_mode_ok_uncached): Ditto.
11337 (loongarch_hard_regno_nregs): Ditto.
11338 (loongarch_class_max_nregs): Ditto.
11339 (loongarch_can_change_mode_class): Ditto.
11340 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
11341 (loongarch_vector_mode_supported_p): Ditto.
11342 (loongarch_preferred_simd_mode): Ditto.
11343 (loongarch_autovectorize_vector_modes): Ditto.
11344 (loongarch_lsx_output_division): Ditto.
11345 (loongarch_expand_lsx_shuffle): Ditto.
11346 (loongarch_expand_vec_perm): Ditto.
11347 (loongarch_expand_vec_perm_interleave): Ditto.
11348 (loongarch_try_expand_lsx_vshuf_const): Ditto.
11349 (loongarch_expand_vec_perm_even_odd_1): Ditto.
11350 (loongarch_expand_vec_perm_even_odd): Ditto.
11351 (loongarch_expand_vec_perm_1): Ditto.
11352 (loongarch_expand_vec_perm_const_2): Ditto.
11353 (loongarch_is_quad_duplicate): Ditto.
11354 (loongarch_is_double_duplicate): Ditto.
11355 (loongarch_is_odd_extraction): Ditto.
11356 (loongarch_is_even_extraction): Ditto.
11357 (loongarch_is_extraction_permutation): Ditto.
11358 (loongarch_is_center_extraction): Ditto.
11359 (loongarch_is_reversing_permutation): Ditto.
11360 (loongarch_is_di_misalign_extract): Ditto.
11361 (loongarch_is_si_misalign_extract): Ditto.
11362 (loongarch_is_lasx_lowpart_interleave): Ditto.
11363 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
11364 (COMPARE_SELECTOR): Ditto.
11365 (loongarch_is_lasx_lowpart_extract): Ditto.
11366 (loongarch_is_lasx_highpart_interleave): Ditto.
11367 (loongarch_is_lasx_highpart_interleave_2): Ditto.
11368 (loongarch_is_elem_duplicate): Ditto.
11369 (loongarch_is_op_reverse_perm): Ditto.
11370 (loongarch_is_single_op_perm): Ditto.
11371 (loongarch_is_divisible_perm): Ditto.
11372 (loongarch_is_triple_stride_extract): Ditto.
11373 (loongarch_vectorize_vec_perm_const): Ditto.
11374 (loongarch_cpu_sched_reassociation_width): Ditto.
11375 (loongarch_expand_vector_extract): Ditto.
11376 (emit_reduc_half): Ditto.
11377 (loongarch_expand_vec_unpack): Ditto.
11378 (loongarch_expand_vector_group_init): Ditto.
11379 (loongarch_expand_vector_init): Ditto.
11380 (loongarch_expand_lsx_cmp): Ditto.
11381 (loongarch_builtin_support_vector_misalignment): Ditto.
11382 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
11383 (BITS_PER_LASX_REG): Ditto.
11384 (STRUCTURE_SIZE_BOUNDARY): Ditto.
11385 (LASX_REG_FIRST): Ditto.
11386 (LASX_REG_LAST): Ditto.
11387 (LASX_REG_NUM): Ditto.
11388 (LASX_REG_P): Ditto.
11389 (LASX_REG_RTX_P): Ditto.
11390 (LASX_SUPPORTED_MODE_P): Ditto.
11391 * config/loongarch/loongarch.md: Ditto.
11392 * config/loongarch/lasx.md: New file.
11394 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
11396 * config.gcc: Export the header file lsxintrin.h.
11397 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
11398 (enum loongarch_builtin_type): Ditto.
11399 (AVAIL_ALL): Ditto.
11400 (LARCH_BUILTIN): Ditto.
11401 (LSX_BUILTIN): Ditto.
11402 (LSX_BUILTIN_TEST_BRANCH): Ditto.
11403 (LSX_NO_TARGET_BUILTIN): Ditto.
11404 (CODE_FOR_lsx_vsadd_b): Ditto.
11405 (CODE_FOR_lsx_vsadd_h): Ditto.
11406 (CODE_FOR_lsx_vsadd_w): Ditto.
11407 (CODE_FOR_lsx_vsadd_d): Ditto.
11408 (CODE_FOR_lsx_vsadd_bu): Ditto.
11409 (CODE_FOR_lsx_vsadd_hu): Ditto.
11410 (CODE_FOR_lsx_vsadd_wu): Ditto.
11411 (CODE_FOR_lsx_vsadd_du): Ditto.
11412 (CODE_FOR_lsx_vadd_b): Ditto.
11413 (CODE_FOR_lsx_vadd_h): Ditto.
11414 (CODE_FOR_lsx_vadd_w): Ditto.
11415 (CODE_FOR_lsx_vadd_d): Ditto.
11416 (CODE_FOR_lsx_vaddi_bu): Ditto.
11417 (CODE_FOR_lsx_vaddi_hu): Ditto.
11418 (CODE_FOR_lsx_vaddi_wu): Ditto.
11419 (CODE_FOR_lsx_vaddi_du): Ditto.
11420 (CODE_FOR_lsx_vand_v): Ditto.
11421 (CODE_FOR_lsx_vandi_b): Ditto.
11422 (CODE_FOR_lsx_bnz_v): Ditto.
11423 (CODE_FOR_lsx_bz_v): Ditto.
11424 (CODE_FOR_lsx_vbitsel_v): Ditto.
11425 (CODE_FOR_lsx_vseqi_b): Ditto.
11426 (CODE_FOR_lsx_vseqi_h): Ditto.
11427 (CODE_FOR_lsx_vseqi_w): Ditto.
11428 (CODE_FOR_lsx_vseqi_d): Ditto.
11429 (CODE_FOR_lsx_vslti_b): Ditto.
11430 (CODE_FOR_lsx_vslti_h): Ditto.
11431 (CODE_FOR_lsx_vslti_w): Ditto.
11432 (CODE_FOR_lsx_vslti_d): Ditto.
11433 (CODE_FOR_lsx_vslti_bu): Ditto.
11434 (CODE_FOR_lsx_vslti_hu): Ditto.
11435 (CODE_FOR_lsx_vslti_wu): Ditto.
11436 (CODE_FOR_lsx_vslti_du): Ditto.
11437 (CODE_FOR_lsx_vslei_b): Ditto.
11438 (CODE_FOR_lsx_vslei_h): Ditto.
11439 (CODE_FOR_lsx_vslei_w): Ditto.
11440 (CODE_FOR_lsx_vslei_d): Ditto.
11441 (CODE_FOR_lsx_vslei_bu): Ditto.
11442 (CODE_FOR_lsx_vslei_hu): Ditto.
11443 (CODE_FOR_lsx_vslei_wu): Ditto.
11444 (CODE_FOR_lsx_vslei_du): Ditto.
11445 (CODE_FOR_lsx_vdiv_b): Ditto.
11446 (CODE_FOR_lsx_vdiv_h): Ditto.
11447 (CODE_FOR_lsx_vdiv_w): Ditto.
11448 (CODE_FOR_lsx_vdiv_d): Ditto.
11449 (CODE_FOR_lsx_vdiv_bu): Ditto.
11450 (CODE_FOR_lsx_vdiv_hu): Ditto.
11451 (CODE_FOR_lsx_vdiv_wu): Ditto.
11452 (CODE_FOR_lsx_vdiv_du): Ditto.
11453 (CODE_FOR_lsx_vfadd_s): Ditto.
11454 (CODE_FOR_lsx_vfadd_d): Ditto.
11455 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
11456 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
11457 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
11458 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
11459 (CODE_FOR_lsx_vffint_s_w): Ditto.
11460 (CODE_FOR_lsx_vffint_d_l): Ditto.
11461 (CODE_FOR_lsx_vffint_s_wu): Ditto.
11462 (CODE_FOR_lsx_vffint_d_lu): Ditto.
11463 (CODE_FOR_lsx_vfsub_s): Ditto.
11464 (CODE_FOR_lsx_vfsub_d): Ditto.
11465 (CODE_FOR_lsx_vfmul_s): Ditto.
11466 (CODE_FOR_lsx_vfmul_d): Ditto.
11467 (CODE_FOR_lsx_vfdiv_s): Ditto.
11468 (CODE_FOR_lsx_vfdiv_d): Ditto.
11469 (CODE_FOR_lsx_vfmax_s): Ditto.
11470 (CODE_FOR_lsx_vfmax_d): Ditto.
11471 (CODE_FOR_lsx_vfmin_s): Ditto.
11472 (CODE_FOR_lsx_vfmin_d): Ditto.
11473 (CODE_FOR_lsx_vfsqrt_s): Ditto.
11474 (CODE_FOR_lsx_vfsqrt_d): Ditto.
11475 (CODE_FOR_lsx_vflogb_s): Ditto.
11476 (CODE_FOR_lsx_vflogb_d): Ditto.
11477 (CODE_FOR_lsx_vmax_b): Ditto.
11478 (CODE_FOR_lsx_vmax_h): Ditto.
11479 (CODE_FOR_lsx_vmax_w): Ditto.
11480 (CODE_FOR_lsx_vmax_d): Ditto.
11481 (CODE_FOR_lsx_vmaxi_b): Ditto.
11482 (CODE_FOR_lsx_vmaxi_h): Ditto.
11483 (CODE_FOR_lsx_vmaxi_w): Ditto.
11484 (CODE_FOR_lsx_vmaxi_d): Ditto.
11485 (CODE_FOR_lsx_vmax_bu): Ditto.
11486 (CODE_FOR_lsx_vmax_hu): Ditto.
11487 (CODE_FOR_lsx_vmax_wu): Ditto.
11488 (CODE_FOR_lsx_vmax_du): Ditto.
11489 (CODE_FOR_lsx_vmaxi_bu): Ditto.
11490 (CODE_FOR_lsx_vmaxi_hu): Ditto.
11491 (CODE_FOR_lsx_vmaxi_wu): Ditto.
11492 (CODE_FOR_lsx_vmaxi_du): Ditto.
11493 (CODE_FOR_lsx_vmin_b): Ditto.
11494 (CODE_FOR_lsx_vmin_h): Ditto.
11495 (CODE_FOR_lsx_vmin_w): Ditto.
11496 (CODE_FOR_lsx_vmin_d): Ditto.
11497 (CODE_FOR_lsx_vmini_b): Ditto.
11498 (CODE_FOR_lsx_vmini_h): Ditto.
11499 (CODE_FOR_lsx_vmini_w): Ditto.
11500 (CODE_FOR_lsx_vmini_d): Ditto.
11501 (CODE_FOR_lsx_vmin_bu): Ditto.
11502 (CODE_FOR_lsx_vmin_hu): Ditto.
11503 (CODE_FOR_lsx_vmin_wu): Ditto.
11504 (CODE_FOR_lsx_vmin_du): Ditto.
11505 (CODE_FOR_lsx_vmini_bu): Ditto.
11506 (CODE_FOR_lsx_vmini_hu): Ditto.
11507 (CODE_FOR_lsx_vmini_wu): Ditto.
11508 (CODE_FOR_lsx_vmini_du): Ditto.
11509 (CODE_FOR_lsx_vmod_b): Ditto.
11510 (CODE_FOR_lsx_vmod_h): Ditto.
11511 (CODE_FOR_lsx_vmod_w): Ditto.
11512 (CODE_FOR_lsx_vmod_d): Ditto.
11513 (CODE_FOR_lsx_vmod_bu): Ditto.
11514 (CODE_FOR_lsx_vmod_hu): Ditto.
11515 (CODE_FOR_lsx_vmod_wu): Ditto.
11516 (CODE_FOR_lsx_vmod_du): Ditto.
11517 (CODE_FOR_lsx_vmul_b): Ditto.
11518 (CODE_FOR_lsx_vmul_h): Ditto.
11519 (CODE_FOR_lsx_vmul_w): Ditto.
11520 (CODE_FOR_lsx_vmul_d): Ditto.
11521 (CODE_FOR_lsx_vclz_b): Ditto.
11522 (CODE_FOR_lsx_vclz_h): Ditto.
11523 (CODE_FOR_lsx_vclz_w): Ditto.
11524 (CODE_FOR_lsx_vclz_d): Ditto.
11525 (CODE_FOR_lsx_vnor_v): Ditto.
11526 (CODE_FOR_lsx_vor_v): Ditto.
11527 (CODE_FOR_lsx_vori_b): Ditto.
11528 (CODE_FOR_lsx_vnori_b): Ditto.
11529 (CODE_FOR_lsx_vpcnt_b): Ditto.
11530 (CODE_FOR_lsx_vpcnt_h): Ditto.
11531 (CODE_FOR_lsx_vpcnt_w): Ditto.
11532 (CODE_FOR_lsx_vpcnt_d): Ditto.
11533 (CODE_FOR_lsx_vxor_v): Ditto.
11534 (CODE_FOR_lsx_vxori_b): Ditto.
11535 (CODE_FOR_lsx_vsll_b): Ditto.
11536 (CODE_FOR_lsx_vsll_h): Ditto.
11537 (CODE_FOR_lsx_vsll_w): Ditto.
11538 (CODE_FOR_lsx_vsll_d): Ditto.
11539 (CODE_FOR_lsx_vslli_b): Ditto.
11540 (CODE_FOR_lsx_vslli_h): Ditto.
11541 (CODE_FOR_lsx_vslli_w): Ditto.
11542 (CODE_FOR_lsx_vslli_d): Ditto.
11543 (CODE_FOR_lsx_vsra_b): Ditto.
11544 (CODE_FOR_lsx_vsra_h): Ditto.
11545 (CODE_FOR_lsx_vsra_w): Ditto.
11546 (CODE_FOR_lsx_vsra_d): Ditto.
11547 (CODE_FOR_lsx_vsrai_b): Ditto.
11548 (CODE_FOR_lsx_vsrai_h): Ditto.
11549 (CODE_FOR_lsx_vsrai_w): Ditto.
11550 (CODE_FOR_lsx_vsrai_d): Ditto.
11551 (CODE_FOR_lsx_vsrl_b): Ditto.
11552 (CODE_FOR_lsx_vsrl_h): Ditto.
11553 (CODE_FOR_lsx_vsrl_w): Ditto.
11554 (CODE_FOR_lsx_vsrl_d): Ditto.
11555 (CODE_FOR_lsx_vsrli_b): Ditto.
11556 (CODE_FOR_lsx_vsrli_h): Ditto.
11557 (CODE_FOR_lsx_vsrli_w): Ditto.
11558 (CODE_FOR_lsx_vsrli_d): Ditto.
11559 (CODE_FOR_lsx_vsub_b): Ditto.
11560 (CODE_FOR_lsx_vsub_h): Ditto.
11561 (CODE_FOR_lsx_vsub_w): Ditto.
11562 (CODE_FOR_lsx_vsub_d): Ditto.
11563 (CODE_FOR_lsx_vsubi_bu): Ditto.
11564 (CODE_FOR_lsx_vsubi_hu): Ditto.
11565 (CODE_FOR_lsx_vsubi_wu): Ditto.
11566 (CODE_FOR_lsx_vsubi_du): Ditto.
11567 (CODE_FOR_lsx_vpackod_d): Ditto.
11568 (CODE_FOR_lsx_vpackev_d): Ditto.
11569 (CODE_FOR_lsx_vpickod_d): Ditto.
11570 (CODE_FOR_lsx_vpickev_d): Ditto.
11571 (CODE_FOR_lsx_vrepli_b): Ditto.
11572 (CODE_FOR_lsx_vrepli_h): Ditto.
11573 (CODE_FOR_lsx_vrepli_w): Ditto.
11574 (CODE_FOR_lsx_vrepli_d): Ditto.
11575 (CODE_FOR_lsx_vsat_b): Ditto.
11576 (CODE_FOR_lsx_vsat_h): Ditto.
11577 (CODE_FOR_lsx_vsat_w): Ditto.
11578 (CODE_FOR_lsx_vsat_d): Ditto.
11579 (CODE_FOR_lsx_vsat_bu): Ditto.
11580 (CODE_FOR_lsx_vsat_hu): Ditto.
11581 (CODE_FOR_lsx_vsat_wu): Ditto.
11582 (CODE_FOR_lsx_vsat_du): Ditto.
11583 (CODE_FOR_lsx_vavg_b): Ditto.
11584 (CODE_FOR_lsx_vavg_h): Ditto.
11585 (CODE_FOR_lsx_vavg_w): Ditto.
11586 (CODE_FOR_lsx_vavg_d): Ditto.
11587 (CODE_FOR_lsx_vavg_bu): Ditto.
11588 (CODE_FOR_lsx_vavg_hu): Ditto.
11589 (CODE_FOR_lsx_vavg_wu): Ditto.
11590 (CODE_FOR_lsx_vavg_du): Ditto.
11591 (CODE_FOR_lsx_vavgr_b): Ditto.
11592 (CODE_FOR_lsx_vavgr_h): Ditto.
11593 (CODE_FOR_lsx_vavgr_w): Ditto.
11594 (CODE_FOR_lsx_vavgr_d): Ditto.
11595 (CODE_FOR_lsx_vavgr_bu): Ditto.
11596 (CODE_FOR_lsx_vavgr_hu): Ditto.
11597 (CODE_FOR_lsx_vavgr_wu): Ditto.
11598 (CODE_FOR_lsx_vavgr_du): Ditto.
11599 (CODE_FOR_lsx_vssub_b): Ditto.
11600 (CODE_FOR_lsx_vssub_h): Ditto.
11601 (CODE_FOR_lsx_vssub_w): Ditto.
11602 (CODE_FOR_lsx_vssub_d): Ditto.
11603 (CODE_FOR_lsx_vssub_bu): Ditto.
11604 (CODE_FOR_lsx_vssub_hu): Ditto.
11605 (CODE_FOR_lsx_vssub_wu): Ditto.
11606 (CODE_FOR_lsx_vssub_du): Ditto.
11607 (CODE_FOR_lsx_vabsd_b): Ditto.
11608 (CODE_FOR_lsx_vabsd_h): Ditto.
11609 (CODE_FOR_lsx_vabsd_w): Ditto.
11610 (CODE_FOR_lsx_vabsd_d): Ditto.
11611 (CODE_FOR_lsx_vabsd_bu): Ditto.
11612 (CODE_FOR_lsx_vabsd_hu): Ditto.
11613 (CODE_FOR_lsx_vabsd_wu): Ditto.
11614 (CODE_FOR_lsx_vabsd_du): Ditto.
11615 (CODE_FOR_lsx_vftint_w_s): Ditto.
11616 (CODE_FOR_lsx_vftint_l_d): Ditto.
11617 (CODE_FOR_lsx_vftint_wu_s): Ditto.
11618 (CODE_FOR_lsx_vftint_lu_d): Ditto.
11619 (CODE_FOR_lsx_vandn_v): Ditto.
11620 (CODE_FOR_lsx_vorn_v): Ditto.
11621 (CODE_FOR_lsx_vneg_b): Ditto.
11622 (CODE_FOR_lsx_vneg_h): Ditto.
11623 (CODE_FOR_lsx_vneg_w): Ditto.
11624 (CODE_FOR_lsx_vneg_d): Ditto.
11625 (CODE_FOR_lsx_vshuf4i_d): Ditto.
11626 (CODE_FOR_lsx_vbsrl_v): Ditto.
11627 (CODE_FOR_lsx_vbsll_v): Ditto.
11628 (CODE_FOR_lsx_vfmadd_s): Ditto.
11629 (CODE_FOR_lsx_vfmadd_d): Ditto.
11630 (CODE_FOR_lsx_vfmsub_s): Ditto.
11631 (CODE_FOR_lsx_vfmsub_d): Ditto.
11632 (CODE_FOR_lsx_vfnmadd_s): Ditto.
11633 (CODE_FOR_lsx_vfnmadd_d): Ditto.
11634 (CODE_FOR_lsx_vfnmsub_s): Ditto.
11635 (CODE_FOR_lsx_vfnmsub_d): Ditto.
11636 (CODE_FOR_lsx_vmuh_b): Ditto.
11637 (CODE_FOR_lsx_vmuh_h): Ditto.
11638 (CODE_FOR_lsx_vmuh_w): Ditto.
11639 (CODE_FOR_lsx_vmuh_d): Ditto.
11640 (CODE_FOR_lsx_vmuh_bu): Ditto.
11641 (CODE_FOR_lsx_vmuh_hu): Ditto.
11642 (CODE_FOR_lsx_vmuh_wu): Ditto.
11643 (CODE_FOR_lsx_vmuh_du): Ditto.
11644 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
11645 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
11646 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
11647 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
11648 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
11649 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
11650 (CODE_FOR_lsx_vssran_b_h): Ditto.
11651 (CODE_FOR_lsx_vssran_h_w): Ditto.
11652 (CODE_FOR_lsx_vssran_w_d): Ditto.
11653 (CODE_FOR_lsx_vssran_bu_h): Ditto.
11654 (CODE_FOR_lsx_vssran_hu_w): Ditto.
11655 (CODE_FOR_lsx_vssran_wu_d): Ditto.
11656 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
11657 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
11658 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
11659 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
11660 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
11661 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
11662 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
11663 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
11664 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
11665 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
11666 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
11667 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
11668 (loongarch_builtin_vector_type): Ditto.
11669 (loongarch_build_cvpointer_type): Ditto.
11670 (LARCH_ATYPE_CVPOINTER): Ditto.
11671 (LARCH_ATYPE_BOOLEAN): Ditto.
11672 (LARCH_ATYPE_V2SF): Ditto.
11673 (LARCH_ATYPE_V2HI): Ditto.
11674 (LARCH_ATYPE_V2SI): Ditto.
11675 (LARCH_ATYPE_V4QI): Ditto.
11676 (LARCH_ATYPE_V4HI): Ditto.
11677 (LARCH_ATYPE_V8QI): Ditto.
11678 (LARCH_ATYPE_V2DI): Ditto.
11679 (LARCH_ATYPE_V4SI): Ditto.
11680 (LARCH_ATYPE_V8HI): Ditto.
11681 (LARCH_ATYPE_V16QI): Ditto.
11682 (LARCH_ATYPE_V2DF): Ditto.
11683 (LARCH_ATYPE_V4SF): Ditto.
11684 (LARCH_ATYPE_V4DI): Ditto.
11685 (LARCH_ATYPE_V8SI): Ditto.
11686 (LARCH_ATYPE_V16HI): Ditto.
11687 (LARCH_ATYPE_V32QI): Ditto.
11688 (LARCH_ATYPE_V4DF): Ditto.
11689 (LARCH_ATYPE_V8SF): Ditto.
11690 (LARCH_ATYPE_UV2DI): Ditto.
11691 (LARCH_ATYPE_UV4SI): Ditto.
11692 (LARCH_ATYPE_UV8HI): Ditto.
11693 (LARCH_ATYPE_UV16QI): Ditto.
11694 (LARCH_ATYPE_UV4DI): Ditto.
11695 (LARCH_ATYPE_UV8SI): Ditto.
11696 (LARCH_ATYPE_UV16HI): Ditto.
11697 (LARCH_ATYPE_UV32QI): Ditto.
11698 (LARCH_ATYPE_UV2SI): Ditto.
11699 (LARCH_ATYPE_UV4HI): Ditto.
11700 (LARCH_ATYPE_UV8QI): Ditto.
11701 (loongarch_builtin_vectorized_function): Ditto.
11702 (LARCH_GET_BUILTIN): Ditto.
11703 (loongarch_expand_builtin_insn): Ditto.
11704 (loongarch_expand_builtin_lsx_test_branch): Ditto.
11705 (loongarch_expand_builtin): Ditto.
11706 * config/loongarch/loongarch-ftypes.def (1): Ditto.
11710 * config/loongarch/lsxintrin.h: New file.
11712 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
11714 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
11734 * config/loongarch/genopts/loongarch.opt.in: Ditto.
11735 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
11736 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
11737 (VECTOR_MODE): Ditto.
11739 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
11740 (loongarch_split_move_insn): Ditto.
11741 (loongarch_split_128bit_move): Ditto.
11742 (loongarch_split_128bit_move_p): Ditto.
11743 (loongarch_split_lsx_copy_d): Ditto.
11744 (loongarch_split_lsx_insert_d): Ditto.
11745 (loongarch_split_lsx_fill_d): Ditto.
11746 (loongarch_expand_vec_cmp): Ditto.
11747 (loongarch_const_vector_same_val_p): Ditto.
11748 (loongarch_const_vector_same_bytes_p): Ditto.
11749 (loongarch_const_vector_same_int_p): Ditto.
11750 (loongarch_const_vector_shuffle_set_p): Ditto.
11751 (loongarch_const_vector_bitimm_set_p): Ditto.
11752 (loongarch_const_vector_bitimm_clr_p): Ditto.
11753 (loongarch_lsx_vec_parallel_const_half): Ditto.
11754 (loongarch_gen_const_int_vector): Ditto.
11755 (loongarch_lsx_output_division): Ditto.
11756 (loongarch_expand_vector_init): Ditto.
11757 (loongarch_expand_vec_unpack): Ditto.
11758 (loongarch_expand_vec_perm): Ditto.
11759 (loongarch_expand_vector_extract): Ditto.
11760 (loongarch_expand_vector_reduc): Ditto.
11761 (loongarch_ldst_scaled_shift): Ditto.
11762 (loongarch_expand_vec_cond_expr): Ditto.
11763 (loongarch_expand_vec_cond_mask_expr): Ditto.
11764 (loongarch_builtin_vectorized_function): Ditto.
11765 (loongarch_gen_const_int_vector_shuffle): Ditto.
11766 (loongarch_build_signbit_mask): Ditto.
11767 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
11768 (loongarch_setup_incoming_varargs): Ditto.
11769 (loongarch_emit_move): Ditto.
11770 (loongarch_const_vector_bitimm_set_p): Ditto.
11771 (loongarch_const_vector_bitimm_clr_p): Ditto.
11772 (loongarch_const_vector_same_val_p): Ditto.
11773 (loongarch_const_vector_same_bytes_p): Ditto.
11774 (loongarch_const_vector_same_int_p): Ditto.
11775 (loongarch_const_vector_shuffle_set_p): Ditto.
11776 (loongarch_symbol_insns): Ditto.
11777 (loongarch_cannot_force_const_mem): Ditto.
11778 (loongarch_valid_offset_p): Ditto.
11779 (loongarch_valid_index_p): Ditto.
11780 (loongarch_classify_address): Ditto.
11781 (loongarch_address_insns): Ditto.
11782 (loongarch_ldst_scaled_shift): Ditto.
11783 (loongarch_const_insns): Ditto.
11784 (loongarch_split_move_insn_p): Ditto.
11785 (loongarch_subword_at_byte): Ditto.
11786 (loongarch_legitimize_move): Ditto.
11787 (loongarch_builtin_vectorization_cost): Ditto.
11788 (loongarch_split_move_p): Ditto.
11789 (loongarch_split_move): Ditto.
11790 (loongarch_split_move_insn): Ditto.
11791 (loongarch_output_move_index_float): Ditto.
11792 (loongarch_split_128bit_move_p): Ditto.
11793 (loongarch_split_128bit_move): Ditto.
11794 (loongarch_split_lsx_copy_d): Ditto.
11795 (loongarch_split_lsx_insert_d): Ditto.
11796 (loongarch_split_lsx_fill_d): Ditto.
11797 (loongarch_output_move): Ditto.
11798 (loongarch_extend_comparands): Ditto.
11799 (loongarch_print_operand_reloc): Ditto.
11800 (loongarch_print_operand): Ditto.
11801 (loongarch_hard_regno_mode_ok_uncached): Ditto.
11802 (loongarch_hard_regno_call_part_clobbered): Ditto.
11803 (loongarch_hard_regno_nregs): Ditto.
11804 (loongarch_class_max_nregs): Ditto.
11805 (loongarch_can_change_mode_class): Ditto.
11806 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
11807 (loongarch_secondary_reload): Ditto.
11808 (loongarch_vector_mode_supported_p): Ditto.
11809 (loongarch_preferred_simd_mode): Ditto.
11810 (loongarch_autovectorize_vector_modes): Ditto.
11811 (loongarch_lsx_output_division): Ditto.
11812 (loongarch_option_override_internal): Ditto.
11813 (loongarch_hard_regno_caller_save_mode): Ditto.
11814 (MAX_VECT_LEN): Ditto.
11815 (loongarch_spill_class): Ditto.
11816 (struct expand_vec_perm_d): Ditto.
11817 (loongarch_promote_function_mode): Ditto.
11818 (loongarch_expand_vselect): Ditto.
11819 (loongarch_starting_frame_offset): Ditto.
11820 (loongarch_expand_vselect_vconcat): Ditto.
11821 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
11822 (TARGET_OPTION_OVERRIDE): Ditto.
11823 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
11824 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
11825 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
11826 (loongarch_expand_lsx_shuffle): Ditto.
11827 (TARGET_SCHED_INIT): Ditto.
11828 (TARGET_SCHED_REORDER): Ditto.
11829 (TARGET_SCHED_REORDER2): Ditto.
11830 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
11831 (TARGET_SCHED_ADJUST_COST): Ditto.
11832 (TARGET_SCHED_ISSUE_RATE): Ditto.
11833 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
11834 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
11835 (TARGET_VALID_POINTER_MODE): Ditto.
11836 (TARGET_REGISTER_MOVE_COST): Ditto.
11837 (TARGET_MEMORY_MOVE_COST): Ditto.
11838 (TARGET_RTX_COSTS): Ditto.
11839 (TARGET_ADDRESS_COST): Ditto.
11840 (TARGET_IN_SMALL_DATA_P): Ditto.
11841 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
11842 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
11843 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
11844 (loongarch_expand_vec_perm): Ditto.
11845 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
11846 (TARGET_RETURN_IN_MEMORY): Ditto.
11847 (TARGET_FUNCTION_VALUE): Ditto.
11848 (TARGET_LIBCALL_VALUE): Ditto.
11849 (loongarch_try_expand_lsx_vshuf_const): Ditto.
11850 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
11851 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
11852 (TARGET_PRINT_OPERAND): Ditto.
11853 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
11854 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
11855 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
11856 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
11857 (TARGET_MUST_PASS_IN_STACK): Ditto.
11858 (TARGET_PASS_BY_REFERENCE): Ditto.
11859 (TARGET_ARG_PARTIAL_BYTES): Ditto.
11860 (TARGET_FUNCTION_ARG): Ditto.
11861 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
11862 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
11863 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
11864 (TARGET_INIT_BUILTINS): Ditto.
11865 (loongarch_expand_vec_perm_const_1): Ditto.
11866 (loongarch_expand_vec_perm_const_2): Ditto.
11867 (loongarch_vectorize_vec_perm_const): Ditto.
11868 (loongarch_cpu_sched_reassociation_width): Ditto.
11869 (loongarch_sched_reassociation_width): Ditto.
11870 (loongarch_expand_vector_extract): Ditto.
11871 (emit_reduc_half): Ditto.
11872 (loongarch_expand_vector_reduc): Ditto.
11873 (loongarch_expand_vec_unpack): Ditto.
11874 (loongarch_lsx_vec_parallel_const_half): Ditto.
11875 (loongarch_constant_elt_p): Ditto.
11876 (loongarch_gen_const_int_vector_shuffle): Ditto.
11877 (loongarch_expand_vector_init): Ditto.
11878 (loongarch_expand_lsx_cmp): Ditto.
11879 (loongarch_expand_vec_cond_expr): Ditto.
11880 (loongarch_expand_vec_cond_mask_expr): Ditto.
11881 (loongarch_expand_vec_cmp): Ditto.
11882 (loongarch_case_values_threshold): Ditto.
11883 (loongarch_build_const_vector): Ditto.
11884 (loongarch_build_signbit_mask): Ditto.
11885 (loongarch_builtin_support_vector_misalignment): Ditto.
11886 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
11887 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
11888 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
11889 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
11890 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
11891 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
11892 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
11893 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
11894 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
11895 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
11896 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
11897 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
11898 (UNITS_PER_LSX_REG): Ditto.
11899 (BITS_PER_LSX_REG): Ditto.
11900 (BIGGEST_ALIGNMENT): Ditto.
11901 (LSX_REG_FIRST): Ditto.
11902 (LSX_REG_LAST): Ditto.
11903 (LSX_REG_NUM): Ditto.
11904 (LSX_REG_P): Ditto.
11905 (LSX_REG_RTX_P): Ditto.
11906 (IMM13_OPERAND): Ditto.
11907 (LSX_SUPPORTED_MODE_P): Ditto.
11908 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
11909 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
11910 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
11917 * config/loongarch/loongarch.opt: Ditto.
11918 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
11919 (const_uimm3_operand): Ditto.
11920 (const_8_to_11_operand): Ditto.
11921 (const_12_to_15_operand): Ditto.
11922 (const_uimm4_operand): Ditto.
11923 (const_uimm6_operand): Ditto.
11924 (const_uimm7_operand): Ditto.
11925 (const_uimm8_operand): Ditto.
11926 (const_imm5_operand): Ditto.
11927 (const_imm10_operand): Ditto.
11928 (const_imm13_operand): Ditto.
11929 (reg_imm10_operand): Ditto.
11930 (aq8b_operand): Ditto.
11931 (aq8h_operand): Ditto.
11932 (aq8w_operand): Ditto.
11933 (aq8d_operand): Ditto.
11934 (aq10b_operand): Ditto.
11935 (aq10h_operand): Ditto.
11936 (aq10w_operand): Ditto.
11937 (aq10d_operand): Ditto.
11938 (aq12b_operand): Ditto.
11939 (aq12h_operand): Ditto.
11940 (aq12w_operand): Ditto.
11941 (aq12d_operand): Ditto.
11942 (const_m1_operand): Ditto.
11943 (reg_or_m1_operand): Ditto.
11944 (const_exp_2_operand): Ditto.
11945 (const_exp_4_operand): Ditto.
11946 (const_exp_8_operand): Ditto.
11947 (const_exp_16_operand): Ditto.
11948 (const_exp_32_operand): Ditto.
11949 (const_0_or_1_operand): Ditto.
11950 (const_0_to_3_operand): Ditto.
11951 (const_0_to_7_operand): Ditto.
11952 (const_2_or_3_operand): Ditto.
11953 (const_4_to_7_operand): Ditto.
11954 (const_8_to_15_operand): Ditto.
11955 (const_16_to_31_operand): Ditto.
11956 (qi_mask_operand): Ditto.
11957 (hi_mask_operand): Ditto.
11958 (si_mask_operand): Ditto.
11959 (d_operand): Ditto.
11960 (db4_operand): Ditto.
11961 (db7_operand): Ditto.
11962 (db8_operand): Ditto.
11963 (ib3_operand): Ditto.
11964 (sb4_operand): Ditto.
11965 (sb5_operand): Ditto.
11966 (sb8_operand): Ditto.
11967 (sd8_operand): Ditto.
11968 (ub4_operand): Ditto.
11969 (ub8_operand): Ditto.
11970 (uh4_operand): Ditto.
11971 (uw4_operand): Ditto.
11972 (uw5_operand): Ditto.
11973 (uw6_operand): Ditto.
11974 (uw8_operand): Ditto.
11975 (addiur2_operand): Ditto.
11976 (addiusp_operand): Ditto.
11977 (andi16_operand): Ditto.
11978 (movep_src_register): Ditto.
11979 (movep_src_operand): Ditto.
11980 (fcc_reload_operand): Ditto.
11981 (muldiv_target_operand): Ditto.
11982 (const_vector_same_val_operand): Ditto.
11983 (const_vector_same_simm5_operand): Ditto.
11984 (const_vector_same_uimm5_operand): Ditto.
11985 (const_vector_same_ximm5_operand): Ditto.
11986 (const_vector_same_uimm6_operand): Ditto.
11987 (par_const_vector_shf_set_operand): Ditto.
11988 (reg_or_vector_same_val_operand): Ditto.
11989 (reg_or_vector_same_simm5_operand): Ditto.
11990 (reg_or_vector_same_uimm5_operand): Ditto.
11991 (reg_or_vector_same_ximm5_operand): Ditto.
11992 (reg_or_vector_same_uimm6_operand): Ditto.
11993 * doc/md.texi: Ditto.
11994 * config/loongarch/lsx.md: New file.
11996 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11998 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
11999 (get_all_predecessors): New function.
12000 (get_all_successors): Ditto.
12001 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
12002 (get_all_successors): Ditto.
12003 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
12004 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
12006 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
12008 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
12009 (split_addsi): Likewise.
12010 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
12011 'N', 'x', and 'J' code letters.
12012 (arc_output_addsi): Make it static.
12013 (split_addsi): Remove it.
12014 * config/arc/arc.h (UNSIGNED_INT*): New defines.
12015 (SINNED_INT*): Likewise.
12016 * config/arc/arc.md (type): Add add, sub, bxor types.
12017 (tst_movb): Change code letter from 's' to 'x'.
12018 (andsi3_i): Likewise.
12019 (addsi3_mixed): Refurbish the pattern.
12020 (call_i): Change code letter from 'S' to 'J'.
12021 * config/arc/arc700.md: Add newly introduced types.
12022 * config/arc/arcHS.md: Likewsie.
12023 * config/arc/arcHS4x.md: Likewise.
12024 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
12025 (CM4): Update description.
12026 (CP4, C6u, C6n, CIs, C4p): New constraint.
12028 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
12030 * common/config/arc/arc-common.cc (arc_option_optimization_table):
12031 Remove mbbit_peephole.
12032 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
12033 (store_direct): Likewise.
12034 (BBIT peephole2): Likewise.
12035 * config/arc/arc.opt (mbbit-peephole): Ignore option.
12036 * doc/invoke.texi (mbbit-peephole): Update document.
12038 2023-09-05 Jakub Jelinek <jakub@redhat.com>
12040 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
12041 avreage -> average.
12043 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
12045 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
12046 options passed from driver to gnat1 as explicit for multilib.
12048 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
12050 * config.gcc: add loongarch*-elf target.
12051 * config/loongarch/elf.h: New file.
12052 Link against newlib by default.
12054 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
12056 * config.gcc: use -mstrict-align for building libraries
12057 if --with-strict-align-lib is given.
12058 * doc/install.texi: likewise.
12060 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
12062 * config/loongarch/loongarch-c.cc: Export macros
12063 "__loongarch_{arch,tune}" in the preprocessor.
12065 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
12067 * config.gcc: Make --with-abi= obsolete, decide the default ABI
12068 with target triplet. Allow specifying multilib library build
12069 options with --with-multilib-list and --with-multilib-default.
12070 * config/loongarch/t-linux: Likewise.
12071 * config/loongarch/genopts/loongarch-strings: Likewise.
12072 * config/loongarch/loongarch-str.h: Likewise.
12073 * doc/install.texi: Likewise.
12074 * config/loongarch/genopts/loongarch.opt.in: Introduce
12075 -m[no-]l[a]sx options. Only process -m*-float and
12076 -m[no-]l[a]sx in the GCC driver.
12077 * config/loongarch/loongarch.opt: Likewise.
12078 * config/loongarch/la464.md: Likewise.
12079 * config/loongarch/loongarch-c.cc: Likewise.
12080 * config/loongarch/loongarch-cpu.cc: Likewise.
12081 * config/loongarch/loongarch-cpu.h: Likewise.
12082 * config/loongarch/loongarch-def.c: Likewise.
12083 * config/loongarch/loongarch-def.h: Likewise.
12084 * config/loongarch/loongarch-driver.cc: Likewise.
12085 * config/loongarch/loongarch-driver.h: Likewise.
12086 * config/loongarch/loongarch-opts.cc: Likewise.
12087 * config/loongarch/loongarch-opts.h: Likewise.
12088 * config/loongarch/loongarch.cc: Likewise.
12089 * doc/invoke.texi: Likewise.
12091 2023-09-05 liuhongt <hongtao.liu@intel.com>
12093 * config/i386/sse.md: (V8BFH_128): Renamed to ..
12094 (VHFBF_128): .. this.
12095 (V16BFH_256): Renamed to ..
12096 (VHFBF_256): .. this.
12097 (avx512f_mov<mode>): Extend to V_128.
12098 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
12099 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
12100 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
12101 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
12102 * config/i386/i386-expand.cc (expand_vec_perm_blend):
12103 Canonicalize vec_merge.
12105 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12107 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
12108 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
12109 (autovectorize_vector_modes): Ditto.
12110 (vectorize_related_mode): Ditto.
12112 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
12114 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
12115 all 32b Darwin PowerPC cases.
12117 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
12119 * config/darwin-sections.def (static_init_section): Add the
12120 __TEXT,__StaticInit section.
12121 * config/darwin.cc (darwin_function_section): Use the static init
12122 section for global initializers, to match other platform toolchains.
12124 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
12126 * config/darwin-sections.def (darwin_exception_section): Move to
12127 the __TEXT segment.
12128 * config/darwin.cc (darwin_emit_except_table_label): Align before
12129 the exception table label.
12130 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
12131 relative 4byte relocs.
12133 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
12135 * config/darwin.cc (dump_machopic_symref_flags): New.
12136 (debug_machopic_symref_flags): New.
12138 2023-09-04 Pan Li <pan2.li@intel.com>
12140 * config/riscv/riscv-vector-builtins-types.def
12141 (vfloat16mf4_t): Add FP16 intrinsic def.
12142 (vfloat16mf2_t): Ditto.
12143 (vfloat16m1_t): Ditto.
12144 (vfloat16m2_t): Ditto.
12145 (vfloat16m4_t): Ditto.
12146 (vfloat16m8_t): Ditto.
12148 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
12150 PR tree-optimization/108757
12151 * match.pd ((X - N * M) / N): New pattern.
12152 ((X + N * M) / N): New pattern.
12153 ((X + C) div_rshift N): New pattern.
12155 2023-09-04 Guo Jie <guojie@loongson.cn>
12157 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
12158 movsf_hardfloat and movdf_hardfloat.
12160 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
12162 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
12163 In unsigned QImode test, check for sign extended subreg and/or
12164 constant operands, and do a sign extension in that case.
12165 * config/loongarch/loongarch.md (TARGET_64BIT): Define
12166 template cbranchqi4.
12168 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
12170 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
12171 from memory into floating-point registers.
12173 2023-09-03 Pan Li <pan2.li@intel.com>
12175 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
12177 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
12179 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
12181 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
12182 pointer before overwriting it.
12184 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
12186 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
12187 Associate the __float128 type to float128_type_node so that it can
12188 be recognized by the compiler.
12189 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
12190 Add the flag "FLOAT128_TYPE" to gcc and associate a function
12191 with the suffix "q" to "f128".
12192 * doc/extend.texi:Added support for 128-bit floating-point functions on
12193 the LoongArch architecture.
12195 2023-09-01 Jakub Jelinek <jakub@redhat.com>
12198 * common.opt (fabi-version=): Document version 19.
12199 * doc/invoke.texi (-fabi-version=): Likewise.
12201 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
12203 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
12204 New combine pattern.
12205 (*cond_<float_cvt><vconvert><mode>): Ditto.
12206 (*cond_<optab><vnconvert><mode>): Ditto.
12207 (*cond_<float_cvt><vnconvert><mode>): Ditto.
12208 (*cond_<optab><mode><vnconvert>): Ditto.
12209 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
12210 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
12211 (<float_cvt><vconvert><mode>2): Adjust.
12212 (<optab><vnconvert><mode>2): Adjust.
12213 (<float_cvt><vnconvert><mode>2): Adjust.
12214 (<optab><mode><vnconvert>2): Adjust.
12215 (<float_cvt><mode><vnconvert>2): Adjust.
12216 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
12218 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
12220 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
12221 New combine pattern.
12222 (*cond_trunc<mode><v_double_trunc>): Ditto.
12223 * config/riscv/autovec.md: Adjust.
12224 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
12226 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
12228 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
12229 New combine pattern.
12230 (*cond_<optab><v_quad_trunc><mode>): Ditto.
12231 (*cond_<optab><v_oct_trunc><mode>): Ditto.
12232 (*cond_trunc<mode><v_double_trunc>): Ditto.
12233 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
12234 (<optab><v_oct_trunc><mode>2): Ditto.
12236 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
12238 * config/riscv/autovec.md: Adjust.
12239 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
12240 (expand_cond_len_binop): Ditto.
12241 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
12242 (expand_cond_len_op): Ditto.
12243 (expand_cond_len_unop): Ditto.
12244 (expand_cond_len_binop): Ditto.
12245 (expand_cond_len_ternop): Ditto.
12247 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12249 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
12250 VECT_COMPARE_COSTS by default.
12252 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
12254 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
12256 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12258 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
12260 * config/riscv/riscv.opt: Add dynamic compile option.
12262 2023-09-01 Pan Li <pan2.li@intel.com>
12264 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
12265 vls floating-point autovec.
12266 * config/riscv/vector-iterators.md: New iterator for
12267 floating-point V and VLS.
12268 * config/riscv/vector.md: Add VLS to floating-point binop.
12270 2023-09-01 Andrew Pinski <apinski@marvell.com>
12272 PR tree-optimization/19832
12273 * match.pd: Add pattern to optimize
12274 `(a != b) ? a OP b : c`.
12276 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
12277 Guo Jie <guojie@loongson.cn>
12280 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
12281 frame_pointer_needed to determine whether to use the $fp register.
12283 2023-08-31 Andrew Pinski <apinski@marvell.com>
12285 PR tree-optimization/110915
12286 * match.pd (min_value, max_value): Extend to vector constants.
12288 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12290 * config.in: Regenerate.
12291 * config/darwin-c.cc: Change spelling to macOS.
12292 * config/darwin-driver.cc: Likewise.
12293 * config/darwin.h: Likewise.
12294 * configure.ac: Likewise.
12295 * doc/contrib.texi: Likewise.
12296 * doc/extend.texi: Likewise.
12297 * doc/invoke.texi: Likewise.
12298 * doc/plugins.texi: Likewise.
12299 * doc/tm.texi: Regenerate.
12300 * doc/tm.texi.in: Change spelling to macOS.
12301 * plugin.cc: Likewise.
12303 2023-08-31 Pan Li <pan2.li@intel.com>
12305 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
12306 * config/riscv/autovec.md: Ditto.
12308 2023-08-31 Pan Li <pan2.li@intel.com>
12310 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
12311 * config/riscv/autovec.md: Ditto.
12313 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
12315 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
12316 rather than a call. List each possible destination register
12317 in the call pattern.
12319 2023-08-31 Pan Li <pan2.li@intel.com>
12321 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
12322 * config/riscv/autovec.md: Ditto.
12324 2023-08-31 Pan Li <pan2.li@intel.com>
12325 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12327 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
12328 * config/riscv/autovec.md: Ditto.
12329 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
12331 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
12333 * config/riscv/autovec.md (shifts): Use
12334 vector_scalar_shift_operand.
12335 * config/riscv/predicates.md (vector_scalar_shift_operand): New
12338 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12340 * config.gcc: Add vector cost model framework for RVV.
12341 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
12342 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
12343 * config/riscv/t-riscv: Ditto.
12344 * config/riscv/riscv-vector-costs.cc: New file.
12345 * config/riscv/riscv-vector-costs.h: New file.
12347 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
12350 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
12351 AltiVec address operands.
12352 (define_insn_and_split movxo): Likewise.
12353 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
12354 redundant mode size check.
12356 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
12358 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
12359 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
12360 Change to default policy.
12361 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
12362 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
12363 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
12365 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
12367 * config/riscv/autovec-opt.md: Adjust.
12368 * config/riscv/autovec-vls.md: Ditto.
12369 * config/riscv/autovec.md: Ditto.
12370 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
12371 (enum insn_flags): Add insn flags.
12372 (emit_vlmax_insn): Adjust.
12373 (emit_vlmax_fp_insn): Delete.
12374 (emit_vlmax_ternary_insn): Delete.
12375 (emit_vlmax_fp_ternary_insn): Delete.
12376 (emit_nonvlmax_insn): Adjust.
12377 (emit_vlmax_slide_insn): Delete.
12378 (emit_nonvlmax_slide_tu_insn): Delete.
12379 (emit_vlmax_merge_insn): Delete.
12380 (emit_vlmax_cmp_insn): Delete.
12381 (emit_vlmax_cmp_mu_insn): Delete.
12382 (emit_vlmax_masked_mu_insn): Delete.
12383 (emit_scalar_move_insn): Delete.
12384 (emit_nonvlmax_integer_move_insn): Delete.
12385 (emit_vlmax_insn_lra): Add.
12386 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
12387 (emit_vlmax_insn): Adjust.
12388 (emit_nonvlmax_insn): Adjust.
12389 (emit_vlmax_insn_lra): Add.
12390 (emit_vlmax_fp_insn): Delete.
12391 (emit_vlmax_ternary_insn): Delete.
12392 (emit_vlmax_fp_ternary_insn): Delete.
12393 (emit_vlmax_slide_insn): Delete.
12394 (emit_nonvlmax_slide_tu_insn): Delete.
12395 (emit_nonvlmax_slide_insn): Delete.
12396 (emit_vlmax_merge_insn): Delete.
12397 (emit_vlmax_cmp_insn): Delete.
12398 (emit_vlmax_cmp_mu_insn): Delete.
12399 (emit_vlmax_masked_insn): Delete.
12400 (emit_nonvlmax_masked_insn): Delete.
12401 (emit_vlmax_masked_store_insn): Delete.
12402 (emit_nonvlmax_masked_store_insn): Delete.
12403 (emit_vlmax_masked_mu_insn): Delete.
12404 (emit_vlmax_masked_fp_mu_insn): Delete.
12405 (emit_nonvlmax_tu_insn): Delete.
12406 (emit_nonvlmax_fp_tu_insn): Delete.
12407 (emit_nonvlmax_tumu_insn): Delete.
12408 (emit_nonvlmax_fp_tumu_insn): Delete.
12409 (emit_scalar_move_insn): Delete.
12410 (emit_cpop_insn): Delete.
12411 (emit_vlmax_integer_move_insn): Delete.
12412 (emit_nonvlmax_integer_move_insn): Delete.
12413 (emit_vlmax_gather_insn): Delete.
12414 (emit_vlmax_masked_gather_mu_insn): Delete.
12415 (emit_vlmax_compress_insn): Delete.
12416 (emit_nonvlmax_compress_insn): Delete.
12417 (emit_vlmax_reduction_insn): Delete.
12418 (emit_vlmax_fp_reduction_insn): Delete.
12419 (emit_nonvlmax_fp_reduction_insn): Delete.
12420 (expand_vec_series): Adjust.
12421 (expand_const_vector): Adjust.
12422 (legitimize_move): Adjust.
12423 (sew64_scalar_helper): Adjust.
12424 (expand_tuple_move): Adjust.
12425 (expand_vector_init_insert_elems): Adjust.
12426 (expand_vector_init_merge_repeating_sequence): Adjust.
12427 (expand_vec_cmp): Adjust.
12428 (expand_vec_cmp_float): Adjust.
12429 (expand_vec_perm): Adjust.
12430 (shuffle_merge_patterns): Adjust.
12431 (shuffle_compress_patterns): Adjust.
12432 (shuffle_decompress_patterns): Adjust.
12433 (expand_load_store): Adjust.
12434 (expand_cond_len_op): Adjust.
12435 (expand_cond_len_unop): Adjust.
12436 (expand_cond_len_binop): Adjust.
12437 (expand_gather_scatter): Adjust.
12438 (expand_cond_len_ternop): Adjust.
12439 (expand_reduction): Adjust.
12440 (expand_lanes_load_store): Adjust.
12441 (expand_fold_extract_last): Adjust.
12442 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
12443 * config/riscv/vector.md: Adjust.
12445 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
12448 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
12449 load/store with length only on 64-bit Power10.
12451 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
12453 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
12454 SWAP option is enabled.
12455 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
12457 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
12459 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
12460 Use common insn for signed and unsigned front-end definitions.
12461 * config/arm/arm_mve_builtins.def
12462 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
12463 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
12464 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
12467 (mve_rot): Likewise.
12469 (VxCADDQ_M): Likewise.
12470 * config/arm/unspecs.md (unspec): Likewise.
12471 * config/arm/mve.md: Fix minor typo.
12473 2023-08-31 liuhongt <hongtao.liu@intel.com>
12475 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
12476 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
12477 (VF_AVX512HFBF16): Renamed to VHFBF.
12478 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
12479 (VF_AVX512FP16): Removed.
12480 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
12481 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
12482 (rsqrt<mode>2): Ditto.
12483 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
12484 (vcond<mode><code>): Ditto.
12485 (vcond<sseintvecmodelower><mode>): Ditto.
12486 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
12487 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
12488 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
12489 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
12490 (cmla<conj_op><mode>4): Ditto.
12491 (fma_<mode>_fadd_fmul): Ditto.
12492 (fma_<mode>_fadd_fcmul): Ditto.
12493 (fma_<complexopname>_<mode>_fma_zero): Ditto.
12494 (fma_<mode>_fmaddc_bcst): Ditto.
12495 (fma_<mode>_fcmaddc_bcst): Ditto.
12496 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
12497 (cmul<conj_op><mode>3): Ditto.
12498 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
12500 (vec_unpacks_lo_<mode>): Ditto.
12501 (vec_unpacks_hi_<mode>): Ditto.
12502 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
12503 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
12504 (*vec_extract<mode>_0): Ditto.
12505 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
12507 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
12510 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
12512 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
12514 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
12515 (operator_minus::overflow_free_p): New declare.
12516 (operator_mult::overflow_free_p): New declare.
12517 * range-op.cc (range_op_handler::overflow_free_p): New function.
12518 (range_operator::overflow_free_p): New default function.
12519 (operator_plus::overflow_free_p): New function.
12520 (operator_minus::overflow_free_p): New function.
12521 (operator_mult::overflow_free_p): New function.
12522 * range-op.h (range_op_handler::overflow_free_p): New declare.
12523 (range_operator::overflow_free_p): New declare.
12524 * value-range.cc (irange::nonnegative_p): New function.
12525 (irange::nonpositive_p): New function.
12526 * value-range.h (irange::nonnegative_p): New declare.
12527 (irange::nonpositive_p): New declare.
12529 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
12532 * config/pru/predicates.md (const_0_operand): New predicate.
12533 (pru_cstore_comparison_operator): Ditto.
12534 * config/pru/pru.md (cstore<mode>4): New pattern.
12535 (cstoredi4): Ditto.
12537 2023-08-30 Richard Biener <rguenther@suse.de>
12539 PR tree-optimization/111228
12540 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
12541 New simplifications.
12543 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12545 * config/riscv/autovec.md (movmisalign<mode>): Delete.
12547 2023-08-30 Die Li <lidie@eswincomputing.com>
12548 Fei Gao <gaofei@eswincomputing.com>
12550 * config/riscv/peephole.md: New pattern.
12551 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
12552 (zcmp_mv_sreg_operand): New predicate.
12553 * config/riscv/riscv.md: New predicate.
12554 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
12555 (*mvsa01<X:mode>): New pattern.
12557 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
12559 * config/riscv/riscv.cc
12560 (riscv_zcmp_can_use_popretz): true if popretz can be used
12561 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
12562 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
12563 * config/riscv/riscv.md: define A0_REGNUM
12564 * config/riscv/zc.md
12565 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
12566 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
12567 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
12568 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
12569 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
12570 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
12571 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
12572 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
12573 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
12574 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
12575 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
12576 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
12578 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
12580 * config/riscv/iterators.md
12581 (slot0_offset): slot 0 offset in stack GPRs area in bytes
12582 (slot1_offset): slot 1 offset in stack GPRs area in bytes
12583 (slot2_offset): likewise
12584 (slot3_offset): likewise
12585 (slot4_offset): likewise
12586 (slot5_offset): likewise
12587 (slot6_offset): likewise
12588 (slot7_offset): likewise
12589 (slot8_offset): likewise
12590 (slot9_offset): likewise
12591 (slot10_offset): likewise
12592 (slot11_offset): likewise
12593 (slot12_offset): likewise
12594 * config/riscv/predicates.md
12595 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
12596 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
12597 (stack_push_up_to_s1_operand): likewise
12598 (stack_push_up_to_s2_operand): likewise
12599 (stack_push_up_to_s3_operand): likewise
12600 (stack_push_up_to_s4_operand): likewise
12601 (stack_push_up_to_s5_operand): likewise
12602 (stack_push_up_to_s6_operand): likewise
12603 (stack_push_up_to_s7_operand): likewise
12604 (stack_push_up_to_s8_operand): likewise
12605 (stack_push_up_to_s9_operand): likewise
12606 (stack_push_up_to_s11_operand): likewise
12607 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
12608 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
12609 (stack_pop_up_to_s1_operand): likewise
12610 (stack_pop_up_to_s2_operand): likewise
12611 (stack_pop_up_to_s3_operand): likewise
12612 (stack_pop_up_to_s4_operand): likewise
12613 (stack_pop_up_to_s5_operand): likewise
12614 (stack_pop_up_to_s6_operand): likewise
12615 (stack_pop_up_to_s7_operand): likewise
12616 (stack_pop_up_to_s8_operand): likewise
12617 (stack_pop_up_to_s9_operand): likewise
12618 (stack_pop_up_to_s11_operand): likewise
12619 * config/riscv/riscv-protos.h
12620 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
12621 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
12622 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
12623 (riscv_use_multi_push): true if multi push is used
12624 (riscv_multi_push_sregs_count): num of sregs in multi-push
12625 (riscv_multi_push_regs_count): num of regs in multi-push
12626 (riscv_16bytes_align): align to 16 bytes
12627 (riscv_stack_align): moved to a better place
12628 (riscv_save_libcall_count): no functional change
12629 (riscv_compute_frame_info): add zcmp frame info
12630 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
12631 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
12632 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
12633 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
12634 (riscv_expand_prologue): allocate stack by cm.push
12635 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
12636 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
12637 (zcmp_base_adj): calculate stack adjustment base size
12638 (zcmp_additional_adj): calculate stack adjustment additional size
12639 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
12640 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
12641 (S0_MASK): likewise
12642 (S1_MASK): likewise
12643 (S2_MASK): likewise
12644 (S3_MASK): likewise
12645 (S4_MASK): likewise
12646 (S5_MASK): likewise
12647 (S6_MASK): likewise
12648 (S7_MASK): likewise
12649 (S8_MASK): likewise
12650 (S9_MASK): likewise
12651 (S10_MASK): likewise
12652 (S11_MASK): likewise
12653 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
12654 (ZCMP_MAX_SPIMM): max spimm value
12655 (ZCMP_SP_INC_STEP): zcmp sp increment step
12656 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
12657 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
12658 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
12659 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
12660 * config/riscv/riscv.md: include zc.md
12661 * config/riscv/zc.md: New file. machine description for zcmp
12663 2023-08-30 Jakub Jelinek <jakub@redhat.com>
12665 PR tree-optimization/110914
12666 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
12667 adjust_last_stmt unless len is known constant.
12669 2023-08-30 Jakub Jelinek <jakub@redhat.com>
12671 PR tree-optimization/111015
12672 * gimple-ssa-store-merging.cc
12673 (imm_store_chain_info::output_merged_store): Use wi::mask and
12674 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
12675 build_int_cst to build BIT_AND_EXPR mask.
12677 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12679 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
12680 (call_may_clobber_ref_p_1): Ditto.
12681 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
12682 (get_alias_ptr_type_for_ptr_address): Ditto.
12684 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12686 * config/riscv/riscv-vsetvl.cc
12687 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
12689 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12691 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
12692 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
12695 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
12697 * config/riscv/zicond.md: New splitters to rewrite single bit
12698 sign extension as the condition to a czero in the desired form.
12700 2023-08-29 David Malcolm <dmalcolm@redhat.com>
12703 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
12705 2023-08-29 David Malcolm <dmalcolm@redhat.com>
12708 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
12710 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
12712 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
12713 zvfh can generate zfa extended instruction fli.h, just like zfh.
12715 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
12716 Vineet Gupta <vineetg@rivosinc.com>
12718 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
12719 __riscv_unaligned_avoid with value 1 or
12720 __riscv_unaligned_slow with value 1 or
12721 __riscv_unaligned_fast with value 1
12722 * config/riscv/riscv.cc (riscv_option_override): Define
12723 riscv_user_wants_strict_align. Set
12724 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
12725 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
12727 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
12729 * config/riscv/autovec-vls.md: Update types
12730 * config/riscv/riscv.md: Add vector placeholder type
12731 * config/riscv/vector.md: Update types
12733 2023-08-29 Carl Love <cel@us.ibm.com>
12735 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
12736 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
12737 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
12738 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
12739 New buit-in definitions.
12740 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
12741 overloaded definition.
12742 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
12744 2023-08-29 Pan Li <pan2.li@intel.com>
12745 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12747 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
12748 (riscv_legitimize_const_move): Handle ref plus const poly.
12750 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
12752 * common/config/riscv/riscv-common.cc
12753 (riscv_implied_info): Add implications from unprivileged extensions.
12754 (riscv_ext_version_table): Add stub support for all unprivileged
12755 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
12757 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
12759 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
12760 Add stub support for all vendor extensions supported by Binutils.
12762 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
12764 * common/config/riscv/riscv-common.cc
12765 (riscv_implied_info): Add implications from privileged extensions.
12766 (riscv_ext_version_table): Add stub support for all privileged
12767 extensions supported by Binutils.
12769 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
12771 * config/riscv/autovec.md: Adjust
12772 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
12773 (get_vlmax_rtx): Exported.
12774 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
12775 (emit_vlmax_masked_gather_mu_insn): Adjust.
12776 (get_vlmax_rtx): New func.
12777 (expand_load_store): Adjust.
12778 (expand_cond_len_unop): Call expand_cond_len_op.
12779 (expand_cond_len_op): New subroutine.
12780 (expand_cond_len_binop): Call expand_cond_len_op.
12781 (expand_cond_len_ternop): Call expand_cond_len_op.
12782 (expand_lanes_load_store): Adjust.
12784 2023-08-29 Jakub Jelinek <jakub@redhat.com>
12786 PR middle-end/79173
12787 PR middle-end/111209
12788 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
12789 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
12790 carry-out on higher limb. Don't match it though if it could be
12791 matched later on 4 argument addition/subtraction.
12793 2023-08-29 Andrew Pinski <apinski@marvell.com>
12795 PR tree-optimization/111147
12796 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
12797 instead of matching bit_not.
12799 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
12801 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
12804 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12806 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
12807 (pass_vsetvl::compute_local_properties): Fix bug.
12808 (pass_vsetvl::commit_vsetvls): Ditto.
12809 * config/riscv/riscv-vsetvl.h: New function.
12811 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
12814 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
12816 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
12817 force_reg mem target operand.
12818 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
12819 (*pred_mov<mode>): Remove imm -> reg pattern.
12820 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
12822 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
12824 * common/config/loongarch/loongarch-common.cc:
12825 Enable '-free' on O2 and above.
12826 * doc/invoke.texi: Modify the description information
12827 of the '-free' compilation option and add the LoongArch
12830 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
12832 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
12834 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
12836 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
12837 Implement the 'Zihintpause' extension, version 2.0.
12838 (riscv_ext_flag_table) Add 'Zihintpause' handling.
12839 * config/riscv/riscv-builtins.cc: Remove availability predicate
12840 "always" and add "hint_pause".
12841 (riscv_builtins) : Add "pause" extension.
12842 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
12843 * config/riscv/riscv.md (riscv_pause): Adjust output based on
12844 TARGET_ZIHINTPAUSE.
12846 2023-08-28 Andrew Pinski <apinski@marvell.com>
12848 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
12849 instead of specifically checking for ~X.
12851 2023-08-28 Andrew Pinski <apinski@marvell.com>
12853 PR tree-optimization/111146
12854 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
12857 2023-08-28 Andrew Pinski <apinski@marvell.com>
12859 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
12860 when resimplify returns true.
12861 (match_simplify_replacement): Print only if accepted the match-and-simplify
12862 result rather than the full sequence.
12864 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12866 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
12868 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
12870 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12872 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
12874 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
12876 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
12877 (vmulltq_poly): New.
12878 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
12879 (vmulltq_poly): New.
12880 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
12881 (vmulltq_poly): New.
12882 * config/arm/arm_mve.h (vmulltq_poly): Remove.
12883 (vmullbq_poly): Remove.
12884 (vmullbq_poly_m): Remove.
12885 (vmulltq_poly_m): Remove.
12886 (vmullbq_poly_x): Remove.
12887 (vmulltq_poly_x): Remove.
12888 (vmulltq_poly_p8): Remove.
12889 (vmullbq_poly_p8): Remove.
12890 (vmulltq_poly_p16): Remove.
12891 (vmullbq_poly_p16): Remove.
12892 (vmullbq_poly_m_p8): Remove.
12893 (vmullbq_poly_m_p16): Remove.
12894 (vmulltq_poly_m_p8): Remove.
12895 (vmulltq_poly_m_p16): Remove.
12896 (vmullbq_poly_x_p8): Remove.
12897 (vmullbq_poly_x_p16): Remove.
12898 (vmulltq_poly_x_p8): Remove.
12899 (vmulltq_poly_x_p16): Remove.
12900 (__arm_vmulltq_poly_p8): Remove.
12901 (__arm_vmullbq_poly_p8): Remove.
12902 (__arm_vmulltq_poly_p16): Remove.
12903 (__arm_vmullbq_poly_p16): Remove.
12904 (__arm_vmullbq_poly_m_p8): Remove.
12905 (__arm_vmullbq_poly_m_p16): Remove.
12906 (__arm_vmulltq_poly_m_p8): Remove.
12907 (__arm_vmulltq_poly_m_p16): Remove.
12908 (__arm_vmullbq_poly_x_p8): Remove.
12909 (__arm_vmullbq_poly_x_p16): Remove.
12910 (__arm_vmulltq_poly_x_p8): Remove.
12911 (__arm_vmulltq_poly_x_p16): Remove.
12912 (__arm_vmulltq_poly): Remove.
12913 (__arm_vmullbq_poly): Remove.
12914 (__arm_vmullbq_poly_m): Remove.
12915 (__arm_vmulltq_poly_m): Remove.
12916 (__arm_vmullbq_poly_x): Remove.
12917 (__arm_vmulltq_poly_x): Remove.
12919 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
12921 * config/arm/arm-mve-builtins-functions.h (class
12922 unspec_mve_function_exact_insn_vmull_poly): New.
12924 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
12926 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
12927 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
12929 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
12931 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
12932 support for 'U' and 'p' format specifiers.
12934 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
12936 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
12938 (TYPES_poly_8_16): New.
12940 * config/arm/arm-mve-builtins.def (p8): New type suffix.
12942 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
12944 (struct type_suffix_info): Add poly_p field.
12946 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
12948 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
12950 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
12952 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
12954 * config/arm/arm_mve.h (vmulltq_int): Remove.
12955 (vmullbq_int): Remove.
12956 (vmullbq_int_m): Remove.
12957 (vmulltq_int_m): Remove.
12958 (vmullbq_int_x): Remove.
12959 (vmulltq_int_x): Remove.
12960 (vmulltq_int_u8): Remove.
12961 (vmullbq_int_u8): Remove.
12962 (vmulltq_int_s8): Remove.
12963 (vmullbq_int_s8): Remove.
12964 (vmulltq_int_u16): Remove.
12965 (vmullbq_int_u16): Remove.
12966 (vmulltq_int_s16): Remove.
12967 (vmullbq_int_s16): Remove.
12968 (vmulltq_int_u32): Remove.
12969 (vmullbq_int_u32): Remove.
12970 (vmulltq_int_s32): Remove.
12971 (vmullbq_int_s32): Remove.
12972 (vmullbq_int_m_s8): Remove.
12973 (vmullbq_int_m_s32): Remove.
12974 (vmullbq_int_m_s16): Remove.
12975 (vmullbq_int_m_u8): Remove.
12976 (vmullbq_int_m_u32): Remove.
12977 (vmullbq_int_m_u16): Remove.
12978 (vmulltq_int_m_s8): Remove.
12979 (vmulltq_int_m_s32): Remove.
12980 (vmulltq_int_m_s16): Remove.
12981 (vmulltq_int_m_u8): Remove.
12982 (vmulltq_int_m_u32): Remove.
12983 (vmulltq_int_m_u16): Remove.
12984 (vmullbq_int_x_s8): Remove.
12985 (vmullbq_int_x_s16): Remove.
12986 (vmullbq_int_x_s32): Remove.
12987 (vmullbq_int_x_u8): Remove.
12988 (vmullbq_int_x_u16): Remove.
12989 (vmullbq_int_x_u32): Remove.
12990 (vmulltq_int_x_s8): Remove.
12991 (vmulltq_int_x_s16): Remove.
12992 (vmulltq_int_x_s32): Remove.
12993 (vmulltq_int_x_u8): Remove.
12994 (vmulltq_int_x_u16): Remove.
12995 (vmulltq_int_x_u32): Remove.
12996 (__arm_vmulltq_int_u8): Remove.
12997 (__arm_vmullbq_int_u8): Remove.
12998 (__arm_vmulltq_int_s8): Remove.
12999 (__arm_vmullbq_int_s8): Remove.
13000 (__arm_vmulltq_int_u16): Remove.
13001 (__arm_vmullbq_int_u16): Remove.
13002 (__arm_vmulltq_int_s16): Remove.
13003 (__arm_vmullbq_int_s16): Remove.
13004 (__arm_vmulltq_int_u32): Remove.
13005 (__arm_vmullbq_int_u32): Remove.
13006 (__arm_vmulltq_int_s32): Remove.
13007 (__arm_vmullbq_int_s32): Remove.
13008 (__arm_vmullbq_int_m_s8): Remove.
13009 (__arm_vmullbq_int_m_s32): Remove.
13010 (__arm_vmullbq_int_m_s16): Remove.
13011 (__arm_vmullbq_int_m_u8): Remove.
13012 (__arm_vmullbq_int_m_u32): Remove.
13013 (__arm_vmullbq_int_m_u16): Remove.
13014 (__arm_vmulltq_int_m_s8): Remove.
13015 (__arm_vmulltq_int_m_s32): Remove.
13016 (__arm_vmulltq_int_m_s16): Remove.
13017 (__arm_vmulltq_int_m_u8): Remove.
13018 (__arm_vmulltq_int_m_u32): Remove.
13019 (__arm_vmulltq_int_m_u16): Remove.
13020 (__arm_vmullbq_int_x_s8): Remove.
13021 (__arm_vmullbq_int_x_s16): Remove.
13022 (__arm_vmullbq_int_x_s32): Remove.
13023 (__arm_vmullbq_int_x_u8): Remove.
13024 (__arm_vmullbq_int_x_u16): Remove.
13025 (__arm_vmullbq_int_x_u32): Remove.
13026 (__arm_vmulltq_int_x_s8): Remove.
13027 (__arm_vmulltq_int_x_s16): Remove.
13028 (__arm_vmulltq_int_x_s32): Remove.
13029 (__arm_vmulltq_int_x_u8): Remove.
13030 (__arm_vmulltq_int_x_u16): Remove.
13031 (__arm_vmulltq_int_x_u32): Remove.
13032 (__arm_vmulltq_int): Remove.
13033 (__arm_vmullbq_int): Remove.
13034 (__arm_vmullbq_int_m): Remove.
13035 (__arm_vmulltq_int_m): Remove.
13036 (__arm_vmullbq_int_x): Remove.
13037 (__arm_vmulltq_int_x): Remove.
13039 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
13041 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
13042 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
13044 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
13046 * config/arm/arm-mve-builtins-functions.h (class
13047 unspec_mve_function_exact_insn_vmull): New.
13049 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
13051 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
13052 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
13054 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
13056 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
13057 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
13058 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
13059 (mve_vmulltq_int_<supf><mode>): Merge into ...
13060 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
13061 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
13062 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
13063 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
13064 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
13065 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
13066 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
13068 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
13070 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
13073 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
13075 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
13076 (binary_acca_int64): Likewise.
13078 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
13080 * range-op-float.cc (fold_range): Handle relations.
13082 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
13084 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
13085 Optimize the function implementation.
13087 2023-08-28 liuhongt <hongtao.liu@intel.com>
13090 * config/i386/sse.md (V48_AVX2): Rename to ..
13091 (V48_128_256): .. this.
13092 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
13093 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
13094 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
13095 integral modes when TARGET_AVX2 is not available.
13096 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
13097 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
13099 (maskstore<mode><sseintvecmodelower>): Ditto.
13101 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13103 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
13105 (after_or_same_p): Ditto.
13106 (find_reg_killed_by): Delete.
13107 (has_vsetvl_killed_avl_p): Ditto.
13108 (anticipatable_occurrence_p): Refactor.
13109 (any_set_in_bb_p): Delete.
13110 (count_regno_occurrences): Ditto.
13111 (backward_propagate_worthwhile_p): Ditto.
13112 (demands_can_be_fused_p): Ditto.
13113 (earliest_pred_can_be_fused_p): New function.
13114 (vsetvl_dominated_by_p): Ditto.
13115 (vector_insn_info::parse_insn): Refactor.
13116 (vector_insn_info::merge): Refactor.
13117 (vector_insn_info::dump): Refactor.
13118 (vector_infos_manager::vector_infos_manager): Refactor.
13119 (vector_infos_manager::all_empty_predecessor_p): Delete.
13120 (vector_infos_manager::all_same_avl_p): Ditto.
13121 (vector_infos_manager::create_bitmap_vectors): Refactor.
13122 (vector_infos_manager::free_bitmap_vectors): Refactor.
13123 (vector_infos_manager::dump): Refactor.
13124 (pass_vsetvl::update_block_info): New function.
13125 (enum fusion_type): Ditto.
13126 (pass_vsetvl::get_backward_fusion_type): Delete.
13127 (pass_vsetvl::hard_empty_block_p): Ditto.
13128 (pass_vsetvl::backward_demand_fusion): Ditto.
13129 (pass_vsetvl::forward_demand_fusion): Ditto.
13130 (pass_vsetvl::demand_fusion): Ditto.
13131 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
13132 (pass_vsetvl::compute_local_properties): Ditto.
13133 (pass_vsetvl::earliest_fusion): New function.
13134 (pass_vsetvl::vsetvl_fusion): Ditto.
13135 (pass_vsetvl::commit_vsetvls): Refactor.
13136 (get_first_vsetvl_before_rvv_insns): Ditto.
13137 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
13138 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
13139 (pass_vsetvl::df_post_optimization): Refactor.
13140 (pass_vsetvl::lazy_vsetvl): Ditto.
13141 * config/riscv/riscv-vsetvl.h: Ditto.
13143 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13145 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
13146 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13147 (expand_fold_extract_last): New function.
13148 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
13149 (emit_cpop_insn): Ditto.
13150 (emit_nonvlmax_compress_insn): Ditto.
13151 (expand_fold_extract_last): Ditto.
13152 * config/riscv/vector.md: Fix vcpop.m ratio demand.
13154 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
13156 * config/riscv/sync-rvwmo.md: updated types to "multi" or
13157 "atomic" based on number of assembly lines generated
13158 * config/riscv/sync-ztso.md: likewise
13159 * config/riscv/sync.md: likewise
13161 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
13163 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
13165 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
13166 instructions FLI.H/S/D can load.
13167 * config/riscv/iterators.md (ceil): New.
13168 * config/riscv/riscv-opts.h (MASK_ZFA): New.
13170 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
13171 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
13172 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
13174 (riscv_const_insns): Likewise.
13175 (riscv_legitimize_const_move): Likewise.
13176 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
13178 (riscv_split_doubleword_move): Likewise.
13179 (riscv_output_move): Output the mov instructions in zfa extension.
13180 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
13182 (riscv_secondary_memory_needed): Likewise.
13183 * config/riscv/riscv.md (fminm<mode>3): New.
13184 (fmaxm<mode>3): New.
13185 (movsidf2_low_rv32): New.
13186 (movsidf2_high_rv32): New.
13187 (movdfsisi3_rv32): New.
13188 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
13189 * config/riscv/riscv.opt: New.
13191 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
13194 * omp-general.cc (omp_runtime_api_procname): New.
13195 (omp_runtime_api_call): Moved here from omp-low.cc, and make
13197 * omp-general.h: Include omp-api.h.
13198 * omp-low.cc (omp_runtime_api_call): Delete this copy.
13200 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
13202 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
13203 * doc/gimple.texi (GIMPLE instruction set): Add
13204 GIMPLE_OMP_STRUCTURED_BLOCK.
13205 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
13206 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
13207 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
13208 GIMPLE_OMP_STRUCTURED_BLOCK.
13209 (pp_gimple_stmt_1): Likewise.
13210 * gimple-walk.cc (walk_gimple_stmt): Likewise.
13211 * gimple.cc (gimple_build_omp_structured_block): New.
13212 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
13213 * gimple.h (gimple_build_omp_structured_block): Declare.
13214 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
13215 (CASE_GIMPLE_OMP): Likewise.
13216 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
13217 (gimplify_expr): Likewise.
13218 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
13219 GIMPLE_OMP_STRUCTURED_BLOCK.
13220 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
13221 (lower_omp_1): Likewise.
13222 (diagnose_sb_1): Likewise.
13223 (diagnose_sb_2): Likewise.
13224 * tree-inline.cc (remap_gimple_stmt): Handle
13225 GIMPLE_OMP_STRUCTURED_BLOCK.
13226 (estimate_num_insns): Likewise.
13227 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
13228 (convert_local_reference_stmt): Likewise.
13229 (convert_gimple_call): Likewise.
13230 * tree-pretty-print.cc (dump_generic_node): Handle
13231 OMP_STRUCTURED_BLOCK.
13232 * tree.def (OMP_STRUCTURED_BLOCK): New.
13233 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
13235 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
13237 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
13238 cost. Add some comments about different constants handling.
13240 2023-08-25 Andrew Pinski <apinski@marvell.com>
13242 * match.pd (`a ? one_zero : one_zero`): Move
13243 below detection of minmax.
13245 2023-08-25 Andrew Pinski <apinski@marvell.com>
13247 * match.pd (`a | C -> C`): New pattern.
13249 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
13251 * caller-save.cc (new_saved_hard_reg):
13252 Rename TRUE/FALSE to true/false.
13253 (setup_save_areas): Ditto.
13254 * gcc.cc (set_collect_gcc_options): Ditto.
13255 (driver::build_multilib_strings): Ditto.
13256 (print_multilib_info): Ditto.
13257 * genautomata.cc (gen_cpu_unit): Ditto.
13258 (gen_query_cpu_unit): Ditto.
13259 (gen_bypass): Ditto.
13260 (gen_excl_set): Ditto.
13261 (gen_presence_absence_set): Ditto.
13262 (gen_presence_set): Ditto.
13263 (gen_final_presence_set): Ditto.
13264 (gen_absence_set): Ditto.
13265 (gen_final_absence_set): Ditto.
13266 (gen_automaton): Ditto.
13267 (gen_regexp_repeat): Ditto.
13268 (gen_regexp_allof): Ditto.
13269 (gen_regexp_oneof): Ditto.
13270 (gen_regexp_sequence): Ditto.
13271 (process_decls): Ditto.
13272 (reserv_sets_are_intersected): Ditto.
13273 (initiate_excl_sets): Ditto.
13274 (form_reserv_sets_list): Ditto.
13275 (check_presence_pattern_sets): Ditto.
13276 (check_absence_pattern_sets): Ditto.
13277 (check_regexp_units_distribution): Ditto.
13278 (check_unit_distributions_to_automata): Ditto.
13279 (create_ainsns): Ditto.
13280 (output_insn_code_cases): Ditto.
13281 (output_internal_dead_lock_func): Ditto.
13282 (form_important_insn_automata_lists): Ditto.
13283 * gengtype-state.cc (read_state_files_list): Ditto.
13284 * gengtype.cc (main): Ditto.
13285 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
13287 * gimple.cc (gimple_build_call_from_tree): Ditto.
13288 (preprocess_case_label_vec_for_gimple): Ditto.
13289 * gimplify.cc (gimplify_call_expr): Ditto.
13290 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
13292 2023-08-25 Richard Biener <rguenther@suse.de>
13294 PR tree-optimization/111137
13295 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
13296 Properly handle grouped stores from other SLP instances.
13298 2023-08-25 Richard Biener <rguenther@suse.de>
13300 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
13301 Split out from vect_slp_analyze_node_dependences, remove
13303 (vect_slp_analyze_load_dependences): Split out from
13304 vect_slp_analyze_node_dependences, adjust comments. Process
13305 queued stores before any disambiguation.
13306 (vect_slp_analyze_node_dependences): Remove.
13307 (vect_slp_analyze_instance_dependence): Adjust.
13309 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
13311 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
13313 (operator_not_equal::fold_range): Adjust for relations.
13314 (operator_lt::fold_range): Same.
13315 (operator_gt::fold_range): Same.
13316 (foperator_unordered_equal::fold_range): Same.
13317 (foperator_unordered_lt::fold_range): Same.
13318 (foperator_unordered_le::fold_range): Same.
13319 (foperator_unordered_gt::fold_range): Same.
13320 (foperator_unordered_ge::fold_range): Same.
13322 2023-08-25 Richard Biener <rguenther@suse.de>
13324 PR tree-optimization/111136
13325 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
13326 stores force STMT_VINFO_STRIDED_P and also duplicate that
13329 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13331 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
13332 Add early continue.
13334 2023-08-25 liuhongt <hongtao.liu@intel.com>
13336 * config/i386/sse.md (vec_set<mode>): Removed.
13337 (V_128H): Merge into ..
13339 (V_256H): Merge into ..
13341 (V_512): Add V32HF, V32BF.
13342 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
13344 (vcond<mode><sseintvecmodelower>): Removed
13345 (vcondu<mode><sseintvecmodelower>): Removed.
13346 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
13348 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
13351 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
13352 Adjust paramter order.
13354 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
13357 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
13359 2023-08-24 David Malcolm <dmalcolm@redhat.com>
13362 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
13363 list of functions known to the analyzer.
13365 2023-08-24 Richard Biener <rguenther@suse.de>
13367 PR tree-optimization/111123
13368 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
13369 remove indirect clobbers here ...
13370 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
13371 (remove_indirect_clobbers): New function.
13373 2023-08-24 Jan Hubicka <jh@suse.cz>
13375 * cfg.h (struct control_flow_graph): New field full_profile.
13376 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
13377 * cfg.cc (init_flow): Set full_profile to false.
13378 * graphite.cc (graphite_transform_loops): Set full_profile to false.
13379 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
13380 * predict.cc (pass_profile::execute): Set full_profile to true.
13381 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
13382 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
13383 if full_profile is set.
13384 * tree-inline.cc (initialize_cfun): Initialize full_profile.
13385 (expand_call_inline): Combine full_profile.
13387 2023-08-24 Richard Biener <rguenther@suse.de>
13389 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
13390 load_p to ldst_p, fix mistakes and rely on
13391 STMT_VINFO_DATA_REF.
13393 2023-08-24 Jan Hubicka <jh@suse.cz>
13395 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
13396 of newly build trap bb.
13398 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13400 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
13401 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
13402 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
13404 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
13406 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
13407 * config/riscv/riscv.cc (riscv_option_override): Set sched
13408 pressure algorithm.
13410 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
13412 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
13414 2023-08-24 Richard Biener <rguenther@suse.de>
13416 PR tree-optimization/111125
13417 * tree-vect-slp.cc (vect_slp_function): Split at novector
13418 loop entry, do not push blocks in novector loops.
13420 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
13422 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
13424 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13426 * genmatch.cc (decision_tree::gen): Support
13427 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
13428 * gimple-match-exports.cc (gimple_simplify): Ditto.
13429 (gimple_resimplify6): New function.
13430 (gimple_resimplify7): New function.
13431 (gimple_match_op::resimplify): Support
13432 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
13433 (convert_conditional_op): Ditto.
13434 (build_call_internal): Ditto.
13435 (try_conditional_simplification): Ditto.
13436 (gimple_extract): Ditto.
13437 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
13438 * internal-fn.cc (CASE): Ditto.
13440 2023-08-24 Richard Biener <rguenther@suse.de>
13442 PR tree-optimization/111115
13443 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
13444 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
13446 * tree-vect-slp.cc (arg3_arg2_map): New.
13447 (vect_get_operand_map): Handle IFN_MASK_STORE.
13448 (vect_slp_child_index_for_operand): New function.
13449 (vect_build_slp_tree_1): Handle statements with no LHS,
13451 (vect_remove_slp_scalar_calls): Likewise.
13452 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
13453 SLP child corresponding to the ifn value index.
13454 (vectorizable_store): Likewise for the mask index. Support
13456 (vectorizable_load): Lookup the SLP child corresponding to the
13459 2023-08-24 Richard Biener <rguenther@suse.de>
13461 PR tree-optimization/111125
13462 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
13463 for the remain_defs processing.
13465 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
13467 * config/aarch64/aarch64.cc: Include ssa.h.
13468 (aarch64_multiply_add_p): Require the second operand of an
13469 Advanced SIMD subtraction to be a multiplication. Assume that
13470 such an operation won't be fused if the second operand is used
13471 multiple times and if the first operand is also a multiplication.
13473 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13475 * tree-vect-loop.cc (vectorizable_reduction): Apply
13476 LEN_FOLD_EXTRACT_LAST.
13477 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
13479 2023-08-24 Richard Biener <rguenther@suse.de>
13481 PR tree-optimization/111128
13482 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
13483 Emit external shift operand inline if we promoted it with
13484 another pattern stmt.
13486 2023-08-24 Pan Li <pan2.li@intel.com>
13488 * config/riscv/autovec.md: Fix typo.
13490 2023-08-24 Pan Li <pan2.li@intel.com>
13492 * config/riscv/riscv-vector-builtins-bases.cc
13493 (class binop_frm): Removed.
13494 (class reverse_binop_frm): Ditto.
13495 (class widen_binop_frm): Ditto.
13496 (class vfmacc_frm): Ditto.
13497 (class vfnmacc_frm): Ditto.
13498 (class vfmsac_frm): Ditto.
13499 (class vfnmsac_frm): Ditto.
13500 (class vfmadd_frm): Ditto.
13501 (class vfnmadd_frm): Ditto.
13502 (class vfmsub_frm): Ditto.
13503 (class vfnmsub_frm): Ditto.
13504 (class vfwmacc_frm): Ditto.
13505 (class vfwnmacc_frm): Ditto.
13506 (class vfwmsac_frm): Ditto.
13507 (class vfwnmsac_frm): Ditto.
13508 (class unop_frm): Ditto.
13509 (class vfrec7_frm): Ditto.
13510 (class binop): Add frm_op_type template arg.
13511 (class unop): Ditto.
13512 (class widen_binop): Ditto.
13513 (class widen_binop_fp): Ditto.
13514 (class reverse_binop): Ditto.
13515 (class vfmacc): Ditto.
13516 (class vfnmsac): Ditto.
13517 (class vfmadd): Ditto.
13518 (class vfnmsub): Ditto.
13519 (class vfnmacc): Ditto.
13520 (class vfmsac): Ditto.
13521 (class vfnmadd): Ditto.
13522 (class vfmsub): Ditto.
13523 (class vfwmacc): Ditto.
13524 (class vfwnmacc): Ditto.
13525 (class vfwmsac): Ditto.
13526 (class vfwnmsac): Ditto.
13527 (class float_misc): Ditto.
13529 2023-08-24 Andrew Pinski <apinski@marvell.com>
13531 PR tree-optimization/111109
13532 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
13533 Add check to make sure cmp and icmp are inverse.
13535 2023-08-24 Andrew Pinski <apinski@marvell.com>
13537 PR tree-optimization/95929
13538 * match.pd (convert?(-a)): New pattern
13539 for 1bit integer types.
13541 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
13544 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13546 * common/config/i386/cpuinfo.h (get_available_features):
13547 Add avx10_set and version and detect avx10.1.
13548 (cpu_indicator_init): Handle avx10.1-512.
13549 * common/config/i386/i386-common.cc
13550 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
13551 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
13552 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
13553 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
13554 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
13555 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
13557 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13558 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
13559 FEATURE_AVX10_512BIT.
13560 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13561 AVX10_512BIT, AVX10_1 and AVX10_1_512.
13562 * config/i386/constraints.md (Yk): Add AVX10_1.
13565 * config/i386/cpuid.h (bit_AVX10): New.
13566 (bit_AVX10_256): Ditto.
13567 (bit_AVX10_512): Ditto.
13568 * config/i386/i386-c.cc (ix86_target_macros_internal):
13569 Define AVX10_512BIT and AVX10_1.
13570 * config/i386/i386-isa.def
13571 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
13572 (AVX10_1): Add DEF_PTA(AVX10_1).
13573 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
13574 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
13576 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
13577 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
13578 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
13579 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
13580 (ix86_conditional_register_usage): Ditto.
13581 (ix86_hard_regno_mode_ok): Ditto.
13582 (ix86_rtx_costs): Ditto.
13583 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
13584 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
13586 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
13587 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
13588 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
13591 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
13594 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13596 * common/config/i386/i386-common.cc
13597 (ix86_check_avx10): New function to check isa_flags and
13598 isa_flags_explicit to emit warning when AVX10 is enabled
13600 (ix86_check_avx512): New function to check isa_flags and
13601 isa_flags_explicit to emit warning when AVX512 is enabled
13603 (ix86_handle_option): Do not change the flags when warning
13605 * config/i386/driver-i386.cc (host_detect_local_cpu):
13606 Do not append -mno-avx10.1 for -march=native.
13608 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
13611 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13613 * common/config/i386/i386-common.cc
13614 (ix86_check_avx10_vector_width): New function to check isa_flags
13615 to emit a warning when there is a conflict in AVX10 options for
13617 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
13618 * config/i386/driver-i386.cc (host_detect_local_cpu):
13619 Do not append -mno-avx10-max-512bit for -march=native.
13621 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
13624 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13626 * config/i386/avx512vldqintrin.h: Remove target attribute.
13627 * config/i386/i386-builtin.def (BDESC):
13628 Add OPTION_MASK_ISA2_AVX10_1.
13629 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
13630 * config/i386/i386-expand.cc
13631 (ix86_check_builtin_isa_match): Ditto.
13632 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
13633 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
13634 and avx10_1_or_avx512vl.
13635 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
13636 (VF1_128_256VLDQ_AVX10_1): Ditto.
13637 (VI8_AVX512VLDQ_AVX10_1): Ditto.
13638 (<sse>_andnot<mode>3<mask_name>):
13639 Add TARGET_AVX10_1 and change isa attr from avx512dq to
13640 avx10_1_or_avx512dq.
13641 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
13642 avx512vl to avx10_1_or_avx512vl.
13643 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
13644 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
13645 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
13647 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
13649 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
13650 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
13651 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
13652 Add TARGET_AVX10_1.
13653 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
13654 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
13655 Remove target check.
13656 (avx512dq_mul<mode>3<mask_name>): Ditto.
13657 (*avx512dq_mul<mode>3<mask_name>): Ditto.
13658 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
13659 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
13660 Remove target check.
13661 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
13662 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
13663 Remove target check.
13664 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
13665 (mask_avx512vl_condition): Ditto.
13668 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
13671 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13673 * config/i386/avx512vldqintrin.h: Remove target attribute.
13674 * config/i386/i386-builtin.def (BDESC):
13675 Add OPTION_MASK_ISA2_AVX10_1.
13676 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
13677 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
13678 (VI48_AVX512VLDQ_AVX10_1): Ditto.
13679 (VF2_AVX512VL): Remove.
13680 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
13681 Add TARGET_AVX10_1.
13682 (*<code><mode>3<mask_name>): Change isa attribute to
13683 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
13684 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
13685 to avx10_1_or_avx512vl.
13686 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
13687 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
13688 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
13689 Add TARGET_AVX10_1.
13690 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
13691 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
13692 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
13693 Add TARGET_AVX10_1.
13694 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
13695 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
13696 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
13697 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
13698 (float<floatunssuffix>v4div4sf2<mask_name>):
13699 Add TARGET_AVX10_1.
13700 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
13701 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
13702 (float<floatunssuffix>v2div2sf2): Ditto.
13703 (float<floatunssuffix>v2div2sf2_mask): Ditto.
13704 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
13705 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
13706 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
13707 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
13708 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
13709 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
13710 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
13711 Change when constraint is enabled.
13713 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
13716 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13718 * config/i386/avx512vldqintrin.h: Remove target attribute.
13719 * config/i386/i386-builtin.def (BDESC):
13720 Add OPTION_MASK_ISA2_AVX10_1.
13721 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
13722 (VFH_AVX512VLDQ_AVX10_1): Ditto.
13723 (VF1_AVX512VLDQ_AVX10_1): Ditto.
13724 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
13725 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
13726 (vec_pack<floatprefix>_float_<mode>): Change iterator to
13727 VI8_AVX512VLDQ_AVX10_1. Remove target check.
13728 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
13729 VF1_AVX512VLDQ_AVX10_1. Remove target check.
13730 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
13731 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
13732 (avx512vl_vextractf128<mode>): Change iterator to
13733 VI48F_256_DQVL_AVX10_1. Remove target check.
13734 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
13735 (vec_extract_hi_<mode>): Ditto.
13736 (avx512vl_vinsert<mode>): Ditto.
13737 (vec_set_lo_<mode><mask_name>): Ditto.
13738 (vec_set_hi_<mode><mask_name>): Ditto.
13739 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
13740 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
13741 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
13742 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
13743 * config/i386/subst.md (mask_avx512dq_condition): Add
13745 (mask_scalar_merge): Ditto.
13747 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
13750 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
13753 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
13756 2023-08-24 Richard Biener <rguenther@suse.de>
13759 * dwarf2out.cc (prune_unused_types_walk): Handle
13760 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
13761 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
13762 and DW_TAG_dynamic_type as to only output them when referenced.
13764 2023-08-24 liuhongt <hongtao.liu@intel.com>
13766 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
13769 2023-08-24 liuhongt <hongtao.liu@intel.com>
13771 * common/config/i386/i386-common.cc (processor_names): Add new
13772 member graniterapids-s and arrowlake-s.
13773 * config/i386/i386-options.cc (processor_alias_table): Update
13774 table with PROCESSOR_ARROWLAKE_S and
13775 PROCESSOR_GRANITERAPIDS_D.
13776 (m_GRANITERAPID_D): New macro.
13777 (m_ARROWLAKE_S): Ditto.
13778 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
13779 (processor_cost_table): Add icelake_cost for
13780 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
13781 PROCESSOR_ARROWLAKE_S.
13782 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
13784 * config/i386/i386.h (enum processor_type): Add new member
13785 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
13786 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
13787 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
13789 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
13791 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
13792 to help simplify code further.
13794 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
13796 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
13797 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
13798 Initialize using a range instead of value and edge.
13799 (phi_group::calculate_using_modifier): Use initializer value and
13800 process for relations after trying for iteration convergence.
13801 (phi_group::refine_using_relation): Use initializer range.
13802 (phi_group::dump): Rework the dump output.
13803 (phi_analyzer::process_phi): Allow multiple constant initilizers.
13804 Dump groups immediately as created.
13805 (phi_analyzer::dump): Tweak output.
13806 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
13807 (phi_group::initial_value): Delete.
13808 (phi_group::refine_using_relation): Adjust prototype.
13809 (phi_group::m_initial_value): Delete.
13810 (phi_group::m_initial_edge): Delete.
13811 (phi_group::m_vr): Use int_range_max.
13812 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
13814 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
13816 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
13817 no group was created.
13818 (phi_analyzer::process_phi): Do not create groups of one phi node.
13820 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
13822 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
13823 CODE, CMP_CODE and BIT_CODE arguments.
13824 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
13825 (aarch64_gen_ccmp_next): Likewise.
13826 * doc/tm.texi: Regenerated.
13828 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
13830 * coretypes.h (rtx_code): Add forward declaration.
13831 * rtl.h (rtx_code): Make compatible with forward declaration.
13833 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
13836 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
13837 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
13838 DWIH mode iterator. Disable (=&r,m,m) alternative for
13840 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
13841 alternative for 32-bit targets.
13843 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
13845 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
13846 appropriate type attribute.
13848 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
13850 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
13851 (*copysign<mode>_neg): Ditto.
13852 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
13853 (<optab><mode>2): Ditto.
13854 (cond_<optab><mode>): New.
13855 (cond_len_<optab><mode>): Ditto.
13856 * config/riscv/riscv-protos.h (enum insn_type): New.
13857 (expand_cond_len_unop): New helper func.
13858 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
13859 (expand_cond_len_unop): New helper func.
13861 2023-08-23 Jan Hubicka <jh@suse.cz>
13863 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
13864 (should_duplicate_loop_header_p): Fix return value for static exits.
13865 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
13867 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
13869 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
13870 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
13871 and update the final nest accordingly.
13873 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
13875 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
13876 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
13877 and update the final nest accordingly.
13879 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
13881 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
13882 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
13883 gvec_oprnds with auto_delete_vec.
13885 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13887 * config/riscv/riscv-vsetvl.cc
13888 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
13890 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13892 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
13894 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
13896 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13898 * config/riscv/vector.md: Add attribute.
13900 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13902 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
13903 (vector_infos_manager::all_same_ratio_p): Ditto.
13904 (vector_infos_manager::all_same_avl_p): Ditto.
13905 (pass_vsetvl::refine_vsetvls): Ditto.
13906 (pass_vsetvl::cleanup_vsetvls): Ditto.
13907 (pass_vsetvl::commit_vsetvls): Ditto.
13908 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
13909 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
13910 (pass_vsetvl::compute_probabilities): Ditto.
13912 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13914 * config/riscv/t-riscv: Add riscv-vsetvl.def
13916 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
13918 * config/riscv/riscv.opt: Add --param names
13919 riscv-autovec-preference and riscv-autovec-lmul
13921 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
13923 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
13925 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
13927 * tree-core.h (enum omp_clause_defaultmap_kind): Add
13928 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
13929 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
13930 * tree-pretty-print.cc (dump_omp_clause): Likewise.
13932 2023-08-22 Jakub Jelinek <jakub@redhat.com>
13935 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
13936 types aren't supported in C++.
13938 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13940 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
13941 * internal-fn.cc (fold_len_extract_direct): Ditto.
13942 (expand_fold_len_extract_optab_fn): Ditto.
13943 (direct_fold_len_extract_optab_supported_p): Ditto.
13944 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
13945 * optabs.def (OPTAB_D): Ditto.
13947 2023-08-22 Richard Biener <rguenther@suse.de>
13949 * tree-vect-stmts.cc (vectorizable_store): Do not bump
13950 DR_GROUP_STORE_COUNT here. Remove early out.
13951 (vect_transform_stmt): Only call vectorizable_store on
13952 the last element of an interleaving chain.
13954 2023-08-22 Richard Biener <rguenther@suse.de>
13956 PR tree-optimization/94864
13957 PR tree-optimization/94865
13958 PR tree-optimization/93080
13959 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
13960 for vector insertion from vector extraction.
13962 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13963 Kewen.Lin <linkw@linux.ibm.com>
13965 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
13966 (vectorizable_live_operation): Add live vectorization for length loop
13969 2023-08-22 David Malcolm <dmalcolm@redhat.com>
13972 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
13974 2023-08-22 Pan Li <pan2.li@intel.com>
13976 * config/riscv/riscv-vector-builtins-bases.cc
13977 (vfwredusum_frm_obj): New declaration.
13979 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13980 * config/riscv/riscv-vector-builtins-functions.def
13981 (vfwredusum_frm): New intrinsic function def.
13983 2023-08-21 David Faust <david.faust@oracle.com>
13985 * config/bpf/bpf.md (neg): Second operand must be a register.
13987 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
13989 * config/riscv/bitmanip.md: Added bitmanip type to insns
13990 that are missing types.
13992 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
13994 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
13997 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
13999 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
14000 Fix format specifier.
14002 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
14004 * value-range.cc (frange::union_nans): Return false if nothing
14006 (range_tests_floats): New test.
14008 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
14010 PR tree-optimization/111048
14011 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
14013 (fold_vec_perm_cst): Remove workaround and again call
14014 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
14015 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
14017 2023-08-21 Richard Biener <rguenther@suse.de>
14019 PR tree-optimization/111082
14020 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
14021 pun operations that can overflow.
14023 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14025 * lcm.cc (compute_antinout_edge): Export as global use.
14026 (compute_earliest): Ditto.
14027 (compute_rev_insert_delete): Ditto.
14028 * lcm.h (compute_antinout_edge): Ditto.
14029 (compute_earliest): Ditto.
14031 2023-08-21 Richard Biener <rguenther@suse.de>
14033 PR tree-optimization/111070
14034 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
14035 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
14037 2023-08-21 Andrew Pinski <apinski@marvell.com>
14039 PR tree-optimization/111002
14040 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
14042 2023-08-21 liuhongt <hongtao.liu@intel.com>
14044 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
14046 * common/config/i386/i386-common.cc (alias_table): Support
14047 -march=gracemont as an alias of -march=alderlake.
14049 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
14051 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
14052 instead of src in the call to ix86_expand_sse_cmp.
14053 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
14054 force operands[1] to a register.
14055 (<any_extend:insn>v4hiv4si2): Ditto.
14056 (<any_extend:insn>v2siv2di2): Ditto.
14058 2023-08-20 Andrew Pinski <apinski@marvell.com>
14060 PR tree-optimization/111006
14061 PR tree-optimization/110986
14062 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
14064 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
14067 * Makefile.in: improve error message when /usr/include is
14070 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
14072 PR middle-end/111017
14073 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
14074 to expand_omp_build_cond for 'factor != 0' condition, resulting
14075 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
14077 2023-08-19 Guo Jie <guojie@loongson.cn>
14078 Lulu Cheng <chenglulu@loongson.cn>
14080 * config/loongarch/t-loongarch: Add loongarch-driver.h into
14081 TM_H. Add loongarch-def.h and loongarch-tune.h into
14084 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
14087 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
14088 Also handle V2QImode.
14089 (ix86_expand_sse_extend): New function.
14090 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
14091 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
14092 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
14093 (<any_extend:insn>v2hiv2si2): Ditto.
14094 (<any_extend:insn>v2qiv2hi2): Ditto.
14095 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
14096 (<any_extend:insn>v4hiv4si2): Ditto.
14097 (<any_extend:insn>v2siv2di2): Ditto.
14099 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
14102 * value-range.cc (irange::union_bitmask): Return FALSE if updated
14103 bitmask is semantically equivalent to the original mask.
14104 (irange::intersect_bitmask): Same.
14105 (irange::get_bitmask): Add comment.
14107 2023-08-18 Richard Biener <rguenther@suse.de>
14109 PR tree-optimization/111019
14110 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
14111 also scrap base and offset in case the ref is indirect.
14113 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
14115 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
14117 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
14119 PR bootstrap/111021
14120 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
14122 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
14124 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
14126 (vectorizable_store): ... here.
14128 2023-08-18 Richard Biener <rguenther@suse.de>
14130 PR tree-optimization/111048
14131 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
14134 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
14137 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
14140 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
14142 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
14143 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
14144 and update the final nest accordingly.
14146 2023-08-18 Andrew Pinski <apinski@marvell.com>
14148 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
14149 cond_len_neg and cond_len_one_cmpl.
14151 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
14153 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
14154 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
14155 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
14156 (*local_pic_load_32d<ANYF:mode>): Ditto.
14157 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
14158 (*local_pic_store<ANYF:mode>): Ditto.
14159 (*local_pic_store<ANYLSF:mode>): Ditto.
14160 (*local_pic_store_32d<ANYF:mode>): Ditto.
14161 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
14163 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
14164 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14166 * config/riscv/predicates.md (vector_const_0_operand): New.
14167 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
14169 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
14171 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
14174 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
14176 PR tree-optimization/111009
14177 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
14179 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
14181 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
14182 slots_num initialization from here ...
14183 (lra_spill): ... to here before the 1st call of
14184 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
14185 fp->sp elimination.
14187 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
14190 * doc/invoke.texi (Option Summary): Mention
14191 -Wcompare-distinct-pointer-types under `Warning Options'.
14192 (Warning Options): Document -Wcompare-distinct-pointer-types.
14194 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
14196 * recog.cc (memory_address_addr_space_p): Mark possibly unused
14197 argument as unused.
14199 2023-08-17 Richard Biener <rguenther@suse.de>
14201 PR tree-optimization/111039
14202 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
14203 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
14205 2023-08-17 Alex Coplan <alex.coplan@arm.com>
14207 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
14209 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
14212 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
14213 `naked' function attribute.
14214 (bpf_warn_func_return): New function.
14215 (TARGET_WARN_FUNC_RETURN): Define.
14216 (bpf_expand_prologue): Add preventive comment.
14217 (bpf_expand_epilogue): Likewise.
14218 * doc/extend.texi (BPF Function Attributes): Document the `naked'
14219 function attribute.
14221 2023-08-17 Richard Biener <rguenther@suse.de>
14223 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
14224 !needs_fold_left_reduction_p to decide whether we can
14225 handle the reduction with association.
14226 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
14227 reductions perform all arithmetic in an unsigned type.
14229 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
14231 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
14233 * configure: Regenerate.
14235 2023-08-17 Pan Li <pan2.li@intel.com>
14237 * config/riscv/riscv-vector-builtins-bases.cc
14238 (widen_freducop): Add frm_opt_type template arg.
14239 (vfwredosum_frm_obj): New declaration.
14241 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14242 * config/riscv/riscv-vector-builtins-functions.def
14243 (vfwredosum_frm): New intrinsic function def.
14245 2023-08-17 Pan Li <pan2.li@intel.com>
14247 * config/riscv/riscv-vector-builtins-bases.cc
14248 (vfredosum_frm_obj): New declaration.
14250 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14251 * config/riscv/riscv-vector-builtins-functions.def
14252 (vfredosum_frm): New intrinsic function def.
14254 2023-08-17 Pan Li <pan2.li@intel.com>
14256 * config/riscv/riscv-vector-builtins-bases.cc
14257 (class freducop): Add frm_op_type template arg.
14258 (vfredusum_frm_obj): New declaration.
14260 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14261 * config/riscv/riscv-vector-builtins-functions.def
14262 (vfredusum_frm): New intrinsic function def.
14263 * config/riscv/riscv-vector-builtins-shapes.cc
14264 (struct reduc_alu_frm_def): New class for frm shape.
14265 (SHAPE): New declaration.
14266 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
14268 2023-08-17 Pan Li <pan2.li@intel.com>
14270 * config/riscv/riscv-vector-builtins-bases.cc
14271 (class vfncvt_f): Add frm_op_type template arg.
14272 (vfncvt_f_frm_obj): New declaration.
14274 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14275 * config/riscv/riscv-vector-builtins-functions.def
14276 (vfncvt_f_frm): New intrinsic function def.
14278 2023-08-17 Pan Li <pan2.li@intel.com>
14280 * config/riscv/riscv-vector-builtins-bases.cc
14281 (vfncvt_xu_frm_obj): New declaration.
14283 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14284 * config/riscv/riscv-vector-builtins-functions.def
14285 (vfncvt_xu_frm): New intrinsic function def.
14287 2023-08-17 Pan Li <pan2.li@intel.com>
14289 * config/riscv/riscv-vector-builtins-bases.cc
14290 (class vfncvt_x): Add frm_op_type template arg.
14291 (BASE): New declaration.
14292 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14293 * config/riscv/riscv-vector-builtins-functions.def
14294 (vfncvt_x_frm): New intrinsic function def.
14295 * config/riscv/riscv-vector-builtins-shapes.cc
14296 (struct narrow_alu_frm_def): New shape function for frm.
14297 (SHAPE): New declaration.
14298 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
14300 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14302 * config/i386/avx512vldqintrin.h: Remove target attribute.
14303 * config/i386/i386-builtin.def (BDESC):
14304 Add OPTION_MASK_ISA2_AVX10_1.
14305 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
14306 (VFH_AVX512VLDQ_AVX10_1): Ditto.
14307 (VF1_AVX512VLDQ_AVX10_1): Ditto.
14308 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
14309 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
14310 (vec_pack<floatprefix>_float_<mode>): Change iterator to
14311 VI8_AVX512VLDQ_AVX10_1. Remove target check.
14312 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
14313 VF1_AVX512VLDQ_AVX10_1. Remove target check.
14314 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
14315 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
14316 (avx512vl_vextractf128<mode>): Change iterator to
14317 VI48F_256_DQVL_AVX10_1. Remove target check.
14318 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
14319 (vec_extract_hi_<mode>): Ditto.
14320 (avx512vl_vinsert<mode>): Ditto.
14321 (vec_set_lo_<mode><mask_name>): Ditto.
14322 (vec_set_hi_<mode><mask_name>): Ditto.
14323 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
14324 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
14325 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
14326 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
14327 * config/i386/subst.md (mask_avx512dq_condition): Add
14329 (mask_scalar_merge): Ditto.
14331 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14333 * config/i386/avx512vldqintrin.h: Remove target attribute.
14334 * config/i386/i386-builtin.def (BDESC):
14335 Add OPTION_MASK_ISA2_AVX10_1.
14336 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
14337 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
14338 (VI48_AVX512VLDQ_AVX10_1): Ditto.
14339 (VF2_AVX512VL): Remove.
14340 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
14341 Add TARGET_AVX10_1.
14342 (*<code><mode>3<mask_name>): Change isa attribute to
14343 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
14344 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
14345 to avx10_1_or_avx512vl.
14346 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
14347 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
14348 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
14349 Add TARGET_AVX10_1.
14350 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
14351 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
14352 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
14353 Add TARGET_AVX10_1.
14354 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
14355 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
14356 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
14357 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
14358 (float<floatunssuffix>v4div4sf2<mask_name>):
14359 Add TARGET_AVX10_1.
14360 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
14361 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
14362 (float<floatunssuffix>v2div2sf2): Ditto.
14363 (float<floatunssuffix>v2div2sf2_mask): Ditto.
14364 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
14365 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
14366 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
14367 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
14368 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
14369 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
14370 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
14371 Change when constraint is enabled.
14373 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14376 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
14377 (second_sew_less_than_first_sew_p): Fix bug.
14378 (first_sew_less_than_second_sew_p): Ditto.
14380 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14382 * config/i386/avx512vldqintrin.h: Remove target attribute.
14383 * config/i386/i386-builtin.def (BDESC):
14384 Add OPTION_MASK_ISA2_AVX10_1.
14385 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
14386 * config/i386/i386-expand.cc
14387 (ix86_check_builtin_isa_match): Ditto.
14388 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
14389 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
14390 and avx10_1_or_avx512vl.
14391 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
14392 (VF1_128_256VLDQ_AVX10_1): Ditto.
14393 (VI8_AVX512VLDQ_AVX10_1): Ditto.
14394 (<sse>_andnot<mode>3<mask_name>):
14395 Add TARGET_AVX10_1 and change isa attr from avx512dq to
14396 avx10_1_or_avx512dq.
14397 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
14398 avx512vl to avx10_1_or_avx512vl.
14399 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
14400 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
14401 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
14403 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
14405 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
14406 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
14407 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
14408 Add TARGET_AVX10_1.
14409 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
14410 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
14411 Remove target check.
14412 (avx512dq_mul<mode>3<mask_name>): Ditto.
14413 (*avx512dq_mul<mode>3<mask_name>): Ditto.
14414 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
14415 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
14416 Remove target check.
14417 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
14418 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
14419 Remove target check.
14420 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
14421 (mask_avx512vl_condition): Ditto.
14424 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14426 * common/config/i386/i386-common.cc
14427 (ix86_check_avx10_vector_width): New function to check isa_flags
14428 to emit a warning when there is a conflict in AVX10 options for
14430 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
14431 * config/i386/driver-i386.cc (host_detect_local_cpu):
14432 Do not append -mno-avx10-max-512bit for -march=native.
14434 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14436 * common/config/i386/i386-common.cc
14437 (ix86_check_avx10): New function to check isa_flags and
14438 isa_flags_explicit to emit warning when AVX10 is enabled
14440 (ix86_check_avx512): New function to check isa_flags and
14441 isa_flags_explicit to emit warning when AVX512 is enabled
14443 (ix86_handle_option): Do not change the flags when warning
14445 * config/i386/driver-i386.cc (host_detect_local_cpu):
14446 Do not append -mno-avx10.1 for -march=native.
14448 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14450 * common/config/i386/cpuinfo.h (get_available_features):
14451 Add avx10_set and version and detect avx10.1.
14452 (cpu_indicator_init): Handle avx10.1-512.
14453 * common/config/i386/i386-common.cc
14454 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
14455 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
14456 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
14457 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
14458 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
14459 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
14461 * common/config/i386/i386-cpuinfo.h (enum processor_features):
14462 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
14463 FEATURE_AVX10_512BIT.
14464 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
14465 AVX10_512BIT, AVX10_1 and AVX10_1_512.
14466 * config/i386/constraints.md (Yk): Add AVX10_1.
14469 * config/i386/cpuid.h (bit_AVX10): New.
14470 (bit_AVX10_256): Ditto.
14471 (bit_AVX10_512): Ditto.
14472 * config/i386/i386-c.cc (ix86_target_macros_internal):
14473 Define AVX10_512BIT and AVX10_1.
14474 * config/i386/i386-isa.def
14475 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
14476 (AVX10_1): Add DEF_PTA(AVX10_1).
14477 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
14478 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
14480 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
14481 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
14482 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
14483 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
14484 (ix86_conditional_register_usage): Ditto.
14485 (ix86_hard_regno_mode_ok): Ditto.
14486 (ix86_rtx_costs): Ditto.
14487 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
14488 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
14490 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
14491 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
14492 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
14495 2023-08-17 Sergei Trofimovich <siarheit@google.com>
14497 * flag-types.h (vrp_mode): Remove unused.
14499 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
14501 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
14504 2023-08-17 Andrew Pinski <apinski@marvell.com>
14506 * internal-fn.def (COND_NOT): New internal function.
14507 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
14509 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
14510 into conditional not.
14511 * optabs.def (cond_one_cmpl): New optab.
14512 (cond_len_one_cmpl): Likewise.
14514 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
14516 PR rtl-optimization/110254
14517 * ira-color.cc (improve_allocation): Update array
14518 allocated_hard_reg_p.
14520 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
14522 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
14523 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
14524 (lra_update_fp2sp_elimination): Ditto.
14525 (update_reg_eliminate): Adjust spill_pseudos call.
14526 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
14527 in lra_update_fp2sp_elimination.
14529 2023-08-16 Richard Ball <richard.ball@arm.com>
14531 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
14532 * config/aarch64/aarch64-tune.md: Regenerate.
14533 * doc/invoke.texi: Document Cortex-A720 CPU.
14535 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
14537 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
14538 Implement expander.
14539 (<u>avg<v_double_trunc>3_ceil): Ditto.
14540 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
14543 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
14545 * internal-fn.cc (vec_extract_direct): Change type argument
14547 (expand_vec_extract_optab_fn): Call convert_optab_fn.
14548 (direct_vec_extract_optab_supported_p): Use
14549 convert_optab_supported_p.
14551 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
14552 Richard Sandiford <richard.sandiford@arm.com>
14554 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
14555 (valid_mask_for_fold_vec_perm_cst_p): New function.
14556 (fold_vec_perm_cst): Likewise.
14557 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
14558 (test_fold_vec_perm_cst): New namespace.
14559 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
14560 (test_fold_vec_perm_cst::validate_res): Likewise.
14561 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
14562 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
14563 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
14564 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
14565 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
14566 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
14567 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
14568 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
14569 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
14570 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
14571 (test_fold_vec_perm_cst::test): Likewise.
14572 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
14574 2023-08-16 Pan Li <pan2.li@intel.com>
14576 * config/riscv/riscv-vector-builtins-bases.cc
14577 (BASE): New declaration.
14578 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14579 * config/riscv/riscv-vector-builtins-functions.def
14580 (vfwcvt_xu_frm): New intrinsic function def.
14582 2023-08-16 Pan Li <pan2.li@intel.com>
14584 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
14586 2023-08-16 Pan Li <pan2.li@intel.com>
14588 * config/riscv/riscv-vector-builtins-bases.cc
14589 (BASE): New declaration.
14590 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14591 * config/riscv/riscv-vector-builtins-functions.def
14592 (vfwcvt_x_frm): New intrinsic function def.
14594 2023-08-16 Pan Li <pan2.li@intel.com>
14596 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
14597 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14598 * config/riscv/riscv-vector-builtins-functions.def
14599 (vfcvt_f_frm): New intrinsic function def.
14601 2023-08-16 Pan Li <pan2.li@intel.com>
14603 * config/riscv/riscv-vector-builtins-bases.cc
14604 (BASE): New declaration.
14605 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14606 * config/riscv/riscv-vector-builtins-functions.def
14607 (vfcvt_xu_frm): New intrinsic function def..
14609 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
14612 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
14613 extract when the element is 7 on BE while 8 on LE for byte or 3 on
14614 BE while 4 on LE for halfword.
14616 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
14619 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
14620 for V8HI and V16QI.
14621 (vsx_extract_v4si): New expand for V4SI extraction.
14622 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
14623 word 1 from BE order.
14624 (*mfvsrwz): New insn pattern for mfvsrwz.
14625 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
14626 word 1 from BE order.
14627 (*vsx_extract_si): Remove.
14628 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
14631 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14633 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
14635 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
14636 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
14637 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
14638 (expand_lanes_load_store): New function.
14639 * config/riscv/vector-iterators.md: New iterator.
14641 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14643 * internal-fn.cc (internal_load_fn_p): Apply
14644 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
14645 (internal_store_fn_p): Ditto.
14646 (internal_fn_len_index): Ditto.
14647 (internal_fn_mask_index): Ditto.
14648 (internal_fn_stored_value_index): Ditto.
14649 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
14650 (vect_load_lanes_supported): Ditto.
14651 * tree-vect-loop.cc: Ditto.
14652 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
14653 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
14654 (get_group_load_store_type): Ditto.
14655 (vectorizable_store): Ditto.
14656 (vectorizable_load): Ditto.
14657 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
14658 (vect_load_lanes_supported): Ditto.
14660 2023-08-16 Pan Li <pan2.li@intel.com>
14662 * config/riscv/riscv-vector-builtins-bases.cc
14663 (enum frm_op_type): New type for frm.
14664 (BASE): New declaration.
14665 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14666 * config/riscv/riscv-vector-builtins-functions.def
14667 (vfcvt_x_frm): New intrinsic function def.
14669 2023-08-16 liuhongt <hongtao.liu@intel.com>
14671 * config/i386/i386-builtins.cc
14672 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
14673 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
14674 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
14675 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
14676 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
14677 for use_scatter_8parts
14678 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
14679 (TARGET_USE_GATHER_8PARTS): .. this.
14680 (TARGET_USE_SCATTER): Rename to ..
14681 (TARGET_USE_SCATTER_8PARTS): .. this.
14682 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
14683 (X86_TUNE_USE_GATHER_8PARTS): .. this.
14684 (X86_TUNE_USE_SCATTER): Rename to
14685 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
14686 * config/i386/i386.opt: Add new options mgather, mscatter.
14688 2023-08-16 liuhongt <hongtao.liu@intel.com>
14690 * config/i386/i386-options.cc (m_GDS): New macro.
14691 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
14693 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
14694 (X86_TUNE_USE_GATHER): Ditto.
14696 2023-08-16 liuhongt <hongtao.liu@intel.com>
14698 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
14699 vmovsd when moving DFmode between SSE_REGS.
14700 (movhi_internal): Generate vmovdqa instead of vmovsh when
14701 moving HImode between SSE_REGS.
14702 (mov<mode>_internal): Use vmovaps instead of vmovsh when
14703 moving HF/BFmode between SSE_REGS.
14705 2023-08-15 David Faust <david.faust@oracle.com>
14707 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
14709 2023-08-15 David Faust <david.faust@oracle.com>
14712 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
14713 for any mode 32-bits or smaller, not just SImode.
14715 2023-08-15 Martin Jambor <mjambor@suse.cz>
14719 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
14720 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
14721 (ipcp_transform_function): Do not deallocate transformation info.
14722 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
14724 (vn_reference_lookup_2): When hitting default-def vuse, query
14725 IPA-CP transformation info for any known constants.
14727 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
14728 Thomas Schwinge <thomas@codesourcery.com>
14730 * gimplify.cc (oacc_region_type_name): New function.
14731 (oacc_default_clause): If no 'default' clause appears on this
14732 compute construct, see if one appears on a lexically containing
14734 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
14735 ctx->oacc_default_clause_ctx to current context.
14737 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14740 * config/riscv/predicates.md: Fix predicate.
14742 2023-08-15 Richard Biener <rguenther@suse.de>
14744 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
14745 slp_inst_kind_ctor handling.
14746 (vect_analyze_slp): Simplify.
14747 (vect_build_slp_instance): Dump when we analyze a CTOR.
14748 (vect_slp_check_for_constructors): Rename to ...
14749 (vect_slp_check_for_roots): ... this. Register a
14750 slp_root for CONSTRUCTORs instead of shoving them to
14751 the set of grouped stores.
14752 (vect_slp_analyze_bb_1): Adjust.
14754 2023-08-15 Richard Biener <rguenther@suse.de>
14756 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
14758 (_slp_instance::remain_defs): ... this.
14759 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
14760 (SLP_INSTANCE_REMAIN_DEFS): ... this.
14761 (slp_root::remain): New.
14762 (slp_root::slp_root): Adjust.
14763 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
14764 (vect_build_slp_instance): Get extra remain parameter,
14765 adjust former handling of a cut off stmt.
14766 (vect_analyze_slp_instance): Adjust.
14767 (vect_analyze_slp): Likewise.
14768 (_bb_vec_info::~_bb_vec_info): Likewise.
14769 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
14770 (vect_slp_check_for_constructors): Handle non-internal
14771 defs as remain defs of a reduction.
14772 (vectorize_slp_instance_root_stmt): Adjust.
14774 2023-08-15 Richard Biener <rguenther@suse.de>
14776 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
14777 (canonicalize_loop_induction_variables): Use find_loop_location.
14779 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
14781 PR bootstrap/111021
14782 * config/cris/cris-protos.h: Revert recent change.
14783 * config/cris/cris.cc (cris_legitimate_address_p): Remove
14784 code_helper unused parameter.
14785 (cris_legitimate_address_p_hook): New wrapper function.
14786 (TARGET_LEGITIMATE_ADDRESS_P): Change to
14787 cris_legitimate_address_p_hook.
14789 2023-08-15 Richard Biener <rguenther@suse.de>
14791 PR tree-optimization/110963
14792 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
14793 a PHI node when the expression is available on all edges
14794 and we insert at most one copy from a constant.
14796 2023-08-15 Richard Biener <rguenther@suse.de>
14798 PR tree-optimization/110991
14799 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
14800 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
14801 that will end up constant.
14803 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
14805 PR bootstrap/111021
14806 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
14808 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
14810 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
14811 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
14812 and update the final nest accordingly.
14814 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
14816 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
14819 2023-08-15 Pan Li <pan2.li@intel.com>
14821 * mode-switching.cc (create_pre_exit): Add SET insn check.
14823 2023-08-15 Pan Li <pan2.li@intel.com>
14825 * config/riscv/riscv-vector-builtins-bases.cc
14826 (class vfrec7_frm): New class for frm.
14827 (vfrec7_frm_obj): New declaration.
14829 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14830 * config/riscv/riscv-vector-builtins-functions.def
14831 (vfrec7_frm): New intrinsic function definition.
14832 * config/riscv/vector-iterators.md
14833 (VFMISC): Remove VFREC7.
14835 (float_insn_type): Ditto.
14836 (VFMISC_FRM): New int iterator.
14837 (misc_frm_op): New op for frm.
14838 (float_frm_insn_type): New type for frm.
14839 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
14840 New pattern for misc frm.
14842 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
14844 * lra-constraints.cc (curr_insn_transform): Process output stack
14845 pointer reloads before emitting reload insns.
14847 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
14850 * doc/invoke.texi: Add documentation of
14851 fanalyzer-show-events-in-system-headers
14853 2023-08-14 Jan Hubicka <jh@suse.cz>
14855 PR gcov-profile/110988
14856 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
14858 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
14860 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
14861 Enable compressed builtins when ZC* extensions enabled.
14862 * config/riscv/riscv-shorten-memrefs.cc:
14863 Enable shorten_memrefs pass when ZC* extensions enabled.
14864 * config/riscv/riscv.cc (riscv_compressed_reg_p):
14865 Enable compressible registers when ZC* extensions enabled.
14866 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
14867 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
14868 (riscv_first_stack_step): Allow compression of the register saves
14869 without adding extra instructions.
14870 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
14871 to 16 bits when ZC* extensions enabled.
14873 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
14875 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
14876 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
14881 (MASK_ZCMP): Ditto.
14882 (MASK_ZCMT): Ditto.
14883 (TARGET_ZCA): New target.
14884 (TARGET_ZCB): Ditto.
14885 (TARGET_ZCE): Ditto.
14886 (TARGET_ZCF): Ditto.
14887 (TARGET_ZCD): Ditto.
14888 (TARGET_ZCMP): Ditto.
14889 (TARGET_ZCMT): Ditto.
14890 * config/riscv/riscv.opt: New target variable.
14892 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14895 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
14897 * genrecog.cc (print_nonbool_test): Fix type error of
14898 switch (SUBREG_BYTE (op))'.
14900 2023-08-14 Richard Biener <rguenther@suse.de>
14902 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
14904 2023-08-14 Pan Li <pan2.li@intel.com>
14906 * config/riscv/riscv-vector-builtins-bases.cc
14907 (class unop_frm): New class for frm.
14908 (vfsqrt_frm_obj): New declaration.
14910 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14911 * config/riscv/riscv-vector-builtins-functions.def
14912 (vfsqrt_frm): New intrinsic function definition.
14914 2023-08-14 Pan Li <pan2.li@intel.com>
14916 * config/riscv/riscv-vector-builtins-bases.cc
14917 (class vfwnmsac_frm): New class for frm.
14918 (vfwnmsac_frm_obj): New declaration.
14920 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14921 * config/riscv/riscv-vector-builtins-functions.def
14922 (vfwnmsac_frm): New intrinsic function definition.
14924 2023-08-14 Pan Li <pan2.li@intel.com>
14926 * config/riscv/riscv-vector-builtins-bases.cc
14927 (class vfwmsac_frm): New class for frm.
14928 (vfwmsac_frm_obj): New declaration.
14930 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14931 * config/riscv/riscv-vector-builtins-functions.def
14932 (vfwmsac_frm): New intrinsic function definition.
14934 2023-08-14 Pan Li <pan2.li@intel.com>
14936 * config/riscv/riscv-vector-builtins-bases.cc
14937 (class vfwnmacc_frm): New class for frm.
14938 (vfwnmacc_frm_obj): New declaration.
14940 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14941 * config/riscv/riscv-vector-builtins-functions.def
14942 (vfwnmacc_frm): New intrinsic function definition.
14944 2023-08-14 Cui, Lili <lili.cui@intel.com>
14946 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
14949 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
14951 * config/mmix/predicates.md (mmix_address_operand): Use
14952 lra_in_progress, not reload_in_progress.
14954 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
14956 * config/mmix/mmix.cc: Re-enable LRA.
14958 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
14960 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
14961 when lra_in_progress.
14963 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
14965 * config/mmix/mmix.cc: Disable LRA for MMIX.
14967 2023-08-14 Pan Li <pan2.li@intel.com>
14969 * config/riscv/riscv-vector-builtins-bases.cc
14970 (class vfwmacc_frm): New class for vfwmacc frm.
14971 (vfwmacc_frm_obj): New declaration.
14973 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14974 * config/riscv/riscv-vector-builtins-functions.def
14975 (vfwmacc_frm): Function definition for vfwmacc.
14976 * config/riscv/riscv-vector-builtins.cc
14977 (function_expander::use_widen_ternop_insn): Add frm support.
14979 2023-08-14 Pan Li <pan2.li@intel.com>
14981 * config/riscv/riscv-vector-builtins-bases.cc
14982 (class vfnmsub_frm): New class for vfnmsub frm.
14983 (vfnmsub_frm): New declaration.
14985 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14986 * config/riscv/riscv-vector-builtins-functions.def
14987 (vfnmsub_frm): New function declaration.
14989 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
14991 * lra-constraints.cc (curr_insn_transform): Set done_p up and
14992 check it on true after processing output stack pointer reload.
14994 2023-08-12 Jakub Jelinek <jakub@redhat.com>
14996 * Makefile.in (USER_H): Add stdckdint.h.
14997 * ginclude/stdckdint.h: New file.
14999 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15002 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
15004 2023-08-12 Patrick Palka <ppalka@redhat.com>
15006 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
15007 Delimit output with braces.
15009 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15012 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
15014 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15016 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
15017 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
15018 * config/riscv/vector.md: Ditto.
15020 2023-08-11 David Malcolm <dmalcolm@redhat.com>
15023 * doc/analyzer.texi (__analyzer_get_strlen): New.
15024 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
15026 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
15028 * config/rx/rx.md (subdi3): Fix test for borrow.
15030 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15032 PR middle-end/110989
15033 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
15034 (vectorizable_load): Ditto.
15036 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
15038 * config/bpf/bpf.md (allocate_stack): Define.
15039 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
15040 stack pointer register.
15041 (FIXED_REGISTERS): Adjust accordingly.
15042 (CALL_USED_REGISTERS): Likewise.
15043 (REG_CLASS_CONTENTS): Likewise.
15044 (REGISTER_NAMES): Likewise.
15045 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
15046 space for callee-saved registers.
15047 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
15048 (bpf_expand_epilogue): Do not restore callee-saved registers in
15051 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
15053 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
15054 about too many arguments if function is always inlined.
15056 2023-08-11 Patrick Palka <ppalka@redhat.com>
15058 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
15059 Don't call component_ref_field_offset if the RHS isn't a decl.
15061 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
15063 PR bootstrap/110646
15064 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
15066 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
15068 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
15069 (process_alt_operands): Set the flag.
15070 (curr_insn_transform): Modify stack pointer offsets if output
15071 stack pointer reload is generated.
15073 2023-08-11 Joseph Myers <joseph@codesourcery.com>
15075 * configure: Regenerate.
15077 2023-08-11 Richard Biener <rguenther@suse.de>
15079 PR tree-optimization/110979
15080 * tree-vect-loop.cc (vectorizable_reduction): For
15081 FOLD_LEFT_REDUCTION without target support make sure
15082 we don't need to honor signed zeros and sign dependent rounding.
15084 2023-08-11 Richard Biener <rguenther@suse.de>
15086 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
15087 subgraph entries. Dump the used vector size based on the
15088 SLP subgraph entry root vector type.
15090 2023-08-11 Pan Li <pan2.li@intel.com>
15092 * config/riscv/riscv-vector-builtins-bases.cc
15093 (class vfmsub_frm): New class for vfmsub frm.
15094 (vfmsub_frm): New declaration.
15096 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15097 * config/riscv/riscv-vector-builtins-functions.def
15098 (vfmsub_frm): New function declaration.
15100 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15102 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
15103 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
15104 (expand_partial_store_optab_fn): Ditto.
15105 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
15106 (MASK_LEN_STORE_LANES): Ditto.
15107 * optabs.def (OPTAB_CD): Ditto.
15109 2023-08-11 Pan Li <pan2.li@intel.com>
15111 * config/riscv/riscv-vector-builtins-bases.cc
15112 (class vfnmadd_frm): New class for vfnmadd frm.
15113 (vfnmadd_frm): New declaration.
15115 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15116 * config/riscv/riscv-vector-builtins-functions.def
15117 (vfnmadd_frm): New function declaration.
15119 2023-08-11 Drew Ross <drross@redhat.com>
15120 Jakub Jelinek <jakub@redhat.com>
15122 PR tree-optimization/109938
15123 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
15125 2023-08-11 Pan Li <pan2.li@intel.com>
15127 * config/riscv/riscv-vector-builtins-bases.cc
15128 (class vfmadd_frm): New class for vfmadd frm.
15129 (vfmadd_frm_obj): New declaration.
15131 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15132 * config/riscv/riscv-vector-builtins-functions.def
15133 (vfmadd_frm): New function definition.
15135 2023-08-11 Pan Li <pan2.li@intel.com>
15137 * config/riscv/riscv-vector-builtins-bases.cc
15138 (class vfnmsac_frm): New class for vfnmsac frm.
15139 (vfnmsac_frm_obj): New declaration.
15141 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15142 * config/riscv/riscv-vector-builtins-functions.def
15143 (vfnmsac_frm): New function definition.
15145 2023-08-11 Jakub Jelinek <jakub@redhat.com>
15147 * doc/extend.texi (Typeof): Document typeof_unqual
15148 and __typeof_unqual__.
15150 2023-08-11 Andrew Pinski <apinski@marvell.com>
15152 PR tree-optimization/110954
15153 * generic-match-head.cc (bitwise_inverted_equal_p): Add
15154 wascmp argument and set it accordingly.
15155 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
15156 wascmp argument to the macro.
15157 (gimple_bitwise_inverted_equal_p): Add
15158 wascmp argument and set it accordingly.
15159 * match.pd (`a & ~a`, `a ^| ~a`): Update call
15160 to bitwise_inverted_equal_p and handle wascmp case.
15161 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
15162 call to bitwise_inverted_equal_p and check to see
15163 if was !wascmp or if precision was 1.
15165 2023-08-11 Martin Uecker <uecker@tugraz.at>
15168 * doc/invoke.texi: Update.
15170 2023-08-11 Pan Li <pan2.li@intel.com>
15172 * config/riscv/riscv-vector-builtins-bases.cc
15173 (class vfmsac_frm): New class for vfmsac frm.
15174 (vfmsac_frm_obj): New declaration.
15176 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15177 * config/riscv/riscv-vector-builtins-functions.def
15178 (vfmsac_frm): New function definition
15180 2023-08-10 Jan Hubicka <jh@suse.cz>
15182 PR middle-end/110923
15183 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
15185 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
15187 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
15188 dependent on 'a' extension.
15189 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
15190 (TARGET_ZTSO): New target.
15191 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
15193 (riscv_memmodel_needs_amo_release): Add Ztso case.
15194 (riscv_print_operand): Add Ztso case for LR/SC annotations.
15195 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
15196 * config/riscv/riscv.opt: Add Ztso target variable.
15197 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
15198 Ztso specific insn.
15199 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
15200 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
15201 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
15202 specific load/store/fence mappings.
15203 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
15204 specific load/store/fence mappings.
15206 2023-08-10 Jan Hubicka <jh@suse.cz>
15208 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
15211 2023-08-10 Jan Hubicka <jh@suse.cz>
15213 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
15215 2023-08-10 Jan Hubicka <jh@suse.cz>
15217 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
15218 handling of undefined values.
15220 2023-08-10 Jakub Jelinek <jakub@redhat.com>
15223 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
15224 return virtual phis and return NULL if there is a virtual phi
15225 where the arguments from E0 and E1 edges aren't equal.
15227 2023-08-10 Richard Biener <rguenther@suse.de>
15229 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
15230 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
15232 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15235 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
15237 2023-08-10 Pan Li <pan2.li@intel.com>
15239 * config/riscv/riscv-vector-builtins-bases.cc
15240 (class vfnmacc_frm): New class for vfnmacc.
15241 (vfnmacc_frm_obj): New declaration.
15243 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15244 * config/riscv/riscv-vector-builtins-functions.def
15245 (vfnmacc_frm): New function definition.
15247 2023-08-10 Pan Li <pan2.li@intel.com>
15249 * config/riscv/riscv-vector-builtins-bases.cc
15250 (class vfmacc_frm): New class for vfmacc frm.
15251 (vfmacc_frm_obj): New declaration.
15253 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15254 * config/riscv/riscv-vector-builtins-functions.def
15255 (vfmacc_frm): New function definition.
15257 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15260 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
15262 2023-08-10 Richard Biener <rguenther@suse.de>
15264 * tree-vectorizer.h (vectorizable_live_operation): Remove
15265 gimple_stmt_iterator * argument.
15266 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
15267 Adjust plumbing around vect_get_loop_mask.
15268 (vect_analyze_loop_operations): Adjust.
15269 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
15270 (vect_bb_slp_mark_live_stmts): Likewise.
15271 (vect_schedule_slp_node): Likewise.
15272 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
15273 Remove gimple_stmt_iterator * argument.
15274 (vect_transform_stmt): Adjust.
15276 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15278 * config/riscv/vector-iterators.md: Add missing modes.
15280 2023-08-10 Jakub Jelinek <jakub@redhat.com>
15283 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
15284 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
15286 2023-08-10 Jakub Jelinek <jakub@redhat.com>
15289 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
15290 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
15293 2023-08-10 liuhongt <hongtao.liu@intel.com>
15296 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
15297 sanitize upper part of V4HFmode register with
15298 -fno-trapping-math.
15299 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
15300 (<divv4hf3): Ditto.
15301 (<insn>v2hf3): Ditto.
15303 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
15304 register with -fno-trapping-math.
15306 2023-08-10 Pan Li <pan2.li@intel.com>
15307 Kito Cheng <kito.cheng@sifive.com>
15309 * config/riscv/riscv-protos.h
15310 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
15311 (get_frm_mode): New declaration.
15312 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
15313 * config/riscv/riscv-vector-builtins.cc
15314 (function_expander::use_ternop_insn): Take care of frm reg.
15315 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
15316 (riscv_emit_frm_mode_set): Ditto.
15317 (riscv_emit_mode_set): Ditto.
15318 (riscv_frm_adjust_mode_after_call): Ditto.
15319 (riscv_frm_mode_needed): Ditto.
15320 (riscv_frm_mode_after): Ditto.
15321 (riscv_mode_entry): Ditto.
15322 (riscv_mode_exit): Ditto.
15323 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
15324 * config/riscv/vector.md
15325 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
15326 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
15328 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15330 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
15331 incorrect anticipate info.
15333 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
15335 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
15336 Remove 'Zve32d' from the version list.
15338 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
15340 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
15341 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
15342 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
15343 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
15345 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
15347 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
15348 (mem_shadd_or_shadd_rtx_p): New function.
15350 2023-08-09 Andrew Pinski <apinski@marvell.com>
15352 PR tree-optimization/110937
15353 PR tree-optimization/100798
15354 * match.pd (`a ? ~b : b`): Handle this
15357 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
15359 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
15361 2023-08-09 Richard Ball <richard.ball@arm.com>
15363 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
15364 * config/aarch64/aarch64-tune.md: Regenerate.
15365 * doc/invoke.texi: Document Cortex-A520 CPU.
15367 2023-08-09 Carl Love <cel@us.ibm.com>
15369 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
15370 Move definitions to Altivec stanza.
15371 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
15374 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15377 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
15378 stepped vector support.
15380 2023-08-09 liuhongt <hongtao.liu@intel.com>
15382 * common/config/i386/cpuinfo.h (get_available_features):
15383 Rename local variable subleaf_level to max_subleaf_level.
15385 2023-08-09 Richard Biener <rguenther@suse.de>
15387 PR rtl-optimization/110587
15388 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
15390 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
15392 PR tree-optimization/110248
15393 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
15394 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
15395 legitimate when outer code is PLUS.
15397 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
15399 PR tree-optimization/110248
15400 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
15401 type code_helper and pass it to targetm.addr_space.legitimate_address_p
15402 instead of ERROR_MARK.
15403 (offsettable_address_addr_space_p): Update one function pointer with
15404 one more argument of type code_helper as its assignees
15405 memory_address_addr_space_p and strict_memory_address_addr_space_p
15406 have been adjusted, and adjust some call sites with ERROR_MARK.
15407 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
15408 (memory_address_addr_space_p): Adjust with one more unnamed argument
15409 of type code_helper with default ERROR_MARK.
15410 (strict_memory_address_addr_space_p): Likewise.
15411 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
15412 argument of type code_helper.
15413 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
15414 type code_helper and pass it to memory_address_addr_space_p.
15415 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
15416 one more unnamed argument of type code_helper with default value
15418 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
15419 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
15420 pass it to all valid_mem_ref_p calls.
15422 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
15424 PR tree-optimization/110248
15425 * coretypes.h (class code_helper): Add forward declaration.
15426 * doc/tm.texi: Regenerate.
15427 * lra-constraints.cc (valid_address_p): Call target hook
15428 targetm.addr_space.legitimate_address_p with an extra parameter
15429 ERROR_MARK as its prototype changes.
15430 * recog.cc (memory_address_addr_space_p): Likewise.
15431 * reload.cc (strict_memory_address_addr_space_p): Likewise.
15432 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
15433 Extend with one more argument of type code_helper, update the
15434 documentation accordingly.
15435 * targhooks.cc (default_legitimate_address_p): Adjust for the
15436 new code_helper argument.
15437 (default_addr_space_legitimate_address_p): Likewise.
15438 * targhooks.h (default_legitimate_address_p): Likewise.
15439 (default_addr_space_legitimate_address_p): Likewise.
15440 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
15441 with extra unnamed code_helper argument with default ERROR_MARK.
15442 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
15443 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
15444 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
15445 (tree.h): New include for tree_code ERROR_MARK.
15446 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
15447 unnamed code_helper argument with default ERROR_MARK.
15448 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
15449 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
15450 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
15451 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
15452 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
15453 (tree.h): New include for tree_code ERROR_MARK.
15454 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
15455 unnamed code_helper argument with default ERROR_MARK.
15456 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
15457 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
15459 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
15460 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
15461 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
15462 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
15463 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
15464 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
15465 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
15466 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
15467 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
15469 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
15470 (m32c_addr_space_legitimate_address_p): Likewise.
15471 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
15472 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
15473 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
15474 * config/microblaze/microblaze-protos.h (tree.h): New include for
15475 tree_code ERROR_MARK.
15476 (microblaze_legitimate_address_p): Adjust with extra unnamed
15477 code_helper argument with default ERROR_MARK.
15478 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
15480 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
15481 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
15482 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
15483 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
15484 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
15485 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
15486 argument with default ERROR_MARK and adjust the call to function
15487 msp430_legitimate_address_p.
15488 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
15489 unnamed code_helper argument with default ERROR_MARK.
15490 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
15491 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
15492 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
15493 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
15494 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
15495 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
15496 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
15497 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
15498 (tree.h): New include for tree_code ERROR_MARK.
15499 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
15500 extra unnamed code_helper argument with default ERROR_MARK.
15501 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
15502 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
15503 argument and adjust the call to function rs6000_legitimate_address_p.
15504 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
15505 unnamed code_helper argument with default ERROR_MARK.
15506 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
15507 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
15508 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
15509 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
15510 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
15511 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
15512 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
15513 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
15515 (tree.h): New include for tree_code ERROR_MARK.
15516 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
15517 Adjust with extra unnamed code_helper argument with default
15520 2023-08-09 liuhongt <hongtao.liu@intel.com>
15522 * common/config/i386/cpuinfo.h (get_available_features): Check
15523 EAX for valid subleaf before use CPUID.
15525 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
15527 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
15528 for the temporary when canonicalizing the condition.
15530 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
15532 * config/bpf/core-builtins.cc: Cleaned include headers.
15533 (struct cr_builtins): Added GTY.
15534 (cr_builtins_ref): Created.
15535 (builtins_data) Changed to GC root.
15536 (allocate_builtin_data): Changed.
15537 Included gt-core-builtins.h.
15538 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
15539 (bpf_core_extra_ref): Created.
15540 (bpf_comment_info): Changed to GC root.
15541 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
15543 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
15546 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
15547 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
15548 upper part of V2SFmode register with -fno-trapping-math.
15549 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
15551 (<smaxmin:code>v2sf3): Ditto.
15552 (sqrtv2sf2): Ditto.
15553 (*mmx_haddv2sf3_low): Ditto.
15554 (*mmx_hsubv2sf3_low): Ditto.
15555 (vec_addsubv2sf3): Ditto.
15556 (vec_cmpv2sfv2si): Ditto.
15557 (vcond<V2FI:mode>v2sf): Ditto.
15560 (fnmav2sf4): Ditto.
15561 (fnmsv2sf4): Ditto.
15562 (fix_truncv2sfv2si2): Ditto.
15563 (fixuns_truncv2sfv2si2): Ditto.
15564 (floatv2siv2sf2): Ditto.
15565 (floatunsv2siv2sf2): Ditto.
15566 (nearbyintv2sf2): Ditto.
15567 (rintv2sf2): Ditto.
15568 (lrintv2sfv2si2): Ditto.
15569 (ceilv2sf2): Ditto.
15570 (lceilv2sfv2si2): Ditto.
15571 (floorv2sf2): Ditto.
15572 (lfloorv2sfv2si2): Ditto.
15573 (btruncv2sf2): Ditto.
15574 (roundv2sf2): Ditto.
15575 (lroundv2sfv2si2): Ditto.
15576 * doc/invoke.texi (x86 Options): Document
15577 -mpartial-vector-fp-math option.
15579 2023-08-08 Andrew Pinski <apinski@marvell.com>
15581 PR tree-optimization/103281
15582 PR tree-optimization/28794
15583 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
15585 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
15586 (simplify_using_ranges::simplify_casted_cond): Rename to ...
15587 (simplify_using_ranges::simplify_casted_compare): This
15588 and change arguments to take op0 and op1.
15589 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
15590 (simplify_using_ranges::simplify): For tcc_comparison assignments call
15591 simplify_compare_assign_using_ranges_1.
15592 * vr-values.h (simplify_using_ranges): Add
15593 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
15594 Rename simplify_casted_cond and simplify_casted_compare and
15595 update argument types.
15597 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
15599 * genmatch.cc: Log line numbers indirectly.
15601 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
15603 * genmatch.cc: Make sinfo map ordered.
15604 * Makefile.in: Require the ordered map header for genmatch.o.
15606 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
15608 * ordered-hash-map.h: Add get_or_insert.
15609 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
15611 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15613 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
15614 (cond_len_<optab><mode>): Ditto.
15615 (cond_fma<mode>): Ditto.
15616 (cond_len_fma<mode>): Ditto.
15617 (cond_fnma<mode>): Ditto.
15618 (cond_len_fnma<mode>): Ditto.
15619 (cond_fms<mode>): Ditto.
15620 (cond_len_fms<mode>): Ditto.
15621 (cond_fnms<mode>): Ditto.
15622 (cond_len_fnms<mode>): Ditto.
15623 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
15625 (enum insn_type): Add new enum type.
15626 (prepare_ternary_operands): New function.
15627 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
15628 (emit_nonvlmax_tumu_insn): Ditto.
15629 (emit_nonvlmax_fp_tumu_insn): Ditto.
15630 (expand_cond_len_binop): Add condtional operations.
15631 (expand_cond_len_ternop): Ditto.
15632 (prepare_ternary_operands): New function.
15633 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
15634 riscv_get_v_regno_alignment as global scope.
15635 * config/riscv/vector.md: Fix ternary bugs.
15637 2023-08-08 Richard Biener <rguenther@suse.de>
15639 PR tree-optimization/49955
15640 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
15641 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
15642 * tree-vect-slp.cc (vect_free_slp_instance): Release
15643 SLP_INSTANCE_REMAIN_STMTS.
15644 (vect_build_slp_instance): Make the number of lanes of
15645 a BB reduction even.
15646 (vectorize_slp_instance_root_stmt): Handle unvectorized
15647 defs of a BB reduction.
15649 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15651 * internal-fn.cc (get_len_internal_fn): New function.
15652 (DEF_INTERNAL_COND_FN): Ditto.
15653 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
15654 * internal-fn.h (get_len_internal_fn): Ditto.
15655 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
15657 2023-08-08 Richard Biener <rguenther@suse.de>
15659 PR tree-optimization/110924
15660 * tree-ssa-live.h (virtual_operand_live): Update comment.
15661 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
15662 optimization, look at each predecessor.
15663 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
15665 2023-08-08 yulong <shiyulong@iscas.ac.cn>
15667 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
15669 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15671 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
15672 * config/riscv/vector.md: Ditto.
15674 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15676 * config/riscv/autovec.md: Add VLS shift.
15678 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15680 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
15681 * config/riscv/vector-iterators.md: Ditto.
15682 * config/riscv/vector.md: Ditto.
15684 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
15686 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
15688 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
15690 * configure: Regenerate.
15692 2023-08-07 John Ericson <git@JohnEricson.me>
15694 * configure: Regenerate.
15696 2023-08-07 Alan Modra <amodra@gmail.com>
15698 * configure: Regenerate.
15700 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
15702 * configure: Regenerate.
15704 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
15706 * configure: Regenerate.
15708 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
15710 * configure: Regenerate.
15712 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
15714 * configure: Regenerate.
15716 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
15718 * configure: Regenerate.
15720 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
15722 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
15723 VOIDmode operands to conditional before canonicalization.
15725 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
15727 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
15728 (find_oldest_value_reg): Inline stack_pointer_rtx check.
15729 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
15731 2023-08-07 Martin Jambor <mjambor@suse.cz>
15734 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
15735 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
15736 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
15737 (ptr_parm_has_nonarg_uses): Likewise.
15738 * ipa-param-manipulation.cc
15739 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
15740 (ipa_param_body_adjustments::mark_dead_statements): Move initial
15741 checks to get_ddef_if_exists_and_is_used.
15742 (ipa_param_body_adjustments::mark_clobbers_dead): New.
15743 (ipa_param_body_adjustments::common_initialization): Call
15744 mark_clobbers_dead when splitting.
15746 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
15748 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
15749 as an argument and pass it to riscv_emit_int_order_test.
15750 (riscv_expand_conditional_move): Handle cases where the condition
15751 is not EQ/NE or the second argument to the conditional is not
15753 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
15754 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
15756 2023-08-07 Andrew Pinski <apinski@marvell.com>
15758 PR tree-optimization/109959
15759 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
15762 2023-08-07 Richard Biener <rguenther@suse.de>
15764 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
15765 calculate post-dominators. Calculate RPO on the inverted
15766 graph and process blocks in that order.
15768 2023-08-07 liuhongt <hongtao.liu@intel.com>
15771 * config/i386/i386-protos.h
15772 (vpternlog_redundant_operand_mask): Adjust parameter type.
15773 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
15774 INTVAL instead of XINT, also adjust parameter type from rtx*
15775 to rtx since the function only needs operands[4] in vpternlog
15777 (substitute_vpternlog_operands): Pass operands[4] instead of
15778 operands to vpternlog_redundant_operand_mask.
15779 * config/i386/sse.md: Ditto.
15781 2023-08-07 Richard Biener <rguenther@suse.de>
15783 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
15784 around dumping code.
15786 2023-08-07 liuhongt <hongtao.liu@intel.com>
15789 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
15790 to define_expand and break into ..
15791 (<insn>v4hf3): .. this.
15792 (divv4hf3): .. this.
15793 (<insn>v2hf3): .. this.
15794 (divv2hf3): .. this.
15795 (movd_v2hf_to_sse): New define_expand.
15796 (movq_<mode>_to_sse): Extend to V4HFmode.
15797 (mmxdoublevecmode): Ditto.
15798 (V2FI_V4HF): New mode iterator.
15799 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
15800 by using mode iterator V4SF_V8HF, renamed to ..
15801 (*vec_concat<mode>): .. this.
15802 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
15803 iterator V4SF_V8HF, renamed to ..
15804 (*vec_concat<mode>_0): .. this.
15805 (*vec_concatv8hf_movss): New define_insn.
15806 (V4SF_V8HF): New mode iterator.
15808 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15810 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
15812 2023-08-07 Jan Beulich <jbeulich@suse.com>
15814 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
15815 (*mmx_pinsrb): Likewise.
15816 (*mmx_pextrb): Likewise.
15817 (*mmx_pextrb_zext): Likewise.
15818 (mmx_pshufbv8qi3): Likewise.
15819 (mmx_pshufbv4qi3): Likewise.
15820 (mmx_pswapdv2si2): Likewise.
15821 (*pinsrb): Likewise.
15822 (*pextrb): Likewise.
15823 (*pextrb_zext): Likewise.
15824 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
15825 (*sse2_eq<mode>3): Likewise.
15826 (*sse2_gt<mode>3): Likewise.
15827 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
15828 (*vec_extract<mode>): Likewise.
15829 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
15830 (*vec_extractv16qi_zext): Likewise.
15831 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
15832 (ssse3_pmaddubsw128): Likewise.
15833 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
15834 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
15835 (<ssse3_avx2>_psign<mode>3): Likewise.
15836 (<ssse3_avx2>_palignr<mode>): Likewise.
15837 (*abs<mode>2): Likewise.
15838 (sse4_2_pcmpestr): Likewise.
15839 (sse4_2_pcmpestri): Likewise.
15840 (sse4_2_pcmpestrm): Likewise.
15841 (sse4_2_pcmpestr_cconly): Likewise.
15842 (sse4_2_pcmpistr): Likewise.
15843 (sse4_2_pcmpistri): Likewise.
15844 (sse4_2_pcmpistrm): Likewise.
15845 (sse4_2_pcmpistr_cconly): Likewise.
15846 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
15847 (vgf2p8affineqb_<mode><mask_name>): Likewise.
15848 (vgf2p8mulb_<mode><mask_name>): Likewise.
15849 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
15851 (*<code>v16qi3 [umaxmin]): Likewise.
15853 2023-08-07 Jan Beulich <jbeulich@suse.com>
15855 * config/i386/i386.md (sse4_1_round<mode>2): Make
15856 "length_immediate" uniformly 1.
15857 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
15858 (mmx_pblendvb_<mode>): Likewise.
15860 2023-08-07 Jan Beulich <jbeulich@suse.com>
15862 * config/i386/sse.md
15863 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
15864 "prefix" attribute.
15865 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
15868 2023-08-07 Jan Beulich <jbeulich@suse.com>
15870 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
15871 "prefix_extra", and "mode" attributes.
15872 (xop_phadd<u>bd): Likewise.
15873 (xop_phadd<u>bq): Likewise.
15874 (xop_phadd<u>wd): Likewise.
15875 (xop_phadd<u>wq): Likewise.
15876 (xop_phadd<u>dq): Likewise.
15877 (xop_phsubbw): Likewise.
15878 (xop_phsubwd): Likewise.
15879 (xop_phsubdq): Likewise.
15880 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
15881 (xop_rotr<mode>3): Likewise.
15882 (xop_frcz<mode>2): Likewise.
15883 (*xop_vmfrcz<mode>2): Likewise.
15884 (xop_vrotl<mode>3): Add "prefix" attribute. Change
15885 "prefix_extra" to 1.
15886 (xop_sha<mode>3): Likewise.
15887 (xop_shl<mode>3): Likewise.
15889 2023-08-07 Jan Beulich <jbeulich@suse.com>
15891 * config/i386/sse.md
15892 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
15894 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
15895 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
15896 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
15897 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
15898 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
15899 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
15900 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
15901 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
15902 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
15903 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
15904 (vec_extract_lo_v64qi): Likewise.
15905 (vec_extract_hi_v64qi): Likewise.
15906 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
15907 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
15908 (*avx512f_<code><mode>3<mask_name>): Likewise.
15909 (*vec_extractv4ti): Likewise.
15910 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
15911 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
15912 Add "length_immediate".
15914 2023-08-07 Jan Beulich <jbeulich@suse.com>
15916 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
15918 (@rdseed<mode>): Likewise.
15919 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
15920 Adjust "prefix_extra".
15921 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
15922 (*sse4_1_<code><mode>3<mask_name>): Likewise.
15923 (*avx2_eq<mode>3): Likewise.
15924 (avx2_gt<mode>3): Likewise.
15925 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
15926 (*vec_extract<mode>): Likewise.
15927 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
15929 2023-08-07 Jan Beulich <jbeulich@suse.com>
15931 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
15932 "prefix_rep". Drop "prefix_extra".
15933 (wr<fsgs>base<mode>): Likewise.
15934 (ptwrite<mode>): Likewise.
15936 2023-08-07 Jan Beulich <jbeulich@suse.com>
15938 * config/i386/i386.md (isa): Move up.
15939 (length_immediate): Handle "fma4".
15940 (prefix): Handle "ssemuladd".
15941 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
15942 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
15944 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
15945 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
15946 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
15948 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
15949 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
15950 (*fma_fnmadd_<mode>): Likewise.
15951 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
15953 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
15954 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
15955 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
15957 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
15958 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
15959 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
15961 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
15962 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
15963 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
15965 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
15966 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
15967 (*fmai_fmadd_<mode>): Likewise.
15968 (*fmai_fmsub_<mode>): Likewise.
15969 (*fmai_fnmadd_<mode><round_name>): Likewise.
15970 (*fmai_fnmsub_<mode><round_name>): Likewise.
15971 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
15972 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
15973 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
15974 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
15975 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
15976 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
15977 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
15978 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
15979 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
15980 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
15981 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
15982 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
15983 (*fma4i_vmfmadd_<mode>): Likewise.
15984 (*fma4i_vmfmsub_<mode>): Likewise.
15985 (*fma4i_vmfnmadd_<mode>): Likewise.
15986 (*fma4i_vmfnmsub_<mode>): Likewise.
15987 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
15988 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
15989 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
15991 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
15992 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
15993 (xop_p<macs>dql): Likewise.
15994 (xop_p<macs>dqh): Likewise.
15995 (xop_p<macs>wd): Likewise.
15996 (xop_p<madcs>wd): Likewise.
15997 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
15999 2023-08-07 Jan Beulich <jbeulich@suse.com>
16001 * config/i386/i386.md (length_immediate): Handle "sse4arg".
16002 (prefix): Likewise.
16003 (*xop_pcmov_<mode>): Add "mode" attribute.
16004 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
16005 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
16006 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
16007 (*xop_pcmov_<mode>): Add "mode" attribute.
16008 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
16010 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
16011 "prefix_extra", and "length_immediate" attributes.
16012 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
16013 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
16014 and "length_immediate" attributes. Switch "type" to "sse4arg".
16015 (xop_pcom_tf<mode>3): Likewise.
16016 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
16018 2023-08-07 Jan Beulich <jbeulich@suse.com>
16020 * config/i386/i386.md (prefix_extra): Correct comment. Fold
16021 cases yielding 2 into ones yielding 1.
16023 2023-08-07 Jan Hubicka <jh@suse.cz>
16025 PR tree-optimization/106293
16026 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
16027 * tree-vect-loop.cc (vect_transform_loop): Likewise.
16029 2023-08-07 Andrew Pinski <apinski@marvell.com>
16031 PR tree-optimization/96695
16032 * match.pd (min_value, max_value): Extend to
16035 2023-08-06 Jan Hubicka <jh@suse.cz>
16037 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
16038 __builtin_expect that CPU likely supports cpuid.
16040 2023-08-06 Jan Hubicka <jh@suse.cz>
16042 * tree-loop-distribution.cc (loop_distribution::execute): Disable
16043 distribution for loops with estimated iterations 0.
16045 2023-08-06 Jan Hubicka <jh@suse.cz>
16047 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
16049 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
16051 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
16052 more Zicond patterns. Fix whitespace typo.
16053 (riscv_rtx_costs): Remove accidental code duplication.
16054 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
16056 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
16059 * config/i386/i386-protos.h
16060 (vpternlog_redundant_operand_mask): Declare.
16061 (substitute_vpternlog_operands): Declare.
16062 * config/i386/i386.cc
16063 (vpternlog_redundant_operand_mask): New helper.
16064 (substitute_vpternlog_operands): New function. Use them...
16065 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
16067 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
16069 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
16070 value of -1 is equivalent to don't care.
16071 (extract_integral_bit_field): Indicate that we don't require
16072 the most significant word to be zero extended, if we're about
16074 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
16075 of -1 is equivalent to don't care. Don't clear the most
16076 significant bits with AND mask when UNSIGNEDP is -1.
16078 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
16080 * config/i386/sse.md (define_split): Convert highpart:DF extract
16081 from V2DFmode register into a sse2_storehpd instruction.
16082 (define_split): Likewise, convert lowpart:DF extract from V2DF
16083 register into a sse2_storelpd instruction.
16085 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
16087 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
16090 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
16092 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
16093 against early clobber hard regs.
16095 2023-08-04 Tamar Christina <tamar.christina@arm.com>
16097 * doc/extend.texi: Document it.
16099 2023-08-04 Tamar Christina <tamar.christina@arm.com>
16102 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
16103 vec_widen_<sur>shiftl_hi_<mode>): Remove.
16104 (aarch64_<sur>shll<mode>_internal): Renamed to...
16105 (aarch64_<su>shll<mode>): .. This.
16106 (aarch64_<sur>shll2<mode>_internal): Renamed to...
16107 (aarch64_<su>shll2<mode>): .. This.
16108 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
16110 * config/aarch64/constraints.md (D2, DL): New.
16111 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
16113 2023-08-04 Tamar Christina <tamar.christina@arm.com>
16115 * gensupport.cc (conlist): Support length 0 attribute.
16117 2023-08-04 Tamar Christina <tamar.christina@arm.com>
16119 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
16120 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
16122 2023-08-04 Tamar Christina <tamar.christina@arm.com>
16124 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
16126 (aarch64_adjust_stmt_cost): Use it.
16127 (aarch64_vector_costs::count_ops): Likewise.
16128 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
16129 aarch64_adjust_stmt_cost.
16131 2023-08-04 Richard Biener <rguenther@suse.de>
16133 PR tree-optimization/110838
16134 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
16135 Fix right-shift value sanitizing. Properly emit external
16136 def mangling in the preheader rather than in the pattern
16137 def sequence where it will fail vectorizing.
16139 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
16141 PR middle-end/110316
16143 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
16144 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
16145 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
16146 (timer::validate_phases): Use integral arithmetic to check
16148 (timer::print_row, timer::print): Convert from integral
16149 nanoseconds to floating point seconds before printing.
16150 (timer::all_zero): Change limit to nanosec count instead of
16151 fractional count of seconds.
16152 (make_json_for_timevar_time_def): Convert from integral
16153 nanoseconds to floating point seconds before recording.
16154 * timevar.h (struct timevar_time_def): Update all measurements
16155 to use uint64_t nanoseconds rather than seconds stored in a
16158 2023-08-04 Richard Biener <rguenther@suse.de>
16160 PR tree-optimization/110838
16161 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
16162 the arithmetic right-shift case to non-negative operands.
16164 2023-08-04 Pan Li <pan2.li@intel.com>
16167 2023-08-04 Pan Li <pan2.li@intel.com>
16169 * config/riscv/riscv-vector-builtins-bases.cc
16170 (class vfmacc_frm): New class for vfmacc frm.
16171 (vfmacc_frm_obj): New declaration.
16173 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16174 * config/riscv/riscv-vector-builtins-functions.def
16175 (vfmacc_frm): New function definition.
16176 * config/riscv/riscv-vector-builtins.cc
16177 (function_expander::use_ternop_insn): Add frm operand support.
16178 * config/riscv/vector.md: Add vfmuladd to frm_mode.
16180 2023-08-04 Pan Li <pan2.li@intel.com>
16183 2023-08-04 Pan Li <pan2.li@intel.com>
16185 * config/riscv/riscv-vector-builtins-bases.cc
16186 (class vfnmacc_frm): New class for vfnmacc.
16187 (vfnmacc_frm_obj): New declaration.
16189 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16190 * config/riscv/riscv-vector-builtins-functions.def
16191 (vfnmacc_frm): New function definition.
16193 2023-08-04 Pan Li <pan2.li@intel.com>
16196 2023-08-04 Pan Li <pan2.li@intel.com>
16198 * config/riscv/riscv-vector-builtins-bases.cc
16199 (class vfmsac_frm): New class for vfmsac frm.
16200 (vfmsac_frm_obj): New declaration.
16202 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16203 * config/riscv/riscv-vector-builtins-functions.def
16204 (vfmsac_frm): New function definition.
16206 2023-08-04 Pan Li <pan2.li@intel.com>
16209 2023-08-04 Pan Li <pan2.li@intel.com>
16211 * config/riscv/riscv-vector-builtins-bases.cc
16212 (class vfnmsac_frm): New class for vfnmsac frm.
16213 (vfnmsac_frm_obj): New declaration.
16215 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16216 * config/riscv/riscv-vector-builtins-functions.def
16217 (vfnmsac_frm): New function definition.
16219 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
16221 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
16222 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
16223 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
16224 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
16225 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
16226 (attiny102, attiny104): New devices.
16227 * doc/avr-mmcu.texi: Regenerate.
16229 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
16231 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
16232 and PM_OFFSET entries.
16234 2023-08-04 Andrew Pinski <apinski@marvell.com>
16236 PR tree-optimization/110874
16237 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
16238 (gimple_maybe_cmp): Likewise.
16239 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
16240 and gimple_maybe_cmp instead of being recursive.
16241 * match.pd (bit_not_with_nop): New match pattern.
16242 (maybe_cmp): Likewise.
16244 2023-08-04 Drew Ross <drross@redhat.com>
16246 PR middle-end/101955
16247 * match.pd ((signed x << c) >> c): New canonicalization.
16249 2023-08-04 Pan Li <pan2.li@intel.com>
16251 * config/riscv/riscv-vector-builtins-bases.cc
16252 (class vfnmsac_frm): New class for vfnmsac frm.
16253 (vfnmsac_frm_obj): New declaration.
16255 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16256 * config/riscv/riscv-vector-builtins-functions.def
16257 (vfnmsac_frm): New function definition.
16259 2023-08-04 Pan Li <pan2.li@intel.com>
16261 * config/riscv/riscv-vector-builtins-bases.cc
16262 (class vfmsac_frm): New class for vfmsac frm.
16263 (vfmsac_frm_obj): New declaration.
16265 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16266 * config/riscv/riscv-vector-builtins-functions.def
16267 (vfmsac_frm): New function definition.
16269 2023-08-04 Pan Li <pan2.li@intel.com>
16271 * config/riscv/riscv-vector-builtins-bases.cc
16272 (class vfnmacc_frm): New class for vfnmacc.
16273 (vfnmacc_frm_obj): New declaration.
16275 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16276 * config/riscv/riscv-vector-builtins-functions.def
16277 (vfnmacc_frm): New function definition.
16279 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
16282 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
16283 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
16285 2023-08-04 Pan Li <pan2.li@intel.com>
16287 * config/riscv/riscv-vector-builtins-bases.cc
16288 (class vfmacc_frm): New class for vfmacc frm.
16289 (vfmacc_frm_obj): New declaration.
16291 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16292 * config/riscv/riscv-vector-builtins-functions.def
16293 (vfmacc_frm): New function definition.
16294 * config/riscv/riscv-vector-builtins.cc
16295 (function_expander::use_ternop_insn): Add frm operand support.
16296 * config/riscv/vector.md: Add vfmuladd to frm_mode.
16298 2023-08-04 Pan Li <pan2.li@intel.com>
16300 * config/riscv/riscv-vector-builtins-bases.cc
16301 (vfwmul_frm_obj): New declaration.
16302 (vfwmul_frm): Ditto.
16303 * config/riscv/riscv-vector-builtins-bases.h:
16304 (vfwmul_frm): Ditto.
16305 * config/riscv/riscv-vector-builtins-functions.def
16306 (vfwmul_frm): New function definition.
16307 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
16309 2023-08-04 Pan Li <pan2.li@intel.com>
16311 * config/riscv/riscv-vector-builtins-bases.cc
16312 (binop_frm): New declaration.
16313 (reverse_binop_frm): Likewise.
16315 * config/riscv/riscv-vector-builtins-bases.h:
16316 (vfdiv_frm): New extern declaration.
16317 (vfrdiv_frm): Likewise.
16318 * config/riscv/riscv-vector-builtins-functions.def
16319 (vfdiv_frm): New function definition.
16320 (vfrdiv_frm): Likewise.
16321 * config/riscv/vector.md: Add vfdiv to frm_mode.
16323 2023-08-03 Jan Hubicka <jh@suse.cz>
16325 * tree-cfg.cc (print_loop_info): Print entry count.
16327 2023-08-03 Jan Hubicka <jh@suse.cz>
16329 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
16331 2023-08-03 Jan Hubicka <jh@suse.cz>
16333 PR bootstrap/110857
16334 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
16335 unadjusted_exit_count.
16337 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
16339 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
16342 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
16344 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
16345 various Zicond patterns.
16346 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
16347 sfb_alu_operand for both arms of the conditional move.
16348 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
16350 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
16356 * config.gcc: Added core-builtins.cc and .o files.
16357 * config/bpf/bpf-passes.def: Removed file.
16358 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
16359 bpf_replace_core_move_operands): New prototypes.
16360 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
16361 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
16362 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
16363 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
16364 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
16366 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
16367 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
16368 (mov_reloc_core<mode>): Added.
16369 * config/bpf/core-builtins.cc (struct cr_builtin, enum
16370 cr_decision struct cr_local, struct cr_final, struct
16371 core_builtin_helpers, enum bpf_plugin_states): Added types.
16372 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
16374 (allocate_builtin_data, get_builtin-data, search_builtin_data,
16375 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
16376 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
16377 bpf_core_get_index, compute_field_expr,
16378 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
16379 process_field_expr, pack_enum_value, process_enum_value, pack_type,
16380 process_type, bpf_require_core_support, make_core_relo, read_kind,
16381 kind_access_index, kind_preserve_field_info, kind_enum_value,
16382 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
16383 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
16384 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
16385 bpf_expand_core_builtin, bpf_add_core_reloc,
16386 bpf_replace_core_move_operands): Added functions.
16387 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
16388 (bpf_init_core_builtins, bpf_expand_core_builtin,
16389 bpf_resolve_overloaded_core_builtin): Added functions.
16390 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
16391 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
16392 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
16393 * config/bpf/t-bpf: Added core-builtins.o.
16394 * doc/extend.texi: Added documentation for new BPF builtins.
16396 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
16398 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
16399 ranges to the call to relation_fold_and_or.
16400 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
16401 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
16402 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
16403 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
16404 a varying op1 and op2 to call.
16405 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
16406 (operator_equal::op1_op2_relation): New float version.
16407 (operator_not_equal::op1_op2_relation): Ditto.
16408 (operator_lt::op1_op2_relation): Ditto.
16409 (operator_le::op1_op2_relation): Ditto.
16410 (operator_gt::op1_op2_relation): Ditto.
16411 (operator_ge::op1_op2_relation) Ditto.
16412 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
16414 (operator_not_equal::op1_op2_relation): Ditto.
16415 (operator_lt::op1_op2_relation): Ditto.
16416 (operator_le::op1_op2_relation): Ditto.
16417 (operator_gt::op1_op2_relation): Ditto.
16418 (operator_ge::op1_op2_relation): Ditto.
16419 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
16421 (range_operator::op1_op2_relation): Add extra params.
16422 (operator_equal::op1_op2_relation): Ditto.
16423 (operator_not_equal::op1_op2_relation): Ditto.
16424 (operator_lt::op1_op2_relation): Ditto.
16425 (operator_le::op1_op2_relation): Ditto.
16426 (operator_gt::op1_op2_relation): Ditto.
16427 (operator_ge::op1_op2_relation): Ditto.
16428 * range-op.h (range_operator): New prototypes.
16429 (range_op_handler): Ditto.
16431 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
16433 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
16434 Use identity relation.
16435 (gori_compute::compute_operand2_range): Ditto.
16436 * value-relation.cc (get_identity_relation): New.
16437 * value-relation.h (get_identity_relation): New prototype.
16439 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
16441 * value-range.h (Value_Range::set_varying): Set the type.
16442 (Value_Range::set_zero): Ditto.
16443 (Value_Range::set_nonzero): Ditto.
16445 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
16447 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
16450 2023-08-03 Pan Li <pan2.li@intel.com>
16452 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
16454 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
16456 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
16458 2023-08-03 Richard Biener <rguenther@suse.de>
16460 PR tree-optimization/110838
16461 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
16462 Adjust the shift operand of RSHIFT_EXPRs.
16464 2023-08-03 Richard Biener <rguenther@suse.de>
16466 PR tree-optimization/110702
16467 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
16468 we created a NULL pointer based access rewrite that to
16471 2023-08-03 Richard Biener <rguenther@suse.de>
16473 * tree-ssa-sink.cc: Include tree-ssa-live.h.
16474 (pass_sink_code::execute): Instantiate virtual_operand_live
16476 (sink_code_in_bb): Pass down virtual_operand_live.
16477 (statement_sink_location): Get virtual_operand_live and
16478 verify we are not sinking loads across stores by looking up
16479 the live virtual operand at the sink location.
16481 2023-08-03 Richard Biener <rguenther@suse.de>
16483 * tree-ssa-live.h (class virtual_operand_live): New.
16484 * tree-ssa-live.cc (virtual_operand_live::init): New.
16485 (virtual_operand_live::get_live_in): Likewise.
16486 (virtual_operand_live::get_live_out): Likewise.
16488 2023-08-03 Richard Biener <rguenther@suse.de>
16490 * passes.def: Exchange loop splitting and final value
16491 replacement passes.
16493 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16495 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
16496 New function which handles bswap patterns for vec_perm_const.
16497 (vectorize_vec_perm_const_1): Call new function.
16498 * config/s390/vector.md (*bswap<mode>): Fix operands in output
16500 (*vstbr<mode>): New insn.
16502 2023-08-03 Alexandre Oliva <oliva@adacore.com>
16504 * config/vxworks-smp.opt: New. Introduce -msmp.
16505 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
16506 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
16507 lib_smp when -msmp is present in the command line.
16508 * doc/invoke.texi: Document it.
16510 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
16512 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
16513 when enabling -mno-omit-leaf-frame-pointer
16514 (riscv_option_override): Override omit-frame-pointer.
16515 (riscv_frame_pointer_required): Save s0 for non-leaf function
16516 (TARGET_FRAME_POINTER_REQUIRED): Override defination
16517 * config/riscv/riscv.opt: Add option support.
16519 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
16522 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
16523 place operand in a register before gen_<insn>64ti2_doubleword.
16524 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
16525 operand in a register before gen_<insn>32di2_doubleword.
16526 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
16527 (<any_rotate>64ti2_doubleword): Likewise.
16529 2023-08-03 Pan Li <pan2.li@intel.com>
16531 * config/riscv/riscv-vector-builtins-bases.cc
16532 (vfmul_frm_obj): New declaration.
16534 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
16535 * config/riscv/riscv-vector-builtins-functions.def
16536 (vfmul_frm): New function definition.
16537 * config/riscv/vector.md: Add vfmul to frm_mode.
16539 2023-08-03 Andrew Pinski <apinski@marvell.com>
16541 * match.pd (`~X & X`): Check that the types match.
16542 (`~x | x`, `~x ^ x`): Likewise.
16544 2023-08-03 Pan Li <pan2.li@intel.com>
16546 * config/riscv/riscv-vector-builtins-bases.h: Remove
16547 redudant declaration.
16549 2023-08-03 Pan Li <pan2.li@intel.com>
16551 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
16553 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
16554 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
16555 Add vfwsub function definitions.
16557 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16559 PR rtl-optimization/110867
16560 * combine.cc (simplify_compare_const): Try the optimization only
16561 in case the constant fits into the comparison mode.
16563 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
16565 * config/riscv/zicond.md: Remove incorrect zicond patterns and
16566 renumber/rename them.
16567 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
16569 2023-08-02 Richard Biener <rguenther@suse.de>
16571 * tree-phinodes.h (add_phi_node_to_bb): Remove.
16572 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
16574 2023-08-02 Jan Beulich <jbeulich@suse.com>
16576 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
16577 two of the alternatives.
16579 2023-08-02 Richard Biener <rguenther@suse.de>
16581 PR tree-optimization/92335
16582 * tree-ssa-sink.cc (select_best_block): Before loop
16583 optimizations avoid sinking unconditional loads/stores
16584 in innermost loops to conditional executed places.
16586 2023-08-02 Andrew Pinski <apinski@marvell.com>
16588 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
16589 the comparison operands before comparing them.
16591 2023-08-02 Andrew Pinski <apinski@marvell.com>
16593 * match.pd (`~X & X`, `~X | X`): Move over to
16594 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
16595 handles that already.
16596 Remove range test simplifications to true/false as they
16597 are now handled by these patterns.
16599 2023-08-02 Andrew Pinski <apinski@marvell.com>
16601 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
16602 statement's lhs and rhs to check if trivial dead.
16603 Rename inserted_exprs to exprs_maybe_dce; also move it so
16604 bitmap is not allocated if not needed.
16606 2023-08-02 Pan Li <pan2.li@intel.com>
16608 * config/riscv/riscv-vector-builtins-bases.cc
16609 (class widen_binop_frm): New class for binop frm.
16610 (BASE): Add vfwadd_frm.
16611 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
16612 * config/riscv/riscv-vector-builtins-functions.def
16613 (vfwadd_frm): New function definition.
16614 * config/riscv/riscv-vector-builtins-shapes.cc
16615 (BASE_NAME_MAX_LEN): New macro.
16616 (struct alu_frm_def): Leverage new base class.
16617 (struct build_frm_base): New build base for frm.
16618 (struct widen_alu_frm_def): New struct for widen alu frm.
16619 (SHAPE): Add widen_alu_frm shape.
16620 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
16621 * config/riscv/vector.md (frm_mode): Add vfwalu type.
16623 2023-08-02 Jan Hubicka <jh@suse.cz>
16625 * cfgloop.h (loop_count_in): Declare.
16626 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
16627 (loop_count_in): Move here from ...
16628 * cfgloopmanip.cc (loop_count_in): ... here.
16629 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
16631 2023-08-02 Jan Hubicka <jh@suse.cz>
16633 * cfg.cc (scale_strictly_dominated_blocks): New function.
16634 * cfg.h (scale_strictly_dominated_blocks): Declare.
16635 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
16637 2023-08-02 Richard Biener <rguenther@suse.de>
16639 PR rtl-optimization/110587
16640 * lra-spills.cc (return_regno_p): Remove.
16641 (regno_in_use_p): Likewise.
16642 (lra_final_code_change): Do not remove noop moves
16643 between hard registers.
16645 2023-08-02 liuhongt <hongtao.liu@intel.com>
16648 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
16649 HFmode, use mode iterator VFH instead.
16650 (vec_fmsubadd<mode>4): Ditto.
16651 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
16652 Remove scalar mode from iterator, use VFH_AVX512VL instead.
16653 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
16656 2023-08-02 liuhongt <hongtao.liu@intel.com>
16658 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
16659 pre_reload define_insn_and_split.
16661 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
16663 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
16664 using Zicond to implement some conditional moves.
16666 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
16668 * config/riscv/zicond.md: Use the X iterator instead of ANYI
16669 on the comparison input operands.
16671 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
16673 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
16675 (case SET): For INSNs that just set a REG, take the cost from the
16677 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
16679 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
16681 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
16682 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
16683 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
16684 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
16685 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
16686 (OPTION_MASK_ISA_ABM_SET):
16687 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
16689 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
16691 * config/s390/s390.cc (s390_encode_section_info): Assume external
16692 symbols without explicit alignment to be unaligned if
16693 -munaligned-symbols has been specified.
16694 * config/s390/s390.opt (-munaligned-symbols): New option.
16696 2023-08-01 Richard Ball <richard.ball@arm.com>
16698 * gimple-fold.cc (fold_ctor_reference):
16699 Add support for poly_int.
16701 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
16704 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
16705 LABEL_NUSES of new conditional branch instruction.
16707 2023-08-01 Jan Hubicka <jh@suse.cz>
16709 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
16710 constant prologue peeling.
16712 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
16714 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
16716 2023-08-01 Pan Li <pan2.li@intel.com>
16717 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16719 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
16720 (STATIC_FRM_P): Ditto.
16721 (struct mode_switching_info): New struct for mode switching.
16722 (struct machine_function): Add new field mode switching.
16723 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
16724 (riscv_frm_adjust_mode_after_call): New function for call mode.
16725 (riscv_frm_emit_after_call_in_bb_end): New function for emit
16726 insn when call as the end of bb.
16727 (riscv_frm_mode_needed): New function for frm mode needed.
16728 (frm_unknown_dynamic_p): Remove call check.
16729 (riscv_mode_needed): Extrac function for frm.
16730 (riscv_frm_mode_after): Add DYN_CALL after.
16731 (riscv_mode_entry): Remove backup rtl initialization.
16732 * config/riscv/vector.md (frm_mode): Add dyn_call.
16733 (fsrmsi_restore_exit): Rename to _volatile.
16734 (fsrmsi_restore_volatile): Likewise.
16736 2023-08-01 Pan Li <pan2.li@intel.com>
16738 * config/riscv/riscv-vector-builtins-bases.cc
16739 (class reverse_binop_frm): Add new template for reversed frm.
16740 (vfsub_frm_obj): New obj.
16741 (vfrsub_frm_obj): Likewise.
16742 * config/riscv/riscv-vector-builtins-bases.h:
16743 (vfsub_frm): New declaration.
16744 (vfrsub_frm): Likewise.
16745 * config/riscv/riscv-vector-builtins-functions.def
16746 (vfsub_frm): New function define.
16747 (vfrsub_frm): Likewise.
16749 2023-08-01 Andrew Pinski <apinski@marvell.com>
16751 PR tree-optimization/93044
16752 * match.pd (nested int casts): A truncation (to the same size or smaller)
16753 can always remove the inner cast.
16755 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
16758 * doc/invoke.texi (-Wmissing-variable-declarations): Document
16761 2023-07-31 Andrew Pinski <apinski@marvell.com>
16763 PR tree-optimization/106164
16764 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
16765 `a == b | a < b`, `a == b | a > b`): Handle these cases
16768 2023-07-31 Andrew Pinski <apinski@marvell.com>
16770 PR tree-optimization/106164
16771 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
16772 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
16774 2023-07-31 Andrew Pinski <apinski@marvell.com>
16776 PR tree-optimization/100864
16777 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
16778 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
16779 (gimple_bitwise_inverted_equal_p): New function.
16780 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
16781 instead of direct matching bit_not.
16783 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
16786 * gcc-ar.cc (main): Expand argv and use
16787 temporary response file to call ar if any
16788 expansions were made.
16790 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
16792 PR tree-optimization/110582
16793 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
16794 range vector for non-ssa names.
16796 2023-07-31 David Malcolm <dmalcolm@redhat.com>
16799 * diagnostic-client-data-hooks.h (class sarif_object): New forward
16801 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
16803 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
16804 (class sarif_invocation): Inherit from sarif_object rather than
16806 (class sarif_result): Likewise.
16807 (class sarif_ice_notification): Likewise.
16808 (sarif_object::get_or_create_properties): New.
16809 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
16810 to call the context's add_sarif_invocation_properties hook.
16811 (sarif_builder::flush_to_file): Pass m_context to
16812 sarif_invocation::prepare_to_flush.
16813 * diagnostic-format-sarif.h: New header.
16814 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
16815 writes to stderr. Document that if SARIF diagnostic output is
16816 requested then any timing information is written in JSON form as
16817 part of the SARIF output, rather than to stderr.
16818 * timevar.cc: Include "json.h".
16819 (timer::named_items::m_hash_map): Split out type into...
16820 (timer::named_items::hash_map_t): ...this new typedef.
16821 (timer::named_items::make_json): New function.
16822 (timevar_diff): New function.
16823 (make_json_for_timevar_time_def): New function.
16824 (timer::timevar_def::make_json): New function.
16825 (timer::make_json): New function.
16826 * timevar.h (class json::value): New forward decl.
16827 (timer::make_json): New decl.
16828 (timer::timevar_def::make_json): New decl.
16829 * tree-diagnostic-client-data-hooks.cc: Include
16830 "diagnostic-format-sarif.h" and "timevar.h".
16831 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
16834 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16836 * combine.cc (simplify_compare_const): Narrow comparison of
16837 memory and constant.
16838 (try_combine): Adapt new function signature.
16839 (simplify_comparison): Adapt new function signature.
16841 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
16843 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
16845 (expand_vector_init_insert_elems): Ditto.
16847 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
16850 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
16851 single_defuse_cycle while counting reduction_latency.
16853 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16855 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
16856 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
16857 (COND_ADD): Remove.
16862 (COND_RDIV): Ditto.
16865 (COND_FMIN): Ditto.
16866 (COND_FMAX): Ditto.
16874 (COND_FNMA): Ditto.
16875 (COND_FNMS): Ditto.
16877 (COND_LEN_ADD): Ditto.
16878 (COND_LEN_SUB): Ditto.
16879 (COND_LEN_MUL): Ditto.
16880 (COND_LEN_DIV): Ditto.
16881 (COND_LEN_MOD): Ditto.
16882 (COND_LEN_RDIV): Ditto.
16883 (COND_LEN_MIN): Ditto.
16884 (COND_LEN_MAX): Ditto.
16885 (COND_LEN_FMIN): Ditto.
16886 (COND_LEN_FMAX): Ditto.
16887 (COND_LEN_AND): Ditto.
16888 (COND_LEN_IOR): Ditto.
16889 (COND_LEN_XOR): Ditto.
16890 (COND_LEN_SHL): Ditto.
16891 (COND_LEN_SHR): Ditto.
16892 (COND_LEN_FMA): Ditto.
16893 (COND_LEN_FMS): Ditto.
16894 (COND_LEN_FNMA): Ditto.
16895 (COND_LEN_FNMS): Ditto.
16896 (COND_LEN_NEG): Ditto.
16897 (ADD): New macro define.
16918 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
16921 * config/i386/i386-features.cc (compute_convert_gain): Check
16922 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
16923 and V4SImode rotates in STV.
16924 (general_scalar_chain::convert_rotate): Likewise.
16926 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
16928 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
16929 * config/riscv/riscv-protos.h (get_mask_mode): Update return
16931 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
16933 (emit_vlmax_insn): Ditto.
16934 (emit_vlmax_fp_insn): Ditto.
16935 (emit_vlmax_ternary_insn): Ditto.
16936 (emit_vlmax_fp_ternary_insn): Ditto.
16937 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
16938 (emit_nonvlmax_insn): Ditto.
16939 (emit_vlmax_slide_insn): Ditto.
16940 (emit_nonvlmax_slide_tu_insn): Ditto.
16941 (emit_vlmax_merge_insn): Ditto.
16942 (emit_vlmax_masked_insn): Ditto.
16943 (emit_nonvlmax_masked_insn): Ditto.
16944 (emit_vlmax_masked_store_insn): Ditto.
16945 (emit_nonvlmax_masked_store_insn): Ditto.
16946 (emit_vlmax_masked_mu_insn): Ditto.
16947 (emit_nonvlmax_tu_insn): Ditto.
16948 (emit_nonvlmax_fp_tu_insn): Ditto.
16949 (emit_scalar_move_insn): Ditto.
16950 (emit_vlmax_compress_insn): Ditto.
16951 (emit_vlmax_reduction_insn): Ditto.
16952 (emit_vlmax_fp_reduction_insn): Ditto.
16953 (emit_nonvlmax_fp_reduction_insn): Ditto.
16954 (expand_vec_series): Ditto.
16955 (expand_vector_init_merge_repeating_sequence): Ditto.
16956 (expand_vec_perm): Ditto.
16957 (shuffle_merge_patterns): Ditto.
16958 (shuffle_compress_patterns): Ditto.
16959 (shuffle_decompress_patterns): Ditto.
16960 (expand_reduction): Ditto.
16961 (get_mask_mode): Update return type.
16962 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
16963 is valid, and use new get_mask_mode interface.
16965 2023-07-31 Pan Li <pan2.li@intel.com>
16967 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
16968 Move rm suffix before mask.
16970 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16972 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
16973 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
16976 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
16979 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
16980 (extzv<mode>): Likewise.
16981 (insv<mode>): Likewise.
16982 (*testqi_ext_3): Likewise.
16983 (*btr<mode>_2): Likewise.
16984 (define_split): Likewise.
16985 (*btsq_imm): Likewise.
16986 (*btrq_imm): Likewise.
16987 (*btcq_imm): Likewise.
16988 (define_peephole2 x3): Likewise.
16989 (*bt<mode>): Likewise
16990 (*bt<mode>_mask): New define_insn_and_split.
16991 (*jcc_bt<mode>): Use QImode for offsets.
16992 (*jcc_bt<mode>_1): Delete obsolete pattern.
16993 (*jcc_bt<mode>_mask): Use QImode offsets.
16994 (*jcc_bt<mode>_mask_1): Likewise.
16995 (define_split): Likewise.
16996 (*bt<mode>_setcqi): Likewise.
16997 (*bt<mode>_setncqi): Likewise.
16998 (*bt<mode>_setnc<mode>): Likewise.
16999 (*bt<mode>_setncqi_2): Likewise.
17000 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
17001 (bmi2_bzhi_<mode>3): Use QImode offsets.
17002 (*bmi2_bzhi_<mode>3): Likewise.
17003 (*bmi2_bzhi_<mode>3_1): Likewise.
17004 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
17005 (@tbm_bextri_<mode>): Likewise.
17007 2023-07-29 Jan Hubicka <jh@suse.cz>
17009 * profile-count.cc (profile_probability::sqrt): New member function.
17010 (profile_probability::pow): Likewise.
17011 * profile-count.h: (profile_probability::sqrt): Declare
17012 (profile_probability::pow): Likewise.
17013 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
17015 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
17017 * gimple-range-cache.cc (ssa_cache::merge_range): New.
17018 (ssa_lazy_cache::merge_range): New.
17019 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
17020 (class ssa_lazy_cache): Ditto.
17021 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
17023 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
17025 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
17026 Move from value-query.cc.
17027 (substitute_and_fold_engine::value_of_stmt): Ditto.
17028 (substitute_and_fold_engine::range_of_expr): New.
17029 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
17030 range_query. New prototypes.
17031 * value-query.cc (value_query::value_on_edge): Relocate.
17032 (value_query::value_of_stmt): Ditto.
17033 * value-query.h (class value_query): Remove.
17034 (class range_query): Remove base class. Adjust prototypes.
17036 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
17038 PR tree-optimization/110205
17039 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
17040 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
17041 Add final override.
17042 * range-op.cc (operator_lshift): Add missing final overrides.
17043 (operator_rshift): Ditto.
17045 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
17047 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
17048 optimizations in BPF target.
17050 2023-07-28 Honza <jh@ryzen4.suse.cz>
17052 * cfgloopmanip.cc (loop_count_in): Break out from ...
17053 (loop_exit_for_scaling): Break out from ...
17054 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
17055 add more sanity check and debug info.
17056 (scale_loop_profile): ... here.
17057 (create_empty_loop_on_edge): Fix whitespac.
17058 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
17059 * loop-unroll.cc (unroll_loop_constant_iterations): Use
17060 update_loop_exit_probability_scale_dom_bbs.
17061 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
17062 (tree_transform_and_unroll_loop): Use
17063 update_loop_exit_probability_scale_dom_bbs.
17064 * tree-ssa-loop-split.cc (split_loop): Use
17065 update_loop_exit_probability_scale_dom_bbs.
17067 2023-07-28 Jan Hubicka <jh@suse.cz>
17069 PR middle-end/77689
17070 * tree-ssa-loop-split.cc: Include value-query.h.
17071 (split_at_bb_p): Analyze cases where EQ/NE can be turned
17072 into LT/LE/GT/GE; return updated guard code.
17073 (split_loop): Use guard code.
17075 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
17076 Richard Biener <rguenther@suse.de>
17078 PR middle-end/28071
17079 PR rtl-optimization/110587
17080 * expr.cc (emit_group_load_1): Simplify logic for calling
17081 force_reg on ORIG_SRC, to avoid making a copy if the source
17082 is already in a pseudo register.
17084 2023-07-28 Jan Hubicka <jh@suse.cz>
17086 PR middle-end/106923
17087 * tree-ssa-loop-split.cc (connect_loops): Change probability
17088 of the test preconditioning second loop to very_likely.
17089 (fix_loop_bb_probability): Handle correctly case where
17090 on of the arms of the conditional is empty.
17091 (split_loop): Fold the test guarding first condition to
17092 see if it is constant true; Set correct entry block
17093 probabilities of the split loops; determine correct loop
17094 eixt probabilities.
17096 2023-07-28 xuli <xuli1@eswincomputing.com>
17098 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
17099 vsadd[u] and vssub[u].
17100 * config/riscv/vector.md: Ditto.
17102 2023-07-28 Jan Hubicka <jh@suse.cz>
17104 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
17105 loops when IV test is not overflowing.
17107 2023-07-28 liuhongt <hongtao.liu@intel.com>
17110 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
17112 (avx512cd_maskw_vec_dup<mode>): Ditto.
17114 2023-07-27 David Faust <david.faust@oracle.com>
17118 * config/bpf/bpf.opt (msmov): New option.
17119 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
17120 * config/bpf/bpf.md (*extendsidi2): New.
17121 (extendhidi2): New.
17122 (extendqidi2): New.
17123 (extendsisi2): New.
17124 (extendhisi2): New.
17125 (extendqisi2): New.
17126 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
17127 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
17128 also enables -msmov.
17130 2023-07-27 David Faust <david.faust@oracle.com>
17132 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
17133 Add -mbswap and -msdiv eBPF options.
17134 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
17135 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
17138 2023-07-27 David Faust <david.faust@oracle.com>
17140 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
17141 in pseudo-C dialect output template.
17142 (sub<AM:mode>3): Likewise.
17144 2023-07-27 Jan Hubicka <jh@suse.cz>
17146 * tree-vect-loop.cc (optimize_mask_stores): Make store
17149 2023-07-27 Jan Hubicka <jh@suse.cz>
17151 * cfgloop.h (single_dom_exit): Declare.
17152 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
17153 * cfgrtl.cc (struct cfg_hooks): Fix comment.
17154 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
17155 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
17156 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
17158 (tree_transform_and_unroll_loop): ... here;
17160 2023-07-27 Jan Hubicka <jh@suse.cz>
17162 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
17163 tree-ssa-loop-manip.cc and avoid recursion.
17164 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
17165 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
17167 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
17168 (scale_dominated_blocks_in_loop): Declare.
17169 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
17170 (change_edge_frequency): Remove.
17171 * predict.h (change_edge_frequency): Remove.
17172 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
17174 (niter_for_unrolled_loop): Remove.
17175 (tree_transform_and_unroll_loop): Fix profile update.
17177 2023-07-27 Jan Hubicka <jh@suse.cz>
17179 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
17180 to guessed; fix count of new_bb.
17182 2023-07-27 Jan Hubicka <jh@suse.cz>
17184 * profile-count.h (profile_count::apply_probability): Fix
17185 handling of uninitialized probabilities, optimize scaling
17188 2023-07-27 Richard Biener <rguenther@suse.de>
17190 PR tree-optimization/91838
17191 * gimple-match-head.cc: Include attribs.h and asan.h.
17192 * generic-match-head.cc: Likewise.
17193 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
17195 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17197 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
17198 (ADJUST_ALIGNMENT): Ditto.
17199 (ADJUST_PRECISION): Ditto.
17200 (VLS_MODES): Ditto.
17201 (VECTOR_MODE_WITH_PREFIX): Ditto.
17202 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
17203 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
17204 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
17205 (legitimize_move): Enable basic VLS modes support.
17206 (get_vlmul): Ditto.
17207 (get_ratio): Ditto.
17208 (get_vector_mode): Ditto.
17209 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
17210 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
17211 (VLS_ENTRY): New macro.
17212 (riscv_v_ext_mode_p): Add vls modes.
17213 (riscv_get_v_regno_alignment): New function.
17214 (riscv_print_operand): Add vls modes.
17215 (riscv_hard_regno_nregs): Ditto.
17216 (riscv_hard_regno_mode_ok): Ditto.
17217 (riscv_regmode_natural_size): Ditto.
17218 (riscv_vectorize_preferred_vector_alignment): Ditto.
17219 * config/riscv/riscv.md: Ditto.
17220 * config/riscv/vector-iterators.md: Ditto.
17221 * config/riscv/vector.md: Ditto.
17222 * config/riscv/autovec-vls.md: New file.
17224 2023-07-27 Pan Li <pan2.li@intel.com>
17226 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
17227 (vread_csr): Ditto.
17228 (vwrite_csr): Ditto.
17230 2023-07-27 demin.han <demin.han@starfivetech.com>
17232 * config/riscv/autovec.md: Delete which_alternative use in split
17234 2023-07-27 Richard Biener <rguenther@suse.de>
17236 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
17238 (pass_sink_code::execute): ... in the caller.
17240 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
17241 Richard Biener <rguenther@suse.de>
17243 PR tree-optimization/110776
17244 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
17247 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
17249 * config/riscv/riscv.md: Include zicond.md
17250 * config/riscv/zicond.md: New file.
17252 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
17254 * common/config/riscv/riscv-common.cc: New extension.
17255 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
17256 (TARGET_ZICOND): New target.
17258 2023-07-26 Carl Love <cel@us.ibm.com>
17260 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
17261 specifies the number of built-in arguments to check.
17262 (altivec_resolve_overloaded_builtin): Update calls to find_instance
17263 to pass the number of built-in arguments to be checked.
17265 2023-07-26 David Faust <david.faust@oracle.com>
17267 * config/bpf/bpf.opt (mv3-atomics): New option.
17268 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
17269 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
17270 (REG_CLASS_NAMES): Likewise.
17271 (REG_CLASS_CONTENTS): Likewise.
17272 (REGNO_REG_CLASS): Handle R0.
17273 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
17274 (UNSPEC_AAND): New unspec.
17275 (UNSPEC_AOR): Likewise.
17276 (UNSPEC_AXOR): Likewise.
17277 (UNSPEC_AFADD): Likewise.
17278 (UNSPEC_AFAND): Likewise.
17279 (UNSPEC_AFOR): Likewise.
17280 (UNSPEC_AFXOR): Likewise.
17281 (UNSPEC_AXCHG): Likewise.
17282 (UNSPEC_ACMPX): Likewise.
17283 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
17285 * config/bpf/atomic.md: ...Here. New file.
17286 * config/bpf/constraints.md (t): New constraint for R0.
17287 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
17289 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
17291 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
17294 2023-07-26 Carl Love <cel@us.ibm.com>
17296 * config/rs6000/rs6000-builtins.def: Rename
17297 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
17298 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
17299 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
17300 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
17301 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
17302 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
17303 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
17304 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
17305 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
17306 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
17307 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
17308 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
17309 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
17310 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
17311 * config/rs6000/rs6000-c.cc (find_instance): Add case
17312 RS6000_OVLD_VEC_REPLACE_UN.
17313 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
17314 Fix first argument type. Rename VREPLACE_UN_UV4SI as
17315 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
17316 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
17317 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
17318 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
17319 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
17320 REPLACE_ELT_V for vector modes.
17321 (REPLACE_ELT): New scalar mode iterator.
17322 (REPLACE_ELT_char): Add scalar attributes.
17323 (vreplace_un_<mode>): Change iterator and mode attribute.
17325 2023-07-26 David Malcolm <dmalcolm@redhat.com>
17328 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
17330 2023-07-26 Richard Biener <rguenther@suse.de>
17332 PR tree-optimization/106081
17333 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
17334 Assign layout -1 to splats.
17336 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
17338 * range-op-mixed.h (class operator_cast): Add update_bitmask.
17339 * range-op.cc (operator_cast::update_bitmask): New.
17340 (operator_cast::fold_range): Call update_bitmask.
17342 2023-07-26 Li Xu <xuli1@eswincomputing.com>
17344 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
17345 scalar type to float16, eliminate warning.
17346 (vfloat16mf4x3_t): Ditto.
17347 (vfloat16mf4x4_t): Ditto.
17348 (vfloat16mf4x5_t): Ditto.
17349 (vfloat16mf4x6_t): Ditto.
17350 (vfloat16mf4x7_t): Ditto.
17351 (vfloat16mf4x8_t): Ditto.
17352 (vfloat16mf2x2_t): Ditto.
17353 (vfloat16mf2x3_t): Ditto.
17354 (vfloat16mf2x4_t): Ditto.
17355 (vfloat16mf2x5_t): Ditto.
17356 (vfloat16mf2x6_t): Ditto.
17357 (vfloat16mf2x7_t): Ditto.
17358 (vfloat16mf2x8_t): Ditto.
17359 (vfloat16m1x2_t): Ditto.
17360 (vfloat16m1x3_t): Ditto.
17361 (vfloat16m1x4_t): Ditto.
17362 (vfloat16m1x5_t): Ditto.
17363 (vfloat16m1x6_t): Ditto.
17364 (vfloat16m1x7_t): Ditto.
17365 (vfloat16m1x8_t): Ditto.
17366 (vfloat16m2x2_t): Ditto.
17367 (vfloat16m2x3_t): Ditto.
17368 (vfloat16m2x4_t): Ditto.
17369 (vfloat16m4x2_t): Ditto.
17370 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
17371 * config/riscv/vector.md: add tuple mode in attr sew.
17373 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
17376 * config/i386/i386.md (plusminusmult): New code iterator.
17377 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
17378 (movq_<mode>_to_sse): New expander.
17379 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
17380 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
17381 as a wrapper around V4SFmode operation.
17382 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
17383 nonimmediate_operand.
17384 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
17385 operand 2 predicates to nonimmediate_operand.
17386 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
17387 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
17388 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
17389 operand 2 predicates to nonimmediate_operand.
17390 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
17391 nonimmediate_operand.
17392 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
17393 operand 2 predicates to nonimmediate_operand.
17394 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
17395 (<smaxmin:code>v2sf3): Ditto.
17396 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
17397 predicates to nonimmediate_operand.
17398 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
17399 operand 1 and operand 2 predicates to nonimmediate_operand.
17400 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
17401 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
17402 (*mmx_haddv2sf3_low): Ditto.
17403 (*mmx_hsubv2sf3_low): Ditto.
17404 (vec_addsubv2sf3): Ditto.
17405 (*mmx_maskcmpv2sf3_comm): Remove.
17406 (*mmx_maskcmpv2sf3): Remove.
17407 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
17408 (vcond<V2FI:mode>v2sf): Ditto.
17411 (fnmav2sf4): Ditto.
17412 (fnmsv2sf4): Ditto.
17413 (fix_truncv2sfv2si2): Ditto.
17414 (fixuns_truncv2sfv2si2): Ditto.
17415 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
17416 Change operand 1 predicate to nonimmediate_operand.
17417 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
17418 (floatunsv2siv2sf2): Ditto.
17419 (mmx_floatv2siv2sf2): Remove SSE alternatives.
17420 Change operand 1 predicate to nonimmediate_operand.
17421 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
17422 (rintv2sf2): Ditto.
17423 (lrintv2sfv2si2): Ditto.
17424 (ceilv2sf2): Ditto.
17425 (lceilv2sfv2si2): Ditto.
17426 (floorv2sf2): Ditto.
17427 (lfloorv2sfv2si2): Ditto.
17428 (btruncv2sf2): Ditto.
17429 (roundv2sf2): Ditto.
17430 (lroundv2sfv2si2): Ditto.
17431 (*mmx_roundv2sf2): Remove.
17433 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
17435 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
17437 2023-07-26 Richard Biener <rguenther@suse.de>
17439 PR tree-optimization/110799
17440 * tree-ssa-pre.cc (compute_avail): More thoroughly match
17441 up TBAA behavior of redundant loads.
17443 2023-07-26 Jakub Jelinek <jakub@redhat.com>
17445 PR tree-optimization/110755
17446 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
17447 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
17448 it is exact op1 + (-op1) or op1 - op1.
17450 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
17453 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
17454 operands output with "x".
17456 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
17458 * range-op.cc (class operator_absu): Add update_bitmask.
17459 (operator_absu::update_bitmask): New.
17461 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
17463 * range-op-mixed.h (class operator_abs): Add update_bitmask.
17464 * range-op.cc (operator_abs::update_bitmask): New.
17466 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
17468 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
17469 * range-op.cc (operator_bitwise_not::update_bitmask): New.
17471 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
17473 * range-op.cc (update_known_bitmask): Handle unary operators.
17475 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
17477 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
17479 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
17481 * config/riscv/riscv.md: Likewise.
17483 2023-07-26 Jan Hubicka <jh@suse.cz>
17485 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
17486 if we divide by zero.
17488 2023-07-25 David Faust <david.faust@oracle.com>
17490 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
17491 enclosing parentheses for pseudo-C dialect.
17492 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
17493 operands of pseudo-C dialect output templates where needed.
17494 (zero_extendqidi2): Likewise.
17495 (zero_extendsidi2): Likewise.
17496 (*mov<MM:mode>): Likewise.
17498 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
17500 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
17501 (bit_value_mult_const): Same.
17502 (get_individual_bits): Same.
17504 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
17507 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
17508 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
17509 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
17510 (minmax_op): New int attribute.
17511 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
17512 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
17513 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
17514 pattern to fmaxdf3.
17515 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
17517 2023-07-24 David Faust <david.faust@oracle.com>
17519 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
17521 2023-07-24 Drew Ross <drross@redhat.com>
17522 Jakub Jelinek <jakub@redhat.com>
17524 PR middle-end/109986
17525 * generic-match-head.cc (bitwise_equal_p): New macro.
17526 * gimple-match-head.cc (bitwise_equal_p): New macro.
17527 (gimple_nop_convert): Declare.
17528 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
17529 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
17531 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
17533 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
17534 single quote rather than backquote in diagnostic.
17536 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
17539 * config/bpf/bpf.opt: New command-line option -msdiv.
17540 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
17541 * config/bpf/bpf.cc (bpf_option_override): Initialize
17543 * doc/invoke.texi (eBPF Options): Document -msdiv.
17545 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
17547 * config/riscv/riscv.cc (riscv_option_override): Spell out
17548 greater than and use cannot in diagnostic string.
17550 2023-07-24 Richard Biener <rguenther@suse.de>
17552 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
17553 (_slp_tree::vec_stmts): Remove.
17554 (SLP_TREE_VEC_STMTS): Remove.
17555 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
17556 (_slp_tree::_slp_tree): Adjust.
17557 (_slp_tree::~_slp_tree): Likewise.
17558 (vect_get_slp_vect_def): Simplify.
17559 (vect_get_slp_defs): Likewise.
17560 (vect_transform_slp_perm_load_1): Adjust.
17561 (vect_add_slp_permutation): Likewise.
17562 (vect_schedule_slp_node): Likewise.
17563 (vectorize_slp_instance_root_stmt): Likewise.
17564 (vect_schedule_scc): Likewise.
17565 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
17566 (vectorizable_call): Likewise.
17567 (vectorizable_call): Likewise.
17568 (vect_create_vectorized_demotion_stmts): Likewise.
17569 (vectorizable_conversion): Likewise.
17570 (vectorizable_assignment): Likewise.
17571 (vectorizable_shift): Likewise.
17572 (vectorizable_operation): Likewise.
17573 (vectorizable_load): Likewise.
17574 (vectorizable_condition): Likewise.
17575 (vectorizable_comparison): Likewise.
17576 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
17577 (vectorize_fold_left_reduction): Use push_vec_def.
17578 (vect_transform_reduction): Likewise.
17579 (vect_transform_cycle_phi): Likewise.
17580 (vectorizable_lc_phi): Likewise.
17581 (vectorizable_phi): Likewise.
17582 (vectorizable_recurr): Likewise.
17583 (vectorizable_induction): Likewise.
17584 (vectorizable_live_operation): Likewise.
17586 2023-07-24 Richard Biener <rguenther@suse.de>
17588 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
17590 2023-07-24 Richard Biener <rguenther@suse.de>
17592 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
17593 * config/i386/i386-expand.cc: Likewise.
17594 * config/i386/i386-features.cc: Likewise.
17595 * config/i386/i386-options.cc: Likewise.
17597 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
17599 * tree-vect-stmts.cc (vectorizable_conversion): Handle
17600 more demotion/promotion for modifier == NONE.
17602 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
17607 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
17608 (extzv<mode>): Likewise.
17609 (insv<mode>): Likewise.
17610 (*testqi_ext_3): Likewise.
17611 (*btr<mode>_2): Likewise.
17612 (define_split): Likewise.
17613 (*btsq_imm): Likewise.
17614 (*btrq_imm): Likewise.
17615 (*btcq_imm): Likewise.
17616 (define_peephole2 x3): Likewise.
17617 (*bt<mode>): Likewise
17618 (*bt<mode>_mask): New define_insn_and_split.
17619 (*jcc_bt<mode>): Use QImode for offsets.
17620 (*jcc_bt<mode>_1): Delete obsolete pattern.
17621 (*jcc_bt<mode>_mask): Use QImode offsets.
17622 (*jcc_bt<mode>_mask_1): Likewise.
17623 (define_split): Likewise.
17624 (*bt<mode>_setcqi): Likewise.
17625 (*bt<mode>_setncqi): Likewise.
17626 (*bt<mode>_setnc<mode>): Likewise.
17627 (*bt<mode>_setncqi_2): Likewise.
17628 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
17629 (bmi2_bzhi_<mode>3): Use QImode offsets.
17630 (*bmi2_bzhi_<mode>3): Likewise.
17631 (*bmi2_bzhi_<mode>3_1): Likewise.
17632 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
17633 (@tbm_bextri_<mode>): Likewise.
17635 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
17637 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
17638 * config/bpf/bpf.opt (mkernel): Remove option.
17639 * config/bpf/bpf.cc (bpf_target_macros): Do not define
17640 BPF_KERNEL_VERSION_CODE.
17642 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
17645 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
17646 (mbswap): New option.
17647 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
17648 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
17649 * config/bpf/bpf.md: Use bswap instructions if available for
17650 bswap* insn, and fix constraint.
17651 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
17653 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17655 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
17656 (mask_len_fold_left_plus_<mode>): Ditto.
17657 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17658 (enum reduction_type): Ditto.
17659 (expand_reduction): Add in-order reduction.
17660 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
17661 (expand_reduction): Add in-order reduction.
17663 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17665 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
17666 (vectorize_fold_left_reduction): Ditto.
17667 (vectorizable_reduction): Ditto.
17668 (vect_transform_reduction): Ditto.
17670 2023-07-24 Richard Biener <rguenther@suse.de>
17672 PR tree-optimization/110777
17673 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
17674 Avoid propagating abnormals.
17676 2023-07-24 Richard Biener <rguenther@suse.de>
17678 PR tree-optimization/110766
17679 * tree-scalar-evolution.cc
17680 (analyze_and_compute_bitwise_induction_effect): Check the PHI
17681 is defined in the loop header.
17683 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
17685 PR tree-optimization/110740
17686 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
17687 loop with a single scalar iteration.
17689 2023-07-24 Pan Li <pan2.li@intel.com>
17691 * config/riscv/riscv-vector-builtins-shapes.cc
17692 (struct alu_frm_def): Take range check.
17694 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
17697 * config/riscv/predicates.md (const_0_operand): Add back
17700 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
17702 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
17703 64-bit insertions into TImode optimizations with -O0, unless
17704 the function has the "naked" attribute (for PR target/110533).
17706 2023-07-22 Andrew Pinski <apinski@marvell.com>
17709 * rtl.h (extended_count): Change last argument type
17712 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
17714 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
17715 (extzv<mode>): Likewise.
17716 (insv<mode>): Likewise.
17717 (*testqi_ext_3): Likewise.
17718 (*btr<mode>_2): Likewise.
17719 (define_split): Likewise.
17720 (*btsq_imm): Likewise.
17721 (*btrq_imm): Likewise.
17722 (*btcq_imm): Likewise.
17723 (define_peephole2 x3): Likewise.
17724 (*bt<mode>): Likewise
17725 (*bt<mode>_mask): New define_insn_and_split.
17726 (*jcc_bt<mode>): Use QImode for offsets.
17727 (*jcc_bt<mode>_1): Delete obsolete pattern.
17728 (*jcc_bt<mode>_mask): Use QImode offsets.
17729 (*jcc_bt<mode>_mask_1): Likewise.
17730 (define_split): Likewise.
17731 (*bt<mode>_setcqi): Likewise.
17732 (*bt<mode>_setncqi): Likewise.
17733 (*bt<mode>_setnc<mode>): Likewise.
17734 (*bt<mode>_setncqi_2): Likewise.
17735 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
17736 (bmi2_bzhi_<mode>3): Use QImode offsets.
17737 (*bmi2_bzhi_<mode>3): Likewise.
17738 (*bmi2_bzhi_<mode>3_1): Likewise.
17739 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
17740 (@tbm_bextri_<mode>): Likewise.
17742 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
17744 * config/bfin/bfin.md (ones): Fix length computation.
17746 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
17748 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
17749 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
17750 instead of FRAME_POINTER_REGNUM to spill pseudos.
17752 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
17753 Richard Biener <rguenther@suse.de>
17756 * gimplify.cc (gimplify_compound_lval): If the array's type
17757 is error_mark_node then return GS_ERROR.
17759 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
17762 * config/bpf/bpf.opt: Added option -masm=<dialect>.
17763 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
17764 * config/bpf/bpf.cc (bpf_print_register): New function.
17765 (bpf_print_register): Support pseudo-c syntax for registers.
17766 (bpf_print_operand_address): Likewise.
17767 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
17768 (ASSEMBLER_DIALECT): Define.
17769 * config/bpf/bpf.md: Added pseudo-c templates.
17770 * doc/invoke.texi (-masm=): New eBPF option item.
17772 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
17774 * config/bpf/bpf.md: fixed template for neg instruction.
17776 2023-07-21 Jan Hubicka <jh@suse.cz>
17779 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
17780 profiles by vectorization factor.
17781 (vect_transform_loop): Check for flat profiles.
17783 2023-07-21 Jan Hubicka <jh@suse.cz>
17785 * cfgloop.h (maybe_flat_loop_profile): Declare
17786 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
17787 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
17789 2023-07-21 Jan Hubicka <jh@suse.cz>
17791 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
17792 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
17793 * predict.cc (estimate_bb_frequencies): Likewise.
17794 * profile.cc (branch_prob): Likewise.
17795 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
17797 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
17799 * config.in: Regenerate.
17800 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
17801 (LINK_COMMAND_SPEC_A): Add demangle handling.
17802 * configure: Regenerate.
17803 * configure.ac: Detect linker support for '-demangle'.
17805 2023-07-21 Jan Hubicka <jh@suse.cz>
17807 * sreal.cc (sreal::to_nearest_int): New.
17808 (sreal_verify_basics): Verify also to_nearest_int.
17809 (verify_aritmetics): Likewise.
17810 (sreal_verify_conversions): New.
17811 (sreal_cc_tests): Call sreal_verify_conversions.
17812 * sreal.h: (sreal::to_nearest_int): Declare
17814 2023-07-21 Jan Hubicka <jh@suse.cz>
17816 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
17817 (should_duplicate_loop_header_p): Return info on profitability.
17818 (do_while_loop_p): Watch for constant conditionals.
17819 (update_profile_after_ch): Do not sanity check that all
17820 static exits are taken.
17821 (ch_base::copy_headers): Run on all loops.
17822 (pass_ch::process_loop_p): Improve heuristics by handling also
17823 do_while loop and duplicating shortest sequence containing all
17826 2023-07-21 Jan Hubicka <jh@suse.cz>
17828 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
17829 tests first; update finite_p flag.
17831 2023-07-21 Jan Hubicka <jh@suse.cz>
17833 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
17834 * cfgloop.h (print_loop_info): Declare.
17835 * tree-cfg.cc (print_loop_info): Break out from ...; add
17836 printing of missing fields and profile
17837 (print_loop): ... here.
17839 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17841 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
17843 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17845 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
17846 (vectorizable_operation): Ditto.
17848 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17850 * config/riscv/autovec.md: Align order of mask and len.
17851 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
17852 (expand_gather_scatter): Ditto.
17853 * doc/md.texi: Ditto.
17854 * internal-fn.cc (add_len_and_mask_args): Ditto.
17855 (add_mask_and_len_args): Ditto.
17856 (expand_partial_load_optab_fn): Ditto.
17857 (expand_partial_store_optab_fn): Ditto.
17858 (expand_scatter_store_optab_fn): Ditto.
17859 (expand_gather_load_optab_fn): Ditto.
17860 (internal_fn_len_index): Ditto.
17861 (internal_fn_mask_index): Ditto.
17862 (internal_len_load_store_bias): Ditto.
17863 * tree-vect-stmts.cc (vectorizable_store): Ditto.
17864 (vectorizable_load): Ditto.
17866 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17868 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
17869 (mask_len_load<mode><vm>): Ditto.
17870 (len_maskstore<mode><vm>): Ditto.
17871 (mask_len_store<mode><vm>): Ditto.
17872 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
17873 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
17874 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
17875 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
17876 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
17877 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
17878 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
17879 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
17880 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
17881 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
17882 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
17883 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
17884 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
17885 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
17886 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
17887 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
17888 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
17889 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
17890 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
17891 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
17892 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
17893 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
17894 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
17895 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
17896 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
17897 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
17898 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
17899 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
17900 * doc/md.texi: Ditto.
17901 * genopinit.cc (main): Ditto.
17902 (CMP_NAME): Ditto. Ditto.
17903 * gimple-fold.cc (arith_overflowed_p): Ditto.
17904 (gimple_fold_partial_load_store_mem_ref): Ditto.
17905 (gimple_fold_call): Ditto.
17906 * internal-fn.cc (len_maskload_direct): Ditto.
17907 (mask_len_load_direct): Ditto.
17908 (len_maskstore_direct): Ditto.
17909 (mask_len_store_direct): Ditto.
17910 (expand_call_mem_ref): Ditto.
17911 (expand_len_maskload_optab_fn): Ditto.
17912 (expand_mask_len_load_optab_fn): Ditto.
17913 (expand_len_maskstore_optab_fn): Ditto.
17914 (expand_mask_len_store_optab_fn): Ditto.
17915 (direct_len_maskload_optab_supported_p): Ditto.
17916 (direct_mask_len_load_optab_supported_p): Ditto.
17917 (direct_len_maskstore_optab_supported_p): Ditto.
17918 (direct_mask_len_store_optab_supported_p): Ditto.
17919 (internal_load_fn_p): Ditto.
17920 (internal_store_fn_p): Ditto.
17921 (internal_gather_scatter_fn_p): Ditto.
17922 (internal_fn_len_index): Ditto.
17923 (internal_fn_mask_index): Ditto.
17924 (internal_fn_stored_value_index): Ditto.
17925 (internal_len_load_store_bias): Ditto.
17926 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
17927 (MASK_LEN_GATHER_LOAD): Ditto.
17928 (LEN_MASK_LOAD): Ditto.
17929 (MASK_LEN_LOAD): Ditto.
17930 (LEN_MASK_SCATTER_STORE): Ditto.
17931 (MASK_LEN_SCATTER_STORE): Ditto.
17932 (LEN_MASK_STORE): Ditto.
17933 (MASK_LEN_STORE): Ditto.
17934 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
17935 (supports_vec_scatter_store_p): Ditto.
17936 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
17937 (target_supports_len_load_store_p): Ditto.
17938 * optabs.def (OPTAB_CD): Ditto.
17939 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
17940 (call_may_clobber_ref_p_1): Ditto.
17941 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
17942 (dse_optimize_stmt): Ditto.
17943 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
17944 (get_alias_ptr_type_for_ptr_address): Ditto.
17945 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
17946 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
17947 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
17948 (vect_get_strided_load_store_ops): Ditto.
17949 (vectorizable_store): Ditto.
17950 (vectorizable_load): Ditto.
17952 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
17954 * config/i386/i386.opt: Fix a typo.
17956 2023-07-21 Richard Biener <rguenther@suse.de>
17958 PR tree-optimization/88540
17959 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
17960 with NaNs but handle the simple case by if-converting to a
17963 2023-07-21 Andrew Pinski <apinski@marvell.com>
17965 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
17968 2023-07-21 Richard Biener <rguenther@suse.de>
17970 PR tree-optimization/110742
17971 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
17972 Do not materialize an edge permutation in an external node with
17974 (vect_slp_analyze_node_operations_1): Guard purely internal
17977 2023-07-21 Jan Hubicka <jh@suse.cz>
17979 * cfgloop.cc: Include sreal.h.
17980 (flow_loop_dump): Dump sreal iteration exsitmate.
17981 (get_estimated_loop_iterations): Update.
17982 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
17983 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
17984 (expected_loop_iterations_unbounded): Use new API.
17985 * cfgloopmanip.cc (scale_loop_profile): Use
17986 expected_loop_iterations_by_profile
17987 * predict.cc (pass_profile::execute): Likewise.
17988 * profile.cc (branch_prob): Likewise.
17989 * tree-ssa-loop-niter.cc: Include sreal.h.
17990 (estimate_numbers_of_iterations): Likewise
17992 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
17994 PR tree-optimization/110744
17995 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
17996 operand for ifn IFN_LEN_STORE.
17998 2023-07-21 liuhongt <hongtao.liu@intel.com>
18001 * common.opt: (fcf-protection=): Add EnumSet attribute to
18002 support combination of params.
18004 2023-07-21 David Malcolm <dmalcolm@redhat.com>
18006 PR middle-end/110612
18007 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
18009 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
18010 (table_geometry::table_y_to_canvas_y): Likewise.
18011 * text-art/table.h (table_geometry::m_table): Drop unused field.
18012 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
18015 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
18018 * config/i386/i386-features.cc
18019 (general_scalar_chain::compute_convert_gain): Calculate gain
18020 for extend higpart case.
18021 (general_scalar_chain::convert_op): Handle
18022 ASHIFTRT/ASHIFT combined RTX.
18023 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
18024 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
18025 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
18026 New define_insn_and_split pattern.
18027 (*extendv2di2_highpart_stv): Ditto.
18029 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
18031 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
18034 2023-07-20 Andrew Pinski <apinski@marvell.com>
18036 * combine.cc (dump_combine_stats): Remove.
18037 (dump_combine_total_stats): Remove.
18038 (total_attempts, total_merges, total_extras,
18039 total_successes): Remove.
18040 (combine_instructions): Don't increment total stats
18041 instead use statistics_counter_event.
18042 * dumpfile.cc (print_combine_total_stats): Remove.
18043 * dumpfile.h (print_combine_total_stats): Remove.
18044 (dump_combine_total_stats): Remove.
18045 * passes.cc (finish_optimization_passes):
18046 Don't call print_combine_total_stats.
18047 * rtl.h (dump_combine_total_stats): Remove.
18048 (dump_combine_stats): Remove.
18050 2023-07-20 Jan Hubicka <jh@suse.cz>
18052 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
18055 2023-07-20 Martin Jambor <mjambor@suse.cz>
18057 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
18058 (analyzer-text-art-ideal-canvas-width): Likewise.
18059 (analyzer-text-art-string-ellipsis-head-len): Likewise.
18060 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
18062 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18064 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
18065 Refine code structure.
18067 2023-07-20 Jan Hubicka <jh@suse.cz>
18069 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
18070 (get_range_query): ... this one; do
18071 (static_loop_exit): Add query parametr, turn ranger to reference.
18072 (loop_static_stmt_p): New function.
18073 (loop_static_op_p): New function.
18074 (loop_iv_derived_p): Remove.
18075 (loop_combined_static_and_iv_p): New function.
18076 (should_duplicate_loop_header_p): Discover combined onditionals;
18077 do not track iv derived; improve dumps.
18078 (pass_ch::execute): Fix whitespace.
18080 2023-07-20 Richard Biener <rguenther@suse.de>
18082 PR tree-optimization/110204
18083 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
18084 Look through copies generated by PRE.
18086 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
18088 * tree-vect-stmts.cc (get_group_load_store_type): Account for
18089 `gap` when checking if need to peel twice.
18091 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
18093 PR middle-end/77928
18094 * doc/extend.texi: Document iseqsig builtin.
18095 * builtins.cc (fold_builtin_iseqsig): New function.
18096 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
18097 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
18098 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
18100 2023-07-20 Pan Li <pan2.li@intel.com>
18102 * config/riscv/vector.md: Fix incorrect match_operand.
18104 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
18106 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
18107 force_reg, to use SUBREG rather than create a new pseudo when
18108 inserting DFmode fields into TImode with insvti_{high,low}part.
18109 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
18110 define_insn_and_split...
18111 (*concatditi3_3): 64-bit implementation. Provide alternative
18112 that allows register allocation to use SSE registers that is
18113 split into vec_concatv2di after reload.
18114 (*concatsidi3_3): 32-bit implementation.
18116 2023-07-20 Richard Biener <rguenther@suse.de>
18118 PR middle-end/61747
18119 * internal-fn.cc (expand_vec_cond_optab_fn): When the
18120 value operands are equal to the original comparison operands
18121 preserve that equality by re-using the comparison expansion.
18122 * optabs.cc (emit_conditional_move): When the value operands
18123 are equal to the comparison operands and would be forced to
18124 a register by prepare_cmp_insn do so earlier, preserving the
18127 2023-07-20 Pan Li <pan2.li@intel.com>
18129 * config/riscv/vector.md: Align pattern format.
18131 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
18133 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
18134 Granite Rapids{, D} from documentation.
18136 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18138 * config/riscv/autovec.md
18139 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
18140 Refactor RVV machine modes.
18141 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
18142 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
18143 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
18144 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
18145 (len_mask_gather_load<mode><mode>): Ditto.
18146 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
18147 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
18148 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
18149 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
18150 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
18151 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
18152 (len_mask_scatter_store<mode><mode>): Ditto.
18153 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
18154 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
18155 (ADJUST_NUNITS): Ditto.
18156 (ADJUST_ALIGNMENT): Ditto.
18157 (ADJUST_BYTESIZE): Ditto.
18158 (ADJUST_PRECISION): Ditto.
18159 (RVV_MODES): Ditto.
18160 (RVV_WHOLE_MODES): Ditto.
18161 (RVV_FRACT_MODE): Ditto.
18162 (RVV_NF8_MODES): Ditto.
18163 (RVV_NF4_MODES): Ditto.
18164 (VECTOR_MODES_WITH_PREFIX): Ditto.
18165 (VECTOR_MODE_WITH_PREFIX): Ditto.
18166 (RVV_TUPLE_MODES): Ditto.
18167 (RVV_NF2_MODES): Ditto.
18168 (RVV_TUPLE_PARTIAL_MODES): Ditto.
18169 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
18171 (TUPLE_ENTRY): Ditto.
18172 (get_vlmul): Ditto.
18174 (get_ratio): Ditto.
18175 (preferred_simd_mode): Ditto.
18176 (autovectorize_vector_modes): Ditto.
18177 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
18178 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
18179 (vbool64_t): Ditto.
18180 (vbool32_t): Ditto.
18181 (vbool16_t): Ditto.
18186 (vint8mf8_t): Ditto.
18187 (vuint8mf8_t): Ditto.
18188 (vint8mf4_t): Ditto.
18189 (vuint8mf4_t): Ditto.
18190 (vint8mf2_t): Ditto.
18191 (vuint8mf2_t): Ditto.
18192 (vint8m1_t): Ditto.
18193 (vuint8m1_t): Ditto.
18194 (vint8m2_t): Ditto.
18195 (vuint8m2_t): Ditto.
18196 (vint8m4_t): Ditto.
18197 (vuint8m4_t): Ditto.
18198 (vint8m8_t): Ditto.
18199 (vuint8m8_t): Ditto.
18200 (vint16mf4_t): Ditto.
18201 (vuint16mf4_t): Ditto.
18202 (vint16mf2_t): Ditto.
18203 (vuint16mf2_t): Ditto.
18204 (vint16m1_t): Ditto.
18205 (vuint16m1_t): Ditto.
18206 (vint16m2_t): Ditto.
18207 (vuint16m2_t): Ditto.
18208 (vint16m4_t): Ditto.
18209 (vuint16m4_t): Ditto.
18210 (vint16m8_t): Ditto.
18211 (vuint16m8_t): Ditto.
18212 (vint32mf2_t): Ditto.
18213 (vuint32mf2_t): Ditto.
18214 (vint32m1_t): Ditto.
18215 (vuint32m1_t): Ditto.
18216 (vint32m2_t): Ditto.
18217 (vuint32m2_t): Ditto.
18218 (vint32m4_t): Ditto.
18219 (vuint32m4_t): Ditto.
18220 (vint32m8_t): Ditto.
18221 (vuint32m8_t): Ditto.
18222 (vint64m1_t): Ditto.
18223 (vuint64m1_t): Ditto.
18224 (vint64m2_t): Ditto.
18225 (vuint64m2_t): Ditto.
18226 (vint64m4_t): Ditto.
18227 (vuint64m4_t): Ditto.
18228 (vint64m8_t): Ditto.
18229 (vuint64m8_t): Ditto.
18230 (vfloat16mf4_t): Ditto.
18231 (vfloat16mf2_t): Ditto.
18232 (vfloat16m1_t): Ditto.
18233 (vfloat16m2_t): Ditto.
18234 (vfloat16m4_t): Ditto.
18235 (vfloat16m8_t): Ditto.
18236 (vfloat32mf2_t): Ditto.
18237 (vfloat32m1_t): Ditto.
18238 (vfloat32m2_t): Ditto.
18239 (vfloat32m4_t): Ditto.
18240 (vfloat32m8_t): Ditto.
18241 (vfloat64m1_t): Ditto.
18242 (vfloat64m2_t): Ditto.
18243 (vfloat64m4_t): Ditto.
18244 (vfloat64m8_t): Ditto.
18245 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
18246 (TUPLE_ENTRY): Ditto.
18247 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
18248 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
18249 (riscv_v_adjust_nunits): Ditto.
18250 (riscv_v_adjust_bytesize): Ditto.
18251 (riscv_v_adjust_precision): Ditto.
18252 (riscv_convert_vector_bits): Ditto.
18253 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
18254 * config/riscv/riscv.md: Ditto.
18255 * config/riscv/vector-iterators.md: Ditto.
18256 * config/riscv/vector.md
18257 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
18258 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
18259 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
18260 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
18261 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
18262 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
18263 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
18264 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
18265 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
18266 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
18267 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
18268 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
18269 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
18270 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
18271 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
18272 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
18273 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
18274 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
18275 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
18276 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
18277 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
18278 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
18279 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
18280 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
18281 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
18282 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
18283 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
18284 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
18285 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
18286 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
18287 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
18288 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
18289 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
18291 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
18293 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
18294 (lra_asm_insn_error): New prototype.
18295 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
18297 (lra_spill): Call lra_update_fp2sp_elimination.
18298 * lra-eliminations.cc: Remove trailing spaces.
18299 (elimination_fp2sp_occured_p): New static flag.
18300 (lra_eliminate_regs_1): Set the flag up.
18301 (update_reg_eliminate): Modify the assert for stack to frame
18302 pointer elimination.
18303 (lra_update_fp2sp_elimination): New function.
18304 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
18306 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
18308 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
18310 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
18311 dependencies from target pragmas.
18312 * config/aarch64/arm_fp16.h (target): Likewise.
18313 * config/aarch64/arm_neon.h (target): Likewise.
18315 2023-07-19 Andrew Pinski <apinski@marvell.com>
18317 PR tree-optimization/110252
18318 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
18319 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
18320 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
18321 (match_simplify_replacement): Temporarily
18322 remove the flow sensitive info on the two statements that might
18325 2023-07-19 Andrew Pinski <apinski@marvell.com>
18327 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
18328 with flow_sensitive_info_storage.
18329 (follow_outer_ssa_edges): Update how to save off the flow
18331 (maybe_fold_comparisons_from_match_pd): Update restoring
18332 of flow sensitive info.
18333 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
18334 (flow_sensitive_info_storage::restore): New method.
18335 (flow_sensitive_info_storage::save_and_clear): New method.
18336 (flow_sensitive_info_storage::clear_storage): New method.
18337 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
18339 2023-07-19 Andrew Pinski <apinski@marvell.com>
18341 PR tree-optimization/110726
18342 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
18343 Add checks to make sure the type was one bit precision
18346 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18348 * doc/md.texi: Add mask_len_fold_left_plus.
18349 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
18350 (expand_mask_len_fold_left_optab_fn): Ditto.
18351 (direct_mask_len_fold_left_optab_supported_p): Ditto.
18352 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
18353 * optabs.def (OPTAB_D): Ditto.
18355 2023-07-19 Jakub Jelinek <jakub@redhat.com>
18357 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
18359 2023-07-19 Jakub Jelinek <jakub@redhat.com>
18361 PR tree-optimization/110731
18362 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
18363 divisor as UNSIGNED regardless of sgn.
18365 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
18367 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
18368 (standard_extensions_p): Add check.
18369 (riscv_subset_list::add): Just return NULL if it failed before.
18370 (riscv_subset_list::parse_std_ext): Continue parse when find a error
18371 (riscv_subset_list::parse): Just return NULL if it failed before.
18372 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
18374 2023-07-19 Jan Beulich <jbeulich@suse.com>
18376 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
18378 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
18379 gen_vec_extract_hi.
18380 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
18381 gen_vec_interleave_low. Rename local variable.
18383 2023-07-19 Jan Beulich <jbeulich@suse.com>
18385 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
18386 alternative. Move AVX512VL part of condition to new "enabled"
18389 2023-07-19 liuhongt <hongtao.liu@intel.com>
18392 * config/i386/i386-builtins.cc
18393 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
18394 (ix86_register_bf16_builtin_type): Ditto.
18395 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
18396 isn't available, undef the macros which are used to check the
18397 backend support of the _Float16/__bf16 types when building
18398 libstdc++ and libgcc.
18399 * config/i386/i386.cc (construct_container): Issue errors for
18400 HFmode/BFmode when TARGET_SSE2 is not available.
18401 (function_value_32): Ditto.
18402 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
18403 (ix86_libgcc_floating_mode_supported_p): Ditto.
18404 (ix86_emit_support_tinfos): Adjust codes.
18405 (ix86_invalid_conversion): Return diagnostic message string
18406 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
18407 (ix86_invalid_unary_op): New function.
18408 (ix86_invalid_binary_op): Ditto.
18409 (TARGET_INVALID_UNARY_OP): Define.
18410 (TARGET_INVALID_BINARY_OP): Define.
18411 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
18412 related instrinsics header files.
18413 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
18415 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
18417 * dwarf2asm.cc: Change FALSE to false.
18418 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
18419 * dwarf2out.cc (matches_main_base): Change return type from
18420 int to bool. Change "last_match" variable to bool.
18421 (dump_struct_debug): Change return type from int to bool.
18422 Change "matches" and "result" function arguments to bool.
18423 (is_pseudo_reg): Change return type from int to bool.
18424 (is_tagged_type): Ditto.
18425 (same_loc_p): Ditto.
18426 (same_dw_val_p): Change return type from int to bool and adjust
18427 function body accordingly.
18428 (same_attr_p): Ditto.
18429 (same_die_p): Ditto.
18430 (is_type_die): Ditto.
18431 (is_declaration_die): Ditto.
18432 (should_move_die_to_comdat): Ditto.
18433 (is_base_type): Ditto.
18434 (is_based_loc): Ditto.
18435 (local_scope_p): Ditto.
18436 (class_scope_p): Ditto.
18437 (class_or_namespace_scope_p): Ditto.
18438 (is_tagged_type): Ditto.
18439 (is_rust): Use void argument.
18440 (is_nested_in_subprogram): Change return type from int to bool.
18441 (contains_subprogram_definition): Ditto.
18442 (gen_struct_or_union_type_die): Change "nested", "complete"
18443 and "ns_decl" variables to bool.
18444 (is_naming_typedef_decl): Change FALSE to false.
18446 2023-07-18 Jan Hubicka <jh@suse.cz>
18448 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
18449 for queries not in headers.
18450 (static_loop_exit): Add basic blck parameter; update use of
18452 (should_duplicate_loop_header_p): Add ranger and static_exits
18453 parameter. Do not account statements that will be optimized
18454 out after duplicaiton in overall size. Add ranger query to
18456 (update_profile_after_ch): Take static_exits has set instead of
18457 single eliminated_edge.
18458 (ch_base::copy_headers): Do all analysis in the first pass;
18459 remember invariant_exits and static_exits.
18461 2023-07-18 Jason Merrill <jason@redhat.com>
18463 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
18465 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
18467 * doc/gm2.texi (Semantic checking): Change example testwithptr
18470 2023-07-18 Richard Biener <rguenther@suse.de>
18472 PR middle-end/105715
18473 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
18474 (pass_gimple_isel::execute): ... this. Duplicate
18475 comparison defs of COND_EXPRs.
18477 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18479 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
18480 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
18481 (riscv_convert_vector_bits): Ditto.
18483 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18485 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
18486 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
18488 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
18490 * config/s390/vx-builtins.md: New vsel pattern.
18492 2023-07-18 liuhongt <hongtao.liu@intel.com>
18495 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
18496 Remove # from assemble output.
18498 2023-07-18 liuhongt <hongtao.liu@intel.com>
18501 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
18502 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
18503 3 define_peephole2 after the pattern.
18505 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18507 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
18509 2023-07-18 Pan Li <pan2.li@intel.com>
18510 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18512 * config/riscv/riscv.cc (struct machine_function): Add new field.
18513 (riscv_static_frm_mode_p): New function.
18514 (riscv_emit_frm_mode_set): New function for emit FRM.
18515 (riscv_emit_mode_set): Extract function for FRM.
18516 (riscv_mode_needed): Fix the TODO.
18517 (riscv_mode_entry): Initial dynamic frm RTL.
18518 (riscv_mode_exit): Return DYN_EXIT.
18519 * config/riscv/riscv.md: Add rdfrm.
18520 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
18521 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
18523 (fsrmsi_backup): New pattern for swap.
18524 (fsrmsi_restore): New pattern for restore.
18525 (fsrmsi_restore_exit): New pattern for restore exit.
18526 (frrmsi): New pattern for backup.
18528 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
18530 * doc/extend.texi: Add @cindex on __auto_type.
18532 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
18534 * combine-stack-adj.cc (stack_memref_p): Change return type from
18535 int to bool and adjust function body accordingly.
18536 (rest_of_handle_stack_adjustments): Change return type to void.
18538 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
18540 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
18541 (cant_combine_insn_p): Change return type from int to bool and adjust
18542 function body accordingly.
18543 (can_combine_p): Ditto.
18544 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
18545 function arguments from int to bool.
18546 (contains_muldiv): Change return type from int to bool and adjust
18547 function body accordingly.
18548 (try_combine): Ditto. Change "new_direct_jump" pointer function
18549 argument from int to bool. Change "substed_i2", "substed_i1",
18550 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
18551 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
18552 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
18553 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
18554 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
18555 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
18557 (subst): Change "in_dest", "in_cond" and "unique_copy" function
18558 arguments from int to bool.
18559 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
18560 arguments from int to bool.
18561 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
18562 function argument from int to bool.
18563 (force_int_to_mode): Change "just_select" function argument
18564 from int to bool. Change "next_select" variable to bool.
18565 (rtx_equal_for_field_assignment_p): Change return type from
18566 int to bool and adjust function body accordingly.
18567 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
18568 argument from int to bool.
18569 (get_last_value_validate): Change return type from int to bool
18570 and adjust function body accordingly.
18571 (reg_dead_at_p): Ditto.
18572 (reg_bitfield_target_p): Ditto.
18573 (combine_instructions): Ditto. Change "new_direct_jump"
18575 (can_combine_p): Change return type from int to bool
18576 and adjust function body accordingly.
18577 (likely_spilled_retval_p): Ditto.
18578 (can_change_dest_mode): Change "added_sets" function argument
18580 (find_split_point): Change "unsignedp" variable to bool.
18581 (simplify_if_then_else): Change "comparison_p" and "swapped"
18583 (simplify_set): Change "other_changed" variable to bool.
18584 (expand_compound_operation): Change "unsignedp" variable to bool.
18585 (force_to_mode): Change "just_select" function argument
18586 from int to bool. Change "next_select" variable to bool.
18587 (extended_count): Change "unsignedp" function argument to bool.
18588 (simplify_shift_const_1): Change "complement_p" variable to bool.
18589 (simplify_comparison): Change "changed" variable to bool.
18590 (rest_of_handle_combine): Change return type to void.
18592 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18595 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
18597 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
18599 * ira.cc (setup_reg_class_relations): Continue
18600 if regclass cl3 is hard_reg_set_empty_p.
18602 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18604 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
18606 2023-07-17 Martin Jambor <mjambor@suse.cz>
18608 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
18611 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
18613 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
18615 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
18618 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
18619 recur add all implied extensions.
18620 (riscv_subset_list::check_implied_ext): Add new method.
18621 (riscv_subset_list::parse): Call checker check_implied_ext.
18622 * config/riscv/riscv-subset.h: Add new method.
18624 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18626 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
18627 (reduc_smax_scal_<mode>): Ditto.
18628 (reduc_umax_scal_<mode>): Ditto.
18629 (reduc_smin_scal_<mode>): Ditto.
18630 (reduc_umin_scal_<mode>): Ditto.
18631 (reduc_and_scal_<mode>): Ditto.
18632 (reduc_ior_scal_<mode>): Ditto.
18633 (reduc_xor_scal_<mode>): Ditto.
18634 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
18635 (expand_reduction): New function.
18636 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
18637 (emit_vlmax_fp_reduction_insn): Ditto.
18638 (get_m1_mode): Ditto.
18639 (expand_cond_len_binop): Fix name.
18640 (expand_reduction): New function
18641 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
18642 (validate_change_or_fail): New function.
18643 (change_insn): Fix VSETVL BUG.
18644 (change_vsetvl_insn): Ditto.
18645 (pass_vsetvl::backward_demand_fusion): Ditto.
18646 (pass_vsetvl::df_post_optimization): Ditto.
18648 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
18650 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
18652 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
18654 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
18655 Remove parameter name from declaration of unused parameter.
18657 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
18659 PR tree-optimization/110652
18660 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
18663 2023-07-17 Richard Biener <rguenther@suse.de>
18665 PR tree-optimization/110669
18666 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
18667 Check we matched a header PHI.
18669 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
18671 * tree-ssanames.cc (set_bitmask): New.
18672 * tree-ssanames.h (set_bitmask): New.
18674 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
18676 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
18678 * value-range.h (irange_bitmask::union_): Normalize beforehand.
18679 (irange_bitmask::intersect): Same.
18681 2023-07-17 Andrew Pinski <apinski@marvell.com>
18683 PR tree-optimization/95923
18684 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
18686 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
18688 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
18689 to the std::sort comparison lambda function const.
18691 2023-07-17 Andrew Pinski <apinski@marvell.com>
18693 PR tree-optimization/110666
18694 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
18696 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
18698 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
18699 Arrow Lake and Arrow Lake S.
18700 * common/config/i386/i386-common.cc:
18701 (processor_name): Add arrowlake.
18702 (processor_alias_table): Add arrow lake, arrow lake s and lunar
18704 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
18705 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
18706 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
18707 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
18709 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
18711 * config/i386/i386-options.cc (m_ARROWLAKE): New.
18712 (processor_cost_table): Add arrowlake.
18713 * config/i386/i386.h (enum processor_type):
18714 Add PROCESSOR_ARROWLAKE.
18715 * config/i386/x86-tune.def: Add m_ARROWLAKE.
18716 * doc/extend.texi: Add arrowlake and arrowlake-s.
18717 * doc/invoke.texi: Ditto.
18719 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
18721 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
18722 have the same iterator. Also renaming all the occurence to
18724 (usdot_prod<mode>): New define_expand.
18725 (udot_prod<mode>): Ditto.
18727 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
18729 * common/config/i386/cpuinfo.h (get_available_features):
18731 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
18732 OPTION_MASK_ISA2_SM4_UNSET): New.
18733 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
18734 (ix86_handle_option): Handle -msm4.
18735 * common/config/i386/i386-cpuinfo.h (enum processor_features):
18737 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
18739 * config.gcc: Add sm4intrin.h.
18740 * config/i386/cpuid.h (bit_SM4): New.
18741 * config/i386/i386-builtin.def (BDESC): Add new builtins.
18742 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
18744 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
18745 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
18746 (ix86_valid_target_attribute_inner_p): Handle sm4.
18747 * config/i386/i386.opt: Add option -msm4.
18748 * config/i386/immintrin.h: Include sm4intrin.h
18749 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
18750 (vsm4rnds4_<mode>): Ditto.
18751 * doc/extend.texi: Document sm4.
18752 * doc/invoke.texi: Document -msm4.
18753 * doc/sourcebuild.texi: Document target sm4.
18754 * config/i386/sm4intrin.h: New file.
18756 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
18758 * common/config/i386/cpuinfo.h (get_available_features):
18760 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
18761 OPTION_MASK_ISA2_SHA512_UNSET): New.
18762 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
18763 (ix86_handle_option): Handle -msha512.
18764 * common/config/i386/i386-cpuinfo.h (enum processor_features):
18765 Add FEATURE_SHA512.
18766 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
18768 * config.gcc: Add sha512intrin.h.
18769 * config/i386/cpuid.h (bit_SHA512): New.
18770 * config/i386/i386-builtin-types.def:
18771 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
18772 * config/i386/i386-builtin.def (BDESC): Add new builtins.
18773 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
18775 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
18776 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
18777 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
18778 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
18779 (ix86_valid_target_attribute_inner_p): Handle sha512.
18780 * config/i386/i386.opt: Add option -msha512.
18781 * config/i386/immintrin.h: Include sha512intrin.h.
18782 * config/i386/sse.md (vsha512msg1): New define insn.
18783 (vsha512msg2): Ditto.
18784 (vsha512rnds2): Ditto.
18785 * doc/extend.texi: Document sha512.
18786 * doc/invoke.texi: Document -msha512.
18787 * doc/sourcebuild.texi: Document target sha512.
18788 * config/i386/sha512intrin.h: New file.
18790 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
18792 * common/config/i386/cpuinfo.h (get_available_features):
18794 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
18795 OPTION_MASK_ISA2_SM3_UNSET): New.
18796 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
18797 (ix86_handle_option): Handle -msm3.
18798 * common/config/i386/i386-cpuinfo.h (enum processor_features):
18800 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
18802 * config.gcc: Add sm3intrin.h
18803 * config/i386/cpuid.h (bit_SM3): New.
18804 * config/i386/i386-builtin-types.def:
18805 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
18806 * config/i386/i386-builtin.def (BDESC): Add new builtins.
18807 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
18809 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
18810 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
18811 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
18812 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
18813 (ix86_valid_target_attribute_inner_p): Handle sm3.
18814 * config/i386/i386.opt: Add option -msm3.
18815 * config/i386/immintrin.h: Include sm3intrin.h.
18816 * config/i386/sse.md (vsm3msg1): New define insn.
18818 (vsm3rnds2): Ditto.
18819 * doc/extend.texi: Document sm3.
18820 * doc/invoke.texi: Document -msm3.
18821 * doc/sourcebuild.texi: Document target sm3.
18822 * config/i386/sm3intrin.h: New file.
18824 2023-07-17 Kong Lingling <lingling.kong@intel.com>
18825 Haochen Jiang <haochen.jiang@intel.com>
18827 * common/config/i386/cpuinfo.h (get_available_features): Detect
18829 * common/config/i386/i386-common.cc
18830 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
18831 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
18832 (ix86_handle_option): Handle -mavxvnniint16.
18833 * common/config/i386/i386-cpuinfo.h (enum processor_features):
18834 Add FEATURE_AVXVNNIINT16.
18835 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
18837 * config.gcc: Add avxvnniint16.h.
18838 * config/i386/avxvnniint16intrin.h: New file.
18839 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
18840 * config/i386/i386-builtin.def: Add new builtins.
18841 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
18843 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
18844 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
18845 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
18846 * config/i386/i386.opt: Add option -mavxvnniint16.
18847 * config/i386/immintrin.h: Include avxvnniint16.h.
18848 * config/i386/sse.md
18849 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
18850 * doc/extend.texi: Document avxvnniint16.
18851 * doc/invoke.texi: Document -mavxvnniint16.
18852 * doc/sourcebuild.texi: Document target avxvnniint16.
18854 2023-07-16 Jan Hubicka <jh@suse.cz>
18856 PR middle-end/110649
18857 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
18858 (vect_transform_loop): Move scale_profile_for_vect_loop after
18859 upper bound updates.
18861 2023-07-16 Jan Hubicka <jh@suse.cz>
18863 PR tree-optimization/110649
18864 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
18865 probability of the if-then-else construct.
18867 2023-07-16 Jan Hubicka <jh@suse.cz>
18869 PR middle-end/110649
18870 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
18872 2023-07-15 Andrew Pinski <apinski@marvell.com>
18874 * doc/contrib.texi: Update my entry.
18876 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
18878 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
18880 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
18881 (tld_load): Likewise.
18882 (tgd_load_pic): Change to expander.
18883 (tld_load_pic, tld_offset_load, tp_load): Likewise.
18884 (tie_load_pic, tle_load): Likewise.
18885 (tgd_load_picsi, tgd_load_picdi): New.
18886 (tld_load_picsi, tld_load_picdi): New.
18887 (tld_offset_load<P:mode>): New.
18888 (tp_load<P:mode>): New.
18889 (tie_load_picsi, tie_load_picdi): New.
18890 (tle_load<P:mode>): New.
18892 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
18894 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
18895 (vcmlaq_rot180, vcmlaq_rot270): New.
18896 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
18897 (vcmlaq_rot180, vcmlaq_rot270): New.
18898 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
18899 (vcmlaq_rot180, vcmlaq_rot270): New.
18900 * config/arm/arm-mve-builtins.cc
18901 (function_instance::has_inactive_argument): Handle vcmlaq,
18902 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
18903 * config/arm/arm_mve.h (vcmlaq): Delete.
18904 (vcmlaq_rot180): Delete.
18905 (vcmlaq_rot270): Delete.
18906 (vcmlaq_rot90): Delete.
18907 (vcmlaq_m): Delete.
18908 (vcmlaq_rot180_m): Delete.
18909 (vcmlaq_rot270_m): Delete.
18910 (vcmlaq_rot90_m): Delete.
18911 (vcmlaq_f16): Delete.
18912 (vcmlaq_rot180_f16): Delete.
18913 (vcmlaq_rot270_f16): Delete.
18914 (vcmlaq_rot90_f16): Delete.
18915 (vcmlaq_f32): Delete.
18916 (vcmlaq_rot180_f32): Delete.
18917 (vcmlaq_rot270_f32): Delete.
18918 (vcmlaq_rot90_f32): Delete.
18919 (vcmlaq_m_f32): Delete.
18920 (vcmlaq_m_f16): Delete.
18921 (vcmlaq_rot180_m_f32): Delete.
18922 (vcmlaq_rot180_m_f16): Delete.
18923 (vcmlaq_rot270_m_f32): Delete.
18924 (vcmlaq_rot270_m_f16): Delete.
18925 (vcmlaq_rot90_m_f32): Delete.
18926 (vcmlaq_rot90_m_f16): Delete.
18927 (__arm_vcmlaq_f16): Delete.
18928 (__arm_vcmlaq_rot180_f16): Delete.
18929 (__arm_vcmlaq_rot270_f16): Delete.
18930 (__arm_vcmlaq_rot90_f16): Delete.
18931 (__arm_vcmlaq_f32): Delete.
18932 (__arm_vcmlaq_rot180_f32): Delete.
18933 (__arm_vcmlaq_rot270_f32): Delete.
18934 (__arm_vcmlaq_rot90_f32): Delete.
18935 (__arm_vcmlaq_m_f32): Delete.
18936 (__arm_vcmlaq_m_f16): Delete.
18937 (__arm_vcmlaq_rot180_m_f32): Delete.
18938 (__arm_vcmlaq_rot180_m_f16): Delete.
18939 (__arm_vcmlaq_rot270_m_f32): Delete.
18940 (__arm_vcmlaq_rot270_m_f16): Delete.
18941 (__arm_vcmlaq_rot90_m_f32): Delete.
18942 (__arm_vcmlaq_rot90_m_f16): Delete.
18943 (__arm_vcmlaq): Delete.
18944 (__arm_vcmlaq_rot180): Delete.
18945 (__arm_vcmlaq_rot270): Delete.
18946 (__arm_vcmlaq_rot90): Delete.
18947 (__arm_vcmlaq_m): Delete.
18948 (__arm_vcmlaq_rot180_m): Delete.
18949 (__arm_vcmlaq_rot270_m): Delete.
18950 (__arm_vcmlaq_rot90_m): Delete.
18952 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
18954 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
18955 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
18956 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
18957 (mve_insn): Add vcmla.
18958 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
18960 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
18962 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
18963 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
18964 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
18965 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
18967 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
18969 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
18971 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
18972 (vcmulq_rot180, vcmulq_rot270): New.
18973 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
18974 (vcmulq_rot180, vcmulq_rot270): New.
18975 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
18976 (vcmulq_rot180, vcmulq_rot270): New.
18977 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
18978 (vcmulq_rot270): Delete.
18979 (vcmulq_rot180): Delete.
18981 (vcmulq_m): Delete.
18982 (vcmulq_rot180_m): Delete.
18983 (vcmulq_rot270_m): Delete.
18984 (vcmulq_rot90_m): Delete.
18985 (vcmulq_x): Delete.
18986 (vcmulq_rot90_x): Delete.
18987 (vcmulq_rot180_x): Delete.
18988 (vcmulq_rot270_x): Delete.
18989 (vcmulq_rot90_f16): Delete.
18990 (vcmulq_rot270_f16): Delete.
18991 (vcmulq_rot180_f16): Delete.
18992 (vcmulq_f16): Delete.
18993 (vcmulq_rot90_f32): Delete.
18994 (vcmulq_rot270_f32): Delete.
18995 (vcmulq_rot180_f32): Delete.
18996 (vcmulq_f32): Delete.
18997 (vcmulq_m_f32): Delete.
18998 (vcmulq_m_f16): Delete.
18999 (vcmulq_rot180_m_f32): Delete.
19000 (vcmulq_rot180_m_f16): Delete.
19001 (vcmulq_rot270_m_f32): Delete.
19002 (vcmulq_rot270_m_f16): Delete.
19003 (vcmulq_rot90_m_f32): Delete.
19004 (vcmulq_rot90_m_f16): Delete.
19005 (vcmulq_x_f16): Delete.
19006 (vcmulq_x_f32): Delete.
19007 (vcmulq_rot90_x_f16): Delete.
19008 (vcmulq_rot90_x_f32): Delete.
19009 (vcmulq_rot180_x_f16): Delete.
19010 (vcmulq_rot180_x_f32): Delete.
19011 (vcmulq_rot270_x_f16): Delete.
19012 (vcmulq_rot270_x_f32): Delete.
19013 (__arm_vcmulq_rot90_f16): Delete.
19014 (__arm_vcmulq_rot270_f16): Delete.
19015 (__arm_vcmulq_rot180_f16): Delete.
19016 (__arm_vcmulq_f16): Delete.
19017 (__arm_vcmulq_rot90_f32): Delete.
19018 (__arm_vcmulq_rot270_f32): Delete.
19019 (__arm_vcmulq_rot180_f32): Delete.
19020 (__arm_vcmulq_f32): Delete.
19021 (__arm_vcmulq_m_f32): Delete.
19022 (__arm_vcmulq_m_f16): Delete.
19023 (__arm_vcmulq_rot180_m_f32): Delete.
19024 (__arm_vcmulq_rot180_m_f16): Delete.
19025 (__arm_vcmulq_rot270_m_f32): Delete.
19026 (__arm_vcmulq_rot270_m_f16): Delete.
19027 (__arm_vcmulq_rot90_m_f32): Delete.
19028 (__arm_vcmulq_rot90_m_f16): Delete.
19029 (__arm_vcmulq_x_f16): Delete.
19030 (__arm_vcmulq_x_f32): Delete.
19031 (__arm_vcmulq_rot90_x_f16): Delete.
19032 (__arm_vcmulq_rot90_x_f32): Delete.
19033 (__arm_vcmulq_rot180_x_f16): Delete.
19034 (__arm_vcmulq_rot180_x_f32): Delete.
19035 (__arm_vcmulq_rot270_x_f16): Delete.
19036 (__arm_vcmulq_rot270_x_f32): Delete.
19037 (__arm_vcmulq_rot90): Delete.
19038 (__arm_vcmulq_rot270): Delete.
19039 (__arm_vcmulq_rot180): Delete.
19040 (__arm_vcmulq): Delete.
19041 (__arm_vcmulq_m): Delete.
19042 (__arm_vcmulq_rot180_m): Delete.
19043 (__arm_vcmulq_rot270_m): Delete.
19044 (__arm_vcmulq_rot90_m): Delete.
19045 (__arm_vcmulq_x): Delete.
19046 (__arm_vcmulq_rot90_x): Delete.
19047 (__arm_vcmulq_rot180_x): Delete.
19048 (__arm_vcmulq_rot270_x): Delete.
19050 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
19052 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
19053 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
19054 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
19055 (MVE_VCADDQ_VCMULQ_M): New.
19056 (mve_insn): Add vcmul.
19057 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
19060 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
19062 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
19063 @mve_<mve_insn>q<mve_rot>_f<mode>.
19064 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
19065 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
19066 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
19068 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
19070 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
19071 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
19072 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
19073 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
19074 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
19075 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
19076 * config/arm/arm-mve-builtins-functions.h (class
19077 unspec_mve_function_exact_insn_rot): New.
19078 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
19079 (vcaddq_rot270): Delete.
19080 (vhcaddq_rot90): Delete.
19081 (vhcaddq_rot270): Delete.
19082 (vcaddq_rot270_m): Delete.
19083 (vcaddq_rot90_m): Delete.
19084 (vhcaddq_rot270_m): Delete.
19085 (vhcaddq_rot90_m): Delete.
19086 (vcaddq_rot90_x): Delete.
19087 (vcaddq_rot270_x): Delete.
19088 (vhcaddq_rot90_x): Delete.
19089 (vhcaddq_rot270_x): Delete.
19090 (vcaddq_rot90_u8): Delete.
19091 (vcaddq_rot270_u8): Delete.
19092 (vhcaddq_rot90_s8): Delete.
19093 (vhcaddq_rot270_s8): Delete.
19094 (vcaddq_rot90_s8): Delete.
19095 (vcaddq_rot270_s8): Delete.
19096 (vcaddq_rot90_u16): Delete.
19097 (vcaddq_rot270_u16): Delete.
19098 (vhcaddq_rot90_s16): Delete.
19099 (vhcaddq_rot270_s16): Delete.
19100 (vcaddq_rot90_s16): Delete.
19101 (vcaddq_rot270_s16): Delete.
19102 (vcaddq_rot90_u32): Delete.
19103 (vcaddq_rot270_u32): Delete.
19104 (vhcaddq_rot90_s32): Delete.
19105 (vhcaddq_rot270_s32): Delete.
19106 (vcaddq_rot90_s32): Delete.
19107 (vcaddq_rot270_s32): Delete.
19108 (vcaddq_rot90_f16): Delete.
19109 (vcaddq_rot270_f16): Delete.
19110 (vcaddq_rot90_f32): Delete.
19111 (vcaddq_rot270_f32): Delete.
19112 (vcaddq_rot270_m_s8): Delete.
19113 (vcaddq_rot270_m_s32): Delete.
19114 (vcaddq_rot270_m_s16): Delete.
19115 (vcaddq_rot270_m_u8): Delete.
19116 (vcaddq_rot270_m_u32): Delete.
19117 (vcaddq_rot270_m_u16): Delete.
19118 (vcaddq_rot90_m_s8): Delete.
19119 (vcaddq_rot90_m_s32): Delete.
19120 (vcaddq_rot90_m_s16): Delete.
19121 (vcaddq_rot90_m_u8): Delete.
19122 (vcaddq_rot90_m_u32): Delete.
19123 (vcaddq_rot90_m_u16): Delete.
19124 (vhcaddq_rot270_m_s8): Delete.
19125 (vhcaddq_rot270_m_s32): Delete.
19126 (vhcaddq_rot270_m_s16): Delete.
19127 (vhcaddq_rot90_m_s8): Delete.
19128 (vhcaddq_rot90_m_s32): Delete.
19129 (vhcaddq_rot90_m_s16): Delete.
19130 (vcaddq_rot270_m_f32): Delete.
19131 (vcaddq_rot270_m_f16): Delete.
19132 (vcaddq_rot90_m_f32): Delete.
19133 (vcaddq_rot90_m_f16): Delete.
19134 (vcaddq_rot90_x_s8): Delete.
19135 (vcaddq_rot90_x_s16): Delete.
19136 (vcaddq_rot90_x_s32): Delete.
19137 (vcaddq_rot90_x_u8): Delete.
19138 (vcaddq_rot90_x_u16): Delete.
19139 (vcaddq_rot90_x_u32): Delete.
19140 (vcaddq_rot270_x_s8): Delete.
19141 (vcaddq_rot270_x_s16): Delete.
19142 (vcaddq_rot270_x_s32): Delete.
19143 (vcaddq_rot270_x_u8): Delete.
19144 (vcaddq_rot270_x_u16): Delete.
19145 (vcaddq_rot270_x_u32): Delete.
19146 (vhcaddq_rot90_x_s8): Delete.
19147 (vhcaddq_rot90_x_s16): Delete.
19148 (vhcaddq_rot90_x_s32): Delete.
19149 (vhcaddq_rot270_x_s8): Delete.
19150 (vhcaddq_rot270_x_s16): Delete.
19151 (vhcaddq_rot270_x_s32): Delete.
19152 (vcaddq_rot90_x_f16): Delete.
19153 (vcaddq_rot90_x_f32): Delete.
19154 (vcaddq_rot270_x_f16): Delete.
19155 (vcaddq_rot270_x_f32): Delete.
19156 (__arm_vcaddq_rot90_u8): Delete.
19157 (__arm_vcaddq_rot270_u8): Delete.
19158 (__arm_vhcaddq_rot90_s8): Delete.
19159 (__arm_vhcaddq_rot270_s8): Delete.
19160 (__arm_vcaddq_rot90_s8): Delete.
19161 (__arm_vcaddq_rot270_s8): Delete.
19162 (__arm_vcaddq_rot90_u16): Delete.
19163 (__arm_vcaddq_rot270_u16): Delete.
19164 (__arm_vhcaddq_rot90_s16): Delete.
19165 (__arm_vhcaddq_rot270_s16): Delete.
19166 (__arm_vcaddq_rot90_s16): Delete.
19167 (__arm_vcaddq_rot270_s16): Delete.
19168 (__arm_vcaddq_rot90_u32): Delete.
19169 (__arm_vcaddq_rot270_u32): Delete.
19170 (__arm_vhcaddq_rot90_s32): Delete.
19171 (__arm_vhcaddq_rot270_s32): Delete.
19172 (__arm_vcaddq_rot90_s32): Delete.
19173 (__arm_vcaddq_rot270_s32): Delete.
19174 (__arm_vcaddq_rot270_m_s8): Delete.
19175 (__arm_vcaddq_rot270_m_s32): Delete.
19176 (__arm_vcaddq_rot270_m_s16): Delete.
19177 (__arm_vcaddq_rot270_m_u8): Delete.
19178 (__arm_vcaddq_rot270_m_u32): Delete.
19179 (__arm_vcaddq_rot270_m_u16): Delete.
19180 (__arm_vcaddq_rot90_m_s8): Delete.
19181 (__arm_vcaddq_rot90_m_s32): Delete.
19182 (__arm_vcaddq_rot90_m_s16): Delete.
19183 (__arm_vcaddq_rot90_m_u8): Delete.
19184 (__arm_vcaddq_rot90_m_u32): Delete.
19185 (__arm_vcaddq_rot90_m_u16): Delete.
19186 (__arm_vhcaddq_rot270_m_s8): Delete.
19187 (__arm_vhcaddq_rot270_m_s32): Delete.
19188 (__arm_vhcaddq_rot270_m_s16): Delete.
19189 (__arm_vhcaddq_rot90_m_s8): Delete.
19190 (__arm_vhcaddq_rot90_m_s32): Delete.
19191 (__arm_vhcaddq_rot90_m_s16): Delete.
19192 (__arm_vcaddq_rot90_x_s8): Delete.
19193 (__arm_vcaddq_rot90_x_s16): Delete.
19194 (__arm_vcaddq_rot90_x_s32): Delete.
19195 (__arm_vcaddq_rot90_x_u8): Delete.
19196 (__arm_vcaddq_rot90_x_u16): Delete.
19197 (__arm_vcaddq_rot90_x_u32): Delete.
19198 (__arm_vcaddq_rot270_x_s8): Delete.
19199 (__arm_vcaddq_rot270_x_s16): Delete.
19200 (__arm_vcaddq_rot270_x_s32): Delete.
19201 (__arm_vcaddq_rot270_x_u8): Delete.
19202 (__arm_vcaddq_rot270_x_u16): Delete.
19203 (__arm_vcaddq_rot270_x_u32): Delete.
19204 (__arm_vhcaddq_rot90_x_s8): Delete.
19205 (__arm_vhcaddq_rot90_x_s16): Delete.
19206 (__arm_vhcaddq_rot90_x_s32): Delete.
19207 (__arm_vhcaddq_rot270_x_s8): Delete.
19208 (__arm_vhcaddq_rot270_x_s16): Delete.
19209 (__arm_vhcaddq_rot270_x_s32): Delete.
19210 (__arm_vcaddq_rot90_f16): Delete.
19211 (__arm_vcaddq_rot270_f16): Delete.
19212 (__arm_vcaddq_rot90_f32): Delete.
19213 (__arm_vcaddq_rot270_f32): Delete.
19214 (__arm_vcaddq_rot270_m_f32): Delete.
19215 (__arm_vcaddq_rot270_m_f16): Delete.
19216 (__arm_vcaddq_rot90_m_f32): Delete.
19217 (__arm_vcaddq_rot90_m_f16): Delete.
19218 (__arm_vcaddq_rot90_x_f16): Delete.
19219 (__arm_vcaddq_rot90_x_f32): Delete.
19220 (__arm_vcaddq_rot270_x_f16): Delete.
19221 (__arm_vcaddq_rot270_x_f32): Delete.
19222 (__arm_vcaddq_rot90): Delete.
19223 (__arm_vcaddq_rot270): Delete.
19224 (__arm_vhcaddq_rot90): Delete.
19225 (__arm_vhcaddq_rot270): Delete.
19226 (__arm_vcaddq_rot270_m): Delete.
19227 (__arm_vcaddq_rot90_m): Delete.
19228 (__arm_vhcaddq_rot270_m): Delete.
19229 (__arm_vhcaddq_rot90_m): Delete.
19230 (__arm_vcaddq_rot90_x): Delete.
19231 (__arm_vcaddq_rot270_x): Delete.
19232 (__arm_vhcaddq_rot90_x): Delete.
19233 (__arm_vhcaddq_rot270_x): Delete.
19235 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
19237 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
19238 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
19239 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
19240 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
19241 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
19242 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
19244 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
19245 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
19246 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
19247 VHCADDQ_ROT270_M_S.
19248 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
19249 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
19250 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
19251 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
19252 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
19253 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
19255 (VCADDQ_ROT270_M): Delete.
19256 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
19257 (VCADDQ_ROT90_M): Delete.
19258 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
19259 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
19261 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
19262 (mve_vcaddq<mve_rot><mode>): Rename into ...
19263 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
19264 (mve_vcaddq_rot270_m_<supf><mode>)
19265 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
19266 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
19267 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
19268 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
19270 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
19272 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
19275 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
19276 preparation statement over braces for a single statement.
19277 (*bt<mode>_setncqi): Likewise.
19278 (*bt<mode>_setncqi_2): New define_insn_and_split.
19280 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
19282 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
19283 case inserting of 64-bit values into a TImode register, to handle
19284 both DImode and DFmode using either *insvti_lowpart_1
19285 or *isnvti_highpart_1.
19287 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
19290 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
19291 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
19292 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
19293 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
19294 when the original source contains a paradoxical subreg.
19296 2023-07-14 Jan Hubicka <jh@suse.cz>
19298 * passes.cc (execute_function_todo): Remove
19299 TODO_rebuild_frequencies
19300 * passes.def: Add rebuild_frequencies pass.
19301 * predict.cc (estimate_bb_frequencies): Drop
19303 (tree_estimate_probability): Update call of
19304 estimate_bb_frequencies.
19305 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
19306 first and do not rebuild if not necessary.
19307 (class pass_rebuild_frequencies): New.
19308 (make_pass_rebuild_frequencies): New.
19309 * profile-count.h: Add profile_count::very_large_p.
19310 * tree-inline.cc (optimize_inline_calls): Do not return
19311 TODO_rebuild_frequencies
19312 * tree-pass.h (TODO_rebuild_frequencies): Remove.
19313 (make_pass_rebuild_frequencies): Declare.
19315 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19317 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
19318 * config/riscv/riscv-protos.h (enum insn_type): New enum.
19319 (expand_cond_len_ternop): New function.
19320 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
19321 (expand_cond_len_ternop): Ditto.
19323 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
19326 * config/bpf/bpf.md: Enable instruction scheduling.
19328 2023-07-14 Tamar Christina <tamar.christina@arm.com>
19330 PR tree-optimization/109154
19331 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
19332 (struct bb_predicate): Add no_predicate_stmts.
19333 (set_bb_predicate): Increase predicate count.
19334 (set_bb_predicate_gimplified_stmts): Conditionally initialize
19335 no_predicate_stmts.
19336 (get_bb_num_predicate_stmts): New.
19337 (init_bb_predicate): Initialzie no_predicate_stmts.
19338 (release_bb_predicate): Cleanup no_predicate_stmts.
19339 (insert_gimplified_predicates): Preserve no_predicate_stmts.
19341 2023-07-14 Tamar Christina <tamar.christina@arm.com>
19343 PR tree-optimization/109154
19344 * tree-if-conv.cc (gen_simplified_condition,
19345 gen_phi_nest_statement): New.
19346 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
19348 2023-07-14 Richard Biener <rguenther@suse.de>
19350 * gimple.h (gimple_phi_arg): New const overload.
19351 (gimple_phi_arg_def): Make gimple arg const.
19352 (gimple_phi_arg_def_from_edge): New inline function.
19353 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
19355 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
19356 new inline function.
19357 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
19359 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
19361 * common/config/riscv/riscv-common.cc:
19362 (riscv_implied_info): Add zihintntl item.
19363 (riscv_ext_version_table): Ditto.
19364 (riscv_ext_flag_table): Ditto.
19365 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
19366 (TARGET_ZIHINTNTL): Ditto.
19368 2023-07-14 Die Li <lidie@eswincomputing.com>
19370 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
19372 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
19375 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
19376 used by the address of the following memory operand.
19378 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
19381 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
19382 deallocate alloca-only frame.
19384 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
19387 * config/darwin.h (DARWIN_PLATFORM_ID): New.
19388 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
19389 and SDK data to the static linker.
19391 2023-07-13 Carl Love <cel@us.ibm.com>
19393 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
19394 built-in definition return type.
19395 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
19396 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
19397 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
19398 argument to return FPSCR fields.
19399 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
19400 the return value. Add description for
19401 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
19403 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
19406 * config/alpha/alpha.cc (alpha_emit_set_long_const):
19407 Always use DImode when constructing long const.
19409 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
19411 * haifa-sched.cc: Change TRUE/FALSE to true/false.
19413 * lra-assigns.cc: Ditto.
19414 * lra-constraints.cc: Ditto.
19415 * sel-sched.cc: Ditto.
19417 2023-07-13 Andrew Pinski <apinski@marvell.com>
19419 PR tree-optimization/110293
19420 PR tree-optimization/110539
19421 * match.pd: Expand the `x != (typeof x)(x == 0)`
19422 pattern to handle where the inner and outer comparsions
19423 are either `!=` or `==` and handle other constants
19426 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
19428 PR middle-end/109520
19429 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
19430 (lra_asm_insn_error): New prototype.
19431 * lra.cc: Include rtl_error.h.
19432 (lra_set_insn_recog_data): Initialize asm_reloads_num.
19433 (lra_asm_insn_error): New func whose code is taken from ...
19434 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
19435 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
19437 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19439 * genmatch.cc (commutative_op): Add COND_LEN_*
19440 * internal-fn.cc (first_commutative_argument): Ditto.
19442 (get_unconditional_internal_fn): Ditto.
19443 (can_interpret_as_conditional_op_p): Ditto.
19444 (internal_fn_len_index): Ditto.
19445 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
19446 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
19447 (convert_mult_to_fma): Ditto.
19448 (math_opts_dom_walker::after_dom_children): Ditto.
19450 2023-07-13 Pan Li <pan2.li@intel.com>
19452 * config/riscv/riscv.cc (vxrm_rtx): New static var.
19454 (global_state_unknown_p): Removed.
19455 (riscv_entity_mode_after): Removed.
19456 (asm_insn_p): New function.
19457 (vxrm_unknown_p): New function for fixed-point.
19458 (riscv_vxrm_mode_after): Ditto.
19459 (frm_unknown_dynamic_p): New function for floating-point.
19460 (riscv_frm_mode_after): Ditto.
19461 (riscv_mode_after): Leverage new functions.
19463 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19465 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
19466 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
19467 calling vect_model_load_cost.
19469 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19471 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
19472 handle memory_access_type VMAT_CONTIGUOUS, remove some
19473 VMAT_CONTIGUOUS_PERMUTE related handlings.
19474 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
19475 without calling vect_model_load_cost.
19477 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19479 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
19480 VMAT_CONTIGUOUS_REVERSE any more.
19481 (vectorizable_load): Adjust the costing handling on
19482 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
19484 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19486 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
19487 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
19488 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
19489 assert it will never get VMAT_LOAD_STORE_LANES.
19491 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19493 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
19494 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
19495 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
19496 remove VMAT_GATHER_SCATTER related handlings and the related parameter
19499 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19501 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
19502 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
19503 vect_model_load_cost.
19504 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
19505 VMAT_STRIDED_SLP any more, and remove their related handlings.
19507 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19509 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
19510 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
19511 hoisting decision and without calling vect_model_load_cost.
19512 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
19513 and remove VMAT_INVARIANT related handlings.
19515 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19517 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
19518 on costing with one extra argument cost_vec.
19519 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
19520 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
19521 gs_info.decl set any more.
19523 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19525 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
19526 to vect_model_load_cost down to some different transform paths
19527 according to the handlings of different vect_memory_access_types.
19529 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
19531 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
19533 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19535 * config/riscv/autovec.md
19536 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
19537 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
19538 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
19539 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
19540 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
19541 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19542 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19543 (len_mask_gather_load<mode><mode>): Ditto.
19544 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
19545 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
19546 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
19547 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
19548 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
19549 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19550 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19551 (len_mask_scatter_store<mode><mode>): Ditto.
19552 * config/riscv/predicates.md (const_1_operand): New predicate.
19553 (vector_gs_scale_operand_16): Ditto.
19554 (vector_gs_scale_operand_32): Ditto.
19555 (vector_gs_scale_operand_64): Ditto.
19556 (vector_gs_extension_operand): Ditto.
19557 (vector_gs_scale_operand_16_rv32): Ditto.
19558 (vector_gs_scale_operand_32_rv32): Ditto.
19559 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
19560 (expand_gather_scatter): New function.
19561 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
19562 (emit_vlmax_masked_store_insn): New function.
19563 (emit_nonvlmax_masked_store_insn): Ditto.
19564 (modulo_sel_indices): Ditto.
19565 (expand_vec_perm): Fix SLP for gather/scatter.
19566 (prepare_gather_scatter): New function.
19567 (expand_gather_scatter): Ditto.
19568 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
19569 (subreg:SI (DI CONST_POLY_INT)).
19570 * config/riscv/vector-iterators.md: Add gather/scatter.
19571 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
19572 (@vec_duplicate<mode>): Ditto.
19573 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
19575 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
19577 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19579 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
19580 * config/riscv/riscv-protos.h (enum insn_type): New enum.
19581 (expand_cond_len_binop): New function.
19582 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
19583 (emit_nonvlmax_fp_tu_insn): Ditto.
19584 (need_fp_rounding_p): Ditto.
19585 (expand_cond_len_binop): Ditto.
19586 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
19587 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
19589 2023-07-12 Jan Hubicka <jh@suse.cz>
19591 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
19592 (gimple_duplicate_seme_region): ... this; break out profile updating
19594 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
19595 (ch_base::copy_headers): Update.
19596 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
19597 (gimple_duplicate_seme_region): ... this.
19599 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
19601 PR tree-optimization/107043
19602 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
19604 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
19606 PR tree-optimization/107053
19607 * gimple-range-op.cc (cfn_popcount): Use known set bits.
19609 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
19611 * ira.cc (equiv_init_varies_p): Change return type from int to bool
19612 and adjust function body accordingly.
19613 (equiv_init_movable_p): Ditto.
19614 (memref_used_between_p): Ditto.
19615 * lra-constraints.cc (valid_address_p): Ditto.
19617 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
19619 * range-op.cc (irange_to_masked_value): Remove.
19620 (update_known_bitmask): Update irange value/mask pair instead of
19621 only updating nonzero bits.
19623 2023-07-12 Jan Hubicka <jh@suse.cz>
19625 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
19626 parameter and rewrite profile updating code to handle edges elimination.
19627 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
19628 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
19629 (loop_iv_derived_p): New function.
19630 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
19631 of PHIs and propagation of IV derived variables.
19632 (ch_base::copy_headers): Pass around the invariant edges hash set.
19634 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
19636 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
19637 (last_active_insn): Change "skip_use_p" function argument to bool.
19638 (noce_operand_ok): Change return type from int to bool.
19639 (find_cond_trap): Ditto.
19640 (block_jumps_and_fallthru_p): Change "fallthru_p" and
19641 "jump_p" variables to bool.
19642 (noce_find_if_block): Change return type from int to bool.
19643 (cond_exec_find_if_block): Ditto.
19644 (find_if_case_1): Ditto.
19645 (find_if_case_2): Ditto.
19646 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
19647 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
19648 (cond_exec_process_insns): Change return type from int to bool.
19649 Change "mod_ok" function arg to bool.
19650 (cond_exec_process_if_block): Change return type from int to bool.
19651 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
19653 (noce_emit_store_flag): Change return type from int to bool.
19654 Change "reversep" function arg to bool. Change "cond_complex"
19656 (noce_try_move): Change return type from int to bool.
19657 (noce_try_ifelse_collapse): Ditto.
19658 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
19659 (noce_try_addcc): Change return type from int to bool. Change
19660 "subtract" variable to bool.
19661 (noce_try_store_flag_constants): Change return type from int to bool.
19662 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
19663 (noce_try_cmove): Change return type from int to bool.
19664 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
19665 (noce_try_minmax): Change return type from int to bool. Change
19666 "unsignedp" variable to bool.
19667 (noce_try_abs): Change return type from int to bool. Change
19668 "negate" variable to bool.
19669 (noce_try_sign_mask): Change return type from int to bool.
19670 (noce_try_move): Ditto.
19671 (noce_try_store_flag_constants): Ditto.
19672 (noce_try_cmove): Ditto.
19673 (noce_try_cmove_arith): Ditto.
19674 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
19675 (noce_try_bitop): Change return type from int to bool.
19676 (noce_operand_ok): Ditto.
19677 (noce_convert_multiple_sets): Ditto.
19678 (noce_convert_multiple_sets_1): Ditto.
19679 (noce_process_if_block): Ditto.
19680 (check_cond_move_block): Ditto.
19681 (cond_move_process_if_block): Ditto. Change "success_p"
19683 (rest_of_handle_if_conversion): Change return type to void.
19685 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19687 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
19689 (get_conditional_len_internal_fn): New function.
19690 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
19691 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
19694 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
19697 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
19699 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
19702 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
19703 define_insn_and_split derived from *add<dwi>3_doubleword_concat
19704 and *add<dwi>3_doubleword_zext.
19706 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
19709 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
19710 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
19711 (peephole2): Simplify rega = 0; rega op= rega cases.
19713 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
19715 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
19716 testing a TImode SUBREG of a 128-bit vector register against
19717 zero, use a PTEST instruction instead of first moving it to
19718 a pair of scalar registers.
19720 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
19722 * genopinit.cc (main): Adjust maximal number of optabs and
19724 * gensupport.cc (find_optab): Shift optab by 20 and mode by
19726 * optabs-query.h (optab_handler): Ditto.
19727 (convert_optab_handler): Ditto.
19729 2023-07-12 Richard Biener <rguenther@suse.de>
19731 PR tree-optimization/110630
19732 * tree-vect-slp.cc (vect_add_slp_permutation): New
19733 offset parameter, honor that for the extract code generation.
19734 (vectorizable_slp_permutation_1): Handle offsetted identities.
19736 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19738 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
19739 (umul<mode>3_highpart): Ditto.
19741 2023-07-12 Jan Beulich <jbeulich@suse.com>
19743 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
19744 alternative. Adjust original last alternative's "prefix"
19745 attribute to maybe_evex.
19747 2023-07-12 Jan Beulich <jbeulich@suse.com>
19749 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
19750 vbroadcastss for AVX2. New AVX512F alternative.
19751 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
19752 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
19754 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19756 * config/riscv/peephole.md: Remove XThead* peephole passes.
19757 * config/riscv/thead.md: Include thead-peephole.md.
19758 * config/riscv/thead-peephole.md: New file.
19760 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19762 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
19764 (riscv_index_reg_class): Likewise.
19765 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
19766 (riscv_index_reg_class): New function.
19767 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
19768 riscv_index_reg_class().
19769 (REGNO_OK_FOR_INDEX_P): Call new function
19770 riscv_regno_ok_for_index_p().
19772 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19774 * config/riscv/riscv-protos.h (enum riscv_address_type):
19775 New location of type definition.
19776 (struct riscv_address_info): Likewise.
19777 * config/riscv/riscv.cc (enum riscv_address_type):
19778 Old location of type definition.
19779 (struct riscv_address_info): Likewise.
19781 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19783 * config/riscv/riscv.h (Xmode): New macro.
19785 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19787 * config/riscv/riscv.cc (riscv_print_operand_address): Use
19788 output_addr_const rather than riscv_print_operand.
19790 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19792 * config/riscv/thead.md: Adjust constraints of th_addsl.
19794 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19796 * config/riscv/thead.cc (th_mempair_operands_p):
19797 Fix documentation of th_mempair_order_operands().
19799 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19801 * config/riscv/thead.cc (th_mempair_save_regs):
19802 Emit REG_FRAME_RELATED_EXPR notes in prologue.
19804 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
19806 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
19807 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
19808 New XThead extension INSN.
19809 (*zero_extendsidi2_th_extu): New XThead extension INSN.
19810 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
19812 2023-07-12 liuhongt <hongtao.liu@intel.com>
19816 * config/i386/predicates.md
19817 (int_float_vector_all_ones_operand): New predicate.
19818 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
19820 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
19822 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
19824 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
19825 define_insn_and_split to avoid false dependence.
19826 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
19827 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
19828 of operands 1 to '0' to avoid false dependence.
19829 (*andnot<mode>3): Ditto.
19830 (iornot<mode>3): Ditto.
19831 (*<nlogic><mode>3): Ditto.
19833 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
19835 * common/config/i386/cpuinfo.h
19836 (get_intel_cpu): Handle Granite Rapids D.
19837 * common/config/i386/i386-common.cc:
19838 (processor_alias_table): Add graniterapids-d.
19839 * common/config/i386/i386-cpuinfo.h
19840 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
19841 * config.gcc: Add -march=graniterapids-d.
19842 * config/i386/driver-i386.cc (host_detect_local_cpu):
19843 Handle graniterapids-d.
19844 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
19845 * doc/extend.texi: Add graniterapids-d.
19846 * doc/invoke.texi: Ditto.
19848 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
19850 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
19851 Add OPTION_MASK_ISA_AVX512VL.
19852 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
19855 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19857 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
19858 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
19859 (shuffle_compress_patterns): Ditto.
19860 (expand_vec_perm_const_1): Ditto.
19862 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
19864 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
19865 * cfghooks.h (struct cfg_hooks): Change return type of
19866 verify_flow_info from integer to bool.
19867 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
19868 (can_delete_label_p): Ditto.
19869 (rtl_verify_flow_info): Change return type from int to bool
19870 and adjust function body accordingly. Change "err" variable to bool.
19871 (rtl_verify_flow_info_1): Ditto.
19872 (free_bb_for_insn): Change return type to void.
19873 (rtl_merge_blocks): Change "b_empty" variable to bool.
19874 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
19875 (verify_hot_cold_block_grouping): Change return type from int to bool.
19876 Change "err" variable to bool.
19877 (rtl_verify_edges): Ditto.
19878 (rtl_verify_bb_insns): Ditto.
19879 (rtl_verify_bb_pointers): Ditto.
19880 (rtl_verify_bb_insn_chain): Ditto.
19881 (rtl_verify_fallthru): Ditto.
19882 (rtl_verify_bb_layout): Ditto.
19883 (purge_all_dead_edges): Change "purged" variable to bool.
19884 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
19885 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
19886 (load_killed_in_block_p): Change return type from int to bool
19887 and adjust function body accordingly.
19888 (oprs_unchanged_p): Return true/false.
19889 (rest_of_handle_gcse2): Change return type to void.
19890 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
19891 int to bool. Change "err" variable to bool.
19893 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
19895 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
19897 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19899 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
19900 * internal-fn.cc (cond_len_unary_direct): Ditto.
19901 (cond_len_binary_direct): Ditto.
19902 (cond_len_ternary_direct): Ditto.
19903 (expand_cond_len_unary_optab_fn): Ditto.
19904 (expand_cond_len_binary_optab_fn): Ditto.
19905 (expand_cond_len_ternary_optab_fn): Ditto.
19906 (direct_cond_len_unary_optab_supported_p): Ditto.
19907 (direct_cond_len_binary_optab_supported_p): Ditto.
19908 (direct_cond_len_ternary_optab_supported_p): Ditto.
19909 * internal-fn.def (COND_LEN_ADD): Ditto.
19910 (COND_LEN_SUB): Ditto.
19911 (COND_LEN_MUL): Ditto.
19912 (COND_LEN_DIV): Ditto.
19913 (COND_LEN_MOD): Ditto.
19914 (COND_LEN_RDIV): Ditto.
19915 (COND_LEN_MIN): Ditto.
19916 (COND_LEN_MAX): Ditto.
19917 (COND_LEN_FMIN): Ditto.
19918 (COND_LEN_FMAX): Ditto.
19919 (COND_LEN_AND): Ditto.
19920 (COND_LEN_IOR): Ditto.
19921 (COND_LEN_XOR): Ditto.
19922 (COND_LEN_SHL): Ditto.
19923 (COND_LEN_SHR): Ditto.
19924 (COND_LEN_FMA): Ditto.
19925 (COND_LEN_FMS): Ditto.
19926 (COND_LEN_FNMA): Ditto.
19927 (COND_LEN_FNMS): Ditto.
19928 (COND_LEN_NEG): Ditto.
19929 * optabs.def (OPTAB_D): Ditto.
19931 2023-07-11 Richard Biener <rguenther@suse.de>
19933 PR tree-optimization/110614
19934 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
19935 SLP splats are not suitable for re-align ops.
19937 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
19939 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
19941 (vsx_quad_dform_memory_operand): Likewise.
19943 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
19945 * reorg.cc (stop_search_p): Change return type from int to bool
19946 and adjust function body accordingly.
19947 (resource_conflicts_p): Ditto.
19948 (insn_references_resource_p): Change return type from int to bool.
19949 (insn_sets_resource_p): Ditto.
19950 (redirect_with_delay_slots_safe_p): Ditto.
19951 (condition_dominates_p): Change return type from int to bool
19952 and adjust function body accordingly.
19953 (redirect_with_delay_list_safe_p): Ditto.
19954 (check_annul_list_true_false): Ditto. Change "annul_true_p"
19955 function argument to bool.
19956 (steal_delay_list_from_target): Change "pannul_p" function
19957 argument to bool pointer. Change "must_annul" and "used_annul"
19958 variables from int to bool.
19959 (steal_delay_list_from_fallthrough): Ditto.
19960 (own_thread_p): Change return type from int to bool and adjust
19961 function body accordingly. Change "allow_fallthrough" function
19963 (reorg_redirect_jump): Change return type from int to bool.
19964 (fill_simple_delay_slots): Change "non_jumps_p" function
19965 argument from int to bool. Change "maybe_never" varible to bool.
19966 (fill_slots_from_thread): Change "likely", "thread_if_true" and
19967 "own_thread" function arguments to bool. Change "lose" and
19968 "must_annul" variables to bool.
19969 (delete_from_delay_slot): Change "had_barrier" variable to bool.
19970 (try_merge_delay_insns): Change "annul_p" variable to bool.
19971 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
19973 (rest_of_handle_delay_slots): Change return type from int to void
19974 and adjust function body accordingly.
19976 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
19978 * doc/extend.texi (RISC-V Operand Modifiers): New.
19980 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19982 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
19983 (insert_insn_end_basic_block): Ditto.
19984 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
19985 * gcse.cc (insert_insn_end_basic_block): Export as global function.
19986 * gcse.h (insert_insn_end_basic_block): Ditto.
19988 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
19991 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
19992 (arm_builtin_decl): Hahndle MVE builtins.
19993 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
19994 (add_unique_function): Fix handling of
19995 __ARM_MVE_PRESERVE_USER_NAMESPACE.
19996 (add_overloaded_function): Likewise.
19997 * config/arm/arm-protos.h (builtin_decl): New declaration.
19999 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
20001 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
20003 2023-07-10 Xi Ruoyao <xry111@xry111.site>
20005 PR tree-optimization/110557
20006 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
20007 Ensure the output sign-extended if necessary.
20009 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
20011 * config/i386/i386.md (peephole2): Transform xchg insn with a
20012 REG_UNUSED note to a (simple) move.
20013 (*insvti_lowpart_1): New define_insn_and_split.
20014 (*insvdi_lowpart_1): Likewise.
20016 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
20018 * config/i386/i386-features.cc (compute_convert_gain): Tweak
20019 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
20020 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
20021 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
20023 2023-07-10 liuhongt <hongtao.liu@intel.com>
20026 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
20027 splitter to detect fp max pattern.
20028 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
20030 2023-07-09 Jan Hubicka <jh@suse.cz>
20032 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
20033 (dump_edge_info): Likewise.
20034 (dump_bb_info): Likewise.
20035 * profile-count.cc (profile_count::dump): Add comma between quality and
20038 2023-07-08 Jan Hubicka <jh@suse.cz>
20040 PR tree-optimization/110600
20041 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
20043 2023-07-08 Jan Hubicka <jh@suse.cz>
20045 PR middle-end/110590
20046 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
20047 inner loops and be more careful about inconsistent profiles.
20048 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
20049 exit is followed by other exit.
20051 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
20053 * cprop.cc (reg_available_p): Change return type from int to bool.
20054 (reg_not_set_p): Ditto.
20055 (try_replace_reg): Ditto. Change "success" variable to bool.
20056 (cprop_jump): Change return type from int to void
20057 and adjust function body accordingly.
20058 (constprop_register): Ditto.
20059 (cprop_insn): Ditto. Change "changed" variable to bool.
20060 (local_cprop_pass): Change return type from int to void
20061 and adjust function body accordingly.
20062 (bypass_block): Ditto. Change "change", "may_be_loop_header"
20063 and "removed_p" variables to bool.
20064 (bypass_conditional_jumps): Change return type from int to void
20065 and adjust function body accordingly. Change "changed"
20067 (one_cprop_pass): Ditto.
20069 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
20071 * gcse.cc (expr_equiv_p): Change return type from int to bool.
20072 (oprs_unchanged_p): Change return type from int to void
20073 and adjust function body accordingly.
20074 (oprs_anticipatable_p): Ditto.
20075 (oprs_available_p): Ditto.
20076 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
20077 arguments to bool. Change "found" variable to bool.
20078 (load_killed_in_block_p): Change return type from int to void and
20079 adjust function body accordingly. Change "avail_p" argument to bool.
20080 (pre_expr_reaches_here_p): Change return type from int to void
20081 and adjust function body accordingly.
20082 (pre_delete): Ditto. Change "changed" variable to bool.
20083 (pre_gcse): Change return type from int to void
20084 and adjust function body accordingly. Change "did_insert" and
20085 "changed" variables to bool.
20086 (one_pre_gcse_pass): Change return type from int to void
20087 and adjust function body accordingly. Change "changed" variable
20089 (should_hoist_expr_to_dom): Change return type from int to void
20090 and adjust function body accordingly. Change
20091 "visited_allocated_locally" variable to bool.
20092 (hoist_code): Change return type from int to void and adjust
20093 function body accordingly. Change "changed" variable to bool.
20094 (one_code_hoisting_pass): Ditto.
20095 (pre_edge_insert): Change return type from int to void and adjust
20096 function body accordingly. Change "did_insert" variable to bool.
20097 (pre_expr_reaches_here_p_work): Change return type from int to void
20098 and adjust function body accordingly.
20099 (simple_mem): Ditto.
20100 (want_to_gcse_p): Change return type from int to void
20101 and adjust function body accordingly.
20102 (can_assign_to_reg_without_clobbers_p): Update function body
20103 for bool return type.
20104 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
20105 (pre_insert_copies): Change "added_copy" variable to bool.
20107 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
20111 * doc/invoke.texi (Warning Options): Fix typos.
20113 2023-07-07 Jan Hubicka <jh@suse.cz>
20115 * profile-count.cc (profile_count::dump): Add FUN
20116 parameter; print relative frequency.
20117 (profile_count::debug): Update.
20118 * profile-count.h (profile_count::dump): Update
20121 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
20125 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
20126 TImode destinations from paradoxical SUBREGs (setting the lowpart)
20127 into explicit zero extensions. Use *insvti_highpart_1 instruction
20128 to set the highpart of a TImode destination.
20130 2023-07-07 Jan Hubicka <jh@suse.cz>
20132 * predict.cc (force_edge_cold): Use
20133 set_edge_probability_and_rescale_others; improve dumps.
20135 2023-07-07 Jan Hubicka <jh@suse.cz>
20137 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
20139 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
20142 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
20144 * config/s390/s390.cc (vec_init): Fix default case
20146 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
20148 * lra-assigns.cc (assign_by_spills): Add reload insns involving
20149 reload pseudos with non-refined class to be processed on the next
20151 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
20152 (in_class_p): Use it.
20153 (print_curr_insn_alt): New func.
20154 (process_alt_operands): Use it. Improve debug info.
20155 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
20156 pseudo class if it is not refined yet.
20158 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
20160 * value-range.cc (irange::get_bitmask_from_range): Return all the
20161 known bits for a singleton.
20162 (irange::set_range_from_bitmask): Set a range of a singleton when
20163 all bits are known.
20165 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
20167 * value-range.cc (irange::intersect): Leave normalization to
20170 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
20172 * data-streamer-in.cc (streamer_read_value_range): Adjust for
20174 * data-streamer-out.cc (streamer_write_vrange): Same.
20175 * range-op.cc (operator_cast::fold_range): Same.
20176 * value-range-pretty-print.cc
20177 (vrange_printer::print_irange_bitmasks): Same.
20178 * value-range-storage.cc (irange_storage::write_lengths_address):
20180 (irange_storage::set_irange): Same.
20181 (irange_storage::get_irange): Same.
20182 (irange_storage::size): Same.
20183 (irange_storage::dump): Same.
20184 * value-range-storage.h: Same.
20185 * value-range.cc (debug): New.
20186 (irange_bitmask::dump): New.
20187 (add_vrange): Adjust for value/mask.
20188 (irange::operator=): Same.
20189 (irange::set): Same.
20190 (irange::verify_range): Same.
20191 (irange::operator==): Same.
20192 (irange::contains_p): Same.
20193 (irange::irange_single_pair_union): Same.
20194 (irange::union_): Same.
20195 (irange::intersect): Same.
20196 (irange::invert): Same.
20197 (irange::get_nonzero_bits_from_range): Rename to...
20198 (irange::get_bitmask_from_range): ...this.
20199 (irange::set_range_from_nonzero_bits): Rename to...
20200 (irange::set_range_from_bitmask): ...this.
20201 (irange::set_nonzero_bits): Rename to...
20202 (irange::update_bitmask): ...this.
20203 (irange::get_nonzero_bits): Rename to...
20204 (irange::get_bitmask): ...this.
20205 (irange::intersect_nonzero_bits): Rename to...
20206 (irange::intersect_bitmask): ...this.
20207 (irange::union_nonzero_bits): Rename to...
20208 (irange::union_bitmask): ...this.
20209 (irange_bitmask::verify_mask): New.
20210 * value-range.h (class irange_bitmask): New.
20211 (irange_bitmask::set_unknown): New.
20212 (irange_bitmask::unknown_p): New.
20213 (irange_bitmask::irange_bitmask): New.
20214 (irange_bitmask::get_precision): New.
20215 (irange_bitmask::get_nonzero_bits): New.
20216 (irange_bitmask::set_nonzero_bits): New.
20217 (irange_bitmask::operator==): New.
20218 (irange_bitmask::union_): New.
20219 (irange_bitmask::intersect): New.
20220 (class irange): Friend vrange_printer.
20221 (irange::varying_compatible_p): Adjust for bitmask.
20222 (irange::set_varying): Same.
20223 (irange::set_nonzero): Same.
20225 2023-07-07 Jan Beulich <jbeulich@suse.com>
20227 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
20229 2023-07-07 Jan Beulich <jbeulich@suse.com>
20231 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
20232 alternative. Switch new last alternative's "isa" attribute to
20234 (vec_extract_hi_v32qi): Likewise.
20236 2023-07-07 Pan Li <pan2.li@intel.com>
20237 Robin Dapp <rdapp@ventanamicro.com>
20239 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
20241 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
20242 (riscv_mode_exit): Likewise for exit mode.
20243 (riscv_mode_needed): Likewise for needed mode.
20244 (riscv_mode_after): Likewise for after mode.
20246 2023-07-07 Pan Li <pan2.li@intel.com>
20248 * config/riscv/vector.md: Fix typo.
20250 2023-07-06 Jan Hubicka <jh@suse.cz>
20252 PR middle-end/25623
20253 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
20254 of iterations determined.
20255 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
20257 2023-07-06 Jan Hubicka <jh@suse.cz>
20259 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
20260 probability update to be safe on loops with subloops.
20261 Make bound parameter to be iteration bound.
20262 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
20263 of scale_loop_profile.
20264 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
20266 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
20268 PR tree-optimization/110449
20269 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
20270 vec_loop for the unrolled loop.
20272 2023-07-06 Jan Hubicka <jh@suse.cz>
20274 * cfg.cc (set_edge_probability_and_rescale_others): New function.
20275 (update_bb_profile_for_threading): Use it; simplify the rest.
20276 * cfg.h (set_edge_probability_and_rescale_others): Declare.
20277 * profile-count.h (profile_probability::apply_scale): New.
20279 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
20281 * doc/extend.texi (ARC Built-in Functions): Update documentation
20282 with missing builtins.
20284 2023-07-06 Richard Biener <rguenther@suse.de>
20286 PR tree-optimization/110556
20287 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
20288 assign code and all operands of non-stores.
20290 2023-07-06 Richard Biener <rguenther@suse.de>
20292 PR tree-optimization/110563
20293 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
20294 Remove second argument.
20295 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
20296 Remove for_epilogue_p argument. Merge assert ...
20297 (vect_analyze_loop_2): ... with check done before determining
20298 partial vectors by moving it after.
20299 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
20301 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
20303 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
20304 few things re 'reorder' option and strings.
20305 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
20307 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
20309 * gengtype-parse.cc: Clean up obsolete parametrized structs
20311 * gengtype.cc: Likewise.
20312 * gengtype.h: Likewise.
20314 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
20316 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
20319 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
20321 * gengtype-parse.cc (token_names): Add '"user"'.
20322 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
20323 'FIRST_TOKEN_WITH_VALUE'.
20325 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
20327 * doc/gty.texi (GTY Options) <string_length>: Enhance.
20329 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
20331 * gengtype.cc (write_root, write_roots): Explicitly reject
20332 'string_length' option.
20333 * doc/gty.texi (GTY Options) <string_length>: Document.
20335 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
20337 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
20338 (ggc_pch_write_object): Remove 'bool is_string' argument.
20339 * ggc-common.cc: Adjust.
20340 * ggc-page.cc: Likewise.
20342 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
20344 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
20346 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
20348 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
20349 and add description for inling of function with arch and tune
20352 2023-07-06 Richard Biener <rguenther@suse.de>
20354 PR tree-optimization/110515
20355 * tree-ssa-pre.cc (compute_avail): Make code dealing
20356 with hoisting loads with different alias-sets more
20359 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20361 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
20363 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
20365 * config/i386/i386.cc (ix86_can_inline_p): If callee has
20366 default arch=x86-64 and tune=generic, do not block the
20367 inlining to its caller. Also allow callee with different
20368 arch= to be inlined if it has always_inline attribute and
20369 it's ISA is subset of caller's.
20371 2023-07-06 liuhongt <hongtao.liu@intel.com>
20373 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
20374 DF/SFmode AND/IOR/XOR/ANDN operations.
20376 2023-07-06 Andrew Pinski <apinski@marvell.com>
20378 PR middle-end/110554
20379 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
20380 just build using boolean_type_node instead of the cond_type.
20381 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
20382 that will feed into the COND_EXPR.
20384 2023-07-06 liuhongt <hongtao.liu@intel.com>
20387 * config/i386/i386.md (movdf_internal): Disparage slightly for
20388 2 alternatives (r,v) and (v,r) by adding constraint modifier
20391 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
20394 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
20395 initialization of new_addr.
20397 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
20399 PR tree-optimization/110474
20400 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
20401 unroll factor while selecting the epilog vect loop VF.
20403 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
20405 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
20408 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
20410 * gimple-range-gori.cc (compute_operand_range): After calling
20411 compute_operand2_range, recursively call self if needed.
20412 (compute_operand2_range): Turn into a leaf function.
20413 (gori_compute::compute_operand1_and_operand2_range): Finish
20414 operand2 calculation.
20415 * gimple-range-gori.h (compute_operand2_range): Remove name param.
20417 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
20419 * gimple-range-gori.cc (compute_operand_range): After calling
20420 compute_operand1_range, recursively call self if needed.
20421 (compute_operand1_range): Turn into a leaf function.
20422 (gori_compute::compute_operand1_and_operand2_range): Finish
20423 operand1 calculation.
20424 * gimple-range-gori.h (compute_operand1_range): Remove name param.
20426 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
20428 * gimple-range-gori.cc (compute_operand_range): Check for
20429 operand interdependence when both op1 and op2 are computed.
20430 (compute_operand1_and_operand2_range): No checks required now.
20432 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
20434 * gimple-range-gori.cc (compute_operand_range): Check for
20435 a relation between op1 and op2 and use that instead.
20436 (compute_operand1_range): Don't look for a relation override.
20437 (compute_operand2_range): Ditto.
20439 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
20441 * doc/contrib.texi (Contributors): Update my entry.
20443 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
20445 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
20448 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
20450 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
20451 scehdule_more_p and contributes_to_priority indirect frunction
20452 type from int to bool.
20453 (no_real_insns_p): Change return type from int to bool.
20454 (contributes_to_priority): Ditto.
20455 * haifa-sched.cc (no_real_insns_p): Change return type from
20456 int to bool and adjust function body accordingly.
20457 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
20458 variable type from int to bool.
20459 (ps_insn_advance_column): Change return type from int to bool.
20460 (ps_has_conflicts): Ditto. Change "has_conflicts"
20461 variable type from int to bool.
20462 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
20463 (conditions_mutex_p): Ditto.
20464 * sched-ebb.cc (schedule_more_p): Ditto.
20465 (ebb_contributes_to_priority): Change return type from
20466 int to bool and adjust function body accordingly.
20467 * sched-rgn.cc (is_cfg_nonregular): Ditto.
20468 (check_live_1): Ditto.
20470 (find_conditional_protection): Ditto.
20471 (is_conditionally_protected): Ditto.
20472 (is_prisky): Ditto.
20473 (is_exception_free): Ditto.
20474 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
20475 variables from int to bool.
20476 (extend_rgns): Change "rescan" variable from int to bool.
20477 (check_live): Change return type from
20478 int to bool and adjust function body accordingly.
20479 (can_schedule_ready_p): Ditto.
20480 (schedule_more_p): Ditto.
20481 (contributes_to_priority): Ditto.
20483 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
20485 * doc/md.texi: Document that vec_set and vec_extract must not
20487 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
20488 (gimple_expand_vec_set_extract_expr): ...to this.
20489 (gimple_expand_vec_exprs): Call renamed function.
20490 * internal-fn.cc (vec_extract_direct): Add.
20491 (expand_vec_extract_optab_fn): New function to expand
20493 (direct_vec_extract_optab_supported_p): Add.
20494 * internal-fn.def (VEC_EXTRACT): Add.
20495 * optabs.cc (can_vec_extract_var_idx_p): New function.
20496 * optabs.h (can_vec_extract_var_idx_p): Declare.
20498 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
20500 * config/riscv/autovec.md: Add gen_lowpart.
20502 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
20504 * config/riscv/autovec.md: Allow register index operand.
20506 2023-07-05 Pan Li <pan2.li@intel.com>
20508 * config/riscv/riscv-vector-builtins.cc
20509 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
20511 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
20513 * config/riscv/autovec.md: Use float_truncate.
20515 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20517 * internal-fn.cc (internal_fn_len_index): Apply
20518 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
20519 (internal_fn_mask_index): Ditto.
20520 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
20521 (supports_vec_scatter_store_p): Ditto.
20522 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
20523 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
20524 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
20525 (vect_get_strided_load_store_ops): Ditto.
20526 (vectorizable_store): Ditto.
20527 (vectorizable_load): Ditto.
20529 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
20530 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20532 * simplify-rtx.cc (native_encode_rtx): Ditto.
20533 (native_decode_vector_rtx): Ditto.
20534 (simplify_const_vector_byte_offset): Ditto.
20535 (simplify_const_vector_subreg): Ditto.
20536 * tree.cc (build_truth_vector_type_for_mode): Ditto.
20537 * varasm.cc (output_constant_pool_2): Ditto.
20539 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
20541 * config/mips/mips.cc (mips_expand_block_move): don't expand for
20542 r6 with -mno-unaligned-access option if one or both of src and
20543 dest are unaligned. restruct: return directly if length is not const.
20544 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
20546 2023-07-05 Jan Beulich <jbeulich@suse.com>
20549 * config/i386/sse.md: New splitters to simplify
20550 not;vec_duplicate as a singular vpternlog.
20551 (one_cmpl<mode>2): Allow broadcast for operand 1.
20552 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
20554 2023-07-05 Jan Beulich <jbeulich@suse.com>
20557 * config/i386/sse.md: New splitters to simplify
20558 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
20560 2023-07-05 Jan Beulich <jbeulich@suse.com>
20563 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
20564 form of splitter for PR target/100711.
20566 2023-07-05 Richard Biener <rguenther@suse.de>
20568 PR middle-end/110541
20569 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
20572 2023-07-05 Jan Beulich <jbeulich@suse.com>
20575 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
20576 for memory form operand 1.
20578 2023-07-05 Jan Beulich <jbeulich@suse.com>
20581 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
20582 bitwise vector operations.
20583 * config/i386/sse.md (*iornot<mode>3): New insn.
20584 (*xnor<mode>3): Likewise.
20585 (*<nlogic><mode>3): Likewise.
20586 (andor): New code iterator.
20587 (nlogic): New code attribute.
20588 (ternlog_nlogic): Likewise.
20590 2023-07-05 Richard Biener <rguenther@suse.de>
20592 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
20594 2023-07-05 yulong <shiyulong@iscas.ac.cn>
20596 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
20598 2023-07-05 yulong <shiyulong@iscas.ac.cn>
20600 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
20601 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
20602 (ADJUST_ALIGNMENT): Ditto.
20603 (RVV_TUPLE_PARTIAL_MODES): Ditto.
20604 (ADJUST_NUNITS): Ditto.
20605 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
20607 (vfloat16mf4x3_t): Ditto.
20608 (vfloat16mf4x4_t): Ditto.
20609 (vfloat16mf4x5_t): Ditto.
20610 (vfloat16mf4x6_t): Ditto.
20611 (vfloat16mf4x7_t): Ditto.
20612 (vfloat16mf4x8_t): Ditto.
20613 (vfloat16mf2x2_t): Ditto.
20614 (vfloat16mf2x3_t): Ditto.
20615 (vfloat16mf2x4_t): Ditto.
20616 (vfloat16mf2x5_t): Ditto.
20617 (vfloat16mf2x6_t): Ditto.
20618 (vfloat16mf2x7_t): Ditto.
20619 (vfloat16mf2x8_t): Ditto.
20620 (vfloat16m1x2_t): Ditto.
20621 (vfloat16m1x3_t): Ditto.
20622 (vfloat16m1x4_t): Ditto.
20623 (vfloat16m1x5_t): Ditto.
20624 (vfloat16m1x6_t): Ditto.
20625 (vfloat16m1x7_t): Ditto.
20626 (vfloat16m1x8_t): Ditto.
20627 (vfloat16m2x2_t): Ditto.
20628 (vfloat16m2x3_t): Ditto.
20629 (vfloat16m2x4_t): Ditto.
20630 (vfloat16m4x2_t): Ditto.
20631 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
20632 (vfloat16mf4x3_t): Ditto.
20633 (vfloat16mf4x4_t): Ditto.
20634 (vfloat16mf4x5_t): Ditto.
20635 (vfloat16mf4x6_t): Ditto.
20636 (vfloat16mf4x7_t): Ditto.
20637 (vfloat16mf4x8_t): Ditto.
20638 (vfloat16mf2x2_t): Ditto.
20639 (vfloat16mf2x3_t): Ditto.
20640 (vfloat16mf2x4_t): Ditto.
20641 (vfloat16mf2x5_t): Ditto.
20642 (vfloat16mf2x6_t): Ditto.
20643 (vfloat16mf2x7_t): Ditto.
20644 (vfloat16mf2x8_t): Ditto.
20645 (vfloat16m1x2_t): Ditto.
20646 (vfloat16m1x3_t): Ditto.
20647 (vfloat16m1x4_t): Ditto.
20648 (vfloat16m1x5_t): Ditto.
20649 (vfloat16m1x6_t): Ditto.
20650 (vfloat16m1x7_t): Ditto.
20651 (vfloat16m1x8_t): Ditto.
20652 (vfloat16m2x2_t): Ditto.
20653 (vfloat16m2x3_t): Ditto.
20654 (vfloat16m2x4_t): Ditto.
20655 (vfloat16m4x2_t): Ditto.
20656 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
20657 * config/riscv/riscv.md: New.
20658 * config/riscv/vector-iterators.md: New.
20660 2023-07-04 Andrew Pinski <apinski@marvell.com>
20662 PR tree-optimization/110487
20663 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
20664 build a nonstandard integer and use that.
20666 2023-07-04 Andrew Pinski <apinski@marvell.com>
20668 * match.pd (a?-1:0): Cast type an integer type
20669 rather the type before the negative.
20670 (a?0:-1): Likewise.
20672 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20674 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
20675 Change to use HARD_REG_BIT and its macros.
20676 * config/xtensa/xtensa.md
20677 (peephole2: regmove elimination during DFmode input reload):
20680 2023-07-04 Richard Biener <rguenther@suse.de>
20682 PR tree-optimization/110491
20683 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
20684 whether the PHI args are possibly undefined before folding
20687 2023-07-04 Pan Li <pan2.li@intel.com>
20688 Thomas Schwinge <thomas@codesourcery.com>
20690 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
20691 bits for machine mode table.
20692 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
20693 HOST machine mode bits.
20694 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
20695 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
20697 * tree-streamer.h (streamer_mode_table): Ditto.
20698 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
20699 as the packing limit.
20700 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
20702 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
20704 * lto-streamer.h (class lto_input_block): Capture
20705 'lto_file_decl_data *file_data' instead of just
20706 'unsigned char *mode_table'.
20707 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
20708 * ipa-fnsummary.cc (inline_read_section): Likewise.
20709 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
20710 * ipa-modref.cc (read_section): Likewise.
20711 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
20713 * ipa-sra.cc (isra_read_summary_section): Likewise.
20714 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
20715 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
20716 * lto-streamer-in.cc (lto_read_body_or_constructor)
20717 (lto_input_toplevel_asms): Likewise.
20718 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
20720 2023-07-04 Richard Biener <rguenther@suse.de>
20722 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
20723 (empty_bb_or_one_feeding_into_p): Check for them.
20724 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
20725 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
20727 2023-07-04 Richard Biener <rguenther@suse.de>
20729 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
20730 check guarding scalar_niter underflow.
20732 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
20734 PR tree-optimization/110531
20735 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
20736 slp_done_for_suggested_uf to false.
20738 2023-07-04 Richard Biener <rguenther@suse.de>
20740 PR tree-optimization/110228
20741 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
20742 Mark SSA may-undefs.
20743 (bb_no_side_effects_p): Check stmt uses for undefs.
20745 2023-07-04 Richard Biener <rguenther@suse.de>
20747 PR tree-optimization/110436
20748 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
20749 force live but not relevant pattern stmts relevant.
20751 2023-07-04 Lili Cui <lili.cui@intel.com>
20753 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
20754 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
20756 2023-07-04 Richard Biener <rguenther@suse.de>
20758 PR middle-end/110495
20759 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
20760 since we do not set TREE_OVERFLOW on those since the
20761 introduction of VL vectors.
20762 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
20763 at TREE_OVERFLOW to determine validity of association.
20765 2023-07-04 Richard Biener <rguenther@suse.de>
20767 PR tree-optimization/110310
20768 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
20769 Move costing part ...
20770 (vect_analyze_loop_costing): ... here. Integrate better
20771 estimate for epilogues from ...
20772 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
20773 with actual epilogue status.
20774 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
20775 avoid cancelling epilogue vectorization.
20776 (vect_update_epilogue_niters): Remove. No longer update
20777 epilogue LOOP_VINFO_NITERS.
20779 2023-07-04 Pan Li <pan2.li@intel.com>
20782 2023-07-03 Pan Li <pan2.li@intel.com>
20784 * config/riscv/vector.md: Fix typo.
20786 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20788 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
20789 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
20790 (expand_gather_load_optab_fn): Ditto.
20791 (internal_load_fn_p): Ditto.
20792 (internal_store_fn_p): Ditto.
20793 (internal_gather_scatter_fn_p): Ditto.
20794 (internal_fn_len_index): Ditto.
20795 (internal_fn_mask_index): Ditto.
20796 (internal_fn_stored_value_index): Ditto.
20797 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
20798 (LEN_MASK_SCATTER_STORE): Ditto.
20799 * optabs.def (OPTAB_CD): Ditto.
20801 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20803 * config/riscv/riscv-vsetvl.cc
20804 (vector_insn_info::parse_insn): Add early break.
20806 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
20808 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
20809 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
20811 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
20813 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
20815 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
20817 * common/config/riscv/riscv-common.cc: Add support for zvbb,
20818 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
20819 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
20820 * config/riscv/arch-canonicalize: Add canonicalization info for
20821 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
20822 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
20823 (MASK_ZVBC): Likewise.
20824 (TARGET_ZVBB): Likewise.
20825 (TARGET_ZVBC): Likewise.
20826 (MASK_ZVKG): Likewise.
20827 (MASK_ZVKNED): Likewise.
20828 (MASK_ZVKNHA): Likewise.
20829 (MASK_ZVKNHB): Likewise.
20830 (MASK_ZVKSED): Likewise.
20831 (MASK_ZVKSH): Likewise.
20832 (MASK_ZVKN): Likewise.
20833 (MASK_ZVKNC): Likewise.
20834 (MASK_ZVKNG): Likewise.
20835 (MASK_ZVKS): Likewise.
20836 (MASK_ZVKSC): Likewise.
20837 (MASK_ZVKSG): Likewise.
20838 (MASK_ZVKT): Likewise.
20839 (TARGET_ZVKG): Likewise.
20840 (TARGET_ZVKNED): Likewise.
20841 (TARGET_ZVKNHA): Likewise.
20842 (TARGET_ZVKNHB): Likewise.
20843 (TARGET_ZVKSED): Likewise.
20844 (TARGET_ZVKSH): Likewise.
20845 (TARGET_ZVKN): Likewise.
20846 (TARGET_ZVKNC): Likewise.
20847 (TARGET_ZVKNG): Likewise.
20848 (TARGET_ZVKS): Likewise.
20849 (TARGET_ZVKSC): Likewise.
20850 (TARGET_ZVKSG): Likewise.
20851 (TARGET_ZVKT): Likewise.
20852 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
20854 2023-07-03 Andrew Pinski <apinski@marvell.com>
20856 PR middle-end/110510
20857 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
20859 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
20861 * config/darwin.h: Avoid duplicate multiply_defined specs on
20862 earlier Darwin versions with shared libgcc.
20864 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
20866 * tree.h (tree_int_cst_equal): Change return type from int to bool.
20867 (operand_equal_for_phi_arg_p): Ditto.
20868 (tree_map_base_marked_p): Ditto.
20869 * tree.cc (contains_placeholder_p): Update function body
20870 for bool return type.
20871 (type_cache_hasher::equal): Ditto.
20872 (tree_map_base_hash): Change return type
20873 from int to void and adjust function body accordingly.
20874 (tree_int_cst_equal): Ditto.
20875 (operand_equal_for_phi_arg_p): Ditto.
20876 (get_narrower): Change "first" variable to bool.
20877 (cl_option_hasher::equal): Update function body for bool return type.
20878 * ggc.h (ggc_set_mark): Change return type from int to bool.
20879 (ggc_marked_p): Ditto.
20880 * ggc-page.cc (gt_ggc_mx): Change return type
20881 from int to void and adjust function body accordingly.
20882 (ggc_set_mark): Ditto.
20884 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20886 * config/riscv/autovec.md: Change order of
20887 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
20888 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
20889 * doc/md.texi: Ditto.
20890 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
20891 * internal-fn.cc (len_maskload_direct): Ditto.
20892 (len_maskstore_direct): Ditto.
20893 (add_len_and_mask_args): New function.
20894 (expand_partial_load_optab_fn): Change order of
20895 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
20896 (expand_partial_store_optab_fn): Ditto.
20897 (internal_fn_len_index): New function.
20898 (internal_fn_mask_index): Change order of
20899 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
20900 (internal_fn_stored_value_index): Ditto.
20901 (internal_len_load_store_bias): Ditto.
20902 * internal-fn.h (internal_fn_len_index): New function.
20903 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
20904 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
20905 * tree-vect-stmts.cc (vectorizable_store): Ditto.
20906 (vectorizable_load): Ditto.
20908 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
20911 * doc/gm2.texi (Semantic checking): Include examples using
20912 -Wuninit-variable-checking.
20914 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20916 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
20917 (*single_widen_fnma<mode>): Ditto.
20918 (*double_widen_fms<mode>): Ditto.
20919 (*single_widen_fms<mode>): Ditto.
20920 (*double_widen_fnms<mode>): Ditto.
20921 (*single_widen_fnms<mode>): Ditto.
20923 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20925 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
20926 into "*" in pattern name which simplifies build files.
20927 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
20928 (*pred_single_widen_mul<mode>): New pattern.
20930 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
20932 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
20933 the index to be 0 or 1.
20935 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
20938 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20940 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
20941 (*single_widen_fnma<mode>): Ditto.
20942 (*double_widen_fms<mode>): Ditto.
20943 (*single_widen_fms<mode>): Ditto.
20944 (*double_widen_fnms<mode>): Ditto.
20945 (*single_widen_fnms<mode>): Ditto.
20947 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20949 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
20950 (*single_widen_fnma<mode>): Ditto.
20951 (*double_widen_fms<mode>): Ditto.
20952 (*single_widen_fms<mode>): Ditto.
20953 (*double_widen_fnms<mode>): Ditto.
20954 (*single_widen_fnms<mode>): Ditto.
20956 2023-07-03 Pan Li <pan2.li@intel.com>
20958 * config/riscv/vector.md: Fix typo.
20960 2023-07-03 Richard Biener <rguenther@suse.de>
20962 PR tree-optimization/110506
20963 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
20964 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
20966 2023-07-03 Richard Biener <rguenther@suse.de>
20968 PR tree-optimization/110506
20969 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
20970 type before relying on TYPE_PRECISION to produce a nonzero mask.
20972 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
20974 * config/mips/mips.md(*and<mode>3_mips16): Generates
20975 ZEB/ZEH instructions.
20977 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
20979 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
20980 address register to M16_REGS for MIPS16.
20981 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
20982 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
20983 (AVAIL_NON_MIPS16 (cache..)): Update to
20984 AVAIL_MIPS16E2_OR_NON_MIPS16.
20985 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
20986 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
20988 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
20990 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
20991 for ISA_HAS_MIPS16E2.
20992 (ISA_HAS_SYNC): Same as above.
20993 (ISA_HAS_LL_SC): Same as above.
20995 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
20997 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
20998 Add logics for generating instruction.
20999 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
21000 * config/mips/mips.md(mov_<load>l): Generates instructions.
21001 (mov_<load>r): Same as above.
21002 (mov_<store>l): Adjusted for the conditions above.
21003 (mov_<store>r): Same as above.
21004 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
21005 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
21007 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
21009 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
21010 (mips_const_insns): Same as above.
21011 (mips_output_move): Same as above.
21012 (mips_output_function_prologue): Same as above.
21013 * config/mips/mips.md: Same as above
21015 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
21017 * config/mips/constraints.md(Yz): New constraints for mips16e2.
21018 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
21019 (mips_bit_clear_info): Same as above.
21020 * config/mips/mips.cc(mips_bit_clear_info): New function for
21021 generating instructions.
21022 (mips_bit_clear_p): Same as above.
21023 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
21024 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
21025 (*and<mode>3): Generates INS instruction.
21026 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
21027 (ior<mode>3): Add logics for ORI instruction.
21028 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
21029 (*ior<mode>3_mips16): Add logics for XORI instruction.
21030 (*xor<mode>3_mips16): Generates XORI instrucion.
21031 (*extzv<mode>): Add logics for EXT instruction.
21032 (*insv<mode>): Add logics for INS instruction.
21033 * config/mips/predicates.md(bit_clear_operand): New predicate for
21034 generating bitwise instructions.
21035 (and_reg_operand): Add logics for generating bitwise instructions.
21037 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
21039 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
21040 that uses global pointer register.
21041 (mips16_unextended_reference_p): Same as above.
21042 (mips_pic_base_register): Same as above.
21043 (mips_init_relocs): Same as above.
21044 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
21045 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
21046 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
21047 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
21049 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
21051 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
21052 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
21053 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
21054 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
21055 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
21056 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
21058 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
21060 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
21062 * config/mips/mips.h(__mips_mips16e2): Defined a new
21064 (ISA_HAS_MIPS16E2): Defined a new macro.
21065 (ASM_SPEC): Pass mmips16e2 to the assembler.
21066 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
21067 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
21068 * doc/invoke.texi: Add -m(no-)mips16e2 option..
21070 2023-07-02 Jakub Jelinek <jakub@redhat.com>
21072 PR tree-optimization/110508
21073 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
21074 REALPART_EXPR opf nlhs if re2 is non-NULL.
21076 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21078 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
21080 * config/xtensa/xtensa.md (*xtensa_clamps):
21081 Add TARGET_MINMAX to the condition.
21083 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21085 * config/xtensa/xtensa.md (*eqne_INT_MIN):
21086 Add missing ":SI" to the match_operator.
21088 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
21091 * config/darwin.opt: Add fconstant-cfstrings alias to
21092 mconstant-cfstrings.
21093 * doc/invoke.texi: Amend invocation descriptions to reflect
21094 that the fconstant-cfstrings is a target-option alias and to
21095 add the missing mconstant-cfstrings option description to the
21098 2023-07-01 Jan Hubicka <jh@suse.cz>
21100 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
21101 parmaeter; update profile.
21102 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
21103 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
21104 (static_loop_exit): ... this; return the edge to be elliminated.
21105 (ch_base::copy_headers): Handle profile updating for eliminated exits.
21107 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
21109 * config/i386/i386-features.cc (compute_convert_gain): Provide
21110 gains/costs for ROTATE and ROTATERT (by an integer constant).
21111 (general_scalar_chain::convert_rotate): New helper function to
21112 convert a DImode or SImode rotation by an integer constant into
21114 (general_scalar_chain::convert_insn): Call the new convert_rotate
21115 for ROTATE and ROTATERT.
21116 (general_scalar_to_vector_candidate_p): Consider ROTATE and
21117 ROTATERT to be candidates if the second operand is an integer
21118 constant, valid for a rotation (or shift) in the given mode.
21119 * config/i386/i386-features.h (general_scalar_chain): Add new
21120 helper method convert_rotate.
21122 2023-07-01 Jan Hubicka <jh@suse.cz>
21124 PR tree-optimization/103680
21125 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
21126 make message clearer.
21128 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
21130 PR tree-optimization/101832
21131 * tree-object-size.cc (addr_object_size): Handle structure/union type
21132 when it has flexible size.
21134 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
21136 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
21137 (fold_nonarray_ctor_reference): Likewise. Specifically deal
21138 with integral bit-fields.
21139 (fold_ctor_reference): Make sure that the constructor uses the
21140 native storage order.
21142 2023-06-30 Jan Hubicka <jh@suse.cz>
21144 PR middle-end/109849
21145 * predict.cc (estimate_bb_frequencies): Turn to static function.
21146 (expr_expected_value_1): Fix handling of binary expressions with
21148 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
21149 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
21151 * predict.h (estimate_bb_frequencies): No longer declare it.
21153 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
21155 * fold-const.h (multiple_of_p): Change return type from int to bool.
21156 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
21157 neg_conp_p and neg_var_p variables to bool.
21158 (const_binop): Change sat_p variable to bool.
21159 (merge_ranges): Change no_overlap variable to bool.
21160 (extract_muldiv_1): Change same_p variable to bool.
21161 (tree_swap_operands_p): Update function body for bool return type.
21162 (fold_truth_andor): Change commutative variable to bool.
21163 (multiple_of_p): Change return type
21164 from int to void and adjust function body accordingly.
21165 * optabs.h (expand_twoval_unop): Change return type from int to bool.
21166 (expand_twoval_binop): Ditto.
21167 (can_compare_p): Ditto.
21168 (have_add2_insn): Ditto.
21169 (have_addptr3_insn): Ditto.
21170 (have_sub2_insn): Ditto.
21171 (have_insn_for): Ditto.
21172 * optabs.cc (add_equal_note): Ditto.
21173 (widen_operand): Change no_extend argument from int to bool.
21174 (expand_binop): Ditto.
21175 (expand_twoval_unop): Change return type
21176 from int to void and adjust function body accordingly.
21177 (expand_twoval_binop): Ditto.
21178 (can_compare_p): Ditto.
21179 (have_add2_insn): Ditto.
21180 (have_addptr3_insn): Ditto.
21181 (have_sub2_insn): Ditto.
21182 (have_insn_for): Ditto.
21184 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
21186 * config/aarch64/aarch64-simd.md
21187 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
21188 Expansions for abd vec widen optabs.
21189 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
21190 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
21191 that give the appropriate extend RTL for the max RTL.
21193 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
21195 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
21196 * optabs.def (vec_widen_sabd_optab,
21197 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
21198 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
21199 vec_widen_uabd_optab,
21200 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
21201 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
21203 * doc/md.texi: Document them.
21204 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
21205 to build a VEC_WIDEN_ABD call if the input precision is smaller
21206 than the precision of the output.
21207 (vect_recog_widen_abd_pattern): Should an ABD expression be
21208 found preceeding an extension, replace the two with a
21211 2023-06-30 Pan Li <pan2.li@intel.com>
21213 * config/riscv/vector.md: Refactor the common condition.
21215 2023-06-30 Richard Biener <rguenther@suse.de>
21217 PR tree-optimization/110496
21218 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
21219 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
21221 2023-06-30 Richard Biener <rguenther@suse.de>
21223 PR middle-end/110489
21224 * statistics.cc (curr_statistics_hash): Add argument
21225 indicating whether we should allocate the hash.
21226 (statistics_fini_pass): If the hash isn't allocated
21227 only print the summary header.
21229 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
21230 Thomas Schwinge <thomas@codesourcery.com>
21232 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
21234 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
21237 * config/mips/mips.cc (mips_function_arg_alignment): Returns
21238 the alignment of function argument. In case of typedef type,
21239 it returns the aligment of the aliased type.
21240 (mips_function_arg_boundary): Relocated calculation of the
21241 aligment of function arguments.
21243 2023-06-29 Jan Hubicka <jh@suse.cz>
21245 PR tree-optimization/109849
21246 * ipa-fnsummary.cc (decompose_param_expr): Skip
21247 functions returning its parameter.
21248 (set_cond_stmt_execution_predicate): Return early
21249 if predicate was constructed.
21251 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
21254 * doc/extend.texi: Document GCC extension on a structure containing
21255 a flexible array member to be a member of another structure.
21257 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
21259 * print-tree.cc (print_node): Print new bit type_include_flexarray.
21260 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
21261 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
21262 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
21263 in bit no_named_args_stdarg_p properly for its corresponding type.
21264 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
21265 out bit no_named_args_stdarg_p properly for its corresponding type.
21266 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
21268 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
21270 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
21271 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
21272 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
21274 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
21276 * value-range.cc (frange::set): Do not call verify_range.
21277 (frange::normalize_kind): Verify range.
21278 (frange::union_nans): Do not call verify_range.
21279 (frange::union_): Same.
21280 (frange::intersect): Same.
21281 (irange::irange_single_pair_union): Call normalize_kind if
21283 (irange::union_): Same.
21284 (irange::intersect): Same.
21285 (irange::set_range_from_nonzero_bits): Verify range.
21286 (irange::set_nonzero_bits): Call normalize_kind if necessary.
21287 (irange::get_nonzero_bits): Tweak comment.
21288 (irange::intersect_nonzero_bits): Call normalize_kind if
21290 (irange::union_nonzero_bits): Same.
21291 * value-range.h (irange::normalize_kind): Verify range.
21293 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
21295 * cselib.h (rtx_equal_for_cselib_1):
21296 Change return type from int to bool.
21297 (references_value_p): Ditto.
21298 (rtx_equal_for_cselib_p): Ditto.
21299 * expr.h (can_store_by_pieces): Ditto.
21300 (try_casesi): Ditto.
21301 (try_tablejump): Ditto.
21302 (safe_from_p): Ditto.
21303 * sbitmap.h (bitmap_equal_p): Ditto.
21304 * cselib.cc (references_value_p): Change return type
21305 from int to void and adjust function body accordingly.
21306 (rtx_equal_for_cselib_1): Ditto.
21307 * expr.cc (is_aligning_offset): Ditto.
21308 (can_store_by_pieces): Ditto.
21309 (mostly_zeros_p): Ditto.
21310 (all_zeros_p): Ditto.
21311 (safe_from_p): Ditto.
21312 (is_aligning_offset): Ditto.
21313 (try_casesi): Ditto.
21314 (try_tablejump): Ditto.
21315 (store_constructor): Change "need_to_clear" and
21316 "const_bounds_p" variables to bool.
21317 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
21319 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
21321 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
21324 2023-06-29 Richard Biener <rguenther@suse.de>
21326 PR tree-optimization/110460
21327 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
21328 Only allow integral, pointer and scalar float type scalar_type.
21330 2023-06-29 Lili Cui <lili.cui@intel.com>
21332 PR tree-optimization/110148
21333 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
21334 ops in this function.
21336 2023-06-29 Richard Biener <rguenther@suse.de>
21338 PR middle-end/110452
21339 * expr.cc (store_constructor): Handle uniform boolean
21340 vectors with integer mode specially.
21342 2023-06-29 Richard Biener <rguenther@suse.de>
21344 PR middle-end/110461
21345 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
21348 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
21350 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
21351 (array_slice): Relax va_gc constructor to handle all vectors
21352 with a vl_embed layout.
21354 2023-06-29 Pan Li <pan2.li@intel.com>
21356 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
21357 (riscv_mode_needed): Likewise.
21358 (riscv_entity_mode_after): Likewise.
21359 (riscv_mode_after): Likewise.
21360 (riscv_mode_entry): Likewise.
21361 (riscv_mode_exit): Likewise.
21362 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
21364 * config/riscv/riscv.md: Add FRM register.
21365 * config/riscv/vector-iterators.md: Add FRM type.
21366 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
21367 (fsrm): Define new insn for fsrm instruction.
21369 2023-06-29 Pan Li <pan2.li@intel.com>
21371 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
21372 Add macro for static frm min and max.
21373 * config/riscv/riscv-vector-builtins-bases.cc
21374 (class binop_frm): New class for floating-point with frm.
21375 (BASE): Add vfadd for frm.
21376 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
21377 * config/riscv/riscv-vector-builtins-functions.def
21378 (vfadd_frm): Likewise.
21379 * config/riscv/riscv-vector-builtins-shapes.cc
21380 (struct alu_frm_def): New struct for alu with frm.
21381 (SHAPE): Add alu with frm.
21382 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
21383 * config/riscv/riscv-vector-builtins.cc
21384 (function_checker::report_out_of_range_and_not): New function
21385 for report out of range and not val.
21386 (function_checker::require_immediate_range_or): New function
21387 for checking in range or one val.
21388 * config/riscv/riscv-vector-builtins.h: Add function decl.
21390 2023-06-29 Cui, Lili <lili.cui@intel.com>
21392 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
21393 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
21395 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
21398 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
21399 to insn before validating it.
21401 2023-06-28 Jan Hubicka <jh@suse.cz>
21403 PR middle-end/110334
21404 * ipa-fnsummary.h (ipa_fn_summary): Add
21405 safe_to_inline_to_always_inline.
21406 * ipa-inline.cc (can_early_inline_edge_p): ICE
21407 if SSA is not built; do cycle checking for
21408 always_inline functions.
21409 (inline_always_inline_functions): Be recrusive;
21410 watch for cycles; do not updat overall summary.
21411 (early_inliner): Do not give up on always_inlines.
21412 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
21415 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
21417 * output.h (leaf_function_p): Change return type from int to bool.
21418 (final_forward_branch_p): Ditto.
21419 (only_leaf_regs_used): Ditto.
21420 (maybe_assemble_visibility): Ditto.
21421 * varasm.h (supports_one_only): Ditto.
21422 * rtl.h (compute_alignments): Change return type from int to void.
21423 * final.cc (app_on): Change return type from int to bool.
21424 (compute_alignments): Change return type from int to void
21425 and adjust function body accordingly.
21426 (shorten_branches): Change "something_changed" variable
21427 type from int to bool.
21428 (leaf_function_p): Change return type from int to bool
21429 and adjust function body accordingly.
21430 (final_forward_branch_p): Ditto.
21431 (only_leaf_regs_used): Ditto.
21432 * varasm.cc (contains_pointers_p): Change return type from
21433 int to bool and adjust function body accordingly.
21434 (compare_constant): Ditto.
21435 (maybe_assemble_visibility): Ditto.
21436 (supports_one_only): Ditto.
21438 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
21441 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
21442 (maybe_copy_reg_attrs): New function.
21443 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
21444 (copyprop_hardreg_forward_1): Ditto.
21446 2023-06-28 Richard Biener <rguenther@suse.de>
21448 PR tree-optimization/110434
21449 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
21450 VAR we replace with <retval>.
21452 2023-06-28 Richard Biener <rguenther@suse.de>
21454 PR tree-optimization/110451
21455 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
21456 tcc_comparison are expensive.
21458 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
21460 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
21461 for TImode comparisons on 32-bit architectures.
21462 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
21463 SWIM1248x to exclude/avoid TImode being conditional on -m64.
21464 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
21465 and/or with TARGET_SSE4_1.
21466 * config/i386/predicates.md (ix86_timode_comparison_operator):
21467 New predicate that depends upon TARGET_64BIT.
21468 (ix86_timode_comparison_operand): Likewise.
21470 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
21473 * config/i386/i386-features.cc (compute_convert_gain): Provide
21474 more accurate gains for conversion of scalar comparisons to
21477 2023-06-28 Richard Biener <rguenther@suse.de>
21479 PR tree-optimization/110443
21480 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
21483 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
21485 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
21486 (peephole2 for move_and_compare): New.
21487 (mode_iterator WORD): New. Set the mode to SI/DImode by
21489 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
21490 (split pattern for compare_and_move): Likewise.
21492 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21494 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
21495 (*single_widen_fma<mode>): Ditto.
21497 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
21500 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
21502 (altivec_vupkhs<VU_char>_direct): ...this.
21503 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
21504 predicate to test if a constant can be loaded with vspltisw and
21506 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
21507 a vector constant can be synthesized with a vspltisw and a vupkhsw.
21508 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
21510 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
21511 function to return true if OP mode is V2DI and can be synthesized
21512 with vupkhsw and vspltisw.
21513 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
21514 constants with vspltisw and vupkhsw.
21516 2023-06-28 Jan Hubicka <jh@suse.cz>
21518 PR tree-optimization/110377
21519 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
21521 (ipa_analyze_node): Enable ranger.
21523 2023-06-28 Richard Biener <rguenther@suse.de>
21525 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
21526 (TYPE_PRECISION_RAW): Provide raw access to the precision
21528 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
21529 (gimple_canonical_types_compatible_p): Likewise.
21530 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
21531 Stream TYPE_PRECISION_RAW.
21532 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
21534 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
21536 2023-06-28 Alexandre Oliva <oliva@adacore.com>
21538 * doc/extend.texi (zero-call-used-regs): Document leafy and
21540 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
21541 LEAFY and variants.
21542 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
21543 functions in leafy mode.
21544 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
21546 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21548 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
21549 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
21551 (@pred_single_widen_add<mode>): New pattern.
21552 (@pred_single_widen_sub<mode>): New pattern.
21554 2023-06-28 liuhongt <hongtao.liu@intel.com>
21556 * config/i386/i386.cc (ix86_invalid_conversion): New function.
21557 (TARGET_INVALID_CONVERSION): Define as
21558 ix86_invalid_conversion.
21560 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
21562 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
21564 (<float_cvt><vnconvert><mode>2): Ditto.
21565 (<optab><mode><vnconvert>2): Ditto.
21566 (<float_cvt><mode><vnconvert>2): Ditto.
21567 * config/riscv/vector-iterators.md: Add vnconvert.
21569 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
21571 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
21573 (extend<v_quad_trunc><mode>2): Ditto.
21574 (trunc<mode><v_double_trunc>2): Ditto.
21575 (trunc<mode><v_quad_trunc>2): Ditto.
21576 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
21577 V_QUAD_TRUNC and v_quad_trunc.
21579 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
21581 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
21584 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
21586 * config/riscv/autovec.md (copysign<mode>3): Add expander.
21587 (xorsign<mode>3): Ditto.
21588 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
21590 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
21594 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
21595 (@pred_ncopysign<mode>_scalar): Ditto.
21597 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
21599 * config/riscv/autovec.md: VF_AUTO -> VF.
21600 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
21601 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
21603 * config/riscv/vector.md: Use new iterators.
21605 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
21607 * match.pd: Use element_mode and check if target supports
21608 operation with new type.
21610 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21612 * config/aarch64/aarch64-sve-builtins-base.cc
21613 (svdupq_impl::fold_nonconst_dupq): New method.
21614 (svdupq_impl::fold): Call fold_nonconst_dupq.
21616 2023-06-27 Andrew Pinski <apinski@marvell.com>
21618 PR middle-end/110420
21619 PR middle-end/103979
21620 PR middle-end/98619
21621 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
21623 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
21625 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
21626 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
21628 (set_switch_stmt_execution_predicate): Same.
21629 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
21631 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
21633 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
21634 ipa_vr instead of value_range.
21637 (ipa_get_value_range): Same.
21638 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
21642 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
21644 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
21645 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
21646 (ipa_set_jfunc_vr): Take a range.
21647 (ipa_compute_jump_functions_for_edge): Pass range to
21649 (ipa_write_jump_function): Call streamer write helper.
21650 (ipa_read_jump_function): Call streamer read helper.
21651 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
21653 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
21655 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
21656 as a probable initializer rather than a probable complete statement.
21658 2023-06-27 Richard Biener <rguenther@suse.de>
21660 PR tree-optimization/96208
21661 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
21662 a non-grouped load if it is the same for all lanes.
21663 (vect_build_slp_tree_2): Handle not grouped loads.
21664 (vect_optimize_slp_pass::remove_redundant_permutations):
21666 (vect_transform_slp_perm_load_1): Likewise.
21667 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
21668 (get_group_load_store_type): Likewise. Handle
21669 invariant accesses.
21670 (vectorizable_load): Likewise.
21672 2023-06-27 liuhongt <hongtao.liu@intel.com>
21674 PR rtl-optimization/110237
21675 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
21677 (maskstore<mode><avx512fmaskmodelower): Ditto.
21678 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
21679 from original <avx512>_store<mode>_mask.
21681 2023-06-27 liuhongt <hongtao.liu@intel.com>
21683 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
21684 Move flag_expensive_optimizations && !optimize_size to ..
21685 * config/i386/i386-options.cc (ix86_option_override_internal):
21686 .. this, it makes -mvzeroupper independent of optimization
21687 level, but still keeps the behavior of architecture
21688 tuning(emit_vzeroupper) unchanged.
21690 2023-06-27 liuhongt <hongtao.liu@intel.com>
21693 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
21694 vzeroupper for vzeroupper call_insn.
21696 2023-06-27 Andrew Pinski <apinski@marvell.com>
21698 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
21701 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21703 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
21706 2023-06-26 Andrew Pinski <apinski@marvell.com>
21708 * doc/extend.texi (access attribute): Add
21710 (interrupt/interrupt_handler attribute):
21713 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21715 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
21716 Use <DWI> instead of <V2XWIDE>.
21717 (aarch64_sqrshrun_n<mode>): Likewise.
21719 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21721 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
21723 (aarch64_rnd_imm_p): ... This.
21724 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
21726 (aarch64_int_rnd_operand): ... This.
21727 (aarch64_simd_rshrn_imm_vec): Delete.
21728 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
21729 Adjust for the above.
21730 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
21731 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
21732 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
21733 (aarch64_sqrshrun_n<mode>_insn): Likewise.
21734 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
21735 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
21736 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
21737 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
21738 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
21740 (aarch64_rnd_imm_p): ... This.
21742 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
21744 * config/s390/s390.cc (s390_encode_section_info): Set
21745 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
21748 2023-06-26 Jan Hubicka <jh@suse.cz>
21750 PR tree-optimization/109849
21751 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
21752 count of newly constructed forwarder block.
21754 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
21756 * doc/optinfo.texi: Fix "steam" -> "stream".
21758 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21760 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
21762 (dse_optimize_stmt): Add LEN_MASK_STORE.
21764 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21766 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
21767 fold of LOAD/STORE with length.
21769 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
21771 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
21772 Check for interdependence between operands 1 and 2.
21774 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
21776 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
21777 into account when costing non-widening/truncating conversions.
21779 2023-06-26 Richard Biener <rguenther@suse.de>
21781 PR tree-optimization/110381
21782 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
21783 Materialize permutes before fold-left reductions.
21785 2023-06-26 Pan Li <pan2.li@intel.com>
21787 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
21789 2023-06-26 Richard Biener <rguenther@suse.de>
21791 * varasm.cc (initializer_constant_valid_p_1): Also
21792 constrain the type of value to be scalar integral
21793 before dispatching to narrowing_initializer_constant_valid_p.
21795 2023-06-26 Richard Biener <rguenther@suse.de>
21797 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
21798 Use element_precision.
21800 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21802 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
21804 (vcondu<V:mode><VI:mode>): Ditto.
21805 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
21806 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
21808 2023-06-26 Richard Biener <rguenther@suse.de>
21810 PR tree-optimization/110392
21811 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
21812 Do early exits on true/false predicate only after normalization.
21814 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21816 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
21819 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
21821 * config/i386/i386.md (peephole2): Simplify zeroing a register
21822 followed by an IOR, XOR or PLUS operation on it, into a move.
21823 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
21824 eliminate (and hide from reload) unnecessary word to doubleword
21825 extensions that are followed by left shifts by sufficiently large,
21826 but valid, bit counts.
21828 2023-06-26 liuhongt <hongtao.liu@intel.com>
21830 PR tree-optimization/110371
21831 PR tree-optimization/110018
21832 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
21833 save intermediate type operand instead of "subtle" vec_dest
21836 2023-06-26 liuhongt <hongtao.liu@intel.com>
21838 PR tree-optimization/110371
21839 PR tree-optimization/110018
21840 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
21841 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
21843 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
21845 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
21846 Override tune_string with arch_string if tune_string is not
21847 explicitly specified.
21849 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21851 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
21853 * config/riscv/riscv-vsetvl.h: New function.
21855 2023-06-25 Li Xu <xuli1@eswincomputing.com>
21857 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
21860 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21862 * config/riscv/autovec.md (len_load_<mode>): Remove.
21863 (len_maskload<mode><vm>): Remove.
21864 (len_store_<mode>): New pattern.
21865 (len_maskstore<mode><vm>): New pattern.
21866 * config/riscv/predicates.md (autovec_length_operand): New predicate.
21867 * config/riscv/riscv-protos.h (enum insn_type): New enum.
21868 (expand_load_store): New function.
21869 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
21870 (emit_nonvlmax_masked_insn): Ditto.
21871 (expand_load_store): Ditto.
21872 * config/riscv/riscv-vector-builtins.cc
21873 (function_expander::use_contiguous_store_insn): Add avl_type operand
21875 * config/riscv/vector.md: Ditto.
21877 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21879 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
21882 2023-06-25 Pan Li <pan2.li@intel.com>
21884 * config/riscv/vector.md: Revert.
21886 2023-06-25 Pan Li <pan2.li@intel.com>
21888 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
21889 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
21890 (ADJUST_ALIGNMENT): Ditto.
21891 (RVV_TUPLE_PARTIAL_MODES): Ditto.
21892 (ADJUST_NUNITS): Ditto.
21893 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
21894 (vfloat16mf4x3_t): Ditto.
21895 (vfloat16mf4x4_t): Ditto.
21896 (vfloat16mf4x5_t): Ditto.
21897 (vfloat16mf4x6_t): Ditto.
21898 (vfloat16mf4x7_t): Ditto.
21899 (vfloat16mf4x8_t): Ditto.
21900 (vfloat16mf2x2_t): Ditto.
21901 (vfloat16mf2x3_t): Ditto.
21902 (vfloat16mf2x4_t): Ditto.
21903 (vfloat16mf2x5_t): Ditto.
21904 (vfloat16mf2x6_t): Ditto.
21905 (vfloat16mf2x7_t): Ditto.
21906 (vfloat16mf2x8_t): Ditto.
21907 (vfloat16m1x2_t): Ditto.
21908 (vfloat16m1x3_t): Ditto.
21909 (vfloat16m1x4_t): Ditto.
21910 (vfloat16m1x5_t): Ditto.
21911 (vfloat16m1x6_t): Ditto.
21912 (vfloat16m1x7_t): Ditto.
21913 (vfloat16m1x8_t): Ditto.
21914 (vfloat16m2x2_t): Ditto.
21915 (vfloat16m2x3_t): Diito.
21916 (vfloat16m2x4_t): Diito.
21917 (vfloat16m4x2_t): Diito.
21918 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
21919 (vfloat16mf4x3_t): Ditto.
21920 (vfloat16mf4x4_t): Ditto.
21921 (vfloat16mf4x5_t): Ditto.
21922 (vfloat16mf4x6_t): Ditto.
21923 (vfloat16mf4x7_t): Ditto.
21924 (vfloat16mf4x8_t): Ditto.
21925 (vfloat16mf2x2_t): Ditto.
21926 (vfloat16mf2x3_t): Ditto.
21927 (vfloat16mf2x4_t): Ditto.
21928 (vfloat16mf2x5_t): Ditto.
21929 (vfloat16mf2x6_t): Ditto.
21930 (vfloat16mf2x7_t): Ditto.
21931 (vfloat16mf2x8_t): Ditto.
21932 (vfloat16m1x2_t): Ditto.
21933 (vfloat16m1x3_t): Ditto.
21934 (vfloat16m1x4_t): Ditto.
21935 (vfloat16m1x5_t): Ditto.
21936 (vfloat16m1x6_t): Ditto.
21937 (vfloat16m1x7_t): Ditto.
21938 (vfloat16m1x8_t): Ditto.
21939 (vfloat16m2x2_t): Ditto.
21940 (vfloat16m2x3_t): Ditto.
21941 (vfloat16m2x4_t): Ditto.
21942 (vfloat16m4x2_t): Ditto.
21943 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
21944 * config/riscv/riscv.md: Ditto.
21945 * config/riscv/vector-iterators.md: Ditto.
21947 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21949 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
21950 (gimple_fold_partial_load_store_mem_ref): Ditto.
21951 (gimple_fold_partial_store): Ditto.
21952 (gimple_fold_call): Ditto.
21954 2023-06-25 liuhongt <hongtao.liu@intel.com>
21957 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
21958 Refine pattern with UNSPEC_MASKLOAD.
21959 (maskload<mode><avx512fmaskmodelower>): Ditto.
21960 (*<avx512>_load<mode>_mask): Extend mode iterator to
21962 (*<avx512>_load<mode>): Ditto.
21964 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21966 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
21968 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21970 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
21971 LEN_MASK_{LOAD,STORE}
21973 2023-06-25 yulong <shiyulong@iscas.ac.cn>
21975 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
21977 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
21979 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
21981 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21983 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
21984 (*fma<VI:mode><P:mode>): Ditto.
21985 (*fnma<mode>): Ditto.
21986 (*fnma<VI:mode><P:mode>): Ditto.
21988 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21990 * config/riscv/autovec.md (fma<mode>4): New pattern.
21991 (*fma<mode>): Ditto.
21992 (fnma<mode>4): Ditto.
21993 (*fnma<mode>): Ditto.
21994 (fms<mode>4): Ditto.
21995 (*fms<mode>): Ditto.
21996 (fnms<mode>4): Ditto.
21997 (*fnms<mode>): Ditto.
21998 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
22000 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
22001 * config/riscv/vector.md: Fix attribute bug.
22003 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22005 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
22006 Apply LEN_MASK_{LOAD,STORE}.
22008 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22010 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
22011 Add LEN_MASK_{LOAD,STORE}.
22013 2023-06-24 David Malcolm <dmalcolm@redhat.com>
22015 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
22016 * diagnostic.cc: Likewise.
22017 * text-art/box-drawing.cc: Likewise.
22018 * text-art/canvas.cc: Likewise.
22019 * text-art/ruler.cc: Likewise.
22020 * text-art/selftests.cc: Likewise.
22021 * text-art/selftests.h (text_art::canvas): New forward decl.
22022 * text-art/style.cc: Add #define INCLUDE_VECTOR.
22023 * text-art/styled-string.cc: Likewise.
22024 * text-art/table.cc: Likewise.
22025 * text-art/table.h: Remove #include <vector>.
22026 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
22027 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
22028 Remove #include of <vector> and <string>.
22029 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
22030 * text-art/widget.h: Remove #include <vector>.
22032 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22034 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
22035 (internal_load_fn_p): Add LEN_MASK_LOAD.
22036 (internal_store_fn_p): Add LEN_MASK_STORE.
22037 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
22038 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
22039 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
22040 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
22041 (get_len_load_store_mode): Ditto.
22042 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
22043 (get_len_load_store_mode): Ditto.
22044 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
22045 (get_all_ones_mask): New function.
22046 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
22047 (vectorizable_load): Ditto.
22049 2023-06-23 Marek Polacek <polacek@redhat.com>
22051 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
22052 -std=gnu++26. Document that for C++23, its value is 202302L.
22053 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
22054 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
22055 (gen_compile_unit_die): Likewise.
22057 2023-06-23 Jan Hubicka <jh@suse.cz>
22059 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
22061 (pass_phiprop::execute): Do not compute it here; return
22062 update_ssa_only_virtuals if something changed.
22063 (pass_data_phiprop): Remove TODO_update_ssa from todos.
22065 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
22066 Aaron Sawdey <acsawdey@linux.ibm.com>
22069 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
22070 allowed prefixed lwa to be generated.
22071 * config/rs6000/fusion.md: Regenerate.
22072 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
22073 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
22074 plus compare immediate fused insns.
22075 (maybe_prefixed): Likewise.
22077 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
22079 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
22080 of ASHIFT to const0_rtx with sufficiently large shift count.
22081 Optimize highpart SUBREGs of ASHIFT as the shift operand when
22082 the shift count is the correct offset. Optimize SUBREGs of
22083 multi-word logic operations if the SUBREGs of both operands
22086 2023-06-23 Richard Biener <rguenther@suse.de>
22088 * varasm.cc (initializer_constant_valid_p_1): Only
22089 allow conversions between scalar floating point types.
22091 2023-06-23 Richard Biener <rguenther@suse.de>
22093 * tree-vect-stmts.cc (vectorizable_assignment):
22094 Properly handle non-integral operands when analyzing
22097 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22099 PR tree-optimization/110280
22100 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
22101 using build_vector_from_val with the element of input operand, and
22102 mask's type if operand and mask's types don't match.
22104 2023-06-23 Richard Biener <rguenther@suse.de>
22106 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
22107 the truth_value_p case with !VECTOR_TYPE_P.
22109 2023-06-23 Richard Biener <rguenther@suse.de>
22111 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
22112 Exit early when the type isn't scalar integral.
22114 2023-06-23 Richard Biener <rguenther@suse.de>
22116 * match.pd ((outertype)((innertype0)a+(innertype1)b)
22117 -> ((newtype)a+(newtype)b)): Use element_precision
22120 2023-06-23 Richard Biener <rguenther@suse.de>
22122 * fold-const.cc (fold_binary_loc): Use element_precision
22123 when trying (double)float1 CMP (double)float2 to
22124 float1 CMP float2 simplification.
22125 * match.pd: Likewise.
22127 2023-06-23 Richard Biener <rguenther@suse.de>
22129 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
22130 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
22132 2023-06-23 Richard Biener <rguenther@suse.de>
22134 * tree-vect-stmts.cc (vector_vector_composition_type):
22135 Handle composition of a vector from a number of elements that
22136 happens to match its number of lanes.
22138 2023-06-22 Marek Polacek <polacek@redhat.com>
22140 * configure.ac (--enable-host-bind-now): New check. Add
22141 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
22142 * configure: Regenerate.
22143 * doc/install.texi: Document --enable-host-bind-now.
22145 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
22147 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
22149 2023-06-22 Richard Biener <rguenther@suse.de>
22151 PR tree-optimization/110332
22152 * tree-ssa-phiprop.cc (propagate_with_phi): Always
22153 check aliasing with edge inserted loads.
22155 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
22156 Uros Bizjak <ubizjak@gmail.com>
22158 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
22159 expansion of ptestc with equal operands as producing const1_rtx.
22160 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
22161 estimates of UNSPEC_PTEST, where the ptest performs the PAND
22162 or PAND of its operands.
22163 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
22164 of reg_equal_p operands into an x86_stc instruction.
22165 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
22166 (define_split): Similar to above for strict_low_part destinations.
22167 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
22169 2023-06-22 David Malcolm <dmalcolm@redhat.com>
22172 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
22173 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
22175 (fanalyzer-debug-text-art): New.
22177 2023-06-22 David Malcolm <dmalcolm@redhat.com>
22179 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
22180 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
22181 text-art/style.o, text-art/styled-string.o, text-art/table.o,
22182 text-art/theme.o, and text-art/widget.o.
22183 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
22184 (COLOR_FG_BRIGHT_RED): New.
22185 (COLOR_FG_BRIGHT_GREEN): New.
22186 (COLOR_FG_BRIGHT_YELLOW): New.
22187 (COLOR_FG_BRIGHT_BLUE): New.
22188 (COLOR_FG_BRIGHT_MAGENTA): New.
22189 (COLOR_FG_BRIGHT_CYAN): New.
22190 (COLOR_FG_BRIGHT_WHITE): New.
22191 (COLOR_BG_BRIGHT_BLACK): New.
22192 (COLOR_BG_BRIGHT_RED): New.
22193 (COLOR_BG_BRIGHT_GREEN): New.
22194 (COLOR_BG_BRIGHT_YELLOW): New.
22195 (COLOR_BG_BRIGHT_BLUE): New.
22196 (COLOR_BG_BRIGHT_MAGENTA): New.
22197 (COLOR_BG_BRIGHT_CYAN): New.
22198 (COLOR_BG_BRIGHT_WHITE): New.
22199 * common.opt (fdiagnostics-text-art-charset=): New option.
22200 (diagnostic-text-art.h): New SourceInclude.
22201 (diagnostic_text_art_charset) New Enum and EnumValues.
22202 * configure: Regenerate.
22203 * configure.ac (gccdepdir): Add text-art to loop.
22204 * diagnostic-diagram.h: New file.
22205 * diagnostic-format-json.cc (json_emit_diagram): New.
22206 (diagnostic_output_format_init_json): Wire it up to
22207 context->m_diagrams.m_emission_cb.
22208 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
22209 "text-art/canvas.h".
22210 (sarif_result::on_nested_diagnostic): Move code to...
22211 (sarif_result::add_related_location): ...this new function.
22212 (sarif_result::on_diagram): New.
22213 (sarif_builder::emit_diagram): New.
22214 (sarif_builder::make_message_object_for_diagram): New.
22215 (sarif_emit_diagram): New.
22216 (diagnostic_output_format_init_sarif): Set
22217 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
22218 * diagnostic-text-art.h: New file.
22219 * diagnostic.cc: Include "diagnostic-text-art.h",
22220 "diagnostic-diagram.h", and "text-art/theme.h".
22221 (diagnostic_initialize): Initialize context->m_diagrams and
22222 call diagnostics_text_art_charset_init.
22223 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
22224 (diagnostic_emit_diagram): New.
22225 (diagnostics_text_art_charset_init): New.
22226 * diagnostic.h (text_art::theme): New forward decl.
22227 (class diagnostic_diagram): Likewise.
22228 (diagnostic_context::m_diagrams): New field.
22229 (diagnostic_emit_diagram): New decl.
22230 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
22231 -fdiagnostics-text-art-charset=.
22232 (-fdiagnostics-plain-output): Add
22233 -fdiagnostics-text-art-charset=none.
22234 * gcc.cc: Include "diagnostic-text-art.h".
22235 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
22236 * opts-common.cc (decode_cmdline_options_to_array): Add
22237 "-fdiagnostics-text-art-charset=none" to expanded_args for
22238 -fdiagnostics-plain-output.
22239 * opts.cc: Include "diagnostic-text-art.h".
22240 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
22241 * pretty-print.cc (pp_unicode_character): New.
22242 * pretty-print.h (pp_unicode_character): New decl.
22243 * selftest-run-tests.cc: Include "text-art/selftests.h".
22244 (selftest::run_tests): Call text_art_tests.
22245 * text-art/box-drawing-chars.inc: New file, generated by
22246 contrib/unicode/gen-box-drawing-chars.py.
22247 * text-art/box-drawing.cc: New file.
22248 * text-art/box-drawing.h: New file.
22249 * text-art/canvas.cc: New file.
22250 * text-art/canvas.h: New file.
22251 * text-art/ruler.cc: New file.
22252 * text-art/ruler.h: New file.
22253 * text-art/selftests.cc: New file.
22254 * text-art/selftests.h: New file.
22255 * text-art/style.cc: New file.
22256 * text-art/styled-string.cc: New file.
22257 * text-art/table.cc: New file.
22258 * text-art/table.h: New file.
22259 * text-art/theme.cc: New file.
22260 * text-art/theme.h: New file.
22261 * text-art/types.h: New file.
22262 * text-art/widget.cc: New file.
22263 * text-art/widget.h: New file.
22265 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
22267 * function.h (emit_initial_value_sets):
22268 Change return type from int to void.
22269 (aggregate_value_p): Change return type from int to bool.
22270 (prologue_contains): Ditto.
22271 (epilogue_contains): Ditto.
22272 (prologue_epilogue_contains): Ditto.
22273 * function.cc (temp_slot): Make "in_use" variable bool.
22274 (make_slot_available): Update for changed "in_use" variable.
22275 (assign_stack_temp_for_type): Ditto.
22276 (emit_initial_value_sets): Change return type from int to void
22277 and update function body accordingly.
22278 (instantiate_virtual_regs): Ditto.
22279 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
22280 (safe_insn_predicate): Change return type from int to bool.
22281 (aggregate_value_p): Change return type from int to bool
22282 and update function body accordingly.
22283 (prologue_contains): Change return type from int to bool.
22284 (prologue_epilogue_contains): Ditto.
22286 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
22288 * common.opt (fp_contract_mode) [on]: Remove fallback.
22289 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
22290 * doc/invoke.texi (-ffp-contract): Update.
22291 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
22293 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22295 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
22296 Add alternatives to prefer to avoid same input and output Z register.
22297 (mask_gather_load<mode><v_int_container>): Likewise.
22298 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
22299 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
22300 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
22301 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
22303 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
22305 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22306 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
22307 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22308 <SVE_2BHSI:mode>_sxtw): Likewise.
22309 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22310 <SVE_2BHSI:mode>_uxtw): Likewise.
22311 (@aarch64_ldff1_gather<mode>): Likewise.
22312 (@aarch64_ldff1_gather<mode>): Likewise.
22313 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
22314 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
22315 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
22316 <VNx4_NARROW:mode>): Likewise.
22317 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22318 <VNx2_NARROW:mode>): Likewise.
22319 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22320 <VNx2_NARROW:mode>_sxtw): Likewise.
22321 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22322 <VNx2_NARROW:mode>_uxtw): Likewise.
22323 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
22324 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
22325 <SVE_PARTIAL_I:mode>): Likewise.
22327 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22329 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
22330 Convert to compact alternatives syntax.
22331 (mask_gather_load<mode><v_int_container>): Likewise.
22332 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
22333 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
22334 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
22335 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
22337 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
22339 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22340 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
22341 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22342 <SVE_2BHSI:mode>_sxtw): Likewise.
22343 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22344 <SVE_2BHSI:mode>_uxtw): Likewise.
22345 (@aarch64_ldff1_gather<mode>): Likewise.
22346 (@aarch64_ldff1_gather<mode>): Likewise.
22347 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
22348 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
22349 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
22350 <VNx4_NARROW:mode>): Likewise.
22351 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22352 <VNx2_NARROW:mode>): Likewise.
22353 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22354 <VNx2_NARROW:mode>_sxtw): Likewise.
22355 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22356 <VNx2_NARROW:mode>_uxtw): Likewise.
22357 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
22358 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
22359 <SVE_PARTIAL_I:mode>): Likewise.
22361 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22364 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22366 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
22367 Convert to compact alternatives syntax.
22368 (mask_gather_load<mode><v_int_container>): Likewise.
22369 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
22370 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
22371 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
22372 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
22374 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
22376 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22377 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
22378 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22379 <SVE_2BHSI:mode>_sxtw): Likewise.
22380 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22381 <SVE_2BHSI:mode>_uxtw): Likewise.
22382 (@aarch64_ldff1_gather<mode>): Likewise.
22383 (@aarch64_ldff1_gather<mode>): Likewise.
22384 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
22385 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
22386 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
22387 <VNx4_NARROW:mode>): Likewise.
22388 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22389 <VNx2_NARROW:mode>): Likewise.
22390 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22391 <VNx2_NARROW:mode>_sxtw): Likewise.
22392 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22393 <VNx2_NARROW:mode>_uxtw): Likewise.
22394 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
22395 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
22396 <SVE_PARTIAL_I:mode>): Likewise.
22398 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22400 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
22401 (get_len_load_store_mode): Ditto.
22402 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
22403 (get_len_load_store_mode): Ditto.
22404 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
22405 (get_len_load_store_mode): Ditto.
22406 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
22407 (get_len_load_store_mode): Ditto.
22408 * tree-if-conv.cc: include optabs-tree instead of optabs-query
22410 2023-06-21 Richard Biener <rguenther@suse.de>
22412 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
22413 split_constant_offset for the POINTER_PLUS_EXPR case.
22415 2023-06-21 Richard Biener <rguenther@suse.de>
22417 * tree-ssa-loop-ivopts.cc (record_group_use): Use
22418 split_constant_offset.
22420 2023-06-21 Richard Biener <rguenther@suse.de>
22422 * tree-loop-distribution.cc (classify_builtin_st): Use
22423 split_constant_offset.
22424 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
22425 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
22427 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22429 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
22430 Convert to compact alternatives syntax.
22431 (mask_gather_load<mode><v_int_container>): Likewise.
22432 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
22433 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
22434 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
22435 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
22437 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
22439 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22440 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
22441 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22442 <SVE_2BHSI:mode>_sxtw): Likewise.
22443 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
22444 <SVE_2BHSI:mode>_uxtw): Likewise.
22445 (@aarch64_ldff1_gather<mode>): Likewise.
22446 (@aarch64_ldff1_gather<mode>): Likewise.
22447 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
22448 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
22449 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
22450 <VNx4_NARROW:mode>): Likewise.
22451 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22452 <VNx2_NARROW:mode>): Likewise.
22453 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22454 <VNx2_NARROW:mode>_sxtw): Likewise.
22455 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
22456 <VNx2_NARROW:mode>_uxtw): Likewise.
22457 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
22458 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
22459 <SVE_PARTIAL_I:mode>): Likewise.
22461 2023-06-21 Tamar Christina <tamar.christina@arm.com>
22464 * doc/md.texi: Replace backslashchar.
22466 2023-06-21 Richard Biener <rguenther@suse.de>
22468 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
22469 Overload. For masked main loops make sure the vectorization
22470 factor isn't more than double the number of iterations.
22472 2023-06-21 Jan Beulich <jbeulich@suse.com>
22474 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
22475 value duplication by ix86_build_signbit_mask() when AVX512F and
22477 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
22478 2-alternative form. Adjust "mode" attribute. Add "enabled"
22480 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
22481 && !TARGET_PREFER_AVX256.
22482 (*<avx512>_vpternlog<mode>_2): Likewise.
22483 (*<avx512>_vpternlog<mode>_3): Likewise.
22485 2023-06-21 liuhongt <hongtao.liu@intel.com>
22488 * tree-vect-stmts.cc (vectorizable_conversion): Use
22489 intermiediate integer type for float_expr/fix_trunc_expr when
22490 direct optab is not existed.
22492 2023-06-20 Tamar Christina <tamar.christina@arm.com>
22494 PR bootstrap/110324
22495 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
22497 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
22499 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
22500 register operand to the stack pointer. Require the second register
22501 operand to have the number specified in a separate const_int operand.
22502 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
22503 (aarch64_allocate_and_probe_stack_space): Use it.
22504 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
22505 (aarch64_expand_epilogue): Likewise.
22507 2023-06-20 Jakub Jelinek <jakub@redhat.com>
22509 PR middle-end/79173
22510 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
22511 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
22514 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
22516 * calls.h (setjmp_call_p): Change return type from int to bool.
22517 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
22518 (store_one_arg): Change return type from int to bool
22519 and adjust function body accordingly. Change "sibcall_failure"
22521 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
22522 argument to bool. Change "partial_seen" variable to bool.
22523 (load_register_parameters): Change *sibcall_failure
22524 pointer argument to bool.
22525 (check_sibcall_argument_overlap_1): Change return type from int to bool
22526 and adjust function body accordingly.
22527 (check_sibcall_argument_overlap): Ditto. Change
22528 "mark_stored_args_map" argument to bool.
22529 (emit_call_1): Change "already_popped" variable to bool.
22530 (setjmp_call_p): Change return type from int to bool
22531 and adjust function body accordingly.
22532 (initialize_argument_information): Change *must_preallocate
22533 pointer argument to bool.
22534 (expand_call): Change "pcc_struct_value", "must_preallocate"
22535 and "sibcall_failure" variables to bool.
22536 (emit_library_call_value_1): Change "pcc_struct_value"
22539 2023-06-20 Martin Jambor <mjambor@suse.cz>
22542 * ipa-sra.cc (struct caller_issues): New field there_is_one.
22543 (check_for_caller_issues): Set it.
22544 (check_all_callers_for_issues): Check it.
22546 2023-06-20 Martin Jambor <mjambor@suse.cz>
22548 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
22549 (struct ipcp_transformation): Rearrange members according to
22550 C++ class coding convention, add m_uid_to_idx,
22551 get_param_index and maybe_create_parm_idx_map.
22552 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
22553 (compare_uids): Likewise.
22554 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
22555 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
22556 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
22557 (ipcp_update_vr): Likewise.
22558 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
22559 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
22561 2023-06-20 Carl Love <cel@us.ibm.com>
22563 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
22564 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
22565 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
22566 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
22567 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
22568 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
22569 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
22570 * config/rs6000/rs6000-builtins.def
22571 (__builtin_vsx_scalar_extract_exp_to_vec,
22572 __builtin_vsx_scalar_extract_sig_to_vec,
22573 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
22574 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
22575 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
22576 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
22577 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
22578 overloaded instance. Update comments.
22579 * config/rs6000/rs6000-overload.def
22580 (__builtin_vec_scalar_insert_exp): Add new overload definition with
22582 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
22583 overloaded definitions.
22584 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
22585 (DI_to_TI): New mode attribute.
22586 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
22587 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
22588 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
22589 * doc/extend.texi (scalar_extract_exp_to_vec,
22590 scalar_extract_sig_to_vec): Add documentation for new builtins.
22591 (scalar_insert_exp): Add new overloaded builtin definition.
22593 2023-06-20 Li Xu <xuli1@eswincomputing.com>
22595 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
22596 size of vector mask mode to one rvv register.
22598 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22600 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
22602 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
22604 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
22607 2023-06-20 Richard Biener <rguenther@suse.de>
22609 * tree-ssa-dse.cc (dse_classify_store): When we found
22610 no defs and the basic-block with the original definition
22611 ends in __builtin_unreachable[_trap] the store is dead.
22613 2023-06-20 Richard Biener <rguenther@suse.de>
22615 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
22616 keep the virtual SSA form up-to-date.
22618 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22620 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
22621 New define_insn_and_split.
22623 2023-06-20 Tamar Christina <tamar.christina@arm.com>
22625 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
22627 2023-06-20 Jan Beulich <jbeulich@suse.com>
22629 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
22630 constraint. Add new AVX512F alternative.
22632 2023-06-20 Richard Biener <rguenther@suse.de>
22635 * dwarf2out.cc (process_scope_var): Continue processing
22636 the decl after setting a parent in case the existing DIE
22639 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
22641 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
22642 (riscv_arg_has_vector): Simplify.
22643 (riscv_pass_in_vector_p): Adjust warning message.
22645 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
22647 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
22648 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
22649 * config/riscv/riscv.md (riscv_frcsr): New patterns.
22650 (riscv_fscsr): Likewise.
22652 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
22654 PR rtl-optimization/110305
22655 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
22656 Handle HONOR_SNANS for x + 0.0.
22658 2023-06-19 Jan Hubicka <jh@suse.cz>
22660 PR tree-optimization/109811
22661 PR tree-optimization/109849
22662 * passes.def: Add phiprop to early optimization passes.
22663 * tree-ssa-phiprop.cc: Allow clonning.
22665 2023-06-19 Tamar Christina <tamar.christina@arm.com>
22667 * config/aarch64/aarch64.md (arches): Add nosimd.
22668 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
22671 2023-06-19 Tamar Christina <tamar.christina@arm.com>
22672 Omar Tahir <Omar.Tahir2@arm.com>
22674 * gensupport.cc (class conlist, add_constraints, add_attributes,
22675 skip_spaces, expect_char, preprocess_compact_syntax,
22676 parse_section_layout, parse_section, convert_syntax): New.
22677 (process_rtx): Check for conversion.
22678 * genoutput.cc (process_template): Check for unresolved iterators.
22679 (class data): Add compact_syntax_p.
22680 (gen_insn): Use it.
22681 * gensupport.h (compact_syntax): New.
22682 (hash-set.h): Include.
22683 * doc/md.texi: Document it.
22685 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
22687 * recog.h (check_asm_operands): Change return type from int to bool.
22688 (insn_invalid_p): Ditto.
22689 (verify_changes): Ditto.
22690 (apply_change_group): Ditto.
22691 (constrain_operands): Ditto.
22692 (constrain_operands_cached): Ditto.
22693 (validate_replace_rtx_subexp): Ditto.
22694 (validate_replace_rtx): Ditto.
22695 (validate_replace_rtx_part): Ditto.
22696 (validate_replace_rtx_part_nosimplify): Ditto.
22697 (added_clobbers_hard_reg_p): Ditto.
22698 (peep2_regno_dead_p): Ditto.
22699 (peep2_reg_dead_p): Ditto.
22700 (store_data_bypass_p): Ditto.
22701 (if_test_bypass_p): Ditto.
22702 * rtl.h (split_all_insns_noflow): Change
22703 return type from unsigned int to void.
22704 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
22705 of generated added_clobbers_hard_reg_p from int to bool and adjust
22706 function body accordingly. Change "used" variable type from
22708 * recog.cc (check_asm_operands): Change return type
22709 from int to bool and adjust function body accordingly.
22710 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
22711 (verify_changes): Change return type from int to bool.
22712 (apply_change_group): Change return type from int to bool
22713 and adjust function body accordingly.
22714 (validate_replace_rtx_subexp): Change return type from int to bool.
22715 (validate_replace_rtx): Ditto.
22716 (validate_replace_rtx_part): Ditto.
22717 (validate_replace_rtx_part_nosimplify): Ditto.
22718 (constrain_operands_cached): Ditto.
22719 (constrain_operands): Ditto. Change "lose" and "win"
22720 variables type from int to bool.
22721 (split_all_insns_noflow): Change return type from unsigned int
22722 to void and adjust function body accordingly.
22723 (peep2_regno_dead_p): Change return type from int to bool.
22724 (peep2_reg_dead_p): Ditto.
22725 (peep2_find_free_register): Change "success"
22726 variable type from int to bool
22727 (store_data_bypass_p_1): Change return type from int to bool.
22728 (store_data_bypass_p): Ditto.
22730 2023-06-19 Li Xu <xuli1@eswincomputing.com>
22732 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
22735 2023-06-19 Pan Li <pan2.li@intel.com>
22738 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
22740 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
22741 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
22742 VF_ZVE63 and VF_ZVE32.
22743 * config/riscv/vector.md
22744 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
22745 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
22746 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
22747 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
22748 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
22749 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
22750 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
22751 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
22752 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
22753 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
22755 2023-06-19 Pan Li <pan2.li@intel.com>
22758 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
22760 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
22761 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
22762 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
22763 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
22764 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
22765 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
22766 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
22767 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
22768 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
22769 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
22770 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
22771 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
22772 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
22773 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
22775 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
22777 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
22778 (gcn_init_libfuncs): Add div and mod functions for all modes.
22779 Add placeholders for divmod functions.
22780 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
22782 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
22784 * tree-vect-generic.cc: Include optabs-libfuncs.h.
22785 (get_compute_type): Check optab_libfunc.
22786 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
22787 (vectorizable_operation): Check optab_libfunc.
22789 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
22791 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
22792 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
22793 (V_MOV, V_MOV_ALT): Likewise.
22794 (scalar_mode, SCALAR_MODE): Add TImode.
22795 (vnsi, VnSI, vndi, VnDI): Likewise.
22796 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
22797 (mov<mode>, mov<mode>_unspec): Use V_MOV.
22798 (*mov<mode>_4reg): New insn.
22799 (mov<mode>_exec): New 4reg variant.
22800 (mov<mode>_sgprbase): Likewise.
22801 (reload_in<mode>, reload_out<mode>): Use V_MOV.
22802 (vec_set<mode>): Likewise.
22803 (vec_duplicate<mode><exec>): New 4reg variant.
22804 (vec_extract<mode><scalar_mode>): Likewise.
22805 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
22806 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
22807 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
22808 (fold_extract_last_<mode>): Use V_MOV.
22809 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
22810 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
22811 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
22812 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
22813 gather<mode>_insn_2offsets<exec>): Use V_MOV.
22814 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
22815 scatter<mode>_insn_1offset<exec_scatter>,
22816 scatter<mode>_insn_1offset_ds<exec_scatter>,
22817 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
22818 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
22819 mask_scatter_store<mode><vnsi>): Likewise.
22820 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
22821 (gcn_hard_regno_mode_ok): Likewise.
22822 (GEN_VNM): Add TImode support.
22823 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
22824 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
22825 V8TImode, and V2TImode.
22826 (print_operand): Add 'J' and 'K' print codes.
22828 2023-06-19 Richard Biener <rguenther@suse.de>
22830 PR tree-optimization/110298
22831 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
22832 Clear number of iterations info before cleaning up the CFG.
22834 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22836 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
22837 Simplify vec_concat of lowpart subreg and high part vec_select.
22839 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
22841 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
22843 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
22845 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
22846 Handle null niters_skip.
22848 2023-06-19 Richard Biener <rguenther@suse.de>
22850 * config/aarch64/aarch64.cc
22851 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
22852 to LOOP_VINFO_MASKS.
22854 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
22857 * common/config/avr/avr-common.cc: Remove setting
22858 of OPT_fdelete_null_pointer_checks.
22859 * config/avr/avr.cc (avr_option_override): Clear
22860 flag_delete_null_pointer_checks if zero_address_valid.
22861 (avr_addr_space_zero_address_valid): New function.
22862 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
22865 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22866 Robin Dapp <rdapp.gcc@gmail.com>
22868 * doc/md.texi: Add len_mask{load,store}.
22869 * genopinit.cc (main): Ditto.
22871 * internal-fn.cc (len_maskload_direct): Ditto.
22872 (len_maskstore_direct): Ditto.
22873 (expand_call_mem_ref): Ditto.
22874 (expand_partial_load_optab_fn): Ditto.
22875 (expand_len_maskload_optab_fn): Ditto.
22876 (expand_partial_store_optab_fn): Ditto.
22877 (expand_len_maskstore_optab_fn): Ditto.
22878 (direct_len_maskload_optab_supported_p): Ditto.
22879 (direct_len_maskstore_optab_supported_p): Ditto.
22880 * internal-fn.def (LEN_MASK_LOAD): Ditto.
22881 (LEN_MASK_STORE): Ditto.
22882 * optabs.def (OPTAB_CD): Ditto.
22884 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
22886 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
22888 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
22890 * config/riscv/autovec.md (<optab><mode>3): Implement binop
22892 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
22893 (enum vxrm_field_enum): Rename this...
22894 (enum fixed_point_rounding_mode): ...to this.
22895 (enum frm_field_enum): Rename this...
22896 (enum floating_point_rounding_mode): ...to this.
22897 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
22898 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
22900 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
22901 (riscv_excess_precision): Do not convert to float for ZVFH.
22902 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
22904 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
22906 * config/riscv/vector-iterators.md: Add VI_QH iterator.
22907 * config/riscv/autovec-opt.md
22908 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
22909 that includes sign extension.
22910 (@pred_extract_first_sextsi<mode>): Dito for SImode.
22912 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
22914 * config/riscv/autovec.md (vec_set<mode>): Implement.
22915 (vec_extract<mode><vel>): Implement.
22916 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
22917 (emit_vlmax_slide_insn): Declare.
22918 (emit_nonvlmax_slide_tu_insn): Declare.
22919 (emit_scalar_move_insn): Export.
22920 (emit_nonvlmax_integer_move_insn): Export.
22921 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
22922 (emit_nonvlmax_slide_tu_insn): New function.
22923 (emit_vlmax_masked_mu_insn): No change.
22924 (emit_vlmax_integer_move_insn): Export.
22926 2023-06-19 Richard Biener <rguenther@suse.de>
22928 * tree-vectorizer.h (enum vect_partial_vector_style): New.
22929 (_loop_vec_info::partial_vector_style): Likewise.
22930 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
22931 (rgroup_controls::compare_type): Add.
22932 (vec_loop_masks): Change from a typedef to auto_vec<>
22934 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
22935 Adjust. Convert niters_skip to compare_type.
22936 (vect_set_loop_condition_partial_vectors_avx512): New function
22937 implementing the AVX512 partial vector codegen.
22938 (vect_set_loop_condition): Dispatch to the correct
22939 vect_set_loop_condition_partial_vectors_* function based on
22940 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
22941 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
22942 in the original niter type.
22943 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
22944 partial_vector_style.
22945 (can_produce_all_loop_masks_p): Adjust.
22946 (vect_verify_full_masking): Produce the rgroup_controls vector
22947 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
22948 (vect_verify_full_masking_avx512): New function implementing
22949 verification of AVX512 style masking.
22950 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
22951 (vect_analyze_loop_2): Also try AVX512 style masking.
22953 (vect_estimate_min_profitable_iters): Implement AVX512 style
22954 mask producing cost.
22955 (vect_record_loop_mask): Do not build the rgroup_controls
22956 vector here but record masks in a hash-set.
22957 (vect_get_loop_mask): Implement AVX512 style mask query,
22958 complementing the existing while_ult style.
22960 2023-06-19 Richard Biener <rguenther@suse.de>
22962 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
22964 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
22965 (vectorize_fold_left_reduction): Adjust.
22966 (vect_transform_reduction): Likewise.
22967 (vectorizable_live_operation): Likewise.
22968 * tree-vect-stmts.cc (vectorizable_call): Likewise.
22969 (vectorizable_operation): Likewise.
22970 (vectorizable_store): Likewise.
22971 (vectorizable_load): Likewise.
22972 (vectorizable_condition): Likewise.
22974 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
22977 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
22978 Add Optimization option property.
22980 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22982 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
22983 Add new pattern for the abovementioned case.
22985 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22987 * config/xtensa/xtensa.cc
22988 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
22990 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
22992 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
22994 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
22996 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
22998 2023-06-19 liuhongt <hongtao.liu@intel.com>
23001 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
23003 (sse2_packsswb<mask_name>): .. this, ..
23004 (avx2_packsswb<mask_name>): .. this and ..
23005 (avx512bw_packsswb<mask_name>): .. this.
23006 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
23007 (sse2_packssdw<mask_name>): .. this, ..
23008 (avx2_packssdw<mask_name>): .. this and ..
23009 (avx512bw_packssdw<mask_name>): .. this.
23011 2023-06-19 liuhongt <hongtao.liu@intel.com>
23014 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
23015 UNSPEC_US_TRUNCATE instead of original us_truncate for
23017 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
23019 (mmx_packsswb): .. this and ..
23020 (mmx_packuswb): .. this.
23021 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
23023 (s_trunsuffix): Removed code iterator.
23024 (any_s_truncate): Ditto.
23025 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
23026 UNSPEC_US_TRUNCATE instead of original us_truncate.
23027 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
23028 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
23030 2023-06-18 Pan Li <pan2.li@intel.com>
23032 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
23034 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
23036 * rtl.h (*rtx_equal_p_callback_function):
23037 Change return type from int to bool.
23038 (rtx_equal_p): Ditto.
23039 (*hash_rtx_callback_function): Ditto.
23040 * rtl.cc (rtx_equal_p): Change return type from int to bool
23041 and adjust function body accordingly.
23042 * early-remat.cc (scratch_equal): Ditto.
23043 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
23044 (hash_with_unspec_callback): Ditto.
23046 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
23048 * config/arc/arc.md (movqi_insn): Allow certain constants to
23049 be stored into memory in the pattern's condition.
23050 (movsf_insn): Similarly.
23052 2023-06-18 Honza <jh@ryzen3.suse.cz>
23054 PR tree-optimization/109849
23055 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
23056 ES; handle ipa_predicate::not_sra_candidate.
23057 (evaluate_properties_for_edge): Pass es to
23058 evaluate_conditions_for_known_args.
23059 (ipa_fn_summary_t::duplicate): Handle sra candidates.
23060 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
23061 (load_or_store_of_ptr_parameter): New function.
23062 (points_to_possible_sra_candidate_p): New function.
23063 (analyze_function_body): Initialize points_to_possible_sra_candidate;
23064 determine sra predicates.
23065 (estimate_ipcp_clone_size_and_time): Update call of
23066 evaluate_conditions_for_known_args.
23067 (remap_edge_params): Update points_to_possible_sra_candidate.
23068 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
23069 (write_ipa_call_summary): Likewise.
23070 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
23071 (dump_condition): Dump it.
23072 * ipa-predicate.h (struct inline_param_summary): Add
23073 points_to_possible_sra_candidate.
23075 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
23077 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
23078 function for setting the carry flag.
23079 (ix86_expand_builtin) <handlecarry>: Use it here.
23080 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
23081 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
23082 (usubc<mode>5): Likewise.
23084 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
23086 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
23087 for the immediate constant shift count.
23088 (*concat<mode><dwi>3_2): Likewise.
23089 (*concat<mode><dwi>3_3): Likewise.
23090 (*concat<mode><dwi>3_4): Likewise.
23091 (*concat<mode><dwi>3_5): Likewise.
23092 (*concat<mode><dwi>3_6): Likewise.
23094 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
23096 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
23097 (hash_rtx): Remove.
23098 * early-remat.cc (remat_candidate_hasher::equal): Update
23099 to call rtx_equal_p with rtx_equal_p_callback_function argument.
23100 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
23101 (rtx_equal_p): Remove.
23102 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
23103 argument with NULL default value.
23104 (rtx_equal_p_cb): Remove function declaration.
23105 (hash_rtx_cb): Ditto.
23106 (hash_rtx): Add hash_rtx_callback_function argument
23107 with NULL default value.
23108 * sel-sched-ir.cc (free_nop_pool): Update function comment.
23109 (skip_unspecs_callback): Ditto.
23110 (vinsn_init): Update to call hash_rtx with
23111 hash_rtx_callback_function argument.
23112 (vinsn_equal_p): Ditto.
23114 2023-06-18 yulong <shiyulong@iscas.ac.cn>
23116 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
23117 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
23118 (ADJUST_ALIGNMENT): Ditto.
23119 (RVV_TUPLE_PARTIAL_MODES): Ditto.
23120 (ADJUST_NUNITS): Ditto.
23121 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
23123 (vfloat16mf4x3_t): Ditto.
23124 (vfloat16mf4x4_t): Ditto.
23125 (vfloat16mf4x5_t): Ditto.
23126 (vfloat16mf4x6_t): Ditto.
23127 (vfloat16mf4x7_t): Ditto.
23128 (vfloat16mf4x8_t): Ditto.
23129 (vfloat16mf2x2_t): Ditto.
23130 (vfloat16mf2x3_t): Ditto.
23131 (vfloat16mf2x4_t): Ditto.
23132 (vfloat16mf2x5_t): Ditto.
23133 (vfloat16mf2x6_t): Ditto.
23134 (vfloat16mf2x7_t): Ditto.
23135 (vfloat16mf2x8_t): Ditto.
23136 (vfloat16m1x2_t): Ditto.
23137 (vfloat16m1x3_t): Ditto.
23138 (vfloat16m1x4_t): Ditto.
23139 (vfloat16m1x5_t): Ditto.
23140 (vfloat16m1x6_t): Ditto.
23141 (vfloat16m1x7_t): Ditto.
23142 (vfloat16m1x8_t): Ditto.
23143 (vfloat16m2x2_t): Ditto.
23144 (vfloat16m2x3_t): Ditto.
23145 (vfloat16m2x4_t): Ditto.
23146 (vfloat16m4x2_t): Ditto.
23147 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
23148 (vfloat16mf4x3_t): Ditto.
23149 (vfloat16mf4x4_t): Ditto.
23150 (vfloat16mf4x5_t): Ditto.
23151 (vfloat16mf4x6_t): Ditto.
23152 (vfloat16mf4x7_t): Ditto.
23153 (vfloat16mf4x8_t): Ditto.
23154 (vfloat16mf2x2_t): Ditto.
23155 (vfloat16mf2x3_t): Ditto.
23156 (vfloat16mf2x4_t): Ditto.
23157 (vfloat16mf2x5_t): Ditto.
23158 (vfloat16mf2x6_t): Ditto.
23159 (vfloat16mf2x7_t): Ditto.
23160 (vfloat16mf2x8_t): Ditto.
23161 (vfloat16m1x2_t): Ditto.
23162 (vfloat16m1x3_t): Ditto.
23163 (vfloat16m1x4_t): Ditto.
23164 (vfloat16m1x5_t): Ditto.
23165 (vfloat16m1x6_t): Ditto.
23166 (vfloat16m1x7_t): Ditto.
23167 (vfloat16m1x8_t): Ditto.
23168 (vfloat16m2x2_t): Ditto.
23169 (vfloat16m2x3_t): Ditto.
23170 (vfloat16m2x4_t): Ditto.
23171 (vfloat16m4x2_t): Ditto.
23172 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
23173 * config/riscv/riscv.md: New.
23174 * config/riscv/vector-iterators.md: New.
23176 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
23178 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
23179 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
23180 Generalize special case for converting TImode to V1TImode to handle
23181 all 128-bit vector conversions.
23183 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
23185 * gcc-ar.cc (main): Refactor to slightly reduce code
23186 duplication. Avoid unnecessary elements in nargv.
23188 2023-06-16 Pan Li <pan2.li@intel.com>
23191 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
23192 integer reduction expand.
23193 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
23194 and the LMUL1 attr respectively.
23195 * config/riscv/vector.md
23196 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
23197 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
23198 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
23199 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
23200 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
23201 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
23202 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
23204 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23207 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
23209 2023-06-16 Jakub Jelinek <jakub@redhat.com>
23211 PR middle-end/79173
23212 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
23213 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
23214 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
23216 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
23217 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
23218 * builtins.cc (fold_builtin_addc_subc): New function.
23219 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
23220 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
23222 2023-06-16 Jakub Jelinek <jakub@redhat.com>
23224 PR tree-optimization/110271
23225 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
23226 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
23227 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
23229 2023-06-16 Martin Jambor <mjambor@suse.cz>
23231 * configure: Regenerate.
23233 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
23234 Uros Bizjak <ubizjak@gmail.com>
23237 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
23238 define_insn_and_split combine *add<dwi>3_doubleword with
23239 a *concat<mode><dwi>3 for more efficient lowering after reload.
23241 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
23243 * ira-lives.cc: Include except.h.
23244 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
23245 when the pseudo does not live at the exception landing pad.
23247 2023-06-16 Alex Coplan <alex.coplan@arm.com>
23249 * doc/invoke.texi: Document -Welaborated-enum-base.
23251 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23253 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
23254 (ushrn2_n): ... This.
23255 (sqshrn2_n): Rename builtins to...
23256 (ssqshrn2_n): ... This.
23257 (uqshrn2_n): Rename builtins to...
23258 (uqushrn2_n): ... This.
23259 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
23260 (vqshrn_high_n_s32): Likewise.
23261 (vqshrn_high_n_s64): Likewise.
23262 (vqshrn_high_n_u16): Likewise.
23263 (vqshrn_high_n_u32): Likewise.
23264 (vqshrn_high_n_u64): Likewise.
23265 (vshrn_high_n_s16): Likewise.
23266 (vshrn_high_n_s32): Likewise.
23267 (vshrn_high_n_s64): Likewise.
23268 (vshrn_high_n_u16): Likewise.
23269 (vshrn_high_n_u32): Likewise.
23270 (vshrn_high_n_u64): Likewise.
23271 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
23273 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
23274 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
23275 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
23276 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
23277 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
23278 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
23279 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
23280 Update expander for the above.
23282 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23284 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
23285 (shrn2_n): ... This.
23286 (rshrn2): Rename builtins to...
23287 (rshrn2_n): ... This.
23288 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
23289 (vrshrn_high_n_s32): Likewise.
23290 (vrshrn_high_n_s64): Likewise.
23291 (vrshrn_high_n_u16): Likewise.
23292 (vrshrn_high_n_u32): Likewise.
23293 (vrshrn_high_n_u64): Likewise.
23294 (vshrn_high_n_s16): Likewise.
23295 (vshrn_high_n_s32): Likewise.
23296 (vshrn_high_n_s64): Likewise.
23297 (vshrn_high_n_u16): Likewise.
23298 (vshrn_high_n_u32): Likewise.
23299 (vshrn_high_n_u64): Likewise.
23300 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
23302 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
23303 (aarch64_shrn2<mode>_insn_le): Likewise.
23304 (aarch64_shrn2<mode>_insn_be): Likewise.
23305 (aarch64_shrn2<mode>): Likewise.
23306 (aarch64_rshrn2<mode>_insn_le): Likewise.
23307 (aarch64_rshrn2<mode>_insn_be): Likewise.
23308 (aarch64_rshrn2<mode>): Likewise.
23309 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
23310 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
23311 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
23312 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
23313 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
23314 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
23315 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
23316 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
23317 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
23318 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
23319 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
23320 (aarch64_sqshrun2_n<mode>): New define_expand.
23321 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
23322 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
23323 (aarch64_sqrshrun2_n<mode>): New define_expand.
23324 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
23325 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
23326 Delete unspec values.
23327 (VQSHRN_N): Delete int iterator.
23329 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23331 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
23332 * config/aarch64/aarch64-simd.md
23333 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
23334 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
23335 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
23336 * config/aarch64/iterators.md (shrn_s): New code attribute.
23338 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23340 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
23342 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
23343 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
23344 (aarch64_sqrshrun_n<mode>_insn): Likewise.
23345 (aarch64_sqshrun_n<mode>_insn): Likewise.
23346 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
23347 (aarch64_sqshrun_n<mode>): Likewise.
23348 (aarch64_sqrshrun_n<mode>): Likewise.
23349 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
23351 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23353 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
23354 (shrn_n): ... This.
23355 (rshrn): Rename builtins to...
23356 (rshrn_n): ... This.
23357 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
23358 (vshrn_n_s32): Likewise.
23359 (vshrn_n_s64): Likewise.
23360 (vshrn_n_u16): Likewise.
23361 (vshrn_n_u32): Likewise.
23362 (vshrn_n_u64): Likewise.
23363 (vrshrn_n_s16): Likewise.
23364 (vrshrn_n_s32): Likewise.
23365 (vrshrn_n_s64): Likewise.
23366 (vrshrn_n_u16): Likewise.
23367 (vrshrn_n_u32): Likewise.
23368 (vrshrn_n_u64): Likewise.
23369 * config/aarch64/aarch64-simd.md
23370 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
23371 (aarch64_shrn<mode>): Likewise.
23372 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
23373 (aarch64_rshrn<mode>): Likewise.
23374 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
23375 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
23376 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
23377 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
23378 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
23379 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
23380 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
23381 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
23382 (aarch64_sqshrun_n<mode>): Likewise.
23383 (aarch64_sqrshrun_n<mode>): Likewise.
23384 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
23385 (TRUNCEXTEND): New code attribute.
23386 (TRUNC_SHIFT): Likewise.
23387 (shrn_op): Likewise.
23388 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
23391 2023-06-16 Pan Li <pan2.li@intel.com>
23393 * config/riscv/riscv-vsetvl.cc
23394 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
23396 2023-06-16 Richard Biener <rguenther@suse.de>
23398 PR tree-optimization/110278
23399 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
23400 (x != (typeof x)(x == 0) -> true): Likewise.
23402 2023-06-16 Pali Rohár <pali@kernel.org>
23404 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
23405 (REAL_LIBGCC_SPEC): New define.
23406 * config/i386/mingw.opt: Add mcrtdll=
23407 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
23408 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
23409 (STARTFILE_SPEC): Adjust for -mcrtdll=.
23410 * doc/invoke.texi: Add mcrtdll= documentation.
23412 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
23414 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
23415 (mips_handle_code_readable_attr):New static function.
23416 (mips_get_code_readable_attr):New static enum function.
23417 (mips_set_current_function):Set the code_readable mode.
23418 (mips_option_override):Same as above.
23419 * doc/extend.texi:Document code_readable.
23421 2023-06-16 Richard Biener <rguenther@suse.de>
23423 PR tree-optimization/110269
23424 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
23425 with tree_expr_nonzero_p ...
23426 * match.pd (cmp (convert? addr@0) integer_zerop): With this
23429 2023-06-15 Marek Polacek <polacek@redhat.com>
23431 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
23432 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
23433 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
23434 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
23435 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
23437 * configure: Regenerate.
23438 * doc/install.texi: Document --enable-host-pie.
23440 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
23442 * regcprop.cc (maybe_mode_change): Enable stack pointer
23445 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
23447 PR tree-optimization/110266
23448 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
23450 (adjust_realpart_expr): Ditto.
23452 2023-06-15 Jan Beulich <jbeulich@suse.com>
23454 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
23457 2023-06-15 Jan Beulich <jbeulich@suse.com>
23459 * config/i386/constraints.md: Mention k and r for B.
23461 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
23462 Andrew Pinski <apinski@marvell.com>
23465 * config/loongarch/loongarch.md: Modify the register constraints for template
23466 "jumptable" and "indirect_jump" from "r" to "e".
23468 2023-06-15 Xi Ruoyao <xry111@xry111.site>
23470 * config/loongarch/loongarch-tune.h (loongarch_align): New
23472 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
23474 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
23476 * config/loongarch/loongarch.cc
23477 (loongarch_option_override_internal): Set the value of
23478 -falign-functions= if -falign-functions is enabled but no value
23479 is given. Likewise for -falign-labels=.
23481 2023-06-15 Jakub Jelinek <jakub@redhat.com>
23483 PR middle-end/79173
23484 * internal-fn.def (UADDC, USUBC): New internal functions.
23485 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
23486 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
23487 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
23488 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
23489 match_uaddc_usubc): New functions.
23490 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
23491 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
23492 other optimizations have been successful for those.
23493 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
23494 * fold-const-call.cc (fold_const_call): Likewise.
23495 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
23496 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
23497 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
23499 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
23500 define_expand patterns.
23501 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
23502 into NOTE_INSN_DELETED note rather than nop instruction.
23503 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
23506 2023-06-15 Jakub Jelinek <jakub@redhat.com>
23508 PR middle-end/79173
23509 * config/i386/i386.md (subborrow<mode>): Add alternative with
23510 memory destination and add for it define_peephole2
23511 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
23512 destination in these patterns.
23514 2023-06-15 Jakub Jelinek <jakub@redhat.com>
23516 PR middle-end/79173
23517 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
23518 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
23519 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
23520 using memory destination in these patterns.
23522 2023-06-15 Jakub Jelinek <jakub@redhat.com>
23524 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
23525 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
23526 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
23527 * fold-const-call.cc (fold_const_call): ... here.
23529 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
23531 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
23532 Rename to <su>abd<mode>3.
23533 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
23536 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
23538 * doc/md.texi (sabd, uabd): Document them.
23539 * internal-fn.def (ABD): Use new optab.
23540 * optabs.def (sabd_optab, uabd_optab): New optabs,
23541 * tree-vect-patterns.cc (vect_recog_absolute_difference):
23542 Recognize the following idiom abs (a - b).
23543 (vect_recog_sad_pattern): Refactor to use
23544 vect_recog_absolute_difference.
23545 (vect_recog_abd_pattern): Use patterns found by
23546 vect_recog_absolute_difference to build a new ABD
23549 2023-06-15 chenxiaolong <chenxl04200420@163.com>
23551 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
23552 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
23554 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23556 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
23557 (expand_vec_perm_const_1): Add merge optmization.
23559 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
23562 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
23563 (riscv_pass_by_reference): Return true for vector mode
23565 2023-06-15 Pan Li <pan2.li@intel.com>
23567 * config/riscv/autovec-opt.md: Align the predictor sytle.
23568 * config/riscv/autovec.md: Ditto.
23570 2023-06-15 Pan Li <pan2.li@intel.com>
23572 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
23573 Take elen instead of scalar BITS_PER_WORD.
23574 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
23575 instead of scaler BITS_PER_WORD.
23577 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
23579 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
23581 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23583 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
23584 Fix signed comparison warning in loop from npats to enelts.
23586 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
23588 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
23589 to offloading compilation.
23590 * config/gcn/mkoffload.cc (main): Adjust.
23591 * config/nvptx/mkoffload.cc (main): Likewise.
23592 * doc/invoke.texi (foffload-options): Update example.
23594 2023-06-14 liuhongt <hongtao.liu@intel.com>
23597 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
23598 for alternative 2 since there's no evex version for vpcmpeqd
23601 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
23603 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
23605 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
23607 * config/sh/divtab.cc: Remove.
23609 2023-06-13 Jakub Jelinek <jakub@redhat.com>
23611 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
23612 superfluous spaces around \t for vpcmpeqd.
23614 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
23616 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
23617 clearing vectors with only a single element. Set CLEARED if the
23618 vector was initialized to zero.
23620 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
23622 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
23625 (TUPLE_ENTRY): Undef.
23627 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23629 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
23630 (shuffle_generic_patterns): Ditto.
23631 (expand_vec_perm_const_1): Ditto.
23633 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23635 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
23636 (shuffle_decompress_patterns): Ditto.
23638 2023-06-13 Richard Biener <rguenther@suse.de>
23640 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
23642 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
23643 Kito Cheng <kito.cheng@sifive.com>
23645 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
23646 warning flag if func is not builtin
23647 * config/riscv/riscv.cc
23648 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
23649 (riscv_arg_has_vector): Determine whether the arg is vector type.
23650 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
23651 (riscv_init_cumulative_args): The same as header.
23652 (riscv_get_arg_info): Add the checking.
23653 (riscv_function_value): Check the func return and set warning flag
23654 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
23655 determine whether warning psabi or not.
23657 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23659 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
23660 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
23661 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
23662 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
23664 (arm_output_load_tpidr): Define.
23665 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
23666 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
23668 (reload_tp_hard): Likewise.
23669 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
23671 * doc/invoke.texi (Arm Options, mtp): Document new values.
23673 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23676 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
23677 AARCH64_TPIDRRO_EL0 value.
23678 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
23679 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
23680 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
23681 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
23683 2023-06-13 Alexandre Oliva <oliva@adacore.com>
23685 * range-op-float.cc (frange_nextafter): Drop inline.
23686 (frelop_early_resolve): Add static.
23687 (frange_float): Likewise.
23689 2023-06-13 Richard Biener <rguenther@suse.de>
23691 PR middle-end/110232
23692 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
23693 to check whether the buffer covers the whole vector.
23695 2023-06-13 Richard Biener <rguenther@suse.de>
23697 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
23698 .MASK_LOAD and friends set the size of the access to unknown.
23700 2023-06-13 Tejas Belagod <tbelagod@arm.com>
23703 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
23704 calls that have a constant input predicate vector.
23705 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
23706 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
23707 (svlast_impl::vect_all_same): Check if all vector elements are equal.
23709 2023-06-13 Andi Kleen <ak@linux.intel.com>
23711 * config/i386/gcc-auto-profile: Regenerate.
23713 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23715 * config/riscv/vector-iterators.md: Fix requirement.
23717 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23719 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
23720 (shuffle_decompress_patterns): New function.
23721 (expand_vec_perm_const_1): Add decompress optimization.
23723 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
23725 PR rtl-optimization/101188
23726 * postreload.cc (reload_cse_move2add_invalidate): New function,
23728 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
23730 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
23732 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
23733 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
23734 and if maxv == 1, use constant element for duplicating into register.
23736 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
23738 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
23739 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
23740 (gimplify_adjust_omp_clauses): Change
23741 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
23742 GOMP_MAP_FORCE_PRESENT.
23743 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
23744 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
23745 to/from clauses with present modifier.
23747 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23749 PR tree-optimization/110205
23750 * range-op-float.cc (range_operator::fold_range): Add default FII
23752 * range-op-mixed.h (class operator_gt): Add missing final overrides.
23753 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
23754 (operator_lshift ::update_bitmask): Add final override.
23755 (operator_rshift ::update_bitmask): Add final override.
23756 * range-op.h (range_operator::fold_range): Add FII prototype.
23758 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23760 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
23761 Use range_op_handler directly.
23762 * range-op.cc (range_op_handler::range_op_handler): Unsigned
23763 param instead of tree-code.
23764 (ptr_op_widen_plus_signed): Delete.
23765 (ptr_op_widen_plus_unsigned): Delete.
23766 (ptr_op_widen_mult_signed): Delete.
23767 (ptr_op_widen_mult_unsigned): Delete.
23768 (range_op_table::initialize_integral_ops): Add new opcodes.
23769 * range-op.h (range_op_handler): Use unsigned.
23770 (OP_WIDEN_MULT_SIGNED): New.
23771 (OP_WIDEN_MULT_UNSIGNED): New.
23772 (OP_WIDEN_PLUS_SIGNED): New.
23773 (OP_WIDEN_PLUS_UNSIGNED): New.
23774 (RANGE_OP_TABLE_SIZE): New.
23775 (range_op_table::operator []): Use unsigned.
23776 (range_op_table::set): Use unsigned.
23777 (m_range_tree): Make unsigned.
23778 (ptr_op_widen_mult_signed): Remove.
23779 (ptr_op_widen_mult_unsigned): Remove.
23780 (ptr_op_widen_plus_signed): Remove.
23781 (ptr_op_widen_plus_unsigned): Remove.
23783 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23785 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
23786 manually as there is no access to the default operator.
23787 (cfn_copysign::fold_range): Don't check for validity.
23788 (cfn_ubsan::fold_range): Ditto.
23789 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
23790 * range-op.cc (default_operator): New.
23791 (range_op_handler::range_op_handler): Use default_operator
23793 (range_op_handler::operator bool): Move from header, compare
23794 against default operator.
23795 (range_op_handler::range_op): New.
23796 * range-op.h (range_op_handler::operator bool): Move.
23798 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23800 * range-op.cc (unified_table): Delete.
23801 (range_op_table operator_table): Instantiate.
23802 (range_op_table::range_op_table): Rename from unified_table.
23803 (range_op_handler::range_op_handler): Use range_op_table.
23804 * range-op.h (range_op_table::operator []): Inline.
23805 (range_op_table::set): Inline.
23807 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23809 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
23811 * gimple-range-op.cc (get_code): Rename from get_code_and_type
23813 (gimple_range_op_handler::supported_p): No need for type.
23814 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
23815 (cfn_copysign::fold_range): Ditto.
23816 (cfn_ubsan::fold_range): Ditto.
23817 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
23818 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
23819 * range-op-float.cc (operator_plus::op1_range): Ditto.
23820 (operator_mult::op1_range): Ditto.
23821 (range_op_float_tests): Ditto.
23822 * range-op.cc (get_op_handler): Remove.
23823 (range_op_handler::set_op_handler): Remove.
23824 (operator_plus::op1_range): No need for type.
23825 (operator_minus::op1_range): Ditto.
23826 (operator_mult::op1_range): Ditto.
23827 (operator_exact_divide::op1_range): Ditto.
23828 (operator_cast::op1_range): Ditto.
23829 (perator_bitwise_not::fold_range): Ditto.
23830 (operator_negate::fold_range): Ditto.
23831 * range-op.h (range_op_handler::range_op_handler): Remove type param.
23832 (range_cast): No need for type.
23833 (range_op_table::operator[]): Check for enum_code >= 0.
23834 * tree-data-ref.cc (compute_distributive_range): No need for type.
23835 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
23836 * value-query.cc (range_query::get_tree_range): Ditto.
23837 * value-relation.cc (relation_oracle::validate_relation): Ditto.
23838 * vr-values.cc (range_of_var_in_loop): Ditto.
23839 (simplify_using_ranges::fold_cond_with_ops): Ditto.
23841 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23843 * range-op-mixed.h (operator_max): Remove final.
23844 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
23845 (pointer_table::pointer_table): Remove.
23846 (class hybrid_max_operator): New.
23847 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
23848 * range-op.cc (pointer_tree_table): Remove.
23849 (unified_table::unified_table): Comment out MAX_EXPR.
23850 (get_op_handler): Remove check of pointer table.
23851 * range-op.h (class pointer_table): Remove.
23853 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23855 * range-op-mixed.h (operator_min): Remove final.
23856 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
23857 (class hybrid_min_operator): New.
23858 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
23859 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
23861 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23863 * range-op-mixed.h (operator_bitwise_or): Remove final.
23864 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
23865 (class hybrid_or_operator): New.
23866 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
23867 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
23869 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23871 * range-op-mixed.h (operator_bitwise_and): Remove final.
23872 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
23873 (class hybrid_and_operator): New.
23874 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
23875 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
23877 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23879 * Makefile.in (OBJS): Add range-op-ptr.o.
23880 * range-op-mixed.h (update_known_bitmask): Move prototype here.
23881 (minus_op1_op2_relation_effect): Move prototype here.
23882 (wi_includes_zero_p): Move function to here.
23883 (wi_zero_p): Ditto.
23884 * range-op.cc (update_known_bitmask): Remove static.
23885 (wi_includes_zero_p): Move to header.
23886 (wi_zero_p): Move to header.
23887 (minus_op1_op2_relation_effect): Remove static.
23888 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
23889 (pointer_plus_operator): Ditto.
23890 (pointer_min_max_operator): Ditto.
23891 (pointer_and_operator): Ditto.
23892 (pointer_or_operator): Ditto.
23893 (pointer_table): Ditto.
23894 (range_op_table::initialize_pointer_ops): Ditto.
23895 * range-op-ptr.cc: New.
23897 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23899 * range-op-mixed.h (class operator_max): Move from...
23900 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
23901 (get_op_handler): Remove the integral table.
23902 (class operator_max): Move from here.
23903 (integral_table::integral_table): Delete.
23904 * range-op.h (class integral_table): Delete.
23906 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23908 * range-op-mixed.h (class operator_min): Move from...
23909 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
23910 (class operator_min): Move from here.
23911 (integral_table::integral_table): Remove MIN_EXPR.
23913 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23915 * range-op-mixed.h (class operator_bitwise_or): Move from...
23916 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
23917 (class operator_bitwise_or): Move from here.
23918 (integral_table::integral_table): Remove BIT_IOR_EXPR.
23920 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23922 * range-op-mixed.h (class operator_bitwise_and): Move from...
23923 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
23924 (get_op_handler): Check for a pointer table entry first.
23925 (class operator_bitwise_and): Move from here.
23926 (integral_table::integral_table): Remove BIT_AND_EXPR.
23928 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23930 * range-op-mixed.h (class operator_bitwise_xor): Move from...
23931 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
23932 (class operator_bitwise_xor): Move from here.
23933 (integral_table::integral_table): Remove BIT_XOR_EXPR.
23934 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
23936 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23938 * range-op-mixed.h (class operator_bitwise_not): Move from...
23939 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
23940 (class operator_bitwise_not): Move from here.
23941 (integral_table::integral_table): Remove BIT_NOT_EXPR.
23942 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
23944 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
23946 * range-op-mixed.h (class operator_addr_expr): Move from...
23947 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
23948 (class operator_addr_expr): Move from here.
23949 (integral_table::integral_table): Remove ADDR_EXPR.
23950 (pointer_table::pointer_table): Remove ADDR_EXPR.
23952 2023-06-12 Pan Li <pan2.li@intel.com>
23954 * config/riscv/riscv-vector-builtins-types.def
23955 (vfloat16m1_t): Add type to lmul1 ops.
23956 (vfloat16m2_t): Likewise.
23957 (vfloat16m4_t): Likewise.
23959 2023-06-12 Richard Biener <rguenther@suse.de>
23961 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
23962 .MASK_STORE and friend set the size of the access to
23965 2023-06-12 Tamar Christina <tamar.christina@arm.com>
23967 * config.in: Regenerate.
23968 * configure: Regenerate.
23969 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
23971 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23973 * config/riscv/autovec-opt.md
23974 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
23975 (*<any_shiftrt:optab>trunc<mode>): Ditto.
23976 * config/riscv/autovec.md (<optab><mode>3): Change to
23977 define_insn_and_split.
23978 (v<optab><mode>3): Ditto.
23979 (trunc<mode><v_double_trunc>2): Ditto.
23981 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23983 * simplify-rtx.cc (simplify_const_unary_operation):
23984 Handle US_TRUNCATE, SS_TRUNCATE.
23986 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
23989 * doc/gm2.texi (Standard procedures): Fix Next link.
23991 2023-06-12 Tamar Christina <tamar.christina@arm.com>
23993 * config.in: Regenerate.
23995 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
23997 PR middle-end/110142
23998 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
23999 subtype to vect_widened_op_tree and remove subtype parameter, also
24000 remove superfluous overloaded function definition.
24001 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
24002 to call to vect_recog_widen_op_pattern.
24003 (vect_recog_widen_minus_pattern): Likewise.
24005 2023-06-12 liuhongt <hongtao.liu@intel.com>
24007 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
24008 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
24009 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
24010 (vec_unpacks_lo_<mode>): Ditto.
24011 (vec_unpacks_hi_<mode>): Ditto.
24012 (sse_movlhps_<mode>): New define_insn.
24013 (ssse3_palignr<mode>_perm): Extend to V_128H.
24014 (V_128H): New mode iterator.
24015 (ssepackPHmode): New mode attribute.
24016 (vunpck_extract_mode): Ditto.
24017 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
24018 (vpckfloat_temp_mode): Ditto.
24019 (vpckfloat_op_mode): Ditto.
24020 (vunpckfixt_mode): Extend to VxHF.
24021 (vunpckfixt_model): Ditto.
24022 (vunpckfixt_extract_mode): Ditto.
24024 2023-06-12 Richard Biener <rguenther@suse.de>
24026 PR middle-end/110200
24027 * genmatch.cc (expr::gen_transform): Put braces around
24028 the if arm for the (convert ...) short-cut.
24030 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
24033 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
24034 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
24036 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
24039 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
24040 floating constant itself for real_to_target call.
24042 2023-06-12 Pan Li <pan2.li@intel.com>
24044 * config/riscv/riscv-vector-builtins-types.def
24045 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
24046 (vfloat16mf2_t): Ditto.
24047 (vfloat16m1_t): Ditto.
24048 (vfloat16m2_t): Ditto.
24049 (vfloat16m4_t): Ditto.
24051 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
24053 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
24054 Do not require a stack frame when debugging is enabled for AIX.
24056 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
24058 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
24059 Remove attribute values.
24060 (insv_notbit): New post-reload insn.
24061 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
24062 (*insv.not-bit.0_split, *insv.not-bit.7_split)
24063 (*insv.xor-extract_split): Split to insv_notbit.
24064 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
24065 (*insv.xor-extract): Remove post-reload insns.
24066 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
24067 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
24068 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
24069 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
24071 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
24074 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
24075 (MSB, SIZE): New mode attributes.
24076 (any_shift): New code iterator.
24077 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
24078 (*lshr<mode>3_const_split): Add constraint alternative for
24079 the case of shift-offset = MSB. Ditch "length" attribute.
24080 (extzv<mode): New. replaces extzv. Adjust following patterns.
24081 Use avr_out_extr, avr_out_extr_not to print asm.
24082 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
24083 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
24084 * config/avr/constraints.md (C15, C23, C31, Yil): New
24085 * config/avr/predicates.md (reg_or_low_io_operand)
24086 (const7_operand, reg_or_low_io_operand)
24087 (const15_operand, const_0_to_15_operand)
24088 (const23_operand, const_0_to_23_operand)
24089 (const31_operand, const_0_to_31_operand): New.
24090 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
24091 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
24092 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
24093 MSB case to new insn constraint "r" for operands[1].
24094 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
24095 Handle these cases.
24096 (avr_rtx_costs_1): Adjust cost for a new pattern.
24098 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24100 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
24101 (vector_insn_info::parse_insn): Add rtx_insn parse.
24102 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
24103 (get_first_vsetvl): New function.
24104 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
24105 (pass_vsetvl::cleanup_insns): Remove it.
24106 (pass_vsetvl::ssa_post_optimization): New function.
24107 (has_no_uses): Ditto.
24108 (pass_vsetvl::propagate_avl): Remove it.
24109 (pass_vsetvl::df_post_optimization): New function.
24110 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
24111 * config/riscv/riscv-vsetvl.h: Adapt declaration.
24113 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
24115 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
24116 (ipcp_vr_lattice::print): Call dump method.
24117 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
24119 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
24120 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
24122 (initialize_node_lattices): Pass type when appropriate.
24123 (ipa_vr_operation_and_type_effects): Make type agnostic.
24124 (ipa_value_range_from_jfunc): Same.
24125 (propagate_vr_across_jump_function): Same.
24126 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
24127 (evaluate_properties_for_edge): Same.
24128 * ipa-prop.cc (ipa_vr::get_vrange): Same.
24129 (ipcp_update_vr): Same.
24130 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
24131 (ipa_range_set_and_normalize): Same.
24133 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
24137 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
24138 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
24139 (avr_pass_data_ifelse): New pass_data for it.
24140 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
24141 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
24142 (avr_out_cmp_ext): New functions.
24143 (compare_condtition): Make sure REG_CC dies in the branch insn.
24144 (avr_rtx_costs_1): Add computation of cbranch costs.
24145 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
24146 [ADJUST_LEN_CMP_SEXT]Handle them.
24147 (TARGET_CANONICALIZE_COMPARISON): New define.
24148 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
24149 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
24150 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
24151 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
24152 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
24153 (avr_out_cmp_zext): New Protos
24154 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
24155 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
24156 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
24157 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
24158 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
24159 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
24160 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
24161 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
24162 (adjust_len) [add_set_ZN, cmp_zext]: New.
24163 (QIPSI): New mode iterator.
24164 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
24165 (gelt): New code iterator.
24166 (gelt_eqne): New code attribute.
24167 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
24168 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
24169 (*cmpqi_sign_extend): Remove insns.
24170 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
24171 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
24172 * config/avr/predicates.md (scratch_or_d_register_operand): New.
24173 * config/avr/constraints.md (Yxx): New constraint.
24175 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24177 * config/riscv/autovec.md (select_vl<mode>): New pattern.
24178 * config/riscv/riscv-protos.h (expand_select_vl): New function.
24179 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
24181 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24183 * range-op-float.cc (foperator_mult_div_base): Delete.
24184 (foperator_mult_div_base::find_range): Make static local function.
24185 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
24186 (operator_mult::op1_range): Rename from foperator_mult.
24187 (operator_mult::op2_range): Ditto.
24188 (operator_mult::rv_fold): Ditto.
24189 (float_table::float_table): Remove MULT_EXPR.
24190 (class foperator_div): Inherit from range_operator.
24191 (float_table::float_table): Delete.
24192 * range-op-mixed.h (class operator_mult): Combined from integer
24194 * range-op.cc (float_tree_table): Delete.
24195 (op_mult): New object.
24196 (unified_table::unified_table): Add MULT_EXPR.
24197 (get_op_handler): Do not check float table any longer.
24198 (class cross_product_operator): Move to range-op-mixed.h.
24199 (class operator_mult): Move to range-op-mixed.h.
24200 (integral_table::integral_table): Remove MULT_EXPR.
24201 (pointer_table::pointer_table): Remove MULT_EXPR.
24202 * range-op.h (float_table): Remove.
24204 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24206 * range-op-float.cc (foperator_negate): Remove. Move prototypes
24207 to range-op-mixed.h
24208 (operator_negate::fold_range): Rename from foperator_negate.
24209 (operator_negate::op1_range): Ditto.
24210 (float_table::float_table): Remove NEGATE_EXPR.
24211 * range-op-mixed.h (class operator_negate): Combined from integer
24213 * range-op.cc (op_negate): New object.
24214 (unified_table::unified_table): Add NEGATE_EXPR.
24215 (class operator_negate): Move to range-op-mixed.h.
24216 (integral_table::integral_table): Remove NEGATE_EXPR.
24217 (pointer_table::pointer_table): Remove NEGATE_EXPR.
24219 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24221 * range-op-float.cc (foperator_minus): Remove. Move prototypes
24222 to range-op-mixed.h
24223 (operator_minus::fold_range): Rename from foperator_minus.
24224 (operator_minus::op1_range): Ditto.
24225 (operator_minus::op2_range): Ditto.
24226 (operator_minus::rv_fold): Ditto.
24227 (float_table::float_table): Remove MINUS_EXPR.
24228 * range-op-mixed.h (class operator_minus): Combined from integer
24230 * range-op.cc (op_minus): New object.
24231 (unified_table::unified_table): Add MINUS_EXPR.
24232 (class operator_minus): Move to range-op-mixed.h.
24233 (integral_table::integral_table): Remove MINUS_EXPR.
24234 (pointer_table::pointer_table): Remove MINUS_EXPR.
24236 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24238 * range-op-float.cc (foperator_abs): Remove. Move prototypes
24239 to range-op-mixed.h
24240 (operator_abs::fold_range): Rename from foperator_abs.
24241 (operator_abs::op1_range): Ditto.
24242 (float_table::float_table): Remove ABS_EXPR.
24243 * range-op-mixed.h (class operator_abs): Combined from integer
24245 * range-op.cc (op_abs): New object.
24246 (unified_table::unified_table): Add ABS_EXPR.
24247 (class operator_abs): Move to range-op-mixed.h.
24248 (integral_table::integral_table): Remove ABS_EXPR.
24249 (pointer_table::pointer_table): Remove ABS_EXPR.
24251 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24253 * range-op-float.cc (foperator_plus): Remove. Move prototypes
24254 to range-op-mixed.h
24255 (operator_plus::fold_range): Rename from foperator_plus.
24256 (operator_plus::op1_range): Ditto.
24257 (operator_plus::op2_range): Ditto.
24258 (operator_plus::rv_fold): Ditto.
24259 (float_table::float_table): Remove PLUS_EXPR.
24260 * range-op-mixed.h (class operator_plus): Combined from integer
24262 * range-op.cc (op_plus): New object.
24263 (unified_table::unified_table): Add PLUS_EXPR.
24264 (class operator_plus): Move to range-op-mixed.h.
24265 (integral_table::integral_table): Remove PLUS_EXPR.
24266 (pointer_table::pointer_table): Remove PLUS_EXPR.
24268 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24270 * range-op-mixed.h (class operator_cast): Combined from integer
24272 * range-op.cc (op_cast): New object.
24273 (unified_table::unified_table): Add op_cast
24274 (class operator_cast): Move to range-op-mixed.h.
24275 (integral_table::integral_table): Remove op_cast
24276 (pointer_table::pointer_table): Remove op_cast.
24278 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24280 * range-op-float.cc (operator_cst::fold_range): New.
24281 * range-op-mixed.h (class operator_cst): Move from integer file.
24282 * range-op.cc (op_cst): New object.
24283 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
24284 (class operator_cst): Move to range-op-mixed.h.
24285 (integral_table::integral_table): Remove op_cst.
24286 (pointer_table::pointer_table): Remove op_cst.
24288 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24290 * range-op-float.cc (foperator_identity): Remove. Move prototypes
24291 to range-op-mixed.h
24292 (operator_identity::fold_range): Rename from foperator_identity.
24293 (operator_identity::op1_range): Ditto.
24294 (float_table::float_table): Remove fop_identity.
24295 * range-op-mixed.h (class operator_identity): Combined from integer
24297 * range-op.cc (op_identity): New object.
24298 (unified_table::unified_table): Add op_identity.
24299 (class operator_identity): Move to range-op-mixed.h.
24300 (integral_table::integral_table): Remove identity.
24301 (pointer_table::pointer_table): Remove identity.
24303 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24305 * range-op-float.cc (foperator_ge): Remove. Move prototypes
24306 to range-op-mixed.h
24307 (operator_ge::fold_range): Rename from foperator_ge.
24308 (operator_ge::op1_range): Ditto.
24309 (float_table::float_table): Remove GE_EXPR.
24310 * range-op-mixed.h (class operator_ge): Combined from integer
24312 * range-op.cc (op_ge): New object.
24313 (unified_table::unified_table): Add GE_EXPR.
24314 (class operator_ge): Move to range-op-mixed.h.
24315 (ge_op1_op2_relation): Fold into
24316 operator_ge::op1_op2_relation.
24317 (integral_table::integral_table): Remove GE_EXPR.
24318 (pointer_table::pointer_table): Remove GE_EXPR.
24319 * range-op.h (ge_op1_op2_relation): Delete.
24321 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24323 * range-op-float.cc (foperator_gt): Remove. Move prototypes
24324 to range-op-mixed.h
24325 (operator_gt::fold_range): Rename from foperator_gt.
24326 (operator_gt::op1_range): Ditto.
24327 (float_table::float_table): Remove GT_EXPR.
24328 * range-op-mixed.h (class operator_gt): Combined from integer
24330 * range-op.cc (op_gt): New object.
24331 (unified_table::unified_table): Add GT_EXPR.
24332 (class operator_gt): Move to range-op-mixed.h.
24333 (gt_op1_op2_relation): Fold into
24334 operator_gt::op1_op2_relation.
24335 (integral_table::integral_table): Remove GT_EXPR.
24336 (pointer_table::pointer_table): Remove GT_EXPR.
24337 * range-op.h (gt_op1_op2_relation): Delete.
24339 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24341 * range-op-float.cc (foperator_le): Remove. Move prototypes
24342 to range-op-mixed.h
24343 (operator_le::fold_range): Rename from foperator_le.
24344 (operator_le::op1_range): Ditto.
24345 (float_table::float_table): Remove LE_EXPR.
24346 * range-op-mixed.h (class operator_le): Combined from integer
24348 * range-op.cc (op_le): New object.
24349 (unified_table::unified_table): Add LE_EXPR.
24350 (class operator_le): Move to range-op-mixed.h.
24351 (le_op1_op2_relation): Fold into
24352 operator_le::op1_op2_relation.
24353 (integral_table::integral_table): Remove LE_EXPR.
24354 (pointer_table::pointer_table): Remove LE_EXPR.
24355 * range-op.h (le_op1_op2_relation): Delete.
24357 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24359 * range-op-float.cc (foperator_lt): Remove. Move prototypes
24360 to range-op-mixed.h
24361 (operator_lt::fold_range): Rename from foperator_lt.
24362 (operator_lt::op1_range): Ditto.
24363 (float_table::float_table): Remove LT_EXPR.
24364 * range-op-mixed.h (class operator_lt): Combined from integer
24366 * range-op.cc (op_lt): New object.
24367 (unified_table::unified_table): Add LT_EXPR.
24368 (class operator_lt): Move to range-op-mixed.h.
24369 (lt_op1_op2_relation): Fold into
24370 operator_lt::op1_op2_relation.
24371 (integral_table::integral_table): Remove LT_EXPR.
24372 (pointer_table::pointer_table): Remove LT_EXPR.
24373 * range-op.h (lt_op1_op2_relation): Delete.
24375 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24377 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
24378 to range-op-mixed.h
24379 (operator_equal::fold_range): Rename from foperator_not_equal.
24380 (operator_equal::op1_range): Ditto.
24381 (float_table::float_table): Remove NE_EXPR.
24382 * range-op-mixed.h (class operator_not_equal): Combined from integer
24384 * range-op.cc (op_equal): New object.
24385 (unified_table::unified_table): Add NE_EXPR.
24386 (class operator_not_equal): Move to range-op-mixed.h.
24387 (not_equal_op1_op2_relation): Fold into
24388 operator_not_equal::op1_op2_relation.
24389 (integral_table::integral_table): Remove NE_EXPR.
24390 (pointer_table::pointer_table): Remove NE_EXPR.
24391 * range-op.h (not_equal_op1_op2_relation): Delete.
24393 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24395 * range-op-float.cc (foperator_equal): Remove. Move prototypes
24396 to range-op-mixed.h
24397 (operator_equal::fold_range): Rename from foperator_equal.
24398 (operator_equal::op1_range): Ditto.
24399 (float_table::float_table): Remove EQ_EXPR.
24400 * range-op-mixed.h (class operator_equal): Combined from integer
24402 * range-op.cc (op_equal): New object.
24403 (unified_table::unified_table): Add EQ_EXPR.
24404 (class operator_equal): Move to range-op-mixed.h.
24405 (equal_op1_op2_relation): Fold into
24406 operator_equal::op1_op2_relation.
24407 (integral_table::integral_table): Remove EQ_EXPR.
24408 (pointer_table::pointer_table): Remove EQ_EXPR.
24409 * range-op.h (equal_op1_op2_relation): Delete.
24411 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
24413 * range-op-float.cc (class float_table): Move to header.
24414 (float_table::float_table): Move float only operators to...
24415 (range_op_table::initialize_float_ops): Here.
24416 * range-op-mixed.h: New.
24417 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
24419 (float_tree_table): Moved from range-op-float.cc.
24420 (unified_tree_table): New.
24421 (unified_table::unified_table): New. Call initialize routines.
24422 (get_op_handler): Check unified table first.
24423 (range_op_handler::range_op_handler): Handle no type constructor.
24424 (integral_table::integral_table): Move integral only operators to...
24425 (range_op_table::initialize_integral_ops): Here.
24426 (pointer_table::pointer_table): Move pointer only operators to...
24427 (range_op_table::initialize_pointer_ops): Here.
24428 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
24429 (get_bool_state): Ditto.
24430 (empty_range_varying): Ditto.
24431 (relop_early_resolve): Ditto.
24432 (class range_op_table): Add new init methods for range types.
24433 (class integral_table): Move declaration to here.
24434 (class pointer_table): Move declaration to here.
24435 (class float_table): Move declaration to here.
24437 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24438 Richard Sandiford <richard.sandiford@arm.com>
24439 Richard Biener <rguenther@suse.de>
24441 * doc/md.texi: Add SELECT_VL support.
24442 * internal-fn.def (SELECT_VL): Ditto.
24443 * optabs.def (OPTAB_D): Ditto.
24444 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
24445 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
24446 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
24447 (vectorizable_store): Ditto.
24448 (vectorizable_load): Ditto.
24449 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
24451 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
24454 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
24457 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
24459 * range-op.cc (range_cast): Move to...
24460 * range-op.h (range_cast): Here and add generic a version.
24462 2023-06-09 Marek Polacek <polacek@redhat.com>
24466 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
24467 warn about designated initializers in C only.
24469 2023-06-09 Andrew Pinski <apinski@marvell.com>
24471 PR tree-optimization/97711
24472 PR tree-optimization/110155
24473 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
24474 ((zero_one != 0) ? z <op> y : y): Likewise.
24476 2023-06-09 Andrew Pinski <apinski@marvell.com>
24478 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
24479 multiply rather than negation/bit_and.
24481 2023-06-09 Andrew Pinski <apinski@marvell.com>
24483 * match.pd (`X & -Y -> X * Y`): Allow for truncation
24484 and the same type for unsigned types.
24486 2023-06-09 Andrew Pinski <apinski@marvell.com>
24488 PR tree-optimization/110165
24489 PR tree-optimization/110166
24490 * match.pd (zero_one_valued_p): Don't accept
24491 signed 1-bit integers.
24493 2023-06-09 Richard Biener <rguenther@suse.de>
24495 * match.pd (two conversions in a row): Use element_precision
24496 to DTRT for VECTOR_TYPE.
24498 2023-06-09 Pan Li <pan2.li@intel.com>
24500 * config/riscv/riscv.md (enabled): Move to another place, and
24501 add fp_vector_disabled to the cond.
24502 (fp_vector_disabled): New attr defined for disabling fp.
24503 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
24505 2023-06-09 Pan Li <pan2.li@intel.com>
24507 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
24510 2023-06-09 liuhongt <hongtao.liu@intel.com>
24513 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
24514 view_convert_expr mask to signed type when folding pblendvb
24517 2023-06-09 liuhongt <hongtao.liu@intel.com>
24520 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
24521 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
24522 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
24524 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
24525 real codename for __builtin_ia32_pabs{b,w,d}.
24527 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
24529 * gimple-range-op.cc
24530 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
24531 (gimple_range_op_handler::maybe_builtin_call): Adjust.
24532 * gimple-range-op.h (operand1, operand2): Use m_operator.
24533 * range-op.cc (integral_table, pointer_table): Relocate.
24534 (get_op_handler): Rename from get_handler and handle all types.
24535 (range_op_handler::range_op_handler): Relocate.
24536 (range_op_handler::set_op_handler): Relocate and adjust.
24537 (range_op_handler::range_op_handler): Relocate.
24538 (dispatch_trio): New.
24539 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
24540 (range_op_handler::dispatch_kind): New.
24541 (range_op_handler::fold_range): Relocate and Use new dispatch value.
24542 (range_op_handler::op1_range): Ditto.
24543 (range_op_handler::op2_range): Ditto.
24544 (range_op_handler::lhs_op1_relation): Ditto.
24545 (range_op_handler::lhs_op2_relation): Ditto.
24546 (range_op_handler::op1_op2_relation): Ditto.
24547 (range_op_handler::set_op_handler): Use m_operator member.
24548 * range-op.h (range_op_handler::operator bool): Use m_operator.
24549 (range_op_handler::dispatch_kind): New.
24550 (range_op_handler::m_valid): Delete.
24551 (range_op_handler::m_int): Delete
24552 (range_op_handler::m_float): Delete
24553 (range_op_handler::m_operator): New.
24554 (range_op_table::operator[]): Relocate from .cc file.
24555 (range_op_table::set): Ditto.
24556 * value-range.h (class vrange): Make range_op_handler a friend.
24558 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
24560 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
24561 (cfn_pass_through_arg1): Adjust using statemenmt.
24562 (cfn_signbit): Change base class, adjust using statement.
24563 (cfn_copysign): Ditto.
24565 (cfn_sincos): Ditto.
24566 * range-op-float.cc (fold_range): Change class to range_operator.
24570 (lhs_op1_relation): Ditto.
24571 (lhs_op2_relation): Ditto.
24572 (op1_op2_relation): Ditto.
24573 (foperator_*): Ditto.
24574 (class float_table): New. Inherit from range_op_table.
24575 (floating_tree_table) Change to range_op_table pointer.
24576 (class floating_op_table): Delete.
24577 * range-op.cc (operator_equal): Adjust using statement.
24578 (operator_not_equal): Ditto.
24579 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
24580 (operator_minus, operator_cast): Ditto.
24581 (operator_bitwise_and, pointer_plus_operator): Ditto.
24582 (get_float_handle): Change return type.
24583 * range-op.h (range_operator_float): Delete. Relocate all methods
24584 into class range_operator.
24585 (range_op_handler::m_float): Change type to range_operator.
24586 (floating_op_table): Delete.
24587 (floating_tree_table): Change type.
24589 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
24591 * range-op.cc (range_operator::fold_range): Call virtual routine.
24592 (range_operator::update_bitmask): New.
24593 (operator_equal::update_bitmask): New.
24594 (operator_not_equal::update_bitmask): New.
24595 (operator_lt::update_bitmask): New.
24596 (operator_le::update_bitmask): New.
24597 (operator_gt::update_bitmask): New.
24598 (operator_ge::update_bitmask): New.
24599 (operator_ge::update_bitmask): New.
24600 (operator_plus::update_bitmask): New.
24601 (operator_minus::update_bitmask): New.
24602 (operator_pointer_diff::update_bitmask): New.
24603 (operator_min::update_bitmask): New.
24604 (operator_max::update_bitmask): New.
24605 (operator_mult::update_bitmask): New.
24606 (operator_div:operator_div):New.
24607 (operator_div::update_bitmask): New.
24608 (operator_div::m_code): New member.
24609 (operator_exact_divide::operator_exact_divide): New constructor.
24610 (operator_lshift::update_bitmask): New.
24611 (operator_rshift::update_bitmask): New.
24612 (operator_bitwise_and::update_bitmask): New.
24613 (operator_bitwise_or::update_bitmask): New.
24614 (operator_bitwise_xor::update_bitmask): New.
24615 (operator_trunc_mod::update_bitmask): New.
24616 (op_ident, op_unknown, op_ptr_min_max): New.
24617 (op_nop, op_convert): Delete.
24618 (op_ssa, op_paren, op_obj_type): Delete.
24619 (op_realpart, op_imagpart): Delete.
24620 (op_ptr_min, op_ptr_max): Delete.
24621 (pointer_plus_operator:update_bitmask): New.
24622 (range_op_table::set): Do not use m_code.
24623 (integral_table::integral_table): Adjust to single instances.
24624 * range-op.h (range_operator::range_operator): Delete.
24625 (range_operator::m_code): Delete.
24626 (range_operator::update_bitmask): New.
24628 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
24630 * range-op-float.cc (range_operator_float::fold_range): Return
24631 NAN of the result type.
24633 2023-06-08 Jakub Jelinek <jakub@redhat.com>
24635 * optabs.cc (expand_ffs): Add forward declaration.
24636 (expand_doubleword_clz): Rename to ...
24637 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
24638 handle also doubleword CTZ and FFS in addition to CLZ.
24639 (expand_unop): Adjust caller. Also call it for doubleword
24640 ctz_optab and ffs_optab.
24642 2023-06-08 Jakub Jelinek <jakub@redhat.com>
24645 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
24646 n_words == 2 recurse with mmx_ok as first argument rather than false.
24648 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
24650 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
24651 avoid sign extension/undefined behaviour when setting each bit.
24653 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
24654 Uros Bizjak <ubizjak@gmail.com>
24656 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
24657 Use new x86_stc instruction when the carry flag must be set.
24658 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
24659 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
24660 * config/i386/i386.h (TARGET_SLOW_STC): New define.
24661 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
24662 (x86_stc): New define_insn.
24663 (define_peephole2): Convert x86_stc into alternate implementation
24664 on pentium4 without -Os when a QImode register is available.
24665 (*x86_cmc): New define_insn.
24666 (define_peephole2): Convert *x86_cmc into alternate implementation
24667 on pentium4 without -Os when a QImode register is available.
24668 (*setccc): New define_insn_and_split for a no-op CCCmode move.
24669 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
24670 recognize (and eliminate) the carry flag being copied to itself.
24671 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
24672 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
24674 2023-06-07 Andrew Pinski <apinski@marvell.com>
24676 * match.pd: Fix comment for the
24677 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
24679 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
24680 Jeff Law <jlaw@ventanamicro.com>
24682 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
24683 (rotrsi3_sext): Expose generator.
24684 (rotlsi3 pattern): Hide generator.
24685 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
24687 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
24688 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
24689 (mulsi3, <optab>si3): Likewise.
24690 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
24691 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
24692 (<u>mulsidi3): Likewise.
24693 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
24694 (mulsi3_extended, <optab>si3_extended): Likewise.
24695 (splitter for shadd feeding divison): Update RTL pattern to account
24696 for changes in how 32 bit ops are expanded for TARGET_64BIT.
24697 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
24699 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
24702 * config/riscv/riscv.cc (riscv_print_operand): Calculate
24703 memmodel only when it is valid.
24705 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
24707 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
24708 for constant element of a vector.
24710 2023-06-07 Jakub Jelinek <jakub@redhat.com>
24712 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
24713 instead compare tree_nonzero_bits <= 1U rather than just == 1.
24715 2023-06-07 Alex Coplan <alex.coplan@arm.com>
24718 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
24720 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
24721 names for builtins.
24722 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
24723 setup if in_lto_p, just like we do for SVE.
24724 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
24725 (__arm_st64b): Delete.
24726 (__arm_st64bv): Delete.
24727 (__arm_st64bv0): Delete.
24729 2023-06-07 Alex Coplan <alex.coplan@arm.com>
24732 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
24733 Use input operand for the destination address.
24734 * config/aarch64/aarch64.md (st64b): Fix constraint on address
24737 2023-06-07 Alex Coplan <alex.coplan@arm.com>
24740 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
24741 Replace eight consecutive spaces with tabs.
24742 (aarch64_init_ls64_builtins): Likewise.
24743 (aarch64_expand_builtin_ls64): Likewise.
24744 * config/aarch64/aarch64.md (ld64b): Likewise.
24747 (st64bv0): Likewise.
24749 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
24751 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
24752 offset table pseudo to a general reg subset.
24754 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24756 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
24758 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
24760 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
24761 (aarch64_sqxtun2<mode>_le): Likewise.
24762 (aarch64_sqxtun2<mode>_be): Likewise.
24763 (aarch64_sqxtun2<mode>): Adjust for the above.
24764 (aarch64_sqmovun<mode>): New define_expand.
24765 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
24766 (half_mask): New mode attribute.
24767 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
24770 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24772 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
24774 (aarch64_addp<mode>_insn): ... This...
24775 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
24776 (aarch64_addp<mode>): New define_expand.
24778 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24780 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
24781 * config/riscv/riscv-v.cc
24782 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
24784 (rvv_builder::single_step_npatterns_p): New function.
24785 (rvv_builder::npatterns_all_equal_p): Ditto.
24786 (const_vec_all_in_range_p): Support POLY handling.
24787 (gen_const_vector_dup): Ditto.
24788 (emit_vlmax_gather_insn): Add vrgatherei16.
24789 (emit_vlmax_masked_gather_mu_insn): Ditto.
24790 (expand_const_vector): Add VLA SLP const vector support.
24791 (expand_vec_perm): Support POLY.
24792 (struct expand_vec_perm_d): New struct.
24793 (shuffle_generic_patterns): New function.
24794 (expand_vec_perm_const_1): Ditto.
24795 (expand_vec_perm_const): Ditto.
24796 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
24797 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
24799 2023-06-07 Andrew Pinski <apinski@marvell.com>
24801 PR middle-end/110117
24802 * expr.cc (expand_single_bit_test): Handle
24803 const_int from expand_expr.
24805 2023-06-07 Andrew Pinski <apinski@marvell.com>
24807 * expr.cc (do_store_flag): Rearrange the
24808 TER code so that it overrides the nonzero bits
24809 info if we had `a & POW2`.
24811 2023-06-07 Andrew Pinski <apinski@marvell.com>
24813 PR tree-optimization/110134
24814 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
24816 (-A CMP CST -> B CMP (-CST)): Likewise.
24818 2023-06-07 Andrew Pinski <apinski@marvell.com>
24820 PR tree-optimization/89263
24821 PR tree-optimization/99069
24822 PR tree-optimization/20083
24823 PR tree-optimization/94898
24824 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
24825 one of the operands are constant.
24827 2023-06-07 Andrew Pinski <apinski@marvell.com>
24829 * match.pd (zero_one_valued_p): Match 0 integer constant
24832 2023-06-07 Pan Li <pan2.li@intel.com>
24834 * config/riscv/riscv-vector-builtins-types.def
24835 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
24836 (vfloat32m1_t): Ditto.
24837 (vfloat32m2_t): Ditto.
24838 (vfloat32m4_t): Ditto.
24839 (vfloat32m8_t): Ditto.
24840 (vint16mf4_t): Ditto.
24841 (vint16mf2_t): Ditto.
24842 (vint16m1_t): Ditto.
24843 (vint16m2_t): Ditto.
24844 (vint16m4_t): Ditto.
24845 (vint16m8_t): Ditto.
24846 (vuint16mf4_t): Ditto.
24847 (vuint16mf2_t): Ditto.
24848 (vuint16m1_t): Ditto.
24849 (vuint16m2_t): Ditto.
24850 (vuint16m4_t): Ditto.
24851 (vuint16m8_t): Ditto.
24852 (vint32mf2_t): Ditto.
24853 (vint32m1_t): Ditto.
24854 (vint32m2_t): Ditto.
24855 (vint32m4_t): Ditto.
24856 (vint32m8_t): Ditto.
24857 (vuint32mf2_t): Ditto.
24858 (vuint32m1_t): Ditto.
24859 (vuint32m2_t): Ditto.
24860 (vuint32m4_t): Ditto.
24861 (vuint32m8_t): Ditto.
24863 2023-06-07 Jason Merrill <jason@redhat.com>
24866 * doc/invoke.texi: Document it.
24868 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
24870 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
24871 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
24872 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
24873 NOT (BITREVERSE x) as BITREVERSE (NOT x).
24874 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
24875 Optimize PARITY (BITREVERSE x) as PARITY x.
24876 Optimize BITREVERSE (BITREVERSE x) as x.
24877 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
24878 BITREVERSE of a constant integer at compile-time.
24879 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
24880 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
24881 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
24882 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
24883 Optimize COPYSIGN (x, ABS y) as ABS x.
24884 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
24885 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
24886 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
24887 arguments at compile-time.
24889 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
24891 * rtl.h (function_invariant_p): Change return type from int to bool.
24892 * reload1.cc (function_invariant_p): Change return type from
24893 int to bool and adjust function body accordingly.
24895 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24897 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
24898 (*single_<optab>mult_plus<mode>): Ditto.
24899 (*double_<optab>mult_plus<mode>): Ditto.
24900 (*sign_zero_extend_fma): Ditto.
24901 (*zero_sign_extend_fma): Ditto.
24902 * config/riscv/riscv-protos.h (enum insn_type): New enum.
24904 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
24905 Tobias Burnus <tobias@codesourcery.com>
24907 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
24908 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
24910 (omp_get_attachment): Handle map clauses with 'present' modifier.
24911 (omp_group_base): Likewise.
24912 (gimplify_scan_omp_clauses): Reorder present maps to come first.
24913 Set GOVD flags for present defaultmaps.
24914 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
24915 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
24917 (lower_omp_target): Handle map clauses with 'present' modifier.
24918 Handle 'to' and 'from' clauses with 'present'.
24919 * tree-core.h (enum omp_clause_defaultmap_kind): Add
24920 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
24921 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
24922 'from' clauses with 'present' modifier. Handle present defaultmap.
24923 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
24925 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
24927 * config/rs6000/genfusion.pl: Delete some dead code.
24929 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
24931 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
24933 (gen_ld_cmpi_p10): ... this.
24935 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
24938 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
24939 duplicate expression.
24941 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24943 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
24944 Handle unsigned reduc_plus_scal_ builtins.
24945 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
24946 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
24947 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
24948 __builtin_aarch64_reduc_plus_scal_v2di.
24949 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
24951 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24953 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
24954 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
24955 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
24957 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24959 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
24960 (aarch64_shrn<mode>_insn_be): Delete.
24961 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
24962 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
24963 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
24964 (aarch64_rshrn<mode>_insn_le): Delete.
24965 (aarch64_rshrn<mode>_insn_be): Delete.
24966 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
24967 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
24969 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24971 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
24973 (aarch64_pars_overlap_p): Likewise.
24974 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
24975 Express in terms of UNSPEC_ADDV.
24976 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
24977 (*aarch64_<su>addlv<mode>_reduction): Define.
24978 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
24979 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
24980 (aarch64_pars_overlap_p): Likewise.
24981 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
24982 (VQUADW): New mode attribute.
24983 (VWIDE2X_S): Likewise.
24985 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
24986 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
24988 2023-06-06 Richard Biener <rguenther@suse.de>
24990 PR middle-end/110055
24991 * gimplify.cc (gimplify_target_expr): Do not emit
24992 CLOBBERs for variables which have static storage duration
24993 after gimplifying their initializers.
24995 2023-06-06 Richard Biener <rguenther@suse.de>
24997 PR tree-optimization/109143
24998 * tree-ssa-structalias.cc (solution_set_expand): Avoid
24999 one bitmap iteration and optimize bit range setting.
25001 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
25003 PR bootstrap/110120
25004 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
25005 XVECEXP, not XEXP, to access first item of a PARALLEL.
25007 2023-06-06 Pan Li <pan2.li@intel.com>
25009 * config/riscv/riscv-vector-builtins-types.def
25010 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
25011 (vfloat16mf2_t): Likewise.
25012 (vfloat16m1_t): Likewise.
25013 (vfloat16m2_t): Likewise.
25014 (vfloat16m4_t): Likewise.
25015 (vfloat16m8_t): Likewise.
25016 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
25017 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
25019 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
25021 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
25022 for cfi reg/mem machmode
25023 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
25025 2023-06-06 Li Xu <xuli1@eswincomputing.com>
25027 * config/riscv/vector-iterators.md:
25028 Fix 'REQUIREMENT' for machine_mode 'MODE'.
25029 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
25030 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
25031 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
25033 2023-06-06 Pan Li <pan2.li@intel.com>
25035 * config/riscv/vector-iterators.md: Fix typo in mode attr.
25037 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
25038 Joel Hutton <joel.hutton@arm.com>
25040 * doc/generic.texi: Remove old tree codes.
25041 * expr.cc (expand_expr_real_2): Remove old tree code cases.
25042 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
25043 * optabs-tree.cc (optab_for_tree_code): Likewise.
25044 (supportable_half_widening_operation): Likewise.
25045 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
25046 * tree-inline.cc (estimate_operator_cost): Likewise.
25047 (op_symbol_code): Likewise.
25048 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
25049 (vect_analyze_data_ref_accesses): Likewise.
25050 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
25051 * cfgexpand.cc (expand_debug_expr): Likewise.
25052 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
25053 (supportable_widening_operation): Likewise.
25054 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
25056 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
25057 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
25058 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
25059 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
25060 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
25061 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
25062 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
25063 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
25065 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
25066 Joel Hutton <joel.hutton@arm.com>
25067 Tamar Christina <tamar.christina@arm.com>
25069 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
25071 (vec_widen_<su>add_lo_<mode>): ... to this.
25072 (vec_widen_<su>addl_hi_<mode>): Rename this ...
25073 (vec_widen_<su>add_hi_<mode>): ... to this.
25074 (vec_widen_<su>subl_lo_<mode>): Rename this ...
25075 (vec_widen_<su>sub_lo_<mode>): ... to this.
25076 (vec_widen_<su>subl_hi_<mode>): Rename this ...
25077 (vec_widen_<su>sub_hi_<mode>): ...to this.
25078 * doc/generic.texi: Document new IFN codes.
25079 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
25080 (commutative_binary_fn_p): Add widen_plus fn's.
25081 (widening_fn_p): New function.
25082 (narrowing_fn_p): New function.
25083 (direct_internal_fn_optab): Change visibility.
25084 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
25085 internal_fn that expands into multiple internal_fns for widening.
25086 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
25087 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
25088 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
25089 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
25090 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
25091 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
25092 (lookup_hilo_internal_fn): Likewise.
25093 (widening_fn_p): Likewise.
25094 (Narrowing_fn_p): Likewise.
25095 * optabs.cc (commutative_optab_p): Add widening plus optabs.
25096 * optabs.def (OPTAB_D): Define widen add, sub optabs.
25097 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
25098 patterns with a hi/lo or even/odd split.
25099 (vect_recog_sad_pattern): Refactor to use new IFN codes.
25100 (vect_recog_widen_plus_pattern): Likewise.
25101 (vect_recog_widen_minus_pattern): Likewise.
25102 (vect_recog_average_pattern): Likewise.
25103 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
25105 (supportable_widening_operation): Likewise.
25106 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
25108 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
25109 Joel Hutton <joel.hutton@arm.com>
25111 * tree-vect-patterns.cc: Add include for gimple-iterator.
25112 (vect_recog_widen_op_pattern): Refactor to use code_helper.
25113 (vect_gimple_build): New function.
25114 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
25116 (vectorizable_call): Likewise.
25117 (vect_gen_widened_results_half): Likewise.
25118 (vect_create_vectorized_demotion_stmts): Likewise.
25119 (vect_create_vectorized_promotion_stmts): Likewise.
25120 (vect_create_half_widening_stmts): Likewise.
25121 (vectorizable_conversion): Likewise.
25122 (supportable_widening_operation): Likewise.
25123 (supportable_narrowing_operation): Likewise.
25124 * tree-vectorizer.h (supportable_widening_operation): Change
25125 prototype to use code_helper.
25126 (supportable_narrowing_operation): Likewise.
25127 (vect_gimple_build): New function prototype.
25128 * tree.h (code_helper::safe_as_tree_code): New function.
25129 (code_helper::safe_as_fn_code): New function.
25131 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
25133 * wide-int.cc (wi::bitreverse_large): New function implementing
25134 bit reversal of an integer.
25135 * wide-int.h (wi::bitreverse): New (template) function prototype.
25136 (bitreverse_large): Prototype helper function/implementation.
25137 (wi::bitreverse): New template wrapper around bitreverse_large.
25139 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
25141 * rtl.h (print_rtl_single): Change return type from int to void.
25142 (print_rtl_single_with_indent): Ditto.
25143 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
25144 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
25145 (rtx_writer::print_rtx_operand_code_0): Ditto.
25146 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
25147 (rtx_writer::print_rtx_operand_code_i): Ditto.
25148 (rtx_writer::print_rtx_operand_code_u): Ditto.
25149 (rtx_writer::print_rtx_operand): Ditto.
25150 (rtx_writer::print_rtx): Ditto.
25151 (rtx_writer::finish_directive): Ditto.
25152 (print_rtl_single): Change return type from int to void
25153 and adjust function body accordingly.
25154 (rtx_writer::print_rtl_single_with_indent): Ditto.
25156 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
25158 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
25159 (reg_class_subset_p): Ditto.
25160 * reginfo.cc (reg_classes_intersect_p): Ditto.
25161 (reg_class_subset_p): Ditto.
25163 2023-06-05 Pan Li <pan2.li@intel.com>
25165 * config/riscv/riscv-vector-builtins-types.def
25166 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
25167 (vfloat32m1_t): Ditto.
25168 (vfloat32m2_t): Ditto.
25169 (vfloat32m4_t): Ditto.
25170 (vfloat32m8_t): Ditto.
25171 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
25172 (vint16mf2_t): Ditto.
25173 (vint16m1_t): Ditto.
25174 (vint16m2_t): Ditto.
25175 (vint16m4_t): Ditto.
25176 (vint16m8_t): Ditto.
25177 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
25178 (vuint16mf2_t): Ditto.
25179 (vuint16m1_t): Ditto.
25180 (vuint16m2_t): Ditto.
25181 (vuint16m4_t): Ditto.
25182 (vuint16m8_t): Ditto.
25183 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
25184 (vint32m1_t): Ditto.
25185 (vint32m2_t): Ditto.
25186 (vint32m4_t): Ditto.
25187 (vint32m8_t): Ditto.
25188 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
25189 (vuint32m1_t): Ditto.
25190 (vuint32m2_t): Ditto.
25191 (vuint32m4_t): Ditto.
25192 (vuint32m8_t): Ditto.
25193 * config/riscv/vector-iterators.md: Add FP=16 support for V,
25194 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
25196 2023-06-05 Andrew Pinski <apinski@marvell.com>
25198 PR bootstrap/110085
25199 * Makefile.in (clean): Remove the removing of
25200 MULTILIB_DIR/MULTILIB_OPTIONS directories.
25202 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
25204 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
25206 * config/mips/mips.cc (speculation_barrier_libfunc): New static
25208 (mips_init_libfuncs): Initialize it.
25209 (mips_emit_speculation_barrier): New function.
25210 * config/mips/mips.md (speculation_barrier): Call
25211 mips_emit_speculation_barrier.
25213 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25215 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
25216 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
25217 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
25218 (rvv_builder::get_merged_repeating_sequence): Ditto.
25219 (rvv_builder::get_merge_scalar_mask): Ditto.
25220 (emit_scalar_move_insn): Ditto.
25221 (emit_vlmax_integer_move_insn): Ditto.
25222 (emit_nonvlmax_integer_move_insn): Ditto.
25223 (emit_vlmax_gather_insn): Ditto.
25224 (emit_vlmax_masked_gather_mu_insn): Ditto.
25225 (get_repeating_sequence_dup_machine_mode): Ditto.
25227 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25229 * config/riscv/autovec.md: Split arguments.
25230 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
25231 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
25233 2023-06-04 Andrew Pinski <apinski@marvell.com>
25235 * expr.cc (do_store_flag): Improve for single bit testing
25236 not against zero but against that single bit.
25238 2023-06-04 Andrew Pinski <apinski@marvell.com>
25240 * expr.cc (do_store_flag): Extend the one bit checking case
25241 to handle the case where we don't have an and but rather still
25242 one bit is known to be non-zero.
25244 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
25246 * config/h8300/constraints.md (Zz): Make this a normal
25248 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
25249 * config/h8300/logical.md (H8/SX bit patterns): Remove.
25251 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
25253 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
25254 New insn_and_split patterns.
25256 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25259 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
25260 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
25261 (@vlmul_extx4<mode>): Ditto.
25262 (@vlmul_extx8<mode>): Ditto.
25263 (@vlmul_extx16<mode>): Ditto.
25264 (@vlmul_extx32<mode>): Ditto.
25265 (@vlmul_extx64<mode>): Ditto.
25266 (*vlmul_extx2<mode>): Ditto.
25267 (*vlmul_extx4<mode>): Ditto.
25268 (*vlmul_extx8<mode>): Ditto.
25269 (*vlmul_extx16<mode>): Ditto.
25270 (*vlmul_extx32<mode>): Ditto.
25271 (*vlmul_extx64<mode>): Ditto.
25273 2023-06-04 Pan Li <pan2.li@intel.com>
25275 * config/riscv/riscv-vector-builtins-types.def
25276 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
25277 (vfloat32m1_t): Likewise.
25278 (vfloat32m2_t): Likewise.
25279 (vfloat32m4_t): Likewise.
25280 (vfloat32m8_t): Likewise.
25281 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
25282 * config/riscv/vector-iterators.md: Add single to half machine
25285 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25287 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
25288 (*n<optab><mode>): Ditto.
25289 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
25290 (*n<optab><mode>): Ditto.
25291 * config/riscv/vector.md: Ditto.
25293 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
25296 * config/i386/i386-features.cc (scalar_chain::convert_compare):
25297 Update or delete REG_EQUAL notes, converting CONST_INT and
25298 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
25300 2023-06-04 Jason Merrill <jason@redhat.com>
25303 * tree-eh.cc (lower_resx): Pass the exception pointer to the
25305 * except.h: Tweak comment.
25307 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
25309 * postreload.cc (move2add_use_add2_insn): Handle
25310 trivial single_sets. Rename variable PAT to SET.
25311 (move2add_use_add3_insn, reload_cse_move2add): Similar.
25313 2023-06-04 Pan Li <pan2.li@intel.com>
25315 * config/riscv/riscv-vector-builtins-types.def
25316 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
25317 (vfloat16mf2_t): Likewise.
25318 (vfloat16m1_t): Likewise.
25319 (vfloat16m2_t): Likewise.
25320 (vfloat16m4_t): Likewise.
25321 (vfloat16m8_t): Likewise.
25322 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
25323 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
25324 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
25325 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
25328 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
25330 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
25333 2023-06-03 Die Li <lidie@eswincomputing.com>
25335 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
25337 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25339 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
25341 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25343 * config/riscv/vector.md: Add vector-opt.md.
25344 * config/riscv/autovec-opt.md: New file.
25346 2023-06-03 liuhongt <hongtao.liu@intel.com>
25348 PR tree-optimization/110067
25349 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
25350 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
25352 2023-06-03 liuhongt <hongtao.liu@intel.com>
25355 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
25356 (truncv2si<mode>2): Ditto.
25358 2023-06-02 Andrew Pinski <apinski@marvell.com>
25360 PR rtl-optimization/102733
25361 * dse.cc (store_info): Add addrspace field.
25362 (record_store): Record the address space
25363 and check to make sure they are the same.
25365 2023-06-02 Andrew Pinski <apinski@marvell.com>
25367 PR rtl-optimization/110042
25368 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
25369 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
25371 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
25374 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
25375 Make sure that we do not have a cap on field alignment before altering
25376 the struct layout based on the type alignment of the first entry.
25378 2023-06-02 David Faust <david.faust@oracle.com>
25381 * btfout.cc (btf_absolute_func_id): New function.
25382 (btf_asm_func_type): Call it here. Change index parameter from
25383 size_t to ctf_id_t. Use PRIu64 formatter.
25385 2023-06-02 Alex Coplan <alex.coplan@arm.com>
25387 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
25388 (btf_asm_datasec_type): Likewise.
25390 2023-06-02 Carl Love <cel@us.ibm.com>
25392 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
25393 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
25395 2023-06-02 Jason Merrill <jason@redhat.com>
25399 * tree.h (DECL_MERGEABLE): New.
25400 * tree-core.h (struct tree_decl_common): Mention it.
25401 * gimplify.cc (gimplify_init_constructor): Check it.
25402 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
25403 * varasm.cc (categorize_decl_for_section): Likewise.
25405 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
25407 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
25408 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
25409 (stack_regs_mentioned_p): Change return type from int to bool
25410 and adjust function body accordingly.
25411 (stack_regs_mentioned): Ditto.
25412 (check_asm_stack_operands): Ditto. Change "malformed_asm"
25414 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
25415 (swap_rtx_condition_1): Change return type from int to bool
25416 and adjust function body accordingly. Change "r" variable to bool.
25417 (swap_rtx_condition): Change return type from int to bool
25418 and adjust function body accordingly.
25419 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
25420 (subst_stack_regs): Ditto.
25421 (convert_regs_entry): Change return type from int to bool and adjust
25422 function body accordingly. Change "inserted" variable to bool.
25423 (convert_regs_1): Recode handling of control_flow_insn_deleted.
25424 (convert_regs_2): Recode handling of cfg_altered.
25425 (convert_regs): Ditto. Change "inserted" variable to bool.
25427 2023-06-02 Jason Merrill <jason@redhat.com>
25430 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
25431 (initializer_constant_valid_p_1): Compare float precision.
25433 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
25435 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
25438 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25440 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
25441 (vect_set_loop_condition_partial_vectors): Ditto.
25443 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
25446 * config/avr/avr.md: Add an RTL peephole to optimize operations on
25447 non-LD_REGS after a move from LD_REGS.
25448 (piaop): New code iterator.
25450 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
25453 * doc/install.texi: Document (optional) Perl usage for parallel
25454 testing of libgomp.
25456 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
25459 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
25462 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25463 KuanLin Chen <best124612@gmail.com>
25465 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
25466 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
25468 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25470 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
25472 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25474 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
25476 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25478 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
25480 (DEF_RVV_FRM_ENUM): Ditto.
25482 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25484 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
25485 intrinsic API expander
25486 * config/riscv/vector.md
25487 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
25488 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
25489 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
25491 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25493 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
25494 * config/riscv/predicates.md (vector_perm_operand): New predicate.
25495 * config/riscv/riscv-protos.h (enum insn_type): New enum.
25496 (expand_vec_perm): New function.
25497 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
25498 (gen_const_vector_dup): Ditto.
25499 (emit_vlmax_gather_insn): Ditto.
25500 (emit_vlmax_masked_gather_mu_insn): Ditto.
25501 (expand_vec_perm): Ditto.
25503 2023-06-01 Jason Merrill <jason@redhat.com>
25505 * doc/invoke.texi (-Wpedantic): Improve clarity.
25507 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
25509 * rtl.h (exp_equiv_p): Change return type from int to bool.
25510 * cse.cc (mention_regs): Change return type from int to bool
25511 and adjust function body accordingly.
25512 (exp_equiv_p): Ditto.
25513 (insert_regs): Ditto. Change "modified" function argument to bool
25514 and update usage accordingly.
25515 (record_jump_cond): Remove always zero "reversed_nonequality"
25516 function argument and update usage accordingly.
25517 (fold_rtx): Change "changed" variable to bool.
25518 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
25519 (is_dead_reg): Change return type from int to bool.
25521 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
25523 * config/xtensa/xtensa.md (adddi3, subdi3):
25524 New RTL generation patterns implemented according to the instruc-
25525 tion idioms described in the Xtensa ISA reference manual (p. 600).
25527 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
25528 Uros Bizjak <ubizjak@gmail.com>
25531 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
25532 CODE_for_sse4_1_ptestzv2di.
25533 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
25534 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
25535 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
25536 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
25537 when expanding UNSPEC_PTEST to compare against zero.
25538 * config/i386/i386-features.cc (scalar_chain::convert_compare):
25539 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
25540 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
25541 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
25542 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
25543 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
25544 check for suitable matching modes for the UNSPEC_PTEST pattern.
25545 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
25546 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
25547 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
25548 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
25549 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
25550 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
25551 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
25553 (*ptest<mode>_and): Specify CCZ to only perform this optimization
25554 when only the Z flag is required.
25556 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
25559 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
25561 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25563 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
25564 Add =r,m and =r,m alternatives.
25565 (load_pair<DREG:mode><DREG2:mode>): Likewise.
25566 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
25568 2023-06-01 Pan Li <pan2.li@intel.com>
25570 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
25572 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
25573 (main): Disable FP16 tuple.
25574 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
25575 (TARGET_VECTOR_ELEN_FP_16): Ditto.
25576 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
25578 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
25579 (vfloat16mf2_t): Ditto.
25580 (vfloat16m1_t): Ditto.
25581 (vfloat16m2_t): Ditto.
25582 (vfloat16m4_t): Ditto.
25583 (vfloat16m8_t): Ditto.
25584 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
25586 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
25587 machine mode based on TARGET_VECTOR_ELEN_FP_16.
25589 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25591 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
25592 (DEF_RVV_FRM_ENUM): New macro.
25593 (handle_pragma_vector): Add FRM enum
25594 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
25601 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
25602 Richard Sandiford <richard.sandiford@arm.com>
25604 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
25605 Update call to wi::bswap.
25606 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
25607 Update call to wi::bswap.
25608 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
25609 Update calls to wi::bswap.
25610 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
25611 (wi::bswap_large): New function, with revised API.
25612 * wide-int.h (wi::bswap): New (template) function prototype.
25613 (wide_int_storage::bswap): Remove method.
25614 (sext_large, zext_large): Consistent indentation/line wrapping.
25615 (bswap_large): Prototype helper function containing implementation.
25616 (wi::bswap): New template wrapper around bswap_large.
25618 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25621 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
25622 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
25623 (usdot_prod<vsi2qi>): Rename to...
25624 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
25625 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
25626 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
25627 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
25628 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
25629 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
25630 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
25633 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25636 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
25637 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
25638 (aarch64_sq<r>dmulh_n<mode>): Rename to...
25639 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
25640 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
25641 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
25642 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
25643 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
25644 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
25645 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
25646 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
25647 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
25648 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
25649 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
25651 2023-05-31 David Faust <david.faust@oracle.com>
25653 * btfout.cc (btf_kind_names): New.
25654 (btf_kind_name): New.
25655 (btf_absolute_var_id): New utility function.
25656 (btf_relative_var_id): Likewise.
25657 (btf_relative_func_id): Likewise.
25658 (btf_absolute_datasec_id): Likewise.
25659 (btf_asm_type_ref): New.
25660 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
25661 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
25662 (btf_asm_varent): Likewise.
25663 (btf_asm_func_arg): Likewise.
25664 (btf_asm_datasec_entry): Likewise.
25665 (btf_asm_datasec_type): Likewise.
25666 (btf_asm_func_type): Likewise. Add index parameter.
25667 (btf_asm_enum_const): Likewise.
25668 (btf_asm_sou_member): Likewise.
25669 (output_btf_vars): Update btf_asm_* call accordingly.
25670 (output_asm_btf_sou_fields): Likewise.
25671 (output_asm_btf_enum_list): Likewise.
25672 (output_asm_btf_func_args_list): Likewise.
25673 (output_asm_btf_vlen_bytes): Likewise.
25674 (output_btf_func_types): Add ctf_container_ref parameter.
25675 Pass it to btf_asm_func_type.
25676 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
25677 (btf_output): Update output_btf_func_types call similarly.
25679 2023-05-31 David Faust <david.faust@oracle.com>
25681 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
25682 and BTF_KIND_FWD which do not use the size/type field at all.
25684 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
25686 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
25687 (active_insn_p): Ditto.
25688 (in_sequence_p): Ditto.
25689 (unshare_all_rtl): Change return type from int to void.
25690 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
25691 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
25692 and adjust function body accordingly.
25693 (mem_expr_equal_p): Ditto.
25694 (unshare_all_rtl): Change return type from int to void
25695 and adjust function body accordingly.
25696 (verify_rtx_sharing): Remove unneeded return.
25697 (active_insn_p): Change return type from int to bool
25698 and adjust function body accordingly.
25699 (in_sequence_p): Ditto.
25701 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
25703 * rtl.h (true_dependence): Change return type from int to bool.
25704 (canon_true_dependence): Ditto.
25705 (read_dependence): Ditto.
25706 (anti_dependence): Ditto.
25707 (canon_anti_dependence): Ditto.
25708 (output_dependence): Ditto.
25709 (canon_output_dependence): Ditto.
25710 (may_alias_p): Ditto.
25711 * alias.h (alias_sets_conflict_p): Ditto.
25712 (alias_sets_must_conflict_p): Ditto.
25713 (objects_must_conflict_p): Ditto.
25714 (nonoverlapping_memrefs_p): Ditto.
25715 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
25716 (record_set): Ditto.
25717 (base_alias_check): Ditto.
25718 (find_base_value): Ditto.
25719 (mems_in_disjoint_alias_sets_p): Ditto.
25720 (get_alias_set_entry): Ditto.
25721 (decl_for_component_ref): Ditto.
25722 (write_dependence_p): Ditto.
25723 (memory_modified_1): Ditto.
25724 (mems_in_disjoint_alias_set_p): Change return type from int to bool
25725 and adjust function body accordingly.
25726 (alias_sets_conflict_p): Ditto.
25727 (alias_sets_must_conflict_p): Ditto.
25728 (objects_must_conflict_p): Ditto.
25729 (rtx_equal_for_memref_p): Ditto.
25730 (base_alias_check): Ditto.
25731 (read_dependence): Ditto.
25732 (nonoverlapping_memrefs_p): Ditto.
25733 (true_dependence_1): Ditto.
25734 (true_dependence): Ditto.
25735 (canon_true_dependence): Ditto.
25736 (write_dependence_p): Ditto.
25737 (anti_dependence): Ditto.
25738 (canon_anti_dependence): Ditto.
25739 (output_dependence): Ditto.
25740 (canon_output_dependence): Ditto.
25741 (may_alias_p): Ditto.
25742 (init_alias_analysis): Change "changed" variable to bool.
25744 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25746 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
25747 expand into define_insn_and_split.
25749 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25751 * config/riscv/vector.md: Remove FRM.
25753 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25755 * config/riscv/vector.md: Remove FRM.
25757 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25759 * config/riscv/vector.md: Remove FRM.
25761 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
25764 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
25767 2023-05-31 Richard Biener <rguenther@suse.de>
25770 PR tree-optimization/109143
25771 * tree-ssa-structalias.cc (struct topo_info): Remove.
25772 (init_topo_info): Likewise.
25773 (free_topo_info): Likewise.
25774 (compute_topo_order): Simplify API, put the component
25775 with ESCAPED last so it's processed first.
25776 (topo_visit): Adjust.
25777 (solve_graph): Likewise.
25779 2023-05-31 Richard Biener <rguenther@suse.de>
25781 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
25783 (add_graph_edge): Count redundant edges we avoid to create.
25784 (dump_sa_stats): Dump them.
25785 (ipa_pta_execute): Do not dump generating constraints when
25786 we are not dumping them.
25788 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25790 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
25791 output template to avoid explicit switch on which_alternative.
25792 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
25793 (and<mode>3): Likewise.
25794 (ior<mode>3): Likewise.
25795 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
25797 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
25799 * config/xtensa/predicates.md (xtensa_bit_join_operator):
25801 * config/xtensa/xtensa.md (ior_op): Remove.
25802 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
25803 insn_and_split pattern of the same name to express and capture
25804 the bit-combining operation with both sides swapped.
25805 In addition, replace use of code iterator with new operator
25807 (*shlrd_const, *shlrd_per_byte):
25808 Likewise regarding the code iterator.
25810 2023-05-31 Cui, Lili <lili.cui@intel.com>
25812 PR tree-optimization/110038
25813 * params.opt: Add a limit on tree-reassoc-width.
25814 * tree-ssa-reassoc.cc
25815 (rewrite_expr_tree_parallel): Add width limit.
25817 2023-05-31 Pan Li <pan2.li@intel.com>
25819 * common/config/riscv/riscv-common.cc:
25820 (riscv_implied_info): Add zvfh item.
25821 (riscv_ext_version_table): Ditto.
25822 (riscv_ext_flag_table): Ditto.
25823 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
25824 (TARGET_ZVFH): Ditto.
25826 2023-05-30 liuhongt <hongtao.liu@intel.com>
25828 PR tree-optimization/108804
25829 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
25830 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
25831 Add new parameter narrow_src_p.
25832 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
25833 vectorization by truncating to lower precision.
25834 * tree-vectorizer.h (vect_get_range_info): New declare.
25836 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
25838 * lra-int.h (lra_update_sp_offset): Add the prototype.
25839 * lra.cc (setup_sp_offset): Change the return type. Use
25840 lra_update_sp_offset.
25841 * lra-eliminations.cc (lra_update_sp_offset): New function.
25842 (lra_process_new_insns): Push the current insn to reprocess if the
25843 input reload changes sp offset.
25845 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
25848 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
25849 Fix misleading identation.
25851 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
25853 * rtl.h (comparison_dominates_p): Change return type from int to bool.
25854 (condjump_p): Ditto.
25855 (any_condjump_p): Ditto.
25856 (any_uncondjump_p): Ditto.
25857 (simplejump_p): Ditto.
25858 (returnjump_p): Ditto.
25859 (eh_returnjump_p): Ditto.
25860 (onlyjump_p): Ditto.
25861 (invert_jump_1): Ditto.
25862 (invert_jump): Ditto.
25863 (rtx_renumbered_equal_p): Ditto.
25864 (redirect_jump_1): Ditto.
25865 (redirect_jump): Ditto.
25866 (condjump_in_parallel_p): Ditto.
25867 * jump.cc (invert_exp_1): Adjust forward declaration.
25868 (comparison_dominates_p): Change return type from int to bool
25869 and adjust function body accordingly.
25870 (simplejump_p): Ditto.
25871 (condjump_p): Ditto.
25872 (condjump_in_parallel_p): Ditto.
25873 (any_uncondjump_p): Ditto.
25874 (any_condjump_p): Ditto.
25875 (returnjump_p): Ditto.
25876 (eh_returnjump_p): Ditto.
25877 (onlyjump_p): Ditto.
25878 (redirect_jump_1): Ditto.
25879 (redirect_jump): Ditto.
25880 (invert_exp_1): Ditto.
25881 (invert_jump_1): Ditto.
25882 (invert_jump): Ditto.
25883 (rtx_renumbered_equal_p): Ditto.
25885 2023-05-30 Andrew Pinski <apinski@marvell.com>
25887 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
25888 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
25889 Add ne as a possible cmp.
25890 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
25892 2023-05-30 Andrew Pinski <apinski@marvell.com>
25894 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
25897 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
25899 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
25900 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
25901 (and (extend X) C) as (zero_extend (and X C)), to also optimize
25902 modes wider than HOST_WIDE_INT.
25904 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
25907 * simplify-rtx.cc (simplify_const_relational_operation): Return
25908 early if we have a MODE_CC comparison that isn't a COMPARE against
25911 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
25913 * config/riscv/riscv.cc (riscv_const_insns): Allow
25914 const_vec_duplicates.
25916 2023-05-30 liuhongt <hongtao.liu@intel.com>
25918 PR middle-end/108938
25919 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
25920 function, cut from original find_bswap_or_nop function.
25921 (find_bswap_or_nop): Add a new parameter, detect bswap +
25922 rotate and save rotate result in the new parameter.
25923 (bswap_replace): Add a new parameter to indicate rotate and
25924 generate rotate stmt if needed.
25925 (maybe_optimize_vector_constructor): Adjust for new rotate
25926 parameter in the upper 2 functions.
25927 (pass_optimize_bswap::execute): Ditto.
25928 (imm_store_chain_info::output_merged_store): Ditto.
25930 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25932 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
25933 (aarch64_<su>adalp<mode>): New define_expand.
25934 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
25935 (aarch64_<su>addlp<mode>): Convert to define_expand.
25936 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
25937 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
25939 (USADDLP): Likewise.
25940 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
25942 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25944 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
25945 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
25946 srhadd, urhadd builtin codes for standard optab ones.
25947 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
25948 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
25950 (<u>avg<mode>3_ceil): Rename to...
25951 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
25953 (aarch64_<su>hsub<mode>): New define_expand.
25954 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
25955 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
25956 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
25958 2023-05-30 Andreas Schwab <schwab@suse.de>
25961 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
25962 match libsanitizer.
25964 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25966 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
25967 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
25969 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
25970 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
25971 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
25972 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
25973 (aarch64_<sra_op>sra_n<mode>): New define_expand.
25974 (aarch64_<sra_op>rsra_n<mode>): Likewise.
25975 (aarch64_<sur>sra_n<mode>): Rename to...
25976 (aarch64_<sur>sra_ndi): ... This.
25977 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
25978 any_target_p argument.
25979 (aarch64_extract_vec_duplicate_wide_int): Define.
25980 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
25981 (aarch64_const_vec_rnd_cst_p): Likewise.
25982 (aarch64_vector_mode_supported_any_target_p): Likewise.
25983 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
25984 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
25985 (VSRA): Adjust for the above.
25987 (V2XWIDE): New mode_attr.
25988 (vec_or_offset): Likewise.
25989 (SHIFTEXTEND): Likewise.
25990 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
25992 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
25993 clarify that it applies to current target options.
25994 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
25995 * doc/tm.texi.in: Regenerate.
25996 * stor-layout.cc (mode_for_vector): Check
25997 vector_mode_supported_any_target_p when iterating through vector modes.
25998 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
25999 clarify that it applies to current target options.
26000 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
26002 2023-05-30 Lili Cui <lili.cui@intel.com>
26004 PR tree-optimization/98350
26005 * tree-ssa-reassoc.cc
26006 (rewrite_expr_tree_parallel): Rewrite this function.
26007 (rank_ops_for_fma): New.
26008 (reassociate_bb): Handle new function.
26010 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
26012 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
26013 (rtx_unstable_p): Ditto.
26014 (reg_mentioned_p): Ditto.
26015 (reg_referenced_p): Ditto.
26016 (reg_used_between_p): Ditto.
26017 (reg_set_between_p): Ditto.
26018 (modified_between_p): Ditto.
26019 (no_labels_between_p): Ditto.
26020 (modified_in_p): Ditto.
26021 (reg_set_p): Ditto.
26022 (multiple_sets): Ditto.
26023 (set_noop_p): Ditto.
26024 (noop_move_p): Ditto.
26025 (reg_overlap_mentioned_p): Ditto.
26026 (dead_or_set_p): Ditto.
26027 (dead_or_set_regno_p): Ditto.
26028 (find_reg_fusage): Ditto.
26029 (find_regno_fusage): Ditto.
26030 (side_effects_p): Ditto.
26031 (volatile_refs_p): Ditto.
26032 (volatile_insn_p): Ditto.
26033 (may_trap_p_1): Ditto.
26034 (may_trap_p): Ditto.
26035 (may_trap_or_fault_p): Ditto.
26036 (computed_jump_p): Ditto.
26037 (auto_inc_p): Ditto.
26038 (loc_mentioned_in_p): Ditto.
26039 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
26040 (rtx_unstable_p): Change return type from int to bool
26041 and adjust function body accordingly.
26042 (rtx_addr_can_trap_p): Ditto.
26043 (reg_mentioned_p): Ditto.
26044 (no_labels_between_p): Ditto.
26045 (reg_used_between_p): Ditto.
26046 (reg_referenced_p): Ditto.
26047 (reg_set_between_p): Ditto.
26048 (reg_set_p): Ditto.
26049 (modified_between_p): Ditto.
26050 (modified_in_p): Ditto.
26051 (multiple_sets): Ditto.
26052 (set_noop_p): Ditto.
26053 (noop_move_p): Ditto.
26054 (reg_overlap_mentioned_p): Ditto.
26055 (dead_or_set_p): Ditto.
26056 (dead_or_set_regno_p): Ditto.
26057 (find_reg_fusage): Ditto.
26058 (find_regno_fusage): Ditto.
26059 (remove_node_from_insn_list): Ditto.
26060 (volatile_insn_p): Ditto.
26061 (volatile_refs_p): Ditto.
26062 (side_effects_p): Ditto.
26063 (may_trap_p_1): Ditto.
26064 (may_trap_p): Ditto.
26065 (may_trap_or_fault_p): Ditto.
26066 (computed_jump_p): Ditto.
26067 (auto_inc_p): Ditto.
26068 (loc_mentioned_in_p): Ditto.
26069 * combine.cc (can_combine_p): Update indirect function.
26071 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26073 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
26074 * config/riscv/iterators.md: New attribute.
26075 * config/riscv/vector-iterators.md: New attribute.
26077 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
26079 * config/riscv/riscv.md: Fix signed and unsigned comparison
26082 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26084 * config/riscv/autovec.md (fnma<mode>4): New pattern.
26085 (*fnma<mode>): Ditto.
26087 2023-05-29 Die Li <lidie@eswincomputing.com>
26089 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
26091 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
26092 process for TARGET_XTHEADCONDMOV
26094 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
26097 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
26098 TARGET_AVX512BW to generate truncv16hiv16qi2.
26100 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
26102 * config/riscv/riscv.md (and<mode>3): New expander.
26103 (*and<mode>3) New pattern.
26104 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
26107 2023-05-29 Pan Li <pan2.li@intel.com>
26109 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
26110 comments and rename local variables.
26111 (emit_nonvlmax_insn): Diito.
26112 (emit_vlmax_merge_insn): Ditto.
26113 (emit_vlmax_cmp_insn): Ditto.
26114 (emit_vlmax_cmp_mu_insn): Ditto.
26115 (emit_scalar_move_insn): Ditto.
26117 2023-05-29 Pan Li <pan2.li@intel.com>
26119 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
26121 (emit_nonvlmax_insn): Ditto.
26122 (emit_vlmax_merge_insn): Ditto.
26123 (emit_vlmax_cmp_insn): Ditto.
26124 (emit_vlmax_cmp_mu_insn): Ditto.
26125 (expand_vec_series): Ditto.
26127 2023-05-29 Pan Li <pan2.li@intel.com>
26129 * config/riscv/riscv-protos.h (enum insn_type): New type.
26130 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
26131 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
26133 (rvv_builder::get_merged_repeating_sequence): Ditto.
26134 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
26135 to evaluate the optimization cost.
26136 (rvv_builder::get_merge_scalar_mask): New function to get the merge
26138 (emit_scalar_move_insn): New function to emit vmv.s.x.
26139 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
26140 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
26142 (get_repeating_sequence_dup_machine_mode): New function to get the dup
26144 (expand_vector_init_merge_repeating_sequence): New function to perform
26146 (expand_vec_init): Add this vector init optimization.
26147 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
26149 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
26151 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
26152 put onto the increment when it is inserted after the position.
26154 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
26156 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
26159 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26161 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
26163 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26165 * config/riscv/autovec.md (fma<mode>4): New pattern.
26166 (*fma<mode>): Ditto.
26167 * config/riscv/riscv-protos.h (enum insn_type): New enum.
26168 (emit_vlmax_ternary_insn): New function.
26169 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
26171 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26173 * config/riscv/vector.md: Fix vimuladd instruction bug.
26175 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26177 * config/riscv/riscv.cc (global_state_unknown_p): New function.
26178 (riscv_mode_after): Fix incorrect VXM.
26180 2023-05-29 Pan Li <pan2.li@intel.com>
26182 * common/config/riscv/riscv-common.cc:
26183 (riscv_implied_info): Add zvfhmin item.
26184 (riscv_ext_version_table): Ditto.
26185 (riscv_ext_flag_table): Ditto.
26186 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
26187 (TARGET_ZFHMIN): Align indent.
26188 (TARGET_ZFH): Ditto.
26189 (TARGET_ZVFHMIN): New macro.
26191 2023-05-27 liuhongt <hongtao.liu@intel.com>
26194 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
26195 to VI_AVX2 to cover more modes.
26197 2023-05-27 liuhongt <hongtao.liu@intel.com>
26199 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
26200 Remove ATOM and ICELAKE(and later) core processors.
26202 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
26204 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
26206 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
26208 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
26211 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
26212 Juzhe Zhong <juzhe.zhong@rivai.ai>
26214 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
26216 (<optab><v_quad_trunc><mode>2): Dito.
26217 (<optab><v_oct_trunc><mode>2): Dito.
26218 (trunc<mode><v_double_trunc>2): Dito.
26219 (trunc<mode><v_quad_trunc>2): Dito.
26220 (trunc<mode><v_oct_trunc>2): Dito.
26221 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
26222 (autovectorize_vector_modes): Define.
26223 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
26225 (autovectorize_vector_modes): Implement hook.
26226 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
26227 Implement target hook.
26228 (riscv_vectorize_related_mode): Implement target hook.
26229 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
26230 (TARGET_VECTORIZE_RELATED_MODE): Define.
26231 * config/riscv/vector-iterators.md: Add lowercase versions of
26232 mode_attr iterators.
26234 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
26235 Tobias Burnus <tobias@codesourcery.com>
26237 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
26238 (ASM_SPEC): Use XNACKOPT.
26239 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
26240 (enum hsaco_attr_type): ... this, and generalize the names.
26241 (TARGET_XNACK): New macro.
26242 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
26244 (output_file_start): Update xnack handling.
26245 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
26246 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
26247 (sram_ecc_type): Rename to ...
26248 (hsaco_attr_type: ... this.)
26249 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
26250 (TEST_XNACK): Delete.
26251 (TEST_XNACK_ANY): New macro.
26252 (TEST_XNACK_ON): New macro.
26253 (main): Support the new -mxnack=on/off/any syntax.
26254 * doc/invoke.texi (-mxnack): Update for new syntax.
26256 2023-05-26 Andrew Pinski <apinski@marvell.com>
26258 * genmatch.cc (emit_debug_printf): New function.
26259 (dt_simplify::gen_1): Emit printf into the code
26260 before the `return true` or returning the folded result
26261 instead of emitting it always.
26263 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26265 * config/xtensa/xtensa-protos.h
26266 (xtensa_expand_block_set_unrolled_loop,
26267 xtensa_expand_block_set_small_loop): Remove.
26268 (xtensa_expand_block_set): New prototype.
26269 * config/xtensa/xtensa.cc
26270 (xtensa_expand_block_set_libcall): New subfunction.
26271 (xtensa_expand_block_set_unrolled_loop,
26272 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
26273 (xtensa_expand_block_set): New function that calls the above
26275 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
26276 xtensa_expand_block_set().
26278 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26280 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
26282 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
26284 * config/xtensa/constraints.md (O):
26285 Change to use the above function.
26286 * config/xtensa/xtensa.md (*subsi3_from_const):
26287 New insn_and_split pattern.
26289 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26291 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
26292 Retract excessive line folding, and correct the value of
26293 the "length" insn attribute related to TARGET_DENSITY.
26294 (*extzvsi-1bit_addsubx): Ditto.
26296 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
26298 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
26299 Do not disable call to ix86_expand_vecop_qihi2.
26301 2023-05-26 liuhongt <hongtao.liu@intel.com>
26305 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
26306 calculation when !hard_regno_mode_ok for GENERAL_REGS and
26307 mode, otherwise still use GENERAL_REGS.
26309 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26311 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
26312 explict VL and drop VL in ops.
26314 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
26316 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
26317 in different BB blocks.
26319 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
26321 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
26322 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
26323 instructions when available. Emulate truncation via
26324 ix86_expand_vec_perm_const_1 when native truncate insn
26326 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
26327 when available. Trivially rename some variables.
26328 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
26329 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
26330 calculation of V*QImode emulations to account for generation of
26331 2x-wider mode instructions.
26332 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
26333 emulations to account for generation of 2x-wider mode instructions.
26335 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
26338 * config/avr/avr.cc (avr_can_inline_p): New static function.
26339 (TARGET_CAN_INLINE_P): Define to that function.
26341 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
26344 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
26345 Handle any bit position and use mode QISI.
26346 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
26347 of 2 insns for bit-transfer of respective style.
26349 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
26351 * config/arm/iterators.md (MVE_6): Remove.
26352 * config/arm/mve.md: Replace MVE_6 with MVE_5.
26354 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26355 Richard Sandiford <richard.sandiford@arm.com>
26357 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
26359 (vect_set_loop_controls_directly): Add decrement IV support.
26360 (vect_set_loop_condition_partial_vectors): Ditto.
26361 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
26363 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
26366 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26369 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
26370 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
26371 Fix canonicalization of PLUS operands.
26372 (aarch64_fcmla<rot><mode>): Rename to...
26373 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
26374 Fix canonicalization of PLUS operands.
26375 (aarch64_fcmla_lane<rot><mode>): Rename to...
26376 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
26377 Fix canonicalization of PLUS operands.
26378 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
26379 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
26380 Fix canonicalization of PLUS operands.
26381 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
26383 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
26385 * config/arm/arm.md (rbitsi2): Rename to...
26386 (arm_rbit): ... This.
26387 (ctzsi2): Adjust for the above.
26388 (arm_rev16si2): Convert to define_expand.
26389 (arm_rev16si2_alt1): New pattern.
26390 (arm_rev16si2_alt): Rename to...
26391 (*arm_rev16si2_alt2): ... This.
26392 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
26393 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
26394 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
26395 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
26397 2023-05-25 Alex Coplan <alex.coplan@arm.com>
26400 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
26402 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
26403 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
26404 DFmode as an rvalue.
26406 2023-05-25 Richard Biener <rguenther@suse.de>
26409 * tree-vect-stmts.cc (vectorizable_condition): For
26410 embedded comparisons also handle the case when the target
26411 only provides vec_cmp and vcond_mask.
26413 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
26415 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
26418 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
26420 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
26421 (seq_cost_ignoring_scalar_moves): Likewise.
26422 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
26424 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26426 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
26427 (vcage_f32): Likewise.
26428 (vcages_f32): Likewise.
26429 (vcageq_f32): Likewise.
26430 (vcaged_f64): Likewise.
26431 (vcageq_f64): Likewise.
26432 (vcagts_f32): Likewise.
26433 (vcagt_f32): Likewise.
26434 (vcagt_f64): Likewise.
26435 (vcagtq_f32): Likewise.
26436 (vcagtd_f64): Likewise.
26437 (vcagtq_f64): Likewise.
26438 (vcale_f32): Likewise.
26439 (vcale_f64): Likewise.
26440 (vcaled_f64): Likewise.
26441 (vcales_f32): Likewise.
26442 (vcaleq_f32): Likewise.
26443 (vcaleq_f64): Likewise.
26444 (vcalt_f32): Likewise.
26445 (vcalt_f64): Likewise.
26446 (vcaltd_f64): Likewise.
26447 (vcaltq_f32): Likewise.
26448 (vcaltq_f64): Likewise.
26449 (vcalts_f32): Likewise.
26451 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
26455 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
26456 int to const int or const int to const unsigned int.
26457 (_mm512_mask_srli_epi16): Ditto.
26458 (_mm512_slli_epi16): Ditto.
26459 (_mm512_mask_slli_epi16): Ditto.
26460 (_mm512_maskz_slli_epi16): Ditto.
26461 (_mm512_srai_epi16): Ditto.
26462 (_mm512_mask_srai_epi16): Ditto.
26463 (_mm512_maskz_srai_epi16): Ditto.
26464 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
26465 (_mm512_mask_slli_epi64): Ditto.
26466 (_mm512_maskz_slli_epi64): Ditto.
26467 (_mm512_srli_epi64): Ditto.
26468 (_mm512_mask_srli_epi64): Ditto.
26469 (_mm512_maskz_srli_epi64): Ditto.
26470 (_mm512_srai_epi64): Ditto.
26471 (_mm512_mask_srai_epi64): Ditto.
26472 (_mm512_maskz_srai_epi64): Ditto.
26473 (_mm512_slli_epi32): Ditto.
26474 (_mm512_mask_slli_epi32): Ditto.
26475 (_mm512_maskz_slli_epi32): Ditto.
26476 (_mm512_srli_epi32): Ditto.
26477 (_mm512_mask_srli_epi32): Ditto.
26478 (_mm512_maskz_srli_epi32): Ditto.
26479 (_mm512_srai_epi32): Ditto.
26480 (_mm512_mask_srai_epi32): Ditto.
26481 (_mm512_maskz_srai_epi32): Ditto.
26482 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
26483 (_mm256_maskz_srai_epi16): Ditto.
26484 (_mm_mask_srai_epi16): Ditto.
26485 (_mm_maskz_srai_epi16): Ditto.
26486 (_mm256_mask_slli_epi16): Ditto.
26487 (_mm256_maskz_slli_epi16): Ditto.
26488 (_mm_mask_slli_epi16): Ditto.
26489 (_mm_maskz_slli_epi16): Ditto.
26490 (_mm_maskz_srli_epi16): Ditto.
26491 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
26492 (_mm256_maskz_srli_epi32): Ditto.
26493 (_mm_mask_srli_epi32): Ditto.
26494 (_mm_maskz_srli_epi32): Ditto.
26495 (_mm256_mask_srli_epi64): Ditto.
26496 (_mm256_maskz_srli_epi64): Ditto.
26497 (_mm_mask_srli_epi64): Ditto.
26498 (_mm_maskz_srli_epi64): Ditto.
26499 (_mm256_mask_srai_epi32): Ditto.
26500 (_mm256_maskz_srai_epi32): Ditto.
26501 (_mm_mask_srai_epi32): Ditto.
26502 (_mm_maskz_srai_epi32): Ditto.
26503 (_mm256_srai_epi64): Ditto.
26504 (_mm256_mask_srai_epi64): Ditto.
26505 (_mm256_maskz_srai_epi64): Ditto.
26506 (_mm_srai_epi64): Ditto.
26507 (_mm_mask_srai_epi64): Ditto.
26508 (_mm_maskz_srai_epi64): Ditto.
26509 (_mm_mask_slli_epi32): Ditto.
26510 (_mm_maskz_slli_epi32): Ditto.
26511 (_mm_mask_slli_epi64): Ditto.
26512 (_mm_maskz_slli_epi64): Ditto.
26513 (_mm256_mask_slli_epi32): Ditto.
26514 (_mm256_maskz_slli_epi32): Ditto.
26515 (_mm256_mask_slli_epi64): Ditto.
26516 (_mm256_maskz_slli_epi64): Ditto.
26518 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26520 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
26523 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
26525 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
26526 * data-streamer-out.cc (streamer_write_vrange): Same.
26527 * value-range.h (class vrange): Make streamer_write_vrange a friend.
26529 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
26531 * value-query.cc (range_query::get_tree_range): Set NAN directly
26533 * value-range.cc (frange::set): Assert that bounds are not NAN.
26535 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
26537 * value-range.cc (add_vrange): Handle known NANs.
26539 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
26541 * value-range.h (frange::set_nan): New.
26543 2023-05-25 Alexandre Oliva <oliva@adacore.com>
26546 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
26547 requires stricter alignment than MEM's.
26549 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
26551 PR tree-optimization/107822
26552 PR tree-optimization/107986
26553 * Makefile.in (OBJS): Add gimple-range-phi.o.
26554 * gimple-range-cache.h (ranger_cache::m_estimate): New
26555 phi_analyzer pointer member.
26556 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
26557 phi_analyzer if no loop info is available.
26558 * gimple-range-phi.cc: New file.
26559 * gimple-range-phi.h: New file.
26560 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
26562 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
26564 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
26566 (fold_range): Add range_query parameter.
26567 (fur_relation::fur_relation): New.
26568 (fur_relation::trio): New.
26569 (fur_relation::register_relation): New.
26570 (fold_relations): New.
26571 * gimple-range-fold.h (fold_range): Adjust prototypes.
26572 (fold_relations): New.
26574 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
26576 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
26577 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
26578 (ranger_cache::const_query): New.
26579 * gimple-range.cc (gimple_ranger::const_query): New.
26580 * gimple-range.h (gimple_ranger::const_query): New prototype.
26582 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
26584 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
26585 (ssa_cache::dump_range_query): Delete.
26586 (ssa_lazy_cache::dump_range_query): Delete.
26587 (ssa_lazy_cache::get_range): Move from header file.
26588 (ssa_lazy_cache::clear_range): ditto.
26589 (ssa_lazy_cache::clear): Ditto.
26590 * gimple-range-cache.h (class ssa_cache): Virtualize.
26591 (class ssa_lazy_cache): Inherit and virtualize.
26593 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
26595 * value-range.h (vrange::kind): Remove.
26597 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
26599 PR middle-end/109840
26600 * match.pd <popcount optimizations>: Preserve zero-extension when
26601 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
26602 popcount((T)x), so the popcount's argument keeps the same type.
26603 <parity optimizations>: Likewise preserve extensions when
26604 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
26605 parity((T)x), so that the parity's argument type is the same.
26607 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
26609 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
26610 (ipcp_store_vr_results): Same.
26611 * ipa-prop.cc (ipa_vr::ipa_vr): New.
26612 (ipa_vr::get_vrange): New.
26613 (ipa_vr::set_unknown): New.
26614 (ipa_vr::streamer_read): New.
26615 (ipa_vr::streamer_write): New.
26616 (write_ipcp_transformation_info): Use new ipa_vr API.
26617 (read_ipcp_transformation_info): Same.
26618 (ipa_vr::nonzero_p): Delete.
26619 (ipcp_update_vr): Use new ipa_vr API.
26620 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
26621 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
26623 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
26625 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
26626 silence overflow warnings later on.
26628 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
26630 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
26631 Remove handling of V8QImode.
26632 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
26633 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
26634 (v<insn>v4qi3): Ditto.
26635 * config/i386/sse.md (v<insn>v8qi3): Remove.
26637 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26640 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
26641 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
26642 (aarch64_simd_ashr<mode>): Rename to...
26643 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
26644 (aarch64_simd_imm_shl<mode>): Rename to...
26645 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
26646 (aarch64_simd_reg_sshl<mode>): Rename to...
26647 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
26648 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
26649 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
26650 (aarch64_simd_reg_shl<mode>_signed): Rename to...
26651 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
26652 (vec_shr_<mode>): Rename to...
26653 (vec_shr_<mode><vczle><vczbe>): ... This.
26654 (aarch64_<sur>shl<mode>): Rename to...
26655 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
26656 (aarch64_<sur>q<r>shl<mode>): Rename to...
26657 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
26659 2023-05-24 Richard Biener <rguenther@suse.de>
26662 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
26663 Perform final vector composition using
26664 ix86_expand_vector_init_general instead of setting
26665 the highpart and lowpart which causes spilling.
26667 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
26669 PR tree-optimization/109695
26670 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
26672 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
26673 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
26674 flag to set_global_range.
26675 (gimple_ranger::prefill_stmt_dependencies): Ditto.
26677 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
26679 PR tree-optimization/109695
26680 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
26682 (temporal_cache::current_p): Check always_current method.
26683 (temporal_cache::set_always_current): Add param and set value
26685 (temporal_cache::always_current_p): New.
26686 (ranger_cache::get_global_range): Adjust.
26687 (ranger_cache::set_global_range): set always current first.
26689 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
26691 PR tree-optimization/109695
26692 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
26693 fold_range with global query to choose an initial value.
26695 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26697 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
26700 2023-05-24 Richard Biener <rguenther@suse.de>
26702 PR tree-optimization/109849
26703 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
26704 expressions but take the first sets.
26706 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
26709 * doc/gm2.texi (High procedure function): New node.
26710 (Using): New menu entry for High procedure function.
26712 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
26714 PR rtl-optimization/109940
26715 * early-remat.cc (postorder_index): Rename to...
26716 (rpo_index): ...this.
26717 (compare_candidates): Sort by decreasing rpo_index rather than
26718 increasing postorder_index.
26719 (early_remat::sort_candidates): Calculate the forward RPO from
26721 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
26722 rather than DF_BACKWARD in reverse.
26724 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26727 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
26728 qualifier_none for the return operand.
26730 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26732 * config/riscv/autovec.md (<optab><mode>3): New pattern.
26733 (one_cmpl<mode>2): Ditto.
26734 (*<optab>not<mode>): Ditto.
26735 (*n<optab><mode>): Ditto.
26736 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
26739 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
26741 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
26742 calculation on n_perms by considering nvectors_per_build.
26744 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26745 Richard Sandiford <richard.sandiford@arm.com>
26747 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
26748 (vec_cmp<mode><vm>): New pattern.
26749 (vec_cmpu<mode><vm>): New pattern.
26750 (vcond<V:mode><VI:mode>): New pattern.
26751 (vcondu<V:mode><VI:mode>): New pattern.
26752 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
26753 (emit_vlmax_merge_insn): New function.
26754 (emit_vlmax_cmp_insn): Ditto.
26755 (emit_vlmax_cmp_mu_insn): Ditto.
26756 (expand_vec_cmp): Ditto.
26757 (expand_vec_cmp_float): Ditto.
26758 (expand_vcond): Ditto.
26759 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
26760 (emit_vlmax_cmp_insn): Ditto.
26761 (emit_vlmax_cmp_mu_insn): Ditto.
26762 (get_cmp_insn_code): Ditto.
26763 (expand_vec_cmp): Ditto.
26764 (expand_vec_cmp_float): Ditto.
26765 (expand_vcond): Ditto.
26767 2023-05-24 Pan Li <pan2.li@intel.com>
26769 * config/riscv/genrvv-type-indexer.cc (main): Add
26770 unsigned_eew*_lmul1_interpret for indexer.
26771 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
26772 Register vuint*m1_t interpret function.
26773 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
26774 New macro for vuint8m1_t.
26775 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
26776 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
26777 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
26778 (vbool1_t): Add to unsigned_eew*_interpret_ops.
26779 (vbool2_t): Likewise.
26780 (vbool4_t): Likewise.
26781 (vbool8_t): Likewise.
26782 (vbool16_t): Likewise.
26783 (vbool32_t): Likewise.
26784 (vbool64_t): Likewise.
26785 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
26786 New macro for vuint*m1_t.
26787 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
26788 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
26789 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
26790 (required_extensions_p): Add vuint*m1_t interpret case.
26791 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
26792 Add vuint*m1_t interpret to base type.
26793 (unsigned_eew16_lmul1_interpret): Likewise.
26794 (unsigned_eew32_lmul1_interpret): Likewise.
26795 (unsigned_eew64_lmul1_interpret): Likewise.
26797 2023-05-24 Pan Li <pan2.li@intel.com>
26799 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
26800 for the eew size list.
26801 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
26802 (main): Add signed_eew*_lmul1_interpret for indexer.
26803 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
26804 Register vint*m1_t interpret function.
26805 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
26806 New macro for vint8m1_t.
26807 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
26808 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
26809 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
26810 (vbool1_t): Add to signed_eew*_interpret_ops.
26811 (vbool2_t): Likewise.
26812 (vbool4_t): Likewise.
26813 (vbool8_t): Likewise.
26814 (vbool16_t): Likewise.
26815 (vbool32_t): Likewise.
26816 (vbool64_t): Likewise.
26817 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
26818 New macro for vint*m1_t.
26819 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
26820 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
26821 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
26822 (required_extensions_p): Add vint8m1_t interpret case.
26823 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
26824 Add vint*m1_t interpret to base type.
26825 (signed_eew16_lmul1_interpret): Likewise.
26826 (signed_eew32_lmul1_interpret): Likewise.
26827 (signed_eew64_lmul1_interpret): Likewise.
26829 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26831 * config/riscv/autovec.md: Adjust for new interface.
26832 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
26833 (emit_nonvlmax_insn): Add AVL operand.
26834 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
26835 (emit_nonvlmax_insn): Add AVL operand.
26836 (sew64_scalar_helper): Adjust for new interface.
26837 (expand_tuple_move): Ditto.
26838 * config/riscv/vector.md: Ditto.
26840 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26842 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
26843 (expand_const_vector): Ditto.
26844 (legitimize_move): Ditto.
26845 (sew64_scalar_helper): Ditto.
26846 (expand_tuple_move): Ditto.
26847 (expand_vector_init_insert_elems): Ditto.
26848 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
26850 2023-05-24 liuhongt <hongtao.liu@intel.com>
26853 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
26854 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
26855 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
26856 (ix86_masked_all_ones): Handle 64-bit mask.
26857 * config/i386/i386-builtin.def: Replace icode of related
26858 non-mask simd abs builtins with CODE_FOR_nothing.
26860 2023-05-23 Martin Uecker <uecker@tugraz.at>
26863 * function.cc (gimplify_parm_type): Remove function.
26864 (gimplify_parameters): Call gimplify_type_sizes.
26866 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26868 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
26869 and change to also accept '*subx' pattern.
26872 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26874 * config/xtensa/predicates.md (addsub_operator): New.
26875 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
26876 *extzvsi-1bit_addsubx): New insn_and_split patterns.
26877 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
26878 Add a special case about ifcvt 'noce_try_cmove()' to handle
26879 constant loads that do not fit into signed 12 bits in the
26880 patterns added above.
26882 2023-05-23 Richard Biener <rguenther@suse.de>
26884 PR tree-optimization/109747
26885 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
26886 the SLP node only once to the cost hook.
26888 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
26890 * config/avr/avr.cc (avr_insn_cost): New static function.
26891 (TARGET_INSN_COST): Define to that function.
26893 2023-05-23 Richard Biener <rguenther@suse.de>
26896 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
26897 For vector construction or splats apply GPR->XMM move
26898 costing. QImode memory can be handled directly only
26899 with SSE4.1 pinsrb.
26901 2023-05-23 Richard Biener <rguenther@suse.de>
26903 PR tree-optimization/108752
26904 * tree-vect-stmts.cc (vectorizable_operation): For bit
26905 operations with generic word_mode vectors do not cost
26906 an extra stmt. For plus, minus and negate also cost the
26907 constant materialization.
26909 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
26911 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
26912 Call ix86_expand_vec_shift_qihi_constant for shifts
26913 with constant count operand.
26914 * config/i386/i386.cc (ix86_shift_rotate_cost):
26915 Handle V4QImode and V8QImode.
26916 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
26917 (<insn>v4qi3): Ditto.
26919 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26921 * config/riscv/vector.md: Add mode.
26923 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
26925 PR tree-optimization/109934
26926 * value-range.cc (irange::invert): Remove buggy special case.
26928 2023-05-23 Richard Biener <rguenther@suse.de>
26930 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
26933 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
26936 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
26937 subregs between any scalars that are 64 bits or smaller.
26938 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
26939 (bits_etype): New int attribute.
26940 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
26941 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
26942 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
26944 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
26946 * doc/md.texi: Document that <FOO> can be used to refer to the
26947 numerical value of an int iterator FOO. Tweak other parts of
26948 the int iterator documentation.
26949 * read-rtl.cc (iterator_group::has_self_attr): New field.
26950 (map_attr_string): When has_self_attr is true, make <FOO>
26951 expand to the current value of iterator FOO.
26952 (initialize_iterators): Set has_self_attr for int iterators.
26954 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26956 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
26957 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
26958 (RVV_UNOP_NUM): New macro.
26959 (RVV_BINOP_NUM): Ditto.
26960 (legitimize_move): Refactor the framework of RVV auto-vectorization.
26961 (emit_vlmax_op): Ditto.
26962 (emit_vlmax_reg_op): Ditto.
26963 (emit_len_op): Ditto.
26964 (emit_len_binop): Ditto.
26965 (emit_vlmax_tany_many): Ditto.
26966 (emit_nonvlmax_tany_many): Ditto.
26967 (sew64_scalar_helper): Ditto.
26968 (expand_tuple_move): Ditto.
26969 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
26970 (emit_pred_binop): Ditto.
26971 (emit_vlmax_op): Ditto.
26972 (emit_vlmax_tany_many): New function.
26973 (emit_len_op): Remove.
26974 (emit_nonvlmax_tany_many): New function.
26975 (emit_vlmax_reg_op): Remove.
26976 (emit_len_binop): Ditto.
26977 (emit_index_op): Ditto.
26978 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
26979 (expand_const_vector): Ditto.
26980 (legitimize_move): Ditto.
26981 (sew64_scalar_helper): Ditto.
26982 (expand_tuple_move): Ditto.
26983 (expand_vector_init_insert_elems): Ditto.
26984 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
26985 * config/riscv/vector.md: Ditto.
26987 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26990 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
26991 and constraint for operand 0.
26992 (add_vec_concat_subst_be): Likewise.
26994 2023-05-23 Richard Biener <rguenther@suse.de>
26996 PR tree-optimization/109849
26997 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
26998 and use that to determine what to hoist.
27000 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
27002 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
27003 specific treatment for bit-fields only if they have an integral type
27004 and filter out non-integral bit-fields that do not start and end on
27007 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
27009 PR tree-optimization/109920
27010 * value-range.h (RESIZABLE>::~int_range): Use delete[].
27012 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
27014 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
27015 calcuation of integer vector mode costs to reflect generated
27016 instruction sequences of different integer vector modes and
27017 different target ABIs. Remove "speed" function argument.
27018 (ix86_rtx_costs): Update call for removed function argument.
27019 (ix86_vector_costs::add_stmt_cost): Ditto.
27021 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
27023 * value-range.h (class Value_Range): Implement set_zero,
27024 set_nonzero, and nonzero_p.
27026 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
27028 * config/i386/i386.cc (ix86_multiplication_cost): Add
27029 the cost of a memory read to the cost of V?QImode sequences.
27031 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27033 * config/riscv/riscv-v.cc: Add "m_" prefix.
27035 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27037 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
27038 multiple-rgroup of length.
27039 * tree-vect-stmts.cc (vectorizable_store): Ditto.
27040 (vectorizable_load): Ditto.
27041 * tree-vectorizer.h (vect_get_loop_len): Ditto.
27043 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27045 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
27048 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
27050 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
27051 handling for the case index == count.
27053 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
27056 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
27057 Don't fold to XOR / AND / XOR if just one bit is copied to the
27060 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
27062 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
27063 builtin for bit reversal using brev instruction.
27064 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
27065 NVPTX_BUILTIN_BREVLL.
27066 (nvptx_init_builtins): Define "brev" and "brevll".
27067 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
27068 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
27069 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
27070 section, document __builtin_nvptx_brev{,ll}.
27072 2023-05-21 Jakub Jelinek <jakub@redhat.com>
27074 PR tree-optimization/109505
27075 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
27076 Combine successive equal operations with constants,
27077 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
27078 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
27081 2023-05-21 Andrew Pinski <apinski@marvell.com>
27083 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
27085 2023-05-21 Pan Li <pan2.li@intel.com>
27087 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
27088 rest bool size, aka 2, 4, 8, 16, 32, 64.
27089 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
27090 Register vbool[2|4|8|16|32|64] interpret function.
27091 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
27092 New macro for vbool2_t.
27093 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
27094 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
27095 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
27096 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
27097 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
27098 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
27099 (vint16m1_t): Likewise.
27100 (vint32m1_t): Likewise.
27101 (vint64m1_t): Likewise.
27102 (vuint8m1_t): Likewise.
27103 (vuint16m1_t): Likewise.
27104 (vuint32m1_t): Likewise.
27105 (vuint64m1_t): Likewise.
27106 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
27107 New macro for vbool2_t.
27108 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
27109 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
27110 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
27111 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
27112 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
27113 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
27114 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
27115 vbool2_t interprect to base type.
27116 (bool4_interpret): Likewise.
27117 (bool8_interpret): Likewise.
27118 (bool16_interpret): Likewise.
27119 (bool32_interpret): Likewise.
27120 (bool64_interpret): Likewise.
27122 2023-05-21 Andrew Pinski <apinski@marvell.com>
27124 PR middle-end/109919
27125 * expr.cc (expand_single_bit_test): Don't use the
27126 target for expand_expr.
27128 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
27130 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
27133 2023-05-20 Pan Li <pan2.li@intel.com>
27135 * mode-switching.cc (entity_map): Initialize the array to zero.
27138 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
27141 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
27142 Remove superfluous "parallel" in insn pattern.
27143 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
27144 printing error text to assembly.
27146 2023-05-20 Andrew Pinski <apinski@marvell.com>
27148 * expr.cc (fold_single_bit_test): Rename to ...
27149 (expand_single_bit_test): This and expand directly.
27150 (do_store_flag): Update for the rename function.
27152 2023-05-20 Andrew Pinski <apinski@marvell.com>
27154 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
27155 instead of shift/and.
27157 2023-05-20 Andrew Pinski <apinski@marvell.com>
27159 * expr.cc (fold_single_bit_test): Add an assert
27160 and simplify based on code being NE_EXPR or EQ_EXPR.
27162 2023-05-20 Andrew Pinski <apinski@marvell.com>
27164 * expr.cc (fold_single_bit_test): Take inner and bitnum
27165 instead of arg0 and arg1. Update the code.
27166 (do_store_flag): Don't create a tree when calling
27167 fold_single_bit_test instead just call it with the bitnum
27168 and the inner tree.
27170 2023-05-20 Andrew Pinski <apinski@marvell.com>
27172 * expr.cc (fold_single_bit_test): Use get_def_for_expr
27173 instead of checking the inner's code.
27175 2023-05-20 Andrew Pinski <apinski@marvell.com>
27177 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
27178 (fold_single_bit_test): This and simplify.
27180 2023-05-20 Andrew Pinski <apinski@marvell.com>
27182 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
27184 (fold_single_bit_test): Likewise.
27185 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
27186 (fold_single_bit_test): Likewise and make static.
27187 * fold-const.h (fold_single_bit_test): Remove declaration.
27189 2023-05-20 Die Li <lidie@eswincomputing.com>
27191 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
27194 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
27196 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
27198 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
27201 * config/riscv/bitmanip.md
27202 (<bitmanip_optab>disi2): Match with any_extend.
27203 (<bitmanip_optab>disi2_sext): New pattern to match
27204 with sign extend using an ANDI instruction.
27206 2023-05-19 Nathan Sidwell <nathan@acm.org>
27209 * opts.h (handle_deferred_dump_options): Declare.
27210 * opts-global.cc (handle_common_deferred_options): Do not handle
27212 (handle_deferred_dump_options): New.
27213 * toplev.cc (toplev::main): Call it after plugin init.
27215 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
27217 * config/riscv/constraints.md (DsS, DsD): Restore agreement
27218 with shiftm1 mode attribute.
27220 2023-05-19 Andrew Pinski <apinski@marvell.com>
27223 * gcc.cc (default_compilers["@c-header"]): Add %w
27224 after the --output-pch.
27226 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
27228 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
27229 to hival, ASHIFT the corresponding regs.
27231 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
27233 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
27235 2023-05-19 Jakub Jelinek <jakub@redhat.com>
27237 PR tree-optimization/105776
27238 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
27239 non-NULL, allow division statement to have a cast as single imm use
27240 rather than comparison/condition.
27241 (match_arith_overflow): In that case remove the cast stmt in addition
27242 to the division statement.
27244 2023-05-19 Jakub Jelinek <jakub@redhat.com>
27246 PR tree-optimization/101856
27247 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
27248 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
27249 support it but umul_highpart_optab does.
27251 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
27253 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
27254 of tree_to_shwi on array indices. Minor tweaks.
27256 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
27258 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
27259 * attribs.cc (diag_attr_exclusions): Ditto.
27260 (decl_attributes): Ditto.
27261 (build_type_attribute_qual_variant): Ditto.
27262 * builtins.cc (fold_builtin_carg): Ditto.
27263 (fold_builtin_next_arg): Ditto.
27264 (do_mpc_arg2): Ditto.
27265 * cfgexpand.cc (expand_return): Ditto.
27266 * cgraph.h (decl_in_symtab_p): Ditto.
27267 (symtab_node::get_create): Ditto.
27268 * dwarf2out.cc (base_type_die): Ditto.
27269 (implicit_ptr_descriptor): Ditto.
27270 (gen_array_type_die): Ditto.
27271 (gen_type_die_with_usage): Ditto.
27272 (optimize_location_into_implicit_ptr): Ditto.
27273 * expr.cc (do_store_flag): Ditto.
27274 * fold-const.cc (negate_expr_p): Ditto.
27275 (fold_negate_expr_1): Ditto.
27276 (fold_convert_const): Ditto.
27277 (fold_convert_loc): Ditto.
27278 (constant_boolean_node): Ditto.
27279 (fold_binary_op_with_conditional_arg): Ditto.
27280 (build_fold_addr_expr_with_type_loc): Ditto.
27281 (fold_comparison): Ditto.
27282 (fold_checksum_tree): Ditto.
27283 (tree_unary_nonnegative_warnv_p): Ditto.
27284 (integer_valued_real_unary_p): Ditto.
27285 (fold_read_from_constant_string): Ditto.
27286 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
27287 * gimple-expr.cc (useless_type_conversion_p): Ditto.
27288 (is_gimple_reg): Ditto.
27289 (is_gimple_asm_val): Ditto.
27290 (mark_addressable): Ditto.
27291 * gimple-expr.h (is_gimple_variable): Ditto.
27292 (virtual_operand_p): Ditto.
27293 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
27294 * gimplify.cc (gimplify_bind_expr): Ditto.
27295 (gimplify_return_expr): Ditto.
27296 (gimple_add_padding_init_for_auto_var): Ditto.
27297 (gimplify_addr_expr): Ditto.
27298 (omp_add_variable): Ditto.
27299 (omp_notice_variable): Ditto.
27300 (omp_get_base_pointer): Ditto.
27301 (omp_strip_components_and_deref): Ditto.
27302 (omp_strip_indirections): Ditto.
27303 (omp_accumulate_sibling_list): Ditto.
27304 (omp_build_struct_sibling_lists): Ditto.
27305 (gimplify_adjust_omp_clauses_1): Ditto.
27306 (gimplify_adjust_omp_clauses): Ditto.
27307 (gimplify_omp_for): Ditto.
27308 (goa_lhs_expr_p): Ditto.
27309 (gimplify_one_sizepos): Ditto.
27310 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
27311 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
27312 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
27313 (propagate_controlled_uses): Ditto.
27314 * ipa-sra.cc (type_prevails_p): Ditto.
27315 (scan_expr_access): Ditto.
27316 * optabs-tree.cc (optab_for_tree_code): Ditto.
27317 * toplev.cc (wrapup_global_declaration_1): Ditto.
27318 * trans-mem.cc (transaction_invariant_address_p): Ditto.
27319 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
27320 (verify_gimple_comparison): Ditto.
27321 (verify_gimple_assign_binary): Ditto.
27322 (verify_gimple_assign_single): Ditto.
27323 * tree-complex.cc (get_component_ssa_name): Ditto.
27324 * tree-emutls.cc (lower_emutls_2): Ditto.
27325 * tree-inline.cc (copy_tree_body_r): Ditto.
27326 (estimate_move_cost): Ditto.
27327 (copy_decl_for_dup_finish): Ditto.
27328 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
27329 (note_nonlocal_vla_type): Ditto.
27330 (convert_local_omp_clauses): Ditto.
27331 (remap_vla_decls): Ditto.
27332 (fixup_vla_decls): Ditto.
27333 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
27334 * tree-pretty-print.cc (print_declaration): Ditto.
27335 (print_call_name): Ditto.
27336 * tree-sra.cc (compare_access_positions): Ditto.
27337 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
27338 * tree-ssa-ccp.cc (get_default_value): Ditto.
27339 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
27340 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
27341 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
27342 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
27343 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
27344 * tree-ssa-sink.cc (statement_sink_location): Ditto.
27345 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
27346 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
27347 * tree-ssa-uninit.cc (warn_uninit): Ditto.
27348 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
27349 (non_rewritable_mem_ref_base): Ditto.
27350 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
27351 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
27352 * tree-vect-generic.cc (do_binop): Ditto.
27354 * tree-vect-stmts.cc (vect_init_vector): Ditto.
27355 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
27356 * tree.cc (sign_mask_for): Ditto.
27357 (verify_type_variant): Ditto.
27358 (gimple_canonical_types_compatible_p): Ditto.
27359 (verify_type): Ditto.
27360 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
27361 * var-tracking.cc (prepare_call_arguments): Ditto.
27362 (vt_add_function_parameters): Ditto.
27363 * varasm.cc (decode_addr_const): Ditto.
27365 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
27367 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
27368 (lower_reduction_clauses): Ditto.
27369 (lower_send_clauses): Ditto.
27370 (lower_omp_task_reductions): Ditto.
27371 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
27372 (worker_single_copy): Ditto.
27373 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
27374 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
27376 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
27378 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
27380 (lto_read_body_or_constructor): Ditto.
27381 * lto-streamer-out.cc (tree_is_indexable): Ditto.
27382 (lto_output_var_decl_ref): Ditto.
27383 (DFS::DFS_write_tree_body): Ditto.
27384 (wrap_refs): Ditto.
27385 (write_symbol_extension_info): Ditto.
27387 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
27389 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
27390 defines from tree.h.
27391 (aarch64_mangle_type): Ditto.
27392 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
27393 (alpha_gimplify_va_arg_1): Ditto.
27394 * config/arc/arc.cc (arc_encode_section_info): Ditto.
27395 (arc_is_aux_reg_p): Ditto.
27396 (arc_is_uncached_mem_p): Ditto.
27397 (arc_handle_aux_attribute): Ditto.
27398 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
27399 (arm_handle_cmse_nonsecure_call): Ditto.
27400 (arm_set_default_type_attributes): Ditto.
27401 (arm_is_segment_info_known): Ditto.
27402 (arm_mangle_type): Ditto.
27403 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
27404 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
27405 (avr_decl_absdata_p): Ditto.
27406 (avr_insert_attributes): Ditto.
27407 (avr_section_type_flags): Ditto.
27408 (avr_encode_section_info): Ditto.
27409 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
27410 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
27411 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
27412 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
27413 (csky_mangle_type): Ditto.
27414 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
27415 * config/darwin.cc (is_objc_metadata): Ditto.
27416 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
27417 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
27418 * config/frv/frv.cc (frv_emit_movsi): Ditto.
27419 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
27420 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
27421 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
27422 * config/i386/i386-expand.cc: Ditto.
27423 * config/i386/i386.cc (type_natural_mode): Ditto.
27424 (ix86_function_arg): Ditto.
27425 (ix86_data_alignment): Ditto.
27426 (ix86_local_alignment): Ditto.
27427 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
27428 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
27429 (i386_pe_type_dllexport_p): Ditto.
27430 (i386_pe_adjust_class_at_definition): Ditto.
27431 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
27432 (i386_pe_binds_local_p): Ditto.
27433 (i386_pe_section_type_flags): Ditto.
27434 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
27435 (ia64_gimplify_va_arg): Ditto.
27436 (ia64_in_small_data_p): Ditto.
27437 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
27438 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
27439 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
27440 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
27441 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
27442 (mcore_encode_section_info): Ditto.
27443 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
27444 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
27445 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
27446 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
27447 (pass_in_memory): Ditto.
27448 (nvptx_generate_vector_shuffle): Ditto.
27449 (nvptx_lockless_update): Ditto.
27450 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
27451 (pa_function_value): Ditto.
27452 (pa_function_arg): Ditto.
27453 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
27454 (TEXT_SPACE_P): Ditto.
27455 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
27456 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
27457 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
27458 (riscv_mangle_type): Ditto.
27459 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
27460 (rl78_addsi3_internal): Ditto.
27461 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
27462 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
27463 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
27464 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
27465 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
27466 (rs6000_function_arg_advance_1): Ditto.
27467 (rs6000_function_arg): Ditto.
27468 (rs6000_pass_by_reference): Ditto.
27469 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
27470 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
27471 (rs6000_set_default_type_attributes): Ditto.
27472 (rs6000_elf_in_small_data_p): Ditto.
27473 (IN_NAMED_SECTION): Ditto.
27474 (rs6000_xcoff_encode_section_info): Ditto.
27475 (rs6000_function_value): Ditto.
27476 (invalid_arg_for_unprototyped_fn): Ditto.
27477 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
27478 (s390_vec_n_elem): Ditto.
27479 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
27480 (s390_function_arg_integer): Ditto.
27481 (s390_return_in_memory): Ditto.
27482 (s390_encode_section_info): Ditto.
27483 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
27484 (sh_function_value): Ditto.
27485 * config/sol2.cc (solaris_insert_attributes): Ditto.
27486 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
27487 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
27488 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
27489 (xstormy16_handle_below100_attribute): Ditto.
27490 * config/v850/v850.cc (v850_encode_section_info): Ditto.
27491 (v850_insert_attributes): Ditto.
27492 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
27493 (visium_return_in_memory): Ditto.
27494 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
27496 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
27498 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
27499 (ix86_expand_vecop_qihi): Add op2vec bool variable.
27500 Do not set REG_EQUAL note.
27501 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
27503 * config/i386/i386.cc (ix86_multiplication_cost): Handle
27504 V4QImode and V8QImode.
27505 * config/i386/mmx.md (mulv8qi3): New expander.
27507 * config/i386/sse.md (mulv8qi3): Remove.
27509 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
27511 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
27513 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
27515 PR bootstrap/105831
27516 * config.gcc: Use = operator instead of ==.
27518 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
27520 PR bootstrap/105831
27521 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
27522 * configure.ac: Likewise.
27523 * configure: Regenerate.
27525 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
27527 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
27528 (__ARM_mve_coerce1): Remove.
27529 (__ARM_mve_coerce2): Remove.
27530 (__ARM_mve_coerce3): Remove.
27531 (__ARM_mve_coerce_i_scalar): New.
27532 (__ARM_mve_coerce_s8_ptr): New.
27533 (__ARM_mve_coerce_u8_ptr): New.
27534 (__ARM_mve_coerce_s16_ptr): New.
27535 (__ARM_mve_coerce_u16_ptr): New.
27536 (__ARM_mve_coerce_s32_ptr): New.
27537 (__ARM_mve_coerce_u32_ptr): New.
27538 (__ARM_mve_coerce_s64_ptr): New.
27539 (__ARM_mve_coerce_u64_ptr): New.
27540 (__ARM_mve_coerce_f_scalar): New.
27541 (__ARM_mve_coerce_f16_ptr): New.
27542 (__ARM_mve_coerce_f32_ptr): New.
27543 (__arm_vst4q): Change _coerce_ overloads.
27544 (__arm_vbicq): Change _coerce_ overloads.
27545 (__arm_vld1q): Change _coerce_ overloads.
27546 (__arm_vld1q_z): Change _coerce_ overloads.
27547 (__arm_vld2q): Change _coerce_ overloads.
27548 (__arm_vld4q): Change _coerce_ overloads.
27549 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
27550 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
27551 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
27552 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
27553 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
27554 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
27555 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
27556 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
27557 (__arm_vst1q_p): Change _coerce_ overloads.
27558 (__arm_vst2q): Change _coerce_ overloads.
27559 (__arm_vst1q): Change _coerce_ overloads.
27560 (__arm_vstrhq): Change _coerce_ overloads.
27561 (__arm_vstrhq_p): Change _coerce_ overloads.
27562 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
27563 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
27564 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
27565 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
27566 (__arm_vstrwq_p): Change _coerce_ overloads.
27567 (__arm_vstrwq): Change _coerce_ overloads.
27568 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
27569 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
27570 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
27571 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
27572 (__arm_vsetq_lane): Change _coerce_ overloads.
27573 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
27574 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
27575 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
27576 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
27577 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
27578 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
27579 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
27580 (__arm_vidupq_x_u8): Change _coerce_ overloads.
27581 (__arm_vddupq_x_u8): Change _coerce_ overloads.
27582 (__arm_vidupq_x_u16): Change _coerce_ overloads.
27583 (__arm_vddupq_x_u16): Change _coerce_ overloads.
27584 (__arm_vidupq_x_u32): Change _coerce_ overloads.
27585 (__arm_vddupq_x_u32): Change _coerce_ overloads.
27586 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
27587 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
27588 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
27589 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
27590 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
27591 (__arm_vidupq_u16): Change _coerce_ overloads.
27592 (__arm_vidupq_u32): Change _coerce_ overloads.
27593 (__arm_vidupq_u8): Change _coerce_ overloads.
27594 (__arm_vddupq_u16): Change _coerce_ overloads.
27595 (__arm_vddupq_u32): Change _coerce_ overloads.
27596 (__arm_vddupq_u8): Change _coerce_ overloads.
27597 (__arm_viwdupq_m): Change _coerce_ overloads.
27598 (__arm_viwdupq_u16): Change _coerce_ overloads.
27599 (__arm_viwdupq_u32): Change _coerce_ overloads.
27600 (__arm_viwdupq_u8): Change _coerce_ overloads.
27601 (__arm_vdwdupq_m): Change _coerce_ overloads.
27602 (__arm_vdwdupq_u16): Change _coerce_ overloads.
27603 (__arm_vdwdupq_u32): Change _coerce_ overloads.
27604 (__arm_vdwdupq_u8): Change _coerce_ overloads.
27605 (__arm_vstrbq): Change _coerce_ overloads.
27606 (__arm_vstrbq_p): Change _coerce_ overloads.
27607 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
27608 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
27609 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
27610 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
27611 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
27613 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
27615 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
27618 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
27620 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
27621 (__arm_vadcq_u32): Likewise.
27622 (__arm_vadcq_m_s32): Likewise.
27623 (__arm_vadcq_m_u32): Likewise.
27624 (__arm_vsbcq_s32): Likewise.
27625 (__arm_vsbcq_u32): Likewise.
27626 (__arm_vsbcq_m_s32): Likewise.
27627 (__arm_vsbcq_m_u32): Likewise.
27628 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
27630 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
27632 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
27633 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
27634 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
27635 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
27636 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
27637 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
27638 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
27639 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
27640 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
27641 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
27642 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
27643 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
27644 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
27645 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
27646 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
27647 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
27648 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
27649 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
27650 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
27651 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
27652 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
27653 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
27654 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
27655 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
27656 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
27657 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
27658 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
27659 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
27660 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
27661 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
27662 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
27663 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
27664 (mve_vorrq_m_f<mode>)
27665 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
27666 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
27667 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
27668 capitalization in the emitted asm.
27670 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
27672 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
27674 (Ri): Move constraint definition from predicates.md.
27675 (Rl): Define new constraint.
27676 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
27677 missing constraint.
27678 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
27679 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
27680 op 2. Fix asm output spacing.
27681 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
27682 * config/arm/predicates.md (Ri) Move constraint to constraints.md
27683 (mve_vldrd_immediate): Move it from
27685 (mve_vstrw_immediate): New predicate.
27687 2023-05-18 Pan Li <pan2.li@intel.com>
27688 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27689 Kito Cheng <kito.cheng@sifive.com>
27690 Richard Biener <rguenther@suse.de>
27691 Richard Sandiford <richard.sandiford@arm.com>
27693 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
27694 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
27695 (struct table_elt): Extend machine_mode to 16 bits.
27696 (struct set): Ditto.
27697 * genmodes.cc (emit_mode_wider): Extend type from char to short.
27698 (emit_mode_complex): Ditto.
27699 (emit_mode_inner): Ditto.
27700 (emit_class_narrowest_mode): Ditto.
27701 * genopinit.cc (main): Extend the machine_mode limit.
27702 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
27703 re-ordered the struct fields for padding.
27704 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
27705 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
27706 (get_mode_alignment): Extend type from char to short.
27707 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
27708 removed the ATTRIBUTE_PACKED.
27709 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
27710 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
27711 m_kind to 2 bits and remove m_spare.
27712 * rtl.h (RTX_CODE_BITSIZE): New macro.
27713 (struct rtx_def): Swap both the bit size and location between the
27714 rtx_code and the machine_mode.
27715 (subreg_shape::unique_id): Extend the machine_mode limit.
27716 * rtlanal.h: Extend machine_mode to 16 bits.
27717 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
27718 bits and re-ordered the struct fields for padding.
27719 (struct tree_decl_common): Extend machine_mode to 16 bits.
27721 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
27723 * genrecog.cc (print_nonbool_test): Fix type error of
27724 switch (SUBREG_BYTE (op))'.
27726 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
27728 * common/config/riscv/riscv-common.cc: Remove
27729 trailing spaces on lines.
27730 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
27731 * config/riscv/riscv.h (enum reg_class): Likewise.
27732 * config/riscv/riscv.md: Likewise.
27734 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
27736 * config/pa/pa.md (clear_cache): New.
27738 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
27740 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
27741 parenthesis. Fix misnamed index entry.
27742 <concept>: Fix misnamed index entry.
27744 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
27746 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
27748 (*<optab>si3_mask, *<optab>di3_mask): Here.
27749 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
27750 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
27752 (*<bitmanip_optab>si3_sext_mask): Likewise.
27753 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
27754 and const_di_mask_operand.
27755 (bitmanip_rotate): New iterator.
27756 (bitmanip_optab): Add rotates.
27757 * config/riscv/predicates.md (const_si_mask_operand): Renamed
27758 from const31_operand. Generalize to handle more mask constants.
27759 (const_di_mask_operand): Similarly.
27761 2023-05-17 Jakub Jelinek <jakub@redhat.com>
27764 * config/i386/i386-builtin-types.def (FLOAT128): Use
27765 float128t_type_node rather than float128_type_node.
27767 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
27769 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
27770 FP_CONTRACT_FAST (no functional change).
27772 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
27774 * config/i386/i386.cc (ix86_multiplication_cost): Correct
27775 calcuation of integer vector mode costs to reflect generated
27776 instruction sequences of different integer vector modes and
27777 different target ABIs.
27779 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27781 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
27782 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
27783 (riscv_mode_needed): Ditto.
27784 (riscv_mode_after): Ditto.
27785 (riscv_mode_entry): Ditto.
27786 (riscv_mode_exit): Ditto.
27787 (riscv_mode_priority): Ditto.
27788 (TARGET_MODE_EMIT): New target hook.
27789 (TARGET_MODE_NEEDED): Ditto.
27790 (TARGET_MODE_AFTER): Ditto.
27791 (TARGET_MODE_ENTRY): Ditto.
27792 (TARGET_MODE_EXIT): Ditto.
27793 (TARGET_MODE_PRIORITY): Ditto.
27794 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
27795 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
27796 * config/riscv/riscv.md: Add csrwvxrm.
27797 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
27798 (vxrmsi): New pattern.
27800 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27802 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
27803 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
27804 (struct narrow_alu_def): Ditto.
27805 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
27806 (function_expander::use_exact_insn): Ditto.
27807 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
27808 (function_base::has_rounding_mode_operand_p): New function.
27810 2023-05-17 Andrew Pinski <apinski@marvell.com>
27812 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
27813 against 0 instead of calling integer_zerop.
27815 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27817 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
27818 (DEF_RVV_VXRM_ENUM): New macro.
27819 (handle_pragma_vector): Add vxrm enum register.
27820 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
27826 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
27828 * value-range.h (Value_Range::operator=): New.
27830 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
27832 * value-range.cc (vrange::operator=): Add a stub to copy
27833 unsupported ranges.
27834 * value-range.h (is_a <unsupported_range>): New.
27835 (Value_Range::operator=): Support copying unsupported ranges.
27837 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
27839 * data-streamer-in.cc (streamer_read_real_value): New.
27840 (streamer_read_value_range): New.
27841 * data-streamer-out.cc (streamer_write_real_value): New.
27842 (streamer_write_vrange): New.
27843 * data-streamer.h (streamer_write_vrange): New.
27844 (streamer_read_value_range): New.
27846 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
27849 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
27850 is ignored for a fixed underlying type.
27851 (C++ Dialect Options): Likewise for -fstrict-enums.
27853 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
27855 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
27858 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
27860 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
27862 (s390_atomic_align_for_mode): New.
27864 2023-05-17 Jakub Jelinek <jakub@redhat.com>
27866 * wide-int.cc (wi::from_array): Add missing closing paren in function
27869 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
27871 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
27872 suggested unroll factor once the previous analysis fails.
27874 2023-05-17 Pan Li <pan2.li@intel.com>
27876 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
27878 (main): Add bool1 to the type indexer.
27879 * config/riscv/riscv-vector-builtins-functions.def
27880 (vreinterpret): Register vbool1 interpret function.
27881 * config/riscv/riscv-vector-builtins-types.def
27882 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
27883 (vint8m1_t): Add the type to bool1_interpret_ops.
27884 (vint16m1_t): Ditto.
27885 (vint32m1_t): Ditto.
27886 (vint64m1_t): Ditto.
27887 (vuint8m1_t): Ditto.
27888 (vuint16m1_t): Ditto.
27889 (vuint32m1_t): Ditto.
27890 (vuint64m1_t): Ditto.
27891 * config/riscv/riscv-vector-builtins.cc
27892 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
27893 (required_extensions_p): Add bool1 interpret case.
27894 * config/riscv/riscv-vector-builtins.def
27895 (bool1_interpret): Add bool1 interpret to base type.
27896 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
27897 with VB dest for vreinterpret.
27899 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
27902 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
27903 constants through "lis; xoris".
27905 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
27907 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
27908 default rs6000 target pass for O2 and above.
27909 * doc/invoke.texi: Document -free
27911 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
27913 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
27914 Fix wrong select_kind...
27916 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
27918 * config/s390/s390-protos.h (s390_expand_setmem): Change
27919 function signature.
27920 * config/s390/s390.cc (s390_expand_setmem): For memset's less
27921 than or equal to 256 byte do not perform a libc call.
27922 * config/s390/s390.md: Change expander into a version which
27925 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
27927 * config/s390/s390-protos.h (s390_expand_movmem): New.
27928 * config/s390/s390.cc (s390_expand_movmem): New.
27929 * config/s390/s390.md (movmem<mode>): New.
27933 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
27935 * config/s390/s390-protos.h (s390_expand_cpymem): Change
27936 function signature.
27937 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
27938 than or equal to 256 byte do not perform a libc call.
27939 (s390_expand_insv): Adapt new function signature of
27940 s390_expand_cpymem.
27941 * config/s390/s390.md: Change expander into a version which
27944 2023-05-16 Andrew Pinski <apinski@marvell.com>
27946 PR tree-optimization/109424
27947 * match.pd: Add patterns for min/max of zero_one_valued
27950 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27952 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
27953 * config/riscv/riscv-vector-builtins.cc
27954 (function_expander::use_ternop_insn): Add default rounding mode.
27955 (function_expander::use_widen_ternop_insn): Ditto.
27956 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
27957 (riscv_hard_regno_mode_ok): Ditto.
27958 (riscv_conditional_register_usage): Ditto.
27959 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
27960 (FRM_REG_P): Ditto.
27961 (RISCV_DWARF_FRM): Ditto.
27962 * config/riscv/riscv.md: Ditto.
27963 * config/riscv/vector-iterators.md: split no frm and has frm operations.
27964 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
27965 (@pred_<optab><mode>): Ditto.
27967 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
27969 PR tree-optimization/109695
27970 * value-range.cc (irange::operator=): Resize range.
27971 (irange::union_): Same.
27972 (irange::intersect): Same.
27973 (irange::invert): Same.
27974 (int_range_max): Default to 3 sub-ranges and resize as needed.
27975 * value-range.h (irange::maybe_resize): New.
27977 (int_range::int_range): Adjust for resizing.
27978 (int_range::operator=): Same.
27980 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
27982 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
27984 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
27985 when range changed.
27987 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27989 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
27990 * config/riscv/riscv-vector-builtins.cc
27991 (function_expander::use_exact_insn): Add default rounding mode operand.
27992 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
27993 (riscv_hard_regno_mode_ok): Ditto.
27994 (riscv_conditional_register_usage): Ditto.
27995 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
27996 (VXRM_REG_P): Ditto.
27997 (RISCV_DWARF_VXRM): Ditto.
27998 * config/riscv/riscv.md: Ditto.
27999 * config/riscv/vector.md: Ditto
28001 2023-05-15 Pan Li <pan2.li@intel.com>
28003 * optabs.cc (maybe_gen_insn): Add case to generate instruction
28004 that has 11 operands.
28006 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28008 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
28009 logic for vector modes.
28011 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28014 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
28015 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
28016 (aarch64_cmtst<mode>): Rename to...
28017 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
28018 (*aarch64_cmtst_same_<mode>): Rename to...
28019 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
28020 (*aarch64_cmtstdi): Rename to...
28021 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
28022 (aarch64_fac<optab><mode>): Rename to...
28023 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
28025 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28028 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
28029 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
28031 2023-05-15 Pan Li <pan2.li@intel.com>
28032 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28033 kito-cheng <kito.cheng@sifive.com>
28035 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
28036 deciding the mode is constant or not.
28037 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
28039 2023-05-15 Richard Biener <rguenther@suse.de>
28041 PR tree-optimization/109848
28042 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
28043 TARGET_MEM_REF address preparation before the store, not
28046 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28048 * config/riscv/riscv.cc
28049 (riscv_vectorize_preferred_vector_alignment): New function.
28050 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
28052 2023-05-14 Andrew Pinski <apinski@marvell.com>
28054 PR tree-optimization/109829
28055 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
28057 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
28060 * config/i386/i386.cc: Revert the 2023-05-11 change.
28061 (ix86_widen_mult_cost): Return high value instead of
28062 ICEing for unsupported modes.
28064 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
28066 * config/i386/i386.cc (x86_function_profiler): Take
28067 ix86_direct_extern_access into account when generating calls
28070 2023-05-14 Pan Li <pan2.li@intel.com>
28072 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
28073 Refactor the or pattern to switch cases.
28075 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28077 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
28078 aarch64_expand_vector_init to this, and remove interleaving case.
28079 Recursively call aarch64_expand_vector_init_fallback, instead of
28080 aarch64_expand_vector_init.
28081 (aarch64_unzip_vector_init): New function.
28082 (aarch64_expand_vector_init): Likewise.
28084 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
28086 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
28087 Pull out function call from the gcc_assert.
28089 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
28091 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
28092 (policy_to_str): New.
28093 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
28095 2023-05-13 Andrew Pinski <apinski@marvell.com>
28097 PR tree-optimization/109834
28098 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
28099 (popcount(rotate(x,y))->popcount(x)): Likewise.
28101 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
28103 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
28104 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
28105 gen_extend_insn to generate zero/sign extension instructions.
28107 (ix86_expand_vecop_qihi): Initialize interleave functions
28108 for MULT code only. Fix comments.
28110 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
28113 * config/i386/mmx.md (mulv2si3): Remove expander.
28114 (mulv2si3): Rename insn pattern from *mulv2si.
28116 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
28118 PR libstdc++/109816
28119 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
28120 '!lto_stream_offload_p'.
28122 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
28123 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28126 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
28127 (local_avl_compatible_p): New.
28128 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
28129 for LCM, rewrite as a backward algorithm.
28130 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
28131 interface, handle a BB at once.
28133 2023-05-12 Richard Biener <rguenther@suse.de>
28135 PR tree-optimization/64731
28136 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
28137 handle TARGET_MEM_REF destinations of stores from vector
28140 2023-05-12 Richard Biener <rguenther@suse.de>
28142 PR tree-optimization/109791
28143 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
28145 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
28148 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28150 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
28151 * config/arm/arm-mve-builtins-base.def (vsriq): New.
28152 * config/arm/arm-mve-builtins-base.h (vsriq): New.
28153 * config/arm/arm-mve-builtins.cc
28154 (function_instance::has_inactive_argument): Handle vsriq.
28155 * config/arm/arm_mve.h (vsriq): Remove.
28157 (vsriq_n_u8): Remove.
28158 (vsriq_n_s8): Remove.
28159 (vsriq_n_u16): Remove.
28160 (vsriq_n_s16): Remove.
28161 (vsriq_n_u32): Remove.
28162 (vsriq_n_s32): Remove.
28163 (vsriq_m_n_s8): Remove.
28164 (vsriq_m_n_u8): Remove.
28165 (vsriq_m_n_s16): Remove.
28166 (vsriq_m_n_u16): Remove.
28167 (vsriq_m_n_s32): Remove.
28168 (vsriq_m_n_u32): Remove.
28169 (__arm_vsriq_n_u8): Remove.
28170 (__arm_vsriq_n_s8): Remove.
28171 (__arm_vsriq_n_u16): Remove.
28172 (__arm_vsriq_n_s16): Remove.
28173 (__arm_vsriq_n_u32): Remove.
28174 (__arm_vsriq_n_s32): Remove.
28175 (__arm_vsriq_m_n_s8): Remove.
28176 (__arm_vsriq_m_n_u8): Remove.
28177 (__arm_vsriq_m_n_s16): Remove.
28178 (__arm_vsriq_m_n_u16): Remove.
28179 (__arm_vsriq_m_n_s32): Remove.
28180 (__arm_vsriq_m_n_u32): Remove.
28181 (__arm_vsriq): Remove.
28182 (__arm_vsriq_m): Remove.
28184 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28186 * config/arm/iterators.md (mve_insn): Add vsri.
28187 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
28188 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
28189 (mve_vsriq_m_n_<supf><mode>): Rename into ...
28190 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28192 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28194 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
28195 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
28197 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28199 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
28200 * config/arm/arm-mve-builtins-base.def (vsliq): New.
28201 * config/arm/arm-mve-builtins-base.h (vsliq): New.
28202 * config/arm/arm-mve-builtins.cc
28203 (function_instance::has_inactive_argument): Handle vsliq.
28204 * config/arm/arm_mve.h (vsliq): Remove.
28206 (vsliq_n_u8): Remove.
28207 (vsliq_n_s8): Remove.
28208 (vsliq_n_u16): Remove.
28209 (vsliq_n_s16): Remove.
28210 (vsliq_n_u32): Remove.
28211 (vsliq_n_s32): Remove.
28212 (vsliq_m_n_s8): Remove.
28213 (vsliq_m_n_s32): Remove.
28214 (vsliq_m_n_s16): Remove.
28215 (vsliq_m_n_u8): Remove.
28216 (vsliq_m_n_u32): Remove.
28217 (vsliq_m_n_u16): Remove.
28218 (__arm_vsliq_n_u8): Remove.
28219 (__arm_vsliq_n_s8): Remove.
28220 (__arm_vsliq_n_u16): Remove.
28221 (__arm_vsliq_n_s16): Remove.
28222 (__arm_vsliq_n_u32): Remove.
28223 (__arm_vsliq_n_s32): Remove.
28224 (__arm_vsliq_m_n_s8): Remove.
28225 (__arm_vsliq_m_n_s32): Remove.
28226 (__arm_vsliq_m_n_s16): Remove.
28227 (__arm_vsliq_m_n_u8): Remove.
28228 (__arm_vsliq_m_n_u32): Remove.
28229 (__arm_vsliq_m_n_u16): Remove.
28230 (__arm_vsliq): Remove.
28231 (__arm_vsliq_m): Remove.
28233 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28235 * config/arm/iterators.md (mve_insn>): Add vsli.
28236 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
28237 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28238 (mve_vsliq_m_n_<supf><mode>): Rename into ...
28239 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28241 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28243 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
28244 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
28246 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28248 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
28249 * config/arm/arm-mve-builtins-base.def (vpselq): New.
28250 * config/arm/arm-mve-builtins-base.h (vpselq): New.
28251 * config/arm/arm_mve.h (vpselq): Remove.
28252 (vpselq_u8): Remove.
28253 (vpselq_s8): Remove.
28254 (vpselq_u16): Remove.
28255 (vpselq_s16): Remove.
28256 (vpselq_u32): Remove.
28257 (vpselq_s32): Remove.
28258 (vpselq_u64): Remove.
28259 (vpselq_s64): Remove.
28260 (vpselq_f16): Remove.
28261 (vpselq_f32): Remove.
28262 (__arm_vpselq_u8): Remove.
28263 (__arm_vpselq_s8): Remove.
28264 (__arm_vpselq_u16): Remove.
28265 (__arm_vpselq_s16): Remove.
28266 (__arm_vpselq_u32): Remove.
28267 (__arm_vpselq_s32): Remove.
28268 (__arm_vpselq_u64): Remove.
28269 (__arm_vpselq_s64): Remove.
28270 (__arm_vpselq_f16): Remove.
28271 (__arm_vpselq_f32): Remove.
28272 (__arm_vpselq): Remove.
28274 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28276 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
28277 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
28279 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28281 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
28283 * config/arm/iterators.md (MVE_VPSELQ_F): New.
28284 (mve_insn): Add vpsel.
28285 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
28286 (@mve_<mve_insn>q_<supf><mode>): ... this.
28287 (@mve_vpselq_f<mode>): Rename into ...
28288 (@mve_<mve_insn>q_f<mode>): ... this.
28290 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28292 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
28293 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
28294 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
28295 * config/arm/arm-mve-builtins.cc
28296 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
28298 * config/arm/arm_mve.h (vfmaq): Remove.
28302 (vfmasq_m): Remove.
28304 (vfmaq_f16): Remove.
28305 (vfmaq_n_f16): Remove.
28306 (vfmasq_n_f16): Remove.
28307 (vfmsq_f16): Remove.
28308 (vfmaq_f32): Remove.
28309 (vfmaq_n_f32): Remove.
28310 (vfmasq_n_f32): Remove.
28311 (vfmsq_f32): Remove.
28312 (vfmaq_m_f32): Remove.
28313 (vfmaq_m_f16): Remove.
28314 (vfmaq_m_n_f32): Remove.
28315 (vfmaq_m_n_f16): Remove.
28316 (vfmasq_m_n_f32): Remove.
28317 (vfmasq_m_n_f16): Remove.
28318 (vfmsq_m_f32): Remove.
28319 (vfmsq_m_f16): Remove.
28320 (__arm_vfmaq_f16): Remove.
28321 (__arm_vfmaq_n_f16): Remove.
28322 (__arm_vfmasq_n_f16): Remove.
28323 (__arm_vfmsq_f16): Remove.
28324 (__arm_vfmaq_f32): Remove.
28325 (__arm_vfmaq_n_f32): Remove.
28326 (__arm_vfmasq_n_f32): Remove.
28327 (__arm_vfmsq_f32): Remove.
28328 (__arm_vfmaq_m_f32): Remove.
28329 (__arm_vfmaq_m_f16): Remove.
28330 (__arm_vfmaq_m_n_f32): Remove.
28331 (__arm_vfmaq_m_n_f16): Remove.
28332 (__arm_vfmasq_m_n_f32): Remove.
28333 (__arm_vfmasq_m_n_f16): Remove.
28334 (__arm_vfmsq_m_f32): Remove.
28335 (__arm_vfmsq_m_f16): Remove.
28336 (__arm_vfmaq): Remove.
28337 (__arm_vfmasq): Remove.
28338 (__arm_vfmsq): Remove.
28339 (__arm_vfmaq_m): Remove.
28340 (__arm_vfmasq_m): Remove.
28341 (__arm_vfmsq_m): Remove.
28343 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28345 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
28347 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
28348 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
28349 (mve_insn): Add vfma, vfmas, vfms.
28350 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
28352 (@mve_<mve_insn>q_f<mode>): ... this.
28353 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
28354 (@mve_<mve_insn>q_n_f<mode>): ... this.
28355 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
28356 @mve_<mve_insn>q_m_f<mode>.
28357 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
28358 @mve_<mve_insn>q_m_n_f<mode>.
28360 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28362 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
28363 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
28365 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28367 * config/arm/arm-mve-builtins-base.cc
28368 (FUNCTION_WITH_RTX_M_N_NO_F): New.
28370 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
28371 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
28372 * config/arm/arm_mve.h (vmvnq): Remove.
28375 (vmvnq_s8): Remove.
28376 (vmvnq_s16): Remove.
28377 (vmvnq_s32): Remove.
28378 (vmvnq_n_s16): Remove.
28379 (vmvnq_n_s32): Remove.
28380 (vmvnq_u8): Remove.
28381 (vmvnq_u16): Remove.
28382 (vmvnq_u32): Remove.
28383 (vmvnq_n_u16): Remove.
28384 (vmvnq_n_u32): Remove.
28385 (vmvnq_m_u8): Remove.
28386 (vmvnq_m_s8): Remove.
28387 (vmvnq_m_u16): Remove.
28388 (vmvnq_m_s16): Remove.
28389 (vmvnq_m_u32): Remove.
28390 (vmvnq_m_s32): Remove.
28391 (vmvnq_m_n_s16): Remove.
28392 (vmvnq_m_n_u16): Remove.
28393 (vmvnq_m_n_s32): Remove.
28394 (vmvnq_m_n_u32): Remove.
28395 (vmvnq_x_s8): Remove.
28396 (vmvnq_x_s16): Remove.
28397 (vmvnq_x_s32): Remove.
28398 (vmvnq_x_u8): Remove.
28399 (vmvnq_x_u16): Remove.
28400 (vmvnq_x_u32): Remove.
28401 (vmvnq_x_n_s16): Remove.
28402 (vmvnq_x_n_s32): Remove.
28403 (vmvnq_x_n_u16): Remove.
28404 (vmvnq_x_n_u32): Remove.
28405 (__arm_vmvnq_s8): Remove.
28406 (__arm_vmvnq_s16): Remove.
28407 (__arm_vmvnq_s32): Remove.
28408 (__arm_vmvnq_n_s16): Remove.
28409 (__arm_vmvnq_n_s32): Remove.
28410 (__arm_vmvnq_u8): Remove.
28411 (__arm_vmvnq_u16): Remove.
28412 (__arm_vmvnq_u32): Remove.
28413 (__arm_vmvnq_n_u16): Remove.
28414 (__arm_vmvnq_n_u32): Remove.
28415 (__arm_vmvnq_m_u8): Remove.
28416 (__arm_vmvnq_m_s8): Remove.
28417 (__arm_vmvnq_m_u16): Remove.
28418 (__arm_vmvnq_m_s16): Remove.
28419 (__arm_vmvnq_m_u32): Remove.
28420 (__arm_vmvnq_m_s32): Remove.
28421 (__arm_vmvnq_m_n_s16): Remove.
28422 (__arm_vmvnq_m_n_u16): Remove.
28423 (__arm_vmvnq_m_n_s32): Remove.
28424 (__arm_vmvnq_m_n_u32): Remove.
28425 (__arm_vmvnq_x_s8): Remove.
28426 (__arm_vmvnq_x_s16): Remove.
28427 (__arm_vmvnq_x_s32): Remove.
28428 (__arm_vmvnq_x_u8): Remove.
28429 (__arm_vmvnq_x_u16): Remove.
28430 (__arm_vmvnq_x_u32): Remove.
28431 (__arm_vmvnq_x_n_s16): Remove.
28432 (__arm_vmvnq_x_n_s32): Remove.
28433 (__arm_vmvnq_x_n_u16): Remove.
28434 (__arm_vmvnq_x_n_u32): Remove.
28435 (__arm_vmvnq): Remove.
28436 (__arm_vmvnq_m): Remove.
28437 (__arm_vmvnq_x): Remove.
28439 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28441 * config/arm/iterators.md (mve_insn): Add vmvn.
28442 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
28443 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28444 (mve_vmvnq_m_<supf><mode>): Rename into ...
28445 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
28446 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
28447 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28449 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28451 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
28452 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
28454 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28456 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
28457 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
28458 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
28459 * config/arm/arm_mve.h (vbrsrq): Remove.
28460 (vbrsrq_m): Remove.
28461 (vbrsrq_x): Remove.
28462 (vbrsrq_n_f16): Remove.
28463 (vbrsrq_n_f32): Remove.
28464 (vbrsrq_n_u8): Remove.
28465 (vbrsrq_n_s8): Remove.
28466 (vbrsrq_n_u16): Remove.
28467 (vbrsrq_n_s16): Remove.
28468 (vbrsrq_n_u32): Remove.
28469 (vbrsrq_n_s32): Remove.
28470 (vbrsrq_m_n_s8): Remove.
28471 (vbrsrq_m_n_s32): Remove.
28472 (vbrsrq_m_n_s16): Remove.
28473 (vbrsrq_m_n_u8): Remove.
28474 (vbrsrq_m_n_u32): Remove.
28475 (vbrsrq_m_n_u16): Remove.
28476 (vbrsrq_m_n_f32): Remove.
28477 (vbrsrq_m_n_f16): Remove.
28478 (vbrsrq_x_n_s8): Remove.
28479 (vbrsrq_x_n_s16): Remove.
28480 (vbrsrq_x_n_s32): Remove.
28481 (vbrsrq_x_n_u8): Remove.
28482 (vbrsrq_x_n_u16): Remove.
28483 (vbrsrq_x_n_u32): Remove.
28484 (vbrsrq_x_n_f16): Remove.
28485 (vbrsrq_x_n_f32): Remove.
28486 (__arm_vbrsrq_n_u8): Remove.
28487 (__arm_vbrsrq_n_s8): Remove.
28488 (__arm_vbrsrq_n_u16): Remove.
28489 (__arm_vbrsrq_n_s16): Remove.
28490 (__arm_vbrsrq_n_u32): Remove.
28491 (__arm_vbrsrq_n_s32): Remove.
28492 (__arm_vbrsrq_m_n_s8): Remove.
28493 (__arm_vbrsrq_m_n_s32): Remove.
28494 (__arm_vbrsrq_m_n_s16): Remove.
28495 (__arm_vbrsrq_m_n_u8): Remove.
28496 (__arm_vbrsrq_m_n_u32): Remove.
28497 (__arm_vbrsrq_m_n_u16): Remove.
28498 (__arm_vbrsrq_x_n_s8): Remove.
28499 (__arm_vbrsrq_x_n_s16): Remove.
28500 (__arm_vbrsrq_x_n_s32): Remove.
28501 (__arm_vbrsrq_x_n_u8): Remove.
28502 (__arm_vbrsrq_x_n_u16): Remove.
28503 (__arm_vbrsrq_x_n_u32): Remove.
28504 (__arm_vbrsrq_n_f16): Remove.
28505 (__arm_vbrsrq_n_f32): Remove.
28506 (__arm_vbrsrq_m_n_f32): Remove.
28507 (__arm_vbrsrq_m_n_f16): Remove.
28508 (__arm_vbrsrq_x_n_f16): Remove.
28509 (__arm_vbrsrq_x_n_f32): Remove.
28510 (__arm_vbrsrq): Remove.
28511 (__arm_vbrsrq_m): Remove.
28512 (__arm_vbrsrq_x): Remove.
28514 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28516 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
28517 (mve_insn): Add vbrsr.
28518 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
28519 (@mve_<mve_insn>q_n_f<mode>): ... this.
28520 (mve_vbrsrq_n_<supf><mode>): Rename into ...
28521 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28522 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
28523 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28524 (mve_vbrsrq_m_n_f<mode>): Rename into ...
28525 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
28527 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28529 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
28530 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
28532 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28534 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
28535 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
28536 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
28537 * config/arm/arm_mve.h (vqshluq): Remove.
28538 (vqshluq_m): Remove.
28539 (vqshluq_n_s8): Remove.
28540 (vqshluq_n_s16): Remove.
28541 (vqshluq_n_s32): Remove.
28542 (vqshluq_m_n_s8): Remove.
28543 (vqshluq_m_n_s16): Remove.
28544 (vqshluq_m_n_s32): Remove.
28545 (__arm_vqshluq_n_s8): Remove.
28546 (__arm_vqshluq_n_s16): Remove.
28547 (__arm_vqshluq_n_s32): Remove.
28548 (__arm_vqshluq_m_n_s8): Remove.
28549 (__arm_vqshluq_m_n_s16): Remove.
28550 (__arm_vqshluq_m_n_s32): Remove.
28551 (__arm_vqshluq): Remove.
28552 (__arm_vqshluq_m): Remove.
28554 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28556 * config/arm/iterators.md (mve_insn): Add vqshlu.
28557 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
28558 (VQSHLUQ_M_N, VQSHLUQ_N): New.
28559 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
28560 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28561 (mve_vqshluq_m_n_s<mode>): Change name into ...
28562 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28564 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28566 * config/arm/arm-mve-builtins-shapes.cc
28567 (binary_lshift_unsigned): New.
28568 * config/arm/arm-mve-builtins-shapes.h
28569 (binary_lshift_unsigned): New.
28571 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28573 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
28574 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
28575 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
28576 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
28577 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
28578 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
28579 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
28580 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
28581 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
28582 (vrmlaldavhaxq): Remove.
28583 (vrmlsldavhaq): Remove.
28584 (vrmlsldavhaxq): Remove.
28585 (vrmlaldavhaq_p): Remove.
28586 (vrmlaldavhaxq_p): Remove.
28587 (vrmlsldavhaq_p): Remove.
28588 (vrmlsldavhaxq_p): Remove.
28589 (vrmlaldavhaq_s32): Remove.
28590 (vrmlaldavhaq_u32): Remove.
28591 (vrmlaldavhaxq_s32): Remove.
28592 (vrmlsldavhaq_s32): Remove.
28593 (vrmlsldavhaxq_s32): Remove.
28594 (vrmlaldavhaq_p_s32): Remove.
28595 (vrmlaldavhaq_p_u32): Remove.
28596 (vrmlaldavhaxq_p_s32): Remove.
28597 (vrmlsldavhaq_p_s32): Remove.
28598 (vrmlsldavhaxq_p_s32): Remove.
28599 (__arm_vrmlaldavhaq_s32): Remove.
28600 (__arm_vrmlaldavhaq_u32): Remove.
28601 (__arm_vrmlaldavhaxq_s32): Remove.
28602 (__arm_vrmlsldavhaq_s32): Remove.
28603 (__arm_vrmlsldavhaxq_s32): Remove.
28604 (__arm_vrmlaldavhaq_p_s32): Remove.
28605 (__arm_vrmlaldavhaq_p_u32): Remove.
28606 (__arm_vrmlaldavhaxq_p_s32): Remove.
28607 (__arm_vrmlsldavhaq_p_s32): Remove.
28608 (__arm_vrmlsldavhaxq_p_s32): Remove.
28609 (__arm_vrmlaldavhaq): Remove.
28610 (__arm_vrmlaldavhaxq): Remove.
28611 (__arm_vrmlsldavhaq): Remove.
28612 (__arm_vrmlsldavhaxq): Remove.
28613 (__arm_vrmlaldavhaq_p): Remove.
28614 (__arm_vrmlaldavhaxq_p): Remove.
28615 (__arm_vrmlsldavhaq_p): Remove.
28616 (__arm_vrmlsldavhaxq_p): Remove.
28618 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28620 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
28621 (MVE_VRMLxLDAVHAxQ_P): New.
28622 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
28624 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
28625 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
28627 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
28628 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
28629 (mve_vrmlsldavhaq_sv4si): Merge into ...
28630 (@mve_<mve_insn>q_<supf>v4si): ... this.
28631 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
28632 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
28633 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
28634 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
28636 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28638 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
28639 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
28641 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
28642 * config/arm/arm_mve.h (vqdmulltq): Remove.
28643 (vqdmullbq): Remove.
28644 (vqdmullbq_m): Remove.
28645 (vqdmulltq_m): Remove.
28646 (vqdmulltq_s16): Remove.
28647 (vqdmulltq_n_s16): Remove.
28648 (vqdmullbq_s16): Remove.
28649 (vqdmullbq_n_s16): Remove.
28650 (vqdmulltq_s32): Remove.
28651 (vqdmulltq_n_s32): Remove.
28652 (vqdmullbq_s32): Remove.
28653 (vqdmullbq_n_s32): Remove.
28654 (vqdmullbq_m_n_s32): Remove.
28655 (vqdmullbq_m_n_s16): Remove.
28656 (vqdmullbq_m_s32): Remove.
28657 (vqdmullbq_m_s16): Remove.
28658 (vqdmulltq_m_n_s32): Remove.
28659 (vqdmulltq_m_n_s16): Remove.
28660 (vqdmulltq_m_s32): Remove.
28661 (vqdmulltq_m_s16): Remove.
28662 (__arm_vqdmulltq_s16): Remove.
28663 (__arm_vqdmulltq_n_s16): Remove.
28664 (__arm_vqdmullbq_s16): Remove.
28665 (__arm_vqdmullbq_n_s16): Remove.
28666 (__arm_vqdmulltq_s32): Remove.
28667 (__arm_vqdmulltq_n_s32): Remove.
28668 (__arm_vqdmullbq_s32): Remove.
28669 (__arm_vqdmullbq_n_s32): Remove.
28670 (__arm_vqdmullbq_m_n_s32): Remove.
28671 (__arm_vqdmullbq_m_n_s16): Remove.
28672 (__arm_vqdmullbq_m_s32): Remove.
28673 (__arm_vqdmullbq_m_s16): Remove.
28674 (__arm_vqdmulltq_m_n_s32): Remove.
28675 (__arm_vqdmulltq_m_n_s16): Remove.
28676 (__arm_vqdmulltq_m_s32): Remove.
28677 (__arm_vqdmulltq_m_s16): Remove.
28678 (__arm_vqdmulltq): Remove.
28679 (__arm_vqdmullbq): Remove.
28680 (__arm_vqdmullbq_m): Remove.
28681 (__arm_vqdmulltq_m): Remove.
28683 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28685 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
28686 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
28687 (mve_insn): Add vqdmullb, vqdmullt.
28688 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
28689 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
28691 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
28692 (mve_vqdmulltq_n_s<mode>): Merge into ...
28693 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28694 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
28695 (@mve_<mve_insn>q_<supf><mode>): ... this.
28696 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
28698 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28699 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
28700 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
28702 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
28704 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
28705 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
28707 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
28709 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
28710 Drop unused parameter.
28711 (riscv_select_multilib): Ditto.
28712 (riscv_compute_multilib): Update call site of
28713 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
28715 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
28717 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
28718 * config/riscv/riscv-protos.h (expand_vec_init): New function.
28719 * config/riscv/riscv-v.cc (class rvv_builder): New class.
28720 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
28721 (rvv_builder::get_merged_repeating_sequence): Ditto.
28722 (expand_vector_init_insert_elems): Ditto.
28723 (expand_vec_init): Ditto.
28724 * config/riscv/vector-iterators.md: New attribute.
28726 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
28728 * config/rs6000/rs6000-builtins.def
28729 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
28731 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
28732 xsiexpdpf to xsiexpdpf_di.
28733 * config/rs6000/vsx.md (xsiexpdp): Rename to...
28734 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
28735 replace TARGET_64BIT with TARGET_POWERPC64.
28736 (xsiexpdpf): Rename to...
28737 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
28738 replace TARGET_64BIT with TARGET_POWERPC64.
28740 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
28742 * config/rs6000/rs6000-builtins.def
28743 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
28745 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
28748 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
28750 * config/rs6000/rs6000-builtins.def
28751 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
28752 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
28754 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
28755 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
28756 TARGET_64BIT check.
28757 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
28758 requirement when it has a 64-bit argument.
28760 2023-05-12 Pan Li <pan2.li@intel.com>
28761 Richard Sandiford <richard.sandiford@arm.com>
28762 Richard Biener <rguenther@suse.de>
28763 Jakub Jelinek <jakub@redhat.com>
28765 * mux-utils.h: Add overload operator == and != for pointer_mux.
28766 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
28767 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
28768 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
28769 (dv_as_decl): Ditto.
28770 (dv_as_opaque): Removed due to unnecessary.
28771 (struct variable_hasher): Take decl_or_value as compare_type.
28772 (variable_hasher::equal): Diito.
28773 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
28774 (dv_from_value): Ditto.
28775 (attrs_list_member): Ditto.
28776 (vars_copy): Ditto.
28777 (var_reg_decl_set): Ditto.
28778 (var_reg_delete_and_set): Ditto.
28779 (find_loc_in_1pdv): Ditto.
28780 (canonicalize_values_star): Ditto.
28781 (variable_post_merge_new_vals): Ditto.
28782 (dump_onepart_variable_differences): Ditto.
28783 (variable_different_p): Ditto.
28784 (set_slot_part): Ditto.
28785 (clobber_slot_part): Ditto.
28786 (clobber_variable_part): Ditto.
28788 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
28790 * match.pd: simplify vector shift + bit_and + multiply.
28792 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28794 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
28795 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
28796 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
28797 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
28798 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
28799 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
28800 * config/arm/arm-mve-builtins.cc
28801 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
28802 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
28803 * config/arm/arm_mve.h (vqrdmlashq): Remove.
28804 (vqrdmlahq): Remove.
28805 (vqdmlashq): Remove.
28806 (vqdmlahq): Remove.
28810 (vmlasq_m): Remove.
28811 (vqdmlashq_m): Remove.
28812 (vqdmlahq_m): Remove.
28813 (vqrdmlahq_m): Remove.
28814 (vqrdmlashq_m): Remove.
28815 (vmlasq_n_u8): Remove.
28816 (vmlaq_n_u8): Remove.
28817 (vqrdmlashq_n_s8): Remove.
28818 (vqrdmlahq_n_s8): Remove.
28819 (vqdmlahq_n_s8): Remove.
28820 (vqdmlashq_n_s8): Remove.
28821 (vmlasq_n_s8): Remove.
28822 (vmlaq_n_s8): Remove.
28823 (vmlasq_n_u16): Remove.
28824 (vmlaq_n_u16): Remove.
28825 (vqrdmlashq_n_s16): Remove.
28826 (vqrdmlahq_n_s16): Remove.
28827 (vqdmlashq_n_s16): Remove.
28828 (vqdmlahq_n_s16): Remove.
28829 (vmlasq_n_s16): Remove.
28830 (vmlaq_n_s16): Remove.
28831 (vmlasq_n_u32): Remove.
28832 (vmlaq_n_u32): Remove.
28833 (vqrdmlashq_n_s32): Remove.
28834 (vqrdmlahq_n_s32): Remove.
28835 (vqdmlashq_n_s32): Remove.
28836 (vqdmlahq_n_s32): Remove.
28837 (vmlasq_n_s32): Remove.
28838 (vmlaq_n_s32): Remove.
28839 (vmlaq_m_n_s8): Remove.
28840 (vmlaq_m_n_s32): Remove.
28841 (vmlaq_m_n_s16): Remove.
28842 (vmlaq_m_n_u8): Remove.
28843 (vmlaq_m_n_u32): Remove.
28844 (vmlaq_m_n_u16): Remove.
28845 (vmlasq_m_n_s8): Remove.
28846 (vmlasq_m_n_s32): Remove.
28847 (vmlasq_m_n_s16): Remove.
28848 (vmlasq_m_n_u8): Remove.
28849 (vmlasq_m_n_u32): Remove.
28850 (vmlasq_m_n_u16): Remove.
28851 (vqdmlashq_m_n_s8): Remove.
28852 (vqdmlashq_m_n_s32): Remove.
28853 (vqdmlashq_m_n_s16): Remove.
28854 (vqdmlahq_m_n_s8): Remove.
28855 (vqdmlahq_m_n_s32): Remove.
28856 (vqdmlahq_m_n_s16): Remove.
28857 (vqrdmlahq_m_n_s8): Remove.
28858 (vqrdmlahq_m_n_s32): Remove.
28859 (vqrdmlahq_m_n_s16): Remove.
28860 (vqrdmlashq_m_n_s8): Remove.
28861 (vqrdmlashq_m_n_s32): Remove.
28862 (vqrdmlashq_m_n_s16): Remove.
28863 (__arm_vmlasq_n_u8): Remove.
28864 (__arm_vmlaq_n_u8): Remove.
28865 (__arm_vqrdmlashq_n_s8): Remove.
28866 (__arm_vqdmlashq_n_s8): Remove.
28867 (__arm_vqrdmlahq_n_s8): Remove.
28868 (__arm_vqdmlahq_n_s8): Remove.
28869 (__arm_vmlasq_n_s8): Remove.
28870 (__arm_vmlaq_n_s8): Remove.
28871 (__arm_vmlasq_n_u16): Remove.
28872 (__arm_vmlaq_n_u16): Remove.
28873 (__arm_vqrdmlashq_n_s16): Remove.
28874 (__arm_vqdmlashq_n_s16): Remove.
28875 (__arm_vqrdmlahq_n_s16): Remove.
28876 (__arm_vqdmlahq_n_s16): Remove.
28877 (__arm_vmlasq_n_s16): Remove.
28878 (__arm_vmlaq_n_s16): Remove.
28879 (__arm_vmlasq_n_u32): Remove.
28880 (__arm_vmlaq_n_u32): Remove.
28881 (__arm_vqrdmlashq_n_s32): Remove.
28882 (__arm_vqdmlashq_n_s32): Remove.
28883 (__arm_vqrdmlahq_n_s32): Remove.
28884 (__arm_vqdmlahq_n_s32): Remove.
28885 (__arm_vmlasq_n_s32): Remove.
28886 (__arm_vmlaq_n_s32): Remove.
28887 (__arm_vmlaq_m_n_s8): Remove.
28888 (__arm_vmlaq_m_n_s32): Remove.
28889 (__arm_vmlaq_m_n_s16): Remove.
28890 (__arm_vmlaq_m_n_u8): Remove.
28891 (__arm_vmlaq_m_n_u32): Remove.
28892 (__arm_vmlaq_m_n_u16): Remove.
28893 (__arm_vmlasq_m_n_s8): Remove.
28894 (__arm_vmlasq_m_n_s32): Remove.
28895 (__arm_vmlasq_m_n_s16): Remove.
28896 (__arm_vmlasq_m_n_u8): Remove.
28897 (__arm_vmlasq_m_n_u32): Remove.
28898 (__arm_vmlasq_m_n_u16): Remove.
28899 (__arm_vqdmlahq_m_n_s8): Remove.
28900 (__arm_vqdmlahq_m_n_s32): Remove.
28901 (__arm_vqdmlahq_m_n_s16): Remove.
28902 (__arm_vqrdmlahq_m_n_s8): Remove.
28903 (__arm_vqrdmlahq_m_n_s32): Remove.
28904 (__arm_vqrdmlahq_m_n_s16): Remove.
28905 (__arm_vqrdmlashq_m_n_s8): Remove.
28906 (__arm_vqrdmlashq_m_n_s32): Remove.
28907 (__arm_vqrdmlashq_m_n_s16): Remove.
28908 (__arm_vqdmlashq_m_n_s8): Remove.
28909 (__arm_vqdmlashq_m_n_s16): Remove.
28910 (__arm_vqdmlashq_m_n_s32): Remove.
28911 (__arm_vmlasq): Remove.
28912 (__arm_vmlaq): Remove.
28913 (__arm_vqrdmlashq): Remove.
28914 (__arm_vqdmlashq): Remove.
28915 (__arm_vqrdmlahq): Remove.
28916 (__arm_vqdmlahq): Remove.
28917 (__arm_vmlaq_m): Remove.
28918 (__arm_vmlasq_m): Remove.
28919 (__arm_vqdmlahq_m): Remove.
28920 (__arm_vqrdmlahq_m): Remove.
28921 (__arm_vqrdmlashq_m): Remove.
28922 (__arm_vqdmlashq_m): Remove.
28924 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28926 * config/arm/iterators.md (MVE_VMLxQ_N): New.
28927 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
28929 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
28931 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
28932 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
28933 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
28934 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
28935 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28937 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28939 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
28940 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
28942 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28944 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
28945 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
28946 (vqrdmlsdhxq): New.
28947 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
28948 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
28949 (vqrdmlsdhxq): New.
28950 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
28951 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
28952 (vqrdmlsdhxq): New.
28953 * config/arm/arm-mve-builtins.cc
28954 (function_instance::has_inactive_argument): Handle vqrdmladhq,
28955 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
28956 vqdmlsdhq, vqdmlsdhxq.
28957 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
28958 (vqrdmlsdhq): Remove.
28959 (vqrdmladhxq): Remove.
28960 (vqrdmladhq): Remove.
28961 (vqdmlsdhxq): Remove.
28962 (vqdmlsdhq): Remove.
28963 (vqdmladhxq): Remove.
28964 (vqdmladhq): Remove.
28965 (vqdmladhq_m): Remove.
28966 (vqdmladhxq_m): Remove.
28967 (vqdmlsdhq_m): Remove.
28968 (vqdmlsdhxq_m): Remove.
28969 (vqrdmladhq_m): Remove.
28970 (vqrdmladhxq_m): Remove.
28971 (vqrdmlsdhq_m): Remove.
28972 (vqrdmlsdhxq_m): Remove.
28973 (vqrdmlsdhxq_s8): Remove.
28974 (vqrdmlsdhq_s8): Remove.
28975 (vqrdmladhxq_s8): Remove.
28976 (vqrdmladhq_s8): Remove.
28977 (vqdmlsdhxq_s8): Remove.
28978 (vqdmlsdhq_s8): Remove.
28979 (vqdmladhxq_s8): Remove.
28980 (vqdmladhq_s8): Remove.
28981 (vqrdmlsdhxq_s16): Remove.
28982 (vqrdmlsdhq_s16): Remove.
28983 (vqrdmladhxq_s16): Remove.
28984 (vqrdmladhq_s16): Remove.
28985 (vqdmlsdhxq_s16): Remove.
28986 (vqdmlsdhq_s16): Remove.
28987 (vqdmladhxq_s16): Remove.
28988 (vqdmladhq_s16): Remove.
28989 (vqrdmlsdhxq_s32): Remove.
28990 (vqrdmlsdhq_s32): Remove.
28991 (vqrdmladhxq_s32): Remove.
28992 (vqrdmladhq_s32): Remove.
28993 (vqdmlsdhxq_s32): Remove.
28994 (vqdmlsdhq_s32): Remove.
28995 (vqdmladhxq_s32): Remove.
28996 (vqdmladhq_s32): Remove.
28997 (vqdmladhq_m_s8): Remove.
28998 (vqdmladhq_m_s32): Remove.
28999 (vqdmladhq_m_s16): Remove.
29000 (vqdmladhxq_m_s8): Remove.
29001 (vqdmladhxq_m_s32): Remove.
29002 (vqdmladhxq_m_s16): Remove.
29003 (vqdmlsdhq_m_s8): Remove.
29004 (vqdmlsdhq_m_s32): Remove.
29005 (vqdmlsdhq_m_s16): Remove.
29006 (vqdmlsdhxq_m_s8): Remove.
29007 (vqdmlsdhxq_m_s32): Remove.
29008 (vqdmlsdhxq_m_s16): Remove.
29009 (vqrdmladhq_m_s8): Remove.
29010 (vqrdmladhq_m_s32): Remove.
29011 (vqrdmladhq_m_s16): Remove.
29012 (vqrdmladhxq_m_s8): Remove.
29013 (vqrdmladhxq_m_s32): Remove.
29014 (vqrdmladhxq_m_s16): Remove.
29015 (vqrdmlsdhq_m_s8): Remove.
29016 (vqrdmlsdhq_m_s32): Remove.
29017 (vqrdmlsdhq_m_s16): Remove.
29018 (vqrdmlsdhxq_m_s8): Remove.
29019 (vqrdmlsdhxq_m_s32): Remove.
29020 (vqrdmlsdhxq_m_s16): Remove.
29021 (__arm_vqrdmlsdhxq_s8): Remove.
29022 (__arm_vqrdmlsdhq_s8): Remove.
29023 (__arm_vqrdmladhxq_s8): Remove.
29024 (__arm_vqrdmladhq_s8): Remove.
29025 (__arm_vqdmlsdhxq_s8): Remove.
29026 (__arm_vqdmlsdhq_s8): Remove.
29027 (__arm_vqdmladhxq_s8): Remove.
29028 (__arm_vqdmladhq_s8): Remove.
29029 (__arm_vqrdmlsdhxq_s16): Remove.
29030 (__arm_vqrdmlsdhq_s16): Remove.
29031 (__arm_vqrdmladhxq_s16): Remove.
29032 (__arm_vqrdmladhq_s16): Remove.
29033 (__arm_vqdmlsdhxq_s16): Remove.
29034 (__arm_vqdmlsdhq_s16): Remove.
29035 (__arm_vqdmladhxq_s16): Remove.
29036 (__arm_vqdmladhq_s16): Remove.
29037 (__arm_vqrdmlsdhxq_s32): Remove.
29038 (__arm_vqrdmlsdhq_s32): Remove.
29039 (__arm_vqrdmladhxq_s32): Remove.
29040 (__arm_vqrdmladhq_s32): Remove.
29041 (__arm_vqdmlsdhxq_s32): Remove.
29042 (__arm_vqdmlsdhq_s32): Remove.
29043 (__arm_vqdmladhxq_s32): Remove.
29044 (__arm_vqdmladhq_s32): Remove.
29045 (__arm_vqdmladhq_m_s8): Remove.
29046 (__arm_vqdmladhq_m_s32): Remove.
29047 (__arm_vqdmladhq_m_s16): Remove.
29048 (__arm_vqdmladhxq_m_s8): Remove.
29049 (__arm_vqdmladhxq_m_s32): Remove.
29050 (__arm_vqdmladhxq_m_s16): Remove.
29051 (__arm_vqdmlsdhq_m_s8): Remove.
29052 (__arm_vqdmlsdhq_m_s32): Remove.
29053 (__arm_vqdmlsdhq_m_s16): Remove.
29054 (__arm_vqdmlsdhxq_m_s8): Remove.
29055 (__arm_vqdmlsdhxq_m_s32): Remove.
29056 (__arm_vqdmlsdhxq_m_s16): Remove.
29057 (__arm_vqrdmladhq_m_s8): Remove.
29058 (__arm_vqrdmladhq_m_s32): Remove.
29059 (__arm_vqrdmladhq_m_s16): Remove.
29060 (__arm_vqrdmladhxq_m_s8): Remove.
29061 (__arm_vqrdmladhxq_m_s32): Remove.
29062 (__arm_vqrdmladhxq_m_s16): Remove.
29063 (__arm_vqrdmlsdhq_m_s8): Remove.
29064 (__arm_vqrdmlsdhq_m_s32): Remove.
29065 (__arm_vqrdmlsdhq_m_s16): Remove.
29066 (__arm_vqrdmlsdhxq_m_s8): Remove.
29067 (__arm_vqrdmlsdhxq_m_s32): Remove.
29068 (__arm_vqrdmlsdhxq_m_s16): Remove.
29069 (__arm_vqrdmlsdhxq): Remove.
29070 (__arm_vqrdmlsdhq): Remove.
29071 (__arm_vqrdmladhxq): Remove.
29072 (__arm_vqrdmladhq): Remove.
29073 (__arm_vqdmlsdhxq): Remove.
29074 (__arm_vqdmlsdhq): Remove.
29075 (__arm_vqdmladhxq): Remove.
29076 (__arm_vqdmladhq): Remove.
29077 (__arm_vqdmladhq_m): Remove.
29078 (__arm_vqdmladhxq_m): Remove.
29079 (__arm_vqdmlsdhq_m): Remove.
29080 (__arm_vqdmlsdhxq_m): Remove.
29081 (__arm_vqrdmladhq_m): Remove.
29082 (__arm_vqrdmladhxq_m): Remove.
29083 (__arm_vqrdmlsdhq_m): Remove.
29084 (__arm_vqrdmlsdhxq_m): Remove.
29086 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29088 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
29089 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
29090 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
29091 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
29092 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
29093 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
29094 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
29095 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
29096 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
29097 (mve_vqdmladhq_s<mode>): Merge into ...
29098 (@mve_<mve_insn>q_<supf><mode>): ... this.
29100 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29102 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
29103 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
29105 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29107 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
29108 (vmlsldavaq, vmlsldavaxq): New.
29109 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
29110 (vmlsldavaq, vmlsldavaxq): New.
29111 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
29112 (vmlsldavaq, vmlsldavaxq): New.
29113 * config/arm/arm_mve.h (vmlaldavaq): Remove.
29114 (vmlaldavaxq): Remove.
29115 (vmlsldavaq): Remove.
29116 (vmlsldavaxq): Remove.
29117 (vmlaldavaq_p): Remove.
29118 (vmlaldavaxq_p): Remove.
29119 (vmlsldavaq_p): Remove.
29120 (vmlsldavaxq_p): Remove.
29121 (vmlaldavaq_s16): Remove.
29122 (vmlaldavaxq_s16): Remove.
29123 (vmlsldavaq_s16): Remove.
29124 (vmlsldavaxq_s16): Remove.
29125 (vmlaldavaq_u16): Remove.
29126 (vmlaldavaq_s32): Remove.
29127 (vmlaldavaxq_s32): Remove.
29128 (vmlsldavaq_s32): Remove.
29129 (vmlsldavaxq_s32): Remove.
29130 (vmlaldavaq_u32): Remove.
29131 (vmlaldavaq_p_s32): Remove.
29132 (vmlaldavaq_p_s16): Remove.
29133 (vmlaldavaq_p_u32): Remove.
29134 (vmlaldavaq_p_u16): Remove.
29135 (vmlaldavaxq_p_s32): Remove.
29136 (vmlaldavaxq_p_s16): Remove.
29137 (vmlsldavaq_p_s32): Remove.
29138 (vmlsldavaq_p_s16): Remove.
29139 (vmlsldavaxq_p_s32): Remove.
29140 (vmlsldavaxq_p_s16): Remove.
29141 (__arm_vmlaldavaq_s16): Remove.
29142 (__arm_vmlaldavaxq_s16): Remove.
29143 (__arm_vmlsldavaq_s16): Remove.
29144 (__arm_vmlsldavaxq_s16): Remove.
29145 (__arm_vmlaldavaq_u16): Remove.
29146 (__arm_vmlaldavaq_s32): Remove.
29147 (__arm_vmlaldavaxq_s32): Remove.
29148 (__arm_vmlsldavaq_s32): Remove.
29149 (__arm_vmlsldavaxq_s32): Remove.
29150 (__arm_vmlaldavaq_u32): Remove.
29151 (__arm_vmlaldavaq_p_s32): Remove.
29152 (__arm_vmlaldavaq_p_s16): Remove.
29153 (__arm_vmlaldavaq_p_u32): Remove.
29154 (__arm_vmlaldavaq_p_u16): Remove.
29155 (__arm_vmlaldavaxq_p_s32): Remove.
29156 (__arm_vmlaldavaxq_p_s16): Remove.
29157 (__arm_vmlsldavaq_p_s32): Remove.
29158 (__arm_vmlsldavaq_p_s16): Remove.
29159 (__arm_vmlsldavaxq_p_s32): Remove.
29160 (__arm_vmlsldavaxq_p_s16): Remove.
29161 (__arm_vmlaldavaq): Remove.
29162 (__arm_vmlaldavaxq): Remove.
29163 (__arm_vmlsldavaq): Remove.
29164 (__arm_vmlsldavaxq): Remove.
29165 (__arm_vmlaldavaq_p): Remove.
29166 (__arm_vmlaldavaxq_p): Remove.
29167 (__arm_vmlsldavaq_p): Remove.
29168 (__arm_vmlsldavaxq_p): Remove.
29170 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29172 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
29174 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
29175 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
29176 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
29177 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
29178 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
29179 (mve_vmlaldavaxq_s<mode>): Merge into ...
29180 (@mve_<mve_insn>q_<supf><mode>): ... this.
29181 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
29182 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
29184 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
29186 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29188 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
29189 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
29191 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29193 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
29194 (vrmlsldavhq, vrmlsldavhxq): New.
29195 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
29196 (vrmlsldavhq, vrmlsldavhxq): New.
29197 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
29198 (vrmlsldavhq, vrmlsldavhxq): New.
29199 * config/arm/arm-mve-builtins-functions.h
29200 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
29201 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
29202 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
29203 (vrmlsldavhxq): Remove.
29204 (vrmlsldavhq): Remove.
29205 (vrmlaldavhxq): Remove.
29206 (vrmlaldavhq_p): Remove.
29207 (vrmlaldavhxq_p): Remove.
29208 (vrmlsldavhq_p): Remove.
29209 (vrmlsldavhxq_p): Remove.
29210 (vrmlaldavhq_u32): Remove.
29211 (vrmlsldavhxq_s32): Remove.
29212 (vrmlsldavhq_s32): Remove.
29213 (vrmlaldavhxq_s32): Remove.
29214 (vrmlaldavhq_s32): Remove.
29215 (vrmlaldavhq_p_s32): Remove.
29216 (vrmlaldavhxq_p_s32): Remove.
29217 (vrmlsldavhq_p_s32): Remove.
29218 (vrmlsldavhxq_p_s32): Remove.
29219 (vrmlaldavhq_p_u32): Remove.
29220 (__arm_vrmlaldavhq_u32): Remove.
29221 (__arm_vrmlsldavhxq_s32): Remove.
29222 (__arm_vrmlsldavhq_s32): Remove.
29223 (__arm_vrmlaldavhxq_s32): Remove.
29224 (__arm_vrmlaldavhq_s32): Remove.
29225 (__arm_vrmlaldavhq_p_s32): Remove.
29226 (__arm_vrmlaldavhxq_p_s32): Remove.
29227 (__arm_vrmlsldavhq_p_s32): Remove.
29228 (__arm_vrmlsldavhxq_p_s32): Remove.
29229 (__arm_vrmlaldavhq_p_u32): Remove.
29230 (__arm_vrmlaldavhq): Remove.
29231 (__arm_vrmlsldavhxq): Remove.
29232 (__arm_vrmlsldavhq): Remove.
29233 (__arm_vrmlaldavhxq): Remove.
29234 (__arm_vrmlaldavhq_p): Remove.
29235 (__arm_vrmlaldavhxq_p): Remove.
29236 (__arm_vrmlsldavhq_p): Remove.
29237 (__arm_vrmlsldavhxq_p): Remove.
29239 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29241 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
29243 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
29244 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
29245 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
29246 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
29247 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
29248 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
29249 (@mve_<mve_insn>q_<supf>v4si): ... this.
29250 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
29251 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
29253 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
29255 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29257 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
29258 (vmlsldavq, vmlsldavxq): New.
29259 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
29260 (vmlsldavq, vmlsldavxq): New.
29261 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
29262 (vmlsldavq, vmlsldavxq): New.
29263 * config/arm/arm_mve.h (vmlaldavq): Remove.
29264 (vmlsldavxq): Remove.
29265 (vmlsldavq): Remove.
29266 (vmlaldavxq): Remove.
29267 (vmlaldavq_p): Remove.
29268 (vmlaldavxq_p): Remove.
29269 (vmlsldavq_p): Remove.
29270 (vmlsldavxq_p): Remove.
29271 (vmlaldavq_u16): Remove.
29272 (vmlsldavxq_s16): Remove.
29273 (vmlsldavq_s16): Remove.
29274 (vmlaldavxq_s16): Remove.
29275 (vmlaldavq_s16): Remove.
29276 (vmlaldavq_u32): Remove.
29277 (vmlsldavxq_s32): Remove.
29278 (vmlsldavq_s32): Remove.
29279 (vmlaldavxq_s32): Remove.
29280 (vmlaldavq_s32): Remove.
29281 (vmlaldavq_p_s16): Remove.
29282 (vmlaldavxq_p_s16): Remove.
29283 (vmlsldavq_p_s16): Remove.
29284 (vmlsldavxq_p_s16): Remove.
29285 (vmlaldavq_p_u16): Remove.
29286 (vmlaldavq_p_s32): Remove.
29287 (vmlaldavxq_p_s32): Remove.
29288 (vmlsldavq_p_s32): Remove.
29289 (vmlsldavxq_p_s32): Remove.
29290 (vmlaldavq_p_u32): Remove.
29291 (__arm_vmlaldavq_u16): Remove.
29292 (__arm_vmlsldavxq_s16): Remove.
29293 (__arm_vmlsldavq_s16): Remove.
29294 (__arm_vmlaldavxq_s16): Remove.
29295 (__arm_vmlaldavq_s16): Remove.
29296 (__arm_vmlaldavq_u32): Remove.
29297 (__arm_vmlsldavxq_s32): Remove.
29298 (__arm_vmlsldavq_s32): Remove.
29299 (__arm_vmlaldavxq_s32): Remove.
29300 (__arm_vmlaldavq_s32): Remove.
29301 (__arm_vmlaldavq_p_s16): Remove.
29302 (__arm_vmlaldavxq_p_s16): Remove.
29303 (__arm_vmlsldavq_p_s16): Remove.
29304 (__arm_vmlsldavxq_p_s16): Remove.
29305 (__arm_vmlaldavq_p_u16): Remove.
29306 (__arm_vmlaldavq_p_s32): Remove.
29307 (__arm_vmlaldavxq_p_s32): Remove.
29308 (__arm_vmlsldavq_p_s32): Remove.
29309 (__arm_vmlsldavxq_p_s32): Remove.
29310 (__arm_vmlaldavq_p_u32): Remove.
29311 (__arm_vmlaldavq): Remove.
29312 (__arm_vmlsldavxq): Remove.
29313 (__arm_vmlsldavq): Remove.
29314 (__arm_vmlaldavxq): Remove.
29315 (__arm_vmlaldavq_p): Remove.
29316 (__arm_vmlaldavxq_p): Remove.
29317 (__arm_vmlsldavq_p): Remove.
29318 (__arm_vmlsldavxq_p): Remove.
29320 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29322 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
29323 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
29324 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
29325 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
29326 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
29327 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
29328 (mve_vmlsldavxq_s<mode>): Merge into ...
29329 (@mve_<mve_insn>q_<supf><mode>): ... this.
29330 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
29331 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
29333 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
29335 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29337 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
29338 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
29340 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29342 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
29343 * config/arm/arm-mve-builtins-base.def (vabavq): New.
29344 * config/arm/arm-mve-builtins-base.h (vabavq): New.
29345 * config/arm/arm_mve.h (vabavq): Remove.
29346 (vabavq_p): Remove.
29347 (vabavq_s8): Remove.
29348 (vabavq_s16): Remove.
29349 (vabavq_s32): Remove.
29350 (vabavq_u8): Remove.
29351 (vabavq_u16): Remove.
29352 (vabavq_u32): Remove.
29353 (vabavq_p_s8): Remove.
29354 (vabavq_p_u8): Remove.
29355 (vabavq_p_s16): Remove.
29356 (vabavq_p_u16): Remove.
29357 (vabavq_p_s32): Remove.
29358 (vabavq_p_u32): Remove.
29359 (__arm_vabavq_s8): Remove.
29360 (__arm_vabavq_s16): Remove.
29361 (__arm_vabavq_s32): Remove.
29362 (__arm_vabavq_u8): Remove.
29363 (__arm_vabavq_u16): Remove.
29364 (__arm_vabavq_u32): Remove.
29365 (__arm_vabavq_p_s8): Remove.
29366 (__arm_vabavq_p_u8): Remove.
29367 (__arm_vabavq_p_s16): Remove.
29368 (__arm_vabavq_p_u16): Remove.
29369 (__arm_vabavq_p_s32): Remove.
29370 (__arm_vabavq_p_u32): Remove.
29371 (__arm_vabavq): Remove.
29372 (__arm_vabavq_p): Remove.
29374 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29376 * config/arm/iterators.md (mve_insn): Add vabav.
29377 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
29378 (@mve_<mve_insn>q_<supf><mode>): ... this,.
29379 (mve_vabavq_p_<supf><mode>): Rename into ...
29380 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
29382 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29384 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
29385 (vmlsdavaq, vmlsdavaxq): New.
29386 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
29387 (vmlsdavaq, vmlsdavaxq): New.
29388 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
29389 (vmlsdavaq, vmlsdavaxq): New.
29390 * config/arm/arm_mve.h (vmladavaq): Remove.
29391 (vmlsdavaxq): Remove.
29392 (vmlsdavaq): Remove.
29393 (vmladavaxq): Remove.
29394 (vmladavaq_p): Remove.
29395 (vmladavaxq_p): Remove.
29396 (vmlsdavaq_p): Remove.
29397 (vmlsdavaxq_p): Remove.
29398 (vmladavaq_u8): Remove.
29399 (vmlsdavaxq_s8): Remove.
29400 (vmlsdavaq_s8): Remove.
29401 (vmladavaxq_s8): Remove.
29402 (vmladavaq_s8): Remove.
29403 (vmladavaq_u16): Remove.
29404 (vmlsdavaxq_s16): Remove.
29405 (vmlsdavaq_s16): Remove.
29406 (vmladavaxq_s16): Remove.
29407 (vmladavaq_s16): Remove.
29408 (vmladavaq_u32): Remove.
29409 (vmlsdavaxq_s32): Remove.
29410 (vmlsdavaq_s32): Remove.
29411 (vmladavaxq_s32): Remove.
29412 (vmladavaq_s32): Remove.
29413 (vmladavaq_p_s8): Remove.
29414 (vmladavaq_p_s32): Remove.
29415 (vmladavaq_p_s16): Remove.
29416 (vmladavaq_p_u8): Remove.
29417 (vmladavaq_p_u32): Remove.
29418 (vmladavaq_p_u16): Remove.
29419 (vmladavaxq_p_s8): Remove.
29420 (vmladavaxq_p_s32): Remove.
29421 (vmladavaxq_p_s16): Remove.
29422 (vmlsdavaq_p_s8): Remove.
29423 (vmlsdavaq_p_s32): Remove.
29424 (vmlsdavaq_p_s16): Remove.
29425 (vmlsdavaxq_p_s8): Remove.
29426 (vmlsdavaxq_p_s32): Remove.
29427 (vmlsdavaxq_p_s16): Remove.
29428 (__arm_vmladavaq_u8): Remove.
29429 (__arm_vmlsdavaxq_s8): Remove.
29430 (__arm_vmlsdavaq_s8): Remove.
29431 (__arm_vmladavaxq_s8): Remove.
29432 (__arm_vmladavaq_s8): Remove.
29433 (__arm_vmladavaq_u16): Remove.
29434 (__arm_vmlsdavaxq_s16): Remove.
29435 (__arm_vmlsdavaq_s16): Remove.
29436 (__arm_vmladavaxq_s16): Remove.
29437 (__arm_vmladavaq_s16): Remove.
29438 (__arm_vmladavaq_u32): Remove.
29439 (__arm_vmlsdavaxq_s32): Remove.
29440 (__arm_vmlsdavaq_s32): Remove.
29441 (__arm_vmladavaxq_s32): Remove.
29442 (__arm_vmladavaq_s32): Remove.
29443 (__arm_vmladavaq_p_s8): Remove.
29444 (__arm_vmladavaq_p_s32): Remove.
29445 (__arm_vmladavaq_p_s16): Remove.
29446 (__arm_vmladavaq_p_u8): Remove.
29447 (__arm_vmladavaq_p_u32): Remove.
29448 (__arm_vmladavaq_p_u16): Remove.
29449 (__arm_vmladavaxq_p_s8): Remove.
29450 (__arm_vmladavaxq_p_s32): Remove.
29451 (__arm_vmladavaxq_p_s16): Remove.
29452 (__arm_vmlsdavaq_p_s8): Remove.
29453 (__arm_vmlsdavaq_p_s32): Remove.
29454 (__arm_vmlsdavaq_p_s16): Remove.
29455 (__arm_vmlsdavaxq_p_s8): Remove.
29456 (__arm_vmlsdavaxq_p_s32): Remove.
29457 (__arm_vmlsdavaxq_p_s16): Remove.
29458 (__arm_vmladavaq): Remove.
29459 (__arm_vmlsdavaxq): Remove.
29460 (__arm_vmlsdavaq): Remove.
29461 (__arm_vmladavaxq): Remove.
29462 (__arm_vmladavaq_p): Remove.
29463 (__arm_vmladavaxq_p): Remove.
29464 (__arm_vmlsdavaq_p): Remove.
29465 (__arm_vmlsdavaxq_p): Remove.
29467 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29469 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
29470 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
29472 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29474 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
29475 (vmlsdavq, vmlsdavxq): New.
29476 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
29477 (vmlsdavq, vmlsdavxq): New.
29478 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
29479 (vmlsdavq, vmlsdavxq): New.
29480 * config/arm/arm_mve.h (vmladavq): Remove.
29481 (vmlsdavxq): Remove.
29482 (vmlsdavq): Remove.
29483 (vmladavxq): Remove.
29484 (vmladavq_p): Remove.
29485 (vmlsdavxq_p): Remove.
29486 (vmlsdavq_p): Remove.
29487 (vmladavxq_p): Remove.
29488 (vmladavq_u8): Remove.
29489 (vmlsdavxq_s8): Remove.
29490 (vmlsdavq_s8): Remove.
29491 (vmladavxq_s8): Remove.
29492 (vmladavq_s8): Remove.
29493 (vmladavq_u16): Remove.
29494 (vmlsdavxq_s16): Remove.
29495 (vmlsdavq_s16): Remove.
29496 (vmladavxq_s16): Remove.
29497 (vmladavq_s16): Remove.
29498 (vmladavq_u32): Remove.
29499 (vmlsdavxq_s32): Remove.
29500 (vmlsdavq_s32): Remove.
29501 (vmladavxq_s32): Remove.
29502 (vmladavq_s32): Remove.
29503 (vmladavq_p_u8): Remove.
29504 (vmlsdavxq_p_s8): Remove.
29505 (vmlsdavq_p_s8): Remove.
29506 (vmladavxq_p_s8): Remove.
29507 (vmladavq_p_s8): Remove.
29508 (vmladavq_p_u16): Remove.
29509 (vmlsdavxq_p_s16): Remove.
29510 (vmlsdavq_p_s16): Remove.
29511 (vmladavxq_p_s16): Remove.
29512 (vmladavq_p_s16): Remove.
29513 (vmladavq_p_u32): Remove.
29514 (vmlsdavxq_p_s32): Remove.
29515 (vmlsdavq_p_s32): Remove.
29516 (vmladavxq_p_s32): Remove.
29517 (vmladavq_p_s32): Remove.
29518 (__arm_vmladavq_u8): Remove.
29519 (__arm_vmlsdavxq_s8): Remove.
29520 (__arm_vmlsdavq_s8): Remove.
29521 (__arm_vmladavxq_s8): Remove.
29522 (__arm_vmladavq_s8): Remove.
29523 (__arm_vmladavq_u16): Remove.
29524 (__arm_vmlsdavxq_s16): Remove.
29525 (__arm_vmlsdavq_s16): Remove.
29526 (__arm_vmladavxq_s16): Remove.
29527 (__arm_vmladavq_s16): Remove.
29528 (__arm_vmladavq_u32): Remove.
29529 (__arm_vmlsdavxq_s32): Remove.
29530 (__arm_vmlsdavq_s32): Remove.
29531 (__arm_vmladavxq_s32): Remove.
29532 (__arm_vmladavq_s32): Remove.
29533 (__arm_vmladavq_p_u8): Remove.
29534 (__arm_vmlsdavxq_p_s8): Remove.
29535 (__arm_vmlsdavq_p_s8): Remove.
29536 (__arm_vmladavxq_p_s8): Remove.
29537 (__arm_vmladavq_p_s8): Remove.
29538 (__arm_vmladavq_p_u16): Remove.
29539 (__arm_vmlsdavxq_p_s16): Remove.
29540 (__arm_vmlsdavq_p_s16): Remove.
29541 (__arm_vmladavxq_p_s16): Remove.
29542 (__arm_vmladavq_p_s16): Remove.
29543 (__arm_vmladavq_p_u32): Remove.
29544 (__arm_vmlsdavxq_p_s32): Remove.
29545 (__arm_vmlsdavq_p_s32): Remove.
29546 (__arm_vmladavxq_p_s32): Remove.
29547 (__arm_vmladavq_p_s32): Remove.
29548 (__arm_vmladavq): Remove.
29549 (__arm_vmlsdavxq): Remove.
29550 (__arm_vmlsdavq): Remove.
29551 (__arm_vmladavxq): Remove.
29552 (__arm_vmladavq_p): Remove.
29553 (__arm_vmlsdavxq_p): Remove.
29554 (__arm_vmlsdavq_p): Remove.
29555 (__arm_vmladavxq_p): Remove.
29557 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29559 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
29560 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
29561 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
29562 vmlsdavax, vmlsdav, vmlsdavx.
29563 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
29564 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
29565 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
29567 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
29568 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
29569 (mve_vmlsdavxq_s<mode>): Merge into ...
29570 (@mve_<mve_insn>q_<supf><mode>): ... this.
29571 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
29572 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
29574 (@mve_<mve_insn>q_<supf><mode>): ... this.
29575 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
29576 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
29577 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
29578 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
29579 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
29581 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
29583 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29585 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
29586 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
29588 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29590 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
29591 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
29592 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
29593 * config/arm/arm_mve.h (vaddlvaq): Remove.
29594 (vaddlvaq_p): Remove.
29595 (vaddlvaq_u32): Remove.
29596 (vaddlvaq_s32): Remove.
29597 (vaddlvaq_p_s32): Remove.
29598 (vaddlvaq_p_u32): Remove.
29599 (__arm_vaddlvaq_u32): Remove.
29600 (__arm_vaddlvaq_s32): Remove.
29601 (__arm_vaddlvaq_p_s32): Remove.
29602 (__arm_vaddlvaq_p_u32): Remove.
29603 (__arm_vaddlvaq): Remove.
29604 (__arm_vaddlvaq_p): Remove.
29606 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29608 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
29609 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
29611 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29613 * config/arm/iterators.md (mve_insn): Add vaddlva.
29614 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
29615 (@mve_<mve_insn>q_<supf>v4si): ... this.
29616 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
29617 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
29619 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
29622 * config/i386/i386.cc (ix86_widen_mult_cost):
29623 Handle V4HImode and V2SImode.
29625 2023-05-11 Andrew Pinski <apinski@marvell.com>
29627 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
29628 defined by a phi node with more than one uses, allow for the
29629 only uses are in that same defining statement.
29631 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
29633 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
29636 2023-05-11 Pan Li <pan2.li@intel.com>
29638 * config/riscv/vector.md: Add comments for simplifying to vmset.
29640 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
29642 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
29644 (v<optab><mode>3): Add vector shift pattern.
29645 * config/riscv/vector-iterators.md: New iterator.
29647 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
29649 * config/riscv/autovec.md: Use renamed functions.
29650 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
29651 (emit_vlmax_reg_op): To this.
29652 (emit_nonvlmax_op): Rename.
29653 (emit_len_op): To this.
29654 (emit_nonvlmax_binop): Rename.
29655 (emit_len_binop): To this.
29656 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
29657 (emit_pred_binop): Remove vlmax_p.
29658 (emit_vlmax_op): Rename.
29659 (emit_vlmax_reg_op): To this.
29660 (emit_nonvlmax_op): Rename.
29661 (emit_len_op): To this.
29662 (emit_nonvlmax_binop): Rename.
29663 (emit_len_binop): To this.
29664 (sew64_scalar_helper): Use renamed functions.
29665 (expand_tuple_move): Use renamed functions.
29666 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
29668 * config/riscv/vector.md: Use renamed functions.
29670 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
29671 Michael Collison <collison@rivosinc.com>
29673 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
29674 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
29675 * config/riscv/riscv-v.cc (emit_pred_op): New function.
29676 (set_expander_dest_and_mask): New function.
29677 (emit_pred_binop): New function.
29678 (emit_nonvlmax_binop): New function.
29680 2023-05-11 Pan Li <pan2.li@intel.com>
29682 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
29683 * gimple-loop-interchange.cc
29684 (tree_loop_interchange::map_inductions_to_loop): Ditto.
29685 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
29686 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
29687 * tree-ssa-loop-manip.cc (create_iv): Ditto.
29688 (tree_transform_and_unroll_loop): Ditto.
29689 (canonicalize_loop_ivs): Ditto.
29690 * tree-ssa-loop-manip.h (create_iv): Ditto.
29691 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
29692 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
29694 (vect_set_loop_condition_normal): Ditto.
29695 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
29696 * tree-vect-stmts.cc (vectorizable_store): Ditto.
29697 (vectorizable_load): Ditto.
29699 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29701 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
29702 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
29703 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
29704 * config/arm/arm_mve.h (vmovlbq): Remove.
29706 (vmovlbq_m): Remove.
29707 (vmovltq_m): Remove.
29708 (vmovlbq_x): Remove.
29709 (vmovltq_x): Remove.
29710 (vmovlbq_s8): Remove.
29711 (vmovlbq_s16): Remove.
29712 (vmovltq_s8): Remove.
29713 (vmovltq_s16): Remove.
29714 (vmovltq_u8): Remove.
29715 (vmovltq_u16): Remove.
29716 (vmovlbq_u8): Remove.
29717 (vmovlbq_u16): Remove.
29718 (vmovlbq_m_s8): Remove.
29719 (vmovltq_m_s8): Remove.
29720 (vmovlbq_m_u8): Remove.
29721 (vmovltq_m_u8): Remove.
29722 (vmovlbq_m_s16): Remove.
29723 (vmovltq_m_s16): Remove.
29724 (vmovlbq_m_u16): Remove.
29725 (vmovltq_m_u16): Remove.
29726 (vmovlbq_x_s8): Remove.
29727 (vmovlbq_x_s16): Remove.
29728 (vmovlbq_x_u8): Remove.
29729 (vmovlbq_x_u16): Remove.
29730 (vmovltq_x_s8): Remove.
29731 (vmovltq_x_s16): Remove.
29732 (vmovltq_x_u8): Remove.
29733 (vmovltq_x_u16): Remove.
29734 (__arm_vmovlbq_s8): Remove.
29735 (__arm_vmovlbq_s16): Remove.
29736 (__arm_vmovltq_s8): Remove.
29737 (__arm_vmovltq_s16): Remove.
29738 (__arm_vmovltq_u8): Remove.
29739 (__arm_vmovltq_u16): Remove.
29740 (__arm_vmovlbq_u8): Remove.
29741 (__arm_vmovlbq_u16): Remove.
29742 (__arm_vmovlbq_m_s8): Remove.
29743 (__arm_vmovltq_m_s8): Remove.
29744 (__arm_vmovlbq_m_u8): Remove.
29745 (__arm_vmovltq_m_u8): Remove.
29746 (__arm_vmovlbq_m_s16): Remove.
29747 (__arm_vmovltq_m_s16): Remove.
29748 (__arm_vmovlbq_m_u16): Remove.
29749 (__arm_vmovltq_m_u16): Remove.
29750 (__arm_vmovlbq_x_s8): Remove.
29751 (__arm_vmovlbq_x_s16): Remove.
29752 (__arm_vmovlbq_x_u8): Remove.
29753 (__arm_vmovlbq_x_u16): Remove.
29754 (__arm_vmovltq_x_s8): Remove.
29755 (__arm_vmovltq_x_s16): Remove.
29756 (__arm_vmovltq_x_u8): Remove.
29757 (__arm_vmovltq_x_u16): Remove.
29758 (__arm_vmovlbq): Remove.
29759 (__arm_vmovltq): Remove.
29760 (__arm_vmovlbq_m): Remove.
29761 (__arm_vmovltq_m): Remove.
29762 (__arm_vmovlbq_x): Remove.
29763 (__arm_vmovltq_x): Remove.
29765 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29767 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
29768 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
29770 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29772 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
29773 (VMOVLBQ, VMOVLTQ): Merge into ...
29774 (VMOVLxQ): ... this.
29775 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
29776 (VMOVLxQ_M): ... this.
29777 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
29778 (mve_vmovlbq_<supf><mode>): Merge into ...
29779 (@mve_<mve_insn>q_<supf><mode>): ... this.
29780 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
29782 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
29784 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29786 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
29787 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
29788 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
29789 * config/arm/arm-mve-builtins-functions.h
29790 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
29791 * config/arm/arm_mve.h (vaddlvq): Remove.
29792 (vaddlvq_p): Remove.
29793 (vaddlvq_s32): Remove.
29794 (vaddlvq_u32): Remove.
29795 (vaddlvq_p_s32): Remove.
29796 (vaddlvq_p_u32): Remove.
29797 (__arm_vaddlvq_s32): Remove.
29798 (__arm_vaddlvq_u32): Remove.
29799 (__arm_vaddlvq_p_s32): Remove.
29800 (__arm_vaddlvq_p_u32): Remove.
29801 (__arm_vaddlvq): Remove.
29802 (__arm_vaddlvq_p): Remove.
29804 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29806 * config/arm/iterators.md (mve_insn): Add vaddlv.
29807 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
29808 (@mve_<mve_insn>q_<supf>v4si): ... this.
29809 (mve_vaddlvq_p_<supf>v4si): Rename into ...
29810 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
29812 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29814 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
29815 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
29817 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29819 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
29820 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
29821 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
29822 * config/arm/arm_mve.h (vaddvaq): Remove.
29823 (vaddvaq_p): Remove.
29824 (vaddvaq_u8): Remove.
29825 (vaddvaq_s8): Remove.
29826 (vaddvaq_u16): Remove.
29827 (vaddvaq_s16): Remove.
29828 (vaddvaq_u32): Remove.
29829 (vaddvaq_s32): Remove.
29830 (vaddvaq_p_u8): Remove.
29831 (vaddvaq_p_s8): Remove.
29832 (vaddvaq_p_u16): Remove.
29833 (vaddvaq_p_s16): Remove.
29834 (vaddvaq_p_u32): Remove.
29835 (vaddvaq_p_s32): Remove.
29836 (__arm_vaddvaq_u8): Remove.
29837 (__arm_vaddvaq_s8): Remove.
29838 (__arm_vaddvaq_u16): Remove.
29839 (__arm_vaddvaq_s16): Remove.
29840 (__arm_vaddvaq_u32): Remove.
29841 (__arm_vaddvaq_s32): Remove.
29842 (__arm_vaddvaq_p_u8): Remove.
29843 (__arm_vaddvaq_p_s8): Remove.
29844 (__arm_vaddvaq_p_u16): Remove.
29845 (__arm_vaddvaq_p_s16): Remove.
29846 (__arm_vaddvaq_p_u32): Remove.
29847 (__arm_vaddvaq_p_s32): Remove.
29848 (__arm_vaddvaq): Remove.
29849 (__arm_vaddvaq_p): Remove.
29851 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29853 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
29854 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
29856 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29858 * config/arm/iterators.md (mve_insn): Add vaddva.
29859 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
29860 (@mve_<mve_insn>q_<supf><mode>): ... this.
29861 (mve_vaddvaq_p_<supf><mode>): Rename into ...
29862 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
29864 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29866 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
29867 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
29868 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
29869 * config/arm/arm_mve.h (vaddvq): Remove.
29870 (vaddvq_p): Remove.
29871 (vaddvq_s8): Remove.
29872 (vaddvq_s16): Remove.
29873 (vaddvq_s32): Remove.
29874 (vaddvq_u8): Remove.
29875 (vaddvq_u16): Remove.
29876 (vaddvq_u32): Remove.
29877 (vaddvq_p_u8): Remove.
29878 (vaddvq_p_s8): Remove.
29879 (vaddvq_p_u16): Remove.
29880 (vaddvq_p_s16): Remove.
29881 (vaddvq_p_u32): Remove.
29882 (vaddvq_p_s32): Remove.
29883 (__arm_vaddvq_s8): Remove.
29884 (__arm_vaddvq_s16): Remove.
29885 (__arm_vaddvq_s32): Remove.
29886 (__arm_vaddvq_u8): Remove.
29887 (__arm_vaddvq_u16): Remove.
29888 (__arm_vaddvq_u32): Remove.
29889 (__arm_vaddvq_p_u8): Remove.
29890 (__arm_vaddvq_p_s8): Remove.
29891 (__arm_vaddvq_p_u16): Remove.
29892 (__arm_vaddvq_p_s16): Remove.
29893 (__arm_vaddvq_p_u32): Remove.
29894 (__arm_vaddvq_p_s32): Remove.
29895 (__arm_vaddvq): Remove.
29896 (__arm_vaddvq_p): Remove.
29898 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29900 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
29901 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
29903 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29905 * config/arm/iterators.md (mve_insn): Add vaddv.
29906 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
29907 (@mve_<mve_insn>q_<supf><mode>): ... this.
29908 (mve_vaddvq_p_<supf><mode>): Rename into ...
29909 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
29910 * config/arm/vec-common.md: Use gen_mve_q instead of
29913 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29915 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
29917 * config/arm/arm-mve-builtins-base.def (vdupq): New.
29918 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
29919 * config/arm/arm_mve.h (vdupq_n): Remove.
29921 (vdupq_n_f16): Remove.
29922 (vdupq_n_f32): Remove.
29923 (vdupq_n_s8): Remove.
29924 (vdupq_n_s16): Remove.
29925 (vdupq_n_s32): Remove.
29926 (vdupq_n_u8): Remove.
29927 (vdupq_n_u16): Remove.
29928 (vdupq_n_u32): Remove.
29929 (vdupq_m_n_u8): Remove.
29930 (vdupq_m_n_s8): Remove.
29931 (vdupq_m_n_u16): Remove.
29932 (vdupq_m_n_s16): Remove.
29933 (vdupq_m_n_u32): Remove.
29934 (vdupq_m_n_s32): Remove.
29935 (vdupq_m_n_f16): Remove.
29936 (vdupq_m_n_f32): Remove.
29937 (vdupq_x_n_s8): Remove.
29938 (vdupq_x_n_s16): Remove.
29939 (vdupq_x_n_s32): Remove.
29940 (vdupq_x_n_u8): Remove.
29941 (vdupq_x_n_u16): Remove.
29942 (vdupq_x_n_u32): Remove.
29943 (vdupq_x_n_f16): Remove.
29944 (vdupq_x_n_f32): Remove.
29945 (__arm_vdupq_n_s8): Remove.
29946 (__arm_vdupq_n_s16): Remove.
29947 (__arm_vdupq_n_s32): Remove.
29948 (__arm_vdupq_n_u8): Remove.
29949 (__arm_vdupq_n_u16): Remove.
29950 (__arm_vdupq_n_u32): Remove.
29951 (__arm_vdupq_m_n_u8): Remove.
29952 (__arm_vdupq_m_n_s8): Remove.
29953 (__arm_vdupq_m_n_u16): Remove.
29954 (__arm_vdupq_m_n_s16): Remove.
29955 (__arm_vdupq_m_n_u32): Remove.
29956 (__arm_vdupq_m_n_s32): Remove.
29957 (__arm_vdupq_x_n_s8): Remove.
29958 (__arm_vdupq_x_n_s16): Remove.
29959 (__arm_vdupq_x_n_s32): Remove.
29960 (__arm_vdupq_x_n_u8): Remove.
29961 (__arm_vdupq_x_n_u16): Remove.
29962 (__arm_vdupq_x_n_u32): Remove.
29963 (__arm_vdupq_n_f16): Remove.
29964 (__arm_vdupq_n_f32): Remove.
29965 (__arm_vdupq_m_n_f16): Remove.
29966 (__arm_vdupq_m_n_f32): Remove.
29967 (__arm_vdupq_x_n_f16): Remove.
29968 (__arm_vdupq_x_n_f32): Remove.
29969 (__arm_vdupq_n): Remove.
29970 (__arm_vdupq_m): Remove.
29972 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29974 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
29975 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
29977 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29979 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
29980 (MVE_FP_N_VDUPQ_ONLY): New.
29981 (mve_insn): Add vdupq.
29982 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
29983 (@mve_<mve_insn>q_n_f<mode>): ... this.
29984 (mve_vdupq_n_<supf><mode>): Rename into ...
29985 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29986 (mve_vdupq_m_n_<supf><mode>): Rename into ...
29987 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29988 (mve_vdupq_m_n_f<mode>): Rename into ...
29989 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
29991 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29993 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
29995 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
29997 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
29999 * config/arm/arm_mve.h (vrev16q): Remove.
30002 (vrev64q_m): Remove.
30003 (vrev16q_m): Remove.
30004 (vrev32q_m): Remove.
30005 (vrev16q_x): Remove.
30006 (vrev32q_x): Remove.
30007 (vrev64q_x): Remove.
30008 (vrev64q_f16): Remove.
30009 (vrev64q_f32): Remove.
30010 (vrev32q_f16): Remove.
30011 (vrev16q_s8): Remove.
30012 (vrev32q_s8): Remove.
30013 (vrev32q_s16): Remove.
30014 (vrev64q_s8): Remove.
30015 (vrev64q_s16): Remove.
30016 (vrev64q_s32): Remove.
30017 (vrev64q_u8): Remove.
30018 (vrev64q_u16): Remove.
30019 (vrev64q_u32): Remove.
30020 (vrev32q_u8): Remove.
30021 (vrev32q_u16): Remove.
30022 (vrev16q_u8): Remove.
30023 (vrev64q_m_u8): Remove.
30024 (vrev64q_m_s8): Remove.
30025 (vrev64q_m_u16): Remove.
30026 (vrev64q_m_s16): Remove.
30027 (vrev64q_m_u32): Remove.
30028 (vrev64q_m_s32): Remove.
30029 (vrev16q_m_s8): Remove.
30030 (vrev32q_m_f16): Remove.
30031 (vrev16q_m_u8): Remove.
30032 (vrev32q_m_s8): Remove.
30033 (vrev64q_m_f16): Remove.
30034 (vrev32q_m_u8): Remove.
30035 (vrev32q_m_s16): Remove.
30036 (vrev64q_m_f32): Remove.
30037 (vrev32q_m_u16): Remove.
30038 (vrev16q_x_s8): Remove.
30039 (vrev16q_x_u8): Remove.
30040 (vrev32q_x_s8): Remove.
30041 (vrev32q_x_s16): Remove.
30042 (vrev32q_x_u8): Remove.
30043 (vrev32q_x_u16): Remove.
30044 (vrev64q_x_s8): Remove.
30045 (vrev64q_x_s16): Remove.
30046 (vrev64q_x_s32): Remove.
30047 (vrev64q_x_u8): Remove.
30048 (vrev64q_x_u16): Remove.
30049 (vrev64q_x_u32): Remove.
30050 (vrev32q_x_f16): Remove.
30051 (vrev64q_x_f16): Remove.
30052 (vrev64q_x_f32): Remove.
30053 (__arm_vrev16q_s8): Remove.
30054 (__arm_vrev32q_s8): Remove.
30055 (__arm_vrev32q_s16): Remove.
30056 (__arm_vrev64q_s8): Remove.
30057 (__arm_vrev64q_s16): Remove.
30058 (__arm_vrev64q_s32): Remove.
30059 (__arm_vrev64q_u8): Remove.
30060 (__arm_vrev64q_u16): Remove.
30061 (__arm_vrev64q_u32): Remove.
30062 (__arm_vrev32q_u8): Remove.
30063 (__arm_vrev32q_u16): Remove.
30064 (__arm_vrev16q_u8): Remove.
30065 (__arm_vrev64q_m_u8): Remove.
30066 (__arm_vrev64q_m_s8): Remove.
30067 (__arm_vrev64q_m_u16): Remove.
30068 (__arm_vrev64q_m_s16): Remove.
30069 (__arm_vrev64q_m_u32): Remove.
30070 (__arm_vrev64q_m_s32): Remove.
30071 (__arm_vrev16q_m_s8): Remove.
30072 (__arm_vrev16q_m_u8): Remove.
30073 (__arm_vrev32q_m_s8): Remove.
30074 (__arm_vrev32q_m_u8): Remove.
30075 (__arm_vrev32q_m_s16): Remove.
30076 (__arm_vrev32q_m_u16): Remove.
30077 (__arm_vrev16q_x_s8): Remove.
30078 (__arm_vrev16q_x_u8): Remove.
30079 (__arm_vrev32q_x_s8): Remove.
30080 (__arm_vrev32q_x_s16): Remove.
30081 (__arm_vrev32q_x_u8): Remove.
30082 (__arm_vrev32q_x_u16): Remove.
30083 (__arm_vrev64q_x_s8): Remove.
30084 (__arm_vrev64q_x_s16): Remove.
30085 (__arm_vrev64q_x_s32): Remove.
30086 (__arm_vrev64q_x_u8): Remove.
30087 (__arm_vrev64q_x_u16): Remove.
30088 (__arm_vrev64q_x_u32): Remove.
30089 (__arm_vrev64q_f16): Remove.
30090 (__arm_vrev64q_f32): Remove.
30091 (__arm_vrev32q_f16): Remove.
30092 (__arm_vrev32q_m_f16): Remove.
30093 (__arm_vrev64q_m_f16): Remove.
30094 (__arm_vrev64q_m_f32): Remove.
30095 (__arm_vrev32q_x_f16): Remove.
30096 (__arm_vrev64q_x_f16): Remove.
30097 (__arm_vrev64q_x_f32): Remove.
30098 (__arm_vrev16q): Remove.
30099 (__arm_vrev32q): Remove.
30100 (__arm_vrev64q): Remove.
30101 (__arm_vrev64q_m): Remove.
30102 (__arm_vrev16q_m): Remove.
30103 (__arm_vrev32q_m): Remove.
30104 (__arm_vrev16q_x): Remove.
30105 (__arm_vrev32q_x): Remove.
30106 (__arm_vrev64q_x): Remove.
30108 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30110 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
30111 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
30112 (MVE_FP_M_VREV32Q_ONLY): New iterators.
30113 (mve_insn): Add vrev16q, vrev32q, vrev64q.
30114 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
30115 (@mve_<mve_insn>q_f<mode>): ... this
30116 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
30117 (mve_vrev64q_<supf><mode>): Rename into ...
30118 (@mve_<mve_insn>q_<supf><mode>): ... this.
30119 (mve_vrev32q_<supf><mode>): Rename into
30120 @mve_<mve_insn>q_<supf><mode>.
30121 (mve_vrev16q_<supf>v16qi): Rename into
30122 @mve_<mve_insn>q_<supf><mode>.
30123 (mve_vrev64q_m_<supf><mode>): Rename into
30124 @mve_<mve_insn>q_m_<supf><mode>.
30125 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
30126 (mve_vrev32q_m_<supf><mode>): Rename into
30127 @mve_<mve_insn>q_m_<supf><mode>.
30128 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
30129 (mve_vrev16q_m_<supf>v16qi): Rename into
30130 @mve_<mve_insn>q_m_<supf><mode>.
30132 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30134 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
30135 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
30136 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
30137 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
30138 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
30139 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
30140 * config/arm/arm-mve-builtins-functions.h (class
30141 unspec_based_mve_function_exact_insn_vcmp): New.
30142 * config/arm/arm-mve-builtins.cc
30143 (function_instance::has_inactive_argument): Handle vcmp.
30144 * config/arm/arm_mve.h (vcmpneq): Remove.
30152 (vcmpneq_m): Remove.
30153 (vcmphiq_m): Remove.
30154 (vcmpeqq_m): Remove.
30155 (vcmpcsq_m): Remove.
30156 (vcmpcsq_m_n): Remove.
30157 (vcmpltq_m): Remove.
30158 (vcmpleq_m): Remove.
30159 (vcmpgtq_m): Remove.
30160 (vcmpgeq_m): Remove.
30161 (vcmpneq_s8): Remove.
30162 (vcmpneq_s16): Remove.
30163 (vcmpneq_s32): Remove.
30164 (vcmpneq_u8): Remove.
30165 (vcmpneq_u16): Remove.
30166 (vcmpneq_u32): Remove.
30167 (vcmpneq_n_u8): Remove.
30168 (vcmphiq_u8): Remove.
30169 (vcmphiq_n_u8): Remove.
30170 (vcmpeqq_u8): Remove.
30171 (vcmpeqq_n_u8): Remove.
30172 (vcmpcsq_u8): Remove.
30173 (vcmpcsq_n_u8): Remove.
30174 (vcmpneq_n_s8): Remove.
30175 (vcmpltq_s8): Remove.
30176 (vcmpltq_n_s8): Remove.
30177 (vcmpleq_s8): Remove.
30178 (vcmpleq_n_s8): Remove.
30179 (vcmpgtq_s8): Remove.
30180 (vcmpgtq_n_s8): Remove.
30181 (vcmpgeq_s8): Remove.
30182 (vcmpgeq_n_s8): Remove.
30183 (vcmpeqq_s8): Remove.
30184 (vcmpeqq_n_s8): Remove.
30185 (vcmpneq_n_u16): Remove.
30186 (vcmphiq_u16): Remove.
30187 (vcmphiq_n_u16): Remove.
30188 (vcmpeqq_u16): Remove.
30189 (vcmpeqq_n_u16): Remove.
30190 (vcmpcsq_u16): Remove.
30191 (vcmpcsq_n_u16): Remove.
30192 (vcmpneq_n_s16): Remove.
30193 (vcmpltq_s16): Remove.
30194 (vcmpltq_n_s16): Remove.
30195 (vcmpleq_s16): Remove.
30196 (vcmpleq_n_s16): Remove.
30197 (vcmpgtq_s16): Remove.
30198 (vcmpgtq_n_s16): Remove.
30199 (vcmpgeq_s16): Remove.
30200 (vcmpgeq_n_s16): Remove.
30201 (vcmpeqq_s16): Remove.
30202 (vcmpeqq_n_s16): Remove.
30203 (vcmpneq_n_u32): Remove.
30204 (vcmphiq_u32): Remove.
30205 (vcmphiq_n_u32): Remove.
30206 (vcmpeqq_u32): Remove.
30207 (vcmpeqq_n_u32): Remove.
30208 (vcmpcsq_u32): Remove.
30209 (vcmpcsq_n_u32): Remove.
30210 (vcmpneq_n_s32): Remove.
30211 (vcmpltq_s32): Remove.
30212 (vcmpltq_n_s32): Remove.
30213 (vcmpleq_s32): Remove.
30214 (vcmpleq_n_s32): Remove.
30215 (vcmpgtq_s32): Remove.
30216 (vcmpgtq_n_s32): Remove.
30217 (vcmpgeq_s32): Remove.
30218 (vcmpgeq_n_s32): Remove.
30219 (vcmpeqq_s32): Remove.
30220 (vcmpeqq_n_s32): Remove.
30221 (vcmpneq_n_f16): Remove.
30222 (vcmpneq_f16): Remove.
30223 (vcmpltq_n_f16): Remove.
30224 (vcmpltq_f16): Remove.
30225 (vcmpleq_n_f16): Remove.
30226 (vcmpleq_f16): Remove.
30227 (vcmpgtq_n_f16): Remove.
30228 (vcmpgtq_f16): Remove.
30229 (vcmpgeq_n_f16): Remove.
30230 (vcmpgeq_f16): Remove.
30231 (vcmpeqq_n_f16): Remove.
30232 (vcmpeqq_f16): Remove.
30233 (vcmpneq_n_f32): Remove.
30234 (vcmpneq_f32): Remove.
30235 (vcmpltq_n_f32): Remove.
30236 (vcmpltq_f32): Remove.
30237 (vcmpleq_n_f32): Remove.
30238 (vcmpleq_f32): Remove.
30239 (vcmpgtq_n_f32): Remove.
30240 (vcmpgtq_f32): Remove.
30241 (vcmpgeq_n_f32): Remove.
30242 (vcmpgeq_f32): Remove.
30243 (vcmpeqq_n_f32): Remove.
30244 (vcmpeqq_f32): Remove.
30245 (vcmpeqq_m_f16): Remove.
30246 (vcmpeqq_m_f32): Remove.
30247 (vcmpneq_m_u8): Remove.
30248 (vcmpneq_m_n_u8): Remove.
30249 (vcmphiq_m_u8): Remove.
30250 (vcmphiq_m_n_u8): Remove.
30251 (vcmpeqq_m_u8): Remove.
30252 (vcmpeqq_m_n_u8): Remove.
30253 (vcmpcsq_m_u8): Remove.
30254 (vcmpcsq_m_n_u8): Remove.
30255 (vcmpneq_m_s8): Remove.
30256 (vcmpneq_m_n_s8): Remove.
30257 (vcmpltq_m_s8): Remove.
30258 (vcmpltq_m_n_s8): Remove.
30259 (vcmpleq_m_s8): Remove.
30260 (vcmpleq_m_n_s8): Remove.
30261 (vcmpgtq_m_s8): Remove.
30262 (vcmpgtq_m_n_s8): Remove.
30263 (vcmpgeq_m_s8): Remove.
30264 (vcmpgeq_m_n_s8): Remove.
30265 (vcmpeqq_m_s8): Remove.
30266 (vcmpeqq_m_n_s8): Remove.
30267 (vcmpneq_m_u16): Remove.
30268 (vcmpneq_m_n_u16): Remove.
30269 (vcmphiq_m_u16): Remove.
30270 (vcmphiq_m_n_u16): Remove.
30271 (vcmpeqq_m_u16): Remove.
30272 (vcmpeqq_m_n_u16): Remove.
30273 (vcmpcsq_m_u16): Remove.
30274 (vcmpcsq_m_n_u16): Remove.
30275 (vcmpneq_m_s16): Remove.
30276 (vcmpneq_m_n_s16): Remove.
30277 (vcmpltq_m_s16): Remove.
30278 (vcmpltq_m_n_s16): Remove.
30279 (vcmpleq_m_s16): Remove.
30280 (vcmpleq_m_n_s16): Remove.
30281 (vcmpgtq_m_s16): Remove.
30282 (vcmpgtq_m_n_s16): Remove.
30283 (vcmpgeq_m_s16): Remove.
30284 (vcmpgeq_m_n_s16): Remove.
30285 (vcmpeqq_m_s16): Remove.
30286 (vcmpeqq_m_n_s16): Remove.
30287 (vcmpneq_m_u32): Remove.
30288 (vcmpneq_m_n_u32): Remove.
30289 (vcmphiq_m_u32): Remove.
30290 (vcmphiq_m_n_u32): Remove.
30291 (vcmpeqq_m_u32): Remove.
30292 (vcmpeqq_m_n_u32): Remove.
30293 (vcmpcsq_m_u32): Remove.
30294 (vcmpcsq_m_n_u32): Remove.
30295 (vcmpneq_m_s32): Remove.
30296 (vcmpneq_m_n_s32): Remove.
30297 (vcmpltq_m_s32): Remove.
30298 (vcmpltq_m_n_s32): Remove.
30299 (vcmpleq_m_s32): Remove.
30300 (vcmpleq_m_n_s32): Remove.
30301 (vcmpgtq_m_s32): Remove.
30302 (vcmpgtq_m_n_s32): Remove.
30303 (vcmpgeq_m_s32): Remove.
30304 (vcmpgeq_m_n_s32): Remove.
30305 (vcmpeqq_m_s32): Remove.
30306 (vcmpeqq_m_n_s32): Remove.
30307 (vcmpeqq_m_n_f16): Remove.
30308 (vcmpgeq_m_f16): Remove.
30309 (vcmpgeq_m_n_f16): Remove.
30310 (vcmpgtq_m_f16): Remove.
30311 (vcmpgtq_m_n_f16): Remove.
30312 (vcmpleq_m_f16): Remove.
30313 (vcmpleq_m_n_f16): Remove.
30314 (vcmpltq_m_f16): Remove.
30315 (vcmpltq_m_n_f16): Remove.
30316 (vcmpneq_m_f16): Remove.
30317 (vcmpneq_m_n_f16): Remove.
30318 (vcmpeqq_m_n_f32): Remove.
30319 (vcmpgeq_m_f32): Remove.
30320 (vcmpgeq_m_n_f32): Remove.
30321 (vcmpgtq_m_f32): Remove.
30322 (vcmpgtq_m_n_f32): Remove.
30323 (vcmpleq_m_f32): Remove.
30324 (vcmpleq_m_n_f32): Remove.
30325 (vcmpltq_m_f32): Remove.
30326 (vcmpltq_m_n_f32): Remove.
30327 (vcmpneq_m_f32): Remove.
30328 (vcmpneq_m_n_f32): Remove.
30329 (__arm_vcmpneq_s8): Remove.
30330 (__arm_vcmpneq_s16): Remove.
30331 (__arm_vcmpneq_s32): Remove.
30332 (__arm_vcmpneq_u8): Remove.
30333 (__arm_vcmpneq_u16): Remove.
30334 (__arm_vcmpneq_u32): Remove.
30335 (__arm_vcmpneq_n_u8): Remove.
30336 (__arm_vcmphiq_u8): Remove.
30337 (__arm_vcmphiq_n_u8): Remove.
30338 (__arm_vcmpeqq_u8): Remove.
30339 (__arm_vcmpeqq_n_u8): Remove.
30340 (__arm_vcmpcsq_u8): Remove.
30341 (__arm_vcmpcsq_n_u8): Remove.
30342 (__arm_vcmpneq_n_s8): Remove.
30343 (__arm_vcmpltq_s8): Remove.
30344 (__arm_vcmpltq_n_s8): Remove.
30345 (__arm_vcmpleq_s8): Remove.
30346 (__arm_vcmpleq_n_s8): Remove.
30347 (__arm_vcmpgtq_s8): Remove.
30348 (__arm_vcmpgtq_n_s8): Remove.
30349 (__arm_vcmpgeq_s8): Remove.
30350 (__arm_vcmpgeq_n_s8): Remove.
30351 (__arm_vcmpeqq_s8): Remove.
30352 (__arm_vcmpeqq_n_s8): Remove.
30353 (__arm_vcmpneq_n_u16): Remove.
30354 (__arm_vcmphiq_u16): Remove.
30355 (__arm_vcmphiq_n_u16): Remove.
30356 (__arm_vcmpeqq_u16): Remove.
30357 (__arm_vcmpeqq_n_u16): Remove.
30358 (__arm_vcmpcsq_u16): Remove.
30359 (__arm_vcmpcsq_n_u16): Remove.
30360 (__arm_vcmpneq_n_s16): Remove.
30361 (__arm_vcmpltq_s16): Remove.
30362 (__arm_vcmpltq_n_s16): Remove.
30363 (__arm_vcmpleq_s16): Remove.
30364 (__arm_vcmpleq_n_s16): Remove.
30365 (__arm_vcmpgtq_s16): Remove.
30366 (__arm_vcmpgtq_n_s16): Remove.
30367 (__arm_vcmpgeq_s16): Remove.
30368 (__arm_vcmpgeq_n_s16): Remove.
30369 (__arm_vcmpeqq_s16): Remove.
30370 (__arm_vcmpeqq_n_s16): Remove.
30371 (__arm_vcmpneq_n_u32): Remove.
30372 (__arm_vcmphiq_u32): Remove.
30373 (__arm_vcmphiq_n_u32): Remove.
30374 (__arm_vcmpeqq_u32): Remove.
30375 (__arm_vcmpeqq_n_u32): Remove.
30376 (__arm_vcmpcsq_u32): Remove.
30377 (__arm_vcmpcsq_n_u32): Remove.
30378 (__arm_vcmpneq_n_s32): Remove.
30379 (__arm_vcmpltq_s32): Remove.
30380 (__arm_vcmpltq_n_s32): Remove.
30381 (__arm_vcmpleq_s32): Remove.
30382 (__arm_vcmpleq_n_s32): Remove.
30383 (__arm_vcmpgtq_s32): Remove.
30384 (__arm_vcmpgtq_n_s32): Remove.
30385 (__arm_vcmpgeq_s32): Remove.
30386 (__arm_vcmpgeq_n_s32): Remove.
30387 (__arm_vcmpeqq_s32): Remove.
30388 (__arm_vcmpeqq_n_s32): Remove.
30389 (__arm_vcmpneq_m_u8): Remove.
30390 (__arm_vcmpneq_m_n_u8): Remove.
30391 (__arm_vcmphiq_m_u8): Remove.
30392 (__arm_vcmphiq_m_n_u8): Remove.
30393 (__arm_vcmpeqq_m_u8): Remove.
30394 (__arm_vcmpeqq_m_n_u8): Remove.
30395 (__arm_vcmpcsq_m_u8): Remove.
30396 (__arm_vcmpcsq_m_n_u8): Remove.
30397 (__arm_vcmpneq_m_s8): Remove.
30398 (__arm_vcmpneq_m_n_s8): Remove.
30399 (__arm_vcmpltq_m_s8): Remove.
30400 (__arm_vcmpltq_m_n_s8): Remove.
30401 (__arm_vcmpleq_m_s8): Remove.
30402 (__arm_vcmpleq_m_n_s8): Remove.
30403 (__arm_vcmpgtq_m_s8): Remove.
30404 (__arm_vcmpgtq_m_n_s8): Remove.
30405 (__arm_vcmpgeq_m_s8): Remove.
30406 (__arm_vcmpgeq_m_n_s8): Remove.
30407 (__arm_vcmpeqq_m_s8): Remove.
30408 (__arm_vcmpeqq_m_n_s8): Remove.
30409 (__arm_vcmpneq_m_u16): Remove.
30410 (__arm_vcmpneq_m_n_u16): Remove.
30411 (__arm_vcmphiq_m_u16): Remove.
30412 (__arm_vcmphiq_m_n_u16): Remove.
30413 (__arm_vcmpeqq_m_u16): Remove.
30414 (__arm_vcmpeqq_m_n_u16): Remove.
30415 (__arm_vcmpcsq_m_u16): Remove.
30416 (__arm_vcmpcsq_m_n_u16): Remove.
30417 (__arm_vcmpneq_m_s16): Remove.
30418 (__arm_vcmpneq_m_n_s16): Remove.
30419 (__arm_vcmpltq_m_s16): Remove.
30420 (__arm_vcmpltq_m_n_s16): Remove.
30421 (__arm_vcmpleq_m_s16): Remove.
30422 (__arm_vcmpleq_m_n_s16): Remove.
30423 (__arm_vcmpgtq_m_s16): Remove.
30424 (__arm_vcmpgtq_m_n_s16): Remove.
30425 (__arm_vcmpgeq_m_s16): Remove.
30426 (__arm_vcmpgeq_m_n_s16): Remove.
30427 (__arm_vcmpeqq_m_s16): Remove.
30428 (__arm_vcmpeqq_m_n_s16): Remove.
30429 (__arm_vcmpneq_m_u32): Remove.
30430 (__arm_vcmpneq_m_n_u32): Remove.
30431 (__arm_vcmphiq_m_u32): Remove.
30432 (__arm_vcmphiq_m_n_u32): Remove.
30433 (__arm_vcmpeqq_m_u32): Remove.
30434 (__arm_vcmpeqq_m_n_u32): Remove.
30435 (__arm_vcmpcsq_m_u32): Remove.
30436 (__arm_vcmpcsq_m_n_u32): Remove.
30437 (__arm_vcmpneq_m_s32): Remove.
30438 (__arm_vcmpneq_m_n_s32): Remove.
30439 (__arm_vcmpltq_m_s32): Remove.
30440 (__arm_vcmpltq_m_n_s32): Remove.
30441 (__arm_vcmpleq_m_s32): Remove.
30442 (__arm_vcmpleq_m_n_s32): Remove.
30443 (__arm_vcmpgtq_m_s32): Remove.
30444 (__arm_vcmpgtq_m_n_s32): Remove.
30445 (__arm_vcmpgeq_m_s32): Remove.
30446 (__arm_vcmpgeq_m_n_s32): Remove.
30447 (__arm_vcmpeqq_m_s32): Remove.
30448 (__arm_vcmpeqq_m_n_s32): Remove.
30449 (__arm_vcmpneq_n_f16): Remove.
30450 (__arm_vcmpneq_f16): Remove.
30451 (__arm_vcmpltq_n_f16): Remove.
30452 (__arm_vcmpltq_f16): Remove.
30453 (__arm_vcmpleq_n_f16): Remove.
30454 (__arm_vcmpleq_f16): Remove.
30455 (__arm_vcmpgtq_n_f16): Remove.
30456 (__arm_vcmpgtq_f16): Remove.
30457 (__arm_vcmpgeq_n_f16): Remove.
30458 (__arm_vcmpgeq_f16): Remove.
30459 (__arm_vcmpeqq_n_f16): Remove.
30460 (__arm_vcmpeqq_f16): Remove.
30461 (__arm_vcmpneq_n_f32): Remove.
30462 (__arm_vcmpneq_f32): Remove.
30463 (__arm_vcmpltq_n_f32): Remove.
30464 (__arm_vcmpltq_f32): Remove.
30465 (__arm_vcmpleq_n_f32): Remove.
30466 (__arm_vcmpleq_f32): Remove.
30467 (__arm_vcmpgtq_n_f32): Remove.
30468 (__arm_vcmpgtq_f32): Remove.
30469 (__arm_vcmpgeq_n_f32): Remove.
30470 (__arm_vcmpgeq_f32): Remove.
30471 (__arm_vcmpeqq_n_f32): Remove.
30472 (__arm_vcmpeqq_f32): Remove.
30473 (__arm_vcmpeqq_m_f16): Remove.
30474 (__arm_vcmpeqq_m_f32): Remove.
30475 (__arm_vcmpeqq_m_n_f16): Remove.
30476 (__arm_vcmpgeq_m_f16): Remove.
30477 (__arm_vcmpgeq_m_n_f16): Remove.
30478 (__arm_vcmpgtq_m_f16): Remove.
30479 (__arm_vcmpgtq_m_n_f16): Remove.
30480 (__arm_vcmpleq_m_f16): Remove.
30481 (__arm_vcmpleq_m_n_f16): Remove.
30482 (__arm_vcmpltq_m_f16): Remove.
30483 (__arm_vcmpltq_m_n_f16): Remove.
30484 (__arm_vcmpneq_m_f16): Remove.
30485 (__arm_vcmpneq_m_n_f16): Remove.
30486 (__arm_vcmpeqq_m_n_f32): Remove.
30487 (__arm_vcmpgeq_m_f32): Remove.
30488 (__arm_vcmpgeq_m_n_f32): Remove.
30489 (__arm_vcmpgtq_m_f32): Remove.
30490 (__arm_vcmpgtq_m_n_f32): Remove.
30491 (__arm_vcmpleq_m_f32): Remove.
30492 (__arm_vcmpleq_m_n_f32): Remove.
30493 (__arm_vcmpltq_m_f32): Remove.
30494 (__arm_vcmpltq_m_n_f32): Remove.
30495 (__arm_vcmpneq_m_f32): Remove.
30496 (__arm_vcmpneq_m_n_f32): Remove.
30497 (__arm_vcmpneq): Remove.
30498 (__arm_vcmphiq): Remove.
30499 (__arm_vcmpeqq): Remove.
30500 (__arm_vcmpcsq): Remove.
30501 (__arm_vcmpltq): Remove.
30502 (__arm_vcmpleq): Remove.
30503 (__arm_vcmpgtq): Remove.
30504 (__arm_vcmpgeq): Remove.
30505 (__arm_vcmpneq_m): Remove.
30506 (__arm_vcmphiq_m): Remove.
30507 (__arm_vcmpeqq_m): Remove.
30508 (__arm_vcmpcsq_m): Remove.
30509 (__arm_vcmpltq_m): Remove.
30510 (__arm_vcmpleq_m): Remove.
30511 (__arm_vcmpgtq_m): Remove.
30512 (__arm_vcmpgeq_m): Remove.
30514 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30516 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
30517 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
30519 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30521 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
30522 (MVE_CMP_M_N_F, mve_cmp_op1): New.
30525 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
30526 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
30527 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
30528 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
30529 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
30530 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
30531 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
30532 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
30533 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
30534 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
30536 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
30537 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
30538 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
30539 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
30540 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
30542 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
30543 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
30544 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
30545 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
30546 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
30548 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
30550 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
30551 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
30552 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
30555 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
30557 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
30558 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
30559 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
30560 Simplify parity(rotate(x,y)) as parity(x).
30562 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30564 * config/riscv/autovec.md (@vec_series<mode>): New pattern
30565 * config/riscv/riscv-protos.h (expand_vec_series): New function.
30566 * config/riscv/riscv-v.cc (emit_binop): Ditto.
30567 (emit_index_op): Ditto.
30568 (expand_vec_series): Ditto.
30569 (expand_const_vector): Add series vector handling.
30570 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
30572 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
30574 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
30575 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
30576 (*concat<mode><dwi>3_2): Likewise.
30577 (*concat<mode><dwi>3_3): Likewise.
30578 (*concat<mode><dwi>3_4): Likewise.
30579 (*concat<mode><dwi>3_5): Likewise.
30580 (*concat<mode><dwi>3_6): Likewise.
30581 (*concat<mode><dwi>3_7): Likewise.
30583 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
30586 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
30587 (<insn>v4qiv4hi2): New expander.
30588 (<insn>v2hiv2si2): Ditto.
30589 (<insn>v2qiv2si2): Ditto.
30590 (<insn>v2qiv2hi2): Ditto.
30592 2023-05-10 Jeff Law <jlaw@ventanamicro>
30594 * config/h8300/constraints.md (Q): Make this a special memory
30598 2023-05-10 Jakub Jelinek <jakub@redhat.com>
30601 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
30602 if t is void_list_node.
30604 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30606 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
30607 (aarch64_sqmovun<mode>_insn_be): Delete.
30608 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
30609 (aarch64_sqmovun<mode>): Delete expander.
30611 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30614 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
30616 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
30617 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
30618 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
30620 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30623 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
30625 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
30626 (aarch64_<sur>qadd<mode>): Rename to...
30627 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
30629 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30631 * config/aarch64/aarch64-simd.md
30632 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
30633 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
30634 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
30635 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
30637 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30640 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
30641 (aarch64_xtn<mode>_insn_be): Likewise.
30642 (trunc<mode><Vnarrowq>2): Rename to...
30643 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
30644 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
30645 (aarch64_<su>qmovn<mode>): Likewise.
30646 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
30647 (aarch64_<su>qmovn<mode>_insn_le): Delete.
30648 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
30650 2023-05-10 Li Xu <xuli1@eswincomputing.com>
30652 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
30653 intruction replace null avl with (const_int 0).
30655 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30657 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
30660 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30663 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
30664 (source_equal_p): Fix dead loop in vsetvl avl checking.
30666 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
30668 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
30669 of modeadjusted_dccr.
30671 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30673 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
30674 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
30675 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
30676 * config/arm/arm-mve-builtins.cc
30677 (function_instance::has_inactive_argument): Handle vmaxaq and
30679 * config/arm/arm_mve.h (vminaq): Remove.
30681 (vminaq_m): Remove.
30682 (vmaxaq_m): Remove.
30683 (vminaq_s8): Remove.
30684 (vmaxaq_s8): Remove.
30685 (vminaq_s16): Remove.
30686 (vmaxaq_s16): Remove.
30687 (vminaq_s32): Remove.
30688 (vmaxaq_s32): Remove.
30689 (vminaq_m_s8): Remove.
30690 (vmaxaq_m_s8): Remove.
30691 (vminaq_m_s16): Remove.
30692 (vmaxaq_m_s16): Remove.
30693 (vminaq_m_s32): Remove.
30694 (vmaxaq_m_s32): Remove.
30695 (__arm_vminaq_s8): Remove.
30696 (__arm_vmaxaq_s8): Remove.
30697 (__arm_vminaq_s16): Remove.
30698 (__arm_vmaxaq_s16): Remove.
30699 (__arm_vminaq_s32): Remove.
30700 (__arm_vmaxaq_s32): Remove.
30701 (__arm_vminaq_m_s8): Remove.
30702 (__arm_vmaxaq_m_s8): Remove.
30703 (__arm_vminaq_m_s16): Remove.
30704 (__arm_vmaxaq_m_s16): Remove.
30705 (__arm_vminaq_m_s32): Remove.
30706 (__arm_vmaxaq_m_s32): Remove.
30707 (__arm_vminaq): Remove.
30708 (__arm_vmaxaq): Remove.
30709 (__arm_vminaq_m): Remove.
30710 (__arm_vmaxaq_m): Remove.
30712 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30714 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
30716 (mve_insn): Add vmaxa, vmina.
30717 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
30718 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
30720 (@mve_<mve_insn>q_<supf><mode>): ... this.
30721 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
30722 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
30724 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30726 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
30727 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
30729 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30731 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
30732 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
30733 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
30734 * config/arm/arm-mve-builtins.cc
30735 (function_instance::has_inactive_argument): Handle vmaxnmaq and
30737 * config/arm/arm_mve.h (vminnmaq): Remove.
30738 (vmaxnmaq): Remove.
30739 (vmaxnmaq_m): Remove.
30740 (vminnmaq_m): Remove.
30741 (vminnmaq_f16): Remove.
30742 (vmaxnmaq_f16): Remove.
30743 (vminnmaq_f32): Remove.
30744 (vmaxnmaq_f32): Remove.
30745 (vmaxnmaq_m_f16): Remove.
30746 (vminnmaq_m_f16): Remove.
30747 (vmaxnmaq_m_f32): Remove.
30748 (vminnmaq_m_f32): Remove.
30749 (__arm_vminnmaq_f16): Remove.
30750 (__arm_vmaxnmaq_f16): Remove.
30751 (__arm_vminnmaq_f32): Remove.
30752 (__arm_vmaxnmaq_f32): Remove.
30753 (__arm_vmaxnmaq_m_f16): Remove.
30754 (__arm_vminnmaq_m_f16): Remove.
30755 (__arm_vmaxnmaq_m_f32): Remove.
30756 (__arm_vminnmaq_m_f32): Remove.
30757 (__arm_vminnmaq): Remove.
30758 (__arm_vmaxnmaq): Remove.
30759 (__arm_vmaxnmaq_m): Remove.
30760 (__arm_vminnmaq_m): Remove.
30762 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30764 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
30765 (MVE_VMAXNMA_VMINNMAQ_M): New.
30766 (mve_insn): Add vmaxnma, vminnma.
30767 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
30769 (@mve_<mve_insn>q_f<mode>): ... this.
30770 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
30771 (@mve_<mve_insn>q_m_f<mode>): ... this.
30773 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30775 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
30776 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
30777 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
30778 (vminnmavq, vminnmvq): New.
30779 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
30780 (vminnmavq, vminnmvq): New.
30781 * config/arm/arm_mve.h (vminnmvq): Remove.
30782 (vminnmavq): Remove.
30783 (vmaxnmvq): Remove.
30784 (vmaxnmavq): Remove.
30785 (vmaxnmavq_p): Remove.
30786 (vmaxnmvq_p): Remove.
30787 (vminnmavq_p): Remove.
30788 (vminnmvq_p): Remove.
30789 (vminnmvq_f16): Remove.
30790 (vminnmavq_f16): Remove.
30791 (vmaxnmvq_f16): Remove.
30792 (vmaxnmavq_f16): Remove.
30793 (vminnmvq_f32): Remove.
30794 (vminnmavq_f32): Remove.
30795 (vmaxnmvq_f32): Remove.
30796 (vmaxnmavq_f32): Remove.
30797 (vmaxnmavq_p_f16): Remove.
30798 (vmaxnmvq_p_f16): Remove.
30799 (vminnmavq_p_f16): Remove.
30800 (vminnmvq_p_f16): Remove.
30801 (vmaxnmavq_p_f32): Remove.
30802 (vmaxnmvq_p_f32): Remove.
30803 (vminnmavq_p_f32): Remove.
30804 (vminnmvq_p_f32): Remove.
30805 (__arm_vminnmvq_f16): Remove.
30806 (__arm_vminnmavq_f16): Remove.
30807 (__arm_vmaxnmvq_f16): Remove.
30808 (__arm_vmaxnmavq_f16): Remove.
30809 (__arm_vminnmvq_f32): Remove.
30810 (__arm_vminnmavq_f32): Remove.
30811 (__arm_vmaxnmvq_f32): Remove.
30812 (__arm_vmaxnmavq_f32): Remove.
30813 (__arm_vmaxnmavq_p_f16): Remove.
30814 (__arm_vmaxnmvq_p_f16): Remove.
30815 (__arm_vminnmavq_p_f16): Remove.
30816 (__arm_vminnmvq_p_f16): Remove.
30817 (__arm_vmaxnmavq_p_f32): Remove.
30818 (__arm_vmaxnmvq_p_f32): Remove.
30819 (__arm_vminnmavq_p_f32): Remove.
30820 (__arm_vminnmvq_p_f32): Remove.
30821 (__arm_vminnmvq): Remove.
30822 (__arm_vminnmavq): Remove.
30823 (__arm_vmaxnmvq): Remove.
30824 (__arm_vmaxnmavq): Remove.
30825 (__arm_vmaxnmavq_p): Remove.
30826 (__arm_vmaxnmvq_p): Remove.
30827 (__arm_vminnmavq_p): Remove.
30828 (__arm_vminnmvq_p): Remove.
30829 (__arm_vmaxnmavq_m): Remove.
30830 (__arm_vmaxnmvq_m): Remove.
30832 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30834 * config/arm/arm-mve-builtins-functions.h
30835 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
30837 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30839 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
30840 (MVE_VMAXNMxV_MINNMxVQ_P): New.
30841 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
30842 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
30843 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
30844 (@mve_<mve_insn>q_f<mode>): ... this.
30845 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
30846 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
30847 (@mve_<mve_insn>q_p_f<mode>): ... this.
30849 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30851 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
30852 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
30853 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
30854 * config/arm/arm_mve.h (vminnmq): Remove.
30856 (vmaxnmq_m): Remove.
30857 (vminnmq_m): Remove.
30858 (vminnmq_x): Remove.
30859 (vmaxnmq_x): Remove.
30860 (vminnmq_f16): Remove.
30861 (vmaxnmq_f16): Remove.
30862 (vminnmq_f32): Remove.
30863 (vmaxnmq_f32): Remove.
30864 (vmaxnmq_m_f32): Remove.
30865 (vmaxnmq_m_f16): Remove.
30866 (vminnmq_m_f32): Remove.
30867 (vminnmq_m_f16): Remove.
30868 (vminnmq_x_f16): Remove.
30869 (vminnmq_x_f32): Remove.
30870 (vmaxnmq_x_f16): Remove.
30871 (vmaxnmq_x_f32): Remove.
30872 (__arm_vminnmq_f16): Remove.
30873 (__arm_vmaxnmq_f16): Remove.
30874 (__arm_vminnmq_f32): Remove.
30875 (__arm_vmaxnmq_f32): Remove.
30876 (__arm_vmaxnmq_m_f32): Remove.
30877 (__arm_vmaxnmq_m_f16): Remove.
30878 (__arm_vminnmq_m_f32): Remove.
30879 (__arm_vminnmq_m_f16): Remove.
30880 (__arm_vminnmq_x_f16): Remove.
30881 (__arm_vminnmq_x_f32): Remove.
30882 (__arm_vmaxnmq_x_f16): Remove.
30883 (__arm_vmaxnmq_x_f32): Remove.
30884 (__arm_vminnmq): Remove.
30885 (__arm_vmaxnmq): Remove.
30886 (__arm_vmaxnmq_m): Remove.
30887 (__arm_vminnmq_m): Remove.
30888 (__arm_vminnmq_x): Remove.
30889 (__arm_vmaxnmq_x): Remove.
30891 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30893 * config/arm/iterators.md (MAX_MIN_F): New.
30894 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
30895 (mve_insn): Add vmaxnm, vminnm.
30896 (max_min_f_str): New.
30897 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
30899 (@mve_<max_min_f_str>q_f<mode>): ... this.
30900 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
30901 (@mve_<mve_insn>q_m_f<mode>): ... this.
30903 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30905 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
30906 (smax<mode>3): Likewise.
30908 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30910 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
30911 (FUNCTION_PRED_P_S): New.
30912 (vmaxavq, vminavq, vmaxvq, vminvq): New.
30913 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
30915 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
30917 * config/arm/arm_mve.h (vminvq): Remove.
30919 (vminvq_p): Remove.
30920 (vmaxvq_p): Remove.
30921 (vminvq_u8): Remove.
30922 (vmaxvq_u8): Remove.
30923 (vminvq_s8): Remove.
30924 (vmaxvq_s8): Remove.
30925 (vminvq_u16): Remove.
30926 (vmaxvq_u16): Remove.
30927 (vminvq_s16): Remove.
30928 (vmaxvq_s16): Remove.
30929 (vminvq_u32): Remove.
30930 (vmaxvq_u32): Remove.
30931 (vminvq_s32): Remove.
30932 (vmaxvq_s32): Remove.
30933 (vminvq_p_u8): Remove.
30934 (vmaxvq_p_u8): Remove.
30935 (vminvq_p_s8): Remove.
30936 (vmaxvq_p_s8): Remove.
30937 (vminvq_p_u16): Remove.
30938 (vmaxvq_p_u16): Remove.
30939 (vminvq_p_s16): Remove.
30940 (vmaxvq_p_s16): Remove.
30941 (vminvq_p_u32): Remove.
30942 (vmaxvq_p_u32): Remove.
30943 (vminvq_p_s32): Remove.
30944 (vmaxvq_p_s32): Remove.
30945 (__arm_vminvq_u8): Remove.
30946 (__arm_vmaxvq_u8): Remove.
30947 (__arm_vminvq_s8): Remove.
30948 (__arm_vmaxvq_s8): Remove.
30949 (__arm_vminvq_u16): Remove.
30950 (__arm_vmaxvq_u16): Remove.
30951 (__arm_vminvq_s16): Remove.
30952 (__arm_vmaxvq_s16): Remove.
30953 (__arm_vminvq_u32): Remove.
30954 (__arm_vmaxvq_u32): Remove.
30955 (__arm_vminvq_s32): Remove.
30956 (__arm_vmaxvq_s32): Remove.
30957 (__arm_vminvq_p_u8): Remove.
30958 (__arm_vmaxvq_p_u8): Remove.
30959 (__arm_vminvq_p_s8): Remove.
30960 (__arm_vmaxvq_p_s8): Remove.
30961 (__arm_vminvq_p_u16): Remove.
30962 (__arm_vmaxvq_p_u16): Remove.
30963 (__arm_vminvq_p_s16): Remove.
30964 (__arm_vmaxvq_p_s16): Remove.
30965 (__arm_vminvq_p_u32): Remove.
30966 (__arm_vmaxvq_p_u32): Remove.
30967 (__arm_vminvq_p_s32): Remove.
30968 (__arm_vmaxvq_p_s32): Remove.
30969 (__arm_vminvq): Remove.
30970 (__arm_vmaxvq): Remove.
30971 (__arm_vminvq_p): Remove.
30972 (__arm_vmaxvq_p): Remove.
30975 (vminavq_p): Remove.
30976 (vmaxavq_p): Remove.
30977 (vminavq_s8): Remove.
30978 (vmaxavq_s8): Remove.
30979 (vminavq_s16): Remove.
30980 (vmaxavq_s16): Remove.
30981 (vminavq_s32): Remove.
30982 (vmaxavq_s32): Remove.
30983 (vminavq_p_s8): Remove.
30984 (vmaxavq_p_s8): Remove.
30985 (vminavq_p_s16): Remove.
30986 (vmaxavq_p_s16): Remove.
30987 (vminavq_p_s32): Remove.
30988 (vmaxavq_p_s32): Remove.
30989 (__arm_vminavq_s8): Remove.
30990 (__arm_vmaxavq_s8): Remove.
30991 (__arm_vminavq_s16): Remove.
30992 (__arm_vmaxavq_s16): Remove.
30993 (__arm_vminavq_s32): Remove.
30994 (__arm_vmaxavq_s32): Remove.
30995 (__arm_vminavq_p_s8): Remove.
30996 (__arm_vmaxavq_p_s8): Remove.
30997 (__arm_vminavq_p_s16): Remove.
30998 (__arm_vmaxavq_p_s16): Remove.
30999 (__arm_vminavq_p_s32): Remove.
31000 (__arm_vmaxavq_p_s32): Remove.
31001 (__arm_vminavq): Remove.
31002 (__arm_vmaxavq): Remove.
31003 (__arm_vminavq_p): Remove.
31004 (__arm_vmaxavq_p): Remove.
31006 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31008 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
31009 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
31010 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
31011 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
31012 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
31013 (@mve_<mve_insn>q_<supf><mode>): ... this.
31014 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
31015 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
31016 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31018 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31020 * config/arm/arm-mve-builtins-functions.h (class
31021 unspec_mve_function_exact_insn_pred_p): New.
31023 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31025 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
31026 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
31028 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31030 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
31031 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
31033 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
31035 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
31037 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
31038 (ADJUST_REG_ALLOC_ORDER): Likewise.
31039 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
31041 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
31042 Upa rather than Upl for unpredicated movprfx alternatives.
31044 2023-05-09 Jeff Law <jlaw@ventanamicro>
31046 * config/h8300/testcompare.md: Add peephole2 which uses a memory
31047 load to set flags, thus eliminating a compare against zero.
31049 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31051 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
31052 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
31053 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
31054 * config/arm/arm_mve.h (vshlltq): Remove.
31056 (vshllbq_m): Remove.
31057 (vshlltq_m): Remove.
31058 (vshllbq_x): Remove.
31059 (vshlltq_x): Remove.
31060 (vshlltq_n_u8): Remove.
31061 (vshllbq_n_u8): Remove.
31062 (vshlltq_n_s8): Remove.
31063 (vshllbq_n_s8): Remove.
31064 (vshlltq_n_u16): Remove.
31065 (vshllbq_n_u16): Remove.
31066 (vshlltq_n_s16): Remove.
31067 (vshllbq_n_s16): Remove.
31068 (vshllbq_m_n_s8): Remove.
31069 (vshllbq_m_n_s16): Remove.
31070 (vshllbq_m_n_u8): Remove.
31071 (vshllbq_m_n_u16): Remove.
31072 (vshlltq_m_n_s8): Remove.
31073 (vshlltq_m_n_s16): Remove.
31074 (vshlltq_m_n_u8): Remove.
31075 (vshlltq_m_n_u16): Remove.
31076 (vshllbq_x_n_s8): Remove.
31077 (vshllbq_x_n_s16): Remove.
31078 (vshllbq_x_n_u8): Remove.
31079 (vshllbq_x_n_u16): Remove.
31080 (vshlltq_x_n_s8): Remove.
31081 (vshlltq_x_n_s16): Remove.
31082 (vshlltq_x_n_u8): Remove.
31083 (vshlltq_x_n_u16): Remove.
31084 (__arm_vshlltq_n_u8): Remove.
31085 (__arm_vshllbq_n_u8): Remove.
31086 (__arm_vshlltq_n_s8): Remove.
31087 (__arm_vshllbq_n_s8): Remove.
31088 (__arm_vshlltq_n_u16): Remove.
31089 (__arm_vshllbq_n_u16): Remove.
31090 (__arm_vshlltq_n_s16): Remove.
31091 (__arm_vshllbq_n_s16): Remove.
31092 (__arm_vshllbq_m_n_s8): Remove.
31093 (__arm_vshllbq_m_n_s16): Remove.
31094 (__arm_vshllbq_m_n_u8): Remove.
31095 (__arm_vshllbq_m_n_u16): Remove.
31096 (__arm_vshlltq_m_n_s8): Remove.
31097 (__arm_vshlltq_m_n_s16): Remove.
31098 (__arm_vshlltq_m_n_u8): Remove.
31099 (__arm_vshlltq_m_n_u16): Remove.
31100 (__arm_vshllbq_x_n_s8): Remove.
31101 (__arm_vshllbq_x_n_s16): Remove.
31102 (__arm_vshllbq_x_n_u8): Remove.
31103 (__arm_vshllbq_x_n_u16): Remove.
31104 (__arm_vshlltq_x_n_s8): Remove.
31105 (__arm_vshlltq_x_n_s16): Remove.
31106 (__arm_vshlltq_x_n_u8): Remove.
31107 (__arm_vshlltq_x_n_u16): Remove.
31108 (__arm_vshlltq): Remove.
31109 (__arm_vshllbq): Remove.
31110 (__arm_vshllbq_m): Remove.
31111 (__arm_vshlltq_m): Remove.
31112 (__arm_vshllbq_x): Remove.
31113 (__arm_vshlltq_x): Remove.
31115 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31117 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
31118 (VSHLLBQ_N, VSHLLTQ_N): Remove.
31120 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
31121 (VSHLLxQ_M_N): New.
31122 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
31123 (mve_vshlltq_n_<supf><mode>): Merge into ...
31124 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31125 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
31127 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
31129 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31131 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
31132 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
31134 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31136 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
31137 (vqmovntq, vqmovunbq, vqmovuntq): New.
31138 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
31139 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
31140 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
31141 (vqmovntq, vqmovunbq, vqmovuntq): New.
31142 * config/arm/arm-mve-builtins.cc
31143 (function_instance::has_inactive_argument): Handle vmovnbq,
31144 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
31145 * config/arm/arm_mve.h (vqmovntq): Remove.
31146 (vqmovnbq): Remove.
31147 (vqmovnbq_m): Remove.
31148 (vqmovntq_m): Remove.
31149 (vqmovntq_u16): Remove.
31150 (vqmovnbq_u16): Remove.
31151 (vqmovntq_s16): Remove.
31152 (vqmovnbq_s16): Remove.
31153 (vqmovntq_u32): Remove.
31154 (vqmovnbq_u32): Remove.
31155 (vqmovntq_s32): Remove.
31156 (vqmovnbq_s32): Remove.
31157 (vqmovnbq_m_s16): Remove.
31158 (vqmovntq_m_s16): Remove.
31159 (vqmovnbq_m_u16): Remove.
31160 (vqmovntq_m_u16): Remove.
31161 (vqmovnbq_m_s32): Remove.
31162 (vqmovntq_m_s32): Remove.
31163 (vqmovnbq_m_u32): Remove.
31164 (vqmovntq_m_u32): Remove.
31165 (__arm_vqmovntq_u16): Remove.
31166 (__arm_vqmovnbq_u16): Remove.
31167 (__arm_vqmovntq_s16): Remove.
31168 (__arm_vqmovnbq_s16): Remove.
31169 (__arm_vqmovntq_u32): Remove.
31170 (__arm_vqmovnbq_u32): Remove.
31171 (__arm_vqmovntq_s32): Remove.
31172 (__arm_vqmovnbq_s32): Remove.
31173 (__arm_vqmovnbq_m_s16): Remove.
31174 (__arm_vqmovntq_m_s16): Remove.
31175 (__arm_vqmovnbq_m_u16): Remove.
31176 (__arm_vqmovntq_m_u16): Remove.
31177 (__arm_vqmovnbq_m_s32): Remove.
31178 (__arm_vqmovntq_m_s32): Remove.
31179 (__arm_vqmovnbq_m_u32): Remove.
31180 (__arm_vqmovntq_m_u32): Remove.
31181 (__arm_vqmovntq): Remove.
31182 (__arm_vqmovnbq): Remove.
31183 (__arm_vqmovnbq_m): Remove.
31184 (__arm_vqmovntq_m): Remove.
31187 (vmovnbq_m): Remove.
31188 (vmovntq_m): Remove.
31189 (vmovntq_u16): Remove.
31190 (vmovnbq_u16): Remove.
31191 (vmovntq_s16): Remove.
31192 (vmovnbq_s16): Remove.
31193 (vmovntq_u32): Remove.
31194 (vmovnbq_u32): Remove.
31195 (vmovntq_s32): Remove.
31196 (vmovnbq_s32): Remove.
31197 (vmovnbq_m_s16): Remove.
31198 (vmovntq_m_s16): Remove.
31199 (vmovnbq_m_u16): Remove.
31200 (vmovntq_m_u16): Remove.
31201 (vmovnbq_m_s32): Remove.
31202 (vmovntq_m_s32): Remove.
31203 (vmovnbq_m_u32): Remove.
31204 (vmovntq_m_u32): Remove.
31205 (__arm_vmovntq_u16): Remove.
31206 (__arm_vmovnbq_u16): Remove.
31207 (__arm_vmovntq_s16): Remove.
31208 (__arm_vmovnbq_s16): Remove.
31209 (__arm_vmovntq_u32): Remove.
31210 (__arm_vmovnbq_u32): Remove.
31211 (__arm_vmovntq_s32): Remove.
31212 (__arm_vmovnbq_s32): Remove.
31213 (__arm_vmovnbq_m_s16): Remove.
31214 (__arm_vmovntq_m_s16): Remove.
31215 (__arm_vmovnbq_m_u16): Remove.
31216 (__arm_vmovntq_m_u16): Remove.
31217 (__arm_vmovnbq_m_s32): Remove.
31218 (__arm_vmovntq_m_s32): Remove.
31219 (__arm_vmovnbq_m_u32): Remove.
31220 (__arm_vmovntq_m_u32): Remove.
31221 (__arm_vmovntq): Remove.
31222 (__arm_vmovnbq): Remove.
31223 (__arm_vmovnbq_m): Remove.
31224 (__arm_vmovntq_m): Remove.
31225 (vqmovuntq): Remove.
31226 (vqmovunbq): Remove.
31227 (vqmovunbq_m): Remove.
31228 (vqmovuntq_m): Remove.
31229 (vqmovuntq_s16): Remove.
31230 (vqmovunbq_s16): Remove.
31231 (vqmovuntq_s32): Remove.
31232 (vqmovunbq_s32): Remove.
31233 (vqmovunbq_m_s16): Remove.
31234 (vqmovuntq_m_s16): Remove.
31235 (vqmovunbq_m_s32): Remove.
31236 (vqmovuntq_m_s32): Remove.
31237 (__arm_vqmovuntq_s16): Remove.
31238 (__arm_vqmovunbq_s16): Remove.
31239 (__arm_vqmovuntq_s32): Remove.
31240 (__arm_vqmovunbq_s32): Remove.
31241 (__arm_vqmovunbq_m_s16): Remove.
31242 (__arm_vqmovuntq_m_s16): Remove.
31243 (__arm_vqmovunbq_m_s32): Remove.
31244 (__arm_vqmovuntq_m_s32): Remove.
31245 (__arm_vqmovuntq): Remove.
31246 (__arm_vqmovunbq): Remove.
31247 (__arm_vqmovunbq_m): Remove.
31248 (__arm_vqmovuntq_m): Remove.
31250 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31252 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
31253 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
31256 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
31258 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
31259 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
31260 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
31261 (mve_vqmovuntq_s<mode>): Merge into ...
31262 (@mve_<mve_insn>q_<supf><mode>): ... this.
31263 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
31264 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
31265 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
31266 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
31268 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31270 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
31271 (binary_move_narrow_unsigned): New.
31272 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
31273 (binary_move_narrow_unsigned): New.
31275 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31277 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
31278 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
31279 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
31280 (vrndpq, vrndq, vrndxq): New.
31281 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
31282 (vrndpq, vrndq, vrndxq): New.
31283 * config/arm/arm_mve.h (vrndxq): Remove.
31289 (vrndaq_m): Remove.
31290 (vrndmq_m): Remove.
31291 (vrndnq_m): Remove.
31292 (vrndpq_m): Remove.
31294 (vrndxq_m): Remove.
31296 (vrndnq_x): Remove.
31297 (vrndmq_x): Remove.
31298 (vrndpq_x): Remove.
31299 (vrndaq_x): Remove.
31300 (vrndxq_x): Remove.
31301 (vrndxq_f16): Remove.
31302 (vrndxq_f32): Remove.
31303 (vrndq_f16): Remove.
31304 (vrndq_f32): Remove.
31305 (vrndpq_f16): Remove.
31306 (vrndpq_f32): Remove.
31307 (vrndnq_f16): Remove.
31308 (vrndnq_f32): Remove.
31309 (vrndmq_f16): Remove.
31310 (vrndmq_f32): Remove.
31311 (vrndaq_f16): Remove.
31312 (vrndaq_f32): Remove.
31313 (vrndaq_m_f16): Remove.
31314 (vrndmq_m_f16): Remove.
31315 (vrndnq_m_f16): Remove.
31316 (vrndpq_m_f16): Remove.
31317 (vrndq_m_f16): Remove.
31318 (vrndxq_m_f16): Remove.
31319 (vrndaq_m_f32): Remove.
31320 (vrndmq_m_f32): Remove.
31321 (vrndnq_m_f32): Remove.
31322 (vrndpq_m_f32): Remove.
31323 (vrndq_m_f32): Remove.
31324 (vrndxq_m_f32): Remove.
31325 (vrndq_x_f16): Remove.
31326 (vrndq_x_f32): Remove.
31327 (vrndnq_x_f16): Remove.
31328 (vrndnq_x_f32): Remove.
31329 (vrndmq_x_f16): Remove.
31330 (vrndmq_x_f32): Remove.
31331 (vrndpq_x_f16): Remove.
31332 (vrndpq_x_f32): Remove.
31333 (vrndaq_x_f16): Remove.
31334 (vrndaq_x_f32): Remove.
31335 (vrndxq_x_f16): Remove.
31336 (vrndxq_x_f32): Remove.
31337 (__arm_vrndxq_f16): Remove.
31338 (__arm_vrndxq_f32): Remove.
31339 (__arm_vrndq_f16): Remove.
31340 (__arm_vrndq_f32): Remove.
31341 (__arm_vrndpq_f16): Remove.
31342 (__arm_vrndpq_f32): Remove.
31343 (__arm_vrndnq_f16): Remove.
31344 (__arm_vrndnq_f32): Remove.
31345 (__arm_vrndmq_f16): Remove.
31346 (__arm_vrndmq_f32): Remove.
31347 (__arm_vrndaq_f16): Remove.
31348 (__arm_vrndaq_f32): Remove.
31349 (__arm_vrndaq_m_f16): Remove.
31350 (__arm_vrndmq_m_f16): Remove.
31351 (__arm_vrndnq_m_f16): Remove.
31352 (__arm_vrndpq_m_f16): Remove.
31353 (__arm_vrndq_m_f16): Remove.
31354 (__arm_vrndxq_m_f16): Remove.
31355 (__arm_vrndaq_m_f32): Remove.
31356 (__arm_vrndmq_m_f32): Remove.
31357 (__arm_vrndnq_m_f32): Remove.
31358 (__arm_vrndpq_m_f32): Remove.
31359 (__arm_vrndq_m_f32): Remove.
31360 (__arm_vrndxq_m_f32): Remove.
31361 (__arm_vrndq_x_f16): Remove.
31362 (__arm_vrndq_x_f32): Remove.
31363 (__arm_vrndnq_x_f16): Remove.
31364 (__arm_vrndnq_x_f32): Remove.
31365 (__arm_vrndmq_x_f16): Remove.
31366 (__arm_vrndmq_x_f32): Remove.
31367 (__arm_vrndpq_x_f16): Remove.
31368 (__arm_vrndpq_x_f32): Remove.
31369 (__arm_vrndaq_x_f16): Remove.
31370 (__arm_vrndaq_x_f32): Remove.
31371 (__arm_vrndxq_x_f16): Remove.
31372 (__arm_vrndxq_x_f32): Remove.
31373 (__arm_vrndxq): Remove.
31374 (__arm_vrndq): Remove.
31375 (__arm_vrndpq): Remove.
31376 (__arm_vrndnq): Remove.
31377 (__arm_vrndmq): Remove.
31378 (__arm_vrndaq): Remove.
31379 (__arm_vrndaq_m): Remove.
31380 (__arm_vrndmq_m): Remove.
31381 (__arm_vrndnq_m): Remove.
31382 (__arm_vrndpq_m): Remove.
31383 (__arm_vrndq_m): Remove.
31384 (__arm_vrndxq_m): Remove.
31385 (__arm_vrndq_x): Remove.
31386 (__arm_vrndnq_x): Remove.
31387 (__arm_vrndmq_x): Remove.
31388 (__arm_vrndpq_x): Remove.
31389 (__arm_vrndaq_x): Remove.
31390 (__arm_vrndxq_x): Remove.
31392 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31394 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
31395 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
31396 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
31397 (vclzq, vqabsq, vqnegq): New.
31398 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
31399 (vqabsq, vqnegq): New.
31400 * config/arm/arm_mve.h (vabsq): Remove.
31403 (vabsq_f16): Remove.
31404 (vabsq_f32): Remove.
31405 (vabsq_s8): Remove.
31406 (vabsq_s16): Remove.
31407 (vabsq_s32): Remove.
31408 (vabsq_m_s8): Remove.
31409 (vabsq_m_s16): Remove.
31410 (vabsq_m_s32): Remove.
31411 (vabsq_m_f16): Remove.
31412 (vabsq_m_f32): Remove.
31413 (vabsq_x_s8): Remove.
31414 (vabsq_x_s16): Remove.
31415 (vabsq_x_s32): Remove.
31416 (vabsq_x_f16): Remove.
31417 (vabsq_x_f32): Remove.
31418 (__arm_vabsq_s8): Remove.
31419 (__arm_vabsq_s16): Remove.
31420 (__arm_vabsq_s32): Remove.
31421 (__arm_vabsq_m_s8): Remove.
31422 (__arm_vabsq_m_s16): Remove.
31423 (__arm_vabsq_m_s32): Remove.
31424 (__arm_vabsq_x_s8): Remove.
31425 (__arm_vabsq_x_s16): Remove.
31426 (__arm_vabsq_x_s32): Remove.
31427 (__arm_vabsq_f16): Remove.
31428 (__arm_vabsq_f32): Remove.
31429 (__arm_vabsq_m_f16): Remove.
31430 (__arm_vabsq_m_f32): Remove.
31431 (__arm_vabsq_x_f16): Remove.
31432 (__arm_vabsq_x_f32): Remove.
31433 (__arm_vabsq): Remove.
31434 (__arm_vabsq_m): Remove.
31435 (__arm_vabsq_x): Remove.
31439 (vnegq_f16): Remove.
31440 (vnegq_f32): Remove.
31441 (vnegq_s8): Remove.
31442 (vnegq_s16): Remove.
31443 (vnegq_s32): Remove.
31444 (vnegq_m_s8): Remove.
31445 (vnegq_m_s16): Remove.
31446 (vnegq_m_s32): Remove.
31447 (vnegq_m_f16): Remove.
31448 (vnegq_m_f32): Remove.
31449 (vnegq_x_s8): Remove.
31450 (vnegq_x_s16): Remove.
31451 (vnegq_x_s32): Remove.
31452 (vnegq_x_f16): Remove.
31453 (vnegq_x_f32): Remove.
31454 (__arm_vnegq_s8): Remove.
31455 (__arm_vnegq_s16): Remove.
31456 (__arm_vnegq_s32): Remove.
31457 (__arm_vnegq_m_s8): Remove.
31458 (__arm_vnegq_m_s16): Remove.
31459 (__arm_vnegq_m_s32): Remove.
31460 (__arm_vnegq_x_s8): Remove.
31461 (__arm_vnegq_x_s16): Remove.
31462 (__arm_vnegq_x_s32): Remove.
31463 (__arm_vnegq_f16): Remove.
31464 (__arm_vnegq_f32): Remove.
31465 (__arm_vnegq_m_f16): Remove.
31466 (__arm_vnegq_m_f32): Remove.
31467 (__arm_vnegq_x_f16): Remove.
31468 (__arm_vnegq_x_f32): Remove.
31469 (__arm_vnegq): Remove.
31470 (__arm_vnegq_m): Remove.
31471 (__arm_vnegq_x): Remove.
31475 (vclsq_s8): Remove.
31476 (vclsq_s16): Remove.
31477 (vclsq_s32): Remove.
31478 (vclsq_m_s8): Remove.
31479 (vclsq_m_s16): Remove.
31480 (vclsq_m_s32): Remove.
31481 (vclsq_x_s8): Remove.
31482 (vclsq_x_s16): Remove.
31483 (vclsq_x_s32): Remove.
31484 (__arm_vclsq_s8): Remove.
31485 (__arm_vclsq_s16): Remove.
31486 (__arm_vclsq_s32): Remove.
31487 (__arm_vclsq_m_s8): Remove.
31488 (__arm_vclsq_m_s16): Remove.
31489 (__arm_vclsq_m_s32): Remove.
31490 (__arm_vclsq_x_s8): Remove.
31491 (__arm_vclsq_x_s16): Remove.
31492 (__arm_vclsq_x_s32): Remove.
31493 (__arm_vclsq): Remove.
31494 (__arm_vclsq_m): Remove.
31495 (__arm_vclsq_x): Remove.
31499 (vclzq_s8): Remove.
31500 (vclzq_s16): Remove.
31501 (vclzq_s32): Remove.
31502 (vclzq_u8): Remove.
31503 (vclzq_u16): Remove.
31504 (vclzq_u32): Remove.
31505 (vclzq_m_u8): Remove.
31506 (vclzq_m_s8): Remove.
31507 (vclzq_m_u16): Remove.
31508 (vclzq_m_s16): Remove.
31509 (vclzq_m_u32): Remove.
31510 (vclzq_m_s32): Remove.
31511 (vclzq_x_s8): Remove.
31512 (vclzq_x_s16): Remove.
31513 (vclzq_x_s32): Remove.
31514 (vclzq_x_u8): Remove.
31515 (vclzq_x_u16): Remove.
31516 (vclzq_x_u32): Remove.
31517 (__arm_vclzq_s8): Remove.
31518 (__arm_vclzq_s16): Remove.
31519 (__arm_vclzq_s32): Remove.
31520 (__arm_vclzq_u8): Remove.
31521 (__arm_vclzq_u16): Remove.
31522 (__arm_vclzq_u32): Remove.
31523 (__arm_vclzq_m_u8): Remove.
31524 (__arm_vclzq_m_s8): Remove.
31525 (__arm_vclzq_m_u16): Remove.
31526 (__arm_vclzq_m_s16): Remove.
31527 (__arm_vclzq_m_u32): Remove.
31528 (__arm_vclzq_m_s32): Remove.
31529 (__arm_vclzq_x_s8): Remove.
31530 (__arm_vclzq_x_s16): Remove.
31531 (__arm_vclzq_x_s32): Remove.
31532 (__arm_vclzq_x_u8): Remove.
31533 (__arm_vclzq_x_u16): Remove.
31534 (__arm_vclzq_x_u32): Remove.
31535 (__arm_vclzq): Remove.
31536 (__arm_vclzq_m): Remove.
31537 (__arm_vclzq_x): Remove.
31540 (vqnegq_m): Remove.
31541 (vqabsq_m): Remove.
31542 (vqabsq_s8): Remove.
31543 (vqabsq_s16): Remove.
31544 (vqabsq_s32): Remove.
31545 (vqnegq_s8): Remove.
31546 (vqnegq_s16): Remove.
31547 (vqnegq_s32): Remove.
31548 (vqnegq_m_s8): Remove.
31549 (vqabsq_m_s8): Remove.
31550 (vqnegq_m_s16): Remove.
31551 (vqabsq_m_s16): Remove.
31552 (vqnegq_m_s32): Remove.
31553 (vqabsq_m_s32): Remove.
31554 (__arm_vqabsq_s8): Remove.
31555 (__arm_vqabsq_s16): Remove.
31556 (__arm_vqabsq_s32): Remove.
31557 (__arm_vqnegq_s8): Remove.
31558 (__arm_vqnegq_s16): Remove.
31559 (__arm_vqnegq_s32): Remove.
31560 (__arm_vqnegq_m_s8): Remove.
31561 (__arm_vqabsq_m_s8): Remove.
31562 (__arm_vqnegq_m_s16): Remove.
31563 (__arm_vqabsq_m_s16): Remove.
31564 (__arm_vqnegq_m_s32): Remove.
31565 (__arm_vqabsq_m_s32): Remove.
31566 (__arm_vqabsq): Remove.
31567 (__arm_vqnegq): Remove.
31568 (__arm_vqnegq_m): Remove.
31569 (__arm_vqabsq_m): Remove.
31571 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31573 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
31574 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
31575 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
31576 vrndm, vrndn, vrndp, vrnd, vrndx.
31577 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
31578 VQABSQ_M_S, VQNEGQ_M_S.
31580 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
31581 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
31582 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
31583 (@mve_<mve_insn>q_f<mode>): ... this.
31584 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
31585 (mve_v<absneg_str>q_f<mode>): ... this.
31586 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
31587 (mve_v<absneg_str>q_s<mode>): ... this.
31588 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
31589 (@mve_<mve_insn>q_<supf><mode>): ... this.
31590 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
31591 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
31592 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
31593 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
31594 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
31595 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
31596 (mve_vrndxq_m_f<mode>): Merge into ...
31597 (@mve_<mve_insn>q_m_f<mode>): ... this.
31599 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31601 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
31602 * config/arm/arm-mve-builtins-shapes.h (unary): New.
31604 2023-05-09 Jakub Jelinek <jakub@redhat.com>
31606 * mux-utils.h: Fix comment typo, avoides -> avoids.
31608 2023-05-09 Jakub Jelinek <jakub@redhat.com>
31610 PR tree-optimization/109778
31611 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
31612 wi::zext (x, width) rather than x if width != precision, rather
31613 than using wi::zext (right, width) after the shift.
31614 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
31615 of wi::lrotate or wi::rrotate.
31617 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
31619 * genmatch.cc (get_out_file): Make static and rename to ...
31620 (choose_output): ... this. Reimplement. Update all uses ...
31621 (decision_tree::gen): ... here and ...
31624 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
31626 * genmatch.cc (showUsage): Reimplement as ...
31627 (usage): ...this. Adjust all uses.
31628 (main): Print usage when no arguments. Add missing 'return 1'.
31630 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
31632 * genmatch.cc (header_file): Make static.
31633 (emit_func): Rename to...
31634 (fp_decl): ... this. Adjust all uses.
31635 (fp_decl_done): New function. Use it...
31636 (decision_tree::gen): ... here and...
31637 (write_predicate): ... here.
31640 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
31642 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
31645 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
31646 Uros Bizjak <ubizjak@gmail.com>
31648 * config/i386/i386.md (any_or_plus): Move definition earlier.
31649 (*insvti_highpart_1): New define_insn_and_split to overwrite
31650 (insv) the highpart of a TImode register/memory.
31652 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
31654 * auto-profile.cc (auto_profile): Check todo from early_inline
31655 to see if cleanup_tree_vfg needs to be called.
31656 (early_inline): Return todo from early_inliner.
31658 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
31660 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
31662 (pass_vsetvl::get_block_info): New.
31663 (pass_vsetvl::update_vector_info): New.
31664 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
31665 (pass_vsetvl::compute_local_backward_infos): Ditto.
31666 (pass_vsetvl::transfer_before): Ditto.
31667 (pass_vsetvl::transfer_after): Ditto.
31668 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
31669 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
31670 (pass_vsetvl::cleanup_insns): Ditto.
31671 (pass_vsetvl::compute_local_backward_infos): Use
31672 update_vector_info.
31674 2023-05-08 Jeff Law <jlaw@ventanamicro>
31676 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
31678 2023-05-08 Richard Biener <rguenther@suse.de>
31679 Michael Meissner <meissner@linux.ibm.com>
31681 PR middle-end/108623
31682 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
31683 Align bit fields > 1 bit to at least an 8-bit boundary.
31685 2023-05-08 Andrew Pinski <apinski@marvell.com>
31687 PR tree-optimization/109424
31688 PR tree-optimization/59424
31689 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
31690 (factor_out_conditional_operation): This and add support for all unary
31692 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
31693 to call factor_out_conditional_operation instead.
31695 2023-05-08 Andrew Pinski <apinski@marvell.com>
31697 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
31698 over factor_out_conditional_conversion.
31700 2023-05-08 Andrew Pinski <apinski@marvell.com>
31702 PR tree-optimization/49959
31703 PR tree-optimization/103771
31704 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
31705 Diamond shapped bb form for factor_out_conditional_conversion.
31707 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31709 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
31710 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
31711 (riscv_vector_get_mask_mode): Ditto.
31712 (get_mask_policy_no_pred): Ditto.
31713 (get_tail_policy_no_pred): Ditto.
31714 (get_mask_mode): New function.
31715 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
31716 (get_tail_policy_no_pred): Ditto.
31717 (riscv_vector_mask_mode_p): Ditto.
31718 (riscv_vector_get_mask_mode): Ditto.
31719 (get_mask_mode): New function.
31720 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
31722 (get_tail_policy_for_pred): Ditto.
31723 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
31724 (get_mask_policy_for_pred): Ditto
31725 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
31727 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
31729 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
31730 (riscv_select_multilib): New.
31731 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
31732 also handle select_by_abi.
31733 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
31734 to select_by_abi_arch_cmodel from 1.
31735 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
31736 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
31738 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
31740 * Makefile.in: (gimple-match-head.o-warn): Remove.
31741 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
31742 gimple-match-exports.cc.
31743 (gimple-match-auto.h): Only depend on s-gimple-match.
31744 (generic-match-auto.h): Likewise.
31746 2023-05-08 Andrew Pinski <apinski@marvell.com>
31748 PR tree-optimization/109691
31749 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
31751 If the removed statement can throw, have need_eh_cleanup
31752 include the bb of that statement.
31753 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
31754 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
31756 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
31757 Initialize dceworklist instead of stmts_to_remove.
31758 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
31759 Destore dceworklist instead of stmts_to_remove.
31760 (substitute_and_fold_dom_walker::before_dom_children):
31761 Set dceworklist instead of adding to stmts_to_remove.
31762 (substitute_and_fold_engine::substitute_and_fold):
31763 Call simple_dce_from_worklist instead of poping
31765 Don't update the stat on removal statements.
31767 2023-05-07 Andrew Pinski <apinski@marvell.com>
31770 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
31771 Change argument type to aarch64_feature_flags.
31772 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
31773 constructor argument type to aarch64_feature_flags.
31774 Change m_old_asm_isa_flags to be aarch64_feature_flags.
31776 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
31778 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
31779 more parallel code if can_create_pseudo_p.
31781 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
31784 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
31785 immediately before moving a multi-word register by parts.
31787 2023-05-06 Jeff Law <jlaw@ventanamicro>
31789 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
31791 2023-05-06 Michael Collison <collison@rivosinc.com>
31793 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
31794 Check that GET_MODE_NUNITS is a multiple of 2.
31796 2023-05-06 Michael Collison <collison@rivosinc.com>
31798 * config/riscv/riscv.cc
31799 (riscv_estimated_poly_value): Implement
31800 TARGET_ESTIMATED_POLY_VALUE.
31801 (riscv_preferred_simd_mode): Implement
31802 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
31803 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
31804 (riscv_empty_mask_is_expensive): Implement
31805 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
31806 (riscv_vectorize_create_costs): Implement
31807 TARGET_VECTORIZE_CREATE_COSTS.
31808 (riscv_support_vector_misalignment): Implement
31809 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
31810 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
31811 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
31812 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
31813 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
31815 2023-05-06 Jeff Law <jlaw@ventanamicro>
31817 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
31818 duplicate definition.
31820 2023-05-06 Michael Collison <collison@rivosinc.com>
31822 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
31823 (riscv_vector_preferred_simd_mode): Ditto.
31824 (get_mask_policy_no_pred): Ditto.
31825 (get_tail_policy_no_pred): Ditto.
31826 (riscv_vector_mask_mode_p): Ditto.
31827 (riscv_vector_get_mask_mode): Ditto.
31829 2023-05-06 Michael Collison <collison@rivosinc.com>
31831 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
31832 Remove static declaration to to make externally visible.
31833 (get_mask_policy_for_pred): Ditto.
31834 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
31835 New external declaration.
31836 (get_mask_policy_for_pred): Ditto.
31838 2023-05-06 Michael Collison <collison@rivosinc.com>
31840 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
31841 (riscv_vector_get_mask_mode): Ditto.
31842 (get_mask_policy_no_pred): Ditto.
31843 (get_tail_policy_no_pred): Ditto.
31845 2023-05-06 Xi Ruoyao <xry111@xry111.site>
31847 * config/loongarch/loongarch.h (struct machine_function): Add
31848 reg_is_wrapped_separately array for register wrapping
31850 * config/loongarch/loongarch.cc
31851 (loongarch_get_separate_components): New function.
31852 (loongarch_components_for_bb): Likewise.
31853 (loongarch_disqualify_components): Likewise.
31854 (loongarch_process_components): Likewise.
31855 (loongarch_emit_prologue_components): Likewise.
31856 (loongarch_emit_epilogue_components): Likewise.
31857 (loongarch_set_handled_components): Likewise.
31858 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
31859 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
31860 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
31861 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
31862 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
31863 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
31864 (loongarch_for_each_saved_reg): Skip registers that are wrapped
31867 2023-05-06 Xi Ruoyao <xry111@xry111.site>
31870 * Makefile.in (s-macro_list): Pass -nostdinc to
31873 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31875 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
31876 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
31877 (preferred_simd_mode): Ditto.
31878 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
31879 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
31880 (riscv_preferred_simd_mode): New function.
31881 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
31882 * config/riscv/vector.md: Add autovec.md.
31883 * config/riscv/autovec.md: New file.
31885 2023-05-06 Jakub Jelinek <jakub@redhat.com>
31887 * real.h (dconst_pi): Define.
31888 (dconst_e_ptr): Formatting fix.
31889 (dconst_pi_ptr): Declare.
31890 * real.cc (dconst_pi_ptr): New function.
31891 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
31892 boundaries range with range computed from sin/cos of the particular
31893 bounds if the argument range is shorter than 2*pi.
31894 (cfn_sincos::op1_range): Take bulps into account when determining
31895 which result ranges are always invalid or behave like known NAN.
31897 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
31899 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
31900 pass type to vrange_storage::equal_p.
31901 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
31902 (irange_storage::equal_p): Same.
31903 (frange_storage::equal_p): Same.
31904 * value-range-storage.h (class frange_storage): Same.
31906 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31909 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
31910 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
31912 2023-05-06 liuhongt <hongtao.liu@intel.com>
31914 * combine.cc (maybe_swap_commutative_operands): Canonicalize
31915 vec_merge when mask is constant.
31916 * doc/md.texi: Document vec_merge canonicalization.
31918 2023-05-06 Jakub Jelinek <jakub@redhat.com>
31920 * value-range.h (frange_arithmetic): Declare.
31921 * range-op-float.cc (frange_arithmetic): No longer static.
31922 * gimple-range-op.cc (frange_mpfr_arg1): New function.
31923 (cfn_sqrt::fold_range): Intersect the generic boundaries range
31924 with range computed from sqrt of the particular bounds.
31925 (cfn_sqrt::op1_range): Intersect the generic boundaries range
31926 with range computed from squared particular bounds.
31928 2023-05-06 Jakub Jelinek <jakub@redhat.com>
31930 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
31931 earlier with helper variables also renamed.
31932 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
31933 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
31934 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
31936 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
31938 * config/cris/cris.md (splitop): Add PLUS.
31939 * config/cris/cris.cc (cris_split_constant): Also handle
31940 PLUS when a split into two insns may be useful.
31942 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
31944 * config/cris/cris.md (movandsplit1): New define_peephole2.
31946 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
31948 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
31950 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
31952 * doc/md.texi (define_peephole2): Document order of scanning.
31954 2023-05-05 Pan Li <pan2.li@intel.com>
31955 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31957 * config/riscv/vector.md: Allow const as the operand of RVV
31958 indexed load/store.
31960 2023-05-05 Pan Li <pan2.li@intel.com>
31962 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
31963 consumed by simplify_rtx.
31965 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31967 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
31968 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
31969 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
31970 * config/arm/arm_mve.h (vshrq): Remove.
31972 (vrshrq_m): Remove.
31974 (vrshrq_x): Remove.
31976 (vshrq_n_s8): Remove.
31977 (vshrq_n_s16): Remove.
31978 (vshrq_n_s32): Remove.
31979 (vshrq_n_u8): Remove.
31980 (vshrq_n_u16): Remove.
31981 (vshrq_n_u32): Remove.
31982 (vrshrq_n_u8): Remove.
31983 (vrshrq_n_s8): Remove.
31984 (vrshrq_n_u16): Remove.
31985 (vrshrq_n_s16): Remove.
31986 (vrshrq_n_u32): Remove.
31987 (vrshrq_n_s32): Remove.
31988 (vrshrq_m_n_s8): Remove.
31989 (vrshrq_m_n_s32): Remove.
31990 (vrshrq_m_n_s16): Remove.
31991 (vrshrq_m_n_u8): Remove.
31992 (vrshrq_m_n_u32): Remove.
31993 (vrshrq_m_n_u16): Remove.
31994 (vshrq_m_n_s8): Remove.
31995 (vshrq_m_n_s32): Remove.
31996 (vshrq_m_n_s16): Remove.
31997 (vshrq_m_n_u8): Remove.
31998 (vshrq_m_n_u32): Remove.
31999 (vshrq_m_n_u16): Remove.
32000 (vrshrq_x_n_s8): Remove.
32001 (vrshrq_x_n_s16): Remove.
32002 (vrshrq_x_n_s32): Remove.
32003 (vrshrq_x_n_u8): Remove.
32004 (vrshrq_x_n_u16): Remove.
32005 (vrshrq_x_n_u32): Remove.
32006 (vshrq_x_n_s8): Remove.
32007 (vshrq_x_n_s16): Remove.
32008 (vshrq_x_n_s32): Remove.
32009 (vshrq_x_n_u8): Remove.
32010 (vshrq_x_n_u16): Remove.
32011 (vshrq_x_n_u32): Remove.
32012 (__arm_vshrq_n_s8): Remove.
32013 (__arm_vshrq_n_s16): Remove.
32014 (__arm_vshrq_n_s32): Remove.
32015 (__arm_vshrq_n_u8): Remove.
32016 (__arm_vshrq_n_u16): Remove.
32017 (__arm_vshrq_n_u32): Remove.
32018 (__arm_vrshrq_n_u8): Remove.
32019 (__arm_vrshrq_n_s8): Remove.
32020 (__arm_vrshrq_n_u16): Remove.
32021 (__arm_vrshrq_n_s16): Remove.
32022 (__arm_vrshrq_n_u32): Remove.
32023 (__arm_vrshrq_n_s32): Remove.
32024 (__arm_vrshrq_m_n_s8): Remove.
32025 (__arm_vrshrq_m_n_s32): Remove.
32026 (__arm_vrshrq_m_n_s16): Remove.
32027 (__arm_vrshrq_m_n_u8): Remove.
32028 (__arm_vrshrq_m_n_u32): Remove.
32029 (__arm_vrshrq_m_n_u16): Remove.
32030 (__arm_vshrq_m_n_s8): Remove.
32031 (__arm_vshrq_m_n_s32): Remove.
32032 (__arm_vshrq_m_n_s16): Remove.
32033 (__arm_vshrq_m_n_u8): Remove.
32034 (__arm_vshrq_m_n_u32): Remove.
32035 (__arm_vshrq_m_n_u16): Remove.
32036 (__arm_vrshrq_x_n_s8): Remove.
32037 (__arm_vrshrq_x_n_s16): Remove.
32038 (__arm_vrshrq_x_n_s32): Remove.
32039 (__arm_vrshrq_x_n_u8): Remove.
32040 (__arm_vrshrq_x_n_u16): Remove.
32041 (__arm_vrshrq_x_n_u32): Remove.
32042 (__arm_vshrq_x_n_s8): Remove.
32043 (__arm_vshrq_x_n_s16): Remove.
32044 (__arm_vshrq_x_n_s32): Remove.
32045 (__arm_vshrq_x_n_u8): Remove.
32046 (__arm_vshrq_x_n_u16): Remove.
32047 (__arm_vshrq_x_n_u32): Remove.
32048 (__arm_vshrq): Remove.
32049 (__arm_vrshrq): Remove.
32050 (__arm_vrshrq_m): Remove.
32051 (__arm_vshrq_m): Remove.
32052 (__arm_vrshrq_x): Remove.
32053 (__arm_vshrq_x): Remove.
32055 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32057 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
32058 (mve_insn): Add vrshr, vshr.
32059 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
32060 (mve_vrshrq_n_<supf><mode>): Merge into ...
32061 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32062 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
32064 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32066 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32068 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
32069 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
32071 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32073 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
32074 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
32075 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
32076 (vqrshrunbq, vqrshruntq): New.
32077 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
32078 (vqrshrunbq, vqrshruntq): New.
32079 * config/arm/arm-mve-builtins.cc
32080 (function_instance::has_inactive_argument): Handle vqshrunbq,
32081 vqshruntq, vqrshrunbq, vqrshruntq.
32082 * config/arm/arm_mve.h (vqrshrunbq): Remove.
32083 (vqrshruntq): Remove.
32084 (vqrshrunbq_m): Remove.
32085 (vqrshruntq_m): Remove.
32086 (vqrshrunbq_n_s16): Remove.
32087 (vqrshrunbq_n_s32): Remove.
32088 (vqrshruntq_n_s16): Remove.
32089 (vqrshruntq_n_s32): Remove.
32090 (vqrshrunbq_m_n_s32): Remove.
32091 (vqrshrunbq_m_n_s16): Remove.
32092 (vqrshruntq_m_n_s32): Remove.
32093 (vqrshruntq_m_n_s16): Remove.
32094 (__arm_vqrshrunbq_n_s16): Remove.
32095 (__arm_vqrshrunbq_n_s32): Remove.
32096 (__arm_vqrshruntq_n_s16): Remove.
32097 (__arm_vqrshruntq_n_s32): Remove.
32098 (__arm_vqrshrunbq_m_n_s32): Remove.
32099 (__arm_vqrshrunbq_m_n_s16): Remove.
32100 (__arm_vqrshruntq_m_n_s32): Remove.
32101 (__arm_vqrshruntq_m_n_s16): Remove.
32102 (__arm_vqrshrunbq): Remove.
32103 (__arm_vqrshruntq): Remove.
32104 (__arm_vqrshrunbq_m): Remove.
32105 (__arm_vqrshruntq_m): Remove.
32106 (vqshrunbq): Remove.
32107 (vqshruntq): Remove.
32108 (vqshrunbq_m): Remove.
32109 (vqshruntq_m): Remove.
32110 (vqshrunbq_n_s16): Remove.
32111 (vqshruntq_n_s16): Remove.
32112 (vqshrunbq_n_s32): Remove.
32113 (vqshruntq_n_s32): Remove.
32114 (vqshrunbq_m_n_s32): Remove.
32115 (vqshrunbq_m_n_s16): Remove.
32116 (vqshruntq_m_n_s32): Remove.
32117 (vqshruntq_m_n_s16): Remove.
32118 (__arm_vqshrunbq_n_s16): Remove.
32119 (__arm_vqshruntq_n_s16): Remove.
32120 (__arm_vqshrunbq_n_s32): Remove.
32121 (__arm_vqshruntq_n_s32): Remove.
32122 (__arm_vqshrunbq_m_n_s32): Remove.
32123 (__arm_vqshrunbq_m_n_s16): Remove.
32124 (__arm_vqshruntq_m_n_s32): Remove.
32125 (__arm_vqshruntq_m_n_s16): Remove.
32126 (__arm_vqshrunbq): Remove.
32127 (__arm_vqshruntq): Remove.
32128 (__arm_vqshrunbq_m): Remove.
32129 (__arm_vqshruntq_m): Remove.
32131 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32133 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
32134 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
32135 (MVE_SHRN_M_N): Likewise.
32136 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
32137 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
32139 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
32140 (mve_vqrshruntq_n_s<mode>): Remove.
32141 (mve_vqshrunbq_n_s<mode>): Remove.
32142 (mve_vqshruntq_n_s<mode>): Remove.
32143 (mve_vqrshrunbq_m_n_s<mode>): Remove.
32144 (mve_vqrshruntq_m_n_s<mode>): Remove.
32145 (mve_vqshrunbq_m_n_s<mode>): Remove.
32146 (mve_vqshruntq_m_n_s<mode>): Remove.
32148 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32150 * config/arm/arm-mve-builtins-shapes.cc
32151 (binary_rshift_narrow_unsigned): New.
32152 * config/arm/arm-mve-builtins-shapes.h
32153 (binary_rshift_narrow_unsigned): New.
32155 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32157 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
32158 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
32159 (vqrshrnbq, vqrshrntq): New.
32160 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
32161 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
32163 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
32164 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
32165 * config/arm/arm-mve-builtins.cc
32166 (function_instance::has_inactive_argument): Handle vshrnbq,
32167 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
32169 * config/arm/arm_mve.h (vshrnbq): Remove.
32171 (vshrnbq_m): Remove.
32172 (vshrntq_m): Remove.
32173 (vshrnbq_n_s16): Remove.
32174 (vshrntq_n_s16): Remove.
32175 (vshrnbq_n_u16): Remove.
32176 (vshrntq_n_u16): Remove.
32177 (vshrnbq_n_s32): Remove.
32178 (vshrntq_n_s32): Remove.
32179 (vshrnbq_n_u32): Remove.
32180 (vshrntq_n_u32): Remove.
32181 (vshrnbq_m_n_s32): Remove.
32182 (vshrnbq_m_n_s16): Remove.
32183 (vshrnbq_m_n_u32): Remove.
32184 (vshrnbq_m_n_u16): Remove.
32185 (vshrntq_m_n_s32): Remove.
32186 (vshrntq_m_n_s16): Remove.
32187 (vshrntq_m_n_u32): Remove.
32188 (vshrntq_m_n_u16): Remove.
32189 (__arm_vshrnbq_n_s16): Remove.
32190 (__arm_vshrntq_n_s16): Remove.
32191 (__arm_vshrnbq_n_u16): Remove.
32192 (__arm_vshrntq_n_u16): Remove.
32193 (__arm_vshrnbq_n_s32): Remove.
32194 (__arm_vshrntq_n_s32): Remove.
32195 (__arm_vshrnbq_n_u32): Remove.
32196 (__arm_vshrntq_n_u32): Remove.
32197 (__arm_vshrnbq_m_n_s32): Remove.
32198 (__arm_vshrnbq_m_n_s16): Remove.
32199 (__arm_vshrnbq_m_n_u32): Remove.
32200 (__arm_vshrnbq_m_n_u16): Remove.
32201 (__arm_vshrntq_m_n_s32): Remove.
32202 (__arm_vshrntq_m_n_s16): Remove.
32203 (__arm_vshrntq_m_n_u32): Remove.
32204 (__arm_vshrntq_m_n_u16): Remove.
32205 (__arm_vshrnbq): Remove.
32206 (__arm_vshrntq): Remove.
32207 (__arm_vshrnbq_m): Remove.
32208 (__arm_vshrntq_m): Remove.
32209 (vrshrnbq): Remove.
32210 (vrshrntq): Remove.
32211 (vrshrnbq_m): Remove.
32212 (vrshrntq_m): Remove.
32213 (vrshrnbq_n_s16): Remove.
32214 (vrshrntq_n_s16): Remove.
32215 (vrshrnbq_n_u16): Remove.
32216 (vrshrntq_n_u16): Remove.
32217 (vrshrnbq_n_s32): Remove.
32218 (vrshrntq_n_s32): Remove.
32219 (vrshrnbq_n_u32): Remove.
32220 (vrshrntq_n_u32): Remove.
32221 (vrshrnbq_m_n_s32): Remove.
32222 (vrshrnbq_m_n_s16): Remove.
32223 (vrshrnbq_m_n_u32): Remove.
32224 (vrshrnbq_m_n_u16): Remove.
32225 (vrshrntq_m_n_s32): Remove.
32226 (vrshrntq_m_n_s16): Remove.
32227 (vrshrntq_m_n_u32): Remove.
32228 (vrshrntq_m_n_u16): Remove.
32229 (__arm_vrshrnbq_n_s16): Remove.
32230 (__arm_vrshrntq_n_s16): Remove.
32231 (__arm_vrshrnbq_n_u16): Remove.
32232 (__arm_vrshrntq_n_u16): Remove.
32233 (__arm_vrshrnbq_n_s32): Remove.
32234 (__arm_vrshrntq_n_s32): Remove.
32235 (__arm_vrshrnbq_n_u32): Remove.
32236 (__arm_vrshrntq_n_u32): Remove.
32237 (__arm_vrshrnbq_m_n_s32): Remove.
32238 (__arm_vrshrnbq_m_n_s16): Remove.
32239 (__arm_vrshrnbq_m_n_u32): Remove.
32240 (__arm_vrshrnbq_m_n_u16): Remove.
32241 (__arm_vrshrntq_m_n_s32): Remove.
32242 (__arm_vrshrntq_m_n_s16): Remove.
32243 (__arm_vrshrntq_m_n_u32): Remove.
32244 (__arm_vrshrntq_m_n_u16): Remove.
32245 (__arm_vrshrnbq): Remove.
32246 (__arm_vrshrntq): Remove.
32247 (__arm_vrshrnbq_m): Remove.
32248 (__arm_vrshrntq_m): Remove.
32249 (vqshrnbq): Remove.
32250 (vqshrntq): Remove.
32251 (vqshrnbq_m): Remove.
32252 (vqshrntq_m): Remove.
32253 (vqshrnbq_n_s16): Remove.
32254 (vqshrntq_n_s16): Remove.
32255 (vqshrnbq_n_u16): Remove.
32256 (vqshrntq_n_u16): Remove.
32257 (vqshrnbq_n_s32): Remove.
32258 (vqshrntq_n_s32): Remove.
32259 (vqshrnbq_n_u32): Remove.
32260 (vqshrntq_n_u32): Remove.
32261 (vqshrnbq_m_n_s32): Remove.
32262 (vqshrnbq_m_n_s16): Remove.
32263 (vqshrnbq_m_n_u32): Remove.
32264 (vqshrnbq_m_n_u16): Remove.
32265 (vqshrntq_m_n_s32): Remove.
32266 (vqshrntq_m_n_s16): Remove.
32267 (vqshrntq_m_n_u32): Remove.
32268 (vqshrntq_m_n_u16): Remove.
32269 (__arm_vqshrnbq_n_s16): Remove.
32270 (__arm_vqshrntq_n_s16): Remove.
32271 (__arm_vqshrnbq_n_u16): Remove.
32272 (__arm_vqshrntq_n_u16): Remove.
32273 (__arm_vqshrnbq_n_s32): Remove.
32274 (__arm_vqshrntq_n_s32): Remove.
32275 (__arm_vqshrnbq_n_u32): Remove.
32276 (__arm_vqshrntq_n_u32): Remove.
32277 (__arm_vqshrnbq_m_n_s32): Remove.
32278 (__arm_vqshrnbq_m_n_s16): Remove.
32279 (__arm_vqshrnbq_m_n_u32): Remove.
32280 (__arm_vqshrnbq_m_n_u16): Remove.
32281 (__arm_vqshrntq_m_n_s32): Remove.
32282 (__arm_vqshrntq_m_n_s16): Remove.
32283 (__arm_vqshrntq_m_n_u32): Remove.
32284 (__arm_vqshrntq_m_n_u16): Remove.
32285 (__arm_vqshrnbq): Remove.
32286 (__arm_vqshrntq): Remove.
32287 (__arm_vqshrnbq_m): Remove.
32288 (__arm_vqshrntq_m): Remove.
32289 (vqrshrnbq): Remove.
32290 (vqrshrntq): Remove.
32291 (vqrshrnbq_m): Remove.
32292 (vqrshrntq_m): Remove.
32293 (vqrshrnbq_n_s16): Remove.
32294 (vqrshrnbq_n_u16): Remove.
32295 (vqrshrnbq_n_s32): Remove.
32296 (vqrshrnbq_n_u32): Remove.
32297 (vqrshrntq_n_s16): Remove.
32298 (vqrshrntq_n_u16): Remove.
32299 (vqrshrntq_n_s32): Remove.
32300 (vqrshrntq_n_u32): Remove.
32301 (vqrshrnbq_m_n_s32): Remove.
32302 (vqrshrnbq_m_n_s16): Remove.
32303 (vqrshrnbq_m_n_u32): Remove.
32304 (vqrshrnbq_m_n_u16): Remove.
32305 (vqrshrntq_m_n_s32): Remove.
32306 (vqrshrntq_m_n_s16): Remove.
32307 (vqrshrntq_m_n_u32): Remove.
32308 (vqrshrntq_m_n_u16): Remove.
32309 (__arm_vqrshrnbq_n_s16): Remove.
32310 (__arm_vqrshrnbq_n_u16): Remove.
32311 (__arm_vqrshrnbq_n_s32): Remove.
32312 (__arm_vqrshrnbq_n_u32): Remove.
32313 (__arm_vqrshrntq_n_s16): Remove.
32314 (__arm_vqrshrntq_n_u16): Remove.
32315 (__arm_vqrshrntq_n_s32): Remove.
32316 (__arm_vqrshrntq_n_u32): Remove.
32317 (__arm_vqrshrnbq_m_n_s32): Remove.
32318 (__arm_vqrshrnbq_m_n_s16): Remove.
32319 (__arm_vqrshrnbq_m_n_u32): Remove.
32320 (__arm_vqrshrnbq_m_n_u16): Remove.
32321 (__arm_vqrshrntq_m_n_s32): Remove.
32322 (__arm_vqrshrntq_m_n_s16): Remove.
32323 (__arm_vqrshrntq_m_n_u32): Remove.
32324 (__arm_vqrshrntq_m_n_u16): Remove.
32325 (__arm_vqrshrnbq): Remove.
32326 (__arm_vqrshrntq): Remove.
32327 (__arm_vqrshrnbq_m): Remove.
32328 (__arm_vqrshrntq_m): Remove.
32330 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32332 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
32333 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
32334 vrshrnt, vshrnb, vshrnt.
32336 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
32337 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
32338 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
32339 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
32340 (mve_vshrntq_n_<supf><mode>): Merge into ...
32341 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32342 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
32343 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
32344 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
32345 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
32347 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32349 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32351 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
32353 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
32355 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32357 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
32358 (vmaxq, vminq): New.
32359 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
32360 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
32361 * config/arm/arm_mve.h (vminq): Remove.
32367 (vminq_u8): Remove.
32368 (vmaxq_u8): Remove.
32369 (vminq_s8): Remove.
32370 (vmaxq_s8): Remove.
32371 (vminq_u16): Remove.
32372 (vmaxq_u16): Remove.
32373 (vminq_s16): Remove.
32374 (vmaxq_s16): Remove.
32375 (vminq_u32): Remove.
32376 (vmaxq_u32): Remove.
32377 (vminq_s32): Remove.
32378 (vmaxq_s32): Remove.
32379 (vmaxq_m_s8): Remove.
32380 (vmaxq_m_s32): Remove.
32381 (vmaxq_m_s16): Remove.
32382 (vmaxq_m_u8): Remove.
32383 (vmaxq_m_u32): Remove.
32384 (vmaxq_m_u16): Remove.
32385 (vminq_m_s8): Remove.
32386 (vminq_m_s32): Remove.
32387 (vminq_m_s16): Remove.
32388 (vminq_m_u8): Remove.
32389 (vminq_m_u32): Remove.
32390 (vminq_m_u16): Remove.
32391 (vminq_x_s8): Remove.
32392 (vminq_x_s16): Remove.
32393 (vminq_x_s32): Remove.
32394 (vminq_x_u8): Remove.
32395 (vminq_x_u16): Remove.
32396 (vminq_x_u32): Remove.
32397 (vmaxq_x_s8): Remove.
32398 (vmaxq_x_s16): Remove.
32399 (vmaxq_x_s32): Remove.
32400 (vmaxq_x_u8): Remove.
32401 (vmaxq_x_u16): Remove.
32402 (vmaxq_x_u32): Remove.
32403 (__arm_vminq_u8): Remove.
32404 (__arm_vmaxq_u8): Remove.
32405 (__arm_vminq_s8): Remove.
32406 (__arm_vmaxq_s8): Remove.
32407 (__arm_vminq_u16): Remove.
32408 (__arm_vmaxq_u16): Remove.
32409 (__arm_vminq_s16): Remove.
32410 (__arm_vmaxq_s16): Remove.
32411 (__arm_vminq_u32): Remove.
32412 (__arm_vmaxq_u32): Remove.
32413 (__arm_vminq_s32): Remove.
32414 (__arm_vmaxq_s32): Remove.
32415 (__arm_vmaxq_m_s8): Remove.
32416 (__arm_vmaxq_m_s32): Remove.
32417 (__arm_vmaxq_m_s16): Remove.
32418 (__arm_vmaxq_m_u8): Remove.
32419 (__arm_vmaxq_m_u32): Remove.
32420 (__arm_vmaxq_m_u16): Remove.
32421 (__arm_vminq_m_s8): Remove.
32422 (__arm_vminq_m_s32): Remove.
32423 (__arm_vminq_m_s16): Remove.
32424 (__arm_vminq_m_u8): Remove.
32425 (__arm_vminq_m_u32): Remove.
32426 (__arm_vminq_m_u16): Remove.
32427 (__arm_vminq_x_s8): Remove.
32428 (__arm_vminq_x_s16): Remove.
32429 (__arm_vminq_x_s32): Remove.
32430 (__arm_vminq_x_u8): Remove.
32431 (__arm_vminq_x_u16): Remove.
32432 (__arm_vminq_x_u32): Remove.
32433 (__arm_vmaxq_x_s8): Remove.
32434 (__arm_vmaxq_x_s16): Remove.
32435 (__arm_vmaxq_x_s32): Remove.
32436 (__arm_vmaxq_x_u8): Remove.
32437 (__arm_vmaxq_x_u16): Remove.
32438 (__arm_vmaxq_x_u32): Remove.
32439 (__arm_vminq): Remove.
32440 (__arm_vmaxq): Remove.
32441 (__arm_vmaxq_m): Remove.
32442 (__arm_vminq_m): Remove.
32443 (__arm_vminq_x): Remove.
32444 (__arm_vmaxq_x): Remove.
32446 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32448 * config/arm/iterators.md (MAX_MIN_SU): New.
32449 (max_min_su_str): New.
32450 (max_min_supf): New.
32451 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
32452 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
32453 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
32455 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32457 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
32458 (vqshlq, vshlq): New.
32459 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
32460 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
32461 * config/arm/arm_mve.h (vshlq): Remove.
32464 (vshlq_m_r): Remove.
32466 (vshlq_m_n): Remove.
32468 (vshlq_x_n): Remove.
32469 (vshlq_s8): Remove.
32470 (vshlq_s16): Remove.
32471 (vshlq_s32): Remove.
32472 (vshlq_u8): Remove.
32473 (vshlq_u16): Remove.
32474 (vshlq_u32): Remove.
32475 (vshlq_r_u8): Remove.
32476 (vshlq_n_u8): Remove.
32477 (vshlq_r_s8): Remove.
32478 (vshlq_n_s8): Remove.
32479 (vshlq_r_u16): Remove.
32480 (vshlq_n_u16): Remove.
32481 (vshlq_r_s16): Remove.
32482 (vshlq_n_s16): Remove.
32483 (vshlq_r_u32): Remove.
32484 (vshlq_n_u32): Remove.
32485 (vshlq_r_s32): Remove.
32486 (vshlq_n_s32): Remove.
32487 (vshlq_m_r_u8): Remove.
32488 (vshlq_m_r_s8): Remove.
32489 (vshlq_m_r_u16): Remove.
32490 (vshlq_m_r_s16): Remove.
32491 (vshlq_m_r_u32): Remove.
32492 (vshlq_m_r_s32): Remove.
32493 (vshlq_m_u8): Remove.
32494 (vshlq_m_s8): Remove.
32495 (vshlq_m_u16): Remove.
32496 (vshlq_m_s16): Remove.
32497 (vshlq_m_u32): Remove.
32498 (vshlq_m_s32): Remove.
32499 (vshlq_m_n_s8): Remove.
32500 (vshlq_m_n_s32): Remove.
32501 (vshlq_m_n_s16): Remove.
32502 (vshlq_m_n_u8): Remove.
32503 (vshlq_m_n_u32): Remove.
32504 (vshlq_m_n_u16): Remove.
32505 (vshlq_x_s8): Remove.
32506 (vshlq_x_s16): Remove.
32507 (vshlq_x_s32): Remove.
32508 (vshlq_x_u8): Remove.
32509 (vshlq_x_u16): Remove.
32510 (vshlq_x_u32): Remove.
32511 (vshlq_x_n_s8): Remove.
32512 (vshlq_x_n_s16): Remove.
32513 (vshlq_x_n_s32): Remove.
32514 (vshlq_x_n_u8): Remove.
32515 (vshlq_x_n_u16): Remove.
32516 (vshlq_x_n_u32): Remove.
32517 (__arm_vshlq_s8): Remove.
32518 (__arm_vshlq_s16): Remove.
32519 (__arm_vshlq_s32): Remove.
32520 (__arm_vshlq_u8): Remove.
32521 (__arm_vshlq_u16): Remove.
32522 (__arm_vshlq_u32): Remove.
32523 (__arm_vshlq_r_u8): Remove.
32524 (__arm_vshlq_n_u8): Remove.
32525 (__arm_vshlq_r_s8): Remove.
32526 (__arm_vshlq_n_s8): Remove.
32527 (__arm_vshlq_r_u16): Remove.
32528 (__arm_vshlq_n_u16): Remove.
32529 (__arm_vshlq_r_s16): Remove.
32530 (__arm_vshlq_n_s16): Remove.
32531 (__arm_vshlq_r_u32): Remove.
32532 (__arm_vshlq_n_u32): Remove.
32533 (__arm_vshlq_r_s32): Remove.
32534 (__arm_vshlq_n_s32): Remove.
32535 (__arm_vshlq_m_r_u8): Remove.
32536 (__arm_vshlq_m_r_s8): Remove.
32537 (__arm_vshlq_m_r_u16): Remove.
32538 (__arm_vshlq_m_r_s16): Remove.
32539 (__arm_vshlq_m_r_u32): Remove.
32540 (__arm_vshlq_m_r_s32): Remove.
32541 (__arm_vshlq_m_u8): Remove.
32542 (__arm_vshlq_m_s8): Remove.
32543 (__arm_vshlq_m_u16): Remove.
32544 (__arm_vshlq_m_s16): Remove.
32545 (__arm_vshlq_m_u32): Remove.
32546 (__arm_vshlq_m_s32): Remove.
32547 (__arm_vshlq_m_n_s8): Remove.
32548 (__arm_vshlq_m_n_s32): Remove.
32549 (__arm_vshlq_m_n_s16): Remove.
32550 (__arm_vshlq_m_n_u8): Remove.
32551 (__arm_vshlq_m_n_u32): Remove.
32552 (__arm_vshlq_m_n_u16): Remove.
32553 (__arm_vshlq_x_s8): Remove.
32554 (__arm_vshlq_x_s16): Remove.
32555 (__arm_vshlq_x_s32): Remove.
32556 (__arm_vshlq_x_u8): Remove.
32557 (__arm_vshlq_x_u16): Remove.
32558 (__arm_vshlq_x_u32): Remove.
32559 (__arm_vshlq_x_n_s8): Remove.
32560 (__arm_vshlq_x_n_s16): Remove.
32561 (__arm_vshlq_x_n_s32): Remove.
32562 (__arm_vshlq_x_n_u8): Remove.
32563 (__arm_vshlq_x_n_u16): Remove.
32564 (__arm_vshlq_x_n_u32): Remove.
32565 (__arm_vshlq): Remove.
32566 (__arm_vshlq_r): Remove.
32567 (__arm_vshlq_n): Remove.
32568 (__arm_vshlq_m_r): Remove.
32569 (__arm_vshlq_m): Remove.
32570 (__arm_vshlq_m_n): Remove.
32571 (__arm_vshlq_x): Remove.
32572 (__arm_vshlq_x_n): Remove.
32574 (vqshlq_r): Remove.
32575 (vqshlq_n): Remove.
32576 (vqshlq_m_r): Remove.
32577 (vqshlq_m_n): Remove.
32578 (vqshlq_m): Remove.
32579 (vqshlq_u8): Remove.
32580 (vqshlq_r_u8): Remove.
32581 (vqshlq_n_u8): Remove.
32582 (vqshlq_s8): Remove.
32583 (vqshlq_r_s8): Remove.
32584 (vqshlq_n_s8): Remove.
32585 (vqshlq_u16): Remove.
32586 (vqshlq_r_u16): Remove.
32587 (vqshlq_n_u16): Remove.
32588 (vqshlq_s16): Remove.
32589 (vqshlq_r_s16): Remove.
32590 (vqshlq_n_s16): Remove.
32591 (vqshlq_u32): Remove.
32592 (vqshlq_r_u32): Remove.
32593 (vqshlq_n_u32): Remove.
32594 (vqshlq_s32): Remove.
32595 (vqshlq_r_s32): Remove.
32596 (vqshlq_n_s32): Remove.
32597 (vqshlq_m_r_u8): Remove.
32598 (vqshlq_m_r_s8): Remove.
32599 (vqshlq_m_r_u16): Remove.
32600 (vqshlq_m_r_s16): Remove.
32601 (vqshlq_m_r_u32): Remove.
32602 (vqshlq_m_r_s32): Remove.
32603 (vqshlq_m_n_s8): Remove.
32604 (vqshlq_m_n_s32): Remove.
32605 (vqshlq_m_n_s16): Remove.
32606 (vqshlq_m_n_u8): Remove.
32607 (vqshlq_m_n_u32): Remove.
32608 (vqshlq_m_n_u16): Remove.
32609 (vqshlq_m_s8): Remove.
32610 (vqshlq_m_s32): Remove.
32611 (vqshlq_m_s16): Remove.
32612 (vqshlq_m_u8): Remove.
32613 (vqshlq_m_u32): Remove.
32614 (vqshlq_m_u16): Remove.
32615 (__arm_vqshlq_u8): Remove.
32616 (__arm_vqshlq_r_u8): Remove.
32617 (__arm_vqshlq_n_u8): Remove.
32618 (__arm_vqshlq_s8): Remove.
32619 (__arm_vqshlq_r_s8): Remove.
32620 (__arm_vqshlq_n_s8): Remove.
32621 (__arm_vqshlq_u16): Remove.
32622 (__arm_vqshlq_r_u16): Remove.
32623 (__arm_vqshlq_n_u16): Remove.
32624 (__arm_vqshlq_s16): Remove.
32625 (__arm_vqshlq_r_s16): Remove.
32626 (__arm_vqshlq_n_s16): Remove.
32627 (__arm_vqshlq_u32): Remove.
32628 (__arm_vqshlq_r_u32): Remove.
32629 (__arm_vqshlq_n_u32): Remove.
32630 (__arm_vqshlq_s32): Remove.
32631 (__arm_vqshlq_r_s32): Remove.
32632 (__arm_vqshlq_n_s32): Remove.
32633 (__arm_vqshlq_m_r_u8): Remove.
32634 (__arm_vqshlq_m_r_s8): Remove.
32635 (__arm_vqshlq_m_r_u16): Remove.
32636 (__arm_vqshlq_m_r_s16): Remove.
32637 (__arm_vqshlq_m_r_u32): Remove.
32638 (__arm_vqshlq_m_r_s32): Remove.
32639 (__arm_vqshlq_m_n_s8): Remove.
32640 (__arm_vqshlq_m_n_s32): Remove.
32641 (__arm_vqshlq_m_n_s16): Remove.
32642 (__arm_vqshlq_m_n_u8): Remove.
32643 (__arm_vqshlq_m_n_u32): Remove.
32644 (__arm_vqshlq_m_n_u16): Remove.
32645 (__arm_vqshlq_m_s8): Remove.
32646 (__arm_vqshlq_m_s32): Remove.
32647 (__arm_vqshlq_m_s16): Remove.
32648 (__arm_vqshlq_m_u8): Remove.
32649 (__arm_vqshlq_m_u32): Remove.
32650 (__arm_vqshlq_m_u16): Remove.
32651 (__arm_vqshlq): Remove.
32652 (__arm_vqshlq_r): Remove.
32653 (__arm_vqshlq_n): Remove.
32654 (__arm_vqshlq_m_r): Remove.
32655 (__arm_vqshlq_m_n): Remove.
32656 (__arm_vqshlq_m): Remove.
32658 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32660 * config/arm/arm-mve-builtins-functions.h (class
32661 unspec_mve_function_exact_insn_vshl): New.
32663 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32665 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
32666 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
32668 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32670 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
32671 (finish_opt_n_resolution): Handle MODE_r.
32672 * config/arm/arm-mve-builtins.def (r): New mode.
32674 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32676 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
32677 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
32679 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32681 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
32683 * config/arm/arm-mve-builtins-base.def (vabdq): New.
32684 * config/arm/arm-mve-builtins-base.h (vabdq): New.
32685 * config/arm/arm_mve.h (vabdq): Remove.
32688 (vabdq_u8): Remove.
32689 (vabdq_s8): Remove.
32690 (vabdq_u16): Remove.
32691 (vabdq_s16): Remove.
32692 (vabdq_u32): Remove.
32693 (vabdq_s32): Remove.
32694 (vabdq_f16): Remove.
32695 (vabdq_f32): Remove.
32696 (vabdq_m_s8): Remove.
32697 (vabdq_m_s32): Remove.
32698 (vabdq_m_s16): Remove.
32699 (vabdq_m_u8): Remove.
32700 (vabdq_m_u32): Remove.
32701 (vabdq_m_u16): Remove.
32702 (vabdq_m_f32): Remove.
32703 (vabdq_m_f16): Remove.
32704 (vabdq_x_s8): Remove.
32705 (vabdq_x_s16): Remove.
32706 (vabdq_x_s32): Remove.
32707 (vabdq_x_u8): Remove.
32708 (vabdq_x_u16): Remove.
32709 (vabdq_x_u32): Remove.
32710 (vabdq_x_f16): Remove.
32711 (vabdq_x_f32): Remove.
32712 (__arm_vabdq_u8): Remove.
32713 (__arm_vabdq_s8): Remove.
32714 (__arm_vabdq_u16): Remove.
32715 (__arm_vabdq_s16): Remove.
32716 (__arm_vabdq_u32): Remove.
32717 (__arm_vabdq_s32): Remove.
32718 (__arm_vabdq_m_s8): Remove.
32719 (__arm_vabdq_m_s32): Remove.
32720 (__arm_vabdq_m_s16): Remove.
32721 (__arm_vabdq_m_u8): Remove.
32722 (__arm_vabdq_m_u32): Remove.
32723 (__arm_vabdq_m_u16): Remove.
32724 (__arm_vabdq_x_s8): Remove.
32725 (__arm_vabdq_x_s16): Remove.
32726 (__arm_vabdq_x_s32): Remove.
32727 (__arm_vabdq_x_u8): Remove.
32728 (__arm_vabdq_x_u16): Remove.
32729 (__arm_vabdq_x_u32): Remove.
32730 (__arm_vabdq_f16): Remove.
32731 (__arm_vabdq_f32): Remove.
32732 (__arm_vabdq_m_f32): Remove.
32733 (__arm_vabdq_m_f16): Remove.
32734 (__arm_vabdq_x_f16): Remove.
32735 (__arm_vabdq_x_f32): Remove.
32736 (__arm_vabdq): Remove.
32737 (__arm_vabdq_m): Remove.
32738 (__arm_vabdq_x): Remove.
32740 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32742 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
32743 (MVE_FP_VABDQ_ONLY): New.
32744 (mve_insn): Add vabd.
32745 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
32746 (@mve_<mve_insn>q_f<mode>): ... this.
32747 (mve_vabdq_m_f<mode>): Remove.
32749 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32751 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
32752 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
32753 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
32754 * config/arm/arm_mve.h (vqrdmulhq): Remove.
32755 (vqrdmulhq_m): Remove.
32756 (vqrdmulhq_s8): Remove.
32757 (vqrdmulhq_n_s8): Remove.
32758 (vqrdmulhq_s16): Remove.
32759 (vqrdmulhq_n_s16): Remove.
32760 (vqrdmulhq_s32): Remove.
32761 (vqrdmulhq_n_s32): Remove.
32762 (vqrdmulhq_m_n_s8): Remove.
32763 (vqrdmulhq_m_n_s32): Remove.
32764 (vqrdmulhq_m_n_s16): Remove.
32765 (vqrdmulhq_m_s8): Remove.
32766 (vqrdmulhq_m_s32): Remove.
32767 (vqrdmulhq_m_s16): Remove.
32768 (__arm_vqrdmulhq_s8): Remove.
32769 (__arm_vqrdmulhq_n_s8): Remove.
32770 (__arm_vqrdmulhq_s16): Remove.
32771 (__arm_vqrdmulhq_n_s16): Remove.
32772 (__arm_vqrdmulhq_s32): Remove.
32773 (__arm_vqrdmulhq_n_s32): Remove.
32774 (__arm_vqrdmulhq_m_n_s8): Remove.
32775 (__arm_vqrdmulhq_m_n_s32): Remove.
32776 (__arm_vqrdmulhq_m_n_s16): Remove.
32777 (__arm_vqrdmulhq_m_s8): Remove.
32778 (__arm_vqrdmulhq_m_s32): Remove.
32779 (__arm_vqrdmulhq_m_s16): Remove.
32780 (__arm_vqrdmulhq): Remove.
32781 (__arm_vqrdmulhq_m): Remove.
32783 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32785 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
32786 (MVE_SHIFT_N, MVE_SHIFT_R): New.
32787 (mve_insn): Add vqshl, vshl.
32788 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
32789 (mve_vshlq_n_<supf><mode>): Merge into ...
32790 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32791 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
32793 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
32794 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
32796 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
32797 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
32799 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32800 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
32802 (@mve_<mve_insn>q_<supf><mode>): ... this.
32804 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32806 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
32807 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
32808 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
32809 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
32811 * config/arm/arm_mve.h (vrshlq): Remove.
32812 (vrshlq_m_n): Remove.
32813 (vrshlq_m): Remove.
32814 (vrshlq_x): Remove.
32815 (vrshlq_u8): Remove.
32816 (vrshlq_n_u8): Remove.
32817 (vrshlq_s8): Remove.
32818 (vrshlq_n_s8): Remove.
32819 (vrshlq_u16): Remove.
32820 (vrshlq_n_u16): Remove.
32821 (vrshlq_s16): Remove.
32822 (vrshlq_n_s16): Remove.
32823 (vrshlq_u32): Remove.
32824 (vrshlq_n_u32): Remove.
32825 (vrshlq_s32): Remove.
32826 (vrshlq_n_s32): Remove.
32827 (vrshlq_m_n_u8): Remove.
32828 (vrshlq_m_n_s8): Remove.
32829 (vrshlq_m_n_u16): Remove.
32830 (vrshlq_m_n_s16): Remove.
32831 (vrshlq_m_n_u32): Remove.
32832 (vrshlq_m_n_s32): Remove.
32833 (vrshlq_m_s8): Remove.
32834 (vrshlq_m_s32): Remove.
32835 (vrshlq_m_s16): Remove.
32836 (vrshlq_m_u8): Remove.
32837 (vrshlq_m_u32): Remove.
32838 (vrshlq_m_u16): Remove.
32839 (vrshlq_x_s8): Remove.
32840 (vrshlq_x_s16): Remove.
32841 (vrshlq_x_s32): Remove.
32842 (vrshlq_x_u8): Remove.
32843 (vrshlq_x_u16): Remove.
32844 (vrshlq_x_u32): Remove.
32845 (__arm_vrshlq_u8): Remove.
32846 (__arm_vrshlq_n_u8): Remove.
32847 (__arm_vrshlq_s8): Remove.
32848 (__arm_vrshlq_n_s8): Remove.
32849 (__arm_vrshlq_u16): Remove.
32850 (__arm_vrshlq_n_u16): Remove.
32851 (__arm_vrshlq_s16): Remove.
32852 (__arm_vrshlq_n_s16): Remove.
32853 (__arm_vrshlq_u32): Remove.
32854 (__arm_vrshlq_n_u32): Remove.
32855 (__arm_vrshlq_s32): Remove.
32856 (__arm_vrshlq_n_s32): Remove.
32857 (__arm_vrshlq_m_n_u8): Remove.
32858 (__arm_vrshlq_m_n_s8): Remove.
32859 (__arm_vrshlq_m_n_u16): Remove.
32860 (__arm_vrshlq_m_n_s16): Remove.
32861 (__arm_vrshlq_m_n_u32): Remove.
32862 (__arm_vrshlq_m_n_s32): Remove.
32863 (__arm_vrshlq_m_s8): Remove.
32864 (__arm_vrshlq_m_s32): Remove.
32865 (__arm_vrshlq_m_s16): Remove.
32866 (__arm_vrshlq_m_u8): Remove.
32867 (__arm_vrshlq_m_u32): Remove.
32868 (__arm_vrshlq_m_u16): Remove.
32869 (__arm_vrshlq_x_s8): Remove.
32870 (__arm_vrshlq_x_s16): Remove.
32871 (__arm_vrshlq_x_s32): Remove.
32872 (__arm_vrshlq_x_u8): Remove.
32873 (__arm_vrshlq_x_u16): Remove.
32874 (__arm_vrshlq_x_u32): Remove.
32875 (__arm_vrshlq): Remove.
32876 (__arm_vrshlq_m_n): Remove.
32877 (__arm_vrshlq_m): Remove.
32878 (__arm_vrshlq_x): Remove.
32880 (vqrshlq_m_n): Remove.
32881 (vqrshlq_m): Remove.
32882 (vqrshlq_u8): Remove.
32883 (vqrshlq_n_u8): Remove.
32884 (vqrshlq_s8): Remove.
32885 (vqrshlq_n_s8): Remove.
32886 (vqrshlq_u16): Remove.
32887 (vqrshlq_n_u16): Remove.
32888 (vqrshlq_s16): Remove.
32889 (vqrshlq_n_s16): Remove.
32890 (vqrshlq_u32): Remove.
32891 (vqrshlq_n_u32): Remove.
32892 (vqrshlq_s32): Remove.
32893 (vqrshlq_n_s32): Remove.
32894 (vqrshlq_m_n_u8): Remove.
32895 (vqrshlq_m_n_s8): Remove.
32896 (vqrshlq_m_n_u16): Remove.
32897 (vqrshlq_m_n_s16): Remove.
32898 (vqrshlq_m_n_u32): Remove.
32899 (vqrshlq_m_n_s32): Remove.
32900 (vqrshlq_m_s8): Remove.
32901 (vqrshlq_m_s32): Remove.
32902 (vqrshlq_m_s16): Remove.
32903 (vqrshlq_m_u8): Remove.
32904 (vqrshlq_m_u32): Remove.
32905 (vqrshlq_m_u16): Remove.
32906 (__arm_vqrshlq_u8): Remove.
32907 (__arm_vqrshlq_n_u8): Remove.
32908 (__arm_vqrshlq_s8): Remove.
32909 (__arm_vqrshlq_n_s8): Remove.
32910 (__arm_vqrshlq_u16): Remove.
32911 (__arm_vqrshlq_n_u16): Remove.
32912 (__arm_vqrshlq_s16): Remove.
32913 (__arm_vqrshlq_n_s16): Remove.
32914 (__arm_vqrshlq_u32): Remove.
32915 (__arm_vqrshlq_n_u32): Remove.
32916 (__arm_vqrshlq_s32): Remove.
32917 (__arm_vqrshlq_n_s32): Remove.
32918 (__arm_vqrshlq_m_n_u8): Remove.
32919 (__arm_vqrshlq_m_n_s8): Remove.
32920 (__arm_vqrshlq_m_n_u16): Remove.
32921 (__arm_vqrshlq_m_n_s16): Remove.
32922 (__arm_vqrshlq_m_n_u32): Remove.
32923 (__arm_vqrshlq_m_n_s32): Remove.
32924 (__arm_vqrshlq_m_s8): Remove.
32925 (__arm_vqrshlq_m_s32): Remove.
32926 (__arm_vqrshlq_m_s16): Remove.
32927 (__arm_vqrshlq_m_u8): Remove.
32928 (__arm_vqrshlq_m_u32): Remove.
32929 (__arm_vqrshlq_m_u16): Remove.
32930 (__arm_vqrshlq): Remove.
32931 (__arm_vqrshlq_m_n): Remove.
32932 (__arm_vqrshlq_m): Remove.
32934 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32936 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
32937 (mve_insn): Add vqrshl, vrshl.
32938 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
32939 (mve_vrshlq_n_<supf><mode>): Merge into ...
32940 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32941 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
32943 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32945 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
32947 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
32948 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
32950 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32953 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
32954 denegrate PHI optmization.
32956 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
32958 * config/i386/predicates.md (register_no_SP_operand):
32959 Rename from index_register_operand.
32960 (call_register_operand): Update for rename.
32961 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
32963 2023-05-05 Tamar Christina <tamar.christina@arm.com>
32966 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
32967 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
32968 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
32969 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
32970 (s-match): Split into s-generic-match and s-gimple-match.
32971 * configure.ac (with-matchpd-partitions,
32972 DEFAULT_MATCHPD_PARTITIONS): New.
32973 * configure: Regenerate.
32975 2023-05-05 Tamar Christina <tamar.christina@arm.com>
32978 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
32979 (decision_tree::gen): Accept list of files instead of single and update
32980 to write function definition to header and main file.
32981 (write_predicate): Likewise.
32982 (write_header): Emit pragmas and new includes.
32983 (main): Create file buffers and cleanup.
32984 (showUsage, write_header_includes): New.
32986 2023-05-05 Tamar Christina <tamar.christina@arm.com>
32989 * Makefile.in (OBJS): Add gimple-match-exports.o.
32990 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
32991 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
32992 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
32993 gimple_resimplify5, constant_for_folding, convert_conditional_op,
32994 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
32995 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
32996 do_valueize, try_conditional_simplification, gimple_extract,
32997 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
32998 commutative_ternary_op_p, first_commutative_argument,
32999 associative_binary_op_p, directly_supported_p,
33000 get_conditional_internal_fn): Moved to gimple-match-exports.cc
33001 * gimple-match-exports.cc: New file.
33003 2023-05-05 Tamar Christina <tamar.christina@arm.com>
33006 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
33008 (dt_simplify::gen_1): Use it.
33010 2023-05-05 Tamar Christina <tamar.christina@arm.com>
33013 * genmatch.cc (output_line_directive): Only emit commented directive
33016 2023-05-05 Tamar Christina <tamar.christina@arm.com>
33019 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
33021 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
33023 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
33024 unused in_mode/in_n variables.
33026 2023-05-05 Richard Biener <rguenther@suse.de>
33028 PR tree-optimization/109735
33029 * tree-vect-stmts.cc (vectorizable_operation): Perform
33030 conversion for POINTER_DIFF_EXPR unconditionally.
33032 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
33034 * config/i386/mmx.md (mulv2si3): New expander.
33035 (*mulv2si3): New insn pattern.
33037 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
33038 Thomas Schwinge <thomas@codesourcery.com>
33041 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
33042 alongside reverse-offload function table to prevent NULL values
33043 of the function addresses.
33045 2023-05-05 Jakub Jelinek <jakub@redhat.com>
33047 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
33049 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
33051 2023-05-05 Andrew Pinski <apinski@marvell.com>
33053 PR tree-optimization/109732
33054 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
33055 of the argtrue/argfalse.
33057 2023-05-05 Andrew Pinski <apinski@marvell.com>
33059 PR tree-optimization/109722
33060 * match.pd: Extend the `ABS<a> == 0` pattern
33061 to cover `ABSU<a> == 0` too.
33063 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
33066 * config/i386/predicates.md (index_reg_operand): New predicate.
33067 * config/i386/i386.md (ashift to lea spliter): Use
33068 general_reg_operand and index_reg_operand predicates.
33070 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33072 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
33073 Rename and reimplement with RTL codes to...
33074 (aarch64_<optab>hn2<mode>_insn_le): .. This.
33075 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
33076 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
33078 (aarch64_<optab>hn2<mode>_insn_be): ... This.
33079 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
33080 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
33081 (aarch64_<optab>hn2<mode>): ... This.
33082 (aarch64_r<optab>hn2<mode>): New expander.
33083 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
33084 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
33085 (ADDSUBHN): Delete.
33086 (sur): Remove handling of the above.
33087 (addsub): Likewise.
33089 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33091 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
33093 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
33094 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
33095 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
33096 (aarch64_<sur><addsub>hn<mode>): Delete.
33097 (aarch64_<optab>hn<mode>): New define_expand.
33098 (aarch64_r<optab>hn<mode>): Likewise.
33099 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
33102 2023-05-04 Andrew Pinski <apinski@marvell.com>
33104 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
33105 diamond form bb with forwarder only empty blocks better.
33107 2023-05-04 Andrew Pinski <apinski@marvell.com>
33109 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
33110 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
33111 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
33112 of an inline version of it.
33113 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
33114 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
33116 2023-05-04 Andrew Pinski <apinski@marvell.com>
33118 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
33119 the default argument value for dce_ssa_names to nullptr.
33120 Check to make sure dce_ssa_names is a non-nullptr before
33121 calling simple_dce_from_worklist.
33123 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
33125 * config/i386/predicates.md (index_register_operand): Reject
33126 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
33127 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
33128 (call_register_no_elim_operand): Rewrite as ...
33129 (call_register_operand): ... this.
33130 (call_insn_operand): Use call_register_operand predicate.
33132 2023-05-04 Richard Biener <rguenther@suse.de>
33134 PR tree-optimization/109721
33135 * tree-vect-stmts.cc (vectorizable_operation): Make sure
33136 to test word_mode for all !target_support_p operations.
33138 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33141 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
33142 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
33143 (aarch64_mla<mode>): Rename to...
33144 (aarch64_mla<mode><vczle><vczbe>): ... This.
33145 (*aarch64_mla_elt<mode>): Rename to...
33146 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
33147 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
33148 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
33149 (aarch64_mla_n<mode>): Rename to...
33150 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
33151 (aarch64_mls<mode>): Rename to...
33152 (aarch64_mls<mode><vczle><vczbe>): ... This.
33153 (*aarch64_mls_elt<mode>): Rename to...
33154 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
33155 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
33156 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
33157 (aarch64_mls_n<mode>): Rename to...
33158 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
33159 (fma<mode>4): Rename to...
33160 (fma<mode>4<vczle><vczbe>): ... This.
33161 (*aarch64_fma4_elt<mode>): Rename to...
33162 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
33163 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
33164 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
33165 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
33166 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
33167 (fnma<mode>4): Rename to...
33168 (fnma<mode>4<vczle><vczbe>): ... This.
33169 (*aarch64_fnma4_elt<mode>): Rename to...
33170 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
33171 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
33172 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
33173 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
33174 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
33175 (aarch64_simd_bsl<mode>_internal): Rename to...
33176 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
33177 (*aarch64_simd_bsl<mode>_alt): Rename to...
33178 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
33180 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33183 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
33184 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
33185 (fabd<mode>3): Rename to...
33186 (fabd<mode>3<vczle><vczbe>): ... This.
33187 (aarch64_<optab>p<mode>): Rename to...
33188 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
33189 (aarch64_faddp<mode>): Rename to...
33190 (aarch64_faddp<mode><vczle><vczbe>): ... This.
33192 2023-05-04 Martin Liska <mliska@suse.cz>
33194 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
33195 (print_version): Use it.
33196 (generate_results): Likewise.
33198 2023-05-04 Richard Biener <rguenther@suse.de>
33200 * tree-cfg.h (last_stmt): Rename to ...
33201 (last_nondebug_stmt): ... this.
33202 * tree-cfg.cc (last_stmt): Rename to ...
33203 (last_nondebug_stmt): ... this.
33204 (assign_discriminators): Adjust.
33205 (group_case_labels_stmt): Likewise.
33206 (gimple_can_duplicate_bb_p): Likewise.
33207 (execute_fixup_cfg): Likewise.
33208 * auto-profile.cc (afdo_propagate_circuit): Likewise.
33209 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
33210 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
33211 (determine_parallel_type): Likewise.
33212 (adjust_context_and_scope): Likewise.
33213 (expand_task_call): Likewise.
33214 (remove_exit_barrier): Likewise.
33215 (expand_omp_taskreg): Likewise.
33216 (expand_omp_for_init_counts): Likewise.
33217 (expand_omp_for_init_vars): Likewise.
33218 (expand_omp_for_static_chunk): Likewise.
33219 (expand_omp_simd): Likewise.
33220 (expand_oacc_for): Likewise.
33221 (expand_omp_for): Likewise.
33222 (expand_omp_sections): Likewise.
33223 (expand_omp_atomic_fetch_op): Likewise.
33224 (expand_omp_atomic_cas): Likewise.
33225 (expand_omp_atomic): Likewise.
33226 (expand_omp_target): Likewise.
33227 (expand_omp): Likewise.
33228 (omp_make_gimple_edges): Likewise.
33229 * trans-mem.cc (tm_region_init): Likewise.
33230 * tree-inline.cc (redirect_all_calls): Likewise.
33231 * tree-parloops.cc (gen_parallel_loop): Likewise.
33232 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
33233 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
33235 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
33236 (may_eliminate_iv): Likewise.
33237 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
33238 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
33240 (estimate_numbers_of_iterations): Likewise.
33241 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
33242 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
33243 (set_predicates_for_bb): Likewise.
33244 (init_loop_unswitch_info): Likewise.
33245 (hoist_guard): Likewise.
33246 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
33247 (minmax_replacement): Likewise.
33248 * tree-ssa-reassoc.cc (update_range_test): Likewise.
33249 (optimize_range_tests_to_bit_test): Likewise.
33250 (optimize_range_tests_var_bound): Likewise.
33251 (optimize_range_tests): Likewise.
33252 (no_side_effect_bb): Likewise.
33253 (suitable_cond_bb): Likewise.
33254 (maybe_optimize_range_tests): Likewise.
33255 (reassociate_bb): Likewise.
33256 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
33258 2023-05-04 Jakub Jelinek <jakub@redhat.com>
33261 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
33262 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
33263 for it only if it still has TImode. Don't decide whether to call
33264 fix_debug_reg_uses based on whether SRC is ever set or not.
33266 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
33268 * config/cris/cris.cc (cris_split_constant): New function.
33269 * config/cris/cris.md (splitop): New iterator.
33270 (opsplit1): New define_peephole2.
33271 * config/cris/cris-protos.h (cris_split_constant): Declare.
33272 (cris_splittable_constant_p): New macro.
33274 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
33276 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
33279 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
33281 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
33282 lra_in_progress, not reload_in_progress.
33283 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
33284 * config/cris/constraints.md ("Q"): Ditto.
33286 2023-05-03 Andrew Pinski <apinski@marvell.com>
33288 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
33289 stats on removed number of statements and phis.
33291 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
33293 PR tree-optimization/109711
33294 * value-range.cc (irange::verify_range): Allow types of
33297 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
33300 * calls.cc (can_implement_as_sibling_call_p): Reject calls
33301 to __sanitizer_cov_trace_pc.
33303 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
33306 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
33307 a new ABI break parameter for GCC 14. Set it to the alignment
33308 of enums that have an underlying type. Take the true alignment
33309 of such enums from the TYPE_ALIGN of the underlying type's
33311 (aarch64_function_arg_boundary): Update accordingly.
33312 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
33313 Warn about ABI differences.
33315 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
33318 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
33319 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
33320 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
33321 (aarch64_gimplify_va_arg_expr): Likewise.
33323 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33325 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
33326 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
33327 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
33329 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
33330 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
33331 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
33332 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
33333 * config/arm/arm_mve.h (vhsubq): Remove.
33335 (vhaddq_m): Remove.
33336 (vhsubq_m): Remove.
33337 (vhaddq_x): Remove.
33338 (vhsubq_x): Remove.
33339 (vhsubq_u8): Remove.
33340 (vhsubq_n_u8): Remove.
33341 (vhaddq_u8): Remove.
33342 (vhaddq_n_u8): Remove.
33343 (vhsubq_s8): Remove.
33344 (vhsubq_n_s8): Remove.
33345 (vhaddq_s8): Remove.
33346 (vhaddq_n_s8): Remove.
33347 (vhsubq_u16): Remove.
33348 (vhsubq_n_u16): Remove.
33349 (vhaddq_u16): Remove.
33350 (vhaddq_n_u16): Remove.
33351 (vhsubq_s16): Remove.
33352 (vhsubq_n_s16): Remove.
33353 (vhaddq_s16): Remove.
33354 (vhaddq_n_s16): Remove.
33355 (vhsubq_u32): Remove.
33356 (vhsubq_n_u32): Remove.
33357 (vhaddq_u32): Remove.
33358 (vhaddq_n_u32): Remove.
33359 (vhsubq_s32): Remove.
33360 (vhsubq_n_s32): Remove.
33361 (vhaddq_s32): Remove.
33362 (vhaddq_n_s32): Remove.
33363 (vhaddq_m_n_s8): Remove.
33364 (vhaddq_m_n_s32): Remove.
33365 (vhaddq_m_n_s16): Remove.
33366 (vhaddq_m_n_u8): Remove.
33367 (vhaddq_m_n_u32): Remove.
33368 (vhaddq_m_n_u16): Remove.
33369 (vhaddq_m_s8): Remove.
33370 (vhaddq_m_s32): Remove.
33371 (vhaddq_m_s16): Remove.
33372 (vhaddq_m_u8): Remove.
33373 (vhaddq_m_u32): Remove.
33374 (vhaddq_m_u16): Remove.
33375 (vhsubq_m_n_s8): Remove.
33376 (vhsubq_m_n_s32): Remove.
33377 (vhsubq_m_n_s16): Remove.
33378 (vhsubq_m_n_u8): Remove.
33379 (vhsubq_m_n_u32): Remove.
33380 (vhsubq_m_n_u16): Remove.
33381 (vhsubq_m_s8): Remove.
33382 (vhsubq_m_s32): Remove.
33383 (vhsubq_m_s16): Remove.
33384 (vhsubq_m_u8): Remove.
33385 (vhsubq_m_u32): Remove.
33386 (vhsubq_m_u16): Remove.
33387 (vhaddq_x_n_s8): Remove.
33388 (vhaddq_x_n_s16): Remove.
33389 (vhaddq_x_n_s32): Remove.
33390 (vhaddq_x_n_u8): Remove.
33391 (vhaddq_x_n_u16): Remove.
33392 (vhaddq_x_n_u32): Remove.
33393 (vhaddq_x_s8): Remove.
33394 (vhaddq_x_s16): Remove.
33395 (vhaddq_x_s32): Remove.
33396 (vhaddq_x_u8): Remove.
33397 (vhaddq_x_u16): Remove.
33398 (vhaddq_x_u32): Remove.
33399 (vhsubq_x_n_s8): Remove.
33400 (vhsubq_x_n_s16): Remove.
33401 (vhsubq_x_n_s32): Remove.
33402 (vhsubq_x_n_u8): Remove.
33403 (vhsubq_x_n_u16): Remove.
33404 (vhsubq_x_n_u32): Remove.
33405 (vhsubq_x_s8): Remove.
33406 (vhsubq_x_s16): Remove.
33407 (vhsubq_x_s32): Remove.
33408 (vhsubq_x_u8): Remove.
33409 (vhsubq_x_u16): Remove.
33410 (vhsubq_x_u32): Remove.
33411 (__arm_vhsubq_u8): Remove.
33412 (__arm_vhsubq_n_u8): Remove.
33413 (__arm_vhaddq_u8): Remove.
33414 (__arm_vhaddq_n_u8): Remove.
33415 (__arm_vhsubq_s8): Remove.
33416 (__arm_vhsubq_n_s8): Remove.
33417 (__arm_vhaddq_s8): Remove.
33418 (__arm_vhaddq_n_s8): Remove.
33419 (__arm_vhsubq_u16): Remove.
33420 (__arm_vhsubq_n_u16): Remove.
33421 (__arm_vhaddq_u16): Remove.
33422 (__arm_vhaddq_n_u16): Remove.
33423 (__arm_vhsubq_s16): Remove.
33424 (__arm_vhsubq_n_s16): Remove.
33425 (__arm_vhaddq_s16): Remove.
33426 (__arm_vhaddq_n_s16): Remove.
33427 (__arm_vhsubq_u32): Remove.
33428 (__arm_vhsubq_n_u32): Remove.
33429 (__arm_vhaddq_u32): Remove.
33430 (__arm_vhaddq_n_u32): Remove.
33431 (__arm_vhsubq_s32): Remove.
33432 (__arm_vhsubq_n_s32): Remove.
33433 (__arm_vhaddq_s32): Remove.
33434 (__arm_vhaddq_n_s32): Remove.
33435 (__arm_vhaddq_m_n_s8): Remove.
33436 (__arm_vhaddq_m_n_s32): Remove.
33437 (__arm_vhaddq_m_n_s16): Remove.
33438 (__arm_vhaddq_m_n_u8): Remove.
33439 (__arm_vhaddq_m_n_u32): Remove.
33440 (__arm_vhaddq_m_n_u16): Remove.
33441 (__arm_vhaddq_m_s8): Remove.
33442 (__arm_vhaddq_m_s32): Remove.
33443 (__arm_vhaddq_m_s16): Remove.
33444 (__arm_vhaddq_m_u8): Remove.
33445 (__arm_vhaddq_m_u32): Remove.
33446 (__arm_vhaddq_m_u16): Remove.
33447 (__arm_vhsubq_m_n_s8): Remove.
33448 (__arm_vhsubq_m_n_s32): Remove.
33449 (__arm_vhsubq_m_n_s16): Remove.
33450 (__arm_vhsubq_m_n_u8): Remove.
33451 (__arm_vhsubq_m_n_u32): Remove.
33452 (__arm_vhsubq_m_n_u16): Remove.
33453 (__arm_vhsubq_m_s8): Remove.
33454 (__arm_vhsubq_m_s32): Remove.
33455 (__arm_vhsubq_m_s16): Remove.
33456 (__arm_vhsubq_m_u8): Remove.
33457 (__arm_vhsubq_m_u32): Remove.
33458 (__arm_vhsubq_m_u16): Remove.
33459 (__arm_vhaddq_x_n_s8): Remove.
33460 (__arm_vhaddq_x_n_s16): Remove.
33461 (__arm_vhaddq_x_n_s32): Remove.
33462 (__arm_vhaddq_x_n_u8): Remove.
33463 (__arm_vhaddq_x_n_u16): Remove.
33464 (__arm_vhaddq_x_n_u32): Remove.
33465 (__arm_vhaddq_x_s8): Remove.
33466 (__arm_vhaddq_x_s16): Remove.
33467 (__arm_vhaddq_x_s32): Remove.
33468 (__arm_vhaddq_x_u8): Remove.
33469 (__arm_vhaddq_x_u16): Remove.
33470 (__arm_vhaddq_x_u32): Remove.
33471 (__arm_vhsubq_x_n_s8): Remove.
33472 (__arm_vhsubq_x_n_s16): Remove.
33473 (__arm_vhsubq_x_n_s32): Remove.
33474 (__arm_vhsubq_x_n_u8): Remove.
33475 (__arm_vhsubq_x_n_u16): Remove.
33476 (__arm_vhsubq_x_n_u32): Remove.
33477 (__arm_vhsubq_x_s8): Remove.
33478 (__arm_vhsubq_x_s16): Remove.
33479 (__arm_vhsubq_x_s32): Remove.
33480 (__arm_vhsubq_x_u8): Remove.
33481 (__arm_vhsubq_x_u16): Remove.
33482 (__arm_vhsubq_x_u32): Remove.
33483 (__arm_vhsubq): Remove.
33484 (__arm_vhaddq): Remove.
33485 (__arm_vhaddq_m): Remove.
33486 (__arm_vhsubq_m): Remove.
33487 (__arm_vhaddq_x): Remove.
33488 (__arm_vhsubq_x): Remove.
33490 (vmulhq_m): Remove.
33491 (vmulhq_x): Remove.
33492 (vmulhq_u8): Remove.
33493 (vmulhq_s8): Remove.
33494 (vmulhq_u16): Remove.
33495 (vmulhq_s16): Remove.
33496 (vmulhq_u32): Remove.
33497 (vmulhq_s32): Remove.
33498 (vmulhq_m_s8): Remove.
33499 (vmulhq_m_s32): Remove.
33500 (vmulhq_m_s16): Remove.
33501 (vmulhq_m_u8): Remove.
33502 (vmulhq_m_u32): Remove.
33503 (vmulhq_m_u16): Remove.
33504 (vmulhq_x_s8): Remove.
33505 (vmulhq_x_s16): Remove.
33506 (vmulhq_x_s32): Remove.
33507 (vmulhq_x_u8): Remove.
33508 (vmulhq_x_u16): Remove.
33509 (vmulhq_x_u32): Remove.
33510 (__arm_vmulhq_u8): Remove.
33511 (__arm_vmulhq_s8): Remove.
33512 (__arm_vmulhq_u16): Remove.
33513 (__arm_vmulhq_s16): Remove.
33514 (__arm_vmulhq_u32): Remove.
33515 (__arm_vmulhq_s32): Remove.
33516 (__arm_vmulhq_m_s8): Remove.
33517 (__arm_vmulhq_m_s32): Remove.
33518 (__arm_vmulhq_m_s16): Remove.
33519 (__arm_vmulhq_m_u8): Remove.
33520 (__arm_vmulhq_m_u32): Remove.
33521 (__arm_vmulhq_m_u16): Remove.
33522 (__arm_vmulhq_x_s8): Remove.
33523 (__arm_vmulhq_x_s16): Remove.
33524 (__arm_vmulhq_x_s32): Remove.
33525 (__arm_vmulhq_x_u8): Remove.
33526 (__arm_vmulhq_x_u16): Remove.
33527 (__arm_vmulhq_x_u32): Remove.
33528 (__arm_vmulhq): Remove.
33529 (__arm_vmulhq_m): Remove.
33530 (__arm_vmulhq_x): Remove.
33533 (vqaddq_m): Remove.
33534 (vqsubq_m): Remove.
33535 (vqsubq_u8): Remove.
33536 (vqsubq_n_u8): Remove.
33537 (vqaddq_u8): Remove.
33538 (vqaddq_n_u8): Remove.
33539 (vqsubq_s8): Remove.
33540 (vqsubq_n_s8): Remove.
33541 (vqaddq_s8): Remove.
33542 (vqaddq_n_s8): Remove.
33543 (vqsubq_u16): Remove.
33544 (vqsubq_n_u16): Remove.
33545 (vqaddq_u16): Remove.
33546 (vqaddq_n_u16): Remove.
33547 (vqsubq_s16): Remove.
33548 (vqsubq_n_s16): Remove.
33549 (vqaddq_s16): Remove.
33550 (vqaddq_n_s16): Remove.
33551 (vqsubq_u32): Remove.
33552 (vqsubq_n_u32): Remove.
33553 (vqaddq_u32): Remove.
33554 (vqaddq_n_u32): Remove.
33555 (vqsubq_s32): Remove.
33556 (vqsubq_n_s32): Remove.
33557 (vqaddq_s32): Remove.
33558 (vqaddq_n_s32): Remove.
33559 (vqaddq_m_n_s8): Remove.
33560 (vqaddq_m_n_s32): Remove.
33561 (vqaddq_m_n_s16): Remove.
33562 (vqaddq_m_n_u8): Remove.
33563 (vqaddq_m_n_u32): Remove.
33564 (vqaddq_m_n_u16): Remove.
33565 (vqaddq_m_s8): Remove.
33566 (vqaddq_m_s32): Remove.
33567 (vqaddq_m_s16): Remove.
33568 (vqaddq_m_u8): Remove.
33569 (vqaddq_m_u32): Remove.
33570 (vqaddq_m_u16): Remove.
33571 (vqsubq_m_n_s8): Remove.
33572 (vqsubq_m_n_s32): Remove.
33573 (vqsubq_m_n_s16): Remove.
33574 (vqsubq_m_n_u8): Remove.
33575 (vqsubq_m_n_u32): Remove.
33576 (vqsubq_m_n_u16): Remove.
33577 (vqsubq_m_s8): Remove.
33578 (vqsubq_m_s32): Remove.
33579 (vqsubq_m_s16): Remove.
33580 (vqsubq_m_u8): Remove.
33581 (vqsubq_m_u32): Remove.
33582 (vqsubq_m_u16): Remove.
33583 (__arm_vqsubq_u8): Remove.
33584 (__arm_vqsubq_n_u8): Remove.
33585 (__arm_vqaddq_u8): Remove.
33586 (__arm_vqaddq_n_u8): Remove.
33587 (__arm_vqsubq_s8): Remove.
33588 (__arm_vqsubq_n_s8): Remove.
33589 (__arm_vqaddq_s8): Remove.
33590 (__arm_vqaddq_n_s8): Remove.
33591 (__arm_vqsubq_u16): Remove.
33592 (__arm_vqsubq_n_u16): Remove.
33593 (__arm_vqaddq_u16): Remove.
33594 (__arm_vqaddq_n_u16): Remove.
33595 (__arm_vqsubq_s16): Remove.
33596 (__arm_vqsubq_n_s16): Remove.
33597 (__arm_vqaddq_s16): Remove.
33598 (__arm_vqaddq_n_s16): Remove.
33599 (__arm_vqsubq_u32): Remove.
33600 (__arm_vqsubq_n_u32): Remove.
33601 (__arm_vqaddq_u32): Remove.
33602 (__arm_vqaddq_n_u32): Remove.
33603 (__arm_vqsubq_s32): Remove.
33604 (__arm_vqsubq_n_s32): Remove.
33605 (__arm_vqaddq_s32): Remove.
33606 (__arm_vqaddq_n_s32): Remove.
33607 (__arm_vqaddq_m_n_s8): Remove.
33608 (__arm_vqaddq_m_n_s32): Remove.
33609 (__arm_vqaddq_m_n_s16): Remove.
33610 (__arm_vqaddq_m_n_u8): Remove.
33611 (__arm_vqaddq_m_n_u32): Remove.
33612 (__arm_vqaddq_m_n_u16): Remove.
33613 (__arm_vqaddq_m_s8): Remove.
33614 (__arm_vqaddq_m_s32): Remove.
33615 (__arm_vqaddq_m_s16): Remove.
33616 (__arm_vqaddq_m_u8): Remove.
33617 (__arm_vqaddq_m_u32): Remove.
33618 (__arm_vqaddq_m_u16): Remove.
33619 (__arm_vqsubq_m_n_s8): Remove.
33620 (__arm_vqsubq_m_n_s32): Remove.
33621 (__arm_vqsubq_m_n_s16): Remove.
33622 (__arm_vqsubq_m_n_u8): Remove.
33623 (__arm_vqsubq_m_n_u32): Remove.
33624 (__arm_vqsubq_m_n_u16): Remove.
33625 (__arm_vqsubq_m_s8): Remove.
33626 (__arm_vqsubq_m_s32): Remove.
33627 (__arm_vqsubq_m_s16): Remove.
33628 (__arm_vqsubq_m_u8): Remove.
33629 (__arm_vqsubq_m_u32): Remove.
33630 (__arm_vqsubq_m_u16): Remove.
33631 (__arm_vqsubq): Remove.
33632 (__arm_vqaddq): Remove.
33633 (__arm_vqaddq_m): Remove.
33634 (__arm_vqsubq_m): Remove.
33635 (vqdmulhq): Remove.
33636 (vqdmulhq_m): Remove.
33637 (vqdmulhq_s8): Remove.
33638 (vqdmulhq_n_s8): Remove.
33639 (vqdmulhq_s16): Remove.
33640 (vqdmulhq_n_s16): Remove.
33641 (vqdmulhq_s32): Remove.
33642 (vqdmulhq_n_s32): Remove.
33643 (vqdmulhq_m_n_s8): Remove.
33644 (vqdmulhq_m_n_s32): Remove.
33645 (vqdmulhq_m_n_s16): Remove.
33646 (vqdmulhq_m_s8): Remove.
33647 (vqdmulhq_m_s32): Remove.
33648 (vqdmulhq_m_s16): Remove.
33649 (__arm_vqdmulhq_s8): Remove.
33650 (__arm_vqdmulhq_n_s8): Remove.
33651 (__arm_vqdmulhq_s16): Remove.
33652 (__arm_vqdmulhq_n_s16): Remove.
33653 (__arm_vqdmulhq_s32): Remove.
33654 (__arm_vqdmulhq_n_s32): Remove.
33655 (__arm_vqdmulhq_m_n_s8): Remove.
33656 (__arm_vqdmulhq_m_n_s32): Remove.
33657 (__arm_vqdmulhq_m_n_s16): Remove.
33658 (__arm_vqdmulhq_m_s8): Remove.
33659 (__arm_vqdmulhq_m_s32): Remove.
33660 (__arm_vqdmulhq_m_s16): Remove.
33661 (__arm_vqdmulhq): Remove.
33662 (__arm_vqdmulhq_m): Remove.
33664 (vrhaddq_m): Remove.
33665 (vrhaddq_x): Remove.
33666 (vrhaddq_u8): Remove.
33667 (vrhaddq_s8): Remove.
33668 (vrhaddq_u16): Remove.
33669 (vrhaddq_s16): Remove.
33670 (vrhaddq_u32): Remove.
33671 (vrhaddq_s32): Remove.
33672 (vrhaddq_m_s8): Remove.
33673 (vrhaddq_m_s32): Remove.
33674 (vrhaddq_m_s16): Remove.
33675 (vrhaddq_m_u8): Remove.
33676 (vrhaddq_m_u32): Remove.
33677 (vrhaddq_m_u16): Remove.
33678 (vrhaddq_x_s8): Remove.
33679 (vrhaddq_x_s16): Remove.
33680 (vrhaddq_x_s32): Remove.
33681 (vrhaddq_x_u8): Remove.
33682 (vrhaddq_x_u16): Remove.
33683 (vrhaddq_x_u32): Remove.
33684 (__arm_vrhaddq_u8): Remove.
33685 (__arm_vrhaddq_s8): Remove.
33686 (__arm_vrhaddq_u16): Remove.
33687 (__arm_vrhaddq_s16): Remove.
33688 (__arm_vrhaddq_u32): Remove.
33689 (__arm_vrhaddq_s32): Remove.
33690 (__arm_vrhaddq_m_s8): Remove.
33691 (__arm_vrhaddq_m_s32): Remove.
33692 (__arm_vrhaddq_m_s16): Remove.
33693 (__arm_vrhaddq_m_u8): Remove.
33694 (__arm_vrhaddq_m_u32): Remove.
33695 (__arm_vrhaddq_m_u16): Remove.
33696 (__arm_vrhaddq_x_s8): Remove.
33697 (__arm_vrhaddq_x_s16): Remove.
33698 (__arm_vrhaddq_x_s32): Remove.
33699 (__arm_vrhaddq_x_u8): Remove.
33700 (__arm_vrhaddq_x_u16): Remove.
33701 (__arm_vrhaddq_x_u32): Remove.
33702 (__arm_vrhaddq): Remove.
33703 (__arm_vrhaddq_m): Remove.
33704 (__arm_vrhaddq_x): Remove.
33706 (vrmulhq_m): Remove.
33707 (vrmulhq_x): Remove.
33708 (vrmulhq_u8): Remove.
33709 (vrmulhq_s8): Remove.
33710 (vrmulhq_u16): Remove.
33711 (vrmulhq_s16): Remove.
33712 (vrmulhq_u32): Remove.
33713 (vrmulhq_s32): Remove.
33714 (vrmulhq_m_s8): Remove.
33715 (vrmulhq_m_s32): Remove.
33716 (vrmulhq_m_s16): Remove.
33717 (vrmulhq_m_u8): Remove.
33718 (vrmulhq_m_u32): Remove.
33719 (vrmulhq_m_u16): Remove.
33720 (vrmulhq_x_s8): Remove.
33721 (vrmulhq_x_s16): Remove.
33722 (vrmulhq_x_s32): Remove.
33723 (vrmulhq_x_u8): Remove.
33724 (vrmulhq_x_u16): Remove.
33725 (vrmulhq_x_u32): Remove.
33726 (__arm_vrmulhq_u8): Remove.
33727 (__arm_vrmulhq_s8): Remove.
33728 (__arm_vrmulhq_u16): Remove.
33729 (__arm_vrmulhq_s16): Remove.
33730 (__arm_vrmulhq_u32): Remove.
33731 (__arm_vrmulhq_s32): Remove.
33732 (__arm_vrmulhq_m_s8): Remove.
33733 (__arm_vrmulhq_m_s32): Remove.
33734 (__arm_vrmulhq_m_s16): Remove.
33735 (__arm_vrmulhq_m_u8): Remove.
33736 (__arm_vrmulhq_m_u32): Remove.
33737 (__arm_vrmulhq_m_u16): Remove.
33738 (__arm_vrmulhq_x_s8): Remove.
33739 (__arm_vrmulhq_x_s16): Remove.
33740 (__arm_vrmulhq_x_s32): Remove.
33741 (__arm_vrmulhq_x_u8): Remove.
33742 (__arm_vrmulhq_x_u16): Remove.
33743 (__arm_vrmulhq_x_u32): Remove.
33744 (__arm_vrmulhq): Remove.
33745 (__arm_vrmulhq_m): Remove.
33746 (__arm_vrmulhq_x): Remove.
33748 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33750 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
33751 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
33752 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
33753 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
33754 * config/arm/mve.md (mve_vabdq_<supf><mode>)
33755 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
33756 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
33757 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
33758 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
33759 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
33760 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
33762 (@mve_<mve_insn>q_<supf><mode>): ... this.
33763 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
33764 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
33765 gen_mve_vhaddq / gen_mve_vrhaddq.
33767 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33769 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
33770 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
33771 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
33772 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
33773 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
33774 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
33775 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
33776 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
33777 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
33778 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
33779 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
33780 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
33781 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
33783 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33785 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
33786 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
33788 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
33789 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
33790 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
33791 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
33792 (mve_vqsubq_n_<supf><mode>): Merge into ...
33793 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
33795 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33797 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
33798 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
33799 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
33800 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
33801 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
33802 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
33803 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
33804 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
33805 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
33806 (mve_vshlq_m_<supf><mode>): Merged into
33807 @mve_<mve_insn>q_m_<supf><mode>.
33808 (mve_vabdq_m_<supf><mode>): Likewise.
33809 (mve_vhaddq_m_<supf><mode>): Likewise.
33810 (mve_vhsubq_m_<supf><mode>): Likewise.
33811 (mve_vmaxq_m_<supf><mode>): Likewise.
33812 (mve_vminq_m_<supf><mode>): Likewise.
33813 (mve_vmulhq_m_<supf><mode>): Likewise.
33814 (mve_vqaddq_m_<supf><mode>): Likewise.
33815 (mve_vqrshlq_m_<supf><mode>): Likewise.
33816 (mve_vqshlq_m_<supf><mode>): Likewise.
33817 (mve_vqsubq_m_<supf><mode>): Likewise.
33818 (mve_vrhaddq_m_<supf><mode>): Likewise.
33819 (mve_vrmulhq_m_<supf><mode>): Likewise.
33820 (mve_vrshlq_m_<supf><mode>): Likewise.
33821 (mve_vqdmladhq_m_s<mode>): Likewise.
33822 (mve_vqdmladhxq_m_s<mode>): Likewise.
33823 (mve_vqdmlsdhq_m_s<mode>): Likewise.
33824 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
33825 (mve_vqdmulhq_m_s<mode>): Likewise.
33826 (mve_vqrdmladhq_m_s<mode>): Likewise.
33827 (mve_vqrdmladhxq_m_s<mode>): Likewise.
33828 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
33829 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
33830 (mve_vqrdmulhq_m_s<mode>): Likewise.
33832 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33834 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
33835 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
33836 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
33837 * config/arm/arm_mve.h (vcreateq_f16): Remove.
33838 (vcreateq_f32): Remove.
33839 (vcreateq_u8): Remove.
33840 (vcreateq_u16): Remove.
33841 (vcreateq_u32): Remove.
33842 (vcreateq_u64): Remove.
33843 (vcreateq_s8): Remove.
33844 (vcreateq_s16): Remove.
33845 (vcreateq_s32): Remove.
33846 (vcreateq_s64): Remove.
33847 (__arm_vcreateq_u8): Remove.
33848 (__arm_vcreateq_u16): Remove.
33849 (__arm_vcreateq_u32): Remove.
33850 (__arm_vcreateq_u64): Remove.
33851 (__arm_vcreateq_s8): Remove.
33852 (__arm_vcreateq_s16): Remove.
33853 (__arm_vcreateq_s32): Remove.
33854 (__arm_vcreateq_s64): Remove.
33855 (__arm_vcreateq_f16): Remove.
33856 (__arm_vcreateq_f32): Remove.
33858 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33860 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
33861 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
33862 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
33863 (@mve_<mve_insn>q_f<mode>): ... this.
33864 (mve_vcreateq_<supf><mode>): Rename into ...
33865 (@mve_<mve_insn>q_<supf><mode>): ... this.
33867 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33869 * config/arm/arm-mve-builtins-shapes.cc (create): New.
33870 * config/arm/arm-mve-builtins-shapes.h: (create): New.
33872 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33874 * config/arm/arm-mve-builtins-functions.h (class
33875 unspec_mve_function_exact_insn): New.
33877 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33879 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
33881 * config/arm/arm-mve-builtins-base.def (vorrq): New.
33882 * config/arm/arm-mve-builtins-base.h (vorrq): New.
33883 * config/arm/arm-mve-builtins.cc
33884 (function_instance::has_inactive_argument): Handle vorrq.
33885 * config/arm/arm_mve.h (vorrq): Remove.
33886 (vorrq_m_n): Remove.
33889 (vorrq_u8): Remove.
33890 (vorrq_s8): Remove.
33891 (vorrq_u16): Remove.
33892 (vorrq_s16): Remove.
33893 (vorrq_u32): Remove.
33894 (vorrq_s32): Remove.
33895 (vorrq_n_u16): Remove.
33896 (vorrq_f16): Remove.
33897 (vorrq_n_s16): Remove.
33898 (vorrq_n_u32): Remove.
33899 (vorrq_f32): Remove.
33900 (vorrq_n_s32): Remove.
33901 (vorrq_m_n_s16): Remove.
33902 (vorrq_m_n_u16): Remove.
33903 (vorrq_m_n_s32): Remove.
33904 (vorrq_m_n_u32): Remove.
33905 (vorrq_m_s8): Remove.
33906 (vorrq_m_s32): Remove.
33907 (vorrq_m_s16): Remove.
33908 (vorrq_m_u8): Remove.
33909 (vorrq_m_u32): Remove.
33910 (vorrq_m_u16): Remove.
33911 (vorrq_m_f32): Remove.
33912 (vorrq_m_f16): Remove.
33913 (vorrq_x_s8): Remove.
33914 (vorrq_x_s16): Remove.
33915 (vorrq_x_s32): Remove.
33916 (vorrq_x_u8): Remove.
33917 (vorrq_x_u16): Remove.
33918 (vorrq_x_u32): Remove.
33919 (vorrq_x_f16): Remove.
33920 (vorrq_x_f32): Remove.
33921 (__arm_vorrq_u8): Remove.
33922 (__arm_vorrq_s8): Remove.
33923 (__arm_vorrq_u16): Remove.
33924 (__arm_vorrq_s16): Remove.
33925 (__arm_vorrq_u32): Remove.
33926 (__arm_vorrq_s32): Remove.
33927 (__arm_vorrq_n_u16): Remove.
33928 (__arm_vorrq_n_s16): Remove.
33929 (__arm_vorrq_n_u32): Remove.
33930 (__arm_vorrq_n_s32): Remove.
33931 (__arm_vorrq_m_n_s16): Remove.
33932 (__arm_vorrq_m_n_u16): Remove.
33933 (__arm_vorrq_m_n_s32): Remove.
33934 (__arm_vorrq_m_n_u32): Remove.
33935 (__arm_vorrq_m_s8): Remove.
33936 (__arm_vorrq_m_s32): Remove.
33937 (__arm_vorrq_m_s16): Remove.
33938 (__arm_vorrq_m_u8): Remove.
33939 (__arm_vorrq_m_u32): Remove.
33940 (__arm_vorrq_m_u16): Remove.
33941 (__arm_vorrq_x_s8): Remove.
33942 (__arm_vorrq_x_s16): Remove.
33943 (__arm_vorrq_x_s32): Remove.
33944 (__arm_vorrq_x_u8): Remove.
33945 (__arm_vorrq_x_u16): Remove.
33946 (__arm_vorrq_x_u32): Remove.
33947 (__arm_vorrq_f16): Remove.
33948 (__arm_vorrq_f32): Remove.
33949 (__arm_vorrq_m_f32): Remove.
33950 (__arm_vorrq_m_f16): Remove.
33951 (__arm_vorrq_x_f16): Remove.
33952 (__arm_vorrq_x_f32): Remove.
33953 (__arm_vorrq): Remove.
33954 (__arm_vorrq_m_n): Remove.
33955 (__arm_vorrq_m): Remove.
33956 (__arm_vorrq_x): Remove.
33958 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33960 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
33961 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
33962 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
33963 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
33965 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33967 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
33968 (vandq,veorq): New.
33969 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
33970 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
33971 * config/arm/arm_mve.h (vandq): Remove.
33974 (vandq_u8): Remove.
33975 (vandq_s8): Remove.
33976 (vandq_u16): Remove.
33977 (vandq_s16): Remove.
33978 (vandq_u32): Remove.
33979 (vandq_s32): Remove.
33980 (vandq_f16): Remove.
33981 (vandq_f32): Remove.
33982 (vandq_m_s8): Remove.
33983 (vandq_m_s32): Remove.
33984 (vandq_m_s16): Remove.
33985 (vandq_m_u8): Remove.
33986 (vandq_m_u32): Remove.
33987 (vandq_m_u16): Remove.
33988 (vandq_m_f32): Remove.
33989 (vandq_m_f16): Remove.
33990 (vandq_x_s8): Remove.
33991 (vandq_x_s16): Remove.
33992 (vandq_x_s32): Remove.
33993 (vandq_x_u8): Remove.
33994 (vandq_x_u16): Remove.
33995 (vandq_x_u32): Remove.
33996 (vandq_x_f16): Remove.
33997 (vandq_x_f32): Remove.
33998 (__arm_vandq_u8): Remove.
33999 (__arm_vandq_s8): Remove.
34000 (__arm_vandq_u16): Remove.
34001 (__arm_vandq_s16): Remove.
34002 (__arm_vandq_u32): Remove.
34003 (__arm_vandq_s32): Remove.
34004 (__arm_vandq_m_s8): Remove.
34005 (__arm_vandq_m_s32): Remove.
34006 (__arm_vandq_m_s16): Remove.
34007 (__arm_vandq_m_u8): Remove.
34008 (__arm_vandq_m_u32): Remove.
34009 (__arm_vandq_m_u16): Remove.
34010 (__arm_vandq_x_s8): Remove.
34011 (__arm_vandq_x_s16): Remove.
34012 (__arm_vandq_x_s32): Remove.
34013 (__arm_vandq_x_u8): Remove.
34014 (__arm_vandq_x_u16): Remove.
34015 (__arm_vandq_x_u32): Remove.
34016 (__arm_vandq_f16): Remove.
34017 (__arm_vandq_f32): Remove.
34018 (__arm_vandq_m_f32): Remove.
34019 (__arm_vandq_m_f16): Remove.
34020 (__arm_vandq_x_f16): Remove.
34021 (__arm_vandq_x_f32): Remove.
34022 (__arm_vandq): Remove.
34023 (__arm_vandq_m): Remove.
34024 (__arm_vandq_x): Remove.
34027 (veorq_u8): Remove.
34028 (veorq_s8): Remove.
34029 (veorq_u16): Remove.
34030 (veorq_s16): Remove.
34031 (veorq_u32): Remove.
34032 (veorq_s32): Remove.
34033 (veorq_f16): Remove.
34034 (veorq_f32): Remove.
34035 (veorq_m_s8): Remove.
34036 (veorq_m_s32): Remove.
34037 (veorq_m_s16): Remove.
34038 (veorq_m_u8): Remove.
34039 (veorq_m_u32): Remove.
34040 (veorq_m_u16): Remove.
34041 (veorq_m_f32): Remove.
34042 (veorq_m_f16): Remove.
34043 (veorq_x_s8): Remove.
34044 (veorq_x_s16): Remove.
34045 (veorq_x_s32): Remove.
34046 (veorq_x_u8): Remove.
34047 (veorq_x_u16): Remove.
34048 (veorq_x_u32): Remove.
34049 (veorq_x_f16): Remove.
34050 (veorq_x_f32): Remove.
34051 (__arm_veorq_u8): Remove.
34052 (__arm_veorq_s8): Remove.
34053 (__arm_veorq_u16): Remove.
34054 (__arm_veorq_s16): Remove.
34055 (__arm_veorq_u32): Remove.
34056 (__arm_veorq_s32): Remove.
34057 (__arm_veorq_m_s8): Remove.
34058 (__arm_veorq_m_s32): Remove.
34059 (__arm_veorq_m_s16): Remove.
34060 (__arm_veorq_m_u8): Remove.
34061 (__arm_veorq_m_u32): Remove.
34062 (__arm_veorq_m_u16): Remove.
34063 (__arm_veorq_x_s8): Remove.
34064 (__arm_veorq_x_s16): Remove.
34065 (__arm_veorq_x_s32): Remove.
34066 (__arm_veorq_x_u8): Remove.
34067 (__arm_veorq_x_u16): Remove.
34068 (__arm_veorq_x_u32): Remove.
34069 (__arm_veorq_f16): Remove.
34070 (__arm_veorq_f32): Remove.
34071 (__arm_veorq_m_f32): Remove.
34072 (__arm_veorq_m_f16): Remove.
34073 (__arm_veorq_x_f16): Remove.
34074 (__arm_veorq_x_f32): Remove.
34075 (__arm_veorq): Remove.
34076 (__arm_veorq_m): Remove.
34077 (__arm_veorq_x): Remove.
34079 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
34081 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
34082 (MVE_FP_M_BINARY_LOGIC): New.
34083 (MVE_INT_M_N_BINARY_LOGIC): New.
34084 (MVE_INT_N_BINARY_LOGIC): New.
34085 (mve_insn): Add vand, veor, vorr, vbic.
34086 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
34087 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
34088 (mve_vbicq_m_<supf><mode>): Merge into ...
34089 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
34090 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
34091 (mve_vbicq_m_f<mode>): Merge into ...
34092 (@mve_<mve_insn>q_m_f<mode>): ... this.
34093 (mve_vorrq_n_<supf><mode>)
34094 (mve_vbicq_n_<supf><mode>): Merge into ...
34095 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34096 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
34098 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34100 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
34102 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
34103 * config/arm/arm-mve-builtins-shapes.h (binary): New.
34105 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
34107 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
34109 (vaddq, vmulq, vsubq): New.
34110 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
34111 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
34112 * config/arm/arm_mve.h (vaddq): Remove.
34115 (vaddq_n_u8): Remove.
34116 (vaddq_n_s8): Remove.
34117 (vaddq_n_u16): Remove.
34118 (vaddq_n_s16): Remove.
34119 (vaddq_n_u32): Remove.
34120 (vaddq_n_s32): Remove.
34121 (vaddq_n_f16): Remove.
34122 (vaddq_n_f32): Remove.
34123 (vaddq_m_n_s8): Remove.
34124 (vaddq_m_n_s32): Remove.
34125 (vaddq_m_n_s16): Remove.
34126 (vaddq_m_n_u8): Remove.
34127 (vaddq_m_n_u32): Remove.
34128 (vaddq_m_n_u16): Remove.
34129 (vaddq_m_s8): Remove.
34130 (vaddq_m_s32): Remove.
34131 (vaddq_m_s16): Remove.
34132 (vaddq_m_u8): Remove.
34133 (vaddq_m_u32): Remove.
34134 (vaddq_m_u16): Remove.
34135 (vaddq_m_f32): Remove.
34136 (vaddq_m_f16): Remove.
34137 (vaddq_m_n_f32): Remove.
34138 (vaddq_m_n_f16): Remove.
34139 (vaddq_s8): Remove.
34140 (vaddq_s16): Remove.
34141 (vaddq_s32): Remove.
34142 (vaddq_u8): Remove.
34143 (vaddq_u16): Remove.
34144 (vaddq_u32): Remove.
34145 (vaddq_f16): Remove.
34146 (vaddq_f32): Remove.
34147 (vaddq_x_s8): Remove.
34148 (vaddq_x_s16): Remove.
34149 (vaddq_x_s32): Remove.
34150 (vaddq_x_n_s8): Remove.
34151 (vaddq_x_n_s16): Remove.
34152 (vaddq_x_n_s32): Remove.
34153 (vaddq_x_u8): Remove.
34154 (vaddq_x_u16): Remove.
34155 (vaddq_x_u32): Remove.
34156 (vaddq_x_n_u8): Remove.
34157 (vaddq_x_n_u16): Remove.
34158 (vaddq_x_n_u32): Remove.
34159 (vaddq_x_f16): Remove.
34160 (vaddq_x_f32): Remove.
34161 (vaddq_x_n_f16): Remove.
34162 (vaddq_x_n_f32): Remove.
34163 (__arm_vaddq_n_u8): Remove.
34164 (__arm_vaddq_n_s8): Remove.
34165 (__arm_vaddq_n_u16): Remove.
34166 (__arm_vaddq_n_s16): Remove.
34167 (__arm_vaddq_n_u32): Remove.
34168 (__arm_vaddq_n_s32): Remove.
34169 (__arm_vaddq_m_n_s8): Remove.
34170 (__arm_vaddq_m_n_s32): Remove.
34171 (__arm_vaddq_m_n_s16): Remove.
34172 (__arm_vaddq_m_n_u8): Remove.
34173 (__arm_vaddq_m_n_u32): Remove.
34174 (__arm_vaddq_m_n_u16): Remove.
34175 (__arm_vaddq_m_s8): Remove.
34176 (__arm_vaddq_m_s32): Remove.
34177 (__arm_vaddq_m_s16): Remove.
34178 (__arm_vaddq_m_u8): Remove.
34179 (__arm_vaddq_m_u32): Remove.
34180 (__arm_vaddq_m_u16): Remove.
34181 (__arm_vaddq_s8): Remove.
34182 (__arm_vaddq_s16): Remove.
34183 (__arm_vaddq_s32): Remove.
34184 (__arm_vaddq_u8): Remove.
34185 (__arm_vaddq_u16): Remove.
34186 (__arm_vaddq_u32): Remove.
34187 (__arm_vaddq_x_s8): Remove.
34188 (__arm_vaddq_x_s16): Remove.
34189 (__arm_vaddq_x_s32): Remove.
34190 (__arm_vaddq_x_n_s8): Remove.
34191 (__arm_vaddq_x_n_s16): Remove.
34192 (__arm_vaddq_x_n_s32): Remove.
34193 (__arm_vaddq_x_u8): Remove.
34194 (__arm_vaddq_x_u16): Remove.
34195 (__arm_vaddq_x_u32): Remove.
34196 (__arm_vaddq_x_n_u8): Remove.
34197 (__arm_vaddq_x_n_u16): Remove.
34198 (__arm_vaddq_x_n_u32): Remove.
34199 (__arm_vaddq_n_f16): Remove.
34200 (__arm_vaddq_n_f32): Remove.
34201 (__arm_vaddq_m_f32): Remove.
34202 (__arm_vaddq_m_f16): Remove.
34203 (__arm_vaddq_m_n_f32): Remove.
34204 (__arm_vaddq_m_n_f16): Remove.
34205 (__arm_vaddq_f16): Remove.
34206 (__arm_vaddq_f32): Remove.
34207 (__arm_vaddq_x_f16): Remove.
34208 (__arm_vaddq_x_f32): Remove.
34209 (__arm_vaddq_x_n_f16): Remove.
34210 (__arm_vaddq_x_n_f32): Remove.
34211 (__arm_vaddq): Remove.
34212 (__arm_vaddq_m): Remove.
34213 (__arm_vaddq_x): Remove.
34217 (vmulq_u8): Remove.
34218 (vmulq_n_u8): Remove.
34219 (vmulq_s8): Remove.
34220 (vmulq_n_s8): Remove.
34221 (vmulq_u16): Remove.
34222 (vmulq_n_u16): Remove.
34223 (vmulq_s16): Remove.
34224 (vmulq_n_s16): Remove.
34225 (vmulq_u32): Remove.
34226 (vmulq_n_u32): Remove.
34227 (vmulq_s32): Remove.
34228 (vmulq_n_s32): Remove.
34229 (vmulq_n_f16): Remove.
34230 (vmulq_f16): Remove.
34231 (vmulq_n_f32): Remove.
34232 (vmulq_f32): Remove.
34233 (vmulq_m_n_s8): Remove.
34234 (vmulq_m_n_s32): Remove.
34235 (vmulq_m_n_s16): Remove.
34236 (vmulq_m_n_u8): Remove.
34237 (vmulq_m_n_u32): Remove.
34238 (vmulq_m_n_u16): Remove.
34239 (vmulq_m_s8): Remove.
34240 (vmulq_m_s32): Remove.
34241 (vmulq_m_s16): Remove.
34242 (vmulq_m_u8): Remove.
34243 (vmulq_m_u32): Remove.
34244 (vmulq_m_u16): Remove.
34245 (vmulq_m_f32): Remove.
34246 (vmulq_m_f16): Remove.
34247 (vmulq_m_n_f32): Remove.
34248 (vmulq_m_n_f16): Remove.
34249 (vmulq_x_s8): Remove.
34250 (vmulq_x_s16): Remove.
34251 (vmulq_x_s32): Remove.
34252 (vmulq_x_n_s8): Remove.
34253 (vmulq_x_n_s16): Remove.
34254 (vmulq_x_n_s32): Remove.
34255 (vmulq_x_u8): Remove.
34256 (vmulq_x_u16): Remove.
34257 (vmulq_x_u32): Remove.
34258 (vmulq_x_n_u8): Remove.
34259 (vmulq_x_n_u16): Remove.
34260 (vmulq_x_n_u32): Remove.
34261 (vmulq_x_f16): Remove.
34262 (vmulq_x_f32): Remove.
34263 (vmulq_x_n_f16): Remove.
34264 (vmulq_x_n_f32): Remove.
34265 (__arm_vmulq_u8): Remove.
34266 (__arm_vmulq_n_u8): Remove.
34267 (__arm_vmulq_s8): Remove.
34268 (__arm_vmulq_n_s8): Remove.
34269 (__arm_vmulq_u16): Remove.
34270 (__arm_vmulq_n_u16): Remove.
34271 (__arm_vmulq_s16): Remove.
34272 (__arm_vmulq_n_s16): Remove.
34273 (__arm_vmulq_u32): Remove.
34274 (__arm_vmulq_n_u32): Remove.
34275 (__arm_vmulq_s32): Remove.
34276 (__arm_vmulq_n_s32): Remove.
34277 (__arm_vmulq_m_n_s8): Remove.
34278 (__arm_vmulq_m_n_s32): Remove.
34279 (__arm_vmulq_m_n_s16): Remove.
34280 (__arm_vmulq_m_n_u8): Remove.
34281 (__arm_vmulq_m_n_u32): Remove.
34282 (__arm_vmulq_m_n_u16): Remove.
34283 (__arm_vmulq_m_s8): Remove.
34284 (__arm_vmulq_m_s32): Remove.
34285 (__arm_vmulq_m_s16): Remove.
34286 (__arm_vmulq_m_u8): Remove.
34287 (__arm_vmulq_m_u32): Remove.
34288 (__arm_vmulq_m_u16): Remove.
34289 (__arm_vmulq_x_s8): Remove.
34290 (__arm_vmulq_x_s16): Remove.
34291 (__arm_vmulq_x_s32): Remove.
34292 (__arm_vmulq_x_n_s8): Remove.
34293 (__arm_vmulq_x_n_s16): Remove.
34294 (__arm_vmulq_x_n_s32): Remove.
34295 (__arm_vmulq_x_u8): Remove.
34296 (__arm_vmulq_x_u16): Remove.
34297 (__arm_vmulq_x_u32): Remove.
34298 (__arm_vmulq_x_n_u8): Remove.
34299 (__arm_vmulq_x_n_u16): Remove.
34300 (__arm_vmulq_x_n_u32): Remove.
34301 (__arm_vmulq_n_f16): Remove.
34302 (__arm_vmulq_f16): Remove.
34303 (__arm_vmulq_n_f32): Remove.
34304 (__arm_vmulq_f32): Remove.
34305 (__arm_vmulq_m_f32): Remove.
34306 (__arm_vmulq_m_f16): Remove.
34307 (__arm_vmulq_m_n_f32): Remove.
34308 (__arm_vmulq_m_n_f16): Remove.
34309 (__arm_vmulq_x_f16): Remove.
34310 (__arm_vmulq_x_f32): Remove.
34311 (__arm_vmulq_x_n_f16): Remove.
34312 (__arm_vmulq_x_n_f32): Remove.
34313 (__arm_vmulq): Remove.
34314 (__arm_vmulq_m): Remove.
34315 (__arm_vmulq_x): Remove.
34319 (vsubq_n_f16): Remove.
34320 (vsubq_n_f32): Remove.
34321 (vsubq_u8): Remove.
34322 (vsubq_n_u8): Remove.
34323 (vsubq_s8): Remove.
34324 (vsubq_n_s8): Remove.
34325 (vsubq_u16): Remove.
34326 (vsubq_n_u16): Remove.
34327 (vsubq_s16): Remove.
34328 (vsubq_n_s16): Remove.
34329 (vsubq_u32): Remove.
34330 (vsubq_n_u32): Remove.
34331 (vsubq_s32): Remove.
34332 (vsubq_n_s32): Remove.
34333 (vsubq_f16): Remove.
34334 (vsubq_f32): Remove.
34335 (vsubq_m_s8): Remove.
34336 (vsubq_m_u8): Remove.
34337 (vsubq_m_s16): Remove.
34338 (vsubq_m_u16): Remove.
34339 (vsubq_m_s32): Remove.
34340 (vsubq_m_u32): Remove.
34341 (vsubq_m_n_s8): Remove.
34342 (vsubq_m_n_s32): Remove.
34343 (vsubq_m_n_s16): Remove.
34344 (vsubq_m_n_u8): Remove.
34345 (vsubq_m_n_u32): Remove.
34346 (vsubq_m_n_u16): Remove.
34347 (vsubq_m_f32): Remove.
34348 (vsubq_m_f16): Remove.
34349 (vsubq_m_n_f32): Remove.
34350 (vsubq_m_n_f16): Remove.
34351 (vsubq_x_s8): Remove.
34352 (vsubq_x_s16): Remove.
34353 (vsubq_x_s32): Remove.
34354 (vsubq_x_n_s8): Remove.
34355 (vsubq_x_n_s16): Remove.
34356 (vsubq_x_n_s32): Remove.
34357 (vsubq_x_u8): Remove.
34358 (vsubq_x_u16): Remove.
34359 (vsubq_x_u32): Remove.
34360 (vsubq_x_n_u8): Remove.
34361 (vsubq_x_n_u16): Remove.
34362 (vsubq_x_n_u32): Remove.
34363 (vsubq_x_f16): Remove.
34364 (vsubq_x_f32): Remove.
34365 (vsubq_x_n_f16): Remove.
34366 (vsubq_x_n_f32): Remove.
34367 (__arm_vsubq_u8): Remove.
34368 (__arm_vsubq_n_u8): Remove.
34369 (__arm_vsubq_s8): Remove.
34370 (__arm_vsubq_n_s8): Remove.
34371 (__arm_vsubq_u16): Remove.
34372 (__arm_vsubq_n_u16): Remove.
34373 (__arm_vsubq_s16): Remove.
34374 (__arm_vsubq_n_s16): Remove.
34375 (__arm_vsubq_u32): Remove.
34376 (__arm_vsubq_n_u32): Remove.
34377 (__arm_vsubq_s32): Remove.
34378 (__arm_vsubq_n_s32): Remove.
34379 (__arm_vsubq_m_s8): Remove.
34380 (__arm_vsubq_m_u8): Remove.
34381 (__arm_vsubq_m_s16): Remove.
34382 (__arm_vsubq_m_u16): Remove.
34383 (__arm_vsubq_m_s32): Remove.
34384 (__arm_vsubq_m_u32): Remove.
34385 (__arm_vsubq_m_n_s8): Remove.
34386 (__arm_vsubq_m_n_s32): Remove.
34387 (__arm_vsubq_m_n_s16): Remove.
34388 (__arm_vsubq_m_n_u8): Remove.
34389 (__arm_vsubq_m_n_u32): Remove.
34390 (__arm_vsubq_m_n_u16): Remove.
34391 (__arm_vsubq_x_s8): Remove.
34392 (__arm_vsubq_x_s16): Remove.
34393 (__arm_vsubq_x_s32): Remove.
34394 (__arm_vsubq_x_n_s8): Remove.
34395 (__arm_vsubq_x_n_s16): Remove.
34396 (__arm_vsubq_x_n_s32): Remove.
34397 (__arm_vsubq_x_u8): Remove.
34398 (__arm_vsubq_x_u16): Remove.
34399 (__arm_vsubq_x_u32): Remove.
34400 (__arm_vsubq_x_n_u8): Remove.
34401 (__arm_vsubq_x_n_u16): Remove.
34402 (__arm_vsubq_x_n_u32): Remove.
34403 (__arm_vsubq_n_f16): Remove.
34404 (__arm_vsubq_n_f32): Remove.
34405 (__arm_vsubq_f16): Remove.
34406 (__arm_vsubq_f32): Remove.
34407 (__arm_vsubq_m_f32): Remove.
34408 (__arm_vsubq_m_f16): Remove.
34409 (__arm_vsubq_m_n_f32): Remove.
34410 (__arm_vsubq_m_n_f16): Remove.
34411 (__arm_vsubq_x_f16): Remove.
34412 (__arm_vsubq_x_f32): Remove.
34413 (__arm_vsubq_x_n_f16): Remove.
34414 (__arm_vsubq_x_n_f32): Remove.
34415 (__arm_vsubq): Remove.
34416 (__arm_vsubq_m): Remove.
34417 (__arm_vsubq_x): Remove.
34418 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
34420 (vmulq_u, vmulq_s, vmulq_f): Remove.
34421 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
34422 (mve_vmulq_<supf><mode>): Remove.
34424 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
34426 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
34427 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
34428 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
34430 * config/arm/mve.md
34431 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
34433 (@mve_<mve_insn>q_n_f<mode>): ... this.
34434 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
34435 (mve_vsubq_n_<supf><mode>): Factorize into ...
34436 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34437 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
34439 (mve_<mve_addsubmul>q<mode>): ... this.
34440 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
34442 (mve_<mve_addsubmul>q_f<mode>): ... this.
34443 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
34444 (mve_vsubq_m_<supf><mode>): Factorize into ...
34445 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
34446 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
34447 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
34448 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34449 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
34451 (@mve_<mve_insn>q_m_f<mode>): ... this.
34452 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
34453 (mve_vsubq_m_n_f<mode>): Factorize into ...
34454 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
34456 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
34458 * config/arm/arm-mve-builtins-functions.h (class
34459 unspec_based_mve_function_base): New.
34460 (class unspec_based_mve_function_exact_insn): New.
34462 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
34464 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
34465 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
34467 2023-05-03 Murray Steele <murray.steele@arm.com>
34468 Christophe Lyon <christophe.lyon@arm.com>
34470 * config/arm/arm-mve-builtins-base.cc (class
34471 vuninitializedq_impl): New.
34472 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
34473 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
34475 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
34476 * config/arm/arm-mve-builtins-shapes.h (inherent): New
34478 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
34479 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
34480 (__arm_vuninitializedq_u8): Remove.
34481 (__arm_vuninitializedq_u16): Remove.
34482 (__arm_vuninitializedq_u32): Remove.
34483 (__arm_vuninitializedq_u64): Remove.
34484 (__arm_vuninitializedq_s8): Remove.
34485 (__arm_vuninitializedq_s16): Remove.
34486 (__arm_vuninitializedq_s32): Remove.
34487 (__arm_vuninitializedq_s64): Remove.
34488 (__arm_vuninitializedq_f16): Remove.
34489 (__arm_vuninitializedq_f32): Remove.
34491 2023-05-03 Murray Steele <murray.steele@arm.com>
34492 Christophe Lyon <christophe.lyon@arm.com>
34494 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
34495 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
34496 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
34497 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
34498 (parse_type): Likewise.
34499 (parse_signature): Likewise.
34500 (build_one): Likewise.
34501 (build_all): Likewise.
34502 (overloaded_base): New struct.
34503 (unary_convert_def): Likewise.
34504 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
34505 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
34507 (TYPES_reinterpret_unsigned1): Likewise.
34508 (TYPES_reinterpret_integer): Likewise.
34509 (TYPES_reinterpret_integer1): Likewise.
34510 (TYPES_reinterpret_float1): Likewise.
34511 (TYPES_reinterpret_float): Likewise.
34512 (reinterpret_integer): New.
34513 (reinterpret_float): New.
34514 (handle_arm_mve_h): Register builtins.
34515 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
34516 (vreinterpretq_s32): Likewise.
34517 (vreinterpretq_s64): Likewise.
34518 (vreinterpretq_s8): Likewise.
34519 (vreinterpretq_u16): Likewise.
34520 (vreinterpretq_u32): Likewise.
34521 (vreinterpretq_u64): Likewise.
34522 (vreinterpretq_u8): Likewise.
34523 (vreinterpretq_f16): Likewise.
34524 (vreinterpretq_f32): Likewise.
34525 (vreinterpretq_s16_s32): Likewise.
34526 (vreinterpretq_s16_s64): Likewise.
34527 (vreinterpretq_s16_s8): Likewise.
34528 (vreinterpretq_s16_u16): Likewise.
34529 (vreinterpretq_s16_u32): Likewise.
34530 (vreinterpretq_s16_u64): Likewise.
34531 (vreinterpretq_s16_u8): Likewise.
34532 (vreinterpretq_s32_s16): Likewise.
34533 (vreinterpretq_s32_s64): Likewise.
34534 (vreinterpretq_s32_s8): Likewise.
34535 (vreinterpretq_s32_u16): Likewise.
34536 (vreinterpretq_s32_u32): Likewise.
34537 (vreinterpretq_s32_u64): Likewise.
34538 (vreinterpretq_s32_u8): Likewise.
34539 (vreinterpretq_s64_s16): Likewise.
34540 (vreinterpretq_s64_s32): Likewise.
34541 (vreinterpretq_s64_s8): Likewise.
34542 (vreinterpretq_s64_u16): Likewise.
34543 (vreinterpretq_s64_u32): Likewise.
34544 (vreinterpretq_s64_u64): Likewise.
34545 (vreinterpretq_s64_u8): Likewise.
34546 (vreinterpretq_s8_s16): Likewise.
34547 (vreinterpretq_s8_s32): Likewise.
34548 (vreinterpretq_s8_s64): Likewise.
34549 (vreinterpretq_s8_u16): Likewise.
34550 (vreinterpretq_s8_u32): Likewise.
34551 (vreinterpretq_s8_u64): Likewise.
34552 (vreinterpretq_s8_u8): Likewise.
34553 (vreinterpretq_u16_s16): Likewise.
34554 (vreinterpretq_u16_s32): Likewise.
34555 (vreinterpretq_u16_s64): Likewise.
34556 (vreinterpretq_u16_s8): Likewise.
34557 (vreinterpretq_u16_u32): Likewise.
34558 (vreinterpretq_u16_u64): Likewise.
34559 (vreinterpretq_u16_u8): Likewise.
34560 (vreinterpretq_u32_s16): Likewise.
34561 (vreinterpretq_u32_s32): Likewise.
34562 (vreinterpretq_u32_s64): Likewise.
34563 (vreinterpretq_u32_s8): Likewise.
34564 (vreinterpretq_u32_u16): Likewise.
34565 (vreinterpretq_u32_u64): Likewise.
34566 (vreinterpretq_u32_u8): Likewise.
34567 (vreinterpretq_u64_s16): Likewise.
34568 (vreinterpretq_u64_s32): Likewise.
34569 (vreinterpretq_u64_s64): Likewise.
34570 (vreinterpretq_u64_s8): Likewise.
34571 (vreinterpretq_u64_u16): Likewise.
34572 (vreinterpretq_u64_u32): Likewise.
34573 (vreinterpretq_u64_u8): Likewise.
34574 (vreinterpretq_u8_s16): Likewise.
34575 (vreinterpretq_u8_s32): Likewise.
34576 (vreinterpretq_u8_s64): Likewise.
34577 (vreinterpretq_u8_s8): Likewise.
34578 (vreinterpretq_u8_u16): Likewise.
34579 (vreinterpretq_u8_u32): Likewise.
34580 (vreinterpretq_u8_u64): Likewise.
34581 (vreinterpretq_s32_f16): Likewise.
34582 (vreinterpretq_s32_f32): Likewise.
34583 (vreinterpretq_u16_f16): Likewise.
34584 (vreinterpretq_u16_f32): Likewise.
34585 (vreinterpretq_u32_f16): Likewise.
34586 (vreinterpretq_u32_f32): Likewise.
34587 (vreinterpretq_u64_f16): Likewise.
34588 (vreinterpretq_u64_f32): Likewise.
34589 (vreinterpretq_u8_f16): Likewise.
34590 (vreinterpretq_u8_f32): Likewise.
34591 (vreinterpretq_f16_f32): Likewise.
34592 (vreinterpretq_f16_s16): Likewise.
34593 (vreinterpretq_f16_s32): Likewise.
34594 (vreinterpretq_f16_s64): Likewise.
34595 (vreinterpretq_f16_s8): Likewise.
34596 (vreinterpretq_f16_u16): Likewise.
34597 (vreinterpretq_f16_u32): Likewise.
34598 (vreinterpretq_f16_u64): Likewise.
34599 (vreinterpretq_f16_u8): Likewise.
34600 (vreinterpretq_f32_f16): Likewise.
34601 (vreinterpretq_f32_s16): Likewise.
34602 (vreinterpretq_f32_s32): Likewise.
34603 (vreinterpretq_f32_s64): Likewise.
34604 (vreinterpretq_f32_s8): Likewise.
34605 (vreinterpretq_f32_u16): Likewise.
34606 (vreinterpretq_f32_u32): Likewise.
34607 (vreinterpretq_f32_u64): Likewise.
34608 (vreinterpretq_f32_u8): Likewise.
34609 (vreinterpretq_s16_f16): Likewise.
34610 (vreinterpretq_s16_f32): Likewise.
34611 (vreinterpretq_s64_f16): Likewise.
34612 (vreinterpretq_s64_f32): Likewise.
34613 (vreinterpretq_s8_f16): Likewise.
34614 (vreinterpretq_s8_f32): Likewise.
34615 (__arm_vreinterpretq_f16): Likewise.
34616 (__arm_vreinterpretq_f32): Likewise.
34617 (__arm_vreinterpretq_s16): Likewise.
34618 (__arm_vreinterpretq_s32): Likewise.
34619 (__arm_vreinterpretq_s64): Likewise.
34620 (__arm_vreinterpretq_s8): Likewise.
34621 (__arm_vreinterpretq_u16): Likewise.
34622 (__arm_vreinterpretq_u32): Likewise.
34623 (__arm_vreinterpretq_u64): Likewise.
34624 (__arm_vreinterpretq_u8): Likewise.
34625 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
34626 (__arm_vreinterpretq_s16_s64): Likewise.
34627 (__arm_vreinterpretq_s16_s8): Likewise.
34628 (__arm_vreinterpretq_s16_u16): Likewise.
34629 (__arm_vreinterpretq_s16_u32): Likewise.
34630 (__arm_vreinterpretq_s16_u64): Likewise.
34631 (__arm_vreinterpretq_s16_u8): Likewise.
34632 (__arm_vreinterpretq_s32_s16): Likewise.
34633 (__arm_vreinterpretq_s32_s64): Likewise.
34634 (__arm_vreinterpretq_s32_s8): Likewise.
34635 (__arm_vreinterpretq_s32_u16): Likewise.
34636 (__arm_vreinterpretq_s32_u32): Likewise.
34637 (__arm_vreinterpretq_s32_u64): Likewise.
34638 (__arm_vreinterpretq_s32_u8): Likewise.
34639 (__arm_vreinterpretq_s64_s16): Likewise.
34640 (__arm_vreinterpretq_s64_s32): Likewise.
34641 (__arm_vreinterpretq_s64_s8): Likewise.
34642 (__arm_vreinterpretq_s64_u16): Likewise.
34643 (__arm_vreinterpretq_s64_u32): Likewise.
34644 (__arm_vreinterpretq_s64_u64): Likewise.
34645 (__arm_vreinterpretq_s64_u8): Likewise.
34646 (__arm_vreinterpretq_s8_s16): Likewise.
34647 (__arm_vreinterpretq_s8_s32): Likewise.
34648 (__arm_vreinterpretq_s8_s64): Likewise.
34649 (__arm_vreinterpretq_s8_u16): Likewise.
34650 (__arm_vreinterpretq_s8_u32): Likewise.
34651 (__arm_vreinterpretq_s8_u64): Likewise.
34652 (__arm_vreinterpretq_s8_u8): Likewise.
34653 (__arm_vreinterpretq_u16_s16): Likewise.
34654 (__arm_vreinterpretq_u16_s32): Likewise.
34655 (__arm_vreinterpretq_u16_s64): Likewise.
34656 (__arm_vreinterpretq_u16_s8): Likewise.
34657 (__arm_vreinterpretq_u16_u32): Likewise.
34658 (__arm_vreinterpretq_u16_u64): Likewise.
34659 (__arm_vreinterpretq_u16_u8): Likewise.
34660 (__arm_vreinterpretq_u32_s16): Likewise.
34661 (__arm_vreinterpretq_u32_s32): Likewise.
34662 (__arm_vreinterpretq_u32_s64): Likewise.
34663 (__arm_vreinterpretq_u32_s8): Likewise.
34664 (__arm_vreinterpretq_u32_u16): Likewise.
34665 (__arm_vreinterpretq_u32_u64): Likewise.
34666 (__arm_vreinterpretq_u32_u8): Likewise.
34667 (__arm_vreinterpretq_u64_s16): Likewise.
34668 (__arm_vreinterpretq_u64_s32): Likewise.
34669 (__arm_vreinterpretq_u64_s64): Likewise.
34670 (__arm_vreinterpretq_u64_s8): Likewise.
34671 (__arm_vreinterpretq_u64_u16): Likewise.
34672 (__arm_vreinterpretq_u64_u32): Likewise.
34673 (__arm_vreinterpretq_u64_u8): Likewise.
34674 (__arm_vreinterpretq_u8_s16): Likewise.
34675 (__arm_vreinterpretq_u8_s32): Likewise.
34676 (__arm_vreinterpretq_u8_s64): Likewise.
34677 (__arm_vreinterpretq_u8_s8): Likewise.
34678 (__arm_vreinterpretq_u8_u16): Likewise.
34679 (__arm_vreinterpretq_u8_u32): Likewise.
34680 (__arm_vreinterpretq_u8_u64): Likewise.
34681 (__arm_vreinterpretq_s32_f16): Likewise.
34682 (__arm_vreinterpretq_s32_f32): Likewise.
34683 (__arm_vreinterpretq_s16_f16): Likewise.
34684 (__arm_vreinterpretq_s16_f32): Likewise.
34685 (__arm_vreinterpretq_s64_f16): Likewise.
34686 (__arm_vreinterpretq_s64_f32): Likewise.
34687 (__arm_vreinterpretq_s8_f16): Likewise.
34688 (__arm_vreinterpretq_s8_f32): Likewise.
34689 (__arm_vreinterpretq_u16_f16): Likewise.
34690 (__arm_vreinterpretq_u16_f32): Likewise.
34691 (__arm_vreinterpretq_u32_f16): Likewise.
34692 (__arm_vreinterpretq_u32_f32): Likewise.
34693 (__arm_vreinterpretq_u64_f16): Likewise.
34694 (__arm_vreinterpretq_u64_f32): Likewise.
34695 (__arm_vreinterpretq_u8_f16): Likewise.
34696 (__arm_vreinterpretq_u8_f32): Likewise.
34697 (__arm_vreinterpretq_f16_f32): Likewise.
34698 (__arm_vreinterpretq_f16_s16): Likewise.
34699 (__arm_vreinterpretq_f16_s32): Likewise.
34700 (__arm_vreinterpretq_f16_s64): Likewise.
34701 (__arm_vreinterpretq_f16_s8): Likewise.
34702 (__arm_vreinterpretq_f16_u16): Likewise.
34703 (__arm_vreinterpretq_f16_u32): Likewise.
34704 (__arm_vreinterpretq_f16_u64): Likewise.
34705 (__arm_vreinterpretq_f16_u8): Likewise.
34706 (__arm_vreinterpretq_f32_f16): Likewise.
34707 (__arm_vreinterpretq_f32_s16): Likewise.
34708 (__arm_vreinterpretq_f32_s32): Likewise.
34709 (__arm_vreinterpretq_f32_s64): Likewise.
34710 (__arm_vreinterpretq_f32_s8): Likewise.
34711 (__arm_vreinterpretq_f32_u16): Likewise.
34712 (__arm_vreinterpretq_f32_u32): Likewise.
34713 (__arm_vreinterpretq_f32_u64): Likewise.
34714 (__arm_vreinterpretq_f32_u8): Likewise.
34715 (__arm_vreinterpretq_s16): Likewise.
34716 (__arm_vreinterpretq_s32): Likewise.
34717 (__arm_vreinterpretq_s64): Likewise.
34718 (__arm_vreinterpretq_s8): Likewise.
34719 (__arm_vreinterpretq_u16): Likewise.
34720 (__arm_vreinterpretq_u32): Likewise.
34721 (__arm_vreinterpretq_u64): Likewise.
34722 (__arm_vreinterpretq_u8): Likewise.
34723 (__arm_vreinterpretq_f16): Likewise.
34724 (__arm_vreinterpretq_f32): Likewise.
34725 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
34726 * config/arm/unspecs.md: (REINTERPRET): New unspec.
34728 2023-05-03 Murray Steele <murray.steele@arm.com>
34729 Christophe Lyon <christophe.lyon@arm.com>
34730 Christophe Lyon <christophe.lyon@arm.com
34732 * config.gcc: Add arm-mve-builtins-base.o and
34733 arm-mve-builtins-shapes.o to extra_objs.
34734 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
34736 (arm_expand_builtin): Likewise
34737 (arm_check_builtin_call): Likewise
34738 (arm_describe_resolver): Likewise.
34739 * config/arm/arm-builtins.h (enum resolver_ident): Add
34741 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
34742 (arm_resolve_overloaded_builtin): Handle MVE builtins.
34743 (arm_register_target_pragmas): Register arm_check_builtin_call.
34744 * config/arm/arm-mve-builtins.cc (class registered_function): New
34746 (struct registered_function_hasher): New struct.
34747 (pred_suffixes): New table.
34748 (mode_suffixes): New table.
34749 (type_suffix_info): New table.
34750 (TYPES_float16): New.
34751 (TYPES_all_float): New.
34752 (TYPES_integer_8): New.
34753 (TYPES_integer_8_16): New.
34754 (TYPES_integer_16_32): New.
34755 (TYPES_integer_32): New.
34756 (TYPES_signed_16_32): New.
34757 (TYPES_signed_32): New.
34758 (TYPES_all_signed): New.
34759 (TYPES_all_unsigned): New.
34760 (TYPES_all_integer): New.
34761 (TYPES_all_integer_with_64): New.
34762 (DEF_VECTOR_TYPE): New.
34763 (DEF_DOUBLE_TYPE): New.
34764 (DEF_MVE_TYPES_ARRAY): New.
34765 (all_integer): New.
34766 (all_integer_with_64): New.
34770 (all_unsigned): New.
34772 (integer_8_16): New.
34773 (integer_16_32): New.
34775 (signed_16_32): New.
34777 (register_vector_type): Use void_type_node for mve.fp-only types when
34778 mve.fp is not enabled.
34779 (register_builtin_tuple_types): Likewise.
34780 (handle_arm_mve_h): New function..
34781 (matches_type_p): Likewise..
34782 (report_out_of_range): Likewise.
34783 (report_not_enum): Likewise.
34784 (report_missing_float): Likewise.
34785 (report_non_ice): Likewise.
34786 (check_requires_float): Likewise.
34787 (function_instance::hash): Likewise
34788 (function_instance::call_properties): Likewise.
34789 (function_instance::reads_global_state_p): Likewise.
34790 (function_instance::modifies_global_state_p): Likewise.
34791 (function_instance::could_trap_p): Likewise.
34792 (function_instance::has_inactive_argument): Likewise.
34793 (registered_function_hasher::hash): Likewise.
34794 (registered_function_hasher::equal): Likewise.
34795 (function_builder::function_builder): Likewise.
34796 (function_builder::~function_builder): Likewise.
34797 (function_builder::append_name): Likewise.
34798 (function_builder::finish_name): Likewise.
34799 (function_builder::get_name): Likewise.
34800 (add_attribute): Likewise.
34801 (function_builder::get_attributes): Likewise.
34802 (function_builder::add_function): Likewise.
34803 (function_builder::add_unique_function): Likewise.
34804 (function_builder::add_overloaded_function): Likewise.
34805 (function_builder::add_overloaded_functions): Likewise.
34806 (function_builder::register_function_group): Likewise.
34807 (function_call_info::function_call_info): Likewise.
34808 (function_resolver::function_resolver): Likewise.
34809 (function_resolver::get_vector_type): Likewise.
34810 (function_resolver::get_scalar_type_name): Likewise.
34811 (function_resolver::get_argument_type): Likewise.
34812 (function_resolver::scalar_argument_p): Likewise.
34813 (function_resolver::report_no_such_form): Likewise.
34814 (function_resolver::lookup_form): Likewise.
34815 (function_resolver::resolve_to): Likewise.
34816 (function_resolver::infer_vector_or_tuple_type): Likewise.
34817 (function_resolver::infer_vector_type): Likewise.
34818 (function_resolver::require_vector_or_scalar_type): Likewise.
34819 (function_resolver::require_vector_type): Likewise.
34820 (function_resolver::require_matching_vector_type): Likewise.
34821 (function_resolver::require_derived_vector_type): Likewise.
34822 (function_resolver::require_derived_scalar_type): Likewise.
34823 (function_resolver::require_integer_immediate): Likewise.
34824 (function_resolver::require_scalar_type): Likewise.
34825 (function_resolver::check_num_arguments): Likewise.
34826 (function_resolver::check_gp_argument): Likewise.
34827 (function_resolver::finish_opt_n_resolution): Likewise.
34828 (function_resolver::resolve_unary): Likewise.
34829 (function_resolver::resolve_unary_n): Likewise.
34830 (function_resolver::resolve_uniform): Likewise.
34831 (function_resolver::resolve_uniform_opt_n): Likewise.
34832 (function_resolver::resolve): Likewise.
34833 (function_checker::function_checker): Likewise.
34834 (function_checker::argument_exists_p): Likewise.
34835 (function_checker::require_immediate): Likewise.
34836 (function_checker::require_immediate_enum): Likewise.
34837 (function_checker::require_immediate_range): Likewise.
34838 (function_checker::check): Likewise.
34839 (gimple_folder::gimple_folder): Likewise.
34840 (gimple_folder::fold): Likewise.
34841 (function_expander::function_expander): Likewise.
34842 (function_expander::direct_optab_handler): Likewise.
34843 (function_expander::get_fallback_value): Likewise.
34844 (function_expander::get_reg_target): Likewise.
34845 (function_expander::add_output_operand): Likewise.
34846 (function_expander::add_input_operand): Likewise.
34847 (function_expander::add_integer_operand): Likewise.
34848 (function_expander::generate_insn): Likewise.
34849 (function_expander::use_exact_insn): Likewise.
34850 (function_expander::use_unpred_insn): Likewise.
34851 (function_expander::use_pred_x_insn): Likewise.
34852 (function_expander::use_cond_insn): Likewise.
34853 (function_expander::map_to_rtx_codes): Likewise.
34854 (function_expander::expand): Likewise.
34855 (resolve_overloaded_builtin): Likewise.
34856 (check_builtin_call): Likewise.
34857 (gimple_fold_builtin): Likewise.
34858 (expand_builtin): Likewise.
34859 (gt_ggc_mx): Likewise.
34860 (gt_pch_nx): Likewise.
34861 (gt_pch_nx): Likewise.
34862 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
34873 (offset): New mode.
34874 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
34875 (CP_READ_FPCR): Likewise.
34876 (CP_RAISE_FP_EXCEPTIONS): Likewise.
34877 (CP_READ_MEMORY): Likewise.
34878 (CP_WRITE_MEMORY): Likewise.
34879 (enum units_index): New enum.
34880 (enum predication_index): New.
34881 (enum type_class_index): New.
34882 (enum mode_suffix_index): New enum.
34883 (enum type_suffix_index): New.
34884 (struct mode_suffix_info): New struct.
34885 (struct type_suffix_info): New.
34886 (struct function_group_info): Likewise.
34887 (class function_instance): Likewise.
34888 (class registered_function): Likewise.
34889 (class function_builder): Likewise.
34890 (class function_call_info): Likewise.
34891 (class function_resolver): Likewise.
34892 (class function_checker): Likewise.
34893 (class gimple_folder): Likewise.
34894 (class function_expander): Likewise.
34895 (get_mve_pred16_t): Likewise.
34896 (find_mode_suffix): New function.
34897 (class function_base): Likewise.
34898 (class function_shape): Likewise.
34899 (function_instance::operator==): New function.
34900 (function_instance::operator!=): Likewise.
34901 (function_instance::vectors_per_tuple): Likewise.
34902 (function_instance::mode_suffix): Likewise.
34903 (function_instance::type_suffix): Likewise.
34904 (function_instance::scalar_type): Likewise.
34905 (function_instance::vector_type): Likewise.
34906 (function_instance::tuple_type): Likewise.
34907 (function_instance::vector_mode): Likewise.
34908 (function_call_info::function_returns_void_p): Likewise.
34909 (function_base::call_properties): Likewise.
34910 * config/arm/arm-protos.h (enum arm_builtin_class): Add
34912 (handle_arm_mve_h): New.
34913 (resolve_overloaded_builtin): New.
34914 (check_builtin_call): New.
34915 (gimple_fold_builtin): New.
34916 (expand_builtin): New.
34917 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
34918 arm_gimple_fold_builtin.
34919 (arm_gimple_fold_builtin): New function.
34920 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
34921 * config/arm/predicates.md (arm_any_register_operand): New predicate.
34922 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
34923 (arm-mve-builtins-shapes.o): New target.
34924 (arm-mve-builtins-base.o): New target.
34925 * config/arm/arm-mve-builtins-base.cc: New file.
34926 * config/arm/arm-mve-builtins-base.def: New file.
34927 * config/arm/arm-mve-builtins-base.h: New file.
34928 * config/arm/arm-mve-builtins-functions.h: New file.
34929 * config/arm/arm-mve-builtins-shapes.cc: New file.
34930 * config/arm/arm-mve-builtins-shapes.h: New file.
34932 2023-05-03 Murray Steele <murray.steele@arm.com>
34933 Christophe Lyon <christophe.lyon@arm.com>
34934 Christophe Lyon <christophe.lyon@arm.com>
34936 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
34938 (arm_init_builtin): Use arm_general_add_builtin_function instead
34939 of arm_add_builtin_function.
34940 (arm_init_acle_builtins): Likewise.
34941 (arm_init_mve_builtins): Likewise.
34942 (arm_init_crypto_builtins): Likewise.
34943 (arm_init_builtins): Likewise.
34944 (arm_general_builtin_decl): New function.
34945 (arm_builtin_decl): Defer to numberspace-specialized functions.
34946 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
34947 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
34948 (arm_general_expand_builtin_1): ... specialize for general builtins.
34949 (arm_expand_acle_builtin): Use arm_general_expand_builtin
34950 instead of arm_expand_builtin.
34951 (arm_expand_mve_builtin): Likewise.
34952 (arm_expand_neon_builtin): Likewise.
34953 (arm_expand_vfp_builtin): Likewise.
34954 (arm_general_expand_builtin): New function.
34955 (arm_expand_builtin): Specialize for general builtins.
34956 (arm_general_check_builtin_call): New function.
34957 (arm_check_builtin_call): Specialize for general builtins.
34958 (arm_describe_resolver): Validate numberspace.
34959 (arm_cde_end_args): Likewise.
34960 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
34961 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
34963 2023-05-03 Martin Liska <mliska@suse.cz>
34966 * config/riscv/sync.md: Add gcc_unreachable to a switch.
34968 2023-05-03 Richard Biener <rguenther@suse.de>
34970 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
34971 (patch_loop_exit): Likewise.
34972 (connect_loops): Likewise.
34973 (split_loop): Likewise.
34974 (control_dep_semi_invariant_p): Likewise.
34975 (do_split_loop_on_cond): Likewise.
34976 (split_loop_on_cond): Likewise.
34977 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
34979 (simplify_loop_version): Likewise.
34980 (evaluate_bbs): Likewise.
34981 (find_loop_guard): Likewise.
34982 (clean_up_after_unswitching): Likewise.
34983 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
34985 (optimize_spaceship): Take a gcond * argument, avoid
34987 (math_opts_dom_walker::after_dom_children): Adjust call to
34988 optimize_spaceship.
34989 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
34990 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
34993 2023-05-03 Andreas Schwab <schwab@suse.de>
34995 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
34997 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34999 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
35001 (class vlseg): New class.
35002 (class vsseg): Ditto.
35003 (class vlsseg): Ditto.
35004 (class vssseg): Ditto.
35005 (class seg_indexed_load): Ditto.
35006 (class seg_indexed_store): Ditto.
35007 (class vlsegff): Ditto.
35009 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35010 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
35020 * config/riscv/riscv-vector-builtins-shapes.cc (struct
35021 seg_loadstore_def): Ditto.
35022 (struct seg_indexed_loadstore_def): Ditto.
35023 (struct seg_fault_load_def): Ditto.
35025 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35026 * config/riscv/riscv-vector-builtins.cc
35027 (function_builder::append_nf): New function.
35028 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
35029 Change ptr from double into float.
35030 (vfloat32m1x3_t): Ditto.
35031 (vfloat32m1x4_t): Ditto.
35032 (vfloat32m1x5_t): Ditto.
35033 (vfloat32m1x6_t): Ditto.
35034 (vfloat32m1x7_t): Ditto.
35035 (vfloat32m1x8_t): Ditto.
35036 (vfloat32m2x2_t): Ditto.
35037 (vfloat32m2x3_t): Ditto.
35038 (vfloat32m2x4_t): Ditto.
35039 (vfloat32m4x2_t): Ditto.
35040 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
35041 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
35043 * config/riscv/riscv.md: Add segment instructions.
35044 * config/riscv/vector-iterators.md: Support segment intrinsics.
35045 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
35047 (@pred_unit_strided_store<mode>): Ditto.
35048 (@pred_strided_load<mode>): Ditto.
35049 (@pred_strided_store<mode>): Ditto.
35050 (@pred_fault_load<mode>): Ditto.
35051 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
35052 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
35053 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
35054 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
35055 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
35056 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
35057 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
35058 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
35059 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
35060 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
35061 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
35062 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
35063 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
35064 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
35066 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35068 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
35069 tuple type support.
35071 (floattype): Ditto.
35073 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
35074 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
35076 (vget): Add tuple type vget.
35077 * config/riscv/riscv-vector-builtins-types.def
35078 (DEF_RVV_TUPLE_OPS): New macro.
35079 (vint8mf8x2_t): Ditto.
35080 (vuint8mf8x2_t): Ditto.
35081 (vint8mf8x3_t): Ditto.
35082 (vuint8mf8x3_t): Ditto.
35083 (vint8mf8x4_t): Ditto.
35084 (vuint8mf8x4_t): Ditto.
35085 (vint8mf8x5_t): Ditto.
35086 (vuint8mf8x5_t): Ditto.
35087 (vint8mf8x6_t): Ditto.
35088 (vuint8mf8x6_t): Ditto.
35089 (vint8mf8x7_t): Ditto.
35090 (vuint8mf8x7_t): Ditto.
35091 (vint8mf8x8_t): Ditto.
35092 (vuint8mf8x8_t): Ditto.
35093 (vint8mf4x2_t): Ditto.
35094 (vuint8mf4x2_t): Ditto.
35095 (vint8mf4x3_t): Ditto.
35096 (vuint8mf4x3_t): Ditto.
35097 (vint8mf4x4_t): Ditto.
35098 (vuint8mf4x4_t): Ditto.
35099 (vint8mf4x5_t): Ditto.
35100 (vuint8mf4x5_t): Ditto.
35101 (vint8mf4x6_t): Ditto.
35102 (vuint8mf4x6_t): Ditto.
35103 (vint8mf4x7_t): Ditto.
35104 (vuint8mf4x7_t): Ditto.
35105 (vint8mf4x8_t): Ditto.
35106 (vuint8mf4x8_t): Ditto.
35107 (vint8mf2x2_t): Ditto.
35108 (vuint8mf2x2_t): Ditto.
35109 (vint8mf2x3_t): Ditto.
35110 (vuint8mf2x3_t): Ditto.
35111 (vint8mf2x4_t): Ditto.
35112 (vuint8mf2x4_t): Ditto.
35113 (vint8mf2x5_t): Ditto.
35114 (vuint8mf2x5_t): Ditto.
35115 (vint8mf2x6_t): Ditto.
35116 (vuint8mf2x6_t): Ditto.
35117 (vint8mf2x7_t): Ditto.
35118 (vuint8mf2x7_t): Ditto.
35119 (vint8mf2x8_t): Ditto.
35120 (vuint8mf2x8_t): Ditto.
35121 (vint8m1x2_t): Ditto.
35122 (vuint8m1x2_t): Ditto.
35123 (vint8m1x3_t): Ditto.
35124 (vuint8m1x3_t): Ditto.
35125 (vint8m1x4_t): Ditto.
35126 (vuint8m1x4_t): Ditto.
35127 (vint8m1x5_t): Ditto.
35128 (vuint8m1x5_t): Ditto.
35129 (vint8m1x6_t): Ditto.
35130 (vuint8m1x6_t): Ditto.
35131 (vint8m1x7_t): Ditto.
35132 (vuint8m1x7_t): Ditto.
35133 (vint8m1x8_t): Ditto.
35134 (vuint8m1x8_t): Ditto.
35135 (vint8m2x2_t): Ditto.
35136 (vuint8m2x2_t): Ditto.
35137 (vint8m2x3_t): Ditto.
35138 (vuint8m2x3_t): Ditto.
35139 (vint8m2x4_t): Ditto.
35140 (vuint8m2x4_t): Ditto.
35141 (vint8m4x2_t): Ditto.
35142 (vuint8m4x2_t): Ditto.
35143 (vint16mf4x2_t): Ditto.
35144 (vuint16mf4x2_t): Ditto.
35145 (vint16mf4x3_t): Ditto.
35146 (vuint16mf4x3_t): Ditto.
35147 (vint16mf4x4_t): Ditto.
35148 (vuint16mf4x4_t): Ditto.
35149 (vint16mf4x5_t): Ditto.
35150 (vuint16mf4x5_t): Ditto.
35151 (vint16mf4x6_t): Ditto.
35152 (vuint16mf4x6_t): Ditto.
35153 (vint16mf4x7_t): Ditto.
35154 (vuint16mf4x7_t): Ditto.
35155 (vint16mf4x8_t): Ditto.
35156 (vuint16mf4x8_t): Ditto.
35157 (vint16mf2x2_t): Ditto.
35158 (vuint16mf2x2_t): Ditto.
35159 (vint16mf2x3_t): Ditto.
35160 (vuint16mf2x3_t): Ditto.
35161 (vint16mf2x4_t): Ditto.
35162 (vuint16mf2x4_t): Ditto.
35163 (vint16mf2x5_t): Ditto.
35164 (vuint16mf2x5_t): Ditto.
35165 (vint16mf2x6_t): Ditto.
35166 (vuint16mf2x6_t): Ditto.
35167 (vint16mf2x7_t): Ditto.
35168 (vuint16mf2x7_t): Ditto.
35169 (vint16mf2x8_t): Ditto.
35170 (vuint16mf2x8_t): Ditto.
35171 (vint16m1x2_t): Ditto.
35172 (vuint16m1x2_t): Ditto.
35173 (vint16m1x3_t): Ditto.
35174 (vuint16m1x3_t): Ditto.
35175 (vint16m1x4_t): Ditto.
35176 (vuint16m1x4_t): Ditto.
35177 (vint16m1x5_t): Ditto.
35178 (vuint16m1x5_t): Ditto.
35179 (vint16m1x6_t): Ditto.
35180 (vuint16m1x6_t): Ditto.
35181 (vint16m1x7_t): Ditto.
35182 (vuint16m1x7_t): Ditto.
35183 (vint16m1x8_t): Ditto.
35184 (vuint16m1x8_t): Ditto.
35185 (vint16m2x2_t): Ditto.
35186 (vuint16m2x2_t): Ditto.
35187 (vint16m2x3_t): Ditto.
35188 (vuint16m2x3_t): Ditto.
35189 (vint16m2x4_t): Ditto.
35190 (vuint16m2x4_t): Ditto.
35191 (vint16m4x2_t): Ditto.
35192 (vuint16m4x2_t): Ditto.
35193 (vint32mf2x2_t): Ditto.
35194 (vuint32mf2x2_t): Ditto.
35195 (vint32mf2x3_t): Ditto.
35196 (vuint32mf2x3_t): Ditto.
35197 (vint32mf2x4_t): Ditto.
35198 (vuint32mf2x4_t): Ditto.
35199 (vint32mf2x5_t): Ditto.
35200 (vuint32mf2x5_t): Ditto.
35201 (vint32mf2x6_t): Ditto.
35202 (vuint32mf2x6_t): Ditto.
35203 (vint32mf2x7_t): Ditto.
35204 (vuint32mf2x7_t): Ditto.
35205 (vint32mf2x8_t): Ditto.
35206 (vuint32mf2x8_t): Ditto.
35207 (vint32m1x2_t): Ditto.
35208 (vuint32m1x2_t): Ditto.
35209 (vint32m1x3_t): Ditto.
35210 (vuint32m1x3_t): Ditto.
35211 (vint32m1x4_t): Ditto.
35212 (vuint32m1x4_t): Ditto.
35213 (vint32m1x5_t): Ditto.
35214 (vuint32m1x5_t): Ditto.
35215 (vint32m1x6_t): Ditto.
35216 (vuint32m1x6_t): Ditto.
35217 (vint32m1x7_t): Ditto.
35218 (vuint32m1x7_t): Ditto.
35219 (vint32m1x8_t): Ditto.
35220 (vuint32m1x8_t): Ditto.
35221 (vint32m2x2_t): Ditto.
35222 (vuint32m2x2_t): Ditto.
35223 (vint32m2x3_t): Ditto.
35224 (vuint32m2x3_t): Ditto.
35225 (vint32m2x4_t): Ditto.
35226 (vuint32m2x4_t): Ditto.
35227 (vint32m4x2_t): Ditto.
35228 (vuint32m4x2_t): Ditto.
35229 (vint64m1x2_t): Ditto.
35230 (vuint64m1x2_t): Ditto.
35231 (vint64m1x3_t): Ditto.
35232 (vuint64m1x3_t): Ditto.
35233 (vint64m1x4_t): Ditto.
35234 (vuint64m1x4_t): Ditto.
35235 (vint64m1x5_t): Ditto.
35236 (vuint64m1x5_t): Ditto.
35237 (vint64m1x6_t): Ditto.
35238 (vuint64m1x6_t): Ditto.
35239 (vint64m1x7_t): Ditto.
35240 (vuint64m1x7_t): Ditto.
35241 (vint64m1x8_t): Ditto.
35242 (vuint64m1x8_t): Ditto.
35243 (vint64m2x2_t): Ditto.
35244 (vuint64m2x2_t): Ditto.
35245 (vint64m2x3_t): Ditto.
35246 (vuint64m2x3_t): Ditto.
35247 (vint64m2x4_t): Ditto.
35248 (vuint64m2x4_t): Ditto.
35249 (vint64m4x2_t): Ditto.
35250 (vuint64m4x2_t): Ditto.
35251 (vfloat32mf2x2_t): Ditto.
35252 (vfloat32mf2x3_t): Ditto.
35253 (vfloat32mf2x4_t): Ditto.
35254 (vfloat32mf2x5_t): Ditto.
35255 (vfloat32mf2x6_t): Ditto.
35256 (vfloat32mf2x7_t): Ditto.
35257 (vfloat32mf2x8_t): Ditto.
35258 (vfloat32m1x2_t): Ditto.
35259 (vfloat32m1x3_t): Ditto.
35260 (vfloat32m1x4_t): Ditto.
35261 (vfloat32m1x5_t): Ditto.
35262 (vfloat32m1x6_t): Ditto.
35263 (vfloat32m1x7_t): Ditto.
35264 (vfloat32m1x8_t): Ditto.
35265 (vfloat32m2x2_t): Ditto.
35266 (vfloat32m2x3_t): Ditto.
35267 (vfloat32m2x4_t): Ditto.
35268 (vfloat32m4x2_t): Ditto.
35269 (vfloat64m1x2_t): Ditto.
35270 (vfloat64m1x3_t): Ditto.
35271 (vfloat64m1x4_t): Ditto.
35272 (vfloat64m1x5_t): Ditto.
35273 (vfloat64m1x6_t): Ditto.
35274 (vfloat64m1x7_t): Ditto.
35275 (vfloat64m1x8_t): Ditto.
35276 (vfloat64m2x2_t): Ditto.
35277 (vfloat64m2x3_t): Ditto.
35278 (vfloat64m2x4_t): Ditto.
35279 (vfloat64m4x2_t): Ditto.
35280 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
35282 (DEF_RVV_TYPE_INDEX): Ditto.
35283 (rvv_arg_type_info::get_tuple_subpart_type): New function.
35284 (DEF_RVV_TUPLE_TYPE): New macro.
35285 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
35286 Adapt for tuple vget/vset support.
35287 (vint8mf4_t): Ditto.
35288 (vuint8mf4_t): Ditto.
35289 (vint8mf2_t): Ditto.
35290 (vuint8mf2_t): Ditto.
35291 (vint8m1_t): Ditto.
35292 (vuint8m1_t): Ditto.
35293 (vint8m2_t): Ditto.
35294 (vuint8m2_t): Ditto.
35295 (vint8m4_t): Ditto.
35296 (vuint8m4_t): Ditto.
35297 (vint8m8_t): Ditto.
35298 (vuint8m8_t): Ditto.
35299 (vint16mf4_t): Ditto.
35300 (vuint16mf4_t): Ditto.
35301 (vint16mf2_t): Ditto.
35302 (vuint16mf2_t): Ditto.
35303 (vint16m1_t): Ditto.
35304 (vuint16m1_t): Ditto.
35305 (vint16m2_t): Ditto.
35306 (vuint16m2_t): Ditto.
35307 (vint16m4_t): Ditto.
35308 (vuint16m4_t): Ditto.
35309 (vint16m8_t): Ditto.
35310 (vuint16m8_t): Ditto.
35311 (vint32mf2_t): Ditto.
35312 (vuint32mf2_t): Ditto.
35313 (vint32m1_t): Ditto.
35314 (vuint32m1_t): Ditto.
35315 (vint32m2_t): Ditto.
35316 (vuint32m2_t): Ditto.
35317 (vint32m4_t): Ditto.
35318 (vuint32m4_t): Ditto.
35319 (vint32m8_t): Ditto.
35320 (vuint32m8_t): Ditto.
35321 (vint64m1_t): Ditto.
35322 (vuint64m1_t): Ditto.
35323 (vint64m2_t): Ditto.
35324 (vuint64m2_t): Ditto.
35325 (vint64m4_t): Ditto.
35326 (vuint64m4_t): Ditto.
35327 (vint64m8_t): Ditto.
35328 (vuint64m8_t): Ditto.
35329 (vfloat32mf2_t): Ditto.
35330 (vfloat32m1_t): Ditto.
35331 (vfloat32m2_t): Ditto.
35332 (vfloat32m4_t): Ditto.
35333 (vfloat32m8_t): Ditto.
35334 (vfloat64m1_t): Ditto.
35335 (vfloat64m2_t): Ditto.
35336 (vfloat64m4_t): Ditto.
35337 (vfloat64m8_t): Ditto.
35338 (tuple_subpart): Add tuple subpart base type.
35339 * config/riscv/riscv-vector-builtins.h (struct
35340 rvv_arg_type_info): Ditto.
35341 (tuple_type_field): New function.
35343 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35345 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
35346 (RVV_TUPLE_PARTIAL_MODES): Ditto.
35347 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
35350 (get_subpart_mode): Ditto.
35351 (get_tuple_mode): Ditto.
35352 (expand_tuple_move): Ditto.
35353 * config/riscv/riscv-v.cc (ENTRY): New macro.
35354 (TUPLE_ENTRY): Ditto.
35355 (get_nf): New function.
35356 (get_subpart_mode): Ditto.
35357 (get_tuple_mode): Ditto.
35358 (expand_tuple_move): Ditto.
35359 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
35361 (register_tuple_type): New function
35362 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
35364 (vint8mf8x2_t): New macro.
35365 (vuint8mf8x2_t): Ditto.
35366 (vint8mf8x3_t): Ditto.
35367 (vuint8mf8x3_t): Ditto.
35368 (vint8mf8x4_t): Ditto.
35369 (vuint8mf8x4_t): Ditto.
35370 (vint8mf8x5_t): Ditto.
35371 (vuint8mf8x5_t): Ditto.
35372 (vint8mf8x6_t): Ditto.
35373 (vuint8mf8x6_t): Ditto.
35374 (vint8mf8x7_t): Ditto.
35375 (vuint8mf8x7_t): Ditto.
35376 (vint8mf8x8_t): Ditto.
35377 (vuint8mf8x8_t): Ditto.
35378 (vint8mf4x2_t): Ditto.
35379 (vuint8mf4x2_t): Ditto.
35380 (vint8mf4x3_t): Ditto.
35381 (vuint8mf4x3_t): Ditto.
35382 (vint8mf4x4_t): Ditto.
35383 (vuint8mf4x4_t): Ditto.
35384 (vint8mf4x5_t): Ditto.
35385 (vuint8mf4x5_t): Ditto.
35386 (vint8mf4x6_t): Ditto.
35387 (vuint8mf4x6_t): Ditto.
35388 (vint8mf4x7_t): Ditto.
35389 (vuint8mf4x7_t): Ditto.
35390 (vint8mf4x8_t): Ditto.
35391 (vuint8mf4x8_t): Ditto.
35392 (vint8mf2x2_t): Ditto.
35393 (vuint8mf2x2_t): Ditto.
35394 (vint8mf2x3_t): Ditto.
35395 (vuint8mf2x3_t): Ditto.
35396 (vint8mf2x4_t): Ditto.
35397 (vuint8mf2x4_t): Ditto.
35398 (vint8mf2x5_t): Ditto.
35399 (vuint8mf2x5_t): Ditto.
35400 (vint8mf2x6_t): Ditto.
35401 (vuint8mf2x6_t): Ditto.
35402 (vint8mf2x7_t): Ditto.
35403 (vuint8mf2x7_t): Ditto.
35404 (vint8mf2x8_t): Ditto.
35405 (vuint8mf2x8_t): Ditto.
35406 (vint8m1x2_t): Ditto.
35407 (vuint8m1x2_t): Ditto.
35408 (vint8m1x3_t): Ditto.
35409 (vuint8m1x3_t): Ditto.
35410 (vint8m1x4_t): Ditto.
35411 (vuint8m1x4_t): Ditto.
35412 (vint8m1x5_t): Ditto.
35413 (vuint8m1x5_t): Ditto.
35414 (vint8m1x6_t): Ditto.
35415 (vuint8m1x6_t): Ditto.
35416 (vint8m1x7_t): Ditto.
35417 (vuint8m1x7_t): Ditto.
35418 (vint8m1x8_t): Ditto.
35419 (vuint8m1x8_t): Ditto.
35420 (vint8m2x2_t): Ditto.
35421 (vuint8m2x2_t): Ditto.
35422 (vint8m2x3_t): Ditto.
35423 (vuint8m2x3_t): Ditto.
35424 (vint8m2x4_t): Ditto.
35425 (vuint8m2x4_t): Ditto.
35426 (vint8m4x2_t): Ditto.
35427 (vuint8m4x2_t): Ditto.
35428 (vint16mf4x2_t): Ditto.
35429 (vuint16mf4x2_t): Ditto.
35430 (vint16mf4x3_t): Ditto.
35431 (vuint16mf4x3_t): Ditto.
35432 (vint16mf4x4_t): Ditto.
35433 (vuint16mf4x4_t): Ditto.
35434 (vint16mf4x5_t): Ditto.
35435 (vuint16mf4x5_t): Ditto.
35436 (vint16mf4x6_t): Ditto.
35437 (vuint16mf4x6_t): Ditto.
35438 (vint16mf4x7_t): Ditto.
35439 (vuint16mf4x7_t): Ditto.
35440 (vint16mf4x8_t): Ditto.
35441 (vuint16mf4x8_t): Ditto.
35442 (vint16mf2x2_t): Ditto.
35443 (vuint16mf2x2_t): Ditto.
35444 (vint16mf2x3_t): Ditto.
35445 (vuint16mf2x3_t): Ditto.
35446 (vint16mf2x4_t): Ditto.
35447 (vuint16mf2x4_t): Ditto.
35448 (vint16mf2x5_t): Ditto.
35449 (vuint16mf2x5_t): Ditto.
35450 (vint16mf2x6_t): Ditto.
35451 (vuint16mf2x6_t): Ditto.
35452 (vint16mf2x7_t): Ditto.
35453 (vuint16mf2x7_t): Ditto.
35454 (vint16mf2x8_t): Ditto.
35455 (vuint16mf2x8_t): Ditto.
35456 (vint16m1x2_t): Ditto.
35457 (vuint16m1x2_t): Ditto.
35458 (vint16m1x3_t): Ditto.
35459 (vuint16m1x3_t): Ditto.
35460 (vint16m1x4_t): Ditto.
35461 (vuint16m1x4_t): Ditto.
35462 (vint16m1x5_t): Ditto.
35463 (vuint16m1x5_t): Ditto.
35464 (vint16m1x6_t): Ditto.
35465 (vuint16m1x6_t): Ditto.
35466 (vint16m1x7_t): Ditto.
35467 (vuint16m1x7_t): Ditto.
35468 (vint16m1x8_t): Ditto.
35469 (vuint16m1x8_t): Ditto.
35470 (vint16m2x2_t): Ditto.
35471 (vuint16m2x2_t): Ditto.
35472 (vint16m2x3_t): Ditto.
35473 (vuint16m2x3_t): Ditto.
35474 (vint16m2x4_t): Ditto.
35475 (vuint16m2x4_t): Ditto.
35476 (vint16m4x2_t): Ditto.
35477 (vuint16m4x2_t): Ditto.
35478 (vint32mf2x2_t): Ditto.
35479 (vuint32mf2x2_t): Ditto.
35480 (vint32mf2x3_t): Ditto.
35481 (vuint32mf2x3_t): Ditto.
35482 (vint32mf2x4_t): Ditto.
35483 (vuint32mf2x4_t): Ditto.
35484 (vint32mf2x5_t): Ditto.
35485 (vuint32mf2x5_t): Ditto.
35486 (vint32mf2x6_t): Ditto.
35487 (vuint32mf2x6_t): Ditto.
35488 (vint32mf2x7_t): Ditto.
35489 (vuint32mf2x7_t): Ditto.
35490 (vint32mf2x8_t): Ditto.
35491 (vuint32mf2x8_t): Ditto.
35492 (vint32m1x2_t): Ditto.
35493 (vuint32m1x2_t): Ditto.
35494 (vint32m1x3_t): Ditto.
35495 (vuint32m1x3_t): Ditto.
35496 (vint32m1x4_t): Ditto.
35497 (vuint32m1x4_t): Ditto.
35498 (vint32m1x5_t): Ditto.
35499 (vuint32m1x5_t): Ditto.
35500 (vint32m1x6_t): Ditto.
35501 (vuint32m1x6_t): Ditto.
35502 (vint32m1x7_t): Ditto.
35503 (vuint32m1x7_t): Ditto.
35504 (vint32m1x8_t): Ditto.
35505 (vuint32m1x8_t): Ditto.
35506 (vint32m2x2_t): Ditto.
35507 (vuint32m2x2_t): Ditto.
35508 (vint32m2x3_t): Ditto.
35509 (vuint32m2x3_t): Ditto.
35510 (vint32m2x4_t): Ditto.
35511 (vuint32m2x4_t): Ditto.
35512 (vint32m4x2_t): Ditto.
35513 (vuint32m4x2_t): Ditto.
35514 (vint64m1x2_t): Ditto.
35515 (vuint64m1x2_t): Ditto.
35516 (vint64m1x3_t): Ditto.
35517 (vuint64m1x3_t): Ditto.
35518 (vint64m1x4_t): Ditto.
35519 (vuint64m1x4_t): Ditto.
35520 (vint64m1x5_t): Ditto.
35521 (vuint64m1x5_t): Ditto.
35522 (vint64m1x6_t): Ditto.
35523 (vuint64m1x6_t): Ditto.
35524 (vint64m1x7_t): Ditto.
35525 (vuint64m1x7_t): Ditto.
35526 (vint64m1x8_t): Ditto.
35527 (vuint64m1x8_t): Ditto.
35528 (vint64m2x2_t): Ditto.
35529 (vuint64m2x2_t): Ditto.
35530 (vint64m2x3_t): Ditto.
35531 (vuint64m2x3_t): Ditto.
35532 (vint64m2x4_t): Ditto.
35533 (vuint64m2x4_t): Ditto.
35534 (vint64m4x2_t): Ditto.
35535 (vuint64m4x2_t): Ditto.
35536 (vfloat32mf2x2_t): Ditto.
35537 (vfloat32mf2x3_t): Ditto.
35538 (vfloat32mf2x4_t): Ditto.
35539 (vfloat32mf2x5_t): Ditto.
35540 (vfloat32mf2x6_t): Ditto.
35541 (vfloat32mf2x7_t): Ditto.
35542 (vfloat32mf2x8_t): Ditto.
35543 (vfloat32m1x2_t): Ditto.
35544 (vfloat32m1x3_t): Ditto.
35545 (vfloat32m1x4_t): Ditto.
35546 (vfloat32m1x5_t): Ditto.
35547 (vfloat32m1x6_t): Ditto.
35548 (vfloat32m1x7_t): Ditto.
35549 (vfloat32m1x8_t): Ditto.
35550 (vfloat32m2x2_t): Ditto.
35551 (vfloat32m2x3_t): Ditto.
35552 (vfloat32m2x4_t): Ditto.
35553 (vfloat32m4x2_t): Ditto.
35554 (vfloat64m1x2_t): Ditto.
35555 (vfloat64m1x3_t): Ditto.
35556 (vfloat64m1x4_t): Ditto.
35557 (vfloat64m1x5_t): Ditto.
35558 (vfloat64m1x6_t): Ditto.
35559 (vfloat64m1x7_t): Ditto.
35560 (vfloat64m1x8_t): Ditto.
35561 (vfloat64m2x2_t): Ditto.
35562 (vfloat64m2x3_t): Ditto.
35563 (vfloat64m2x4_t): Ditto.
35564 (vfloat64m4x2_t): Ditto.
35565 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
35567 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
35568 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
35570 (TUPLE_ENTRY): Ditto.
35571 (riscv_v_ext_mode_p): New function.
35572 (riscv_v_adjust_nunits): Add tuple mode adjustment.
35573 (riscv_classify_address): Ditto.
35574 (riscv_binary_cost): Ditto.
35575 (riscv_rtx_costs): Ditto.
35576 (riscv_secondary_memory_needed): Ditto.
35577 (riscv_hard_regno_nregs): Ditto.
35578 (riscv_hard_regno_mode_ok): Ditto.
35579 (riscv_vector_mode_supported_p): Ditto.
35580 (riscv_regmode_natural_size): Ditto.
35581 (riscv_array_mode): New function.
35582 (TARGET_ARRAY_MODE): New target hook.
35583 * config/riscv/riscv.md: Add tuple modes.
35584 * config/riscv/vector-iterators.md: Ditto.
35585 * config/riscv/vector.md (mov<mode>): Add tuple modes data
35587 (*mov<VT:mode>_<P:mode>): Ditto.
35589 2023-05-03 Richard Biener <rguenther@suse.de>
35591 * cse.cc (cse_insn): Track an equivalence to the destination
35592 separately and delay using src_related for it.
35594 2023-05-03 Richard Biener <rguenther@suse.de>
35596 * cse.cc (HASH): Turn into inline function and mix
35597 in another HASH_SHIFT bits.
35598 (SAFE_HASH): Likewise.
35600 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35603 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
35604 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
35606 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35609 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
35610 (add<mode>3<vczle><vczbe>): ... This.
35611 (sub<mode>3): Rename to...
35612 (sub<mode>3<vczle><vczbe>): ... This.
35613 (mul<mode>3): Rename to...
35614 (mul<mode>3<vczle><vczbe>): ... This.
35615 (*div<mode>3): Rename to...
35616 (*div<mode>3<vczle><vczbe>): ... This.
35617 (neg<mode>2): Rename to...
35618 (neg<mode>2<vczle><vczbe>): ... This.
35619 (abs<mode>2): Rename to...
35620 (abs<mode>2<vczle><vczbe>): ... This.
35621 (<frint_pattern><mode>2): Rename to...
35622 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
35623 (<fmaxmin><mode>3): Rename to...
35624 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
35625 (*sqrt<mode>2): Rename to...
35626 (*sqrt<mode>2<vczle><vczbe>): ... This.
35628 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
35630 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
35632 2023-05-03 Martin Liska <mliska@suse.cz>
35634 PR tree-optimization/109693
35635 * value-range-storage.cc (vrange_allocator::vrange_allocator):
35636 Remove unused field.
35637 * value-range-storage.h: Likewise.
35639 2023-05-02 Andrew Pinski <apinski@marvell.com>
35641 * tree-ssa-phiopt.cc (move_stmt): New function.
35642 (match_simplify_replacement): Use move_stmt instead
35643 of the inlined version.
35645 2023-05-02 Andrew Pinski <apinski@marvell.com>
35647 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
35650 2023-05-02 Andrew Pinski <apinski@marvell.com>
35652 PR tree-optimization/109702
35653 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
35654 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
35656 2023-05-02 Andrew Pinski <apinski@marvell.com>
35659 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
35660 insn_and_split pattern.
35662 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35664 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
35667 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35669 * config/riscv/sync.md (mem_thread_fence_1): Change fence
35670 depending on the given memory model.
35672 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35674 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
35675 riscv_union_memmodels function to sync.md.
35676 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
35677 get the union of two memmodels in sync.md.
35678 (riscv_print_operand): Add %I and %J flags that output the
35679 optimal LR/SC flag bits for a given memory model.
35680 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
35681 bits on SC op and replace with optimized %I, %J flags.
35683 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35685 * config/riscv/riscv.cc
35686 (riscv_memmodel_needs_amo_release): Change function name.
35687 (riscv_print_operand): Remove unneeded %F case.
35688 * config/riscv/sync.md: Remove unneeded fences.
35690 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35693 * config/riscv/sync.md (atomic_store<mode>): Use simple store
35694 instruction in combination with fence(s).
35696 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35698 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
35699 of %A to include release bits.
35701 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35703 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
35704 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
35707 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35709 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
35710 sequentially consistent LR.aqrl/SC.rl pairs.
35712 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
35714 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
35715 sanitize memmodel input with memmodel_base.
35717 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
35718 Pan Li <pan2.li@intel.com>
35721 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
35723 2023-05-02 Romain Naour <romain.naour@gmail.com>
35725 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
35728 2023-05-02 Martin Liska <mliska@suse.cz>
35730 * doc/invoke.texi: Update documentation based on param.opt file.
35732 2023-05-02 Richard Biener <rguenther@suse.de>
35734 PR tree-optimization/109672
35735 * tree-vect-stmts.cc (vectorizable_operation): For plus,
35736 minus and negate always check the vector mode is word mode.
35738 2023-05-01 Andrew Pinski <apinski@marvell.com>
35740 * tree-ssa-phiopt.cc: Update comment about
35741 how the transformation are implemented.
35743 2023-05-01 Jeff Law <jlaw@ventanamicro>
35745 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
35747 2023-05-01 Jeff Law <jlaw@ventanamicro>
35749 * config/cris/cris.cc (TARGET_LRA_P): Remove.
35750 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
35751 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
35752 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
35753 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
35754 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
35756 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
35758 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
35759 * print-tree.cc (print_decl_identifier): Implement it.
35760 * toplev.cc (output_stack_usage_1): Use it.
35762 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35764 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
35767 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35769 * value-range.h (irange::set_nonzero): Inline.
35771 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35773 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
35775 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
35776 invalid_range, as it is an inverse range.
35777 * tree-vrp.cc (find_case_label_range): Avoid trees.
35778 * value-range.cc (irange::irange_set): Delete.
35779 (irange::irange_set_1bit_anti_range): Delete.
35780 (irange::irange_set_anti_range): Delete.
35781 (irange::set): Cleanup.
35782 * value-range.h (class irange): Remove irange_set,
35783 irange_set_anti_range, irange_set_1bit_anti_range.
35784 (irange::set_undefined): Remove set to m_type.
35786 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35788 * range-op.cc (update_known_bitmask): Adjust for irange containing
35789 wide_ints internally.
35790 * tree-ssanames.cc (set_nonzero_bits): Same.
35791 * tree-ssanames.h (set_nonzero_bits): Same.
35792 * value-range-storage.cc (irange_storage::set_irange): Same.
35793 (irange_storage::get_irange): Same.
35794 * value-range.cc (irange::operator=): Same.
35795 (irange::irange_set): Same.
35796 (irange::irange_set_1bit_anti_range): Same.
35797 (irange::irange_set_anti_range): Same.
35798 (irange::set): Same.
35799 (irange::verify_range): Same.
35800 (irange::contains_p): Same.
35801 (irange::irange_single_pair_union): Same.
35802 (irange::union_): Same.
35803 (irange::irange_contains_p): Same.
35804 (irange::intersect): Same.
35805 (irange::invert): Same.
35806 (irange::set_range_from_nonzero_bits): Same.
35807 (irange::set_nonzero_bits): Same.
35808 (mask_to_wi): Same.
35809 (irange::intersect_nonzero_bits): Same.
35810 (irange::union_nonzero_bits): Same.
35813 (tree_range): Same.
35814 (range_tests_strict_enum): Same.
35815 (range_tests_misc): Same.
35816 (range_tests_nonzero_bits): Same.
35817 * value-range.h (irange::type): Same.
35818 (irange::varying_compatible_p): Same.
35819 (irange::irange): Same.
35820 (int_range::int_range): Same.
35821 (irange::set_undefined): Same.
35822 (irange::set_varying): Same.
35823 (irange::lower_bound): Same.
35824 (irange::upper_bound): Same.
35826 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35828 * gimple-range-fold.cc (tree_lower_bound): Delete.
35829 (tree_upper_bound): Delete.
35830 (vrp_val_max): Delete.
35831 (vrp_val_min): Delete.
35832 (fold_using_range::range_of_ssa_name_with_loop_info): Call
35833 range_of_var_in_loop.
35834 * vr-values.cc (valid_value_p): Delete.
35835 (fix_overflow): Delete.
35836 (get_scev_info): New.
35837 (bounds_of_var_in_loop): Refactor into...
35838 (induction_variable_may_overflow_p): ...this,
35839 (range_from_loop_direction): ...and this,
35840 (range_of_var_in_loop): ...and this.
35841 * vr-values.h (bounds_of_var_in_loop): Delete.
35842 (range_of_var_in_loop): New.
35844 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35846 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
35848 (vrp_val_max): New.
35849 (vrp_val_min): New.
35850 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
35851 * range-op.cc (max_limit): Same.
35853 (plus_minus_ranges): Same.
35854 (operator_rshift::op1_range): Same.
35855 (operator_cast::inside_domain_p): Same.
35856 * value-range.cc (vrp_val_is_max): Delete.
35857 (vrp_val_is_min): Delete.
35858 (range_tests_misc): Use irange_val_*.
35859 * value-range.h (vrp_val_is_min): Delete.
35860 (vrp_val_is_max): Delete.
35861 (vrp_val_max): Delete.
35862 (irange_val_min): New.
35863 (vrp_val_min): Delete.
35864 (irange_val_max): New.
35865 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
35867 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35869 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
35870 * gimple-fold.cc (size_must_be_zero_p): Same.
35871 * gimple-loop-versioning.cc
35872 (loop_versioning::prune_loop_conditions): Same.
35873 * gimple-range-edge.cc (gcond_edge_range): Same.
35874 (gimple_outgoing_range::calc_switch_ranges): Same.
35875 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
35876 (adjust_realpart_expr): Same.
35877 (fold_using_range::range_of_address): Same.
35878 (fold_using_range::relation_fold_and_or): Same.
35879 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
35880 (range_is_either_true_or_false): Same.
35881 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
35882 (cfn_clz::fold_range): Same.
35883 (cfn_ctz::fold_range): Same.
35884 * gimple-range-tests.cc (class test_expr_eval): Same.
35885 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
35886 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
35887 (propagate_vr_across_jump_function): Same.
35888 (decide_whether_version_node): Same.
35889 * ipa-prop.cc (ipa_get_value_range): Same.
35890 * ipa-prop.h (ipa_range_set_and_normalize): Same.
35891 * range-op.cc (get_shift_range): Same.
35892 (value_range_from_overflowed_bounds): Same.
35893 (value_range_with_overflow): Same.
35894 (create_possibly_reversed_range): Same.
35895 (equal_op1_op2_relation): Same.
35896 (not_equal_op1_op2_relation): Same.
35897 (lt_op1_op2_relation): Same.
35898 (le_op1_op2_relation): Same.
35899 (gt_op1_op2_relation): Same.
35900 (ge_op1_op2_relation): Same.
35901 (operator_mult::op1_range): Same.
35902 (operator_exact_divide::op1_range): Same.
35903 (operator_lshift::op1_range): Same.
35904 (operator_rshift::op1_range): Same.
35905 (operator_cast::op1_range): Same.
35906 (operator_logical_and::fold_range): Same.
35907 (set_nonzero_range_from_mask): Same.
35908 (operator_bitwise_or::op1_range): Same.
35909 (operator_bitwise_xor::op1_range): Same.
35910 (operator_addr_expr::fold_range): Same.
35911 (pointer_plus_operator::wi_fold): Same.
35912 (pointer_or_operator::op1_range): Same.
35919 (range_op_cast_tests): Same.
35920 (range_op_lshift_tests): Same.
35921 (range_op_rshift_tests): Same.
35922 (range_op_bitwise_and_tests): Same.
35923 (range_relational_tests): Same.
35924 * range.cc (range_zero): Same.
35925 (range_nonzero): Same.
35926 * range.h (range_true): Same.
35927 (range_false): Same.
35928 (range_true_and_false): Same.
35929 * tree-data-ref.cc (split_constant_offset_1): Same.
35930 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
35931 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
35932 (find_unswitching_predicates_for_bb): Same.
35933 * tree-ssa-phiopt.cc (value_replacement): Same.
35934 * tree-ssa-threadbackward.cc
35935 (back_threader::find_taken_edge_cond): Same.
35936 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
35937 * tree-vrp.cc (find_case_label_range): Same.
35938 * value-query.cc (range_query::get_tree_range): Same.
35939 * value-range.cc (irange::set_nonnegative): Same.
35940 (frange::contains_p): Same.
35941 (frange::singleton_p): Same.
35942 (frange::internal_singleton_p): Same.
35943 (irange::irange_set): Same.
35944 (irange::irange_set_1bit_anti_range): Same.
35945 (irange::irange_set_anti_range): Same.
35946 (irange::set): Same.
35947 (irange::operator==): Same.
35948 (irange::singleton_p): Same.
35949 (irange::contains_p): Same.
35950 (irange::set_range_from_nonzero_bits): Same.
35951 (DEFINE_INT_RANGE_INSTANCE): Same.
35961 (range_uint128): New.
35962 (range_uchar): New.
35964 (build_range3): Convert to irange wide_int API.
35965 (range_tests_irange3): Same.
35966 (range_tests_int_range_max): Same.
35967 (range_tests_strict_enum): Same.
35968 (range_tests_misc): Same.
35969 (range_tests_nonzero_bits): Same.
35970 (range_tests_nan): Same.
35971 (range_tests_signed_zeros): Same.
35972 * value-range.h (Value_Range::Value_Range): Same.
35973 (irange::set): Same.
35974 (irange::nonzero_p): Same.
35975 (irange::contains_p): Same.
35976 (range_includes_zero_p): Same.
35977 (irange::set_nonzero): Same.
35978 (irange::set_zero): Same.
35979 (contains_zero_p): Same.
35980 (frange::contains_p): Same.
35982 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
35983 (bounds_of_var_in_loop): Same.
35984 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
35986 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35988 * value-range.cc (irange::irange_union): Rename to...
35989 (irange::union_): ...this.
35990 (irange::irange_intersect): Rename to...
35991 (irange::intersect): ...this.
35992 * value-range.h (irange::union_): Delete.
35993 (irange::intersect): Delete.
35995 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
35997 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
35999 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
36001 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
36003 (compare_ranges): Delete.
36004 (compare_range_with_value): Delete.
36005 (bounds_of_var_in_loop): Tidy up by using ranger API.
36006 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
36007 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
36008 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
36009 strict_overflow_p and only_ranges.
36010 (simplify_using_ranges::legacy_fold_cond): Adjust call to
36011 legacy_fold_cond_overflow.
36012 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
36014 (range_fits_type_p): Rename value_range to irange.
36015 * vr-values.h (range_fits_type_p): Adjust prototype.
36017 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
36019 * value-range.cc (irange::irange_set_anti_range): Remove uses of
36020 tree_lower_bound and tree_upper_bound.
36021 (irange::verify_range): Same.
36022 (irange::operator==): Same.
36023 (irange::singleton_p): Same.
36024 * value-range.h (irange::tree_lower_bound): Delete.
36025 (irange::tree_upper_bound): Delete.
36026 (irange::lower_bound): Delete.
36027 (irange::upper_bound): Delete.
36028 (irange::zero_p): Remove uses of tree_lower_bound and
36031 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
36033 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
36035 (determine_value_range): Same.
36036 (record_nonwrapping_iv): Same.
36037 (infer_loop_bounds_from_signedness): Same.
36038 (scev_var_range_cant_overflow): Same.
36039 * tree-vrp.cc (operand_less_p): Delete.
36040 * tree-vrp.h (operand_less_p): Delete.
36041 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
36042 (irange::value_inside_range): Delete.
36043 * value-range.h (vrange::kind): Delete.
36044 (irange::num_pairs): Remove check of m_kind.
36045 (irange::min): Delete.
36046 (irange::max): Delete.
36048 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
36050 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
36051 for vrange_storage.
36052 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
36053 (sbr_vector::grow): Same.
36054 (sbr_vector::set_bb_range): Same.
36055 (sbr_vector::get_bb_range): Same.
36056 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
36057 (sbr_sparse_bitmap::set_bb_range): Same.
36058 (sbr_sparse_bitmap::get_bb_range): Same.
36059 (block_range_cache::block_range_cache): Same.
36060 (ssa_global_cache::ssa_global_cache): Same.
36061 (ssa_global_cache::get_global_range): Same.
36062 (ssa_global_cache::set_global_range): Same.
36063 * gimple-range-cache.h: Same.
36064 * gimple-range-edge.cc
36065 (gimple_outgoing_range::gimple_outgoing_range): Same.
36066 (gimple_outgoing_range::switch_edge_range): Same.
36067 (gimple_outgoing_range::calc_switch_ranges): Same.
36068 * gimple-range-edge.h: Same.
36069 * gimple-range-infer.cc
36070 (infer_range_manager::infer_range_manager): Same.
36071 (infer_range_manager::get_nonzero): Same.
36072 (infer_range_manager::maybe_adjust_range): Same.
36073 (infer_range_manager::add_range): Same.
36074 * gimple-range-infer.h: Rename obstack_vrange_allocator to
36076 * tree-core.h (struct irange_storage_slot): Remove.
36077 (struct tree_ssa_name): Remove irange_info and frange_info. Make
36078 range_info a pointer to vrange_storage.
36079 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
36080 (range_info_alloc): Same.
36081 (range_info_free): Same.
36082 (range_info_get_range): Same.
36083 (range_info_set_range): Same.
36084 (get_nonzero_bits): Same.
36085 * value-query.cc (get_ssa_name_range_info): Same.
36086 * value-range-storage.cc (class vrange_internal_alloc): New.
36087 (class vrange_obstack_alloc): New.
36088 (class vrange_ggc_alloc): New.
36089 (vrange_allocator::vrange_allocator): New.
36090 (vrange_allocator::~vrange_allocator): New.
36091 (vrange_storage::alloc_slot): New.
36092 (vrange_allocator::alloc): New.
36093 (vrange_allocator::free): New.
36094 (vrange_allocator::clone): New.
36095 (vrange_allocator::clone_varying): New.
36096 (vrange_allocator::clone_undefined): New.
36097 (vrange_storage::alloc): New.
36098 (vrange_storage::set_vrange): Remove slot argument.
36099 (vrange_storage::get_vrange): Same.
36100 (vrange_storage::fits_p): Same.
36101 (vrange_storage::equal_p): New.
36102 (irange_storage::write_lengths_address): New.
36103 (irange_storage::lengths_address): New.
36104 (irange_storage_slot::alloc_slot): Remove.
36105 (irange_storage::alloc): New.
36106 (irange_storage_slot::irange_storage_slot): Remove.
36107 (irange_storage::irange_storage): New.
36108 (write_wide_int): New.
36109 (irange_storage_slot::set_irange): Remove.
36110 (irange_storage::set_irange): New.
36111 (read_wide_int): New.
36112 (irange_storage_slot::get_irange): Remove.
36113 (irange_storage::get_irange): New.
36114 (irange_storage_slot::size): Remove.
36115 (irange_storage::equal_p): New.
36116 (irange_storage_slot::num_wide_ints_needed): Remove.
36117 (irange_storage::size): New.
36118 (irange_storage_slot::fits_p): Remove.
36119 (irange_storage::fits_p): New.
36120 (irange_storage_slot::dump): Remove.
36121 (irange_storage::dump): New.
36122 (frange_storage_slot::alloc_slot): Remove.
36123 (frange_storage::alloc): New.
36124 (frange_storage_slot::set_frange): Remove.
36125 (frange_storage::set_frange): New.
36126 (frange_storage_slot::get_frange): Remove.
36127 (frange_storage::get_frange): New.
36128 (frange_storage_slot::fits_p): Remove.
36129 (frange_storage::equal_p): New.
36130 (frange_storage::fits_p): New.
36131 (ggc_vrange_allocator): New.
36132 (ggc_alloc_vrange_storage): New.
36133 * value-range-storage.h (class vrange_storage): Rewrite.
36134 (class irange_storage): Rewrite.
36135 (class frange_storage): Rewrite.
36136 (class obstack_vrange_allocator): Remove.
36137 (class ggc_vrange_allocator): Remove.
36138 (vrange_allocator::alloc_vrange): Remove.
36139 (vrange_allocator::alloc_irange): Remove.
36140 (vrange_allocator::alloc_frange): Remove.
36141 (ggc_alloc_vrange_storage): New.
36142 * value-range.h (class irange): Rename vrange_allocator to
36144 (class frange): Same.
36146 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
36148 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
36149 inc to avoid clobbering the carry flag.
36151 2023-04-30 Andrew Pinski <apinski@marvell.com>
36153 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
36154 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
36156 2023-04-30 Andrew Pinski <apinski@marvell.com>
36158 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
36159 Allow some builtin/internal function calls which
36160 are known not to trap/throw.
36161 (phiopt_worker::match_simplify_replacement):
36162 Use name instead of getting the lhs again.
36164 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
36166 * configure: Regenerate.
36167 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
36169 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
36171 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
36172 emit_insn_if_valid_for_reload.
36173 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
36174 to be recognized, also try emitting a parallel that clobbers
36175 TARGET_FLAGS_REGNUM, as applicable.
36177 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
36179 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
36181 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
36182 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
36184 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
36186 * config/stormy16/stormy16.md (any_lshift): New code iterator.
36187 (any_or_plus): Likewise.
36188 (any_rotate): Likewise.
36189 (*<any_lshift>_and_internal): New define_insn_and_split to
36190 recognize a logical shift followed by an AND, and split it
36191 again after reload.
36192 (*swpn): New define_insn matching xstormy16's swpn.
36193 (*swpn_zext): New define_insn recognizing swpn followed by
36194 zero_extendqihi2, i.e. with the high byte set to zero.
36195 (*swpn_sext): Likewise, for swpn followed by cbw.
36196 (*swpn_sext_2): Likewise, for an alternate RTL form.
36197 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
36198 sequence is split in the correct place to recognize the *swpn_zext
36199 followed by any_or_plus (ior, xor or plus) instruction.
36201 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
36204 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
36205 (lm32-*-uclinux*): Likewise.
36207 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
36209 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
36210 for riscv_use_save_libcall.
36211 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
36212 (riscv_compute_frame_info): restructure to decouple stack allocation
36213 for rv32e w/o save-restore.
36215 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
36217 * doc/install.texi: Fix documentation typo
36219 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
36221 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
36222 (u): Add div/udiv cases.
36223 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
36224 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
36226 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
36227 (thead_c906_tune_info): Likewise.
36228 (optimize_size_tune_info): Likewise.
36229 (riscv_use_divmod_expander): New function.
36230 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
36232 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
36234 * config/riscv/bitmanip.md: Added clmulr instruction.
36235 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
36236 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
36238 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
36239 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
36240 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
36241 functions to riscv-cmo.def.
36242 * config/riscv/generic.md: Add clmul to list of instructions
36243 using the generic_imul reservation.
36245 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
36247 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
36249 2023-04-28 Andrew Pinski <apinski@marvell.com>
36251 PR tree-optimization/100958
36252 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
36253 (pass_phiopt::execute): Don't call two_value_replacement.
36254 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
36255 handle what two_value_replacement did.
36257 2023-04-28 Andrew Pinski <apinski@marvell.com>
36259 * match.pd: Add patterns for
36260 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
36262 2023-04-28 Andrew Pinski <apinski@marvell.com>
36264 * match.pd: Factor out the deciding the min/max from
36265 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
36267 * fold-const.cc (minmax_from_comparison): this new function.
36268 * fold-const.h (minmax_from_comparison): New prototype.
36270 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
36272 PR rtl-optimization/109476
36273 * lower-subreg.cc: Include explow.h for force_reg.
36274 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
36275 If decomposing a suitable LSHIFTRT and we're not splitting
36276 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
36277 instead of setting a high part SUBREG to zero, which helps combine.
36278 (decompose_multiword_subregs): Update call to resolve_shift_zext.
36280 2023-04-28 Richard Biener <rguenther@suse.de>
36282 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
36284 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
36285 gather-scatter info and cost emulated scatters accordingly.
36286 (get_load_store_type): Support emulated scatters.
36287 (vectorizable_store): Likewise. Emulate them by extracting
36288 scalar offsets and data, doing scalar stores.
36290 2023-04-28 Richard Biener <rguenther@suse.de>
36292 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
36293 Tame down element extracts and scalar loads for gather/scatter
36294 similar to elementwise strided accesses.
36296 2023-04-28 Pan Li <pan2.li@intel.com>
36297 kito-cheng <kito.cheng@sifive.com>
36299 * config/riscv/vector.md: Add new define split to perform
36300 the simplification.
36302 2023-04-28 Richard Biener <rguenther@suse.de>
36305 * ipa-param-manipulation.cc
36306 (ipa_param_body_adjustments::modify_expression): Allow
36307 conversion of a register to a non-register type. Elide
36308 conversions inside BIT_FIELD_REFs.
36310 2023-04-28 Richard Biener <rguenther@suse.de>
36312 PR tree-optimization/109644
36313 * tree-cfg.cc (verify_types_in_gimple_reference): Check
36314 register constraints on the outermost VIEW_CONVERT_EXPR
36315 only. Do not allow register or invariant bases on
36316 multi-level or possibly variable index handled components.
36318 2023-04-28 Richard Biener <rguenther@suse.de>
36320 * gimplify.cc (gimplify_compound_lval): When there's a
36321 non-register type produced by one of the handled component
36322 operations make sure we get a non-register base.
36324 2023-04-28 Richard Biener <rguenther@suse.de>
36326 PR tree-optimization/108752
36327 * tree-vect-generic.cc (build_replicated_const): Rename
36328 to build_replicated_int_cst and move to tree.{h,cc}.
36329 (do_plus_minus): Adjust.
36330 (do_negate): Likewise.
36331 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
36332 arithmetic vector operations in lowered form.
36333 * tree.h (build_replicated_int_cst): Declare.
36334 * tree.cc (build_replicated_int_cst): Moved from
36335 tree-vect-generic.cc build_replicated_const.
36337 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36340 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
36341 (aarch64_rbit<mode><vczle><vczbe>): ... This.
36342 (neg<mode>2): Rename to...
36343 (neg<mode>2<vczle><vczbe>): ... This.
36344 (abs<mode>2): Rename to...
36345 (abs<mode>2<vczle><vczbe>): ... This.
36346 (aarch64_abs<mode>): Rename to...
36347 (aarch64_abs<mode><vczle><vczbe>): ... This.
36348 (one_cmpl<mode>2): Rename to...
36349 (one_cmpl<mode>2<vczle><vczbe>): ... This.
36350 (clrsb<mode>2): Rename to...
36351 (clrsb<mode>2<vczle><vczbe>): ... This.
36352 (clz<mode>2): Rename to...
36353 (clz<mode>2<vczle><vczbe>): ... This.
36354 (popcount<mode>2): Rename to...
36355 (popcount<mode>2<vczle><vczbe>): ... This.
36357 2023-04-28 Jakub Jelinek <jakub@redhat.com>
36359 * gimple-range-op.cc (class cfn_sqrt): New type.
36360 (op_cfn_sqrt): New variable.
36361 (gimple_range_op_handler::maybe_builtin_call): Handle
36362 CASE_CFN_SQRT{,_FN}.
36364 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
36365 Jakub Jelinek <jakub@redhat.com>
36367 * value-range.h (frange_nextafter): Declare.
36368 * gimple-range-op.cc (class cfn_sincos): New.
36369 (op_cfn_sin, op_cfn_cos): New variables.
36370 (gimple_range_op_handler::maybe_builtin_call): Handle
36371 CASE_CFN_{SIN,COS}{,_FN}.
36373 2023-04-28 Jakub Jelinek <jakub@redhat.com>
36375 * target.def (libm_function_max_error): New target hook.
36376 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
36377 * doc/tm.texi: Regenerated.
36378 * targhooks.h (default_libm_function_max_error,
36379 glibc_linux_libm_function_max_error): Declare.
36380 * targhooks.cc: Include case-cfn-macros.h.
36381 (default_libm_function_max_error,
36382 glibc_linux_libm_function_max_error): New functions.
36383 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
36384 * config/linux-protos.h (linux_libm_function_max_error): Declare.
36385 * config/linux.cc: Include target.h and targhooks.h.
36386 (linux_libm_function_max_error): New function.
36387 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
36388 (arc_libm_function_max_error): New function.
36389 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
36390 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
36391 (ix86_libm_function_max_error): New function.
36392 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
36393 * config/rs6000/rs6000-protos.h
36394 (rs6000_linux_libm_function_max_error): Declare.
36395 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
36396 and case-cfn-macros.h.
36397 (rs6000_linux_libm_function_max_error): New function.
36398 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
36399 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
36400 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
36401 (or1k_libm_function_max_error): New function.
36402 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
36404 2023-04-28 Alexandre Oliva <oliva@adacore.com>
36406 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
36407 Move detach value calls...
36408 (pass_harden_conditional_branches::execute): ... here.
36409 (pass_harden_compares::execute): Detach values before
36412 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
36414 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
36415 (cml<addsub_as><mode>4): Likewise.
36416 (vec_addsub<mode>3): Likewise.
36417 (cadd<rot><mode>3): Likewise.
36418 (vec_fmaddsub<mode>4): Likewise.
36419 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
36421 2023-04-27 Andrew Pinski <apinski@marvell.com>
36423 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
36424 up to 2 min/max expressions in the sequence/match code.
36426 2023-04-27 Andrew Pinski <apinski@marvell.com>
36428 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
36430 * tree-eh.cc (operation_could_trap_helper_p): Treate
36431 MIN_EXPR/MAX_EXPR similar as other comparisons.
36433 2023-04-27 Andrew Pinski <apinski@marvell.com>
36435 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
36437 (cond_if_else_store_replacement): Likewise.
36438 (get_non_trapping): Likewise.
36439 (store_elim_worker): Move into ...
36440 (pass_cselim::execute): This.
36442 2023-04-27 Andrew Pinski <apinski@marvell.com>
36444 * tree-ssa-phiopt.cc (two_value_replacement): Remove
36446 (match_simplify_replacement): Likewise.
36447 (factor_out_conditional_conversion): Likewise.
36448 (value_replacement): Likewise.
36449 (minmax_replacement): Likewise.
36450 (spaceship_replacement): Likewise.
36451 (cond_removal_in_builtin_zero_pattern): Likewise.
36452 (hoist_adjacent_loads): Likewise.
36453 (tree_ssa_phiopt_worker): Move into ...
36454 (pass_phiopt::execute): this.
36456 2023-04-27 Andrew Pinski <apinski@marvell.com>
36458 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
36459 do_store_elim argument and split that part out to ...
36460 (store_elim_worker): This new function.
36461 (pass_cselim::execute): Call store_elim_worker.
36462 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
36464 2023-04-27 Jan Hubicka <jh@suse.cz>
36466 * cfgloopmanip.h (unloop_loops): Export.
36467 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
36468 that no longer loop.
36469 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
36470 vectors of loops to unloop.
36471 (canonicalize_induction_variables): Free vectors here.
36472 (tree_unroll_loops_completely): Free vectors here.
36474 2023-04-27 Richard Biener <rguenther@suse.de>
36476 PR tree-optimization/109170
36477 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
36478 Handle __builtin_expect and similar via cfn_pass_through_arg1
36479 and inspecting the calls fnspec.
36480 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
36481 and BUILT_IN_EXPECT_WITH_PROBABILITY.
36483 2023-04-27 Alexandre Oliva <oliva@adacore.com>
36485 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
36487 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
36489 PR tree-optimization/109639
36490 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
36491 (propagate_vr_across_jump_function): Same.
36492 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
36493 * ipa-prop.h (ipa_range_set_and_normalize): New.
36494 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
36496 2023-04-27 Richard Biener <rguenther@suse.de>
36498 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
36499 create a CTOR operand in the result when simplifying GIMPLE.
36501 2023-04-27 Richard Biener <rguenther@suse.de>
36503 * gimplify.cc (gimplify_compound_lval): When the base
36504 gimplified to a register make sure to split up chains
36507 2023-04-27 Richard Biener <rguenther@suse.de>
36510 * ipa-param-manipulation.h
36511 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
36513 * ipa-param-manipulation.cc
36514 (ipa_param_body_adjustments::modify_expression): Likewise.
36515 When we need a conversion and the replacement is a register
36516 split the conversion out.
36517 (ipa_param_body_adjustments::modify_assignment): Pass
36518 extra_stmts to RHS modify_expression.
36520 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
36522 * doc/extend.texi (Zero Length): Describe example.
36524 2023-04-27 Richard Biener <rguenther@suse.de>
36526 PR tree-optimization/109594
36527 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
36528 what we rewrite to a register based on the above.
36530 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
36532 * config/riscv/riscv.cc: Fix whitespace.
36533 * config/riscv/sync.md: Fix whitespace.
36535 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
36537 PR tree-optimization/108697
36538 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
36539 not clear the vector on an out of range query.
36540 (ssa_cache::dump): Use dump_range_query instead of get_range.
36541 (ssa_cache::dump_range_query): New.
36542 (ssa_lazy_cache::dump_range_query): New.
36543 (ssa_lazy_cache::set_range): New.
36544 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
36545 (class ssa_lazy_cache): New.
36546 (ssa_lazy_cache::ssa_lazy_cache): New.
36547 (ssa_lazy_cache::~ssa_lazy_cache): New.
36548 (ssa_lazy_cache::get_range): New.
36549 (ssa_lazy_cache::clear_range): New.
36550 (ssa_lazy_cache::clear): New.
36551 (ssa_lazy_cache::dump): New.
36552 * gimple-range-path.cc (path_range_query::path_range_query): Do
36553 not allocate a ssa_cache object nor has_cache bitmap.
36554 (path_range_query::~path_range_query): Do not free objects.
36555 (path_range_query::clear_cache): Remove.
36556 (path_range_query::get_cache): Adjust.
36557 (path_range_query::set_cache): Remove.
36558 (path_range_query::dump): Don't call through a pointer.
36559 (path_range_query::internal_range_of_expr): Set cache directly.
36560 (path_range_query::reset_path): Clear cache directly.
36561 (path_range_query::ssa_range_in_phi): Fold with globals only.
36562 (path_range_query::compute_ranges_in_phis): Simply set range.
36563 (path_range_query::compute_ranges_in_block): Call cache directly.
36564 * gimple-range-path.h (class path_range_query): Replace bitmap
36565 and cache pointer with lazy cache object.
36566 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
36568 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
36570 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
36571 (ssa_cache::~ssa_cache): Rename.
36572 (ssa_cache::has_range): New.
36573 (ssa_cache::get_range): Rename.
36574 (ssa_cache::set_range): Rename.
36575 (ssa_cache::clear_range): Rename.
36576 (ssa_cache::clear): Rename.
36577 (ssa_cache::dump): Rename and use get_range.
36578 (ranger_cache::get_global_range): Use get_range and set_range.
36579 (ranger_cache::range_of_def): Use get_range.
36580 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
36581 (class ranger_cache): Use ssa_cache.
36582 * gimple-range-path.cc (path_range_query::path_range_query): Use
36584 (path_range_query::get_cache): Use get_range.
36585 (path_range_query::set_cache): Use set_range.
36586 * gimple-range-path.h (class path_range_query): Use ssa_cache.
36587 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
36588 (assume_query::range_of_expr): Use get_range.
36589 (assume_query::assume_query): Use set_range.
36590 (assume_query::calculate_op): Use get_range and set_range.
36591 * gimple-range.h (class assume_query): Use ssa_cache.
36593 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
36595 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
36596 and local to optionally zero memory.
36597 (br_vector::grow): Only zero memory if flag is set.
36598 (class sbr_lazy_vector): New.
36599 (sbr_lazy_vector::sbr_lazy_vector): New.
36600 (sbr_lazy_vector::set_bb_range): New.
36601 (sbr_lazy_vector::get_bb_range): New.
36602 (sbr_lazy_vector::bb_range_p): New.
36603 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
36604 * gimple-range-gori.cc (gori_map::calculate_gori): Use
36605 param_vrp_switch_limit.
36606 (gori_compute::gori_compute): Use param_vrp_switch_limit.
36607 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
36608 (vrp_switch_limit): Rename from evrp_switch_limit.
36609 (vrp_vector_threshold): New.
36611 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
36613 * value-relation.cc (dom_oracle::query_relation): Check early for lack
36615 * value-relation.h (equiv_oracle::has_equiv_p): New.
36617 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
36619 PR tree-optimization/109417
36620 * gimple-range-gori.cc (range_def_chain::register_dependency):
36621 Save the ssa version number, not the pointer.
36622 (gori_compute::may_recompute_p): No need to check if a dependency
36623 is in the free list.
36624 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
36625 fields to be unsigned int instead of trees.
36626 (ange_def_chain::depend1): Adjust.
36627 (ange_def_chain::depend2): Adjust.
36628 * gimple-range.h: Include "ssa.h" to inline ssa_name().
36630 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
36632 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
36633 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
36634 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
36636 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
36639 * config/riscv/riscv-protos.h: Add helper function stubs.
36640 * config/riscv/riscv.cc: Add helper functions for subword masking.
36641 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
36642 -mno-inline-atomics.
36643 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
36644 fetch_and_nand, CAS, and exchange ops.
36645 * doc/invoke.texi: Add blurb regarding new command-line flags
36646 -minline-atomics and -mno-inline-atomics.
36648 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36650 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
36651 Reimplement using standard RTL codes instead of unspec.
36652 (aarch64_rshrn2<mode>_insn_be): Likewise.
36653 (aarch64_rshrn2<mode>): Adjust for the above.
36654 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
36656 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36658 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
36659 with standard RTL codes instead of an UNSPEC.
36660 (aarch64_rshrn<mode>_insn_be): Likewise.
36661 (aarch64_rshrn<mode>): Adjust for the above.
36662 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
36664 2023-04-26 Pan Li <pan2.li@intel.com>
36665 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36667 * config/riscv/riscv.cc (riscv_classify_address): Allow
36668 const0_rtx for the RVV load/store.
36670 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36672 * range-op.cc (range_op_cast_tests): Remove legacy support.
36673 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
36674 * value-range.cc (irange::operator=): Same.
36675 (get_legacy_range): Same.
36676 (irange::copy_legacy_to_multi_range): Delete.
36677 (irange::copy_to_legacy): Delete.
36678 (irange::irange_set_anti_range): Delete.
36679 (irange::set): Remove legacy support.
36680 (irange::verify_range): Same.
36681 (irange::legacy_lower_bound): Delete.
36682 (irange::legacy_upper_bound): Delete.
36683 (irange::legacy_equal_p): Delete.
36684 (irange::operator==): Remove legacy support.
36685 (irange::singleton_p): Same.
36686 (irange::value_inside_range): Same.
36687 (irange::contains_p): Same.
36688 (intersect_ranges): Delete.
36689 (irange::legacy_intersect): Delete.
36690 (union_ranges): Delete.
36691 (irange::legacy_union): Delete.
36692 (irange::legacy_verbose_union_): Delete.
36693 (irange::legacy_verbose_intersect): Delete.
36694 (irange::irange_union): Remove legacy support.
36695 (irange::irange_intersect): Same.
36696 (irange::intersect): Same.
36697 (irange::invert): Same.
36698 (ranges_from_anti_range): Delete.
36699 (gt_pch_nx): Adjust for legacy removal.
36701 (range_tests_legacy): Delete.
36702 (range_tests_misc): Adjust for legacy removal.
36703 (range_tests): Same.
36704 * value-range.h (class irange): Same.
36705 (irange::legacy_mode_p): Delete.
36706 (ranges_from_anti_range): Delete.
36707 (irange::nonzero_p): Adjust for legacy removal.
36708 (irange::lower_bound): Same.
36709 (irange::upper_bound): Same.
36710 (irange::union_): Same.
36711 (irange::intersect): Same.
36712 (irange::set_nonzero): Same.
36713 (irange::set_zero): Same.
36714 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
36716 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36718 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
36719 of range_has_numeric_bounds_p with irange API.
36720 (range_has_numeric_bounds_p): Delete.
36721 * value-range.h (range_has_numeric_bounds_p): Delete.
36723 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36725 * tree-data-ref.cc (compute_distributive_range): Replace uses of
36726 range_int_cst_p with irange API.
36727 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
36728 * tree-vrp.h (range_int_cst_p): Delete.
36729 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
36730 range_int_cst_p with irange API.
36731 (vr_set_zero_nonzero_bits): Same.
36732 (range_fits_type_p): Same.
36733 (simplify_using_ranges::simplify_casted_cond): Same.
36734 * tree-vrp.cc (range_int_cst_p): Remove.
36736 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36738 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
36740 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36742 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
36743 API uses to new API.
36744 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
36745 * internal-fn.cc (get_min_precision): Same.
36747 * tree-affine.cc (expr_to_aff_combination): Same.
36748 * tree-data-ref.cc (dr_step_indicator): Same.
36749 * tree-dfa.cc (get_ref_base_and_extent): Same.
36750 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
36751 * tree-ssa-phiopt.cc (two_value_replacement): Same.
36752 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
36753 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
36754 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
36755 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
36756 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
36757 * tree.cc (get_range_pos_neg): Same.
36759 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36761 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
36762 vrange::dump instead of ad-hoc dumper.
36763 * tree-ssa-strlen.cc (dump_strlen_info): Same.
36764 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
36767 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36769 * range-op.cc (operator_cast::op1_range): Use
36770 create_possibly_reversed_range.
36771 (operator_bitwise_and::simple_op1_range_solver): Same.
36772 * value-range.cc (swap_out_of_order_endpoints): Delete.
36773 (irange::set): Remove call to swap_out_of_order_endpoints.
36775 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36777 * builtins.cc (determine_block_size): Convert use of legacy API to
36779 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
36780 (array_bounds_checker::check_array_ref): Same.
36781 * gimple-ssa-warn-restrict.cc
36782 (builtin_memref::extend_offset_range): Same.
36783 * ipa-cp.cc (ipcp_store_vr_results): Same.
36784 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
36785 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
36786 (ipa_write_jump_function): Same.
36787 * pointer-query.cc (get_size_range): Same.
36788 * tree-data-ref.cc (split_constant_offset): Same.
36789 * tree-ssa-strlen.cc (get_range): Same.
36790 (maybe_diag_stxncpy_trunc): Same.
36791 (strlen_pass::get_len_or_size): Same.
36792 (strlen_pass::count_nonzero_bytes_addr): Same.
36793 * tree-vect-patterns.cc (vect_get_range_info): Same.
36794 * value-range.cc (irange::maybe_anti_range): Remove.
36795 (get_legacy_range): New.
36796 (irange::copy_to_legacy): Use get_legacy_range.
36797 (ranges_from_anti_range): Same.
36798 * value-range.h (class irange): Remove maybe_anti_range.
36799 (get_legacy_range): New.
36800 * vr-values.cc (check_for_binary_op_overflow): Convert use of
36801 legacy API to get_legacy_range.
36802 (compare_ranges): Same.
36803 (compare_range_with_value): Same.
36804 (bounds_of_var_in_loop): Same.
36805 (find_case_label_ranges): Same.
36806 (simplify_using_ranges::simplify_switch_using_ranges): Same.
36808 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36810 * value-range-pretty-print.cc (vrange_printer::visit): Remove
36812 * value-range.cc (irange::constant_p): Remove.
36813 (irange::get_nonzero_bits_from_range): Remove constant_p use.
36814 * value-range.h (class irange): Remove constant_p.
36815 (irange::num_pairs): Remove constant_p use.
36817 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36819 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
36821 (irange::set): Same.
36822 (irange::legacy_lower_bound): Same.
36823 (irange::legacy_upper_bound): Same.
36824 (irange::contains_p): Same.
36825 (range_tests_legacy): Same.
36826 (irange::normalize_addresses): Remove.
36827 (irange::normalize_symbolics): Remove.
36828 (irange::symbolic_p): Remove.
36829 * value-range.h (class irange): Remove symbolic_p,
36830 normalize_symbolics, and normalize_addresses.
36831 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
36832 Remove symbolics support.
36834 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36836 * value-range.cc (irange::may_contain_p): Remove.
36837 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
36838 usage with contains_p.
36839 * vr-values.cc (compare_range_with_value): Same.
36841 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36843 * tree-vrp.cc (supported_types_p): Remove.
36844 (defined_ranges_p): Remove.
36845 (range_fold_binary_expr): Remove.
36846 (range_fold_unary_expr): Remove.
36847 * tree-vrp.h (range_fold_unary_expr): Remove.
36848 (range_fold_binary_expr): Remove.
36850 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36852 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
36853 (ipa_value_range_from_jfunc): Same.
36854 (propagate_vr_across_jump_function): Same.
36855 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
36856 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
36857 * vr-values.cc (bounds_of_var_in_loop): Same.
36859 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36861 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
36862 Add irange argument.
36863 (check_out_of_bounds_and_warn): Remove check for vr.
36864 (array_bounds_checker::check_array_ref): Remove pointer qualifier
36865 for vr and adjust accordingly.
36866 * gimple-array-bounds.h (get_value_range): Add irange argument.
36867 * value-query.cc (class equiv_allocator): Delete.
36868 (range_query::get_value_range): Delete.
36869 (range_query::range_query): Remove allocator access.
36870 (range_query::~range_query): Same.
36871 * value-query.h (get_value_range): Delete.
36873 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
36874 call to get_value_range.
36875 (check_for_binary_op_overflow): Same.
36876 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
36877 (simplify_using_ranges::simplify_abs_using_ranges): Same.
36878 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
36879 (simplify_using_ranges::simplify_casted_cond): Same.
36880 (simplify_using_ranges::simplify_switch_using_ranges): Same.
36881 (simplify_using_ranges::two_valued_val_range_p): Same.
36883 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36886 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
36888 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
36889 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
36890 (simplify_using_ranges::legacy_fold_cond): ...this.
36891 (simplify_using_ranges::fold_cond): Rename
36892 vrp_evaluate_conditional_warnv_with_ops to
36893 legacy_fold_cond_overflow.
36894 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
36895 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
36896 legacy_fold_cond_overflow respectively.
36898 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
36900 * vr-values.cc (get_vr_for_comparison): Remove.
36901 (compare_name_with_value): Same.
36902 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
36903 compare_name_with_value.
36904 * vr-values.h: Remove compare_name_with_value.
36905 Remove get_vr_for_comparison.
36907 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
36909 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
36910 (bswapsi2): New define_insn.
36911 (swaphi): New define_insn to exchange two registers (swpw).
36912 (define_peephole2): Recognize exchange of registers as swaphi.
36914 2023-04-26 Richard Biener <rguenther@suse.de>
36916 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
36918 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
36919 * predict.cc (apply_return_prediction): Likewise.
36920 * sese.cc (set_ifsese_condition): Likewise. Simplify.
36921 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
36922 (make_edges_bb): Likewise.
36923 (make_cond_expr_edges): Likewise.
36924 (end_recording_case_labels): Likewise.
36925 (make_gimple_asm_edges): Likewise.
36926 (cleanup_dead_labels): Likewise.
36927 (group_case_labels): Likewise.
36928 (gimple_can_merge_blocks_p): Likewise.
36929 (gimple_merge_blocks): Likewise.
36930 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
36931 (gimple_duplicate_sese_tail): Avoid last_stmt.
36932 (find_loop_dist_alias): Likewise.
36933 (gimple_block_ends_with_condjump_p): Likewise.
36934 (gimple_purge_dead_eh_edges): Likewise.
36935 (gimple_purge_dead_abnormal_call_edges): Likewise.
36936 (pass_warn_function_return::execute): Likewise.
36937 (execute_fixup_cfg): Likewise.
36938 * tree-eh.cc (redirect_eh_edge_1): Likewise.
36939 (pass_lower_resx::execute): Likewise.
36940 (pass_lower_eh_dispatch::execute): Likewise.
36941 (cleanup_empty_eh): Likewise.
36942 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
36943 (predicate_bbs): Likewise.
36944 (ifcvt_split_critical_edges): Likewise.
36945 * tree-loop-distribution.cc (create_edge_for_control_dependence):
36947 (loop_distribution::transform_reduction_loop): Likewise.
36948 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
36949 (try_transform_to_exit_first_loop_alt): Likewise.
36950 (transform_to_exit_first_loop): Likewise.
36951 (create_parallel_loop): Likewise.
36952 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
36953 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
36954 (eliminate_unnecessary_stmts): Likewise.
36956 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
36958 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
36959 (pass_tree_ifcombine::execute): Likewise.
36960 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
36961 (should_duplicate_loop_header_p): Likewise.
36962 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
36963 (tree_estimate_loop_size): Likewise.
36964 (try_unroll_loop_completely): Likewise.
36965 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
36966 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
36967 (canonicalize_loop_ivs): Likewise.
36968 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
36969 (bound_difference): Likewise.
36970 (number_of_iterations_popcount): Likewise.
36971 (number_of_iterations_cltz): Likewise.
36972 (number_of_iterations_cltz_complement): Likewise.
36973 (simplify_using_initial_conditions): Likewise.
36974 (number_of_iterations_exit_assumptions): Likewise.
36975 (loop_niter_by_eval): Likewise.
36976 (estimate_numbers_of_iterations): Likewise.
36978 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36980 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
36982 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
36985 * config/rs6000/rs6000-builtins.def
36986 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
36987 __builtin_vsx_scalar_cmp_exp_qp_lt,
36988 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
36991 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
36994 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
36995 easy_vector_constant with const_vector_each_byte_same, add
36996 handlings in preparation for !easy_vector_constant, and update
36997 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
36998 * config/rs6000/predicates.md (const_vector_each_byte_same): New
37001 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37003 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
37004 (*pred_ltge<mode>_merge_tie_mask): Ditto.
37005 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
37006 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
37007 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
37008 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
37009 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
37011 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37013 * config/riscv/vector.md: Fix redundant vmv1r.v.
37015 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37017 * config/riscv/vector.md: Fix RA constraint.
37019 2023-04-26 Pan Li <pan2.li@intel.com>
37022 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
37023 check for vn_reference equal.
37025 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37027 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
37028 auto-vectorization preference.
37029 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
37030 auto-vectorization.
37031 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
37033 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
37035 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
37036 and bclridisi_nottwobits patterns.
37037 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
37038 predicate to avoid splitting arith constants.
37039 (const_nottwobits_not_arith_operand): New predicate.
37041 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
37043 * recog.cc (peep2_attempt, peep2_update_life): Correct
37044 head-comment description of parameter match_len.
37046 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
37048 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
37049 riscv_split_symbol() drop in_splitter arg.
37050 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
37051 riscv_split_symbol() drop in_splitter arg.
37052 riscv_force_temporary() drop in_splitter arg.
37053 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
37054 riscv_split_symbol() drop in_splitter arg.
37056 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
37058 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
37059 superfluous debug temporaries for single GIMPLE assignments.
37061 2023-04-25 Richard Biener <rguenther@suse.de>
37063 PR tree-optimization/109609
37064 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
37066 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
37067 the size given by arg_max_access_size_given_by_arg_p as
37068 maximum, not exact, size.
37070 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37073 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
37074 (orn<mode>3<vczle><vczbe>): ... This.
37075 (bic<mode>3): Rename to...
37076 (bic<mode>3<vczle><vczbe>): ... This.
37077 (<su><maxmin><mode>3): Rename to...
37078 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
37080 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37082 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
37083 * config/aarch64/iterators.md (VQDIV): New mode iterator.
37084 (vnx2di): New mode attribute.
37086 2023-04-25 Richard Biener <rguenther@suse.de>
37088 PR rtl-optimization/109585
37089 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
37091 2023-04-25 Jakub Jelinek <jakub@redhat.com>
37094 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
37095 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
37096 is larger than signed int maximum.
37098 2023-04-25 Martin Liska <mliska@suse.cz>
37100 * doc/gcov.texi: Document the new "calls" field and document
37101 the API bump. Mention also "block_ids" for lines.
37102 * gcov.cc (output_intermediate_json_line): Output info about
37103 calls and extend branches as well.
37104 (generate_results): Bump version to 2.
37105 (output_line_details): Use block ID instead of a non-sensual
37108 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
37110 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
37111 length attribute for the first (memory operand) alternative.
37113 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
37115 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
37116 * config/aarch64/constraints.md: Make "Umn" relaxed memory
37118 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
37120 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
37122 * value-range.cc (frange::set): Adjust constructor.
37123 * value-range.h (nan_state::nan_state): Replace default
37124 constructor with one taking an argument.
37126 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
37128 * ipa-cp.cc (ipa_range_contains_p): New.
37129 (decide_whether_version_node): Use it.
37131 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
37133 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
37134 simplify two successive VEC_PERM_EXPRs with same VLA mask,
37135 where mask chooses elements in reverse order.
37137 2023-04-24 Andrew Pinski <apinski@marvell.com>
37139 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
37140 and support diamond shaped basic block form.
37141 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
37143 2023-04-24 Andrew Pinski <apinski@marvell.com>
37145 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
37146 Instead of calling last_and_only_stmt, look for the last statement
37149 2023-04-24 Andrew Pinski <apinski@marvell.com>
37151 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
37153 (match_simplify_replacement): Call
37154 empty_bb_or_one_feeding_into_p instead of doing it inline.
37156 2023-04-24 Andrew Pinski <apinski@marvell.com>
37158 PR tree-optimization/68894
37159 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
37160 continue for the do_hoist_loads diamond case.
37162 2023-04-24 Andrew Pinski <apinski@marvell.com>
37164 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
37165 code for better code readability.
37167 2023-04-24 Andrew Pinski <apinski@marvell.com>
37169 PR tree-optimization/109604
37170 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
37171 diamond form check from ...
37172 (minmax_replacement): Here.
37174 2023-04-24 Patrick Palka <ppalka@redhat.com>
37176 * tree.cc (strip_array_types): Don't define here.
37177 (is_typedef_decl): Don't define here.
37178 (typedef_variant_p): Don't define here.
37179 * tree.h (strip_array_types): Define here.
37180 (is_typedef_decl): Define here.
37181 (typedef_variant_p): Define here.
37183 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
37185 * doc/generic.texi (OpenMP): Add != to allowed
37186 conditions and state that vars can be unsigned.
37187 * tree.def (OMP_FOR): Likewise.
37189 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37191 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
37193 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
37195 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
37196 Remove explicit Solaris 11 references.
37198 (Options specification, --with-gnu-as): as and gas always differ
37200 Remove /usr/ccs/bin reference.
37201 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
37202 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
37203 (*-*-solaris2*): ... here.
37204 Update bundled GCC versions.
37205 Don't refer to pre-built binaries.
37206 Remove /bin/sh warning.
37207 Update assembler, linker recommendations.
37208 Document GNAT bootstrap compiler.
37209 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
37210 (sparc64-*-solaris2*): Move content...
37211 (sparcv9-*-solaris2*): ...here.
37212 Add GDC for 64-bit bootstrap compilers.
37214 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37217 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
37219 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
37222 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37224 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
37225 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
37226 (aarch64_<su>abal2<mode>): New define_expand.
37227 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
37228 (aarch64_rtx_costs): Handle ABD rtxes.
37229 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
37230 * config/aarch64/iterators.md (ABAL2): Delete.
37231 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
37233 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37235 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
37236 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
37237 (<sur>sadv16qi): Rename to...
37238 (<su>sadv16qi): ... This. Adjust for the above.
37239 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
37240 (<su>sad<vsi2qi>): ... This. Adjust for the above.
37241 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
37242 * config/aarch64/iterators.md (ABAL): Delete.
37243 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
37245 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37247 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
37248 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
37249 (aarch64_<su>abdl2<mode>): New define_expand.
37250 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
37251 * config/aarch64/iterators.md (ABDL2): Delete.
37252 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
37254 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37256 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
37257 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
37259 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
37260 * config/aarch64/iterators.md (ABDL): Delete.
37261 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
37263 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37265 * config/aarch64/aarch64-simd.md
37266 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
37268 2023-04-24 Richard Biener <rguenther@suse.de>
37270 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
37272 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
37274 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
37275 (set_switch_stmt_execution_predicate): Likewise.
37276 (phi_result_unknown_predicate): Likewise.
37277 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
37278 (ipa_analyze_indirect_call_uses): Likewise.
37279 * predict.cc (predict_iv_comparison): Likewise.
37280 (predict_extra_loop_exits): Likewise.
37281 (predict_loops): Likewise.
37282 (tree_predict_by_opcode): Likewise.
37283 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
37285 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
37286 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
37287 (replace_phi_edge_with_variable): Likewise.
37288 (two_value_replacement): Likewise.
37289 (value_replacement): Likewise.
37290 (minmax_replacement): Likewise.
37291 (spaceship_replacement): Likewise.
37292 (cond_removal_in_builtin_zero_pattern): Likewise.
37293 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
37294 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
37295 (vn_phi_lookup): Likewise.
37296 (vn_phi_insert): Likewise.
37297 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
37298 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
37300 (back_threader_profitability::possibly_profitable_path_p):
37302 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
37304 * tree-switch-conversion.cc (pass_convert_switch::execute):
37306 (pass_lower_switch<O0>::execute): Likewise.
37307 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
37308 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
37309 * tree-vect-slp.cc (vect_slp_function): Likewise.
37310 * tree-vect-stmts.cc (cfun_returns): Likewise.
37311 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
37312 (vect_loop_dist_alias_call): Likewise.
37314 2023-04-24 Richard Biener <rguenther@suse.de>
37316 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
37318 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37320 * config/riscv/riscv-vsetvl.cc
37321 (vector_infos_manager::all_avail_in_compatible_p): New function.
37322 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
37323 * config/riscv/riscv-vsetvl.h: New function.
37325 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37327 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
37328 comment for cleanup_insns.
37330 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37332 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
37333 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
37334 with the fault first load property.
37336 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37338 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
37339 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
37341 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37344 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
37345 (aarch64_addp<mode><vczle><vczbe>): ... This.
37347 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
37349 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
37350 provide reasonable values for common arithmetic operations and
37351 immediate operands (in several machine modes).
37353 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
37355 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
37356 format specifier to output high_part register name of SImode reg.
37357 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
37358 (zero_extendqihi2): Fix lengths, consistent formatting and add
37359 "and Rx,#255" alternative, for documentation purposes.
37360 (zero_extendhisi2): New define_insn.
37362 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
37364 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
37365 SImode shifts by two by performing a single bit SImode shift twice.
37367 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
37369 PR tree-optimization/109593
37370 * value-range.cc (frange::operator==): Handle NANs.
37372 2023-04-23 liuhongt <hongtao.liu@intel.com>
37374 PR rtl-optimization/108707
37375 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
37376 GENERAL_REGS when preferred reg_class is not known.
37378 2023-04-22 Andrew Pinski <apinski@marvell.com>
37380 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
37381 Change the code around slightly to move diamond
37382 handling for do_store_elim/do_hoist_loads out of
37385 2023-04-22 Andrew Pinski <apinski@marvell.com>
37387 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
37388 Remove check on empty_block_p.
37390 2023-04-22 Jakub Jelinek <jakub@redhat.com>
37392 PR bootstrap/109589
37393 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
37394 * realmpfr.h (class auto_mpfr): Likewise.
37396 2023-04-22 Jakub Jelinek <jakub@redhat.com>
37398 PR tree-optimization/109583
37399 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
37400 if vec_mode is not VECTOR_MODE_P.
37402 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
37403 Ondrej Kubanek <kubanek0ondrej@gmail.com>
37405 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
37406 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
37407 loop profile and bounds after header duplication.
37408 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
37409 Break out from try_peel_loop; fix handling of 0 iterations.
37410 (try_peel_loop): Use adjust_loop_info_after_peeling.
37412 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
37414 PR tree-optimization/109546
37415 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
37416 not fold conditions with ADDR_EXPR early.
37418 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37420 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
37421 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
37423 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
37424 (*aarch64_<optab><mode>3_zero): Define.
37425 (*aarch64_<optab><mode>3_cssc): Likewise.
37426 * config/aarch64/iterators.md (maxminand): New code attribute.
37428 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37431 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
37432 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
37434 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
37435 (aarch64_override_options_internal): Handle the above.
37436 (aarch64_output_load_tp): New function.
37437 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
37438 aarch64_output_load_tp.
37439 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
37440 (mtp=): New option.
37441 * doc/invoke.texi (AArch64 Options): Document -mtp=.
37443 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37446 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
37447 (add_vec_concat_subst_be): Likewise.
37450 (add<mode>3): Rename to...
37451 (add<mode>3<vczle><vczbe>): ... This.
37452 (sub<mode>3): Rename to...
37453 (sub<mode>3<vczle><vczbe>): ... This.
37454 (mul<mode>3): Rename to...
37455 (mul<mode>3<vczle><vczbe>): ... This.
37456 (and<mode>3): Rename to...
37457 (and<mode>3<vczle><vczbe>): ... This.
37458 (ior<mode>3): Rename to...
37459 (ior<mode>3<vczle><vczbe>): ... This.
37460 (xor<mode>3): Rename to...
37461 (xor<mode>3<vczle><vczbe>): ... This.
37462 * config/aarch64/iterators.md (VDZ): Define.
37464 2023-04-21 Patrick Palka <ppalka@redhat.com>
37466 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
37469 2023-04-21 Jan Hubicka <jh@suse.cz>
37471 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
37474 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
37476 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
37477 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
37479 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
37481 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
37482 force_reg instead of copy_to_mode_reg.
37483 (aarch64_expand_vector_init): Likewise.
37485 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
37487 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
37488 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
37489 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
37490 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
37491 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
37492 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
37493 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
37494 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
37495 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
37496 * config/i386/predicates.md (index_register_operand):
37497 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
37498 * config/i386/i386.cc (ix86_legitimate_address_p): Use
37499 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
37500 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
37502 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
37503 Ondrej Kubanek <kubanek0ondrej@gmail.com>
37505 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
37508 2023-04-21 Richard Biener <rguenther@suse.de>
37510 * is-a.h (safe_is_a): New.
37512 2023-04-21 Richard Biener <rguenther@suse.de>
37514 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
37515 (gphi_iterator::operator*): Likewise.
37517 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
37518 Michal Jires <michal@jires.eu>
37520 * ipa-inline.cc (class inline_badness): New class.
37521 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
37523 (update_edge_key): Update.
37524 (lookup_recursive_calls): Likewise.
37525 (recursive_inlining): Likewise.
37526 (add_new_edges_to_heap): Likewise.
37527 (inline_small_functions): Likewise.
37529 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
37531 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
37533 2023-04-21 Richard Biener <rguenther@suse.de>
37535 PR tree-optimization/109573
37536 * tree-vect-loop.cc (vectorizable_live_operation): Allow
37537 unhandled SSA copy as well. Demote assert to checking only.
37539 2023-04-21 Richard Biener <rguenther@suse.de>
37541 * df-core.cc (df_analyze): Compute RPO on the reverse graph
37542 for DF_BACKWARD problems.
37543 (loop_post_order_compute): Rename to ...
37544 (loop_rev_post_order_compute): ... this, compute a RPO.
37545 (loop_inverted_post_order_compute): Rename to ...
37546 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
37547 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
37548 problems, RPO on the inverted graph for DF_BACKWARD.
37550 2023-04-21 Richard Biener <rguenther@suse.de>
37552 * cfganal.h (inverted_rev_post_order_compute): Rename
37554 (inverted_post_order_compute): ... this. Add struct function
37555 argument, change allocation to a C array.
37556 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
37557 * lcm.cc (compute_antinout_edge): Adjust.
37558 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
37559 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
37560 * tree-ssa-pre.cc (compute_antic): Likewise.
37562 2023-04-21 Richard Biener <rguenther@suse.de>
37564 * df.h (df_d::postorder_inverted): Change back to int *,
37566 * df-core.cc (rest_of_handle_df_finish): Adjust.
37567 (df_analyze_1): Likewise.
37568 (df_analyze): For DF_FORWARD problems use RPO on the forward
37570 (loop_inverted_post_order_compute): Adjust API.
37571 (df_analyze_loop): Adjust.
37572 (df_get_n_blocks): Likewise.
37573 (df_get_postorder): Likewise.
37575 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37578 * config/riscv/riscv-vsetvl.cc
37579 (vector_infos_manager::all_empty_predecessor_p): New function.
37580 (pass_vsetvl::backward_demand_fusion): Ditto.
37581 * config/riscv/riscv-vsetvl.h: Ditto.
37583 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
37586 * config/riscv/generic.md: Change standard names to insn names.
37588 2023-04-21 Richard Biener <rguenther@suse.de>
37590 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
37591 (compute_laterin): Use RPO.
37592 (compute_available): Likewise.
37594 2023-04-21 Peng Fan <fanpeng@loongson.cn>
37596 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
37598 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37601 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
37602 (vector_insn_info::skip_avl_compatible_p): Ditto.
37603 (vector_insn_info::merge): Remove default value.
37604 (pass_vsetvl::compute_local_backward_infos): Ditto.
37605 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
37606 * config/riscv/riscv-vsetvl.h: Ditto.
37608 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
37610 * doc/extend.texi (Common Function Attributes): Remove duplicate
37613 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
37615 PR tree-optimization/109564
37616 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
37617 UNDEFINED range names when deciding if all PHI arguments are the same,
37619 2023-04-20 Jakub Jelinek <jakub@redhat.com>
37621 PR tree-optimization/109011
37622 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
37623 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
37624 .CTZ (X) = PREC - .POPCOUNT (X | -X).
37626 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
37628 * lra-constraints.cc (match_reload): Exclude some hard regs for
37629 multi-reg inout reload pseudos used in asm in different mode.
37631 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
37633 * config/arm/arm.cc (thumb1_legitimate_address_p):
37634 Use VIRTUAL_REGISTER_P predicate.
37635 (arm_eliminable_register): Ditto.
37636 * config/avr/avr.md (push<mode>_1): Ditto.
37637 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
37638 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
37639 * config/i386/predicates.md (register_no_elim_operand): Ditto.
37640 * config/iq2000/predicates.md (call_insn_operand): Ditto.
37641 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
37643 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
37646 * config/i386/predicates.md (extract_operator): New predicate.
37647 * config/i386/i386.md (any_extract): Remove code iterator.
37648 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
37649 (*cmpqi_ext<mode>_1): Ditto.
37650 (*cmpqi_ext<mode>_2): Ditto.
37651 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
37652 (*cmpqi_ext<mode>_3): Ditto.
37653 (*cmpqi_ext<mode>_4): Ditto.
37654 (*extzvqi_mem_rex64): Ditto.
37656 (*insvqi_2): Ditto.
37657 (*extendqi<SWI24:mode>_ext_1): Ditto.
37658 (*addqi_ext<mode>_0): Ditto.
37659 (*addqi_ext<mode>_1): Ditto.
37660 (*addqi_ext<mode>_2): Ditto.
37661 (*subqi_ext<mode>_0): Ditto.
37662 (*subqi_ext<mode>_2): Ditto.
37663 (*testqi_ext<mode>_1): Ditto.
37664 (*testqi_ext<mode>_2): Ditto.
37665 (*andqi_ext<mode>_0): Ditto.
37666 (*andqi_ext<mode>_1): Ditto.
37667 (*andqi_ext<mode>_1_cc): Ditto.
37668 (*andqi_ext<mode>_2): Ditto.
37669 (*<any_or:code>qi_ext<mode>_0): Ditto.
37670 (*<any_or:code>qi_ext<mode>_1): Ditto.
37671 (*<any_or:code>qi_ext<mode>_2): Ditto.
37672 (*xorqi_ext<mode>_1_cc): Ditto.
37673 (*negqi_ext<mode>_2): Ditto.
37674 (*ashlqi_ext<mode>_2): Ditto.
37675 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
37677 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
37680 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
37681 <bitmanip_insn> as the type to allow for fine grained control of
37682 scheduling these insns.
37683 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
37685 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
37686 pcnt, signed and unsigned min/max.
37688 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37689 kito-cheng <kito.cheng@sifive.com>
37691 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
37693 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37694 kito-cheng <kito.cheng@sifive.com>
37697 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
37698 (pass_vsetvl::cleanup_insns): Fix bug.
37700 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
37702 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
37703 (ldexp<mode>3): Delete.
37704 (ldexp<mode>3<exec>): Change "B" to "A".
37706 2023-04-20 Jakub Jelinek <jakub@redhat.com>
37707 Jonathan Wakely <jwakely@redhat.com>
37709 * tree.h (built_in_function_equal_p): New helper function.
37710 (fndecl_built_in_p): Turn into variadic template to support
37711 1 or more built_in_function arguments.
37712 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
37713 * gimplify.cc (goa_stabilize_expr): Likewise.
37714 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
37715 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
37716 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
37717 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
37718 cgraph_update_edges_for_call_stmt_node,
37719 cgraph_edge::verify_corresponds_to_fndecl,
37720 cgraph_node::verify_node): Likewise.
37721 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
37722 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
37723 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
37725 2023-04-20 Jakub Jelinek <jakub@redhat.com>
37727 PR tree-optimization/109011
37728 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
37729 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
37730 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
37731 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
37732 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
37734 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
37736 2023-04-20 Richard Biener <rguenther@suse.de>
37738 * df-core.cc (rest_of_handle_df_initialize): Remove
37739 computation of df->postorder, df->postorder_inverted and
37742 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
37744 * common/config/i386/i386-common.cc
37745 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
37746 (ix86_handle_option): Set AVX flag for VAES.
37747 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
37748 Add OPTION_MASK_ISA2_VAES_UNSET.
37749 (def_builtin): Share builtin between AES and VAES.
37750 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
37752 * config/i386/i386.md (aes): New isa attribute.
37753 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
37754 (aesenclast): Ditto.
37756 (aesdeclast): Ditto.
37757 * config/i386/vaesintrin.h: Remove redundant avx target push.
37758 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
37759 (_mm_aesdeclast_si128): Ditto.
37760 (_mm_aesenc_si128): Ditto.
37761 (_mm_aesenclast_si128): Ditto.
37763 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
37765 * config/i386/avx2intrin.h
37766 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
37767 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
37768 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
37769 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
37770 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
37771 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
37772 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
37773 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
37774 (_mm_reduce_add_epi16): New instrinsics.
37775 (_mm_reduce_mul_epi16): Ditto.
37776 (_mm_reduce_and_epi16): Ditto.
37777 (_mm_reduce_or_epi16): Ditto.
37778 (_mm_reduce_max_epi16): Ditto.
37779 (_mm_reduce_max_epu16): Ditto.
37780 (_mm_reduce_min_epi16): Ditto.
37781 (_mm_reduce_min_epu16): Ditto.
37782 (_mm256_reduce_add_epi16): Ditto.
37783 (_mm256_reduce_mul_epi16): Ditto.
37784 (_mm256_reduce_and_epi16): Ditto.
37785 (_mm256_reduce_or_epi16): Ditto.
37786 (_mm256_reduce_max_epi16): Ditto.
37787 (_mm256_reduce_max_epu16): Ditto.
37788 (_mm256_reduce_min_epi16): Ditto.
37789 (_mm256_reduce_min_epu16): Ditto.
37790 (_mm_reduce_add_epi8): Ditto.
37791 (_mm_reduce_mul_epi8): Ditto.
37792 (_mm_reduce_and_epi8): Ditto.
37793 (_mm_reduce_or_epi8): Ditto.
37794 (_mm_reduce_max_epi8): Ditto.
37795 (_mm_reduce_max_epu8): Ditto.
37796 (_mm_reduce_min_epi8): Ditto.
37797 (_mm_reduce_min_epu8): Ditto.
37798 (_mm256_reduce_add_epi8): Ditto.
37799 (_mm256_reduce_mul_epi8): Ditto.
37800 (_mm256_reduce_and_epi8): Ditto.
37801 (_mm256_reduce_or_epi8): Ditto.
37802 (_mm256_reduce_max_epi8): Ditto.
37803 (_mm256_reduce_max_epu8): Ditto.
37804 (_mm256_reduce_min_epi8): Ditto.
37805 (_mm256_reduce_min_epu8): Ditto.
37806 * config/i386/avx512vlbwintrin.h:
37807 (_mm_mask_reduce_add_epi16): Ditto.
37808 (_mm_mask_reduce_mul_epi16): Ditto.
37809 (_mm_mask_reduce_and_epi16): Ditto.
37810 (_mm_mask_reduce_or_epi16): Ditto.
37811 (_mm_mask_reduce_max_epi16): Ditto.
37812 (_mm_mask_reduce_max_epu16): Ditto.
37813 (_mm_mask_reduce_min_epi16): Ditto.
37814 (_mm_mask_reduce_min_epu16): Ditto.
37815 (_mm256_mask_reduce_add_epi16): Ditto.
37816 (_mm256_mask_reduce_mul_epi16): Ditto.
37817 (_mm256_mask_reduce_and_epi16): Ditto.
37818 (_mm256_mask_reduce_or_epi16): Ditto.
37819 (_mm256_mask_reduce_max_epi16): Ditto.
37820 (_mm256_mask_reduce_max_epu16): Ditto.
37821 (_mm256_mask_reduce_min_epi16): Ditto.
37822 (_mm256_mask_reduce_min_epu16): Ditto.
37823 (_mm_mask_reduce_add_epi8): Ditto.
37824 (_mm_mask_reduce_mul_epi8): Ditto.
37825 (_mm_mask_reduce_and_epi8): Ditto.
37826 (_mm_mask_reduce_or_epi8): Ditto.
37827 (_mm_mask_reduce_max_epi8): Ditto.
37828 (_mm_mask_reduce_max_epu8): Ditto.
37829 (_mm_mask_reduce_min_epi8): Ditto.
37830 (_mm_mask_reduce_min_epu8): Ditto.
37831 (_mm256_mask_reduce_add_epi8): Ditto.
37832 (_mm256_mask_reduce_mul_epi8): Ditto.
37833 (_mm256_mask_reduce_and_epi8): Ditto.
37834 (_mm256_mask_reduce_or_epi8): Ditto.
37835 (_mm256_mask_reduce_max_epi8): Ditto.
37836 (_mm256_mask_reduce_max_epu8): Ditto.
37837 (_mm256_mask_reduce_min_epi8): Ditto.
37838 (_mm256_mask_reduce_min_epu8): Ditto.
37840 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
37842 * common/config/i386/i386-common.cc
37843 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
37844 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
37845 (OPTION_MASK_ISA_AVX_UNSET):
37846 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
37847 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
37848 * config/i386/i386.md (vpclmulqdqvl): New.
37849 * config/i386/sse.md (pclmulqdq): Add evex encoding.
37850 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
37853 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
37855 * config/i386/avx512vlbwintrin.h
37856 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
37857 (_mm_mask_blend_epi8): Ditto.
37858 (_mm256_mask_blend_epi16): Ditto.
37859 (_mm256_mask_blend_epi8): Ditto.
37860 * config/i386/avx512vlintrin.h
37861 (_mm256_mask_blend_pd): Ditto.
37862 (_mm256_mask_blend_ps): Ditto.
37863 (_mm256_mask_blend_epi64): Ditto.
37864 (_mm256_mask_blend_epi32): Ditto.
37865 (_mm_mask_blend_pd): Ditto.
37866 (_mm_mask_blend_ps): Ditto.
37867 (_mm_mask_blend_epi64): Ditto.
37868 (_mm_mask_blend_epi32): Ditto.
37869 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
37870 (VF_AVX512HFBFVL): Move it before the first usage.
37871 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
37872 to VF_AVX512HFBFVL.
37874 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
37876 * common/config/i386/i386-common.cc
37877 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
37878 to OPTION_MASK_ISA_AVX512BW_SET.
37879 (OPTION_MASK_ISA_AVX512F_UNSET):
37880 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
37881 (OPTION_MASK_ISA_AVX512BW_UNSET):
37882 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
37883 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
37884 * config/i386/avx512vbmi2vlintrin.h: Ditto.
37885 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
37886 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
37887 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
37888 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
37890 (compressstore<mode>_mask): Ditto.
37891 (expand<mode>_mask): Ditto.
37892 (expand<mode>_maskz): Ditto.
37893 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
37894 VI12_VI48F_AVX512VL.
37896 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
37898 * common/config/i386/i386-common.cc
37899 (OPTION_MASK_ISA_AVX512BITALG_SET):
37900 Change OPTION_MASK_ISA_AVX512F_SET
37901 to OPTION_MASK_ISA_AVX512BW_SET.
37902 (OPTION_MASK_ISA_AVX512F_UNSET):
37903 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
37904 (OPTION_MASK_ISA_AVX512BW_UNSET):
37905 Add OPTION_MASK_ISA_AVX512BITALG_SET.
37906 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
37907 * config/i386/i386-builtin.def:
37908 Remove redundant OPTION_MASK_ISA_AVX512BW.
37909 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
37910 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
37911 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
37913 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
37915 * config/i386/i386-expand.cc
37916 (ix86_check_builtin_isa_match): Correct wrong comments.
37917 Add a new macro SHARE_BUILTIN and refactor the current if
37920 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
37922 * config/i386/cpuid.h: Open a new section for Extended Features
37923 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
37926 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
37928 * config/i386/sse.md: Modify insn vperm{i,f}
37931 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
37933 * config/xtensa/xtensa-opts.h: New header.
37934 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
37935 xtensa_strict_align.
37936 * config/xtensa/xtensa.cc (xtensa_option_override): When
37937 -m[no-]strict-align is not specified in the command line set
37938 xtensa_strict_align to 0 if the hardware supports both unaligned
37939 loads and stores or to 1 otherwise.
37940 * config/xtensa/xtensa.opt (mstrict-align): New option.
37941 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
37943 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
37945 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
37948 2023-04-19 Andrew Pinski <apinski@marvell.com>
37950 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
37952 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37954 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
37955 (VECTOR_BOOL_MODE): Ditto.
37956 (ADJUST_NUNITS): Ditto.
37957 (ADJUST_ALIGNMENT): Ditto.
37958 (ADJUST_BYTESIZE): Ditto.
37959 (ADJUST_PRECISION): Ditto.
37960 (RVV_MODES): Ditto.
37961 (VECTOR_MODE_WITH_PREFIX): Ditto.
37962 * config/riscv/riscv-v.cc (ENTRY): Ditto.
37963 (get_vlmul): Ditto.
37964 (get_ratio): Ditto.
37965 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
37966 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
37967 (vbool64_t): Ditto.
37968 (vbool32_t): Ditto.
37969 (vbool16_t): Ditto.
37974 (vint8mf8_t): Ditto.
37975 (vuint8mf8_t): Ditto.
37976 (vint8mf4_t): Ditto.
37977 (vuint8mf4_t): Ditto.
37978 (vint8mf2_t): Ditto.
37979 (vuint8mf2_t): Ditto.
37980 (vint8m1_t): Ditto.
37981 (vuint8m1_t): Ditto.
37982 (vint8m2_t): Ditto.
37983 (vuint8m2_t): Ditto.
37984 (vint8m4_t): Ditto.
37985 (vuint8m4_t): Ditto.
37986 (vint8m8_t): Ditto.
37987 (vuint8m8_t): Ditto.
37988 (vint16mf4_t): Ditto.
37989 (vuint16mf4_t): Ditto.
37990 (vint16mf2_t): Ditto.
37991 (vuint16mf2_t): Ditto.
37992 (vint16m1_t): Ditto.
37993 (vuint16m1_t): Ditto.
37994 (vint16m2_t): Ditto.
37995 (vuint16m2_t): Ditto.
37996 (vint16m4_t): Ditto.
37997 (vuint16m4_t): Ditto.
37998 (vint16m8_t): Ditto.
37999 (vuint16m8_t): Ditto.
38000 (vint32mf2_t): Ditto.
38001 (vuint32mf2_t): Ditto.
38002 (vint32m1_t): Ditto.
38003 (vuint32m1_t): Ditto.
38004 (vint32m2_t): Ditto.
38005 (vuint32m2_t): Ditto.
38006 (vint32m4_t): Ditto.
38007 (vuint32m4_t): Ditto.
38008 (vint32m8_t): Ditto.
38009 (vuint32m8_t): Ditto.
38010 (vint64m1_t): Ditto.
38011 (vuint64m1_t): Ditto.
38012 (vint64m2_t): Ditto.
38013 (vuint64m2_t): Ditto.
38014 (vint64m4_t): Ditto.
38015 (vuint64m4_t): Ditto.
38016 (vint64m8_t): Ditto.
38017 (vuint64m8_t): Ditto.
38018 (vfloat32mf2_t): Ditto.
38019 (vfloat32m1_t): Ditto.
38020 (vfloat32m2_t): Ditto.
38021 (vfloat32m4_t): Ditto.
38022 (vfloat32m8_t): Ditto.
38023 (vfloat64m1_t): Ditto.
38024 (vfloat64m2_t): Ditto.
38025 (vfloat64m4_t): Ditto.
38026 (vfloat64m8_t): Ditto.
38027 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
38028 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
38029 (riscv_convert_vector_bits): Ditto.
38030 * config/riscv/riscv.md:
38031 * config/riscv/vector-iterators.md:
38032 * config/riscv/vector.md
38033 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
38034 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
38035 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
38036 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
38037 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
38038 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
38039 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
38040 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
38041 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
38043 2023-04-19 Pan Li <pan2.li@intel.com>
38045 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
38046 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
38048 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
38052 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
38053 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
38054 for operand 0. Use any_extract code iterator.
38055 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
38056 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
38057 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
38058 (*cmpqi_ext<mode>_1): Use general_operand predicate
38059 for operand 1. Use any_extract code iterator.
38060 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
38061 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
38063 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38065 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
38066 (aarch64_uaddw2<mode>): Delete.
38067 (aarch64_ssubw2<mode>): Delete.
38068 (aarch64_usubw2<mode>): Delete.
38069 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
38071 2023-04-19 Richard Biener <rguenther@suse.de>
38073 * tree-ssa-structalias.cc (do_ds_constraint): Use
38074 solve_add_graph_edge.
38076 2023-04-19 Richard Biener <rguenther@suse.de>
38078 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
38080 (do_sd_constraint): ... here.
38082 2023-04-19 Richard Biener <rguenther@suse.de>
38084 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
38085 rejecting the merge when A contains only a non-local label.
38087 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
38089 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
38090 (VIRTUAL_REGISTER_NUM_P): Ditto.
38091 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
38092 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
38093 * function.cc (instantiate_decl_rtl): Ditto.
38094 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
38095 (nonzero_address_p): Ditto.
38096 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
38098 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
38100 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
38102 2023-04-19 Richard Biener <rguenther@suse.de>
38104 * system.h (auto_mpz::operator->()): New.
38105 * realmpfr.h (auto_mpfr::operator->()): New.
38106 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
38107 * real.cc (real_from_string): Likewise.
38108 (dconst_e_ptr): Likewise.
38109 (dconst_sqrt2_ptr): Likewise.
38110 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
38112 (bound_difference_of_offsetted_base): Likewise.
38113 (number_of_iterations_ne): Likewise.
38114 (number_of_iterations_lt_to_ne): Likewise.
38115 * ubsan.cc: Include realmpfr.h.
38116 (ubsan_instrument_float_cast): Use auto_mpfr.
38118 2023-04-19 Richard Biener <rguenther@suse.de>
38120 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
38121 edges, remove edges from escaped after special-casing them.
38123 2023-04-19 Richard Biener <rguenther@suse.de>
38125 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
38128 2023-04-19 Richard Biener <rguenther@suse.de>
38130 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
38131 to the LHS varinfo solution member.
38133 2023-04-19 Richard Biener <rguenther@suse.de>
38135 * tree-ssa-structalias.cc (topo_visit): Look at the real
38136 destination of edges.
38138 2023-04-19 Richard Biener <rguenther@suse.de>
38140 PR tree-optimization/44794
38141 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
38142 If an epilogue loop is required set its iteration upper bound.
38144 2023-04-19 Xi Ruoyao <xry111@xry111.site>
38147 * config/loongarch/loongarch-protos.h
38148 (loongarch_expand_block_move): Add a parameter as alignment RTX.
38149 * config/loongarch/loongarch.h:
38150 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
38151 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
38152 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
38153 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
38154 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
38155 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
38156 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
38157 Take the alignment from the parameter, but set it to
38158 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
38159 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
38160 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
38161 (loongarch_block_move_straight): When there are left-over bytes,
38162 half the mode size instead of falling back to byte mode at once.
38163 (loongarch_block_move_loop): Limit the length of loop body with
38164 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
38165 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
38166 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
38167 to loongarch_expand_block_move.
38169 2023-04-19 Xi Ruoyao <xry111@xry111.site>
38171 * config/loongarch/loongarch.cc
38172 (loongarch_setup_incoming_varargs): Don't save more GARs than
38173 cfun->va_list_gpr_size / UNITS_PER_WORD.
38175 2023-04-19 Richard Biener <rguenther@suse.de>
38177 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
38178 no epilogue condition.
38180 2023-04-19 Richard Biener <rguenther@suse.de>
38182 * gimple.h (gimple_assign_load): Outline...
38183 * gimple.cc (gimple_assign_load): ... here. Avoid
38184 get_base_address and instead just strip the outermost
38185 handled component, treating a remaining handled component
38188 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38190 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
38192 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
38194 2023-04-19 Jakub Jelinek <jakub@redhat.com>
38196 PR tree-optimization/109011
38197 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
38198 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
38199 CLZ, CTZ and FFS. Remove vargs variable, use
38200 gimple_build_call_internal rather than gimple_build_call_internal_vec.
38201 (vect_vect_recog_func_ptrs): Adjust popcount entry.
38203 2023-04-19 Jakub Jelinek <jakub@redhat.com>
38206 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
38207 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
38208 a new REG rather than the SUBREG.
38210 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
38212 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
38215 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38218 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
38219 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
38221 2023-04-19 Richard Biener <rguenther@suse.de>
38223 PR rtl-optimization/109237
38224 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
38225 TREE_VISITED on INSN_VAR_LOCATION_DECL.
38226 (delete_trivially_dead_insns): Maintain TREE_VISITED on
38227 active debug bind INSN_VAR_LOCATION_DECL.
38229 2023-04-19 Richard Biener <rguenther@suse.de>
38231 PR rtl-optimization/109237
38232 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
38234 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
38236 * doc/install.texi (enable-decimal-float): Add AArch64.
38238 2023-04-19 liuhongt <hongtao.liu@intel.com>
38240 PR rtl-optimization/109351
38241 * ira.cc (setup_class_subset_and_memory_move_costs): Check
38242 hard_regno_mode_ok before setting lowest memory move cost for
38243 the mode with different reg classes.
38245 2023-04-18 Jason Merrill <jason@redhat.com>
38247 * doc/invoke.texi: Remove stray @gol.
38249 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38251 * ifcvt.cc (cond_move_process_if_block): Consider the result of
38252 targetm.noce_conversion_profitable_p() when replacing the original
38253 sequence with the converted one.
38255 2023-04-18 Mark Harmstone <mark@harmstone.com>
38257 * common.opt (gcodeview): Add new option.
38258 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
38259 * opts.cc (command_handle_option): Similarly.
38260 * doc/invoke.texi: Add documentation for -gcodeview.
38262 2023-04-18 Andrew Pinski <apinski@marvell.com>
38264 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
38265 (make_pass_phiopt): Make execute out of line.
38266 (tree_ssa_cs_elim): Move code into ...
38267 (pass_cselim::execute): here.
38269 2023-04-18 Sam James <sam@gentoo.org>
38271 * system.h: Drop unused INCLUDE_PTHREAD_H.
38273 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
38275 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
38278 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
38280 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
38281 (bswapdi2, bswapsi2): Similarly.
38283 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
38286 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
38287 Use CODE_FOR_sse4_1_insertps_v4sf.
38288 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
38289 (expand_vec_perm_1): Call expand_vec_per_insertps.
38290 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
38291 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
38292 (@sse4_1_insertps_<mode>): New insn pattern.
38293 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
38294 pattern from sse4_1_insertps using VI4F_128 mode iterator.
38296 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38298 * value-range.cc (gt_ggc_mx): New.
38300 * value-range.h (class vrange): Add GTY marker.
38301 (class frange): Same.
38302 (gt_ggc_mx): Remove.
38303 (gt_pch_nx): Remove.
38305 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
38307 * lra-constraints.cc (constraint_unique): New.
38308 (process_address_1): Apply constraint_unique test.
38309 * recog.cc (constrain_operands): Allow relaxed memory
38312 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
38314 * doc/extend.texi (Target Builtins): Add RISC-V Vector
38316 (RISC-V Vector Intrinsics): Document GCC implemented which
38317 version of RISC-V vector intrinsics and its reference.
38319 2023-04-18 Richard Biener <rguenther@suse.de>
38321 PR middle-end/108786
38322 * bitmap.h (bitmap_clear_first_set_bit): New.
38323 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
38324 bitmap_first_set_bit and add optional clearing of the bit.
38325 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
38326 (bitmap_clear_first_set_bit): Likewise.
38327 * df-core.cc (df_worklist_dataflow_doublequeue): Use
38328 bitmap_clear_first_set_bit.
38329 * graphite-scop-detection.cc (scop_detection::merge_sese):
38331 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
38332 (sanitize_asan_mark_poison): Likewise.
38333 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
38334 * tree-into-ssa.cc (rewrite_blocks): Likewise.
38335 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
38336 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
38338 2023-04-18 Richard Biener <rguenther@suse.de>
38340 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
38341 (dump_sa_points_to_info): ... this function.
38342 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
38343 and call dump_sa_stats guarded with TDF_STATS.
38344 (ipa_pta_execute): Likewise.
38345 (compute_may_aliases): Guard dump_alias_info with
38346 TDF_DETAILS|TDF_ALIAS.
38348 2023-04-18 Andrew Pinski <apinski@marvell.com>
38350 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
38351 the expression that is being tried when TDF_FOLDING
38353 (phiopt_worker::match_simplify_replacement): Dump
38354 the sequence which was created by gimple_simplify_phiopt
38355 when TDF_FOLDING is true.
38357 2023-04-18 Andrew Pinski <apinski@marvell.com>
38359 * tree-ssa-phiopt.cc (match_simplify_replacement):
38360 Simplify code that does the movement slightly.
38362 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38364 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
38366 (rev16<mode>2): Rename to...
38367 (aarch64_rev16<mode>2_alt1): ... This.
38368 (rev16<mode>2_alt): Rename to...
38369 (*aarch64_rev16<mode>2_alt2): ... This.
38371 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38373 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
38374 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
38376 * range-op-float.cc (zero_range): Use dconstm0.
38377 (zero_to_inf_range): Same.
38378 * real.h (dconstm0): New.
38379 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
38380 (frange::set_zero): Do not declare dconstm0.
38382 2023-04-18 Richard Biener <rguenther@suse.de>
38384 * system.h (class auto_mpz): New,
38385 * realmpfr.h (class auto_mpfr): Likewise.
38386 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
38387 (do_mpfr_arg2): Likewise.
38388 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
38390 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38392 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
38393 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
38395 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38397 * value-range.cc (frange::operator==): Adjust for NAN.
38398 (range_tests_nan): Remove some NAN tests.
38400 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38402 * inchash.cc (hash::add_real_value): New.
38403 * inchash.h (class hash): Add add_real_value.
38404 * value-range.cc (add_vrange): New.
38405 * value-range.h (inchash::add_vrange): New.
38407 2023-04-18 Richard Biener <rguenther@suse.de>
38409 PR tree-optimization/109539
38410 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
38411 Re-implement pointer relatedness for PHIs.
38413 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
38415 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
38416 (SV_FP): New iterator.
38417 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
38418 (recip<mode>2): Unify the two patterns using SV_FP.
38419 (div_scale<mode><exec_vcc>): New insn.
38420 (div_fmas<mode><exec>): New insn.
38421 (div_fixup<mode><exec>): New insn.
38422 (div<mode>3): Unify the two expanders and rewrite using hardfp.
38423 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
38424 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
38425 and UNSPEC_DIV_FIXUP.
38426 (vccwait): New attribute.
38428 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38430 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
38431 if the argument matches that.
38433 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38435 * config/aarch64/atomics.md
38436 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
38437 Use SD_HSDI for destination mode iterator.
38439 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
38441 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
38442 of z-extensions and s-extensions.
38443 (riscv_subset_list::parse): Likewise.
38445 2023-04-18 Jakub Jelinek <jakub@redhat.com>
38447 PR tree-optimization/109240
38448 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
38449 first vec_perm operand and minus as second using fneg/fadd and
38450 minus as first vec_perm operand and plus as second using fneg/fsub.
38452 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38454 * data-streamer.cc (bp_pack_real_value): New.
38455 (bp_unpack_real_value): New.
38456 * data-streamer.h (bp_pack_real_value): New.
38457 (bp_unpack_real_value): New.
38458 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
38459 bp_unpack_real_value.
38460 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
38461 bp_pack_real_value.
38463 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38465 * wide-int.h (WIDE_INT_MAX_HWIS): New.
38466 (class fixed_wide_int_storage): Use it.
38467 (trailing_wide_ints <N>::set_precision): Use it.
38468 (trailing_wide_ints <N>::extra_size): Use it.
38470 2023-04-18 Xi Ruoyao <xry111@xry111.site>
38472 * config/loongarch/loongarch-protos.h
38473 (loongarch_addu16i_imm12_operand_p): New function prototype.
38474 (loongarch_split_plus_constant): Likewise.
38475 * config/loongarch/loongarch.cc
38476 (loongarch_addu16i_imm12_operand_p): New function.
38477 (loongarch_split_plus_constant): Likewise.
38478 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
38479 (DUAL_IMM12_OPERAND): Likewise.
38480 (DUAL_ADDU16I_OPERAND): Likewise.
38481 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
38483 * config/loongarch/predicates.md (const_dual_imm12_operand): New
38485 (const_addu16i_operand): Likewise.
38486 (const_addu16i_imm12_di_operand): Likewise.
38487 (const_addu16i_imm12_si_operand): Likewise.
38488 (plus_di_operand): Likewise.
38489 (plus_si_operand): Likewise.
38490 (plus_si_extend_operand): Likewise.
38491 * config/loongarch/loongarch.md (add<mode>3): Convert to
38492 define_insn_and_split. Use plus_<mode>_operand predicate
38493 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
38494 and Le constraints.
38495 (*addsi3_extended): Convert to define_insn_and_split. Use
38496 plus_si_extend_operand instead of arith_operand. Add
38497 alternatives for La and Le alternatives.
38499 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38501 * value-range.h (Value_Range::Value_Range): New.
38502 (Value_Range::contains_p): New.
38504 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
38506 * value-range.h (class vrange): Make m_discriminator const.
38507 (class irange): Make m_max_ranges const. Adjust constructors
38509 (class unsupported_range): Construct vrange appropriately.
38510 (class frange): Same.
38512 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
38514 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
38517 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
38519 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
38521 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
38523 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
38525 (riscv_expand_epilogue): Likewise.
38527 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
38529 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
38531 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
38533 2023-04-17 Andrew Pinski <apinski@marvell.com>
38535 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
38538 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
38540 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
38543 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
38545 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
38546 parameter remaining_size.
38547 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
38548 (riscv_expand_prologue): Likewise.
38549 (riscv_expand_epilogue): Likewise.
38551 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
38553 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
38554 roriw for constant counts.
38555 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
38556 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
38557 (simplify_context::simplify_binary_operation_1): Use it.
38558 * expmed.cc (expand_shift_1): Likewise.
38560 2023-04-17 Martin Jambor <mjambor@suse.cz>
38564 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
38565 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
38566 (ipa_zap_jf_refdesc): New function.
38567 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
38568 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
38569 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
38570 the new parameter of find_reference.
38571 (adjust_references_in_caller): Likewise. Make sure the constant jump
38572 function is not used to decrement a refdec counter again. Only
38573 decrement refdesc counters when the pass_through jump function allows
38574 it. Added a detailed dump when decrementing refdesc counters.
38575 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
38576 (ipa_set_jf_simple_pass_through): Initialize the new flag.
38577 (ipa_set_jf_unary_pass_through): Likewise.
38578 (ipa_set_jf_arith_pass_through): Likewise.
38579 (remove_described_reference): Provide a value for the new parameter of
38581 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
38582 the previous pass_through had a flag mandating that we do so.
38583 (propagate_controlled_uses): Likewise. Only decrement refdesc
38584 counters when the pass_through jump function allows it.
38585 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
38586 parameter of find_reference.
38587 (ipa_write_jump_function): Assert the new flag does not have to be
38589 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
38592 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
38593 Di Zhao <di.zhao@amperecomputing.com>
38595 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
38596 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
38597 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
38598 Check for the above tuning option when processing loads.
38600 2023-04-17 Richard Biener <rguenther@suse.de>
38602 PR tree-optimization/109524
38603 * tree-vrp.cc (remove_unreachable::m_list): Change to a
38604 vector of pairs of block indices.
38605 (remove_unreachable::maybe_register_block): Adjust.
38606 (remove_unreachable::remove_and_update_globals): Likewise.
38607 Deal with removed blocks.
38609 2023-04-16 Jeff Law <jlaw@ventanamicro>
38612 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
38613 TARGET_SFB_ALU, force the true arm into a register.
38615 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
38618 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
38619 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
38621 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
38622 (pa_function_arg_size): Change return type to int. Return zero
38623 for arguments larger than 1 GB. Update comments.
38625 2023-04-15 Jakub Jelinek <jakub@redhat.com>
38627 PR tree-optimization/109154
38628 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
38629 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
38631 2023-04-15 Jason Merrill <jason@redhat.com>
38634 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
38635 Overhaul lhs_ref.ref analysis.
38637 2023-04-14 Richard Biener <rguenther@suse.de>
38639 PR tree-optimization/109502
38640 * tree-vect-stmts.cc (vectorizable_assignment): Fix
38641 check for conversion between mask and non-mask types.
38643 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
38644 Jakub Jelinek <jakub@redhat.com>
38648 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
38649 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
38650 smaller than word_mode.
38651 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
38652 <case AND>: Likewise.
38654 2023-04-14 Jakub Jelinek <jakub@redhat.com>
38656 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
38659 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
38661 PR tree-optimization/108139
38662 PR tree-optimization/109462
38663 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
38664 equivalency check for PHI nodes.
38665 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
38666 does not dominate single-arg equivalency edges.
38668 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
38671 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
38672 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
38674 2023-04-13 Richard Biener <rguenther@suse.de>
38676 PR tree-optimization/109491
38677 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
38678 NULL operands test.
38680 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38683 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
38684 (vint16mf4_t): Ditto.
38685 (vint32mf2_t): Ditto.
38686 (vint64m1_t): Ditto.
38687 (vint64m2_t): Ditto.
38688 (vint64m4_t): Ditto.
38689 (vint64m8_t): Ditto.
38690 (vuint8mf8_t): Ditto.
38691 (vuint16mf4_t): Ditto.
38692 (vuint32mf2_t): Ditto.
38693 (vuint64m1_t): Ditto.
38694 (vuint64m2_t): Ditto.
38695 (vuint64m4_t): Ditto.
38696 (vuint64m8_t): Ditto.
38697 (vfloat32mf2_t): Ditto.
38698 (vbool64_t): Ditto.
38699 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
38700 (register_vector_type): Ditto.
38701 (check_required_extensions): Fix condition.
38702 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
38703 (RVV_REQUIRE_ELEN_64): New define.
38704 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
38705 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
38706 (TARGET_VECTOR_FP64): Ditto.
38707 (ENTRY): Fix predicate.
38708 * config/riscv/vector-iterators.md: Fix predicate.
38710 2023-04-12 Jakub Jelinek <jakub@redhat.com>
38712 PR tree-optimization/109410
38713 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
38714 block if first statement of the function is a call to returns_twice
38717 2023-04-12 Jakub Jelinek <jakub@redhat.com>
38720 * config/i386/i386.cc: Include rtl-error.h.
38721 (ix86_print_operand): For z modifier warning, use warning_for_asm
38722 if this_is_asm_operands. For Z modifier errors, use %c and code
38723 instead of hardcoded Z.
38725 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
38727 * config/i386/x-mingw32-utf8: Remove extrataneous $@
38729 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
38731 PR tree-optimization/109462
38732 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
38733 check for equivalences if NAME is a phi node.
38735 2023-04-12 Richard Biener <rguenther@suse.de>
38737 PR tree-optimization/109473
38738 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
38739 Convert scalar result to the computation type before performing
38740 the reduction adjustment.
38742 2023-04-12 Richard Biener <rguenther@suse.de>
38744 PR tree-optimization/109469
38745 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
38746 a returns-twice call.
38748 2023-04-12 Richard Biener <rguenther@suse.de>
38750 PR tree-optimization/109434
38751 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
38752 handle possibly throwing calls when processing the LHS
38753 and may-defs are not OK.
38755 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
38757 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
38758 predicate to avoid splitting arith constants.
38760 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
38761 Pan Li <pan2.li@intel.com>
38762 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38763 Kito Cheng <kito.cheng@sifive.com>
38766 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
38767 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
38768 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
38769 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
38770 (riscv_zero_call_used_regs): New.
38771 (TARGET_ZERO_CALL_USED_REGS): New.
38773 2023-04-11 Martin Liska <mliska@suse.cz>
38776 * opts.cc (finish_options): Drop also
38777 x_flag_var_tracking_assignments.
38779 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
38781 PR tree-optimization/108888
38782 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
38784 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
38787 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
38788 (vsx_sign_extend_v16qi_<mode>): ... this.
38789 (vsx_sign_extend_hi_<mode>): Rename to...
38790 (vsx_sign_extend_v8hi_<mode>): ... this.
38791 (vsx_sign_extend_si_v2di): Rename to...
38792 (vsx_sign_extend_v4si_v2di): ... this.
38793 (vsignextend_qi_<mode>): Remove.
38794 (vsignextend_hi_<mode>): Remove.
38795 (vsignextend_si_v2di): Remove.
38796 (vsignextend_v2di_v1ti): Remove.
38797 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
38798 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
38799 with gen_vsx_sign_extend_v16qi_v4si.
38800 * config/rs6000/rs6000.md (split for DI constant generation):
38801 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
38802 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
38803 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
38804 with gen_vsx_sign_extend_v16qi_si.
38805 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
38806 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
38807 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
38808 vsx_sign_extend_v16qi_v4si.
38809 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
38810 vsx_sign_extend_v8hi_v2di.
38811 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
38812 vsx_sign_extend_v8hi_v4si.
38813 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
38814 vsx_sign_extend_si_v2di.
38815 (__builtin_altivec_vsignext): Set bif-pattern to
38816 vsx_sign_extend_v2di_v1ti.
38817 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
38818 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
38819 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
38820 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
38822 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
38825 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
38826 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
38828 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
38830 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
38832 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
38834 * common/config/i386/cpuinfo.h (get_available_features):
38835 Detect AMX-COMPLEX.
38836 * common/config/i386/i386-common.cc
38837 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
38838 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
38839 (ix86_handle_option): Handle -mamx-complex.
38840 * common/config/i386/i386-cpuinfo.h (enum processor_features):
38841 Add FEATURE_AMX_COMPLEX.
38842 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
38844 * config.gcc: Add amxcomplexintrin.h.
38845 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
38846 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
38848 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
38849 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
38850 Handle amx-complex.
38851 * config/i386/i386.opt: Add option -mamx-complex.
38852 * config/i386/immintrin.h: Include amxcomplexintrin.h.
38853 * doc/extend.texi: Document amx-complex.
38854 * doc/invoke.texi: Document -mamx-complex.
38855 * doc/sourcebuild.texi: Document target amx-complex.
38856 * config/i386/amxcomplexintrin.h: New file.
38858 2023-04-08 Jakub Jelinek <jakub@redhat.com>
38860 PR tree-optimization/109392
38861 * tree-vect-generic.cc (tree_vec_extract): Handle failure
38862 of maybe_push_res_to_seq better.
38864 2023-04-08 Jakub Jelinek <jakub@redhat.com>
38866 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
38868 (SYSTEM_H): Depend on $(HASHTAB_H).
38869 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
38870 dependency on $(RTL_BASE_H), remove redundant dependency on
38873 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
38876 * config/arm/arm.cc (arm_effective_regno): New function.
38877 (mve_vector_mem_operand): Use it.
38879 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
38881 PR tree-optimization/109417
38882 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
38883 dependency is in SSA_NAME_FREE_LIST.
38885 2023-04-06 Andrew Pinski <apinski@marvell.com>
38887 PR tree-optimization/109427
38888 * params.opt (-param=vect-induction-float=):
38889 Fix option attribute typo for IntegerRange.
38891 2023-04-05 Jeff Law <jlaw@ventanamicro>
38894 * combine.cc (combine_instructions): Force re-recognition when
38895 after restoring the body of an insn to its original form.
38897 2023-04-05 Martin Jambor <mjambor@suse.cz>
38900 * ipa-sra.cc (zap_useless_ipcp_results): New function.
38901 (process_isra_node_results): Call it.
38903 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38905 * config/riscv/vector.md: Fix incorrect operand order.
38907 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38909 * config/riscv/riscv-vsetvl.cc
38910 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
38913 2023-04-05 Li Xu <xuli1@eswincomputing.com>
38915 * config/riscv/riscv-vector-builtins.def: Fix typo.
38916 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
38917 * config/riscv/vector-iterators.md: Ditto.
38919 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
38921 * doc/md.texi (Including Patterns): Fix page break.
38923 2023-04-04 Jakub Jelinek <jakub@redhat.com>
38925 PR tree-optimization/109386
38926 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
38927 foperator_le::op1_range, foperator_le::op2_range,
38928 foperator_gt::op1_range, foperator_gt::op2_range,
38929 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
38930 BRS_FALSE case even if the other op is maybe_isnan, not just
38932 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
38933 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
38934 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
38935 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
38936 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
38937 not just known_isnan.
38939 2023-04-04 Marek Polacek <polacek@redhat.com>
38941 PR sanitizer/109107
38942 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
38944 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
38946 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
38948 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
38949 (mve_vcreateq_f<mode>): Swap operands.
38951 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
38953 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
38955 2023-04-04 Jakub Jelinek <jakub@redhat.com>
38958 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
38959 Reword diagnostics about zfinx conflict with f, formatting fixes.
38961 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
38963 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
38965 2023-04-04 Richard Biener <rguenther@suse.de>
38967 PR tree-optimization/109304
38968 * tree-profile.cc (tree_profiling): Use symtab node
38969 availability to decide whether to skip adjusting calls.
38970 Do not adjust calls to internal functions.
38972 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
38975 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
38976 function for permutation control vector by considering big endianness.
38978 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
38981 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
38982 (rs6000_vprtyb<mode>2): ... this.
38983 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
38984 rs6000_vprtybv2di2.
38985 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
38986 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
38987 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
38988 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
38990 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
38991 Sandra Loosemore <sandra@codesourcery.com>
38993 * doc/md.texi (Insn Splitting): Tweak wording for readability.
38995 2023-04-03 Martin Jambor <mjambor@suse.cz>
38998 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
38999 offset + size will be representable in unsigned int.
39001 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
39003 * configure.ac (ZSTD_LIB): Move before zstd.h check.
39004 Unset gcc_cv_header_zstd_h without libzstd.
39005 * configure: Regenerate.
39007 2023-04-03 Martin Liska <mliska@suse.cz>
39009 * doc/invoke.texi: Document new param.
39011 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
39013 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
39014 new check_effective_target function.
39016 2023-04-03 Li Xu <xuli1@eswincomputing.com>
39018 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
39019 (vfloat32m8_t): Likewise
39021 2023-04-03 liuhongt <hongtao.liu@intel.com>
39023 * doc/md.texi: Document signbitm2.
39025 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39026 kito-cheng <kito.cheng@sifive.com>
39028 * config/riscv/vector.md: Fix RA constraint.
39030 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39032 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
39033 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
39034 * config/riscv/vector.md: Fix scalar move bug.
39036 2023-04-01 Jakub Jelinek <jakub@redhat.com>
39038 * range-op-float.cc (foperator_equal::fold_range): If at least
39039 one of the op ranges is not singleton and neither is NaN and all
39040 4 bounds are zero, return [1, 1].
39041 (foperator_not_equal::fold_range): In the same case return [0, 0].
39043 2023-04-01 Jakub Jelinek <jakub@redhat.com>
39045 * range-op-float.cc (foperator_equal::fold_range): Perform the
39046 non-singleton handling regardless of maybe_isnan (op1, op2).
39047 (foperator_not_equal::fold_range): Likewise.
39048 (foperator_lt::fold_range, foperator_le::fold_range,
39049 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
39050 real_* comparison check which results in range_false (type)
39051 even if maybe_isnan (op1, op2). Simplify.
39052 (foperator_ltgt): New class.
39053 (fop_ltgt): New variable.
39054 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
39057 2023-04-01 Jakub Jelinek <jakub@redhat.com>
39060 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
39061 returns VOIDmode, handle it like if the register isn't used for
39062 passing arguments at all.
39063 (apply_result_size): If targetm.calls.get_raw_result_mode returns
39064 VOIDmode, handle it like if the register isn't used for returning
39066 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
39067 means to return VOIDmode.
39068 * doc/tm.texi: Regenerated.
39069 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
39070 TARGET_SVE for P0_REGNUM.
39071 (aarch64_function_arg_regno_p): Also return true for p0-p3.
39072 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
39074 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
39076 * lra-constraints.cc: (combine_reload_insn): New function.
39078 2023-03-31 Jakub Jelinek <jakub@redhat.com>
39080 PR tree-optimization/91645
39081 * range-op-float.cc (foperator_unordered_lt::fold_range,
39082 foperator_unordered_le::fold_range,
39083 foperator_unordered_gt::fold_range,
39084 foperator_unordered_ge::fold_range,
39085 foperator_unordered_equal::fold_range): Call the ordered
39086 fold_range on ranges with cleared NaNs.
39087 * value-query.cc (range_query::get_tree_range): Handle also
39088 COMPARISON_CLASS_P trees.
39090 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
39091 Andrew Pinski <pinskia@gmail.com>
39094 * config/riscv/t-riscv: Add missing dependencies.
39096 2023-03-31 liuhongt <hongtao.liu@intel.com>
39098 * config/i386/i386.cc (inline_memory_move_cost): Return 100
39099 for MASK_REGS when MODE_SIZE > 8.
39101 2023-03-31 liuhongt <hongtao.liu@intel.com>
39104 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
39105 ufloat/ufix to floatuns/fixuns.
39106 * config/i386/i386-expand.cc
39107 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
39108 * config/i386/sse.md
39109 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
39111 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
39112 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
39114 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
39116 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
39118 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
39119 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
39120 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
39121 (ufloatv2siv2df2<mask_name>): Renamed to ..
39122 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
39123 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
39125 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
39127 (ufix_notruncv2dfv2si2): Renamed to ..
39128 (fixuns_notruncv2dfv2si2):.. this.
39129 (ufix_notruncv2dfv2si2_mask): Renamed to ..
39130 (fixuns_notruncv2dfv2si2_mask): .. this.
39131 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
39132 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
39133 (ufix_truncv2dfv2si2): Renamed to ..
39134 (*fixuns_truncv2dfv2si2): .. this.
39135 (ufix_truncv2dfv2si2_mask): Renamed to ..
39136 (fixuns_truncv2dfv2si2_mask): .. this.
39137 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
39138 (*fixuns_truncv2dfv2si2_mask_1): .. this.
39139 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
39140 (fixuns_truncv4dfv4si2<mask_name>): .. this.
39141 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
39143 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
39145 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
39146 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
39149 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
39151 PR tree-optimization/109154
39152 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
39153 * gimple-range-gori.h (may_recompute_p): Add depth param.
39154 * params.opt (ranger-recompute-depth): New param.
39156 2023-03-30 Jason Merrill <jason@redhat.com>
39160 * cgraph.h: Move reset() from cgraph_node to symtab_node.
39161 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
39162 remove_from_same_comdat_group.
39164 2023-03-30 Richard Biener <rguenther@suse.de>
39166 PR tree-optimization/107561
39167 * gimple-ssa-warn-access.cc (get_size_range): Add flags
39168 argument and pass it on.
39169 (check_access): When querying for the size range pass
39170 SR_ALLOW_ZERO when the known destination size is zero.
39172 2023-03-30 Richard Biener <rguenther@suse.de>
39174 PR tree-optimization/109342
39175 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
39176 overload for edge. When that edge is a backedge use
39177 dominated_by_p directly.
39179 2023-03-30 liuhongt <hongtao.liu@intel.com>
39181 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
39182 vpblendd instead of vpblendw for V4SI under avx2.
39184 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
39186 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
39187 for many quick operands, for register-sized modes.
39189 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
39191 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
39194 2023-03-29 Martin Liska <mliska@suse.cz>
39196 PR bootstrap/109310
39197 * configure.ac: Emit a warning for deprecated option
39198 --enable-link-mutex.
39199 * configure: Regenerate.
39201 2023-03-29 Richard Biener <rguenther@suse.de>
39203 PR tree-optimization/109331
39204 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
39205 discover a taken edge make sure to cleanup the CFG.
39207 2023-03-29 Richard Biener <rguenther@suse.de>
39209 PR tree-optimization/109327
39210 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
39211 already removed stmts when draining to_remove.
39213 2023-03-29 Richard Biener <rguenther@suse.de>
39216 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
39217 so we can re-create the DIE for the type if required.
39219 2023-03-29 Jakub Jelinek <jakub@redhat.com>
39220 Richard Biener <rguenther@suse.de>
39222 PR tree-optimization/109301
39223 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
39224 properties_provided from PROP_gimple_opt_math to 0.
39225 (pass_data_expand_powcabs): Change properties_provided from 0 to
39226 PROP_gimple_opt_math.
39228 2023-03-29 Richard Biener <rguenther@suse.de>
39230 PR tree-optimization/109154
39231 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
39232 inverted condition specially by inverting at the caller.
39233 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
39235 2023-03-28 David Malcolm <dmalcolm@redhat.com>
39238 * diagnostic-show-locus.cc (column_range::column_range): Factor
39239 out assertion conditional into...
39240 (column_range::valid_p): ...this new function.
39241 (line_corrections::add_hint): Don't attempt to consolidate hints
39242 if it would lead to invalid column_range instances.
39244 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
39247 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
39248 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
39251 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
39253 PR rtl-optimization/109187
39254 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
39255 subtraction in three-way comparison.
39257 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
39259 PR tree-optimization/109265
39260 PR tree-optimization/109274
39261 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
39262 not create a relation record is op1 and op2 are the same symbol.
39263 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
39264 handler for this stmt, but create a new record only if this statement
39265 generates a relation based on the ranges.
39266 (gori_compute::compute_operand2_range): Ditto.
39267 * value-relation.h (value_relation::set_relation): Always create the
39268 record that is requested.
39270 2023-03-28 Richard Biener <rguenther@suse.de>
39272 PR tree-optimization/107087
39273 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
39274 executable regions to avoid useless work and to better
39275 propagate degenerate PHIs.
39277 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
39279 * config/i386/x-mingw32-utf8: update comments.
39281 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
39284 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
39285 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
39287 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
39289 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
39290 after inlining. Record which decls are loaded from. Fix handling
39291 of vops for loads and stores.
39292 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
39293 (aarch64_accesses_vector_load_decl_p): Likewise.
39294 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
39296 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
39297 that loads from a decl, treat vector stores to those decls as
39299 (aarch64_vector_costs::finish_cost): ...and in that case,
39300 if the vector code does nothing more than a store, give the
39301 prologue a zero cost as well.
39303 2023-03-28 Richard Biener <rguenther@suse.de>
39306 PR tree-optimization/108129
39307 * genmatch.cc (lower_for): For (match ...) delay
39308 substituting into the match operator if possible.
39309 (dt_operand::gen_gimple_expr): For user_id look at the
39310 first substitute for determining how to access operands.
39311 (dt_operand::gen_generic_expr): Likewise.
39312 (dt_node::gen_kids): Properly sort user_ids according
39313 to their substitutes.
39314 (dt_node::gen_kids_1): Code-generate user_id matching.
39316 2023-03-28 Jakub Jelinek <jakub@redhat.com>
39317 Jonathan Wakely <jwakely@redhat.com>
39319 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
39320 Use subcommand rather than sub-command in function comments.
39322 2023-03-28 Jakub Jelinek <jakub@redhat.com>
39324 PR tree-optimization/109154
39325 * value-range.h (frange::flush_denormals_to_zero): Make it public
39326 rather than private.
39327 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
39329 * range-op-float.cc (range_operator_float::fold_range): Call
39330 flush_denormals_to_zero.
39332 2023-03-28 Jakub Jelinek <jakub@redhat.com>
39334 PR middle-end/106190
39335 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
39336 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
39338 2023-03-28 Jakub Jelinek <jakub@redhat.com>
39340 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
39341 as 4th argument to set to avoid clear_nan and union_ calls.
39343 2023-03-28 Jakub Jelinek <jakub@redhat.com>
39346 * config/i386/i386.cc (assign_386_stack_local): For DImode
39347 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
39348 align 32 rather than 0 to assign_stack_local.
39350 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
39353 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
39354 on operand #3 to get the final condition code. Use std::swap.
39355 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
39356 (fucmp<gcond:code>8<P:mode>_vis): Move around.
39357 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
39358 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
39360 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
39362 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
39363 top-level sections.
39365 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
39367 * config.host: Pull in i386/x-mingw32-utf8 Makefile
39368 fragment and reference utf8rc-mingw32.o explicitly
39370 * config/i386/sym-mingw32.cc: prevent name mangling of
39372 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
39373 depend on manifest file explicitly.
39375 2023-03-28 Richard Biener <rguenther@suse.de>
39378 2023-03-27 Richard Biener <rguenther@suse.de>
39380 PR rtl-optimization/109237
39381 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
39383 2023-03-28 Richard Biener <rguenther@suse.de>
39385 * common.opt (gdwarf): Remove Negative(gdwarf-).
39387 2023-03-28 Richard Biener <rguenther@suse.de>
39389 * common.opt (gdwarf): Add RejectNegative.
39390 (gdwarf-): Likewise.
39394 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
39396 * config/cris/constraints.md ("T"): Correct to
39397 define_memory_constraint.
39399 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
39401 * config/cris/cris.md (BW2): New mode-iterator.
39402 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
39405 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
39407 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
39408 for possible eliminable compares.
39410 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
39412 * config/cris/constraints.md ("R"): Remove unused constraint.
39414 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
39416 PR gcov-profile/109297
39417 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
39418 (merge_stream_usage): Likewise.
39419 (overlap_usage): Likewise.
39421 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
39424 * config/riscv/thead.md: Add missing mode specifiers.
39426 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
39427 Jiangning Liu <jiangning.liu@amperecomputing.com>
39428 Manolis Tsamis <manolis.tsamis@vrull.eu>
39430 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
39432 2023-03-27 Richard Biener <rguenther@suse.de>
39434 PR rtl-optimization/109237
39435 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
39437 2023-03-27 Richard Biener <rguenther@suse.de>
39440 * lto-wrapper.cc (run_gcc): Parse alternate debug options
39441 as well, they always enable debug.
39443 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
39446 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
39448 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
39450 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
39453 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
39454 than zero when calling vec_sld.
39455 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
39456 zero when calling vec_sld.
39457 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
39458 than zero when calling vec_sld.
39460 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
39462 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
39463 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
39464 loops are represented and which fields are vectors. Add
39465 documentation for OMP_FOR_PRE_BODY field. Document internal
39466 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
39467 * tree.def (OMP_FOR): Make documentation consistent with the
39468 Texinfo manual, to fill some gaps and correct errors.
39470 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
39473 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
39474 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
39475 (handle_move_double): Call it before handle_movsi.
39476 * config/m68k/m68k-protos.h: Declare it.
39478 2023-03-26 Jakub Jelinek <jakub@redhat.com>
39480 PR tree-optimization/109230
39481 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
39483 2023-03-26 Jakub Jelinek <jakub@redhat.com>
39486 * predict.cc (compute_function_frequency): Don't call
39487 warn_function_cold if function already has cold attribute.
39489 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
39491 * doc/install.texi: Remove anachronistic note
39492 related to languages built and separate source tarballs.
39494 2023-03-25 David Malcolm <dmalcolm@redhat.com>
39497 * diagnostic-format-sarif.cc (read_until_eof): Delete.
39498 (maybe_read_file): Delete.
39499 (sarif_builder::maybe_make_artifact_content_object): Use
39500 get_source_file_content rather than maybe_read_file.
39501 Reject it if it's not valid UTF-8.
39502 * input.cc (file_cache_slot::get_full_file_content): New.
39503 (get_source_file_content): New.
39504 (selftest::check_cpp_valid_utf8_p): New.
39505 (selftest::test_cpp_valid_utf8_p): New.
39506 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
39507 * input.h (get_source_file_content): New prototype.
39509 2023-03-24 David Malcolm <dmalcolm@redhat.com>
39511 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
39513 (Special Functions for Debugging the Analyzer): Convert to a
39514 table, and rewrite in places.
39515 (Other Debugging Techniques): Add notes on how to compare two
39516 different exploded graphs.
39518 2023-03-24 David Malcolm <dmalcolm@redhat.com>
39521 * json.cc: Update comments to indicate that we now preserve
39522 insertion order of keys within objects.
39523 (object::print): Traverse keys in insertion order.
39524 (object::set): Preserve insertion order of keys.
39525 (selftest::test_writing_objects): Add an additional key to verify
39526 that we preserve insertion order.
39527 * json.h (object::m_keys): New field.
39529 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
39531 PR tree-optimization/109238
39532 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
39533 predecessors which this block dominates.
39535 2023-03-24 Richard Biener <rguenther@suse.de>
39537 PR tree-optimization/106912
39538 * tree-profile.cc (tree_profiling): Update stmts only when
39539 profiling or testing coverage. Make sure to update calls
39540 fntype, stripping 'const' there.
39542 2023-03-24 Jakub Jelinek <jakub@redhat.com>
39544 PR middle-end/109258
39545 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
39546 if target == const0_rtx.
39548 2023-03-24 Alexandre Oliva <oliva@adacore.com>
39550 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
39551 Document options and effective targets.
39553 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
39555 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
39558 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
39560 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
39561 non-earlyclobber alternative.
39563 2023-03-23 Andrew Pinski <apinski@marvell.com>
39566 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
39569 2023-03-23 Richard Biener <rguenther@suse.de>
39571 PR tree-optimization/107569
39572 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
39573 Do not push SSA names with zero uses as available leader.
39574 (process_bb): Likewise.
39576 2023-03-23 Richard Biener <rguenther@suse.de>
39578 PR tree-optimization/109262
39579 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
39580 combining a piecewise complex load avoid touching loads
39581 that throw internally. Use fun, not cfun throughout.
39583 2023-03-23 Jakub Jelinek <jakub@redhat.com>
39585 * value-range.cc (irange::irange_union, irange::intersect): Fix
39586 comment spelling bugs.
39587 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
39588 * gimple-range-trace.h: Likewise.
39589 * gimple-range-edge.cc: Likewise.
39590 (gimple_outgoing_range_stmt_p,
39591 gimple_outgoing_range::switch_edge_range,
39592 gimple_outgoing_range::edge_range_p): Likewise.
39593 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
39594 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
39595 assume_query::assume_query, assume_query::calculate_phi): Likewise.
39596 * gimple-range-edge.h: Likewise.
39597 * value-range.h (Value_Range::set, Value_Range::lower_bound,
39598 Value_Range::upper_bound, frange::set_undefined): Likewise.
39599 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
39600 gori_compute): Likewise.
39601 * gimple-range-fold.h (fold_using_range): Likewise.
39602 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
39604 * gimple-range-gori.cc (range_def_chain::in_chain_p,
39605 range_def_chain::dump, gori_map::calculate_gori,
39606 gori_compute::compute_operand_range_switch,
39607 gori_compute::logical_combine, gori_compute::refine_using_relation,
39608 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
39610 * gimple-range.h: Likewise.
39611 (enable_ranger): Likewise.
39612 * range-op.h (empty_range_varying): Likewise.
39613 * value-query.h (value_query): Likewise.
39614 * gimple-range-cache.cc (block_range_cache::set_bb_range,
39615 block_range_cache::dump, ssa_global_cache::clear_global_range,
39616 temporal_cache::temporal_value, temporal_cache::current_p,
39617 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
39618 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
39620 * gimple-range-fold.cc (fur_edge::get_phi_operand,
39621 fur_stmt::get_operand, gimple_range_adjustment,
39622 fold_using_range::range_of_phi,
39623 fold_using_range::relation_fold_and_or): Likewise.
39624 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
39625 * value-query.cc (range_query::value_of_expr,
39626 range_query::value_on_edge, range_query::query_relation): Likewise.
39627 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
39628 intersect_range_with_nonzero_bits): Likewise.
39629 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
39630 exit_range): Likewise.
39631 * value-relation.h: Likewise.
39632 (equiv_oracle, relation_trio::relation_trio, value_relation,
39633 value_relation::value_relation, pe_min): Likewise.
39634 * range-op-float.cc (range_operator_float::rv_fold,
39635 frange_arithmetic, foperator_unordered_equal::op1_range,
39636 foperator_div::rv_fold): Likewise.
39637 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
39638 * value-relation.cc (equiv_oracle::query_relation,
39639 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
39640 value_relation::apply_transitive, relation_chain_head::find_relation,
39641 dom_oracle::query_relation, dom_oracle::find_relation_block,
39642 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
39643 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
39644 create_possibly_reversed_range, adjust_op1_for_overflow,
39645 operator_mult::wi_fold, operator_exact_divide::op1_range,
39646 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
39647 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
39648 range_op_lshift_tests): Likewise.
39650 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
39652 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
39653 (move_callee_saved_registers): Detect the bug condition early.
39655 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
39657 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
39658 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
39660 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
39661 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
39662 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
39663 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
39664 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
39666 2023-03-23 Jakub Jelinek <jakub@redhat.com>
39668 PR tree-optimization/109176
39669 * tree-vect-generic.cc (expand_vector_condition): If a has
39670 vector boolean type and is a comparison, also check if both
39671 the comparison and VEC_COND_EXPR could be successfully expanded
39674 2023-03-23 Pan Li <pan2.li@intel.com>
39675 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39679 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
39680 for vector mask modes.
39681 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
39682 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
39684 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
39686 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
39688 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39691 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
39692 (emit_vlmax_op): Ditto.
39693 * config/riscv/riscv-v.cc (get_sew): New function.
39694 (emit_vlmax_vsetvl): Adapt function.
39695 (emit_pred_op): Ditto.
39696 (emit_vlmax_op): Ditto.
39697 (emit_nonvlmax_op): Ditto.
39698 (legitimize_move): Fix LRA ICE.
39699 (gen_no_side_effects_vsetvl_rtx): Adapt function.
39700 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
39701 (@mov<VB:mode><P:mode>_lra): Ditto.
39702 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
39703 (*mov<VB:mode><P:mode>_lra): Ditto.
39705 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39708 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
39709 __riscv_vlenb support.
39711 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39712 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
39713 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
39715 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
39716 * config/riscv/riscv-vector-builtins.cc: Ditto.
39718 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39719 kito-cheng <kito.cheng@sifive.com>
39721 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
39722 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
39723 (pass_vsetvl::need_vsetvl): Fix bugs.
39724 (pass_vsetvl::backward_demand_fusion): Fix bugs.
39725 (pass_vsetvl::demand_fusion): Fix bugs.
39726 (eliminate_insn): Fix bugs.
39727 (insert_vsetvl): Ditto.
39728 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
39729 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
39730 * config/riscv/vector.md: Ditto.
39732 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39733 kito-cheng <kito.cheng@sifive.com>
39735 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
39736 * config/riscv/vector-iterators.md (nmsac): Ditto.
39742 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
39743 (@pred_mul_plus<mode>): Ditto.
39744 (*pred_madd<mode>): Ditto.
39745 (*pred_macc<mode>): Ditto.
39746 (*pred_mul_plus<mode>): Ditto.
39747 (@pred_mul_plus<mode>_scalar): Ditto.
39748 (*pred_madd<mode>_scalar): Ditto.
39749 (*pred_macc<mode>_scalar): Ditto.
39750 (*pred_mul_plus<mode>_scalar): Ditto.
39751 (*pred_madd<mode>_extended_scalar): Ditto.
39752 (*pred_macc<mode>_extended_scalar): Ditto.
39753 (*pred_mul_plus<mode>_extended_scalar): Ditto.
39754 (@pred_minus_mul<mode>): Ditto.
39755 (*pred_<madd_nmsub><mode>): Ditto.
39756 (*pred_nmsub<mode>): Ditto.
39757 (*pred_<macc_nmsac><mode>): Ditto.
39758 (*pred_nmsac<mode>): Ditto.
39759 (*pred_mul_<optab><mode>): Ditto.
39760 (*pred_minus_mul<mode>): Ditto.
39761 (@pred_mul_<optab><mode>_scalar): Ditto.
39762 (@pred_minus_mul<mode>_scalar): Ditto.
39763 (*pred_<madd_nmsub><mode>_scalar): Ditto.
39764 (*pred_nmsub<mode>_scalar): Ditto.
39765 (*pred_<macc_nmsac><mode>_scalar): Ditto.
39766 (*pred_nmsac<mode>_scalar): Ditto.
39767 (*pred_mul_<optab><mode>_scalar): Ditto.
39768 (*pred_minus_mul<mode>_scalar): Ditto.
39769 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
39770 (*pred_nmsub<mode>_extended_scalar): Ditto.
39771 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
39772 (*pred_nmsac<mode>_extended_scalar): Ditto.
39773 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
39774 (*pred_minus_mul<mode>_extended_scalar): Ditto.
39775 (*pred_<madd_msub><mode>): Ditto.
39776 (*pred_<macc_msac><mode>): Ditto.
39777 (*pred_<madd_msub><mode>_scalar): Ditto.
39778 (*pred_<macc_msac><mode>_scalar): Ditto.
39779 (@pred_neg_mul_<optab><mode>): Ditto.
39780 (@pred_mul_neg_<optab><mode>): Ditto.
39781 (*pred_<nmadd_msub><mode>): Ditto.
39782 (*pred_<nmsub_nmadd><mode>): Ditto.
39783 (*pred_<nmacc_msac><mode>): Ditto.
39784 (*pred_<nmsac_nmacc><mode>): Ditto.
39785 (*pred_neg_mul_<optab><mode>): Ditto.
39786 (*pred_mul_neg_<optab><mode>): Ditto.
39787 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
39788 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
39789 (*pred_<nmadd_msub><mode>_scalar): Ditto.
39790 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
39791 (*pred_<nmacc_msac><mode>_scalar): Ditto.
39792 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
39793 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
39794 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
39795 (@pred_widen_neg_mul_<optab><mode>): Ditto.
39796 (@pred_widen_mul_neg_<optab><mode>): Ditto.
39797 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
39798 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
39800 2023-03-23 liuhongt <hongtao.liu@intel.com>
39802 * builtins.cc (builtin_memset_read_str): Replace
39803 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
39804 (builtin_memset_gen_str): Ditto.
39805 * config/i386/i386-expand.cc
39806 (ix86_convert_const_wide_int_to_broadcast): Replace
39807 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
39808 (ix86_expand_vector_move): Ditto.
39809 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
39811 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
39812 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
39813 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
39814 * doc/tm.texi.in: Ditto.
39815 * target.def: Ditto.
39817 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
39819 * lra.cc (lra): Do not repeat inheritance and live range splitting
39820 when asm error is found.
39822 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
39824 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
39825 (gcn_expand_dpp_distribute_even_insn)
39826 (gcn_expand_dpp_distribute_odd_insn): Declare.
39827 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
39828 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
39829 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
39830 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
39831 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
39832 (fms<mode>4_negop2): New patterns.
39833 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
39834 (gcn_expand_dpp_distribute_even_insn)
39835 (gcn_expand_dpp_distribute_odd_insn): New functions.
39836 * config/gcn/gcn.md: Add entries to unspec enum.
39838 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
39840 PR tree-optimization/109008
39841 * value-range.cc (frange::set): Add nan_state argument.
39842 * value-range.h (class nan_state): New.
39843 (frange::get_nan_state): New.
39845 2023-03-22 Martin Liska <mliska@suse.cz>
39847 * configure: Regenerate.
39849 2023-03-21 Joseph Myers <joseph@codesourcery.com>
39851 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
39854 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
39856 PR tree-optimization/109192
39857 * gimple-range-gori.cc (gori_compute::compute_operand_range):
39858 Terminate gori calculations if a relation is not relevant.
39859 * value-relation.h (value_relation::set_relation): Allow
39860 equality between op1 and op2 if they are the same.
39862 2023-03-21 Richard Biener <rguenther@suse.de>
39864 PR tree-optimization/109219
39865 * tree-vect-loop.cc (vectorizable_reduction): Check
39866 slp_node, not STMT_SLP_TYPE.
39867 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
39868 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
39869 Remove assertion on STMT_SLP_TYPE.
39871 2023-03-21 Jakub Jelinek <jakub@redhat.com>
39873 PR tree-optimization/109215
39874 * tree.h (enum special_array_member): Adjust comments for int_0
39876 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
39877 has zero sized element type and the array has variable number of
39878 elements or constant one or more elements.
39879 (component_ref_size): Adjust comments, formatting fix.
39881 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
39883 * configure.ac: Add check for the Texinfo 6.8
39884 CONTENTS_OUTPUT_LOCATION customization variable and set it if
39886 * configure: Regenerate.
39887 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
39888 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
39889 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
39890 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
39892 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
39894 * doc/extend.texi: Associate use_hazard_barrier_return index
39895 entry with its attribute.
39896 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
39899 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
39901 * doc/implement-c.texi: Remove usage of @gol.
39902 * doc/invoke.texi: Ditto.
39903 * doc/sourcebuild.texi: Ditto.
39904 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
39905 texinfo.tex versions, the bug it was working around appears to
39908 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
39910 * doc/include/texinfo.tex: Update to 2023-01-17.19.
39912 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
39914 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
39915 @enddefbuiltin for defining built-in functions.
39916 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
39917 places where it should be used.
39919 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
39921 * doc/extend.texi (Formatted Output Function Checking): New
39922 subsection for grouping together printf et al.
39923 (Exception handling) Fix missing @ sign before copyright
39924 header, which lead to the copyright line leaking into
39925 '(gcc)Exception handling'.
39926 * doc/gcc.texi: Set document language to en_US.
39927 (@copying): Wrap front cover texts in quotations, move in manual
39930 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
39932 * doc/gcc.texi: Add the Indices appendix, to make texinfo
39933 generate nice indices overview page.
39935 2023-03-21 Richard Biener <rguenther@suse.de>
39937 PR tree-optimization/109170
39938 * gimple-range-op.cc (cfn_pass_through_arg1): New.
39939 (gimple_range_op_handler::maybe_builtin_call): Handle
39940 __builtin_expect via cfn_pass_through_arg1.
39942 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
39945 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
39946 (init_float128_ieee): Delete code to switch complex multiply and divide
39948 (complex_multiply_builtin_code): New helper function.
39949 (complex_divide_builtin_code): Likewise.
39950 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
39951 of complex 128-bit multiply and divide built-in functions.
39953 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
39956 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
39958 2023-03-19 Jonny Grant <jg@jguk.org>
39960 * doc/extend.texi (Common Function Attributes) <nonnull>:
39963 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
39965 PR rtl-optimization/109179
39966 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
39967 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
39969 2023-03-17 Jakub Jelinek <jakub@redhat.com>
39972 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
39974 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
39975 to allocate_struct_function instead of false.
39976 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
39977 nor DECL_RESULT here. Pass true as ABSTRACT_P to
39978 push_struct_function. Call targetm.target_option.relayout_function
39980 (tree_function_versioning): Formatting fix.
39982 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
39984 * lra-constraints.cc: Include hooks.h.
39985 (combine_reload_insn): New function.
39986 (lra_constraints): Call it.
39988 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39989 kito-cheng <kito.cheng@sifive.com>
39991 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
39992 as legitimate value.
39993 * config/riscv/riscv-vector-builtins.cc
39994 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
39995 (function_expander::use_widen_ternop_insn): Ditto.
39996 * config/riscv/vector.md (@vundefined<mode>): New pattern.
39997 (pred_mul_<optab><mode>_undef_merge): Remove.
39998 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
39999 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
40000 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
40001 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
40003 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40006 * config/riscv/riscv.md: Fix subreg bug.
40008 2023-03-17 Jakub Jelinek <jakub@redhat.com>
40010 PR middle-end/108685
40011 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
40012 use its loop_father rather than BODY_BB's loop_father.
40013 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
40014 If broken_loop with ordered > collapse and at least one of those
40015 extra loops aren't guaranteed to have at least one iteration, change
40016 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
40017 loop_father to l0_bb's loop_father rather than l1_bb's.
40019 2023-03-17 Jakub Jelinek <jakub@redhat.com>
40022 * gdbhooks.py (TreePrinter.to_string): Wrap
40023 gdb.parse_and_eval('tree_code_type') in a try block, parse
40024 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
40025 raises exception. Update comments for the recent tree_code_type
40028 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
40030 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
40031 issues. Add more line breaks to example so it doesn't overflow
40034 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
40036 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
40037 line breaks in examples.
40038 <malloc>: Fix bad line breaks in running text, also copy-edit
40040 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
40041 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
40043 (C++ Dialect Options) <-fcontracts>: Add line break in example.
40044 <-Wctad-maybe-unsupported>: Likewise.
40045 <-Winvalid-constexpr>: Likewise.
40046 (Warning Options) <-Wdangling-pointer>: Likewise.
40047 <-Winterference-size>: Likewise.
40048 <-Wvla-parameter>: Likewise.
40049 (Static Analyzer Options): Fix bad line breaks in running text,
40050 plus add some missing markup.
40051 (Optimize Options) <openacc-privatization>: Fix more bad line
40052 breaks in running text.
40054 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
40056 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
40057 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
40058 (expand_vec_perm_2perm_pblendv): Ditto.
40060 2023-03-16 Martin Liska <mliska@suse.cz>
40062 PR middle-end/106133
40063 * gcc.cc (driver_handle_option): Use x_main_input_basename
40064 if x_dump_base_name is null.
40065 * opts.cc (common_handle_option): Likewise.
40067 2023-03-16 Richard Biener <rguenther@suse.de>
40069 PR tree-optimization/109123
40070 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
40071 Do not emit -Wuse-after-free late.
40072 (pass_waccess::check_call): Always check call pointer uses.
40074 2023-03-16 Richard Biener <rguenther@suse.de>
40076 PR tree-optimization/109141
40077 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
40078 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
40080 (renumber_gimple_stmt_uids): ... here and
40081 (renumber_gimple_stmt_uids_in_blocks): ... here.
40082 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
40083 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
40085 (pass_waccess::check_pointer_uses): Process all PHIs.
40087 2023-03-15 David Malcolm <dmalcolm@redhat.com>
40090 * diagnostic-format-sarif.cc (class sarif_invocation): New.
40091 (class sarif_ice_notification): New.
40092 (sarif_builder::m_invocation_obj): New field.
40093 (sarif_invocation::add_notification_for_ice): New.
40094 (sarif_invocation::prepare_to_flush): New.
40095 (sarif_ice_notification::sarif_ice_notification): New.
40096 (sarif_builder::sarif_builder): Add m_invocation_obj.
40097 (sarif_builder::end_diagnostic): Special-case DK_ICE and
40099 (sarif_builder::flush_to_file): Call prepare_to_flush on
40100 m_invocation_obj. Pass the latter to make_top_level_object.
40101 (sarif_builder::make_result_object): Move creation of "locations"
40103 (sarif_builder::make_locations_arr): ...this new function.
40104 (sarif_builder::make_top_level_object): Add "invocation_obj" param
40105 and pass it to make_run_object.
40106 (sarif_builder::make_run_object): Add "invocation_obj" param and
40108 (sarif_ice_handler): New callback.
40109 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
40110 * diagnostic.cc (diagnostic_initialize): Initialize new field
40112 (diagnostic_action_after_output): If it is set, make one attempt
40113 to call ice_handler_cb.
40114 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
40116 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
40118 * config/i386/i386-expand.cc (expand_vec_perm_blend):
40119 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
40120 and fix V2HImode handling.
40121 (expand_vec_perm_1): Try to emit BLEND instruction
40122 before MOVSS/MOVSD.
40123 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
40125 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
40127 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
40129 2023-03-15 Richard Biener <rguenther@suse.de>
40131 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
40132 Do not diagnose clobbers.
40134 2023-03-15 Richard Biener <rguenther@suse.de>
40136 PR tree-optimization/109139
40137 * tree-ssa-live.cc (remove_unused_locals): Look at the
40138 base address for unused decls on the LHS of .DEFERRED_INIT.
40140 2023-03-15 Xi Ruoyao <xry111@xry111.site>
40143 * builtins.cc (inline_string_cmp): Force the character
40144 difference into "result" pseudo-register, instead of reassign
40145 the pseudo-register.
40147 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40149 * config.gcc: Add thead.o to RISC-V extra_objs.
40150 * config/riscv/peephole.md: Add mempair peephole passes.
40151 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
40153 (th_mempair_operands_p): Likewise.
40154 (th_mempair_order_operands): Likewise.
40155 (th_mempair_prepare_save_restore_operands): Likewise.
40156 (th_mempair_save_restore_regs): Likewise.
40157 (th_mempair_output_move): Likewise.
40158 * config/riscv/riscv.cc (riscv_save_reg): Move code.
40159 (riscv_restore_reg): Move code.
40160 (riscv_for_each_saved_reg): Add code to emit mempair insns.
40161 * config/riscv/t-riscv: Add thead.cc.
40162 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
40164 (*th_mempair_store_<GPR:mode>2): Likewise.
40165 (*th_mempair_load_extendsidi2): Likewise.
40166 (*th_mempair_load_zero_extendsidi2): Likewise.
40167 * config/riscv/thead.cc: New file.
40169 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40171 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
40172 New constraint "th_f_fmv".
40173 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
40175 * config/riscv/riscv.cc (riscv_split_doubleword_move):
40176 Add split code for XTheadFmv.
40177 (riscv_secondary_memory_needed): XTheadFmv does not need
40179 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
40180 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
40181 movdf_hardfloat_rv32.
40182 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
40183 (th_fmv_x_w): New INSN.
40184 (th_fmv_x_hw): New INSN.
40186 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40188 * config/riscv/riscv.md (maddhisi4): New expand.
40189 (msubhisi4): New expand.
40190 * config/riscv/thead.md (*th_mula<mode>): New pattern.
40191 (*th_mulawsi): New pattern.
40192 (*th_mulawsi2): New pattern.
40193 (*th_maddhisi4): New pattern.
40194 (*th_sextw_maddhisi4): New pattern.
40195 (*th_muls<mode>): New pattern.
40196 (*th_mulswsi): New pattern.
40197 (*th_mulswsi2): New pattern.
40198 (*th_msubhisi4): New pattern.
40199 (*th_sextw_msubhisi4): New pattern.
40201 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40203 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
40204 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
40206 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
40208 (riscv_expand_conditional_move): New function.
40209 (riscv_expand_conditional_move_onesided): New function.
40210 * config/riscv/riscv.md: Add support for XTheadCondMov.
40211 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
40212 support for XTheadCondMov.
40213 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
40215 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40217 * config/riscv/bitmanip.md (clzdi2): New expand.
40218 (clzsi2): New expand.
40219 (ctz<mode>2): New expand.
40220 (popcount<mode>2): New expand.
40221 (<bitmanip_optab>si2): Rename INSN.
40222 (*<bitmanip_optab>si2): Hide INSN name.
40223 (<bitmanip_optab>di2): Rename INSN.
40224 (*<bitmanip_optab>di2): Hide INSN name.
40225 (rotrsi3): Remove INSN.
40226 (rotr<mode>3): Add expand.
40227 (*rotrsi3): New INSN.
40228 (rotrdi3): Rename INSN.
40229 (*rotrdi3): Hide INSN name.
40230 (rotrsi3_sext): Rename INSN.
40231 (*rotrsi3_sext): Hide INSN name.
40232 (bswap<mode>2): Remove INSN.
40233 (bswapdi2): Add expand.
40234 (bswapsi2): Add expand.
40235 (*bswap<mode>2): Hide INSN name.
40236 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
40238 * config/riscv/riscv.md (extv<mode>): New expand.
40239 (extzv<mode>): New expand.
40240 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
40241 (*th_ext<mode>): New INSN.
40242 (*th_extu<mode>): New INSN.
40243 (*th_clz<mode>2): New INSN.
40244 (*th_rev<mode>2): New INSN.
40246 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40248 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
40249 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
40251 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40253 * config/riscv/riscv.md: Include thead.md
40254 * config/riscv/thead.md: New file.
40256 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40258 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
40260 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
40262 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
40263 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
40264 (MASK_XTHEADBB): New.
40265 (MASK_XTHEADBS): New.
40266 (MASK_XTHEADCMO): New.
40267 (MASK_XTHEADCONDMOV): New.
40268 (MASK_XTHEADFMEMIDX): New.
40269 (MASK_XTHEADFMV): New.
40270 (MASK_XTHEADINT): New.
40271 (MASK_XTHEADMAC): New.
40272 (MASK_XTHEADMEMIDX): New.
40273 (MASK_XTHEADMEMPAIR): New.
40274 (MASK_XTHEADSYNC): New.
40275 (TARGET_XTHEADBA): New.
40276 (TARGET_XTHEADBB): New.
40277 (TARGET_XTHEADBS): New.
40278 (TARGET_XTHEADCMO): New.
40279 (TARGET_XTHEADCONDMOV): New.
40280 (TARGET_XTHEADFMEMIDX): New.
40281 (TARGET_XTHEADFMV): New.
40282 (TARGET_XTHEADINT): New.
40283 (TARGET_XTHEADMAC): New.
40284 (TARGET_XTHEADMEMIDX): New.
40285 (TARGET_XTHEADMEMPAIR): new.
40286 (TARGET_XTHEADSYNC): New.
40287 * config/riscv/riscv.opt: Add riscv_xthead_subext.
40289 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
40292 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
40293 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
40294 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
40296 2023-03-14 Jakub Jelinek <jakub@redhat.com>
40299 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
40300 when lo is equal to dhi and hi is a MEM which uses dlo register.
40302 2023-03-14 Martin Jambor <mjambor@suse.cz>
40305 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
40306 global0 instead of zeroing when it does not have as many counts as
40309 2023-03-14 Martin Jambor <mjambor@suse.cz>
40312 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
40313 ipa count, remove assert, lenient_count_portion_handling, dump
40314 also orig_node_count.
40316 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
40318 * config/i386/i386-expand.cc (expand_vec_perm_movs):
40319 Handle V2SImode for TARGET_MMX_WITH_SSE.
40320 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
40321 using V2FI mode iterator to handle both V2SI and V2SF modes.
40323 2023-03-14 Sam James <sam@gentoo.org>
40325 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
40326 including <sstream> earlier.
40327 * system.h: Add INCLUDE_SSTREAM.
40329 2023-03-14 Richard Biener <rguenther@suse.de>
40331 * tree-ssa-live.cc (remove_unused_locals): Do not treat
40332 the .DEFERRED_INIT of a variable as use, instead remove
40333 that if it is the only use.
40335 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
40337 PR rtl-optimization/107762
40338 * expr.cc (emit_group_store): Revert latest change.
40340 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
40342 PR tree-optimization/109005
40343 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
40344 aggregate type check.
40346 2023-03-14 Jakub Jelinek <jakub@redhat.com>
40348 PR tree-optimization/109115
40349 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
40350 r.upper_bound () on r.undefined_p () range.
40352 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
40354 PR tree-optimization/106896
40355 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
40356 implementatoin with probability_in; avoid some asserts.
40358 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
40360 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
40362 2023-03-13 Sean Bright <sean@seanbright.com>
40364 * doc/invoke.texi (Warning Options): Remove errant 'See'
40367 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40369 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
40370 REG_OK_FOR_BASE_P): Remove.
40372 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40374 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
40375 (=vd,vd,vr,vr): Ditto.
40376 * config/riscv/vector.md: Ditto.
40378 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40380 * config/riscv/riscv-vector-builtins.cc
40381 (function_expander::use_compare_insn): Add operand predicate check.
40383 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40385 * config/riscv/vector.md: Fine tune RA constraints.
40387 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
40389 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
40390 hsaco assemble/link.
40392 2023-03-13 Richard Biener <rguenther@suse.de>
40394 PR tree-optimization/109046
40395 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
40396 piecewise complex loads.
40398 2023-03-12 Jakub Jelinek <jakub@redhat.com>
40400 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
40401 (aarch64_bf16_ptr_type_node): Adjust comment.
40402 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
40403 bfloat16_type_node rather than aarch64_bf16_type_node.
40404 (aarch64_libgcc_floating_mode_supported_p,
40405 aarch64_scalar_mode_supported_p): Also support BFmode.
40406 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
40407 (aarch64_invalid_binary_op): Remove BFmode related rejections.
40408 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
40409 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
40410 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
40411 aarch64_bf16_type_node.
40412 (aarch64_init_simd_builtin_types): Likewise.
40413 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
40414 which is created in tree.cc already.
40415 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
40417 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
40419 PR middle-end/109031
40420 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
40421 ensure that the type of x is as wide or wider than the type of a.
40423 2023-03-12 Tamar Christina <tamar.christina@arm.com>
40426 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
40427 (*bitmask_shift_plus<mode>): New.
40428 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
40429 (@aarch64_bitmask_udiv<mode>3): Remove.
40430 * config/aarch64/aarch64.cc
40431 (aarch64_vectorize_can_special_div_by_constant,
40432 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
40433 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
40434 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
40436 2023-03-12 Tamar Christina <tamar.christina@arm.com>
40439 * target.def (preferred_div_as_shifts_over_mult): New.
40440 * doc/tm.texi.in: Document it.
40441 * doc/tm.texi: Regenerate.
40442 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
40443 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
40444 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
40446 2023-03-12 Tamar Christina <tamar.christina@arm.com>
40447 Richard Sandiford <richard.sandiford@arm.com>
40450 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
40453 2023-03-12 Tamar Christina <tamar.christina@arm.com>
40454 Andrew MacLeod <amacleod@redhat.com>
40457 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
40458 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
40460 (gimple_range_op_handler::maybe_non_standard): New.
40461 * range-op.cc (class operator_widen_plus_signed,
40462 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
40463 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
40464 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
40465 operator_widen_mult_unsigned::wi_fold,
40466 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
40467 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
40468 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
40469 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
40471 2023-03-12 Tamar Christina <tamar.christina@arm.com>
40474 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
40475 * doc/tm.texi.in: Likewise.
40476 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
40477 * expmed.cc (expand_divmod): Likewise.
40478 * expmed.h (expand_divmod): Likewise.
40479 * expr.cc (force_operand, expand_expr_divmod): Likewise.
40480 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
40481 * target.def (can_special_div_by_const): Remove.
40482 * target.h: Remove tree-core.h include
40483 * targhooks.cc (default_can_special_div_by_const): Remove.
40484 * targhooks.h (default_can_special_div_by_const): Remove.
40485 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
40486 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
40487 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
40489 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
40491 * doc/install.texi2html: Fix issue number typo in comment.
40493 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
40495 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
40498 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
40500 * doc/invoke.texi (Optimize Options): Add markup to
40501 description of asan-kernel-mem-intrinsic-prefix, and clarify
40504 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
40506 * doc/extend.texi (Named Address Spaces): Drop a redundant link
40509 2023-03-11 Jeff Law <jlaw@ventanamicro>
40512 * doc/extend.texi: Clarify Attribute Syntax a bit.
40514 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
40516 * doc/install.texi (Prerequisites): Suggest using newer versions
40518 (Final install): Clean up and modernize discussion of how to
40519 build or obtain the GCC manuals.
40520 * doc/install.texi2html: Update comment to point to the PR instead
40521 of "makeinfo 4.7 brokenness" (it's not specific to that version).
40523 2023-03-10 Jakub Jelinek <jakub@redhat.com>
40526 * optabs.cc (expand_fix): For conversions from BFmode to integral,
40527 use shifts to convert it to SFmode first and then convert SFmode
40530 2023-03-10 Andrew Pinski <apinski@marvell.com>
40532 * config/aarch64/aarch64.md: Add a new define_split
40535 2023-03-10 Richard Biener <rguenther@suse.de>
40537 * tree-ssa-structalias.cc (solve_graph): Immediately
40538 iterate self-cycles.
40540 2023-03-10 Jakub Jelinek <jakub@redhat.com>
40542 PR tree-optimization/109008
40543 * range-op-float.cc (float_widen_lhs_range): If not
40544 -frounding-math and not IBM double double format, extend lhs
40545 range just by 0.5ulp rather than 1ulp in each direction.
40547 2023-03-10 Jakub Jelinek <jakub@redhat.com>
40550 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
40552 * config/i386/t-cygwin-w64: Remove.
40554 2023-03-10 Jakub Jelinek <jakub@redhat.com>
40557 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
40558 C++14, don't declare as extern const arrays.
40559 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
40560 static constexpr member arrays for C++11 or C++14.
40561 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
40562 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
40563 (TREE_CODE_LENGTH): For C++11 or C++14 use
40564 tree_code_length_tmpl <0>::tree_code_length instead of
40566 * tree.cc (tree_code_type, tree_code_length): Remove.
40568 2023-03-10 Jakub Jelinek <jakub@redhat.com>
40571 * common.opt (fcanon-prefix-map): New option.
40572 * opts.cc: Include file-prefix-map.h.
40573 (flag_canon_prefix_map): New variable.
40574 (common_handle_option): Handle OPT_fcanon_prefix_map.
40575 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
40576 * file-prefix-map.h (flag_canon_prefix_map): Declare.
40577 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
40579 (add_prefix_map): Initialize canonicalize member from
40580 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
40581 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
40582 use lrealpath result only for map->canonicalize map entries.
40583 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
40584 * opts-global.cc (handle_common_deferred_options): Clear
40585 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
40586 * doc/invoke.texi (-fcanon-prefix-map): Document.
40587 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
40588 see also for -fcanon-prefix-map.
40589 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
40591 2023-03-10 Jakub Jelinek <jakub@redhat.com>
40594 * cgraphunit.cc (check_global_declaration): Don't warn for unused
40595 variables which have OPT_Wunused_variable warning suppressed.
40597 2023-03-10 Jakub Jelinek <jakub@redhat.com>
40599 PR tree-optimization/109008
40600 * range-op-float.cc (float_widen_lhs_range): If lb is
40601 minimum representable finite number or ub is maximum
40602 representable finite number, instead of widening it to
40603 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
40604 Temporarily clear flag_finite_math_only when canonicalizing
40607 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40609 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
40610 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
40611 (gimple_fold_builtin): Ditto.
40612 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
40613 (class vleff): Ditto.
40615 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
40616 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
40618 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
40619 (struct fault_load_def): Ditto.
40621 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
40622 * config/riscv/riscv-vector-builtins.cc
40623 (rvv_arg_type_info::get_tree_type): Add size_ptr.
40624 (gimple_folder::gimple_folder): New class.
40625 (gimple_folder::fold): Ditto.
40626 (gimple_fold_builtin): New function.
40627 (get_read_vl_instance): Ditto.
40628 (get_read_vl_decl): Ditto.
40629 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
40630 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
40631 (get_read_vl_instance): New function.
40632 (get_read_vl_decl): Ditto.
40633 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
40634 (read_vl_insn_p): Ditto.
40635 (available_occurrence_p): Ditto.
40636 (backward_propagate_worthwhile_p): Ditto.
40637 (gen_vsetvl_pat): Adapt for vleff support.
40638 (get_forward_read_vl_insn): New function.
40639 (get_backward_fault_first_load_insn): Ditto.
40640 (source_equal_p): Adapt for vleff support.
40641 (first_ratio_invalid_for_second_sew_p): Remove.
40642 (first_ratio_invalid_for_second_lmul_p): Ditto.
40643 (first_lmul_less_than_second_lmul_p): Ditto.
40644 (first_ratio_less_than_second_ratio_p): Ditto.
40645 (support_relaxed_compatible_p): New function.
40646 (vector_insn_info::operator>): Remove.
40647 (vector_insn_info::operator>=): Refine.
40648 (vector_insn_info::parse_insn): Adapt for vleff support.
40649 (vector_insn_info::compatible_p): Ditto.
40650 (vector_insn_info::update_fault_first_load_avl): New function.
40651 (pass_vsetvl::transfer_after): Adapt for vleff support.
40652 (pass_vsetvl::demand_fusion): Ditto.
40653 (pass_vsetvl::cleanup_insns): Ditto.
40654 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
40655 redundant condtions.
40656 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
40657 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
40658 * config/riscv/riscv.md: Adapt for vleff support.
40659 * config/riscv/t-riscv: Ditto.
40660 * config/riscv/vector-iterators.md: New iterator.
40661 * config/riscv/vector.md (read_vlsi): New pattern.
40662 (read_vldi_zero_extend): Ditto.
40663 (@pred_fault_load<mode>): Ditto.
40665 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40667 * config/riscv/riscv-vector-builtins.cc
40668 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
40669 (function_expander::use_widen_ternop_insn): Ditto.
40670 * optabs.cc (maybe_gen_insn): Extend nops handling.
40672 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40674 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
40675 patterns according to RVV ISA.
40676 * config/riscv/vector-iterators.md: New iterators.
40677 * config/riscv/vector.md
40678 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
40679 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
40680 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
40681 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
40682 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
40683 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
40684 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
40685 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
40686 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
40687 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
40688 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
40689 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
40690 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
40691 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
40693 2023-03-10 Michael Collison <collison@rivosinc.com>
40695 * tree-vect-loop-manip.cc (vect_do_peeling): Use
40696 result of constant_lower_bound instead of vf for the lower
40697 bound of the epilog loop trip count.
40699 2023-03-09 Tamar Christina <tamar.christina@arm.com>
40701 * passes.cc (emergency_dump_function): Finish graph generation.
40703 2023-03-09 Tamar Christina <tamar.christina@arm.com>
40705 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
40706 and bottom bit only.
40708 2023-03-09 Andrew Pinski <apinski@marvell.com>
40710 PR tree-optimization/108980
40711 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
40712 Reorgnize the call to warning for not strict flexible arrays
40713 to be before the check of warned.
40715 2023-03-09 Jason Merrill <jason@redhat.com>
40717 * doc/extend.texi: Comment out __is_deducible docs.
40719 2023-03-09 Jason Merrill <jason@redhat.com>
40722 * doc/extend.texi (Type Traits):: Document __is_deducible.
40724 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
40727 * config.host: add object for x86_64-*-mingw*.
40728 * config/i386/sym-mingw32.cc: dummy file to attach
40730 * config/i386/utf8-mingw32.rc: windres resource file.
40731 * config/i386/winnt-utf8.manifest: XML manifest to
40733 * config/i386/x-mingw32: reference to x-mingw32-utf8.
40734 * config/i386/x-mingw32-utf8: Makefile fragment to
40735 embed UTF-8 manifest.
40737 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
40739 * lra-constraints.cc (process_alt_operands): Use operand modes for
40740 clobbered regs instead of the biggest access mode.
40742 2023-03-09 Richard Biener <rguenther@suse.de>
40744 PR middle-end/108995
40745 * fold-const.cc (extract_muldiv_1): Avoid folding
40746 (CST * b) / CST2 when sanitizing overflow and we rely on
40747 overflow being undefined.
40749 2023-03-09 Jakub Jelinek <jakub@redhat.com>
40750 Richard Biener <rguenther@suse.de>
40752 PR tree-optimization/109008
40753 * range-op-float.cc (float_widen_lhs_range): New function.
40754 (foperator_plus::op1_range, foperator_minus::op1_range,
40755 foperator_minus::op2_range, foperator_mult::op1_range,
40756 foperator_div::op1_range, foperator_div::op2_range): Use it.
40758 2023-03-07 Jonathan Grant <jg@jguk.org>
40761 * doc/invoke.texi (Instrumentation Options): Clarify
40762 LeakSanitizer behavior.
40764 2023-03-07 Benson Muite <benson_muite@emailplus.org>
40766 * doc/install.texi (Prerequisites): Add link to gmplib.org.
40768 2023-03-07 Pan Li <pan2.li@intel.com>
40769 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40773 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
40775 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
40776 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
40777 * genmodes.cc (adj_precision): New.
40778 (ADJUST_PRECISION): New.
40779 (emit_mode_adjustments): Handle ADJUST_PRECISION.
40781 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
40783 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
40785 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
40787 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
40788 {s|u}{max|min} in QI, HI and DI modes.
40789 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
40790 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
40791 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
40792 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
40795 2023-03-06 Richard Biener <rguenther@suse.de>
40797 PR tree-optimization/109025
40798 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
40799 the inner LC PHI use is the inner loop PHI latch definition
40800 before classifying an outer PHI as double reduction.
40802 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
40805 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
40807 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
40808 (X86_TUNE_USE_SCATTER): Likewise.
40810 2023-03-06 Xi Ruoyao <xry111@xry111.site>
40813 * config/loongarch/loongarch.h (FP_RETURN): Use
40814 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
40815 (UNITS_PER_FP_ARG): Likewise.
40817 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40819 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
40820 (pass_vsetvl::backward_demand_fusion): Ditto.
40822 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
40823 SiYu Wu <siyu@isrc.iscas.ac.cn>
40825 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
40827 (riscv_sm3p1_<mode>): New.
40828 (riscv_sm4ed_<mode>): New.
40829 (riscv_sm4ks_<mode>): New.
40830 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
40831 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
40832 ZKSH's built-in functions.
40834 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
40835 SiYu Wu <siyu@isrc.iscas.ac.cn>
40837 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
40838 (riscv_sha256sig1_<mode>): New.
40839 (riscv_sha256sum0_<mode>): New.
40840 (riscv_sha256sum1_<mode>): New.
40841 (riscv_sha512sig0h): New.
40842 (riscv_sha512sig0l): New.
40843 (riscv_sha512sig1h): New.
40844 (riscv_sha512sig1l): New.
40845 (riscv_sha512sum0r): New.
40846 (riscv_sha512sum1r): New.
40847 (riscv_sha512sig0): New.
40848 (riscv_sha512sig1): New.
40849 (riscv_sha512sum0): New.
40850 (riscv_sha512sum1): New.
40851 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
40852 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
40853 built-in functions.
40854 (DIRECT_BUILTIN): Add new.
40856 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
40857 SiYu Wu <siyu@isrc.iscas.ac.cn>
40859 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
40861 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
40862 (riscv_aes32dsmi): New.
40863 (riscv_aes64ds): New.
40864 (riscv_aes64dsm): New.
40865 (riscv_aes64im): New.
40866 (riscv_aes64ks1i): New.
40867 (riscv_aes64ks2): New.
40868 (riscv_aes32esi): New.
40869 (riscv_aes32esmi): New.
40870 (riscv_aes64es): New.
40871 (riscv_aes64esm): New.
40872 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
40873 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
40874 ZKNE's built-in functions.
40876 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
40877 SiYu Wu <siyu@isrc.iscas.ac.cn>
40879 * config/riscv/bitmanip.md: Add ZBKB's instructions.
40880 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
40881 * config/riscv/riscv.md: Add new type for crypto instructions.
40882 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
40884 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
40885 extension's built-in function file.
40887 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
40888 SiYu Wu <siyu@isrc.iscas.ac.cn>
40890 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
40891 (RISCV_FTYPE_NAME3): New.
40892 (RISCV_ATYPE_QI): New.
40893 (RISCV_ATYPE_HI): New.
40894 (RISCV_FTYPE_ATYPES2): New.
40895 (RISCV_FTYPE_ATYPES3): New.
40896 * config/riscv/riscv-ftypes.def (2): New.
40899 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
40901 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
40904 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40905 kito-cheng <kito.cheng@sifive.com>
40907 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
40908 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
40909 (riscv_register_pragmas): Add builtin function check call.
40910 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
40911 (check_builtin_call): New function.
40912 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
40913 (class vreinterpret): Ditto.
40914 (class vlmul_ext): Ditto.
40915 (class vlmul_trunc): Ditto.
40916 (class vset): Ditto.
40917 (class vget): Ditto.
40919 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
40920 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
40936 (vundefined): Add new intrinsic.
40937 (vreinterpret): Ditto.
40938 (vlmul_ext): Ditto.
40939 (vlmul_trunc): Ditto.
40942 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
40943 (struct narrow_alu_def): Ditto.
40944 (struct reduc_alu_def): Ditto.
40945 (struct vundefined_def): Ditto.
40946 (struct misc_def): Ditto.
40947 (struct vset_def): Ditto.
40948 (struct vget_def): Ditto.
40950 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
40951 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
40952 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
40953 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
40954 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
40955 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
40956 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
40957 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
40958 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
40959 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
40960 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
40961 (DEF_RVV_LMUL1_OPS): Ditto.
40962 (DEF_RVV_LMUL2_OPS): Ditto.
40963 (DEF_RVV_LMUL4_OPS): Ditto.
40964 (vint16mf4_t): Ditto.
40965 (vint16mf2_t): Ditto.
40966 (vint16m1_t): Ditto.
40967 (vint16m2_t): Ditto.
40968 (vint16m4_t): Ditto.
40969 (vint16m8_t): Ditto.
40970 (vint32mf2_t): Ditto.
40971 (vint32m1_t): Ditto.
40972 (vint32m2_t): Ditto.
40973 (vint32m4_t): Ditto.
40974 (vint32m8_t): Ditto.
40975 (vint64m1_t): Ditto.
40976 (vint64m2_t): Ditto.
40977 (vint64m4_t): Ditto.
40978 (vint64m8_t): Ditto.
40979 (vuint16mf4_t): Ditto.
40980 (vuint16mf2_t): Ditto.
40981 (vuint16m1_t): Ditto.
40982 (vuint16m2_t): Ditto.
40983 (vuint16m4_t): Ditto.
40984 (vuint16m8_t): Ditto.
40985 (vuint32mf2_t): Ditto.
40986 (vuint32m1_t): Ditto.
40987 (vuint32m2_t): Ditto.
40988 (vuint32m4_t): Ditto.
40989 (vuint32m8_t): Ditto.
40990 (vuint64m1_t): Ditto.
40991 (vuint64m2_t): Ditto.
40992 (vuint64m4_t): Ditto.
40993 (vuint64m8_t): Ditto.
40994 (vint8mf4_t): Ditto.
40995 (vint8mf2_t): Ditto.
40996 (vint8m1_t): Ditto.
40997 (vint8m2_t): Ditto.
40998 (vint8m4_t): Ditto.
40999 (vint8m8_t): Ditto.
41000 (vuint8mf4_t): Ditto.
41001 (vuint8mf2_t): Ditto.
41002 (vuint8m1_t): Ditto.
41003 (vuint8m2_t): Ditto.
41004 (vuint8m4_t): Ditto.
41005 (vuint8m8_t): Ditto.
41006 (vint8mf8_t): Ditto.
41007 (vuint8mf8_t): Ditto.
41008 (vfloat32mf2_t): Ditto.
41009 (vfloat32m1_t): Ditto.
41010 (vfloat32m2_t): Ditto.
41011 (vfloat32m4_t): Ditto.
41012 (vfloat64m1_t): Ditto.
41013 (vfloat64m2_t): Ditto.
41014 (vfloat64m4_t): Ditto.
41015 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
41016 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
41017 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
41018 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
41019 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
41020 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
41021 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
41022 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
41023 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
41024 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
41025 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
41026 (DEF_RVV_LMUL1_OPS): Ditto.
41027 (DEF_RVV_LMUL2_OPS): Ditto.
41028 (DEF_RVV_LMUL4_OPS): Ditto.
41029 (DEF_RVV_TYPE_INDEX): Ditto.
41030 (required_extensions_p): Adapt for new intrinsic support/
41031 (get_required_extensions): New function.
41032 (check_required_extensions): Ditto.
41033 (unsigned_base_type_p): Remove.
41034 (rvv_arg_type_info::get_scalar_ptr_type): New function.
41035 (get_mode_for_bitsize): Remove.
41036 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
41037 (rvv_arg_type_info::get_base_vector_type): Ditto.
41038 (rvv_arg_type_info::get_function_type_index): Ditto.
41039 (DEF_RVV_BASE_TYPE): New def.
41040 (function_builder::apply_predication): New class.
41041 (function_expander::mask_mode): Ditto.
41042 (function_checker::function_checker): Ditto.
41043 (function_checker::report_non_ice): Ditto.
41044 (function_checker::report_out_of_range): Ditto.
41045 (function_checker::require_immediate): Ditto.
41046 (function_checker::require_immediate_range): Ditto.
41047 (function_checker::check): Ditto.
41048 (check_builtin_call): Ditto.
41049 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
41050 (DEF_RVV_BASE_TYPE): Ditto.
41051 (DEF_RVV_TYPE_INDEX): Ditto.
41052 (vbool64_t): Ditto.
41053 (vbool32_t): Ditto.
41054 (vbool16_t): Ditto.
41059 (vuint8mf8_t): Ditto.
41060 (vuint8mf4_t): Ditto.
41061 (vuint8mf2_t): Ditto.
41062 (vuint8m1_t): Ditto.
41063 (vuint8m2_t): Ditto.
41064 (vint8m4_t): Ditto.
41065 (vuint8m4_t): Ditto.
41066 (vint8m8_t): Ditto.
41067 (vuint8m8_t): Ditto.
41068 (vint16mf4_t): Ditto.
41069 (vuint16mf2_t): Ditto.
41070 (vuint16m1_t): Ditto.
41071 (vuint16m2_t): Ditto.
41072 (vuint16m4_t): Ditto.
41073 (vuint16m8_t): Ditto.
41074 (vint32mf2_t): Ditto.
41075 (vuint32m1_t): Ditto.
41076 (vuint32m2_t): Ditto.
41077 (vuint32m4_t): Ditto.
41078 (vuint32m8_t): Ditto.
41079 (vuint64m1_t): Ditto.
41080 (vuint64m2_t): Ditto.
41081 (vuint64m4_t): Ditto.
41082 (vuint64m8_t): Ditto.
41083 (vfloat32mf2_t): Ditto.
41084 (vfloat32m1_t): Ditto.
41085 (vfloat32m2_t): Ditto.
41086 (vfloat32m4_t): Ditto.
41087 (vfloat32m8_t): Ditto.
41088 (vfloat64m1_t): Ditto.
41089 (vfloat64m4_t): Ditto.
41090 (vector): Move it def.
41093 (signed_vector): Ditto.
41094 (unsigned_vector): Ditto.
41095 (unsigned_scalar): Ditto.
41096 (vector_ptr): Ditto.
41097 (scalar_ptr): Ditto.
41098 (scalar_const_ptr): Ditto.
41102 (unsigned_long): Ditto.
41104 (eew8_index): Ditto.
41105 (eew16_index): Ditto.
41106 (eew32_index): Ditto.
41107 (eew64_index): Ditto.
41108 (shift_vector): Ditto.
41109 (double_trunc_vector): Ditto.
41110 (quad_trunc_vector): Ditto.
41111 (oct_trunc_vector): Ditto.
41112 (double_trunc_scalar): Ditto.
41113 (double_trunc_signed_vector): Ditto.
41114 (double_trunc_unsigned_vector): Ditto.
41115 (double_trunc_unsigned_scalar): Ditto.
41116 (double_trunc_float_vector): Ditto.
41117 (float_vector): Ditto.
41118 (lmul1_vector): Ditto.
41119 (widen_lmul1_vector): Ditto.
41120 (eew8_interpret): Ditto.
41121 (eew16_interpret): Ditto.
41122 (eew32_interpret): Ditto.
41123 (eew64_interpret): Ditto.
41124 (vlmul_ext_x2): Ditto.
41125 (vlmul_ext_x4): Ditto.
41126 (vlmul_ext_x8): Ditto.
41127 (vlmul_ext_x16): Ditto.
41128 (vlmul_ext_x32): Ditto.
41129 (vlmul_ext_x64): Ditto.
41130 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
41131 (struct function_type_info): New function.
41132 (struct rvv_arg_type_info): Ditto.
41133 (class function_checker): New class.
41134 (rvv_arg_type_info::get_scalar_type): New function.
41135 (rvv_arg_type_info::get_vector_type): Ditto.
41136 (function_expander::ret_mode): New function.
41137 (function_checker::arg_mode): Ditto.
41138 (function_checker::ret_mode): Ditto.
41139 * config/riscv/t-riscv: Add generator.
41140 * config/riscv/vector-iterators.md: New iterators.
41141 * config/riscv/vector.md (vundefined<mode>): New pattern.
41142 (@vundefined<mode>): Ditto.
41143 (@vreinterpret<mode>): Ditto.
41144 (@vlmul_extx2<mode>): Ditto.
41145 (@vlmul_extx4<mode>): Ditto.
41146 (@vlmul_extx8<mode>): Ditto.
41147 (@vlmul_extx16<mode>): Ditto.
41148 (@vlmul_extx32<mode>): Ditto.
41149 (@vlmul_extx64<mode>): Ditto.
41150 (*vlmul_extx2<mode>): Ditto.
41151 (*vlmul_extx4<mode>): Ditto.
41152 (*vlmul_extx8<mode>): Ditto.
41153 (*vlmul_extx16<mode>): Ditto.
41154 (*vlmul_extx32<mode>): Ditto.
41155 (*vlmul_extx64<mode>): Ditto.
41156 * config/riscv/genrvv-type-indexer.cc: New file.
41158 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41160 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
41161 (slide1_sew64_helper): New function.
41162 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
41163 (get_unknown_min_value): Ditto.
41164 (force_vector_length_operand): Ditto.
41165 (gen_no_side_effects_vsetvl_rtx): Ditto.
41166 (get_vl_x2_rtx): Ditto.
41167 (slide1_sew64_helper): Ditto.
41168 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
41169 (class vrgather): Ditto.
41170 (class vrgatherei16): Ditto.
41171 (class vcompress): Ditto.
41173 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41174 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
41175 (vslidedown): Ditto.
41176 (vslide1up): Ditto.
41177 (vslide1down): Ditto.
41178 (vfslide1up): Ditto.
41179 (vfslide1down): Ditto.
41181 (vrgatherei16): Ditto.
41182 (vcompress): Ditto.
41183 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
41184 (vint8mf8_t): Ditto.
41185 (vint8mf4_t): Ditto.
41186 (vint8mf2_t): Ditto.
41187 (vint8m1_t): Ditto.
41188 (vint8m2_t): Ditto.
41189 (vint8m4_t): Ditto.
41190 (vint16mf4_t): Ditto.
41191 (vint16mf2_t): Ditto.
41192 (vint16m1_t): Ditto.
41193 (vint16m2_t): Ditto.
41194 (vint16m4_t): Ditto.
41195 (vint16m8_t): Ditto.
41196 (vint32mf2_t): Ditto.
41197 (vint32m1_t): Ditto.
41198 (vint32m2_t): Ditto.
41199 (vint32m4_t): Ditto.
41200 (vint32m8_t): Ditto.
41201 (vint64m1_t): Ditto.
41202 (vint64m2_t): Ditto.
41203 (vint64m4_t): Ditto.
41204 (vint64m8_t): Ditto.
41205 (vuint8mf8_t): Ditto.
41206 (vuint8mf4_t): Ditto.
41207 (vuint8mf2_t): Ditto.
41208 (vuint8m1_t): Ditto.
41209 (vuint8m2_t): Ditto.
41210 (vuint8m4_t): Ditto.
41211 (vuint16mf4_t): Ditto.
41212 (vuint16mf2_t): Ditto.
41213 (vuint16m1_t): Ditto.
41214 (vuint16m2_t): Ditto.
41215 (vuint16m4_t): Ditto.
41216 (vuint16m8_t): Ditto.
41217 (vuint32mf2_t): Ditto.
41218 (vuint32m1_t): Ditto.
41219 (vuint32m2_t): Ditto.
41220 (vuint32m4_t): Ditto.
41221 (vuint32m8_t): Ditto.
41222 (vuint64m1_t): Ditto.
41223 (vuint64m2_t): Ditto.
41224 (vuint64m4_t): Ditto.
41225 (vuint64m8_t): Ditto.
41226 (vfloat32mf2_t): Ditto.
41227 (vfloat32m1_t): Ditto.
41228 (vfloat32m2_t): Ditto.
41229 (vfloat32m4_t): Ditto.
41230 (vfloat32m8_t): Ditto.
41231 (vfloat64m1_t): Ditto.
41232 (vfloat64m2_t): Ditto.
41233 (vfloat64m4_t): Ditto.
41234 (vfloat64m8_t): Ditto.
41235 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
41236 * config/riscv/riscv.md: Adjust RVV instruction types.
41237 * config/riscv/vector-iterators.md (down): New iterator.
41238 (=vd,vr): New attribute.
41239 (UNSPEC_VSLIDE1UP): New unspec.
41240 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
41241 (*pred_slide<ud><mode>): Ditto.
41242 (*pred_slide<ud><mode>_extended): Ditto.
41243 (@pred_gather<mode>): Ditto.
41244 (@pred_gather<mode>_scalar): Ditto.
41245 (@pred_gatherei16<mode>): Ditto.
41246 (@pred_compress<mode>): Ditto.
41248 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41250 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
41252 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41254 * config/riscv/constraints.md (Wb1): New constraint.
41255 * config/riscv/predicates.md
41256 (vector_least_significant_set_mask_operand): New predicate.
41257 (vector_broadcast_mask_operand): Ditto.
41258 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
41259 (gen_scalar_move_mask): New function.
41260 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
41261 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
41262 (class vmv_s): Ditto.
41264 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41265 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
41269 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
41271 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41272 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
41273 (function_expander::use_exact_insn): New function.
41274 (function_expander::use_contiguous_load_insn): New function.
41275 (function_expander::use_contiguous_store_insn): New function.
41276 (function_expander::use_ternop_insn): New function.
41277 (function_expander::use_widen_ternop_insn): New function.
41278 (function_expander::use_scalar_move_insn): New function.
41279 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
41280 * config/riscv/riscv-vector-builtins.h
41281 (function_expander::add_scalar_move_mask_operand): New class.
41282 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
41283 (scalar_move_insn_p): Ditto.
41284 (has_vsetvl_killed_avl_p): Ditto.
41285 (anticipatable_occurrence_p): Ditto.
41286 (insert_vsetvl): Ditto.
41287 (get_vl_vtype_info): Ditto.
41288 (calculate_sew): Ditto.
41289 (calculate_vlmul): Ditto.
41290 (incompatible_avl_p): Ditto.
41291 (different_sew_p): Ditto.
41292 (different_lmul_p): Ditto.
41293 (different_ratio_p): Ditto.
41294 (different_tail_policy_p): Ditto.
41295 (different_mask_policy_p): Ditto.
41296 (possible_zero_avl_p): Ditto.
41297 (first_ratio_invalid_for_second_sew_p): Ditto.
41298 (first_ratio_invalid_for_second_lmul_p): Ditto.
41299 (second_ratio_invalid_for_first_sew_p): Ditto.
41300 (second_ratio_invalid_for_first_lmul_p): Ditto.
41301 (second_sew_less_than_first_sew_p): Ditto.
41302 (first_sew_less_than_second_sew_p): Ditto.
41303 (compare_lmul): Ditto.
41304 (second_lmul_less_than_first_lmul_p): Ditto.
41305 (first_lmul_less_than_second_lmul_p): Ditto.
41306 (first_ratio_less_than_second_ratio_p): Ditto.
41307 (second_ratio_less_than_first_ratio_p): Ditto.
41308 (DEF_INCOMPATIBLE_COND): Ditto.
41309 (greatest_sew): Ditto.
41310 (first_sew): Ditto.
41311 (second_sew): Ditto.
41312 (first_vlmul): Ditto.
41313 (second_vlmul): Ditto.
41314 (first_ratio): Ditto.
41315 (second_ratio): Ditto.
41316 (vlmul_for_first_sew_second_ratio): Ditto.
41317 (ratio_for_second_sew_first_vlmul): Ditto.
41318 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
41319 (always_unavailable): Ditto.
41320 (avl_unavailable_p): Ditto.
41321 (sew_unavailable_p): Ditto.
41322 (lmul_unavailable_p): Ditto.
41323 (ge_sew_unavailable_p): Ditto.
41324 (ge_sew_lmul_unavailable_p): Ditto.
41325 (ge_sew_ratio_unavailable_p): Ditto.
41326 (DEF_UNAVAILABLE_COND): Ditto.
41327 (same_sew_lmul_demand_p): Ditto.
41328 (propagate_avl_across_demands_p): Ditto.
41329 (reg_available_p): Ditto.
41330 (avl_info::has_non_zero_avl): Ditto.
41331 (vl_vtype_info::has_non_zero_avl): Ditto.
41332 (vector_insn_info::operator>=): Refactor.
41333 (vector_insn_info::parse_insn): Adjust for scalar move.
41334 (vector_insn_info::demand_vl_vtype): Remove.
41335 (vector_insn_info::compatible_p): New function.
41336 (vector_insn_info::compatible_avl_p): Ditto.
41337 (vector_insn_info::compatible_vtype_p): Ditto.
41338 (vector_insn_info::available_p): Ditto.
41339 (vector_insn_info::merge): Ditto.
41340 (vector_insn_info::fuse_avl): Ditto.
41341 (vector_insn_info::fuse_sew_lmul): Ditto.
41342 (vector_insn_info::fuse_tail_policy): Ditto.
41343 (vector_insn_info::fuse_mask_policy): Ditto.
41344 (vector_insn_info::dump): Ditto.
41345 (vector_infos_manager::release): Ditto.
41346 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
41347 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
41348 (pass_vsetvl::hard_empty_block_p): Ditto.
41349 (pass_vsetvl::backward_demand_fusion): Ditto.
41350 (pass_vsetvl::forward_demand_fusion): Ditto.
41351 (pass_vsetvl::refine_vsetvls): Ditto.
41352 (pass_vsetvl::cleanup_vsetvls): Ditto.
41353 (pass_vsetvl::commit_vsetvls): Ditto.
41354 (pass_vsetvl::propagate_avl): Ditto.
41355 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
41356 (struct demands_pair): Ditto.
41357 (struct demands_cond): Ditto.
41358 (struct demands_fuse_rule): Ditto.
41359 * config/riscv/vector-iterators.md: New iterator.
41360 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
41361 (*pred_broadcast<mode>): Ditto.
41362 (*pred_broadcast<mode>_extended_scalar): Ditto.
41363 (@pred_extract_first<mode>): Ditto.
41364 (*pred_extract_first<mode>): Ditto.
41365 (@pred_extract_first_trunc<mode>): Ditto.
41366 * config/riscv/riscv-vsetvl.def: New file.
41368 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
41370 * config/riscv/bitmanip.md: allow 0 constant in max/min
41373 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
41375 * config/riscv/bitmanip.md: Fix wrong index in the check.
41377 2023-03-04 Jakub Jelinek <jakub@redhat.com>
41379 PR middle-end/109006
41380 * vec.cc (test_auto_alias): Adjust comment for removal of
41382 * read-rtl-function.cc (function_reader::parse_block): Likewise.
41383 * gdbhooks.py: Likewise.
41385 2023-03-04 Jakub Jelinek <jakub@redhat.com>
41387 PR testsuite/108973
41388 * selftest-diagnostic.cc
41389 (test_diagnostic_context::test_diagnostic_context): Set
41390 caret_max_width to 80.
41392 2023-03-03 Alexandre Oliva <oliva@adacore.com>
41394 * gimple-ssa-warn-access.cc
41395 (pass_waccess::check_dangling_stores): Skip non-stores.
41397 2023-03-03 Alexandre Oliva <oliva@adacore.com>
41399 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
41400 after vmsr and vmrs, and lower the case of P0.
41402 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
41404 PR middle-end/109006
41405 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
41407 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
41409 PR middle-end/109006
41410 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
41412 2023-03-03 Jakub Jelinek <jakub@redhat.com>
41415 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
41416 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
41417 suppressed on stmt. For [static %E] warning, print access_nelts
41418 rather than access_size. Fix up comment wording.
41420 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
41422 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
41423 arch14 instead of z16.
41425 2023-03-03 Anthony Green <green@moxielogic.com>
41427 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
41429 2023-03-03 Anthony Green <green@moxielogic.com>
41431 * config/moxie/constraints.md (A, B, W): Change
41432 define_constraint to define_memory_constraint.
41434 2023-03-03 Xi Ruoyao <xry111@xry111.site>
41436 * toplev.cc (process_options): Fix the spelling of
41437 "-fstack-clash-protection".
41439 2023-03-03 Richard Biener <rguenther@suse.de>
41441 PR tree-optimization/109002
41442 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
41443 PHI-translate ANTIC_IN.
41445 2023-03-03 Jakub Jelinek <jakub@redhat.com>
41447 PR tree-optimization/108988
41448 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
41449 size_type_node before passing it as argument to fwrite. Formatting
41452 2023-03-03 Richard Biener <rguenther@suse.de>
41455 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
41456 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
41457 * config/i386/i386-features.h (scalar_chain::max_visits): New.
41458 (scalar_chain::build): Add bitmap parameter, return boolean.
41459 (scalar_chain::add_insn): Likewise.
41460 (scalar_chain::analyze_register_chain): Likewise.
41461 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
41462 Initialize max_visits.
41463 (scalar_chain::analyze_register_chain): When we exhaust
41464 max_visits, abort. Also abort when running into any
41466 (scalar_chain::add_insn): Propagate abort.
41467 (scalar_chain::build): Likewise. When aborting amend
41468 the set of disallowed insn with the insns set.
41469 (convert_scalars_to_vector): Adjust. Do not convert aborted
41472 2023-03-03 Richard Biener <rguenther@suse.de>
41475 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
41476 generate a DIE for a function scope static.
41478 2023-03-03 Alexandre Oliva <oliva@adacore.com>
41480 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
41482 2023-03-02 Jakub Jelinek <jakub@redhat.com>
41485 * target.h (emit_support_tinfos_callback): New typedef.
41486 * targhooks.h (default_emit_support_tinfos): Declare.
41487 * targhooks.cc (default_emit_support_tinfos): New function.
41488 * target.def (emit_support_tinfos): New target hook.
41489 * doc/tm.texi.in (emit_support_tinfos): Document it.
41490 * doc/tm.texi: Regenerated.
41491 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
41492 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
41494 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
41496 * ira-costs.cc: Include print-rtl.h.
41497 (record_reg_classes, scan_one_insn): Add code to print debug info.
41498 (record_operand_costs): Find and use smaller cost for hard reg
41501 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
41502 Paul-Antoine Arras <pa@codesourcery.com>
41504 * builtins.cc (mathfn_built_in_explicit): New.
41505 * config/gcn/gcn.cc: Include case-cfn-macros.h.
41506 (mathfn_built_in_explicit): Add prototype.
41507 (gcn_vectorize_builtin_vectorized_function): New.
41508 (gcn_libc_has_function): New.
41509 (TARGET_LIBC_HAS_FUNCTION): Define.
41510 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
41512 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
41514 PR tree-optimization/108979
41515 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
41516 operations on invariants.
41518 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
41520 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
41521 * config/s390/s390.cc (s390_option_override_internal): Make
41522 partial vector usage the default from z13 on.
41523 * config/s390/vector.md (len_load_v16qi): Add.
41524 (len_store_v16qi): Add.
41526 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
41528 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
41529 of constant 0 offset.
41531 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
41533 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
41535 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
41537 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
41539 * config.gcc: add -with-{no-}msa build option.
41540 * config/mips/mips.h: Likewise.
41541 * doc/install.texi: Likewise.
41543 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
41545 PR tree-optimization/108603
41546 * explow.cc (convert_memory_address_addr_space_1): Only wrap
41547 the result of a recursive call in a CONST if no instructions
41550 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
41552 PR tree-optimization/108430
41553 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
41554 of inverted condition.
41556 2023-03-02 Jakub Jelinek <jakub@redhat.com>
41559 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
41560 comparison copy the bytes from ptr to a temporary buffer and clearing
41561 padding bits in there.
41563 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
41565 PR middle-end/108545
41566 * gimplify.cc (struct tree_operand_hash_no_se): New.
41567 (omp_index_mapping_groups_1, omp_index_mapping_groups,
41568 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
41569 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
41570 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
41571 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
41572 of tree_operand_hash.
41574 2023-03-01 LIU Hao <lh_mouse@126.com>
41577 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
41578 Remove the size limit `pch_VA_max_size`
41580 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
41582 PR middle-end/108546
41583 * omp-low.cc (lower_omp_target): Remove optional handling
41584 on the receiver side, i.e. inside target (data), for
41587 2023-03-01 Jakub Jelinek <jakub@redhat.com>
41590 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
41591 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
41593 2023-03-01 Richard Biener <rguenther@suse.de>
41595 PR tree-optimization/108970
41596 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
41597 Check we can copy the BBs.
41598 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
41600 (vect_do_peeling): Streamline error handling.
41602 2023-03-01 Richard Biener <rguenther@suse.de>
41604 PR tree-optimization/108950
41605 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
41606 Check oprnd0 is defined in the loop.
41607 * tree-vect-loop.cc (vectorizable_reduction): Record all
41608 operands vector types, compute that of invariants and
41609 properly update their SLP nodes.
41611 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
41614 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
41615 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
41617 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
41619 PR middle-end/107411
41620 PR middle-end/107411
41621 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
41623 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
41624 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
41626 2023-02-28 Jakub Jelinek <jakub@redhat.com>
41628 PR sanitizer/108894
41629 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
41630 comparison rather than index > bound.
41631 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
41632 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
41633 * doc/invoke.texi (-fsanitize=bounds): Document that whether
41634 flexible array member-like arrays are instrumented or not depends
41635 on -fstrict-flex-arrays* options of strict_flex_array attributes.
41636 (-fsanitize=bounds-strict): Document that flexible array members
41637 are not instrumented.
41639 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
41643 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
41644 (fmod<mode>3): Ditto.
41645 (fpremxf4_i387): Ditto.
41646 (reminderxf3): Ditto.
41647 (reminder<mode>3): Ditto.
41648 (fprem1xf4_i387): Ditto.
41650 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
41652 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
41653 generating FFS with mismatched operand and result modes, by using
41654 an explicit SIGN_EXTEND/ZERO_EXTEND.
41655 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
41656 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
41658 2023-02-27 Patrick Palka <ppalka@redhat.com>
41660 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
41661 * lra-int.h (lra_change_class): Likewise.
41662 * recog.h (which_op_alt): Likewise.
41663 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
41666 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
41668 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
41670 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
41672 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
41673 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
41675 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
41677 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
41678 (xtensa_get_config_v3): New functions.
41680 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41682 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
41684 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
41686 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
41687 the macro to 0x1000000000.
41689 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
41692 * doc/gm2.texi (-fm2-pathname): New option documented.
41693 (-fm2-pathnameI): New option documented.
41694 (-fm2-prefix=): New option documented.
41695 (-fruntime-modules=): Update default module list.
41697 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
41700 * config/xtensa/xtensa-protos.h
41701 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
41702 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
41703 to xtensa_expand_call.
41704 (xtensa_expand_call): Emit the call and add a clobber expression
41705 for the static chain to it in case of windowed ABI.
41706 * config/xtensa/xtensa.md (call, call_value, sibcall)
41707 (sibcall_value): Call xtensa_expand_call and complete expansion
41708 right after that call.
41710 2023-02-24 Richard Biener <rguenther@suse.de>
41712 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
41713 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
41714 changing alignment of vec<T, A, vl_embed> and simplifying
41716 (vec<T, A, vl_embed>::address): Compute as this + 1.
41717 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
41718 vector instead of the offset of the m_vecdata member.
41719 (auto_vec<T, N>::m_data): Turn storage into
41720 uninitialized unsigned char.
41721 (auto_vec<T, N>::auto_vec): Allow allocation of one
41722 stack member. Initialize m_vec in a special way to
41723 avoid later stringop overflow diagnostics.
41724 * vec.cc (test_auto_alias): New.
41725 (vec_cc_tests): Call it.
41727 2023-02-24 Richard Biener <rguenther@suse.de>
41729 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
41730 take a const reference to the object, use address to
41732 (vec<T, A, vl_embed>::contains): Use address to access data.
41733 (vec<T, A, vl_embed>::operator[]): Use address instead of
41734 m_vecdata to access data.
41735 (vec<T, A, vl_embed>::iterate): Likewise.
41736 (vec<T, A, vl_embed>::copy): Likewise.
41737 (vec<T, A, vl_embed>::quick_push): Likewise.
41738 (vec<T, A, vl_embed>::pop): Likewise.
41739 (vec<T, A, vl_embed>::quick_insert): Likewise.
41740 (vec<T, A, vl_embed>::ordered_remove): Likewise.
41741 (vec<T, A, vl_embed>::unordered_remove): Likewise.
41742 (vec<T, A, vl_embed>::block_remove): Likewise.
41743 (vec<T, A, vl_heap>::address): Likewise.
41745 2023-02-24 Martin Liska <mliska@suse.cz>
41747 PR sanitizer/108834
41748 * asan.cc (asan_add_global): Use proper TU name for normal
41749 global variables (and aux_base_name for the artificial one).
41751 2023-02-24 Jakub Jelinek <jakub@redhat.com>
41753 * config/i386/i386-builtin.def: Update description of BDESC
41754 and BDESC_FIRST in file comment to include mask2.
41756 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41758 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
41760 2023-02-24 Jakub Jelinek <jakub@redhat.com>
41762 PR middle-end/108854
41763 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
41764 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
41765 nodes and adjust their DECL_CONTEXT.
41767 2023-02-24 Jakub Jelinek <jakub@redhat.com>
41770 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
41771 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
41772 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
41773 __builtin_ia32_cvtne2ps2bf16_v8bf,
41774 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
41775 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
41776 __builtin_ia32_cvtneps2bf16_v8sf_mask,
41777 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
41778 __builtin_ia32_cvtneps2bf16_v4sf_mask,
41779 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
41780 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
41781 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
41782 __builtin_ia32_dpbf16ps_v4sf_mask,
41783 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
41784 OPTION_MASK_ISA_AVX512VL.
41786 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
41788 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
41789 Add non-compact 32-bit multilibs.
41791 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
41793 * config/mips/mips.md (*clo<mode>2): New pattern.
41795 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
41797 * config/mips/mips.h (machine_function): New variable
41798 use_hazard_barrier_return_p.
41799 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
41800 (mips_hb_return_internal): New insn pattern.
41801 * config/mips/mips.cc (mips_attribute_table): Add attribute
41802 use_hazard_barrier_return.
41803 (mips_use_hazard_barrier_return_p): New static function.
41804 (mips_function_attr_inlinable_p): Likewise.
41805 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
41806 Emit error for unsupported architecture choice.
41807 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
41808 Return false for use_hazard_barrier_return.
41809 (mips_expand_epilogue): Emit hazard barrier return.
41810 * doc/extend.texi: Document use_hazard_barrier_return.
41812 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
41814 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
41815 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
41816 for the gcc-internal headers.
41818 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
41820 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
41821 and $(POSTCOMPILE) instead of manual dependency listing.
41822 * config/xtensa/xtensa-dynconfig.c: Rename to ...
41823 * config/xtensa/xtensa-dynconfig.cc: ... this.
41825 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
41827 * doc/cfg.texi: Reorder index entries around @items.
41828 * doc/cpp.texi: Ditto.
41829 * doc/cppenv.texi: Ditto.
41830 * doc/cppopts.texi: Ditto.
41831 * doc/generic.texi: Ditto.
41832 * doc/install.texi: Ditto.
41833 * doc/extend.texi: Ditto.
41834 * doc/invoke.texi: Ditto.
41835 * doc/md.texi: Ditto.
41836 * doc/rtl.texi: Ditto.
41837 * doc/tm.texi.in: Ditto.
41838 * doc/trouble.texi: Ditto.
41839 * doc/tm.texi: Regenerate.
41841 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
41843 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
41844 the occurrence of general-purpose register used only once and for
41845 transferring intermediate value.
41847 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
41849 * config/xtensa/xtensa.cc (machine_function): Add new member
41850 'eliminated_callee_saved_bmp'.
41851 (xtensa_can_eliminate_callee_saved_reg_p): New function to
41852 determine whether the register can be eliminated or not.
41853 (xtensa_expand_prologue): Add invoking the above function and
41854 elimination the use of callee-saved register by using its stack
41855 slot through the stack pointer (or the frame pointer if needed)
41857 (xtensa_expand_prologue): Modify to not emit register restoration
41858 insn from its stack slot if the register is already eliminated.
41860 2023-02-23 Jakub Jelinek <jakub@redhat.com>
41862 PR translation/108890
41863 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
41864 around fatal_error format strings.
41866 2023-02-23 Richard Biener <rguenther@suse.de>
41868 * tree-ssa-structalias.cc (handle_lhs_call): Do not
41869 re-create rhsc, only truncate it.
41871 2023-02-23 Jakub Jelinek <jakub@redhat.com>
41873 PR middle-end/106258
41874 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
41875 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
41877 2023-02-23 Richard Biener <rguenther@suse.de>
41879 * tree-if-conv.cc (tree_if_conversion): Properly manage
41880 memory of refs and the contained data references.
41882 2023-02-23 Richard Biener <rguenther@suse.de>
41884 PR tree-optimization/108888
41885 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
41886 calls to predicate.
41887 (predicate_statements): Only predicate calls with PLF_2.
41889 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
41891 * config/xtensa/xtensa.md
41892 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
41893 Add missing "SI:" to PLUS RTXes.
41895 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
41898 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
41899 Emit (use (reg:SI A0_REG)) at the end in the sibling call
41900 (i.e. the same place as (return) in the normal call).
41902 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
41905 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
41908 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
41910 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
41911 (sibcall_value, sibcall_value_internal): Add 'use' expression
41914 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
41916 * doc/cppdiropts.texi: Reorder @opindex commands to precede
41917 @items they relate to.
41918 * doc/cppopts.texi: Ditto.
41919 * doc/cppwarnopts.texi: Ditto.
41920 * doc/invoke.texi: Ditto.
41921 * doc/lto.texi: Ditto.
41923 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
41925 * internal-fn.cc (expand_MASK_CALL): New.
41926 * internal-fn.def (MASK_CALL): New.
41927 * internal-fn.h (expand_MASK_CALL): New prototype.
41928 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
41929 for mask arguments also.
41930 * tree-if-conv.cc: Include cgraph.h.
41931 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
41932 (predicate_statements): Convert functions to IFN_MASK_CALL.
41933 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
41934 IFN_MASK_CALL as a SIMD function call.
41935 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
41936 IFN_MASK_CALL as an inbranch SIMD function call.
41937 Generate the mask vector arguments.
41939 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41941 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
41942 (class widen_reducop): Ditto.
41943 (class freducop): Ditto.
41944 (class widen_freducop): Ditto.
41946 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41947 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
41956 (vwredsumu): Ditto.
41957 (vfredusum): Ditto.
41958 (vfredosum): Ditto.
41961 (vfwredosum): Ditto.
41962 (vfwredusum): Ditto.
41963 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
41965 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41966 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
41967 (DEF_RVV_WU_OPS): Ditto.
41968 (DEF_RVV_WF_OPS): Ditto.
41969 (vint8mf8_t): Ditto.
41970 (vint8mf4_t): Ditto.
41971 (vint8mf2_t): Ditto.
41972 (vint8m1_t): Ditto.
41973 (vint8m2_t): Ditto.
41974 (vint8m4_t): Ditto.
41975 (vint8m8_t): Ditto.
41976 (vint16mf4_t): Ditto.
41977 (vint16mf2_t): Ditto.
41978 (vint16m1_t): Ditto.
41979 (vint16m2_t): Ditto.
41980 (vint16m4_t): Ditto.
41981 (vint16m8_t): Ditto.
41982 (vint32mf2_t): Ditto.
41983 (vint32m1_t): Ditto.
41984 (vint32m2_t): Ditto.
41985 (vint32m4_t): Ditto.
41986 (vint32m8_t): Ditto.
41987 (vuint8mf8_t): Ditto.
41988 (vuint8mf4_t): Ditto.
41989 (vuint8mf2_t): Ditto.
41990 (vuint8m1_t): Ditto.
41991 (vuint8m2_t): Ditto.
41992 (vuint8m4_t): Ditto.
41993 (vuint8m8_t): Ditto.
41994 (vuint16mf4_t): Ditto.
41995 (vuint16mf2_t): Ditto.
41996 (vuint16m1_t): Ditto.
41997 (vuint16m2_t): Ditto.
41998 (vuint16m4_t): Ditto.
41999 (vuint16m8_t): Ditto.
42000 (vuint32mf2_t): Ditto.
42001 (vuint32m1_t): Ditto.
42002 (vuint32m2_t): Ditto.
42003 (vuint32m4_t): Ditto.
42004 (vuint32m8_t): Ditto.
42005 (vfloat32mf2_t): Ditto.
42006 (vfloat32m1_t): Ditto.
42007 (vfloat32m2_t): Ditto.
42008 (vfloat32m4_t): Ditto.
42009 (vfloat32m8_t): Ditto.
42010 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
42011 (DEF_RVV_WU_OPS): Ditto.
42012 (DEF_RVV_WF_OPS): Ditto.
42013 (required_extensions_p): Add reduction support.
42014 (rvv_arg_type_info::get_base_vector_type): Ditto.
42015 (rvv_arg_type_info::get_tree_type): Ditto.
42016 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
42017 * config/riscv/riscv.md: Ditto.
42018 * config/riscv/vector-iterators.md (minu): Ditto.
42019 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
42020 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
42021 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
42022 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
42023 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
42024 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
42025 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
42027 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42029 * config/riscv/iterators.md: New iterator.
42030 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
42031 (enum ternop_type): New enum.
42032 (class vmacc): New class.
42033 (class imac): Ditto.
42034 (class vnmsac): Ditto.
42035 (enum widen_ternop_type): New enum.
42036 (class vmadd): Ditto.
42037 (class vnmsub): Ditto.
42038 (class iwmac): Ditto.
42039 (class vwmacc): Ditto.
42040 (class vwmaccu): Ditto.
42041 (class vwmaccsu): Ditto.
42042 (class vwmaccus): Ditto.
42043 (class reverse_binop): Ditto.
42044 (class vfmacc): Ditto.
42045 (class vfnmsac): Ditto.
42046 (class vfmadd): Ditto.
42047 (class vfnmsub): Ditto.
42048 (class vfnmacc): Ditto.
42049 (class vfmsac): Ditto.
42050 (class vfnmadd): Ditto.
42051 (class vfmsub): Ditto.
42052 (class vfwmacc): Ditto.
42053 (class vfwnmacc): Ditto.
42054 (class vfwmsac): Ditto.
42055 (class vfwnmsac): Ditto.
42056 (class float_misc): Ditto.
42057 (class fcmp): Ditto.
42058 (class vfclass): Ditto.
42059 (class vfcvt_x): Ditto.
42060 (class vfcvt_rtz_x): Ditto.
42061 (class vfcvt_f): Ditto.
42062 (class vfwcvt_x): Ditto.
42063 (class vfwcvt_rtz_x): Ditto.
42064 (class vfwcvt_f): Ditto.
42065 (class vfncvt_x): Ditto.
42066 (class vfncvt_rtz_x): Ditto.
42067 (class vfncvt_f): Ditto.
42068 (class vfncvt_rod_f): Ditto.
42070 * config/riscv/riscv-vector-builtins-bases.h:
42071 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
42115 (vfcvt_rtz_x): Ditto.
42116 (vfcvt_rtz_xu): Ditto.
42119 (vfwcvt_xu): Ditto.
42120 (vfwcvt_rtz_x): Ditto.
42121 (vfwcvt_rtz_xu): Ditto.
42124 (vfncvt_xu): Ditto.
42125 (vfncvt_rtz_x): Ditto.
42126 (vfncvt_rtz_xu): Ditto.
42128 (vfncvt_rod_f): Ditto.
42129 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
42130 (struct move_def): Ditto.
42131 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
42132 (DEF_RVV_CONVERT_I_OPS): Ditto.
42133 (DEF_RVV_CONVERT_U_OPS): Ditto.
42134 (DEF_RVV_WCONVERT_I_OPS): Ditto.
42135 (DEF_RVV_WCONVERT_U_OPS): Ditto.
42136 (DEF_RVV_WCONVERT_F_OPS): Ditto.
42137 (vfloat64m1_t): Ditto.
42138 (vfloat64m2_t): Ditto.
42139 (vfloat64m4_t): Ditto.
42140 (vfloat64m8_t): Ditto.
42141 (vint32mf2_t): Ditto.
42142 (vint32m1_t): Ditto.
42143 (vint32m2_t): Ditto.
42144 (vint32m4_t): Ditto.
42145 (vint32m8_t): Ditto.
42146 (vint64m1_t): Ditto.
42147 (vint64m2_t): Ditto.
42148 (vint64m4_t): Ditto.
42149 (vint64m8_t): Ditto.
42150 (vuint32mf2_t): Ditto.
42151 (vuint32m1_t): Ditto.
42152 (vuint32m2_t): Ditto.
42153 (vuint32m4_t): Ditto.
42154 (vuint32m8_t): Ditto.
42155 (vuint64m1_t): Ditto.
42156 (vuint64m2_t): Ditto.
42157 (vuint64m4_t): Ditto.
42158 (vuint64m8_t): Ditto.
42159 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
42160 (DEF_RVV_CONVERT_U_OPS): Ditto.
42161 (DEF_RVV_WCONVERT_I_OPS): Ditto.
42162 (DEF_RVV_WCONVERT_U_OPS): Ditto.
42163 (DEF_RVV_WCONVERT_F_OPS): Ditto.
42164 (DEF_RVV_F_OPS): Ditto.
42165 (DEF_RVV_WEXTF_OPS): Ditto.
42166 (required_extensions_p): Adjust for floating-point support.
42167 (check_required_extensions): Ditto.
42168 (unsigned_base_type_p): Ditto.
42169 (get_mode_for_bitsize): Ditto.
42170 (rvv_arg_type_info::get_base_vector_type): Ditto.
42171 (rvv_arg_type_info::get_tree_type): Ditto.
42172 * config/riscv/riscv-vector-builtins.def (v_f): New define.
42175 (xu_v): New define.
42177 (xu_w): New define.
42178 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
42179 (function_expander::arg_mode): New function.
42180 * config/riscv/vector-iterators.md (sof): New iterator.
42186 (fixuns_trunc): Ditto.
42188 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
42189 (@pred_<optab><mode>): Ditto.
42190 (@pred_<optab><mode>_scalar): Ditto.
42191 (@pred_<optab><mode>_reverse_scalar): Ditto.
42192 (@pred_<copysign><mode>): Ditto.
42193 (@pred_<copysign><mode>_scalar): Ditto.
42194 (@pred_mul_<optab><mode>): Ditto.
42195 (pred_mul_<optab><mode>_undef_merge): Ditto.
42196 (*pred_<madd_nmsub><mode>): Ditto.
42197 (*pred_<macc_nmsac><mode>): Ditto.
42198 (*pred_mul_<optab><mode>): Ditto.
42199 (@pred_mul_<optab><mode>_scalar): Ditto.
42200 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
42201 (*pred_<madd_nmsub><mode>_scalar): Ditto.
42202 (*pred_<macc_nmsac><mode>_scalar): Ditto.
42203 (*pred_mul_<optab><mode>_scalar): Ditto.
42204 (@pred_neg_mul_<optab><mode>): Ditto.
42205 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
42206 (*pred_<nmadd_msub><mode>): Ditto.
42207 (*pred_<nmacc_msac><mode>): Ditto.
42208 (*pred_neg_mul_<optab><mode>): Ditto.
42209 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
42210 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
42211 (*pred_<nmadd_msub><mode>_scalar): Ditto.
42212 (*pred_<nmacc_msac><mode>_scalar): Ditto.
42213 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
42214 (@pred_<misc_op><mode>): Ditto.
42215 (@pred_class<mode>): Ditto.
42216 (@pred_dual_widen_<optab><mode>): Ditto.
42217 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
42218 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
42219 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
42220 (@pred_widen_mul_<optab><mode>): Ditto.
42221 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
42222 (@pred_widen_neg_mul_<optab><mode>): Ditto.
42223 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
42224 (@pred_cmp<mode>): Ditto.
42225 (*pred_cmp<mode>): Ditto.
42226 (*pred_cmp<mode>_narrow): Ditto.
42227 (@pred_cmp<mode>_scalar): Ditto.
42228 (*pred_cmp<mode>_scalar): Ditto.
42229 (*pred_cmp<mode>_scalar_narrow): Ditto.
42230 (@pred_eqne<mode>_scalar): Ditto.
42231 (*pred_eqne<mode>_scalar): Ditto.
42232 (*pred_eqne<mode>_scalar_narrow): Ditto.
42233 (@pred_merge<mode>_scalar): Ditto.
42234 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
42235 (@pred_<fix_cvt><mode>): Ditto.
42236 (@pred_<float_cvt><mode>): Ditto.
42237 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
42238 (@pred_widen_<fix_cvt><mode>): Ditto.
42239 (@pred_widen_<float_cvt><mode>): Ditto.
42240 (@pred_extend<mode>): Ditto.
42241 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
42242 (@pred_narrow_<fix_cvt><mode>): Ditto.
42243 (@pred_narrow_<float_cvt><mode>): Ditto.
42244 (@pred_trunc<mode>): Ditto.
42245 (@pred_rod_trunc<mode>): Ditto.
42247 2023-02-22 Jakub Jelinek <jakub@redhat.com>
42249 PR middle-end/106258
42250 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
42251 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
42252 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
42253 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
42255 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
42257 * common.opt (-Wcomplain-wrong-lang): New.
42258 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
42259 * opts-common.cc (prune_options): Handle it.
42260 * opts-global.cc (complain_wrong_lang): Use it.
42262 2023-02-21 David Malcolm <dmalcolm@redhat.com>
42265 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
42267 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
42270 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
42272 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
42273 (sibcall_value, sibcall_value_internal): Add 'use' expression
42276 2023-02-21 Richard Biener <rguenther@suse.de>
42278 PR tree-optimization/108691
42279 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
42280 assert about calls_setjmp not becoming true when it was false.
42282 2023-02-21 Richard Biener <rguenther@suse.de>
42284 PR tree-optimization/108793
42285 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
42286 Use convert operands to niter_type when computing num.
42288 2023-02-21 Richard Biener <rguenther@suse.de>
42291 2023-02-13 Richard Biener <rguenther@suse.de>
42293 PR tree-optimization/108691
42294 * tree-cfg.cc (notice_special_calls): When the CFG is built
42295 honor gimple_call_ctrl_altering_p.
42296 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
42297 temporarily if the call is not control-altering.
42298 * calls.cc (emit_call_1): Do not add REG_SETJMP if
42299 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
42301 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
42303 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
42304 true if register A0 (return address register) when -Og is specified.
42306 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
42308 * config/i386/predicates.md
42309 (general_x64constmem_operand): New predicate.
42310 * config/i386/i386.md (*cmpqi_ext<mode>_1):
42311 Use nonimm_x64constmem_operand.
42312 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
42313 (*addqi_ext<mode>_1): Ditto.
42314 (*testqi_ext<mode>_1): Ditto.
42315 (*andqi_ext<mode>_1): Ditto.
42316 (*andqi_ext<mode>_1_cc): Ditto.
42317 (*<any_or:code>qi_ext<mode>_1): Ditto.
42318 (*xorqi_ext<mode>_1_cc): Ditto.
42320 2023-02-20 Jakub Jelinek <jakub2redhat.com>
42323 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
42324 gen_umadddi4_highpart{,_le}.
42326 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
42328 * config/riscv/riscv.md (prefetch): Use r instead of p for the
42330 (riscv_prefetchi_<mode>): Ditto.
42332 2023-02-20 Richard Biener <rguenther@suse.de>
42334 PR tree-optimization/108816
42335 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
42336 versioning condition split prerequesite, assert required
42339 2023-02-20 Richard Biener <rguenther@suse.de>
42341 PR tree-optimization/108825
42342 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
42343 loop-local verfication only verify there's no pending SSA
42346 2023-02-20 Richard Biener <rguenther@suse.de>
42348 PR tree-optimization/108819
42349 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
42350 we have an SSA name as iv_2 as expected.
42352 2023-02-18 Jakub Jelinek <jakub@redhat.com>
42354 PR tree-optimization/108819
42355 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
42357 2023-02-18 Jakub Jelinek <jakub@redhat.com>
42360 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
42361 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
42363 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
42364 with ix86_replace_reg_with_reg.
42366 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
42368 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
42370 2023-02-18 Xi Ruoyao <xry111@xry111.site>
42372 * config.gcc (triplet_abi): Set its value based on $with_abi,
42373 instead of $target.
42374 (la_canonical_triplet): Set it after $triplet_abi is set
42376 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
42377 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
42380 2023-02-18 Andrew Pinski <apinski@marvell.com>
42382 * match.pd: Remove #if GIMPLE around the
42385 2023-02-18 Andrew Pinski <apinski@marvell.com>
42387 * value-query.h (get_range_query): Return the global ranges
42388 for a nullptr func.
42390 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
42392 * doc/invoke.texi (@item -Wall): Fix typo in
42395 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
42398 * config/i386/predicates.md
42399 (nonimm_x64constmem_operand): New predicate.
42400 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
42401 (*subqi_ext<mode>_0): Ditto.
42402 (*andqi_ext<mode>_0): Ditto.
42403 (*<any_or:code>qi_ext<mode>_0): Ditto.
42405 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
42408 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
42409 int_outermode instead of GET_MODE (tem) to prevent
42410 VOIDmode from entering simplify_gen_subreg.
42412 2023-02-17 Richard Biener <rguenther@suse.de>
42414 PR tree-optimization/108821
42415 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
42416 move volatile accesses.
42418 2023-02-17 Richard Biener <rguenther@suse.de>
42420 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
42421 called on virtual operands.
42422 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
42423 ssa_undefined_value_p calls.
42424 (vn_phi_insert): Likewise.
42425 (set_ssa_val_to): Likewise.
42426 (visit_phi): Avoid extra work with equivalences for
42427 virtual operand PHIs.
42429 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42431 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
42433 (class mask_nlogic): Ditto.
42434 (class mask_notlogic): Ditto.
42435 (class vmmv): Ditto.
42436 (class vmclr): Ditto.
42437 (class vmset): Ditto.
42438 (class vmnot): Ditto.
42439 (class vcpop): Ditto.
42440 (class vfirst): Ditto.
42441 (class mask_misc): Ditto.
42442 (class viota): Ditto.
42443 (class vid): Ditto.
42445 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42446 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
42465 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
42466 (struct mask_alu_def): Ditto.
42468 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42469 * config/riscv/riscv-vector-builtins.cc: Ditto.
42470 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
42471 for dest it scalar RVV intrinsics.
42472 * config/riscv/vector-iterators.md (sof): New iterator.
42473 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
42474 (@pred_<optab>not<mode>): New pattern.
42475 (@pred_popcount<VB:mode><P:mode>): New pattern.
42476 (@pred_ffs<VB:mode><P:mode>): New pattern.
42477 (@pred_<misc_op><mode>): New pattern.
42478 (@pred_iota<mode>): New pattern.
42479 (@pred_series<mode>): New pattern.
42481 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42483 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
42487 * config/riscv/riscv-vector-builtins.cc: Ditto.
42489 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42490 kito-cheng <kito.cheng@sifive.com>
42492 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
42493 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
42494 (sew64_scalar_helper): New function.
42495 * config/riscv/vector.md: Normalization.
42497 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42499 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
42561 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42563 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
42564 (@pred_<optab><mode>_scalar): Ditto.
42565 (*pred_<optab><mode>_scalar): Ditto.
42566 (*pred_<optab><mode>_extended_scalar): Ditto.
42568 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42570 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
42571 (init_builtins): Ditto.
42572 (mangle_builtin_type): Ditto.
42573 (verify_type_context): Ditto.
42574 (handle_pragma_vector): Ditto.
42575 (builtin_decl): Ditto.
42576 (expand_builtin): Ditto.
42577 (const_vec_all_same_in_range_p): Ditto.
42578 (legitimize_move): Ditto.
42579 (emit_vlmax_op): Ditto.
42580 (emit_nonvlmax_op): Ditto.
42581 (get_vlmul): Ditto.
42582 (get_ratio): Ditto.
42585 (get_avl_type): Ditto.
42586 (calculate_ratio): Ditto.
42587 (enum vlmul_type): Ditto.
42589 (neg_simm5_p): Ditto.
42590 (has_vi_variant_p): Ditto.
42592 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42594 * config/riscv/riscv-protos.h (simm32_p): Remove.
42595 * config/riscv/riscv-v.cc (simm32_p): Ditto.
42596 * config/riscv/vector.md: Use immediate_operand
42597 instead of riscv_vector::simm32_p.
42599 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
42601 * doc/invoke.texi (Optimize Options): Reword the explanation
42602 getting minimal, maximal and default values of a parameter.
42604 2023-02-16 Patrick Palka <ppalka@redhat.com>
42606 * addresses.h: Mechanically drop 'static' from 'static inline'
42607 functions via s/^static inline/inline/g.
42608 * asan.h: Likewise.
42609 * attribs.h: Likewise.
42610 * basic-block.h: Likewise.
42611 * bitmap.h: Likewise.
42612 * cfghooks.h: Likewise.
42613 * cfgloop.h: Likewise.
42614 * cgraph.h: Likewise.
42615 * cselib.h: Likewise.
42616 * data-streamer.h: Likewise.
42617 * debug.h: Likewise.
42619 * diagnostic.h: Likewise.
42620 * dominance.h: Likewise.
42621 * dumpfile.h: Likewise.
42622 * emit-rtl.h: Likewise.
42623 * except.h: Likewise.
42624 * expmed.h: Likewise.
42625 * expr.h: Likewise.
42626 * fixed-value.h: Likewise.
42627 * gengtype.h: Likewise.
42628 * gimple-expr.h: Likewise.
42629 * gimple-iterator.h: Likewise.
42630 * gimple-predict.h: Likewise.
42631 * gimple-range-fold.h: Likewise.
42632 * gimple-ssa.h: Likewise.
42633 * gimple.h: Likewise.
42634 * graphite.h: Likewise.
42635 * hard-reg-set.h: Likewise.
42636 * hash-map.h: Likewise.
42637 * hash-set.h: Likewise.
42638 * hash-table.h: Likewise.
42639 * hwint.h: Likewise.
42640 * input.h: Likewise.
42641 * insn-addr.h: Likewise.
42642 * internal-fn.h: Likewise.
42643 * ipa-fnsummary.h: Likewise.
42644 * ipa-icf-gimple.h: Likewise.
42645 * ipa-inline.h: Likewise.
42646 * ipa-modref.h: Likewise.
42647 * ipa-prop.h: Likewise.
42648 * ira-int.h: Likewise.
42650 * lra-int.h: Likewise.
42652 * lto-streamer.h: Likewise.
42653 * memmodel.h: Likewise.
42654 * omp-general.h: Likewise.
42655 * optabs-query.h: Likewise.
42656 * optabs.h: Likewise.
42657 * plugin.h: Likewise.
42658 * pretty-print.h: Likewise.
42659 * range.h: Likewise.
42660 * read-md.h: Likewise.
42661 * recog.h: Likewise.
42662 * regs.h: Likewise.
42663 * rtl-iter.h: Likewise.
42665 * sbitmap.h: Likewise.
42666 * sched-int.h: Likewise.
42667 * sel-sched-ir.h: Likewise.
42668 * sese.h: Likewise.
42669 * sparseset.h: Likewise.
42670 * ssa-iterators.h: Likewise.
42671 * system.h: Likewise.
42672 * target-globals.h: Likewise.
42673 * target.h: Likewise.
42674 * timevar.h: Likewise.
42675 * tree-chrec.h: Likewise.
42676 * tree-data-ref.h: Likewise.
42677 * tree-iterator.h: Likewise.
42678 * tree-outof-ssa.h: Likewise.
42679 * tree-phinodes.h: Likewise.
42680 * tree-scalar-evolution.h: Likewise.
42681 * tree-sra.h: Likewise.
42682 * tree-ssa-alias.h: Likewise.
42683 * tree-ssa-live.h: Likewise.
42684 * tree-ssa-loop-manip.h: Likewise.
42685 * tree-ssa-loop.h: Likewise.
42686 * tree-ssa-operands.h: Likewise.
42687 * tree-ssa-propagate.h: Likewise.
42688 * tree-ssa-sccvn.h: Likewise.
42689 * tree-ssa.h: Likewise.
42690 * tree-ssanames.h: Likewise.
42691 * tree-streamer.h: Likewise.
42692 * tree-switch-conversion.h: Likewise.
42693 * tree-vectorizer.h: Likewise.
42694 * tree.h: Likewise.
42695 * wide-int.h: Likewise.
42697 2023-02-16 Jakub Jelinek <jakub@redhat.com>
42699 PR tree-optimization/108657
42700 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
42701 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
42702 is a call to internal or builtin function.
42704 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
42706 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
42707 using-declaration to unhide functions.
42709 2023-02-16 Jakub Jelinek <jakub@redhat.com>
42711 PR tree-optimization/108783
42712 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
42713 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
42714 t to curr->op. Otherwise, punt if either newop1 or newop2 are
42715 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
42717 2023-02-16 Richard Biener <rguenther@suse.de>
42719 PR tree-optimization/108791
42720 * tree-ssa-forwprop.cc (optimize_vector_load): Build
42721 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
42724 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
42727 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
42728 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
42729 (ix86_expand_prologue): Likewise.
42731 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
42733 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
42735 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
42737 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
42738 int248_register_operand predicate in zero_extract sub-RTX.
42739 (*cmpqi_ext<mode>_2): Ditto.
42740 (*cmpqi_ext<mode>_3): Ditto.
42741 (*cmpqi_ext<mode>_4): Ditto.
42742 (*extzvqi_mem_rex64): Ditto.
42744 (*insvqi_1_mem_rex64): Ditto.
42745 (@insv<mode>_1): Ditto.
42746 (*insvqi_1): Ditto.
42747 (*insvqi_2): Ditto.
42748 (*insvqi_3): Ditto.
42749 (*extendqi<SWI24:mode>_ext_1): Ditto.
42750 (*addqi_ext<mode>_1): Ditto.
42751 (*addqi_ext<mode>_2): Ditto.
42752 (*subqi_ext<mode>_2): Ditto.
42753 (*testqi_ext<mode>_1): Ditto.
42754 (*testqi_ext<mode>_2): Ditto.
42755 (*andqi_ext<mode>_1): Ditto.
42756 (*andqi_ext<mode>_1_cc): Ditto.
42757 (*andqi_ext<mode>_2): Ditto.
42758 (*<any_or:code>qi_ext<mode>_1): Ditto.
42759 (*<any_or:code>qi_ext<mode>_2): Ditto.
42760 (*xorqi_ext<mode>_1_cc): Ditto.
42761 (*negqi_ext<mode>_2): Ditto.
42762 (*ashlqi_ext<mode>_2): Ditto.
42763 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
42765 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
42767 * config/i386/predicates.md (int248_register_operand):
42768 Rename from extr_register_operand.
42769 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
42770 (*extzx<mode>): Ditto.
42771 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
42772 (*ashl<mode>3_mask): Ditto.
42773 (*<any_shiftrt:insn><mode>3_mask): Ditto.
42774 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
42775 (*<any_rotate:insn><mode>3_mask): Ditto.
42776 (*<btsc><mode>_mask): Ditto.
42777 (*btr<mode>_mask): Ditto.
42778 (*jcc_bt<mode>_mask_1): Ditto.
42780 2023-02-15 Richard Biener <rguenther@suse.de>
42782 PR middle-end/26854
42783 * df-core.cc (df_worklist_propagate_forward): Put later
42784 blocks on worklist and only earlier blocks on pending.
42785 (df_worklist_propagate_backward): Likewise.
42786 (df_worklist_dataflow_doublequeue): Change the iteration
42787 to process new blocks in the same iteration if that
42788 maintains the iteration order.
42790 2023-02-15 Marek Polacek <polacek@redhat.com>
42792 PR middle-end/106080
42793 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
42796 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42798 * config/riscv/predicates.md: Refine codes.
42799 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
42800 * config/riscv/riscv-v.cc: Refine codes.
42801 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
42803 (class imac): New class.
42804 (enum widen_ternop_type): New enum.
42805 (class iwmac): New class.
42807 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42808 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
42816 * config/riscv/riscv-vector-builtins.cc
42817 (function_builder::apply_predication): Adjust for multiply-add support.
42818 (function_expander::add_vundef_operand): Refine codes.
42819 (function_expander::use_ternop_insn): New function.
42820 (function_expander::use_widen_ternop_insn): Ditto.
42821 * config/riscv/riscv-vector-builtins.h: New function.
42822 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
42823 (pred_mul_<optab><mode>_undef_merge): Ditto.
42824 (*pred_<madd_nmsub><mode>): Ditto.
42825 (*pred_<macc_nmsac><mode>): Ditto.
42826 (*pred_mul_<optab><mode>): Ditto.
42827 (@pred_mul_<optab><mode>_scalar): Ditto.
42828 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
42829 (*pred_<madd_nmsub><mode>_scalar): Ditto.
42830 (*pred_<macc_nmsac><mode>_scalar): Ditto.
42831 (*pred_mul_<optab><mode>_scalar): Ditto.
42832 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
42833 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
42834 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
42835 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
42836 (@pred_widen_mul_plus<su><mode>): Ditto.
42837 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
42838 (@pred_widen_mul_plussu<mode>): Ditto.
42839 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
42840 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
42842 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42844 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
42845 (vector_all_trues_mask_operand): New predicate.
42846 (vector_undef_operand): New predicate.
42847 (ltge_operator): New predicate.
42848 (comparison_except_ltge_operator): New predicate.
42849 (comparison_except_eqge_operator): New predicate.
42850 (ge_operator): New predicate.
42851 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
42852 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
42854 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42855 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
42865 * config/riscv/riscv-vector-builtins-shapes.cc
42866 (struct return_mask_def): Adjust for compare support.
42867 * config/riscv/riscv-vector-builtins.cc
42868 (function_expander::use_compare_insn): New function.
42869 * config/riscv/riscv-vector-builtins.h
42870 (function_expander::add_integer_operand): Ditto.
42871 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
42872 * config/riscv/riscv.md: Add vector min/max attributes.
42873 * config/riscv/vector-iterators.md (xnor): New iterator.
42874 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
42875 (*pred_cmp<mode>): Ditto.
42876 (*pred_cmp<mode>_narrow): Ditto.
42877 (@pred_ltge<mode>): Ditto.
42878 (*pred_ltge<mode>): Ditto.
42879 (*pred_ltge<mode>_narrow): Ditto.
42880 (@pred_cmp<mode>_scalar): Ditto.
42881 (*pred_cmp<mode>_scalar): Ditto.
42882 (*pred_cmp<mode>_scalar_narrow): Ditto.
42883 (@pred_eqne<mode>_scalar): Ditto.
42884 (*pred_eqne<mode>_scalar): Ditto.
42885 (*pred_eqne<mode>_scalar_narrow): Ditto.
42886 (*pred_cmp<mode>_extended_scalar): Ditto.
42887 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
42888 (*pred_eqne<mode>_extended_scalar): Ditto.
42889 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
42890 (@pred_ge<mode>_scalar): Ditto.
42891 (@pred_<optab><mode>): Ditto.
42892 (@pred_n<optab><mode>): Ditto.
42893 (@pred_<optab>n<mode>): Ditto.
42894 (@pred_not<mode>): Ditto.
42896 2023-02-15 Martin Jambor <mjambor@suse.cz>
42899 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
42900 creation of non-scalar replacements even if IPA-CP knows their
42903 2023-02-15 Jakub Jelinek <jakub@redhat.com>
42907 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
42908 expander, change operand 3 to be TImode, emit maddlddi4 and
42909 umadddi4_highpart{,_le} with its low half and finally add the high
42910 half to the result.
42912 2023-02-15 Martin Liska <mliska@suse.cz>
42914 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
42916 2023-02-15 Richard Biener <rguenther@suse.de>
42918 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
42919 for with_poison and alias worklist to it.
42920 (sanitize_asan_mark_poison): Likewise.
42922 2023-02-15 Richard Biener <rguenther@suse.de>
42925 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
42926 Combine bitmap test and set.
42927 (scalar_chain::add_insn): Likewise.
42928 (scalar_chain::analyze_register_chain): Remove redundant
42929 attempt to add to queue and instead strengthen assert.
42930 Sink common attempts to mark the def dual-mode.
42931 (scalar_chain::add_to_queue): Remove redundant insn bitmap
42934 2023-02-15 Richard Biener <rguenther@suse.de>
42937 * config/i386/i386-features.cc (convert_scalars_to_vector):
42938 Switch candidates bitmaps to tree view before building the chains.
42940 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
42942 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
42943 "failure trying to reload" call.
42945 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
42947 * gdbinit.in (phrs): New command.
42948 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
42949 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
42951 2023-02-14 David Faust <david.faust@oracle.com>
42954 * config/bpf/constraints.md (q): New memory constraint.
42955 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
42956 (zero_extendqidi2): Likewise.
42957 (zero_extendsidi2): Likewise.
42958 (*mov<MM:mode>): Likewise.
42960 2023-02-14 Andrew Pinski <apinski@marvell.com>
42962 PR tree-optimization/108355
42963 PR tree-optimization/96921
42964 * match.pd: Add pattern for "1 - bool_val".
42966 2023-02-14 Richard Biener <rguenther@suse.de>
42968 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
42969 basic block index hashing on the availability of ->cclhs.
42970 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
42971 rely on ->cclhs availability.
42972 (vn_phi_lookup): Set ->cclhs only when we are eventually
42973 going to CSE the PHI.
42974 (vn_phi_insert): Likewise.
42976 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
42978 * gimplify.cc (gimplify_save_expr): Add missing guard.
42980 2023-02-14 Richard Biener <rguenther@suse.de>
42982 PR tree-optimization/108782
42983 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
42984 Make sure we're not vectorizing an inner loop.
42986 2023-02-14 Jakub Jelinek <jakub@redhat.com>
42988 PR sanitizer/108777
42989 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
42990 * asan.h (asan_memfn_rtl): Declare.
42991 * asan.cc (asan_memfn_rtls): New variable.
42992 (asan_memfn_rtl): New function.
42993 * builtins.cc (expand_builtin): If
42994 param_asan_kernel_mem_intrinsic_prefix and function is
42995 kernel-{,hw}address sanitized, emit calls to
42996 __{,hw}asan_{memcpy,memmove,memset} rather than
42997 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
42998 instead of flag_sanitize & SANITIZE_ADDRESS to check if
42999 asan_intercepted_p functions shouldn't be expanded inline.
43001 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
43003 PR tree-optimization/96373
43004 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
43005 operations on the loop mask. Reject partial vectors if this isn't
43008 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
43010 PR rtl-optimization/108681
43011 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
43012 code to handle bare uses and clobbers.
43014 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
43016 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
43017 caller_save_p flag when clearing defined_p flag.
43018 (setup_reg_equiv): Ditto.
43019 * lra-constraints.cc (lra_constraints): Ditto.
43021 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
43024 * config/i386/predicates.md (extr_register_operand):
43025 New special predicate.
43026 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
43027 as operand 1 predicate.
43028 (*exzv<mode>): Ditto.
43029 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
43031 2023-02-13 Richard Biener <rguenther@suse.de>
43033 PR tree-optimization/28614
43034 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
43035 walking all edges in most cases.
43036 (vn_nary_op_insert_pieces_predicated): Avoid repeated
43037 calls to can_track_predicate_on_edge unless checking is
43039 (process_bb): Instead call it once here for each edge
43040 we register possibly multiple predicates on.
43042 2023-02-13 Richard Biener <rguenther@suse.de>
43044 PR tree-optimization/108691
43045 * tree-cfg.cc (notice_special_calls): When the CFG is built
43046 honor gimple_call_ctrl_altering_p.
43047 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
43048 temporarily if the call is not control-altering.
43049 * calls.cc (emit_call_1): Do not add REG_SETJMP if
43050 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
43052 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
43055 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
43056 (struct s390_sched_state): Initialise to zero.
43057 (s390_sched_variable_issue): For better debuggability also emit
43059 (s390_sched_init): Unconditionally reset scheduler state.
43061 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
43063 * ifcvt.h (noce_if_info::cond_inverted): New field.
43064 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
43065 values when cond_inverted is true.
43066 (noce_find_if_block): Allow the condition to be inverted when
43067 handling conditional moves.
43069 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
43071 * config/s390/predicates.md (execute_operation): Use
43072 constrain_operands instead of extract_constrain_insn in order to
43073 determine wheter there exists a valid alternative.
43075 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
43077 * common/config/arc/arc-common.cc (arc_option_optimization_table):
43078 Remove millicode from list.
43080 2023-02-13 Martin Liska <mliska@suse.cz>
43082 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
43084 2023-02-13 Richard Biener <rguenther@suse.de>
43086 PR tree-optimization/106722
43087 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
43088 whether we marked a stmt.
43089 (mark_control_dependent_edges_necessary): When
43090 mark_last_stmt_necessary didn't mark any stmt make sure
43091 to mark its control dependent edges.
43092 (propagate_necessity): Likewise.
43094 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
43096 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
43097 (DWARF_FRAME_REGISTERS): New.
43098 (DWARF_REG_TO_UNWIND_COLUMN): New.
43100 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
43102 * doc/sourcebuild.texi: Remove (broken) direct reference to
43103 "The GNU configure and build system".
43105 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
43107 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
43108 gen_add3_insn to gen_rtx_SET.
43109 (riscv_adjust_libcall_cfi_epilogue): Likewise.
43111 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43113 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
43114 (class vnclip): Ditto.
43116 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43117 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
43126 * config/riscv/vector-iterators.md (su): Add instruction.
43129 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
43130 (@pred_<sat_op><mode>_scalar): Ditto.
43131 (*pred_<sat_op><mode>_scalar): Ditto.
43132 (*pred_<sat_op><mode>_extended_scalar): Ditto.
43133 (@pred_narrow_clip<v_su><mode>): Ditto.
43134 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
43136 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43138 * config/riscv/constraints.md (Wbr): Remove unused constraint.
43139 * config/riscv/predicates.md: Fix move operand predicate.
43140 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
43141 (class vncvt_x): Ditto.
43142 (class vmerge): Ditto.
43143 (class vmv_v): Ditto.
43145 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43146 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
43153 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
43154 (struct move_def): Ditto.
43156 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43157 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
43158 (DEF_RVV_WEXTU_OPS): Ditto
43159 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
43164 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
43165 * config/riscv/vector-iterators.md (nmsac):New iterator.
43166 (nmsub): New iterator.
43167 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
43168 (@pred_merge<mode>_scalar): New pattern.
43169 (*pred_merge<mode>_scalar): New pattern.
43170 (*pred_merge<mode>_extended_scalar): New pattern.
43171 (@pred_narrow_<optab><mode>): New pattern.
43172 (@pred_narrow_<optab><mode>_scalar): New pattern.
43173 (@pred_trunc<mode>): New pattern.
43175 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43177 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
43178 (class vmsbc): Ditto.
43179 (BASE): Define new class.
43180 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43181 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
43183 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
43186 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43187 * config/riscv/riscv-vector-builtins.cc
43188 (function_expander::use_exact_insn): Adjust for new support
43189 * config/riscv/riscv-vector-builtins.h
43190 (function_base::has_merge_operand_p): New function.
43191 * config/riscv/vector-iterators.md: New iterator.
43192 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
43193 (@pred_msbc<mode>): Ditto.
43194 (@pred_madc<mode>_scalar): Ditto.
43195 (@pred_msbc<mode>_scalar): Ditto.
43196 (*pred_madc<mode>_scalar): Ditto.
43197 (*pred_madc<mode>_extended_scalar): Ditto.
43198 (*pred_msbc<mode>_scalar): Ditto.
43199 (*pred_msbc<mode>_extended_scalar): Ditto.
43200 (@pred_madc<mode>_overflow): Ditto.
43201 (@pred_msbc<mode>_overflow): Ditto.
43202 (@pred_madc<mode>_overflow_scalar): Ditto.
43203 (@pred_msbc<mode>_overflow_scalar): Ditto.
43204 (*pred_madc<mode>_overflow_scalar): Ditto.
43205 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
43206 (*pred_msbc<mode>_overflow_scalar): Ditto.
43207 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
43209 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43211 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
43212 * config/riscv/riscv-v.cc (simm32_p): Ditto.
43213 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
43214 (class vsbc): Ditto.
43216 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43217 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
43219 * config/riscv/riscv-vector-builtins-shapes.cc
43220 (struct no_mask_policy_def): Ditto.
43222 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43223 * config/riscv/riscv-vector-builtins.cc
43224 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
43225 (rvv_arg_type_info::get_tree_type): Ditto.
43226 (function_expander::use_exact_insn): Ditto.
43227 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
43228 (function_base::use_mask_predication_p): New function.
43229 * config/riscv/vector-iterators.md: New iterator.
43230 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
43231 (@pred_sbc<mode>): Ditto.
43232 (@pred_adc<mode>_scalar): Ditto.
43233 (@pred_sbc<mode>_scalar): Ditto.
43234 (*pred_adc<mode>_scalar): Ditto.
43235 (*pred_adc<mode>_extended_scalar): Ditto.
43236 (*pred_sbc<mode>_scalar): Ditto.
43237 (*pred_sbc<mode>_extended_scalar): Ditto.
43239 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43241 * config/riscv/vector.md: use "zero" reg.
43243 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43245 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
43247 (class vwmulsu): Ditto.
43248 (class vwcvt): Ditto.
43249 (BASE): Add integer widening support.
43250 * config/riscv/riscv-vector-builtins-bases.h: Ditto
43251 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
43252 (vwsub): New class.
43253 (vwmul): New class.
43254 (vwmulu): New class.
43255 (vwmulsu): New class.
43256 (vwaddu): New class.
43257 (vwsubu): New class.
43258 (vwcvt_x): New class.
43259 (vwcvtu_x): New class.
43260 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
43262 (struct widen_alu_def): New class.
43263 (SHAPE): New class.
43264 * config/riscv/riscv-vector-builtins-shapes.h: New class.
43265 * config/riscv/riscv-vector-builtins.cc
43266 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
43267 (rvv_arg_type_info::get_tree_type): Ditto.
43268 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
43270 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
43272 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
43273 * config/riscv/riscv.h (X0_REGNUM): New constant.
43274 * config/riscv/vector-iterators.md: New iterators.
43275 * config/riscv/vector.md
43276 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
43278 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
43280 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
43281 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
43283 (@pred_widen_mulsu<mode>): Ditto.
43284 (@pred_widen_mulsu<mode>_scalar): Ditto.
43285 (@pred_<optab><mode>): Ditto.
43287 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43288 kito-cheng <kito.cheng@sifive.com>
43290 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
43291 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
43293 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43294 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
43298 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
43300 (DEF_RVV_FULL_V_U_OPS): Ditto.
43301 (vint8mf8_t): Ditto.
43302 (vint8mf4_t): Ditto.
43303 (vint8mf2_t): Ditto.
43304 (vint8m1_t): Ditto.
43305 (vint8m2_t): Ditto.
43306 (vint8m4_t): Ditto.
43307 (vint8m8_t): Ditto.
43308 (vint16mf4_t): Ditto.
43309 (vint16mf2_t): Ditto.
43310 (vint16m1_t): Ditto.
43311 (vint16m2_t): Ditto.
43312 (vint16m4_t): Ditto.
43313 (vint16m8_t): Ditto.
43314 (vint32mf2_t): Ditto.
43315 (vint32m1_t): Ditto.
43316 (vint32m2_t): Ditto.
43317 (vint32m4_t): Ditto.
43318 (vint32m8_t): Ditto.
43319 (vint64m1_t): Ditto.
43320 (vint64m2_t): Ditto.
43321 (vint64m4_t): Ditto.
43322 (vint64m8_t): Ditto.
43323 (vuint8mf8_t): Ditto.
43324 (vuint8mf4_t): Ditto.
43325 (vuint8mf2_t): Ditto.
43326 (vuint8m1_t): Ditto.
43327 (vuint8m2_t): Ditto.
43328 (vuint8m4_t): Ditto.
43329 (vuint8m8_t): Ditto.
43330 (vuint16mf4_t): Ditto.
43331 (vuint16mf2_t): Ditto.
43332 (vuint16m1_t): Ditto.
43333 (vuint16m2_t): Ditto.
43334 (vuint16m4_t): Ditto.
43335 (vuint16m8_t): Ditto.
43336 (vuint32mf2_t): Ditto.
43337 (vuint32m1_t): Ditto.
43338 (vuint32m2_t): Ditto.
43339 (vuint32m4_t): Ditto.
43340 (vuint32m8_t): Ditto.
43341 (vuint64m1_t): Ditto.
43342 (vuint64m2_t): Ditto.
43343 (vuint64m4_t): Ditto.
43344 (vuint64m8_t): Ditto.
43345 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
43346 (DEF_RVV_FULL_V_U_OPS): Ditto.
43347 (check_required_extensions): Add vmulh support.
43348 (rvv_arg_type_info::get_tree_type): Ditto.
43349 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
43350 (enum rvv_base_type): Ditto.
43351 * config/riscv/riscv.opt: Add 'V' extension flag.
43352 * config/riscv/vector-iterators.md (su): New iterator.
43353 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
43354 (@pred_mulh<v_su><mode>_scalar): Ditto.
43355 (*pred_mulh<v_su><mode>_scalar): Ditto.
43356 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
43358 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43360 * config/riscv/iterators.md: Add sign_extend/zero_extend.
43361 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
43363 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
43364 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
43367 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
43368 for vsext/vzext support.
43369 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
43371 (DEF_RVV_QEXTI_OPS): Ditto.
43372 (DEF_RVV_OEXTI_OPS): Ditto.
43373 (DEF_RVV_WEXTU_OPS): Ditto.
43374 (DEF_RVV_QEXTU_OPS): Ditto.
43375 (DEF_RVV_OEXTU_OPS): Ditto.
43376 (vint16mf4_t): Ditto.
43377 (vint16mf2_t): Ditto.
43378 (vint16m1_t): Ditto.
43379 (vint16m2_t): Ditto.
43380 (vint16m4_t): Ditto.
43381 (vint16m8_t): Ditto.
43382 (vint32mf2_t): Ditto.
43383 (vint32m1_t): Ditto.
43384 (vint32m2_t): Ditto.
43385 (vint32m4_t): Ditto.
43386 (vint32m8_t): Ditto.
43387 (vint64m1_t): Ditto.
43388 (vint64m2_t): Ditto.
43389 (vint64m4_t): Ditto.
43390 (vint64m8_t): Ditto.
43391 (vuint16mf4_t): Ditto.
43392 (vuint16mf2_t): Ditto.
43393 (vuint16m1_t): Ditto.
43394 (vuint16m2_t): Ditto.
43395 (vuint16m4_t): Ditto.
43396 (vuint16m8_t): Ditto.
43397 (vuint32mf2_t): Ditto.
43398 (vuint32m1_t): Ditto.
43399 (vuint32m2_t): Ditto.
43400 (vuint32m4_t): Ditto.
43401 (vuint32m8_t): Ditto.
43402 (vuint64m1_t): Ditto.
43403 (vuint64m2_t): Ditto.
43404 (vuint64m4_t): Ditto.
43405 (vuint64m8_t): Ditto.
43406 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
43407 (DEF_RVV_QEXTI_OPS): Ditto.
43408 (DEF_RVV_OEXTI_OPS): Ditto.
43409 (DEF_RVV_WEXTU_OPS): Ditto.
43410 (DEF_RVV_QEXTU_OPS): Ditto.
43411 (DEF_RVV_OEXTU_OPS): Ditto.
43412 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
43414 (rvv_arg_type_info::get_tree_type): Ditto.
43415 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
43416 * config/riscv/vector-iterators.md (z): New attribute.
43417 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
43418 (@pred_<optab><mode>_vf4): Ditto.
43419 (@pred_<optab><mode>_vf8): Ditto.
43421 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43423 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
43424 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
43425 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
43426 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43427 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
43431 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
43436 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
43437 (@pred_<optab><mode>_scalar): New pattern.
43438 (*pred_<optab><mode>_scalar): New pattern.
43439 (*pred_<optab><mode>_extended_scalar): New pattern.
43441 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43443 * config/riscv/iterators.md: Add neg and not.
43444 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
43446 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43447 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
43468 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
43469 (struct alu_def): Ditto.
43471 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43472 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
43473 * config/riscv/vector-iterators.md: New iterator.
43474 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
43476 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43478 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
43480 2023-02-11 Jakub Jelinek <jakub@redhat.com>
43483 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
43484 item->offset bit position is too large to be representable as
43485 unsigned int byte position.
43487 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
43489 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
43491 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
43493 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
43494 valid_combine only when ira_use_lra_p is true.
43496 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
43498 * params.opt (ira-simple-lra-insn-threshold): Add new param.
43499 * ira.cc (ira): Use the param to switch on simple LRA.
43501 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
43503 PR tree-optimization/108687
43504 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
43505 back to RFD_NONE mode for calculations.
43506 (ranger_cache::propagate_cache): Call the internal edge range API
43507 with RFD_READ_ONLY instead of changing the external routine.
43509 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
43511 PR tree-optimization/108520
43512 * gimple-range-infer.cc (check_assume_func): Invoke
43513 gimple_range_global directly instead using global_range_query.
43514 * value-query.cc (get_range_global): Add function context and
43515 avoid calling nonnull_arg_p if not cfun.
43516 (gimple_range_global): Add function context pointer.
43517 * value-query.h (imple_range_global): Add function context.
43519 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43521 * config/riscv/constraints.md (Wdm): Adjust constraint.
43522 (Wbr): New constraint.
43523 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
43524 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
43525 (emit_vlmax_op): New function.
43526 (emit_nonvlmax_op): Ditto.
43528 (neg_simm5_p): Ditto.
43529 (has_vi_variant_p): Ditto.
43530 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
43531 (emit_vlmax_op): New function.
43532 (emit_nonvlmax_op): Ditto.
43533 (expand_const_vector): Adjust function.
43534 (legitimize_move): Ditto.
43535 (simm32_p): New function.
43537 (neg_simm5_p): Ditto.
43538 (has_vi_variant_p): Ditto.
43539 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
43541 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43542 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
43545 (vminu): Remove signed cases.
43547 (vdiv): Remove unsigned cases.
43549 (vdivu): Remove signed cases.
43553 (vrsub): New class.
43558 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
43559 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
43560 * config/riscv/vector-iterators.md: New iterators.
43561 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
43563 (@pred_<optab><mode>_scalar): New pattern.
43564 (@pred_sub<mode>_reverse_scalar): Ditto.
43565 (*pred_<optab><mode>_scalar): Ditto.
43566 (*pred_<optab><mode>_extended_scalar): Ditto.
43567 (*pred_sub<mode>_reverse_scalar): Ditto.
43568 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
43570 2023-02-10 Richard Biener <rguenther@suse.de>
43572 PR tree-optimization/108724
43573 * tree-vect-stmts.cc (vectorizable_operation): Avoid
43574 using word_mode vectors when vector lowering will
43575 decompose them to elementwise operations.
43577 2023-02-10 Jakub Jelinek <jakub@redhat.com>
43580 2023-02-09 Martin Liska <mliska@suse.cz>
43583 * doc/extend.texi: Document that the function
43584 does not work correctly for old VIA processors.
43586 2023-02-10 Andrew Pinski <apinski@marvell.com>
43587 Andrew Macleod <amacleod@redhat.com>
43589 PR tree-optimization/108684
43590 * tree-ssa-dce.cc (simple_dce_from_worklist):
43591 Check all ssa names and not just non-vdef ones
43592 before accepting the inline-asm.
43593 Call unlink_stmt_vdef on the statement before
43596 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
43598 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
43599 * ira.cc (validate_equiv_mem): Check memref address variance.
43600 (no_equiv): Clear caller_save_p flag.
43601 (update_equiv_regs): Define caller save equivalence for
43603 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
43604 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
43605 call_save_p. Use caller save equivalence depending on the arg.
43606 (split_reg): Adjust the call.
43608 2023-02-09 Jakub Jelinek <jakub@redhat.com>
43611 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
43612 (cpu_indicator_init): Call get_available_features for all CPUs with
43613 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
43616 2023-02-09 Jakub Jelinek <jakub@redhat.com>
43618 PR tree-optimization/108688
43619 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
43620 of BIT_INSERT_EXPR extracting exactly all inserted bits even
43621 when without mode precision. Formatting fixes.
43623 2023-02-09 Andrew Pinski <apinski@marvell.com>
43625 PR tree-optimization/108688
43626 * match.pd (bit_field_ref [bit_insert]): Avoid generating
43627 BIT_FIELD_REFs of non-mode-precision integral operands.
43629 2023-02-09 Martin Liska <mliska@suse.cz>
43632 * doc/extend.texi: Document that the function
43633 does not work correctly for old VIA processors.
43635 2023-02-09 Andreas Schwab <schwab@suse.de>
43637 * lto-wrapper.cc (merge_and_complain): Handle
43638 -funwind-tables and -fasynchronous-unwind-tables.
43639 (append_compiler_options): Likewise.
43641 2023-02-09 Richard Biener <rguenther@suse.de>
43643 PR tree-optimization/26854
43644 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
43645 view around insert_updated_phi_nodes_for.
43646 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
43648 (walk_aliased_vdefs_1): Likewise.
43650 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
43652 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
43654 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
43657 * config.gcc (tm_mlib_file): Define new variable.
43659 2023-02-08 Jakub Jelinek <jakub@redhat.com>
43661 PR tree-optimization/108692
43662 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
43663 widened_code which is different from code, don't call
43664 vect_look_through_possible_promotion but instead just check op is
43665 SSA_NAME with integral type for which vect_is_simple_use is true
43666 and call set_op on this_unprom.
43668 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
43670 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
43672 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
43674 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
43675 to 'aarch_ra_sign_key'.
43676 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
43678 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
43679 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
43680 * config/arm/arm.opt: Define.
43682 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
43684 PR tree-optimization/108316
43685 * tree-vect-stmts.cc (get_load_store_type): When using
43686 internal functions for gather/scatter, make sure that the type
43687 of the offset argument is consistent with the offset vector type.
43689 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
43692 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
43694 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
43695 * ira.cc (validate_equiv_mem): Check memref address variance.
43696 (update_equiv_regs): Define caller save equivalence for
43698 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
43699 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
43700 call_save_p. Use caller save equivalence depending on the arg.
43701 (split_reg): Adjust the call.
43703 2023-02-08 Jakub Jelinek <jakub@redhat.com>
43705 * tree.def (SAD_EXPR): Remove outdated comment about missing
43708 2023-02-07 Marek Polacek <polacek@redhat.com>
43710 * doc/invoke.texi: Update -fchar8_t documentation.
43712 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
43714 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
43715 * ira.cc (validate_equiv_mem): Check memref address variance.
43716 (update_equiv_regs): Define caller save equivalence for
43718 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
43719 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
43720 call_save_p. Use caller save equivalence depending on the arg.
43721 (split_reg): Adjust the call.
43723 2023-02-07 Richard Biener <rguenther@suse.de>
43725 PR tree-optimization/26854
43726 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
43727 instead of immediate uses.
43729 2023-02-07 Jakub Jelinek <jakub@redhat.com>
43731 PR tree-optimization/106923
43732 * ipa-split.cc (execute_split_functions): Don't split returns_twice
43735 2023-02-07 Jakub Jelinek <jakub@redhat.com>
43737 PR tree-optimization/106433
43738 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
43739 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
43741 2023-02-07 Jan Hubicka <jh@suse.cz>
43743 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
43746 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
43748 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
43749 (process_asm): Create a constructor for GCN_STACK_SIZE.
43750 (main): Parse the -mstack-size option.
43752 2023-02-06 Alex Coplan <alex.coplan@arm.com>
43755 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
43756 Use correct constraint for operand 3.
43758 2023-02-06 Martin Jambor <mjambor@suse.cz>
43760 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
43762 2023-02-06 Xi Ruoyao <xry111@xry111.site>
43764 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
43765 New define_int_iterator.
43766 (bytepick_d_ashift_amount): Likewise.
43767 (bytepick_imm): New define_int_attr.
43768 (bytepick_w_lshiftrt_amount): Likewise.
43769 (bytepick_d_lshiftrt_amount): Likewise.
43770 (bytepick_w_<bytepick_imm>): New define_insn template.
43771 (bytepick_w_<bytepick_imm>_extend): Likewise.
43772 (bytepick_d_<bytepick_imm>): Likewise.
43773 (bytepick_w): Remove unused define_insn.
43774 (bytepick_d): Likewise.
43775 (UNSPEC_BYTEPICK_W): Remove unused unspec.
43776 (UNSPEC_BYTEPICK_D): Likewise.
43777 * config/loongarch/predicates.md (const_0_to_3_operand):
43778 Remove unused define_predicate.
43779 (const_0_to_7_operand): Likewise.
43781 2023-02-06 Jakub Jelinek <jakub@redhat.com>
43783 PR tree-optimization/108655
43784 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
43785 or -fsanitize=unreachable -fsanitize-trap=unreachable return
43786 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
43788 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
43790 * doc/install.texi (Specific): Remove PW32.
43792 2023-02-03 Jakub Jelinek <jakub@redhat.com>
43794 PR tree-optimization/108647
43795 * range-op.cc (operator_equal::op1_range,
43796 operator_not_equal::op1_range): Don't test op2 bound
43797 equality if op2.undefined_p (), instead set_varying.
43798 (operator_lt::op1_range, operator_le::op1_range,
43799 operator_gt::op1_range, operator_ge::op1_range): Return false if
43800 op2.undefined_p ().
43801 (operator_lt::op2_range, operator_le::op2_range,
43802 operator_gt::op2_range, operator_ge::op2_range): Return false if
43803 op1.undefined_p ().
43805 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
43807 PR tree-optimization/108639
43808 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
43810 (irange::operator==): Same.
43812 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
43814 PR tree-optimization/108647
43815 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
43816 (foperator_lt::op2_range): Same.
43817 (foperator_le::op1_range): Same.
43818 (foperator_le::op2_range): Same.
43819 (foperator_gt::op1_range): Same.
43820 (foperator_gt::op2_range): Same.
43821 (foperator_ge::op1_range): Same.
43822 (foperator_ge::op2_range): Same.
43823 (foperator_unordered_lt::op1_range): Same.
43824 (foperator_unordered_lt::op2_range): Same.
43825 (foperator_unordered_le::op1_range): Same.
43826 (foperator_unordered_le::op2_range): Same.
43827 (foperator_unordered_gt::op1_range): Same.
43828 (foperator_unordered_gt::op2_range): Same.
43829 (foperator_unordered_ge::op1_range): Same.
43830 (foperator_unordered_ge::op2_range): Same.
43832 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
43834 PR tree-optimization/107570
43835 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
43837 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
43839 * doc/gm2.texi (Internals): Remove from menu.
43840 (Using): Comment out ifnohtml conditional.
43841 (Documentation): Use gcc url.
43842 (License): Node simplified.
43843 (Copying): New node. Include gpl_v3_without_node.
43844 (Contributing): Node simplified.
43845 (Internals): Commented out.
43846 (Libraries): Node simplified.
43849 (Functions): Ditto.
43851 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
43853 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
43855 (mve_vqshluq_m_n_s<mode>): Likewise.
43856 (mve_vshlq_m_<supf><mode>): Likewise.
43857 (mve_vsriq_m_n_<supf><mode>): Likewise.
43858 (mve_vsubq_m_<supf><mode>): Likewise.
43860 2023-02-03 Martin Jambor <mjambor@suse.cz>
43863 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
43864 when comparing to an IPA-CP value.
43865 (dump_list_of_param_indices): New function.
43866 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
43867 Dump removed candidates using dump_list_of_param_indices.
43868 * ipa-param-manipulation.cc
43869 (ipa_param_body_adjustments::modify_expression): Add assert checking
43870 sizes of a VIEW_CONVERT_EXPR will match.
43871 (ipa_param_body_adjustments::modify_assignment): Likewise.
43873 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
43875 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
43876 * config/riscv/riscv.cc: Ditto.
43878 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43880 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
43884 * config/riscv/vector.md: Ditto.
43886 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43888 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
43889 * config/riscv/riscv-vector-builtins-bases.cc: New class.
43890 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
43893 * config/riscv/riscv-vector-builtins.cc: Ditto.
43894 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
43896 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
43898 * toplev.cc (toplev::main): Only print the version information header
43899 from toplevel main().
43901 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
43903 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
43904 cond_{ashl|ashr|lshr}
43906 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
43908 PR rtl-optimization/108086
43909 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
43910 Adjust size-related commentary accordingly.
43912 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
43914 PR rtl-optimization/108508
43915 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
43916 the splay tree search gives the first clobber in the second group,
43917 make sure that the root of the first clobber group is updated
43918 correctly. Enter the new clobber group into the definition splay
43921 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
43923 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
43924 Fix finding best match score.
43926 2023-02-02 Jakub Jelinek <jakub@redhat.com>
43929 PR rtl-optimization/108463
43931 * cselib.cc (cselib_current_insn): Move declaration earlier.
43932 (cselib_hasher::equal): For debug only locs, temporarily override
43933 cselib_current_insn to their l->setting_insn for the
43934 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
43935 promote some debug locs.
43936 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
43937 when using cselib call cselib_lookup_from_insn on the address but
43938 don't substitute it.
43940 2023-02-02 Richard Biener <rguenther@suse.de>
43942 PR middle-end/108625
43943 * genmatch.cc (expr::gen_transform): Also disallow resimplification
43944 from pushing to lseq with force_leaf.
43945 (dt_simplify::gen_1): Likewise.
43947 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
43949 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
43950 (struct kernargs): Replace the common content with kernargs_abi.
43951 (struct heap): Delete.
43952 (main): Read GCN_STACK_SIZE envvar.
43953 Allocate space for the device stacks.
43954 Write the new kernargs fields.
43955 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
43956 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
43957 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
43958 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
43959 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
43960 Set up the stacks from the values in the kernargs, not private.
43961 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
43962 (gcn_hsa_declare_function_name): Turn off the private segment.
43963 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
43964 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
43965 * config/gcn/gcn.opt (mstack-size): Change the description.
43967 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
43970 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
43971 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
43972 addressing MVE predicate modes.
43973 (mve_bool_vec_to_const): Change to represent correct MVE predicate
43975 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
43977 (arm_vector_mode_supported_p): Likewise.
43978 (arm_mode_to_pred_mode): Add V2QI.
43979 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
43981 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
43982 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
43983 (v2qi_UP): New macro.
43984 (v4bi_UP): New macro.
43985 (v8bi_UP): New macro.
43986 (v16bi_UP): New macro.
43987 (arm_expand_builtin_args): Make it able to expand the new predicate
43989 * config/arm/arm-modes.def (V2QI): New mode.
43990 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
43991 Pred4x4_t): Remove unused predicate builtin types.
43992 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
43993 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
43994 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
43995 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
43996 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
43997 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
43998 of MODE_VECTOR_BOOL.
43999 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
44000 (MVE_VPRED): Likewise.
44001 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
44002 (MVE_vctp): New mode attribute.
44006 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
44007 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
44009 (mve_vpnothi): Rename this...
44010 (mve_vpnotv16bi): ... to this.
44011 (mve_vctp<mode1>q_mhi): Rename this...
44012 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
44013 (mve_vldrdq_gather_base_z_<supf>v2di,
44014 mve_vldrdq_gather_offset_z_<supf>v2di,
44015 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
44016 mve_vstrdq_scatter_base_p_<supf>v2di,
44017 mve_vstrdq_scatter_offset_p_<supf>v2di,
44018 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
44019 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
44020 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
44021 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
44022 mve_vldrdq_gather_base_wb_z_<supf>v2di,
44023 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
44024 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
44026 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
44028 (VCTP): ... with this.
44029 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
44030 (VCTP_M): ... with this.
44031 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
44032 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
44034 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
44037 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
44038 (arm_modes_tieable_p): Make MVE predicate modes tieable.
44039 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
44040 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
44041 simplify_subreg to simplify subregs where the outermode is not scalar.
44043 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
44046 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
44047 new qualifiers parameter and use unsigned short type for MVE predicate.
44048 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
44050 (arm_init_crypto_builtins): Likewise.
44052 2023-02-02 Jakub Jelinek <jakub@redhat.com>
44055 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
44056 * internal-fn.def (TRAP): Remove.
44057 * internal-fn.cc (expand_TRAP): Remove.
44058 * tree.cc (build_common_builtin_nodes): Define
44059 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
44060 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
44061 instead of BUILT_IN_TRAP.
44062 * gimple.cc (gimple_build_builtin_unreachable): Remove
44063 emitting internal function for BUILT_IN_TRAP.
44064 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
44065 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
44066 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
44067 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
44068 BUILT_IN_UNREACHABLE_TRAP.
44069 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
44070 * tree-cfg.cc (verify_gimple_call,
44071 pass_warn_function_return::execute): Likewise.
44072 * attribs.cc (decl_attributes): Don't report exclusions on
44073 BUILT_IN_UNREACHABLE_TRAP either.
44075 2023-02-02 liuhongt <hongtao.liu@intel.com>
44077 PR tree-optimization/108601
44078 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
44079 * tree-vect-loop.cc
44080 (vectorizable_nonlinear_induction): Remove
44081 vect_can_peel_nonlinear_iv_p.
44082 (vect_can_peel_nonlinear_iv_p): Don't peel
44083 nonlinear iv(mult or shift) for epilog when vf is not
44084 constant and moved the defination to ..
44085 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
44088 2023-02-02 Jakub Jelinek <jakub@redhat.com>
44090 PR middle-end/108435
44091 * tree-nested.cc (convert_nonlocal_omp_clauses)
44092 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
44093 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
44094 before calling declare_vars.
44095 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
44096 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
44097 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
44098 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
44100 2023-02-01 Tamar Christina <tamar.christina@arm.com>
44102 * common/config/aarch64/aarch64-common.cc
44103 (struct aarch64_option_extension): Add native_detect and document struct
44105 (all_extensions): Set new field native_detect.
44106 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
44109 2023-02-01 Martin Liska <mliska@suse.cz>
44111 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
44114 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
44116 PR tree-optimization/108356
44117 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
44118 do a search of the DOM tree for a range.
44120 2023-02-01 Martin Liska <mliska@suse.cz>
44123 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
44124 ony non-null values.
44125 * ipa.cc (walk_polymorphic_call_targets): Likewise.
44127 2023-02-01 Martin Liska <mliska@suse.cz>
44130 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
44133 2023-02-01 Jakub Jelinek <jakub@redhat.com>
44136 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
44137 subregs in DEBUG_INSNs.
44139 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
44141 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
44143 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
44145 * config/s390/s390.cc (s390_restore_gpr_p): New function.
44146 (s390_preserve_gpr_arg_in_range_p): New function.
44147 (s390_preserve_gpr_arg_p): New function.
44148 (s390_preserve_fpr_arg_p): New function.
44149 (s390_register_info_stdarg_fpr): Rename to ...
44150 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
44151 (s390_register_info_stdarg_gpr): Rename to ...
44152 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
44153 (s390_register_info): Use the renamed functions above.
44154 (s390_optimize_register_info): Likewise.
44155 (save_fpr): Generate CFI for -mpreserve-args.
44156 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
44157 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
44158 (s390_optimize_prologue): Likewise.
44159 * config/s390/s390.opt: New option -mpreserve-args
44161 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
44163 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
44164 (restore_gprs): Likewise.
44165 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
44166 frame pointer if a frame-pointer is used.
44167 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
44168 * config/s390/s390.md (stack_tie): Add a register operand and
44170 (@stack_tie<mode>): ... this.
44172 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
44174 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
44175 EMIT_CFI parameter.
44176 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
44177 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
44179 2023-02-01 Richard Biener <rguenther@suse.de>
44181 PR middle-end/108500
44182 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
44183 with tree traversal algorithm.
44185 2023-02-01 Jason Merrill <jason@redhat.com>
44187 * doc/invoke.texi: Document -Wno-changes-meaning.
44189 2023-02-01 David Malcolm <dmalcolm@redhat.com>
44191 * doc/invoke.texi (Static Analyzer Options): Add notes about
44192 limitations of -fanalyzer.
44194 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44196 * config/riscv/constraints.md (vj): New.
44198 * config/riscv/iterators.md: Add more opcode.
44199 * config/riscv/predicates.md (vector_arith_operand): New.
44200 (vector_neg_arith_operand): New.
44201 (vector_shift_operand): New.
44202 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
44203 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
44220 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
44237 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
44238 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
44239 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
44240 (DEF_RVV_U_OPS): New.
44241 (rvv_arg_type_info::get_base_vector_type): Handle
44242 RVV_BASE_shift_vector.
44243 (rvv_arg_type_info::get_tree_type): Ditto.
44244 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
44245 RVV_BASE_shift_vector.
44246 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
44247 * config/riscv/vector-iterators.md: Handle more opcode.
44248 * config/riscv/vector.md (@pred_<optab><mode>): New.
44250 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
44253 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
44256 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
44258 PR tree-optimization/108608
44259 * tree-vect-loop.cc (vect_transform_reduction): Handle single
44260 def-use cycles that involve function calls rather than tree codes.
44262 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
44264 PR tree-optimization/108385
44265 * gimple-range-gori.cc (gori_compute::compute_operand_range):
44266 Allow VARYING computations to continue if there is a relation.
44267 * range-op.cc (pointer_plus_operator::op2_range): New.
44269 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
44271 PR tree-optimization/108359
44272 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
44273 (range_operator::fold_range): If op1 is equivalent to op2 then
44274 invoke new fold_in_parts_equiv to operate on sub-components.
44275 * range-op.h (wi_fold_in_parts_equiv): New prototype.
44277 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
44279 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
44280 not abort calculations if there is a valid relation available.
44281 (gori_compute::refine_using_relation): Pass correct relation trio.
44282 (gori_compute::compute_operand1_range): Create trio and use it.
44283 (gori_compute::compute_operand2_range): Ditto.
44284 * range-op.cc (operator_plus::op1_range): Use correct trio member.
44285 (operator_minus::op1_range): Use correct trio member.
44286 * value-relation.cc (value_relation::create_trio): New.
44287 * value-relation.h (value_relation::create_trio): New prototype.
44289 2023-01-31 Jakub Jelinek <jakub@redhat.com>
44292 * config/i386/i386-expand.cc
44293 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
44294 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
44295 equal to bitsize of mode.
44297 2023-01-31 Jakub Jelinek <jakub@redhat.com>
44299 PR rtl-optimization/108596
44300 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
44301 ends with asm goto and has a crossing fallthrough edge to the same bb
44302 that contains at least one of its labels by restoring EDGE_CROSSING
44303 flag even on possible edge from cur_bb to new_bb successor.
44305 2023-01-31 Jakub Jelinek <jakub@redhat.com>
44308 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
44309 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
44310 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
44311 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
44312 uninitialized automatic variable __W.
44314 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
44316 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
44318 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44320 * config/riscv/riscv-protos.h (get_vector_mode): New function.
44321 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
44322 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
44323 (class loadstore): Adjust for indexed loads/stores support.
44325 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
44326 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
44342 * config/riscv/riscv-vector-builtins-shapes.cc
44343 (struct indexed_loadstore_def): New class.
44345 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44346 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
44347 for indexed loads/stores support.
44348 (check_required_extensions): Ditto.
44349 (rvv_arg_type_info::get_base_vector_type): New function.
44350 (rvv_arg_type_info::get_tree_type): Ditto.
44351 (function_builder::add_unique_function): Adjust for indexed loads/stores
44353 (function_expander::use_exact_insn): New function.
44354 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
44355 indexed loads/stores support.
44356 (struct rvv_arg_type_info): Ditto.
44357 (function_expander::index_mode): New function.
44358 (function_base::apply_tail_policy_p): Ditto.
44359 (function_base::apply_mask_policy_p): Ditto.
44360 * config/riscv/vector-iterators.md (unspec): New unspec.
44361 * config/riscv/vector.md (unspec): Ditto.
44362 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
44364 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
44365 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
44366 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
44367 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
44368 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
44369 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
44370 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
44371 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
44372 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
44373 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
44374 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
44375 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
44376 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
44378 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
44380 * config.gcc: Recognize x86_64-*-gnu* targets and include
44382 * config/i386/gnu64.h: Define configuration for new target
44383 including ld.so location.
44385 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
44387 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
44388 ampere1a to include SM4.
44390 2023-01-30 Andrew Pinski <apinski@marvell.com>
44392 PR tree-optimization/108582
44393 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
44394 for middlebb to have no phi nodes.
44396 2023-01-30 Richard Biener <rguenther@suse.de>
44398 PR tree-optimization/108574
44399 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
44400 sameval and def, ignore the equivalence if there's the
44401 danger of oscillating between two values.
44403 2023-01-30 Andreas Schwab <schwab@suse.de>
44405 * common/config/riscv/riscv-common.cc
44406 (riscv_option_optimization_table)
44407 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
44408 -fasynchronous-unwind-tables and -funwind-tables.
44409 * config.gcc (riscv*-*-linux*): Define
44410 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
44412 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
44414 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
44415 value of includedir.
44417 2023-01-30 Richard Biener <rguenther@suse.de>
44420 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
44423 2023-01-30 liuhongt <hongtao.liu@intel.com>
44425 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
44426 * doc/invoke.texi: Ditto.
44428 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
44430 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
44431 (stmt_may_terminate_function_p): If assuming return or EH
44432 volatile asm is safe.
44433 (find_always_executed_bbs): Fix handling of terminating BBS and
44434 infinite loops; add debug output.
44435 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
44437 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
44439 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
44440 off-by-one in checking the permissible shift-amount.
44442 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
44444 * doc/extend.texi (Named Address Spaces): Update link to the
44447 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
44449 * doc/standards.texi (Standards): Fix markup.
44451 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
44453 * doc/standards.texi (Standards): Update link to Objective-C book.
44455 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
44457 * doc/invoke.texi (Instrumentation Options): Update reference to
44460 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
44462 * doc/standards.texi: Update Go1 link.
44464 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44466 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
44467 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
44470 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44471 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
44473 * config/riscv/riscv-vector-builtins.cc
44474 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
44475 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
44476 (@pred_strided_store<mode>): Ditto.
44478 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44480 * config/riscv/vector.md (tail_policy_op_idx): Remove.
44481 (mask_policy_op_idx): Remove.
44482 (avl_type_op_idx): Remove.
44484 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
44486 PR tree-optimization/96373
44487 * tree.h (sign_mask_for): Declare.
44488 * tree.cc (sign_mask_for): New function.
44489 (signed_or_unsigned_type_for): For vector types, try to use the
44490 related_int_vector_mode.
44491 * genmatch.cc (commutative_op): Handle conditional internal functions.
44492 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
44494 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
44496 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
44497 Use the likely minimum VF when bounding the denominators to
44498 the estimated number of iterations.
44500 2023-01-27 Richard Biener <rguenther@suse.de>
44503 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
44504 and -Ofast FP environment side-effects.
44506 2023-01-27 Richard Biener <rguenther@suse.de>
44509 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
44510 Don't add crtfastmath.o for -shared.
44512 2023-01-27 Richard Biener <rguenther@suse.de>
44515 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
44518 2023-01-27 Richard Biener <rguenther@suse.de>
44521 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
44522 crtfastmath.o for -shared.
44524 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
44526 PR tree-optimization/108306
44527 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
44528 varying for shifts that are always out of void range.
44529 (operator_rshift::fold_range): Return [0, 0] not
44530 varying for shifts that are always out of void range.
44532 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
44534 PR tree-optimization/108447
44535 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
44536 Do not attempt to fold HONOR_NAN types.
44538 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44540 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
44541 Remove _m suffix for "vop_m" C++ overloaded API name.
44543 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44545 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
44546 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44547 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
44549 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
44550 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
44551 (vbool64_t): Ditto.
44552 (vbool32_t): Ditto.
44553 (vbool16_t): Ditto.
44558 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
44559 (rvv_arg_type_info::get_tree_type): Ditto.
44560 (function_expander::use_contiguous_load_insn): Ditto.
44561 * config/riscv/vector.md (@pred_store<mode>): Ditto.
44563 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44565 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
44566 (vsetvl_discard_result_insn_p): New function.
44567 (reg_killed_by_bb_p): rename to find_reg_killed_by.
44568 (find_reg_killed_by): New name.
44569 (get_vl): allow it to be called by more functions.
44570 (has_vsetvl_killed_avl_p): Add condition.
44571 (get_avl): allow it to be called by more functions.
44572 (insn_should_be_added_p): New function.
44573 (get_all_nonphi_defs): Refine function.
44574 (get_all_sets): Ditto.
44575 (get_same_bb_set): New function.
44576 (any_insn_in_bb_p): Ditto.
44577 (any_set_in_bb_p): Ditto.
44578 (get_vl_vtype_info): Add VLMAX forward optimization.
44579 (source_equal_p): Fix issues.
44580 (extract_single_source): Refine.
44581 (avl_info::multiple_source_equal_p): New function.
44582 (avl_info::operator==): Adjust for final version.
44583 (vl_vtype_info::operator==): Ditto.
44584 (vl_vtype_info::same_avl_p): Ditto.
44585 (vector_insn_info::parse_insn): Ditto.
44586 (vector_insn_info::available_p): New function.
44587 (vector_insn_info::merge): Adjust for final version.
44588 (vector_insn_info::dump): Add hard_empty.
44589 (pass_vsetvl::hard_empty_block_p): New function.
44590 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
44591 (pass_vsetvl::forward_demand_fusion): Ditto.
44592 (pass_vsetvl::demand_fusion): Ditto.
44593 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
44594 (pass_vsetvl::compute_local_properties): Adjust for final version.
44595 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
44596 (pass_vsetvl::refine_vsetvls): Ditto.
44597 (pass_vsetvl::commit_vsetvls): Ditto.
44598 (pass_vsetvl::propagate_avl): New function.
44599 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
44600 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
44602 2023-01-27 Jakub Jelinek <jakub@redhat.com>
44605 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
44606 from size_t to int.
44608 2023-01-27 Jakub Jelinek <jakub@redhat.com>
44611 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
44612 redirection of calls to __builtin_trap in addition to redirection
44613 to __builtin_unreachable.
44615 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44617 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
44619 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44621 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
44622 (emit_vsetvl_insn): Ditto.
44624 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44626 * config/riscv/vector.md: Fix constraints.
44628 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44630 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
44632 2023-01-27 Patrick Palka <ppalka@redhat.com>
44633 Jakub Jelinek <jakub@redhat.com>
44635 * tree-core.h (tree_code_type, tree_code_length): For
44636 C++17 and later, add inline keyword, otherwise don't define
44637 the arrays, but declare extern arrays.
44638 * tree.cc (tree_code_type, tree_code_length): Define these
44639 arrays for C++14 and older.
44641 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44643 * config/riscv/riscv-vsetvl.h: Change it into public.
44645 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44647 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
44650 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44652 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
44654 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44656 * config/riscv/vector.md: Fix incorrect attributes.
44658 2023-01-27 Richard Biener <rguenther@suse.de>
44661 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
44662 Don't add crtfastmath.o for -shared.
44664 2023-01-27 Alexandre Oliva <oliva@gnu.org>
44666 * doc/options.texi (option, RejectNegative): Mention that
44667 -g-started options are also implicitly negatable.
44669 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
44671 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
44672 Use get_typenode_from_name to get fixed-width integer type
44674 * config/riscv/riscv-vector-builtins.def: Update define with
44675 fixed-width integer type nodes.
44677 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44679 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
44680 (real_insn_and_same_bb_p): New function.
44681 (same_bb_and_after_or_equal_p): Remove it.
44682 (before_p): New function.
44683 (reg_killed_by_bb_p): Ditto.
44684 (has_vsetvl_killed_avl_p): Ditto.
44685 (get_vl): Move location so that we can call it.
44686 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
44687 (available_occurrence_p): Ditto.
44688 (dominate_probability_p): Remove it.
44689 (can_backward_propagate_p): Remove it.
44690 (get_all_nonphi_defs): New function.
44691 (get_all_predecessors): Ditto.
44692 (any_insn_in_bb_p): Ditto.
44693 (insert_vsetvl): Adjust AVL REG.
44694 (source_equal_p): New function.
44695 (extract_single_source): Ditto.
44696 (avl_info::single_source_equal_p): Ditto.
44697 (avl_info::operator==): Adjust for AVL=REG.
44698 (vl_vtype_info::same_avl_p): Ditto.
44699 (vector_insn_info::set_demand_info): Remove it.
44700 (vector_insn_info::compatible_p): Adjust for AVL=REG.
44701 (vector_insn_info::compatible_avl_p): New function.
44702 (vector_insn_info::merge): Adjust AVL=REG.
44703 (vector_insn_info::dump): Ditto.
44704 (pass_vsetvl::merge_successors): Remove it.
44705 (enum fusion_type): New enum.
44706 (pass_vsetvl::get_backward_fusion_type): New function.
44707 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
44708 (pass_vsetvl::forward_demand_fusion): Ditto.
44709 (pass_vsetvl::demand_fusion): Ditto.
44710 (pass_vsetvl::prune_expressions): Ditto.
44711 (pass_vsetvl::compute_local_properties): Ditto.
44712 (pass_vsetvl::cleanup_vsetvls): Ditto.
44713 (pass_vsetvl::commit_vsetvls): Ditto.
44714 (pass_vsetvl::init): Ditto.
44715 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
44716 (enum merge_type): New enum.
44718 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44720 * config/riscv/riscv-vsetvl.cc
44721 (vector_infos_manager::vector_infos_manager): Add probability.
44722 (vector_infos_manager::dump): Ditto.
44723 (pass_vsetvl::compute_probabilities): Ditto.
44724 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
44726 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44728 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
44729 (vector_insn_info::merge): Ditto.
44730 (vector_insn_info::dump): Ditto.
44731 (pass_vsetvl::merge_successors): Ditto.
44732 (pass_vsetvl::backward_demand_fusion): Ditto.
44733 (pass_vsetvl::forward_demand_fusion): Ditto.
44734 (pass_vsetvl::commit_vsetvls): Ditto.
44735 * config/riscv/riscv-vsetvl.h: Ditto.
44737 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44739 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
44742 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44744 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
44746 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44748 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
44749 Add pre-check for redundant flow.
44751 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44753 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
44754 (vector_infos_manager::free_bitmap_vectors): Ditto.
44755 (pass_vsetvl::pre_vsetvl): Adjust codes.
44756 * config/riscv/riscv-vsetvl.h: New function declaration.
44758 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44760 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
44761 (vector_insn_info::set_demand_info): New function.
44762 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
44763 (pass_vsetvl::merge_successors): Ditto.
44764 (pass_vsetvl::compute_global_backward_infos): Ditto.
44765 (pass_vsetvl::backward_demand_fusion): Ditto.
44766 (pass_vsetvl::forward_demand_fusion): Ditto.
44767 (pass_vsetvl::demand_fusion): New function.
44768 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
44769 * config/riscv/riscv-vsetvl.h: New function declaration.
44771 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44773 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
44775 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44777 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
44778 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
44780 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44782 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
44783 (backward_propagate_worthwhile_p): Fix non-worthwhile.
44785 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44787 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
44789 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44791 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
44792 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
44793 (pass_vsetvl::commit_vsetvls): Ditto.
44794 * config/riscv/riscv-vsetvl.h: New function declaration.
44796 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44798 * config/riscv/vector.md:
44800 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44802 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
44803 pred_store for vse.
44804 * config/riscv/riscv-vector-builtins.cc
44805 (function_expander::add_mem_operand): Refine function.
44806 (function_expander::use_contiguous_load_insn): Adjust new
44808 (function_expander::use_contiguous_store_insn): Ditto.
44809 * config/riscv/riscv-vector-builtins.h: Refine function.
44810 * config/riscv/vector.md (@pred_store<mode>): New pattern.
44812 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44814 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
44816 2023-01-26 Marek Polacek <polacek@redhat.com>
44818 PR middle-end/108543
44819 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
44820 if it was previously set.
44822 2023-01-26 Jakub Jelinek <jakub@redhat.com>
44824 PR tree-optimization/108540
44825 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
44826 are singletons, use range_true even if op1 != op2
44827 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
44828 even if intersection of the ranges is empty and one has
44829 zero low bound and another zero high bound, use range_true_and_false
44830 rather than range_false.
44831 (foperator_not_equal::fold_range): If both op1 and op2
44832 are singletons, use range_false even if op1 != op2
44833 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
44834 even if intersection of the ranges is empty and one has
44835 zero low bound and another zero high bound, use range_true_and_false
44836 rather than range_true.
44838 2023-01-26 Jakub Jelinek <jakub@redhat.com>
44840 * value-relation.cc (kind_string): Add const.
44841 (rr_negate_table, rr_swap_table, rr_intersect_table,
44842 rr_union_table, rr_transitive_table): Add static const, change
44843 element type from relation_kind to unsigned char.
44844 (relation_negate, relation_swap, relation_intersect, relation_union,
44845 relation_transitive): Cast rr_*_table element to relation_kind.
44846 (relation_to_code): Add static const.
44847 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
44849 2023-01-26 Richard Biener <rguenther@suse.de>
44851 PR tree-optimization/108547
44852 * gimple-predicate-analysis.cc (value_sat_pred_p):
44855 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
44857 PR tree-optimization/108522
44858 * tree-object-size.cc (compute_object_offset): Make EXPR
44859 argument non-const. Call component_ref_field_offset.
44861 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44863 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
44864 FEATURE_STRING field.
44866 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
44868 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
44870 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
44874 * gcc.cc: Provide default specs for Modula-2 so that when the
44875 language is not built-in better diagnostics are emitted for
44876 attempts to use .mod or .m2i file extensions.
44878 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
44880 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
44882 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
44884 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
44886 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
44888 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
44891 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
44893 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
44895 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
44897 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
44899 2023-01-25 Richard Biener <rguenther@suse.de>
44901 PR tree-optimization/108523
44902 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
44903 backedge value for the result when using predication to
44906 2023-01-25 Richard Biener <rguenther@suse.de>
44908 * doc/lto.texi (Command line options): Reword and update reference
44909 to removed lto_read_all_file_options.
44911 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
44913 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
44916 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
44918 * doc/contrib.texi: Add Jose E. Marchesi.
44920 2023-01-25 Jakub Jelinek <jakub@redhat.com>
44922 PR tree-optimization/108498
44923 * gimple-ssa-store-merging.cc (class store_operand_info):
44924 End coment with full stop rather than comma.
44925 (split_group): Likewise.
44926 (merged_store_group::apply_stores): Clear string_concatenation if
44927 start or end aren't on a byte boundary.
44929 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
44930 Jakub Jelinek <jakub@redhat.com>
44932 PR tree-optimization/108522
44933 * tree-object-size.cc (compute_object_offset): Use
44934 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
44936 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44938 * config/xtensa/xtensa.md:
44939 Fix exit from loops detecting references before overwriting in the
44942 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
44944 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
44945 do elimination but only for hard register.
44946 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
44947 calls of get_hard_regno.
44949 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
44951 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
44954 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
44957 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
44958 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
44961 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44963 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
44964 and only include 'csky/t-csky-linux' when enable multilib.
44965 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
44966 define it when disable multilib.
44968 2023-01-24 Richard Biener <rguenther@suse.de>
44970 PR tree-optimization/108500
44971 * dominance.h (calculate_dominance_info): Add parameter
44972 to indicate fast-query compute, defaulted to true.
44973 * dominance.cc (calculate_dominance_info): Honor
44974 fast-query compute parameter.
44975 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
44976 not compute the dominator fast-query DFS numbers.
44978 2023-01-24 Eric Biggers <ebiggers@google.com>
44981 * optc-save-gen.awk: Fix copy-and-paste error.
44983 2023-01-24 Jakub Jelinek <jakub@redhat.com>
44986 * cgraphbuild.cc: Include gimplify.h.
44987 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
44988 their corresponding DECL_VALUE_EXPR expressions after unsharing.
44990 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
44993 * config.gcc (tm_file): Move the variable out of loop.
44995 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
44996 Yang Yujie <yangyujie@loongson.cn>
44999 * config/loongarch/loongarch.cc (loongarch_classify_address):
45000 Add precessint for CONST_INT.
45001 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
45002 (loongarch_print_operand): Increase the processing of '%c'.
45003 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
45004 And port the public operand modifiers information to this document.
45006 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
45008 * doc/invoke.texi (-mbranch-protection): Update documentation.
45010 2023-01-23 Richard Biener <rguenther@suse.de>
45013 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
45015 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
45016 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
45017 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
45018 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
45020 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
45022 * config/arm/aout.h (ra_auth_code): Add entry in enum.
45023 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
45024 to dwarf frame expression.
45025 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
45026 (arm_expand_prologue): Update frame related information and reg notes
45027 for pac/pacbit insn.
45028 (arm_regno_class): Check for pac pseudo reigster.
45029 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
45030 (arm_init_machine_status): Set pacspval_needed to zero.
45031 (arm_debugger_regno): Check for PAC register.
45032 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
45034 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
45035 (arm_unwind_emit): Update REG_CFA_REGISTER case._
45036 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
45037 (DWARF_PAC_REGNUM): Define.
45038 (IS_PAC_REGNUM): Likewise.
45039 (enum reg_class): Add PAC_REG entry.
45040 (machine_function): Add pacbti_needed state to structure.
45041 * config/arm/arm.md (RA_AUTH_CODE): Define.
45043 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
45045 * config.gcc ($tm_file): Update variable.
45046 * config/arm/arm-mlib.h: Create new header file.
45047 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
45048 multilib arch directory.
45049 (MULTILIB_REUSE): Add multilib reuse rules.
45050 (MULTILIB_MATCHES): Add multilib match rules.
45052 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
45054 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
45055 * config/arm/arm-tables.opt: Regenerate.
45056 * config/arm/arm-tune.md: Likewise.
45057 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
45058 * (-mfix-cmse-cve-2021-35465): Likewise.
45060 2023-01-23 Richard Biener <rguenther@suse.de>
45062 PR tree-optimization/108482
45063 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
45064 .LOOP_DIST_ALIAS calls.
45066 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45068 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
45069 * config/arm/arm-protos.h: Update.
45070 * config/arm/aarch-common-protos.h: Declare
45071 'aarch_bti_arch_check'.
45072 * config/arm/arm.cc (aarch_bti_enabled) Update.
45073 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
45074 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
45075 * config/arm/arm.md (bti_nop): New insn.
45076 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
45077 (aarch-bti-insert.o): New target.
45078 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
45079 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
45081 (gate): Make use of 'aarch_bti_arch_check'.
45082 * config/arm/arm-passes.def: New file.
45083 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
45085 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45087 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
45088 'aarch-bti-insert.o'.
45089 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
45091 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
45092 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
45093 (aarch64_output_mi_thunk)
45094 (aarch64_print_patchable_function_entry)
45095 (aarch64_file_end_indicate_exec_stack): Update renamed function
45096 calls to renamed functions.
45097 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
45098 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
45100 * config/aarch64/aarch64-bti-insert.cc: Delete.
45101 * config/arm/aarch-bti-insert.cc: New file including and
45102 generalizing code from aarch64-bti-insert.cc.
45103 * config/arm/aarch-common-protos.h: Update.
45105 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45107 * config/arm/arm.h (arm_arch8m_main): Declare it.
45108 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
45110 * config/arm/arm.cc (arm_arch8m_main): Define it.
45111 (arm_option_reconfigure_globals): Set arm_arch8m_main.
45112 (arm_compute_frame_layout, arm_expand_prologue)
45113 (thumb2_expand_return, arm_expand_epilogue)
45114 (arm_conditional_register_usage): Update for pac codegen.
45115 (arm_current_function_pac_enabled_p): New function.
45116 (aarch_bti_enabled) New function.
45117 (use_return_insn): Return zero when pac is enabled.
45118 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
45120 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
45121 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
45123 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45125 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
45126 mbranch-protection.
45128 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45129 Tejas Belagod <tbelagod@arm.com>
45131 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
45132 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
45134 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45135 Tejas Belagod <tbelagod@arm.com>
45136 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
45138 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
45139 new pseudo register class _UVRSC_PAC.
45141 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45142 Tejas Belagod <tbelagod@arm.com>
45144 * config/arm/arm-c.cc (arm_cpu_builtins): Define
45145 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
45146 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
45148 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45149 Tejas Belagod <tbelagod@arm.com>
45151 * doc/sourcebuild.texi: Document arm_pacbti_hw.
45153 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45154 Tejas Belagod <tbelagod@arm.com>
45155 Richard Earnshaw <Richard.Earnshaw@arm.com>
45157 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
45158 -mbranch-protection option and initialize appropriate data structures.
45159 * config/arm/arm.opt (-mbranch-protection): New option.
45160 * doc/invoke.texi (Arm Options): Document it.
45162 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45163 Tejas Belagod <tbelagod@arm.com>
45165 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
45166 * config/arm/arm-cpus.in (pacbti): New feature.
45167 * doc/invoke.texi (Arm Options): Document it.
45169 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
45170 Tejas Belagod <tbelagod@arm.com>
45172 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
45173 (all_architectures): Fix comment.
45174 (aarch64_parse_extension): Rename return type, enum value names.
45175 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
45176 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
45177 Also rename corresponding enum values.
45178 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
45179 out aarch64_function_type and move it to common code as
45180 aarch_function_type in aarch-common.h.
45181 * config/aarch64/aarch64-protos.h: Include common types header,
45182 move out types aarch64_parse_opt_result and aarch64_key_type to
45184 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
45185 and functions out into aarch-common.h and aarch-common.cc. Fix up
45186 all the name changes resulting from the move.
45187 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
45189 * config/aarch64/aarch64.opt: Include aarch-common.h to import
45190 type move. Fix up name changes from factoring out common code and
45192 * config/arm/aarch-common-protos.h: Export factored out routines to both
45194 * config/arm/aarch-common.cc: Include newly factored out types.
45195 Move all mbranch-protection code and data structures from
45197 * config/arm/aarch-common.h: New header that declares types shared
45198 between aarch32 and aarch64 backends.
45199 * config/arm/arm-protos.h: Declare types and variables that are
45200 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
45201 aarch_ra_sign_scope and aarch_enable_bti.
45202 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
45203 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
45204 * config/arm/arm.cc: Add missing includes.
45206 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
45208 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
45210 2023-01-23 Richard Biener <rguenther@suse.de>
45212 PR tree-optimization/108449
45213 * cgraphunit.cc (check_global_declaration): Do not turn
45214 undefined statics into externs.
45216 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
45218 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
45219 and HI input modes.
45220 * config/pru/pru.md (clz): Fix generated code for QI and HI
45223 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
45225 * config/v850/v850.cc (v850_select_section): Put const volatile
45226 objects into read-only sections.
45228 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
45230 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
45231 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
45232 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
45234 2023-01-20 Jakub Jelinek <jakub@redhat.com>
45236 PR tree-optimization/108457
45237 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
45238 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
45239 argument instead of a temporary. Formatting fixes.
45241 2023-01-19 Jakub Jelinek <jakub@redhat.com>
45243 PR tree-optimization/108447
45244 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
45245 (relation_tests): Add self-tests for relation_{intersect,union}
45247 * selftest.h (relation_tests): Declare.
45248 * function-tests.cc (test_ranges): Call it.
45250 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
45253 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
45254 invalid third argument to __builtin_ia32_prefetch.
45256 2023-01-19 Jakub Jelinek <jakub@redhat.com>
45258 PR middle-end/108459
45259 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
45260 than fold_unary for NEGATE_EXPR.
45262 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
45265 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
45266 comment. Move assert about alignment a bit later.
45268 2023-01-19 Jakub Jelinek <jakub@redhat.com>
45270 PR tree-optimization/108440
45271 * tree-ssa-forwprop.cc: Include gimple-range.h.
45272 (simplify_rotate): For the forms with T2 wider than T and shift counts of
45273 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
45274 to B. For the forms with T2 wider than T and shift counts of
45275 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
45276 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
45277 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
45278 pass specific ranger instead of get_global_range_query.
45279 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
45282 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
45284 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
45285 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
45287 (aarch64_simd_vec_copy_lane<mode>): Likewise.
45288 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
45290 2023-01-19 Alexandre Oliva <oliva@adacore.com>
45293 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
45294 within debug insns.
45296 2023-01-18 Martin Jambor <mjambor@suse.cz>
45299 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
45300 lcone_of chain also do not need the body.
45302 2023-01-18 Richard Biener <rguenther@suse.de>
45305 2022-12-16 Richard Biener <rguenther@suse.de>
45307 PR middle-end/108086
45308 * tree-inline.cc (remap_ssa_name): Do not unshare the
45309 result from the decl_map.
45311 2023-01-18 Murray Steele <murray.steele@arm.com>
45314 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
45316 (__arm_vst1q_p_s8): Likewise.
45317 (__arm_vld1q_z_u8): Likewise.
45318 (__arm_vld1q_z_s8): Likewise.
45319 (__arm_vst1q_p_u16): Likewise.
45320 (__arm_vst1q_p_s16): Likewise.
45321 (__arm_vld1q_z_u16): Likewise.
45322 (__arm_vld1q_z_s16): Likewise.
45323 (__arm_vst1q_p_u32): Likewise.
45324 (__arm_vst1q_p_s32): Likewise.
45325 (__arm_vld1q_z_u32): Likewise.
45326 (__arm_vld1q_z_s32): Likewise.
45327 (__arm_vld1q_z_f16): Likewise.
45328 (__arm_vst1q_p_f16): Likewise.
45329 (__arm_vld1q_z_f32): Likewise.
45330 (__arm_vst1q_p_f32): Likewise.
45332 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
45334 * config/xtensa/xtensa.md (xorsi3_internal):
45335 Rename from the original of "xorsi3".
45336 (xorsi3): New expansion pattern that emits addition rather than
45337 bitwise-XOR when the second source is a constant of -2147483648
45340 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
45341 Andrew Pinski <apinski@marvell.com>
45344 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
45345 vec_vsubcuqP with vec_vsubcuq.
45347 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
45350 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
45351 support for invalid uses of MMA opaque type in function arguments.
45353 2023-01-18 liuhongt <hongtao.liu@intel.com>
45356 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
45357 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
45358 -share or -mno-daz-ftz is specified.
45359 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
45360 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
45362 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
45364 * config/bpf/bpf.cc (bpf_option_override): Disable
45367 2023-01-17 Jakub Jelinek <jakub@redhat.com>
45369 PR tree-optimization/106523
45370 * tree-ssa-forwprop.cc (simplify_rotate): For the
45371 patterns with (-Y) & (B - 1) in one operand's shift
45372 count and Y in another, if T2 has wider precision than T,
45373 punt if Y could have a value in [B, B2 - 1] range.
45375 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
45378 * config/i386/i386.cc (x86_output_mi_thunk): Disable
45379 -mforce-indirect-call for PIC in 32-bit mode.
45381 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
45384 * ipa-modref.cc (modref_access_analysis::analyze): Use
45385 find_always_executed_bbs.
45386 * ipa-sra.cc (process_scan_results): Likewise.
45387 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
45388 (find_always_executed_bbs): New function.
45389 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
45390 (find_always_executed_bbs): Declare.
45392 2023-01-16 Jan Hubicka <jh@suse.cz>
45394 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
45395 by TARGET_USE_SCATTER.
45396 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
45397 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
45398 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
45399 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
45400 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
45401 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
45403 2023-01-16 Richard Biener <rguenther@suse.de>
45406 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
45408 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
45412 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
45413 (__ARM_mve_coerce3): Likewise.
45415 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
45417 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
45419 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
45421 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
45422 (number_of_iterations_bitcount): Add call to the above.
45423 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
45424 c[lt]z idiom recognition.
45426 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
45428 * doc/sourcebuild.texi: Add missing target attributes.
45430 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
45432 PR tree-optimization/94793
45433 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
45435 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
45436 (number_of_iterations_cltz_complement): New.
45437 (number_of_iterations_bitcount): Add call to the above.
45439 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
45441 * doc/extend.texi (Common Function Attributes): Fix grammar.
45443 2023-01-16 Jakub Jelinek <jakub@redhat.com>
45446 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
45447 * config/riscv/riscv-vsetvl.cc: Likewise.
45449 2023-01-16 Jakub Jelinek <jakub@redhat.com>
45452 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
45453 disable -Winit-self using pragma GCC diagnostic ignored.
45454 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
45456 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
45457 _mm256_undefined_si256): Likewise.
45458 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
45459 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
45460 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
45461 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
45463 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
45466 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
45467 support for invalid uses in inline asm, factor out the checking and
45468 erroring to lambda function check_and_error_invalid_use.
45470 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
45472 PR tree-optimization/107608
45473 * range-op-float.cc (range_operator_float::fold_range): Avoid
45474 folding into INF when flag_trapping_math.
45475 * value-range.h (frange::known_isinf): Return false for possible NANs.
45477 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
45479 * config.gcc (csky-*-*): Support --with-float=softfp.
45481 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
45483 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
45484 Rename to xtensa_adjust_reg_alloc_order.
45485 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
45486 Ditto. And also remove code to reorder register numbers for
45487 leaf functions, rename the tables, and adjust the allocation
45488 order for the call0 ABI to use register A0 more.
45489 (xtensa_leaf_regs): Remove.
45490 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
45491 (order_regs_for_local_alloc): Rename as the above.
45492 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
45494 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
45496 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
45497 Change to define_insn_and_split to fold ldr+dup to ld1rq.
45498 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
45500 2023-01-14 Alexandre Oliva <oliva@adacore.com>
45502 * hash-table.h (is_deleted): Precheck !is_empty.
45503 (mark_deleted): Postcheck !is_empty.
45504 (copy constructor): Test is_empty before is_deleted.
45506 2023-01-14 Alexandre Oliva <oliva@adacore.com>
45509 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
45512 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
45514 PR rtl-optimization/108274
45515 * function.cc (thread_prologue_and_epilogue_insns): Also update the
45516 DF information for calls in a few more cases.
45518 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
45520 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
45521 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
45523 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
45524 (MAX_SYNC_LIBFUNC_SIZE): Define.
45525 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
45527 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
45528 libcall when sync libcalls are disabled.
45529 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
45530 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
45531 are disabled on 32-bit target.
45532 * config/pa/pa.opt (matomic-libcalls): New option.
45533 * doc/invoke.texi (HPPA Options): Update.
45535 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
45537 PR rtl-optimization/108117
45538 PR rtl-optimization/108132
45539 * sched-deps.cc (deps_analyze_insn): Do not schedule across
45540 calls before reload.
45542 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
45544 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
45545 options for -mlibarch.
45546 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
45547 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
45549 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
45551 * attribs.cc (strict_flex_array_level_of): Move this function to ...
45552 * attribs.h (strict_flex_array_level_of): Remove the declaration.
45553 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
45554 replace the referece to strict_flex_array_level_of with
45555 DECL_NOT_FLEXARRAY.
45556 * tree.cc (component_ref_size): Likewise.
45558 2023-01-13 Richard Biener <rguenther@suse.de>
45561 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
45562 crtfastmath.o for -shared.
45563 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
45565 2023-01-13 Richard Biener <rguenther@suse.de>
45568 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
45569 crtfastmath.o for -shared.
45570 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
45572 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
45575 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
45577 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
45579 (TARGET_DWARF_FRAME_REG_MODE): Define.
45581 2023-01-13 Richard Biener <rguenther@suse.de>
45584 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
45585 update EH info on the fly.
45587 2023-01-13 Richard Biener <rguenther@suse.de>
45589 PR tree-optimization/108387
45590 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
45591 value before inserting expression into the tables.
45593 2023-01-12 Andrew Pinski <apinski@marvell.com>
45594 Roger Sayle <roger@nextmovesoftware.com>
45596 PR tree-optimization/92342
45597 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
45598 Use tcc_comparison and :c for the multiply.
45599 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
45601 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
45602 Richard Sandiford <richard.sandiford@arm.com>
45605 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
45606 Check DECL_PACKED for bitfield.
45607 (aarch64_layout_arg): Warn when parameter passing ABI changes.
45608 (aarch64_function_arg_boundary): Do not warn here.
45609 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
45612 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
45613 Richard Sandiford <richard.sandiford@arm.com>
45615 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
45617 (aarch64_layout_arg): Factorize warning conditions.
45618 (aarch64_function_arg_boundary): Fix typo.
45619 * function.cc (currently_expanding_function_start): New variable.
45620 (expand_function_start): Handle
45621 currently_expanding_function_start.
45622 * function.h (currently_expanding_function_start): Declare.
45624 2023-01-12 Richard Biener <rguenther@suse.de>
45626 PR tree-optimization/99412
45627 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
45628 (swap_ops_for_binary_stmt): Remove reduction handling.
45629 (rewrite_expr_tree_parallel): Adjust.
45630 (reassociate_bb): Likewise.
45631 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
45633 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
45635 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
45636 Rearrange the emitting codes.
45638 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
45640 * config/xtensa/xtensa.md (*btrue):
45641 Correct value of the attribute "length" that depends on
45642 TARGET_DENSITY and operands, and add '?' character to the register
45643 constraint of the compared operand.
45645 2023-01-12 Alexandre Oliva <oliva@adacore.com>
45647 * hash-table.h (expand): Check elements and deleted counts.
45648 (verify): Likewise.
45650 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
45652 PR tree-optimization/71343
45653 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
45654 the value number of the expression X << C the same as the value
45655 number for the multiplication X * (1<<C).
45657 2023-01-11 David Faust <david.faust@oracle.com>
45660 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
45661 floating point modes.
45663 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
45665 PR tree-optimization/108199
45666 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
45667 for bit-field references.
45669 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
45671 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
45672 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
45673 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
45674 OPTION_MASK_P10_FUSION.
45676 2023-01-11 Richard Biener <rguenther@suse.de>
45678 PR tree-optimization/107767
45679 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
45680 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
45681 * tree-switch-conversion.cc (switch_conversion::collect):
45682 Count unique non-default targets accounting for later
45683 merging opportunities.
45685 2023-01-11 Martin Liska <mliska@suse.cz>
45687 PR middle-end/107976
45688 * params.opt: Limit JT params.
45689 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
45691 2023-01-11 Richard Biener <rguenther@suse.de>
45693 PR tree-optimization/108352
45694 * tree-ssa-threadbackward.cc
45695 (back_threader_profitability::profitable_path_p): Adjust
45696 heuristic that allows non-multi-way branch threads creating
45698 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
45699 (--param fsm-scale-path-stmts): Adjust.
45700 * params.opt (--param=fsm-scale-path-blocks=): Remove.
45701 (-param=fsm-scale-path-stmts=): Adjust description.
45703 2023-01-11 Richard Biener <rguenther@suse.de>
45705 PR tree-optimization/108353
45706 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
45708 (add_ssa_edge): Simplify.
45709 (add_control_edge): Likewise.
45710 (ssa_prop_init): Likewise.
45711 (ssa_prop_fini): Likewise.
45712 (ssa_propagation_engine::ssa_propagate): Likewise.
45714 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
45716 * config/s390/s390.md (*not<mode>): New pattern.
45718 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
45720 * config/xtensa/xtensa.cc (xtensa_insn_cost):
45721 Let insn cost for size be obtained by applying COSTS_N_INSNS()
45722 to instruction length and then dividing by 3.
45724 2023-01-10 Richard Biener <rguenther@suse.de>
45726 PR tree-optimization/106293
45727 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
45728 process degenerate PHI defs.
45730 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
45732 PR rtl-optimization/106421
45733 * cprop.cc (bypass_block): Check that DEST is local to this
45734 function (non-NULL) before calling find_edge.
45736 2023-01-10 Martin Jambor <mjambor@suse.cz>
45739 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
45740 sort_replacements, lookup_first_base_replacement and
45741 m_sorted_replacements_p.
45742 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
45743 (ipa_param_body_adjustments::register_replacement): Set
45744 m_sorted_replacements_p to false.
45745 (compare_param_body_replacement): New function.
45746 (ipa_param_body_adjustments::sort_replacements): Likewise.
45747 (ipa_param_body_adjustments::common_initialization): Call
45749 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
45750 m_sorted_replacements_p.
45751 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
45753 (ipa_param_body_adjustments::lookup_first_base_replacement): New
45755 (ipa_param_body_adjustments::modify_call_stmt): Use
45756 lookup_first_base_replacement.
45757 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
45758 adjustments->sort_replacements.
45760 2023-01-10 Richard Biener <rguenther@suse.de>
45762 PR tree-optimization/108314
45763 * tree-vect-stmts.cc (vectorizable_condition): Do not
45764 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
45766 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
45768 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
45770 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
45772 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
45774 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
45776 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
45777 defines for soft float abi.
45779 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
45781 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
45782 (smart_bclri): Likewise.
45783 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
45784 (fast_bclri): Likewise.
45785 (fast_cmpnesi_i): Likewise.
45786 (*fast_cmpltsi_i): Likewise.
45787 (*fast_cmpgeusi_i): Likewise.
45789 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
45791 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
45792 flag_fp_int_builtin_inexact || !flag_trapping_math.
45793 (<frm_pattern><mode>2): Likewise.
45795 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
45797 * config/s390/s390.cc (s390_register_info): Check call_used_regs
45798 instead of hard-coding the register numbers for call saved
45800 (s390_optimize_register_info): Likewise.
45802 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
45804 * doc/gm2.texi (Overview): Fix @node markers.
45805 (Using): Likewise. Remove subsections that were moved to Overview
45806 from the menu and move others around.
45808 2023-01-09 Richard Biener <rguenther@suse.de>
45810 PR middle-end/108209
45811 * genmatch.cc (commutative_op): Fix return value for
45812 user-id with non-commutative first replacement.
45814 2023-01-09 Jakub Jelinek <jakub@redhat.com>
45817 * calls.cc (expand_call): For calls with
45818 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
45821 2023-01-09 Richard Biener <rguenther@suse.de>
45823 PR middle-end/69482
45824 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
45825 qualified accesses also force objects to memory.
45827 2023-01-09 Martin Liska <mliska@suse.cz>
45830 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
45831 NULL (deleleted value) to a hash_set.
45833 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
45835 * config/xtensa/xtensa.md (*splice_bits):
45836 New insn_and_split pattern.
45838 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
45840 * config/xtensa/xtensa.cc
45841 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
45842 New helper functions.
45843 (xtensa_set_return_address, xtensa_output_mi_thunk):
45844 Change to use the helper function.
45845 (xtensa_emit_adjust_stack_ptr): Ditto.
45846 And also change to try reusing the content of scratch register
45847 A9 if the register is not modified in the function body.
45849 2023-01-07 LIU Hao <lh_mouse@126.com>
45851 PR middle-end/108300
45852 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
45853 before <windows.h>.
45854 * diagnostic-color.cc: Likewise.
45855 * plugin.cc: Likewise.
45856 * prefix.cc: Likewise.
45858 2023-01-06 Joseph Myers <joseph@codesourcery.com>
45860 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
45861 for handling real integer types.
45863 2023-01-06 Tamar Christina <tamar.christina@arm.com>
45866 2022-12-12 Tamar Christina <tamar.christina@arm.com>
45868 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
45869 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
45870 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
45871 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
45872 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
45873 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
45874 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
45875 (aarch64_simd_dupv2hf): New.
45876 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
45878 * config/aarch64/iterators.md (VHSDF_P): New.
45879 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
45880 Vel, q, vp): Add V2HF.
45881 * config/arm/types.md (neon_fp_reduc_add_h): New.
45883 2023-01-06 Martin Liska <mliska@suse.cz>
45885 PR middle-end/107966
45886 * doc/options.texi: Fix Var documentation in internal manual.
45888 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
45891 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
45893 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
45894 RTL expansion to allow condition (mask) to be shared/reused,
45895 by avoiding overwriting pseudos and adding REG_EQUAL notes.
45897 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
45899 * common.opt: Add -static-libgm2.
45900 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
45901 * doc/gm2.texi: Document static-libgm2.
45902 * gcc.cc (driver_handle_option): Allow static-libgm2.
45904 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
45906 * common/config/i386/i386-common.cc (processor_alias_table):
45907 Use CPU_ZNVER4 for znver4.
45908 * config/i386/i386.md: Add znver4.md.
45909 * config/i386/znver4.md: New.
45911 2023-01-04 Jakub Jelinek <jakub@redhat.com>
45913 PR tree-optimization/108253
45914 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
45917 2023-01-04 Jakub Jelinek <jakub@redhat.com>
45919 PR middle-end/108237
45920 * generic-match-head.cc: Include tree-pass.h.
45921 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
45922 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
45923 resp. PROP_gimple_lvec property set.
45925 2023-01-04 Jakub Jelinek <jakub@redhat.com>
45927 PR sanitizer/108256
45928 * convert.cc (do_narrow): Punt for MULT_EXPR if original
45929 type doesn't wrap around and -fsanitize=signed-integer-overflow
45931 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
45933 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
45935 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
45936 * common/config/i386/i386-common.cc: Add Emeraldrapids.
45938 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
45940 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
45943 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
45945 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
45946 default constructor to initialize it.
45947 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
45948 for last and iterate to handle recursive calls. Delete leftover
45949 candidates at the end.
45950 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
45952 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
45953 gc_candidate bit when a clone is used.
45955 2023-01-03 Florian Weimer <fweimer@redhat.com>
45958 2023-01-02 Florian Weimer <fweimer@redhat.com>
45960 * dwarf2cfi.cc (init_return_column_size): Remove.
45961 (init_one_dwarf_reg_size): Adjust.
45962 (generate_dwarf_reg_sizes): New function. Extracted
45963 from expand_builtin_init_dwarf_reg_sizes.
45964 (expand_builtin_init_dwarf_reg_sizes): Call
45965 generate_dwarf_reg_sizes.
45966 * target.def (init_dwarf_reg_sizes_extra): Adjust
45968 * config/msp430/msp430.cc
45969 (msp430_init_dwarf_reg_sizes_extra): Adjust.
45970 * config/rs6000/rs6000.cc
45971 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
45972 * doc/tm.texi: Update.
45974 2023-01-03 Florian Weimer <fweimer@redhat.com>
45977 2023-01-02 Florian Weimer <fweimer@redhat.com>
45979 * debug.h (dwarf_reg_sizes_constant): Declare.
45980 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
45982 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
45984 PR tree-optimization/105043
45985 * doc/extend.texi (Object Size Checking): Split out into two
45986 subsections and mention _FORTIFY_SOURCE.
45988 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
45990 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
45991 RTL expansion to allow condition (mask) to be shared/reused,
45992 by avoiding overwriting pseudos and adding REG_EQUAL notes.
45994 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
45997 * config/i386/i386-features.cc
45998 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
45999 the gain/cost of converting a MEM operand.
46001 2023-01-03 Jakub Jelinek <jakub@redhat.com>
46003 PR middle-end/108264
46004 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
46005 from source which doesn't have scalar integral mode first convert
46008 2023-01-03 Jakub Jelinek <jakub@redhat.com>
46010 PR rtl-optimization/108263
46011 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
46014 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
46017 * config/i386/lujiazui.md (lujiazui_div): New automaton.
46018 (lua_div): New unit.
46019 (lua_idiv_qi): Correct unit in the reservation.
46020 (lua_idiv_qi_load): Ditto.
46021 (lua_idiv_hi): Ditto.
46022 (lua_idiv_hi_load): Ditto.
46023 (lua_idiv_si): Ditto.
46024 (lua_idiv_si_load): Ditto.
46025 (lua_idiv_di): Ditto.
46026 (lua_idiv_di_load): Ditto.
46027 (lua_fdiv_SF): Ditto.
46028 (lua_fdiv_SF_load): Ditto.
46029 (lua_fdiv_DF): Ditto.
46030 (lua_fdiv_DF_load): Ditto.
46031 (lua_fdiv_XF): Ditto.
46032 (lua_fdiv_XF_load): Ditto.
46033 (lua_ssediv_SF): Ditto.
46034 (lua_ssediv_load_SF): Ditto.
46035 (lua_ssediv_V4SF): Ditto.
46036 (lua_ssediv_load_V4SF): Ditto.
46037 (lua_ssediv_V8SF): Ditto.
46038 (lua_ssediv_load_V8SF): Ditto.
46039 (lua_ssediv_SD): Ditto.
46040 (lua_ssediv_load_SD): Ditto.
46041 (lua_ssediv_V2DF): Ditto.
46042 (lua_ssediv_load_V2DF): Ditto.
46043 (lua_ssediv_V4DF): Ditto.
46044 (lua_ssediv_load_V4DF): Ditto.
46046 2023-01-02 Florian Weimer <fweimer@redhat.com>
46048 * debug.h (dwarf_reg_sizes_constant): Declare.
46049 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
46051 2023-01-02 Florian Weimer <fweimer@redhat.com>
46053 * dwarf2cfi.cc (init_return_column_size): Remove.
46054 (init_one_dwarf_reg_size): Adjust.
46055 (generate_dwarf_reg_sizes): New function. Extracted
46056 from expand_builtin_init_dwarf_reg_sizes.
46057 (expand_builtin_init_dwarf_reg_sizes): Call
46058 generate_dwarf_reg_sizes.
46059 * target.def (init_dwarf_reg_sizes_extra): Adjust
46061 * config/msp430/msp430.cc
46062 (msp430_init_dwarf_reg_sizes_extra): Adjust.
46063 * config/rs6000/rs6000.cc
46064 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
46065 * doc/tm.texi: Update.
46067 2023-01-02 Jakub Jelinek <jakub@redhat.com>
46069 * gcc.cc (process_command): Update copyright notice dates.
46070 * gcov-dump.cc (print_version): Ditto.
46071 * gcov.cc (print_version): Ditto.
46072 * gcov-tool.cc (print_version): Ditto.
46073 * gengtype.cc (create_file): Ditto.
46074 * doc/cpp.texi: Bump @copying's copyright year.
46075 * doc/cppinternals.texi: Ditto.
46076 * doc/gcc.texi: Ditto.
46077 * doc/gccint.texi: Ditto.
46078 * doc/gcov.texi: Ditto.
46079 * doc/install.texi: Ditto.
46080 * doc/invoke.texi: Ditto.
46082 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
46083 Uroš Bizjak <ubizjak@gmail.com>
46085 * config/i386/i386.md (extendditi2): New define_insn.
46086 (define_split): Use DWIH mode iterator to treat new extendditi2
46087 identically to existing extendsidi2_1.
46088 (define_peephole2): Likewise.
46089 (define_peephole2): Likewise.
46090 (define_Split): Likewise.
46093 Copyright (C) 2023 Free Software Foundation, Inc.
46095 Copying and distribution of this file, with or without modification,
46096 are permitted in any medium without royalty provided the copyright
46097 notice and this notice are preserved.