1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
26 #include "insn-config.h"
28 #include "hard-reg-set.h"
37 #include "dominance.h"
39 #include "basic-block.h"
44 #include "diagnostic-core.h"
46 #include "addresses.h"
51 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
53 #define regno_save_mode \
54 (this_target_reload->x_regno_save_mode)
55 #define cached_reg_save_code \
56 (this_target_reload->x_cached_reg_save_code)
57 #define cached_reg_restore_code \
58 (this_target_reload->x_cached_reg_restore_code)
60 /* For each hard register, a place on the stack where it can be saved,
64 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
66 /* The number of elements in the subsequent array. */
67 static int save_slots_num
;
69 /* Allocated slots so far. */
70 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved
;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved
;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
82 static HARD_REG_SET referenced_regs
;
85 typedef void refmarker_fn (rtx
*loc
, machine_mode mode
, int hardregno
,
88 static int reg_save_code (int, machine_mode
);
89 static int reg_restore_code (int, machine_mode
);
91 struct saved_hard_reg
;
92 static void initiate_saved_hard_regs (void);
93 static void new_saved_hard_reg (int, int);
94 static void finish_saved_hard_regs (void);
95 static int saved_hard_reg_compare_func (const void *, const void *);
97 static void mark_set_regs (rtx
, const_rtx
, void *);
98 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
99 static refmarker_fn mark_reg_as_referenced
;
100 static refmarker_fn replace_reg_with_saved_mem
;
101 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
103 static int insert_restore (struct insn_chain
*, int, int, int,
105 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
107 static void add_stored_regs (rtx
, const_rtx
, void *);
111 static GTY(()) rtx savepat
;
112 static GTY(()) rtx restpat
;
113 static GTY(()) rtx test_reg
;
114 static GTY(()) rtx test_mem
;
115 static GTY(()) rtx_insn
*saveinsn
;
116 static GTY(()) rtx_insn
*restinsn
;
118 /* Return the INSN_CODE used to save register REG in mode MODE. */
120 reg_save_code (int reg
, machine_mode mode
)
123 if (cached_reg_save_code
[reg
][mode
])
124 return cached_reg_save_code
[reg
][mode
];
125 if (!HARD_REGNO_MODE_OK (reg
, mode
))
127 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
128 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
129 below silences a warning. */
130 gcc_assert (reg
< FIRST_PSEUDO_REGISTER
);
131 cached_reg_save_code
[reg
][mode
] = -1;
132 cached_reg_restore_code
[reg
][mode
] = -1;
136 /* Update the register number and modes of the register
137 and memory operand. */
138 SET_REGNO_RAW (test_reg
, reg
);
139 PUT_MODE (test_reg
, mode
);
140 PUT_MODE (test_mem
, mode
);
142 /* Force re-recognition of the modified insns. */
143 INSN_CODE (saveinsn
) = -1;
144 INSN_CODE (restinsn
) = -1;
146 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
147 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
149 /* Now extract both insns and see if we can meet their
150 constraints. We don't know here whether the save and restore will
151 be in size- or speed-tuned code, so just use the set of enabled
153 ok
= (cached_reg_save_code
[reg
][mode
] != -1
154 && cached_reg_restore_code
[reg
][mode
] != -1);
157 extract_insn (saveinsn
);
158 ok
= constrain_operands (1, get_enabled_alternatives (saveinsn
));
159 extract_insn (restinsn
);
160 ok
&= constrain_operands (1, get_enabled_alternatives (restinsn
));
165 cached_reg_save_code
[reg
][mode
] = -1;
166 cached_reg_restore_code
[reg
][mode
] = -1;
168 gcc_assert (cached_reg_save_code
[reg
][mode
]);
169 return cached_reg_save_code
[reg
][mode
];
172 /* Return the INSN_CODE used to restore register REG in mode MODE. */
174 reg_restore_code (int reg
, machine_mode mode
)
176 if (cached_reg_restore_code
[reg
][mode
])
177 return cached_reg_restore_code
[reg
][mode
];
178 /* Populate our cache. */
179 reg_save_code (reg
, mode
);
180 return cached_reg_restore_code
[reg
][mode
];
183 /* Initialize for caller-save.
185 Look at all the hard registers that are used by a call and for which
186 reginfo.c has not already excluded from being used across a call.
188 Ensure that we can find a mode to save the register and that there is a
189 simple insn to save and restore the register. This latter check avoids
190 problems that would occur if we tried to save the MQ register of some
191 machines directly into memory. */
194 init_caller_save (void)
201 if (caller_save_initialized_p
)
204 caller_save_initialized_p
= true;
206 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
207 /* First find all the registers that we need to deal with and all
208 the modes that they can have. If we can't find a mode to use,
209 we can't have the register live over calls. */
211 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
213 if (call_used_regs
[i
]
214 && !TEST_HARD_REG_BIT (call_fixed_reg_set
, i
))
216 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
218 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
220 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
222 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
227 regno_save_mode
[i
][1] = VOIDmode
;
230 /* The following code tries to approximate the conditions under which
231 we can easily save and restore a register without scratch registers or
232 other complexities. It will usually work, except under conditions where
233 the validity of an insn operand is dependent on the address offset.
234 No such cases are currently known.
236 We first find a typical offset from some BASE_REG_CLASS register.
237 This address is chosen by finding the first register in the class
238 and by finding the smallest power of two that is a valid offset from
239 that register in every mode we will use to save registers. */
241 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
242 if (TEST_HARD_REG_BIT
244 [(int) base_reg_class (regno_save_mode
[i
][1], ADDR_SPACE_GENERIC
,
245 PLUS
, CONST_INT
)], i
))
248 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
250 addr_reg
= gen_rtx_REG (Pmode
, i
);
252 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
254 address
= gen_rtx_PLUS (Pmode
, addr_reg
, gen_int_mode (offset
, Pmode
));
256 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
257 if (regno_save_mode
[i
][1] != VOIDmode
258 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
261 if (i
== FIRST_PSEUDO_REGISTER
)
265 /* If we didn't find a valid address, we must use register indirect. */
269 /* Next we try to form an insn to save and restore the register. We
270 see if such an insn is recognized and meets its constraints.
272 To avoid lots of unnecessary RTL allocation, we construct all the RTL
273 once, then modify the memory and register operands in-place. */
275 test_reg
= gen_rtx_REG (VOIDmode
, 0);
276 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
277 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
278 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
280 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, savepat
, 0, -1, 0);
281 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, restpat
, 0, -1, 0);
283 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
284 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
285 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
287 regno_save_mode
[i
][j
] = VOIDmode
;
290 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
291 if (call_used_regs
[i
])
292 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
299 /* Initialize save areas by showing that we haven't allocated any yet. */
302 init_save_areas (void)
306 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
307 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
308 regno_save_mem
[i
][j
] = 0;
313 /* The structure represents a hard register which should be saved
314 through the call. It is used when the integrated register
315 allocator (IRA) is used and sharing save slots is on. */
316 struct saved_hard_reg
318 /* Order number starting with 0. */
320 /* The hard regno. */
322 /* Execution frequency of all calls through which given hard
323 register should be saved. */
325 /* Stack slot reserved to save the hard register through calls. */
327 /* True if it is first hard register in the chain of hard registers
328 sharing the same stack slot. */
330 /* Order number of the next hard register structure with the same
331 slot in the chain. -1 represents end of the chain. */
335 /* Map: hard register number to the corresponding structure. */
336 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
338 /* The number of all structures representing hard registers should be
339 saved, in order words, the number of used elements in the following
341 static int saved_regs_num
;
343 /* Pointers to all the structures. Index is the order number of the
344 corresponding structure. */
345 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
347 /* First called function for work with saved hard registers. */
349 initiate_saved_hard_regs (void)
354 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
355 hard_reg_map
[i
] = NULL
;
358 /* Allocate and return new saved hard register with given REGNO and
361 new_saved_hard_reg (int regno
, int call_freq
)
363 struct saved_hard_reg
*saved_reg
;
366 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
367 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
368 saved_reg
->num
= saved_regs_num
++;
369 saved_reg
->hard_regno
= regno
;
370 saved_reg
->call_freq
= call_freq
;
371 saved_reg
->first_p
= FALSE
;
372 saved_reg
->next
= -1;
375 /* Free memory allocated for the saved hard registers. */
377 finish_saved_hard_regs (void)
381 for (i
= 0; i
< saved_regs_num
; i
++)
382 free (all_saved_regs
[i
]);
385 /* The function is used to sort the saved hard register structures
386 according their frequency. */
388 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
390 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
391 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
393 if (flag_omit_frame_pointer
)
395 if (p1
->call_freq
- p2
->call_freq
!= 0)
396 return p1
->call_freq
- p2
->call_freq
;
398 else if (p2
->call_freq
- p1
->call_freq
!= 0)
399 return p2
->call_freq
- p1
->call_freq
;
401 return p1
->num
- p2
->num
;
404 /* Allocate save areas for any hard registers that might need saving.
405 We take a conservative approach here and look for call-clobbered hard
406 registers that are assigned to pseudos that cross calls. This may
407 overestimate slightly (especially if some of these registers are later
408 used as spill registers), but it should not be significant.
410 For IRA we use priority coloring to decrease stack slots needed for
411 saving hard registers through calls. We build conflicts for them
416 In the fallback case we should iterate backwards across all possible
417 modes for the save, choosing the largest available one instead of
418 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
420 We do not try to use "move multiple" instructions that exist
421 on some machines (such as the 68k moveml). It could be a win to try
422 and use them when possible. The hard part is doing it in a way that is
423 machine independent since they might be saving non-consecutive
424 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
427 setup_save_areas (void)
430 HARD_REG_SET hard_regs_used
;
431 struct saved_hard_reg
*saved_reg
;
433 struct insn_chain
*chain
, *next
;
435 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
436 reg_set_iterator rsi
;
438 CLEAR_HARD_REG_SET (hard_regs_used
);
440 /* Find every CALL_INSN and record which hard regs are live across the
441 call into HARD_REG_MAP and HARD_REGS_USED. */
442 initiate_saved_hard_regs ();
443 /* Create hard reg saved regs. */
444 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
451 || find_reg_note (insn
, REG_NORETURN
, NULL
))
453 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
454 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
455 &chain
->live_throughout
);
456 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
458 /* Record all registers set in this call insn. These don't
459 need to be saved. N.B. the call insn might set a subreg
460 of a multi-hard-reg pseudo; then the pseudo is considered
461 live during the call, but the subreg that is set
463 CLEAR_HARD_REG_SET (this_insn_sets
);
464 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
465 /* Sibcalls are considered to set the return value. */
466 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
467 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
469 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
470 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
471 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
472 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
473 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
475 if (hard_reg_map
[regno
] != NULL
)
476 hard_reg_map
[regno
]->call_freq
+= freq
;
478 new_saved_hard_reg (regno
, freq
);
479 SET_HARD_REG_BIT (hard_regs_used
, regno
);
481 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
483 cheap
= XEXP (cheap
, 0);
484 /* Look through all live pseudos, mark their hard registers. */
485 EXECUTE_IF_SET_IN_REG_SET
486 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
488 int r
= reg_renumber
[regno
];
491 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
494 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
495 for (; r
< bound
; r
++)
496 if (TEST_HARD_REG_BIT (used_regs
, r
))
498 if (hard_reg_map
[r
] != NULL
)
499 hard_reg_map
[r
]->call_freq
+= freq
;
501 new_saved_hard_reg (r
, freq
);
502 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
503 SET_HARD_REG_BIT (hard_regs_used
, r
);
508 /* If requested, figure out which hard regs can share save slots. */
509 if (optimize
&& flag_ira_share_save_slots
)
512 char *saved_reg_conflicts
;
514 struct saved_hard_reg
*saved_reg2
, *saved_reg3
;
515 int call_saved_regs_num
;
516 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
518 int prev_save_slots_num
;
519 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
521 /* Find saved hard register conflicts. */
522 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
523 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
524 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
527 call_saved_regs_num
= 0;
531 || find_reg_note (insn
, REG_NORETURN
, NULL
))
534 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
536 cheap
= XEXP (cheap
, 0);
538 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
539 &chain
->live_throughout
);
540 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
542 /* Record all registers set in this call insn. These don't
543 need to be saved. N.B. the call insn might set a subreg
544 of a multi-hard-reg pseudo; then the pseudo is considered
545 live during the call, but the subreg that is set
547 CLEAR_HARD_REG_SET (this_insn_sets
);
548 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
549 /* Sibcalls are considered to set the return value,
550 compare df-scan.c:df_get_call_refs. */
551 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
552 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
554 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
555 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
556 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
557 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
558 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
560 gcc_assert (hard_reg_map
[regno
] != NULL
);
561 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
563 /* Look through all live pseudos, mark their hard registers. */
564 EXECUTE_IF_SET_IN_REG_SET
565 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
567 int r
= reg_renumber
[regno
];
570 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
573 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
574 for (; r
< bound
; r
++)
575 if (TEST_HARD_REG_BIT (used_regs
, r
))
576 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
578 for (i
= 0; i
< call_saved_regs_num
; i
++)
580 saved_reg
= call_saved_regs
[i
];
581 for (j
= 0; j
< call_saved_regs_num
; j
++)
584 saved_reg2
= call_saved_regs
[j
];
585 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
587 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
593 /* Sort saved hard regs. */
594 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
595 saved_hard_reg_compare_func
);
596 /* Initiate slots available from the previous reload
598 prev_save_slots_num
= save_slots_num
;
599 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
601 /* Allocate stack slots for the saved hard registers. */
602 for (i
= 0; i
< saved_regs_num
; i
++)
604 saved_reg
= all_saved_regs
[i
];
605 regno
= saved_reg
->hard_regno
;
606 for (j
= 0; j
< i
; j
++)
608 saved_reg2
= all_saved_regs
[j
];
609 if (! saved_reg2
->first_p
)
611 slot
= saved_reg2
->slot
;
612 for (k
= j
; k
>= 0; k
= next_k
)
614 saved_reg3
= all_saved_regs
[k
];
615 next_k
= saved_reg3
->next
;
616 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
621 && (GET_MODE_SIZE (regno_save_mode
[regno
][1])
622 <= GET_MODE_SIZE (regno_save_mode
623 [saved_reg2
->hard_regno
][1])))
627 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
628 regno_save_mem
[regno
][1] = saved_reg
->slot
;
629 saved_reg
->next
= saved_reg2
->next
;
630 saved_reg2
->next
= i
;
631 if (dump_file
!= NULL
)
632 fprintf (dump_file
, "%d uses slot of %d\n",
633 regno
, saved_reg2
->hard_regno
);
639 saved_reg
->first_p
= TRUE
;
640 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
642 slot
= prev_save_slots
[j
];
643 if (slot
== NULL_RTX
)
645 if (GET_MODE_SIZE (regno_save_mode
[regno
][1])
646 <= GET_MODE_SIZE (GET_MODE (slot
))
647 && best_slot_num
< 0)
649 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
652 if (best_slot_num
>= 0)
654 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
658 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
659 if (dump_file
!= NULL
)
661 "%d uses a slot from prev iteration\n", regno
);
662 prev_save_slots
[best_slot_num
] = NULL_RTX
;
663 if (best_slot_num
+ 1 == prev_save_slots_num
)
664 prev_save_slots_num
--;
669 = assign_stack_local_1
670 (regno_save_mode
[regno
][1],
671 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0,
673 if (dump_file
!= NULL
)
674 fprintf (dump_file
, "%d uses a new slot\n", regno
);
676 regno_save_mem
[regno
][1] = saved_reg
->slot
;
677 save_slots
[save_slots_num
++] = saved_reg
->slot
;
680 free (saved_reg_conflicts
);
681 finish_saved_hard_regs ();
685 /* We are not sharing slots.
687 Run through all the call-used hard-registers and allocate
688 space for each in the caller-save area. Try to allocate space
689 in a manner which allows multi-register saves/restores to be done. */
691 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
692 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
696 /* If no mode exists for this size, try another. Also break out
697 if we have already saved this hard register. */
698 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
701 /* See if any register in this group has been saved. */
702 for (k
= 0; k
< j
; k
++)
703 if (regno_save_mem
[i
+ k
][1])
711 for (k
= 0; k
< j
; k
++)
712 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
720 /* We have found an acceptable mode to store in. Since
721 hard register is always saved in the widest mode
722 available, the mode may be wider than necessary, it is
723 OK to reduce the alignment of spill space. We will
724 verify that it is equal to or greater than required
725 when we restore and save the hard register in
726 insert_restore and insert_save. */
728 = assign_stack_local_1 (regno_save_mode
[i
][j
],
729 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
730 0, ASLK_REDUCE_ALIGN
);
732 /* Setup single word save area just in case... */
733 for (k
= 0; k
< j
; k
++)
734 /* This should not depend on WORDS_BIG_ENDIAN.
735 The order of words in regs is the same as in memory. */
736 regno_save_mem
[i
+ k
][1]
737 = adjust_address_nv (regno_save_mem
[i
][j
],
738 regno_save_mode
[i
+ k
][1],
743 /* Now loop again and set the alias set of any save areas we made to
744 the alias set used to represent frame objects. */
745 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
746 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
747 if (regno_save_mem
[i
][j
] != 0)
748 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
753 /* Find the places where hard regs are live across calls and save them. */
756 save_call_clobbered_regs (void)
758 struct insn_chain
*chain
, *next
, *last
= NULL
;
759 machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
761 /* Computed in mark_set_regs, holds all registers set by the current
763 HARD_REG_SET this_insn_sets
;
765 CLEAR_HARD_REG_SET (hard_regs_saved
);
768 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
770 rtx_insn
*insn
= chain
->insn
;
771 enum rtx_code code
= GET_CODE (insn
);
775 gcc_assert (!chain
->is_caller_save_insn
);
777 if (NONDEBUG_INSN_P (insn
))
779 /* If some registers have been saved, see if INSN references
780 any of them. We must restore them before the insn if so. */
785 HARD_REG_SET this_insn_sets
;
787 if (code
== JUMP_INSN
)
788 /* Restore all registers if this is a JUMP_INSN. */
789 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
792 CLEAR_HARD_REG_SET (referenced_regs
);
793 mark_referenced_regs (&PATTERN (insn
),
794 mark_reg_as_referenced
, NULL
);
795 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
798 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
799 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
800 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
,
802 /* If a saved register is set after the call, this means we no
803 longer should restore it. This can happen when parts of a
804 multi-word pseudo do not conflict with other pseudos, so
805 IRA may allocate the same hard register for both. One may
806 be live across the call, while the other is set
808 CLEAR_HARD_REG_SET (this_insn_sets
);
809 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
810 AND_COMPL_HARD_REG_SET (hard_regs_saved
, this_insn_sets
);
813 if (code
== CALL_INSN
814 && ! SIBLING_CALL_P (insn
)
815 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
818 HARD_REG_SET hard_regs_to_save
;
819 HARD_REG_SET call_def_reg_set
;
820 reg_set_iterator rsi
;
823 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
825 cheap
= XEXP (cheap
, 0);
827 /* Use the register life information in CHAIN to compute which
828 regs are live during the call. */
829 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
830 &chain
->live_throughout
);
831 /* Save hard registers always in the widest mode available. */
832 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
833 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
834 save_mode
[regno
] = regno_save_mode
[regno
][1];
836 save_mode
[regno
] = VOIDmode
;
838 /* Look through all live pseudos, mark their hard registers
839 and choose proper mode for saving. */
840 EXECUTE_IF_SET_IN_REG_SET
841 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
843 int r
= reg_renumber
[regno
];
847 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
849 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
850 mode
= HARD_REGNO_CALLER_SAVE_MODE
851 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
852 if (GET_MODE_BITSIZE (mode
)
853 > GET_MODE_BITSIZE (save_mode
[r
]))
856 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
859 /* Record all registers set in this call insn. These don't need
860 to be saved. N.B. the call insn might set a subreg of a
861 multi-hard-reg pseudo; then the pseudo is considered live
862 during the call, but the subreg that is set isn't. */
863 CLEAR_HARD_REG_SET (this_insn_sets
);
864 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
866 /* Compute which hard regs must be saved before this call. */
867 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
868 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
869 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
870 get_call_reg_set_usage (insn
, &call_def_reg_set
,
872 AND_HARD_REG_SET (hard_regs_to_save
, call_def_reg_set
);
874 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
875 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
876 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
878 /* Must recompute n_regs_saved. */
880 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
881 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
885 && HARD_REGISTER_P (cheap
)
886 && TEST_HARD_REG_BIT (call_used_reg_set
, REGNO (cheap
)))
889 rtx pat
= PATTERN (insn
);
890 if (GET_CODE (pat
) == PARALLEL
)
891 pat
= XVECEXP (pat
, 0, 0);
892 dest
= SET_DEST (pat
);
893 /* For multiple return values dest is PARALLEL.
894 Currently we handle only single return value case. */
897 newpat
= gen_rtx_SET (VOIDmode
, cheap
, copy_rtx (dest
));
898 chain
= insert_one_insn (chain
, 0, -1, newpat
);
904 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
905 mark_referenced_regs (&PATTERN (insn
),
906 replace_reg_with_saved_mem
,
909 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
912 /* At the end of the basic block, we must restore any registers that
913 remain saved. If the last insn in the block is a JUMP_INSN, put
914 the restore before the insn, otherwise, put it after the insn. */
917 && DEBUG_INSN_P (insn
)
919 && last
->block
== chain
->block
)
921 rtx_insn
*ins
, *prev
;
922 basic_block bb
= BLOCK_FOR_INSN (insn
);
924 /* When adding hard reg restores after a DEBUG_INSN, move
925 all notes between last real insn and this DEBUG_INSN after
926 the DEBUG_INSN, otherwise we could get code
927 -g/-g0 differences. */
928 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
930 prev
= PREV_INSN (ins
);
933 SET_NEXT_INSN (prev
) = NEXT_INSN (ins
);
934 SET_PREV_INSN (NEXT_INSN (ins
)) = prev
;
935 SET_PREV_INSN (ins
) = insn
;
936 SET_NEXT_INSN (ins
) = NEXT_INSN (insn
);
937 SET_NEXT_INSN (insn
) = ins
;
939 SET_PREV_INSN (NEXT_INSN (ins
)) = ins
;
940 if (BB_END (bb
) == insn
)
944 gcc_assert (DEBUG_INSN_P (ins
));
950 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
951 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
952 regno
+= insert_restore (chain
, JUMP_P (insn
),
953 regno
, MOVE_MAX_WORDS
, save_mode
);
958 /* Here from note_stores, or directly from save_call_clobbered_regs, when
959 an insn stores a value in a register.
960 Set the proper bit or bits in this_insn_sets. All pseudos that have
961 been assigned hard regs have had their register number changed already,
962 so we can ignore pseudos. */
964 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
966 int regno
, endregno
, i
;
967 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
969 if (GET_CODE (reg
) == SUBREG
)
971 rtx inner
= SUBREG_REG (reg
);
972 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
974 regno
= subreg_regno (reg
);
975 endregno
= regno
+ subreg_nregs (reg
);
978 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
981 endregno
= END_HARD_REGNO (reg
);
986 for (i
= regno
; i
< endregno
; i
++)
987 SET_HARD_REG_BIT (*this_insn_sets
, i
);
990 /* Here from note_stores when an insn stores a value in a register.
991 Set the proper bit or bits in the passed regset. All pseudos that have
992 been assigned hard regs have had their register number changed already,
993 so we can ignore pseudos. */
995 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
997 int regno
, endregno
, i
;
998 machine_mode mode
= GET_MODE (reg
);
1001 if (GET_CODE (setter
) == CLOBBER
)
1004 if (GET_CODE (reg
) == SUBREG
1005 && REG_P (SUBREG_REG (reg
))
1006 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
1008 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
1009 GET_MODE (SUBREG_REG (reg
)),
1012 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
1013 endregno
= regno
+ subreg_nregs (reg
);
1017 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
1020 regno
= REGNO (reg
) + offset
;
1021 endregno
= end_hard_regno (mode
, regno
);
1024 for (i
= regno
; i
< endregno
; i
++)
1025 SET_REGNO_REG_SET ((regset
) data
, i
);
1028 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1030 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
1032 enum rtx_code code
= GET_CODE (*loc
);
1037 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
1038 if (code
== SET
|| code
== CLOBBER
)
1040 loc
= &SET_DEST (*loc
);
1041 code
= GET_CODE (*loc
);
1042 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
1043 || code
== PC
|| code
== CC0
1044 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
1045 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
1046 /* If we're setting only part of a multi-word register,
1047 we shall mark it as referenced, because the words
1048 that are not being set should be restored. */
1049 && ((GET_MODE_SIZE (GET_MODE (*loc
))
1050 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
))))
1051 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
)))
1052 <= UNITS_PER_WORD
))))
1055 if (code
== MEM
|| code
== SUBREG
)
1057 loc
= &XEXP (*loc
, 0);
1058 code
= GET_CODE (*loc
);
1063 int regno
= REGNO (*loc
);
1064 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1065 : reg_renumber
[regno
]);
1068 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1070 /* ??? Will we ever end up with an equiv expression in a debug
1071 insn, that would have required restoring a reg, or will
1072 reload take care of it for us? */
1074 /* If this is a pseudo that did not get a hard register, scan its
1075 memory location, since it might involve the use of another
1076 register, which might be saved. */
1077 else if (reg_equiv_mem (regno
) != 0)
1078 mark_referenced_regs (&XEXP (reg_equiv_mem (regno
), 0), mark
, arg
);
1079 else if (reg_equiv_address (regno
) != 0)
1080 mark_referenced_regs (®_equiv_address (regno
), mark
, arg
);
1084 fmt
= GET_RTX_FORMAT (code
);
1085 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1088 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1089 else if (fmt
[i
] == 'E')
1090 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1091 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1095 /* Parameter function for mark_referenced_regs() that adds registers
1096 present in the insn and in equivalent mems and addresses to
1100 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1103 void *arg ATTRIBUTE_UNUSED
)
1105 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1108 /* Parameter function for mark_referenced_regs() that replaces
1109 registers referenced in a debug_insn that would have been restored,
1110 should it be a non-debug_insn, with their save locations. */
1113 replace_reg_with_saved_mem (rtx
*loc
,
1118 unsigned int i
, nregs
= hard_regno_nregs
[regno
][mode
];
1120 machine_mode
*save_mode
= (machine_mode
*)arg
;
1122 for (i
= 0; i
< nregs
; i
++)
1123 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1126 /* If none of the registers in the range would need restoring, we're
1132 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1136 && regno_save_mem
[regno
][nregs
])
1138 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1140 if (nregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
1141 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1143 if (GET_MODE (mem
) != mode
)
1145 /* This is gen_lowpart_if_possible(), but without validating
1146 the newly-formed address. */
1149 if (WORDS_BIG_ENDIAN
)
1150 offset
= (MAX (GET_MODE_SIZE (GET_MODE (mem
)), UNITS_PER_WORD
)
1151 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1152 if (BYTES_BIG_ENDIAN
)
1153 /* Adjust the address so that the address-after-the-data is
1155 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1156 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (mem
))));
1158 mem
= adjust_address_nv (mem
, mode
, offset
);
1163 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1164 for (i
= 0; i
< nregs
; i
++)
1165 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1167 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1168 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1172 machine_mode smode
= save_mode
[regno
];
1173 gcc_assert (smode
!= VOIDmode
);
1174 if (hard_regno_nregs
[regno
][smode
] > 1)
1175 smode
= mode_for_size (GET_MODE_SIZE (mode
) / nregs
,
1176 GET_MODE_CLASS (mode
), 0);
1177 XVECEXP (mem
, 0, i
) = gen_rtx_REG (smode
, regno
+ i
);
1181 gcc_assert (GET_MODE (mem
) == mode
);
1186 /* Insert a sequence of insns to restore. Place these insns in front of
1187 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1188 the maximum number of registers which should be restored during this call.
1189 It should never be less than 1 since we only work with entire registers.
1191 Note that we have verified in init_caller_save that we can do this
1192 with a simple SET, so use it. Set INSN_CODE to what we save there
1193 since the address might not be valid so the insn might not be recognized.
1194 These insns will be reloaded and have register elimination done by
1195 find_reload, so we need not worry about that here.
1197 Return the extra number of registers saved. */
1200 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
1201 int maxrestore
, machine_mode
*save_mode
)
1206 unsigned int numregs
= 0;
1207 struct insn_chain
*new_chain
;
1210 /* A common failure mode if register status is not correct in the
1211 RTL is for this routine to be called with a REGNO we didn't
1212 expect to save. That will cause us to write an insn with a (nil)
1213 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1214 later, check for this common case here instead. This will remove
1215 one step in debugging such problems. */
1216 gcc_assert (regno_save_mem
[regno
][1]);
1218 /* Get the pattern to emit and update our status.
1220 See if we can restore `maxrestore' registers at once. Work
1221 backwards to the single register case. */
1222 for (i
= maxrestore
; i
> 0; i
--)
1227 if (regno_save_mem
[regno
][i
] == 0)
1230 for (j
= 0; j
< i
; j
++)
1231 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1236 /* Must do this one restore at a time. */
1244 mem
= regno_save_mem
[regno
][numregs
];
1245 if (save_mode
[regno
] != VOIDmode
1246 && save_mode
[regno
] != GET_MODE (mem
)
1247 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1248 /* Check that insn to restore REGNO in save_mode[regno] is
1250 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1251 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1253 mem
= copy_rtx (mem
);
1255 /* Verify that the alignment of spill space is equal to or greater
1257 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1258 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1260 pat
= gen_rtx_SET (VOIDmode
,
1261 gen_rtx_REG (GET_MODE (mem
),
1263 code
= reg_restore_code (regno
, GET_MODE (mem
));
1264 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1266 /* Clear status for all registers we restored. */
1267 for (k
= 0; k
< i
; k
++)
1269 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1270 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1274 /* Tell our callers how many extra registers we saved/restored. */
1278 /* Like insert_restore above, but save registers instead. */
1281 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
1282 HARD_REG_SET (*to_save
), machine_mode
*save_mode
)
1288 unsigned int numregs
= 0;
1289 struct insn_chain
*new_chain
;
1292 /* A common failure mode if register status is not correct in the
1293 RTL is for this routine to be called with a REGNO we didn't
1294 expect to save. That will cause us to write an insn with a (nil)
1295 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1296 later, check for this common case here. This will remove one
1297 step in debugging such problems. */
1298 gcc_assert (regno_save_mem
[regno
][1]);
1300 /* Get the pattern to emit and update our status.
1302 See if we can save several registers with a single instruction.
1303 Work backwards to the single register case. */
1304 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1308 if (regno_save_mem
[regno
][i
] == 0)
1311 for (j
= 0; j
< i
; j
++)
1312 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1317 /* Must do this one save at a time. */
1325 mem
= regno_save_mem
[regno
][numregs
];
1326 if (save_mode
[regno
] != VOIDmode
1327 && save_mode
[regno
] != GET_MODE (mem
)
1328 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1329 /* Check that insn to save REGNO in save_mode[regno] is
1331 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1332 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1334 mem
= copy_rtx (mem
);
1336 /* Verify that the alignment of spill space is equal to or greater
1338 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1339 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1341 pat
= gen_rtx_SET (VOIDmode
, mem
,
1342 gen_rtx_REG (GET_MODE (mem
),
1344 code
= reg_save_code (regno
, GET_MODE (mem
));
1345 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1347 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1348 for (k
= 0; k
< numregs
; k
++)
1350 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1351 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1355 /* Tell our callers how many extra registers we saved/restored. */
1359 /* A note_uses callback used by insert_one_insn. Add the hard-register
1360 equivalent of each REG to regset DATA. */
1363 add_used_regs (rtx
*loc
, void *data
)
1365 subrtx_iterator::array_type array
;
1366 FOR_EACH_SUBRTX (iter
, array
, *loc
, NONCONST
)
1368 const_rtx x
= *iter
;
1371 unsigned int regno
= REGNO (x
);
1372 if (HARD_REGISTER_NUM_P (regno
))
1373 bitmap_set_range ((regset
) data
, regno
,
1374 hard_regno_nregs
[regno
][GET_MODE (x
)]);
1376 gcc_checking_assert (reg_renumber
[regno
] < 0);
1381 /* Emit a new caller-save insn and set the code. */
1382 static struct insn_chain
*
1383 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1385 rtx_insn
*insn
= chain
->insn
;
1386 struct insn_chain
*new_chain
;
1389 /* If INSN references CC0, put our insns in front of the insn that sets
1390 CC0. This is always safe, since the only way we could be passed an
1391 insn that references CC0 is for a restore, and doing a restore earlier
1392 isn't a problem. We do, however, assume here that CALL_INSNs don't
1393 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1395 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1397 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1398 chain
= chain
->prev
, insn
= chain
->insn
;
1401 new_chain
= new_insn_chain ();
1406 new_chain
->prev
= chain
->prev
;
1407 if (new_chain
->prev
!= 0)
1408 new_chain
->prev
->next
= new_chain
;
1410 reload_insn_chain
= new_chain
;
1412 chain
->prev
= new_chain
;
1413 new_chain
->next
= chain
;
1414 new_chain
->insn
= emit_insn_before (pat
, insn
);
1415 /* ??? It would be nice if we could exclude the already / still saved
1416 registers from the live sets. */
1417 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1418 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1419 &new_chain
->live_throughout
);
1420 /* If CHAIN->INSN is a call, then the registers which contain
1421 the arguments to the function are live in the new insn. */
1422 if (CALL_P (chain
->insn
))
1423 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1425 link
= XEXP (link
, 1))
1426 note_uses (&XEXP (link
, 0), add_used_regs
,
1427 &new_chain
->live_throughout
);
1429 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1430 if (chain
->insn
== BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1431 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1435 new_chain
->next
= chain
->next
;
1436 if (new_chain
->next
!= 0)
1437 new_chain
->next
->prev
= new_chain
;
1438 chain
->next
= new_chain
;
1439 new_chain
->prev
= chain
;
1440 new_chain
->insn
= emit_insn_after (pat
, insn
);
1441 /* ??? It would be nice if we could exclude the already / still saved
1442 registers from the live sets, and observe REG_UNUSED notes. */
1443 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1444 /* Registers that are set in CHAIN->INSN live in the new insn.
1445 (Unless there is a REG_UNUSED note for them, but we don't
1446 look for them here.) */
1447 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
1448 &new_chain
->live_throughout
);
1449 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1450 if (chain
->insn
== BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1451 BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1453 new_chain
->block
= chain
->block
;
1454 new_chain
->is_caller_save_insn
= 1;
1456 INSN_CODE (new_chain
->insn
) = code
;
1459 #include "gt-caller-save.h"