1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
30 #include "insn-config.h"
36 #include "addresses.h"
40 #include "function-abi.h"
42 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
44 #define regno_save_mode \
45 (this_target_reload->x_regno_save_mode)
46 #define cached_reg_save_code \
47 (this_target_reload->x_cached_reg_save_code)
48 #define cached_reg_restore_code \
49 (this_target_reload->x_cached_reg_restore_code)
51 /* For each hard register, a place on the stack where it can be saved,
55 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
57 /* The number of elements in the subsequent array. */
58 static int save_slots_num
;
60 /* Allocated slots so far. */
61 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
63 /* Set of hard regs currently residing in save area (during insn scan). */
65 static HARD_REG_SET hard_regs_saved
;
67 /* Number of registers currently in hard_regs_saved. */
69 static int n_regs_saved
;
71 /* Computed by mark_referenced_regs, all regs referenced in a given
73 static HARD_REG_SET referenced_regs
;
76 typedef void refmarker_fn (rtx
*loc
, machine_mode mode
, int hardregno
,
79 static int reg_save_code (int, machine_mode
);
80 static int reg_restore_code (int, machine_mode
);
82 struct saved_hard_reg
;
83 static void initiate_saved_hard_regs (void);
84 static void new_saved_hard_reg (int, int);
85 static void finish_saved_hard_regs (void);
86 static int saved_hard_reg_compare_func (const void *, const void *);
88 static void mark_set_regs (rtx
, const_rtx
, void *);
89 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
90 static refmarker_fn mark_reg_as_referenced
;
91 static refmarker_fn replace_reg_with_saved_mem
;
92 static int insert_save (class insn_chain
*, int, HARD_REG_SET
*,
94 static int insert_restore (class insn_chain
*, int, int, int,
96 static class insn_chain
*insert_one_insn (class insn_chain
*, int, int,
98 static void add_stored_regs (rtx
, const_rtx
, void *);
102 static GTY(()) rtx savepat
;
103 static GTY(()) rtx restpat
;
104 static GTY(()) rtx test_reg
;
105 static GTY(()) rtx test_mem
;
106 static GTY(()) rtx_insn
*saveinsn
;
107 static GTY(()) rtx_insn
*restinsn
;
109 /* Return the INSN_CODE used to save register REG in mode MODE. */
111 reg_save_code (int reg
, machine_mode mode
)
114 if (cached_reg_save_code
[reg
][mode
])
115 return cached_reg_save_code
[reg
][mode
];
116 if (!targetm
.hard_regno_mode_ok (reg
, mode
))
118 /* Depending on how targetm.hard_regno_mode_ok is defined, range
119 propagation might deduce here that reg >= FIRST_PSEUDO_REGISTER.
120 So the assert below silences a warning. */
121 gcc_assert (reg
< FIRST_PSEUDO_REGISTER
);
122 cached_reg_save_code
[reg
][mode
] = -1;
123 cached_reg_restore_code
[reg
][mode
] = -1;
127 /* Update the register number and modes of the register
128 and memory operand. */
129 set_mode_and_regno (test_reg
, mode
, reg
);
130 PUT_MODE (test_mem
, mode
);
132 /* Force re-recognition of the modified insns. */
133 INSN_CODE (saveinsn
) = -1;
134 INSN_CODE (restinsn
) = -1;
136 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
137 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
139 /* Now extract both insns and see if we can meet their
140 constraints. We don't know here whether the save and restore will
141 be in size- or speed-tuned code, so just use the set of enabled
143 ok
= (cached_reg_save_code
[reg
][mode
] != -1
144 && cached_reg_restore_code
[reg
][mode
] != -1);
147 extract_insn (saveinsn
);
148 ok
= constrain_operands (1, get_enabled_alternatives (saveinsn
));
149 extract_insn (restinsn
);
150 ok
&= constrain_operands (1, get_enabled_alternatives (restinsn
));
155 cached_reg_save_code
[reg
][mode
] = -1;
156 cached_reg_restore_code
[reg
][mode
] = -1;
158 gcc_assert (cached_reg_save_code
[reg
][mode
]);
159 return cached_reg_save_code
[reg
][mode
];
162 /* Return the INSN_CODE used to restore register REG in mode MODE. */
164 reg_restore_code (int reg
, machine_mode mode
)
166 if (cached_reg_restore_code
[reg
][mode
])
167 return cached_reg_restore_code
[reg
][mode
];
168 /* Populate our cache. */
169 reg_save_code (reg
, mode
);
170 return cached_reg_restore_code
[reg
][mode
];
173 /* Initialize for caller-save.
175 Look at all the hard registers that are used by a call and for which
176 reginfo.c has not already excluded from being used across a call.
178 Ensure that we can find a mode to save the register and that there is a
179 simple insn to save and restore the register. This latter check avoids
180 problems that would occur if we tried to save the MQ register of some
181 machines directly into memory. */
184 init_caller_save (void)
191 if (caller_save_initialized_p
)
194 caller_save_initialized_p
= true;
196 /* First find all the registers that we need to deal with and all
197 the modes that they can have. If we can't find a mode to use,
198 we can't have the register live over calls. */
200 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
201 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
203 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
, VOIDmode
);
204 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
205 CLEAR_HARD_REG_BIT (savable_regs
, i
);
208 /* The following code tries to approximate the conditions under which
209 we can easily save and restore a register without scratch registers or
210 other complexities. It will usually work, except under conditions where
211 the validity of an insn operand is dependent on the address offset.
212 No such cases are currently known.
214 We first find a typical offset from some BASE_REG_CLASS register.
215 This address is chosen by finding the first register in the class
216 and by finding the smallest power of two that is a valid offset from
217 that register in every mode we will use to save registers. */
219 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
220 if (TEST_HARD_REG_BIT
222 [(int) base_reg_class (regno_save_mode
[i
][1], ADDR_SPACE_GENERIC
,
223 PLUS
, CONST_INT
)], i
))
226 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
228 addr_reg
= gen_rtx_REG (Pmode
, i
);
230 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
232 address
= gen_rtx_PLUS (Pmode
, addr_reg
, gen_int_mode (offset
, Pmode
));
234 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
235 if (regno_save_mode
[i
][1] != VOIDmode
236 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
239 if (i
== FIRST_PSEUDO_REGISTER
)
243 /* If we didn't find a valid address, we must use register indirect. */
247 /* Next we try to form an insn to save and restore the register. We
248 see if such an insn is recognized and meets its constraints.
250 To avoid lots of unnecessary RTL allocation, we construct all the RTL
251 once, then modify the memory and register operands in-place. */
253 test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
254 test_mem
= gen_rtx_MEM (word_mode
, address
);
255 savepat
= gen_rtx_SET (test_mem
, test_reg
);
256 restpat
= gen_rtx_SET (test_reg
, test_mem
);
258 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, savepat
, 0, -1, 0);
259 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, restpat
, 0, -1, 0);
261 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
262 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
263 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
265 regno_save_mode
[i
][j
] = VOIDmode
;
267 CLEAR_HARD_REG_BIT (savable_regs
, i
);
273 /* Initialize save areas by showing that we haven't allocated any yet. */
276 init_save_areas (void)
280 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
281 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
282 regno_save_mem
[i
][j
] = 0;
287 /* The structure represents a hard register which should be saved
288 through the call. It is used when the integrated register
289 allocator (IRA) is used and sharing save slots is on. */
290 struct saved_hard_reg
292 /* Order number starting with 0. */
294 /* The hard regno. */
296 /* Execution frequency of all calls through which given hard
297 register should be saved. */
299 /* Stack slot reserved to save the hard register through calls. */
301 /* True if it is first hard register in the chain of hard registers
302 sharing the same stack slot. */
304 /* Order number of the next hard register structure with the same
305 slot in the chain. -1 represents end of the chain. */
309 /* Map: hard register number to the corresponding structure. */
310 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
312 /* The number of all structures representing hard registers should be
313 saved, in order words, the number of used elements in the following
315 static int saved_regs_num
;
317 /* Pointers to all the structures. Index is the order number of the
318 corresponding structure. */
319 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
321 /* First called function for work with saved hard registers. */
323 initiate_saved_hard_regs (void)
328 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
329 hard_reg_map
[i
] = NULL
;
332 /* Allocate and return new saved hard register with given REGNO and
335 new_saved_hard_reg (int regno
, int call_freq
)
337 struct saved_hard_reg
*saved_reg
;
340 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
341 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
342 saved_reg
->num
= saved_regs_num
++;
343 saved_reg
->hard_regno
= regno
;
344 saved_reg
->call_freq
= call_freq
;
345 saved_reg
->first_p
= FALSE
;
346 saved_reg
->next
= -1;
349 /* Free memory allocated for the saved hard registers. */
351 finish_saved_hard_regs (void)
355 for (i
= 0; i
< saved_regs_num
; i
++)
356 free (all_saved_regs
[i
]);
359 /* The function is used to sort the saved hard register structures
360 according their frequency. */
362 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
364 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
365 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
367 if (flag_omit_frame_pointer
)
369 if (p1
->call_freq
- p2
->call_freq
!= 0)
370 return p1
->call_freq
- p2
->call_freq
;
372 else if (p2
->call_freq
- p1
->call_freq
!= 0)
373 return p2
->call_freq
- p1
->call_freq
;
375 return p1
->num
- p2
->num
;
378 /* Allocate save areas for any hard registers that might need saving.
379 We take a conservative approach here and look for call-clobbered hard
380 registers that are assigned to pseudos that cross calls. This may
381 overestimate slightly (especially if some of these registers are later
382 used as spill registers), but it should not be significant.
384 For IRA we use priority coloring to decrease stack slots needed for
385 saving hard registers through calls. We build conflicts for them
390 In the fallback case we should iterate backwards across all possible
391 modes for the save, choosing the largest available one instead of
392 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
394 We do not try to use "move multiple" instructions that exist
395 on some machines (such as the 68k moveml). It could be a win to try
396 and use them when possible. The hard part is doing it in a way that is
397 machine independent since they might be saving non-consecutive
398 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
401 setup_save_areas (void)
404 HARD_REG_SET hard_regs_used
;
405 struct saved_hard_reg
*saved_reg
;
407 class insn_chain
*chain
, *next
;
409 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
410 reg_set_iterator rsi
;
412 CLEAR_HARD_REG_SET (hard_regs_used
);
414 /* Find every CALL_INSN and record which hard regs are live across the
415 call into HARD_REG_MAP and HARD_REGS_USED. */
416 initiate_saved_hard_regs ();
417 /* Create hard reg saved regs. */
418 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
425 || find_reg_note (insn
, REG_NORETURN
, NULL
))
427 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
428 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
429 &chain
->live_throughout
);
430 used_regs
= insn_callee_abi (insn
).full_reg_clobbers ();
431 /* ??? This preserves traditional behavior; it might not be needed. */
432 used_regs
|= fixed_reg_set
;
434 /* Record all registers set in this call insn. These don't
435 need to be saved. N.B. the call insn might set a subreg
436 of a multi-hard-reg pseudo; then the pseudo is considered
437 live during the call, but the subreg that is set
439 CLEAR_HARD_REG_SET (this_insn_sets
);
440 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
441 /* Sibcalls are considered to set the return value. */
442 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
443 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
445 used_regs
&= ~(fixed_reg_set
| this_insn_sets
);
446 hard_regs_to_save
&= used_regs
& savable_regs
;
447 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
448 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
450 if (hard_reg_map
[regno
] != NULL
)
451 hard_reg_map
[regno
]->call_freq
+= freq
;
453 new_saved_hard_reg (regno
, freq
);
454 SET_HARD_REG_BIT (hard_regs_used
, regno
);
456 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
458 cheap
= XEXP (cheap
, 0);
459 /* Look through all live pseudos, mark their hard registers. */
460 EXECUTE_IF_SET_IN_REG_SET
461 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
463 int r
= reg_renumber
[regno
];
466 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
469 bound
= r
+ hard_regno_nregs (r
, PSEUDO_REGNO_MODE (regno
));
470 for (; r
< bound
; r
++)
471 if (TEST_HARD_REG_BIT (used_regs
, r
))
473 if (hard_reg_map
[r
] != NULL
)
474 hard_reg_map
[r
]->call_freq
+= freq
;
476 new_saved_hard_reg (r
, freq
);
477 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
478 SET_HARD_REG_BIT (hard_regs_used
, r
);
483 /* If requested, figure out which hard regs can share save slots. */
484 if (optimize
&& flag_ira_share_save_slots
)
487 char *saved_reg_conflicts
;
489 struct saved_hard_reg
*saved_reg2
, *saved_reg3
;
490 int call_saved_regs_num
;
491 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
493 int prev_save_slots_num
;
494 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
496 /* Find saved hard register conflicts. */
497 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
498 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
499 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
502 call_saved_regs_num
= 0;
506 || find_reg_note (insn
, REG_NORETURN
, NULL
))
509 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
511 cheap
= XEXP (cheap
, 0);
513 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
514 &chain
->live_throughout
);
515 used_regs
= insn_callee_abi (insn
).full_reg_clobbers ();
516 /* ??? This preserves traditional behavior; it might not
518 used_regs
|= fixed_reg_set
;
520 /* Record all registers set in this call insn. These don't
521 need to be saved. N.B. the call insn might set a subreg
522 of a multi-hard-reg pseudo; then the pseudo is considered
523 live during the call, but the subreg that is set
525 CLEAR_HARD_REG_SET (this_insn_sets
);
526 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
527 /* Sibcalls are considered to set the return value,
528 compare df-scan.c:df_get_call_refs. */
529 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
530 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
532 used_regs
&= ~(fixed_reg_set
| this_insn_sets
);
533 hard_regs_to_save
&= used_regs
& savable_regs
;
534 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
535 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
537 gcc_assert (hard_reg_map
[regno
] != NULL
);
538 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
540 /* Look through all live pseudos, mark their hard registers. */
541 EXECUTE_IF_SET_IN_REG_SET
542 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
544 int r
= reg_renumber
[regno
];
547 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
550 bound
= r
+ hard_regno_nregs (r
, PSEUDO_REGNO_MODE (regno
));
551 for (; r
< bound
; r
++)
552 if (TEST_HARD_REG_BIT (used_regs
, r
))
553 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
555 for (i
= 0; i
< call_saved_regs_num
; i
++)
557 saved_reg
= call_saved_regs
[i
];
558 for (j
= 0; j
< call_saved_regs_num
; j
++)
561 saved_reg2
= call_saved_regs
[j
];
562 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
564 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
570 /* Sort saved hard regs. */
571 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
572 saved_hard_reg_compare_func
);
573 /* Initiate slots available from the previous reload
575 prev_save_slots_num
= save_slots_num
;
576 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
578 /* Allocate stack slots for the saved hard registers. */
579 for (i
= 0; i
< saved_regs_num
; i
++)
581 saved_reg
= all_saved_regs
[i
];
582 regno
= saved_reg
->hard_regno
;
583 for (j
= 0; j
< i
; j
++)
585 saved_reg2
= all_saved_regs
[j
];
586 if (! saved_reg2
->first_p
)
588 slot
= saved_reg2
->slot
;
589 for (k
= j
; k
>= 0; k
= next_k
)
591 saved_reg3
= all_saved_regs
[k
];
592 next_k
= saved_reg3
->next
;
593 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
598 && known_le (GET_MODE_SIZE (regno_save_mode
[regno
][1]),
599 GET_MODE_SIZE (regno_save_mode
600 [saved_reg2
->hard_regno
][1])))
604 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
605 regno_save_mem
[regno
][1] = saved_reg
->slot
;
606 saved_reg
->next
= saved_reg2
->next
;
607 saved_reg2
->next
= i
;
608 if (dump_file
!= NULL
)
609 fprintf (dump_file
, "%d uses slot of %d\n",
610 regno
, saved_reg2
->hard_regno
);
616 saved_reg
->first_p
= TRUE
;
617 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
619 slot
= prev_save_slots
[j
];
620 if (slot
== NULL_RTX
)
622 if (known_le (GET_MODE_SIZE (regno_save_mode
[regno
][1]),
623 GET_MODE_SIZE (GET_MODE (slot
)))
624 && best_slot_num
< 0)
626 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
629 if (best_slot_num
>= 0)
631 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
635 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
636 if (dump_file
!= NULL
)
638 "%d uses a slot from prev iteration\n", regno
);
639 prev_save_slots
[best_slot_num
] = NULL_RTX
;
640 if (best_slot_num
+ 1 == prev_save_slots_num
)
641 prev_save_slots_num
--;
646 = assign_stack_local_1
647 (regno_save_mode
[regno
][1],
648 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0,
650 if (dump_file
!= NULL
)
651 fprintf (dump_file
, "%d uses a new slot\n", regno
);
653 regno_save_mem
[regno
][1] = saved_reg
->slot
;
654 save_slots
[save_slots_num
++] = saved_reg
->slot
;
657 free (saved_reg_conflicts
);
658 finish_saved_hard_regs ();
662 /* We are not sharing slots.
664 Run through all the call-used hard-registers and allocate
665 space for each in the caller-save area. Try to allocate space
666 in a manner which allows multi-register saves/restores to be done. */
668 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
669 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
673 /* If no mode exists for this size, try another. Also break out
674 if we have already saved this hard register. */
675 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
678 /* See if any register in this group has been saved. */
679 for (k
= 0; k
< j
; k
++)
680 if (regno_save_mem
[i
+ k
][1])
688 for (k
= 0; k
< j
; k
++)
689 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
697 /* We have found an acceptable mode to store in. Since
698 hard register is always saved in the widest mode
699 available, the mode may be wider than necessary, it is
700 OK to reduce the alignment of spill space. We will
701 verify that it is equal to or greater than required
702 when we restore and save the hard register in
703 insert_restore and insert_save. */
705 = assign_stack_local_1 (regno_save_mode
[i
][j
],
706 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
707 0, ASLK_REDUCE_ALIGN
);
709 /* Setup single word save area just in case... */
710 for (k
= 0; k
< j
; k
++)
711 /* This should not depend on WORDS_BIG_ENDIAN.
712 The order of words in regs is the same as in memory. */
713 regno_save_mem
[i
+ k
][1]
714 = adjust_address_nv (regno_save_mem
[i
][j
],
715 regno_save_mode
[i
+ k
][1],
720 /* Now loop again and set the alias set of any save areas we made to
721 the alias set used to represent frame objects. */
722 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
723 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
724 if (regno_save_mem
[i
][j
] != 0)
725 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
730 /* Find the places where hard regs are live across calls and save them. */
733 save_call_clobbered_regs (void)
735 class insn_chain
*chain
, *next
, *last
= NULL
;
736 machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
738 /* Computed in mark_set_regs, holds all registers set by the current
740 HARD_REG_SET this_insn_sets
;
742 CLEAR_HARD_REG_SET (hard_regs_saved
);
745 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
747 rtx_insn
*insn
= chain
->insn
;
748 enum rtx_code code
= GET_CODE (insn
);
752 gcc_assert (!chain
->is_caller_save_insn
);
754 if (NONDEBUG_INSN_P (insn
))
756 /* If some registers have been saved, see if INSN references
757 any of them. We must restore them before the insn if so. */
762 HARD_REG_SET this_insn_sets
;
764 if (code
== JUMP_INSN
)
765 /* Restore all registers if this is a JUMP_INSN. */
766 referenced_regs
= hard_regs_saved
;
769 CLEAR_HARD_REG_SET (referenced_regs
);
770 mark_referenced_regs (&PATTERN (insn
),
771 mark_reg_as_referenced
, NULL
);
772 referenced_regs
&= hard_regs_saved
;
775 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
776 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
777 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
,
779 /* If a saved register is set after the call, this means we no
780 longer should restore it. This can happen when parts of a
781 multi-word pseudo do not conflict with other pseudos, so
782 IRA may allocate the same hard register for both. One may
783 be live across the call, while the other is set
785 CLEAR_HARD_REG_SET (this_insn_sets
);
786 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
787 hard_regs_saved
&= ~this_insn_sets
;
790 if (code
== CALL_INSN
791 && ! SIBLING_CALL_P (insn
)
792 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
795 HARD_REG_SET hard_regs_to_save
;
796 HARD_REG_SET call_def_reg_set
;
797 reg_set_iterator rsi
;
800 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
802 cheap
= XEXP (cheap
, 0);
804 /* Use the register life information in CHAIN to compute which
805 regs are live during the call. */
806 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
807 &chain
->live_throughout
);
808 /* Save hard registers always in the widest mode available. */
809 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
810 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
811 save_mode
[regno
] = regno_save_mode
[regno
][1];
813 save_mode
[regno
] = VOIDmode
;
815 /* Look through all live pseudos, mark their hard registers
816 and choose proper mode for saving. */
817 EXECUTE_IF_SET_IN_REG_SET
818 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
820 int r
= reg_renumber
[regno
];
824 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
826 nregs
= hard_regno_nregs (r
, PSEUDO_REGNO_MODE (regno
));
827 mode
= HARD_REGNO_CALLER_SAVE_MODE
828 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
829 if (partial_subreg_p (save_mode
[r
], mode
))
832 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
835 /* Record all registers set in this call insn. These don't need
836 to be saved. N.B. the call insn might set a subreg of a
837 multi-hard-reg pseudo; then the pseudo is considered live
838 during the call, but the subreg that is set isn't. */
839 CLEAR_HARD_REG_SET (this_insn_sets
);
840 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
842 /* Compute which hard regs must be saved before this call. */
843 hard_regs_to_save
&= ~(fixed_reg_set
846 hard_regs_to_save
&= savable_regs
;
847 call_def_reg_set
= insn_callee_abi (insn
).full_reg_clobbers ();
848 /* ??? This preserves traditional behavior; it might not
850 call_def_reg_set
|= fixed_reg_set
;
851 hard_regs_to_save
&= call_def_reg_set
;
853 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
854 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
855 regno
+= insert_save (chain
, regno
,
856 &hard_regs_to_save
, save_mode
);
858 /* Must recompute n_regs_saved. */
860 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
861 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
865 && HARD_REGISTER_P (cheap
)
866 && TEST_HARD_REG_BIT (call_used_or_fixed_regs
,
870 rtx pat
= PATTERN (insn
);
871 if (GET_CODE (pat
) == PARALLEL
)
872 pat
= XVECEXP (pat
, 0, 0);
873 dest
= SET_DEST (pat
);
874 /* For multiple return values dest is PARALLEL.
875 Currently we handle only single return value case. */
878 newpat
= gen_rtx_SET (cheap
, copy_rtx (dest
));
879 chain
= insert_one_insn (chain
, 0, -1, newpat
);
885 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
886 mark_referenced_regs (&PATTERN (insn
),
887 replace_reg_with_saved_mem
,
890 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
893 /* At the end of the basic block, we must restore any registers that
894 remain saved. If the last insn in the block is a JUMP_INSN, put
895 the restore before the insn, otherwise, put it after the insn. */
898 && DEBUG_INSN_P (insn
)
900 && last
->block
== chain
->block
)
902 rtx_insn
*ins
, *prev
;
903 basic_block bb
= BLOCK_FOR_INSN (insn
);
905 /* When adding hard reg restores after a DEBUG_INSN, move
906 all notes between last real insn and this DEBUG_INSN after
907 the DEBUG_INSN, otherwise we could get code
908 -g/-g0 differences. */
909 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
911 prev
= PREV_INSN (ins
);
914 SET_NEXT_INSN (prev
) = NEXT_INSN (ins
);
915 SET_PREV_INSN (NEXT_INSN (ins
)) = prev
;
916 SET_PREV_INSN (ins
) = insn
;
917 SET_NEXT_INSN (ins
) = NEXT_INSN (insn
);
918 SET_NEXT_INSN (insn
) = ins
;
920 SET_PREV_INSN (NEXT_INSN (ins
)) = ins
;
921 if (BB_END (bb
) == insn
)
925 gcc_assert (DEBUG_INSN_P (ins
));
931 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
932 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
933 regno
+= insert_restore (chain
, JUMP_P (insn
),
934 regno
, MOVE_MAX_WORDS
, save_mode
);
939 /* Here from note_stores, or directly from save_call_clobbered_regs, when
940 an insn stores a value in a register.
941 Set the proper bit or bits in this_insn_sets. All pseudos that have
942 been assigned hard regs have had their register number changed already,
943 so we can ignore pseudos. */
945 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
947 int regno
, endregno
, i
;
948 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
950 if (GET_CODE (reg
) == SUBREG
)
952 rtx inner
= SUBREG_REG (reg
);
953 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
955 regno
= subreg_regno (reg
);
956 endregno
= regno
+ subreg_nregs (reg
);
959 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
962 endregno
= END_REGNO (reg
);
967 for (i
= regno
; i
< endregno
; i
++)
968 SET_HARD_REG_BIT (*this_insn_sets
, i
);
971 /* Here from note_stores when an insn stores a value in a register.
972 Set the proper bit or bits in the passed regset. All pseudos that have
973 been assigned hard regs have had their register number changed already,
974 so we can ignore pseudos. */
976 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
978 int regno
, endregno
, i
;
979 machine_mode mode
= GET_MODE (reg
);
982 if (GET_CODE (setter
) == CLOBBER
)
985 if (GET_CODE (reg
) == SUBREG
986 && REG_P (SUBREG_REG (reg
))
987 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
989 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
990 GET_MODE (SUBREG_REG (reg
)),
993 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
994 endregno
= regno
+ subreg_nregs (reg
);
998 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
1001 regno
= REGNO (reg
) + offset
;
1002 endregno
= end_hard_regno (mode
, regno
);
1005 for (i
= regno
; i
< endregno
; i
++)
1006 SET_REGNO_REG_SET ((regset
) data
, i
);
1009 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1011 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
1013 enum rtx_code code
= GET_CODE (*loc
);
1018 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
1019 if (code
== SET
|| code
== CLOBBER
)
1021 loc
= &SET_DEST (*loc
);
1022 code
= GET_CODE (*loc
);
1023 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
1024 || code
== PC
|| code
== CC0
1025 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
1026 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
1027 /* If we're setting only part of a multi-word register,
1028 we shall mark it as referenced, because the words
1029 that are not being set should be restored. */
1030 && !read_modify_subreg_p (*loc
)))
1033 if (code
== MEM
|| code
== SUBREG
)
1035 loc
= &XEXP (*loc
, 0);
1036 code
= GET_CODE (*loc
);
1041 int regno
= REGNO (*loc
);
1042 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1043 : reg_renumber
[regno
]);
1046 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1048 /* ??? Will we ever end up with an equiv expression in a debug
1049 insn, that would have required restoring a reg, or will
1050 reload take care of it for us? */
1052 /* If this is a pseudo that did not get a hard register, scan its
1053 memory location, since it might involve the use of another
1054 register, which might be saved. */
1055 else if (reg_equiv_mem (regno
) != 0)
1056 mark_referenced_regs (&XEXP (reg_equiv_mem (regno
), 0), mark
, arg
);
1057 else if (reg_equiv_address (regno
) != 0)
1058 mark_referenced_regs (®_equiv_address (regno
), mark
, arg
);
1062 fmt
= GET_RTX_FORMAT (code
);
1063 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1066 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1067 else if (fmt
[i
] == 'E')
1068 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1069 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1073 /* Parameter function for mark_referenced_regs() that adds registers
1074 present in the insn and in equivalent mems and addresses to
1078 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1081 void *arg ATTRIBUTE_UNUSED
)
1083 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1086 /* Parameter function for mark_referenced_regs() that replaces
1087 registers referenced in a debug_insn that would have been restored,
1088 should it be a non-debug_insn, with their save locations. */
1091 replace_reg_with_saved_mem (rtx
*loc
,
1096 unsigned int i
, nregs
= hard_regno_nregs (regno
, mode
);
1098 machine_mode
*save_mode
= (machine_mode
*)arg
;
1100 for (i
= 0; i
< nregs
; i
++)
1101 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1104 /* If none of the registers in the range would need restoring, we're
1110 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1114 && regno_save_mem
[regno
][nregs
])
1116 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1118 if (nregs
== hard_regno_nregs (regno
, save_mode
[regno
]))
1119 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1121 if (GET_MODE (mem
) != mode
)
1123 /* This is gen_lowpart_if_possible(), but without validating
1124 the newly-formed address. */
1125 poly_int64 offset
= byte_lowpart_offset (mode
, GET_MODE (mem
));
1126 mem
= adjust_address_nv (mem
, mode
, offset
);
1131 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1132 for (i
= 0; i
< nregs
; i
++)
1133 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1135 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1136 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1140 machine_mode smode
= save_mode
[regno
];
1141 gcc_assert (smode
!= VOIDmode
);
1142 if (hard_regno_nregs (regno
, smode
) > 1)
1143 smode
= mode_for_size (exact_div (GET_MODE_BITSIZE (mode
),
1145 GET_MODE_CLASS (mode
), 0).require ();
1146 XVECEXP (mem
, 0, i
) = gen_rtx_REG (smode
, regno
+ i
);
1150 gcc_assert (GET_MODE (mem
) == mode
);
1155 /* Insert a sequence of insns to restore. Place these insns in front of
1156 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1157 the maximum number of registers which should be restored during this call.
1158 It should never be less than 1 since we only work with entire registers.
1160 Note that we have verified in init_caller_save that we can do this
1161 with a simple SET, so use it. Set INSN_CODE to what we save there
1162 since the address might not be valid so the insn might not be recognized.
1163 These insns will be reloaded and have register elimination done by
1164 find_reload, so we need not worry about that here.
1166 Return the extra number of registers saved. */
1169 insert_restore (class insn_chain
*chain
, int before_p
, int regno
,
1170 int maxrestore
, machine_mode
*save_mode
)
1175 unsigned int numregs
= 0;
1176 class insn_chain
*new_chain
;
1179 /* A common failure mode if register status is not correct in the
1180 RTL is for this routine to be called with a REGNO we didn't
1181 expect to save. That will cause us to write an insn with a (nil)
1182 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1183 later, check for this common case here instead. This will remove
1184 one step in debugging such problems. */
1185 gcc_assert (regno_save_mem
[regno
][1]);
1187 /* Get the pattern to emit and update our status.
1189 See if we can restore `maxrestore' registers at once. Work
1190 backwards to the single register case. */
1191 for (i
= maxrestore
; i
> 0; i
--)
1196 if (regno_save_mem
[regno
][i
] == 0)
1199 for (j
= 0; j
< i
; j
++)
1200 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1205 /* Must do this one restore at a time. */
1213 mem
= regno_save_mem
[regno
][numregs
];
1214 if (save_mode
[regno
] != VOIDmode
1215 && save_mode
[regno
] != GET_MODE (mem
)
1216 && numregs
== hard_regno_nregs (regno
, save_mode
[regno
])
1217 /* Check that insn to restore REGNO in save_mode[regno] is
1219 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1220 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1222 mem
= copy_rtx (mem
);
1224 /* Verify that the alignment of spill space is equal to or greater
1226 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1227 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1229 pat
= gen_rtx_SET (gen_rtx_REG (GET_MODE (mem
), regno
), mem
);
1230 code
= reg_restore_code (regno
, GET_MODE (mem
));
1231 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1233 /* Clear status for all registers we restored. */
1234 for (k
= 0; k
< i
; k
++)
1236 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1237 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1241 /* Tell our callers how many extra registers we saved/restored. */
1245 /* Like insert_restore above, but save registers instead. */
1248 insert_save (class insn_chain
*chain
, int regno
,
1249 HARD_REG_SET
*to_save
, machine_mode
*save_mode
)
1255 unsigned int numregs
= 0;
1256 class insn_chain
*new_chain
;
1259 /* A common failure mode if register status is not correct in the
1260 RTL is for this routine to be called with a REGNO we didn't
1261 expect to save. That will cause us to write an insn with a (nil)
1262 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1263 later, check for this common case here. This will remove one
1264 step in debugging such problems. */
1265 gcc_assert (regno_save_mem
[regno
][1]);
1267 /* Get the pattern to emit and update our status.
1269 See if we can save several registers with a single instruction.
1270 Work backwards to the single register case. */
1271 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1275 if (regno_save_mem
[regno
][i
] == 0)
1278 for (j
= 0; j
< i
; j
++)
1279 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1284 /* Must do this one save at a time. */
1292 mem
= regno_save_mem
[regno
][numregs
];
1293 if (save_mode
[regno
] != VOIDmode
1294 && save_mode
[regno
] != GET_MODE (mem
)
1295 && numregs
== hard_regno_nregs (regno
, save_mode
[regno
])
1296 /* Check that insn to save REGNO in save_mode[regno] is
1298 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1299 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1301 mem
= copy_rtx (mem
);
1303 /* Verify that the alignment of spill space is equal to or greater
1305 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1306 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1308 pat
= gen_rtx_SET (mem
, gen_rtx_REG (GET_MODE (mem
), regno
));
1309 code
= reg_save_code (regno
, GET_MODE (mem
));
1310 new_chain
= insert_one_insn (chain
, 1, code
, pat
);
1312 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1313 for (k
= 0; k
< numregs
; k
++)
1315 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1316 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1320 /* Tell our callers how many extra registers we saved/restored. */
1324 /* A note_uses callback used by insert_one_insn. Add the hard-register
1325 equivalent of each REG to regset DATA. */
1328 add_used_regs (rtx
*loc
, void *data
)
1330 subrtx_iterator::array_type array
;
1331 FOR_EACH_SUBRTX (iter
, array
, *loc
, NONCONST
)
1333 const_rtx x
= *iter
;
1336 unsigned int regno
= REGNO (x
);
1337 if (HARD_REGISTER_NUM_P (regno
))
1338 bitmap_set_range ((regset
) data
, regno
, REG_NREGS (x
));
1340 gcc_checking_assert (reg_renumber
[regno
] < 0);
1345 /* Emit a new caller-save insn and set the code. */
1346 static class insn_chain
*
1347 insert_one_insn (class insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1349 rtx_insn
*insn
= chain
->insn
;
1350 class insn_chain
*new_chain
;
1352 /* If INSN references CC0, put our insns in front of the insn that sets
1353 CC0. This is always safe, since the only way we could be passed an
1354 insn that references CC0 is for a restore, and doing a restore earlier
1355 isn't a problem. We do, however, assume here that CALL_INSNs don't
1356 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1358 if (HAVE_cc0
&& (NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1360 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1361 chain
= chain
->prev
, insn
= chain
->insn
;
1363 new_chain
= new_insn_chain ();
1368 new_chain
->prev
= chain
->prev
;
1369 if (new_chain
->prev
!= 0)
1370 new_chain
->prev
->next
= new_chain
;
1372 reload_insn_chain
= new_chain
;
1374 chain
->prev
= new_chain
;
1375 new_chain
->next
= chain
;
1376 new_chain
->insn
= emit_insn_before (pat
, insn
);
1377 /* ??? It would be nice if we could exclude the already / still saved
1378 registers from the live sets. */
1379 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1380 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1381 &new_chain
->live_throughout
);
1382 /* If CHAIN->INSN is a call, then the registers which contain
1383 the arguments to the function are live in the new insn. */
1384 if (CALL_P (chain
->insn
))
1385 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1387 link
= XEXP (link
, 1))
1388 note_uses (&XEXP (link
, 0), add_used_regs
,
1389 &new_chain
->live_throughout
);
1391 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1392 if (chain
->insn
== BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1393 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1397 new_chain
->next
= chain
->next
;
1398 if (new_chain
->next
!= 0)
1399 new_chain
->next
->prev
= new_chain
;
1400 chain
->next
= new_chain
;
1401 new_chain
->prev
= chain
;
1402 new_chain
->insn
= emit_insn_after (pat
, insn
);
1403 /* ??? It would be nice if we could exclude the already / still saved
1404 registers from the live sets, and observe REG_UNUSED notes. */
1405 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1406 /* Registers that are set in CHAIN->INSN live in the new insn.
1407 (Unless there is a REG_UNUSED note for them, but we don't
1408 look for them here.) */
1409 note_stores (chain
->insn
, add_stored_regs
, &new_chain
->live_throughout
);
1410 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1411 if (chain
->insn
== BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1412 BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1414 new_chain
->block
= chain
->block
;
1415 new_chain
->is_caller_save_insn
= 1;
1417 INSN_CODE (new_chain
->insn
) = code
;
1420 #include "gt-caller-save.h"