1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "insn-config.h"
30 #include "hard-reg-set.h"
32 #include "basic-block.h"
37 #include "diagnostic-core.h"
40 #include "addresses.h"
44 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
46 #define regno_save_mode \
47 (this_target_reload->x_regno_save_mode)
49 /* For each hard register, a place on the stack where it can be saved,
53 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
55 /* The number of elements in the subsequent array. */
56 static int save_slots_num
;
58 /* Allocated slots so far. */
59 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
61 /* We will only make a register eligible for caller-save if it can be
62 saved in its widest mode with a simple SET insn as long as the memory
63 address is valid. We record the INSN_CODE is those insns here since
64 when we emit them, the addresses might not be valid, so they might not
68 cached_reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
70 cached_reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved
;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved
;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
82 static HARD_REG_SET referenced_regs
;
85 typedef void refmarker_fn (rtx
*loc
, enum machine_mode mode
, int hardregno
,
88 static int reg_save_code (int, enum machine_mode
);
89 static int reg_restore_code (int, enum machine_mode
);
91 struct saved_hard_reg
;
92 static void initiate_saved_hard_regs (void);
93 static struct saved_hard_reg
*new_saved_hard_reg (int, int);
94 static void finish_saved_hard_regs (void);
95 static int saved_hard_reg_compare_func (const void *, const void *);
97 static void mark_set_regs (rtx
, const_rtx
, void *);
98 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
99 static refmarker_fn mark_reg_as_referenced
;
100 static refmarker_fn replace_reg_with_saved_mem
;
101 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
102 enum machine_mode
*);
103 static int insert_restore (struct insn_chain
*, int, int, int,
104 enum machine_mode
*);
105 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
107 static void add_stored_regs (rtx
, const_rtx
, void *);
111 static GTY(()) rtx savepat
;
112 static GTY(()) rtx restpat
;
113 static GTY(()) rtx test_reg
;
114 static GTY(()) rtx test_mem
;
115 static GTY(()) rtx saveinsn
;
116 static GTY(()) rtx restinsn
;
118 /* Return the INSN_CODE used to save register REG in mode MODE. */
120 reg_save_code (int reg
, enum machine_mode mode
)
123 if (cached_reg_save_code
[reg
][mode
])
124 return cached_reg_save_code
[reg
][mode
];
125 if (!HARD_REGNO_MODE_OK (reg
, mode
))
127 cached_reg_save_code
[reg
][mode
] = -1;
128 cached_reg_restore_code
[reg
][mode
] = -1;
132 /* Update the register number and modes of the register
133 and memory operand. */
134 SET_REGNO (test_reg
, reg
);
135 PUT_MODE (test_reg
, mode
);
136 PUT_MODE (test_mem
, mode
);
138 /* Force re-recognition of the modified insns. */
139 INSN_CODE (saveinsn
) = -1;
140 INSN_CODE (restinsn
) = -1;
142 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
143 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
145 /* Now extract both insns and see if we can meet their
147 ok
= (cached_reg_save_code
[reg
][mode
] != -1
148 && cached_reg_restore_code
[reg
][mode
] != -1);
151 extract_insn (saveinsn
);
152 ok
= constrain_operands (1);
153 extract_insn (restinsn
);
154 ok
&= constrain_operands (1);
159 cached_reg_save_code
[reg
][mode
] = -1;
160 cached_reg_restore_code
[reg
][mode
] = -1;
162 gcc_assert (cached_reg_save_code
[reg
][mode
]);
163 return cached_reg_save_code
[reg
][mode
];
166 /* Return the INSN_CODE used to restore register REG in mode MODE. */
168 reg_restore_code (int reg
, enum machine_mode mode
)
170 if (cached_reg_restore_code
[reg
][mode
])
171 return cached_reg_restore_code
[reg
][mode
];
172 /* Populate our cache. */
173 reg_save_code (reg
, mode
);
174 return cached_reg_restore_code
[reg
][mode
];
177 /* Initialize for caller-save.
179 Look at all the hard registers that are used by a call and for which
180 reginfo.c has not already excluded from being used across a call.
182 Ensure that we can find a mode to save the register and that there is a
183 simple insn to save and restore the register. This latter check avoids
184 problems that would occur if we tried to save the MQ register of some
185 machines directly into memory. */
188 init_caller_save (void)
195 if (caller_save_initialized_p
)
198 caller_save_initialized_p
= true;
200 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
201 /* First find all the registers that we need to deal with and all
202 the modes that they can have. If we can't find a mode to use,
203 we can't have the register live over calls. */
205 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
207 if (call_used_regs
[i
]
208 && !TEST_HARD_REG_BIT (call_fixed_reg_set
, i
))
210 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
212 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
214 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
216 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
221 regno_save_mode
[i
][1] = VOIDmode
;
224 /* The following code tries to approximate the conditions under which
225 we can easily save and restore a register without scratch registers or
226 other complexities. It will usually work, except under conditions where
227 the validity of an insn operand is dependent on the address offset.
228 No such cases are currently known.
230 We first find a typical offset from some BASE_REG_CLASS register.
231 This address is chosen by finding the first register in the class
232 and by finding the smallest power of two that is a valid offset from
233 that register in every mode we will use to save registers. */
235 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
236 if (TEST_HARD_REG_BIT
238 [(int) base_reg_class (regno_save_mode
[i
][1], PLUS
, CONST_INT
)], i
))
241 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
243 addr_reg
= gen_rtx_REG (Pmode
, i
);
245 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
247 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
249 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
250 if (regno_save_mode
[i
][1] != VOIDmode
251 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
254 if (i
== FIRST_PSEUDO_REGISTER
)
258 /* If we didn't find a valid address, we must use register indirect. */
262 /* Next we try to form an insn to save and restore the register. We
263 see if such an insn is recognized and meets its constraints.
265 To avoid lots of unnecessary RTL allocation, we construct all the RTL
266 once, then modify the memory and register operands in-place. */
268 test_reg
= gen_rtx_REG (VOIDmode
, 0);
269 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
270 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
271 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
273 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, savepat
, -1, 0);
274 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, restpat
, -1, 0);
276 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
277 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
278 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
280 regno_save_mode
[i
][j
] = VOIDmode
;
283 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
284 if (call_used_regs
[i
])
285 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
292 /* Initialize save areas by showing that we haven't allocated any yet. */
295 init_save_areas (void)
299 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
300 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
301 regno_save_mem
[i
][j
] = 0;
306 /* The structure represents a hard register which should be saved
307 through the call. It is used when the integrated register
308 allocator (IRA) is used and sharing save slots is on. */
309 struct saved_hard_reg
311 /* Order number starting with 0. */
313 /* The hard regno. */
315 /* Execution frequency of all calls through which given hard
316 register should be saved. */
318 /* Stack slot reserved to save the hard register through calls. */
320 /* True if it is first hard register in the chain of hard registers
321 sharing the same stack slot. */
323 /* Order number of the next hard register structure with the same
324 slot in the chain. -1 represents end of the chain. */
328 /* Map: hard register number to the corresponding structure. */
329 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
331 /* The number of all structures representing hard registers should be
332 saved, in order words, the number of used elements in the following
334 static int saved_regs_num
;
336 /* Pointers to all the structures. Index is the order number of the
337 corresponding structure. */
338 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
340 /* First called function for work with saved hard registers. */
342 initiate_saved_hard_regs (void)
347 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
348 hard_reg_map
[i
] = NULL
;
351 /* Allocate and return new saved hard register with given REGNO and
353 static struct saved_hard_reg
*
354 new_saved_hard_reg (int regno
, int call_freq
)
356 struct saved_hard_reg
*saved_reg
;
359 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
360 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
361 saved_reg
->num
= saved_regs_num
++;
362 saved_reg
->hard_regno
= regno
;
363 saved_reg
->call_freq
= call_freq
;
364 saved_reg
->first_p
= FALSE
;
365 saved_reg
->next
= -1;
369 /* Free memory allocated for the saved hard registers. */
371 finish_saved_hard_regs (void)
375 for (i
= 0; i
< saved_regs_num
; i
++)
376 free (all_saved_regs
[i
]);
379 /* The function is used to sort the saved hard register structures
380 according their frequency. */
382 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
384 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
385 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
387 if (flag_omit_frame_pointer
)
389 if (p1
->call_freq
- p2
->call_freq
!= 0)
390 return p1
->call_freq
- p2
->call_freq
;
392 else if (p2
->call_freq
- p1
->call_freq
!= 0)
393 return p2
->call_freq
- p1
->call_freq
;
395 return p1
->num
- p2
->num
;
398 /* Allocate save areas for any hard registers that might need saving.
399 We take a conservative approach here and look for call-clobbered hard
400 registers that are assigned to pseudos that cross calls. This may
401 overestimate slightly (especially if some of these registers are later
402 used as spill registers), but it should not be significant.
404 For IRA we use priority coloring to decrease stack slots needed for
405 saving hard registers through calls. We build conflicts for them
410 In the fallback case we should iterate backwards across all possible
411 modes for the save, choosing the largest available one instead of
412 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
414 We do not try to use "move multiple" instructions that exist
415 on some machines (such as the 68k moveml). It could be a win to try
416 and use them when possible. The hard part is doing it in a way that is
417 machine independent since they might be saving non-consecutive
418 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
421 setup_save_areas (void)
425 HARD_REG_SET hard_regs_used
;
427 /* Allocate space in the save area for the largest multi-register
428 pseudos first, then work backwards to single register
431 /* Find and record all call-used hard-registers in this function. */
432 CLEAR_HARD_REG_SET (hard_regs_used
);
433 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
434 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
436 unsigned int regno
= reg_renumber
[i
];
437 unsigned int endregno
438 = end_hard_regno (GET_MODE (regno_reg_rtx
[i
]), regno
);
439 for (r
= regno
; r
< endregno
; r
++)
440 if (call_used_regs
[r
])
441 SET_HARD_REG_BIT (hard_regs_used
, r
);
444 if (optimize
&& flag_ira_share_save_slots
)
447 struct insn_chain
*chain
, *next
;
448 char *saved_reg_conflicts
;
451 struct saved_hard_reg
*saved_reg
, *saved_reg2
, *saved_reg3
;
452 int call_saved_regs_num
;
453 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
454 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
455 reg_set_iterator rsi
;
457 int prev_save_slots_num
;
458 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
460 initiate_saved_hard_regs ();
461 /* Create hard reg saved regs. */
462 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
467 || find_reg_note (insn
, REG_NORETURN
, NULL
))
469 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
470 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
471 &chain
->live_throughout
);
472 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
474 /* Record all registers set in this call insn. These don't
475 need to be saved. N.B. the call insn might set a subreg
476 of a multi-hard-reg pseudo; then the pseudo is considered
477 live during the call, but the subreg that is set
479 CLEAR_HARD_REG_SET (this_insn_sets
);
480 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
481 /* Sibcalls are considered to set the return value. */
482 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
483 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
485 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
486 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
487 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
488 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
489 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
491 if (hard_reg_map
[regno
] != NULL
)
492 hard_reg_map
[regno
]->call_freq
+= freq
;
494 saved_reg
= new_saved_hard_reg (regno
, freq
);
496 /* Look through all live pseudos, mark their hard registers. */
497 EXECUTE_IF_SET_IN_REG_SET
498 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
500 int r
= reg_renumber
[regno
];
506 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
507 for (; r
< bound
; r
++)
508 if (TEST_HARD_REG_BIT (used_regs
, r
))
510 if (hard_reg_map
[r
] != NULL
)
511 hard_reg_map
[r
]->call_freq
+= freq
;
513 saved_reg
= new_saved_hard_reg (r
, freq
);
514 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
518 /* Find saved hard register conflicts. */
519 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
520 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
521 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
523 call_saved_regs_num
= 0;
527 || find_reg_note (insn
, REG_NORETURN
, NULL
))
529 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
530 &chain
->live_throughout
);
531 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
533 /* Record all registers set in this call insn. These don't
534 need to be saved. N.B. the call insn might set a subreg
535 of a multi-hard-reg pseudo; then the pseudo is considered
536 live during the call, but the subreg that is set
538 CLEAR_HARD_REG_SET (this_insn_sets
);
539 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
540 /* Sibcalls are considered to set the return value,
541 compare df-scan.c:df_get_call_refs. */
542 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
543 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
545 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
546 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
547 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
548 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
549 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
551 gcc_assert (hard_reg_map
[regno
] != NULL
);
552 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
554 /* Look through all live pseudos, mark their hard registers. */
555 EXECUTE_IF_SET_IN_REG_SET
556 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
558 int r
= reg_renumber
[regno
];
564 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
565 for (; r
< bound
; r
++)
566 if (TEST_HARD_REG_BIT (used_regs
, r
))
567 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
569 for (i
= 0; i
< call_saved_regs_num
; i
++)
571 saved_reg
= call_saved_regs
[i
];
572 for (j
= 0; j
< call_saved_regs_num
; j
++)
575 saved_reg2
= call_saved_regs
[j
];
576 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
578 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
584 /* Sort saved hard regs. */
585 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
586 saved_hard_reg_compare_func
);
587 /* Initiate slots available from the previous reload
589 prev_save_slots_num
= save_slots_num
;
590 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
592 /* Allocate stack slots for the saved hard registers. */
593 for (i
= 0; i
< saved_regs_num
; i
++)
595 saved_reg
= all_saved_regs
[i
];
596 regno
= saved_reg
->hard_regno
;
597 for (j
= 0; j
< i
; j
++)
599 saved_reg2
= all_saved_regs
[j
];
600 if (! saved_reg2
->first_p
)
602 slot
= saved_reg2
->slot
;
603 for (k
= j
; k
>= 0; k
= next_k
)
605 saved_reg3
= all_saved_regs
[k
];
606 next_k
= saved_reg3
->next
;
607 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
612 && (GET_MODE_SIZE (regno_save_mode
[regno
][1])
613 <= GET_MODE_SIZE (regno_save_mode
614 [saved_reg2
->hard_regno
][1])))
618 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
619 regno_save_mem
[regno
][1] = saved_reg
->slot
;
620 saved_reg
->next
= saved_reg2
->next
;
621 saved_reg2
->next
= i
;
622 if (dump_file
!= NULL
)
623 fprintf (dump_file
, "%d uses slot of %d\n",
624 regno
, saved_reg2
->hard_regno
);
630 saved_reg
->first_p
= TRUE
;
631 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
633 slot
= prev_save_slots
[j
];
634 if (slot
== NULL_RTX
)
636 if (GET_MODE_SIZE (regno_save_mode
[regno
][1])
637 <= GET_MODE_SIZE (GET_MODE (slot
))
638 && best_slot_num
< 0)
640 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
643 if (best_slot_num
>= 0)
645 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
649 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
650 if (dump_file
!= NULL
)
652 "%d uses a slot from prev iteration\n", regno
);
653 prev_save_slots
[best_slot_num
] = NULL_RTX
;
654 if (best_slot_num
+ 1 == prev_save_slots_num
)
655 prev_save_slots_num
--;
660 = assign_stack_local_1
661 (regno_save_mode
[regno
][1],
662 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0, true);
663 if (dump_file
!= NULL
)
664 fprintf (dump_file
, "%d uses a new slot\n", regno
);
666 regno_save_mem
[regno
][1] = saved_reg
->slot
;
667 save_slots
[save_slots_num
++] = saved_reg
->slot
;
670 free (saved_reg_conflicts
);
671 finish_saved_hard_regs ();
675 /* Now run through all the call-used hard-registers and allocate
676 space for them in the caller-save area. Try to allocate space
677 in a manner which allows multi-register saves/restores to be done. */
679 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
680 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
684 /* If no mode exists for this size, try another. Also break out
685 if we have already saved this hard register. */
686 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
689 /* See if any register in this group has been saved. */
690 for (k
= 0; k
< j
; k
++)
691 if (regno_save_mem
[i
+ k
][1])
699 for (k
= 0; k
< j
; k
++)
700 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
708 /* We have found an acceptable mode to store in. Since
709 hard register is always saved in the widest mode
710 available, the mode may be wider than necessary, it is
711 OK to reduce the alignment of spill space. We will
712 verify that it is equal to or greater than required
713 when we restore and save the hard register in
714 insert_restore and insert_save. */
716 = assign_stack_local_1 (regno_save_mode
[i
][j
],
717 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
720 /* Setup single word save area just in case... */
721 for (k
= 0; k
< j
; k
++)
722 /* This should not depend on WORDS_BIG_ENDIAN.
723 The order of words in regs is the same as in memory. */
724 regno_save_mem
[i
+ k
][1]
725 = adjust_address_nv (regno_save_mem
[i
][j
],
726 regno_save_mode
[i
+ k
][1],
731 /* Now loop again and set the alias set of any save areas we made to
732 the alias set used to represent frame objects. */
733 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
734 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
735 if (regno_save_mem
[i
][j
] != 0)
736 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
741 /* Find the places where hard regs are live across calls and save them. */
744 save_call_clobbered_regs (void)
746 struct insn_chain
*chain
, *next
, *last
= NULL
;
747 enum machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
749 /* Computed in mark_set_regs, holds all registers set by the current
751 HARD_REG_SET this_insn_sets
;
753 CLEAR_HARD_REG_SET (hard_regs_saved
);
756 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
758 rtx insn
= chain
->insn
;
759 enum rtx_code code
= GET_CODE (insn
);
763 gcc_assert (!chain
->is_caller_save_insn
);
765 if (NONDEBUG_INSN_P (insn
))
767 /* If some registers have been saved, see if INSN references
768 any of them. We must restore them before the insn if so. */
774 if (code
== JUMP_INSN
)
775 /* Restore all registers if this is a JUMP_INSN. */
776 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
779 CLEAR_HARD_REG_SET (referenced_regs
);
780 mark_referenced_regs (&PATTERN (insn
),
781 mark_reg_as_referenced
, NULL
);
782 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
785 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
786 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
787 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
, save_mode
);
790 if (code
== CALL_INSN
791 && ! SIBLING_CALL_P (insn
)
792 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
795 HARD_REG_SET hard_regs_to_save
;
796 reg_set_iterator rsi
;
798 /* Use the register life information in CHAIN to compute which
799 regs are live during the call. */
800 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
801 &chain
->live_throughout
);
802 /* Save hard registers always in the widest mode available. */
803 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
804 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
805 save_mode
[regno
] = regno_save_mode
[regno
][1];
807 save_mode
[regno
] = VOIDmode
;
809 /* Look through all live pseudos, mark their hard registers
810 and choose proper mode for saving. */
811 EXECUTE_IF_SET_IN_REG_SET
812 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
814 int r
= reg_renumber
[regno
];
816 enum machine_mode mode
;
820 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
821 mode
= HARD_REGNO_CALLER_SAVE_MODE
822 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
823 if (GET_MODE_BITSIZE (mode
)
824 > GET_MODE_BITSIZE (save_mode
[r
]))
827 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
830 /* Record all registers set in this call insn. These don't need
831 to be saved. N.B. the call insn might set a subreg of a
832 multi-hard-reg pseudo; then the pseudo is considered live
833 during the call, but the subreg that is set isn't. */
834 CLEAR_HARD_REG_SET (this_insn_sets
);
835 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
837 /* Compute which hard regs must be saved before this call. */
838 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
839 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
840 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
841 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
843 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
844 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
845 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
847 /* Must recompute n_regs_saved. */
849 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
850 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
855 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
856 mark_referenced_regs (&PATTERN (insn
),
857 replace_reg_with_saved_mem
,
860 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
863 /* At the end of the basic block, we must restore any registers that
864 remain saved. If the last insn in the block is a JUMP_INSN, put
865 the restore before the insn, otherwise, put it after the insn. */
867 if (DEBUG_INSN_P (insn
) && last
&& last
->block
== chain
->block
)
870 basic_block bb
= BLOCK_FOR_INSN (insn
);
872 /* When adding hard reg restores after a DEBUG_INSN, move
873 all notes between last real insn and this DEBUG_INSN after
874 the DEBUG_INSN, otherwise we could get code
875 -g/-g0 differences. */
876 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
878 prev
= PREV_INSN (ins
);
881 NEXT_INSN (prev
) = NEXT_INSN (ins
);
882 PREV_INSN (NEXT_INSN (ins
)) = prev
;
883 PREV_INSN (ins
) = insn
;
884 NEXT_INSN (ins
) = NEXT_INSN (insn
);
885 NEXT_INSN (insn
) = ins
;
887 PREV_INSN (NEXT_INSN (ins
)) = ins
;
888 if (BB_END (bb
) == insn
)
892 gcc_assert (DEBUG_INSN_P (ins
));
898 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
899 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
900 regno
+= insert_restore (chain
, JUMP_P (insn
),
901 regno
, MOVE_MAX_WORDS
, save_mode
);
906 /* Here from note_stores, or directly from save_call_clobbered_regs, when
907 an insn stores a value in a register.
908 Set the proper bit or bits in this_insn_sets. All pseudos that have
909 been assigned hard regs have had their register number changed already,
910 so we can ignore pseudos. */
912 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
914 int regno
, endregno
, i
;
915 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
917 if (GET_CODE (reg
) == SUBREG
)
919 rtx inner
= SUBREG_REG (reg
);
920 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
922 regno
= subreg_regno (reg
);
923 endregno
= regno
+ subreg_nregs (reg
);
926 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
929 endregno
= END_HARD_REGNO (reg
);
934 for (i
= regno
; i
< endregno
; i
++)
935 SET_HARD_REG_BIT (*this_insn_sets
, i
);
938 /* Here from note_stores when an insn stores a value in a register.
939 Set the proper bit or bits in the passed regset. All pseudos that have
940 been assigned hard regs have had their register number changed already,
941 so we can ignore pseudos. */
943 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
945 int regno
, endregno
, i
;
946 enum machine_mode mode
= GET_MODE (reg
);
949 if (GET_CODE (setter
) == CLOBBER
)
952 if (GET_CODE (reg
) == SUBREG
953 && REG_P (SUBREG_REG (reg
))
954 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
956 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
957 GET_MODE (SUBREG_REG (reg
)),
960 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
961 endregno
= regno
+ subreg_nregs (reg
);
965 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
968 regno
= REGNO (reg
) + offset
;
969 endregno
= end_hard_regno (mode
, regno
);
972 for (i
= regno
; i
< endregno
; i
++)
973 SET_REGNO_REG_SET ((regset
) data
, i
);
976 /* Walk X and record all referenced registers in REFERENCED_REGS. */
978 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
980 enum rtx_code code
= GET_CODE (*loc
);
985 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
986 if (code
== SET
|| code
== CLOBBER
)
988 loc
= &SET_DEST (*loc
);
989 code
= GET_CODE (*loc
);
990 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
991 || code
== PC
|| code
== CC0
992 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
993 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
994 /* If we're setting only part of a multi-word register,
995 we shall mark it as referenced, because the words
996 that are not being set should be restored. */
997 && ((GET_MODE_SIZE (GET_MODE (*loc
))
998 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
))))
999 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
)))
1000 <= UNITS_PER_WORD
))))
1003 if (code
== MEM
|| code
== SUBREG
)
1005 loc
= &XEXP (*loc
, 0);
1006 code
= GET_CODE (*loc
);
1011 int regno
= REGNO (*loc
);
1012 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1013 : reg_renumber
[regno
]);
1016 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1018 /* ??? Will we ever end up with an equiv expression in a debug
1019 insn, that would have required restoring a reg, or will
1020 reload take care of it for us? */
1022 /* If this is a pseudo that did not get a hard register, scan its
1023 memory location, since it might involve the use of another
1024 register, which might be saved. */
1025 else if (reg_equiv_mem
[regno
] != 0)
1026 mark_referenced_regs (&XEXP (reg_equiv_mem
[regno
], 0), mark
, arg
);
1027 else if (reg_equiv_address
[regno
] != 0)
1028 mark_referenced_regs (®_equiv_address
[regno
], mark
, arg
);
1032 fmt
= GET_RTX_FORMAT (code
);
1033 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1036 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1037 else if (fmt
[i
] == 'E')
1038 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1039 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1043 /* Parameter function for mark_referenced_regs() that adds registers
1044 present in the insn and in equivalent mems and addresses to
1048 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1049 enum machine_mode mode
,
1051 void *arg ATTRIBUTE_UNUSED
)
1053 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1056 /* Parameter function for mark_referenced_regs() that replaces
1057 registers referenced in a debug_insn that would have been restored,
1058 should it be a non-debug_insn, with their save locations. */
1061 replace_reg_with_saved_mem (rtx
*loc
,
1062 enum machine_mode mode
,
1066 unsigned int i
, nregs
= hard_regno_nregs
[regno
][mode
];
1068 enum machine_mode
*save_mode
= (enum machine_mode
*)arg
;
1070 for (i
= 0; i
< nregs
; i
++)
1071 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1074 /* If none of the registers in the range would need restoring, we're
1080 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1084 && regno_save_mem
[regno
][nregs
])
1086 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1088 if (nregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
1089 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1091 if (GET_MODE (mem
) != mode
)
1093 /* This is gen_lowpart_if_possible(), but without validating
1094 the newly-formed address. */
1097 if (WORDS_BIG_ENDIAN
)
1098 offset
= (MAX (GET_MODE_SIZE (GET_MODE (mem
)), UNITS_PER_WORD
)
1099 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1100 if (BYTES_BIG_ENDIAN
)
1101 /* Adjust the address so that the address-after-the-data is
1103 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1104 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (mem
))));
1106 mem
= adjust_address_nv (mem
, mode
, offset
);
1111 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1112 for (i
= 0; i
< nregs
; i
++)
1113 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1115 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1116 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1120 gcc_assert (save_mode
[regno
] != VOIDmode
);
1121 XVECEXP (mem
, 0, i
) = gen_rtx_REG (save_mode
[regno
],
1126 gcc_assert (GET_MODE (mem
) == mode
);
1131 /* Insert a sequence of insns to restore. Place these insns in front of
1132 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1133 the maximum number of registers which should be restored during this call.
1134 It should never be less than 1 since we only work with entire registers.
1136 Note that we have verified in init_caller_save that we can do this
1137 with a simple SET, so use it. Set INSN_CODE to what we save there
1138 since the address might not be valid so the insn might not be recognized.
1139 These insns will be reloaded and have register elimination done by
1140 find_reload, so we need not worry about that here.
1142 Return the extra number of registers saved. */
1145 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
1146 int maxrestore
, enum machine_mode
*save_mode
)
1151 unsigned int numregs
= 0;
1152 struct insn_chain
*new_chain
;
1155 /* A common failure mode if register status is not correct in the
1156 RTL is for this routine to be called with a REGNO we didn't
1157 expect to save. That will cause us to write an insn with a (nil)
1158 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1159 later, check for this common case here instead. This will remove
1160 one step in debugging such problems. */
1161 gcc_assert (regno_save_mem
[regno
][1]);
1163 /* Get the pattern to emit and update our status.
1165 See if we can restore `maxrestore' registers at once. Work
1166 backwards to the single register case. */
1167 for (i
= maxrestore
; i
> 0; i
--)
1172 if (regno_save_mem
[regno
][i
] == 0)
1175 for (j
= 0; j
< i
; j
++)
1176 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1181 /* Must do this one restore at a time. */
1189 mem
= regno_save_mem
[regno
][numregs
];
1190 if (save_mode
[regno
] != VOIDmode
1191 && save_mode
[regno
] != GET_MODE (mem
)
1192 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1193 /* Check that insn to restore REGNO in save_mode[regno] is
1195 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1196 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1198 mem
= copy_rtx (mem
);
1200 /* Verify that the alignment of spill space is equal to or greater
1202 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1203 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1205 pat
= gen_rtx_SET (VOIDmode
,
1206 gen_rtx_REG (GET_MODE (mem
),
1208 code
= reg_restore_code (regno
, GET_MODE (mem
));
1209 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1211 /* Clear status for all registers we restored. */
1212 for (k
= 0; k
< i
; k
++)
1214 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1215 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1219 /* Tell our callers how many extra registers we saved/restored. */
1223 /* Like insert_restore above, but save registers instead. */
1226 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
1227 HARD_REG_SET (*to_save
), enum machine_mode
*save_mode
)
1233 unsigned int numregs
= 0;
1234 struct insn_chain
*new_chain
;
1237 /* A common failure mode if register status is not correct in the
1238 RTL is for this routine to be called with a REGNO we didn't
1239 expect to save. That will cause us to write an insn with a (nil)
1240 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1241 later, check for this common case here. This will remove one
1242 step in debugging such problems. */
1243 gcc_assert (regno_save_mem
[regno
][1]);
1245 /* Get the pattern to emit and update our status.
1247 See if we can save several registers with a single instruction.
1248 Work backwards to the single register case. */
1249 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1253 if (regno_save_mem
[regno
][i
] == 0)
1256 for (j
= 0; j
< i
; j
++)
1257 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1262 /* Must do this one save at a time. */
1270 mem
= regno_save_mem
[regno
][numregs
];
1271 if (save_mode
[regno
] != VOIDmode
1272 && save_mode
[regno
] != GET_MODE (mem
)
1273 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1274 /* Check that insn to save REGNO in save_mode[regno] is
1276 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1277 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1279 mem
= copy_rtx (mem
);
1281 /* Verify that the alignment of spill space is equal to or greater
1283 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1284 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1286 pat
= gen_rtx_SET (VOIDmode
, mem
,
1287 gen_rtx_REG (GET_MODE (mem
),
1289 code
= reg_save_code (regno
, GET_MODE (mem
));
1290 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1292 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1293 for (k
= 0; k
< numregs
; k
++)
1295 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1296 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1300 /* Tell our callers how many extra registers we saved/restored. */
1304 /* A for_each_rtx callback used by add_used_regs. Add the hard-register
1305 equivalent of each REG to regset DATA. */
1308 add_used_regs_1 (rtx
*loc
, void *data
)
1315 live
= (regset
) data
;
1319 if (!HARD_REGISTER_NUM_P (regno
))
1320 regno
= reg_renumber
[regno
];
1322 for (i
= hard_regno_nregs
[regno
][GET_MODE (x
)] - 1; i
>= 0; i
--)
1323 SET_REGNO_REG_SET (live
, regno
+ i
);
1328 /* A note_uses callback used by insert_one_insn. Add the hard-register
1329 equivalent of each REG to regset DATA. */
1332 add_used_regs (rtx
*loc
, void *data
)
1334 for_each_rtx (loc
, add_used_regs_1
, data
);
1337 /* Emit a new caller-save insn and set the code. */
1338 static struct insn_chain
*
1339 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1341 rtx insn
= chain
->insn
;
1342 struct insn_chain
*new_chain
;
1345 /* If INSN references CC0, put our insns in front of the insn that sets
1346 CC0. This is always safe, since the only way we could be passed an
1347 insn that references CC0 is for a restore, and doing a restore earlier
1348 isn't a problem. We do, however, assume here that CALL_INSNs don't
1349 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1351 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1353 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1354 chain
= chain
->prev
, insn
= chain
->insn
;
1357 new_chain
= new_insn_chain ();
1362 new_chain
->prev
= chain
->prev
;
1363 if (new_chain
->prev
!= 0)
1364 new_chain
->prev
->next
= new_chain
;
1366 reload_insn_chain
= new_chain
;
1368 chain
->prev
= new_chain
;
1369 new_chain
->next
= chain
;
1370 new_chain
->insn
= emit_insn_before (pat
, insn
);
1371 /* ??? It would be nice if we could exclude the already / still saved
1372 registers from the live sets. */
1373 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1374 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1375 &new_chain
->live_throughout
);
1376 /* If CHAIN->INSN is a call, then the registers which contain
1377 the arguments to the function are live in the new insn. */
1378 if (CALL_P (chain
->insn
))
1379 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1381 link
= XEXP (link
, 1))
1382 note_uses (&XEXP (link
, 0), add_used_regs
,
1383 &new_chain
->live_throughout
);
1385 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1386 if (chain
->insn
== BB_HEAD (BASIC_BLOCK (chain
->block
)))
1387 BB_HEAD (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1391 new_chain
->next
= chain
->next
;
1392 if (new_chain
->next
!= 0)
1393 new_chain
->next
->prev
= new_chain
;
1394 chain
->next
= new_chain
;
1395 new_chain
->prev
= chain
;
1396 new_chain
->insn
= emit_insn_after (pat
, insn
);
1397 /* ??? It would be nice if we could exclude the already / still saved
1398 registers from the live sets, and observe REG_UNUSED notes. */
1399 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1400 /* Registers that are set in CHAIN->INSN live in the new insn.
1401 (Unless there is a REG_UNUSED note for them, but we don't
1402 look for them here.) */
1403 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
1404 &new_chain
->live_throughout
);
1405 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1406 if (chain
->insn
== BB_END (BASIC_BLOCK (chain
->block
)))
1407 BB_END (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1409 new_chain
->block
= chain
->block
;
1410 new_chain
->is_caller_save_insn
= 1;
1412 INSN_CODE (new_chain
->insn
) = code
;
1415 #include "gt-caller-save.h"