1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
30 #include "insn-config.h"
36 #include "addresses.h"
41 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
43 #define regno_save_mode \
44 (this_target_reload->x_regno_save_mode)
45 #define cached_reg_save_code \
46 (this_target_reload->x_cached_reg_save_code)
47 #define cached_reg_restore_code \
48 (this_target_reload->x_cached_reg_restore_code)
50 /* For each hard register, a place on the stack where it can be saved,
54 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
56 /* The number of elements in the subsequent array. */
57 static int save_slots_num
;
59 /* Allocated slots so far. */
60 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
62 /* Set of hard regs currently residing in save area (during insn scan). */
64 static HARD_REG_SET hard_regs_saved
;
66 /* Number of registers currently in hard_regs_saved. */
68 static int n_regs_saved
;
70 /* Computed by mark_referenced_regs, all regs referenced in a given
72 static HARD_REG_SET referenced_regs
;
75 typedef void refmarker_fn (rtx
*loc
, machine_mode mode
, int hardregno
,
78 static int reg_save_code (int, machine_mode
);
79 static int reg_restore_code (int, machine_mode
);
81 struct saved_hard_reg
;
82 static void initiate_saved_hard_regs (void);
83 static void new_saved_hard_reg (int, int);
84 static void finish_saved_hard_regs (void);
85 static int saved_hard_reg_compare_func (const void *, const void *);
87 static void mark_set_regs (rtx
, const_rtx
, void *);
88 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
89 static refmarker_fn mark_reg_as_referenced
;
90 static refmarker_fn replace_reg_with_saved_mem
;
91 static int insert_save (class insn_chain
*, int, HARD_REG_SET
*,
93 static int insert_restore (class insn_chain
*, int, int, int,
95 static class insn_chain
*insert_one_insn (class insn_chain
*, int, int,
97 static void add_stored_regs (rtx
, const_rtx
, void *);
101 static GTY(()) rtx savepat
;
102 static GTY(()) rtx restpat
;
103 static GTY(()) rtx test_reg
;
104 static GTY(()) rtx test_mem
;
105 static GTY(()) rtx_insn
*saveinsn
;
106 static GTY(()) rtx_insn
*restinsn
;
108 /* Return the INSN_CODE used to save register REG in mode MODE. */
110 reg_save_code (int reg
, machine_mode mode
)
113 if (cached_reg_save_code
[reg
][mode
])
114 return cached_reg_save_code
[reg
][mode
];
115 if (!targetm
.hard_regno_mode_ok (reg
, mode
))
117 /* Depending on how targetm.hard_regno_mode_ok is defined, range
118 propagation might deduce here that reg >= FIRST_PSEUDO_REGISTER.
119 So the assert below silences a warning. */
120 gcc_assert (reg
< FIRST_PSEUDO_REGISTER
);
121 cached_reg_save_code
[reg
][mode
] = -1;
122 cached_reg_restore_code
[reg
][mode
] = -1;
126 /* Update the register number and modes of the register
127 and memory operand. */
128 set_mode_and_regno (test_reg
, mode
, reg
);
129 PUT_MODE (test_mem
, mode
);
131 /* Force re-recognition of the modified insns. */
132 INSN_CODE (saveinsn
) = -1;
133 INSN_CODE (restinsn
) = -1;
135 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
136 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
138 /* Now extract both insns and see if we can meet their
139 constraints. We don't know here whether the save and restore will
140 be in size- or speed-tuned code, so just use the set of enabled
142 ok
= (cached_reg_save_code
[reg
][mode
] != -1
143 && cached_reg_restore_code
[reg
][mode
] != -1);
146 extract_insn (saveinsn
);
147 ok
= constrain_operands (1, get_enabled_alternatives (saveinsn
));
148 extract_insn (restinsn
);
149 ok
&= constrain_operands (1, get_enabled_alternatives (restinsn
));
154 cached_reg_save_code
[reg
][mode
] = -1;
155 cached_reg_restore_code
[reg
][mode
] = -1;
157 gcc_assert (cached_reg_save_code
[reg
][mode
]);
158 return cached_reg_save_code
[reg
][mode
];
161 /* Return the INSN_CODE used to restore register REG in mode MODE. */
163 reg_restore_code (int reg
, machine_mode mode
)
165 if (cached_reg_restore_code
[reg
][mode
])
166 return cached_reg_restore_code
[reg
][mode
];
167 /* Populate our cache. */
168 reg_save_code (reg
, mode
);
169 return cached_reg_restore_code
[reg
][mode
];
172 /* Initialize for caller-save.
174 Look at all the hard registers that are used by a call and for which
175 reginfo.c has not already excluded from being used across a call.
177 Ensure that we can find a mode to save the register and that there is a
178 simple insn to save and restore the register. This latter check avoids
179 problems that would occur if we tried to save the MQ register of some
180 machines directly into memory. */
183 init_caller_save (void)
190 if (caller_save_initialized_p
)
193 caller_save_initialized_p
= true;
195 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
196 /* First find all the registers that we need to deal with and all
197 the modes that they can have. If we can't find a mode to use,
198 we can't have the register live over calls. */
200 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
201 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
203 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
, VOIDmode
);
204 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
205 CLEAR_HARD_REG_BIT (savable_regs
, i
);
208 /* The following code tries to approximate the conditions under which
209 we can easily save and restore a register without scratch registers or
210 other complexities. It will usually work, except under conditions where
211 the validity of an insn operand is dependent on the address offset.
212 No such cases are currently known.
214 We first find a typical offset from some BASE_REG_CLASS register.
215 This address is chosen by finding the first register in the class
216 and by finding the smallest power of two that is a valid offset from
217 that register in every mode we will use to save registers. */
219 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
220 if (TEST_HARD_REG_BIT
222 [(int) base_reg_class (regno_save_mode
[i
][1], ADDR_SPACE_GENERIC
,
223 PLUS
, CONST_INT
)], i
))
226 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
228 addr_reg
= gen_rtx_REG (Pmode
, i
);
230 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
232 address
= gen_rtx_PLUS (Pmode
, addr_reg
, gen_int_mode (offset
, Pmode
));
234 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
235 if (regno_save_mode
[i
][1] != VOIDmode
236 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
239 if (i
== FIRST_PSEUDO_REGISTER
)
243 /* If we didn't find a valid address, we must use register indirect. */
247 /* Next we try to form an insn to save and restore the register. We
248 see if such an insn is recognized and meets its constraints.
250 To avoid lots of unnecessary RTL allocation, we construct all the RTL
251 once, then modify the memory and register operands in-place. */
253 test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
254 test_mem
= gen_rtx_MEM (word_mode
, address
);
255 savepat
= gen_rtx_SET (test_mem
, test_reg
);
256 restpat
= gen_rtx_SET (test_reg
, test_mem
);
258 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, savepat
, 0, -1, 0);
259 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, restpat
, 0, -1, 0);
261 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
262 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
263 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
265 regno_save_mode
[i
][j
] = VOIDmode
;
268 CLEAR_HARD_REG_BIT (savable_regs
, i
);
269 if (call_used_regs
[i
])
270 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
277 /* Initialize save areas by showing that we haven't allocated any yet. */
280 init_save_areas (void)
284 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
285 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
286 regno_save_mem
[i
][j
] = 0;
291 /* The structure represents a hard register which should be saved
292 through the call. It is used when the integrated register
293 allocator (IRA) is used and sharing save slots is on. */
294 struct saved_hard_reg
296 /* Order number starting with 0. */
298 /* The hard regno. */
300 /* Execution frequency of all calls through which given hard
301 register should be saved. */
303 /* Stack slot reserved to save the hard register through calls. */
305 /* True if it is first hard register in the chain of hard registers
306 sharing the same stack slot. */
308 /* Order number of the next hard register structure with the same
309 slot in the chain. -1 represents end of the chain. */
313 /* Map: hard register number to the corresponding structure. */
314 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
316 /* The number of all structures representing hard registers should be
317 saved, in order words, the number of used elements in the following
319 static int saved_regs_num
;
321 /* Pointers to all the structures. Index is the order number of the
322 corresponding structure. */
323 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
325 /* First called function for work with saved hard registers. */
327 initiate_saved_hard_regs (void)
332 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
333 hard_reg_map
[i
] = NULL
;
336 /* Allocate and return new saved hard register with given REGNO and
339 new_saved_hard_reg (int regno
, int call_freq
)
341 struct saved_hard_reg
*saved_reg
;
344 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
345 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
346 saved_reg
->num
= saved_regs_num
++;
347 saved_reg
->hard_regno
= regno
;
348 saved_reg
->call_freq
= call_freq
;
349 saved_reg
->first_p
= FALSE
;
350 saved_reg
->next
= -1;
353 /* Free memory allocated for the saved hard registers. */
355 finish_saved_hard_regs (void)
359 for (i
= 0; i
< saved_regs_num
; i
++)
360 free (all_saved_regs
[i
]);
363 /* The function is used to sort the saved hard register structures
364 according their frequency. */
366 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
368 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
369 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
371 if (flag_omit_frame_pointer
)
373 if (p1
->call_freq
- p2
->call_freq
!= 0)
374 return p1
->call_freq
- p2
->call_freq
;
376 else if (p2
->call_freq
- p1
->call_freq
!= 0)
377 return p2
->call_freq
- p1
->call_freq
;
379 return p1
->num
- p2
->num
;
382 /* Allocate save areas for any hard registers that might need saving.
383 We take a conservative approach here and look for call-clobbered hard
384 registers that are assigned to pseudos that cross calls. This may
385 overestimate slightly (especially if some of these registers are later
386 used as spill registers), but it should not be significant.
388 For IRA we use priority coloring to decrease stack slots needed for
389 saving hard registers through calls. We build conflicts for them
394 In the fallback case we should iterate backwards across all possible
395 modes for the save, choosing the largest available one instead of
396 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
398 We do not try to use "move multiple" instructions that exist
399 on some machines (such as the 68k moveml). It could be a win to try
400 and use them when possible. The hard part is doing it in a way that is
401 machine independent since they might be saving non-consecutive
402 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
405 setup_save_areas (void)
408 HARD_REG_SET hard_regs_used
;
409 struct saved_hard_reg
*saved_reg
;
411 class insn_chain
*chain
, *next
;
413 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
414 reg_set_iterator rsi
;
416 CLEAR_HARD_REG_SET (hard_regs_used
);
418 /* Find every CALL_INSN and record which hard regs are live across the
419 call into HARD_REG_MAP and HARD_REGS_USED. */
420 initiate_saved_hard_regs ();
421 /* Create hard reg saved regs. */
422 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
429 || find_reg_note (insn
, REG_NORETURN
, NULL
))
431 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
432 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
433 &chain
->live_throughout
);
434 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
436 /* Record all registers set in this call insn. These don't
437 need to be saved. N.B. the call insn might set a subreg
438 of a multi-hard-reg pseudo; then the pseudo is considered
439 live during the call, but the subreg that is set
441 CLEAR_HARD_REG_SET (this_insn_sets
);
442 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
443 /* Sibcalls are considered to set the return value. */
444 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
445 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
447 used_regs
&= ~(fixed_reg_set
| this_insn_sets
);
448 hard_regs_to_save
&= used_regs
& savable_regs
;
449 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
450 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
452 if (hard_reg_map
[regno
] != NULL
)
453 hard_reg_map
[regno
]->call_freq
+= freq
;
455 new_saved_hard_reg (regno
, freq
);
456 SET_HARD_REG_BIT (hard_regs_used
, regno
);
458 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
460 cheap
= XEXP (cheap
, 0);
461 /* Look through all live pseudos, mark their hard registers. */
462 EXECUTE_IF_SET_IN_REG_SET
463 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
465 int r
= reg_renumber
[regno
];
468 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
471 bound
= r
+ hard_regno_nregs (r
, PSEUDO_REGNO_MODE (regno
));
472 for (; r
< bound
; r
++)
473 if (TEST_HARD_REG_BIT (used_regs
, r
))
475 if (hard_reg_map
[r
] != NULL
)
476 hard_reg_map
[r
]->call_freq
+= freq
;
478 new_saved_hard_reg (r
, freq
);
479 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
480 SET_HARD_REG_BIT (hard_regs_used
, r
);
485 /* If requested, figure out which hard regs can share save slots. */
486 if (optimize
&& flag_ira_share_save_slots
)
489 char *saved_reg_conflicts
;
491 struct saved_hard_reg
*saved_reg2
, *saved_reg3
;
492 int call_saved_regs_num
;
493 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
495 int prev_save_slots_num
;
496 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
498 /* Find saved hard register conflicts. */
499 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
500 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
501 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
504 call_saved_regs_num
= 0;
508 || find_reg_note (insn
, REG_NORETURN
, NULL
))
511 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
513 cheap
= XEXP (cheap
, 0);
515 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
516 &chain
->live_throughout
);
517 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
519 /* Record all registers set in this call insn. These don't
520 need to be saved. N.B. the call insn might set a subreg
521 of a multi-hard-reg pseudo; then the pseudo is considered
522 live during the call, but the subreg that is set
524 CLEAR_HARD_REG_SET (this_insn_sets
);
525 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
526 /* Sibcalls are considered to set the return value,
527 compare df-scan.c:df_get_call_refs. */
528 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
529 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
531 used_regs
&= ~(fixed_reg_set
| this_insn_sets
);
532 hard_regs_to_save
&= used_regs
& savable_regs
;
533 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
534 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
536 gcc_assert (hard_reg_map
[regno
] != NULL
);
537 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
539 /* Look through all live pseudos, mark their hard registers. */
540 EXECUTE_IF_SET_IN_REG_SET
541 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
543 int r
= reg_renumber
[regno
];
546 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
549 bound
= r
+ hard_regno_nregs (r
, PSEUDO_REGNO_MODE (regno
));
550 for (; r
< bound
; r
++)
551 if (TEST_HARD_REG_BIT (used_regs
, r
))
552 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
554 for (i
= 0; i
< call_saved_regs_num
; i
++)
556 saved_reg
= call_saved_regs
[i
];
557 for (j
= 0; j
< call_saved_regs_num
; j
++)
560 saved_reg2
= call_saved_regs
[j
];
561 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
563 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
569 /* Sort saved hard regs. */
570 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
571 saved_hard_reg_compare_func
);
572 /* Initiate slots available from the previous reload
574 prev_save_slots_num
= save_slots_num
;
575 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
577 /* Allocate stack slots for the saved hard registers. */
578 for (i
= 0; i
< saved_regs_num
; i
++)
580 saved_reg
= all_saved_regs
[i
];
581 regno
= saved_reg
->hard_regno
;
582 for (j
= 0; j
< i
; j
++)
584 saved_reg2
= all_saved_regs
[j
];
585 if (! saved_reg2
->first_p
)
587 slot
= saved_reg2
->slot
;
588 for (k
= j
; k
>= 0; k
= next_k
)
590 saved_reg3
= all_saved_regs
[k
];
591 next_k
= saved_reg3
->next
;
592 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
597 && known_le (GET_MODE_SIZE (regno_save_mode
[regno
][1]),
598 GET_MODE_SIZE (regno_save_mode
599 [saved_reg2
->hard_regno
][1])))
603 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
604 regno_save_mem
[regno
][1] = saved_reg
->slot
;
605 saved_reg
->next
= saved_reg2
->next
;
606 saved_reg2
->next
= i
;
607 if (dump_file
!= NULL
)
608 fprintf (dump_file
, "%d uses slot of %d\n",
609 regno
, saved_reg2
->hard_regno
);
615 saved_reg
->first_p
= TRUE
;
616 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
618 slot
= prev_save_slots
[j
];
619 if (slot
== NULL_RTX
)
621 if (known_le (GET_MODE_SIZE (regno_save_mode
[regno
][1]),
622 GET_MODE_SIZE (GET_MODE (slot
)))
623 && best_slot_num
< 0)
625 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
628 if (best_slot_num
>= 0)
630 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
634 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
635 if (dump_file
!= NULL
)
637 "%d uses a slot from prev iteration\n", regno
);
638 prev_save_slots
[best_slot_num
] = NULL_RTX
;
639 if (best_slot_num
+ 1 == prev_save_slots_num
)
640 prev_save_slots_num
--;
645 = assign_stack_local_1
646 (regno_save_mode
[regno
][1],
647 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0,
649 if (dump_file
!= NULL
)
650 fprintf (dump_file
, "%d uses a new slot\n", regno
);
652 regno_save_mem
[regno
][1] = saved_reg
->slot
;
653 save_slots
[save_slots_num
++] = saved_reg
->slot
;
656 free (saved_reg_conflicts
);
657 finish_saved_hard_regs ();
661 /* We are not sharing slots.
663 Run through all the call-used hard-registers and allocate
664 space for each in the caller-save area. Try to allocate space
665 in a manner which allows multi-register saves/restores to be done. */
667 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
668 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
672 /* If no mode exists for this size, try another. Also break out
673 if we have already saved this hard register. */
674 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
677 /* See if any register in this group has been saved. */
678 for (k
= 0; k
< j
; k
++)
679 if (regno_save_mem
[i
+ k
][1])
687 for (k
= 0; k
< j
; k
++)
688 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
696 /* We have found an acceptable mode to store in. Since
697 hard register is always saved in the widest mode
698 available, the mode may be wider than necessary, it is
699 OK to reduce the alignment of spill space. We will
700 verify that it is equal to or greater than required
701 when we restore and save the hard register in
702 insert_restore and insert_save. */
704 = assign_stack_local_1 (regno_save_mode
[i
][j
],
705 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
706 0, ASLK_REDUCE_ALIGN
);
708 /* Setup single word save area just in case... */
709 for (k
= 0; k
< j
; k
++)
710 /* This should not depend on WORDS_BIG_ENDIAN.
711 The order of words in regs is the same as in memory. */
712 regno_save_mem
[i
+ k
][1]
713 = adjust_address_nv (regno_save_mem
[i
][j
],
714 regno_save_mode
[i
+ k
][1],
719 /* Now loop again and set the alias set of any save areas we made to
720 the alias set used to represent frame objects. */
721 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
722 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
723 if (regno_save_mem
[i
][j
] != 0)
724 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
729 /* Find the places where hard regs are live across calls and save them. */
732 save_call_clobbered_regs (void)
734 class insn_chain
*chain
, *next
, *last
= NULL
;
735 machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
737 /* Computed in mark_set_regs, holds all registers set by the current
739 HARD_REG_SET this_insn_sets
;
741 CLEAR_HARD_REG_SET (hard_regs_saved
);
744 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
746 rtx_insn
*insn
= chain
->insn
;
747 enum rtx_code code
= GET_CODE (insn
);
751 gcc_assert (!chain
->is_caller_save_insn
);
753 if (NONDEBUG_INSN_P (insn
))
755 /* If some registers have been saved, see if INSN references
756 any of them. We must restore them before the insn if so. */
761 HARD_REG_SET this_insn_sets
;
763 if (code
== JUMP_INSN
)
764 /* Restore all registers if this is a JUMP_INSN. */
765 referenced_regs
= hard_regs_saved
;
768 CLEAR_HARD_REG_SET (referenced_regs
);
769 mark_referenced_regs (&PATTERN (insn
),
770 mark_reg_as_referenced
, NULL
);
771 referenced_regs
&= hard_regs_saved
;
774 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
775 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
776 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
,
778 /* If a saved register is set after the call, this means we no
779 longer should restore it. This can happen when parts of a
780 multi-word pseudo do not conflict with other pseudos, so
781 IRA may allocate the same hard register for both. One may
782 be live across the call, while the other is set
784 CLEAR_HARD_REG_SET (this_insn_sets
);
785 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
786 hard_regs_saved
&= ~this_insn_sets
;
789 if (code
== CALL_INSN
790 && ! SIBLING_CALL_P (insn
)
791 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
794 HARD_REG_SET hard_regs_to_save
;
795 HARD_REG_SET call_def_reg_set
;
796 reg_set_iterator rsi
;
799 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
801 cheap
= XEXP (cheap
, 0);
803 /* Use the register life information in CHAIN to compute which
804 regs are live during the call. */
805 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
806 &chain
->live_throughout
);
807 /* Save hard registers always in the widest mode available. */
808 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
809 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
810 save_mode
[regno
] = regno_save_mode
[regno
][1];
812 save_mode
[regno
] = VOIDmode
;
814 /* Look through all live pseudos, mark their hard registers
815 and choose proper mode for saving. */
816 EXECUTE_IF_SET_IN_REG_SET
817 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
819 int r
= reg_renumber
[regno
];
823 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
825 nregs
= hard_regno_nregs (r
, PSEUDO_REGNO_MODE (regno
));
826 mode
= HARD_REGNO_CALLER_SAVE_MODE
827 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
828 if (partial_subreg_p (save_mode
[r
], mode
))
831 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
834 /* Record all registers set in this call insn. These don't need
835 to be saved. N.B. the call insn might set a subreg of a
836 multi-hard-reg pseudo; then the pseudo is considered live
837 during the call, but the subreg that is set isn't. */
838 CLEAR_HARD_REG_SET (this_insn_sets
);
839 note_stores (insn
, mark_set_regs
, &this_insn_sets
);
841 /* Compute which hard regs must be saved before this call. */
842 hard_regs_to_save
&= ~(fixed_reg_set
845 hard_regs_to_save
&= savable_regs
;
846 get_call_reg_set_usage (insn
, &call_def_reg_set
,
848 hard_regs_to_save
&= call_def_reg_set
;
850 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
851 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
852 regno
+= insert_save (chain
, regno
,
853 &hard_regs_to_save
, save_mode
);
855 /* Must recompute n_regs_saved. */
857 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
858 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
862 && HARD_REGISTER_P (cheap
)
863 && TEST_HARD_REG_BIT (call_used_reg_set
, REGNO (cheap
)))
866 rtx pat
= PATTERN (insn
);
867 if (GET_CODE (pat
) == PARALLEL
)
868 pat
= XVECEXP (pat
, 0, 0);
869 dest
= SET_DEST (pat
);
870 /* For multiple return values dest is PARALLEL.
871 Currently we handle only single return value case. */
874 newpat
= gen_rtx_SET (cheap
, copy_rtx (dest
));
875 chain
= insert_one_insn (chain
, 0, -1, newpat
);
881 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
882 mark_referenced_regs (&PATTERN (insn
),
883 replace_reg_with_saved_mem
,
886 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
889 /* At the end of the basic block, we must restore any registers that
890 remain saved. If the last insn in the block is a JUMP_INSN, put
891 the restore before the insn, otherwise, put it after the insn. */
894 && DEBUG_INSN_P (insn
)
896 && last
->block
== chain
->block
)
898 rtx_insn
*ins
, *prev
;
899 basic_block bb
= BLOCK_FOR_INSN (insn
);
901 /* When adding hard reg restores after a DEBUG_INSN, move
902 all notes between last real insn and this DEBUG_INSN after
903 the DEBUG_INSN, otherwise we could get code
904 -g/-g0 differences. */
905 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
907 prev
= PREV_INSN (ins
);
910 SET_NEXT_INSN (prev
) = NEXT_INSN (ins
);
911 SET_PREV_INSN (NEXT_INSN (ins
)) = prev
;
912 SET_PREV_INSN (ins
) = insn
;
913 SET_NEXT_INSN (ins
) = NEXT_INSN (insn
);
914 SET_NEXT_INSN (insn
) = ins
;
916 SET_PREV_INSN (NEXT_INSN (ins
)) = ins
;
917 if (BB_END (bb
) == insn
)
921 gcc_assert (DEBUG_INSN_P (ins
));
927 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
928 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
929 regno
+= insert_restore (chain
, JUMP_P (insn
),
930 regno
, MOVE_MAX_WORDS
, save_mode
);
935 /* Here from note_stores, or directly from save_call_clobbered_regs, when
936 an insn stores a value in a register.
937 Set the proper bit or bits in this_insn_sets. All pseudos that have
938 been assigned hard regs have had their register number changed already,
939 so we can ignore pseudos. */
941 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
943 int regno
, endregno
, i
;
944 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
946 if (GET_CODE (reg
) == SUBREG
)
948 rtx inner
= SUBREG_REG (reg
);
949 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
951 regno
= subreg_regno (reg
);
952 endregno
= regno
+ subreg_nregs (reg
);
955 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
958 endregno
= END_REGNO (reg
);
963 for (i
= regno
; i
< endregno
; i
++)
964 SET_HARD_REG_BIT (*this_insn_sets
, i
);
967 /* Here from note_stores when an insn stores a value in a register.
968 Set the proper bit or bits in the passed regset. All pseudos that have
969 been assigned hard regs have had their register number changed already,
970 so we can ignore pseudos. */
972 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
974 int regno
, endregno
, i
;
975 machine_mode mode
= GET_MODE (reg
);
978 if (GET_CODE (setter
) == CLOBBER
)
981 if (GET_CODE (reg
) == SUBREG
982 && REG_P (SUBREG_REG (reg
))
983 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
985 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
986 GET_MODE (SUBREG_REG (reg
)),
989 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
990 endregno
= regno
+ subreg_nregs (reg
);
994 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
997 regno
= REGNO (reg
) + offset
;
998 endregno
= end_hard_regno (mode
, regno
);
1001 for (i
= regno
; i
< endregno
; i
++)
1002 SET_REGNO_REG_SET ((regset
) data
, i
);
1005 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1007 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
1009 enum rtx_code code
= GET_CODE (*loc
);
1014 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
1015 if (code
== SET
|| code
== CLOBBER
)
1017 loc
= &SET_DEST (*loc
);
1018 code
= GET_CODE (*loc
);
1019 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
1020 || code
== PC
|| code
== CC0
1021 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
1022 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
1023 /* If we're setting only part of a multi-word register,
1024 we shall mark it as referenced, because the words
1025 that are not being set should be restored. */
1026 && !read_modify_subreg_p (*loc
)))
1029 if (code
== MEM
|| code
== SUBREG
)
1031 loc
= &XEXP (*loc
, 0);
1032 code
= GET_CODE (*loc
);
1037 int regno
= REGNO (*loc
);
1038 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1039 : reg_renumber
[regno
]);
1042 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1044 /* ??? Will we ever end up with an equiv expression in a debug
1045 insn, that would have required restoring a reg, or will
1046 reload take care of it for us? */
1048 /* If this is a pseudo that did not get a hard register, scan its
1049 memory location, since it might involve the use of another
1050 register, which might be saved. */
1051 else if (reg_equiv_mem (regno
) != 0)
1052 mark_referenced_regs (&XEXP (reg_equiv_mem (regno
), 0), mark
, arg
);
1053 else if (reg_equiv_address (regno
) != 0)
1054 mark_referenced_regs (®_equiv_address (regno
), mark
, arg
);
1058 fmt
= GET_RTX_FORMAT (code
);
1059 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1062 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1063 else if (fmt
[i
] == 'E')
1064 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1065 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1069 /* Parameter function for mark_referenced_regs() that adds registers
1070 present in the insn and in equivalent mems and addresses to
1074 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1077 void *arg ATTRIBUTE_UNUSED
)
1079 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1082 /* Parameter function for mark_referenced_regs() that replaces
1083 registers referenced in a debug_insn that would have been restored,
1084 should it be a non-debug_insn, with their save locations. */
1087 replace_reg_with_saved_mem (rtx
*loc
,
1092 unsigned int i
, nregs
= hard_regno_nregs (regno
, mode
);
1094 machine_mode
*save_mode
= (machine_mode
*)arg
;
1096 for (i
= 0; i
< nregs
; i
++)
1097 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1100 /* If none of the registers in the range would need restoring, we're
1106 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1110 && regno_save_mem
[regno
][nregs
])
1112 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1114 if (nregs
== hard_regno_nregs (regno
, save_mode
[regno
]))
1115 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1117 if (GET_MODE (mem
) != mode
)
1119 /* This is gen_lowpart_if_possible(), but without validating
1120 the newly-formed address. */
1121 poly_int64 offset
= byte_lowpart_offset (mode
, GET_MODE (mem
));
1122 mem
= adjust_address_nv (mem
, mode
, offset
);
1127 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1128 for (i
= 0; i
< nregs
; i
++)
1129 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1131 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1132 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1136 machine_mode smode
= save_mode
[regno
];
1137 gcc_assert (smode
!= VOIDmode
);
1138 if (hard_regno_nregs (regno
, smode
) > 1)
1139 smode
= mode_for_size (exact_div (GET_MODE_BITSIZE (mode
),
1141 GET_MODE_CLASS (mode
), 0).require ();
1142 XVECEXP (mem
, 0, i
) = gen_rtx_REG (smode
, regno
+ i
);
1146 gcc_assert (GET_MODE (mem
) == mode
);
1151 /* Insert a sequence of insns to restore. Place these insns in front of
1152 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1153 the maximum number of registers which should be restored during this call.
1154 It should never be less than 1 since we only work with entire registers.
1156 Note that we have verified in init_caller_save that we can do this
1157 with a simple SET, so use it. Set INSN_CODE to what we save there
1158 since the address might not be valid so the insn might not be recognized.
1159 These insns will be reloaded and have register elimination done by
1160 find_reload, so we need not worry about that here.
1162 Return the extra number of registers saved. */
1165 insert_restore (class insn_chain
*chain
, int before_p
, int regno
,
1166 int maxrestore
, machine_mode
*save_mode
)
1171 unsigned int numregs
= 0;
1172 class insn_chain
*new_chain
;
1175 /* A common failure mode if register status is not correct in the
1176 RTL is for this routine to be called with a REGNO we didn't
1177 expect to save. That will cause us to write an insn with a (nil)
1178 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1179 later, check for this common case here instead. This will remove
1180 one step in debugging such problems. */
1181 gcc_assert (regno_save_mem
[regno
][1]);
1183 /* Get the pattern to emit and update our status.
1185 See if we can restore `maxrestore' registers at once. Work
1186 backwards to the single register case. */
1187 for (i
= maxrestore
; i
> 0; i
--)
1192 if (regno_save_mem
[regno
][i
] == 0)
1195 for (j
= 0; j
< i
; j
++)
1196 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1201 /* Must do this one restore at a time. */
1209 mem
= regno_save_mem
[regno
][numregs
];
1210 if (save_mode
[regno
] != VOIDmode
1211 && save_mode
[regno
] != GET_MODE (mem
)
1212 && numregs
== hard_regno_nregs (regno
, save_mode
[regno
])
1213 /* Check that insn to restore REGNO in save_mode[regno] is
1215 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1216 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1218 mem
= copy_rtx (mem
);
1220 /* Verify that the alignment of spill space is equal to or greater
1222 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1223 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1225 pat
= gen_rtx_SET (gen_rtx_REG (GET_MODE (mem
), regno
), mem
);
1226 code
= reg_restore_code (regno
, GET_MODE (mem
));
1227 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1229 /* Clear status for all registers we restored. */
1230 for (k
= 0; k
< i
; k
++)
1232 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1233 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1237 /* Tell our callers how many extra registers we saved/restored. */
1241 /* Like insert_restore above, but save registers instead. */
1244 insert_save (class insn_chain
*chain
, int regno
,
1245 HARD_REG_SET
*to_save
, machine_mode
*save_mode
)
1251 unsigned int numregs
= 0;
1252 class insn_chain
*new_chain
;
1255 /* A common failure mode if register status is not correct in the
1256 RTL is for this routine to be called with a REGNO we didn't
1257 expect to save. That will cause us to write an insn with a (nil)
1258 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1259 later, check for this common case here. This will remove one
1260 step in debugging such problems. */
1261 gcc_assert (regno_save_mem
[regno
][1]);
1263 /* Get the pattern to emit and update our status.
1265 See if we can save several registers with a single instruction.
1266 Work backwards to the single register case. */
1267 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1271 if (regno_save_mem
[regno
][i
] == 0)
1274 for (j
= 0; j
< i
; j
++)
1275 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1280 /* Must do this one save at a time. */
1288 mem
= regno_save_mem
[regno
][numregs
];
1289 if (save_mode
[regno
] != VOIDmode
1290 && save_mode
[regno
] != GET_MODE (mem
)
1291 && numregs
== hard_regno_nregs (regno
, save_mode
[regno
])
1292 /* Check that insn to save REGNO in save_mode[regno] is
1294 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1295 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1297 mem
= copy_rtx (mem
);
1299 /* Verify that the alignment of spill space is equal to or greater
1301 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1302 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1304 pat
= gen_rtx_SET (mem
, gen_rtx_REG (GET_MODE (mem
), regno
));
1305 code
= reg_save_code (regno
, GET_MODE (mem
));
1306 new_chain
= insert_one_insn (chain
, 1, code
, pat
);
1308 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1309 for (k
= 0; k
< numregs
; k
++)
1311 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1312 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1316 /* Tell our callers how many extra registers we saved/restored. */
1320 /* A note_uses callback used by insert_one_insn. Add the hard-register
1321 equivalent of each REG to regset DATA. */
1324 add_used_regs (rtx
*loc
, void *data
)
1326 subrtx_iterator::array_type array
;
1327 FOR_EACH_SUBRTX (iter
, array
, *loc
, NONCONST
)
1329 const_rtx x
= *iter
;
1332 unsigned int regno
= REGNO (x
);
1333 if (HARD_REGISTER_NUM_P (regno
))
1334 bitmap_set_range ((regset
) data
, regno
, REG_NREGS (x
));
1336 gcc_checking_assert (reg_renumber
[regno
] < 0);
1341 /* Emit a new caller-save insn and set the code. */
1342 static class insn_chain
*
1343 insert_one_insn (class insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1345 rtx_insn
*insn
= chain
->insn
;
1346 class insn_chain
*new_chain
;
1348 /* If INSN references CC0, put our insns in front of the insn that sets
1349 CC0. This is always safe, since the only way we could be passed an
1350 insn that references CC0 is for a restore, and doing a restore earlier
1351 isn't a problem. We do, however, assume here that CALL_INSNs don't
1352 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1354 if (HAVE_cc0
&& (NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1356 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1357 chain
= chain
->prev
, insn
= chain
->insn
;
1359 new_chain
= new_insn_chain ();
1364 new_chain
->prev
= chain
->prev
;
1365 if (new_chain
->prev
!= 0)
1366 new_chain
->prev
->next
= new_chain
;
1368 reload_insn_chain
= new_chain
;
1370 chain
->prev
= new_chain
;
1371 new_chain
->next
= chain
;
1372 new_chain
->insn
= emit_insn_before (pat
, insn
);
1373 /* ??? It would be nice if we could exclude the already / still saved
1374 registers from the live sets. */
1375 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1376 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1377 &new_chain
->live_throughout
);
1378 /* If CHAIN->INSN is a call, then the registers which contain
1379 the arguments to the function are live in the new insn. */
1380 if (CALL_P (chain
->insn
))
1381 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1383 link
= XEXP (link
, 1))
1384 note_uses (&XEXP (link
, 0), add_used_regs
,
1385 &new_chain
->live_throughout
);
1387 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1388 if (chain
->insn
== BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1389 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1393 new_chain
->next
= chain
->next
;
1394 if (new_chain
->next
!= 0)
1395 new_chain
->next
->prev
= new_chain
;
1396 chain
->next
= new_chain
;
1397 new_chain
->prev
= chain
;
1398 new_chain
->insn
= emit_insn_after (pat
, insn
);
1399 /* ??? It would be nice if we could exclude the already / still saved
1400 registers from the live sets, and observe REG_UNUSED notes. */
1401 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1402 /* Registers that are set in CHAIN->INSN live in the new insn.
1403 (Unless there is a REG_UNUSED note for them, but we don't
1404 look for them here.) */
1405 note_stores (chain
->insn
, add_stored_regs
, &new_chain
->live_throughout
);
1406 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1407 if (chain
->insn
== BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1408 BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1410 new_chain
->block
= chain
->block
;
1411 new_chain
->is_caller_save_insn
= 1;
1413 INSN_CODE (new_chain
->insn
) = code
;
1416 #include "gt-caller-save.h"