1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
26 #include "insn-config.h"
28 #include "hard-reg-set.h"
36 #include "dominance.h"
38 #include "basic-block.h"
42 #include "statistics.h"
54 #include "diagnostic-core.h"
56 #include "addresses.h"
61 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
63 #define regno_save_mode \
64 (this_target_reload->x_regno_save_mode)
65 #define cached_reg_save_code \
66 (this_target_reload->x_cached_reg_save_code)
67 #define cached_reg_restore_code \
68 (this_target_reload->x_cached_reg_restore_code)
70 /* For each hard register, a place on the stack where it can be saved,
74 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
76 /* The number of elements in the subsequent array. */
77 static int save_slots_num
;
79 /* Allocated slots so far. */
80 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
82 /* Set of hard regs currently residing in save area (during insn scan). */
84 static HARD_REG_SET hard_regs_saved
;
86 /* Number of registers currently in hard_regs_saved. */
88 static int n_regs_saved
;
90 /* Computed by mark_referenced_regs, all regs referenced in a given
92 static HARD_REG_SET referenced_regs
;
95 typedef void refmarker_fn (rtx
*loc
, machine_mode mode
, int hardregno
,
98 static int reg_save_code (int, machine_mode
);
99 static int reg_restore_code (int, machine_mode
);
101 struct saved_hard_reg
;
102 static void initiate_saved_hard_regs (void);
103 static void new_saved_hard_reg (int, int);
104 static void finish_saved_hard_regs (void);
105 static int saved_hard_reg_compare_func (const void *, const void *);
107 static void mark_set_regs (rtx
, const_rtx
, void *);
108 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
109 static refmarker_fn mark_reg_as_referenced
;
110 static refmarker_fn replace_reg_with_saved_mem
;
111 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
113 static int insert_restore (struct insn_chain
*, int, int, int,
115 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
117 static void add_stored_regs (rtx
, const_rtx
, void *);
121 static GTY(()) rtx savepat
;
122 static GTY(()) rtx restpat
;
123 static GTY(()) rtx test_reg
;
124 static GTY(()) rtx test_mem
;
125 static GTY(()) rtx_insn
*saveinsn
;
126 static GTY(()) rtx_insn
*restinsn
;
128 /* Return the INSN_CODE used to save register REG in mode MODE. */
130 reg_save_code (int reg
, machine_mode mode
)
133 if (cached_reg_save_code
[reg
][mode
])
134 return cached_reg_save_code
[reg
][mode
];
135 if (!HARD_REGNO_MODE_OK (reg
, mode
))
137 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
138 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
139 below silences a warning. */
140 gcc_assert (reg
< FIRST_PSEUDO_REGISTER
);
141 cached_reg_save_code
[reg
][mode
] = -1;
142 cached_reg_restore_code
[reg
][mode
] = -1;
146 /* Update the register number and modes of the register
147 and memory operand. */
148 set_mode_and_regno (test_reg
, mode
, reg
);
149 PUT_MODE (test_mem
, mode
);
151 /* Force re-recognition of the modified insns. */
152 INSN_CODE (saveinsn
) = -1;
153 INSN_CODE (restinsn
) = -1;
155 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
156 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
158 /* Now extract both insns and see if we can meet their
159 constraints. We don't know here whether the save and restore will
160 be in size- or speed-tuned code, so just use the set of enabled
162 ok
= (cached_reg_save_code
[reg
][mode
] != -1
163 && cached_reg_restore_code
[reg
][mode
] != -1);
166 extract_insn (saveinsn
);
167 ok
= constrain_operands (1, get_enabled_alternatives (saveinsn
));
168 extract_insn (restinsn
);
169 ok
&= constrain_operands (1, get_enabled_alternatives (restinsn
));
174 cached_reg_save_code
[reg
][mode
] = -1;
175 cached_reg_restore_code
[reg
][mode
] = -1;
177 gcc_assert (cached_reg_save_code
[reg
][mode
]);
178 return cached_reg_save_code
[reg
][mode
];
181 /* Return the INSN_CODE used to restore register REG in mode MODE. */
183 reg_restore_code (int reg
, machine_mode mode
)
185 if (cached_reg_restore_code
[reg
][mode
])
186 return cached_reg_restore_code
[reg
][mode
];
187 /* Populate our cache. */
188 reg_save_code (reg
, mode
);
189 return cached_reg_restore_code
[reg
][mode
];
192 /* Initialize for caller-save.
194 Look at all the hard registers that are used by a call and for which
195 reginfo.c has not already excluded from being used across a call.
197 Ensure that we can find a mode to save the register and that there is a
198 simple insn to save and restore the register. This latter check avoids
199 problems that would occur if we tried to save the MQ register of some
200 machines directly into memory. */
203 init_caller_save (void)
210 if (caller_save_initialized_p
)
213 caller_save_initialized_p
= true;
215 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
216 /* First find all the registers that we need to deal with and all
217 the modes that they can have. If we can't find a mode to use,
218 we can't have the register live over calls. */
220 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
222 if (call_used_regs
[i
]
223 && !TEST_HARD_REG_BIT (call_fixed_reg_set
, i
))
225 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
227 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
229 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
231 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
236 regno_save_mode
[i
][1] = VOIDmode
;
239 /* The following code tries to approximate the conditions under which
240 we can easily save and restore a register without scratch registers or
241 other complexities. It will usually work, except under conditions where
242 the validity of an insn operand is dependent on the address offset.
243 No such cases are currently known.
245 We first find a typical offset from some BASE_REG_CLASS register.
246 This address is chosen by finding the first register in the class
247 and by finding the smallest power of two that is a valid offset from
248 that register in every mode we will use to save registers. */
250 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
251 if (TEST_HARD_REG_BIT
253 [(int) base_reg_class (regno_save_mode
[i
][1], ADDR_SPACE_GENERIC
,
254 PLUS
, CONST_INT
)], i
))
257 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
259 addr_reg
= gen_rtx_REG (Pmode
, i
);
261 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
263 address
= gen_rtx_PLUS (Pmode
, addr_reg
, gen_int_mode (offset
, Pmode
));
265 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
266 if (regno_save_mode
[i
][1] != VOIDmode
267 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
270 if (i
== FIRST_PSEUDO_REGISTER
)
274 /* If we didn't find a valid address, we must use register indirect. */
278 /* Next we try to form an insn to save and restore the register. We
279 see if such an insn is recognized and meets its constraints.
281 To avoid lots of unnecessary RTL allocation, we construct all the RTL
282 once, then modify the memory and register operands in-place. */
284 test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
285 test_mem
= gen_rtx_MEM (word_mode
, address
);
286 savepat
= gen_rtx_SET (test_mem
, test_reg
);
287 restpat
= gen_rtx_SET (test_reg
, test_mem
);
289 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, savepat
, 0, -1, 0);
290 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, restpat
, 0, -1, 0);
292 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
293 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
294 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
296 regno_save_mode
[i
][j
] = VOIDmode
;
299 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
300 if (call_used_regs
[i
])
301 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
308 /* Initialize save areas by showing that we haven't allocated any yet. */
311 init_save_areas (void)
315 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
316 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
317 regno_save_mem
[i
][j
] = 0;
322 /* The structure represents a hard register which should be saved
323 through the call. It is used when the integrated register
324 allocator (IRA) is used and sharing save slots is on. */
325 struct saved_hard_reg
327 /* Order number starting with 0. */
329 /* The hard regno. */
331 /* Execution frequency of all calls through which given hard
332 register should be saved. */
334 /* Stack slot reserved to save the hard register through calls. */
336 /* True if it is first hard register in the chain of hard registers
337 sharing the same stack slot. */
339 /* Order number of the next hard register structure with the same
340 slot in the chain. -1 represents end of the chain. */
344 /* Map: hard register number to the corresponding structure. */
345 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
347 /* The number of all structures representing hard registers should be
348 saved, in order words, the number of used elements in the following
350 static int saved_regs_num
;
352 /* Pointers to all the structures. Index is the order number of the
353 corresponding structure. */
354 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
356 /* First called function for work with saved hard registers. */
358 initiate_saved_hard_regs (void)
363 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
364 hard_reg_map
[i
] = NULL
;
367 /* Allocate and return new saved hard register with given REGNO and
370 new_saved_hard_reg (int regno
, int call_freq
)
372 struct saved_hard_reg
*saved_reg
;
375 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
376 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
377 saved_reg
->num
= saved_regs_num
++;
378 saved_reg
->hard_regno
= regno
;
379 saved_reg
->call_freq
= call_freq
;
380 saved_reg
->first_p
= FALSE
;
381 saved_reg
->next
= -1;
384 /* Free memory allocated for the saved hard registers. */
386 finish_saved_hard_regs (void)
390 for (i
= 0; i
< saved_regs_num
; i
++)
391 free (all_saved_regs
[i
]);
394 /* The function is used to sort the saved hard register structures
395 according their frequency. */
397 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
399 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
400 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
402 if (flag_omit_frame_pointer
)
404 if (p1
->call_freq
- p2
->call_freq
!= 0)
405 return p1
->call_freq
- p2
->call_freq
;
407 else if (p2
->call_freq
- p1
->call_freq
!= 0)
408 return p2
->call_freq
- p1
->call_freq
;
410 return p1
->num
- p2
->num
;
413 /* Allocate save areas for any hard registers that might need saving.
414 We take a conservative approach here and look for call-clobbered hard
415 registers that are assigned to pseudos that cross calls. This may
416 overestimate slightly (especially if some of these registers are later
417 used as spill registers), but it should not be significant.
419 For IRA we use priority coloring to decrease stack slots needed for
420 saving hard registers through calls. We build conflicts for them
425 In the fallback case we should iterate backwards across all possible
426 modes for the save, choosing the largest available one instead of
427 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
429 We do not try to use "move multiple" instructions that exist
430 on some machines (such as the 68k moveml). It could be a win to try
431 and use them when possible. The hard part is doing it in a way that is
432 machine independent since they might be saving non-consecutive
433 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
436 setup_save_areas (void)
439 HARD_REG_SET hard_regs_used
;
440 struct saved_hard_reg
*saved_reg
;
442 struct insn_chain
*chain
, *next
;
444 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
445 reg_set_iterator rsi
;
447 CLEAR_HARD_REG_SET (hard_regs_used
);
449 /* Find every CALL_INSN and record which hard regs are live across the
450 call into HARD_REG_MAP and HARD_REGS_USED. */
451 initiate_saved_hard_regs ();
452 /* Create hard reg saved regs. */
453 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
460 || find_reg_note (insn
, REG_NORETURN
, NULL
))
462 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
463 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
464 &chain
->live_throughout
);
465 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
467 /* Record all registers set in this call insn. These don't
468 need to be saved. N.B. the call insn might set a subreg
469 of a multi-hard-reg pseudo; then the pseudo is considered
470 live during the call, but the subreg that is set
472 CLEAR_HARD_REG_SET (this_insn_sets
);
473 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
474 /* Sibcalls are considered to set the return value. */
475 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
476 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
478 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
479 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
480 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
481 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
482 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
484 if (hard_reg_map
[regno
] != NULL
)
485 hard_reg_map
[regno
]->call_freq
+= freq
;
487 new_saved_hard_reg (regno
, freq
);
488 SET_HARD_REG_BIT (hard_regs_used
, regno
);
490 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
492 cheap
= XEXP (cheap
, 0);
493 /* Look through all live pseudos, mark their hard registers. */
494 EXECUTE_IF_SET_IN_REG_SET
495 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
497 int r
= reg_renumber
[regno
];
500 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
503 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
504 for (; r
< bound
; r
++)
505 if (TEST_HARD_REG_BIT (used_regs
, r
))
507 if (hard_reg_map
[r
] != NULL
)
508 hard_reg_map
[r
]->call_freq
+= freq
;
510 new_saved_hard_reg (r
, freq
);
511 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
512 SET_HARD_REG_BIT (hard_regs_used
, r
);
517 /* If requested, figure out which hard regs can share save slots. */
518 if (optimize
&& flag_ira_share_save_slots
)
521 char *saved_reg_conflicts
;
523 struct saved_hard_reg
*saved_reg2
, *saved_reg3
;
524 int call_saved_regs_num
;
525 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
527 int prev_save_slots_num
;
528 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
530 /* Find saved hard register conflicts. */
531 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
532 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
533 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
536 call_saved_regs_num
= 0;
540 || find_reg_note (insn
, REG_NORETURN
, NULL
))
543 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
545 cheap
= XEXP (cheap
, 0);
547 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
548 &chain
->live_throughout
);
549 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
551 /* Record all registers set in this call insn. These don't
552 need to be saved. N.B. the call insn might set a subreg
553 of a multi-hard-reg pseudo; then the pseudo is considered
554 live during the call, but the subreg that is set
556 CLEAR_HARD_REG_SET (this_insn_sets
);
557 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
558 /* Sibcalls are considered to set the return value,
559 compare df-scan.c:df_get_call_refs. */
560 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
561 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
563 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
564 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
565 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
566 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
567 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
569 gcc_assert (hard_reg_map
[regno
] != NULL
);
570 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
572 /* Look through all live pseudos, mark their hard registers. */
573 EXECUTE_IF_SET_IN_REG_SET
574 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
576 int r
= reg_renumber
[regno
];
579 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
582 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
583 for (; r
< bound
; r
++)
584 if (TEST_HARD_REG_BIT (used_regs
, r
))
585 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
587 for (i
= 0; i
< call_saved_regs_num
; i
++)
589 saved_reg
= call_saved_regs
[i
];
590 for (j
= 0; j
< call_saved_regs_num
; j
++)
593 saved_reg2
= call_saved_regs
[j
];
594 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
596 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
602 /* Sort saved hard regs. */
603 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
604 saved_hard_reg_compare_func
);
605 /* Initiate slots available from the previous reload
607 prev_save_slots_num
= save_slots_num
;
608 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
610 /* Allocate stack slots for the saved hard registers. */
611 for (i
= 0; i
< saved_regs_num
; i
++)
613 saved_reg
= all_saved_regs
[i
];
614 regno
= saved_reg
->hard_regno
;
615 for (j
= 0; j
< i
; j
++)
617 saved_reg2
= all_saved_regs
[j
];
618 if (! saved_reg2
->first_p
)
620 slot
= saved_reg2
->slot
;
621 for (k
= j
; k
>= 0; k
= next_k
)
623 saved_reg3
= all_saved_regs
[k
];
624 next_k
= saved_reg3
->next
;
625 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
630 && (GET_MODE_SIZE (regno_save_mode
[regno
][1])
631 <= GET_MODE_SIZE (regno_save_mode
632 [saved_reg2
->hard_regno
][1])))
636 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
637 regno_save_mem
[regno
][1] = saved_reg
->slot
;
638 saved_reg
->next
= saved_reg2
->next
;
639 saved_reg2
->next
= i
;
640 if (dump_file
!= NULL
)
641 fprintf (dump_file
, "%d uses slot of %d\n",
642 regno
, saved_reg2
->hard_regno
);
648 saved_reg
->first_p
= TRUE
;
649 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
651 slot
= prev_save_slots
[j
];
652 if (slot
== NULL_RTX
)
654 if (GET_MODE_SIZE (regno_save_mode
[regno
][1])
655 <= GET_MODE_SIZE (GET_MODE (slot
))
656 && best_slot_num
< 0)
658 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
661 if (best_slot_num
>= 0)
663 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
667 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
668 if (dump_file
!= NULL
)
670 "%d uses a slot from prev iteration\n", regno
);
671 prev_save_slots
[best_slot_num
] = NULL_RTX
;
672 if (best_slot_num
+ 1 == prev_save_slots_num
)
673 prev_save_slots_num
--;
678 = assign_stack_local_1
679 (regno_save_mode
[regno
][1],
680 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0,
682 if (dump_file
!= NULL
)
683 fprintf (dump_file
, "%d uses a new slot\n", regno
);
685 regno_save_mem
[regno
][1] = saved_reg
->slot
;
686 save_slots
[save_slots_num
++] = saved_reg
->slot
;
689 free (saved_reg_conflicts
);
690 finish_saved_hard_regs ();
694 /* We are not sharing slots.
696 Run through all the call-used hard-registers and allocate
697 space for each in the caller-save area. Try to allocate space
698 in a manner which allows multi-register saves/restores to be done. */
700 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
701 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
705 /* If no mode exists for this size, try another. Also break out
706 if we have already saved this hard register. */
707 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
710 /* See if any register in this group has been saved. */
711 for (k
= 0; k
< j
; k
++)
712 if (regno_save_mem
[i
+ k
][1])
720 for (k
= 0; k
< j
; k
++)
721 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
729 /* We have found an acceptable mode to store in. Since
730 hard register is always saved in the widest mode
731 available, the mode may be wider than necessary, it is
732 OK to reduce the alignment of spill space. We will
733 verify that it is equal to or greater than required
734 when we restore and save the hard register in
735 insert_restore and insert_save. */
737 = assign_stack_local_1 (regno_save_mode
[i
][j
],
738 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
739 0, ASLK_REDUCE_ALIGN
);
741 /* Setup single word save area just in case... */
742 for (k
= 0; k
< j
; k
++)
743 /* This should not depend on WORDS_BIG_ENDIAN.
744 The order of words in regs is the same as in memory. */
745 regno_save_mem
[i
+ k
][1]
746 = adjust_address_nv (regno_save_mem
[i
][j
],
747 regno_save_mode
[i
+ k
][1],
752 /* Now loop again and set the alias set of any save areas we made to
753 the alias set used to represent frame objects. */
754 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
755 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
756 if (regno_save_mem
[i
][j
] != 0)
757 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
762 /* Find the places where hard regs are live across calls and save them. */
765 save_call_clobbered_regs (void)
767 struct insn_chain
*chain
, *next
, *last
= NULL
;
768 machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
770 /* Computed in mark_set_regs, holds all registers set by the current
772 HARD_REG_SET this_insn_sets
;
774 CLEAR_HARD_REG_SET (hard_regs_saved
);
777 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
779 rtx_insn
*insn
= chain
->insn
;
780 enum rtx_code code
= GET_CODE (insn
);
784 gcc_assert (!chain
->is_caller_save_insn
);
786 if (NONDEBUG_INSN_P (insn
))
788 /* If some registers have been saved, see if INSN references
789 any of them. We must restore them before the insn if so. */
794 HARD_REG_SET this_insn_sets
;
796 if (code
== JUMP_INSN
)
797 /* Restore all registers if this is a JUMP_INSN. */
798 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
801 CLEAR_HARD_REG_SET (referenced_regs
);
802 mark_referenced_regs (&PATTERN (insn
),
803 mark_reg_as_referenced
, NULL
);
804 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
807 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
808 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
809 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
,
811 /* If a saved register is set after the call, this means we no
812 longer should restore it. This can happen when parts of a
813 multi-word pseudo do not conflict with other pseudos, so
814 IRA may allocate the same hard register for both. One may
815 be live across the call, while the other is set
817 CLEAR_HARD_REG_SET (this_insn_sets
);
818 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
819 AND_COMPL_HARD_REG_SET (hard_regs_saved
, this_insn_sets
);
822 if (code
== CALL_INSN
823 && ! SIBLING_CALL_P (insn
)
824 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
827 HARD_REG_SET hard_regs_to_save
;
828 HARD_REG_SET call_def_reg_set
;
829 reg_set_iterator rsi
;
832 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
834 cheap
= XEXP (cheap
, 0);
836 /* Use the register life information in CHAIN to compute which
837 regs are live during the call. */
838 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
839 &chain
->live_throughout
);
840 /* Save hard registers always in the widest mode available. */
841 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
842 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
843 save_mode
[regno
] = regno_save_mode
[regno
][1];
845 save_mode
[regno
] = VOIDmode
;
847 /* Look through all live pseudos, mark their hard registers
848 and choose proper mode for saving. */
849 EXECUTE_IF_SET_IN_REG_SET
850 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
852 int r
= reg_renumber
[regno
];
856 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
858 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
859 mode
= HARD_REGNO_CALLER_SAVE_MODE
860 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
861 if (GET_MODE_BITSIZE (mode
)
862 > GET_MODE_BITSIZE (save_mode
[r
]))
865 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
868 /* Record all registers set in this call insn. These don't need
869 to be saved. N.B. the call insn might set a subreg of a
870 multi-hard-reg pseudo; then the pseudo is considered live
871 during the call, but the subreg that is set isn't. */
872 CLEAR_HARD_REG_SET (this_insn_sets
);
873 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
875 /* Compute which hard regs must be saved before this call. */
876 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
877 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
878 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
879 get_call_reg_set_usage (insn
, &call_def_reg_set
,
881 AND_HARD_REG_SET (hard_regs_to_save
, call_def_reg_set
);
883 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
884 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
885 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
887 /* Must recompute n_regs_saved. */
889 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
890 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
894 && HARD_REGISTER_P (cheap
)
895 && TEST_HARD_REG_BIT (call_used_reg_set
, REGNO (cheap
)))
898 rtx pat
= PATTERN (insn
);
899 if (GET_CODE (pat
) == PARALLEL
)
900 pat
= XVECEXP (pat
, 0, 0);
901 dest
= SET_DEST (pat
);
902 /* For multiple return values dest is PARALLEL.
903 Currently we handle only single return value case. */
906 newpat
= gen_rtx_SET (cheap
, copy_rtx (dest
));
907 chain
= insert_one_insn (chain
, 0, -1, newpat
);
913 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
914 mark_referenced_regs (&PATTERN (insn
),
915 replace_reg_with_saved_mem
,
918 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
921 /* At the end of the basic block, we must restore any registers that
922 remain saved. If the last insn in the block is a JUMP_INSN, put
923 the restore before the insn, otherwise, put it after the insn. */
926 && DEBUG_INSN_P (insn
)
928 && last
->block
== chain
->block
)
930 rtx_insn
*ins
, *prev
;
931 basic_block bb
= BLOCK_FOR_INSN (insn
);
933 /* When adding hard reg restores after a DEBUG_INSN, move
934 all notes between last real insn and this DEBUG_INSN after
935 the DEBUG_INSN, otherwise we could get code
936 -g/-g0 differences. */
937 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
939 prev
= PREV_INSN (ins
);
942 SET_NEXT_INSN (prev
) = NEXT_INSN (ins
);
943 SET_PREV_INSN (NEXT_INSN (ins
)) = prev
;
944 SET_PREV_INSN (ins
) = insn
;
945 SET_NEXT_INSN (ins
) = NEXT_INSN (insn
);
946 SET_NEXT_INSN (insn
) = ins
;
948 SET_PREV_INSN (NEXT_INSN (ins
)) = ins
;
949 if (BB_END (bb
) == insn
)
953 gcc_assert (DEBUG_INSN_P (ins
));
959 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
960 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
961 regno
+= insert_restore (chain
, JUMP_P (insn
),
962 regno
, MOVE_MAX_WORDS
, save_mode
);
967 /* Here from note_stores, or directly from save_call_clobbered_regs, when
968 an insn stores a value in a register.
969 Set the proper bit or bits in this_insn_sets. All pseudos that have
970 been assigned hard regs have had their register number changed already,
971 so we can ignore pseudos. */
973 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
975 int regno
, endregno
, i
;
976 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
978 if (GET_CODE (reg
) == SUBREG
)
980 rtx inner
= SUBREG_REG (reg
);
981 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
983 regno
= subreg_regno (reg
);
984 endregno
= regno
+ subreg_nregs (reg
);
987 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
990 endregno
= END_REGNO (reg
);
995 for (i
= regno
; i
< endregno
; i
++)
996 SET_HARD_REG_BIT (*this_insn_sets
, i
);
999 /* Here from note_stores when an insn stores a value in a register.
1000 Set the proper bit or bits in the passed regset. All pseudos that have
1001 been assigned hard regs have had their register number changed already,
1002 so we can ignore pseudos. */
1004 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
1006 int regno
, endregno
, i
;
1007 machine_mode mode
= GET_MODE (reg
);
1010 if (GET_CODE (setter
) == CLOBBER
)
1013 if (GET_CODE (reg
) == SUBREG
1014 && REG_P (SUBREG_REG (reg
))
1015 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
1017 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
1018 GET_MODE (SUBREG_REG (reg
)),
1021 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
1022 endregno
= regno
+ subreg_nregs (reg
);
1026 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
1029 regno
= REGNO (reg
) + offset
;
1030 endregno
= end_hard_regno (mode
, regno
);
1033 for (i
= regno
; i
< endregno
; i
++)
1034 SET_REGNO_REG_SET ((regset
) data
, i
);
1037 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1039 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
1041 enum rtx_code code
= GET_CODE (*loc
);
1046 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
1047 if (code
== SET
|| code
== CLOBBER
)
1049 loc
= &SET_DEST (*loc
);
1050 code
= GET_CODE (*loc
);
1051 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
1052 || code
== PC
|| code
== CC0
1053 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
1054 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
1055 /* If we're setting only part of a multi-word register,
1056 we shall mark it as referenced, because the words
1057 that are not being set should be restored. */
1058 && ((GET_MODE_SIZE (GET_MODE (*loc
))
1059 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
))))
1060 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
)))
1061 <= UNITS_PER_WORD
))))
1064 if (code
== MEM
|| code
== SUBREG
)
1066 loc
= &XEXP (*loc
, 0);
1067 code
= GET_CODE (*loc
);
1072 int regno
= REGNO (*loc
);
1073 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1074 : reg_renumber
[regno
]);
1077 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1079 /* ??? Will we ever end up with an equiv expression in a debug
1080 insn, that would have required restoring a reg, or will
1081 reload take care of it for us? */
1083 /* If this is a pseudo that did not get a hard register, scan its
1084 memory location, since it might involve the use of another
1085 register, which might be saved. */
1086 else if (reg_equiv_mem (regno
) != 0)
1087 mark_referenced_regs (&XEXP (reg_equiv_mem (regno
), 0), mark
, arg
);
1088 else if (reg_equiv_address (regno
) != 0)
1089 mark_referenced_regs (®_equiv_address (regno
), mark
, arg
);
1093 fmt
= GET_RTX_FORMAT (code
);
1094 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1097 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1098 else if (fmt
[i
] == 'E')
1099 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1100 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1104 /* Parameter function for mark_referenced_regs() that adds registers
1105 present in the insn and in equivalent mems and addresses to
1109 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1112 void *arg ATTRIBUTE_UNUSED
)
1114 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1117 /* Parameter function for mark_referenced_regs() that replaces
1118 registers referenced in a debug_insn that would have been restored,
1119 should it be a non-debug_insn, with their save locations. */
1122 replace_reg_with_saved_mem (rtx
*loc
,
1127 unsigned int i
, nregs
= hard_regno_nregs
[regno
][mode
];
1129 machine_mode
*save_mode
= (machine_mode
*)arg
;
1131 for (i
= 0; i
< nregs
; i
++)
1132 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1135 /* If none of the registers in the range would need restoring, we're
1141 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1145 && regno_save_mem
[regno
][nregs
])
1147 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1149 if (nregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
1150 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1152 if (GET_MODE (mem
) != mode
)
1154 /* This is gen_lowpart_if_possible(), but without validating
1155 the newly-formed address. */
1158 if (WORDS_BIG_ENDIAN
)
1159 offset
= (MAX (GET_MODE_SIZE (GET_MODE (mem
)), UNITS_PER_WORD
)
1160 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1161 if (BYTES_BIG_ENDIAN
)
1162 /* Adjust the address so that the address-after-the-data is
1164 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1165 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (mem
))));
1167 mem
= adjust_address_nv (mem
, mode
, offset
);
1172 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1173 for (i
= 0; i
< nregs
; i
++)
1174 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1176 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1177 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1181 machine_mode smode
= save_mode
[regno
];
1182 gcc_assert (smode
!= VOIDmode
);
1183 if (hard_regno_nregs
[regno
][smode
] > 1)
1184 smode
= mode_for_size (GET_MODE_SIZE (mode
) / nregs
,
1185 GET_MODE_CLASS (mode
), 0);
1186 XVECEXP (mem
, 0, i
) = gen_rtx_REG (smode
, regno
+ i
);
1190 gcc_assert (GET_MODE (mem
) == mode
);
1195 /* Insert a sequence of insns to restore. Place these insns in front of
1196 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1197 the maximum number of registers which should be restored during this call.
1198 It should never be less than 1 since we only work with entire registers.
1200 Note that we have verified in init_caller_save that we can do this
1201 with a simple SET, so use it. Set INSN_CODE to what we save there
1202 since the address might not be valid so the insn might not be recognized.
1203 These insns will be reloaded and have register elimination done by
1204 find_reload, so we need not worry about that here.
1206 Return the extra number of registers saved. */
1209 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
1210 int maxrestore
, machine_mode
*save_mode
)
1215 unsigned int numregs
= 0;
1216 struct insn_chain
*new_chain
;
1219 /* A common failure mode if register status is not correct in the
1220 RTL is for this routine to be called with a REGNO we didn't
1221 expect to save. That will cause us to write an insn with a (nil)
1222 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1223 later, check for this common case here instead. This will remove
1224 one step in debugging such problems. */
1225 gcc_assert (regno_save_mem
[regno
][1]);
1227 /* Get the pattern to emit and update our status.
1229 See if we can restore `maxrestore' registers at once. Work
1230 backwards to the single register case. */
1231 for (i
= maxrestore
; i
> 0; i
--)
1236 if (regno_save_mem
[regno
][i
] == 0)
1239 for (j
= 0; j
< i
; j
++)
1240 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1245 /* Must do this one restore at a time. */
1253 mem
= regno_save_mem
[regno
][numregs
];
1254 if (save_mode
[regno
] != VOIDmode
1255 && save_mode
[regno
] != GET_MODE (mem
)
1256 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1257 /* Check that insn to restore REGNO in save_mode[regno] is
1259 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1260 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1262 mem
= copy_rtx (mem
);
1264 /* Verify that the alignment of spill space is equal to or greater
1266 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1267 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1269 pat
= gen_rtx_SET (gen_rtx_REG (GET_MODE (mem
), regno
), mem
);
1270 code
= reg_restore_code (regno
, GET_MODE (mem
));
1271 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1273 /* Clear status for all registers we restored. */
1274 for (k
= 0; k
< i
; k
++)
1276 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1277 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1281 /* Tell our callers how many extra registers we saved/restored. */
1285 /* Like insert_restore above, but save registers instead. */
1288 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
1289 HARD_REG_SET (*to_save
), machine_mode
*save_mode
)
1295 unsigned int numregs
= 0;
1296 struct insn_chain
*new_chain
;
1299 /* A common failure mode if register status is not correct in the
1300 RTL is for this routine to be called with a REGNO we didn't
1301 expect to save. That will cause us to write an insn with a (nil)
1302 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1303 later, check for this common case here. This will remove one
1304 step in debugging such problems. */
1305 gcc_assert (regno_save_mem
[regno
][1]);
1307 /* Get the pattern to emit and update our status.
1309 See if we can save several registers with a single instruction.
1310 Work backwards to the single register case. */
1311 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1315 if (regno_save_mem
[regno
][i
] == 0)
1318 for (j
= 0; j
< i
; j
++)
1319 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1324 /* Must do this one save at a time. */
1332 mem
= regno_save_mem
[regno
][numregs
];
1333 if (save_mode
[regno
] != VOIDmode
1334 && save_mode
[regno
] != GET_MODE (mem
)
1335 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1336 /* Check that insn to save REGNO in save_mode[regno] is
1338 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1339 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1341 mem
= copy_rtx (mem
);
1343 /* Verify that the alignment of spill space is equal to or greater
1345 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1346 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1348 pat
= gen_rtx_SET (mem
, gen_rtx_REG (GET_MODE (mem
), regno
));
1349 code
= reg_save_code (regno
, GET_MODE (mem
));
1350 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1352 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1353 for (k
= 0; k
< numregs
; k
++)
1355 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1356 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1360 /* Tell our callers how many extra registers we saved/restored. */
1364 /* A note_uses callback used by insert_one_insn. Add the hard-register
1365 equivalent of each REG to regset DATA. */
1368 add_used_regs (rtx
*loc
, void *data
)
1370 subrtx_iterator::array_type array
;
1371 FOR_EACH_SUBRTX (iter
, array
, *loc
, NONCONST
)
1373 const_rtx x
= *iter
;
1376 unsigned int regno
= REGNO (x
);
1377 if (HARD_REGISTER_NUM_P (regno
))
1378 bitmap_set_range ((regset
) data
, regno
,
1379 hard_regno_nregs
[regno
][GET_MODE (x
)]);
1381 gcc_checking_assert (reg_renumber
[regno
] < 0);
1386 /* Emit a new caller-save insn and set the code. */
1387 static struct insn_chain
*
1388 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1390 rtx_insn
*insn
= chain
->insn
;
1391 struct insn_chain
*new_chain
;
1393 /* If INSN references CC0, put our insns in front of the insn that sets
1394 CC0. This is always safe, since the only way we could be passed an
1395 insn that references CC0 is for a restore, and doing a restore earlier
1396 isn't a problem. We do, however, assume here that CALL_INSNs don't
1397 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1399 if (HAVE_cc0
&& (NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1401 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1402 chain
= chain
->prev
, insn
= chain
->insn
;
1404 new_chain
= new_insn_chain ();
1409 new_chain
->prev
= chain
->prev
;
1410 if (new_chain
->prev
!= 0)
1411 new_chain
->prev
->next
= new_chain
;
1413 reload_insn_chain
= new_chain
;
1415 chain
->prev
= new_chain
;
1416 new_chain
->next
= chain
;
1417 new_chain
->insn
= emit_insn_before (pat
, insn
);
1418 /* ??? It would be nice if we could exclude the already / still saved
1419 registers from the live sets. */
1420 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1421 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1422 &new_chain
->live_throughout
);
1423 /* If CHAIN->INSN is a call, then the registers which contain
1424 the arguments to the function are live in the new insn. */
1425 if (CALL_P (chain
->insn
))
1426 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1428 link
= XEXP (link
, 1))
1429 note_uses (&XEXP (link
, 0), add_used_regs
,
1430 &new_chain
->live_throughout
);
1432 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1433 if (chain
->insn
== BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1434 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1438 new_chain
->next
= chain
->next
;
1439 if (new_chain
->next
!= 0)
1440 new_chain
->next
->prev
= new_chain
;
1441 chain
->next
= new_chain
;
1442 new_chain
->prev
= chain
;
1443 new_chain
->insn
= emit_insn_after (pat
, insn
);
1444 /* ??? It would be nice if we could exclude the already / still saved
1445 registers from the live sets, and observe REG_UNUSED notes. */
1446 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1447 /* Registers that are set in CHAIN->INSN live in the new insn.
1448 (Unless there is a REG_UNUSED note for them, but we don't
1449 look for them here.) */
1450 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
1451 &new_chain
->live_throughout
);
1452 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1453 if (chain
->insn
== BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1454 BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1456 new_chain
->block
= chain
->block
;
1457 new_chain
->is_caller_save_insn
= 1;
1459 INSN_CODE (new_chain
->insn
) = code
;
1462 #include "gt-caller-save.h"