1 /* Common hooks for ARM.
2 Copyright (C) 1991-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published
8 by the Free Software Foundation; either version 3, or (at your
9 option) any later version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
27 #include "common/common-target.h"
28 #include "common/common-target-def.h"
32 #include "diagnostic.h"
34 /* Set default optimization options. */
35 static const struct default_options arm_option_optimization_table
[] =
37 /* Enable section anchors by default at -O1 or higher. */
38 { OPT_LEVELS_1_PLUS
, OPT_fsection_anchors
, NULL
, 1 },
39 { OPT_LEVELS_1_PLUS
, OPT_fomit_frame_pointer
, NULL
, 1 },
40 { OPT_LEVELS_1_PLUS
, OPT_fsched_pressure
, NULL
, 1 },
41 { OPT_LEVELS_NONE
, 0, NULL
, 0 }
44 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
47 arm_except_unwind_info (struct gcc_options
*opts
)
49 /* Honor the --enable-sjlj-exceptions configure switch. */
50 #ifdef CONFIG_SJLJ_EXCEPTIONS
51 if (CONFIG_SJLJ_EXCEPTIONS
)
55 /* If not using ARM EABI unwind tables... */
58 /* For simplicity elsewhere in this file, indicate that all unwind
59 info is disabled if we're not emitting unwind tables. */
60 if (!opts
->x_flag_exceptions
&& !opts
->x_flag_unwind_tables
)
66 /* ... we use sjlj exceptions for backwards compatibility. */
70 #define ARM_CPU_NAME_LENGTH 20
72 /* Truncate NAME at the first '.' or '+' character seen, or return
76 arm_rewrite_selected_cpu (const char *name
)
78 static char output_buf
[ARM_CPU_NAME_LENGTH
+ 1] = {0};
81 strncpy (output_buf
, name
, ARM_CPU_NAME_LENGTH
);
82 output_buf
[ARM_CPU_NAME_LENGTH
] = 0;
84 arg_pos
= strchr (output_buf
, '.');
86 /* If we found a '.' truncate the entry at that point. */
90 arg_pos
= strchr (output_buf
, '+');
92 /* If we found a '+' truncate the entry at that point. */
99 /* Called by the driver to rewrite a name passed to the -mcpu
100 argument in preparation to be passed to the assembler. The
101 names passed from the command line will be in ARGV, we want
102 to use the right-most argument, which should be in
103 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
106 arm_rewrite_mcpu (int argc
, const char **argv
)
109 return arm_rewrite_selected_cpu (argv
[argc
- 1]);
112 /* Truncate NAME at the first '+' character seen, or return
113 NAME unmodified. Similar to arm_rewrite_selected_cpu, but we must
114 preserve '.' as that is part of some architecture names. */
117 arm_rewrite_selected_arch (const char *name
)
119 static char output_buf
[ARM_CPU_NAME_LENGTH
+ 1] = {0};
122 strncpy (output_buf
, name
, ARM_CPU_NAME_LENGTH
);
123 output_buf
[ARM_CPU_NAME_LENGTH
] = 0;
125 arg_pos
= strchr (output_buf
, '+');
127 /* If we found a '+' truncate the entry at that point. */
134 /* Called by the driver to rewrite a name passed to the -march
135 argument in preparation to be passed to the assembler. The
136 names passed from the command line will be in ARGV, we want
137 to use the right-most argument, which should be in
138 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
141 arm_rewrite_march (int argc
, const char **argv
)
144 return arm_rewrite_selected_arch (argv
[argc
- 1]);
147 #include "arm-cpu-cdata.h"
149 /* Scan over a raw feature array BITS checking for BIT being present.
150 This is slower than the normal bitmask checks, but we would spend longer
151 initializing that than doing the check this way. Returns true iff
154 check_isa_bits_for (const enum isa_feature
* bits
, enum isa_feature bit
)
156 while (*bits
!= isa_nobit
)
163 /* Called by the driver to check whether the target denoted by current
164 command line options is a Thumb-only target. ARGV is an array of
165 tupples (normally only one) where the first element of the tupple
166 is 'cpu' or 'arch' and the second is the option passed to the
167 compiler for that. An architecture tupple is always taken in
168 preference to a cpu tupple and the last of each type always
169 overrides any earlier setting. */
172 arm_target_thumb_only (int argc
, const char **argv
)
174 const char *arch
= NULL
;
175 const char *cpu
= NULL
;
178 fatal_error (input_location
,
179 "%%:target_mode_check takes an even number of parameters");
183 if (strcmp (argv
[0], "arch") == 0)
185 else if (strcmp (argv
[0], "cpu") == 0)
188 fatal_error (input_location
,
189 "unrecognized option passed to %%:target_mode_check");
194 /* No architecture, or CPU, has option extensions that change
195 whether or not we have a Thumb-only device, so there is no need
196 to scan any option extensions specified. */
198 /* If the architecture is specified, that overrides any CPU setting. */
201 const arch_option
*arch_opt
202 = arm_parse_arch_option_name (all_architectures
, "-march", arch
);
204 if (arch_opt
&& !check_isa_bits_for (arch_opt
->common
.isa_bits
,
210 const cpu_option
*cpu_opt
211 = arm_parse_cpu_option_name (all_cores
, "-mcpu", cpu
);
213 if (cpu_opt
&& !check_isa_bits_for (cpu_opt
->common
.isa_bits
,
218 /* Compiler hasn't been configured with a default, and the CPU
219 doesn't require Thumb, so default to ARM. */
223 /* List the permitted CPU option names. If TARGET is a near miss for an
224 entry, print out the suggested alternative. */
226 arm_print_hint_for_cpu_option (const char *target
,
227 const cpu_option
*list
)
229 auto_vec
<const char*> candidates
;
230 for (; list
->common
.name
!= NULL
; list
++)
231 candidates
.safe_push (list
->common
.name
);
233 const char *hint
= candidates_list_and_hint (target
, s
, candidates
);
235 inform (input_location
, "valid arguments are: %s; did you mean %qs?",
238 inform (input_location
, "valid arguments are: %s", s
);
243 /* Parse the base component of a CPU selection in LIST. Return a
244 pointer to the entry in the architecture table. OPTNAME is the
245 name of the option we are parsing and can be used if a diagnostic
248 arm_parse_cpu_option_name (const cpu_option
*list
, const char *optname
,
251 const cpu_option
*entry
;
252 const char *end
= strchr (target
, '+');
253 size_t len
= end
? end
- target
: strlen (target
);
255 for (entry
= list
; entry
->common
.name
!= NULL
; entry
++)
257 if (strncmp (entry
->common
.name
, target
, len
) == 0
258 && entry
->common
.name
[len
] == '\0')
262 error_at (input_location
, "unrecognized %s target: %s", optname
, target
);
263 arm_print_hint_for_cpu_option (target
, list
);
267 /* List the permitted architecture option names. If TARGET is a near
268 miss for an entry, print out the suggested alternative. */
270 arm_print_hint_for_arch_option (const char *target
,
271 const arch_option
*list
)
273 auto_vec
<const char*> candidates
;
274 for (; list
->common
.name
!= NULL
; list
++)
275 candidates
.safe_push (list
->common
.name
);
277 const char *hint
= candidates_list_and_hint (target
, s
, candidates
);
279 inform (input_location
, "valid arguments are: %s; did you mean %qs?",
282 inform (input_location
, "valid arguments are: %s", s
);
287 /* Parse the base component of a CPU or architecture selection in
288 LIST. Return a pointer to the entry in the architecture table.
289 OPTNAME is the name of the option we are parsing and can be used if
290 a diagnostic is needed. */
292 arm_parse_arch_option_name (const arch_option
*list
, const char *optname
,
295 const arch_option
*entry
;
296 const char *end
= strchr (target
, '+');
297 size_t len
= end
? end
- target
: strlen (target
);
299 for (entry
= list
; entry
->common
.name
!= NULL
; entry
++)
301 if (strncmp (entry
->common
.name
, target
, len
) == 0
302 && entry
->common
.name
[len
] == '\0')
306 error_at (input_location
, "unrecognized %s target: %s", optname
, target
);
307 arm_print_hint_for_arch_option (target
, list
);
311 /* List the permitted architecture option names. If TARGET is a near
312 miss for an entry, print out the suggested alternative. */
314 arm_print_hint_for_fpu_option (const char *target
)
316 auto_vec
<const char*> candidates
;
317 for (int i
= 0; i
< TARGET_FPU_auto
; i
++)
318 candidates
.safe_push (all_fpus
[i
].name
);
320 const char *hint
= candidates_list_and_hint (target
, s
, candidates
);
322 inform (input_location
, "valid arguments are: %s; did you mean %qs?",
325 inform (input_location
, "valid arguments are: %s", s
);
330 static const arm_fpu_desc
*
331 arm_parse_fpu_option (const char *opt
)
335 for (i
= 0; i
< TARGET_FPU_auto
; i
++)
337 if (strcmp (all_fpus
[i
].name
, opt
) == 0)
341 error_at (input_location
, "unrecognized -mfpu target: %s", opt
);
342 arm_print_hint_for_fpu_option (opt
);
346 /* Convert a static initializer array of feature bits to sbitmap
349 arm_initialize_isa (sbitmap isa
, const enum isa_feature
*isa_bits
)
352 while (*isa_bits
!= isa_nobit
)
353 bitmap_set_bit (isa
, *(isa_bits
++));
356 /* OPT isn't a recognized feature. Print a suitable error message and
357 suggest a possible value. Always print the list of permitted
360 arm_unrecognized_feature (const char *opt
, size_t len
,
361 const cpu_arch_option
*target
)
363 char *this_opt
= XALLOCAVEC (char, len
+1);
364 auto_vec
<const char*> candidates
;
366 strncpy (this_opt
, opt
, len
);
369 error_at (input_location
, "%qs does not support feature %qs", target
->name
,
371 for (const cpu_arch_extension
*list
= target
->extensions
;
374 candidates
.safe_push (list
->name
);
377 const char *hint
= candidates_list_and_hint (this_opt
, s
, candidates
);
380 inform (input_location
, "valid feature names are: %s; did you mean %qs?",
383 inform (input_location
, "valid feature names are: %s", s
);
388 /* Parse any feature extensions to add to (or remove from) the
389 permitted ISA selection. */
391 arm_parse_option_features (sbitmap isa
, const cpu_arch_option
*target
,
394 const char *opts
= opts_in
;
399 if (!target
->extensions
)
401 error_at (input_location
, "%s does not take any feature options",
408 gcc_assert (*opts
== '+');
409 const struct cpu_arch_extension
*entry
;
410 const char *end
= strchr (++opts
, '+');
411 size_t len
= end
? end
- opts
: strlen (opts
);
412 bool matched
= false;
414 for (entry
= target
->extensions
;
415 !matched
&& entry
->name
!= NULL
;
418 if (strncmp (entry
->name
, opts
, len
) == 0
419 && entry
->name
[len
] == '\0')
423 const enum isa_feature
*f
= entry
->isa_bits
;
426 while (*f
!= isa_nobit
)
427 bitmap_clear_bit (isa
, *(f
++));
431 while (*f
!= isa_nobit
)
432 bitmap_set_bit (isa
, *(f
++));
440 arm_unrecognized_feature (opts
, len
, target
);
446 class candidate_extension
449 const cpu_arch_extension
*extension
;
453 candidate_extension (const cpu_arch_extension
*ext
, sbitmap bits
)
454 : extension (ext
), isa_bits (bits
), required (true)
456 ~candidate_extension ()
458 sbitmap_free (isa_bits
);
462 /* Generate a canonical representation of the -march option from the
463 current -march string (if given) and other options on the command
464 line that might affect the architecture. This aids multilib selection
466 a) the option is always present
467 b) only the minimal set of options are used
468 c) when there are multiple extensions, they are in a consistent order.
470 The options array consists of couplets of information where the
471 first item in each couplet is the string describing which option
472 name was selected (arch, cpu, fpu) and the second is the value
473 passed for that option. */
475 arm_canon_arch_option (int argc
, const char **argv
)
477 const char *arch
= NULL
;
478 const char *cpu
= NULL
;
479 const char *fpu
= NULL
;
480 const char *abi
= NULL
;
481 static char *canonical_arch
= NULL
;
483 /* Just in case we're called more than once. */
486 free (canonical_arch
);
487 canonical_arch
= NULL
;
491 fatal_error (input_location
,
492 "%%:canon_for_mlib takes 1 or more pairs of parameters");
496 if (strcmp (argv
[0], "arch") == 0)
498 else if (strcmp (argv
[0], "cpu") == 0)
500 else if (strcmp (argv
[0], "fpu") == 0)
502 else if (strcmp (argv
[0], "abi") == 0)
505 fatal_error (input_location
,
506 "unrecognized operand to %%:canon_for_mlib");
512 auto_sbitmap
target_isa (isa_num_bits
);
513 auto_sbitmap
base_isa (isa_num_bits
);
514 auto_sbitmap
fpu_isa (isa_num_bits
);
516 bitmap_clear (fpu_isa
);
518 const arch_option
*selected_arch
= NULL
;
520 /* At least one of these must be defined by either the specs or the
522 gcc_assert (cpu
|| arch
);
529 if (TARGET_DEFAULT_FLOAT_ABI
== ARM_FLOAT_ABI_SOFT
)
531 else if (TARGET_DEFAULT_FLOAT_ABI
== ARM_FLOAT_ABI_SOFTFP
)
533 else if (TARGET_DEFAULT_FLOAT_ABI
== ARM_FLOAT_ABI_HARD
)
537 /* First build up a bitmap describing the target architecture. */
540 selected_arch
= arm_parse_arch_option_name (all_architectures
,
543 if (selected_arch
== NULL
)
546 arm_initialize_isa (target_isa
, selected_arch
->common
.isa_bits
);
547 arm_parse_option_features (target_isa
, &selected_arch
->common
,
549 if (fpu
&& strcmp (fpu
, "auto") != 0)
551 /* We assume that architectures do not have any FPU bits
552 enabled by default. If they did, we would need to strip
554 const arm_fpu_desc
*target_fpu
= arm_parse_fpu_option (fpu
);
555 if (target_fpu
== NULL
)
558 arm_initialize_isa (fpu_isa
, target_fpu
->isa_bits
);
559 bitmap_ior (target_isa
, target_isa
, fpu_isa
);
564 const cpu_option
*selected_cpu
565 = arm_parse_cpu_option_name (all_cores
, "-mcpu", cpu
);
567 if (selected_cpu
== NULL
)
570 arm_initialize_isa (target_isa
, selected_cpu
->common
.isa_bits
);
571 arm_parse_option_features (target_isa
, &selected_cpu
->common
,
573 if (fpu
&& strcmp (fpu
, "auto") != 0)
575 /* The easiest and safest way to remove the default fpu
576 capabilities is to look for a '+no..' option that removes
577 the base FPU bit (isa_bit_VFPv2). If that doesn't exist
578 then the best we can do is strip out all the bits that
579 might be part of the most capable FPU we know about,
580 which is "crypto-neon-fp-armv8". */
581 bool default_fpu_found
= false;
582 if (selected_cpu
->common
.extensions
)
584 const cpu_arch_extension
*ext
;
585 for (ext
= selected_cpu
->common
.extensions
; ext
->name
!= NULL
;
589 && check_isa_bits_for (ext
->isa_bits
, isa_bit_VFPv2
))
591 arm_initialize_isa (fpu_isa
, ext
->isa_bits
);
592 bitmap_and_compl (target_isa
, target_isa
, fpu_isa
);
593 default_fpu_found
= true;
599 if (!default_fpu_found
)
603 all_fpus
[TARGET_FPU_crypto_neon_fp_armv8
].isa_bits
);
604 bitmap_and_compl (target_isa
, target_isa
, fpu_isa
);
607 const arm_fpu_desc
*target_fpu
= arm_parse_fpu_option (fpu
);
608 if (target_fpu
== NULL
)
611 arm_initialize_isa (fpu_isa
, target_fpu
->isa_bits
);
612 bitmap_ior (target_isa
, target_isa
, fpu_isa
);
615 selected_arch
= all_architectures
+ selected_cpu
->arch
;
618 /* If we have a soft-float ABI, disable the FPU. */
619 if (abi
&& strcmp (abi
, "soft") == 0)
621 /* Clearing the VFPv2 bit is sufficient to stop any extention that
622 builds on the FPU from matching. */
623 bitmap_clear_bit (target_isa
, isa_bit_VFPv2
);
626 /* If we don't have a selected architecture by now, something's
628 gcc_assert (selected_arch
);
630 arm_initialize_isa (base_isa
, selected_arch
->common
.isa_bits
);
632 /* Architecture has no extension options, so just return the canonical
633 architecture name. */
634 if (selected_arch
->common
.extensions
== NULL
)
635 return selected_arch
->common
.name
;
637 /* We're only interested in extension bits. */
638 bitmap_and_compl (target_isa
, target_isa
, base_isa
);
640 /* There are no extensions needed. Just return the canonical architecture
642 if (bitmap_empty_p (target_isa
))
643 return selected_arch
->common
.name
;
645 /* What is left is the architecture that the compiler will target. We
646 now need to map that back into a suitable option+features list.
648 The list is built in two passes. First we scan every additive
649 option feature supported by the architecture. If the option
650 provides a subset of the features we need we add it to the list
651 of candidates. We then scan backwards over the list of
652 candidates and if we find a feature that adds nothing to one that
653 was later in the list we mark it as redundant. The result is a
654 minimal list of required features for the target
657 std::list
<candidate_extension
*> extensions
;
659 auto_sbitmap
target_isa_unsatisfied (isa_num_bits
);
660 bitmap_copy (target_isa_unsatisfied
, target_isa
);
662 sbitmap isa_bits
= NULL
;
663 for (const cpu_arch_extension
*cand
= selected_arch
->common
.extensions
;
667 if (cand
->remove
|| cand
->alias
)
670 if (isa_bits
== NULL
)
671 isa_bits
= sbitmap_alloc (isa_num_bits
);
673 arm_initialize_isa (isa_bits
, cand
->isa_bits
);
674 if (bitmap_subset_p (isa_bits
, target_isa
))
676 extensions
.push_back (new candidate_extension (cand
, isa_bits
));
677 bitmap_and_compl (target_isa_unsatisfied
, target_isa_unsatisfied
,
683 /* There's one extra case to consider, which is that the user has
684 specified an FPU that is less capable than this architecture
685 supports. In that case the code above will fail to find a
686 suitable feature. We handle this by scanning the list of options
687 again, matching the first option that provides an FPU that is
688 more capable than the selected FPU.
690 Note that the other case (user specified a more capable FPU than
691 this architecture supports) should end up selecting the most
692 capable FPU variant that we do support. This is sufficient for
693 multilib selection. */
695 if (bitmap_bit_p (target_isa_unsatisfied
, isa_bit_VFPv2
)
696 && bitmap_bit_p (fpu_isa
, isa_bit_VFPv2
))
698 std::list
<candidate_extension
*>::iterator ipoint
= extensions
.begin ();
700 for (const cpu_arch_extension
*cand
= selected_arch
->common
.extensions
;
704 if (cand
->remove
|| cand
->alias
)
707 if (isa_bits
== NULL
)
708 isa_bits
= sbitmap_alloc (isa_num_bits
);
710 /* We need to keep the features in canonical order, so move the
711 insertion point if this feature is a candidate. */
712 if (ipoint
!= extensions
.end ()
713 && (*ipoint
)->extension
== cand
)
716 arm_initialize_isa (isa_bits
, cand
->isa_bits
);
717 if (bitmap_subset_p (fpu_isa
, isa_bits
))
719 extensions
.insert (ipoint
,
720 new candidate_extension (cand
, isa_bits
));
728 sbitmap_free (isa_bits
);
730 bitmap_clear (target_isa
);
732 for (std::list
<candidate_extension
*>::reverse_iterator riter
733 = extensions
.rbegin ();
734 riter
!= extensions
.rend (); ++riter
)
736 if (bitmap_subset_p ((*riter
)->isa_bits
, target_isa
))
737 (*riter
)->required
= false;
740 bitmap_ior (target_isa
, target_isa
, (*riter
)->isa_bits
);
741 len
+= strlen ((*riter
)->extension
->name
) + 1;
746 = (char *) xmalloc (len
+ strlen (selected_arch
->common
.name
));
748 strcpy (canonical_arch
, selected_arch
->common
.name
);
750 for (std::list
<candidate_extension
*>::iterator iter
= extensions
.begin ();
751 iter
!= extensions
.end (); ++iter
)
753 if ((*iter
)->required
)
755 strcat (canonical_arch
, "+");
756 strcat (canonical_arch
, (*iter
)->extension
->name
);
761 return canonical_arch
;
764 /* If building big-endian on a BE8 target generate a --be8 option for
765 the linker. Takes four types of option: "little" - little-endian;
766 "big" - big-endian; "be8" - force be8 iff big-endian; and "arch"
767 "<arch-name>" (two arguments) - the target architecture. The
768 parameter names are generated by the driver from the command-line
771 arm_be8_option (int argc
, const char **argv
)
773 int endian
= TARGET_ENDIAN_DEFAULT
;
774 const char *arch
= NULL
;
778 for (arg
= 0; arg
< argc
; arg
++)
780 if (strcmp (argv
[arg
], "little") == 0)
782 else if (strcmp (argv
[arg
], "big") == 0)
784 else if (strcmp (argv
[arg
], "be8") == 0)
786 else if (strcmp (argv
[arg
], "arch") == 0)
789 gcc_assert (arg
< argc
);
796 /* Little endian - no be8 option. */
803 /* Arch might not be set iff arm_canon_arch (above) detected an
804 error. Do nothing in that case. */
808 const arch_option
*selected_arch
809 = arm_parse_arch_option_name (all_architectures
, "-march", arch
);
811 /* Similarly if the given arch option was itself invalid. */
815 if (check_isa_bits_for (selected_arch
->common
.isa_bits
, isa_bit_be8
))
821 #undef ARM_CPU_NAME_LENGTH
824 #undef TARGET_DEFAULT_TARGET_FLAGS
825 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
827 #undef TARGET_OPTION_OPTIMIZATION_TABLE
828 #define TARGET_OPTION_OPTIMIZATION_TABLE arm_option_optimization_table
830 #undef TARGET_EXCEPT_UNWIND_INFO
831 #define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
833 struct gcc_targetm_common targetm_common
= TARGETM_COMMON_INITIALIZER
;