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RISC-V: Add RV32E support.
[thirdparty/gcc.git] / gcc / common / config / riscv / riscv-common.c
1 /* Common hooks for RISC-V.
2 Copyright (C) 2016-2018 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "common/common-target.h"
25 #include "common/common-target-def.h"
26 #include "opts.h"
27 #include "flags.h"
28 #include "diagnostic-core.h"
29
30 /* Parse a RISC-V ISA string into an option mask. Must clear or set all arch
31 dependent mask bits, in case more than one -march string is passed. */
32
33 static void
34 riscv_parse_arch_string (const char *isa, int *flags, location_t loc)
35 {
36 const char *p = isa;
37
38 if (strncmp (p, "rv32", 4) == 0)
39 *flags &= ~MASK_64BIT, p += 4;
40 else if (strncmp (p, "rv64", 4) == 0)
41 *flags |= MASK_64BIT, p += 4;
42 else
43 {
44 error_at (loc, "-march=%s: ISA string must begin with rv32 or rv64", isa);
45 return;
46 }
47
48 if (*p == 'g')
49 {
50 p++;
51
52 *flags &= ~MASK_RVE;
53
54 *flags |= MASK_MUL;
55 *flags |= MASK_ATOMIC;
56 *flags |= MASK_HARD_FLOAT;
57 *flags |= MASK_DOUBLE_FLOAT;
58 }
59 else if (*p == 'i')
60 {
61 p++;
62
63 *flags &= ~MASK_RVE;
64
65 *flags &= ~MASK_MUL;
66 if (*p == 'm')
67 *flags |= MASK_MUL, p++;
68
69 *flags &= ~MASK_ATOMIC;
70 if (*p == 'a')
71 *flags |= MASK_ATOMIC, p++;
72
73 *flags &= ~(MASK_HARD_FLOAT | MASK_DOUBLE_FLOAT);
74 if (*p == 'f')
75 {
76 *flags |= MASK_HARD_FLOAT, p++;
77
78 if (*p == 'd')
79 {
80 *flags |= MASK_DOUBLE_FLOAT;
81 p++;
82 }
83 }
84 }
85 else if (*p == 'e')
86 {
87 p++;
88
89 *flags |= MASK_RVE;
90
91 if (*flags & MASK_64BIT)
92 {
93 error ("RV64E is not a valid base ISA");
94 return;
95 }
96
97 *flags &= ~MASK_MUL;
98 if (*p == 'm')
99 *flags |= MASK_MUL, p++;
100
101 *flags &= ~MASK_ATOMIC;
102 if (*p == 'a')
103 *flags |= MASK_ATOMIC, p++;
104
105 *flags &= ~(MASK_HARD_FLOAT | MASK_DOUBLE_FLOAT);
106 }
107 else
108 {
109 error_at (loc, "-march=%s: invalid ISA string", isa);
110 return;
111 }
112
113 *flags &= ~MASK_RVC;
114 if (*p == 'c')
115 *flags |= MASK_RVC, p++;
116
117 if (*p)
118 {
119 error_at (loc, "-march=%s: unsupported ISA substring %qs", isa, p);
120 return;
121 }
122 }
123
124 /* Implement TARGET_HANDLE_OPTION. */
125
126 static bool
127 riscv_handle_option (struct gcc_options *opts,
128 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
129 const struct cl_decoded_option *decoded,
130 location_t loc)
131 {
132 switch (decoded->opt_index)
133 {
134 case OPT_march_:
135 riscv_parse_arch_string (decoded->arg, &opts->x_target_flags, loc);
136 return true;
137
138 default:
139 return true;
140 }
141 }
142
143 /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
144 static const struct default_options riscv_option_optimization_table[] =
145 {
146 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
147 { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
148 { OPT_LEVELS_NONE, 0, NULL, 0 }
149 };
150
151 #undef TARGET_OPTION_OPTIMIZATION_TABLE
152 #define TARGET_OPTION_OPTIMIZATION_TABLE riscv_option_optimization_table
153
154 #undef TARGET_HANDLE_OPTION
155 #define TARGET_HANDLE_OPTION riscv_handle_option
156
157 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;