1 /* Subroutines used for code generation on AMD Am29000.
2 Copyright (C) 1987, 88, 90-94, 1995, 1997, 1999 Free Software
4 Contributed by Richard Kenner (kenner@nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
42 #define min(A,B) ((A) < (B) ? (A) : (B))
44 /* This gives the size in words of the register stack for the current
47 static int a29k_regstack_size
;
49 /* True if the current procedure has a call instruction. */
51 static int a29k_makes_calls
;
53 /* This points to the last insn of the insn prologue. It is set when
54 an insn without a filled delay slot is found near the start of the
57 static char *a29k_last_prologue_insn
;
59 /* This points to the first insn that will be in the epilogue. It is null if
60 no epilogue is required. */
62 static char *a29k_first_epilogue_insn
;
64 /* This is nonzero if a a29k_first_epilogue_insn was put in a delay slot. It
65 indicates that an intermediate label needs to be written. */
67 static int a29k_first_epilogue_insn_used
;
69 /* Location to hold the name of the current function. We need this prolog to
70 contain the tag words prior to the declaration. So the name must be stored
73 char *a29k_function_name
;
75 /* Mapping of registers to debug register numbers. The only change is
76 for the frame pointer and the register numbers used for the incoming
79 int a29k_debug_reg_map
[FIRST_PSEUDO_REGISTER
];
81 /* Save information from a "cmpxx" operation until the branch or scc is
84 rtx a29k_compare_op0
, a29k_compare_op1
;
85 int a29k_compare_fp_p
;
87 /* Gives names for registers. */
88 extern char *reg_names
[];
90 /* Returns 1 if OP is a 8-bit constant. */
93 cint_8_operand (op
, mode
)
95 enum machine_mode mode
;
97 return GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffffff00) == 0;
100 /* Returns 1 if OP is a 16-bit constant. */
103 cint_16_operand (op
, mode
)
105 enum machine_mode mode
;
107 return GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0;
110 /* Returns 1 if OP is a constant that cannot be moved in a single insn. */
113 long_const_operand (op
, mode
)
115 enum machine_mode mode
;
117 if (! CONSTANT_P (op
))
120 if (TARGET_29050
&& GET_CODE (op
) == CONST_INT
121 && (INTVAL (op
) & 0xffff) == 0)
124 return (GET_CODE (op
) != CONST_INT
125 || ((INTVAL (op
) & 0xffff0000) != 0
126 && (INTVAL (op
) & 0xffff0000) != 0xffff0000
127 && INTVAL (op
) != 0x80000000));
130 /* The following four functions detect constants of 0, 8, 16, and 24 used as
131 a position in ZERO_EXTRACT operations. They can either be the appropriate
132 constant integer or a shift (which will be produced by combine). */
135 shift_constant_operand (op
, mode
, val
)
137 enum machine_mode mode
;
140 return ((GET_CODE (op
) == CONST_INT
&& INTVAL (op
) == val
)
141 || (GET_CODE (op
) == ASHIFT
142 && GET_CODE (XEXP (op
, 0)) == CONST_INT
143 && INTVAL (XEXP (op
, 0)) == val
/ 8
144 && GET_CODE (XEXP (op
, 1)) == CONST_INT
145 && INTVAL (XEXP (op
, 1)) == 3));
149 const_0_operand (op
, mode
)
151 enum machine_mode mode
;
153 return shift_constant_operand (op
, mode
, 0);
157 const_8_operand (op
, mode
)
159 enum machine_mode mode
;
161 return shift_constant_operand (op
, mode
, 8);
165 const_16_operand (op
, mode
)
167 enum machine_mode mode
;
169 return shift_constant_operand (op
, mode
, 16);
173 const_24_operand (op
, mode
)
175 enum machine_mode mode
;
177 return shift_constant_operand (op
, mode
, 24);
180 /* Returns 1 if OP is a floating-point constant of the proper mode. */
183 float_const_operand (op
, mode
)
185 enum machine_mode mode
;
187 return GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE (op
) == mode
;
190 /* Returns 1 if OP is a floating-point constant of the proper mode or a
191 general-purpose register. */
194 gpc_reg_or_float_constant_operand (op
, mode
)
196 enum machine_mode mode
;
198 return float_const_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
201 /* Returns 1 if OP is an integer constant of the proper mode or a
202 general-purpose register. */
205 gpc_reg_or_integer_constant_operand (op
, mode
)
207 enum machine_mode mode
;
209 return ((GET_MODE (op
) == VOIDmode
210 && (GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
))
211 || gpc_reg_operand (op
, mode
));
214 /* Returns 1 if OP is a special machine register. */
217 spec_reg_operand (op
, mode
)
219 enum machine_mode mode
;
221 if (GET_CODE (op
) != REG
|| GET_MODE (op
) != mode
)
224 switch (GET_MODE_CLASS (mode
))
226 case MODE_PARTIAL_INT
:
227 return REGNO (op
) >= R_BP
&& REGNO (op
) <= R_CR
;
229 return REGNO (op
) >= R_Q
&& REGNO (op
) <= R_EXO
;
235 /* Returns 1 if OP is an accumulator register. */
238 accum_reg_operand (op
, mode
)
240 enum machine_mode mode
;
242 return (GET_CODE (op
) == REG
243 && REGNO (op
) >= R_ACU (0) && REGNO (op
) <= R_ACU (3));
246 /* Returns 1 if OP is a normal data register. */
249 gpc_reg_operand (op
, mode
)
251 enum machine_mode mode
;
255 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
258 if (GET_CODE (op
) == REG
)
260 else if (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == REG
)
262 regno
= REGNO (SUBREG_REG (op
));
263 if (regno
< FIRST_PSEUDO_REGISTER
)
264 regno
+= SUBREG_WORD (op
);
269 return (regno
>= FIRST_PSEUDO_REGISTER
|| regno
< R_BP
270 || (regno
>= R_KR (0) && regno
<= R_KR (31)));
273 /* Returns 1 if OP is either an 8-bit constant integer or a general register.
274 If a register, it must be in the proper mode unless MODE is VOIDmode. */
277 srcb_operand (op
, mode
)
279 enum machine_mode mode
;
281 if (GET_CODE (op
) == CONST_INT
283 || (INTVAL (op
) & 0xffffff00) == 0))
286 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
289 return gpc_reg_operand (op
, mode
);
293 cmplsrcb_operand (op
, mode
)
295 enum machine_mode mode
;
297 if (GET_CODE (op
) == CONST_INT
299 || (INTVAL (op
) & 0xffffff00) == 0xffffff00))
302 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
305 return gpc_reg_operand (op
, mode
);
308 /* Return 1 if OP is either an immediate or a general register. This is used
309 for the input operand of mtsr/mtrsim. */
312 gpc_reg_or_immediate_operand (op
, mode
)
314 enum machine_mode mode
;
316 return gpc_reg_operand (op
, mode
) || immediate_operand (op
, mode
);
319 /* Return 1 if OP can be used as the second operand of and AND insn. This
320 includes srcb_operand and a constant whose complement fits in 8 bits. */
323 and_operand (op
, mode
)
325 enum machine_mode mode
;
327 return (srcb_operand (op
, mode
)
328 || (GET_CODE (op
) == CONST_INT
329 && ((unsigned) ((~ INTVAL (op
)) & GET_MODE_MASK (mode
)) < 256)));
332 /* Return 1 if OP can be used as the second operand of an ADD insn.
333 This is the same as above, except we use negative, rather than
337 add_operand (op
, mode
)
339 enum machine_mode mode
;
341 return (srcb_operand (op
, mode
)
342 || (GET_CODE (op
) == CONST_INT
343 && ((unsigned) ((- INTVAL (op
)) & GET_MODE_MASK (mode
)) < 256)));
346 /* Return 1 if OP is a valid address in a CALL_INSN. These are a SYMBOL_REF
347 to the current function, all SYMBOL_REFs if TARGET_SMALL_MEMORY, or
348 a sufficiently-small constant. */
351 call_operand (op
, mode
)
353 enum machine_mode mode
;
355 switch (GET_CODE (op
))
358 return (TARGET_SMALL_MEMORY
359 || (! TARGET_LARGE_MEMORY
360 && ((GET_CODE (op
) == SYMBOL_REF
&& SYMBOL_REF_FLAG (op
))
361 || ! strcmp (XSTR (op
, 0), current_function_name
))));
364 return (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x40000;
371 /* Return 1 if OP can be used as the input operand for a move insn. */
374 in_operand (op
, mode
)
376 enum machine_mode mode
;
380 if (! general_operand (op
, mode
))
383 while (GET_CODE (op
) == SUBREG
)
384 op
= SUBREG_REG (op
);
386 switch (GET_CODE (op
))
392 return (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
|| TARGET_DW_ENABLE
);
395 if (GET_MODE_CLASS (mode
) != MODE_INT
396 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
404 return (GET_MODE (op
) == mode
405 || mode
== SImode
|| mode
== HImode
|| mode
== QImode
);
408 return ((GET_MODE_CLASS (mode
) == MODE_FLOAT
409 && mode
== GET_MODE (op
))
410 || (GET_MODE (op
) == VOIDmode
411 && GET_MODE_CLASS (mode
) == MODE_INT
));
418 /* Return 1 if OP can be used as the output operand for a move insn. */
421 out_operand (op
, mode
)
423 enum machine_mode mode
;
427 if (! general_operand (op
, mode
))
430 while (GET_CODE (op
) == SUBREG
)
431 op
= SUBREG_REG (op
);
433 if (GET_CODE (op
) == REG
)
434 return (gpc_reg_operand (orig_op
, mode
)
435 || spec_reg_operand (orig_op
, mode
)
436 || (GET_MODE_CLASS (mode
) == MODE_FLOAT
437 && accum_reg_operand (orig_op
, mode
)));
439 else if (GET_CODE (op
) == MEM
)
440 return (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
|| TARGET_DW_ENABLE
);
445 /* Return 1 if OP is an item in memory, given that we are in reload. */
448 reload_memory_operand (op
, mode
)
450 enum machine_mode mode
;
452 int regno
= true_regnum (op
);
454 return (! CONSTANT_P (op
)
456 || (GET_CODE (op
) == REG
457 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)));
460 /* Given an object for which reload_memory_operand is true, return the address
461 of the operand, taking into account anything that reload may do. */
464 a29k_get_reloaded_address (op
)
467 if (GET_CODE (op
) == SUBREG
)
469 if (SUBREG_WORD (op
) != 0)
472 op
= SUBREG_REG (op
);
475 if (GET_CODE (op
) == REG
)
476 op
= reg_equiv_mem
[REGNO (op
)];
478 return find_replacement (&XEXP (op
, 0));
481 /* Subfunction of the following function. Update the flags of any MEM
482 found in part of X. */
485 a29k_set_memflags_1 (x
, in_struct_p
, scalar_p
, volatile_p
, unchanging_p
)
487 int in_struct_p
, scalar_p
, volatile_p
, unchanging_p
;
491 switch (GET_CODE (x
))
495 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
496 a29k_set_memflags_1 (XVECEXP (x
, 0, i
), in_struct_p
, volatile_p
,
501 a29k_set_memflags_1 (PATTERN (x
), in_struct_p
, volatile_p
,
506 a29k_set_memflags_1 (SET_DEST (x
), in_struct_p
, volatile_p
,
508 a29k_set_memflags_1 (SET_SRC (x
), in_struct_p
, volatile_p
, unchanging_p
);
512 MEM_IN_STRUCT_P (x
) = in_struct_p
;
513 MEM_SCALAR_P (x
) = scalar_p
;
514 MEM_VOLATILE_P (x
) = volatile_p
;
515 RTX_UNCHANGING_P (x
) = unchanging_p
;
520 /* Given INSN, which is either an INSN or a SEQUENCE generated to
521 perform a memory operation, look for any MEMs in either a SET_DEST or
522 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
523 REF into each of the MEMs found. If REF is not a MEM, don't do
527 a29k_set_memflags (insn
, ref
)
531 /* Note that it is always safe to get these flags, though they won't
532 be what we think if REF is not a MEM. */
533 int in_struct_p
= MEM_IN_STRUCT_P (ref
);
534 int scalar_p
= MEM_SCALAR_P (ref
);
535 int volatile_p
= MEM_VOLATILE_P (ref
);
536 int unchanging_p
= RTX_UNCHANGING_P (ref
);
538 if (GET_CODE (ref
) != MEM
539 || (! in_struct_p
&& ! volatile_p
&& ! unchanging_p
))
542 a29k_set_memflags_1 (insn
, in_struct_p
, scalar_p
, volatile_p
, unchanging_p
);
545 /* Return 1 if OP is a comparison operator that we have in floating-point. */
548 fp_comparison_operator (op
, mode
)
550 enum machine_mode mode
;
552 return ((mode
== VOIDmode
|| mode
== GET_MODE (op
))
553 && (GET_CODE (op
) == EQ
|| GET_CODE (op
) == GT
||
554 GET_CODE (op
) == GE
));
557 /* Return 1 if OP is a valid branch comparison. */
560 branch_operator (op
, mode
)
562 enum machine_mode mode
;
564 return ((mode
== VOIDmode
|| mode
== GET_MODE (op
))
565 && (GET_CODE (op
) == GE
|| GET_CODE (op
) == LT
));
568 /* Return 1 if OP is a load multiple operation. It is known to be a
569 PARALLEL and the first three sections will be tested. */
572 load_multiple_operation (op
, mode
)
574 enum machine_mode mode
;
576 int count
= XVECLEN (op
, 0) - 2;
581 /* Perform a quick check so we don't blow up below. */
583 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
584 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
585 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
588 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
589 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
591 for (i
= 1; i
< count
; i
++)
593 rtx elt
= XVECEXP (op
, 0, i
+ 2);
595 if (GET_CODE (elt
) != SET
596 || GET_CODE (SET_DEST (elt
)) != REG
597 || GET_MODE (SET_DEST (elt
)) != SImode
598 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
599 || GET_CODE (SET_SRC (elt
)) != MEM
600 || GET_MODE (SET_SRC (elt
)) != SImode
601 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
602 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
603 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
604 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
611 /* Similar, but tests for store multiple. */
614 store_multiple_operation (op
, mode
)
616 enum machine_mode mode
;
618 int num_special
= TARGET_NO_STOREM_BUG
? 2 : 1;
619 int count
= XVECLEN (op
, 0) - num_special
;
624 /* Perform a quick check so we don't blow up below. */
626 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
627 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
628 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
631 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
632 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
634 for (i
= 1; i
< count
; i
++)
636 rtx elt
= XVECEXP (op
, 0, i
+ num_special
);
638 if (GET_CODE (elt
) != SET
639 || GET_CODE (SET_SRC (elt
)) != REG
640 || GET_MODE (SET_SRC (elt
)) != SImode
641 || REGNO (SET_SRC (elt
)) != src_regno
+ i
642 || GET_CODE (SET_DEST (elt
)) != MEM
643 || GET_MODE (SET_DEST (elt
)) != SImode
644 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
645 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
646 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
647 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
654 /* Given a special register REG and MASK, a value being masked against a
655 quantity to which the special register is set, return 1 if the masking
656 operation is built-in to the setting of that special register. */
659 masks_bits_for_special (reg
, mask
)
663 int needed_mask_value
;
665 if (GET_CODE (reg
) != REG
|| GET_CODE (mask
) != CONST_INT
)
672 needed_mask_value
= 3;
676 needed_mask_value
= 31;
681 needed_mask_value
= 255;
685 needed_mask_value
= 511;
689 needed_mask_value
= 0x3ff;
696 needed_mask_value
= 0xffff;
700 needed_mask_value
= 0xffff0000;
719 return (INTVAL (mask
) & ~ needed_mask_value
) == 0;
722 /* Return nonzero if this label is that of the return point, but there is
723 a non-null epilogue. */
726 epilogue_operand (op
, mode
)
728 enum machine_mode mode
;
730 return next_active_insn (op
) == 0 && a29k_first_epilogue_insn
!= 0;
733 /* Return the register class of a scratch register needed to copy IN into
734 or out of a register in CLASS in MODE. If it can be done directly,
735 NO_REGS is returned. */
738 secondary_reload_class (class, mode
, in
)
739 enum reg_class
class;
740 enum machine_mode mode
;
744 enum rtx_code code
= GET_CODE (in
);
746 if (! CONSTANT_P (in
))
748 regno
= true_regnum (in
);
750 /* A pseudo is the same as memory. */
751 if (regno
== -1 || regno
>= FIRST_PSEUDO_REGISTER
)
755 /* If we are transferring between memory and a multi-word mode, we need
758 if (code
== MEM
&& GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
761 /* If between memory and a mode smaller than a word without DW being
762 enabled, we need BP. */
764 if (code
== MEM
&& ! TARGET_DW_ENABLE
765 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
768 /* Otherwise, we can place anything into GENERAL_REGS and can put
769 GENERAL_REGS into anything. */
770 if (class == GENERAL_REGS
773 || (regno
>= R_KR (0) && regno
<= R_KR (31)))))
776 /* We can place 16-bit constants into a special register. */
777 if (code
== CONST_INT
778 && (GET_MODE_BITSIZE (mode
) <= 16 || (unsigned) INTVAL (in
) <= 65535)
779 && (class == BP_REGS
|| class == Q_REGS
|| class == SPECIAL_REGS
))
782 /* Otherwise, we need GENERAL_REGS. */
786 /* START is the zero-based incoming argument register index used (0 is 160,
787 i.e., the first incoming argument register) and COUNT is the number used.
789 Mark the corresponding incoming registers as neither fixed nor call used.
790 For each register used for incoming arguments, we have one less local
791 register that can be used. So also mark some high-numbered registers as
794 Return the first register number to use for the argument. */
797 incoming_reg (start
, count
)
803 /* We only use 16 argument registers, so truncate at the end of the
805 if (start
+ count
> 16)
808 if (! TARGET_NO_REUSE_ARGS
)
809 /* Mark all the used registers as not fixed and saved over calls. */
810 for (i
= R_AR (start
); i
< R_AR (start
+ count
); i
++)
812 fixed_regs
[i
] = call_used_regs
[i
] = call_fixed_regs
[i
] = 0;
813 CLEAR_HARD_REG_BIT (fixed_reg_set
, i
);
814 CLEAR_HARD_REG_BIT (call_used_reg_set
, i
);
815 CLEAR_HARD_REG_BIT (call_fixed_reg_set
, i
);
818 /* Shorten the maximum size of the frame.
819 Remember that R_AR(-1,-2) are place holders for the caller's lr0,lr1.
820 Make sure to keep the frame rounded to an even boundary. Rounding up
821 to an 8 byte boundary will use a slot. Otherwise a frame with 121 local
822 regs and 5 arguments will overrun the stack (121+1 + 5 + 2 > 128). */
823 /* ??? An alternative would be to never allocate one reg. */
824 for (i
= (R_AR (0) - 2 - start
- count
) & ~1; i
< R_AR (0) - 2 - start
; i
++)
826 fixed_regs
[i
] = call_used_regs
[i
] = call_fixed_regs
[i
] = 1;
827 SET_HARD_REG_BIT (fixed_reg_set
, i
);
828 SET_HARD_REG_BIT (call_used_reg_set
, i
);
829 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
835 /* Add CLOBBERs to CALL_INSN_FUNCTION_USAGE chain of INSN indicating
836 that LR2 up to, but not including, OP are clobbered. If OP is
837 zero, indicate all parameter registers are clobbered. */
840 a29k_clobbers_to (insn
, op
)
848 high_regno
= R_LR (18);
849 else if (GET_CODE (op
) != REG
|| REGNO (op
) < R_LR (0)
850 || REGNO (op
) > R_LR (18))
853 high_regno
= REGNO (op
);
855 for (i
= R_LR (2); i
< high_regno
; i
++)
856 CALL_INSN_FUNCTION_USAGE (insn
)
857 = gen_rtx (EXPR_LIST
, VOIDmode
,
858 gen_rtx (CLOBBER
, VOIDmode
, gen_rtx (REG
, SImode
, i
)),
859 CALL_INSN_FUNCTION_USAGE (insn
));
862 /* These routines are used in finding insns to fill delay slots in the
865 /* Return 1 if the current function will adjust the register stack. */
873 if (frame_pointer_needed
)
876 /* If any local register is used, we need to adjust the regstack. */
877 for (i
= R_LR (127); i
>= R_LR (0); i
--)
878 if (regs_ever_live
[i
])
881 /* We need a register stack if we make any calls. */
882 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
883 if (GET_CODE (insn
) == CALL_INSN
884 || (GET_CODE (insn
) == INSN
885 && GET_CODE (PATTERN (insn
)) == SEQUENCE
886 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
))
889 /* Otherwise, we don't. */
893 /* Return 1 if X uses a local register. */
902 switch (GET_CODE (x
))
905 return REGNO (x
) >= R_LR (0) && REGNO (x
) <= R_FP
;
916 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
917 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
921 if (uses_local_reg_p (XEXP (x
, i
)))
924 else if (fmt
[i
] == 'E')
926 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
927 if (uses_local_reg_p (XVECEXP (x
, i
, j
)))
935 /* Returns 1 if this function is known to have a null epilogue. */
940 return (reload_completed
&& ! needs_regstack_p ()
941 && get_frame_size () == 0
942 && current_function_pretend_args_size
== 0);
945 /* Write out the assembler form of an operand. Recognize the following
948 %N means write the low-order 8 bits of the negative of the constant
949 %Q means write a QImode operand (truncate constants to 8 bits)
950 %M means write the low-order 16 bits of the constant
951 %m means write the low-order 16 bits shifted left 16 bits
952 %C means write the low-order 8 bits of the complement of the constant
953 %b means write `f' is this is a reversed condition, `t' otherwise
954 %B means write `t' is this is a reversed condition, `f' otherwise
955 %J means write the 29k opcode part for a comparison operation
956 %e means write the label with an extra `X' is this is the epilogue
957 otherwise the normal label name
958 %E means write nothing if this insn has a delay slot,
959 a nop unless this is the epilogue label, in which case
960 write the first epilogue insn
961 %F means write just the normal operand if the insn has a delay slot;
962 otherwise, this is a recursive call so output the
963 symbol + 4 and write the first prologue insn in the
965 %L means write the register number plus one ("low order" register)
966 or the low-order part of a multi-word constant
967 %O means write the register number plus two
968 %P means write the register number plus three ("low order" of TImode)
969 %S means write the number of words in the mode of the operand,
971 %V means write the number of elements in a PARALLEL minus 1
972 %# means write nothing if we have a delay slot, "\n\tnop" otherwise
973 %* means write the register name for TPC. */
976 print_operand (file
, x
, code
)
983 /* These macros test for integers and extract the low-order bits. */
985 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
986 && GET_MODE (X) == VOIDmode)
988 #define INT_LOWPART(X) \
989 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
994 if (GET_CODE (x
) == REG
)
996 else if (! INT_P (x
))
997 output_operand_lossage ("invalid %%Q value");
998 fprintf (file
, "%d", INT_LOWPART (x
) & 0xff);
1003 output_operand_lossage ("invalid %%C value");
1004 fprintf (file
, "%d", (~ INT_LOWPART (x
)) & 0xff);
1009 output_operand_lossage ("invalid %%N value");
1010 fprintf (file
, "%d", (- INT_LOWPART (x
)) & 0xff);
1015 output_operand_lossage ("invalid %%M value");
1016 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
1021 output_operand_lossage ("invalid %%m value");
1022 fprintf (file
, "%d", (INT_LOWPART (x
) & 0xffff) << 16);
1026 if (GET_CODE (x
) == GE
)
1027 fprintf (file
, "f");
1029 fprintf (file
, "t");
1033 if (GET_CODE (x
) == GE
)
1034 fprintf (file
, "t");
1036 fprintf (file
, "f");
1040 /* It so happens that the RTX names for the conditions are the same as
1041 the 29k's insns except for "ne", which requires "neq". */
1042 fprintf (file
, GET_RTX_NAME (GET_CODE (x
)));
1043 if (GET_CODE (x
) == NE
)
1044 fprintf (file
, "q");
1048 if (optimize
&& flag_delayed_branch
1049 && a29k_last_prologue_insn
== 0 && epilogue_operand (x
, VOIDmode
)
1050 && dbr_sequence_length () == 0)
1052 /* We need to output the label number of the last label in the
1053 function, which is not necessarily X since there might be
1054 a USE insn in between. First go forward to the last insn, then
1055 back up to a label. */
1056 while (NEXT_INSN (x
) != 0)
1059 while (GET_CODE (x
) != CODE_LABEL
)
1062 ASM_GENERATE_INTERNAL_LABEL (buf
, "LX", CODE_LABEL_NUMBER (x
));
1063 assemble_name (file
, buf
);
1066 output_asm_label (x
);
1070 if (dbr_sequence_length ())
1072 else if (a29k_last_prologue_insn
)
1074 fprintf (file
, "\n\t%s", a29k_last_prologue_insn
);
1075 a29k_last_prologue_insn
= 0;
1077 else if (optimize
&& flag_delayed_branch
1078 && epilogue_operand (x
, VOIDmode
))
1080 fprintf (file
, "\n\t%s", a29k_first_epilogue_insn
);
1081 a29k_first_epilogue_insn_used
= 1;
1084 fprintf (file
, "\n\tnop");
1088 output_addr_const (file
, x
);
1089 if (dbr_sequence_length () == 0)
1091 /* If this doesn't have its delay slot filled, see if we need to
1092 put the last insn of the prolog in it. If not, see if this is
1093 a recursive call. If so, we can put the first insn of its
1094 prolog in the delay slot. Otherwise, write a nop. */
1095 if (a29k_last_prologue_insn
)
1097 fprintf (file
, "\n\t%s", a29k_last_prologue_insn
);
1098 a29k_last_prologue_insn
= 0;
1100 else if (GET_CODE (x
) == SYMBOL_REF
1101 && ! strcmp (XSTR (x
, 0), current_function_name
))
1102 fprintf (file
, "+4\n\t%s,%d",
1103 a29k_regstack_size
>= 64 ? "const gr121" : "sub gr1,gr1",
1104 a29k_regstack_size
* 4);
1106 fprintf (file
, "\n\tnop");
1111 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
)
1113 union real_extract u
;
1115 bcopy ((char *) &CONST_DOUBLE_LOW (x
), (char *) &u
, sizeof u
);
1116 fprintf (file
, "$double1(%.20e)", u
.d
);
1118 else if (GET_CODE (x
) == REG
)
1119 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
1121 output_operand_lossage ("invalid %%L value");
1125 if (GET_CODE (x
) != REG
)
1126 output_operand_lossage ("invalid %%O value");
1127 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
1131 if (GET_CODE (x
) != REG
)
1132 output_operand_lossage ("invalid %%P value");
1133 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
1137 fprintf (file
, "%d", (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
)-1);
1141 if (GET_CODE (x
) != PARALLEL
)
1142 output_operand_lossage ("invalid %%V value");
1143 fprintf (file
, "%d", XVECLEN (x
, 0) - 2);
1147 if (dbr_sequence_length () == 0)
1149 if (a29k_last_prologue_insn
)
1151 fprintf (file
, "\n\t%s", a29k_last_prologue_insn
);
1152 a29k_last_prologue_insn
= 0;
1155 fprintf (file
, "\n\tnop");
1160 fprintf (file
, "%s", reg_names
[R_TPC
]);
1164 if (GET_CODE (x
) == REG
)
1165 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1167 else if (GET_CODE (x
) == MEM
)
1168 output_address (XEXP (x
, 0));
1170 else if (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == SUBREG
1171 && GET_CODE (SUBREG_REG (XEXP (x
, 0))) == CONST_DOUBLE
)
1173 union real_extract u
;
1175 if (GET_MODE (SUBREG_REG (XEXP (x
, 0))) == SFmode
)
1176 fprintf (file
, "$float");
1178 fprintf (file
, "$double%d", SUBREG_WORD (XEXP (x
, 0)));
1179 bcopy ((char *) &CONST_DOUBLE_LOW (SUBREG_REG (XEXP (x
, 0))),
1180 (char *) &u
, sizeof u
);
1181 fprintf (file
, "(%.20e)", u
.d
);
1184 else if (GET_CODE (x
) == CONST_DOUBLE
1185 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1187 union real_extract u
;
1189 bcopy ((char *) &CONST_DOUBLE_LOW (x
), (char *) &u
, sizeof u
);
1190 fprintf (file
, "$%s(%.20e)",
1191 GET_MODE (x
) == SFmode
? "float" : "double0", u
.d
);
1195 output_addr_const (file
, x
);
1198 /* This page contains routines to output function prolog and epilog code. */
1200 /* Compute the size of the register stack, and determine if there are any
1201 call instructions. */
1204 compute_regstack_size ()
1209 /* See if we make any calls. We need to set lr1 if so. */
1210 a29k_makes_calls
= 0;
1211 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
1212 if (GET_CODE (insn
) == CALL_INSN
1213 || (GET_CODE (insn
) == INSN
1214 && GET_CODE (PATTERN (insn
)) == SEQUENCE
1215 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
))
1217 a29k_makes_calls
= 1;
1221 /* Find the highest local register used. */
1222 for (i
= R_LR (127); i
>= R_LR (0); i
--)
1223 if (regs_ever_live
[i
])
1226 a29k_regstack_size
= i
- (R_LR (0) - 1);
1228 /* If calling routines, ensure we count lr0 & lr1. */
1229 if (a29k_makes_calls
&& a29k_regstack_size
< 2)
1230 a29k_regstack_size
= 2;
1232 /* Count frame pointer and align to 8 byte boundary (even number of
1234 a29k_regstack_size
+= frame_pointer_needed
;
1235 if (a29k_regstack_size
& 1) a29k_regstack_size
++;
1238 /* Sets register names for incoming arguments and frame pointer.
1239 This can't be computed until after register allocation. */
1242 a29k_compute_reg_names ()
1246 compute_regstack_size ();
1248 /* Set the names and numbers of the frame pointer and incoming argument
1251 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1252 a29k_debug_reg_map
[i
] = i
;
1254 reg_names
[FRAME_POINTER_REGNUM
] = reg_names
[R_LR (a29k_regstack_size
- 1)];
1255 a29k_debug_reg_map
[FRAME_POINTER_REGNUM
] = R_LR (a29k_regstack_size
- 1);
1257 for (i
= 0; i
< 16; i
++)
1259 reg_names
[R_AR (i
)] = reg_names
[R_LR (a29k_regstack_size
+ i
+ 2)];
1260 a29k_debug_reg_map
[R_AR (i
)] = R_LR (a29k_regstack_size
+ i
+ 2);
1263 /* If using kernel register map, swap numbers for kernel and user
1265 if (TARGET_KERNEL_REGISTERS
)
1266 for (i
= 0; i
< 32; i
++)
1268 int tem
= a29k_debug_reg_map
[i
];
1269 a29k_debug_reg_map
[i
] = a29k_debug_reg_map
[R_KR (i
)];
1270 a29k_debug_reg_map
[R_KR (i
)] = tem
;
1274 /* Output function prolog code to file FILE. Memory stack size is SIZE. */
1277 output_prolog (file
, size
)
1284 unsigned int tag_word
;
1286 /* See how many incoming arguments we have in registers. */
1287 for (i
= R_AR (0); i
< R_AR (16); i
++)
1288 if (! fixed_regs
[i
])
1291 /* The argument count includes the caller's lr0 and lr1. */
1294 /* Compute memory stack size. Add in number of bytes that the we should
1295 push and pretend the caller did and the size of outgoing arguments.
1296 Then round to a doubleword boundary. */
1297 size
+= (current_function_pretend_args_size
1298 + current_function_outgoing_args_size
);
1299 size
= (size
+ 7) & ~7;
1301 /* Write header words. See if one or two word form. */
1302 tag_word
= (frame_pointer_needed
? 0x400000 : 0) + (arg_count
<< 16);
1304 if (size
/ 8 > 0xff)
1305 fprintf (file
, "\t.word %d, 0x%0x\n", (size
/ 8) << 2,
1306 0x800000 + tag_word
);
1308 fprintf (file
, "\t.word 0x%0x\n", tag_word
+ ((size
/ 8) << 3));
1310 /* Define the function name. */
1311 assemble_name (file
, a29k_function_name
);
1312 fprintf (file
, ":\n");
1314 /* Push the register stack by the proper amount. There are two possible
1316 if (a29k_regstack_size
>= 256/4)
1317 fprintf (file
, "\tconst %s,%d\n\tsub gr1,gr1,%s\n",
1318 reg_names
[R_TAV
], a29k_regstack_size
* 4, reg_names
[R_TAV
]);
1319 else if (a29k_regstack_size
)
1320 fprintf (file
, "\tsub gr1,gr1,%d\n", a29k_regstack_size
* 4);
1322 /* Test that the registers are available. */
1323 if (a29k_regstack_size
)
1324 fprintf (file
, "\tasgeu V_%sSPILL,gr1,%s\n",
1325 TARGET_KERNEL_REGISTERS
? "K" : "", reg_names
[R_RAB
]);
1327 /* Set up frame pointer, if one is needed. */
1328 if (frame_pointer_needed
)
1329 fprintf (file
, "\tsll %s,%s,0\n", reg_names
[FRAME_POINTER_REGNUM
],
1332 /* Make room for any frame space. There are three ways to do this. */
1335 fprintf (file
, "\tconst %s,%d\n", reg_names
[R_TAV
], size
);
1337 fprintf (file
, "\tconsth %s,%d\n", reg_names
[R_TAV
], size
);
1338 if (TARGET_STACK_CHECK
)
1339 fprintf (file
, "\tcall %s,__msp_check\n", reg_names
[R_TPC
]);
1340 fprintf (file
, "\tsub %s,%s,%s\n",
1341 reg_names
[R_MSP
], reg_names
[R_MSP
], reg_names
[R_TAV
]);
1345 if (TARGET_STACK_CHECK
)
1346 fprintf (file
, "\tcall %s,__msp_check\n", reg_names
[R_TPC
]);
1347 fprintf (file
, "\tsub %s,%s,%d\n",
1348 reg_names
[R_MSP
], reg_names
[R_MSP
], size
);
1351 /* If this routine will make calls, set lr1. If we see an insn that
1352 can use a delay slot before a call or jump, save this insn for that
1353 slot (this condition is equivalent to seeing if we have an insn that
1354 needs delay slots before an insn that has a filled delay slot). */
1355 a29k_last_prologue_insn
= 0;
1356 if (a29k_makes_calls
)
1358 i
= (a29k_regstack_size
+ arg_count
) * 4;
1360 fprintf (file
, "\tconst %s,%d\n\tadd lr1,gr1,%s\n",
1361 reg_names
[R_TAV
], i
, reg_names
[R_TAV
]);
1364 if (optimize
&& flag_delayed_branch
)
1365 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1367 if (GET_CODE (insn
) == CODE_LABEL
1368 || (GET_CODE (insn
) == INSN
1369 && GET_CODE (PATTERN (insn
)) == SEQUENCE
))
1372 if (GET_CODE (insn
) == NOTE
1373 || (GET_CODE (insn
) == INSN
1374 && (GET_CODE (PATTERN (insn
)) == USE
1375 || GET_CODE (PATTERN (insn
)) == CLOBBER
)))
1378 if (num_delay_slots (insn
) > 0)
1380 a29k_last_prologue_insn
= (char *) oballoc (100);
1381 sprintf (a29k_last_prologue_insn
, "add lr1,gr1,%d", i
);
1386 if (a29k_last_prologue_insn
== 0)
1387 fprintf (file
, "\tadd lr1,gr1,%d\n", i
);
1391 /* Compute the first insn of the epilogue. */
1392 a29k_first_epilogue_insn_used
= 0;
1394 if (size
== 0 && a29k_regstack_size
== 0 && ! frame_pointer_needed
)
1395 a29k_first_epilogue_insn
= 0;
1397 a29k_first_epilogue_insn
= (char *) oballoc (100);
1399 if (frame_pointer_needed
)
1400 sprintf (a29k_first_epilogue_insn
, "sll %s,%s,0",
1401 reg_names
[R_MSP
], reg_names
[FRAME_POINTER_REGNUM
]);
1402 else if (a29k_regstack_size
)
1404 if (a29k_regstack_size
>= 256 / 4)
1405 sprintf (a29k_first_epilogue_insn
, "const %s,%d",
1406 reg_names
[R_TAV
], a29k_regstack_size
* 4);
1408 sprintf (a29k_first_epilogue_insn
, "add gr1,gr1,%d",
1409 a29k_regstack_size
* 4);
1414 sprintf (a29k_first_epilogue_insn
, "const %s,%d",
1415 reg_names
[R_TAV
], size
);
1417 sprintf (a29k_first_epilogue_insn
, "add %s,%s,%d",
1418 reg_names
[R_MSP
], reg_names
[R_MSP
], size
);
1422 /* Call this after writing what might be the first instruction of the
1423 epilogue. If that first insn was used in a delay slot, an intermediate
1424 label is written. */
1427 check_epilogue_internal_label (file
)
1432 if (! a29k_first_epilogue_insn_used
)
1435 for (insn
= get_last_insn ();
1436 GET_CODE (insn
) != CODE_LABEL
;
1437 insn
= PREV_INSN (insn
))
1440 ASM_OUTPUT_INTERNAL_LABEL (file
, "LX", CODE_LABEL_NUMBER (insn
));
1441 a29k_first_epilogue_insn_used
= 0;
1444 /* Output the epilog of the last procedure to file FILE. SIZE is the memory
1445 stack size. The register stack size is in the variable
1446 A29K_REGSTACK_SIZE. */
1449 output_epilog (file
, size
)
1454 int locals_unavailable
= 0; /* True until after first insn
1455 after gr1 update. */
1457 /* If we hit a BARRIER before a real insn or CODE_LABEL, we don't
1458 need to do anything because we are never jumped to. */
1459 insn
= get_last_insn ();
1460 if (GET_CODE (insn
) == NOTE
)
1461 insn
= prev_nonnote_insn (insn
);
1463 if (insn
&& GET_CODE (insn
) == BARRIER
)
1466 /* If a frame pointer was needed we must restore the memory stack pointer
1467 before adjusting the register stack. */
1468 if (frame_pointer_needed
)
1470 fprintf (file
, "\tsll %s,%s,0\n",
1471 reg_names
[R_MSP
], reg_names
[FRAME_POINTER_REGNUM
]);
1472 check_epilogue_internal_label (file
);
1475 /* Restore the register stack. There are two ways to do this. */
1476 if (a29k_regstack_size
)
1478 if (a29k_regstack_size
>= 256/4)
1480 fprintf (file
, "\tconst %s,%d\n",
1481 reg_names
[R_TAV
], a29k_regstack_size
* 4);
1482 check_epilogue_internal_label (file
);
1483 fprintf (file
, "\tadd gr1,gr1,%s\n", reg_names
[R_TAV
]);
1487 fprintf (file
, "\tadd gr1,gr1,%d\n", a29k_regstack_size
* 4);
1488 check_epilogue_internal_label (file
);
1490 locals_unavailable
= 1;
1493 /* Restore the memory stack pointer if there is no frame pointer.
1494 Adjust the size to include any pretend arguments and pushed
1495 arguments and round to doubleword boundary. */
1496 size
+= (current_function_pretend_args_size
1497 + current_function_outgoing_args_size
);
1498 size
= (size
+ 7) & ~7;
1500 if (size
&& ! frame_pointer_needed
)
1504 fprintf (file
, "\tconst %s,%d\n", reg_names
[R_TAV
], size
);
1505 check_epilogue_internal_label (file
);
1506 locals_unavailable
= 0;
1508 fprintf (file
, "\tconsth %s,%d\n", reg_names
[R_TAV
], size
);
1509 fprintf (file
, "\tadd %s,%s,%s\n",
1510 reg_names
[R_MSP
], reg_names
[R_MSP
], reg_names
[R_TAV
]);
1514 fprintf (file
, "\tadd %s,%s,%d\n",
1515 reg_names
[R_MSP
], reg_names
[R_MSP
], size
);
1516 check_epilogue_internal_label (file
);
1517 locals_unavailable
= 0;
1521 if (locals_unavailable
)
1523 /* If we have an insn for this delay slot, write it. */
1524 if (current_function_epilogue_delay_list
)
1525 final_scan_insn (XEXP (current_function_epilogue_delay_list
, 0),
1528 fprintf (file
, "\tnop\n");
1531 fprintf (file
, "\tjmpi lr0\n");
1532 if (a29k_regstack_size
)
1533 fprintf (file
, "\tasleu V_%sFILL,lr1,%s\n",
1534 TARGET_KERNEL_REGISTERS
? "K" : "", reg_names
[R_RFB
]);
1535 else if (current_function_epilogue_delay_list
)
1536 final_scan_insn (XEXP (current_function_epilogue_delay_list
, 0),
1539 fprintf (file
, "\tnop\n");