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[GCC, AArch64] Enable Transactional Memory Extension
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1 /* AArch64 Non-NEON ACLE intrinsics include file.
2
3 Copyright (C) 2014-2019 Free Software Foundation, Inc.
4 Contributed by ARM Ltd.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 Under Section 7 of GPL version 3, you are granted additional
19 permissions described in the GCC Runtime Library Exception, version
20 3.1, as published by the Free Software Foundation.
21
22 You should have received a copy of the GNU General Public License and
23 a copy of the GCC Runtime Library Exception along with this program;
24 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
25 <http://www.gnu.org/licenses/>. */
26
27 #ifndef _GCC_ARM_ACLE_H
28 #define _GCC_ARM_ACLE_H
29
30 #include <stdint.h>
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36 #pragma GCC push_options
37
38 #pragma GCC target ("+nothing+crc")
39
40 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
41 __crc32b (uint32_t __a, uint8_t __b)
42 {
43 return __builtin_aarch64_crc32b (__a, __b);
44 }
45
46 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
47 __crc32cb (uint32_t __a, uint8_t __b)
48 {
49 return __builtin_aarch64_crc32cb (__a, __b);
50 }
51
52 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
53 __crc32ch (uint32_t __a, uint16_t __b)
54 {
55 return __builtin_aarch64_crc32ch (__a, __b);
56 }
57
58 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
59 __crc32cw (uint32_t __a, uint32_t __b)
60 {
61 return __builtin_aarch64_crc32cw (__a, __b);
62 }
63
64 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
65 __crc32cd (uint32_t __a, uint64_t __b)
66 {
67 return __builtin_aarch64_crc32cx (__a, __b);
68 }
69
70 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
71 __crc32h (uint32_t __a, uint16_t __b)
72 {
73 return __builtin_aarch64_crc32h (__a, __b);
74 }
75
76 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
77 __crc32w (uint32_t __a, uint32_t __b)
78 {
79 return __builtin_aarch64_crc32w (__a, __b);
80 }
81
82 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
83 __crc32d (uint32_t __a, uint64_t __b)
84 {
85 return __builtin_aarch64_crc32x (__a, __b);
86 }
87
88 #pragma GCC pop_options
89
90 #ifdef __ARM_FEATURE_TME
91 #pragma GCC push_options
92 #pragma GCC target ("+nothing+tme")
93
94 #define _TMFAILURE_REASON 0x00007fffu
95 #define _TMFAILURE_RTRY 0x00008000u
96 #define _TMFAILURE_CNCL 0x00010000u
97 #define _TMFAILURE_MEM 0x00020000u
98 #define _TMFAILURE_IMP 0x00040000u
99 #define _TMFAILURE_ERR 0x00080000u
100 #define _TMFAILURE_SIZE 0x00100000u
101 #define _TMFAILURE_NEST 0x00200000u
102 #define _TMFAILURE_DBG 0x00400000u
103 #define _TMFAILURE_INT 0x00800000u
104 #define _TMFAILURE_TRIVIAL 0x01000000u
105
106 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
107 __tstart (void)
108 {
109 return __builtin_aarch64_tstart ();
110 }
111
112 __extension__ static __inline void __attribute__ ((__always_inline__))
113 __tcommit (void)
114 {
115 __builtin_aarch64_tcommit ();
116 }
117
118 __extension__ static __inline void __attribute__ ((__always_inline__))
119 __tcancel (const uint64_t __reason)
120 {
121 __builtin_aarch64_tcancel (__reason);
122 }
123
124 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
125 __ttest (void)
126 {
127 return __builtin_aarch64_ttest ();
128 }
129
130 #pragma GCC pop_options
131 #endif
132
133 #ifdef __cplusplus
134 }
135 #endif
136
137 #endif