]> git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/config/arm/aout.h
Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi.
[thirdparty/gcc.git] / gcc / config / arm / aout.h
1 /* Definitions of target machine for GNU compiler, for ARM with a.out
2 Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007
3 Free Software Foundation, Inc.
4 Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 2, or (at your
11 option) any later version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23 #ifndef ASM_APP_ON
24 #define ASM_APP_ON ""
25 #endif
26 #ifndef ASM_APP_OFF
27 #define ASM_APP_OFF ""
28 #endif
29
30 /* Switch to the text or data segment. */
31 #define TEXT_SECTION_ASM_OP "\t.text"
32 #define DATA_SECTION_ASM_OP "\t.data"
33 #define BSS_SECTION_ASM_OP "\t.bss"
34
35 /* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
36 make sure that this change is reflected in the function
37 coff_arm_is_local_label_name() in bfd/coff-arm.c. */
38 #ifndef REGISTER_PREFIX
39 #define REGISTER_PREFIX ""
40 #endif
41
42 #ifndef USER_LABEL_PREFIX
43 #define USER_LABEL_PREFIX "_"
44 #endif
45
46 #ifndef LOCAL_LABEL_PREFIX
47 #define LOCAL_LABEL_PREFIX ""
48 #endif
49
50 /* The assembler's names for the registers. Note that the ?xx registers are
51 there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
52 (each of which is overlaid on two S registers), although there are no
53 actual single-precision registers which correspond to D16-D31. */
54 #ifndef REGISTER_NAMES
55 #define REGISTER_NAMES \
56 { \
57 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
58 "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
59 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
60 "cc", "sfp", "afp", \
61 "mv0", "mv1", "mv2", "mv3", \
62 "mv4", "mv5", "mv6", "mv7", \
63 "mv8", "mv9", "mv10", "mv11", \
64 "mv12", "mv13", "mv14", "mv15", \
65 "wcgr0", "wcgr1", "wcgr2", "wcgr3", \
66 "wr0", "wr1", "wr2", "wr3", \
67 "wr4", "wr5", "wr6", "wr7", \
68 "wr8", "wr9", "wr10", "wr11", \
69 "wr12", "wr13", "wr14", "wr15", \
70 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
71 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
72 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
73 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
74 "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
75 "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
76 "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
77 "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
78 "vfpcc" \
79 }
80 #endif
81
82 #ifndef ADDITIONAL_REGISTER_NAMES
83 #define ADDITIONAL_REGISTER_NAMES \
84 { \
85 {"a1", 0}, \
86 {"a2", 1}, \
87 {"a3", 2}, \
88 {"a4", 3}, \
89 {"v1", 4}, \
90 {"v2", 5}, \
91 {"v3", 6}, \
92 {"v4", 7}, \
93 {"v5", 8}, \
94 {"v6", 9}, \
95 {"rfp", 9}, /* Gcc used to call it this */ \
96 {"sb", 9}, \
97 {"v7", 10}, \
98 {"r10", 10}, /* sl */ \
99 {"r11", 11}, /* fp */ \
100 {"r12", 12}, /* ip */ \
101 {"r13", 13}, /* sp */ \
102 {"r14", 14}, /* lr */ \
103 {"r15", 15}, /* pc */ \
104 {"mvf0", 27}, \
105 {"mvf1", 28}, \
106 {"mvf2", 29}, \
107 {"mvf3", 30}, \
108 {"mvf4", 31}, \
109 {"mvf5", 32}, \
110 {"mvf6", 33}, \
111 {"mvf7", 34}, \
112 {"mvf8", 35}, \
113 {"mvf9", 36}, \
114 {"mvf10", 37}, \
115 {"mvf11", 38}, \
116 {"mvf12", 39}, \
117 {"mvf13", 40}, \
118 {"mvf14", 41}, \
119 {"mvf15", 42}, \
120 {"mvd0", 27}, \
121 {"mvd1", 28}, \
122 {"mvd2", 29}, \
123 {"mvd3", 30}, \
124 {"mvd4", 31}, \
125 {"mvd5", 32}, \
126 {"mvd6", 33}, \
127 {"mvd7", 34}, \
128 {"mvd8", 35}, \
129 {"mvd9", 36}, \
130 {"mvd10", 37}, \
131 {"mvd11", 38}, \
132 {"mvd12", 39}, \
133 {"mvd13", 40}, \
134 {"mvd14", 41}, \
135 {"mvd15", 42}, \
136 {"mvfx0", 27}, \
137 {"mvfx1", 28}, \
138 {"mvfx2", 29}, \
139 {"mvfx3", 30}, \
140 {"mvfx4", 31}, \
141 {"mvfx5", 32}, \
142 {"mvfx6", 33}, \
143 {"mvfx7", 34}, \
144 {"mvfx8", 35}, \
145 {"mvfx9", 36}, \
146 {"mvfx10", 37}, \
147 {"mvfx11", 38}, \
148 {"mvfx12", 39}, \
149 {"mvfx13", 40}, \
150 {"mvfx14", 41}, \
151 {"mvfx15", 42}, \
152 {"mvdx0", 27}, \
153 {"mvdx1", 28}, \
154 {"mvdx2", 29}, \
155 {"mvdx3", 30}, \
156 {"mvdx4", 31}, \
157 {"mvdx5", 32}, \
158 {"mvdx6", 33}, \
159 {"mvdx7", 34}, \
160 {"mvdx8", 35}, \
161 {"mvdx9", 36}, \
162 {"mvdx10", 37}, \
163 {"mvdx11", 38}, \
164 {"mvdx12", 39}, \
165 {"mvdx13", 40}, \
166 {"mvdx14", 41}, \
167 {"mvdx15", 42}, \
168 {"d0", 63}, {"q0", 63}, \
169 {"d1", 65}, \
170 {"d2", 67}, {"q1", 67}, \
171 {"d3", 69}, \
172 {"d4", 71}, {"q2", 71}, \
173 {"d5", 73}, \
174 {"d6", 75}, {"q3", 75}, \
175 {"d7", 77}, \
176 {"d8", 79}, {"q4", 79}, \
177 {"d9", 81}, \
178 {"d10", 83}, {"q5", 83}, \
179 {"d11", 85}, \
180 {"d12", 87}, {"q6", 87}, \
181 {"d13", 89}, \
182 {"d14", 91}, {"q7", 91}, \
183 {"d15", 93}, \
184 {"q8", 95}, \
185 {"q9", 99}, \
186 {"q10", 103}, \
187 {"q11", 107}, \
188 {"q12", 111}, \
189 {"q13", 115}, \
190 {"q14", 119}, \
191 {"q15", 123} \
192 }
193 #endif
194
195 /* Arm Assembler barfs on dollars. */
196 #define DOLLARS_IN_IDENTIFIERS 0
197
198 #ifndef NO_DOLLAR_IN_LABEL
199 #define NO_DOLLAR_IN_LABEL 1
200 #endif
201
202 /* Generate DBX debugging information. riscix.h will undefine this because
203 the native assembler does not support stabs. */
204 #define DBX_DEBUGGING_INFO 1
205
206 /* Acorn dbx moans about continuation chars, so don't use any. */
207 #ifndef DBX_CONTIN_LENGTH
208 #define DBX_CONTIN_LENGTH 0
209 #endif
210
211 /* Output a function label definition. */
212 #ifndef ASM_DECLARE_FUNCTION_NAME
213 #define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
214 do \
215 { \
216 ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
217 ASM_OUTPUT_LABEL (STREAM, NAME); \
218 } \
219 while (0)
220 #endif
221
222 /* Globalizing directive for a label. */
223 #define GLOBAL_ASM_OP "\t.global\t"
224
225 /* Make an internal label into a string. */
226 #ifndef ASM_GENERATE_INTERNAL_LABEL
227 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
228 sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
229 #endif
230
231 /* Output an element of a dispatch table. */
232 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
233 do \
234 { \
235 gcc_assert (!TARGET_THUMB2); \
236 asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
237 } \
238 while (0)
239
240
241 /* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
242 can be used. For non-pic code where the offsets do not suitable for
243 TBB/TBH the elements are output as absolute labels. */
244 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
245 do \
246 { \
247 if (TARGET_ARM) \
248 asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
249 else if (TARGET_THUMB1) \
250 asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", VALUE, REL); \
251 else /* Thumb-2 */ \
252 { \
253 switch (GET_MODE(body)) \
254 { \
255 case QImode: /* TBB */ \
256 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
257 VALUE, REL); \
258 break; \
259 case HImode: /* TBH */ \
260 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
261 VALUE, REL); \
262 break; \
263 case SImode: \
264 if (flag_pic) \
265 asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
266 else \
267 asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
268 break; \
269 default: \
270 gcc_unreachable(); \
271 } \
272 } \
273 } \
274 while (0)
275
276
277 #undef ASM_OUTPUT_ASCII
278 #define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
279 output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
280
281 /* Output a gap. In fact we fill it with nulls. */
282 #undef ASM_OUTPUT_SKIP
283 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
284 fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
285
286 /* Align output to a power of two. Horrible /bin/as. */
287 #ifndef ASM_OUTPUT_ALIGN
288 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
289 do \
290 { \
291 register int amount = 1 << (POWER); \
292 \
293 if (amount == 2) \
294 fprintf (STREAM, "\t.even\n"); \
295 else if (amount != 1) \
296 fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
297 } \
298 while (0)
299 #endif
300
301 /* Output a common block. */
302 #ifndef ASM_OUTPUT_COMMON
303 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
304 do \
305 { \
306 fprintf (STREAM, "\t.comm\t"); \
307 assemble_name (STREAM, NAME); \
308 asm_fprintf (STREAM, ", %d\t%@ %d\n", \
309 (int)(ROUNDED), (int)(SIZE)); \
310 } \
311 while (0)
312 #endif
313
314 /* Output a local common block. /bin/as can't do this, so hack a
315 `.space' into the bss segment. Note that this is *bad* practice,
316 which is guaranteed NOT to work since it doesn't define STATIC
317 COMMON space but merely STATIC BSS space. */
318 #ifndef ASM_OUTPUT_ALIGNED_LOCAL
319 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
320 do \
321 { \
322 switch_to_section (bss_section); \
323 ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
324 ASM_OUTPUT_LABEL (STREAM, NAME); \
325 fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
326 } \
327 while (0)
328 #endif
329
330 /* Output a zero-initialized block. */
331 #ifndef ASM_OUTPUT_ALIGNED_BSS
332 #define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
333 asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
334 #endif
335
336 /* Output a #ident directive. */
337 #ifndef ASM_OUTPUT_IDENT
338 #define ASM_OUTPUT_IDENT(STREAM,STRING) \
339 asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
340 #endif
341
342 #ifndef ASM_COMMENT_START
343 #define ASM_COMMENT_START "@"
344 #endif
345
346 /* This works for GAS and some other assemblers. */
347 #define SET_ASM_OP "\t.set\t"