gcc/config/arm/arm.opt

   1 ; Options for the ARM port of the compiler.
   2
   3 ; Copyright (C) 2005-2023 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 ; for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/arm/arm-opts.h
  23
  24 Enum
  25 Name(tls_type) Type(enum arm_tls_type)
  26 TLS dialect to use:
  27
  28 EnumValue
  29 Enum(tls_type) String(gnu) Value(TLS_GNU)
  30
  31 EnumValue
  32 Enum(tls_type) String(gnu2) Value(TLS_GNU2)
  33
  34 mabi=
  35 Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
  36 Specify an ABI.
  37
  38 Enum
  39 Name(arm_abi_type) Type(enum arm_abi_type)
  40 Known ARM ABIs (for use with the -mabi= option):
  41
  42 EnumValue
  43 Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
  44
  45 EnumValue
  46 Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
  47
  48 EnumValue
  49 Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
  50
  51 EnumValue
  52 Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
  53
  54 EnumValue
  55 Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
  56
  57 mabort-on-noreturn
  58 Target Mask(ABORT_NORETURN)
  59 Generate a call to abort if a noreturn function returns.
  60
  61 mapcs
  62 Target RejectNegative Mask(APCS_FRAME) Undocumented
  63
  64 mapcs-frame
  65 Target Mask(APCS_FRAME)
  66 Generate APCS conformant stack frames.
  67
  68 mapcs-reentrant
  69 Target Mask(APCS_REENT)
  70 Generate re-entrant, PIC code.
  71
  72 mapcs-stack-check
  73 Target Mask(APCS_STACK) Undocumented
  74
  75 march=
  76 Target Save RejectNegative Negative(march=) ToLower Joined Var(arm_arch_string)
  77 Specify the name of the target architecture.
  78
  79 ; Other arm_arch values are loaded from arm-tables.opt
  80 ; but that is a generated file and this is an odd-one-out.
  81 EnumValue
  82 Enum(arm_arch) String(native) Value(-1) DriverOnly
  83
  84 ; Set to the name of target architecture which is required for
  85 ; multilib linking.  This option is undocumented because it
  86 ; should not be used by the users.
  87 mlibarch=
  88 Target RejectNegative JoinedOrMissing NoDWARFRecord DriverOnly Undocumented
  89
  90 marm
  91 Target RejectNegative Negative(mthumb) InverseMask(THUMB)
  92 Generate code in 32 bit ARM state.
  93
  94 mbig-endian
  95 Target RejectNegative Negative(mlittle-endian) Mask(BIG_END)
  96 Assume target CPU is configured as big endian.
  97
  98 mcallee-super-interworking
  99 Target Mask(CALLEE_INTERWORKING)
 100 Thumb: Assume non-static functions may be called from ARM code.
 101
 102 mcaller-super-interworking
 103 Target Mask(CALLER_INTERWORKING)
 104 Thumb: Assume function pointers may go to non-Thumb aware code.
 105
 106 mcpu=
 107 Target Save RejectNegative Negative(mcpu=) ToLower Joined Var(arm_cpu_string)
 108 Specify the name of the target CPU.
 109
 110 mfloat-abi=
 111 Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
 112 Specify if floating point hardware should be used.
 113
 114 mcmse
 115 Target RejectNegative Var(use_cmse)
 116 Specify that the compiler should target secure code as per ARMv8-M Security Extensions.
 117
 118 Enum
 119 Name(float_abi_type) Type(enum float_abi_type)
 120 Known floating-point ABIs (for use with the -mfloat-abi= option):
 121
 122 EnumValue
 123 Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
 124
 125 EnumValue
 126 Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
 127
 128 EnumValue
 129 Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
 130
 131 mflip-thumb
 132 Target Var(TARGET_FLIP_THUMB) Undocumented
 133 Switch ARM/Thumb modes on alternating functions for compiler testing.
 134
 135 mfp16-format=
 136 Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
 137 Specify the __fp16 floating-point format.
 138
 139 Enum
 140 Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
 141 Known __fp16 formats (for use with the -mfp16-format= option):
 142
 143 EnumValue
 144 Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
 145
 146 EnumValue
 147 Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
 148
 149 EnumValue
 150 Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
 151
 152 mfpu=
 153 Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Init(TARGET_FPU_auto) Save
 154 Specify the name of the target floating point hardware/format.
 155
 156 mhard-float
 157 Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
 158
 159 mlittle-endian
 160 Target RejectNegative Negative(mbig-endian) InverseMask(BIG_END)
 161 Assume target CPU is configured as little endian.
 162
 163 mlong-calls
 164 Target Mask(LONG_CALLS)
 165 Generate call insns as indirect calls, if necessary.
 166
 167 mpic-data-is-text-relative
 168 Target Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
 169 Assume data segments are relative to text segment.
 170
 171 mpic-register=
 172 Target RejectNegative Joined Var(arm_pic_register_string)
 173 Specify the register to be used for PIC addressing.
 174
 175 mpoke-function-name
 176 Target Mask(POKE_FUNCTION_NAME)
 177 Store function names in object code.
 178
 179 msched-prolog
 180 Target Mask(SCHED_PROLOG)
 181 Permit scheduling of a function's prologue sequence.
 182
 183 msingle-pic-base
 184 Target Mask(SINGLE_PIC_BASE)
 185 Do not load the PIC register in function prologues.
 186
 187 msoft-float
 188 Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
 189
 190 mstructure-size-boundary=
 191 Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
 192 Specify the minimum bit alignment of structures. (Deprecated).
 193
 194 mthumb
 195 Target RejectNegative Negative(marm) Mask(THUMB) Save
 196 Generate code for Thumb state.
 197
 198 mthumb-interwork
 199 Target Mask(INTERWORK)
 200 Support calls between Thumb and ARM instruction sets.
 201
 202 mtls-dialect=
 203 Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
 204 Specify thread local storage scheme.
 205
 206 mtp=
 207 Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
 208 Specify how to access the thread pointer.
 209
 210 Enum
 211 Name(arm_tp_type) Type(enum arm_tp_type)
 212 Valid arguments to -mtp=:
 213
 214 EnumValue
 215 Enum(arm_tp_type) String(soft) Value(TP_SOFT)
 216
 217 EnumValue
 218 Enum(arm_tp_type) String(auto) Value(TP_AUTO)
 219
 220 EnumValue
 221 Enum(arm_tp_type) String(cp15) Value(TP_CP15)
 222
 223 mtpcs-frame
 224 Target Mask(TPCS_FRAME)
 225 Thumb: Generate (non-leaf) stack frames even if not needed.
 226
 227 mtpcs-leaf-frame
 228 Target Mask(TPCS_LEAF_FRAME)
 229 Thumb: Generate (leaf) stack frames even if not needed.
 230
 231 mtune=
 232 Target Save RejectNegative Negative(mtune=) ToLower Joined Var(arm_tune_string)
 233 Tune code for the given processor.
 234
 235 mprint-tune-info
 236 Target RejectNegative Var(print_tune_info) Init(0)
 237 Print CPU tuning information as comment in assembler file.  This is
 238 an option used only for regression testing of the compiler and not
 239 intended for ordinary use in compiling code.
 240
 241 ; Other processor_type values are loaded from arm-tables.opt
 242 ; but that is a generated file and this is an odd-one-out.
 243 EnumValue
 244 Enum(processor_type) String(native) Value(-1) DriverOnly
 245
 246 mvectorize-with-neon-quad
 247 Target RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
 248 Use Neon quad-word (rather than double-word) registers for vectorization.
 249
 250 mvectorize-with-neon-double
 251 Target RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
 252 Use Neon double-word (rather than quad-word) registers for vectorization.
 253
 254 mverbose-cost-dump
 255 Common Undocumented Var(arm_verbose_cost) Init(0)
 256 Enable more verbose RTX cost dumps during debug.  For GCC developers use only.
 257
 258 mword-relocations
 259 Target Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
 260 Only generate absolute relocations on word sized values.
 261
 262 mrestrict-it
 263 Target Var(arm_restrict_it) Init(2) Save
 264 Generate IT blocks appropriate for ARMv8.
 265
 266 mfix-cortex-m3-ldrd
 267 Target Var(fix_cm3_ldrd) Init(2)
 268 Avoid overlapping destination and address registers on LDRD instructions
 269 that may trigger Cortex-M3 errata.
 270
 271 mfix-cmse-cve-2021-35465
 272 Target Var(fix_vlldm) Init(2)
 273 Mitigate issues with VLLDM on some M-profile devices (CVE-2021-35465).
 274
 275 mfix-cortex-a57-aes-1742098
 276 Target Var(fix_aes_erratum_1742098) Init(2) Save
 277 Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72
 278 (Arm erratum #1742098).
 279
 280 mfix-cortex-a72-aes-1655431
 281 Target Alias(mfix-cortex-a57-aes-1742098)
 282 Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72
 283 (Arm erratum #1655431).
 284
 285 munaligned-access
 286 Target Var(unaligned_access) Init(2) Save
 287 Enable unaligned word and halfword accesses to packed data.
 288
 289 mneon-for-64bits
 290 Target WarnRemoved
 291 This option is deprecated and has no effect.
 292
 293 mslow-flash-data
 294 Target Var(target_slow_flash_data) Init(0)
 295 Assume loading data from flash is slower than fetching instructions.
 296
 297 masm-syntax-unified
 298 Target Var(inline_asm_unified) Init(0) Save
 299 Assume unified syntax for inline assembly code.
 300
 301 mpure-code
 302 Target Var(target_pure_code) Init(0)
 303 Do not allow constant data to be placed in code sections.
 304
 305 mbe8
 306 Target RejectNegative Negative(mbe32) Mask(BE8)
 307 When linking for big-endian targets, generate a BE8 format image.
 308
 309 mbe32
 310 Target RejectNegative Negative(mbe8) InverseMask(BE8)
 311 When linking for big-endian targets, generate a legacy BE32 format image.
 312
 313 mbranch-cost=
 314 Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
 315 Cost to assume for a branch insn.
 316
 317 mgeneral-regs-only
 318 Target RejectNegative Mask(GENERAL_REGS_ONLY) Save
 319 Generate code which uses the core registers only (r0-r14).
 320
 321 mfdpic
 322 Target Mask(FDPIC)
 323 Enable Function Descriptor PIC mode.
 324
 325 mstack-protector-guard=
 326 Target RejectNegative Joined Enum(stack_protector_guard) Var(arm_stack_protector_guard) Init(SSP_GLOBAL)
 327 Use given stack-protector guard.
 328
 329 Enum
 330 Name(stack_protector_guard) Type(enum stack_protector_guard)
 331 Valid arguments to -mstack-protector-guard=:
 332
 333 EnumValue
 334 Enum(stack_protector_guard) String(tls) Value(SSP_TLSREG)
 335
 336 EnumValue
 337 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
 338
 339 mstack-protector-guard-offset=
 340 Target Joined RejectNegative String Var(arm_stack_protector_guard_offset_str)
 341 Use an immediate to offset from the TLS register. This option is for use with
 342 fstack-protector-guard=tls and not for use in user-land code.
 343
 344 TargetVariable
 345 long arm_stack_protector_guard_offset = 0