gcc/config/arm/arm.opt

   1 ; Options for the ARM port of the compiler.
   2
   3 ; Copyright (C) 2005-2024 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 ; for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/arm/arm-opts.h
  23
  24 HeaderInclude
  25 config/arm/aarch-common.h
  26
  27 TargetVariable
  28 enum aarch_function_type aarch_ra_sign_scope = AARCH_FUNCTION_NONE
  29
  30 TargetVariable
  31 unsigned aarch_enable_bti = 0
  32
  33 TargetVariable
  34 enum aarch_key_type aarch_ra_sign_key = AARCH_KEY_A
  35
  36 Enum
  37 Name(tls_type) Type(enum arm_tls_type)
  38 TLS dialect to use:
  39
  40 EnumValue
  41 Enum(tls_type) String(gnu) Value(TLS_GNU)
  42
  43 EnumValue
  44 Enum(tls_type) String(gnu2) Value(TLS_GNU2)
  45
  46 mabi=
  47 Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
  48 Specify an ABI.
  49
  50 Enum
  51 Name(arm_abi_type) Type(enum arm_abi_type)
  52 Known ARM ABIs (for use with the -mabi= option):
  53
  54 EnumValue
  55 Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
  56
  57 EnumValue
  58 Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
  59
  60 EnumValue
  61 Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
  62
  63 EnumValue
  64 Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
  65
  66 EnumValue
  67 Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
  68
  69 mabort-on-noreturn
  70 Target Mask(ABORT_NORETURN)
  71 Generate a call to abort if a noreturn function returns.
  72
  73 mapcs
  74 Target RejectNegative Mask(APCS_FRAME) Undocumented
  75
  76 mapcs-frame
  77 Target Mask(APCS_FRAME)
  78 Generate APCS conformant stack frames.
  79
  80 mapcs-reentrant
  81 Target Mask(APCS_REENT)
  82 Generate re-entrant, PIC code.
  83
  84 mapcs-stack-check
  85 Target Mask(APCS_STACK) Undocumented
  86
  87 march=
  88 Target Save RejectNegative Negative(march=) ToLower Joined Var(arm_arch_string)
  89 Specify the name of the target architecture.
  90
  91 ; Other arm_arch values are loaded from arm-tables.opt
  92 ; but that is a generated file and this is an odd-one-out.
  93 EnumValue
  94 Enum(arm_arch) String(native) Value(-1) DriverOnly
  95
  96 ; Set to the name of target architecture which is required for
  97 ; multilib linking.  This option is undocumented because it
  98 ; should not be used by the users.
  99 mlibarch=
 100 Target RejectNegative JoinedOrMissing NoDWARFRecord DriverOnly Undocumented
 101
 102 marm
 103 Target RejectNegative Negative(mthumb) InverseMask(THUMB)
 104 Generate code in 32 bit ARM state.
 105
 106 mbig-endian
 107 Target RejectNegative Negative(mlittle-endian) Mask(BIG_END)
 108 Assume target CPU is configured as big endian.
 109
 110 mcallee-super-interworking
 111 Target Mask(CALLEE_INTERWORKING)
 112 Thumb: Assume non-static functions may be called from ARM code.
 113
 114 mcaller-super-interworking
 115 Target Mask(CALLER_INTERWORKING)
 116 Thumb: Assume function pointers may go to non-Thumb aware code.
 117
 118 mcpu=
 119 Target Save RejectNegative Negative(mcpu=) ToLower Joined Var(arm_cpu_string)
 120 Specify the name of the target CPU.
 121
 122 mfloat-abi=
 123 Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
 124 Specify if floating point hardware should be used.
 125
 126 mcmse
 127 Target RejectNegative Var(use_cmse)
 128 Specify that the compiler should target secure code as per ARMv8-M Security Extensions.
 129
 130 Enum
 131 Name(float_abi_type) Type(enum float_abi_type)
 132 Known floating-point ABIs (for use with the -mfloat-abi= option):
 133
 134 EnumValue
 135 Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
 136
 137 EnumValue
 138 Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
 139
 140 EnumValue
 141 Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
 142
 143 mflip-thumb
 144 Target Var(TARGET_FLIP_THUMB) Undocumented
 145 Switch ARM/Thumb modes on alternating functions for compiler testing.
 146
 147 mfp16-format=
 148 Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
 149 Specify the __fp16 floating-point format.
 150
 151 Enum
 152 Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
 153 Known __fp16 formats (for use with the -mfp16-format= option):
 154
 155 EnumValue
 156 Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
 157
 158 EnumValue
 159 Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
 160
 161 EnumValue
 162 Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
 163
 164 mfpu=
 165 Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Init(TARGET_FPU_auto) Save
 166 Specify the name of the target floating point hardware/format.
 167
 168 mhard-float
 169 Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
 170
 171 mlittle-endian
 172 Target RejectNegative Negative(mbig-endian) InverseMask(BIG_END)
 173 Assume target CPU is configured as little endian.
 174
 175 mlong-calls
 176 Target Mask(LONG_CALLS)
 177 Generate call insns as indirect calls, if necessary.
 178
 179 mpic-data-is-text-relative
 180 Target Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
 181 Assume data segments are relative to text segment.
 182
 183 mpic-register=
 184 Target RejectNegative Joined Var(arm_pic_register_string)
 185 Specify the register to be used for PIC addressing.
 186
 187 mpoke-function-name
 188 Target Mask(POKE_FUNCTION_NAME)
 189 Store function names in object code.
 190
 191 msched-prolog
 192 Target Mask(SCHED_PROLOG)
 193 Permit scheduling of a function's prologue sequence.
 194
 195 msingle-pic-base
 196 Target Mask(SINGLE_PIC_BASE)
 197 Do not load the PIC register in function prologues.
 198
 199 msoft-float
 200 Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
 201
 202 mstructure-size-boundary=
 203 Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
 204 Specify the minimum bit alignment of structures. (Deprecated).
 205
 206 mthumb
 207 Target RejectNegative Negative(marm) Mask(THUMB) Save
 208 Generate code for Thumb state.
 209
 210 mthumb-interwork
 211 Target Mask(INTERWORK)
 212 Support calls between Thumb and ARM instruction sets.
 213
 214 mtls-dialect=
 215 Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
 216 Specify thread local storage scheme.
 217
 218 mtp=
 219 Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
 220 Specify how to access the thread pointer.
 221
 222 Enum
 223 Name(arm_tp_type) Type(enum arm_tp_type)
 224 Valid arguments to -mtp=:
 225
 226 EnumValue
 227 Enum(arm_tp_type) String(soft) Value(TP_SOFT)
 228
 229 EnumValue
 230 Enum(arm_tp_type) String(auto) Value(TP_AUTO)
 231
 232 EnumValue
 233 Enum(arm_tp_type) String(tpidrurw) Value(TP_TPIDRURW)
 234
 235 EnumValue
 236 Enum(arm_tp_type) String(cp15) Value(TP_TPIDRURO)
 237
 238 EnumValue
 239 Enum(arm_tp_type) String(tpidruro) Value(TP_TPIDRURO)
 240
 241 EnumValue
 242 Enum(arm_tp_type) String(tpidrprw) Value(TP_TPIDRPRW)
 243
 244 mtpcs-frame
 245 Target Mask(TPCS_FRAME)
 246 Thumb: Generate (non-leaf) stack frames even if not needed.
 247
 248 mtpcs-leaf-frame
 249 Target Mask(TPCS_LEAF_FRAME)
 250 Thumb: Generate (leaf) stack frames even if not needed.
 251
 252 mtune=
 253 Target Save RejectNegative Negative(mtune=) ToLower Joined Var(arm_tune_string)
 254 Tune code for the given processor.
 255
 256 mprint-tune-info
 257 Target RejectNegative Var(print_tune_info) Init(0)
 258 Print CPU tuning information as comment in assembler file.  This is
 259 an option used only for regression testing of the compiler and not
 260 intended for ordinary use in compiling code.
 261
 262 ; Other processor_type values are loaded from arm-tables.opt
 263 ; but that is a generated file and this is an odd-one-out.
 264 EnumValue
 265 Enum(processor_type) String(native) Value(-1) DriverOnly
 266
 267 mvectorize-with-neon-quad
 268 Target RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
 269 Use Neon quad-word (rather than double-word) registers for vectorization.
 270
 271 mvectorize-with-neon-double
 272 Target RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
 273 Use Neon double-word (rather than quad-word) registers for vectorization.
 274
 275 mverbose-cost-dump
 276 Common Undocumented Var(arm_verbose_cost) Init(0)
 277 Enable more verbose RTX cost dumps during debug.  For GCC developers use only.
 278
 279 mword-relocations
 280 Target Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
 281 Only generate absolute relocations on word sized values.
 282
 283 mrestrict-it
 284 Target Var(arm_restrict_it) Init(2) Save
 285 Generate IT blocks appropriate for ARMv8.
 286
 287 mfix-cortex-m3-ldrd
 288 Target Var(fix_cm3_ldrd) Init(2)
 289 Avoid overlapping destination and address registers on LDRD instructions
 290 that may trigger Cortex-M3 errata.
 291
 292 mfix-cmse-cve-2021-35465
 293 Target Var(fix_vlldm) Init(2)
 294 Mitigate issues with VLLDM on some M-profile devices (CVE-2021-35465).
 295
 296 mfix-cortex-a57-aes-1742098
 297 Target Var(fix_aes_erratum_1742098) Init(2) Save
 298 Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72
 299 (Arm erratum #1742098).
 300
 301 mfix-cortex-a72-aes-1655431
 302 Target Alias(mfix-cortex-a57-aes-1742098)
 303 Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72
 304 (Arm erratum #1655431).
 305
 306 munaligned-access
 307 Target Var(unaligned_access) Init(2) Save
 308 Enable unaligned word and halfword accesses to packed data.
 309
 310 mneon-for-64bits
 311 Target WarnRemoved
 312 This option is deprecated and has no effect.
 313
 314 mslow-flash-data
 315 Target Var(target_slow_flash_data) Init(0)
 316 Assume loading data from flash is slower than fetching instructions.
 317
 318 masm-syntax-unified
 319 Target Var(inline_asm_unified) Init(0) Save
 320 Assume unified syntax for inline assembly code.
 321
 322 mpure-code
 323 Target Var(target_pure_code) Init(0)
 324 Do not allow constant data to be placed in code sections.
 325
 326 mbe8
 327 Target RejectNegative Negative(mbe32) Mask(BE8)
 328 When linking for big-endian targets, generate a BE8 format image.
 329
 330 mbe32
 331 Target RejectNegative Negative(mbe8) InverseMask(BE8)
 332 When linking for big-endian targets, generate a legacy BE32 format image.
 333
 334 mbranch-cost=
 335 Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
 336 Cost to assume for a branch insn.
 337
 338 mbranch-protection=
 339 Target RejectNegative Joined Var(arm_branch_protection_string) Save
 340 Use branch-protection features.
 341
 342 mgeneral-regs-only
 343 Target RejectNegative Mask(GENERAL_REGS_ONLY) Save
 344 Generate code which uses the core registers only (r0-r14).
 345
 346 mfdpic
 347 Target Mask(FDPIC)
 348 Enable Function Descriptor PIC mode.
 349
 350 mstack-protector-guard=
 351 Target RejectNegative Joined Enum(stack_protector_guard) Var(arm_stack_protector_guard) Init(SSP_GLOBAL)
 352 Use given stack-protector guard.
 353
 354 Enum
 355 Name(stack_protector_guard) Type(enum stack_protector_guard)
 356 Valid arguments to -mstack-protector-guard=:
 357
 358 EnumValue
 359 Enum(stack_protector_guard) String(tls) Value(SSP_TLSREG)
 360
 361 EnumValue
 362 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
 363
 364 mstack-protector-guard-offset=
 365 Target Joined RejectNegative String Var(arm_stack_protector_guard_offset_str)
 366 Use an immediate to offset from the TLS register. This option is for use with
 367 fstack-protector-guard=tls and not for use in user-land code.
 368
 369 TargetVariable
 370 long arm_stack_protector_guard_offset = 0