gcc/config/arm/thumb.h

   1 /* Definitions of target machine for GNU compiler, for ARM/Thumb.
   2    Copyright (C) 19996, 1997, 1998 Free Software Foundation, Inc.
   3    The basis of this contribution was generated by
   4                 Richard Earnshaw, Advanced RISC Machines Ltd
   5
   6 This file is part of GNU CC.
   7
   8 GNU CC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 2, or (at your option)
  11 any later version.
  12
  13 GNU CC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GNU CC; see the file COPYING.  If not, write to
  20 the Free Software Foundation, 59 Temple Place - Suite 330,
  21 Boston, MA 02111-1307, USA.  */
  22
  23 /* ??? The files thumb.{c,h,md} are all seriously lacking comments.  */
  24
  25 /* ??? The files thumb.{c,h,md} need to be reviewed by an experienced
  26    gcc hacker in their entirety.  */
  27
  28 /* ??? The files thumb.{c,h,md} and tcoff.h are all separate from the arm
  29    files, which will lead to many maintenance problems.  These files are
  30    likely missing all bug fixes made to the arm port since they diverged.  */
  31
  32 /* ??? Many patterns in the md file accept operands that will require a
  33    reload.  These should be eliminated if possible by tightening the
  34    predicates and/or constraints.  This will give faster/smaller code.  */
  35
  36 /* ??? There is no pattern for the TST instuction.  Check for other unsupported
  37    instructions.  */
  38
  39 /* Run Time Target Specifications */
  40 #ifndef CPP_PREDEFINES
  41 #define CPP_PREDEFINES "-Dthumb -D__thumb -Acpu(arm) -Amachine(arm)"
  42 #endif
  43
  44 #ifndef CPP_SPEC
  45 #define CPP_SPEC "\
  46 %{mbig-endian:-D__ARMEB__ -D__THUMBEB__} \
  47 %{mbe:-D__ARMEB__ -D__THUMBEB__} \
  48 %{!mbe: %{!mbig-endian:-D__ARMEL__ -D__THUMBEL__}} \
  49 "
  50 #endif
  51
  52 #define ASM_SPEC "-marm7tdmi %{mthumb-interwork:-mthumb-interwork} %{mbig-endian:-EB}"
  53 #define LINK_SPEC "%{mbig-endian:-EB} -X"
  54
  55 #define TARGET_VERSION  fputs (" (ARM/THUMB:generic)", stderr);
  56
  57 /* Nonzero if we should compile with BYTES_BIG_ENDIAN set to 1.  */
  58 #define THUMB_FLAG_BIG_END              (0x0001)
  59 #define THUMB_FLAG_BACKTRACE            (0x0002)
  60 #define THUMB_FLAG_LEAF_BACKTRACE       (0x0004)
  61 #define ARM_FLAG_THUMB                  (0x1000)        /* same as in arm.h */
  62
  63 /* Run-time compilation parameters selecting different hardware/software subsets.  */
  64 extern int target_flags;
  65 #define TARGET_DEFAULT          0 /* ARM_FLAG_THUMB */
  66 #define TARGET_BIG_END          (target_flags & THUMB_FLAG_BIG_END)
  67 #define TARGET_THUMB_INTERWORK  (target_flags & ARM_FLAG_THUMB)
  68 #define TARGET_BACKTRACE        (leaf_function_p()                              \
  69                                  ? (target_flags & THUMB_FLAG_LEAF_BACKTRACE)   \
  70                                  : (target_flags & THUMB_FLAG_BACKTRACE))
  71
  72 #define TARGET_SWITCHES                                 \
  73 {                                                       \
  74   {"big-endian",                THUMB_FLAG_BIG_END},    \
  75   {"little-endian",            -THUMB_FLAG_BIG_END},    \
  76   {"thumb-interwork",           ARM_FLAG_THUMB},        \
  77   {"no-thumb-interwork",       -ARM_FLAG_THUMB},        \
  78   {"tpcs-frame",                THUMB_FLAG_BACKTRACE},  \
  79   {"no-tpcs-frame",            -THUMB_FLAG_BACKTRACE},  \
  80   {"tpcs-leaf-frame",           THUMB_FLAG_LEAF_BACKTRACE},     \
  81   {"no-tpcs-leaf-frame",       -THUMB_FLAG_LEAF_BACKTRACE},     \
  82   {"",                          TARGET_DEFAULT}         \
  83 }
  84
  85 #define TARGET_OPTIONS                                  \
  86 {                                                       \
  87   { "structure-size-boundary=", & structure_size_string }, \
  88 }
  89
  90 #define REGISTER_PREFIX ""
  91
  92 #define CAN_DEBUG_WITHOUT_FP 1
  93 \f
  94 #define ASM_APP_ON  ""
  95 #define ASM_APP_OFF "\t.code\t16\n"
  96
  97 /* Output a gap.  In fact we fill it with nulls.  */
  98 #define ASM_OUTPUT_SKIP(STREAM, NBYTES)  \
  99   fprintf ((STREAM), "\t.space\t%u\n", (NBYTES))
 100
 101 /* This is how to output an assembler line
 102    that says to advance the location counter
 103    to a multiple of 2**LOG bytes.  */
 104 #define ASM_OUTPUT_ALIGN(STREAM,LOG)                                    \
 105 {                                                                       \
 106   fprintf (STREAM, "\t.align\t%d\n", (LOG));                            \
 107 }
 108
 109 /* Output a common block */
 110 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)                  \
 111   (fprintf ((STREAM), "\t.comm\t"),                                     \
 112    assemble_name ((STREAM), (NAME)),                                    \
 113    fprintf((STREAM), ", %d\t%s %d\n", (ROUNDED), (ASM_COMMENT_START), (SIZE)))
 114
 115 #define ASM_GENERATE_INTERNAL_LABEL(STRING,PREFIX,NUM)        \
 116   sprintf ((STRING), "*%s%s%d", (LOCAL_LABEL_PREFIX), (PREFIX), (NUM))
 117
 118 /* This is how to output an internal numbered label where
 119    PREFIX is the class of label and NUM is the number within the class.  */
 120 #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM)                    \
 121   fprintf ((STREAM), "%s%s%d:\n", (LOCAL_LABEL_PREFIX), (PREFIX), (NUM))
 122
 123 /* This is how to output a label which precedes a jumptable.  Since
 124    instructions are 2 bytes, we need explicit alignment here.  */
 125
 126 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,JUMPTABLE)                \
 127   do {                                                                  \
 128     ASM_OUTPUT_ALIGN (FILE, 2);                                         \
 129     ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM);                      \
 130   } while (0)
 131
 132 /* This says how to define a local common symbol (ie, not visible to
 133    linker).  */
 134 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)                   \
 135   (fprintf((STREAM),"\n\t.lcomm\t"),                                    \
 136    assemble_name((STREAM),(NAME)),                                      \
 137    fprintf((STREAM),",%u\n",(SIZE)))
 138
 139 /* Output a reference to a label.  */
 140 #define ASM_OUTPUT_LABELREF(STREAM,NAME)  \
 141   fprintf ((STREAM), "%s%s", USER_LABEL_PREFIX, (NAME))
 142
 143 /* This is how to output an assembler line for a numeric constant byte.  */
 144 #define ASM_OUTPUT_BYTE(STREAM,VALUE)                                   \
 145   fprintf ((STREAM), "\t.byte\t0x%x\n", (VALUE))
 146
 147 #define ASM_OUTPUT_INT(STREAM,VALUE)                                    \
 148 {                                                                       \
 149   fprintf (STREAM, "\t.word\t");                                        \
 150   output_addr_const (STREAM, (VALUE));                                  \
 151   fprintf (STREAM, "\n");                                               \
 152 }
 153
 154 #define ASM_OUTPUT_SHORT(STREAM,VALUE)                                  \
 155 {                                                                       \
 156   fprintf (STREAM, "\t.short\t");                                       \
 157   output_addr_const (STREAM, (VALUE));                                  \
 158   fprintf (STREAM, "\n");                                               \
 159 }
 160
 161 #define ASM_OUTPUT_CHAR(STREAM,VALUE)                                   \
 162 {                                                                       \
 163   fprintf (STREAM, "\t.byte\t");                                        \
 164   output_addr_const (STREAM, (VALUE));                                  \
 165   fprintf (STREAM, "\n");                                               \
 166 }
 167
 168 #define ASM_OUTPUT_LONG_DOUBLE(STREAM,VALUE)                            \
 169 do { char dstr[30];                                                     \
 170      long l[3];                                                         \
 171      REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l);                       \
 172      REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr);                      \
 173      fprintf (STREAM, "\t.long 0x%lx,0x%lx,0x%lx\t%s long double %s\n", \
 174               l[0], l[1], l[2], ASM_COMMENT_START, dstr);               \
 175    } while (0)
 176
 177 #define ASM_OUTPUT_DOUBLE(STREAM, VALUE)                                \
 178 do { char dstr[30];                                                     \
 179      long l[2];                                                         \
 180      REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l);                            \
 181      REAL_VALUE_TO_DECIMAL (VALUE, "%.14g", dstr);                      \
 182      fprintf (STREAM, "\t.long 0x%lx, 0x%lx\t%s double %s\n", l[0],     \
 183               l[1], ASM_COMMENT_START, dstr);                           \
 184    } while (0)
 185
 186 #define ASM_OUTPUT_FLOAT(STREAM, VALUE)                                 \
 187 do { char dstr[30];                                                     \
 188      long l;                                                            \
 189      REAL_VALUE_TO_TARGET_SINGLE (VALUE, l);                            \
 190      REAL_VALUE_TO_DECIMAL (VALUE, "%.7g", dstr);                       \
 191      fprintf (STREAM, "\t.word 0x%lx\t%s float %s\n", l,                \
 192               ASM_COMMENT_START, dstr);                                 \
 193    } while (0);
 194
 195 /* Define results of standard character escape sequences.  */
 196 #define TARGET_BELL     007
 197 #define TARGET_BS       010
 198 #define TARGET_TAB      011
 199 #define TARGET_NEWLINE  012
 200 #define TARGET_VT       013
 201 #define TARGET_FF       014
 202 #define TARGET_CR       015
 203
 204 /* This is how to output a string.  */
 205 #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN)                           \
 206 do {                                                                    \
 207   register int i, c, len = (LEN), cur_pos = 17;                         \
 208   register unsigned char *string = (unsigned char *)(STRING);           \
 209   fprintf ((STREAM), "\t.ascii\t\"");                                   \
 210   for (i = 0; i < len; i++)                                             \
 211     {                                                                   \
 212       register int c = string[i];                                       \
 213                                                                         \
 214       switch (c)                                                        \
 215         {                                                               \
 216         case '\"':                                                      \
 217         case '\\':                                                      \
 218           putc ('\\', (STREAM));                                        \
 219           putc (c, (STREAM));                                           \
 220           cur_pos += 2;                                                 \
 221           break;                                                        \
 222                                                                         \
 223         case TARGET_NEWLINE:                                            \
 224           fputs ("\\n", (STREAM));                                      \
 225           if (i+1 < len                                                 \
 226               && (((c = string[i+1]) >= '\040' && c <= '~')             \
 227                   || c == TARGET_TAB))                                  \
 228             cur_pos = 32767;            /* break right here */          \
 229           else                                                          \
 230             cur_pos += 2;                                               \
 231           break;                                                        \
 232                                                                         \
 233         case TARGET_TAB:                                                \
 234           fputs ("\\t", (STREAM));                                      \
 235           cur_pos += 2;                                                 \
 236           break;                                                        \
 237                                                                         \
 238         case TARGET_FF:                                                 \
 239           fputs ("\\f", (STREAM));                                      \
 240           cur_pos += 2;                                                 \
 241           break;                                                        \
 242                                                                         \
 243         case TARGET_BS:                                                 \
 244           fputs ("\\b", (STREAM));                                      \
 245           cur_pos += 2;                                                 \
 246           break;                                                        \
 247                                                                         \
 248         case TARGET_CR:                                                 \
 249           fputs ("\\r", (STREAM));                                      \
 250           cur_pos += 2;                                                 \
 251           break;                                                        \
 252                                                                         \
 253         default:                                                        \
 254           if (c >= ' ' && c < 0177)                                     \
 255             {                                                           \
 256               putc (c, (STREAM));                                       \
 257               cur_pos++;                                                \
 258             }                                                           \
 259           else                                                          \
 260             {                                                           \
 261               fprintf ((STREAM), "\\%03o", c);                          \
 262               cur_pos += 4;                                             \
 263             }                                                           \
 264         }                                                               \
 265                                                                         \
 266       if (cur_pos > 72 && i+1 < len)                                    \
 267         {                                                               \
 268           cur_pos = 17;                                                 \
 269           fprintf ((STREAM), "\"\n\t.ascii\t\"");                       \
 270         }                                                               \
 271     }                                                                   \
 272   fprintf ((STREAM), "\"\n");                                           \
 273 } while (0)
 274
 275 /* Output and Generation of Labels */
 276 #define ASM_OUTPUT_LABEL(STREAM,NAME) \
 277   (assemble_name ((STREAM), (NAME)),  \
 278    fprintf ((STREAM), ":\n"))
 279
 280 #define ASM_GLOBALIZE_LABEL(STREAM,NAME)      \
 281  (fprintf ((STREAM), "\t.globl\t"),           \
 282   assemble_name ((STREAM), (NAME)),           \
 283   fputc ('\n', (STREAM)))
 284
 285 /* Construct a private name.  */
 286 #define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER)  \
 287   ((OUTVAR) = (char *) alloca (strlen (NAME) + 10),  \
 288    sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER)))
 289
 290 /* Switch to the text or data segment.  */
 291 #define TEXT_SECTION_ASM_OP  ".text"
 292 #define DATA_SECTION_ASM_OP  ".data"
 293 #define BSS_SECTION_ASM_OP   ".bss"
 294
 295 /* The assembler's names for the registers.  */
 296 #ifndef REGISTER_NAMES
 297 #define REGISTER_NAMES  \
 298 {                                                  \
 299   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",  \
 300   "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", "ap"   \
 301 }
 302 #endif
 303
 304 #ifndef ADDITIONAL_REGISTER_NAMES
 305 #define ADDITIONAL_REGISTER_NAMES               \
 306 {                                               \
 307   {"a1", 0},                                    \
 308   {"a2", 1},                                    \
 309   {"a3", 2},                                    \
 310   {"a4", 3},                                    \
 311   {"v1", 4},                                    \
 312   {"v2", 5},                                    \
 313   {"v3", 6},                                    \
 314   {"v4", 7},                                    \
 315   {"v5", 8},                                    \
 316   {"v6", 9},                                    \
 317   {"sb", 9},                                    \
 318   {"v7", 10},                                   \
 319   {"r10", 10},  /* sl */                        \
 320   {"r11", 11},  /* fp */                        \
 321   {"r12", 12},  /* ip */                        \
 322   {"r13", 13},  /* sp */                        \
 323   {"r14", 14},  /* lr */                        \
 324   {"r15", 15}   /* pc */                        \
 325 }
 326 #endif
 327
 328 /* The assembler's parentheses characters.  */
 329 #define ASM_OPEN_PAREN "("
 330 #define ASM_CLOSE_PAREN ")"
 331
 332 #ifndef ASM_COMMENT_START
 333 #define ASM_COMMENT_START "@"
 334 #endif
 335
 336 /* Output an element of a dispatch table.  */
 337 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE)  \
 338    fprintf (STREAM, "\t.word\t%sL%d\n", (LOCAL_LABEL_PREFIX), (VALUE))
 339
 340 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL)  \
 341    fprintf (STREAM, "\tb\t%sL%d\n", (LOCAL_LABEL_PREFIX), (VALUE))
 342 \f
 343 /* Storage Layout */
 344
 345 /* Define this is most significant bit is lowest numbered in
 346    instructions that operate on numbered bit-fields.  */
 347 #define BITS_BIG_ENDIAN 0
 348
 349 /* Define this if most significant byte of a word is the lowest
 350    numbered.  */
 351 #define BYTES_BIG_ENDIAN (TARGET_BIG_END != 0)
 352
 353 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
 354
 355 /* LIBGCC2_WORDS_BIG_ENDIAN has to be a constant, so we define this based
 356    on processor pre-defineds when compiling libgcc2.c.  */
 357 #if defined(__THUMBEB__) && !defined(__THUMBEL__)
 358 #define LIBGCC2_WORDS_BIG_ENDIAN 1
 359 #else
 360 #define LIBGCC2_WORDS_BIG_ENDIAN 0
 361 #endif
 362
 363 #define FLOAT_WORDS_BIG_ENDIAN 1
 364
 365 #define BITS_PER_UNIT 8
 366 #define BITS_PER_WORD 32
 367
 368 #define UNITS_PER_WORD 4
 369
 370 #define POINTER_SIZE 32
 371
 372 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)       \
 373 {                                               \
 374   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 375       && GET_MODE_SIZE (MODE) < 4)              \
 376     {                                           \
 377       (UNSIGNEDP) = 1;                          \
 378       (MODE) = SImode;                          \
 379     }                                           \
 380 }
 381
 382 #define PARM_BOUNDARY 32
 383 #define STACK_BOUNDARY 32
 384
 385 #define FUNCTION_BOUNDARY 32
 386 #define BIGGEST_ALIGNMENT 32
 387
 388 /* Make strings word-aligned so strcpy from constants will be faster.  */
 389 #define CONSTANT_ALIGNMENT(EXP, ALIGN)  \
 390   (TREE_CODE (EXP) == STRING_CST        \
 391    && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
 392
 393 #define EMPTY_FIELD_BOUNDARY 32
 394
 395 #define STRUCTURE_SIZE_BOUNDARY 32
 396
 397 /* Used when parsing command line option -mstructure_size_boundary.  */
 398 extern char * structure_size_string;
 399
 400 #define STRICT_ALIGNMENT 1
 401
 402 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
 403
 404 \f
 405 /* Layout of Source Language Data Types  */
 406
 407 #define DEFAULT_SIGNED_CHAR 0
 408
 409 #define TARGET_BELL     007
 410 #define TARGET_BS       010
 411 #define TARGET_TAB      011
 412 #define TARGET_NEWLINE  012
 413 #define TARGET_VT       013
 414 #define TARGET_FF       014
 415 #define TARGET_CR       015
 416
 417 \f
 418 /* Register Usage */
 419
 420 /* Note there are 16 hard registers on the Thumb.  We invent a 17th register
 421    which is assigned to ARG_POINTER_REGNUM, but this is later removed by
 422    elimination passes in the compiler.  */
 423 #define FIRST_PSEUDO_REGISTER 17
 424
 425 /* ??? This is questionable.  */
 426 #define FIXED_REGISTERS \
 427 {                       \
 428   0,0,0,0,              \
 429   0,0,0,0,              \
 430   0,0,0,1,              \
 431   0,1,1,1,1             \
 432 }
 433
 434 /* ??? This is questionable.  */
 435 #define CALL_USED_REGISTERS     \
 436 {                               \
 437   1,1,1,1,                      \
 438   0,0,0,0,                      \
 439   0,0,0,1,                      \
 440   1,1,1,1,1                     \
 441 }
 442
 443 #define HARD_REGNO_NREGS(REGNO,MODE)            \
 444   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1)  \
 445    / UNITS_PER_WORD)
 446
 447 /* ??? Probably should only allow DImode/DFmode in even numbered registers.  */
 448 #define HARD_REGNO_MODE_OK(REGNO,MODE) ((GET_MODE_SIZE (MODE) > UNITS_PER_WORD) ? (REGNO < 7) : 1)
 449
 450 #define MODES_TIEABLE_P(MODE1,MODE2) 1
 451
 452 enum reg_class
 453 {
 454   NO_REGS,
 455   LO_REGS,
 456   STACK_REG,
 457   BASE_REGS,
 458   HI_REGS,
 459   ALL_REGS,
 460   LIM_REG_CLASSES
 461 };
 462
 463 #define GENERAL_REGS ALL_REGS
 464
 465 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 466
 467 #define REG_CLASS_NAMES \
 468 {                       \
 469   "NO_REGS",            \
 470   "LO_REGS",            \
 471   "STACK_REG",          \
 472   "BASE_REGS",          \
 473   "HI_REGS",            \
 474   "ALL_REGS"            \
 475 }
 476
 477 #define REG_CLASS_CONTENTS      \
 478 {                               \
 479   0x00000,                      \
 480   0x000ff,                      \
 481   0x02000,                      \
 482   0x020ff,                      \
 483   0x0ff00,                      \
 484   0x1ffff,                      \
 485 }
 486
 487 #define REGNO_REG_CLASS(REGNO)                  \
 488  ((REGNO) == STACK_POINTER_REGNUM ? STACK_REG   \
 489   : (REGNO) < 8 ? LO_REGS                       \
 490   : HI_REGS)
 491
 492 #define BASE_REG_CLASS BASE_REGS
 493
 494 #define INDEX_REG_CLASS LO_REGS
 495
 496 /* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
 497    registers explicitly used in the rtl to be used as spill registers
 498    but prevents the compiler from extending the lifetime of these
 499    registers. */
 500
 501 #define SMALL_REGISTER_CLASSES 1
 502
 503 #define REG_CLASS_FROM_LETTER(C) \
 504   ((C) == 'l' ? LO_REGS         \
 505    : (C) == 'h' ? HI_REGS       \
 506    : (C) == 'b' ? BASE_REGS     \
 507    : (C) == 'k' ? STACK_REG     \
 508    : NO_REGS)
 509
 510 #define REGNO_OK_FOR_BASE_P(REGNO)                              \
 511   ((REGNO) < 8                                                  \
 512    || (REGNO) == STACK_POINTER_REGNUM                           \
 513    || (unsigned) reg_renumber[REGNO] < 8                        \
 514    || (unsigned) reg_renumber[REGNO] == STACK_POINTER_REGNUM)
 515
 516 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE)                   \
 517   ((REGNO) < 8                                                  \
 518    || (unsigned) reg_renumber[REGNO] < 8                        \
 519    || (GET_MODE_SIZE (MODE) >= 4                                \
 520        && ((REGNO) == STACK_POINTER_REGNUM                      \
 521            || (unsigned) reg_renumber[REGNO] == STACK_POINTER_REGNUM)))
 522
 523 #define REGNO_OK_FOR_INDEX_P(REGNO)             \
 524   ((REGNO) < 8                                  \
 525    || (unsigned) reg_renumber[REGNO] < 8)
 526
 527 /* ??? This looks suspiciously wrong.  */
 528 /* We need to leave BASE_REGS reloads alone, in order to avoid caller_save
 529    lossage.  Caller_saves requests a BASE_REGS reload (caller_save_spill_class)
 530    and then later we verify that one was allocated.  If PREFERRED_RELOAD_CLASS
 531    says to allocate a LO_REGS spill instead, then this mismatch gives an
 532    abort.  Alternatively, this could be fixed by modifying BASE_REG_CLASS
 533    to be LO_REGS instead of BASE_REGS.  It is not clear what affect this
 534    change would have.  */
 535 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
 536   ((CLASS) == BASE_REGS ? (CLASS)       \
 537    : LO_REGS)
 538 /*
 539   ((CONSTANT_P ((X)) && GET_CODE ((X)) != CONST_INT             \
 540     && ! CONSTANT_POOL_ADDRESS_P((X))) ? NO_REGS                \
 541    : (GET_CODE ((X)) == CONST_INT                               \
 542       && (unsigned HOST_WIDE_INT) INTVAL ((X)) > 255) ? NO_REGS \
 543    : LO_REGS) */
 544
 545 /* Must leave BASE_REGS reloads alone, see comment above.  */
 546 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,X)                            \
 547    ((CLASS) != LO_REGS && (CLASS) != BASE_REGS                          \
 548    ? ((true_regnum (X) == -1 ? LO_REGS                                  \
 549        : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS   \
 550        : NO_REGS))                                                      \
 551    : NO_REGS)
 552
 553 #define CLASS_MAX_NREGS(CLASS,MODE) HARD_REGNO_NREGS(0,(MODE))
 554
 555 int thumb_shiftable_const ();
 556
 557 #define CONST_OK_FOR_LETTER_P(VAL,C)                            \
 558   ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VAL) < 256            \
 559    : (C) == 'J' ? (VAL) > -256 && (VAL) <= 0                    \
 560    : (C) == 'K' ? thumb_shiftable_const (VAL)                   \
 561    : (C) == 'L' ? (VAL) > -8 && (VAL) < 8                       \
 562    : (C) == 'M' ? ((unsigned HOST_WIDE_INT) (VAL) < 1024        \
 563                    && ((VAL) & 3) == 0)                         \
 564    : (C) == 'N' ? ((unsigned HOST_WIDE_INT) (VAL) < 32)         \
 565    : (C) == 'O' ? ((VAL) >= -508 && (VAL) <= 508)               \
 566    : 0)
 567
 568 #define CONST_DOUBLE_OK_FOR_LETTER_P(VAL,C) 0
 569
 570 #define EXTRA_CONSTRAINT(X,C)                                           \
 571   ((C) == 'Q' ? (GET_CODE (X) == MEM                                    \
 572                  && GET_CODE (XEXP (X, 0)) == LABEL_REF) : 0)
 573 \f
 574 /* Stack Layout and Calling Conventions */
 575
 576 #define STACK_GROWS_DOWNWARD 1
 577
 578 /* #define FRAME_GROWS_DOWNWARD 1 */
 579
 580 /* #define ARGS_GROW_DOWNWARD 1 */
 581
 582 #define STARTING_FRAME_OFFSET 0
 583
 584 #define FIRST_PARM_OFFSET(FNDECL) 0
 585
 586 /* Registers that address the stack frame */
 587
 588 #define STACK_POINTER_REGNUM  13        /* Defined by the TPCS.  */
 589
 590 #define FRAME_POINTER_REGNUM  7         /* TPCS defines this as 11 but it does not really mean it.  */
 591
 592 #define ARG_POINTER_REGNUM    16        /* A fake hard register that is eliminated later on.  */
 593
 594 #define STATIC_CHAIN_REGNUM 9
 595
 596 #define FRAME_POINTER_REQUIRED 0
 597
 598 #define ELIMINABLE_REGS                         \
 599 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},    \
 600  {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},    \
 601  {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
 602
 603 /* On the Thumb we always want to perform the eliminations as we
 604    actually only have one real register pointing to the stashed
 605    variables: the stack pointer, and we never use the frame pointer.  */
 606 #define CAN_ELIMINATE(FROM,TO)  1
 607
 608 /* Note:  This macro must match the code in thumb_function_prologue() in thumb.c.  */
 609 #define INITIAL_ELIMINATION_OFFSET(FROM,TO,OFFSET)              \
 610 {                                                               \
 611   (OFFSET) = 0;                                                 \
 612   if ((FROM) == ARG_POINTER_REGNUM)                             \
 613     {                                                           \
 614       int count_regs = 0;                                       \
 615       int regno;                                                \
 616       (OFFSET) += get_frame_size ();                            \
 617       for (regno = 8; regno < 13; regno++)                      \
 618         if (regs_ever_live[regno] && ! call_used_regs[regno])   \
 619           count_regs++;                                         \
 620       if (count_regs)                                           \
 621         (OFFSET) += 4 * count_regs;                             \
 622       count_regs = 0;                                           \
 623       for (regno = 0; regno < 8; regno++)                       \
 624         if (regs_ever_live[regno] && ! call_used_regs[regno])   \
 625           count_regs++;                                         \
 626       if (count_regs || ! leaf_function_p () || far_jump_used_p())      \
 627         (OFFSET) += 4 * (count_regs + 1);                       \
 628       if (TARGET_BACKTRACE) {                                   \
 629         if ((count_regs & 0xFF) == 0 && (regs_ever_live[3] != 0))       \
 630           (OFFSET) += 20;                                       \
 631         else                                                    \
 632           (OFFSET) += 16; }                                     \
 633     }                                                           \
 634   if ((TO) == STACK_POINTER_REGNUM)                             \
 635     (OFFSET) += current_function_outgoing_args_size;            \
 636 }
 637
 638 /* Passing Arguments on the stack */
 639
 640 #define PROMOTE_PROTOTYPES 1
 641
 642 #define ACCUMULATE_OUTGOING_ARGS 1
 643
 644 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
 645
 646 #define FUNCTION_ARG(CUM,MODE,TYPE,NAMED)                               \
 647  ((NAMED) ? ((CUM) >= 16 ? 0 : gen_rtx (REG, (MODE), (CUM) / 4))        \
 648   : 0)
 649
 650 #define FUNCTION_ARG_PARTIAL_NREGS(CUM,MODE,TYPE,NAMED)                 \
 651  (((CUM) < 16 && (CUM) + (((MODE) == BLKmode)                           \
 652                           ? int_size_in_bytes (TYPE)                    \
 653                           : HARD_REGNO_NREGS (0, (MODE)) * 4) > 16)     \
 654   ? 4 - (CUM) / 4 : 0)
 655
 656 #define CUMULATIVE_ARGS int
 657
 658 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT)            \
 659  ((CUM) = ((FNTYPE) && aggregate_value_p (TREE_TYPE (FNTYPE))) ? 4 : 0)
 660
 661 #define FUNCTION_ARG_ADVANCE(CUM,MODE,TYPE,NAMED)       \
 662  (CUM) += ((((MODE) == BLKmode)                         \
 663             ? int_size_in_bytes (TYPE)                  \
 664             : GET_MODE_SIZE (MODE)) + 3) & ~3
 665
 666 #define FUNCTION_ARG_REGNO_P(REGNO)     \
 667   ((REGNO) >=0 && (REGNO) <= 3)
 668
 669 #define FUNCTION_VALUE(VALTYPE,FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
 670
 671 #define LIBCALL_VALUE(MODE) gen_rtx (REG, (MODE), 0)
 672
 673 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == 0)
 674
 675      /* How large values are returned */
 676 /* A C expression which can inhibit the returning of certain function values
 677    in registers, based on the type of value. */
 678 #define RETURN_IN_MEMORY(TYPE) thumb_return_in_memory (TYPE)
 679
 680 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
 681    values must be in memory.  On the ARM, they need only do so if larger
 682    than a word, or if they contain elements offset from zero in the struct. */
 683 #define DEFAULT_PCC_STRUCT_RETURN 0
 684
 685
 686 #define STRUCT_VALUE_REGNUM 0
 687
 688 #define FUNCTION_PROLOGUE(FILE,SIZE) thumb_function_prologue((FILE),(SIZE))
 689
 690 #define FUNCTION_EPILOGUE(FILE,SIZE) thumb_function_epilogue((FILE),(SIZE))
 691
 692 /* Generating code for profiling */
 693 #define FUNCTION_PROFILER(STREAM,LABELNO)               \
 694 {                                                       \
 695   fprintf ((STREAM), "\tmov\\tip, lr\n");               \
 696   fprintf ((STREAM), "\tbl\tmcount\n");                 \
 697   fprintf ((STREAM), "\t.word\tLP%d\n", (LABELNO));     \
 698 }
 699
 700 /* Implementing the Varargs Macros */
 701
 702 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL)       \
 703 {                                                                       \
 704   extern int current_function_anonymous_args;                           \
 705   current_function_anonymous_args = 1;                                  \
 706   if ((CUM) < 16)                                                       \
 707     (PRETEND_SIZE) = 16 - (CUM);                                        \
 708 }
 709
 710 /* Trampolines for nested functions */
 711
 712 /* Output assembler code for a block containing the constant parts of
 713    a trampoline, leaving space for the variable parts.
 714
 715    On the Thumb we always switch into ARM mode to execute the trampoline.
 716    Why - because it is easier.  This code will always be branched to via
 717    a BX instruction and since the compiler magically generates the address
 718    of the function the linker has no opportunity to ensure that the
 719    bottom bit is set.  Thus the processor will be in ARM mode when it
 720    reaches this code.  So we duplicate the ARM trampoline code and add
 721    a switch into Thumb mode as well.
 722
 723    On the ARM, (if r8 is the static chain regnum, and remembering that
 724    referencing pc adds an offset of 8) the trampoline looks like:
 725            ldr          r8, [pc, #0]
 726            ldr          pc, [pc]
 727            .word        static chain value
 728            .word        function's address
 729    ??? FIXME: When the trampoline returns, r8 will be clobbered.  */
 730 #define TRAMPOLINE_TEMPLATE(FILE)                               \
 731 {                                                               \
 732   fprintf ((FILE), "\t.code 32\n");                             \
 733   fprintf ((FILE), ".Ltrampoline_start:\n");                    \
 734   fprintf ((FILE), "\tldr\t%s, [%spc, #8]\n",                   \
 735            reg_names[STATIC_CHAIN_REGNUM], REGISTER_PREFIX);    \
 736   fprintf ((FILE), "\tldr\t%sip, [%spc, #8]\n",                 \
 737            REGISTER_PREFIX, REGISTER_PREFIX);                   \
 738   fprintf ((FILE), "\torr\t%sip, %sip, #1\n",                   \
 739            REGISTER_PREFIX, REGISTER_PREFIX);                   \
 740   fprintf ((FILE), "\tbx\t%sip\n", REGISTER_PREFIX);            \
 741   fprintf ((FILE), "\t.word\t0\n");                             \
 742   fprintf ((FILE), "\t.word\t0\n");                             \
 743   fprintf ((FILE), "\t.code 16\n");                             \
 744 }
 745
 746 /* Length in units of the trampoline for entering a nested function.  */
 747 #define TRAMPOLINE_SIZE  24
 748
 749 /* Alignment required for a trampoline in units.  */
 750 #define TRAMPOLINE_ALIGN  4
 751
 752 #define INITIALIZE_TRAMPOLINE(ADDR,FNADDR,CHAIN)                        \
 753 {                                                                       \
 754   emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((ADDR), 16)),    \
 755                   (CHAIN));                                             \
 756   emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((ADDR), 20)),    \
 757                   (FNADDR));                                            \
 758 }
 759
 760 \f
 761 /* Implicit Calls to Library Routines */
 762
 763 #define TARGET_MEM_FUNCTIONS 1
 764
 765 #define OVERRIDE_OPTIONS  thumb_override_options ()
 766
 767 \f
 768 /* Addressing Modes */
 769
 770 #define HAVE_POST_INCREMENT 1
 771
 772 #define CONSTANT_ADDRESS_P(X)                                   \
 773  (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X))
 774
 775 #define MAX_REGS_PER_ADDRESS 2
 776
 777 #ifdef REG_OK_STRICT
 778
 779 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
 780 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
 781
 782 #define REG_MODE_OK_FOR_BASE_P(X,MODE)                  \
 783   REGNO_MODE_OK_FOR_BASE_P (REGNO (X), MODE)
 784
 785 #else /* REG_OK_STRICT */
 786
 787 #define REG_OK_FOR_BASE_P(X)                            \
 788  (REGNO (X) < 8 || REGNO (X) == STACK_POINTER_REGNUM    \
 789   || (X) == arg_pointer_rtx                             \
 790   || REGNO (X) >= FIRST_PSEUDO_REGISTER)
 791
 792 #define REG_MODE_OK_FOR_BASE_P(X,MODE)                  \
 793  (REGNO (X) < 8                                         \
 794   || REGNO (X) >= FIRST_PSEUDO_REGISTER                 \
 795   || (GET_MODE_SIZE (MODE) >= 4                         \
 796       && (REGNO (X) == STACK_POINTER_REGNUM             \
 797           || (X) == arg_pointer_rtx)))
 798
 799 #define REG_OK_FOR_INDEX_P(X)                           \
 800  (REGNO (X) < 8                                         \
 801   || REGNO (X) >= FIRST_PSEUDO_REGISTER)
 802
 803 #endif /* REG_OK_STRICT */
 804
 805 /* In a REG+REG address, both must be INDEX registers.  */
 806 #define REG_OK_FOR_INDEXED_BASE_P(X) REG_OK_FOR_INDEX_P(X)
 807
 808 #define LEGITIMATE_OFFSET(MODE,VAL)                             \
 809 (GET_MODE_SIZE (MODE) == 1 ? ((unsigned HOST_WIDE_INT) (VAL) < 32)      \
 810  : GET_MODE_SIZE (MODE) == 2 ? ((unsigned HOST_WIDE_INT) (VAL) < 64     \
 811                                 && ((VAL) & 1) == 0)                    \
 812  : ((VAL) >= 0 && ((VAL) + GET_MODE_SIZE (MODE)) <= 128                 \
 813     && ((VAL) & 3) == 0))
 814
 815 /* The AP may be eliminated to either the SP or the FP, so we use the
 816    least common denominator, e.g. SImode, and offsets from 0 to 64.  */
 817
 818 /* ??? Verify whether the above is the right approach.  */
 819
 820 /* ??? Also, the FP may be eliminated to the SP, so perhaps that
 821    needs special handling also.  */
 822
 823 /* ??? Look at how the mips16 port solves this problem.  It probably uses
 824    better ways to solve some of these problems.  */
 825
 826 /* Although it is not incorrect, we don't accept QImode and HImode
 827    addresses based on the frame pointer or arg pointer until the reload pass starts.
 828    This is so that eliminating such addresses into stack based ones
 829    won't produce impossible code.  */
 830 #define GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN)                            \
 831 {                                                                       \
 832   /* ??? Not clear if this is right.  Experiment.  */                   \
 833   if (GET_MODE_SIZE (MODE) < 4                                          \
 834       && ! (reload_in_progress || reload_completed)                     \
 835       && (reg_mentioned_p (frame_pointer_rtx, X)                        \
 836           || reg_mentioned_p (arg_pointer_rtx, X)                       \
 837           || reg_mentioned_p (virtual_incoming_args_rtx, X)             \
 838           || reg_mentioned_p (virtual_outgoing_args_rtx, X)             \
 839           || reg_mentioned_p (virtual_stack_dynamic_rtx, X)             \
 840           || reg_mentioned_p (virtual_stack_vars_rtx, X)))              \
 841     ;                                                                   \
 842   /* Accept any base register.  SP only in SImode or larger.  */        \
 843   else if (GET_CODE (X) == REG && REG_MODE_OK_FOR_BASE_P(X, MODE))      \
 844     goto WIN;                                                           \
 845   /* This is PC relative data before MACHINE_DEPENDENT_REORG runs.  */  \
 846   else if (GET_MODE_SIZE (MODE) >= 4 && CONSTANT_P (X)                  \
 847            && CONSTANT_POOL_ADDRESS_P (X))                              \
 848     goto WIN;                                                           \
 849   /* This is PC relative data after MACHINE_DEPENDENT_REORG runs.  */   \
 850   else if (GET_MODE_SIZE (MODE) >= 4 && reload_completed                \
 851            && (GET_CODE (X) == LABEL_REF                                \
 852                || (GET_CODE (X) == CONST                                \
 853                    && GET_CODE (XEXP (X, 0)) == PLUS                    \
 854                    && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF     \
 855                    && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT)))  \
 856     goto WIN;                                                           \
 857   /* Post-inc indexing only supported for SImode and larger.  */        \
 858   else if (GET_CODE (X) == POST_INC && GET_MODE_SIZE (MODE) >= 4        \
 859            && GET_CODE (XEXP (X, 0)) == REG                             \
 860            && REG_OK_FOR_INDEX_P (XEXP (X, 0)))                         \
 861     goto WIN;                                                           \
 862   else if (GET_CODE (X) == PLUS)                                        \
 863     {                                                                   \
 864       /* REG+REG address can be any two index registers.  */            \
 865       /* ??? Normally checking the mode here is wrong, since it isn't   \
 866          impossible to use REG+REG with DFmode.  However, the movdf     \
 867          pattern requires offsettable addresses, and REG+REG is not     \
 868          offsettable, so it must be rejected somehow.  Trying to use    \
 869          'o' fails, because offsettable_address_p does a QImode check.  \
 870          QImode is not valid for stack addresses, and has a smaller     \
 871          range for non-stack bases, and this causes valid addresses     \
 872          to be rejected.  So we just eliminate REG+REG here by checking \
 873          the mode.  */                                                  \
 874       /* We also disallow FRAME+REG addressing since we know that FRAME \
 875          will be replaced with STACK, and SP relative addressing only   \
 876          permits SP+OFFSET.  */                                         \
 877       if (GET_MODE_SIZE (MODE) <= 4                                     \
 878           && GET_CODE (XEXP (X, 0)) == REG                              \
 879           && GET_CODE (XEXP (X, 1)) == REG                              \
 880           && REGNO (XEXP (X, 0)) != FRAME_POINTER_REGNUM                \
 881           && REG_OK_FOR_INDEX_P (XEXP (X, 0))                           \
 882           && REG_OK_FOR_INDEX_P (XEXP (X, 1)))                          \
 883         goto WIN;                                                       \
 884       /* REG+const has 5-7 bit offset for non-SP registers.  */         \
 885       else if (GET_CODE (XEXP (X, 0)) == REG                            \
 886                && (REG_OK_FOR_INDEX_P (XEXP (X, 0))                     \
 887                    || XEXP (X, 0) == arg_pointer_rtx)                   \
 888                && GET_CODE (XEXP (X, 1)) == CONST_INT                   \
 889                && LEGITIMATE_OFFSET (MODE, INTVAL (XEXP (X, 1))))       \
 890         goto WIN;                                                       \
 891       /* REG+const has 10 bit offset for SP, but only SImode and        \
 892          larger is supported.  */                                       \
 893       /* ??? Should probably check for DI/DFmode overflow here          \
 894          just like GO_IF_LEGITIMATE_OFFSET does.  */                    \
 895       else if (GET_CODE (XEXP (X, 0)) == REG                            \
 896                && REGNO (XEXP (X, 0)) == STACK_POINTER_REGNUM           \
 897                && GET_MODE_SIZE (MODE) >= 4                             \
 898                && GET_CODE (XEXP (X, 1)) == CONST_INT                   \
 899                && (unsigned HOST_WIDE_INT) INTVAL (XEXP (X, 1)) < 1024  \
 900                && (INTVAL (XEXP (X, 1)) & 3) == 0)                      \
 901         goto WIN;                                                       \
 902     }                                                                   \
 903 }
 904
 905 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
 906
 907 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)
 908
 909 #define LEGITIMATE_CONSTANT_P(X)        \
 910  (GET_CODE (X) == CONST_INT             \
 911   || GET_CODE (X) == CONST_DOUBLE       \
 912   || CONSTANT_ADDRESS_P (X))
 913
 914 \f
 915 /* Condition Code Status */
 916
 917 #define NOTICE_UPDATE_CC(EXP,INSN)                      \
 918 {                                                       \
 919   if (get_attr_conds ((INSN)) != CONDS_UNCHANGED)       \
 920     CC_STATUS_INIT;                                     \
 921 }
 922
 923 \f
 924 /* Describing Relative Costs of Operations */
 925
 926 #define SLOW_BYTE_ACCESS 0
 927
 928 #define SLOW_UNALIGNED_ACCESS 1
 929
 930 #define NO_FUNCTION_CSE 1
 931
 932 #define NO_RECURSIVE_FUNCTION_CSE 1
 933
 934 #define REGISTER_MOVE_COST(FROM,TO) \
 935   (((FROM) == HI_REGS || (TO) == HI_REGS) ? 4 : 2)
 936
 937 #define MEMORY_MOVE_COST(M,CLASS,IN) \
 938      ((GET_MODE_SIZE(M) < 4 ? 8 : 2 * GET_MODE_SIZE(M)) * (CLASS == LO_REGS ? 1 : 2))
 939
 940 /* This will allow better space optimization when compiling with -O */
 941 #define BRANCH_COST (optimize > 1 ? 1 : 0)
 942
 943 #define RTX_COSTS(X,CODE,OUTER)                                 \
 944  case MULT:                                                     \
 945    if (GET_CODE (XEXP (X, 1)) == CONST_INT)                     \
 946      {                                                          \
 947        int cycles = 0;                                          \
 948        unsigned HOST_WIDE_INT i = INTVAL (XEXP (X, 1));         \
 949        while (i)                                                \
 950          {                                                      \
 951            i >>= 2;                                             \
 952            cycles++;                                            \
 953          }                                                      \
 954        return COSTS_N_INSNS (2) + cycles;                       \
 955      }                                                          \
 956    return COSTS_N_INSNS (1) + 16;                               \
 957  case ASHIFT: case ASHIFTRT: case LSHIFTRT: case ROTATERT:      \
 958  case PLUS: case MINUS: case COMPARE: case NEG: case NOT:       \
 959    return COSTS_N_INSNS (1);                                    \
 960  case SET:                                                      \
 961    return (COSTS_N_INSNS (1)                                    \
 962            + 4 * ((GET_CODE (SET_SRC (X)) == MEM)               \
 963                   + GET_CODE (SET_DEST (X)) == MEM))
 964
 965 #define CONST_COSTS(X,CODE,OUTER)                               \
 966  case CONST_INT:                                                \
 967    if ((OUTER) == SET)                                          \
 968      {                                                          \
 969        if ((unsigned HOST_WIDE_INT) INTVAL (X) < 256)           \
 970          return 0;                                              \
 971        if (thumb_shiftable_const (INTVAL (X)))                  \
 972          return COSTS_N_INSNS (2);                              \
 973        return COSTS_N_INSNS (3);                                \
 974      }                                                          \
 975    else if (OUTER == PLUS                                       \
 976             && INTVAL (X) < 256 && INTVAL (X) > -256)           \
 977      return 0;                                                  \
 978    else if (OUTER == COMPARE                                    \
 979             && (unsigned HOST_WIDE_INT) INTVAL (X) < 256)       \
 980      return 0;                                                  \
 981    else if (OUTER == ASHIFT || OUTER == ASHIFTRT                \
 982             || OUTER == LSHIFTRT)                               \
 983      return 0;                                                  \
 984    return COSTS_N_INSNS (2);                                    \
 985  case CONST:                                                    \
 986  case CONST_DOUBLE:                                             \
 987  case LABEL_REF:                                                \
 988  case SYMBOL_REF:                                               \
 989    return COSTS_N_INSNS(3);
 990
 991 #define ADDRESS_COST(X)                                         \
 992   ((GET_CODE (X) == REG                                         \
 993     || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG   \
 994         && GET_CODE (XEXP (X, 1)) == CONST_INT))                \
 995    ? 1 : 2)
 996
 997 \f
 998 /* Position Independent Code */
 999
1000 #define PRINT_OPERAND(STREAM,X,CODE) \
1001   thumb_print_operand((STREAM), (X), (CODE))
1002
1003 #define PRINT_OPERAND_ADDRESS(STREAM,X)                         \
1004 {                                                               \
1005   if (GET_CODE ((X)) == REG)                                    \
1006     fprintf ((STREAM), "[%s]", reg_names[REGNO ((X))]);         \
1007   else if (GET_CODE ((X)) == POST_INC)                          \
1008     fprintf ((STREAM), "%s!", reg_names[REGNO (XEXP (X, 0))]);  \
1009   else if (GET_CODE ((X)) == PLUS)                              \
1010     {                                                           \
1011       if (GET_CODE (XEXP ((X), 1)) == CONST_INT)                \
1012         fprintf ((STREAM), "[%s, #%d]",                         \
1013                  reg_names[REGNO (XEXP ((X), 0))],              \
1014                  (int) INTVAL (XEXP ((X), 1)));                 \
1015       else                                                      \
1016         fprintf ((STREAM), "[%s, %s]",                          \
1017                  reg_names[REGNO (XEXP ((X), 0))],              \
1018                  reg_names[REGNO (XEXP ((X), 1))]);             \
1019     }                                                           \
1020   else                                                          \
1021     output_addr_const ((STREAM), (X));                          \
1022 }
1023
1024 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '@')
1025
1026 /* Emit a special directive when defining a function name.
1027    This is used by the assembler to assit with interworking.  */
1028 #define ASM_DECLARE_FUNCTION_NAME(file, name, decl)             \
1029   fprintf (file, ".thumb_func\n") ;                             \
1030   ASM_OUTPUT_LABEL (file, name)
1031
1032 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO)                       \
1033   asm_fprintf ((STREAM), "\tpush {%R%s}\n", reg_names[(REGNO)])
1034
1035 #define ASM_OUTPUT_REG_POP(STREAM,REGNO)                        \
1036   fprintf ((STREAM), "\tpop {%R%s}\n", reg_names[(REGNO)])
1037
1038 #define FINAL_PRESCAN_INSN(INSN,OPVEC,NOPERANDS) \
1039   final_prescan_insn((INSN))
1040 \f
1041 /* Controlling Debugging Information Format */
1042 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1043
1044 /* Specific options for DBX Output */
1045
1046 #define DBX_DEBUGGING_INFO 1
1047
1048 #define DEFAULT_GDB_EXTENSIONS 1
1049
1050 \f
1051 /* Cross Compilation and Floating Point */
1052
1053 #define REAL_ARITHMETIC
1054
1055 \f
1056 /* Miscellaneous Parameters */
1057
1058 #define PREDICATE_CODES \
1059   {"thumb_cmp_operand", {SUBREG, REG, CONST_INT}},
1060
1061 #define CASE_VECTOR_MODE Pmode
1062
1063 #define WORD_REGISTER_OPERATIONS
1064
1065 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1066
1067 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1068
1069 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1070
1071 #define MOVE_MAX 4
1072
1073 #define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) 1
1074
1075 #define STORE_FLAG_VALUE 1
1076
1077 #define Pmode SImode
1078
1079 #define FUNCTION_MODE SImode
1080
1081 #define DOLLARS_IN_IDENTIFIERS 0
1082
1083 #define NO_DOLLAR_IN_LABEL 1
1084
1085 #define HAVE_ATEXIT
1086
1087 /* The literal pool needs to reside in the text area due to the
1088    limited PC addressing range: */
1089 #define MACHINE_DEPENDENT_REORG(INSN) thumb_reorg ((INSN))
1090
1091 \f
1092 /* Options specific to Thumb */
1093
1094 /* True if a return instruction can be used in this function. */
1095 int thumb_trivial_epilogue ();
1096 #define USE_RETURN (reload_completed && thumb_trivial_epilogue ())
1097
1098 extern char *thumb_unexpanded_epilogue ();
1099 extern char *output_move_mem_multiple ();
1100 extern char *thumb_load_double_from_address ();
1101 extern char *output_return ();
1102 extern int   far_jump_used_p();