1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
5 Free Software Foundation, Inc.
6 Contributed by Denis Chertykov (chertykov@gmail.com)
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
24 /* Names to predefine in the preprocessor for this target machine. */
30 /* Core have 'MUL*' instructions. */
33 /* Core have 'CALL' and 'JMP' instructions. */
36 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
39 /* Core have 'ELPM' instructions. */
42 /* Core have 'ELPM Rx,Z' instructions. */
45 /* Core have 'EICALL' and 'EIJMP' instructions. */
46 int have_eijmp_eicall
;
48 /* Reserved for xmega architecture. */
51 /* Reserved for xmega architecture. */
54 /* Default start of data section address for architecture. */
55 int default_data_section_start
;
57 const char *const macro
;
59 /* Architecture name. */
60 const char *const arch_name
;
63 /* These names are used as the index into the avr_arch_types[] table
83 const char *const name
;
85 /* Index in avr_arch_types[]. */
88 /* Must lie outside user's namespace. NULL == no macro. */
89 const char *const macro
;
91 /* Stack pointer have 8 bits width. */
94 /* Start of data section. */
95 int data_section_start
;
97 /* Name of device library. */
98 const char *const library_name
;
101 /* Preprocessor macros to define depending on MCU type. */
102 extern const char *avr_extra_arch_macro
;
103 extern const struct base_arch_s
*avr_current_arch
;
104 extern const struct mcu_type_s
*avr_current_device
;
105 extern const struct mcu_type_s avr_mcu_types
[];
106 extern const struct base_arch_s avr_arch_types
[];
108 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
110 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
111 extern GTY(()) section
*progmem_section
;
114 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
115 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
116 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
117 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
118 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
119 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
120 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
122 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
123 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
125 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
127 #define OVERRIDE_OPTIONS avr_override_options ()
129 #define CAN_DEBUG_WITHOUT_FP
131 #define BITS_BIG_ENDIAN 0
132 #define BYTES_BIG_ENDIAN 0
133 #define WORDS_BIG_ENDIAN 0
136 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
137 #define UNITS_PER_WORD 4
139 /* Width of a word, in units (bytes). */
140 #define UNITS_PER_WORD 1
143 #define POINTER_SIZE 16
146 /* Maximum sized of reasonable data type
147 DImode or Dfmode ... */
148 #define MAX_FIXED_MODE_SIZE 32
150 #define PARM_BOUNDARY 8
152 #define FUNCTION_BOUNDARY 8
154 #define EMPTY_FIELD_BOUNDARY 8
156 /* No data type wants to be aligned rounder than this. */
157 #define BIGGEST_ALIGNMENT 8
159 #define MAX_OFILE_ALIGNMENT (32768 * 8)
161 #define TARGET_VTABLE_ENTRY_ALIGN 8
163 #define STRICT_ALIGNMENT 0
165 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
166 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
167 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
168 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
169 #define FLOAT_TYPE_SIZE 32
170 #define DOUBLE_TYPE_SIZE 32
171 #define LONG_DOUBLE_TYPE_SIZE 32
173 #define DEFAULT_SIGNED_CHAR 1
175 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
176 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
178 #define WCHAR_TYPE_SIZE 16
180 #define FIRST_PSEUDO_REGISTER 36
182 #define FIXED_REGISTERS {\
200 1,1 /* arg pointer */ }
202 #define CALL_USED_REGISTERS { \
220 1,1 /* arg pointer */ }
222 #define REG_ALLOC_ORDER { \
230 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
235 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
238 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
240 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
242 #define MODES_TIEABLE_P(MODE1, MODE2) 1
247 POINTER_X_REGS
, /* r26 - r27 */
248 POINTER_Y_REGS
, /* r28 - r29 */
249 POINTER_Z_REGS
, /* r30 - r31 */
250 STACK_REG
, /* STACK */
251 BASE_POINTER_REGS
, /* r28 - r31 */
252 POINTER_REGS
, /* r26 - r31 */
253 ADDW_REGS
, /* r24 - r31 */
254 SIMPLE_LD_REGS
, /* r16 - r23 */
255 LD_REGS
, /* r16 - r31 */
256 NO_LD_REGS
, /* r0 - r15 */
257 GENERAL_REGS
, /* r0 - r31 */
258 ALL_REGS
, LIM_REG_CLASSES
262 #define N_REG_CLASSES (int)LIM_REG_CLASSES
264 #define REG_CLASS_NAMES { \
267 "POINTER_X_REGS", /* r26 - r27 */ \
268 "POINTER_Y_REGS", /* r28 - r29 */ \
269 "POINTER_Z_REGS", /* r30 - r31 */ \
270 "STACK_REG", /* STACK */ \
271 "BASE_POINTER_REGS", /* r28 - r31 */ \
272 "POINTER_REGS", /* r26 - r31 */ \
273 "ADDW_REGS", /* r24 - r31 */ \
274 "SIMPLE_LD_REGS", /* r16 - r23 */ \
275 "LD_REGS", /* r16 - r31 */ \
276 "NO_LD_REGS", /* r0 - r15 */ \
277 "GENERAL_REGS", /* r0 - r31 */ \
280 #define REG_CLASS_CONTENTS { \
281 {0x00000000,0x00000000}, /* NO_REGS */ \
282 {0x00000001,0x00000000}, /* R0_REG */ \
283 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
284 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
285 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
286 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
287 {(3 << REG_Y) | (3 << REG_Z), \
288 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
289 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
290 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
291 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
292 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
293 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
294 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
295 0x00000000}, /* LD_REGS, r16 - r31 */ \
296 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
297 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
298 {0xffffffff,0x00000003} /* ALL_REGS */ \
301 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
303 /* The following macro defines cover classes for Integrated Register
304 Allocator. Cover classes is a set of non-intersected register
305 classes covering all hard registers used for register allocation
306 purpose. Any move between two registers of a cover class should be
307 cheaper than load or store of the registers. The macro value is
308 array of register classes with LIM_REG_CLASSES used as the end
311 #define IRA_COVER_CLASSES \
313 GENERAL_REGS, LIM_REG_CLASSES \
316 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
318 #define INDEX_REG_CLASS NO_REGS
320 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
324 || (r) == ARG_POINTER_REGNUM)) \
326 && (reg_renumber[r] == REG_X \
327 || reg_renumber[r] == REG_Y \
328 || reg_renumber[r] == REG_Z \
329 || (reg_renumber[r] \
330 == ARG_POINTER_REGNUM))))
332 #define REGNO_OK_FOR_INDEX_P(NUM) 0
334 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
336 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
338 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
340 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
342 #define STACK_PUSH_CODE POST_DEC
344 #define STACK_GROWS_DOWNWARD
346 #define STARTING_FRAME_OFFSET 1
348 #define STACK_POINTER_OFFSET 1
350 #define FIRST_PARM_OFFSET(FUNDECL) 0
352 #define STACK_BOUNDARY 8
354 #define STACK_POINTER_REGNUM 32
356 #define FRAME_POINTER_REGNUM REG_Y
358 #define ARG_POINTER_REGNUM 34
360 #define STATIC_CHAIN_REGNUM 2
362 /* Offset from the frame pointer register value to the top of the stack. */
363 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
365 #define ELIMINABLE_REGS { \
366 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
367 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
368 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
370 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
371 OFFSET = avr_initial_elimination_offset (FROM, TO)
373 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
375 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
376 for POST_DEC targets (PR27386). */
377 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
379 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
381 typedef struct avr_args
{
382 int nregs
; /* # registers available for passing */
383 int regno
; /* next available register number */
386 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
387 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
389 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
390 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
392 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
394 extern int avr_reg_order
[];
396 #define RET_REGISTER avr_ret_register ()
398 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
400 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
402 #define DEFAULT_PCC_STRUCT_RETURN 0
404 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
406 #define HAVE_POST_INCREMENT 1
407 #define HAVE_PRE_DECREMENT 1
409 #define MAX_REGS_PER_ADDRESS 1
411 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
412 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
414 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
416 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
417 is no worse than normal base pointers R28/29 and R30/31. For example:
418 If base offset is greater than 63 bytes or for R++ or --R addressing. */
420 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
422 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
424 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
425 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
426 OPNUM, RELOAD_OTHER); \
429 if (GET_CODE (X) == PLUS \
430 && REG_P (XEXP (X, 0)) \
431 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \
432 && GET_CODE (XEXP (X, 1)) == CONST_INT \
433 && INTVAL (XEXP (X, 1)) >= 1) \
435 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
438 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
440 int regno = REGNO (XEXP (X, 0)); \
441 rtx mem = make_memloc (X, regno); \
442 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
443 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
444 1, ADDR_TYPE (TYPE)); \
445 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
446 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
451 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
453 push_reload (X, NULL_RTX, &X, NULL, \
454 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
461 #define LEGITIMATE_CONSTANT_P(X) 1
463 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
464 : (TO) == STACK_REG ? 12 \
467 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
468 (MODE)==HImode ? 4 : \
469 (MODE)==SImode ? 8 : \
470 (MODE)==SFmode ? 8 : 16)
472 #define BRANCH_COST(speed_p, predictable_p) 0
474 #define SLOW_BYTE_ACCESS 0
476 #define NO_FUNCTION_CSE
478 #define TEXT_SECTION_ASM_OP "\t.text"
480 #define DATA_SECTION_ASM_OP "\t.data"
482 #define BSS_SECTION_ASM_OP "\t.section .bss"
484 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
485 There are no shared libraries on this target, and these sections are
486 placed in the read-only program memory, so they are not writable. */
488 #undef CTORS_SECTION_ASM_OP
489 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
491 #undef DTORS_SECTION_ASM_OP
492 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
494 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
496 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
498 #define SUPPORTS_INIT_PRIORITY 0
500 #define JUMP_TABLES_IN_TEXT_SECTION 0
502 #define ASM_COMMENT_START " ; "
504 #define ASM_APP_ON "/* #APP */\n"
506 #define ASM_APP_OFF "/* #NOAPP */\n"
508 /* Switch into a generic section. */
509 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
510 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
512 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
514 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
516 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
518 fputs ("\t.comm ", (STREAM)); \
519 assemble_name ((STREAM), (NAME)); \
520 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
523 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
524 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
526 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
528 fputs ("\t.lcomm ", (STREAM)); \
529 assemble_name ((STREAM), (NAME)); \
530 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
536 #define TYPE_ASM_OP "\t.type\t"
537 #define SIZE_ASM_OP "\t.size\t"
538 #define WEAK_ASM_OP "\t.weak\t"
539 /* Define the strings used for the special svr4 .type and .size directives.
540 These strings generally do not vary from one system running svr4 to
541 another, but if a given system (e.g. m88k running svr) needs to use
542 different pseudo-op names for these, they may be overridden in the
543 file which includes this one. */
546 #undef TYPE_OPERAND_FMT
547 #define TYPE_OPERAND_FMT "@%s"
548 /* The following macro defines the format used to output the second
549 operand of the .type assembler directive. Different svr4 assemblers
550 expect various different forms for this operand. The one given here
551 is just a default. You may need to override it in your machine-
552 specific tm.h file (depending upon the particulars of your assembler). */
554 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
555 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
557 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
559 if (!flag_inhibit_size_directive) \
560 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
563 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
565 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
566 size_directive_output = 0; \
567 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
569 size_directive_output = 1; \
570 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
571 int_size_in_bytes (TREE_TYPE (DECL))); \
573 ASM_OUTPUT_LABEL(FILE, NAME); \
576 #undef ASM_FINISH_DECLARE_OBJECT
577 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
579 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
580 HOST_WIDE_INT size; \
581 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
582 && ! AT_END && TOP_LEVEL \
583 && DECL_INITIAL (DECL) == error_mark_node \
584 && !size_directive_output) \
586 size_directive_output = 1; \
587 size = int_size_in_bytes (TREE_TYPE (DECL)); \
588 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
594 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
595 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
596 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
597 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
598 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
599 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
600 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
601 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
602 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
603 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
604 corresponds to a particular byte value [0..255]. For any
605 given byte value, if the value in the corresponding table
606 position is zero, the given character can be output directly.
607 If the table value is 1, the byte must be output as a \ooo
608 octal escape. If the tables value is anything else, then the
609 byte value should be output as a \ followed by the value
610 in the table. Note that we can use standard UN*X escape
611 sequences for many control characters, but we don't use
612 \a to represent BEL because some svr4 assemblers (e.g. on
613 the i386) don't know about that. Also, we don't use \v
614 since some versions of gas, such as 2.2 did not accept it. */
616 #define STRING_LIMIT ((unsigned) 64)
617 #define STRING_ASM_OP "\t.string\t"
618 /* Some svr4 assemblers have a limit on the number of characters which
619 can appear in the operand of a .string directive. If your assembler
620 has such a limitation, you should define STRING_LIMIT to reflect that
621 limit. Note that at least some svr4 assemblers have a limit on the
622 actual number of bytes in the double-quoted string, and that they
623 count each character in an escape sequence as one byte. Thus, an
624 escape sequence like \377 would count as four bytes.
626 If your target assembler doesn't support the .string directive, you
627 should define this to zero. */
629 /* Globalizing directive for a label. */
630 #define GLOBAL_ASM_OP ".global\t"
632 #define SET_ASM_OP "\t.set\t"
634 #define ASM_WEAKEN_LABEL(FILE, NAME) \
637 fputs ("\t.weak\t", (FILE)); \
638 assemble_name ((FILE), (NAME)); \
639 fputc ('\n', (FILE)); \
643 #define SUPPORTS_WEAK 1
645 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
646 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
648 #define HAS_INIT_SECTION 1
650 #define REGISTER_NAMES { \
651 "r0","r1","r2","r3","r4","r5","r6","r7", \
652 "r8","r9","r10","r11","r12","r13","r14","r15", \
653 "r16","r17","r18","r19","r20","r21","r22","r23", \
654 "r24","r25","r26","r27","r28","r29","r30","r31", \
655 "__SP_L__","__SP_H__","argL","argH"}
657 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
659 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
661 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
663 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
665 #define USER_LABEL_PREFIX ""
667 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
669 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
671 gcc_assert (REGNO < 32); \
672 fprintf (STREAM, "\tpush\tr%d", REGNO); \
675 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
677 gcc_assert (REGNO < 32); \
678 fprintf (STREAM, "\tpop\tr%d", REGNO); \
681 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
682 avr_output_addr_vec_elt(STREAM, VALUE)
684 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
685 (switch_to_section (progmem_section), \
686 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
688 #define ASM_OUTPUT_SKIP(STREAM, N) \
689 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
691 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
694 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
697 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
698 default_elf_asm_output_external (FILE, DECL, NAME)
700 #define CASE_VECTOR_MODE HImode
702 #undef WORD_REGISTER_OPERATIONS
706 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
710 #define FUNCTION_MODE HImode
712 #define DOLLARS_IN_IDENTIFIERS 0
714 #define NO_DOLLAR_IN_LABEL 1
716 #define TRAMPOLINE_SIZE 4
718 /* Store in cc_status the expressions
719 that the condition codes will describe
720 after execution of an instruction whose pattern is EXP.
721 Do not alter them if the instruction would not alter the cc's. */
723 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
725 /* The add insns don't set overflow in a usable way. */
726 #define CC_OVERFLOW_UNUSABLE 01000
727 /* The mov,and,or,xor insns don't set carry. That's ok though as the
728 Z bit is all we need when doing unsigned comparisons on the result of
729 these insns (since they're always with 0). However, conditions.h has
730 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
732 #define CC_NO_CARRY CC_NO_OVERFLOW
735 /* Output assembler code to FILE to increment profiler label # LABELNO
736 for profiling a function entry. */
738 #define FUNCTION_PROFILER(FILE, LABELNO) \
739 fprintf (FILE, "/* profiler %d */", (LABELNO))
741 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
742 adjust_insn_length (INSN, LENGTH))
744 extern const char *avr_device_to_arch (int argc
, const char **argv
);
745 extern const char *avr_device_to_data_start (int argc
, const char **argv
);
746 extern const char *avr_device_to_startfiles (int argc
, const char **argv
);
747 extern const char *avr_device_to_devicelib (int argc
, const char **argv
);
749 #define EXTRA_SPEC_FUNCTIONS \
750 { "device_to_arch", avr_device_to_arch }, \
751 { "device_to_data_start", avr_device_to_data_start }, \
752 { "device_to_startfile", avr_device_to_startfiles }, \
753 { "device_to_devicelib", avr_device_to_devicelib },
755 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
757 #define CC1_SPEC "%{profile:-p}"
759 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
760 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
761 %{!fexceptions:-fno-exceptions}"
762 /* A C string constant that tells the GCC driver program options to
763 pass to `cc1plus'. */
765 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
770 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
771 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
773 mmcu=at90can32*:--pmem-wrap-around=32k}\
776 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
777 %:device_to_arch(%{mmcu=*:%*})\
778 %:device_to_data_start(%{mmcu=*:%*})"
781 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
783 #define LIBSTDCXX "-lgcc"
784 /* No libstdc++ for now. Empty string doesn't work. */
786 #define LIBGCC_SPEC \
787 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
789 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
791 #define ENDFILE_SPEC ""
793 /* This is the default without any -mmcu=* option (AT90S*). */
794 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
796 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
797 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
799 /* Note that the other files fail to use these
800 in some of the places where they should. */
802 #if defined(__STDC__) || defined(ALMOST_STDC)
803 #define AS2(a,b,c) #a " " #b "," #c
804 #define AS2C(b,c) " " #b "," #c
805 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
806 #define AS1(a,b) #a " " #b
808 #define AS1(a,b) "a b"
809 #define AS2(a,b,c) "a b,c"
810 #define AS2C(b,c) " b,c"
811 #define AS3(a,b,c,d) "a b,c,d"
813 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
814 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
815 #define CR_TAB "\n\t"
817 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
819 #define DWARF2_DEBUGGING_INFO 1
821 #define DWARF2_ADDR_SIZE 4
823 #define OBJECT_FORMAT_ELF
825 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
826 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
828 /* A C structure for machine-specific, per-function data.
829 This is added to the cfun structure. */
830 struct GTY(()) machine_function
832 /* 'true' - if current function is a naked function. */
835 /* 'true' - if current function is an interrupt function
836 as specified by the "interrupt" attribute. */
839 /* 'true' - if current function is a signal function
840 as specified by the "signal" attribute. */
843 /* 'true' - if current function is a 'task' function
844 as specified by the "OS_task" attribute. */
847 /* 'true' - if current function is a 'main' function
848 as specified by the "OS_main" attribute. */
851 /* Current function stack size. */