gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   4    2008, 2009, 2010, 2011
   5    Free Software Foundation, Inc.
   6    Contributed by Denis Chertykov (chertykov@gmail.com)
   7
   8 This file is part of GCC.
   9
  10 GCC is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 3, or (at your option)
  13 any later version.
  14
  15 GCC is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with GCC; see the file COPYING3.  If not see
  22 <http://www.gnu.org/licenses/>.  */
  23
  24 /* Names to predefine in the preprocessor for this target machine.  */
  25
  26 struct base_arch_s
  27 {
  28   /* Assembler only.  */
  29   int asm_only;
  30
  31   /* Core have 'MUL*' instructions.  */
  32   int have_mul;
  33
  34   /* Core have 'CALL' and 'JMP' instructions.  */
  35   int have_jmp_call;
  36
  37   /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
  38   int have_movw_lpmx;
  39
  40   /* Core have 'ELPM' instructions.  */
  41   int have_elpm;
  42
  43   /* Core have 'ELPM Rx,Z' instructions.  */
  44   int have_elpmx;
  45
  46   /* Core have 'EICALL' and 'EIJMP' instructions.  */
  47   int have_eijmp_eicall;
  48
  49   /* Reserved for xmega architecture.  */
  50   int reserved;
  51
  52   /* Reserved for xmega architecture.  */
  53   int reserved2;
  54
  55   /* Default start of data section address for architecture.  */
  56   int default_data_section_start;
  57
  58   /* Offset between SFR address and RAM address:
  59      SFR-address = RAM-address - sfr_offset  */
  60   int sfr_offset;
  61
  62   /* Number of 64k segments in the flash.  */
  63   int n_segments;
  64
  65   const char *const macro;
  66
  67   /* Architecture name.  */
  68   const char *const arch_name;
  69 };
  70
  71 /* These names are used as the index into the avr_arch_types[] table
  72    above.  */
  73
  74 enum avr_arch
  75 {
  76   ARCH_UNKNOWN,
  77   ARCH_AVR1,
  78   ARCH_AVR2,
  79   ARCH_AVR25,
  80   ARCH_AVR3,
  81   ARCH_AVR31,
  82   ARCH_AVR35,
  83   ARCH_AVR4,
  84   ARCH_AVR5,
  85   ARCH_AVR51,
  86   ARCH_AVR6
  87 };
  88
  89 struct mcu_type_s {
  90   /* Device name.  */
  91   const char *const name;
  92
  93   /* Index in avr_arch_types[].  */
  94   int arch;
  95
  96   /* Must lie outside user's namespace.  NULL == no macro.  */
  97   const char *const macro;
  98
  99   /* Stack pointer have 8 bits width.  */
 100   int short_sp;
 101
 102   /* Some AVR devices have a core erratum when skipping a 2-word instruction.
 103      Skip instructions are:  SBRC, SBRS, SBIC, SBIS, CPSE.
 104      Problems will occur with return address is IRQ executes during the
 105      skip sequence.
 106
 107      A support ticket from Atmel returned the following information:
 108
 109          Subject: (ATTicket:644469) On AVR skip-bug core Erratum
 110          From: avr@atmel.com                    Date: 2011-07-27
 111          (Please keep the subject when replying to this mail)
 112
 113          This errata exists only in AT90S8515 and ATmega103 devices.
 114
 115          For information please refer the following respective errata links
 116             http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
 117             http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf  */
 118
 119   /* Core Erratum:  Must not skip 2-word instruction.  */
 120   int errata_skip;
 121
 122   /* Start of data section.  */
 123   int data_section_start;
 124
 125   /* Name of device library.  */
 126   const char *const library_name;
 127 };
 128
 129 /* Preprocessor macros to define depending on MCU type.  */
 130 extern const char *avr_extra_arch_macro;
 131 extern const struct base_arch_s *avr_current_arch;
 132 extern const struct mcu_type_s *avr_current_device;
 133 extern const struct mcu_type_s avr_mcu_types[];
 134 extern const struct base_arch_s avr_arch_types[];
 135
 136 typedef struct
 137 {
 138   /* Id of the address space as used in c_register_addr_space */
 139   unsigned char id;
 140
 141   /* Flavour of memory: 0 = RAM, 1 = Flash */
 142   int memory_class;
 143
 144   /* Width of pointer (in bytes) */
 145   int pointer_size;
 146
 147   /* Name of the address space as visible to the user */
 148   const char *name;
 149
 150   /* Segment (i.e. 64k memory chunk) number.  */
 151   int segment;
 152 } avr_addrspace_t;
 153
 154 extern const avr_addrspace_t avr_addrspace[];
 155
 156 /* Known address spaces */
 157
 158 enum
 159   {
 160     ADDR_SPACE_RAM,
 161     ADDR_SPACE_PGM,
 162     ADDR_SPACE_PGM1,
 163     ADDR_SPACE_PGM2,
 164     ADDR_SPACE_PGM3,
 165     ADDR_SPACE_PGM4,
 166     ADDR_SPACE_PGM5,
 167     ADDR_SPACE_PGMX
 168   };
 169
 170 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
 171
 172 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
 173 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
 174 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
 175 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
 176 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
 177 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
 178 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
 179 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
 180 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
 181
 182 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 183 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
 184
 185 #define BITS_BIG_ENDIAN 0
 186 #define BYTES_BIG_ENDIAN 0
 187 #define WORDS_BIG_ENDIAN 0
 188
 189 #ifdef IN_LIBGCC2
 190 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 191 #define UNITS_PER_WORD 4
 192 #else
 193 /* Width of a word, in units (bytes).  */
 194 #define UNITS_PER_WORD 1
 195 #endif
 196
 197 #define POINTER_SIZE 16
 198
 199
 200 /* Maximum sized of reasonable data type
 201    DImode or Dfmode ...  */
 202 #define MAX_FIXED_MODE_SIZE 32
 203
 204 #define PARM_BOUNDARY 8
 205
 206 #define FUNCTION_BOUNDARY 8
 207
 208 #define EMPTY_FIELD_BOUNDARY 8
 209
 210 /* No data type wants to be aligned rounder than this.  */
 211 #define BIGGEST_ALIGNMENT 8
 212
 213 #define TARGET_VTABLE_ENTRY_ALIGN 8
 214
 215 #define STRICT_ALIGNMENT 0
 216
 217 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 218 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 219 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 220 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 221 #define FLOAT_TYPE_SIZE 32
 222 #define DOUBLE_TYPE_SIZE 32
 223 #define LONG_DOUBLE_TYPE_SIZE 32
 224
 225 #define DEFAULT_SIGNED_CHAR 1
 226
 227 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 228 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 229
 230 #define WCHAR_TYPE_SIZE 16
 231
 232 #define FIRST_PSEUDO_REGISTER 36
 233
 234 #define FIXED_REGISTERS {                       \
 235   1,1,/* r0 r1 */                               \
 236   0,0,/* r2 r3 */                               \
 237   0,0,/* r4 r5 */                               \
 238   0,0,/* r6 r7 */                               \
 239   0,0,/* r8 r9 */                               \
 240   0,0,/* r10 r11 */                             \
 241   0,0,/* r12 r13 */                             \
 242   0,0,/* r14 r15 */                             \
 243   0,0,/* r16 r17 */                             \
 244   0,0,/* r18 r19 */                             \
 245   0,0,/* r20 r21 */                             \
 246   0,0,/* r22 r23 */                             \
 247   0,0,/* r24 r25 */                             \
 248   0,0,/* r26 r27 */                             \
 249   0,0,/* r28 r29 */                             \
 250   0,0,/* r30 r31 */                             \
 251   1,1,/*  STACK */                              \
 252   1,  /* arg pointer */                         \
 253   1   /* frame pointer */ }
 254
 255 #define CALL_USED_REGISTERS {                   \
 256   1,1,/* r0 r1 */                               \
 257   0,0,/* r2 r3 */                               \
 258   0,0,/* r4 r5 */                               \
 259   0,0,/* r6 r7 */                               \
 260   0,0,/* r8 r9 */                               \
 261   0,0,/* r10 r11 */                             \
 262   0,0,/* r12 r13 */                             \
 263   0,0,/* r14 r15 */                             \
 264   0,0,/* r16 r17 */                             \
 265   1,1,/* r18 r19 */                             \
 266   1,1,/* r20 r21 */                             \
 267   1,1,/* r22 r23 */                             \
 268   1,1,/* r24 r25 */                             \
 269   1,1,/* r26 r27 */                             \
 270   0,0,/* r28 r29 */                             \
 271   1,1,/* r30 r31 */                             \
 272   1,1,/*  STACK */                              \
 273   1,  /* arg pointer */                         \
 274   1   /* frame pointer */ }
 275
 276 #define REG_ALLOC_ORDER {                       \
 277     24,25,                                      \
 278     18,19,                                      \
 279     20,21,                                      \
 280     22,23,                                      \
 281     30,31,                                      \
 282     26,27,                                      \
 283     28,29,                                      \
 284     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 285     0,1,                                        \
 286     32,33,34,35                                 \
 287     }
 288
 289 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
 290
 291
 292 #define HARD_REGNO_NREGS(REGNO, MODE) avr_hard_regno_nregs(REGNO, MODE)
 293
 294 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 295
 296 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 297
 298 enum reg_class {
 299   NO_REGS,
 300   R0_REG,                       /* r0 */
 301   POINTER_X_REGS,               /* r26 - r27 */
 302   POINTER_Y_REGS,               /* r28 - r29 */
 303   POINTER_Z_REGS,               /* r30 - r31 */
 304   STACK_REG,                    /* STACK */
 305   BASE_POINTER_REGS,            /* r28 - r31 */
 306   POINTER_REGS,                 /* r26 - r31 */
 307   ADDW_REGS,                    /* r24 - r31 */
 308   SIMPLE_LD_REGS,               /* r16 - r23 */
 309   LD_REGS,                      /* r16 - r31 */
 310   NO_LD_REGS,                   /* r0 - r15 */
 311   GENERAL_REGS,                 /* r0 - r31 */
 312   ALL_REGS, LIM_REG_CLASSES
 313 };
 314
 315
 316 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 317
 318 #define REG_CLASS_NAMES {                                       \
 319                  "NO_REGS",                                     \
 320                    "R0_REG",    /* r0 */                        \
 321                    "POINTER_X_REGS", /* r26 - r27 */            \
 322                    "POINTER_Y_REGS", /* r28 - r29 */            \
 323                    "POINTER_Z_REGS", /* r30 - r31 */            \
 324                    "STACK_REG", /* STACK */                     \
 325                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 326                    "POINTER_REGS", /* r26 - r31 */              \
 327                    "ADDW_REGS", /* r24 - r31 */                 \
 328                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 329                    "LD_REGS",   /* r16 - r31 */                 \
 330                    "NO_LD_REGS", /* r0 - r15 */                 \
 331                    "GENERAL_REGS", /* r0 - r31 */               \
 332                    "ALL_REGS" }
 333
 334 #define REG_CLASS_CONTENTS {                                            \
 335   {0x00000000,0x00000000},      /* NO_REGS */                           \
 336   {0x00000001,0x00000000},      /* R0_REG */                            \
 337   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
 338   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
 339   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
 340   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 341   {(3 << REG_Y) | (3 << REG_Z),                                         \
 342      0x0000000c},               /* BASE_POINTER_REGS, r28 - r31,ap,fp */ \
 343   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
 344      0x0000000c},               /* POINTER_REGS, r26 - r31 */           \
 345   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
 346      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 347   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 348   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
 349      0x0000000c},       /* LD_REGS, r16 - r31 */                        \
 350   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 351   {0xffffffff,0x0000000c},      /* GENERAL_REGS, r0 - r31 */            \
 352   {0xffffffff,0x0000000f}       /* ALL_REGS */                          \
 353 }
 354
 355 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 356
 357 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
 358   avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
 359
 360 #define INDEX_REG_CLASS NO_REGS
 361
 362 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
 363   avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
 364
 365 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 366
 367 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 368
 369 #define STACK_PUSH_CODE POST_DEC
 370
 371 #define STACK_GROWS_DOWNWARD
 372
 373 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
 374
 375 #define STACK_POINTER_OFFSET 1
 376
 377 #define FIRST_PARM_OFFSET(FUNDECL) 0
 378
 379 #define STACK_BOUNDARY 8
 380
 381 #define STACK_POINTER_REGNUM 32
 382
 383 #define HARD_FRAME_POINTER_REGNUM REG_Y
 384
 385 #define ARG_POINTER_REGNUM 34
 386 #define FRAME_POINTER_REGNUM 35
 387
 388 #define STATIC_CHAIN_REGNUM 2
 389
 390 #define ELIMINABLE_REGS {                                       \
 391      { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },              \
 392      { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },         \
 393      { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },            \
 394      { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }}
 395
 396 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)    \
 397   OFFSET = avr_initial_elimination_offset (FROM, TO)
 398
 399 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 400
 401 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 402    for POST_DEC targets (PR27386).  */
 403 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 404
 405 typedef struct avr_args {
 406   int nregs;                    /* # registers available for passing */
 407   int regno;                    /* next available register number */
 408 } CUMULATIVE_ARGS;
 409
 410 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 411   init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 412
 413 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
 414
 415 #define DEFAULT_PCC_STRUCT_RETURN 0
 416
 417 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 418
 419 #define HAVE_POST_INCREMENT 1
 420 #define HAVE_PRE_DECREMENT 1
 421
 422 #define MAX_REGS_PER_ADDRESS 1
 423
 424 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 425   do {                                                                  \
 426     rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
 427                                                ADDR_TYPE (TYPE),        \
 428                                                IND_L, make_memloc);     \
 429     if (new_x)                                                          \
 430       {                                                                 \
 431         X = new_x;                                                      \
 432         goto WIN;                                                       \
 433       }                                                                 \
 434   } while (0)
 435
 436 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
 437
 438 #define SLOW_BYTE_ACCESS 0
 439
 440 #define NO_FUNCTION_CSE
 441
 442 #define REGISTER_TARGET_PRAGMAS()                                       \
 443   do {                                                                  \
 444     avr_register_target_pragmas();                                      \
 445   } while (0)
 446
 447 #define TEXT_SECTION_ASM_OP "\t.text"
 448
 449 #define DATA_SECTION_ASM_OP "\t.data"
 450
 451 #define BSS_SECTION_ASM_OP "\t.section .bss"
 452
 453 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 454    There are no shared libraries on this target, and these sections are
 455    placed in the read-only program memory, so they are not writable.  */
 456
 457 #undef CTORS_SECTION_ASM_OP
 458 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 459
 460 #undef DTORS_SECTION_ASM_OP
 461 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 462
 463 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 464
 465 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 466
 467 #define SUPPORTS_INIT_PRIORITY 0
 468
 469 #define JUMP_TABLES_IN_TEXT_SECTION 0
 470
 471 #define ASM_COMMENT_START " ; "
 472
 473 #define ASM_APP_ON "/* #APP */\n"
 474
 475 #define ASM_APP_OFF "/* #NOAPP */\n"
 476
 477 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 478
 479 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 480   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 481
 482 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 483   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 484
 485 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 486   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 487
 488 /* Globalizing directive for a label.  */
 489 #define GLOBAL_ASM_OP ".global\t"
 490
 491 #define SUPPORTS_WEAK 1
 492
 493 #define HAS_INIT_SECTION 1
 494
 495 #define REGISTER_NAMES {                                \
 496   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 497     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 498     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 499     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 500     "__SP_L__","__SP_H__","ap","fp"}
 501
 502 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
 503
 504 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 505 {                                               \
 506   gcc_assert (REGNO < 32);                      \
 507   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 508 }
 509
 510 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 511 {                                               \
 512   gcc_assert (REGNO < 32);                      \
 513   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 514 }
 515
 516 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)          \
 517   avr_output_addr_vec_elt(STREAM, VALUE)
 518
 519 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 520   do {                                                  \
 521       if ((POWER) > 1)                                  \
 522           fprintf (STREAM, "\t.p2align\t%d\n", POWER);  \
 523   } while (0)
 524
 525 #define CASE_VECTOR_MODE HImode
 526
 527 #undef WORD_REGISTER_OPERATIONS
 528
 529 #define MOVE_MAX 4
 530
 531 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 532
 533 #define Pmode HImode
 534
 535 #define FUNCTION_MODE HImode
 536
 537 #define DOLLARS_IN_IDENTIFIERS 0
 538
 539 #define TRAMPOLINE_SIZE 4
 540
 541 /* Store in cc_status the expressions
 542    that the condition codes will describe
 543    after execution of an instruction whose pattern is EXP.
 544    Do not alter them if the instruction would not alter the cc's.  */
 545
 546 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
 547
 548 /* The add insns don't set overflow in a usable way.  */
 549 #define CC_OVERFLOW_UNUSABLE 01000
 550 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 551    Z bit is all we need when doing unsigned comparisons on the result of
 552    these insns (since they're always with 0).  However, conditions.h has
 553    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 554    understandable.  */
 555 #define CC_NO_CARRY CC_NO_OVERFLOW
 556
 557
 558 /* Output assembler code to FILE to increment profiler label # LABELNO
 559    for profiling a function entry.  */
 560
 561 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 562   fprintf (FILE, "/* profiler %d */", (LABELNO))
 563
 564 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
 565                                           adjust_insn_length (INSN, LENGTH))
 566
 567 extern const char *avr_device_to_arch (int argc, const char **argv);
 568 extern const char *avr_device_to_data_start (int argc, const char **argv);
 569 extern const char *avr_device_to_startfiles (int argc, const char **argv);
 570 extern const char *avr_device_to_devicelib (int argc, const char **argv);
 571
 572 #define EXTRA_SPEC_FUNCTIONS \
 573   { "device_to_arch", avr_device_to_arch }, \
 574   { "device_to_data_start", avr_device_to_data_start }, \
 575   { "device_to_startfile", avr_device_to_startfiles }, \
 576   { "device_to_devicelib", avr_device_to_devicelib },
 577
 578 #define CPP_SPEC ""
 579
 580 #define CC1_SPEC ""
 581
 582 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 583     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 584     %{!fexceptions:-fno-exceptions}"
 585 /* A C string constant that tells the GCC driver program options to
 586    pass to `cc1plus'.  */
 587
 588 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
 589 mmcu=*:-mmcu=%*}"
 590
 591 #define LINK_SPEC "\
 592 %{mrelax:--relax\
 593          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 594                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 595                              %{mmcu=atmega32*|\
 596                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 597                              %{mmcu=atmega64*|\
 598                                mmcu=at90can64*|\
 599                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 600 %:device_to_arch(%{mmcu=*:%*})\
 601 %:device_to_data_start(%{mmcu=*:%*})"
 602
 603 #define LIB_SPEC \
 604   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 605
 606 #define LIBSTDCXX "gcc"
 607 /* No libstdc++ for now.  Empty string doesn't work.  */
 608
 609 #define LIBGCC_SPEC \
 610   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 611
 612 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
 613
 614 #define ENDFILE_SPEC ""
 615
 616 /* This is the default without any -mmcu=* option (AT90S*).  */
 617 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 618
 619 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 620   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 621
 622 /* Note that the other files fail to use these
 623    in some of the places where they should.  */
 624
 625 #if defined(__STDC__) || defined(ALMOST_STDC)
 626 #define AS2(a,b,c) #a " " #b "," #c
 627 #define AS2C(b,c) " " #b "," #c
 628 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
 629 #define AS1(a,b) #a " " #b
 630 #else
 631 #define AS1(a,b) "a     b"
 632 #define AS2(a,b,c) "a   b,c"
 633 #define AS2C(b,c) " b,c"
 634 #define AS3(a,b,c,d) "a b,c,d"
 635 #endif
 636 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
 637 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
 638 #define CR_TAB "\n\t"
 639
 640 #define DWARF2_ADDR_SIZE 4
 641
 642 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 643 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 644
 645 /* The caller's stack pointer value immediately before the call
 646    is one byte below the first argument.  */
 647 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 648
 649 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 650   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 651
 652 /* A C structure for machine-specific, per-function data.
 653    This is added to the cfun structure.  */
 654 struct GTY(()) machine_function
 655 {
 656   /* 'true' - if current function is a naked function.  */
 657   int is_naked;
 658
 659   /* 'true' - if current function is an interrupt function
 660      as specified by the "interrupt" attribute.  */
 661   int is_interrupt;
 662
 663   /* 'true' - if current function is a signal function
 664      as specified by the "signal" attribute.  */
 665   int is_signal;
 666
 667   /* 'true' - if current function is a 'task' function
 668      as specified by the "OS_task" attribute.  */
 669   int is_OS_task;
 670
 671   /* 'true' - if current function is a 'main' function
 672      as specified by the "OS_main" attribute.  */
 673   int is_OS_main;
 674
 675   /* Current function stack size.  */
 676   int stack_usage;
 677
 678   /* 'true' if a callee might be tail called */
 679   int sibcall_fails;
 680 };
 681
 682 /* AVR does not round pushes, but the existance of this macro is
 683    required in order for pushes to be generated.  */
 684 #define PUSH_ROUNDING(X)        (X)
 685
 686 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
 687
 688 #define INIT_EXPANDERS avr_init_expanders()