gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   4    2008, 2009, 2010, 2011
   5    Free Software Foundation, Inc.
   6    Contributed by Denis Chertykov (chertykov@gmail.com)
   7
   8 This file is part of GCC.
   9
  10 GCC is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 3, or (at your option)
  13 any later version.
  14
  15 GCC is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with GCC; see the file COPYING3.  If not see
  22 <http://www.gnu.org/licenses/>.  */
  23
  24 /* Names to predefine in the preprocessor for this target machine.  */
  25
  26 struct base_arch_s {
  27   /* Assembler only.  */
  28   int asm_only;
  29
  30   /* Core have 'MUL*' instructions.  */
  31   int have_mul;
  32
  33   /* Core have 'CALL' and 'JMP' instructions.  */
  34   int have_jmp_call;
  35
  36   /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
  37   int have_movw_lpmx;
  38
  39   /* Core have 'ELPM' instructions.  */
  40   int have_elpm;
  41
  42   /* Core have 'ELPM Rx,Z' instructions.  */
  43   int have_elpmx;
  44
  45   /* Core have 'EICALL' and 'EIJMP' instructions.  */
  46   int have_eijmp_eicall;
  47
  48   /* Reserved for xmega architecture.  */
  49   int reserved;
  50
  51   /* Reserved for xmega architecture.  */
  52   int reserved2;
  53
  54   /* Default start of data section address for architecture.  */
  55   int default_data_section_start;
  56
  57   const char *const macro;
  58
  59   /* Architecture name.  */
  60   const char *const arch_name;
  61 };
  62
  63 /* These names are used as the index into the avr_arch_types[] table
  64    above.  */
  65
  66 enum avr_arch
  67 {
  68   ARCH_UNKNOWN,
  69   ARCH_AVR1,
  70   ARCH_AVR2,
  71   ARCH_AVR25,
  72   ARCH_AVR3,
  73   ARCH_AVR31,
  74   ARCH_AVR35,
  75   ARCH_AVR4,
  76   ARCH_AVR5,
  77   ARCH_AVR51,
  78   ARCH_AVR6
  79 };
  80
  81 struct mcu_type_s {
  82   /* Device name.  */
  83   const char *const name;
  84
  85   /* Index in avr_arch_types[].  */
  86   int arch;
  87
  88   /* Must lie outside user's namespace.  NULL == no macro.  */
  89   const char *const macro;
  90
  91   /* Stack pointer have 8 bits width.  */
  92   int short_sp;
  93
  94   /* Some AVR devices have a core erratum when skipping a 2-word instruction.
  95      Skip instructions are:  SBRC, SBRS, SBIC, SBIS, CPSE.
  96      Problems will occur with return address is IRQ executes during the
  97      skip sequence.
  98
  99      A support ticket from Atmel returned the following information:
 100
 101          Subject: (ATTicket:644469) On AVR skip-bug core Erratum
 102          From: avr@atmel.com                    Date: 2011-07-27
 103          (Please keep the subject when replying to this mail)
 104
 105          This errata exists only in AT90S8515 and ATmega103 devices.
 106
 107          For information please refer the following respective errata links
 108             http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
 109             http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf  */
 110
 111   /* Core Erratum:  Must not skip 2-word instruction.  */
 112   int errata_skip;
 113
 114   /* Start of data section.  */
 115   int data_section_start;
 116
 117   /* Name of device library.  */
 118   const char *const library_name;
 119 };
 120
 121 /* Preprocessor macros to define depending on MCU type.  */
 122 extern const char *avr_extra_arch_macro;
 123 extern const struct base_arch_s *avr_current_arch;
 124 extern const struct mcu_type_s *avr_current_device;
 125 extern const struct mcu_type_s avr_mcu_types[];
 126 extern const struct base_arch_s avr_arch_types[];
 127
 128 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
 129
 130 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
 131 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
 132 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
 133 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
 134 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
 135 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
 136 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
 137
 138 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 139 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
 140
 141 #define BITS_BIG_ENDIAN 0
 142 #define BYTES_BIG_ENDIAN 0
 143 #define WORDS_BIG_ENDIAN 0
 144
 145 #ifdef IN_LIBGCC2
 146 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 147 #define UNITS_PER_WORD 4
 148 #else
 149 /* Width of a word, in units (bytes).  */
 150 #define UNITS_PER_WORD 1
 151 #endif
 152
 153 #define POINTER_SIZE 16
 154
 155
 156 /* Maximum sized of reasonable data type
 157    DImode or Dfmode ...  */
 158 #define MAX_FIXED_MODE_SIZE 32
 159
 160 #define PARM_BOUNDARY 8
 161
 162 #define FUNCTION_BOUNDARY 8
 163
 164 #define EMPTY_FIELD_BOUNDARY 8
 165
 166 /* No data type wants to be aligned rounder than this.  */
 167 #define BIGGEST_ALIGNMENT 8
 168
 169 #define TARGET_VTABLE_ENTRY_ALIGN 8
 170
 171 #define STRICT_ALIGNMENT 0
 172
 173 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 174 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 175 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 176 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 177 #define FLOAT_TYPE_SIZE 32
 178 #define DOUBLE_TYPE_SIZE 32
 179 #define LONG_DOUBLE_TYPE_SIZE 32
 180
 181 #define DEFAULT_SIGNED_CHAR 1
 182
 183 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 184 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 185
 186 #define WCHAR_TYPE_SIZE 16
 187
 188 #define FIRST_PSEUDO_REGISTER 36
 189
 190 #define FIXED_REGISTERS {\
 191   1,1,/* r0 r1 */\
 192   0,0,/* r2 r3 */\
 193   0,0,/* r4 r5 */\
 194   0,0,/* r6 r7 */\
 195   0,0,/* r8 r9 */\
 196   0,0,/* r10 r11 */\
 197   0,0,/* r12 r13 */\
 198   0,0,/* r14 r15 */\
 199   0,0,/* r16 r17 */\
 200   0,0,/* r18 r19 */\
 201   0,0,/* r20 r21 */\
 202   0,0,/* r22 r23 */\
 203   0,0,/* r24 r25 */\
 204   0,0,/* r26 r27 */\
 205   0,0,/* r28 r29 */\
 206   0,0,/* r30 r31 */\
 207   1,1,/*  STACK */\
 208   1,1 /* arg pointer */  }
 209
 210 #define CALL_USED_REGISTERS {                   \
 211   1,1,/* r0 r1 */                               \
 212     0,0,/* r2 r3 */                             \
 213     0,0,/* r4 r5 */                             \
 214     0,0,/* r6 r7 */                             \
 215     0,0,/* r8 r9 */                             \
 216     0,0,/* r10 r11 */                           \
 217     0,0,/* r12 r13 */                           \
 218     0,0,/* r14 r15 */                           \
 219     0,0,/* r16 r17 */                           \
 220     1,1,/* r18 r19 */                           \
 221     1,1,/* r20 r21 */                           \
 222     1,1,/* r22 r23 */                           \
 223     1,1,/* r24 r25 */                           \
 224     1,1,/* r26 r27 */                           \
 225     0,0,/* r28 r29 */                           \
 226     1,1,/* r30 r31 */                           \
 227     1,1,/*  STACK */                            \
 228     1,1 /* arg pointer */  }
 229
 230 #define REG_ALLOC_ORDER {                       \
 231     24,25,                                      \
 232     18,19,                                      \
 233     20,21,                                      \
 234     22,23,                                      \
 235     30,31,                                      \
 236     26,27,                                      \
 237     28,29,                                      \
 238     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 239     0,1,                                        \
 240     32,33,34,35                                 \
 241     }
 242
 243 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
 244
 245
 246 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 247
 248 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 249
 250 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 251
 252 enum reg_class {
 253   NO_REGS,
 254   R0_REG,                       /* r0 */
 255   POINTER_X_REGS,               /* r26 - r27 */
 256   POINTER_Y_REGS,               /* r28 - r29 */
 257   POINTER_Z_REGS,               /* r30 - r31 */
 258   STACK_REG,                    /* STACK */
 259   BASE_POINTER_REGS,            /* r28 - r31 */
 260   POINTER_REGS,                 /* r26 - r31 */
 261   ADDW_REGS,                    /* r24 - r31 */
 262   SIMPLE_LD_REGS,               /* r16 - r23 */
 263   LD_REGS,                      /* r16 - r31 */
 264   NO_LD_REGS,                   /* r0 - r15 */
 265   GENERAL_REGS,                 /* r0 - r31 */
 266   ALL_REGS, LIM_REG_CLASSES
 267 };
 268
 269
 270 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 271
 272 #define REG_CLASS_NAMES {                                       \
 273                  "NO_REGS",                                     \
 274                    "R0_REG",    /* r0 */                        \
 275                    "POINTER_X_REGS", /* r26 - r27 */            \
 276                    "POINTER_Y_REGS", /* r28 - r29 */            \
 277                    "POINTER_Z_REGS", /* r30 - r31 */            \
 278                    "STACK_REG", /* STACK */                     \
 279                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 280                    "POINTER_REGS", /* r26 - r31 */              \
 281                    "ADDW_REGS", /* r24 - r31 */                 \
 282                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 283                    "LD_REGS",   /* r16 - r31 */                 \
 284                    "NO_LD_REGS", /* r0 - r15 */                 \
 285                    "GENERAL_REGS", /* r0 - r31 */               \
 286                    "ALL_REGS" }
 287
 288 #define REG_CLASS_CONTENTS {                                            \
 289   {0x00000000,0x00000000},      /* NO_REGS */                           \
 290   {0x00000001,0x00000000},      /* R0_REG */                            \
 291   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
 292   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
 293   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
 294   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 295   {(3 << REG_Y) | (3 << REG_Z),                                         \
 296      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 297   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
 298      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 299   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
 300      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 301   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 302   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
 303      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 304   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 305   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 306   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 307 }
 308
 309 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 310
 311 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
 312
 313 #define INDEX_REG_CLASS NO_REGS
 314
 315 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER            \
 316                                  && ((r) == REG_X                       \
 317                                      || (r) == REG_Y                    \
 318                                      || (r) == REG_Z                    \
 319                                      || (r) == ARG_POINTER_REGNUM))     \
 320                                 || (reg_renumber                        \
 321                                     && (reg_renumber[r] == REG_X        \
 322                                         || reg_renumber[r] == REG_Y     \
 323                                         || reg_renumber[r] == REG_Z     \
 324                                         || (reg_renumber[r]             \
 325                                             == ARG_POINTER_REGNUM))))
 326
 327 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 328
 329 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 330
 331 #define STACK_PUSH_CODE POST_DEC
 332
 333 #define STACK_GROWS_DOWNWARD
 334
 335 #define STARTING_FRAME_OFFSET 1
 336
 337 #define STACK_POINTER_OFFSET 1
 338
 339 #define FIRST_PARM_OFFSET(FUNDECL) 0
 340
 341 #define STACK_BOUNDARY 8
 342
 343 #define STACK_POINTER_REGNUM 32
 344
 345 #define FRAME_POINTER_REGNUM REG_Y
 346
 347 #define ARG_POINTER_REGNUM 34
 348
 349 #define STATIC_CHAIN_REGNUM 2
 350
 351 #define ELIMINABLE_REGS {                                       \
 352       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
 353         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
 354        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
 355
 356 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 357   OFFSET = avr_initial_elimination_offset (FROM, TO)
 358
 359 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 360
 361 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 362    for POST_DEC targets (PR27386).  */
 363 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 364
 365 typedef struct avr_args {
 366   int nregs;                    /* # registers available for passing */
 367   int regno;                    /* next available register number */
 368 } CUMULATIVE_ARGS;
 369
 370 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 371   init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 372
 373 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
 374
 375 #define DEFAULT_PCC_STRUCT_RETURN 0
 376
 377 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 378
 379 #define HAVE_POST_INCREMENT 1
 380 #define HAVE_PRE_DECREMENT 1
 381
 382 #define MAX_REGS_PER_ADDRESS 1
 383
 384 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
 385   (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
 386
 387 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
 388 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 389   do {                                                                  \
 390     rtx new_x = avr_legitimize_reload_address (X, MODE, OPNUM, TYPE,    \
 391                                                ADDR_TYPE (TYPE),        \
 392                                                IND_L, make_memloc);     \
 393     if (new_x)                                                          \
 394       {                                                                 \
 395         X = new_x;                                                      \
 396         goto WIN;                                                       \
 397       }                                                                 \
 398   } while (0)
 399
 400 #define BRANCH_COST(speed_p, predictable_p) 0
 401
 402 #define SLOW_BYTE_ACCESS 0
 403
 404 #define NO_FUNCTION_CSE
 405
 406 #define TEXT_SECTION_ASM_OP "\t.text"
 407
 408 #define DATA_SECTION_ASM_OP "\t.data"
 409
 410 #define BSS_SECTION_ASM_OP "\t.section .bss"
 411
 412 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 413    There are no shared libraries on this target, and these sections are
 414    placed in the read-only program memory, so they are not writable.  */
 415
 416 #undef CTORS_SECTION_ASM_OP
 417 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 418
 419 #undef DTORS_SECTION_ASM_OP
 420 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 421
 422 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 423
 424 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 425
 426 #define SUPPORTS_INIT_PRIORITY 0
 427
 428 #define JUMP_TABLES_IN_TEXT_SECTION 0
 429
 430 #define ASM_COMMENT_START " ; "
 431
 432 #define ASM_APP_ON "/* #APP */\n"
 433
 434 #define ASM_APP_OFF "/* #NOAPP */\n"
 435
 436 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 437
 438 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 439   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 440
 441 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 442   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 443
 444 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 445   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 446
 447 /* Globalizing directive for a label.  */
 448 #define GLOBAL_ASM_OP ".global\t"
 449
 450 #define SUPPORTS_WEAK 1
 451
 452 #define HAS_INIT_SECTION 1
 453
 454 #define REGISTER_NAMES {                                \
 455   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 456     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 457     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 458     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 459     "__SP_L__","__SP_H__","argL","argH"}
 460
 461 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
 462
 463 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
 464
 465 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
 466
 467 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
 468
 469 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
 470
 471 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 472 {                                               \
 473   gcc_assert (REGNO < 32);                      \
 474   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 475 }
 476
 477 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 478 {                                               \
 479   gcc_assert (REGNO < 32);                      \
 480   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 481 }
 482
 483 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)          \
 484   avr_output_addr_vec_elt(STREAM, VALUE)
 485
 486 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 487   do {                                                  \
 488       if ((POWER) > 1)                                  \
 489           fprintf (STREAM, "\t.p2align\t%d\n", POWER);  \
 490   } while (0)
 491
 492 #define CASE_VECTOR_MODE HImode
 493
 494 #undef WORD_REGISTER_OPERATIONS
 495
 496 #define MOVE_MAX 4
 497
 498 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 499
 500 #define Pmode HImode
 501
 502 #define FUNCTION_MODE HImode
 503
 504 #define DOLLARS_IN_IDENTIFIERS 0
 505
 506 #define TRAMPOLINE_SIZE 4
 507
 508 /* Store in cc_status the expressions
 509    that the condition codes will describe
 510    after execution of an instruction whose pattern is EXP.
 511    Do not alter them if the instruction would not alter the cc's.  */
 512
 513 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
 514
 515 /* The add insns don't set overflow in a usable way.  */
 516 #define CC_OVERFLOW_UNUSABLE 01000
 517 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 518    Z bit is all we need when doing unsigned comparisons on the result of
 519    these insns (since they're always with 0).  However, conditions.h has
 520    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 521    understandable.  */
 522 #define CC_NO_CARRY CC_NO_OVERFLOW
 523
 524
 525 /* Output assembler code to FILE to increment profiler label # LABELNO
 526    for profiling a function entry.  */
 527
 528 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 529   fprintf (FILE, "/* profiler %d */", (LABELNO))
 530
 531 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
 532                                           adjust_insn_length (INSN, LENGTH))
 533
 534 extern const char *avr_device_to_arch (int argc, const char **argv);
 535 extern const char *avr_device_to_data_start (int argc, const char **argv);
 536 extern const char *avr_device_to_startfiles (int argc, const char **argv);
 537 extern const char *avr_device_to_devicelib (int argc, const char **argv);
 538
 539 #define EXTRA_SPEC_FUNCTIONS \
 540   { "device_to_arch", avr_device_to_arch }, \
 541   { "device_to_data_start", avr_device_to_data_start }, \
 542   { "device_to_startfile", avr_device_to_startfiles }, \
 543   { "device_to_devicelib", avr_device_to_devicelib },
 544
 545 #define CPP_SPEC ""
 546
 547 #define CC1_SPEC ""
 548
 549 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 550     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 551     %{!fexceptions:-fno-exceptions}"
 552 /* A C string constant that tells the GCC driver program options to
 553    pass to `cc1plus'.  */
 554
 555 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
 556 mmcu=*:-mmcu=%*}"
 557
 558 #define LINK_SPEC "\
 559 %{mrelax:--relax\
 560          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 561                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 562                              %{mmcu=atmega32*|\
 563                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 564                              %{mmcu=atmega64*|\
 565                                mmcu=at90can64*|\
 566                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 567 %:device_to_arch(%{mmcu=*:%*})\
 568 %:device_to_data_start(%{mmcu=*:%*})"
 569
 570 #define LIB_SPEC \
 571   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 572
 573 #define LIBSTDCXX "gcc"
 574 /* No libstdc++ for now.  Empty string doesn't work.  */
 575
 576 #define LIBGCC_SPEC \
 577   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 578
 579 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
 580
 581 #define ENDFILE_SPEC ""
 582
 583 /* This is the default without any -mmcu=* option (AT90S*).  */
 584 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 585
 586 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 587   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 588
 589 /* Note that the other files fail to use these
 590    in some of the places where they should.  */
 591
 592 #if defined(__STDC__) || defined(ALMOST_STDC)
 593 #define AS2(a,b,c) #a " " #b "," #c
 594 #define AS2C(b,c) " " #b "," #c
 595 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
 596 #define AS1(a,b) #a " " #b
 597 #else
 598 #define AS1(a,b) "a     b"
 599 #define AS2(a,b,c) "a   b,c"
 600 #define AS2C(b,c) " b,c"
 601 #define AS3(a,b,c,d) "a b,c,d"
 602 #endif
 603 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
 604 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
 605 #define CR_TAB "\n\t"
 606
 607 #define DWARF2_ADDR_SIZE 4
 608
 609 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 610 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 611
 612 /* The caller's stack pointer value immediately before the call
 613    is one byte below the first argument.  */
 614 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 615
 616 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 617   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 618
 619 /* A C structure for machine-specific, per-function data.
 620    This is added to the cfun structure.  */
 621 struct GTY(()) machine_function
 622 {
 623   /* 'true' - if current function is a naked function.  */
 624   int is_naked;
 625
 626   /* 'true' - if current function is an interrupt function
 627      as specified by the "interrupt" attribute.  */
 628   int is_interrupt;
 629
 630   /* 'true' - if current function is a signal function
 631      as specified by the "signal" attribute.  */
 632   int is_signal;
 633
 634   /* 'true' - if current function is a 'task' function
 635      as specified by the "OS_task" attribute.  */
 636   int is_OS_task;
 637
 638   /* 'true' - if current function is a 'main' function
 639      as specified by the "OS_main" attribute.  */
 640   int is_OS_main;
 641
 642   /* Current function stack size.  */
 643   int stack_usage;
 644
 645   /* 'true' if a callee might be tail called */
 646   int sibcall_fails;
 647 };
 648
 649 /* AVR does not round pushes, but the existance of this macro is
 650    required in order for pushes to be generated.  */
 651 #define PUSH_ROUNDING(X)        (X)