1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998-2020 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov (chertykov@gmail.com)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 /* Id of the address space as used in c_register_addr_space */
27 /* Flavour of memory: 0 = RAM, 1 = Flash */
30 /* Width of pointer (in bytes) */
33 /* Name of the address space as visible to the user */
36 /* Segment (i.e. 64k memory chunk) number. */
39 /* Section prefix, e.g. ".progmem1.data" */
40 const char *section_name
;
43 extern const avr_addrspace_t avr_addrspace
[];
45 /* Known address spaces */
49 ADDR_SPACE_RAM
, /* ADDR_SPACE_GENERIC */
61 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
63 #define AVR_SHORT_CALLS (TARGET_SHORT_CALLS \
64 && avr_arch == &avr_arch_types[ARCH_AVRXMEGA3])
65 #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call && ! AVR_SHORT_CALLS)
66 #define AVR_HAVE_MUL (avr_arch->have_mul)
67 #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx)
68 #define AVR_HAVE_LPM (!AVR_TINY)
69 #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx)
70 #define AVR_HAVE_ELPM (avr_arch->have_elpm)
71 #define AVR_HAVE_ELPMX (avr_arch->have_elpmx)
72 #define AVR_HAVE_RAMPD (avr_arch->have_rampd)
73 #define AVR_HAVE_RAMPX (avr_arch->have_rampd)
74 #define AVR_HAVE_RAMPY (avr_arch->have_rampd)
75 #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \
76 || avr_arch->have_rampd)
77 #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall)
79 /* Handling of 8-bit SP versus 16-bit SP is as follows:
81 FIXME: DRIVER_SELF_SPECS has changed.
82 -msp8 is used internally to select the right multilib for targets with
83 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices
84 with 8-bit SP or by multilib generation machinery. If a frame pointer is
85 needed and SP is only 8 bits wide, SP is zero-extended to get FP.
87 TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
88 This option has no effect on multilib selection. It serves to save some
89 bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
91 These two properties are reflected by built-in macros __AVR_SP8__ resp.
92 __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation
93 there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */
95 #define AVR_HAVE_8BIT_SP \
96 (TARGET_TINY_STACK || avr_sp8)
98 #define AVR_HAVE_SPH (!avr_sp8)
100 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
101 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
103 #define AVR_XMEGA (avr_arch->xmega_p)
104 #define AVR_TINY (avr_arch->tiny_p)
106 #define BITS_BIG_ENDIAN 0
107 #define BYTES_BIG_ENDIAN 0
108 #define WORDS_BIG_ENDIAN 0
111 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
112 #define UNITS_PER_WORD 4
114 /* Width of a word, in units (bytes). */
115 #define UNITS_PER_WORD 1
118 #define POINTER_SIZE 16
121 /* Maximum sized of reasonable data type
122 DImode or Dfmode ... */
123 #define MAX_FIXED_MODE_SIZE 32
125 #define PARM_BOUNDARY 8
127 #define FUNCTION_BOUNDARY 8
129 #define EMPTY_FIELD_BOUNDARY 8
131 /* No data type wants to be aligned rounder than this. */
132 #define BIGGEST_ALIGNMENT 8
134 #define TARGET_VTABLE_ENTRY_ALIGN 8
136 #define STRICT_ALIGNMENT 0
138 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
139 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
140 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
141 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
142 #define FLOAT_TYPE_SIZE 32
143 #define DOUBLE_TYPE_SIZE (avr_double)
144 #define LONG_DOUBLE_TYPE_SIZE (avr_long_double)
146 #define LONG_LONG_ACCUM_TYPE_SIZE 64
148 #define DEFAULT_SIGNED_CHAR 1
150 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
151 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
153 #define WCHAR_TYPE_SIZE 16
155 #define FIRST_PSEUDO_REGISTER 36
157 #define GENERAL_REGNO_P(N) IN_RANGE (N, 2, 31)
158 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
160 #define FIXED_REGISTERS {\
178 1,1 /* arg pointer */ }
180 #define CALL_USED_REGISTERS { \
198 1,1 /* arg pointer */ }
200 #define REG_ALLOC_ORDER { \
208 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
213 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order()
219 POINTER_X_REGS
, /* r26 - r27 */
220 POINTER_Y_REGS
, /* r28 - r29 */
221 POINTER_Z_REGS
, /* r30 - r31 */
222 STACK_REG
, /* STACK */
223 BASE_POINTER_REGS
, /* r28 - r31 */
224 POINTER_REGS
, /* r26 - r31 */
225 ADDW_REGS
, /* r24 - r31 */
226 SIMPLE_LD_REGS
, /* r16 - r23 */
227 LD_REGS
, /* r16 - r31 */
228 NO_LD_REGS
, /* r0 - r15 */
229 GENERAL_REGS
, /* r0 - r31 */
230 ALL_REGS
, LIM_REG_CLASSES
234 #define N_REG_CLASSES (int)LIM_REG_CLASSES
236 #define REG_CLASS_NAMES { \
239 "POINTER_X_REGS", /* r26 - r27 */ \
240 "POINTER_Y_REGS", /* r28 - r29 */ \
241 "POINTER_Z_REGS", /* r30 - r31 */ \
242 "STACK_REG", /* STACK */ \
243 "BASE_POINTER_REGS", /* r28 - r31 */ \
244 "POINTER_REGS", /* r26 - r31 */ \
245 "ADDW_REGS", /* r24 - r31 */ \
246 "SIMPLE_LD_REGS", /* r16 - r23 */ \
247 "LD_REGS", /* r16 - r31 */ \
248 "NO_LD_REGS", /* r0 - r15 */ \
249 "GENERAL_REGS", /* r0 - r31 */ \
252 #define REG_CLASS_CONTENTS { \
253 {0x00000000,0x00000000}, /* NO_REGS */ \
254 {0x00000001,0x00000000}, /* R0_REG */ \
255 {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
256 {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
257 {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
258 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
259 {(3u << REG_Y) | (3u << REG_Z), \
260 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
261 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \
262 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
263 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \
264 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
265 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
266 {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\
267 0x00000000}, /* LD_REGS, r16 - r31 */ \
268 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
269 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
270 {0xffffffff,0x00000003} /* ALL_REGS */ \
273 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
275 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \
276 avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
278 #define INDEX_REG_CLASS NO_REGS
280 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
281 avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
283 #define REGNO_OK_FOR_INDEX_P(NUM) 0
285 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
287 #define STACK_PUSH_CODE POST_DEC
289 #define STACK_GROWS_DOWNWARD 1
291 #define STACK_POINTER_OFFSET 1
293 #define FIRST_PARM_OFFSET(FUNDECL) 0
295 #define STACK_BOUNDARY 8
297 #define STACK_POINTER_REGNUM 32
299 #define FRAME_POINTER_REGNUM REG_Y
301 #define ARG_POINTER_REGNUM 34
303 #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2)
305 #define ELIMINABLE_REGS { \
306 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
307 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
308 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
309 { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } }
311 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
312 OFFSET = avr_initial_elimination_offset (FROM, TO)
314 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
316 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
317 for POST_DEC targets (PR27386). */
318 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
320 typedef struct avr_args
322 /* # Registers available for passing */
325 /* Next available register number */
329 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
330 avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
332 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r)
334 #define DEFAULT_PCC_STRUCT_RETURN 0
336 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
338 #define HAVE_POST_INCREMENT 1
339 #define HAVE_PRE_DECREMENT 1
341 #define MAX_REGS_PER_ADDRESS 1
343 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
345 rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
347 IND_L, make_memloc); \
355 /* We increase branch costs after reload in order to keep basic-block
356 reordering from introducing out-of-line jumps and to prefer fall-through
357 edges instead. The default branch costs are 0, mainly because otherwise
358 do_store_flag might come up with bloated code. */
359 #define BRANCH_COST(speed_p, predictable_p) \
360 (avr_branch_cost + (reload_completed ? 4 : 0))
362 #define SLOW_BYTE_ACCESS 0
364 #define NO_FUNCTION_CSE 1
366 #define REGISTER_TARGET_PRAGMAS() \
368 avr_register_target_pragmas(); \
371 #define TEXT_SECTION_ASM_OP "\t.text"
373 #define DATA_SECTION_ASM_OP "\t.data"
375 #define BSS_SECTION_ASM_OP "\t.section .bss"
377 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
378 There are no shared libraries on this target, and these sections are
379 placed in the read-only program memory, so they are not writable. */
381 #undef CTORS_SECTION_ASM_OP
382 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
384 #undef DTORS_SECTION_ASM_OP
385 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
387 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
389 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
391 #define SUPPORTS_INIT_PRIORITY 0
393 /* We pretend jump tables are in text section because otherwise,
394 final.c will switch to .rodata before jump tables and thereby
395 triggers __do_copy_data. As we implement ASM_OUTPUT_ADDR_VEC,
396 we still have full control over the jump tables themselves. */
397 #define JUMP_TABLES_IN_TEXT_SECTION 1
399 #define ASM_COMMENT_START " ; "
401 #define ASM_APP_ON "/* #APP */\n"
403 #define ASM_APP_OFF "/* #NOAPP */\n"
405 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
407 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
408 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
410 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
411 avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \
412 asm_output_aligned_bss)
414 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
415 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
417 /* Globalizing directive for a label. */
418 #define GLOBAL_ASM_OP ".global\t"
420 #define SUPPORTS_WEAK 1
422 #define HAS_INIT_SECTION 1
424 #define REGISTER_NAMES { \
425 "r0","r1","r2","r3","r4","r5","r6","r7", \
426 "r8","r9","r10","r11","r12","r13","r14","r15", \
427 "r16","r17","r18","r19","r20","r21","r22","r23", \
428 "r24","r25","r26","r27","r28","r29","r30","r31", \
429 "__SP_L__","__SP_H__","argL","argH"}
431 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
432 avr_final_prescan_insn (insn, operand,nop)
434 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
436 gcc_assert (REGNO < 32); \
437 fprintf (STREAM, "\tpush\tr%d", REGNO); \
440 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
442 gcc_assert (REGNO < 32); \
443 fprintf (STREAM, "\tpop\tr%d", REGNO); \
446 #define ASM_OUTPUT_ADDR_VEC(TLABEL, TDATA) \
447 avr_output_addr_vec (TLABEL, TDATA)
449 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
452 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
455 #define CASE_VECTOR_MODE HImode
457 #undef WORD_REGISTER_OPERATIONS
459 /* Can move only a single byte from memory to reg in a
460 single instruction. */
464 /* Allow upto two bytes moves to occur using by_pieces
467 #define MOVE_MAX_PIECES 2
469 /* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen
470 by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES
471 was 4. When optimizing for size, allow memory moves upto 2 bytes.
472 Also see avr_use_by_pieces_infrastructure_p. */
474 #define MOVE_RATIO(speed) ((speed) ? 3 : 2)
478 #define FUNCTION_MODE HImode
480 #define DOLLARS_IN_IDENTIFIERS 0
482 #define TRAMPOLINE_SIZE 4
484 /* Store in cc_status the expressions
485 that the condition codes will describe
486 after execution of an instruction whose pattern is EXP.
487 Do not alter them if the instruction would not alter the cc's. */
489 #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN)
491 /* The add insns don't set overflow in a usable way. */
492 #define CC_OVERFLOW_UNUSABLE 01000
493 /* The mov,and,or,xor insns don't set carry. That's ok though as the
494 Z bit is all we need when doing unsigned comparisons on the result of
495 these insns (since they're always with 0). However, conditions.h has
496 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
498 #define CC_NO_CARRY CC_NO_OVERFLOW
501 /* Output assembler code to FILE to increment profiler label # LABELNO
502 for profiling a function entry. */
504 #define FUNCTION_PROFILER(FILE, LABELNO) \
505 fprintf (FILE, "/* profiler %d */", (LABELNO))
507 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
508 (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
510 extern const char *avr_devicespecs_file (int, const char**);
511 extern const char *avr_double_lib (int, const char**);
513 #define EXTRA_SPEC_FUNCTIONS \
514 { "double-lib", avr_double_lib }, \
515 { "device-specs-file", avr_devicespecs_file },
517 /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
518 Apply '%s' to a static string to inflate the file (directory) name which
519 is used to diagnose problems with reading the specs file. */
521 #undef DRIVER_SELF_SPECS
522 #define DRIVER_SELF_SPECS \
523 " %:double-lib(%{m*:m%*})" \
524 " %:device-specs-file(device-specs%s %{mmcu=*:%*})"
526 /* No libstdc++ for now. Empty string doesn't work. */
527 #define LIBSTDCXX "gcc"
529 /* This is the default without any -mmcu=* option. */
530 #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT }
532 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
533 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
535 #define CR_TAB "\n\t"
537 #define DWARF2_ADDR_SIZE 4
539 #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx ()
540 #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2)
542 /* The caller's stack pointer value immediately before the call
543 is one byte below the first argument. */
544 #define ARG_POINTER_CFA_OFFSET(FNDECL) -1
546 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
547 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
549 /* A C structure for machine-specific, per-function data.
550 This is added to the cfun structure. */
551 struct GTY(()) machine_function
553 /* 'true' - if current function is a naked function. */
556 /* 'true' - if current function is an interrupt function
557 as specified by the "interrupt" attribute. */
560 /* 'true' - if current function is a signal function
561 as specified by the "signal" attribute. */
564 /* 'true' - if current function is a 'task' function
565 as specified by the "OS_task" attribute. */
568 /* 'true' - if current function is a 'main' function
569 as specified by the "OS_main" attribute. */
572 /* Current function stack size. */
575 /* 'true' if a callee might be tail called */
578 /* 'true' if the above is_foo predicates are sanity-checked to avoid
579 multiple diagnose for the same function. */
580 int attributes_checked_p
;
582 /* 'true' - if current function shall not use '__gcc_isr' pseudo
583 instructions as specified by the "no_gccisr" attribute. */
586 /* Used for `__gcc_isr' pseudo instruction handling of
587 non-naked ISR prologue / epilogue(s). */
590 /* 'true' if this function actually uses "*gasisr" insns. */
592 /* 'true' if this function is allowed to use "*gasisr" insns. */
594 /* The register numer as printed by the Done chunk. */
598 /* 'true' if this function references .L__stack_usage like with
599 __builtin_return_address. */
600 int use_L__stack_usage
;
603 /* AVR does not round pushes, but the existence of this macro is
604 required in order for pushes to be generated. */
605 #define PUSH_ROUNDING(X) (X)
607 /* Define prototype here to avoid build warning. Some files using
608 ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
609 tm.h but not tm_p.h. */
610 extern int avr_accumulate_outgoing_args (void);
611 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
613 #define INIT_EXPANDERS avr_init_expanders()
615 /* Flags used for io and address attributes. */
616 #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4)
617 #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5)
618 #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6)