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1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
4 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
6 Contributed by Denis Chertykov (chertykov@gmail.com)
7
8 This file is part of GCC.
9
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
23
24 /* Names to predefine in the preprocessor for this target machine. */
25
26 struct base_arch_s {
27 /* Assembler only. */
28 int asm_only;
29
30 /* Core have 'MUL*' instructions. */
31 int have_mul;
32
33 /* Core have 'CALL' and 'JMP' instructions. */
34 int have_jmp_call;
35
36 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
37 int have_movw_lpmx;
38
39 /* Core have 'ELPM' instructions. */
40 int have_elpm;
41
42 /* Core have 'ELPM Rx,Z' instructions. */
43 int have_elpmx;
44
45 /* Core have 'EICALL' and 'EIJMP' instructions. */
46 int have_eijmp_eicall;
47
48 /* Reserved for xmega architecture. */
49 int reserved;
50
51 /* Reserved for xmega architecture. */
52 int reserved2;
53
54 /* Default start of data section address for architecture. */
55 int default_data_section_start;
56
57 const char *const macro;
58
59 /* Architecture name. */
60 const char *const arch_name;
61 };
62
63 /* These names are used as the index into the avr_arch_types[] table
64 above. */
65
66 enum avr_arch
67 {
68 ARCH_UNKNOWN,
69 ARCH_AVR1,
70 ARCH_AVR2,
71 ARCH_AVR25,
72 ARCH_AVR3,
73 ARCH_AVR31,
74 ARCH_AVR35,
75 ARCH_AVR4,
76 ARCH_AVR5,
77 ARCH_AVR51,
78 ARCH_AVR6
79 };
80
81 struct mcu_type_s {
82 /* Device name. */
83 const char *const name;
84
85 /* Index in avr_arch_types[]. */
86 int arch;
87
88 /* Must lie outside user's namespace. NULL == no macro. */
89 const char *const macro;
90
91 /* Stack pointer have 8 bits width. */
92 int short_sp;
93
94 /* Start of data section. */
95 int data_section_start;
96
97 /* Name of device library. */
98 const char *const library_name;
99 };
100
101 /* Preprocessor macros to define depending on MCU type. */
102 extern const char *avr_extra_arch_macro;
103 extern const struct base_arch_s *avr_current_arch;
104 extern const struct mcu_type_s *avr_current_device;
105 extern const struct mcu_type_s avr_mcu_types[];
106 extern const struct base_arch_s avr_arch_types[];
107
108 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
109
110 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
111 extern GTY(()) section *progmem_section;
112 #endif
113
114 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
115 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
116 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
117 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
118 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
119 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
120 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
121
122 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
123 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
124
125 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
126
127 #define BITS_BIG_ENDIAN 0
128 #define BYTES_BIG_ENDIAN 0
129 #define WORDS_BIG_ENDIAN 0
130
131 #ifdef IN_LIBGCC2
132 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
133 #define UNITS_PER_WORD 4
134 #else
135 /* Width of a word, in units (bytes). */
136 #define UNITS_PER_WORD 1
137 #endif
138
139 #define POINTER_SIZE 16
140
141
142 /* Maximum sized of reasonable data type
143 DImode or Dfmode ... */
144 #define MAX_FIXED_MODE_SIZE 32
145
146 #define PARM_BOUNDARY 8
147
148 #define FUNCTION_BOUNDARY 8
149
150 #define EMPTY_FIELD_BOUNDARY 8
151
152 /* No data type wants to be aligned rounder than this. */
153 #define BIGGEST_ALIGNMENT 8
154
155 #define MAX_OFILE_ALIGNMENT (32768 * 8)
156
157 #define TARGET_VTABLE_ENTRY_ALIGN 8
158
159 #define STRICT_ALIGNMENT 0
160
161 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
162 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
163 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
164 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
165 #define FLOAT_TYPE_SIZE 32
166 #define DOUBLE_TYPE_SIZE 32
167 #define LONG_DOUBLE_TYPE_SIZE 32
168
169 #define DEFAULT_SIGNED_CHAR 1
170
171 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
172 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
173
174 #define WCHAR_TYPE_SIZE 16
175
176 #define FIRST_PSEUDO_REGISTER 36
177
178 #define FIXED_REGISTERS {\
179 1,1,/* r0 r1 */\
180 0,0,/* r2 r3 */\
181 0,0,/* r4 r5 */\
182 0,0,/* r6 r7 */\
183 0,0,/* r8 r9 */\
184 0,0,/* r10 r11 */\
185 0,0,/* r12 r13 */\
186 0,0,/* r14 r15 */\
187 0,0,/* r16 r17 */\
188 0,0,/* r18 r19 */\
189 0,0,/* r20 r21 */\
190 0,0,/* r22 r23 */\
191 0,0,/* r24 r25 */\
192 0,0,/* r26 r27 */\
193 0,0,/* r28 r29 */\
194 0,0,/* r30 r31 */\
195 1,1,/* STACK */\
196 1,1 /* arg pointer */ }
197
198 #define CALL_USED_REGISTERS { \
199 1,1,/* r0 r1 */ \
200 0,0,/* r2 r3 */ \
201 0,0,/* r4 r5 */ \
202 0,0,/* r6 r7 */ \
203 0,0,/* r8 r9 */ \
204 0,0,/* r10 r11 */ \
205 0,0,/* r12 r13 */ \
206 0,0,/* r14 r15 */ \
207 0,0,/* r16 r17 */ \
208 1,1,/* r18 r19 */ \
209 1,1,/* r20 r21 */ \
210 1,1,/* r22 r23 */ \
211 1,1,/* r24 r25 */ \
212 1,1,/* r26 r27 */ \
213 0,0,/* r28 r29 */ \
214 1,1,/* r30 r31 */ \
215 1,1,/* STACK */ \
216 1,1 /* arg pointer */ }
217
218 #define REG_ALLOC_ORDER { \
219 24,25, \
220 18,19, \
221 20,21, \
222 22,23, \
223 30,31, \
224 26,27, \
225 28,29, \
226 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
227 0,1, \
228 32,33,34,35 \
229 }
230
231 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
232
233
234 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
235
236 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
237
238 #define MODES_TIEABLE_P(MODE1, MODE2) 1
239
240 enum reg_class {
241 NO_REGS,
242 R0_REG, /* r0 */
243 POINTER_X_REGS, /* r26 - r27 */
244 POINTER_Y_REGS, /* r28 - r29 */
245 POINTER_Z_REGS, /* r30 - r31 */
246 STACK_REG, /* STACK */
247 BASE_POINTER_REGS, /* r28 - r31 */
248 POINTER_REGS, /* r26 - r31 */
249 ADDW_REGS, /* r24 - r31 */
250 SIMPLE_LD_REGS, /* r16 - r23 */
251 LD_REGS, /* r16 - r31 */
252 NO_LD_REGS, /* r0 - r15 */
253 GENERAL_REGS, /* r0 - r31 */
254 ALL_REGS, LIM_REG_CLASSES
255 };
256
257
258 #define N_REG_CLASSES (int)LIM_REG_CLASSES
259
260 #define REG_CLASS_NAMES { \
261 "NO_REGS", \
262 "R0_REG", /* r0 */ \
263 "POINTER_X_REGS", /* r26 - r27 */ \
264 "POINTER_Y_REGS", /* r28 - r29 */ \
265 "POINTER_Z_REGS", /* r30 - r31 */ \
266 "STACK_REG", /* STACK */ \
267 "BASE_POINTER_REGS", /* r28 - r31 */ \
268 "POINTER_REGS", /* r26 - r31 */ \
269 "ADDW_REGS", /* r24 - r31 */ \
270 "SIMPLE_LD_REGS", /* r16 - r23 */ \
271 "LD_REGS", /* r16 - r31 */ \
272 "NO_LD_REGS", /* r0 - r15 */ \
273 "GENERAL_REGS", /* r0 - r31 */ \
274 "ALL_REGS" }
275
276 #define REG_CLASS_CONTENTS { \
277 {0x00000000,0x00000000}, /* NO_REGS */ \
278 {0x00000001,0x00000000}, /* R0_REG */ \
279 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
280 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
281 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
282 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
283 {(3 << REG_Y) | (3 << REG_Z), \
284 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
285 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
286 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
287 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
288 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
289 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
290 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
291 0x00000000}, /* LD_REGS, r16 - r31 */ \
292 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
293 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
294 {0xffffffff,0x00000003} /* ALL_REGS */ \
295 }
296
297 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
298
299 /* The following macro defines cover classes for Integrated Register
300 Allocator. Cover classes is a set of non-intersected register
301 classes covering all hard registers used for register allocation
302 purpose. Any move between two registers of a cover class should be
303 cheaper than load or store of the registers. The macro value is
304 array of register classes with LIM_REG_CLASSES used as the end
305 marker. */
306
307 #define IRA_COVER_CLASSES \
308 { \
309 GENERAL_REGS, LIM_REG_CLASSES \
310 }
311
312 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
313
314 #define INDEX_REG_CLASS NO_REGS
315
316 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
317 && ((r) == REG_X \
318 || (r) == REG_Y \
319 || (r) == REG_Z \
320 || (r) == ARG_POINTER_REGNUM)) \
321 || (reg_renumber \
322 && (reg_renumber[r] == REG_X \
323 || reg_renumber[r] == REG_Y \
324 || reg_renumber[r] == REG_Z \
325 || (reg_renumber[r] \
326 == ARG_POINTER_REGNUM))))
327
328 #define REGNO_OK_FOR_INDEX_P(NUM) 0
329
330 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
331
332 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
333
334 #define STACK_PUSH_CODE POST_DEC
335
336 #define STACK_GROWS_DOWNWARD
337
338 #define STARTING_FRAME_OFFSET 1
339
340 #define STACK_POINTER_OFFSET 1
341
342 #define FIRST_PARM_OFFSET(FUNDECL) 0
343
344 #define STACK_BOUNDARY 8
345
346 #define STACK_POINTER_REGNUM 32
347
348 #define FRAME_POINTER_REGNUM REG_Y
349
350 #define ARG_POINTER_REGNUM 34
351
352 #define STATIC_CHAIN_REGNUM 2
353
354 #define ELIMINABLE_REGS { \
355 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
356 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
357 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
358
359 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
360 OFFSET = avr_initial_elimination_offset (FROM, TO)
361
362 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
363
364 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
365 for POST_DEC targets (PR27386). */
366 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
367
368 typedef struct avr_args {
369 int nregs; /* # registers available for passing */
370 int regno; /* next available register number */
371 } CUMULATIVE_ARGS;
372
373 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
374 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
375
376 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
377
378 extern int avr_reg_order[];
379
380 #define DEFAULT_PCC_STRUCT_RETURN 0
381
382 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
383
384 #define HAVE_POST_INCREMENT 1
385 #define HAVE_PRE_DECREMENT 1
386
387 #define MAX_REGS_PER_ADDRESS 1
388
389 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
390 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
391
392 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
393
394 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
395 is no worse than normal base pointers R28/29 and R30/31. For example:
396 If base offset is greater than 63 bytes or for R++ or --R addressing. */
397
398 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
399 do { \
400 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
401 { \
402 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
403 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
404 OPNUM, RELOAD_OTHER); \
405 goto WIN; \
406 } \
407 if (GET_CODE (X) == PLUS \
408 && REG_P (XEXP (X, 0)) \
409 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \
410 && GET_CODE (XEXP (X, 1)) == CONST_INT \
411 && INTVAL (XEXP (X, 1)) >= 1) \
412 { \
413 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
414 if (fit) \
415 { \
416 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
417 { \
418 int regno = REGNO (XEXP (X, 0)); \
419 rtx mem = make_memloc (X, regno); \
420 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
421 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
422 1, ADDR_TYPE (TYPE)); \
423 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
424 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
425 OPNUM, TYPE); \
426 goto WIN; \
427 } \
428 } \
429 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
430 { \
431 push_reload (X, NULL_RTX, &X, NULL, \
432 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
433 OPNUM, TYPE); \
434 goto WIN; \
435 } \
436 } \
437 } while(0)
438
439 #define LEGITIMATE_CONSTANT_P(X) 1
440
441 #define BRANCH_COST(speed_p, predictable_p) 0
442
443 #define SLOW_BYTE_ACCESS 0
444
445 #define NO_FUNCTION_CSE
446
447 #define TEXT_SECTION_ASM_OP "\t.text"
448
449 #define DATA_SECTION_ASM_OP "\t.data"
450
451 #define BSS_SECTION_ASM_OP "\t.section .bss"
452
453 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
454 There are no shared libraries on this target, and these sections are
455 placed in the read-only program memory, so they are not writable. */
456
457 #undef CTORS_SECTION_ASM_OP
458 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
459
460 #undef DTORS_SECTION_ASM_OP
461 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
462
463 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
464
465 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
466
467 #define SUPPORTS_INIT_PRIORITY 0
468
469 #define JUMP_TABLES_IN_TEXT_SECTION 0
470
471 #define ASM_COMMENT_START " ; "
472
473 #define ASM_APP_ON "/* #APP */\n"
474
475 #define ASM_APP_OFF "/* #NOAPP */\n"
476
477 /* Switch into a generic section. */
478 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
479 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
480
481 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
482
483 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
484
485 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
486 do { \
487 fputs ("\t.comm ", (STREAM)); \
488 assemble_name ((STREAM), (NAME)); \
489 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
490 } while (0)
491
492 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
493 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
494
495 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
496 do { \
497 fputs ("\t.lcomm ", (STREAM)); \
498 assemble_name ((STREAM), (NAME)); \
499 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
500 } while (0)
501
502 #undef TYPE_ASM_OP
503 #undef SIZE_ASM_OP
504 #undef WEAK_ASM_OP
505 #define TYPE_ASM_OP "\t.type\t"
506 #define SIZE_ASM_OP "\t.size\t"
507 #define WEAK_ASM_OP "\t.weak\t"
508 /* Define the strings used for the special svr4 .type and .size directives.
509 These strings generally do not vary from one system running svr4 to
510 another, but if a given system (e.g. m88k running svr) needs to use
511 different pseudo-op names for these, they may be overridden in the
512 file which includes this one. */
513
514
515 #undef TYPE_OPERAND_FMT
516 #define TYPE_OPERAND_FMT "@%s"
517 /* The following macro defines the format used to output the second
518 operand of the .type assembler directive. Different svr4 assemblers
519 expect various different forms for this operand. The one given here
520 is just a default. You may need to override it in your machine-
521 specific tm.h file (depending upon the particulars of your assembler). */
522
523 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
524 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
525
526 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
527 do { \
528 if (!flag_inhibit_size_directive) \
529 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
530 } while (0)
531
532 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
533 do { \
534 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
535 size_directive_output = 0; \
536 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
537 { \
538 size_directive_output = 1; \
539 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
540 int_size_in_bytes (TREE_TYPE (DECL))); \
541 } \
542 ASM_OUTPUT_LABEL(FILE, NAME); \
543 } while (0)
544
545 #undef ASM_FINISH_DECLARE_OBJECT
546 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
547 do { \
548 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
549 HOST_WIDE_INT size; \
550 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
551 && ! AT_END && TOP_LEVEL \
552 && DECL_INITIAL (DECL) == error_mark_node \
553 && !size_directive_output) \
554 { \
555 size_directive_output = 1; \
556 size = int_size_in_bytes (TREE_TYPE (DECL)); \
557 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
558 } \
559 } while (0)
560
561
562 #define ESCAPES \
563 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
564 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
565 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
566 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
567 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
568 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
569 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
570 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
571 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
572 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
573 corresponds to a particular byte value [0..255]. For any
574 given byte value, if the value in the corresponding table
575 position is zero, the given character can be output directly.
576 If the table value is 1, the byte must be output as a \ooo
577 octal escape. If the tables value is anything else, then the
578 byte value should be output as a \ followed by the value
579 in the table. Note that we can use standard UN*X escape
580 sequences for many control characters, but we don't use
581 \a to represent BEL because some svr4 assemblers (e.g. on
582 the i386) don't know about that. Also, we don't use \v
583 since some versions of gas, such as 2.2 did not accept it. */
584
585 #define STRING_LIMIT ((unsigned) 64)
586 #define STRING_ASM_OP "\t.string\t"
587 /* Some svr4 assemblers have a limit on the number of characters which
588 can appear in the operand of a .string directive. If your assembler
589 has such a limitation, you should define STRING_LIMIT to reflect that
590 limit. Note that at least some svr4 assemblers have a limit on the
591 actual number of bytes in the double-quoted string, and that they
592 count each character in an escape sequence as one byte. Thus, an
593 escape sequence like \377 would count as four bytes.
594
595 If your target assembler doesn't support the .string directive, you
596 should define this to zero. */
597
598 /* Globalizing directive for a label. */
599 #define GLOBAL_ASM_OP ".global\t"
600
601 #define SET_ASM_OP "\t.set\t"
602
603 #define ASM_WEAKEN_LABEL(FILE, NAME) \
604 do \
605 { \
606 fputs ("\t.weak\t", (FILE)); \
607 assemble_name ((FILE), (NAME)); \
608 fputc ('\n', (FILE)); \
609 } \
610 while (0)
611
612 #define SUPPORTS_WEAK 1
613
614 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
615 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
616
617 #define HAS_INIT_SECTION 1
618
619 #define REGISTER_NAMES { \
620 "r0","r1","r2","r3","r4","r5","r6","r7", \
621 "r8","r9","r10","r11","r12","r13","r14","r15", \
622 "r16","r17","r18","r19","r20","r21","r22","r23", \
623 "r24","r25","r26","r27","r28","r29","r30","r31", \
624 "__SP_L__","__SP_H__","argL","argH"}
625
626 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
627
628 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
629
630 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
631
632 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
633
634 #define USER_LABEL_PREFIX ""
635
636 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
637
638 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
639 { \
640 gcc_assert (REGNO < 32); \
641 fprintf (STREAM, "\tpush\tr%d", REGNO); \
642 }
643
644 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
645 { \
646 gcc_assert (REGNO < 32); \
647 fprintf (STREAM, "\tpop\tr%d", REGNO); \
648 }
649
650 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
651 avr_output_addr_vec_elt(STREAM, VALUE)
652
653 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
654 (switch_to_section (progmem_section), \
655 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
656
657 #define ASM_OUTPUT_SKIP(STREAM, N) \
658 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
659
660 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
661 do { \
662 if ((POWER) > 1) \
663 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
664 } while (0)
665
666 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
667 default_elf_asm_output_external (FILE, DECL, NAME)
668
669 #define CASE_VECTOR_MODE HImode
670
671 #undef WORD_REGISTER_OPERATIONS
672
673 #define MOVE_MAX 4
674
675 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
676
677 #define Pmode HImode
678
679 #define FUNCTION_MODE HImode
680
681 #define DOLLARS_IN_IDENTIFIERS 0
682
683 #define NO_DOLLAR_IN_LABEL 1
684
685 #define TRAMPOLINE_SIZE 4
686
687 /* Store in cc_status the expressions
688 that the condition codes will describe
689 after execution of an instruction whose pattern is EXP.
690 Do not alter them if the instruction would not alter the cc's. */
691
692 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
693
694 /* The add insns don't set overflow in a usable way. */
695 #define CC_OVERFLOW_UNUSABLE 01000
696 /* The mov,and,or,xor insns don't set carry. That's ok though as the
697 Z bit is all we need when doing unsigned comparisons on the result of
698 these insns (since they're always with 0). However, conditions.h has
699 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
700 understandable. */
701 #define CC_NO_CARRY CC_NO_OVERFLOW
702
703
704 /* Output assembler code to FILE to increment profiler label # LABELNO
705 for profiling a function entry. */
706
707 #define FUNCTION_PROFILER(FILE, LABELNO) \
708 fprintf (FILE, "/* profiler %d */", (LABELNO))
709
710 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
711 adjust_insn_length (INSN, LENGTH))
712
713 extern const char *avr_device_to_arch (int argc, const char **argv);
714 extern const char *avr_device_to_data_start (int argc, const char **argv);
715 extern const char *avr_device_to_startfiles (int argc, const char **argv);
716 extern const char *avr_device_to_devicelib (int argc, const char **argv);
717
718 #define EXTRA_SPEC_FUNCTIONS \
719 { "device_to_arch", avr_device_to_arch }, \
720 { "device_to_data_start", avr_device_to_data_start }, \
721 { "device_to_startfile", avr_device_to_startfiles }, \
722 { "device_to_devicelib", avr_device_to_devicelib },
723
724 #define CPP_SPEC ""
725
726 #define CC1_SPEC ""
727
728 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
729 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
730 %{!fexceptions:-fno-exceptions}"
731 /* A C string constant that tells the GCC driver program options to
732 pass to `cc1plus'. */
733
734 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
735 mmcu=*:-mmcu=%*}"
736
737 #define LINK_SPEC "\
738 %{mrelax:--relax\
739 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
740 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
741 %{mmcu=atmega32*|\
742 mmcu=at90can32*:--pmem-wrap-around=32k}\
743 %{mmcu=atmega64*|\
744 mmcu=at90can64*|\
745 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
746 %:device_to_arch(%{mmcu=*:%*})\
747 %:device_to_data_start(%{mmcu=*:%*})"
748
749 #define LIB_SPEC \
750 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
751
752 #define LIBSTDCXX "gcc"
753 /* No libstdc++ for now. Empty string doesn't work. */
754
755 #define LIBGCC_SPEC \
756 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
757
758 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
759
760 #define ENDFILE_SPEC ""
761
762 /* This is the default without any -mmcu=* option (AT90S*). */
763 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
764
765 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
766 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
767
768 /* Note that the other files fail to use these
769 in some of the places where they should. */
770
771 #if defined(__STDC__) || defined(ALMOST_STDC)
772 #define AS2(a,b,c) #a " " #b "," #c
773 #define AS2C(b,c) " " #b "," #c
774 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
775 #define AS1(a,b) #a " " #b
776 #else
777 #define AS1(a,b) "a b"
778 #define AS2(a,b,c) "a b,c"
779 #define AS2C(b,c) " b,c"
780 #define AS3(a,b,c,d) "a b,c,d"
781 #endif
782 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
783 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
784 #define CR_TAB "\n\t"
785
786 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
787
788 #define DWARF2_DEBUGGING_INFO 1
789
790 #define DWARF2_ADDR_SIZE 4
791
792 #define OBJECT_FORMAT_ELF
793
794 #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx ()
795 #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2)
796
797 /* The caller's stack pointer value immediately before the call
798 is one byte below the first argument. */
799 #define ARG_POINTER_CFA_OFFSET(FNDECL) -1
800
801 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
802 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
803
804 /* A C structure for machine-specific, per-function data.
805 This is added to the cfun structure. */
806 struct GTY(()) machine_function
807 {
808 /* 'true' - if current function is a naked function. */
809 int is_naked;
810
811 /* 'true' - if current function is an interrupt function
812 as specified by the "interrupt" attribute. */
813 int is_interrupt;
814
815 /* 'true' - if current function is a signal function
816 as specified by the "signal" attribute. */
817 int is_signal;
818
819 /* 'true' - if current function is a 'task' function
820 as specified by the "OS_task" attribute. */
821 int is_OS_task;
822
823 /* 'true' - if current function is a 'main' function
824 as specified by the "OS_main" attribute. */
825 int is_OS_main;
826
827 /* Current function stack size. */
828 int stack_usage;
829
830 /* 'true' if a callee might be tail called */
831 int sibcall_fails;
832 };